Fertirrega_v6 Without Blocking Samples
This commit is contained in:
@@ -93,8 +93,8 @@ extern "C" {
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#define AD5934_FREQ_1K590HZ 0x003419E3 // 1.59kHz
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#define AD5934_FREQ_0HZ 0x00000000 // 0Hz
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#define AD5934_STEP_FREQ_0 0x0000 // 0 passos
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//#define AD5934_SETTLING_TIME_0S01 0x000C // 0,01s
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#define AD5934_SETTLING_TIME_0S01 0x0080
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#define AD5934_SETTLING_TIME_64 0x0040 // 64 ciclos
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/*****************************************************************************/
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/**************************** Command Codes **********************************/
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@@ -117,6 +117,12 @@ extern "C" {
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#define ADG715_SW7 0x40 //RTD Input
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#define ADG715_SW8 0x80 //CE Input
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/*****************************************************************************/
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/**************************** General Defines ********************************/
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/*****************************************************************************/
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/*
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#define AD5934_CH_REF_100R 0x10
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#define AD5934_CH_REF_1K 0x11
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@@ -171,6 +177,31 @@ extern "C" {
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#define AD5934_EC_ALPHA_PER_C 0.02f
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#define AD5934_EC_TEMP_REF_C 25.0f
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// Values for sample timming sync
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#define AD5934_SYNC_PER_SWEEP 60 // 60 ms between sweeps
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#define AD5934_SYNC_MUX_SETTLING 5 // 5 ms to wait before read after change ADG715 channels
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//Mux Set to Read...
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#define AD5934_ID_RTD 0
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#define AD5934_ID_EC 1
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#define AD5934_ID_REF 2
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/*****************************************************************************/
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/**************************** Filtering Defines *****************************/
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/*****************************************************************************/
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#define AD5934_TIME_PER_SWEEP 60 // 60 ms entre o início de cada sweep
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#define AD5934_TIME_MUX_SETTLING 10 // 10 ms de espera após trocar o MUX
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#define AD5934_BURST_SIZE 7
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#define AD5934_TRIM_COUNT 1
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#define AD5934_HISTORY_SIZE 8
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#define AD5934_IIR_ALPHA 0.25f
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union Bytes2Int
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{
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uint8_t bytes[2];
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@@ -213,6 +244,30 @@ typedef enum {
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AD5934_CH_MAX // Guarda automaticamente o número total de canais (15)
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} AD5934_Channel_t;
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typedef enum {
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AD5934_IDLE,
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AD5934_START_CONVERSION,
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AD5934_WAIT_CONVERSION,
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AD5934_READ_DATA,
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AD5934_WAIT_NEXT_SWEEP,
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AD5934_SWITCH_MUX,
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AD5934_WAIT_MUX
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} AD5934_State_t;
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typedef struct {
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float burst[AD5934_BURST_SIZE];
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uint8_t burst_index;
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float history[AD5934_HISTORY_SIZE];
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uint8_t history_index;
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uint8_t history_count;
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float iir_state;
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uint8_t iir_initialized;
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float filtered_value;
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uint8_t value_valid;
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} AD5934_filter_t;
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static const uint8_t ADG715_Channel_Map[AD5934_CH_MAX] = {
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[AD5934_CH_REF100R_LOW_GAIN] = (ADG715_SW1 | ADG715_SW4),
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[AD5934_CH_REF100R_MID_GAIN] = (ADG715_SW2 | ADG715_SW4),
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@@ -248,6 +303,15 @@ extern float ec_temp_dut[AD5934_EC_AVERAGES];
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extern I2C_HandleTypeDef hi2c2;
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extern volatile AD5934_State_t ad5934_state;
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extern volatile uint32_t g_ms_counter; // Increment each 1ms Timer
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extern uint8_t current_mux_channel;
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extern uint8_t sweep_count; // Count how many sweeps done at the same channel now (0 a 7)
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extern uint8_t is_new_channel;
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extern AD5934_filter_t g_rtd_filter, g_ec_filter, g_ref_filter;
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/*****************************************************************************/
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/************************ Functions Declarations *****************************/
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/*****************************************************************************/
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@@ -263,12 +327,18 @@ uint32_t AD5934_Sweep(void);
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void AD5934_RestartSweep(void);
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void AD5934_Repeat_Sweep(void);
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void AD5934_StopSweep(void);
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float AD5934_Get_Ref_Resistance(void);
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float AD5934_GetTemperature(float mag_ref);
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float AD5934_GetImpedance(float temperature_dut);
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float AD5934_GetMagnitude(void);
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void AD5934_Wait_For_Data_Valid(void);
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float AD5934_Round_Float_Precision(float value, uint8_t number_of_decimals);
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@@ -279,6 +349,22 @@ float AD5934_EC_Compensate_To_25C(float ec_raw_uScm, float temp_C);
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float AD5934_EC_Calibrate_Temperature(float temp_C);
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void AD5934_Process_System(void);
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void AD5934_Sort_Array(float *v, uint8_t n);
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float AD5934_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim);
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float AD5934_History_Average(const float *hist, uint8_t n);
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void AD5934_Process_Sample(AD5934_filter_t *ch, float raw);
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void AD5934_RTD_NewSample(float raw);
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void AD5934_EC_NewSample(float raw);
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void AD5934_Reference_NewSample(float raw);
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void ADG715_SetRegisterValue(char value);
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void ADG715_SetChannels(uint8_t ch1, uint8_t ch2);
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@@ -25,10 +25,10 @@ extern "C" {
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/*=========================================================================
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I2C ADDRESS/BITS - Connect the following pin to ADDR
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-----------------------------------------------------------------------*/
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#define ADS_ADDR_GND (0x48) ///< 1001 000 (ADDR -> GND)
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#define ADS_ADDR_VDD (0x49) ///< 1001 001 (ADDR -> VDD)
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#define ADS_ADDR_SDA (0x4A) ///< 1001 010 (ADDR -> SDA)
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#define ADS_ADDR_SCL (0x4B) ///< 1001 011 (ADDR -> SCL)
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#define ADS1015_ADDR_GND (0x48 << 1) ///< 1001 000 (ADDR -> GND)
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#define ADS1015_ADDR_VDD (0x49 << 1) ///< 1001 001 (ADDR -> VDD)
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#define ADS1015_ADDR_SDA (0x4A << 1) ///< 1001 010 (ADDR -> SDA)
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#define ADS1015_ADDR_SCL (0x4B << 1) ///< 1001 011 (ADDR -> SCL)
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/*=========================================================================*/
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/*=========================================================================
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@@ -52,22 +52,15 @@ extern "C" {
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CONFIG REGISTER
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-----------------------------------------------------------------------*/
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#define ADS1015_REG_CONFIG_OS_MASK (0x8000) ///< OS Mask
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#define ADS1015_REG_CONFIG_OS_SINGLE \
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(0x8000) ///< Write: Set to start a single-conversion
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#define ADS1015_REG_CONFIG_OS_BUSY \
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(0x0000) ///< Read: Bit = 0 when conversion is in progress
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#define ADS1015_REG_CONFIG_OS_NOTBUSY \
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(0x8000) ///< Read: Bit = 1 when device is not performing a conversion
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#define ADS1015_REG_CONFIG_OS_SINGLE (0x8000) ///< Write: Set to start a single-conversion
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#define ADS1015_REG_CONFIG_OS_BUSY (0x0000) ///< Read: Bit = 0 when conversion is in progress
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#define ADS1015_REG_CONFIG_OS_NOTBUSY (0x8000) ///< Read: Bit = 1 when device is not performing a conversion
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#define ADS1015_REG_CONFIG_MUX_MASK (0x7000) ///< Mux Mask
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#define ADS1015_REG_CONFIG_MUX_DIFF_0_1 \
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(0x0000) ///< Differential P = AIN0, N = AIN1 (default)
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#define ADS1015_REG_CONFIG_MUX_DIFF_0_3 \
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(0x1000) ///< Differential P = AIN0, N = AIN3
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#define ADS1015_REG_CONFIG_MUX_DIFF_1_3 \
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(0x2000) ///< Differential P = AIN1, N = AIN3
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#define ADS1015_REG_CONFIG_MUX_DIFF_2_3 \
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(0x3000) ///< Differential P = AIN2, N = AIN3
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#define ADS1015_REG_CONFIG_MUX_DIFF_0_1 (0x0000) ///< Differential P = AIN0, N = AIN1 (default)
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#define ADS1015_REG_CONFIG_MUX_DIFF_0_3 (0x1000) ///< Differential P = AIN0, N = AIN3
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#define ADS1015_REG_CONFIG_MUX_DIFF_1_3 (0x2000) ///< Differential P = AIN1, N = AIN3
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#define ADS1015_REG_CONFIG_MUX_DIFF_2_3 (0x3000) ///< Differential P = AIN2, N = AIN3
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#define ADS1015_REG_CONFIG_MUX_SINGLE_0 (0x4000) ///< Single-ended AIN0
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#define ADS1015_REG_CONFIG_MUX_SINGLE_1 (0x5000) ///< Single-ended AIN1
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#define ADS1015_REG_CONFIG_MUX_SINGLE_2 (0x6000) ///< Single-ended AIN2
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@@ -76,53 +69,41 @@ extern "C" {
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#define ADS1015_REG_CONFIG_PGA_MASK (0x0E00) ///< PGA Mask
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#define ADS1015_REG_CONFIG_PGA_6_144V (0x0000) ///< +/-6.144V range = Gain 2/3
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#define ADS1015_REG_CONFIG_PGA_4_096V (0x0200) ///< +/-4.096V range = Gain 1
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#define ADS1015_REG_CONFIG_PGA_2_048V \
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(0x0400) ///< +/-2.048V range = Gain 2 (default)
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#define ADS1015_REG_CONFIG_PGA_2_048V (0x0400) ///< +/-2.048V range = Gain 2 (default)
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#define ADS1015_REG_CONFIG_PGA_1_024V (0x0600) ///< +/-1.024V range = Gain 4
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#define ADS1015_REG_CONFIG_PGA_0_512V (0x0800) ///< +/-0.512V range = Gain 8
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#define ADS1015_REG_CONFIG_PGA_0_256V (0x0A00) ///< +/-0.256V range = Gain 16
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#define ADS1015_REG_CONFIG_MODE_MASK (0x0100) ///< Mode Mask
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#define ADS1015_REG_CONFIG_MODE_CONTIN (0x0000) ///< Continuous conversion mode
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#define ADS1015_REG_CONFIG_MODE_SINGLE \
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(0x0100) ///< Power-down single-shot mode (default)
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#define ADS1015_REG_CONFIG_MODE_SINGLE (0x0100) ///< Power-down single-shot mode (default)
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#define ADS1015_REG_CONFIG_DR_MASK (0x00E0) ///< Data Rate Mask
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#define ADS1015_REG_CONFIG_DR_128SPS (0x0000) ///< 128 samples per second
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#define ADS1015_REG_CONFIG_DR_250SPS (0x0020) ///< 250 samples per second
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#define ADS1015_REG_CONFIG_DR_490SPS (0x0040) ///< 490 samples per second
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#define ADS1015_REG_CONFIG_DR_920SPS (0x0060) ///< 920 samples per second
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#define ADS1015_REG_CONFIG_DR_1600SPS \
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(0x0080) ///< 1600 samples per second (default)
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#define ADS1015_REG_CONFIG_DR_1600SPS (0x0080) ///< 1600 samples per second (default)
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#define ADS1015_REG_CONFIG_DR_2400SPS (0x00A0) ///< 2400 samples per second
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#define ADS1015_REG_CONFIG_DR_3300SPS (0x00C0) ///< 3300 samples per second
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#define ADS1015_REG_CONFIG_CMODE_MASK (0x0010) ///< CMode Mask
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#define ADS1015_REG_CONFIG_CMODE_TRAD \
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(0x0000) ///< Traditional comparator with hysteresis (default)
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#define ADS1015_REG_CONFIG_CMODE_TRAD (0x0000) ///< Traditional comparator with hysteresis (default)
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#define ADS1015_REG_CONFIG_CMODE_WINDOW (0x0010) ///< Window comparator
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#define ADS1015_REG_CONFIG_CPOL_MASK (0x0008) ///< CPol Mask
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#define ADS1015_REG_CONFIG_CPOL_ACTVLOW \
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(0x0000) ///< ALERT/RDY pin is low when active (default)
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#define ADS1015_REG_CONFIG_CPOL_ACTVHI \
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(0x0008) ///< ALERT/RDY pin is high when active
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#define ADS1015_REG_CONFIG_CPOL_ACTVLOW (0x0000) ///< ALERT/RDY pin is low when active (default)
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#define ADS1015_REG_CONFIG_CPOL_ACTVHI (0x0008) ///< ALERT/RDY pin is high when active
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#define ADS1015_REG_CONFIG_CLAT_MASK \
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(0x0004) ///< Determines if ALERT/RDY pin latches once asserted
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#define ADS1015_REG_CONFIG_CLAT_NONLAT \
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(0x0000) ///< Non-latching comparator (default)
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#define ADS1015_REG_CONFIG_CLAT_MASK (0x0004) ///< Determines if ALERT/RDY pin latches once asserted
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#define ADS1015_REG_CONFIG_CLAT_NONLAT (0x0000) ///< Non-latching comparator (default)
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#define ADS1015_REG_CONFIG_CLAT_LATCH (0x0004) ///< Latching comparator
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#define ADS1015_REG_CONFIG_CQUE_MASK (0x0003) ///< CQue Mask
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#define ADS1015_REG_CONFIG_CQUE_1CONV \
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(0x0000) ///< Assert ALERT/RDY after one conversions
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#define ADS1015_REG_CONFIG_CQUE_2CONV \
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(0x0001) ///< Assert ALERT/RDY after two conversions
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#define ADS1015_REG_CONFIG_CQUE_4CONV \
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(0x0002) ///< Assert ALERT/RDY after four conversions
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#define ADS1015_REG_CONFIG_CQUE_NONE \
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(0x0003) ///< Disable the comparator and put ALERT/RDY in high state (default)
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#define ADS1015_REG_CONFIG_CQUE_1CONV (0x0000) ///< Assert ALERT/RDY after one conversions
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#define ADS1015_REG_CONFIG_CQUE_2CONV (0x0001) ///< Assert ALERT/RDY after two conversions
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#define ADS1015_REG_CONFIG_CQUE_4CONV (0x0002) ///< Assert ALERT/RDY after four conversions
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#define ADS1015_REG_CONFIG_CQUE_NONE (0x0003) ///< Disable the comparator and put ALERT/RDY in high state (default)
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#define ADS1015_KELVIN_OFFSET 273.15f // Constante de conversão Kelvin
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#define ADS1015_ADC_MAX 4095.0f
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@@ -135,8 +116,24 @@ extern "C" {
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#define ADS1015_PH_7_BUFFER_ROW 2
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#define ADS1015_INTERPOLATION_ROWS 3
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#define ADS1015_PH_TEMP_INTER_POINTS 12
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#define ADS1015_TIME_PER_SAMPLE 9 // 9ms
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/*=========================================================================*/
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/* Config Register para single-shot:
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* OS=1 (start), MUX[2:0]=000b (AIN0 single-ended, ajustar se necessário),
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* PGA[2:0]=010b (±2.048V default, ajustar ganho conforme sensor),
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* MODE=1b (single-shot/power-down), DR[2:0]=100b (1600SPS, ajustar se necessário),
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* COMP_QUE[1:0]=11b (comparador desabilitado, ALERT/RDY em alta impedância)
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*/
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#define ADS1015_CONFIG_START_SINGLE (ADS1015_REG_CONFIG_OS_SINGLE | ADS1015_REG_CONFIG_MUX_DIFF_0_1 | ADS1015_REG_CONFIG_PGA_0_256V | ADS1015_REG_CONFIG_MODE_SINGLE | ADS1015_REG_CONFIG_DR_128SPS | ADS1015_REG_CONFIG_CMODE_TRAD | ADS1015_REG_CONFIG_CPOL_ACTVLOW | ADS1015_REG_CONFIG_CLAT_NONLAT | ADS1015_REG_CONFIG_CQUE_NONE) // 0x8583 // valor de reset já tem OS=1, então só precisa garantir MODE=1b
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#define ADS1015_BURST_SIZE 5
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#define ADS1015_TRIM_COUNT 1
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#define ADS1015_HISTORY_SIZE 8
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#define ADS1015_IIR_ALPHA 0.3f
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/** Gain settings */
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typedef enum {
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@@ -148,12 +145,10 @@ typedef enum {
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GAIN_SIXTEEN = ADS1015_REG_CONFIG_PGA_0_256V
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} adsGain_t;
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extern I2C_HandleTypeDef hi2c1;
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extern float ph_dut_samples[ADS1015_PH_AVERAGES];
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typedef struct {
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uint16_t m_i2cAddress; ///< the I2C address
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uint32_t m_conversionDelay; ///< conversion delay
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@@ -162,7 +157,34 @@ typedef struct {
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I2C_HandleTypeDef* hi2c; // Handle for I2C
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}ADS1015_I2C;
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extern ADS1015_I2C i2c;
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extern ADS1015_I2C i2c_ads1015;
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typedef enum
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{
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ADS1015_IDLE,
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ADS1015_START_CONVERSION,
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ADS1015_WAIT_CONVERSION,
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ADS1015_READ_DATA,
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ADS1015_WAIT_NEXT_SAMPLE
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} ADS1015_State_t;
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extern volatile ADS1015_State_t ads1015_state;
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typedef struct {
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float burst[ADS1015_BURST_SIZE];
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uint8_t burst_index;
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float history[ADS1015_HISTORY_SIZE];
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uint8_t history_index;
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uint8_t history_count;
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float iir_state;
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uint8_t iir_initialized;
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float filtered_value;
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uint8_t value_valid;
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} ADS1015_filter_t;
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extern ADS1015_filter_t g_ph_filter;
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extern volatile uint32_t g_ms_counter; // Increment each 1ms Timer
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void ADS1015(ADS1015_I2C* i2c, I2C_HandleTypeDef* hi2c, uint8_t i2cAddress);
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uint16_t ADSreadADC_SingleEnded(ADS1015_I2C* i2c, uint8_t channel);
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@@ -172,6 +194,13 @@ void ADSstartComparator_SingleEnded(ADS1015_I2C* i2c, uint8_t channel, int16_t
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int16_t ADSgetLastConversionResults();
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void ADSsetGain(ADS1015_I2C* i2c, adsGain_t gain);
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adsGain_t ADSgetGain(ADS1015_I2C* i2c);
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void ADS1015_Process_System(void);
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void ADS1015_Sort_Array(float *v, uint8_t n);
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float ADS1015_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim);
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void ADS1015_Process_Sample(ADS1015_filter_t *ch, float raw);
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void ADS1015_pH_NewSample(float raw);
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float ADSCalculate_ph_mV(void);
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float ADSCalculate_ph_Compensated(float temp_dut);
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float ADSCalculate_ph_Uncompensated(void);
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@@ -64,7 +64,7 @@
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/*#define HAL_SMARTCARD_MODULE_ENABLED */
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/*#define HAL_SPI_MODULE_ENABLED */
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/*#define HAL_SRAM_MODULE_ENABLED */
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/*#define HAL_TIM_MODULE_ENABLED */
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#define HAL_TIM_MODULE_ENABLED
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#define HAL_UART_MODULE_ENABLED
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/*#define HAL_USART_MODULE_ENABLED */
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/*#define HAL_WWDG_MODULE_ENABLED */
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@@ -55,6 +55,7 @@ void SVC_Handler(void);
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void DebugMon_Handler(void);
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void PendSV_Handler(void);
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void SysTick_Handler(void);
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void TIM3_IRQHandler(void);
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void USART1_IRQHandler(void);
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/* USER CODE BEGIN EFP */
|
||||
|
||||
|
||||
Reference in New Issue
Block a user