diff --git a/Fertirrega_v6/.mxproject b/Fertirrega_v6/.mxproject index c5b50cc..f5753cc 100644 --- a/Fertirrega_v6/.mxproject +++ b/Fertirrega_v6/.mxproject @@ -1,32 +1,34 @@ [PreviousLibFiles] -LibFiles=Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_bus.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_system.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_utils.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_uart.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_usart.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_bus.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_system.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_utils.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_uart.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_usart.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f103xb.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\system_stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\system_stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; 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ivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; [PreviousUsedCubeIDEFiles] -SourceFiles=Core\Src\main.c;Core\Src\gpio.c;Core\Src\adc.c;Core\Src\i2c.c;Core\Src\usart.c;Core\Src\stm32f1xx_it.c;Core\Src\stm32f1xx_hal_msp.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;;; +SourceFiles=Core\Src\main.c;Core\Src\gpio.c;Core\Src\adc.c;Core\Src\i2c.c;Core\Src\tim.c;Core\Src\usart.c;Core\Src\stm32f1xx_it.c;Core\Src\stm32f1xx_hal_msp.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;;; HeaderPath=Drivers\STM32F1xx_HAL_Driver\Inc;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32F1xx\Include;Drivers\CMSIS\Include;Core\Inc; CDefines=USE_HAL_DRIVER;STM32F103xB;USE_HAL_DRIVER;USE_HAL_DRIVER; [PreviousGenFiles] AdvancedFolderStructure=true -HeaderFileListSize=7 +HeaderFileListSize=8 HeaderFiles#0=..\Core\Inc\gpio.h HeaderFiles#1=..\Core\Inc\adc.h HeaderFiles#2=..\Core\Inc\i2c.h -HeaderFiles#3=..\Core\Inc\usart.h -HeaderFiles#4=..\Core\Inc\stm32f1xx_it.h -HeaderFiles#5=..\Core\Inc\stm32f1xx_hal_conf.h -HeaderFiles#6=..\Core\Inc\main.h +HeaderFiles#3=..\Core\Inc\tim.h +HeaderFiles#4=..\Core\Inc\usart.h +HeaderFiles#5=..\Core\Inc\stm32f1xx_it.h +HeaderFiles#6=..\Core\Inc\stm32f1xx_hal_conf.h +HeaderFiles#7=..\Core\Inc\main.h HeaderFolderListSize=1 HeaderPath#0=..\Core\Inc HeaderFiles=; -SourceFileListSize=7 +SourceFileListSize=8 SourceFiles#0=..\Core\Src\gpio.c SourceFiles#1=..\Core\Src\adc.c SourceFiles#2=..\Core\Src\i2c.c -SourceFiles#3=..\Core\Src\usart.c -SourceFiles#4=..\Core\Src\stm32f1xx_it.c -SourceFiles#5=..\Core\Src\stm32f1xx_hal_msp.c -SourceFiles#6=..\Core\Src\main.c +SourceFiles#3=..\Core\Src\tim.c +SourceFiles#4=..\Core\Src\usart.c +SourceFiles#5=..\Core\Src\stm32f1xx_it.c +SourceFiles#6=..\Core\Src\stm32f1xx_hal_msp.c +SourceFiles#7=..\Core\Src\main.c SourceFolderListSize=1 SourcePath#0=..\Core\Src SourceFiles=; diff --git a/Fertirrega_v6/Core/Inc/ad5934_driver.h b/Fertirrega_v6/Core/Inc/ad5934_driver.h index c51a387..24604c8 100644 --- a/Fertirrega_v6/Core/Inc/ad5934_driver.h +++ b/Fertirrega_v6/Core/Inc/ad5934_driver.h @@ -93,8 +93,8 @@ extern "C" { #define AD5934_FREQ_1K590HZ 0x003419E3 // 1.59kHz #define AD5934_FREQ_0HZ 0x00000000 // 0Hz #define AD5934_STEP_FREQ_0 0x0000 // 0 passos -//#define AD5934_SETTLING_TIME_0S01 0x000C // 0,01s -#define AD5934_SETTLING_TIME_0S01 0x0080 +#define AD5934_SETTLING_TIME_64 0x0040 // 64 ciclos + /*****************************************************************************/ /**************************** Command Codes **********************************/ @@ -117,6 +117,12 @@ extern "C" { #define ADG715_SW7 0x40 //RTD Input #define ADG715_SW8 0x80 //CE Input + + +/*****************************************************************************/ +/**************************** General Defines ********************************/ +/*****************************************************************************/ + /* #define AD5934_CH_REF_100R 0x10 #define AD5934_CH_REF_1K 0x11 @@ -171,6 +177,31 @@ extern "C" { #define AD5934_EC_ALPHA_PER_C 0.02f #define AD5934_EC_TEMP_REF_C 25.0f +// Values for sample timming sync +#define AD5934_SYNC_PER_SWEEP 60 // 60 ms between sweeps +#define AD5934_SYNC_MUX_SETTLING 5 // 5 ms to wait before read after change ADG715 channels + +//Mux Set to Read... +#define AD5934_ID_RTD 0 +#define AD5934_ID_EC 1 +#define AD5934_ID_REF 2 + + + +/*****************************************************************************/ +/**************************** Filtering Defines *****************************/ +/*****************************************************************************/ +#define AD5934_TIME_PER_SWEEP 60 // 60 ms entre o início de cada sweep +#define AD5934_TIME_MUX_SETTLING 10 // 10 ms de espera após trocar o MUX + +#define AD5934_BURST_SIZE 7 +#define AD5934_TRIM_COUNT 1 +#define AD5934_HISTORY_SIZE 8 +#define AD5934_IIR_ALPHA 0.25f + + + + union Bytes2Int { uint8_t bytes[2]; @@ -213,6 +244,30 @@ typedef enum { AD5934_CH_MAX // Guarda automaticamente o número total de canais (15) } AD5934_Channel_t; + +typedef enum { + AD5934_IDLE, + AD5934_START_CONVERSION, + AD5934_WAIT_CONVERSION, + AD5934_READ_DATA, + AD5934_WAIT_NEXT_SWEEP, + AD5934_SWITCH_MUX, + AD5934_WAIT_MUX +} AD5934_State_t; + + +typedef struct { + float burst[AD5934_BURST_SIZE]; + uint8_t burst_index; + float history[AD5934_HISTORY_SIZE]; + uint8_t history_index; + uint8_t history_count; + float iir_state; + uint8_t iir_initialized; + float filtered_value; + uint8_t value_valid; +} AD5934_filter_t; + static const uint8_t ADG715_Channel_Map[AD5934_CH_MAX] = { [AD5934_CH_REF100R_LOW_GAIN] = (ADG715_SW1 | ADG715_SW4), [AD5934_CH_REF100R_MID_GAIN] = (ADG715_SW2 | ADG715_SW4), @@ -248,6 +303,15 @@ extern float ec_temp_dut[AD5934_EC_AVERAGES]; extern I2C_HandleTypeDef hi2c2; +extern volatile AD5934_State_t ad5934_state; +extern volatile uint32_t g_ms_counter; // Increment each 1ms Timer + +extern uint8_t current_mux_channel; +extern uint8_t sweep_count; // Count how many sweeps done at the same channel now (0 a 7) +extern uint8_t is_new_channel; + +extern AD5934_filter_t g_rtd_filter, g_ec_filter, g_ref_filter; + /*****************************************************************************/ /************************ Functions Declarations *****************************/ /*****************************************************************************/ @@ -263,12 +327,18 @@ uint32_t AD5934_Sweep(void); void AD5934_RestartSweep(void); +void AD5934_Repeat_Sweep(void); + +void AD5934_StopSweep(void); + float AD5934_Get_Ref_Resistance(void); float AD5934_GetTemperature(float mag_ref); float AD5934_GetImpedance(float temperature_dut); +float AD5934_GetMagnitude(void); + void AD5934_Wait_For_Data_Valid(void); float AD5934_Round_Float_Precision(float value, uint8_t number_of_decimals); @@ -279,6 +349,22 @@ float AD5934_EC_Compensate_To_25C(float ec_raw_uScm, float temp_C); float AD5934_EC_Calibrate_Temperature(float temp_C); +void AD5934_Process_System(void); + +void AD5934_Sort_Array(float *v, uint8_t n); + +float AD5934_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim); + +float AD5934_History_Average(const float *hist, uint8_t n); + +void AD5934_Process_Sample(AD5934_filter_t *ch, float raw); + +void AD5934_RTD_NewSample(float raw); + +void AD5934_EC_NewSample(float raw); + +void AD5934_Reference_NewSample(float raw); + void ADG715_SetRegisterValue(char value); void ADG715_SetChannels(uint8_t ch1, uint8_t ch2); diff --git a/Fertirrega_v6/Core/Inc/ads1015_driver.h b/Fertirrega_v6/Core/Inc/ads1015_driver.h index 379bc15..2fbbce2 100644 --- a/Fertirrega_v6/Core/Inc/ads1015_driver.h +++ b/Fertirrega_v6/Core/Inc/ads1015_driver.h @@ -25,10 +25,10 @@ extern "C" { /*========================================================================= I2C ADDRESS/BITS - Connect the following pin to ADDR -----------------------------------------------------------------------*/ -#define ADS_ADDR_GND (0x48) ///< 1001 000 (ADDR -> GND) -#define ADS_ADDR_VDD (0x49) ///< 1001 001 (ADDR -> VDD) -#define ADS_ADDR_SDA (0x4A) ///< 1001 010 (ADDR -> SDA) -#define ADS_ADDR_SCL (0x4B) ///< 1001 011 (ADDR -> SCL) +#define ADS1015_ADDR_GND (0x48 << 1) ///< 1001 000 (ADDR -> GND) +#define ADS1015_ADDR_VDD (0x49 << 1) ///< 1001 001 (ADDR -> VDD) +#define ADS1015_ADDR_SDA (0x4A << 1) ///< 1001 010 (ADDR -> SDA) +#define ADS1015_ADDR_SCL (0x4B << 1) ///< 1001 011 (ADDR -> SCL) /*=========================================================================*/ /*========================================================================= @@ -52,22 +52,15 @@ extern "C" { CONFIG REGISTER -----------------------------------------------------------------------*/ #define ADS1015_REG_CONFIG_OS_MASK (0x8000) ///< OS Mask -#define ADS1015_REG_CONFIG_OS_SINGLE \ - (0x8000) ///< Write: Set to start a single-conversion -#define ADS1015_REG_CONFIG_OS_BUSY \ - (0x0000) ///< Read: Bit = 0 when conversion is in progress -#define ADS1015_REG_CONFIG_OS_NOTBUSY \ - (0x8000) ///< Read: Bit = 1 when device is not performing a conversion +#define ADS1015_REG_CONFIG_OS_SINGLE (0x8000) ///< Write: Set to start a single-conversion +#define ADS1015_REG_CONFIG_OS_BUSY (0x0000) ///< Read: Bit = 0 when conversion is in progress +#define ADS1015_REG_CONFIG_OS_NOTBUSY (0x8000) ///< Read: Bit = 1 when device is not performing a conversion #define ADS1015_REG_CONFIG_MUX_MASK (0x7000) ///< Mux Mask -#define ADS1015_REG_CONFIG_MUX_DIFF_0_1 \ - (0x0000) ///< Differential P = AIN0, N = AIN1 (default) -#define ADS1015_REG_CONFIG_MUX_DIFF_0_3 \ - (0x1000) ///< Differential P = AIN0, N = AIN3 -#define ADS1015_REG_CONFIG_MUX_DIFF_1_3 \ - (0x2000) ///< Differential P = AIN1, N = AIN3 -#define ADS1015_REG_CONFIG_MUX_DIFF_2_3 \ - (0x3000) ///< Differential P = AIN2, N = AIN3 +#define ADS1015_REG_CONFIG_MUX_DIFF_0_1 (0x0000) ///< Differential P = AIN0, N = AIN1 (default) +#define ADS1015_REG_CONFIG_MUX_DIFF_0_3 (0x1000) ///< Differential P = AIN0, N = AIN3 +#define ADS1015_REG_CONFIG_MUX_DIFF_1_3 (0x2000) ///< Differential P = AIN1, N = AIN3 +#define ADS1015_REG_CONFIG_MUX_DIFF_2_3 (0x3000) ///< Differential P = AIN2, N = AIN3 #define ADS1015_REG_CONFIG_MUX_SINGLE_0 (0x4000) ///< Single-ended AIN0 #define ADS1015_REG_CONFIG_MUX_SINGLE_1 (0x5000) ///< Single-ended AIN1 #define ADS1015_REG_CONFIG_MUX_SINGLE_2 (0x6000) ///< Single-ended AIN2 @@ -76,53 +69,41 @@ extern "C" { #define ADS1015_REG_CONFIG_PGA_MASK (0x0E00) ///< PGA Mask #define ADS1015_REG_CONFIG_PGA_6_144V (0x0000) ///< +/-6.144V range = Gain 2/3 #define ADS1015_REG_CONFIG_PGA_4_096V (0x0200) ///< +/-4.096V range = Gain 1 -#define ADS1015_REG_CONFIG_PGA_2_048V \ - (0x0400) ///< +/-2.048V range = Gain 2 (default) +#define ADS1015_REG_CONFIG_PGA_2_048V (0x0400) ///< +/-2.048V range = Gain 2 (default) #define ADS1015_REG_CONFIG_PGA_1_024V (0x0600) ///< +/-1.024V range = Gain 4 #define ADS1015_REG_CONFIG_PGA_0_512V (0x0800) ///< +/-0.512V range = Gain 8 #define ADS1015_REG_CONFIG_PGA_0_256V (0x0A00) ///< +/-0.256V range = Gain 16 #define ADS1015_REG_CONFIG_MODE_MASK (0x0100) ///< Mode Mask #define ADS1015_REG_CONFIG_MODE_CONTIN (0x0000) ///< Continuous conversion mode -#define ADS1015_REG_CONFIG_MODE_SINGLE \ - (0x0100) ///< Power-down single-shot mode (default) +#define ADS1015_REG_CONFIG_MODE_SINGLE (0x0100) ///< Power-down single-shot mode (default) #define ADS1015_REG_CONFIG_DR_MASK (0x00E0) ///< Data Rate Mask #define ADS1015_REG_CONFIG_DR_128SPS (0x0000) ///< 128 samples per second #define ADS1015_REG_CONFIG_DR_250SPS (0x0020) ///< 250 samples per second #define ADS1015_REG_CONFIG_DR_490SPS (0x0040) ///< 490 samples per second #define ADS1015_REG_CONFIG_DR_920SPS (0x0060) ///< 920 samples per second -#define ADS1015_REG_CONFIG_DR_1600SPS \ - (0x0080) ///< 1600 samples per second (default) +#define ADS1015_REG_CONFIG_DR_1600SPS (0x0080) ///< 1600 samples per second (default) #define ADS1015_REG_CONFIG_DR_2400SPS (0x00A0) ///< 2400 samples per second #define ADS1015_REG_CONFIG_DR_3300SPS (0x00C0) ///< 3300 samples per second #define ADS1015_REG_CONFIG_CMODE_MASK (0x0010) ///< CMode Mask -#define ADS1015_REG_CONFIG_CMODE_TRAD \ - (0x0000) ///< Traditional comparator with hysteresis (default) +#define ADS1015_REG_CONFIG_CMODE_TRAD (0x0000) ///< Traditional comparator with hysteresis (default) #define ADS1015_REG_CONFIG_CMODE_WINDOW (0x0010) ///< Window comparator #define ADS1015_REG_CONFIG_CPOL_MASK (0x0008) ///< CPol Mask -#define ADS1015_REG_CONFIG_CPOL_ACTVLOW \ - (0x0000) ///< ALERT/RDY pin is low when active (default) -#define ADS1015_REG_CONFIG_CPOL_ACTVHI \ - (0x0008) ///< ALERT/RDY pin is high when active +#define ADS1015_REG_CONFIG_CPOL_ACTVLOW (0x0000) ///< ALERT/RDY pin is low when active (default) +#define ADS1015_REG_CONFIG_CPOL_ACTVHI (0x0008) ///< ALERT/RDY pin is high when active -#define ADS1015_REG_CONFIG_CLAT_MASK \ - (0x0004) ///< Determines if ALERT/RDY pin latches once asserted -#define ADS1015_REG_CONFIG_CLAT_NONLAT \ - (0x0000) ///< Non-latching comparator (default) +#define ADS1015_REG_CONFIG_CLAT_MASK (0x0004) ///< Determines if ALERT/RDY pin latches once asserted +#define ADS1015_REG_CONFIG_CLAT_NONLAT (0x0000) ///< Non-latching comparator (default) #define ADS1015_REG_CONFIG_CLAT_LATCH (0x0004) ///< Latching comparator #define ADS1015_REG_CONFIG_CQUE_MASK (0x0003) ///< CQue Mask -#define ADS1015_REG_CONFIG_CQUE_1CONV \ - (0x0000) ///< Assert ALERT/RDY after one conversions -#define ADS1015_REG_CONFIG_CQUE_2CONV \ - (0x0001) ///< Assert ALERT/RDY after two conversions -#define ADS1015_REG_CONFIG_CQUE_4CONV \ - (0x0002) ///< Assert ALERT/RDY after four conversions -#define ADS1015_REG_CONFIG_CQUE_NONE \ -(0x0003) ///< Disable the comparator and put ALERT/RDY in high state (default) +#define ADS1015_REG_CONFIG_CQUE_1CONV (0x0000) ///< Assert ALERT/RDY after one conversions +#define ADS1015_REG_CONFIG_CQUE_2CONV (0x0001) ///< Assert ALERT/RDY after two conversions +#define ADS1015_REG_CONFIG_CQUE_4CONV (0x0002) ///< Assert ALERT/RDY after four conversions +#define ADS1015_REG_CONFIG_CQUE_NONE (0x0003) ///< Disable the comparator and put ALERT/RDY in high state (default) #define ADS1015_KELVIN_OFFSET 273.15f // Constante de conversão Kelvin #define ADS1015_ADC_MAX 4095.0f @@ -135,8 +116,24 @@ extern "C" { #define ADS1015_PH_7_BUFFER_ROW 2 #define ADS1015_INTERPOLATION_ROWS 3 #define ADS1015_PH_TEMP_INTER_POINTS 12 +#define ADS1015_TIME_PER_SAMPLE 9 // 9ms /*=========================================================================*/ +/* Config Register para single-shot: + * OS=1 (start), MUX[2:0]=000b (AIN0 single-ended, ajustar se necessário), + * PGA[2:0]=010b (±2.048V default, ajustar ganho conforme sensor), + * MODE=1b (single-shot/power-down), DR[2:0]=100b (1600SPS, ajustar se necessário), + * COMP_QUE[1:0]=11b (comparador desabilitado, ALERT/RDY em alta impedância) + */ +#define ADS1015_CONFIG_START_SINGLE (ADS1015_REG_CONFIG_OS_SINGLE | ADS1015_REG_CONFIG_MUX_DIFF_0_1 | ADS1015_REG_CONFIG_PGA_0_256V | ADS1015_REG_CONFIG_MODE_SINGLE | ADS1015_REG_CONFIG_DR_128SPS | ADS1015_REG_CONFIG_CMODE_TRAD | ADS1015_REG_CONFIG_CPOL_ACTVLOW | ADS1015_REG_CONFIG_CLAT_NONLAT | ADS1015_REG_CONFIG_CQUE_NONE) // 0x8583 // valor de reset já tem OS=1, então só precisa garantir MODE=1b + + +#define ADS1015_BURST_SIZE 5 +#define ADS1015_TRIM_COUNT 1 +#define ADS1015_HISTORY_SIZE 8 +#define ADS1015_IIR_ALPHA 0.3f + + /** Gain settings */ typedef enum { @@ -148,12 +145,10 @@ typedef enum { GAIN_SIXTEEN = ADS1015_REG_CONFIG_PGA_0_256V } adsGain_t; - +extern I2C_HandleTypeDef hi2c1; extern float ph_dut_samples[ADS1015_PH_AVERAGES]; - - typedef struct { uint16_t m_i2cAddress; ///< the I2C address uint32_t m_conversionDelay; ///< conversion delay @@ -162,7 +157,34 @@ typedef struct { I2C_HandleTypeDef* hi2c; // Handle for I2C }ADS1015_I2C; -extern ADS1015_I2C i2c; +extern ADS1015_I2C i2c_ads1015; + +typedef enum +{ + ADS1015_IDLE, + ADS1015_START_CONVERSION, + ADS1015_WAIT_CONVERSION, + ADS1015_READ_DATA, + ADS1015_WAIT_NEXT_SAMPLE +} ADS1015_State_t; + +extern volatile ADS1015_State_t ads1015_state; + +typedef struct { + float burst[ADS1015_BURST_SIZE]; + uint8_t burst_index; + float history[ADS1015_HISTORY_SIZE]; + uint8_t history_index; + uint8_t history_count; + float iir_state; + uint8_t iir_initialized; + float filtered_value; + uint8_t value_valid; +} ADS1015_filter_t; + + +extern ADS1015_filter_t g_ph_filter; +extern volatile uint32_t g_ms_counter; // Increment each 1ms Timer void ADS1015(ADS1015_I2C* i2c, I2C_HandleTypeDef* hi2c, uint8_t i2cAddress); uint16_t ADSreadADC_SingleEnded(ADS1015_I2C* i2c, uint8_t channel); @@ -172,6 +194,13 @@ void ADSstartComparator_SingleEnded(ADS1015_I2C* i2c, uint8_t channel, int16_t int16_t ADSgetLastConversionResults(); void ADSsetGain(ADS1015_I2C* i2c, adsGain_t gain); adsGain_t ADSgetGain(ADS1015_I2C* i2c); + +void ADS1015_Process_System(void); +void ADS1015_Sort_Array(float *v, uint8_t n); +float ADS1015_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim); +void ADS1015_Process_Sample(ADS1015_filter_t *ch, float raw); +void ADS1015_pH_NewSample(float raw); + float ADSCalculate_ph_mV(void); float ADSCalculate_ph_Compensated(float temp_dut); float ADSCalculate_ph_Uncompensated(void); diff --git a/Fertirrega_v6/Core/Inc/stm32f1xx_hal_conf.h b/Fertirrega_v6/Core/Inc/stm32f1xx_hal_conf.h index 33379ab..1f5bd71 100644 --- a/Fertirrega_v6/Core/Inc/stm32f1xx_hal_conf.h +++ b/Fertirrega_v6/Core/Inc/stm32f1xx_hal_conf.h @@ -64,7 +64,7 @@ /*#define HAL_SMARTCARD_MODULE_ENABLED */ /*#define HAL_SPI_MODULE_ENABLED */ /*#define HAL_SRAM_MODULE_ENABLED */ -/*#define HAL_TIM_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED /*#define HAL_USART_MODULE_ENABLED */ /*#define HAL_WWDG_MODULE_ENABLED */ diff --git a/Fertirrega_v6/Core/Inc/stm32f1xx_it.h b/Fertirrega_v6/Core/Inc/stm32f1xx_it.h index a3a5953..e01d29f 100644 --- a/Fertirrega_v6/Core/Inc/stm32f1xx_it.h +++ b/Fertirrega_v6/Core/Inc/stm32f1xx_it.h @@ -55,6 +55,7 @@ void SVC_Handler(void); void DebugMon_Handler(void); void PendSV_Handler(void); void SysTick_Handler(void); +void TIM3_IRQHandler(void); void USART1_IRQHandler(void); /* USER CODE BEGIN EFP */ diff --git a/Fertirrega_v6/Core/Src/ad5934_driver.c b/Fertirrega_v6/Core/Src/ad5934_driver.c index 3ff9d04..bcb53be 100644 --- a/Fertirrega_v6/Core/Src/ad5934_driver.c +++ b/Fertirrega_v6/Core/Src/ad5934_driver.c @@ -11,6 +11,15 @@ #include "ad5934_driver.h" +volatile AD5934_State_t ad5934_state = AD5934_IDLE; + +volatile uint32_t g_ms_counter = 0; /* Incrementado a cada 1ms no Timer */ + +uint8_t current_mux_channel = AD5934_ID_RTD; +uint8_t current_hw_mux_connection = ADG715_Channel_Map[AD5934_CH_RTD_LOW_GAIN]; // PT100 Connection + +uint8_t sweep_count = 0; /* Conta quantos sweeps foram feitos no canal atual (0 a 7) */ + int16_t temperature_dut_samples[2][AD5934_TEMP_AVERAGES]={{0},{0}}; int16_t temperature_ref_samples[2][AD5934_TEMP_AVERAGES]={{0},{0}}; float temperature_display[AD5934_TEMP_AVERAGES] = {0}; @@ -19,6 +28,11 @@ float temperature_display[AD5934_TEMP_AVERAGES] = {0}; int16_t ec_dut_samples[2][AD5934_EC_AVERAGES]={{0},{0}}; float ec_display[AD5934_EC_AVERAGES] = {0}; +AD5934_filter_t g_rtd_filter = {0}; +AD5934_filter_t g_ec_filter = {0}; +AD5934_filter_t g_ref_filter = {0}; + +uint8_t is_new_channel = 1; /****************************************************************************** * @brief Set an AD5934 internal register value. * @@ -151,7 +165,7 @@ void AD5934_Init(void) AD5934_SetRegisterValue(AD5934_NR_INCR_REG_LB, AD5934_STEP_FREQ_0, 2); // Set 128 Settling Time - AD5934_SetRegisterValue(AD5934_NR_SETTLE_REG_LB, AD5934_SETTLING_TIME_0S01, 2); + AD5934_SetRegisterValue(AD5934_NR_SETTLE_REG_LB, AD5934_SETTLING_TIME_64, 2); } @@ -177,18 +191,50 @@ void AD5934_RestartSweep(void) AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_START_FREQ_SWEEP) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); // Wait for data to be valid - AD5934_Wait_For_Data_Valid(); + //AD5934_Wait_For_Data_Valid(); // Power Down - AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_POWER_DOWN) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); + //AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_POWER_DOWN) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); + + // Place AD5934 in standby (instead of power down) + //AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_STANDBY) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); } +/****************************************************************************** +* @brief Repeat Sweep at the AD5934 with the same sweep parameters. +* +* @param None. +* +* @return none. +******************************************************************************/ +void AD5934_Repeat_Sweep(void) +{ + // Repeat AD5934 Sweep + AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_REPEAT_FREQ) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); +} + +/****************************************************************************** +* @brief Stop the AD5934 to sweep. +* +* @param None. +* +* @return None. +******************************************************************************/ +void AD5934_StopSweep(void) +{ + // Power Down + //AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_POWER_DOWN) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); + + // Place AD5934 in standby (instead of power down to save startup time) + AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_STANDBY) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); + +} /****************************************************************************** * @brief Start the AD5934 frequency sweep parameters. * -* @param: channel = AD5934_CH_REF_100R, AD5934_CH_REF_1K, AD5934_CH_REF_10K, AD5934_CH_PT100, AD5934_CH_PT1000 or AD5934_CH_EC +* @param: none * * @return Real(int16) and Imaginary(int16) numbers into a int32. ******************************************************************************/ @@ -386,7 +432,6 @@ float AD5934_GetImpedance(float temperature_dut) ec_dut_samples[1][i] = ec_dut_samples[1][i-1]; } - // Deconstruct 32-bit sample into Real and Imaginary components ec_dut_samples[0][0] = (float)(int16_t)(sample_dut & 0xFFFF); ec_dut_samples[1][0] = (float)(int16_t)((sample_dut >> 16) & 0xFFFF); @@ -424,6 +469,30 @@ float AD5934_GetImpedance(float temperature_dut) } +/****************************************************************************** +* @brief Get Real and Imaginary values and calculate Magnitude. +* +* @param: none +* +* @return Magnitude (float). +******************************************************************************/ +float AD5934_GetMagnitude(void) +{ + + // Get Real Data register + int16_t real_value = ((AD5934_GetRegisterValue(AD5934_REAL_REG_LB,2))); + + // Get Imaginary Data register + int16_t imag_value = ((AD5934_GetRegisterValue(AD5934_IMG_REG_LB,2))); + + // Calculate Magnitude using float function sqrtf + float magnitude = sqrtf(((float)real_value * (float)real_value) + ((float)imag_value * (float)imag_value)); + + // Return magnitude value + return (magnitude); +} + + /** * @brief Monitora o status com TIMEOUT para evitar travamento do sistema. @@ -585,6 +654,260 @@ float AD5934_Calibrate(float dry_probe_real, float dry_probe_imag, float standar return calibration_factor; } + +void AD5934_Process_System(void) +{ + static uint32_t state_timer = 0; + uint8_t status = 0; + + switch (ad5934_state) + { + case AD5934_IDLE: + ADG715_Update(current_mux_channel); // Starts changing the mux channel + is_new_channel = 1; // Forces first channel + state_timer = g_ms_counter; + ad5934_state = AD5934_WAIT_MUX; + break; + + case AD5934_WAIT_MUX: + if ((g_ms_counter - state_timer) >= AD5934_SYNC_MUX_SETTLING) // Wait until AD715 Mux switch stability + { + sweep_count = 0; + ad5934_state = AD5934_START_CONVERSION; + } + break; + + case AD5934_START_CONVERSION: + state_timer = g_ms_counter; // Starts to count the Burst period for the sweeps + + /* DECISÃO DE COMANDO: Novo canal vs Leituras sucessivas */ + if (is_new_channel) // Decision: Channel Switched or Next Sample in the Burst ? + { + AD5934_RestartSweep(); // Clean some AD5934 internal registers to Re-Start Sweep + is_new_channel = 0; // Resets the flag to read the next Sample Burst + } + else + { + AD5934_Repeat_Sweep(); // Get Sample and just repeat reading + } + + ad5934_state = AD5934_WAIT_CONVERSION; // Next State + break; + + case AD5934_WAIT_CONVERSION: + status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); // Check if the current converion is ready in the AD5934 + if ((status & AD5934_STATUS_DATA_VALID) != 0) + { + ad5934_state = AD5934_READ_DATA; + } + break; + + case AD5934_READ_DATA: + { + float magnitude = AD5934_GetMagnitude(); + + switch (current_mux_channel) + { + case AD5934_ID_RTD: + AD5934_RTD_NewSample(magnitude); + break; + + case AD5934_ID_EC: + AD5934_EC_NewSample(magnitude); + break; + + case AD5934_ID_REF: + AD5934_Reference_NewSample(magnitude); + break; + } + + sweep_count++; + + if (sweep_count >= AD5934_BURST_SIZE) // Check if number of samples for the burst is complete + { + ad5934_state = AD5934_SWITCH_MUX; // Next Re-Start Sweep + } + else + { + ad5934_state = AD5934_WAIT_NEXT_SWEEP; // Next Repeat Sweep + } + } + break; + + case AD5934_WAIT_NEXT_SWEEP: + if ((g_ms_counter - state_timer) >= AD5934_TIME_PER_SWEEP) + { + ad5934_state = AD5934_START_CONVERSION; + } + break; + + case AD5934_SWITCH_MUX: + AD5934_StopSweep(); // Put AD5934 in Standby + current_mux_channel = (uint8_t)((current_mux_channel + 1) % 3); // Pointer to the next channel (Circular Buffer 0 to 2) + switch (current_mux_channel) + { + case AD5934_ID_RTD: + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND + current_hw_mux_connection = AD5934_CH_RTD_LOW_GAIN; //PT100 + else + current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 + break; + + case AD5934_ID_EC: + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) // Hardware Setup: Gain Selection (PA6) + current_hw_mux_connection = AD5934_CH_EC_HIGH_GAIN; + else + current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; + break; + + case AD5934_ID_REF: + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND + current_hw_mux_connection = AD5934_CH_REF100R_LOW_GAIN; // 100 Ohms Reference Resistor + else + current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor + break; + } + ADG715_Update(current_hw_mux_connection); // Change the analog mux + is_new_channel = 1; // Channel Switched + state_timer = g_ms_counter; // Reload timer to wait for stability + ad5934_state = AD5934_WAIT_MUX; // Next State + break; + } +} + + +/** +* Simple insertion sort - BURST_SIZE is small, so the cost is negligible +* and it avoids depending on qsort/heap allocation. +**/ +void AD5934_Sort_Array(float *v, uint8_t n) +{ + for (uint8_t i = 1; i < n; i++) + { + float key = v[i]; + int8_t j = (int8_t)i - 1; + while (j >= 0 && v[j] > key) + { + v[j + 1] = v[j]; + j--; + } + v[j + 1] = key; + } +} + +/** + * Trimmed mean: sorts the buffer IN PLACE (the caller's burst buffer is + * about to be reset right after this call anyway, so preserving its + * original order is not needed), discards TRIM_COUNT values from each + * end, and averages the remainder. Sorting in place avoids a temporary + * array and removes the need for memcpy()/string.h entirely. + **/ +float AD5934_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim) +{ + AD5934_Sort_Array(buffer, n); + + uint8_t start = trim; + uint8_t end = n - trim; /* exclusive */ + + if (end <= start) /* guard against a misconfigured trim value */ + { + start = 0; + end = n; + } + + float sum = 0.0f; + uint8_t count = 0; + for (uint8_t i = start; i < end; i++) + { + sum += buffer[i]; + count++; + } + return sum / (float)count; +} + +/* + * Simple average of the history buffer (stage-2 sliding window) + */ +float AD5934_History_Average(const float *hist, uint8_t n) +{ + float sum = 0.0f; + for (uint8_t i = 0; i < n; i++) + sum += hist[i]; + return sum / (float)n; +} + + +/* + * Common processing core: applied identically to all 3 channels. + * Receives the current raw reading and the channel's state (global + * arrays/struct). + **/ +void AD5934_Process_Sample(AD5934_filter_t *ch, float raw) +{ + /* --- Stage 1: accumulate into the current burst --- */ + ch->burst[ch->burst_index] = raw; + ch->burst_index++; + + if (ch->burst_index < AD5934_BURST_SIZE) + return; /* still collecting the burst, nothing else to do */ + + /* Burst complete: compute the trimmed mean */ + float burst_result = AD5934_Trimmed_Mean(ch->burst, AD5934_BURST_SIZE, AD5934_TRIM_COUNT); + ch->burst_index = 0; /* reset for the next burst */ + + /* --- Stage 2a: rolling history / sliding window --- */ + ch->history[ch->history_index] = burst_result; + ch->history_index = (uint8_t)((ch->history_index + 1) % AD5934_HISTORY_SIZE); + if (ch->history_count < AD5934_HISTORY_SIZE) + ch->history_count++; + + float window_average = AD5934_History_Average(ch->history, ch->history_count); + + /* --- Stage 2b: first-order IIR low-pass filter on the burst result --- */ + if (!ch->iir_initialized) + { + ch->iir_state = burst_result; + ch->iir_initialized = 1; + } + else + { + ch->iir_state = AD5934_IIR_ALPHA * burst_result + (1.0f - AD5934_IIR_ALPHA) * ch->iir_state; + } + + /* Final output: combines the IIR state (fast response to real drift) + * with the window average (more stable, slower response). Adjust + * the weighting per channel if needed. */ + ch->filtered_value = 0.5f * ch->iir_state + 0.5f * window_average; + ch->value_valid = 1; +} + + +/* ---------------------------------------------------------------------- */ +/* PUBLIC FUNCTIONS - ONE PER CHANNEL */ +/* ---------------------------------------------------------------------- */ + +/* Call this every time a sweep completes with the mux on the RTD + * (PT100/PT1000) channel */ +void AD5934_RTD_NewSample(float raw) +{ + AD5934_Process_Sample(&g_rtd_filter, raw); +} + +/* Call this every time a sweep completes with the mux on the EC + * (conductivity probe) channel */ +void AD5934_EC_NewSample(float raw) +{ + AD5934_Process_Sample(&g_ec_filter, raw); +} + +/* Call this every time a sweep completes with the mux on the on-board + * precision reference resistor channel */ +void AD5934_Reference_NewSample(float raw) +{ + AD5934_Process_Sample(&g_ref_filter, raw); +} + + /***************************************************************************** * ADG715 ***************************************************************************** diff --git a/Fertirrega_v6/Core/Src/ads1015_driver.c b/Fertirrega_v6/Core/Src/ads1015_driver.c index 03305f5..36fe02d 100644 --- a/Fertirrega_v6/Core/Src/ads1015_driver.c +++ b/Fertirrega_v6/Core/Src/ads1015_driver.c @@ -9,9 +9,14 @@ #include "ads1015_driver.h" -ADS1015_I2C i2c; +ADS1015_I2C i2c_ads1015; float ph_dut_samples[ADS1015_PH_AVERAGES]={0}; + +ADS1015_filter_t g_ph_filter = {0}; + +volatile ADS1015_State_t ads1015_state = ADS1015_IDLE; + // Write the register static void writeRegister(ADS1015_I2C *i2c, uint8_t reg, uint16_t value) { uint8_t pData[3] = { reg, (uint8_t) (value >> 8), (uint8_t) (value & 0xFF) }; @@ -36,13 +41,14 @@ static void ADSbegin(ADS1015_I2C *i2c) { // Declare an ADS1015 structure void ADS1015(ADS1015_I2C *i2c, I2C_HandleTypeDef *hi2c, uint8_t i2cAddress) { i2c->hi2c = hi2c; - i2c->m_i2cAddress = i2cAddress << 1; // It's Important to shift the address << 1 + i2c->m_i2cAddress = i2cAddress; // << 1; // It's Important to shift the address << 1 i2c->m_conversionDelay = ADS1015_CONVERSIONDELAY; i2c->m_bitShift = 4; - i2c->m_gain = GAIN_TWOTHIRDS; /* +/- 6.144V range (limited to VDD +0.3V max!) */ + i2c->m_gain = GAIN_SIXTEEN; /* +/- 6.144V range (limited to VDD +0.3V max!) */ //ADSbegin(i2c); //Ready is not used } + /* * // The ADC input range (or gain) can be changed via the following // functions, but be careful never to exceed VDD +0.3V max, or to @@ -126,7 +132,7 @@ int16_t ADSreadADC_Differential_0_1(ADS1015_I2C *i2c) { ADS1015_REG_CONFIG_CLAT_NONLAT | // Non-latching (default val) ADS1015_REG_CONFIG_CPOL_ACTVLOW | // Alert/Rdy active low (default val) ADS1015_REG_CONFIG_CMODE_TRAD | // Traditional comparator (default val) - ADS1015_REG_CONFIG_DR_128SPS | // 128 samples per second (default) + ADS1015_REG_CONFIG_DR_250SPS | // 128 samples per second (default) ADS1015_REG_CONFIG_MODE_SINGLE; // Single-shot mode (default) // Set PGA/voltage range @@ -271,6 +277,207 @@ int16_t ADSgetLastConversionResults(ADS1015_I2C *i2c) { } } + + + +void ADS1015_Process_System(void) +{ + static uint32_t state_timer = 0; + static uint32_t sample_count = 0; + uint16_t config_reg = 0; + + switch (ads1015_state) + { + case ADS1015_IDLE: + sample_count = 0; + ads1015_state = ADS1015_START_CONVERSION; + break; + + case ADS1015_START_CONVERSION: + state_timer = g_ms_counter; + + /* Escreve no Config Register (P[1:0]=01b) com OS=1 para + * iniciar a conversão single-shot. O bit OS só tem efeito + * quando o dispositivo está em power-down (seção 7.4.2.1) */ + // Write config register to the ADC + writeRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONFIG, ADS1015_CONFIG_START_SINGLE); + + ads1015_state = ADS1015_WAIT_CONVERSION; + break; + + case ADS1015_WAIT_CONVERSION: + /* Poll do bit OS no Config Register (P[1:0]=01b): + * Ao LER o bit OS: + * 0b = dispositivo ainda convertendo + * 1b = conversão concluída, dado pronto no Conversion Register + * (Tabela 8-4, descrição do bit OS) + */ + + config_reg = readRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONFIG); + + if (((config_reg & ADS1015_REG_CONFIG_OS_SINGLE) != 0) && (g_ms_counter - state_timer)>ADS1015_TIME_PER_SAMPLE) + { + ads1015_state = ADS1015_READ_DATA; + } + // (opcional) tratar timeout comparando g_ms_counter - state_timer + // Datasheet: conversão single-cycle, tempo = 1/DR (ex: 1600SPS ≈ 625µs) + break; + + case ADS1015_READ_DATA: + { + /* Muda o Address Pointer para o Conversion Register (P[1:0]=00b) + * e lê os 16 bits. Dado é 12 bits em complemento de 2, + * left-justified em D[15:4]; D[3:0] sempre lê 0h (Tabela 8-3) */ + int16_t raw = (int16_t)readRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONVERT); + raw >>= 4; // remove os 4 bits reservados (D[3:0]), resultado = 12 bits signed + + float value = (float)(4096 - raw); // ((float)raw * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; // usa FSR configurado no PGA + + ADS1015_pH_NewSample(value); + + sample_count++; + + if (sample_count >= ADS1015_BURST_SIZE) + { + ads1015_state = ADS1015_IDLE; + } + else + { + state_timer = g_ms_counter; + ads1015_state = ADS1015_WAIT_NEXT_SAMPLE; + } + } + break; + + case ADS1015_WAIT_NEXT_SAMPLE: + if ((g_ms_counter - state_timer) >= ADS1015_TIME_PER_SAMPLE) + { + ads1015_state = ADS1015_START_CONVERSION; + } + break; + } +} + + +/** +* Simple insertion sort - BURST_SIZE is small, so the cost is negligible +* and it avoids depending on qsort/heap allocation. +**/ +void ADS1015_Sort_Array(float *v, uint8_t n) +{ + for (uint8_t i = 1; i < n; i++) + { + float key = v[i]; + int8_t j = (int8_t)i - 1; + while (j >= 0 && v[j] > key) + { + v[j + 1] = v[j]; + j--; + } + v[j + 1] = key; + } +} + +/** + * Trimmed mean: sorts the buffer IN PLACE (the caller's burst buffer is + * about to be reset right after this call anyway, so preserving its + * original order is not needed), discards TRIM_COUNT values from each + * end, and averages the remainder. Sorting in place avoids a temporary + * array and removes the need for memcpy()/string.h entirely. + **/ +float ADS1015_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim) +{ + ADS1015_Sort_Array(buffer, n); + + uint8_t start = trim; + uint8_t end = n - trim; /* exclusive */ + + if (end <= start) /* guard against a misconfigured trim value */ + { + start = 0; + end = n; + } + + float sum = 0.0f; + uint8_t count = 0; + for (uint8_t i = start; i < end; i++) + { + sum += buffer[i]; + count++; + } + return sum / (float)count; +} + +/* + * Simple average of the history buffer (stage-2 sliding window) + */ +float ADS1015_History_Average(const float *hist, uint8_t n) +{ + float sum = 0.0f; + for (uint8_t i = 0; i < n; i++) + sum += hist[i]; + return sum / (float)n; +} + + +/* + * Common processing core: applied identically to all 3 channels. + * Receives the current raw reading and the channel's state (global + * arrays/struct). + **/ +void ADS1015_Process_Sample(ADS1015_filter_t *ch, float raw) +{ + /* --- Stage 1: accumulate into the current burst --- */ + ch->burst[ch->burst_index] = raw; + ch->burst_index++; + + if (ch->burst_index < ADS1015_BURST_SIZE) + return; /* still collecting the burst, nothing else to do */ + + /* Burst complete: compute the trimmed mean */ + float burst_result = ADS1015_Trimmed_Mean(ch->burst, ADS1015_BURST_SIZE, ADS1015_TRIM_COUNT); + ch->burst_index = 0; /* reset for the next burst */ + + /* --- Stage 2a: rolling history / sliding window --- */ + ch->history[ch->history_index] = burst_result; + ch->history_index = (uint8_t)((ch->history_index + 1) % ADS1015_HISTORY_SIZE); + if (ch->history_count < ADS1015_HISTORY_SIZE) + ch->history_count++; + + float window_average = ADS1015_History_Average(ch->history, ch->history_count); + + /* --- Stage 2b: first-order IIR low-pass filter on the burst result --- */ + if (!ch->iir_initialized) + { + ch->iir_state = burst_result; + ch->iir_initialized = 1; + } + else + { + ch->iir_state = ADS1015_IIR_ALPHA * burst_result + (1.0f - ADS1015_IIR_ALPHA) * ch->iir_state; + } + + /* Final output: combines the IIR state (fast response to real drift) + * with the window average (more stable, slower response). Adjust + * the weighting per channel if needed. */ + ch->filtered_value = 0.5f * ch->iir_state + 0.5f * window_average; + ch->value_valid = 1; +} + + +/* ---------------------------------------------------------------------- */ +/* PUBLIC FUNCTIONS - ONE PER CHANNEL */ +/* ---------------------------------------------------------------------- */ + + +void ADS1015_pH_NewSample(float raw) +{ + ADS1015_Process_Sample(&g_ph_filter, raw); +} + + + + float ADSCalculate_ph_mV(void) // pH in mV { float ph_dut_sum; @@ -279,7 +486,7 @@ float ADSCalculate_ph_mV(void) // pH in mV for (i = (ADS1015_PH_AVERAGES-1); i > 0; i--) ph_dut_samples[i] = ph_dut_samples[i-1]; - ph_dut_samples[0] = (((float)(ADSreadADC_Differential_0_1(&i2c)) * ADS1015_ADC_VREF) / ADS1015_ADC_MAX); // 1. Converter leitura bruta do ADC para tensão real (mV) + ph_dut_samples[0] = (((float)(ADSreadADC_Differential_0_1(&i2c_ads1015)) * ADS1015_ADC_VREF) / ADS1015_ADC_MAX); // 1. Converter leitura bruta do ADC para tensão real (mV) for (i = 0, ph_dut_sum=0; i < ADS1015_PH_AVERAGES; i++) ph_dut_sum += ph_dut_samples[i]; @@ -333,7 +540,7 @@ float ADSCalculate_ph_Uncompensated(void) * Note: The subtraction of 2048 assumes a differential configuration * where the midpoint is at the mid-scale of the ADS1015. */ - float v_measured = ((float)(2048 - ADSreadADC_Differential_0_1(&i2c)) * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; + float v_measured = ((float)(ADSreadADC_Differential_0_1(&i2c_ads1015)) * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; /* * 2. Calculate the original Slope (measured during calibration). diff --git a/Fertirrega_v6/Core/Src/main.c b/Fertirrega_v6/Core/Src/main.c index 2b0464b..2b8974f 100644 --- a/Fertirrega_v6/Core/Src/main.c +++ b/Fertirrega_v6/Core/Src/main.c @@ -20,6 +20,7 @@ #include "main.h" #include "adc.h" #include "i2c.h" +#include "tim.h" #include "usart.h" #include "gpio.h" @@ -57,6 +58,8 @@ /* USER CODE BEGIN PV */ + + uint8_t rx_buffer[256]; /*!< Buffer for received data */ uint8_t tx_data[] = "Hello RS-485 Broadcast!"; /*!< Data to send */ @@ -158,14 +161,21 @@ int main(void) MX_I2C1_Init(); MX_I2C2_Init(); MX_USART1_UART_Init(); + MX_TIM3_Init(); /* USER CODE BEGIN 2 */ + + Flash_Load_Page(&flash_data); + + HAL_TIM_Base_Start_IT(&htim3); + //TempSensor_Init(&hadc1); + + /* - HAL_TIM_Base_Start(&htim3); HAL_ADCEx_Calibration_Start(&hadc1); HAL_ADC_Start_DMA(&hadc1, (uint32_t*)AD_RES, 2); // Internal Temperature conversion */ @@ -176,8 +186,12 @@ int main(void) rs485_init(); - ADS1015(&i2c, &hi2c1, ADS_ADDR_GND); - ADSsetGain(&i2c, GAIN_FOUR); + ADS1015(&i2c_ads1015, &hi2c1, ADS1015_ADDR_GND); + //ADSsetGain(&i2c_ads1015, GAIN_FOUR); + + + + ADG715_ResetChannels(); // Start CE and RTD Measurement @@ -189,7 +203,7 @@ int main(void) /* Infinite loop */ /* USER CODE BEGIN WHILE */ - +/* for(i=0;iInstance == TIM3) + { + g_ms_counter++; /* Relógio global do sistema */ + + } +} + + + /* void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { diff --git a/Fertirrega_v6/Core/Src/stm32f1xx_it.c b/Fertirrega_v6/Core/Src/stm32f1xx_it.c index f9bdda4..76646a6 100644 --- a/Fertirrega_v6/Core/Src/stm32f1xx_it.c +++ b/Fertirrega_v6/Core/Src/stm32f1xx_it.c @@ -55,6 +55,7 @@ /* USER CODE END 0 */ /* External variables --------------------------------------------------------*/ +extern TIM_HandleTypeDef htim3; extern UART_HandleTypeDef huart1; /* USER CODE BEGIN EV */ @@ -198,6 +199,20 @@ void SysTick_Handler(void) /* please refer to the startup file (startup_stm32f1xx.s). */ /******************************************************************************/ +/** + * @brief This function handles TIM3 global interrupt. + */ +void TIM3_IRQHandler(void) +{ + /* USER CODE BEGIN TIM3_IRQn 0 */ + + /* USER CODE END TIM3_IRQn 0 */ + HAL_TIM_IRQHandler(&htim3); + /* USER CODE BEGIN TIM3_IRQn 1 */ + + /* USER CODE END TIM3_IRQn 1 */ +} + /** * @brief This function handles USART1 global interrupt. */ diff --git a/Fertirrega_v6/Core/Src/tim.c b/Fertirrega_v6/Core/Src/tim.c index 0cb96ce..dde6854 100644 --- a/Fertirrega_v6/Core/Src/tim.c +++ b/Fertirrega_v6/Core/Src/tim.c @@ -41,9 +41,9 @@ void MX_TIM3_Init(void) /* USER CODE END TIM3_Init 1 */ htim3.Instance = TIM3; - htim3.Init.Prescaler = 3; + htim3.Init.Prescaler = 2; htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - htim3.Init.Period = 59999; + htim3.Init.Period = 999; htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; if (HAL_TIM_Base_Init(&htim3) != HAL_OK) @@ -55,7 +55,7 @@ void MX_TIM3_Init(void) { Error_Handler(); } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) { @@ -77,6 +77,10 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) /* USER CODE END TIM3_MspInit 0 */ /* TIM3 clock enable */ __HAL_RCC_TIM3_CLK_ENABLE(); + + /* TIM3 interrupt Init */ + HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(TIM3_IRQn); /* USER CODE BEGIN TIM3_MspInit 1 */ /* USER CODE END TIM3_MspInit 1 */ @@ -93,6 +97,9 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle) /* USER CODE END TIM3_MspDeInit 0 */ /* Peripheral clock disable */ __HAL_RCC_TIM3_CLK_DISABLE(); + + /* TIM3 interrupt Deinit */ + HAL_NVIC_DisableIRQ(TIM3_IRQn); /* USER CODE BEGIN TIM3_MspDeInit 1 */ /* USER CODE END TIM3_MspDeInit 1 */ diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo index 96b5ac3..9fa3c71 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo @@ -1,19 +1,30 @@ -../Core/Src/ad5934_driver.c:33:6:AD5934_SetRegisterValue 2 -../Core/Src/ad5934_driver.c:61:10:AD5934_GetRegisterValue 3 -../Core/Src/ad5934_driver.c:100:10:AD5934_ReadRegister 3 -../Core/Src/ad5934_driver.c:137:6:AD5934_Init 1 -../Core/Src/ad5934_driver.c:165:6:AD5934_RestartSweep 1 -../Core/Src/ad5934_driver.c:195:10:AD5934_Sweep 1 -../Core/Src/ad5934_driver.c:221:7:AD5934_Get_Ref_Resistance 4 -../Core/Src/ad5934_driver.c:272:7:AD5934_GetTemperature 5 -../Core/Src/ad5934_driver.c:360:7:AD5934_GetImpedance 10 -../Core/Src/ad5934_driver.c:431:6:AD5934_Wait_For_Data_Valid 3 -../Core/Src/ad5934_driver.c:466:7:AD5934_Round_Float_Precision 2 -../Core/Src/ad5934_driver.c:491:7:AD5934_Linear_Correction 1 -../Core/Src/ad5934_driver.c:508:7:AD5934_EC_Compensate_To_25C 2 -../Core/Src/ad5934_driver.c:524:7:AD5934_EC_Calibrate_Temperature 5 -../Core/Src/ad5934_driver.c:573:7:AD5934_Calibrate 1 -../Core/Src/ad5934_driver.c:598:6:ADG715_SetRegisterValue 1 -../Core/Src/ad5934_driver.c:608:6:ADG715_SetChannels 1 -../Core/Src/ad5934_driver.c:613:6:ADG715_ResetChannels 1 -../Core/Src/ad5934_driver.c:625:6:ADG715_Update 3 +../Core/Src/ad5934_driver.c:47:6:AD5934_SetRegisterValue 2 +../Core/Src/ad5934_driver.c:75:10:AD5934_GetRegisterValue 3 +../Core/Src/ad5934_driver.c:114:10:AD5934_ReadRegister 3 +../Core/Src/ad5934_driver.c:151:6:AD5934_Init 1 +../Core/Src/ad5934_driver.c:179:6:AD5934_RestartSweep 1 +../Core/Src/ad5934_driver.c:211:6:AD5934_Repeat_Sweep 1 +../Core/Src/ad5934_driver.c:224:6:AD5934_StopSweep 1 +../Core/Src/ad5934_driver.c:241:10:AD5934_Sweep 1 +../Core/Src/ad5934_driver.c:267:7:AD5934_Get_Ref_Resistance 4 +../Core/Src/ad5934_driver.c:318:7:AD5934_GetTemperature 5 +../Core/Src/ad5934_driver.c:406:7:AD5934_GetImpedance 10 +../Core/Src/ad5934_driver.c:479:7:AD5934_GetMagnitude 1 +../Core/Src/ad5934_driver.c:500:6:AD5934_Wait_For_Data_Valid 3 +../Core/Src/ad5934_driver.c:535:7:AD5934_Round_Float_Precision 2 +../Core/Src/ad5934_driver.c:560:7:AD5934_Linear_Correction 1 +../Core/Src/ad5934_driver.c:577:7:AD5934_EC_Compensate_To_25C 2 +../Core/Src/ad5934_driver.c:593:7:AD5934_EC_Calibrate_Temperature 5 +../Core/Src/ad5934_driver.c:642:7:AD5934_Calibrate 1 +../Core/Src/ad5934_driver.c:658:6:AD5934_Process_System 24 +../Core/Src/ad5934_driver.c:783:6:AD5934_Sort_Array 4 +../Core/Src/ad5934_driver.c:805:7:AD5934_Trimmed_Mean 3 +../Core/Src/ad5934_driver.c:831:7:AD5934_History_Average 2 +../Core/Src/ad5934_driver.c:845:6:AD5934_Process_Sample 4 +../Core/Src/ad5934_driver.c:891:6:AD5934_RTD_NewSample 1 +../Core/Src/ad5934_driver.c:898:6:AD5934_EC_NewSample 1 +../Core/Src/ad5934_driver.c:905:6:AD5934_Reference_NewSample 1 +../Core/Src/ad5934_driver.c:921:6:ADG715_SetRegisterValue 1 +../Core/Src/ad5934_driver.c:931:6:ADG715_SetChannels 1 +../Core/Src/ad5934_driver.c:936:6:ADG715_ResetChannels 1 +../Core/Src/ad5934_driver.c:948:6:ADG715_Update 3 diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.d b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.d index cf777a6..ead93b8 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.d +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.d @@ -25,6 +25,8 @@ Core/Src/ad5934_driver.o: ../Core/Src/ad5934_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \ ../Core/Inc/flash_manager.h ../Core/Inc/main.h ../Core/Inc/ad5934_driver.h: @@ -53,6 +55,8 @@ Core/Src/ad5934_driver.o: ../Core/Src/ad5934_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: ../Core/Inc/flash_manager.h: ../Core/Inc/main.h: diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o index 828a5aa..bd4d2a1 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o and b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su index 4f5cc7b..72c1764 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su @@ -1,19 +1,30 @@ -../Core/Src/ad5934_driver.c:33:6:AD5934_SetRegisterValue 32 static -../Core/Src/ad5934_driver.c:61:10:AD5934_GetRegisterValue 40 static -../Core/Src/ad5934_driver.c:100:10:AD5934_ReadRegister 48 static -../Core/Src/ad5934_driver.c:137:6:AD5934_Init 8 static -../Core/Src/ad5934_driver.c:165:6:AD5934_RestartSweep 8 static -../Core/Src/ad5934_driver.c:195:10:AD5934_Sweep 16 static -../Core/Src/ad5934_driver.c:221:7:AD5934_Get_Ref_Resistance 48 static -../Core/Src/ad5934_driver.c:272:7:AD5934_GetTemperature 72 static -../Core/Src/ad5934_driver.c:360:7:AD5934_GetImpedance 56 static -../Core/Src/ad5934_driver.c:431:6:AD5934_Wait_For_Data_Valid 24 static -../Core/Src/ad5934_driver.c:466:7:AD5934_Round_Float_Precision 24 static -../Core/Src/ad5934_driver.c:491:7:AD5934_Linear_Correction 24 static -../Core/Src/ad5934_driver.c:508:7:AD5934_EC_Compensate_To_25C 24 static -../Core/Src/ad5934_driver.c:524:7:AD5934_EC_Calibrate_Temperature 152 static -../Core/Src/ad5934_driver.c:573:7:AD5934_Calibrate 48 static -../Core/Src/ad5934_driver.c:598:6:ADG715_SetRegisterValue 32 static -../Core/Src/ad5934_driver.c:608:6:ADG715_SetChannels 16 static -../Core/Src/ad5934_driver.c:613:6:ADG715_ResetChannels 8 static -../Core/Src/ad5934_driver.c:625:6:ADG715_Update 16 static +../Core/Src/ad5934_driver.c:47:6:AD5934_SetRegisterValue 32 static +../Core/Src/ad5934_driver.c:75:10:AD5934_GetRegisterValue 40 static +../Core/Src/ad5934_driver.c:114:10:AD5934_ReadRegister 48 static +../Core/Src/ad5934_driver.c:151:6:AD5934_Init 8 static +../Core/Src/ad5934_driver.c:179:6:AD5934_RestartSweep 8 static +../Core/Src/ad5934_driver.c:211:6:AD5934_Repeat_Sweep 8 static +../Core/Src/ad5934_driver.c:224:6:AD5934_StopSweep 8 static +../Core/Src/ad5934_driver.c:241:10:AD5934_Sweep 16 static +../Core/Src/ad5934_driver.c:267:7:AD5934_Get_Ref_Resistance 48 static +../Core/Src/ad5934_driver.c:318:7:AD5934_GetTemperature 72 static +../Core/Src/ad5934_driver.c:406:7:AD5934_GetImpedance 56 static +../Core/Src/ad5934_driver.c:479:7:AD5934_GetMagnitude 24 static +../Core/Src/ad5934_driver.c:500:6:AD5934_Wait_For_Data_Valid 24 static +../Core/Src/ad5934_driver.c:535:7:AD5934_Round_Float_Precision 24 static +../Core/Src/ad5934_driver.c:560:7:AD5934_Linear_Correction 24 static +../Core/Src/ad5934_driver.c:577:7:AD5934_EC_Compensate_To_25C 24 static +../Core/Src/ad5934_driver.c:593:7:AD5934_EC_Calibrate_Temperature 152 static +../Core/Src/ad5934_driver.c:642:7:AD5934_Calibrate 48 static +../Core/Src/ad5934_driver.c:658:6:AD5934_Process_System 16 static +../Core/Src/ad5934_driver.c:783:6:AD5934_Sort_Array 24 static +../Core/Src/ad5934_driver.c:805:7:AD5934_Trimmed_Mean 32 static +../Core/Src/ad5934_driver.c:831:7:AD5934_History_Average 24 static +../Core/Src/ad5934_driver.c:845:6:AD5934_Process_Sample 32 static +../Core/Src/ad5934_driver.c:891:6:AD5934_RTD_NewSample 16 static +../Core/Src/ad5934_driver.c:898:6:AD5934_EC_NewSample 16 static +../Core/Src/ad5934_driver.c:905:6:AD5934_Reference_NewSample 16 static +../Core/Src/ad5934_driver.c:921:6:ADG715_SetRegisterValue 32 static +../Core/Src/ad5934_driver.c:931:6:ADG715_SetChannels 16 static +../Core/Src/ad5934_driver.c:936:6:ADG715_ResetChannels 8 static +../Core/Src/ad5934_driver.c:948:6:ADG715_Update 16 static diff --git a/Fertirrega_v6/Debug/Core/Src/adc.d b/Fertirrega_v6/Debug/Core/Src/adc.d index b806d53..9c14eca 100644 --- a/Fertirrega_v6/Debug/Core/Src/adc.d +++ b/Fertirrega_v6/Debug/Core/Src/adc.d @@ -24,6 +24,8 @@ Core/Src/adc.o: ../Core/Src/adc.c ../Core/Inc/adc.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/adc.h: ../Core/Inc/main.h: @@ -52,4 +54,6 @@ Core/Src/adc.o: ../Core/Src/adc.c ../Core/Inc/adc.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/adc.o b/Fertirrega_v6/Debug/Core/Src/adc.o index dce02e9..ea8a6e5 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/adc.o and b/Fertirrega_v6/Debug/Core/Src/adc.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.cyclo b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.cyclo index 5d09bde..7ee3e47 100644 --- a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.cyclo @@ -1,16 +1,22 @@ -../Core/Src/ads1015_driver.c:16:13:writeRegister 1 -../Core/Src/ads1015_driver.c:22:17:readRegister 1 -../Core/Src/ads1015_driver.c:30:13:ADSbegin 2 -../Core/Src/ads1015_driver.c:37:6:ADS1015 1 -../Core/Src/ads1015_driver.c:60:6:ADSsetGain 1 -../Core/Src/ads1015_driver.c:65:11:ADSgetGain 1 -../Core/Src/ads1015_driver.c:70:10:ADSreadADC_SingleEnded 6 -../Core/Src/ads1015_driver.c:122:9:ADSreadADC_Differential_0_1 3 -../Core/Src/ads1015_driver.c:167:9:ADSreadADC_Differential_2_3 3 -../Core/Src/ads1015_driver.c:213:6:ADSstartComparator_SingleEnded 5 -../Core/Src/ads1015_driver.c:255:9:ADSgetLastConversionResults 3 -../Core/Src/ads1015_driver.c:274:7:ADSCalculate_ph_mV 3 -../Core/Src/ads1015_driver.c:303:7:ADSCalculate_ph_Compensated 1 -../Core/Src/ads1015_driver.c:329:7:ADSCalculate_ph_Uncompensated 4 -../Core/Src/ads1015_driver.c:381:7:ADSinterpolate_ph 5 -../Core/Src/ads1015_driver.c:419:7:ADSRound_Float_Precision 2 +../Core/Src/ads1015_driver.c:21:13:writeRegister 1 +../Core/Src/ads1015_driver.c:27:17:readRegister 1 +../Core/Src/ads1015_driver.c:35:13:ADSbegin 2 +../Core/Src/ads1015_driver.c:42:6:ADS1015 1 +../Core/Src/ads1015_driver.c:66:6:ADSsetGain 1 +../Core/Src/ads1015_driver.c:71:11:ADSgetGain 1 +../Core/Src/ads1015_driver.c:76:10:ADSreadADC_SingleEnded 6 +../Core/Src/ads1015_driver.c:128:9:ADSreadADC_Differential_0_1 3 +../Core/Src/ads1015_driver.c:173:9:ADSreadADC_Differential_2_3 3 +../Core/Src/ads1015_driver.c:219:6:ADSstartComparator_SingleEnded 5 +../Core/Src/ads1015_driver.c:261:9:ADSgetLastConversionResults 3 +../Core/Src/ads1015_driver.c:283:6:ADS1015_Process_System 10 +../Core/Src/ads1015_driver.c:366:6:ADS1015_Sort_Array 4 +../Core/Src/ads1015_driver.c:388:7:ADS1015_Trimmed_Mean 3 +../Core/Src/ads1015_driver.c:414:7:ADS1015_History_Average 2 +../Core/Src/ads1015_driver.c:428:6:ADS1015_Process_Sample 4 +../Core/Src/ads1015_driver.c:473:6:ADS1015_pH_NewSample 1 +../Core/Src/ads1015_driver.c:481:7:ADSCalculate_ph_mV 3 +../Core/Src/ads1015_driver.c:510:7:ADSCalculate_ph_Compensated 1 +../Core/Src/ads1015_driver.c:536:7:ADSCalculate_ph_Uncompensated 4 +../Core/Src/ads1015_driver.c:588:7:ADSinterpolate_ph 5 +../Core/Src/ads1015_driver.c:626:7:ADSRound_Float_Precision 2 diff --git a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.d b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.d index a353b18..a1eda2d 100644 --- a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.d +++ b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.d @@ -25,6 +25,8 @@ Core/Src/ads1015_driver.o: ../Core/Src/ads1015_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \ ../Core/Inc/flash_manager.h ../Core/Inc/ads1015_driver.h: @@ -54,5 +56,7 @@ Core/Src/ads1015_driver.o: ../Core/Src/ads1015_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: ../Core/Inc/flash_manager.h: diff --git a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o index 444b89b..6804fdb 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o and b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.su b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.su index 31f951f..6e9825d 100644 --- a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.su +++ b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.su @@ -1,16 +1,22 @@ -../Core/Src/ads1015_driver.c:16:13:writeRegister 32 static -../Core/Src/ads1015_driver.c:22:17:readRegister 32 static -../Core/Src/ads1015_driver.c:30:13:ADSbegin 16 static -../Core/Src/ads1015_driver.c:37:6:ADS1015 24 static -../Core/Src/ads1015_driver.c:60:6:ADSsetGain 16 static -../Core/Src/ads1015_driver.c:65:11:ADSgetGain 16 static -../Core/Src/ads1015_driver.c:70:10:ADSreadADC_SingleEnded 24 static -../Core/Src/ads1015_driver.c:122:9:ADSreadADC_Differential_0_1 24 static -../Core/Src/ads1015_driver.c:167:9:ADSreadADC_Differential_2_3 24 static -../Core/Src/ads1015_driver.c:213:6:ADSstartComparator_SingleEnded 24 static -../Core/Src/ads1015_driver.c:255:9:ADSgetLastConversionResults 24 static -../Core/Src/ads1015_driver.c:274:7:ADSCalculate_ph_mV 16 static -../Core/Src/ads1015_driver.c:303:7:ADSCalculate_ph_Compensated 48 static -../Core/Src/ads1015_driver.c:329:7:ADSCalculate_ph_Uncompensated 24 static -../Core/Src/ads1015_driver.c:381:7:ADSinterpolate_ph 192 static -../Core/Src/ads1015_driver.c:419:7:ADSRound_Float_Precision 24 static +../Core/Src/ads1015_driver.c:21:13:writeRegister 32 static +../Core/Src/ads1015_driver.c:27:17:readRegister 32 static +../Core/Src/ads1015_driver.c:35:13:ADSbegin 16 static +../Core/Src/ads1015_driver.c:42:6:ADS1015 24 static +../Core/Src/ads1015_driver.c:66:6:ADSsetGain 16 static +../Core/Src/ads1015_driver.c:71:11:ADSgetGain 16 static +../Core/Src/ads1015_driver.c:76:10:ADSreadADC_SingleEnded 24 static +../Core/Src/ads1015_driver.c:128:9:ADSreadADC_Differential_0_1 24 static +../Core/Src/ads1015_driver.c:173:9:ADSreadADC_Differential_2_3 24 static +../Core/Src/ads1015_driver.c:219:6:ADSstartComparator_SingleEnded 24 static +../Core/Src/ads1015_driver.c:261:9:ADSgetLastConversionResults 24 static +../Core/Src/ads1015_driver.c:283:6:ADS1015_Process_System 16 static +../Core/Src/ads1015_driver.c:366:6:ADS1015_Sort_Array 24 static +../Core/Src/ads1015_driver.c:388:7:ADS1015_Trimmed_Mean 32 static +../Core/Src/ads1015_driver.c:414:7:ADS1015_History_Average 24 static +../Core/Src/ads1015_driver.c:428:6:ADS1015_Process_Sample 32 static +../Core/Src/ads1015_driver.c:473:6:ADS1015_pH_NewSample 16 static +../Core/Src/ads1015_driver.c:481:7:ADSCalculate_ph_mV 16 static +../Core/Src/ads1015_driver.c:510:7:ADSCalculate_ph_Compensated 48 static +../Core/Src/ads1015_driver.c:536:7:ADSCalculate_ph_Uncompensated 24 static +../Core/Src/ads1015_driver.c:588:7:ADSinterpolate_ph 192 static +../Core/Src/ads1015_driver.c:626:7:ADSRound_Float_Precision 24 static diff --git a/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.d b/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.d index 509fe81..cd3a92c 100644 --- a/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.d +++ b/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.d @@ -25,6 +25,8 @@ Core/Src/analog_loop_driver.o: ../Core/Src/analog_loop_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/analog_loop_driver.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: @@ -52,4 +54,6 @@ Core/Src/analog_loop_driver.o: ../Core/Src/analog_loop_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.o b/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.o index aac2451..08fb87f 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.o and b/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.d b/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.d index 5cf2c04..0a14171 100644 --- a/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.d +++ b/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.d @@ -25,6 +25,8 @@ Core/Src/digital_outputs_driver.o: ../Core/Src/digital_outputs_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/digital_outputs_driver.h: ../Core/Inc/main.h: @@ -53,4 +55,6 @@ Core/Src/digital_outputs_driver.o: ../Core/Src/digital_outputs_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.o b/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.o index cd0afff..cc6cb0b 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.o and b/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/flash_manager.d b/Fertirrega_v6/Debug/Core/Src/flash_manager.d index 46cfc5a..4954169 100644 --- a/Fertirrega_v6/Debug/Core/Src/flash_manager.d +++ b/Fertirrega_v6/Debug/Core/Src/flash_manager.d @@ -25,6 +25,8 @@ Core/Src/flash_manager.o: ../Core/Src/flash_manager.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/flash_manager.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: @@ -52,4 +54,6 @@ Core/Src/flash_manager.o: ../Core/Src/flash_manager.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/flash_manager.o b/Fertirrega_v6/Debug/Core/Src/flash_manager.o index 84b01c2..dece0fc 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/flash_manager.o and b/Fertirrega_v6/Debug/Core/Src/flash_manager.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/gpio.d b/Fertirrega_v6/Debug/Core/Src/gpio.d index 20d43e5..9fa10f8 100644 --- a/Fertirrega_v6/Debug/Core/Src/gpio.d +++ b/Fertirrega_v6/Debug/Core/Src/gpio.d @@ -24,6 +24,8 @@ Core/Src/gpio.o: ../Core/Src/gpio.c ../Core/Inc/gpio.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/gpio.h: ../Core/Inc/main.h: @@ -52,4 +54,6 @@ Core/Src/gpio.o: ../Core/Src/gpio.c ../Core/Inc/gpio.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/gpio.o b/Fertirrega_v6/Debug/Core/Src/gpio.o index 6255d5f..8b47eb9 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/gpio.o and b/Fertirrega_v6/Debug/Core/Src/gpio.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/i2c.d b/Fertirrega_v6/Debug/Core/Src/i2c.d index 949fc8b..7d7127c 100644 --- a/Fertirrega_v6/Debug/Core/Src/i2c.d +++ b/Fertirrega_v6/Debug/Core/Src/i2c.d @@ -24,6 +24,8 @@ Core/Src/i2c.o: ../Core/Src/i2c.c ../Core/Inc/i2c.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/i2c.h: ../Core/Inc/main.h: @@ -52,4 +54,6 @@ Core/Src/i2c.o: ../Core/Src/i2c.c ../Core/Inc/i2c.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/i2c.o b/Fertirrega_v6/Debug/Core/Src/i2c.o index 0f4c314..91e1a90 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/i2c.o and b/Fertirrega_v6/Debug/Core/Src/i2c.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/main.cyclo b/Fertirrega_v6/Debug/Core/Src/main.cyclo index 2aaa8c5..7613351 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/main.cyclo @@ -1,5 +1,6 @@ -../Core/Src/main.c:110:5:main 12 -../Core/Src/main.c:377:6:SystemClock_Config 4 -../Core/Src/main.c:428:6:FloatToString 8 -../Core/Src/main.c:490:6:intToStr 5 -../Core/Src/main.c:540:6:Error_Handler 1 +../Core/Src/main.c:113:5:main 8 +../Core/Src/main.c:421:6:SystemClock_Config 4 +../Core/Src/main.c:472:6:FloatToString 8 +../Core/Src/main.c:534:6:intToStr 5 +../Core/Src/main.c:572:6:HAL_TIM_PeriodElapsedCallback 2 +../Core/Src/main.c:596:6:Error_Handler 1 diff --git a/Fertirrega_v6/Debug/Core/Src/main.d b/Fertirrega_v6/Debug/Core/Src/main.d index fb8896e..13325cb 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.d +++ b/Fertirrega_v6/Debug/Core/Src/main.d @@ -24,8 +24,10 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \ - ../Core/Inc/adc.h ../Core/Inc/main.h ../Core/Inc/i2c.h \ + ../Core/Inc/adc.h ../Core/Inc/main.h ../Core/Inc/i2c.h ../Core/Inc/tim.h \ ../Core/Inc/usart.h ../Core/Inc/gpio.h ../Core/Inc/ads1015_driver.h \ ../Core/Inc/flash_manager.h ../Core/Inc/digital_outputs_driver.h \ ../Core/Inc/ad5934_driver.h ../Core/Inc/rs485_driver.h \ @@ -57,10 +59,13 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: ../Core/Inc/adc.h: ../Core/Inc/main.h: ../Core/Inc/i2c.h: +../Core/Inc/tim.h: ../Core/Inc/usart.h: ../Core/Inc/gpio.h: ../Core/Inc/ads1015_driver.h: diff --git a/Fertirrega_v6/Debug/Core/Src/main.o b/Fertirrega_v6/Debug/Core/Src/main.o index 77031fa..4f54489 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/main.o and b/Fertirrega_v6/Debug/Core/Src/main.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/main.su b/Fertirrega_v6/Debug/Core/Src/main.su index 0cc5774..6d54d7f 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.su +++ b/Fertirrega_v6/Debug/Core/Src/main.su @@ -1,5 +1,6 @@ -../Core/Src/main.c:110:5:main 88 static -../Core/Src/main.c:377:6:SystemClock_Config 88 static -../Core/Src/main.c:428:6:FloatToString 104 static -../Core/Src/main.c:490:6:intToStr 40 static -../Core/Src/main.c:540:6:Error_Handler 4 static,ignoring_inline_asm +../Core/Src/main.c:113:5:main 64 static +../Core/Src/main.c:421:6:SystemClock_Config 88 static +../Core/Src/main.c:472:6:FloatToString 104 static +../Core/Src/main.c:534:6:intToStr 40 static +../Core/Src/main.c:572:6:HAL_TIM_PeriodElapsedCallback 16 static +../Core/Src/main.c:596:6:Error_Handler 4 static,ignoring_inline_asm diff --git a/Fertirrega_v6/Debug/Core/Src/rs485_driver.d b/Fertirrega_v6/Debug/Core/Src/rs485_driver.d index ade9ed2..2293930 100644 --- a/Fertirrega_v6/Debug/Core/Src/rs485_driver.d +++ b/Fertirrega_v6/Debug/Core/Src/rs485_driver.d @@ -25,6 +25,8 @@ Core/Src/rs485_driver.o: ../Core/Src/rs485_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h ../Core/Inc/rs485_driver.h: @@ -53,5 +55,7 @@ Core/Src/rs485_driver.o: ../Core/Src/rs485_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h: diff --git a/Fertirrega_v6/Debug/Core/Src/rs485_driver.o b/Fertirrega_v6/Debug/Core/Src/rs485_driver.o index 730f958..85fb0bc 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/rs485_driver.o and b/Fertirrega_v6/Debug/Core/Src/rs485_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.d b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.d index c188687..1880f45 100644 --- a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.d +++ b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.d @@ -24,6 +24,8 @@ Core/Src/stm32f1xx_hal_msp.o: ../Core/Src/stm32f1xx_hal_msp.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/main.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: @@ -51,4 +53,6 @@ Core/Src/stm32f1xx_hal_msp.o: ../Core/Src/stm32f1xx_hal_msp.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.o b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.o index b707135..e726906 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.o and b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.cyclo b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.cyclo index 3d8e27a..47bdb15 100644 --- a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.cyclo @@ -1,10 +1,11 @@ -../Core/Src/stm32f1xx_it.c:69:6:NMI_Handler 1 -../Core/Src/stm32f1xx_it.c:84:6:HardFault_Handler 1 -../Core/Src/stm32f1xx_it.c:99:6:MemManage_Handler 1 -../Core/Src/stm32f1xx_it.c:114:6:BusFault_Handler 1 -../Core/Src/stm32f1xx_it.c:129:6:UsageFault_Handler 1 -../Core/Src/stm32f1xx_it.c:144:6:SVC_Handler 1 -../Core/Src/stm32f1xx_it.c:157:6:DebugMon_Handler 1 -../Core/Src/stm32f1xx_it.c:170:6:PendSV_Handler 1 -../Core/Src/stm32f1xx_it.c:183:6:SysTick_Handler 1 -../Core/Src/stm32f1xx_it.c:204:6:USART1_IRQHandler 1 +../Core/Src/stm32f1xx_it.c:70:6:NMI_Handler 1 +../Core/Src/stm32f1xx_it.c:85:6:HardFault_Handler 1 +../Core/Src/stm32f1xx_it.c:100:6:MemManage_Handler 1 +../Core/Src/stm32f1xx_it.c:115:6:BusFault_Handler 1 +../Core/Src/stm32f1xx_it.c:130:6:UsageFault_Handler 1 +../Core/Src/stm32f1xx_it.c:145:6:SVC_Handler 1 +../Core/Src/stm32f1xx_it.c:158:6:DebugMon_Handler 1 +../Core/Src/stm32f1xx_it.c:171:6:PendSV_Handler 1 +../Core/Src/stm32f1xx_it.c:184:6:SysTick_Handler 1 +../Core/Src/stm32f1xx_it.c:205:6:TIM3_IRQHandler 1 +../Core/Src/stm32f1xx_it.c:219:6:USART1_IRQHandler 1 diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.d b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.d index e7d4e3b..025ab30 100644 --- a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.d +++ b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.d @@ -24,6 +24,8 @@ Core/Src/stm32f1xx_it.o: ../Core/Src/stm32f1xx_it.c ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \ ../Core/Inc/stm32f1xx_it.h ../Core/Inc/main.h: @@ -52,5 +54,7 @@ Core/Src/stm32f1xx_it.o: ../Core/Src/stm32f1xx_it.c ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: ../Core/Inc/stm32f1xx_it.h: diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.o b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.o index 4a973b0..d4125b4 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.o and b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.su b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.su index fc2a3b9..d565704 100644 --- a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.su +++ b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.su @@ -1,10 +1,11 @@ -../Core/Src/stm32f1xx_it.c:69:6:NMI_Handler 4 static -../Core/Src/stm32f1xx_it.c:84:6:HardFault_Handler 4 static -../Core/Src/stm32f1xx_it.c:99:6:MemManage_Handler 4 static -../Core/Src/stm32f1xx_it.c:114:6:BusFault_Handler 4 static -../Core/Src/stm32f1xx_it.c:129:6:UsageFault_Handler 4 static -../Core/Src/stm32f1xx_it.c:144:6:SVC_Handler 4 static -../Core/Src/stm32f1xx_it.c:157:6:DebugMon_Handler 4 static -../Core/Src/stm32f1xx_it.c:170:6:PendSV_Handler 4 static -../Core/Src/stm32f1xx_it.c:183:6:SysTick_Handler 8 static -../Core/Src/stm32f1xx_it.c:204:6:USART1_IRQHandler 8 static +../Core/Src/stm32f1xx_it.c:70:6:NMI_Handler 4 static +../Core/Src/stm32f1xx_it.c:85:6:HardFault_Handler 4 static +../Core/Src/stm32f1xx_it.c:100:6:MemManage_Handler 4 static +../Core/Src/stm32f1xx_it.c:115:6:BusFault_Handler 4 static +../Core/Src/stm32f1xx_it.c:130:6:UsageFault_Handler 4 static +../Core/Src/stm32f1xx_it.c:145:6:SVC_Handler 4 static +../Core/Src/stm32f1xx_it.c:158:6:DebugMon_Handler 4 static +../Core/Src/stm32f1xx_it.c:171:6:PendSV_Handler 4 static +../Core/Src/stm32f1xx_it.c:184:6:SysTick_Handler 8 static +../Core/Src/stm32f1xx_it.c:205:6:TIM3_IRQHandler 8 static +../Core/Src/stm32f1xx_it.c:219:6:USART1_IRQHandler 8 static diff --git a/Fertirrega_v6/Debug/Core/Src/subdir.mk b/Fertirrega_v6/Debug/Core/Src/subdir.mk index 0ebb4a7..d8f96c1 100644 --- a/Fertirrega_v6/Debug/Core/Src/subdir.mk +++ b/Fertirrega_v6/Debug/Core/Src/subdir.mk @@ -20,6 +20,7 @@ C_SRCS += \ ../Core/Src/syscalls.c \ ../Core/Src/sysmem.c \ ../Core/Src/system_stm32f1xx.c \ +../Core/Src/tim.c \ ../Core/Src/usart.c OBJS += \ @@ -38,6 +39,7 @@ OBJS += \ ./Core/Src/syscalls.o \ ./Core/Src/sysmem.o \ ./Core/Src/system_stm32f1xx.o \ +./Core/Src/tim.o \ ./Core/Src/usart.o C_DEPS += \ @@ -56,6 +58,7 @@ C_DEPS += \ ./Core/Src/syscalls.d \ ./Core/Src/sysmem.d \ ./Core/Src/system_stm32f1xx.d \ +./Core/Src/tim.d \ ./Core/Src/usart.d @@ -66,7 +69,7 @@ Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk clean: clean-Core-2f-Src clean-Core-2f-Src: - -$(RM) ./Core/Src/ad5934_driver.cyclo ./Core/Src/ad5934_driver.d ./Core/Src/ad5934_driver.o ./Core/Src/ad5934_driver.su ./Core/Src/adc.cyclo ./Core/Src/adc.d ./Core/Src/adc.o ./Core/Src/adc.su ./Core/Src/ads1015_driver.cyclo ./Core/Src/ads1015_driver.d ./Core/Src/ads1015_driver.o ./Core/Src/ads1015_driver.su ./Core/Src/analog_loop_driver.cyclo ./Core/Src/analog_loop_driver.d ./Core/Src/analog_loop_driver.o ./Core/Src/analog_loop_driver.su ./Core/Src/digital_outputs_driver.cyclo ./Core/Src/digital_outputs_driver.d ./Core/Src/digital_outputs_driver.o ./Core/Src/digital_outputs_driver.su ./Core/Src/flash_manager.cyclo ./Core/Src/flash_manager.d ./Core/Src/flash_manager.o ./Core/Src/flash_manager.su ./Core/Src/gpio.cyclo ./Core/Src/gpio.d ./Core/Src/gpio.o ./Core/Src/gpio.su ./Core/Src/i2c.cyclo ./Core/Src/i2c.d ./Core/Src/i2c.o ./Core/Src/i2c.su ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/rs485_driver.cyclo ./Core/Src/rs485_driver.d ./Core/Src/rs485_driver.o ./Core/Src/rs485_driver.su ./Core/Src/stm32f1xx_hal_msp.cyclo ./Core/Src/stm32f1xx_hal_msp.d ./Core/Src/stm32f1xx_hal_msp.o ./Core/Src/stm32f1xx_hal_msp.su ./Core/Src/stm32f1xx_it.cyclo ./Core/Src/stm32f1xx_it.d ./Core/Src/stm32f1xx_it.o ./Core/Src/stm32f1xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f1xx.cyclo ./Core/Src/system_stm32f1xx.d ./Core/Src/system_stm32f1xx.o ./Core/Src/system_stm32f1xx.su ./Core/Src/usart.cyclo ./Core/Src/usart.d ./Core/Src/usart.o ./Core/Src/usart.su + -$(RM) ./Core/Src/ad5934_driver.cyclo ./Core/Src/ad5934_driver.d ./Core/Src/ad5934_driver.o ./Core/Src/ad5934_driver.su ./Core/Src/adc.cyclo ./Core/Src/adc.d ./Core/Src/adc.o ./Core/Src/adc.su ./Core/Src/ads1015_driver.cyclo ./Core/Src/ads1015_driver.d ./Core/Src/ads1015_driver.o ./Core/Src/ads1015_driver.su ./Core/Src/analog_loop_driver.cyclo ./Core/Src/analog_loop_driver.d ./Core/Src/analog_loop_driver.o ./Core/Src/analog_loop_driver.su ./Core/Src/digital_outputs_driver.cyclo ./Core/Src/digital_outputs_driver.d ./Core/Src/digital_outputs_driver.o ./Core/Src/digital_outputs_driver.su ./Core/Src/flash_manager.cyclo ./Core/Src/flash_manager.d ./Core/Src/flash_manager.o ./Core/Src/flash_manager.su ./Core/Src/gpio.cyclo ./Core/Src/gpio.d ./Core/Src/gpio.o ./Core/Src/gpio.su ./Core/Src/i2c.cyclo ./Core/Src/i2c.d ./Core/Src/i2c.o ./Core/Src/i2c.su ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/rs485_driver.cyclo ./Core/Src/rs485_driver.d ./Core/Src/rs485_driver.o ./Core/Src/rs485_driver.su ./Core/Src/stm32f1xx_hal_msp.cyclo ./Core/Src/stm32f1xx_hal_msp.d ./Core/Src/stm32f1xx_hal_msp.o ./Core/Src/stm32f1xx_hal_msp.su ./Core/Src/stm32f1xx_it.cyclo ./Core/Src/stm32f1xx_it.d ./Core/Src/stm32f1xx_it.o ./Core/Src/stm32f1xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f1xx.cyclo ./Core/Src/system_stm32f1xx.d ./Core/Src/system_stm32f1xx.o ./Core/Src/system_stm32f1xx.su ./Core/Src/tim.cyclo ./Core/Src/tim.d ./Core/Src/tim.o ./Core/Src/tim.su ./Core/Src/usart.cyclo ./Core/Src/usart.d ./Core/Src/usart.o ./Core/Src/usart.su .PHONY: clean-Core-2f-Src diff --git a/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.d b/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.d index 7122ee9..55fea71 100644 --- a/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.d +++ b/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.d @@ -24,6 +24,8 @@ Core/Src/system_stm32f1xx.o: ../Core/Src/system_stm32f1xx.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h: ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h: @@ -50,4 +52,6 @@ Core/Src/system_stm32f1xx.o: ../Core/Src/system_stm32f1xx.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.o b/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.o index 7b57512..1e077d2 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.o and b/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/tim.cyclo b/Fertirrega_v6/Debug/Core/Src/tim.cyclo index f4822c4..466286c 100644 --- a/Fertirrega_v6/Debug/Core/Src/tim.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/tim.cyclo @@ -1,3 +1,3 @@ ../Core/Src/tim.c:30:6:MX_TIM3_Init 4 ../Core/Src/tim.c:70:6:HAL_TIM_Base_MspInit 2 -../Core/Src/tim.c:86:6:HAL_TIM_Base_MspDeInit 2 +../Core/Src/tim.c:90:6:HAL_TIM_Base_MspDeInit 2 diff --git a/Fertirrega_v6/Debug/Core/Src/tim.o b/Fertirrega_v6/Debug/Core/Src/tim.o index a68e764..8c9a610 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/tim.o and b/Fertirrega_v6/Debug/Core/Src/tim.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/tim.su b/Fertirrega_v6/Debug/Core/Src/tim.su index abe4c8c..eee8f07 100644 --- a/Fertirrega_v6/Debug/Core/Src/tim.su +++ b/Fertirrega_v6/Debug/Core/Src/tim.su @@ -1,3 +1,3 @@ ../Core/Src/tim.c:30:6:MX_TIM3_Init 32 static ../Core/Src/tim.c:70:6:HAL_TIM_Base_MspInit 24 static -../Core/Src/tim.c:86:6:HAL_TIM_Base_MspDeInit 16 static +../Core/Src/tim.c:90:6:HAL_TIM_Base_MspDeInit 16 static diff --git a/Fertirrega_v6/Debug/Core/Src/usart.d b/Fertirrega_v6/Debug/Core/Src/usart.d index 1eded02..0634dec 100644 --- a/Fertirrega_v6/Debug/Core/Src/usart.d +++ b/Fertirrega_v6/Debug/Core/Src/usart.d @@ -24,6 +24,8 @@ Core/Src/usart.o: ../Core/Src/usart.c ../Core/Inc/usart.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/usart.h: ../Core/Inc/main.h: @@ -52,4 +54,6 @@ Core/Src/usart.o: ../Core/Src/usart.c ../Core/Inc/usart.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/usart.o b/Fertirrega_v6/Debug/Core/Src/usart.o index 21f8b44..41ffbd0 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/usart.o and b/Fertirrega_v6/Debug/Core/Src/usart.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d index 40df42e..e2af949 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o index 3e8e575..e607e53 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d index 7afef2c..4ec10ed 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o index c3824dc..773dcab 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d index dd47056..0598434 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o index 27d7969..3a34d8e 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d index c3cc888..af1bfc2 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o index 3ff547b..9d39be7 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d index c5a1679..ee268e7 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o index b30d90f..4c9295f 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d index 1680ca8..8f8489e 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o index d4636a4..99a3b23 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d index c1445b4..302e289 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o index cebd1c6..eed5f5d 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d index 664d9a0..53fc879 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o index 33e7656..d4728c8 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d index 78d4ced..d03bd45 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o index ea04d0d..dd0fb8c 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d index 9687a4c..6322251 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o index 0a7fc52..7c3773a 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d index 29581c9..11d0215 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o index b9d6ead..47c4230 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d index 5bd36cd..0f68693 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o index 0d449b8..9ea274c 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d index f5a74be..b040f87 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o index 6853e69..40ab006 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d index 8a1f798..cd21565 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o index 38a6683..fe487b9 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o index 1ab13ac..873ab7f 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o index afb9fe9..17f72b1 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d index 4e2c2df..146fba3 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d @@ -25,6 +25,8 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -51,4 +53,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: +../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o index 8f8ab7c..bffea80 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk index b2d0f1e..990cf88 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk @@ -19,6 +19,8 @@ C_SRCS += \ ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c \ ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c \ ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c \ +../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c \ +../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c \ ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c OBJS += \ @@ -36,6 +38,8 @@ OBJS += \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o \ +./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o \ +./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o C_DEPS += \ @@ -53,6 +57,8 @@ C_DEPS += \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d \ +./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d \ +./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d @@ -63,7 +69,7 @@ Drivers/STM32F1xx_HAL_Driver/Src/%.o Drivers/STM32F1xx_HAL_Driver/Src/%.su Drive clean: clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src: - -$(RM) ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.su + -$(RM) ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.su .PHONY: clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.elf b/Fertirrega_v6/Debug/Fertirrega_v6.elf index b6ed0cf..a083113 100644 Binary files a/Fertirrega_v6/Debug/Fertirrega_v6.elf and b/Fertirrega_v6/Debug/Fertirrega_v6.elf differ diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.list b/Fertirrega_v6/Debug/Fertirrega_v6.list index 7994268..9b8de8c 100644 --- a/Fertirrega_v6/Debug/Fertirrega_v6.list +++ b/Fertirrega_v6/Debug/Fertirrega_v6.list @@ -5,47 +5,47 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 0000010c 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00006598 0800010c 0800010c 0000110c 2**2 + 1 .text 000065b4 0800010c 0800010c 0000110c 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000174 080066a4 080066a4 000076a4 2**2 + 2 .rodata 00000084 080066c0 080066c0 000076c0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08006818 08006818 00008090 2**0 + 3 .ARM.extab 00000000 08006744 08006744 00008094 2**0 CONTENTS, READONLY - 4 .ARM 00000008 08006818 08006818 00007818 2**2 + 4 .ARM 00000008 08006744 08006744 00007744 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 08006820 08006820 00008090 2**0 + 5 .preinit_array 00000000 0800674c 0800674c 00008094 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08006820 08006820 00007820 2**2 + 6 .init_array 00000004 0800674c 0800674c 0000774c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 7 .fini_array 00000004 08006824 08006824 00007824 2**2 + 7 .fini_array 00000004 08006750 08006750 00007750 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 8 .data 00000090 20000000 08006828 00008000 2**2 + 8 .data 00000094 20000000 08006754 00008000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00000830 20000090 080068b8 00008090 2**3 + 9 .bss 000008b8 20000094 080067e8 00008094 2**2 ALLOC - 10 ._user_heap_stack 00000600 200008c0 080068b8 000088c0 2**0 + 10 ._user_heap_stack 00000604 2000094c 080067e8 0000894c 2**0 ALLOC - 11 .ARM.attributes 00000029 00000000 00000000 00008090 2**0 + 11 .ARM.attributes 00000029 00000000 00000000 00008094 2**0 CONTENTS, READONLY - 12 .debug_info 0000ff7c 00000000 00000000 000080b9 2**0 + 12 .debug_info 00014af9 00000000 00000000 000080bd 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 00003374 00000000 00000000 00018035 2**0 + 13 .debug_abbrev 00003648 00000000 00000000 0001cbb6 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 00000e30 00000000 00000000 0001b3b0 2**3 + 14 .debug_aranges 00001310 00000000 00000000 00020200 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_rnglists 00000ae8 00000000 00000000 0001c1e0 2**0 + 15 .debug_rnglists 00000f01 00000000 00000000 00021510 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 00019a99 00000000 00000000 0001ccc8 2**0 + 16 .debug_macro 0001a7c4 00000000 00000000 00022411 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 0001439d 00000000 00000000 00036761 2**0 + 17 .debug_line 00018bbb 00000000 00000000 0003cbd5 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 0008d606 00000000 00000000 0004aafe 2**0 + 18 .debug_str 00095b1b 00000000 00000000 00055790 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000043 00000000 00000000 000d8104 2**0 + 19 .comment 00000043 00000000 00000000 000eb2ab 2**0 CONTENTS, READONLY - 20 .debug_frame 00003af8 00000000 00000000 000d8148 2**2 + 20 .debug_frame 00005088 00000000 00000000 000eb2f0 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 21 .debug_line_str 00000052 00000000 00000000 000dbc40 2**0 + 21 .debug_line_str 00000052 00000000 00000000 000f0378 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -62,9 +62,9 @@ Disassembly of section .text: 800011e: 2301 movs r3, #1 8000120: 7023 strb r3, [r4, #0] 8000122: bd10 pop {r4, pc} - 8000124: 20000090 .word 0x20000090 + 8000124: 20000094 .word 0x20000094 8000128: 00000000 .word 0x00000000 - 800012c: 0800668c .word 0x0800668c + 800012c: 080066a8 .word 0x080066a8 08000130 : 8000130: b508 push {r3, lr} @@ -75,8 +75,8 @@ Disassembly of section .text: 800013a: f3af 8000 nop.w 800013e: bd08 pop {r3, pc} 8000140: 00000000 .word 0x00000000 - 8000144: 20000094 .word 0x20000094 - 8000148: 0800668c .word 0x0800668c + 8000144: 20000098 .word 0x20000098 + 8000148: 080066a8 .word 0x080066a8 0800014c : 800014c: 4603 mov r3, r0 @@ -1251,15044 +1251,15509 @@ Disassembly of section .text: 8000e56: f04f 0001 mov.w r0, #1 8000e5a: 4770 bx lr -08000e5c <__aeabi_f2iz>: - 8000e5c: ea4f 0240 mov.w r2, r0, lsl #1 - 8000e60: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 - 8000e64: d30f bcc.n 8000e86 <__aeabi_f2iz+0x2a> - 8000e66: f04f 039e mov.w r3, #158 @ 0x9e - 8000e6a: ebb3 6212 subs.w r2, r3, r2, lsr #24 - 8000e6e: d90d bls.n 8000e8c <__aeabi_f2iz+0x30> - 8000e70: ea4f 2300 mov.w r3, r0, lsl #8 - 8000e74: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 - 8000e78: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 - 8000e7c: fa23 f002 lsr.w r0, r3, r2 - 8000e80: bf18 it ne - 8000e82: 4240 negne r0, r0 - 8000e84: 4770 bx lr - 8000e86: f04f 0000 mov.w r0, #0 - 8000e8a: 4770 bx lr - 8000e8c: f112 0f61 cmn.w r2, #97 @ 0x61 - 8000e90: d101 bne.n 8000e96 <__aeabi_f2iz+0x3a> - 8000e92: 0242 lsls r2, r0, #9 - 8000e94: d105 bne.n 8000ea2 <__aeabi_f2iz+0x46> - 8000e96: f010 4000 ands.w r0, r0, #2147483648 @ 0x80000000 - 8000e9a: bf08 it eq - 8000e9c: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 - 8000ea0: 4770 bx lr - 8000ea2: f04f 0000 mov.w r0, #0 - 8000ea6: 4770 bx lr - -08000ea8 : +08000e5c : * @param numberOfBytes - Number of bytes to be written in the register * * @return None. ******************************************************************************/ void AD5934_SetRegisterValue(uint8_t registerAddress, uint32_t registerValue, uint8_t numberOfBytes) { - 8000ea8: b580 push {r7, lr} - 8000eaa: b086 sub sp, #24 - 8000eac: af02 add r7, sp, #8 - 8000eae: 4603 mov r3, r0 - 8000eb0: 6039 str r1, [r7, #0] - 8000eb2: 71fb strb r3, [r7, #7] - 8000eb4: 4613 mov r3, r2 - 8000eb6: 71bb strb r3, [r7, #6] + 8000e5c: b580 push {r7, lr} + 8000e5e: b086 sub sp, #24 + 8000e60: af02 add r7, sp, #8 + 8000e62: 4603 mov r3, r0 + 8000e64: 6039 str r1, [r7, #0] + 8000e66: 71fb strb r3, [r7, #7] + 8000e68: 4613 mov r3, r2 + 8000e6a: 71bb strb r3, [r7, #6] uint8_t writeData[2] = {0, 0}; - 8000eb8: 2300 movs r3, #0 - 8000eba: 81bb strh r3, [r7, #12] + 8000e6c: 2300 movs r3, #0 + 8000e6e: 81bb strh r3, [r7, #12] HAL_StatusTypeDef status; union Bytes2Long AD5934_reg; AD5934_reg.number = registerValue; - 8000ebc: 683b ldr r3, [r7, #0] - 8000ebe: 60bb str r3, [r7, #8] + 8000e70: 683b ldr r3, [r7, #0] + 8000e72: 60bb str r3, [r7, #8] for (uint8_t i = 0; i < numberOfBytes; i++) - 8000ec0: 2300 movs r3, #0 - 8000ec2: 73fb strb r3, [r7, #15] - 8000ec4: e018 b.n 8000ef8 + 8000e74: 2300 movs r3, #0 + 8000e76: 73fb strb r3, [r7, #15] + 8000e78: e018 b.n 8000eac { writeData[0] = registerAddress - i; - 8000ec6: 79fa ldrb r2, [r7, #7] - 8000ec8: 7bfb ldrb r3, [r7, #15] - 8000eca: 1ad3 subs r3, r2, r3 - 8000ecc: b2db uxtb r3, r3 - 8000ece: 733b strb r3, [r7, #12] + 8000e7a: 79fa ldrb r2, [r7, #7] + 8000e7c: 7bfb ldrb r3, [r7, #15] + 8000e7e: 1ad3 subs r3, r2, r3 + 8000e80: b2db uxtb r3, r3 + 8000e82: 733b strb r3, [r7, #12] writeData[1] = AD5934_reg.bytes[i]; - 8000ed0: 7bfb ldrb r3, [r7, #15] - 8000ed2: 3310 adds r3, #16 - 8000ed4: 443b add r3, r7 - 8000ed6: f813 3c08 ldrb.w r3, [r3, #-8] - 8000eda: 737b strb r3, [r7, #13] + 8000e84: 7bfb ldrb r3, [r7, #15] + 8000e86: 3310 adds r3, #16 + 8000e88: 443b add r3, r7 + 8000e8a: f813 3c08 ldrb.w r3, [r3, #-8] + 8000e8e: 737b strb r3, [r7, #13] status = HAL_I2C_Master_Transmit(&hi2c2, AD5934_I2C_ADDRESS, writeData, 2, 5); - 8000edc: f107 020c add.w r2, r7, #12 - 8000ee0: 2305 movs r3, #5 - 8000ee2: 9300 str r3, [sp, #0] - 8000ee4: 2302 movs r3, #2 - 8000ee6: 211a movs r1, #26 - 8000ee8: 4807 ldr r0, [pc, #28] @ (8000f08 ) - 8000eea: f003 f90d bl 8004108 - 8000eee: 4603 mov r3, r0 - 8000ef0: 73bb strb r3, [r7, #14] + 8000e90: f107 020c add.w r2, r7, #12 + 8000e94: 2305 movs r3, #5 + 8000e96: 9300 str r3, [sp, #0] + 8000e98: 2302 movs r3, #2 + 8000e9a: 211a movs r1, #26 + 8000e9c: 4807 ldr r0, [pc, #28] @ (8000ebc ) + 8000e9e: f002 fd73 bl 8003988 + 8000ea2: 4603 mov r3, r0 + 8000ea4: 73bb strb r3, [r7, #14] for (uint8_t i = 0; i < numberOfBytes; i++) - 8000ef2: 7bfb ldrb r3, [r7, #15] - 8000ef4: 3301 adds r3, #1 - 8000ef6: 73fb strb r3, [r7, #15] - 8000ef8: 7bfa ldrb r2, [r7, #15] - 8000efa: 79bb ldrb r3, [r7, #6] - 8000efc: 429a cmp r2, r3 - 8000efe: d3e2 bcc.n 8000ec6 + 8000ea6: 7bfb ldrb r3, [r7, #15] + 8000ea8: 3301 adds r3, #1 + 8000eaa: 73fb strb r3, [r7, #15] + 8000eac: 7bfa ldrb r2, [r7, #15] + 8000eae: 79bb ldrb r3, [r7, #6] + 8000eb0: 429a cmp r2, r3 + 8000eb2: d3e2 bcc.n 8000e7a } return; - 8000f00: bf00 nop + 8000eb4: bf00 nop } - 8000f02: 3710 adds r7, #16 - 8000f04: 46bd mov sp, r7 - 8000f06: bd80 pop {r7, pc} - 8000f08: 20000678 .word 0x20000678 + 8000eb6: 3710 adds r7, #16 + 8000eb8: 46bd mov sp, r7 + 8000eba: bd80 pop {r7, pc} + 8000ebc: 200006e0 .word 0x200006e0 -08000f0c : +08000ec0 : * @param numberOfBytes - Number of bytes to be read from the register. * * @return Register value. ******************************************************************************/ uint32_t AD5934_GetRegisterValue(uint8_t registerAddress, uint8_t numberOfBytes) { - 8000f0c: b580 push {r7, lr} - 8000f0e: b088 sub sp, #32 - 8000f10: af02 add r7, sp, #8 - 8000f12: 4603 mov r3, r0 - 8000f14: 460a mov r2, r1 - 8000f16: 71fb strb r3, [r7, #7] - 8000f18: 4613 mov r3, r2 - 8000f1a: 71bb strb r3, [r7, #6] + 8000ec0: b580 push {r7, lr} + 8000ec2: b088 sub sp, #32 + 8000ec4: af02 add r7, sp, #8 + 8000ec6: 4603 mov r3, r0 + 8000ec8: 460a mov r2, r1 + 8000eca: 71fb strb r3, [r7, #7] + 8000ecc: 4613 mov r3, r2 + 8000ece: 71bb strb r3, [r7, #6] uint8_t readData[1] = {0}; - 8000f1c: 2300 movs r3, #0 - 8000f1e: 753b strb r3, [r7, #20] + 8000ed0: 2300 movs r3, #0 + 8000ed2: 753b strb r3, [r7, #20] uint8_t writeData[2]; //= {AD5934_ADDR_POINTER, registerAddress}; union Bytes2Long AD5934_reg; HAL_StatusTypeDef status; if(numberOfBytes > 4) - 8000f20: 79bb ldrb r3, [r7, #6] - 8000f22: 2b04 cmp r3, #4 - 8000f24: d902 bls.n 8000f2c + 8000ed4: 79bb ldrb r3, [r7, #6] + 8000ed6: 2b04 cmp r3, #4 + 8000ed8: d902 bls.n 8000ee0 return 0xFFFFFFFF; //Overflow - 8000f26: f04f 33ff mov.w r3, #4294967295 - 8000f2a: e031 b.n 8000f90 + 8000eda: f04f 33ff mov.w r3, #4294967295 + 8000ede: e031 b.n 8000f44 AD5934_reg.number = 0; - 8000f2c: 2300 movs r3, #0 - 8000f2e: 60fb str r3, [r7, #12] + 8000ee0: 2300 movs r3, #0 + 8000ee2: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < numberOfBytes; i++) - 8000f30: 2300 movs r3, #0 - 8000f32: 75fb strb r3, [r7, #23] - 8000f34: e027 b.n 8000f86 + 8000ee4: 2300 movs r3, #0 + 8000ee6: 75fb strb r3, [r7, #23] + 8000ee8: e027 b.n 8000f3a { writeData[0] = AD5934_ADDR_POINTER; - 8000f36: 23b0 movs r3, #176 @ 0xb0 - 8000f38: 743b strb r3, [r7, #16] + 8000eea: 23b0 movs r3, #176 @ 0xb0 + 8000eec: 743b strb r3, [r7, #16] writeData[1] = registerAddress - i; - 8000f3a: 79fa ldrb r2, [r7, #7] - 8000f3c: 7dfb ldrb r3, [r7, #23] - 8000f3e: 1ad3 subs r3, r2, r3 - 8000f40: b2db uxtb r3, r3 - 8000f42: 747b strb r3, [r7, #17] + 8000eee: 79fa ldrb r2, [r7, #7] + 8000ef0: 7dfb ldrb r3, [r7, #23] + 8000ef2: 1ad3 subs r3, r2, r3 + 8000ef4: b2db uxtb r3, r3 + 8000ef6: 747b strb r3, [r7, #17] status = HAL_I2C_Master_Transmit(&hi2c2, AD5934_I2C_ADDRESS, writeData, 2, 5); - 8000f44: f107 0210 add.w r2, r7, #16 - 8000f48: 2305 movs r3, #5 - 8000f4a: 9300 str r3, [sp, #0] - 8000f4c: 2302 movs r3, #2 - 8000f4e: 211a movs r1, #26 - 8000f50: 4811 ldr r0, [pc, #68] @ (8000f98 ) - 8000f52: f003 f8d9 bl 8004108 - 8000f56: 4603 mov r3, r0 - 8000f58: 75bb strb r3, [r7, #22] + 8000ef8: f107 0210 add.w r2, r7, #16 + 8000efc: 2305 movs r3, #5 + 8000efe: 9300 str r3, [sp, #0] + 8000f00: 2302 movs r3, #2 + 8000f02: 211a movs r1, #26 + 8000f04: 4811 ldr r0, [pc, #68] @ (8000f4c ) + 8000f06: f002 fd3f bl 8003988 + 8000f0a: 4603 mov r3, r0 + 8000f0c: 75bb strb r3, [r7, #22] //HAL_Delay(1); readData[0] = 0; - 8000f5a: 2300 movs r3, #0 - 8000f5c: 753b strb r3, [r7, #20] + 8000f0e: 2300 movs r3, #0 + 8000f10: 753b strb r3, [r7, #20] status = HAL_I2C_Master_Receive(&hi2c2, AD5934_I2C_ADDRESS, readData, 1, 5); - 8000f5e: f107 0214 add.w r2, r7, #20 - 8000f62: 2305 movs r3, #5 - 8000f64: 9300 str r3, [sp, #0] - 8000f66: 2301 movs r3, #1 - 8000f68: 211a movs r1, #26 - 8000f6a: 480b ldr r0, [pc, #44] @ (8000f98 ) - 8000f6c: f003 f9ca bl 8004304 - 8000f70: 4603 mov r3, r0 - 8000f72: 75bb strb r3, [r7, #22] + 8000f12: f107 0214 add.w r2, r7, #20 + 8000f16: 2305 movs r3, #5 + 8000f18: 9300 str r3, [sp, #0] + 8000f1a: 2301 movs r3, #1 + 8000f1c: 211a movs r1, #26 + 8000f1e: 480b ldr r0, [pc, #44] @ (8000f4c ) + 8000f20: f002 fe30 bl 8003b84 + 8000f24: 4603 mov r3, r0 + 8000f26: 75bb strb r3, [r7, #22] AD5934_reg.bytes[i]=readData[0]; - 8000f74: 7dfb ldrb r3, [r7, #23] - 8000f76: 7d3a ldrb r2, [r7, #20] - 8000f78: 3318 adds r3, #24 - 8000f7a: 443b add r3, r7 - 8000f7c: f803 2c0c strb.w r2, [r3, #-12] + 8000f28: 7dfb ldrb r3, [r7, #23] + 8000f2a: 7d3a ldrb r2, [r7, #20] + 8000f2c: 3318 adds r3, #24 + 8000f2e: 443b add r3, r7 + 8000f30: f803 2c0c strb.w r2, [r3, #-12] for (uint8_t i = 0; i < numberOfBytes; i++) - 8000f80: 7dfb ldrb r3, [r7, #23] - 8000f82: 3301 adds r3, #1 - 8000f84: 75fb strb r3, [r7, #23] - 8000f86: 7dfa ldrb r2, [r7, #23] - 8000f88: 79bb ldrb r3, [r7, #6] - 8000f8a: 429a cmp r2, r3 - 8000f8c: d3d3 bcc.n 8000f36 + 8000f34: 7dfb ldrb r3, [r7, #23] + 8000f36: 3301 adds r3, #1 + 8000f38: 75fb strb r3, [r7, #23] + 8000f3a: 7dfa ldrb r2, [r7, #23] + 8000f3c: 79bb ldrb r3, [r7, #6] + 8000f3e: 429a cmp r2, r3 + 8000f40: d3d3 bcc.n 8000eea /* AD5934_value.byte[0] = (uint16_t)(AD5934_reg.number & 0x0000FFFF) + 2048; AD5934_value.ints[1] = (uint16_t)((AD5934_reg.number & 0xFFFF0000)>>16) + 2048; */ return AD5934_reg.number; - 8000f8e: 68fb ldr r3, [r7, #12] + 8000f42: 68fb ldr r3, [r7, #12] } - 8000f90: 4618 mov r0, r3 - 8000f92: 3718 adds r7, #24 - 8000f94: 46bd mov sp, r7 - 8000f96: bd80 pop {r7, pc} - 8000f98: 20000678 .word 0x20000678 + 8000f44: 4618 mov r0, r3 + 8000f46: 3718 adds r7, #24 + 8000f48: 46bd mov sp, r7 + 8000f4a: bd80 pop {r7, pc} + 8000f4c: 200006e0 .word 0x200006e0 -08000f9c : +08000f50 : * @param None. * * @return None. ******************************************************************************/ void AD5934_Init(void) { - 8000f9c: b580 push {r7, lr} - 8000f9e: af00 add r7, sp, #0 + 8000f50: b580 push {r7, lr} + 8000f52: af00 add r7, sp, #0 /************ Config Sweep******************/ // Place AD5934 in reset AD5934_SetRegisterValue(AD5934_CONTROL_REG_LB, (AD5934_CONTROL_FUNCTION(AD5934_RESET)), 1); - 8000fa0: 2201 movs r2, #1 - 8000fa2: f44f 7180 mov.w r1, #256 @ 0x100 - 8000fa6: 2081 movs r0, #129 @ 0x81 - 8000fa8: f7ff ff7e bl 8000ea8 + 8000f54: 2201 movs r2, #1 + 8000f56: f44f 7180 mov.w r1, #256 @ 0x100 + 8000f5a: 2081 movs r0, #129 @ 0x81 + 8000f5c: f7ff ff7e bl 8000e5c // Configure starting frequency AD5934_SetRegisterValue(AD5934_START_FREQ_REG_LB, AD5934_FREQ_2K5HZ, 3); - 8000fac: 2203 movs r2, #3 - 8000fae: 490a ldr r1, [pc, #40] @ (8000fd8 ) - 8000fb0: 2084 movs r0, #132 @ 0x84 - 8000fb2: f7ff ff79 bl 8000ea8 + 8000f60: 2203 movs r2, #3 + 8000f62: 490a ldr r1, [pc, #40] @ (8000f8c ) + 8000f64: 2084 movs r0, #132 @ 0x84 + 8000f66: f7ff ff79 bl 8000e5c // Configure frequency increment step AD5934_SetRegisterValue(AD5934_FREQ_INCR_REG_LB, AD5934_FREQ_0HZ, 3); - 8000fb6: 2203 movs r2, #3 - 8000fb8: 2100 movs r1, #0 - 8000fba: 2087 movs r0, #135 @ 0x87 - 8000fbc: f7ff ff74 bl 8000ea8 + 8000f6a: 2203 movs r2, #3 + 8000f6c: 2100 movs r1, #0 + 8000f6e: 2087 movs r0, #135 @ 0x87 + 8000f70: f7ff ff74 bl 8000e5c // Configure number of steps AD5934_SetRegisterValue(AD5934_NR_INCR_REG_LB, AD5934_STEP_FREQ_0, 2); - 8000fc0: 2202 movs r2, #2 - 8000fc2: 2100 movs r1, #0 - 8000fc4: 2089 movs r0, #137 @ 0x89 - 8000fc6: f7ff ff6f bl 8000ea8 + 8000f74: 2202 movs r2, #2 + 8000f76: 2100 movs r1, #0 + 8000f78: 2089 movs r0, #137 @ 0x89 + 8000f7a: f7ff ff6f bl 8000e5c // Set 128 Settling Time - AD5934_SetRegisterValue(AD5934_NR_SETTLE_REG_LB, AD5934_SETTLING_TIME_0S01, 2); - 8000fca: 2202 movs r2, #2 - 8000fcc: 2180 movs r1, #128 @ 0x80 - 8000fce: 208b movs r0, #139 @ 0x8b - 8000fd0: f7ff ff6a bl 8000ea8 + AD5934_SetRegisterValue(AD5934_NR_SETTLE_REG_LB, AD5934_SETTLING_TIME_64, 2); + 8000f7e: 2202 movs r2, #2 + 8000f80: 2140 movs r1, #64 @ 0x40 + 8000f82: 208b movs r0, #139 @ 0x8b + 8000f84: f7ff ff6a bl 8000e5c } - 8000fd4: bf00 nop - 8000fd6: bd80 pop {r7, pc} - 8000fd8: 0051eb86 .word 0x0051eb86 + 8000f88: bf00 nop + 8000f8a: bd80 pop {r7, pc} + 8000f8c: 0051eb86 .word 0x0051eb86 -08000fdc : +08000f90 : * @param None. * * @return None. ******************************************************************************/ void AD5934_RestartSweep(void) { - 8000fdc: b580 push {r7, lr} - 8000fde: af00 add r7, sp, #0 + 8000f90: b580 push {r7, lr} + 8000f92: af00 add r7, sp, #0 // Place AD5934 in standby AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_STANDBY) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 8000fe0: 2201 movs r2, #1 - 8000fe2: 21b5 movs r1, #181 @ 0xb5 - 8000fe4: 2080 movs r0, #128 @ 0x80 - 8000fe6: f7ff ff5f bl 8000ea8 + 8000f94: 2201 movs r2, #1 + 8000f96: 21b5 movs r1, #181 @ 0xb5 + 8000f98: 2080 movs r0, #128 @ 0x80 + 8000f9a: f7ff ff5f bl 8000e5c // Initialize starting frequency, Start frequency sweep, standby AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, ((AD5934_CONTROL_FUNCTION(AD5934_INIT_START_FREQ)) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 8000fea: 2201 movs r2, #1 - 8000fec: 2115 movs r1, #21 - 8000fee: 2080 movs r0, #128 @ 0x80 - 8000ff0: f7ff ff5a bl 8000ea8 + 8000f9e: 2201 movs r2, #1 + 8000fa0: 2115 movs r1, #21 + 8000fa2: 2080 movs r0, #128 @ 0x80 + 8000fa4: f7ff ff5a bl 8000e5c // Disable Internal Reset State AD5934_SetRegisterValue(AD5934_CONTROL_REG_LB, AD5934_CONTROL_FUNCTION(AD5934_RESERVED), 1); - 8000ff4: 2201 movs r2, #1 - 8000ff6: 2180 movs r1, #128 @ 0x80 - 8000ff8: 2081 movs r0, #129 @ 0x81 - 8000ffa: f7ff ff55 bl 8000ea8 + 8000fa8: 2201 movs r2, #1 + 8000faa: 2180 movs r1, #128 @ 0x80 + 8000fac: 2081 movs r0, #129 @ 0x81 + 8000fae: f7ff ff55 bl 8000e5c // Configure Range Output, PGA gain andPlace AD5934 in sweep AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_START_FREQ_SWEEP) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 8000ffe: 2201 movs r2, #1 - 8001000: 2125 movs r1, #37 @ 0x25 - 8001002: 2080 movs r0, #128 @ 0x80 - 8001004: f7ff ff50 bl 8000ea8 + 8000fb2: 2201 movs r2, #1 + 8000fb4: 2125 movs r1, #37 @ 0x25 + 8000fb6: 2080 movs r0, #128 @ 0x80 + 8000fb8: f7ff ff50 bl 8000e5c + //AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_POWER_DOWN) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - // Wait for data to be valid - AD5934_Wait_For_Data_Valid(); - 8001008: f000 faa8 bl 800155c + // Place AD5934 in standby (instead of power down) + //AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_STANDBY) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); +} + 8000fbc: bf00 nop + 8000fbe: bd80 pop {r7, pc} + +08000fc0 : +* @param None. +* +* @return none. +******************************************************************************/ +void AD5934_Repeat_Sweep(void) +{ + 8000fc0: b580 push {r7, lr} + 8000fc2: af00 add r7, sp, #0 + // Repeat AD5934 Sweep + AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_REPEAT_FREQ) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); + 8000fc4: 2201 movs r2, #1 + 8000fc6: 2145 movs r1, #69 @ 0x45 + 8000fc8: 2080 movs r0, #128 @ 0x80 + 8000fca: f7ff ff47 bl 8000e5c +} + 8000fce: bf00 nop + 8000fd0: bd80 pop {r7, pc} + +08000fd2 : +* @param None. +* +* @return None. +******************************************************************************/ +void AD5934_StopSweep(void) +{ + 8000fd2: b580 push {r7, lr} + 8000fd4: af00 add r7, sp, #0 // Power Down - AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_POWER_DOWN) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 800100c: 2201 movs r2, #1 - 800100e: 21a5 movs r1, #165 @ 0xa5 - 8001010: 2080 movs r0, #128 @ 0x80 - 8001012: f7ff ff49 bl 8000ea8 + //AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_POWER_DOWN) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); + + // Place AD5934 in standby (instead of power down to save startup time) + AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_STANDBY) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); + 8000fd6: 2201 movs r2, #1 + 8000fd8: 21b5 movs r1, #181 @ 0xb5 + 8000fda: 2080 movs r0, #128 @ 0x80 + 8000fdc: f7ff ff3e bl 8000e5c } - 8001016: bf00 nop - 8001018: bd80 pop {r7, pc} + 8000fe0: bf00 nop + 8000fe2: bd80 pop {r7, pc} -0800101a : -* @param: channel = AD5934_CH_REF_100R, AD5934_CH_REF_1K, AD5934_CH_REF_10K, AD5934_CH_PT100, AD5934_CH_PT1000 or AD5934_CH_EC +08000fe4 : +* @param: none * -* @return Real(int16) and Imaginary(int16) numbers into a int32. +* @return Magnitude (float). ******************************************************************************/ -uint32_t AD5934_Sweep(void) +float AD5934_GetMagnitude(void) { - 800101a: b580 push {r7, lr} - 800101c: b082 sub sp, #8 - 800101e: af00 add r7, sp, #0 - int16_t real_value, imag_value; - uint32_t value=0; - 8001020: 2300 movs r3, #0 - 8001022: 607b str r3, [r7, #4] + 8000fe4: b5b0 push {r4, r5, r7, lr} + 8000fe6: b082 sub sp, #8 + 8000fe8: af00 add r7, sp, #0 - // Restart Sweeping - AD5934_RestartSweep(); - 8001024: f7ff ffda bl 8000fdc + // Get Real Data register + int16_t real_value = ((AD5934_GetRegisterValue(AD5934_REAL_REG_LB,2))); + 8000fea: 2102 movs r1, #2 + 8000fec: 2095 movs r0, #149 @ 0x95 + 8000fee: f7ff ff67 bl 8000ec0 + 8000ff2: 4603 mov r3, r0 + 8000ff4: 80fb strh r3, [r7, #6] - real_value = ((AD5934_GetRegisterValue(AD5934_REAL_REG_LB,2))); - 8001028: 2102 movs r1, #2 - 800102a: 2095 movs r0, #149 @ 0x95 - 800102c: f7ff ff6e bl 8000f0c - 8001030: 4603 mov r3, r0 - 8001032: 807b strh r3, [r7, #2] - imag_value = ((AD5934_GetRegisterValue(AD5934_IMG_REG_LB,2))); - 8001034: 2102 movs r1, #2 - 8001036: 2097 movs r0, #151 @ 0x97 - 8001038: f7ff ff68 bl 8000f0c + // Get Imaginary Data register + int16_t imag_value = ((AD5934_GetRegisterValue(AD5934_IMG_REG_LB,2))); + 8000ff6: 2102 movs r1, #2 + 8000ff8: 2097 movs r0, #151 @ 0x97 + 8000ffa: f7ff ff61 bl 8000ec0 + 8000ffe: 4603 mov r3, r0 + 8001000: 80bb strh r3, [r7, #4] + + // Calculate Magnitude using float function sqrtf + float magnitude = sqrtf(((float)real_value * (float)real_value) + ((float)imag_value * (float)imag_value)); + 8001002: f9b7 3006 ldrsh.w r3, [r7, #6] + 8001006: 4618 mov r0, r3 + 8001008: f7ff fcf8 bl 80009fc <__aeabi_i2f> + 800100c: 4604 mov r4, r0 + 800100e: f9b7 3006 ldrsh.w r3, [r7, #6] + 8001012: 4618 mov r0, r3 + 8001014: f7ff fcf2 bl 80009fc <__aeabi_i2f> + 8001018: 4603 mov r3, r0 + 800101a: 4619 mov r1, r3 + 800101c: 4620 mov r0, r4 + 800101e: f7ff fd41 bl 8000aa4 <__aeabi_fmul> + 8001022: 4603 mov r3, r0 + 8001024: 461d mov r5, r3 + 8001026: f9b7 3004 ldrsh.w r3, [r7, #4] + 800102a: 4618 mov r0, r3 + 800102c: f7ff fce6 bl 80009fc <__aeabi_i2f> + 8001030: 4604 mov r4, r0 + 8001032: f9b7 3004 ldrsh.w r3, [r7, #4] + 8001036: 4618 mov r0, r3 + 8001038: f7ff fce0 bl 80009fc <__aeabi_i2f> 800103c: 4603 mov r3, r0 - 800103e: 803b strh r3, [r7, #0] + 800103e: 4619 mov r1, r3 + 8001040: 4620 mov r0, r4 + 8001042: f7ff fd2f bl 8000aa4 <__aeabi_fmul> + 8001046: 4603 mov r3, r0 + 8001048: 4619 mov r1, r3 + 800104a: 4628 mov r0, r5 + 800104c: f7ff fc22 bl 8000894 <__addsf3> + 8001050: 4603 mov r3, r0 + 8001052: 4618 mov r0, r3 + 8001054: f005 fa98 bl 8006588 + 8001058: 6038 str r0, [r7, #0] - // Get Real (16-bit) and Imaginary (16-bit) values into an unsigned 32-bit - value = ((((uint16_t)(imag_value))<<16) | ((uint16_t)(real_value))); - 8001040: 883b ldrh r3, [r7, #0] - 8001042: 041b lsls r3, r3, #16 - 8001044: 887a ldrh r2, [r7, #2] - 8001046: 4313 orrs r3, r2 - 8001048: 607b str r3, [r7, #4] - - return value; - 800104a: 687b ldr r3, [r7, #4] + // Return magnitude value + return (magnitude); + 800105a: 683b ldr r3, [r7, #0] } - 800104c: 4618 mov r0, r3 - 800104e: 3708 adds r7, #8 - 8001050: 46bd mov sp, r7 - 8001052: bd80 pop {r7, pc} + 800105c: 4618 mov r0, r3 + 800105e: 3708 adds r7, #8 + 8001060: 46bd mov sp, r7 + 8001062: bdb0 pop {r4, r5, r7, pc} -08001054 : -* @param channel - AD5934_CH_PT100 or AD5934_CH_PT1000. -* -* @return impedance. -******************************************************************************/ -float AD5934_Get_Ref_Resistance(void) +08001064 : + return calibration_factor; +} + + +void AD5934_Process_System(void) { - 8001054: b590 push {r4, r7, lr} - 8001056: b089 sub sp, #36 @ 0x24 - 8001058: af00 add r7, sp, #0 - uint8_t i; - uint32_t sample; - int32_t ref_sum[2]; - float real_ref,imag_ref, real_dut, mag_ref; + 8001064: b580 push {r7, lr} + 8001066: b082 sub sp, #8 + 8001068: af00 add r7, sp, #0 + static uint32_t state_timer = 0; + uint8_t status = 0; + 800106a: 2300 movs r3, #0 + 800106c: 71fb strb r3, [r7, #7] - if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 800105a: 2180 movs r1, #128 @ 0x80 - 800105c: 4841 ldr r0, [pc, #260] @ (8001164 ) - 800105e: f002 fec7 bl 8003df0 - 8001062: 4603 mov r3, r0 - 8001064: 2b01 cmp r3, #1 - 8001066: d103 bne.n 8001070 - ADG715_Update(AD5934_CH_REF100R_LOW_GAIN); // Set the Reference Resistor on board in the Analog Mux - 8001068: 2000 movs r0, #0 - 800106a: f000 fbd5 bl 8001818 - 800106e: e002 b.n 8001076 - else - ADG715_Update(AD5934_CH_REF1K_MID_GAIN); // Set the Reference Resistor on board in the Analog Mux - 8001070: 2004 movs r0, #4 - 8001072: f000 fbd1 bl 8001818 - - - sample = AD5934_Sweep(); // Get Reference Resistor Values from ADC - 8001076: f7ff ffd0 bl 800101a - 800107a: 61b8 str r0, [r7, #24] - - // Move values in the vectors - for (i = (AD5934_TEMP_AVERAGES-1); i > 0; i--) - 800107c: 230f movs r3, #15 - 800107e: 77fb strb r3, [r7, #31] - 8001080: e016 b.n 80010b0 - { - temperature_ref_samples[0][i] = temperature_ref_samples[0][i-1]; //real - 8001082: 7ffb ldrb r3, [r7, #31] - 8001084: 1e5a subs r2, r3, #1 - 8001086: 7ffb ldrb r3, [r7, #31] - 8001088: 4937 ldr r1, [pc, #220] @ (8001168 ) - 800108a: f931 1012 ldrsh.w r1, [r1, r2, lsl #1] - 800108e: 4a36 ldr r2, [pc, #216] @ (8001168 ) - 8001090: f822 1013 strh.w r1, [r2, r3, lsl #1] - temperature_ref_samples[1][i] = temperature_ref_samples[1][i-1]; //imag - 8001094: 7ffb ldrb r3, [r7, #31] - 8001096: 1e5a subs r2, r3, #1 - 8001098: 7ffb ldrb r3, [r7, #31] - 800109a: 4933 ldr r1, [pc, #204] @ (8001168 ) - 800109c: 3210 adds r2, #16 - 800109e: f931 1012 ldrsh.w r1, [r1, r2, lsl #1] - 80010a2: 4a31 ldr r2, [pc, #196] @ (8001168 ) - 80010a4: 3310 adds r3, #16 - 80010a6: f822 1013 strh.w r1, [r2, r3, lsl #1] - for (i = (AD5934_TEMP_AVERAGES-1); i > 0; i--) - 80010aa: 7ffb ldrb r3, [r7, #31] - 80010ac: 3b01 subs r3, #1 - 80010ae: 77fb strb r3, [r7, #31] - 80010b0: 7ffb ldrb r3, [r7, #31] - 80010b2: 2b00 cmp r3, #0 - 80010b4: d1e5 bne.n 8001082 - } - - // Read real and imaginary data - temperature_ref_samples[0][0] = (int16_t)(sample & 0x0000FFFF); //real - 80010b6: 69bb ldr r3, [r7, #24] - 80010b8: b21a sxth r2, r3 - 80010ba: 4b2b ldr r3, [pc, #172] @ (8001168 ) - 80010bc: 801a strh r2, [r3, #0] - //temperature_ref_samples[1][0] = 0xFFFF-(((sample & 0xFFFF0000)>>16)); //imag - temperature_ref_samples[1][0] = (int16_t)((sample & 0xFFFF0000)>>16); //imag - 80010be: 69bb ldr r3, [r7, #24] - 80010c0: 0c1b lsrs r3, r3, #16 - 80010c2: b21a sxth r2, r3 - 80010c4: 4b28 ldr r3, [pc, #160] @ (8001168 ) - 80010c6: 841a strh r2, [r3, #32] - - // Sum values in the vectors - for (i = 0, ref_sum[0]=0, ref_sum[1]=0; i < AD5934_TEMP_AVERAGES; i++) - 80010c8: 2300 movs r3, #0 - 80010ca: 77fb strb r3, [r7, #31] - 80010cc: 2300 movs r3, #0 - 80010ce: 607b str r3, [r7, #4] - 80010d0: 2300 movs r3, #0 - 80010d2: 60bb str r3, [r7, #8] - 80010d4: e011 b.n 80010fa - { - ref_sum[0] += (int32_t)temperature_ref_samples[0][i]; //real - 80010d6: 687b ldr r3, [r7, #4] - 80010d8: 7ffa ldrb r2, [r7, #31] - 80010da: 4923 ldr r1, [pc, #140] @ (8001168 ) - 80010dc: f931 2012 ldrsh.w r2, [r1, r2, lsl #1] - 80010e0: 4413 add r3, r2 - 80010e2: 607b str r3, [r7, #4] - ref_sum[1] += (int32_t)temperature_ref_samples[1][i]; //imag - 80010e4: 68bb ldr r3, [r7, #8] - 80010e6: 7ffa ldrb r2, [r7, #31] - 80010e8: 491f ldr r1, [pc, #124] @ (8001168 ) - 80010ea: 3210 adds r2, #16 - 80010ec: f931 2012 ldrsh.w r2, [r1, r2, lsl #1] - 80010f0: 4413 add r3, r2 - 80010f2: 60bb str r3, [r7, #8] - for (i = 0, ref_sum[0]=0, ref_sum[1]=0; i < AD5934_TEMP_AVERAGES; i++) - 80010f4: 7ffb ldrb r3, [r7, #31] - 80010f6: 3301 adds r3, #1 - 80010f8: 77fb strb r3, [r7, #31] - 80010fa: 7ffb ldrb r3, [r7, #31] - 80010fc: 2b0f cmp r3, #15 - 80010fe: d9ea bls.n 80010d6 - } - - real_ref = ((float)ref_sum[0])/((float)AD5934_TEMP_AVERAGES); - 8001100: 687b ldr r3, [r7, #4] - 8001102: 4618 mov r0, r3 - 8001104: f7ff fc7a bl 80009fc <__aeabi_i2f> - 8001108: 4603 mov r3, r0 - 800110a: f04f 4183 mov.w r1, #1098907648 @ 0x41800000 - 800110e: 4618 mov r0, r3 - 8001110: f7ff fd7c bl 8000c0c <__aeabi_fdiv> - 8001114: 4603 mov r3, r0 - 8001116: 617b str r3, [r7, #20] - imag_ref = ((float)ref_sum[1])/((float)AD5934_TEMP_AVERAGES); - 8001118: 68bb ldr r3, [r7, #8] - 800111a: 4618 mov r0, r3 - 800111c: f7ff fc6e bl 80009fc <__aeabi_i2f> - 8001120: 4603 mov r3, r0 - 8001122: f04f 4183 mov.w r1, #1098907648 @ 0x41800000 - 8001126: 4618 mov r0, r3 - 8001128: f7ff fd70 bl 8000c0c <__aeabi_fdiv> - 800112c: 4603 mov r3, r0 - 800112e: 613b str r3, [r7, #16] - - // Calculate gain factor impedance - mag_ref = sqrtf((real_ref * real_ref) + (imag_ref * imag_ref)); - 8001130: 6979 ldr r1, [r7, #20] - 8001132: 6978 ldr r0, [r7, #20] - 8001134: f7ff fcb6 bl 8000aa4 <__aeabi_fmul> - 8001138: 4603 mov r3, r0 - 800113a: 461c mov r4, r3 - 800113c: 6939 ldr r1, [r7, #16] - 800113e: 6938 ldr r0, [r7, #16] - 8001140: f7ff fcb0 bl 8000aa4 <__aeabi_fmul> - 8001144: 4603 mov r3, r0 - 8001146: 4619 mov r1, r3 - 8001148: 4620 mov r0, r4 - 800114a: f7ff fba3 bl 8000894 <__addsf3> - 800114e: 4603 mov r3, r0 - 8001150: 4618 mov r0, r3 - 8001152: f005 f9e7 bl 8006524 - 8001156: 60f8 str r0, [r7, #12] - - return mag_ref; - 8001158: 68fb ldr r3, [r7, #12] -} - 800115a: 4618 mov r0, r3 - 800115c: 3724 adds r7, #36 @ 0x24 - 800115e: 46bd mov sp, r7 - 8001160: bd90 pop {r4, r7, pc} - 8001162: bf00 nop - 8001164: 40010800 .word 0x40010800 - 8001168: 200000ec .word 0x200000ec - -0800116c : -* @param channel - Magnitude of the Reference Resistor. -* -* @return impedance. -******************************************************************************/ -float AD5934_GetTemperature(float mag_ref) -{ - 800116c: b590 push {r4, r7, lr} - 800116e: b08f sub sp, #60 @ 0x3c - 8001170: af00 add r7, sp, #0 - 8001172: 6078 str r0, [r7, #4] - uint8_t i, ch_ref; - uint32_t sample; - int32_t dut_sum[2]; - float real_dut, imag_dut, ratio, discriminant, mag_dut, ratio_mag, impedance_dut, temperature_sum, gain_factor, temp_result; - - if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 8001174: 2180 movs r1, #128 @ 0x80 - 8001176: 486e ldr r0, [pc, #440] @ (8001330 ) - 8001178: f002 fe3a bl 8003df0 - 800117c: 4603 mov r3, r0 - 800117e: 2b01 cmp r3, #1 - 8001180: d105 bne.n 800118e - { - ch_ref = AD5934_CH_RTD_LOW_GAIN; //PT100 - 8001182: 2309 movs r3, #9 - 8001184: f887 3036 strb.w r3, [r7, #54] @ 0x36 - gain_factor = AD5934_GAIN_FACTOR_100R; - 8001188: 4b6a ldr r3, [pc, #424] @ (8001334 ) - 800118a: 62fb str r3, [r7, #44] @ 0x2c - 800118c: e004 b.n 8001198 - } - else - { - ch_ref = AD5934_CH_RTD_MID_GAIN; //PT1000 - 800118e: 230a movs r3, #10 - 8001190: f887 3036 strb.w r3, [r7, #54] @ 0x36 - gain_factor = AD5934_GAIN_FACTOR_1K; - 8001194: 4b68 ldr r3, [pc, #416] @ (8001338 ) - 8001196: 62fb str r3, [r7, #44] @ 0x2c - } - - ADG715_Update(ch_ref); - 8001198: f897 3036 ldrb.w r3, [r7, #54] @ 0x36 - 800119c: 4618 mov r0, r3 - 800119e: f000 fb3b bl 8001818 - - sample = AD5934_Sweep(); // Get PT100/PT1000 Values from ADC - 80011a2: f7ff ff3a bl 800101a - 80011a6: 62b8 str r0, [r7, #40] @ 0x28 - - for (i = (AD5934_TEMP_AVERAGES-1); i > 0; i--) - 80011a8: 230f movs r3, #15 - 80011aa: f887 3037 strb.w r3, [r7, #55] @ 0x37 - 80011ae: e01c b.n 80011ea - { - temperature_dut_samples[0][i] = temperature_dut_samples[0][i-1]; //real - 80011b0: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 - 80011b4: 1e5a subs r2, r3, #1 - 80011b6: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 - 80011ba: 4960 ldr r1, [pc, #384] @ (800133c ) - 80011bc: f931 1012 ldrsh.w r1, [r1, r2, lsl #1] - 80011c0: 4a5e ldr r2, [pc, #376] @ (800133c ) - 80011c2: f822 1013 strh.w r1, [r2, r3, lsl #1] - temperature_dut_samples[1][i] = temperature_dut_samples[1][i-1]; //imag - 80011c6: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 - 80011ca: 1e5a subs r2, r3, #1 - 80011cc: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 - 80011d0: 495a ldr r1, [pc, #360] @ (800133c ) - 80011d2: 3210 adds r2, #16 - 80011d4: f931 1012 ldrsh.w r1, [r1, r2, lsl #1] - 80011d8: 4a58 ldr r2, [pc, #352] @ (800133c ) - 80011da: 3310 adds r3, #16 - 80011dc: f822 1013 strh.w r1, [r2, r3, lsl #1] - for (i = (AD5934_TEMP_AVERAGES-1); i > 0; i--) - 80011e0: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 - 80011e4: 3b01 subs r3, #1 - 80011e6: f887 3037 strb.w r3, [r7, #55] @ 0x37 - 80011ea: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 - 80011ee: 2b00 cmp r3, #0 - 80011f0: d1de bne.n 80011b0 - } - - // Read real and imaginary data - temperature_dut_samples[0][0] = (int16_t)(sample & 0x0000FFFF); //real - 80011f2: 6abb ldr r3, [r7, #40] @ 0x28 - 80011f4: b21a sxth r2, r3 - 80011f6: 4b51 ldr r3, [pc, #324] @ (800133c ) - 80011f8: 801a strh r2, [r3, #0] - //temperature_dut_samples[0][1] = 0xFFFF-(((sample & 0xFFFF0000)>>16)); //imag - temperature_dut_samples[1][0] = (int16_t)((sample & 0xFFFF0000)>>16); //imag - 80011fa: 6abb ldr r3, [r7, #40] @ 0x28 - 80011fc: 0c1b lsrs r3, r3, #16 - 80011fe: b21a sxth r2, r3 - 8001200: 4b4e ldr r3, [pc, #312] @ (800133c ) - 8001202: 841a strh r2, [r3, #32] - - for (i = 0, dut_sum[0]=0, dut_sum[1]=0; i < AD5934_TEMP_AVERAGES; i++) - 8001204: 2300 movs r3, #0 - 8001206: f887 3037 strb.w r3, [r7, #55] @ 0x37 - 800120a: 2300 movs r3, #0 - 800120c: 60bb str r3, [r7, #8] - 800120e: 2300 movs r3, #0 - 8001210: 60fb str r3, [r7, #12] - 8001212: e015 b.n 8001240 - { - dut_sum[0] += (int32_t)temperature_dut_samples[0][i]; //real - 8001214: 68bb ldr r3, [r7, #8] - 8001216: f897 2037 ldrb.w r2, [r7, #55] @ 0x37 - 800121a: 4948 ldr r1, [pc, #288] @ (800133c ) - 800121c: f931 2012 ldrsh.w r2, [r1, r2, lsl #1] - 8001220: 4413 add r3, r2 - 8001222: 60bb str r3, [r7, #8] - dut_sum[1] += (int32_t)temperature_dut_samples[1][i]; //imag - 8001224: 68fb ldr r3, [r7, #12] - 8001226: f897 2037 ldrb.w r2, [r7, #55] @ 0x37 - 800122a: 4944 ldr r1, [pc, #272] @ (800133c ) - 800122c: 3210 adds r2, #16 - 800122e: f931 2012 ldrsh.w r2, [r1, r2, lsl #1] - 8001232: 4413 add r3, r2 - 8001234: 60fb str r3, [r7, #12] - for (i = 0, dut_sum[0]=0, dut_sum[1]=0; i < AD5934_TEMP_AVERAGES; i++) - 8001236: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 - 800123a: 3301 adds r3, #1 - 800123c: f887 3037 strb.w r3, [r7, #55] @ 0x37 - 8001240: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 - 8001244: 2b0f cmp r3, #15 - 8001246: d9e5 bls.n 8001214 - } - - real_dut = ((float)dut_sum[0])/((float)AD5934_TEMP_AVERAGES); - 8001248: 68bb ldr r3, [r7, #8] - 800124a: 4618 mov r0, r3 - 800124c: f7ff fbd6 bl 80009fc <__aeabi_i2f> - 8001250: 4603 mov r3, r0 - 8001252: f04f 4183 mov.w r1, #1098907648 @ 0x41800000 - 8001256: 4618 mov r0, r3 - 8001258: f7ff fcd8 bl 8000c0c <__aeabi_fdiv> - 800125c: 4603 mov r3, r0 - 800125e: 627b str r3, [r7, #36] @ 0x24 - imag_dut = ((float)dut_sum[1])/((float)AD5934_TEMP_AVERAGES); - 8001260: 68fb ldr r3, [r7, #12] - 8001262: 4618 mov r0, r3 - 8001264: f7ff fbca bl 80009fc <__aeabi_i2f> - 8001268: 4603 mov r3, r0 - 800126a: f04f 4183 mov.w r1, #1098907648 @ 0x41800000 - 800126e: 4618 mov r0, r3 - 8001270: f7ff fccc bl 8000c0c <__aeabi_fdiv> - 8001274: 4603 mov r3, r0 - 8001276: 623b str r3, [r7, #32] - - // Calculate magnitude - mag_dut = sqrtf((real_dut * real_dut) + (imag_dut * imag_dut)); - 8001278: 6a79 ldr r1, [r7, #36] @ 0x24 - 800127a: 6a78 ldr r0, [r7, #36] @ 0x24 - 800127c: f7ff fc12 bl 8000aa4 <__aeabi_fmul> - 8001280: 4603 mov r3, r0 - 8001282: 461c mov r4, r3 - 8001284: 6a39 ldr r1, [r7, #32] - 8001286: 6a38 ldr r0, [r7, #32] - 8001288: f7ff fc0c bl 8000aa4 <__aeabi_fmul> - 800128c: 4603 mov r3, r0 - 800128e: 4619 mov r1, r3 - 8001290: 4620 mov r0, r4 - 8001292: f7ff faff bl 8000894 <__addsf3> - 8001296: 4603 mov r3, r0 - 8001298: 4618 mov r0, r3 - 800129a: f005 f943 bl 8006524 - 800129e: 61f8 str r0, [r7, #28] - - //for (i = (AD5934_TEMP_AVERAGES-1); i > 0; i--) - //temperature_display[i] = temperature_display[i-1]; - - ratio_mag = mag_ref / mag_dut; - 80012a0: 69f9 ldr r1, [r7, #28] - 80012a2: 6878 ldr r0, [r7, #4] - 80012a4: f7ff fcb2 bl 8000c0c <__aeabi_fdiv> - 80012a8: 4603 mov r3, r0 - 80012aa: 61bb str r3, [r7, #24] - - if(ch_ref==AD5934_CH_REF100R_LOW_GAIN) // only for PT100 - 80012ac: f897 3036 ldrb.w r3, [r7, #54] @ 0x36 - 80012b0: 2b00 cmp r3, #0 - 80012b2: d109 bne.n 80012c8 - impedance_dut = AD5934_Linear_Correction(gain_factor * ratio_mag); - 80012b4: 69b9 ldr r1, [r7, #24] - 80012b6: 6af8 ldr r0, [r7, #44] @ 0x2c - 80012b8: f7ff fbf4 bl 8000aa4 <__aeabi_fmul> - 80012bc: 4603 mov r3, r0 - 80012be: 4618 mov r0, r3 - 80012c0: f000 f9a0 bl 8001604 - 80012c4: 6338 str r0, [r7, #48] @ 0x30 - 80012c6: e005 b.n 80012d4 - else - impedance_dut = gain_factor * ratio_mag; - 80012c8: 69b9 ldr r1, [r7, #24] - 80012ca: 6af8 ldr r0, [r7, #44] @ 0x2c - 80012cc: f7ff fbea bl 8000aa4 <__aeabi_fmul> - 80012d0: 4603 mov r3, r0 - 80012d2: 633b str r3, [r7, #48] @ 0x30 - - // Calculate impedance ratio with the Reference Resistor - ratio = impedance_dut / gain_factor; - 80012d4: 6af9 ldr r1, [r7, #44] @ 0x2c - 80012d6: 6b38 ldr r0, [r7, #48] @ 0x30 - 80012d8: f7ff fc98 bl 8000c0c <__aeabi_fdiv> - 80012dc: 4603 mov r3, r0 - 80012de: 617b str r3, [r7, #20] - - // Calculate impedance discriminant with the ratio - discriminant = (AD5934_RTD_A*AD5934_RTD_A)-(4.0f * AD5934_RTD_B * (1.0f - ratio)); - 80012e0: 6979 ldr r1, [r7, #20] - 80012e2: f04f 507e mov.w r0, #1065353216 @ 0x3f800000 - 80012e6: f7ff fad3 bl 8000890 <__aeabi_fsub> - 80012ea: 4603 mov r3, r0 - 80012ec: 4914 ldr r1, [pc, #80] @ (8001340 ) - 80012ee: 4618 mov r0, r3 - 80012f0: f7ff fbd8 bl 8000aa4 <__aeabi_fmul> - 80012f4: 4603 mov r3, r0 - 80012f6: 4913 ldr r1, [pc, #76] @ (8001344 ) - 80012f8: 4618 mov r0, r3 - 80012fa: f7ff facb bl 8000894 <__addsf3> - 80012fe: 4603 mov r3, r0 - 8001300: 613b str r3, [r7, #16] - - //temp_result = (-AD5934_RTD_A + sqrtf(discriminant)/(2.0f * AD5934_RTD_B)); - - return (AD5934_Round_Float_Precision(((-AD5934_RTD_A + sqrtf(discriminant))/(2.0f * AD5934_RTD_B)),2)); - 8001302: 6938 ldr r0, [r7, #16] - 8001304: f005 f90e bl 8006524 - 8001308: 4603 mov r3, r0 - 800130a: 490f ldr r1, [pc, #60] @ (8001348 ) - 800130c: 4618 mov r0, r3 - 800130e: f7ff fabf bl 8000890 <__aeabi_fsub> - 8001312: 4603 mov r3, r0 - 8001314: 490d ldr r1, [pc, #52] @ (800134c ) - 8001316: 4618 mov r0, r3 - 8001318: f7ff fc78 bl 8000c0c <__aeabi_fdiv> - 800131c: 4603 mov r3, r0 - 800131e: 2102 movs r1, #2 - 8001320: 4618 mov r0, r3 - 8001322: f000 f941 bl 80015a8 - 8001326: 4603 mov r3, r0 - // Is the temperature stable? - //if(temperature_display[0]>0.0f && (abs(temperature_display[0]-temperature_display[AD5934_TEMP_AVERAGES-1])/temperature_display[0])<0.1f) - //return(AD5934_Round_Float_Precision(temperature_sum/((float)AD5934_TEMP_AVERAGES),1)); // Sum / number of averages - //else - //return 0.0f; //instable values return always 0 -} - 8001328: 4618 mov r0, r3 - 800132a: 373c adds r7, #60 @ 0x3c - 800132c: 46bd mov sp, r7 - 800132e: bd90 pop {r4, r7, pc} - 8001330: 40010800 .word 0x40010800 - 8001334: 42c80000 .word 0x42c80000 - 8001338: 447a0000 .word 0x447a0000 - 800133c: 200000ac .word 0x200000ac - 8001340: 361b057f .word 0x361b057f - 8001344: 37802266 .word 0x37802266 - 8001348: 3b801132 .word 0x3b801132 - 800134c: b59b057f .word 0xb59b057f - -08001350 : - * - * @param temperature_dut The current temperature of the DUT (Device Under Test). - * @return float Calculated conductivity in uS/cm. - */ -float AD5934_GetImpedance(float temperature_dut) -{ - 8001350: b590 push {r4, r7, lr} - 8001352: b08b sub sp, #44 @ 0x2c - 8001354: af00 add r7, sp, #0 - 8001356: 6078 str r0, [r7, #4] - uint8_t i, ec_gain; - uint32_t sample_dut; - int32_t dut_sum[2] = {0, 0}; - 8001358: 2300 movs r3, #0 - 800135a: 60bb str r3, [r7, #8] - 800135c: 2300 movs r3, #0 - 800135e: 60fb str r3, [r7, #12] - float real_avg, imag_avg, mag_dut, slope, target_cond; - - /* 1. Hardware Setup: Gain Selection (PA6) */ - if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) - 8001360: 2140 movs r1, #64 @ 0x40 - 8001362: 4878 ldr r0, [pc, #480] @ (8001544 ) - 8001364: f002 fd44 bl 8003df0 - 8001368: 4603 mov r3, r0 - 800136a: 2b01 cmp r3, #1 - 800136c: d103 bne.n 8001376 - ec_gain = AD5934_CH_EC_HIGH_GAIN; - 800136e: 230e movs r3, #14 - 8001370: f887 3026 strb.w r3, [r7, #38] @ 0x26 - 8001374: e002 b.n 800137c - else - ec_gain = AD5934_CH_EC_MID_GAIN; - 8001376: 230d movs r3, #13 - 8001378: f887 3026 strb.w r3, [r7, #38] @ 0x26 - - if((ec_gain != flash_data.EC10mS_EC5mS_switch) && (main_state != STATE_PH4_DRY_EC_CALIBRATION || main_state != STATE_PH7_WET_EC_CALIBRATION)) - 800137c: 4b72 ldr r3, [pc, #456] @ (8001548 ) - 800137e: f893 3025 ldrb.w r3, [r3, #37] @ 0x25 - 8001382: f897 2026 ldrb.w r2, [r7, #38] @ 0x26 - 8001386: 429a cmp r2, r3 - 8001388: d009 beq.n 800139e - 800138a: 4b70 ldr r3, [pc, #448] @ (800154c ) - 800138c: 781b ldrb r3, [r3, #0] - 800138e: 2b02 cmp r3, #2 - 8001390: d103 bne.n 800139a - 8001392: 4b6e ldr r3, [pc, #440] @ (800154c ) - 8001394: 781b ldrb r3, [r3, #0] - 8001396: 2b03 cmp r3, #3 - 8001398: d001 beq.n 800139e - return -1.0f; // Fatal error because the gain used in calibration is different - 800139a: 4b6d ldr r3, [pc, #436] @ (8001550 ) - 800139c: e0ce b.n 800153c - - ADG715_Update(ec_gain); - 800139e: f897 3026 ldrb.w r3, [r7, #38] @ 0x26 - 80013a2: 4618 mov r0, r3 - 80013a4: f000 fa38 bl 8001818 - //HAL_Delay(5); - - /* 2. Data Acquisition */ - sample_dut = AD5934_Sweep(); - 80013a8: f7ff fe37 bl 800101a - 80013ac: 6238 str r0, [r7, #32] - - // Shift buffer for moving average - for (i = (AD5934_EC_AVERAGES - 1); i > 0; i--) - 80013ae: 230f movs r3, #15 - 80013b0: f887 3027 strb.w r3, [r7, #39] @ 0x27 - 80013b4: e01c b.n 80013f0 + switch (ad5934_state) + 800106e: 4b79 ldr r3, [pc, #484] @ (8001254 ) + 8001070: 781b ldrb r3, [r3, #0] + 8001072: b2db uxtb r3, r3 + 8001074: 2b06 cmp r3, #6 + 8001076: f200 80e9 bhi.w 800124c + 800107a: a201 add r2, pc, #4 @ (adr r2, 8001080 ) + 800107c: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8001080: 0800109d .word 0x0800109d + 8001084: 080010db .word 0x080010db + 8001088: 08001103 .word 0x08001103 + 800108c: 08001123 .word 0x08001123 + 8001090: 0800117b .word 0x0800117b + 8001094: 08001191 .word 0x08001191 + 8001098: 080010bd .word 0x080010bd { - ec_dut_samples[0][i] = ec_dut_samples[0][i-1]; - 80013b6: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 - 80013ba: 1e5a subs r2, r3, #1 - 80013bc: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 - 80013c0: 4964 ldr r1, [pc, #400] @ (8001554 ) - 80013c2: f931 1012 ldrsh.w r1, [r1, r2, lsl #1] - 80013c6: 4a63 ldr r2, [pc, #396] @ (8001554 ) - 80013c8: f822 1013 strh.w r1, [r2, r3, lsl #1] - ec_dut_samples[1][i] = ec_dut_samples[1][i-1]; - 80013cc: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 - 80013d0: 1e5a subs r2, r3, #1 - 80013d2: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 - 80013d6: 495f ldr r1, [pc, #380] @ (8001554 ) - 80013d8: 3210 adds r2, #16 - 80013da: f931 1012 ldrsh.w r1, [r1, r2, lsl #1] - 80013de: 4a5d ldr r2, [pc, #372] @ (8001554 ) - 80013e0: 3310 adds r3, #16 - 80013e2: f822 1013 strh.w r1, [r2, r3, lsl #1] - for (i = (AD5934_EC_AVERAGES - 1); i > 0; i--) - 80013e6: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 - 80013ea: 3b01 subs r3, #1 - 80013ec: f887 3027 strb.w r3, [r7, #39] @ 0x27 - 80013f0: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 - 80013f4: 2b00 cmp r3, #0 - 80013f6: d1de bne.n 80013b6 + case AD5934_IDLE: + ADG715_Update(current_mux_channel); // Starts changing the mux channel + 800109c: 4b6e ldr r3, [pc, #440] @ (8001258 ) + 800109e: 781b ldrb r3, [r3, #0] + 80010a0: 4618 mov r0, r3 + 80010a2: f000 fa85 bl 80015b0 + is_new_channel = 1; // Forces first channel + 80010a6: 4b6d ldr r3, [pc, #436] @ (800125c ) + 80010a8: 2201 movs r2, #1 + 80010aa: 701a strb r2, [r3, #0] + state_timer = g_ms_counter; + 80010ac: 4b6c ldr r3, [pc, #432] @ (8001260 ) + 80010ae: 681b ldr r3, [r3, #0] + 80010b0: 4a6c ldr r2, [pc, #432] @ (8001264 ) + 80010b2: 6013 str r3, [r2, #0] + ad5934_state = AD5934_WAIT_MUX; + 80010b4: 4b67 ldr r3, [pc, #412] @ (8001254 ) + 80010b6: 2206 movs r2, #6 + 80010b8: 701a strb r2, [r3, #0] + break; + 80010ba: e0c7 b.n 800124c + + case AD5934_WAIT_MUX: + if ((g_ms_counter - state_timer) >= AD5934_SYNC_MUX_SETTLING) // Wait until AD715 Mux switch stability + 80010bc: 4b68 ldr r3, [pc, #416] @ (8001260 ) + 80010be: 681a ldr r2, [r3, #0] + 80010c0: 4b68 ldr r3, [pc, #416] @ (8001264 ) + 80010c2: 681b ldr r3, [r3, #0] + 80010c4: 1ad3 subs r3, r2, r3 + 80010c6: 2b04 cmp r3, #4 + 80010c8: f240 80bb bls.w 8001242 + { + sweep_count = 0; + 80010cc: 4b66 ldr r3, [pc, #408] @ (8001268 ) + 80010ce: 2200 movs r2, #0 + 80010d0: 701a strb r2, [r3, #0] + ad5934_state = AD5934_START_CONVERSION; + 80010d2: 4b60 ldr r3, [pc, #384] @ (8001254 ) + 80010d4: 2201 movs r2, #1 + 80010d6: 701a strb r2, [r3, #0] + } + break; + 80010d8: e0b3 b.n 8001242 + + case AD5934_START_CONVERSION: + state_timer = g_ms_counter; // Starts to count the Burst period for the sweeps + 80010da: 4b61 ldr r3, [pc, #388] @ (8001260 ) + 80010dc: 681b ldr r3, [r3, #0] + 80010de: 4a61 ldr r2, [pc, #388] @ (8001264 ) + 80010e0: 6013 str r3, [r2, #0] + + /* DECISÃO DE COMANDO: Novo canal vs Leituras sucessivas */ + if (is_new_channel) // Decision: Channel Switched or Next Sample in the Burst ? + 80010e2: 4b5e ldr r3, [pc, #376] @ (800125c ) + 80010e4: 781b ldrb r3, [r3, #0] + 80010e6: 2b00 cmp r3, #0 + 80010e8: d005 beq.n 80010f6 + { + AD5934_RestartSweep(); // Clean some AD5934 internal registers to Re-Start Sweep + 80010ea: f7ff ff51 bl 8000f90 + is_new_channel = 0; // Resets the flag to read the next Sample Burst + 80010ee: 4b5b ldr r3, [pc, #364] @ (800125c ) + 80010f0: 2200 movs r2, #0 + 80010f2: 701a strb r2, [r3, #0] + 80010f4: e001 b.n 80010fa + } + else + { + AD5934_Repeat_Sweep(); // Get Sample and just repeat reading + 80010f6: f7ff ff63 bl 8000fc0 + } + + ad5934_state = AD5934_WAIT_CONVERSION; // Next State + 80010fa: 4b56 ldr r3, [pc, #344] @ (8001254 ) + 80010fc: 2202 movs r2, #2 + 80010fe: 701a strb r2, [r3, #0] + break; + 8001100: e0a4 b.n 800124c + + case AD5934_WAIT_CONVERSION: + status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); // Check if the current converion is ready in the AD5934 + 8001102: 2101 movs r1, #1 + 8001104: 208f movs r0, #143 @ 0x8f + 8001106: f7ff fedb bl 8000ec0 + 800110a: 4603 mov r3, r0 + 800110c: 71fb strb r3, [r7, #7] + if ((status & AD5934_STATUS_DATA_VALID) != 0) + 800110e: 79fb ldrb r3, [r7, #7] + 8001110: f003 0302 and.w r3, r3, #2 + 8001114: 2b00 cmp r3, #0 + 8001116: f000 8096 beq.w 8001246 + { + ad5934_state = AD5934_READ_DATA; + 800111a: 4b4e ldr r3, [pc, #312] @ (8001254 ) + 800111c: 2203 movs r2, #3 + 800111e: 701a strb r2, [r3, #0] + } + break; + 8001120: e091 b.n 8001246 + + case AD5934_READ_DATA: + { + float magnitude = AD5934_GetMagnitude(); + 8001122: f7ff ff5f bl 8000fe4 + 8001126: 6038 str r0, [r7, #0] + + switch (current_mux_channel) + 8001128: 4b4b ldr r3, [pc, #300] @ (8001258 ) + 800112a: 781b ldrb r3, [r3, #0] + 800112c: 2b02 cmp r3, #2 + 800112e: d00e beq.n 800114e + 8001130: 2b02 cmp r3, #2 + 8001132: dc10 bgt.n 8001156 + 8001134: 2b00 cmp r3, #0 + 8001136: d002 beq.n 800113e + 8001138: 2b01 cmp r3, #1 + 800113a: d004 beq.n 8001146 + 800113c: e00b b.n 8001156 + { + case AD5934_ID_RTD: + AD5934_RTD_NewSample(magnitude); + 800113e: 6838 ldr r0, [r7, #0] + 8001140: f000 f9ec bl 800151c + break; + 8001144: e007 b.n 8001156 + + case AD5934_ID_EC: + AD5934_EC_NewSample(magnitude); + 8001146: 6838 ldr r0, [r7, #0] + 8001148: f000 f9f6 bl 8001538 + break; + 800114c: e003 b.n 8001156 + + case AD5934_ID_REF: + AD5934_Reference_NewSample(magnitude); + 800114e: 6838 ldr r0, [r7, #0] + 8001150: f000 fa00 bl 8001554 + break; + 8001154: bf00 nop + } + + sweep_count++; + 8001156: 4b44 ldr r3, [pc, #272] @ (8001268 ) + 8001158: 781b ldrb r3, [r3, #0] + 800115a: 3301 adds r3, #1 + 800115c: b2da uxtb r2, r3 + 800115e: 4b42 ldr r3, [pc, #264] @ (8001268 ) + 8001160: 701a strb r2, [r3, #0] + + if (sweep_count >= AD5934_BURST_SIZE) // Check if number of samples for the burst is complete + 8001162: 4b41 ldr r3, [pc, #260] @ (8001268 ) + 8001164: 781b ldrb r3, [r3, #0] + 8001166: 2b06 cmp r3, #6 + 8001168: d903 bls.n 8001172 + { + ad5934_state = AD5934_SWITCH_MUX; // Next Re-Start Sweep + 800116a: 4b3a ldr r3, [pc, #232] @ (8001254 ) + 800116c: 2205 movs r2, #5 + 800116e: 701a strb r2, [r3, #0] + else + { + ad5934_state = AD5934_WAIT_NEXT_SWEEP; // Next Repeat Sweep + } + } + break; + 8001170: e06c b.n 800124c + ad5934_state = AD5934_WAIT_NEXT_SWEEP; // Next Repeat Sweep + 8001172: 4b38 ldr r3, [pc, #224] @ (8001254 ) + 8001174: 2204 movs r2, #4 + 8001176: 701a strb r2, [r3, #0] + break; + 8001178: e068 b.n 800124c + + case AD5934_WAIT_NEXT_SWEEP: + if ((g_ms_counter - state_timer) >= AD5934_TIME_PER_SWEEP) + 800117a: 4b39 ldr r3, [pc, #228] @ (8001260 ) + 800117c: 681a ldr r2, [r3, #0] + 800117e: 4b39 ldr r3, [pc, #228] @ (8001264 ) + 8001180: 681b ldr r3, [r3, #0] + 8001182: 1ad3 subs r3, r2, r3 + 8001184: 2b3b cmp r3, #59 @ 0x3b + 8001186: d960 bls.n 800124a + { + ad5934_state = AD5934_START_CONVERSION; + 8001188: 4b32 ldr r3, [pc, #200] @ (8001254 ) + 800118a: 2201 movs r2, #1 + 800118c: 701a strb r2, [r3, #0] + } + break; + 800118e: e05c b.n 800124a + + case AD5934_SWITCH_MUX: + AD5934_StopSweep(); // Put AD5934 in Standby + 8001190: f7ff ff1f bl 8000fd2 + current_mux_channel = (uint8_t)((current_mux_channel + 1) % 3); // Pointer to the next channel (Circular Buffer 0 to 2) + 8001194: 4b30 ldr r3, [pc, #192] @ (8001258 ) + 8001196: 781b ldrb r3, [r3, #0] + 8001198: 1c5a adds r2, r3, #1 + 800119a: 4b34 ldr r3, [pc, #208] @ (800126c ) + 800119c: fb83 3102 smull r3, r1, r3, r2 + 80011a0: 17d3 asrs r3, r2, #31 + 80011a2: 1ac9 subs r1, r1, r3 + 80011a4: 460b mov r3, r1 + 80011a6: 005b lsls r3, r3, #1 + 80011a8: 440b add r3, r1 + 80011aa: 1ad1 subs r1, r2, r3 + 80011ac: b2ca uxtb r2, r1 + 80011ae: 4b2a ldr r3, [pc, #168] @ (8001258 ) + 80011b0: 701a strb r2, [r3, #0] + switch (current_mux_channel) + 80011b2: 4b29 ldr r3, [pc, #164] @ (8001258 ) + 80011b4: 781b ldrb r3, [r3, #0] + 80011b6: 2b02 cmp r3, #2 + 80011b8: d024 beq.n 8001204 + 80011ba: 2b02 cmp r3, #2 + 80011bc: dc31 bgt.n 8001222 + 80011be: 2b00 cmp r3, #0 + 80011c0: d002 beq.n 80011c8 + 80011c2: 2b01 cmp r3, #1 + 80011c4: d00f beq.n 80011e6 + 80011c6: e02c b.n 8001222 + { + case AD5934_ID_RTD: + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND + 80011c8: 2180 movs r1, #128 @ 0x80 + 80011ca: 4829 ldr r0, [pc, #164] @ (8001270 ) + 80011cc: f002 fa50 bl 8003670 + 80011d0: 4603 mov r3, r0 + 80011d2: 2b01 cmp r3, #1 + 80011d4: d103 bne.n 80011de + current_hw_mux_connection = AD5934_CH_RTD_LOW_GAIN; //PT100 + 80011d6: 4b27 ldr r3, [pc, #156] @ (8001274 ) + 80011d8: 2209 movs r2, #9 + 80011da: 701a strb r2, [r3, #0] + else + current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 + break; + 80011dc: e021 b.n 8001222 + current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 + 80011de: 4b25 ldr r3, [pc, #148] @ (8001274 ) + 80011e0: 220a movs r2, #10 + 80011e2: 701a strb r2, [r3, #0] + break; + 80011e4: e01d b.n 8001222 + + case AD5934_ID_EC: + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) // Hardware Setup: Gain Selection (PA6) + 80011e6: 2140 movs r1, #64 @ 0x40 + 80011e8: 4821 ldr r0, [pc, #132] @ (8001270 ) + 80011ea: f002 fa41 bl 8003670 + 80011ee: 4603 mov r3, r0 + 80011f0: 2b01 cmp r3, #1 + 80011f2: d103 bne.n 80011fc + current_hw_mux_connection = AD5934_CH_EC_HIGH_GAIN; + 80011f4: 4b1f ldr r3, [pc, #124] @ (8001274 ) + 80011f6: 220e movs r2, #14 + 80011f8: 701a strb r2, [r3, #0] + else + current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; + break; + 80011fa: e012 b.n 8001222 + current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; + 80011fc: 4b1d ldr r3, [pc, #116] @ (8001274 ) + 80011fe: 220d movs r2, #13 + 8001200: 701a strb r2, [r3, #0] + break; + 8001202: e00e b.n 8001222 + + case AD5934_ID_REF: + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND + 8001204: 2180 movs r1, #128 @ 0x80 + 8001206: 481a ldr r0, [pc, #104] @ (8001270 ) + 8001208: f002 fa32 bl 8003670 + 800120c: 4603 mov r3, r0 + 800120e: 2b01 cmp r3, #1 + 8001210: d103 bne.n 800121a + current_hw_mux_connection = AD5934_CH_REF100R_LOW_GAIN; // 100 Ohms Reference Resistor + 8001212: 4b18 ldr r3, [pc, #96] @ (8001274 ) + 8001214: 2200 movs r2, #0 + 8001216: 701a strb r2, [r3, #0] + else + current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor + break; + 8001218: e002 b.n 8001220 + current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor + 800121a: 4b16 ldr r3, [pc, #88] @ (8001274 ) + 800121c: 2204 movs r2, #4 + 800121e: 701a strb r2, [r3, #0] + break; + 8001220: bf00 nop + } + ADG715_Update(current_hw_mux_connection); // Change the analog mux + 8001222: 4b14 ldr r3, [pc, #80] @ (8001274 ) + 8001224: 781b ldrb r3, [r3, #0] + 8001226: 4618 mov r0, r3 + 8001228: f000 f9c2 bl 80015b0 + is_new_channel = 1; // Channel Switched + 800122c: 4b0b ldr r3, [pc, #44] @ (800125c ) + 800122e: 2201 movs r2, #1 + 8001230: 701a strb r2, [r3, #0] + state_timer = g_ms_counter; // Reload timer to wait for stability + 8001232: 4b0b ldr r3, [pc, #44] @ (8001260 ) + 8001234: 681b ldr r3, [r3, #0] + 8001236: 4a0b ldr r2, [pc, #44] @ (8001264 ) + 8001238: 6013 str r3, [r2, #0] + ad5934_state = AD5934_WAIT_MUX; // Next State + 800123a: 4b06 ldr r3, [pc, #24] @ (8001254 ) + 800123c: 2206 movs r2, #6 + 800123e: 701a strb r2, [r3, #0] + break; + 8001240: e004 b.n 800124c + break; + 8001242: bf00 nop + 8001244: e002 b.n 800124c + break; + 8001246: bf00 nop + 8001248: e000 b.n 800124c + break; + 800124a: bf00 nop } - - - // Deconstruct 32-bit sample into Real and Imaginary components - ec_dut_samples[0][0] = (float)(int16_t)(sample_dut & 0xFFFF); - 80013f8: 6a3b ldr r3, [r7, #32] - 80013fa: b21b sxth r3, r3 - 80013fc: 4618 mov r0, r3 - 80013fe: f7ff fafd bl 80009fc <__aeabi_i2f> - 8001402: 4603 mov r3, r0 - 8001404: 4618 mov r0, r3 - 8001406: f7ff fd29 bl 8000e5c <__aeabi_f2iz> - 800140a: 4603 mov r3, r0 - 800140c: b21a sxth r2, r3 - 800140e: 4b51 ldr r3, [pc, #324] @ (8001554 ) - 8001410: 801a strh r2, [r3, #0] - ec_dut_samples[1][0] = (float)(int16_t)((sample_dut >> 16) & 0xFFFF); - 8001412: 6a3b ldr r3, [r7, #32] - 8001414: 0c1b lsrs r3, r3, #16 - 8001416: b21b sxth r3, r3 - 8001418: 4618 mov r0, r3 - 800141a: f7ff faef bl 80009fc <__aeabi_i2f> - 800141e: 4603 mov r3, r0 - 8001420: 4618 mov r0, r3 - 8001422: f7ff fd1b bl 8000e5c <__aeabi_f2iz> - 8001426: 4603 mov r3, r0 - 8001428: b21a sxth r2, r3 - 800142a: 4b4a ldr r3, [pc, #296] @ (8001554 ) - 800142c: 841a strh r2, [r3, #32] - - - /* 3. Compute Averages */ - for (i = 0; i < AD5934_EC_AVERAGES; i++) - 800142e: 2300 movs r3, #0 - 8001430: f887 3027 strb.w r3, [r7, #39] @ 0x27 - 8001434: e015 b.n 8001462 - { - dut_sum[0] += (int32_t)ec_dut_samples[0][i]; - 8001436: 68bb ldr r3, [r7, #8] - 8001438: f897 2027 ldrb.w r2, [r7, #39] @ 0x27 - 800143c: 4945 ldr r1, [pc, #276] @ (8001554 ) - 800143e: f931 2012 ldrsh.w r2, [r1, r2, lsl #1] - 8001442: 4413 add r3, r2 - 8001444: 60bb str r3, [r7, #8] - dut_sum[1] += (int32_t)ec_dut_samples[1][i]; - 8001446: 68fb ldr r3, [r7, #12] - 8001448: f897 2027 ldrb.w r2, [r7, #39] @ 0x27 - 800144c: 4941 ldr r1, [pc, #260] @ (8001554 ) - 800144e: 3210 adds r2, #16 - 8001450: f931 2012 ldrsh.w r2, [r1, r2, lsl #1] - 8001454: 4413 add r3, r2 - 8001456: 60fb str r3, [r7, #12] - for (i = 0; i < AD5934_EC_AVERAGES; i++) - 8001458: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 - 800145c: 3301 adds r3, #1 - 800145e: f887 3027 strb.w r3, [r7, #39] @ 0x27 - 8001462: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 - 8001466: 2b0f cmp r3, #15 - 8001468: d9e5 bls.n 8001436 - } - - real_avg = (float)dut_sum[0] / (float)AD5934_EC_AVERAGES; - 800146a: 68bb ldr r3, [r7, #8] - 800146c: 4618 mov r0, r3 - 800146e: f7ff fac5 bl 80009fc <__aeabi_i2f> - 8001472: 4603 mov r3, r0 - 8001474: f04f 4183 mov.w r1, #1098907648 @ 0x41800000 - 8001478: 4618 mov r0, r3 - 800147a: f7ff fbc7 bl 8000c0c <__aeabi_fdiv> - 800147e: 4603 mov r3, r0 - 8001480: 61fb str r3, [r7, #28] - imag_avg = (float)dut_sum[1] / (float)AD5934_EC_AVERAGES; - 8001482: 68fb ldr r3, [r7, #12] - 8001484: 4618 mov r0, r3 - 8001486: f7ff fab9 bl 80009fc <__aeabi_i2f> - 800148a: 4603 mov r3, r0 - 800148c: f04f 4183 mov.w r1, #1098907648 @ 0x41800000 - 8001490: 4618 mov r0, r3 - 8001492: f7ff fbbb bl 8000c0c <__aeabi_fdiv> - 8001496: 4603 mov r3, r0 - 8001498: 61bb str r3, [r7, #24] - - /* 4. Magnitude Calculation */ - mag_dut = sqrtf((real_avg * real_avg) + (imag_avg * imag_avg)); - 800149a: 69f9 ldr r1, [r7, #28] - 800149c: 69f8 ldr r0, [r7, #28] - 800149e: f7ff fb01 bl 8000aa4 <__aeabi_fmul> - 80014a2: 4603 mov r3, r0 - 80014a4: 461c mov r4, r3 - 80014a6: 69b9 ldr r1, [r7, #24] - 80014a8: 69b8 ldr r0, [r7, #24] - 80014aa: f7ff fafb bl 8000aa4 <__aeabi_fmul> - 80014ae: 4603 mov r3, r0 - 80014b0: 4619 mov r1, r3 - 80014b2: 4620 mov r0, r4 - 80014b4: f7ff f9ee bl 8000894 <__addsf3> - 80014b8: 4603 mov r3, r0 - 80014ba: 4618 mov r0, r3 - 80014bc: f005 f832 bl 8006524 - 80014c0: 6178 str r0, [r7, #20] - - /* 5. Calibration Logic Implementation */ - - // Mode: CALIBRATION SETUP (User is defining the reference magnitude) - if(main_state == STATE_PH4_DRY_EC_CALIBRATION || main_state == STATE_PH7_WET_EC_CALIBRATION) - 80014c2: 4b22 ldr r3, [pc, #136] @ (800154c ) - 80014c4: 781b ldrb r3, [r3, #0] - 80014c6: 2b02 cmp r3, #2 - 80014c8: d003 beq.n 80014d2 - 80014ca: 4b20 ldr r3, [pc, #128] @ (800154c ) - 80014cc: 781b ldrb r3, [r3, #0] - 80014ce: 2b03 cmp r3, #3 - 80014d0: d101 bne.n 80014d6 - { - return mag_dut; - 80014d2: 697b ldr r3, [r7, #20] - 80014d4: e032 b.n 800153c - } - // Mode: MEASUREMENT (Applying temperature compensation) - else if(flash_data.ec0_mag != flash_data.ec1413_mag) - 80014d6: 4b1c ldr r3, [pc, #112] @ (8001548 ) - 80014d8: 69db ldr r3, [r3, #28] - 80014da: 4a1b ldr r2, [pc, #108] @ (8001548 ) - 80014dc: 6992 ldr r2, [r2, #24] - 80014de: 4611 mov r1, r2 - 80014e0: 4618 mov r0, r3 - 80014e2: f7ff fc73 bl 8000dcc <__aeabi_fcmpeq> - 80014e6: 4603 mov r3, r0 - 80014e8: 2b00 cmp r3, #0 - 80014ea: d125 bne.n 8001538 - { - slope = (AD5934_GAIN_FACTOR_1413US/(flash_data.ec1413_mag-flash_data.ec0_mag)); - 80014ec: 4b16 ldr r3, [pc, #88] @ (8001548 ) - 80014ee: 699b ldr r3, [r3, #24] - 80014f0: 4a15 ldr r2, [pc, #84] @ (8001548 ) - 80014f2: 69d2 ldr r2, [r2, #28] - 80014f4: 4611 mov r1, r2 - 80014f6: 4618 mov r0, r3 - 80014f8: f7ff f9ca bl 8000890 <__aeabi_fsub> - 80014fc: 4603 mov r3, r0 - 80014fe: 4619 mov r1, r3 - 8001500: 4815 ldr r0, [pc, #84] @ (8001558 ) - 8001502: f7ff fb83 bl 8000c0c <__aeabi_fdiv> - 8001506: 4603 mov r3, r0 - 8001508: 613b str r3, [r7, #16] - - return(AD5934_GAIN_FACTOR_1413US + (AD5934_EC_Compensate_To_25C(mag_dut,temperature_dut) - flash_data.ec1413_mag) * slope); - 800150a: 6879 ldr r1, [r7, #4] - 800150c: 6978 ldr r0, [r7, #20] - 800150e: f000 f893 bl 8001638 - 8001512: 4602 mov r2, r0 - 8001514: 4b0c ldr r3, [pc, #48] @ (8001548 ) - 8001516: 699b ldr r3, [r3, #24] - 8001518: 4619 mov r1, r3 - 800151a: 4610 mov r0, r2 - 800151c: f7ff f9b8 bl 8000890 <__aeabi_fsub> - 8001520: 4603 mov r3, r0 - 8001522: 6939 ldr r1, [r7, #16] - 8001524: 4618 mov r0, r3 - 8001526: f7ff fabd bl 8000aa4 <__aeabi_fmul> - 800152a: 4603 mov r3, r0 - 800152c: 490a ldr r1, [pc, #40] @ (8001558 ) - 800152e: 4618 mov r0, r3 - 8001530: f7ff f9b0 bl 8000894 <__addsf3> - 8001534: 4603 mov r3, r0 - 8001536: e001 b.n 800153c - } - else - return 0.0f; // Calibration error fallback - 8001538: f04f 0300 mov.w r3, #0 - } - 800153c: 4618 mov r0, r3 - 800153e: 372c adds r7, #44 @ 0x2c - 8001540: 46bd mov sp, r7 - 8001542: bd90 pop {r4, r7, pc} - 8001544: 40010800 .word 0x40010800 - 8001548: 20000224 .word 0x20000224 - 800154c: 200006cc .word 0x200006cc - 8001550: bf800000 .word 0xbf800000 - 8001554: 2000012c .word 0x2000012c - 8001558: 44b0a000 .word 0x44b0a000 - -0800155c : + 800124c: bf00 nop + 800124e: 3708 adds r7, #8 + 8001250: 46bd mov sp, r7 + 8001252: bd80 pop {r7, pc} + 8001254: 200000b0 .word 0x200000b0 + 8001258: 200000b8 .word 0x200000b8 + 800125c: 20000001 .word 0x20000001 + 8001260: 200000b4 .word 0x200000b4 + 8001264: 200001b8 .word 0x200001b8 + 8001268: 200000b9 .word 0x200000b9 + 800126c: 55555556 .word 0x55555556 + 8001270: 40010800 .word 0x40010800 + 8001274: 20000000 .word 0x20000000 +08001278 : /** - * @brief Monitora o status com TIMEOUT para evitar travamento do sistema. - */ -void AD5934_Wait_For_Data_Valid(void) +* Simple insertion sort - BURST_SIZE is small, so the cost is negligible +* and it avoids depending on qsort/heap allocation. +**/ +void AD5934_Sort_Array(float *v, uint8_t n) { - 800155c: b580 push {r7, lr} - 800155e: b084 sub sp, #16 - 8001560: af00 add r7, sp, #0 - uint32_t timeout_counter = 0; - 8001562: 2300 movs r3, #0 - 8001564: 60fb str r3, [r7, #12] - const uint32_t MAX_TIMEOUT = 10000; // Limite de tentativas - 8001566: f242 7310 movw r3, #10000 @ 0x2710 - 800156a: 60bb str r3, [r7, #8] - uint8_t status; - - while (1) + 8001278: b580 push {r7, lr} + 800127a: b084 sub sp, #16 + 800127c: af00 add r7, sp, #0 + 800127e: 6078 str r0, [r7, #4] + 8001280: 460b mov r3, r1 + 8001282: 70fb strb r3, [r7, #3] + for (uint8_t i = 1; i < n; i++) + 8001284: 2301 movs r3, #1 + 8001286: 73fb strb r3, [r7, #15] + 8001288: e039 b.n 80012fe { - status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); - 800156c: 2101 movs r1, #1 - 800156e: 208f movs r0, #143 @ 0x8f - 8001570: f7ff fccc bl 8000f0c - 8001574: 4603 mov r3, r0 - 8001576: 71fb strb r3, [r7, #7] - - if ((status & AD5934_STATUS_DATA_VALID) != 0) - 8001578: 79fb ldrb r3, [r7, #7] - 800157a: f003 0302 and.w r3, r3, #2 - 800157e: 2b00 cmp r3, #0 - 8001580: d10a bne.n 8001598 + float key = v[i]; + 800128a: 7bfb ldrb r3, [r7, #15] + 800128c: 009b lsls r3, r3, #2 + 800128e: 687a ldr r2, [r7, #4] + 8001290: 4413 add r3, r2 + 8001292: 681b ldr r3, [r3, #0] + 8001294: 60bb str r3, [r7, #8] + int8_t j = (int8_t)i - 1; + 8001296: 7bfb ldrb r3, [r7, #15] + 8001298: 3b01 subs r3, #1 + 800129a: b2db uxtb r3, r3 + 800129c: 73bb strb r3, [r7, #14] + while (j >= 0 && v[j] > key) + 800129e: e012 b.n 80012c6 { - break; // Sucesso! + v[j + 1] = v[j]; + 80012a0: f997 300e ldrsb.w r3, [r7, #14] + 80012a4: 009b lsls r3, r3, #2 + 80012a6: 687a ldr r2, [r7, #4] + 80012a8: 441a add r2, r3 + 80012aa: f997 300e ldrsb.w r3, [r7, #14] + 80012ae: 3301 adds r3, #1 + 80012b0: 009b lsls r3, r3, #2 + 80012b2: 6879 ldr r1, [r7, #4] + 80012b4: 440b add r3, r1 + 80012b6: 6812 ldr r2, [r2, #0] + 80012b8: 601a str r2, [r3, #0] + j--; + 80012ba: f997 300e ldrsb.w r3, [r7, #14] + 80012be: b2db uxtb r3, r3 + 80012c0: 3b01 subs r3, #1 + 80012c2: b2db uxtb r3, r3 + 80012c4: 73bb strb r3, [r7, #14] + while (j >= 0 && v[j] > key) + 80012c6: f997 300e ldrsb.w r3, [r7, #14] + 80012ca: 2b00 cmp r3, #0 + 80012cc: db0c blt.n 80012e8 + 80012ce: f997 300e ldrsb.w r3, [r7, #14] + 80012d2: 009b lsls r3, r3, #2 + 80012d4: 687a ldr r2, [r7, #4] + 80012d6: 4413 add r3, r2 + 80012d8: 681b ldr r3, [r3, #0] + 80012da: 4619 mov r1, r3 + 80012dc: 68b8 ldr r0, [r7, #8] + 80012de: f7ff fd7f bl 8000de0 <__aeabi_fcmplt> + 80012e2: 4603 mov r3, r0 + 80012e4: 2b00 cmp r3, #0 + 80012e6: d1db bne.n 80012a0 } - - timeout_counter++; - 8001582: 68fb ldr r3, [r7, #12] - 8001584: 3301 adds r3, #1 - 8001586: 60fb str r3, [r7, #12] - if (timeout_counter >= MAX_TIMEOUT) - 8001588: 68fa ldr r2, [r7, #12] - 800158a: 68bb ldr r3, [r7, #8] - 800158c: 429a cmp r2, r3 - 800158e: d205 bcs.n 800159c - { - // TRATAMENTO DE ERRO: O sistema não travou, mas o chip falhou. - break; - } - - HAL_Delay(1); // Pequeno delay para não sobrecarregar o barramento I2C - 8001590: 2001 movs r0, #1 - 8001592: f001 fcb3 bl 8002efc - status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); - 8001596: e7e9 b.n 800156c - break; // Sucesso! - 8001598: bf00 nop - 800159a: e000 b.n 800159e - break; - 800159c: bf00 nop + v[j + 1] = key; + 80012e8: f997 300e ldrsb.w r3, [r7, #14] + 80012ec: 3301 adds r3, #1 + 80012ee: 009b lsls r3, r3, #2 + 80012f0: 687a ldr r2, [r7, #4] + 80012f2: 4413 add r3, r2 + 80012f4: 68ba ldr r2, [r7, #8] + 80012f6: 601a str r2, [r3, #0] + for (uint8_t i = 1; i < n; i++) + 80012f8: 7bfb ldrb r3, [r7, #15] + 80012fa: 3301 adds r3, #1 + 80012fc: 73fb strb r3, [r7, #15] + 80012fe: 7bfa ldrb r2, [r7, #15] + 8001300: 78fb ldrb r3, [r7, #3] + 8001302: 429a cmp r2, r3 + 8001304: d3c1 bcc.n 800128a } } - 800159e: bf00 nop - 80015a0: 3710 adds r7, #16 - 80015a2: 46bd mov sp, r7 - 80015a4: bd80 pop {r7, pc} - ... + 8001306: bf00 nop + 8001308: bf00 nop + 800130a: 3710 adds r7, #16 + 800130c: 46bd mov sp, r7 + 800130e: bd80 pop {r7, pc} -080015a8 : - * @param valor O valor float original. - * @param casas_decimais Quantidade de casas que devem permanecer após a vírgula. - * @return float O valor com as casas decimais excedentes removidas. - */ -float AD5934_Round_Float_Precision(float value, uint8_t number_of_decimals) +08001310 : + * original order is not needed), discards TRIM_COUNT values from each + * end, and averages the remainder. Sorting in place avoids a temporary + * array and removes the need for memcpy()/string.h entirely. + **/ +float AD5934_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim) { - 80015a8: b580 push {r7, lr} - 80015aa: b084 sub sp, #16 - 80015ac: af00 add r7, sp, #0 - 80015ae: 6078 str r0, [r7, #4] - 80015b0: 460b mov r3, r1 - 80015b2: 70fb strb r3, [r7, #3] - float multiply = 1.0f; - 80015b4: f04f 537e mov.w r3, #1065353216 @ 0x3f800000 - 80015b8: 60fb str r3, [r7, #12] + 8001310: b580 push {r7, lr} + 8001312: b086 sub sp, #24 + 8001314: af00 add r7, sp, #0 + 8001316: 6078 str r0, [r7, #4] + 8001318: 460b mov r3, r1 + 800131a: 70fb strb r3, [r7, #3] + 800131c: 4613 mov r3, r2 + 800131e: 70bb strb r3, [r7, #2] + AD5934_Sort_Array(buffer, n); + 8001320: 78fb ldrb r3, [r7, #3] + 8001322: 4619 mov r1, r3 + 8001324: 6878 ldr r0, [r7, #4] + 8001326: f7ff ffa7 bl 8001278 - for (uint8_t i = 0; i < number_of_decimals; i++) - 80015ba: 2300 movs r3, #0 - 80015bc: 72fb strb r3, [r7, #11] - 80015be: e008 b.n 80015d2 - multiply *= 10.0f; - 80015c0: 490f ldr r1, [pc, #60] @ (8001600 ) - 80015c2: 68f8 ldr r0, [r7, #12] - 80015c4: f7ff fa6e bl 8000aa4 <__aeabi_fmul> - 80015c8: 4603 mov r3, r0 - 80015ca: 60fb str r3, [r7, #12] - for (uint8_t i = 0; i < number_of_decimals; i++) - 80015cc: 7afb ldrb r3, [r7, #11] - 80015ce: 3301 adds r3, #1 - 80015d0: 72fb strb r3, [r7, #11] - 80015d2: 7afa ldrb r2, [r7, #11] - 80015d4: 78fb ldrb r3, [r7, #3] - 80015d6: 429a cmp r2, r3 - 80015d8: d3f2 bcc.n 80015c0 + uint8_t start = trim; + 800132a: 78bb ldrb r3, [r7, #2] + 800132c: 75fb strb r3, [r7, #23] + uint8_t end = n - trim; /* exclusive */ + 800132e: 78fa ldrb r2, [r7, #3] + 8001330: 78bb ldrb r3, [r7, #2] + 8001332: 1ad3 subs r3, r2, r3 + 8001334: 75bb strb r3, [r7, #22] - return roundf(value * multiply) / multiply; - 80015da: 68f9 ldr r1, [r7, #12] - 80015dc: 6878 ldr r0, [r7, #4] - 80015de: f7ff fa61 bl 8000aa4 <__aeabi_fmul> - 80015e2: 4603 mov r3, r0 - 80015e4: 4618 mov r0, r3 - 80015e6: f005 f82d bl 8006644 - 80015ea: 4603 mov r3, r0 - 80015ec: 68f9 ldr r1, [r7, #12] - 80015ee: 4618 mov r0, r3 - 80015f0: f7ff fb0c bl 8000c0c <__aeabi_fdiv> - 80015f4: 4603 mov r3, r0 -} - 80015f6: 4618 mov r0, r3 - 80015f8: 3710 adds r7, #16 - 80015fa: 46bd mov sp, r7 - 80015fc: bd80 pop {r7, pc} - 80015fe: bf00 nop - 8001600: 41200000 .word 0x41200000 - -08001604 : - * - * @param input_val The raw float value from sensor/ADC. - * @return float The transformed value following the requested trend. - */ -float AD5934_Linear_Correction(float raw_value) -{ - 8001604: b580 push {r7, lr} - 8001606: b084 sub sp, #16 - 8001608: af00 add r7, sp, #0 - 800160a: 6078 str r0, [r7, #4] - /* Pre-calculated constants from regression analysis */ - const float slope = 1.02281f; - 800160c: 4b08 ldr r3, [pc, #32] @ (8001630 ) - 800160e: 60fb str r3, [r7, #12] - const float offset = (-2.1409f); - 8001610: 4b08 ldr r3, [pc, #32] @ (8001634 ) - 8001612: 60bb str r3, [r7, #8] - - /* Single FPU instruction (if FPU available) or optimized software float mul/add */ - return (raw_value * slope) + offset; - 8001614: 68f9 ldr r1, [r7, #12] - 8001616: 6878 ldr r0, [r7, #4] - 8001618: f7ff fa44 bl 8000aa4 <__aeabi_fmul> - 800161c: 4603 mov r3, r0 - 800161e: 68b9 ldr r1, [r7, #8] - 8001620: 4618 mov r0, r3 - 8001622: f7ff f937 bl 8000894 <__addsf3> - 8001626: 4603 mov r3, r0 -} - 8001628: 4618 mov r0, r3 - 800162a: 3710 adds r7, #16 - 800162c: 46bd mov sp, r7 - 800162e: bd80 pop {r7, pc} - 8001630: 3f82eb70 .word 0x3f82eb70 - 8001634: c0090481 .word 0xc0090481 - -08001638 : - * @param admittance raw in uS/cm - * @param temperature_celsius Temperature in degrees Celsius - * @return admittance compensated - */ -float AD5934_EC_Compensate_To_25C(float ec_raw_uScm, float temp_C) -{ - 8001638: b580 push {r7, lr} - 800163a: b084 sub sp, #16 - 800163c: af00 add r7, sp, #0 - 800163e: 6078 str r0, [r7, #4] - 8001640: 6039 str r1, [r7, #0] - - float factor = 1.0f + AD5934_EC_ALPHA_PER_C * (temp_C - AD5934_EC_TEMP_REF_C); - 8001642: 4911 ldr r1, [pc, #68] @ (8001688 ) - 8001644: 6838 ldr r0, [r7, #0] - 8001646: f7ff f923 bl 8000890 <__aeabi_fsub> - 800164a: 4603 mov r3, r0 - 800164c: 490f ldr r1, [pc, #60] @ (800168c ) - 800164e: 4618 mov r0, r3 - 8001650: f7ff fa28 bl 8000aa4 <__aeabi_fmul> - 8001654: 4603 mov r3, r0 - 8001656: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 - 800165a: 4618 mov r0, r3 - 800165c: f7ff f91a bl 8000894 <__addsf3> - 8001660: 4603 mov r3, r0 - 8001662: 60fb str r3, [r7, #12] - - if (factor < 0.1f) - 8001664: 490a ldr r1, [pc, #40] @ (8001690 ) - 8001666: 68f8 ldr r0, [r7, #12] - 8001668: f7ff fbba bl 8000de0 <__aeabi_fcmplt> - 800166c: 4603 mov r3, r0 - 800166e: 2b00 cmp r3, #0 - 8001670: d001 beq.n 8001676 - factor = 0.1f; - 8001672: 4b07 ldr r3, [pc, #28] @ (8001690 ) - 8001674: 60fb str r3, [r7, #12] - - return (ec_raw_uScm / factor); - 8001676: 68f9 ldr r1, [r7, #12] - 8001678: 6878 ldr r0, [r7, #4] - 800167a: f7ff fac7 bl 8000c0c <__aeabi_fdiv> - 800167e: 4603 mov r3, r0 -} - 8001680: 4618 mov r0, r3 - 8001682: 3710 adds r7, #16 - 8001684: 46bd mov sp, r7 - 8001686: bd80 pop {r7, pc} - 8001688: 41c80000 .word 0x41c80000 - 800168c: 3ca3d70a .word 0x3ca3d70a - 8001690: 3dcccccd .word 0x3dcccccd - -08001694 : - * @brief Calibrates EC sensor reading to 25°C reference point - * @param temp_C Temperature of the liquid in Celsius - * @return Temperature-compensated Correction factor value at 25°C reference - */ -float AD5934_EC_Calibrate_Temperature(float temp_C) -{ - 8001694: b5b0 push {r4, r5, r7, lr} - 8001696: b0a2 sub sp, #136 @ 0x88 - 8001698: af00 add r7, sp, #0 - 800169a: 6078 str r0, [r7, #4] - // Calibration data points for standard solution (1413 uS/cm) - const float temps[] = {5, 10, 15, 18, 20, 22, 25, 30, 35, 40, 45, 50}; - 800169c: 4b4b ldr r3, [pc, #300] @ (80017cc ) - 800169e: f107 043c add.w r4, r7, #60 @ 0x3c - 80016a2: 461d mov r5, r3 - 80016a4: cd0f ldmia r5!, {r0, r1, r2, r3} - 80016a6: c40f stmia r4!, {r0, r1, r2, r3} - 80016a8: cd0f ldmia r5!, {r0, r1, r2, r3} - 80016aa: c40f stmia r4!, {r0, r1, r2, r3} - 80016ac: e895 000f ldmia.w r5, {r0, r1, r2, r3} - 80016b0: e884 000f stmia.w r4, {r0, r1, r2, r3} - const float conductivities[] = {893, 1018, 1149, 1225, 1278, 1329, 1413, 1552, 1691, 1843, 1988, 2145}; - 80016b4: 4b46 ldr r3, [pc, #280] @ (80017d0 ) - 80016b6: f107 040c add.w r4, r7, #12 - 80016ba: 461d mov r5, r3 - 80016bc: cd0f ldmia r5!, {r0, r1, r2, r3} - 80016be: c40f stmia r4!, {r0, r1, r2, r3} - 80016c0: cd0f ldmia r5!, {r0, r1, r2, r3} - 80016c2: c40f stmia r4!, {r0, r1, r2, r3} - 80016c4: e895 000f ldmia.w r5, {r0, r1, r2, r3} - 80016c8: e884 000f stmia.w r4, {r0, r1, r2, r3} - - // Find the two nearest temperature points for interpolation - int32_t temp_index = -1; - 80016cc: f04f 33ff mov.w r3, #4294967295 - 80016d0: f8c7 3084 str.w r3, [r7, #132] @ 0x84 - for (int i = 0; i < 12; i++) - 80016d4: 2300 movs r3, #0 - 80016d6: f8c7 3080 str.w r3, [r7, #128] @ 0x80 - 80016da: e017 b.n 800170c + if (end <= start) /* guard against a misconfigured trim value */ + 8001336: 7dba ldrb r2, [r7, #22] + 8001338: 7dfb ldrb r3, [r7, #23] + 800133a: 429a cmp r2, r3 + 800133c: d803 bhi.n 8001346 { - if (temps[i] >= temp_C) - 80016dc: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 - 80016e0: 009b lsls r3, r3, #2 - 80016e2: 3388 adds r3, #136 @ 0x88 - 80016e4: 443b add r3, r7 - 80016e6: f853 3c4c ldr.w r3, [r3, #-76] - 80016ea: 4619 mov r1, r3 - 80016ec: 6878 ldr r0, [r7, #4] - 80016ee: f7ff fb81 bl 8000df4 <__aeabi_fcmple> - 80016f2: 4603 mov r3, r0 - 80016f4: 2b00 cmp r3, #0 - 80016f6: d004 beq.n 8001702 - { - temp_index = i; - 80016f8: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 - 80016fc: f8c7 3084 str.w r3, [r7, #132] @ 0x84 - break; - 8001700: e008 b.n 8001714 - for (int i = 0; i < 12; i++) - 8001702: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 - 8001706: 3301 adds r3, #1 - 8001708: f8c7 3080 str.w r3, [r7, #128] @ 0x80 - 800170c: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 - 8001710: 2b0b cmp r3, #11 - 8001712: dde3 ble.n 80016dc - } + start = 0; + 800133e: 2300 movs r3, #0 + 8001340: 75fb strb r3, [r7, #23] + end = n; + 8001342: 78fb ldrb r3, [r7, #3] + 8001344: 75bb strb r3, [r7, #22] } - // Handle boundary cases - if (temp_index == -1) { - 8001714: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 - 8001718: f1b3 3fff cmp.w r3, #4294967295 - 800171c: d103 bne.n 8001726 - // Temperature higher than max point (50°C) - temp_index = 10; - 800171e: 230a movs r3, #10 - 8001720: f8c7 3084 str.w r3, [r7, #132] @ 0x84 - 8001724: e006 b.n 8001734 - } else if (temp_index == 0) { - 8001726: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 - 800172a: 2b00 cmp r3, #0 - 800172c: d102 bne.n 8001734 - // Temperature lower than min point (5°C) - temp_index = 0; - 800172e: 2300 movs r3, #0 - 8001730: f8c7 3084 str.w r3, [r7, #132] @ 0x84 + float sum = 0.0f; + 8001346: f04f 0300 mov.w r3, #0 + 800134a: 613b str r3, [r7, #16] + uint8_t count = 0; + 800134c: 2300 movs r3, #0 + 800134e: 73fb strb r3, [r7, #15] + for (uint8_t i = start; i < end; i++) + 8001350: 7dfb ldrb r3, [r7, #23] + 8001352: 73bb strb r3, [r7, #14] + 8001354: e010 b.n 8001378 + { + sum += buffer[i]; + 8001356: 7bbb ldrb r3, [r7, #14] + 8001358: 009b lsls r3, r3, #2 + 800135a: 687a ldr r2, [r7, #4] + 800135c: 4413 add r3, r2 + 800135e: 681b ldr r3, [r3, #0] + 8001360: 4619 mov r1, r3 + 8001362: 6938 ldr r0, [r7, #16] + 8001364: f7ff fa96 bl 8000894 <__addsf3> + 8001368: 4603 mov r3, r0 + 800136a: 613b str r3, [r7, #16] + count++; + 800136c: 7bfb ldrb r3, [r7, #15] + 800136e: 3301 adds r3, #1 + 8001370: 73fb strb r3, [r7, #15] + for (uint8_t i = start; i < end; i++) + 8001372: 7bbb ldrb r3, [r7, #14] + 8001374: 3301 adds r3, #1 + 8001376: 73bb strb r3, [r7, #14] + 8001378: 7bba ldrb r2, [r7, #14] + 800137a: 7dbb ldrb r3, [r7, #22] + 800137c: 429a cmp r2, r3 + 800137e: d3ea bcc.n 8001356 } - - // Interpolate conductivity at measured temperature - float temp1 = temps[temp_index - 1]; - 8001734: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 - 8001738: 3b01 subs r3, #1 - 800173a: 009b lsls r3, r3, #2 - 800173c: 3388 adds r3, #136 @ 0x88 - 800173e: 443b add r3, r7 - 8001740: f853 3c4c ldr.w r3, [r3, #-76] - 8001744: 67fb str r3, [r7, #124] @ 0x7c - float temp2 = temps[temp_index]; - 8001746: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 - 800174a: 009b lsls r3, r3, #2 - 800174c: 3388 adds r3, #136 @ 0x88 - 800174e: 443b add r3, r7 - 8001750: f853 3c4c ldr.w r3, [r3, #-76] - 8001754: 67bb str r3, [r7, #120] @ 0x78 - float cond1 = conductivities[temp_index - 1]; - 8001756: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 - 800175a: 3b01 subs r3, #1 - 800175c: 009b lsls r3, r3, #2 - 800175e: 3388 adds r3, #136 @ 0x88 - 8001760: 443b add r3, r7 - 8001762: f853 3c7c ldr.w r3, [r3, #-124] - 8001766: 677b str r3, [r7, #116] @ 0x74 - float cond2 = conductivities[temp_index]; - 8001768: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 - 800176c: 009b lsls r3, r3, #2 - 800176e: 3388 adds r3, #136 @ 0x88 - 8001770: 443b add r3, r7 - 8001772: f853 3c7c ldr.w r3, [r3, #-124] - 8001776: 673b str r3, [r7, #112] @ 0x70 - - // Linear interpolation to get conductivity at measured temperature - float interpolated_cond = cond1 + (cond2 - cond1) * (temp_C - temp1) / (temp2 - temp1); - 8001778: 6f79 ldr r1, [r7, #116] @ 0x74 - 800177a: 6f38 ldr r0, [r7, #112] @ 0x70 - 800177c: f7ff f888 bl 8000890 <__aeabi_fsub> - 8001780: 4603 mov r3, r0 - 8001782: 461c mov r4, r3 - 8001784: 6ff9 ldr r1, [r7, #124] @ 0x7c - 8001786: 6878 ldr r0, [r7, #4] - 8001788: f7ff f882 bl 8000890 <__aeabi_fsub> - 800178c: 4603 mov r3, r0 - 800178e: 4619 mov r1, r3 - 8001790: 4620 mov r0, r4 - 8001792: f7ff f987 bl 8000aa4 <__aeabi_fmul> - 8001796: 4603 mov r3, r0 - 8001798: 461c mov r4, r3 - 800179a: 6ff9 ldr r1, [r7, #124] @ 0x7c - 800179c: 6fb8 ldr r0, [r7, #120] @ 0x78 - 800179e: f7ff f877 bl 8000890 <__aeabi_fsub> - 80017a2: 4603 mov r3, r0 - 80017a4: 4619 mov r1, r3 - 80017a6: 4620 mov r0, r4 - 80017a8: f7ff fa30 bl 8000c0c <__aeabi_fdiv> - 80017ac: 4603 mov r3, r0 - 80017ae: 4619 mov r1, r3 - 80017b0: 6f78 ldr r0, [r7, #116] @ 0x74 - 80017b2: f7ff f86f bl 8000894 <__addsf3> - 80017b6: 4603 mov r3, r0 - 80017b8: 66fb str r3, [r7, #108] @ 0x6c - - // Return real conductivity at the temperature - return(interpolated_cond/1413.0f); - 80017ba: 4906 ldr r1, [pc, #24] @ (80017d4 ) - 80017bc: 6ef8 ldr r0, [r7, #108] @ 0x6c - 80017be: f7ff fa25 bl 8000c0c <__aeabi_fdiv> - 80017c2: 4603 mov r3, r0 + return sum / (float)count; + 8001380: 7bfb ldrb r3, [r7, #15] + 8001382: 4618 mov r0, r3 + 8001384: f7ff fb36 bl 80009f4 <__aeabi_ui2f> + 8001388: 4603 mov r3, r0 + 800138a: 4619 mov r1, r3 + 800138c: 6938 ldr r0, [r7, #16] + 800138e: f7ff fc3d bl 8000c0c <__aeabi_fdiv> + 8001392: 4603 mov r3, r0 } - 80017c4: 4618 mov r0, r3 - 80017c6: 3788 adds r7, #136 @ 0x88 - 80017c8: 46bd mov sp, r7 - 80017ca: bdb0 pop {r4, r5, r7, pc} - 80017cc: 080066a4 .word 0x080066a4 - 80017d0: 080066d4 .word 0x080066d4 - 80017d4: 44b0a000 .word 0x44b0a000 + 8001394: 4618 mov r0, r3 + 8001396: 3718 adds r7, #24 + 8001398: 46bd mov sp, r7 + 800139a: bd80 pop {r7, pc} -080017d8 : +0800139c : + +/* + * Simple average of the history buffer (stage-2 sliding window) + */ +float AD5934_History_Average(const float *hist, uint8_t n) +{ + 800139c: b580 push {r7, lr} + 800139e: b084 sub sp, #16 + 80013a0: af00 add r7, sp, #0 + 80013a2: 6078 str r0, [r7, #4] + 80013a4: 460b mov r3, r1 + 80013a6: 70fb strb r3, [r7, #3] + float sum = 0.0f; + 80013a8: f04f 0300 mov.w r3, #0 + 80013ac: 60fb str r3, [r7, #12] + for (uint8_t i = 0; i < n; i++) + 80013ae: 2300 movs r3, #0 + 80013b0: 72fb strb r3, [r7, #11] + 80013b2: e00d b.n 80013d0 + sum += hist[i]; + 80013b4: 7afb ldrb r3, [r7, #11] + 80013b6: 009b lsls r3, r3, #2 + 80013b8: 687a ldr r2, [r7, #4] + 80013ba: 4413 add r3, r2 + 80013bc: 681b ldr r3, [r3, #0] + 80013be: 4619 mov r1, r3 + 80013c0: 68f8 ldr r0, [r7, #12] + 80013c2: f7ff fa67 bl 8000894 <__addsf3> + 80013c6: 4603 mov r3, r0 + 80013c8: 60fb str r3, [r7, #12] + for (uint8_t i = 0; i < n; i++) + 80013ca: 7afb ldrb r3, [r7, #11] + 80013cc: 3301 adds r3, #1 + 80013ce: 72fb strb r3, [r7, #11] + 80013d0: 7afa ldrb r2, [r7, #11] + 80013d2: 78fb ldrb r3, [r7, #3] + 80013d4: 429a cmp r2, r3 + 80013d6: d3ed bcc.n 80013b4 + return sum / (float)n; + 80013d8: 78fb ldrb r3, [r7, #3] + 80013da: 4618 mov r0, r3 + 80013dc: f7ff fb0a bl 80009f4 <__aeabi_ui2f> + 80013e0: 4603 mov r3, r0 + 80013e2: 4619 mov r1, r3 + 80013e4: 68f8 ldr r0, [r7, #12] + 80013e6: f7ff fc11 bl 8000c0c <__aeabi_fdiv> + 80013ea: 4603 mov r3, r0 +} + 80013ec: 4618 mov r0, r3 + 80013ee: 3710 adds r7, #16 + 80013f0: 46bd mov sp, r7 + 80013f2: bd80 pop {r7, pc} + +080013f4 : + * Common processing core: applied identically to all 3 channels. + * Receives the current raw reading and the channel's state (global + * arrays/struct). + **/ +void AD5934_Process_Sample(AD5934_filter_t *ch, float raw) +{ + 80013f4: b590 push {r4, r7, lr} + 80013f6: b085 sub sp, #20 + 80013f8: af00 add r7, sp, #0 + 80013fa: 6078 str r0, [r7, #4] + 80013fc: 6039 str r1, [r7, #0] + /* --- Stage 1: accumulate into the current burst --- */ + ch->burst[ch->burst_index] = raw; + 80013fe: 687b ldr r3, [r7, #4] + 8001400: 7f1b ldrb r3, [r3, #28] + 8001402: 4619 mov r1, r3 + 8001404: 687b ldr r3, [r7, #4] + 8001406: 683a ldr r2, [r7, #0] + 8001408: f843 2021 str.w r2, [r3, r1, lsl #2] + ch->burst_index++; + 800140c: 687b ldr r3, [r7, #4] + 800140e: 7f1b ldrb r3, [r3, #28] + 8001410: 3301 adds r3, #1 + 8001412: b2da uxtb r2, r3 + 8001414: 687b ldr r3, [r7, #4] + 8001416: 771a strb r2, [r3, #28] + + if (ch->burst_index < AD5934_BURST_SIZE) + 8001418: 687b ldr r3, [r7, #4] + 800141a: 7f1b ldrb r3, [r3, #28] + 800141c: 2b06 cmp r3, #6 + 800141e: d979 bls.n 8001514 + return; /* still collecting the burst, nothing else to do */ + + /* Burst complete: compute the trimmed mean */ + float burst_result = AD5934_Trimmed_Mean(ch->burst, AD5934_BURST_SIZE, AD5934_TRIM_COUNT); + 8001420: 687b ldr r3, [r7, #4] + 8001422: 2201 movs r2, #1 + 8001424: 2107 movs r1, #7 + 8001426: 4618 mov r0, r3 + 8001428: f7ff ff72 bl 8001310 + 800142c: 60f8 str r0, [r7, #12] + ch->burst_index = 0; /* reset for the next burst */ + 800142e: 687b ldr r3, [r7, #4] + 8001430: 2200 movs r2, #0 + 8001432: 771a strb r2, [r3, #28] + + /* --- Stage 2a: rolling history / sliding window --- */ + ch->history[ch->history_index] = burst_result; + 8001434: 687b ldr r3, [r7, #4] + 8001436: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 + 800143a: 461a mov r2, r3 + 800143c: 687b ldr r3, [r7, #4] + 800143e: 3208 adds r2, #8 + 8001440: 68f9 ldr r1, [r7, #12] + 8001442: f843 1022 str.w r1, [r3, r2, lsl #2] + ch->history_index = (uint8_t)((ch->history_index + 1) % AD5934_HISTORY_SIZE); + 8001446: 687b ldr r3, [r7, #4] + 8001448: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 + 800144c: 3301 adds r3, #1 + 800144e: 425a negs r2, r3 + 8001450: f003 0307 and.w r3, r3, #7 + 8001454: f002 0207 and.w r2, r2, #7 + 8001458: bf58 it pl + 800145a: 4253 negpl r3, r2 + 800145c: b2da uxtb r2, r3 + 800145e: 687b ldr r3, [r7, #4] + 8001460: f883 2040 strb.w r2, [r3, #64] @ 0x40 + if (ch->history_count < AD5934_HISTORY_SIZE) + 8001464: 687b ldr r3, [r7, #4] + 8001466: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 800146a: 2b07 cmp r3, #7 + 800146c: d807 bhi.n 800147e + ch->history_count++; + 800146e: 687b ldr r3, [r7, #4] + 8001470: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 8001474: 3301 adds r3, #1 + 8001476: b2da uxtb r2, r3 + 8001478: 687b ldr r3, [r7, #4] + 800147a: f883 2041 strb.w r2, [r3, #65] @ 0x41 + + float window_average = AD5934_History_Average(ch->history, ch->history_count); + 800147e: 687b ldr r3, [r7, #4] + 8001480: f103 0220 add.w r2, r3, #32 + 8001484: 687b ldr r3, [r7, #4] + 8001486: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 800148a: 4619 mov r1, r3 + 800148c: 4610 mov r0, r2 + 800148e: f7ff ff85 bl 800139c + 8001492: 60b8 str r0, [r7, #8] + + /* --- Stage 2b: first-order IIR low-pass filter on the burst result --- */ + if (!ch->iir_initialized) + 8001494: 687b ldr r3, [r7, #4] + 8001496: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 + 800149a: 2b00 cmp r3, #0 + 800149c: d107 bne.n 80014ae + { + ch->iir_state = burst_result; + 800149e: 687b ldr r3, [r7, #4] + 80014a0: 68fa ldr r2, [r7, #12] + 80014a2: 645a str r2, [r3, #68] @ 0x44 + ch->iir_initialized = 1; + 80014a4: 687b ldr r3, [r7, #4] + 80014a6: 2201 movs r2, #1 + 80014a8: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 80014ac: e016 b.n 80014dc + } + else + { + ch->iir_state = AD5934_IIR_ALPHA * burst_result + (1.0f - AD5934_IIR_ALPHA) * ch->iir_state; + 80014ae: f04f 517a mov.w r1, #1048576000 @ 0x3e800000 + 80014b2: 68f8 ldr r0, [r7, #12] + 80014b4: f7ff faf6 bl 8000aa4 <__aeabi_fmul> + 80014b8: 4603 mov r3, r0 + 80014ba: 461c mov r4, r3 + 80014bc: 687b ldr r3, [r7, #4] + 80014be: 6c5b ldr r3, [r3, #68] @ 0x44 + 80014c0: f04f 517d mov.w r1, #1061158912 @ 0x3f400000 + 80014c4: 4618 mov r0, r3 + 80014c6: f7ff faed bl 8000aa4 <__aeabi_fmul> + 80014ca: 4603 mov r3, r0 + 80014cc: 4619 mov r1, r3 + 80014ce: 4620 mov r0, r4 + 80014d0: f7ff f9e0 bl 8000894 <__addsf3> + 80014d4: 4603 mov r3, r0 + 80014d6: 461a mov r2, r3 + 80014d8: 687b ldr r3, [r7, #4] + 80014da: 645a str r2, [r3, #68] @ 0x44 + } + + /* Final output: combines the IIR state (fast response to real drift) + * with the window average (more stable, slower response). Adjust + * the weighting per channel if needed. */ + ch->filtered_value = 0.5f * ch->iir_state + 0.5f * window_average; + 80014dc: 687b ldr r3, [r7, #4] + 80014de: 6c5b ldr r3, [r3, #68] @ 0x44 + 80014e0: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 + 80014e4: 4618 mov r0, r3 + 80014e6: f7ff fadd bl 8000aa4 <__aeabi_fmul> + 80014ea: 4603 mov r3, r0 + 80014ec: 461c mov r4, r3 + 80014ee: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 + 80014f2: 68b8 ldr r0, [r7, #8] + 80014f4: f7ff fad6 bl 8000aa4 <__aeabi_fmul> + 80014f8: 4603 mov r3, r0 + 80014fa: 4619 mov r1, r3 + 80014fc: 4620 mov r0, r4 + 80014fe: f7ff f9c9 bl 8000894 <__addsf3> + 8001502: 4603 mov r3, r0 + 8001504: 461a mov r2, r3 + 8001506: 687b ldr r3, [r7, #4] + 8001508: 64da str r2, [r3, #76] @ 0x4c + ch->value_valid = 1; + 800150a: 687b ldr r3, [r7, #4] + 800150c: 2201 movs r2, #1 + 800150e: f883 2050 strb.w r2, [r3, #80] @ 0x50 + 8001512: e000 b.n 8001516 + return; /* still collecting the burst, nothing else to do */ + 8001514: bf00 nop +} + 8001516: 3714 adds r7, #20 + 8001518: 46bd mov sp, r7 + 800151a: bd90 pop {r4, r7, pc} + +0800151c : +/* ---------------------------------------------------------------------- */ + +/* Call this every time a sweep completes with the mux on the RTD + * (PT100/PT1000) channel */ +void AD5934_RTD_NewSample(float raw) +{ + 800151c: b580 push {r7, lr} + 800151e: b082 sub sp, #8 + 8001520: af00 add r7, sp, #0 + 8001522: 6078 str r0, [r7, #4] + AD5934_Process_Sample(&g_rtd_filter, raw); + 8001524: 6879 ldr r1, [r7, #4] + 8001526: 4803 ldr r0, [pc, #12] @ (8001534 ) + 8001528: f7ff ff64 bl 80013f4 +} + 800152c: bf00 nop + 800152e: 3708 adds r7, #8 + 8001530: 46bd mov sp, r7 + 8001532: bd80 pop {r7, pc} + 8001534: 200000bc .word 0x200000bc + +08001538 : + +/* Call this every time a sweep completes with the mux on the EC + * (conductivity probe) channel */ +void AD5934_EC_NewSample(float raw) +{ + 8001538: b580 push {r7, lr} + 800153a: b082 sub sp, #8 + 800153c: af00 add r7, sp, #0 + 800153e: 6078 str r0, [r7, #4] + AD5934_Process_Sample(&g_ec_filter, raw); + 8001540: 6879 ldr r1, [r7, #4] + 8001542: 4803 ldr r0, [pc, #12] @ (8001550 ) + 8001544: f7ff ff56 bl 80013f4 +} + 8001548: bf00 nop + 800154a: 3708 adds r7, #8 + 800154c: 46bd mov sp, r7 + 800154e: bd80 pop {r7, pc} + 8001550: 20000110 .word 0x20000110 + +08001554 : + +/* Call this every time a sweep completes with the mux on the on-board + * precision reference resistor channel */ +void AD5934_Reference_NewSample(float raw) +{ + 8001554: b580 push {r7, lr} + 8001556: b082 sub sp, #8 + 8001558: af00 add r7, sp, #0 + 800155a: 6078 str r0, [r7, #4] + AD5934_Process_Sample(&g_ref_filter, raw); + 800155c: 6879 ldr r1, [r7, #4] + 800155e: 4803 ldr r0, [pc, #12] @ (800156c ) + 8001560: f7ff ff48 bl 80013f4 +} + 8001564: bf00 nop + 8001566: 3708 adds r7, #8 + 8001568: 46bd mov sp, r7 + 800156a: bd80 pop {r7, pc} + 800156c: 20000164 .word 0x20000164 + +08001570 : * * @return None. *******************************************************************************/ void ADG715_SetRegisterValue(char value) { - 80017d8: b580 push {r7, lr} - 80017da: b086 sub sp, #24 - 80017dc: af02 add r7, sp, #8 - 80017de: 4603 mov r3, r0 - 80017e0: 71fb strb r3, [r7, #7] + 8001570: b580 push {r7, lr} + 8001572: b086 sub sp, #24 + 8001574: af02 add r7, sp, #8 + 8001576: 4603 mov r3, r0 + 8001578: 71fb strb r3, [r7, #7] uint8_t writeData[1] = {value}; - 80017e2: 79fb ldrb r3, [r7, #7] - 80017e4: 733b strb r3, [r7, #12] + 800157a: 79fb ldrb r3, [r7, #7] + 800157c: 733b strb r3, [r7, #12] HAL_StatusTypeDef status; status = HAL_I2C_Master_Transmit(&hi2c2, ADG715_I2C_ADDRESS, writeData, 1, 1); - 80017e6: f107 020c add.w r2, r7, #12 - 80017ea: 2301 movs r3, #1 - 80017ec: 9300 str r3, [sp, #0] - 80017ee: 2301 movs r3, #1 - 80017f0: 2190 movs r1, #144 @ 0x90 - 80017f2: 4804 ldr r0, [pc, #16] @ (8001804 ) - 80017f4: f002 fc88 bl 8004108 - 80017f8: 4603 mov r3, r0 - 80017fa: 73fb strb r3, [r7, #15] + 800157e: f107 020c add.w r2, r7, #12 + 8001582: 2301 movs r3, #1 + 8001584: 9300 str r3, [sp, #0] + 8001586: 2301 movs r3, #1 + 8001588: 2190 movs r1, #144 @ 0x90 + 800158a: 4804 ldr r0, [pc, #16] @ (800159c ) + 800158c: f002 f9fc bl 8003988 + 8001590: 4603 mov r3, r0 + 8001592: 73fb strb r3, [r7, #15] return; - 80017fc: bf00 nop + 8001594: bf00 nop } - 80017fe: 3710 adds r7, #16 - 8001800: 46bd mov sp, r7 - 8001802: bd80 pop {r7, pc} - 8001804: 20000678 .word 0x20000678 + 8001596: 3710 adds r7, #16 + 8001598: 46bd mov sp, r7 + 800159a: bd80 pop {r7, pc} + 800159c: 200006e0 .word 0x200006e0 -08001808 : +080015a0 : { ADG715_SetRegisterValue(ch1+ch2); } void ADG715_ResetChannels(void) { - 8001808: b580 push {r7, lr} - 800180a: af00 add r7, sp, #0 + 80015a0: b580 push {r7, lr} + 80015a2: af00 add r7, sp, #0 ADG715_SetRegisterValue(0); - 800180c: 2000 movs r0, #0 - 800180e: f7ff ffe3 bl 80017d8 + 80015a4: 2000 movs r0, #0 + 80015a6: f7ff ffe3 bl 8001570 } - 8001812: bf00 nop - 8001814: bd80 pop {r7, pc} + 80015aa: bf00 nop + 80015ac: bd80 pop {r7, pc} ... -08001818 : +080015b0 : * @param: channel = AD5934_CH_REF_100R, AD5934_CH_REF_1K, AD5934_CH_REF_10K, AD5934_CH_PT100, AD5934_CH_PT1000, AD5934_CH_EC, ... * * @return none. ******************************************************************************/ void ADG715_Update(AD5934_Channel_t channel) { - 8001818: b580 push {r7, lr} - 800181a: b082 sub sp, #8 - 800181c: af00 add r7, sp, #0 - 800181e: 4603 mov r3, r0 - 8001820: 71fb strb r3, [r7, #7] + 80015b0: b580 push {r7, lr} + 80015b2: b082 sub sp, #8 + 80015b4: af00 add r7, sp, #0 + 80015b6: 4603 mov r3, r0 + 80015b8: 71fb strb r3, [r7, #7] // Garante que o índice recebido não ultrapassa os limites do vetor if (channel >= AD5934_CH_MAX) - 8001822: 79fb ldrb r3, [r7, #7] - 8001824: 2b0e cmp r3, #14 - 8001826: d810 bhi.n 800184a + 80015ba: 79fb ldrb r3, [r7, #7] + 80015bc: 2b0e cmp r3, #14 + 80015be: d810 bhi.n 80015e2 return; // Envia o byte combinado via I2C (Make-before-break nativo por barramento) ADG715_SetRegisterValue(ADG715_Channel_Map[channel]); - 8001828: 79fb ldrb r3, [r7, #7] - 800182a: 4a0a ldr r2, [pc, #40] @ (8001854 ) - 800182c: 5cd3 ldrb r3, [r2, r3] - 800182e: 4618 mov r0, r3 - 8001830: f7ff ffd2 bl 80017d8 + 80015c0: 79fb ldrb r3, [r7, #7] + 80015c2: 4a0a ldr r2, [pc, #40] @ (80015ec ) + 80015c4: 5cd3 ldrb r3, [r2, r3] + 80015c6: 4618 mov r0, r3 + 80015c8: f7ff ffd2 bl 8001570 // Gestão inteligente do delay de acomodação if (channel >= AD5934_CH_EC_LOW_GAIN) - 8001834: 79fb ldrb r3, [r7, #7] - 8001836: 2b0b cmp r3, #11 - 8001838: d903 bls.n 8001842 + 80015cc: 79fb ldrb r3, [r7, #7] + 80015ce: 2b0b cmp r3, #11 + 80015d0: d903 bls.n 80015da HAL_Delay(20); // Canais de Condutividade Elétrica (CE) necessitam de maior estabilização química - 800183a: 2014 movs r0, #20 - 800183c: f001 fb5e bl 8002efc - 8001840: e004 b.n 800184c + 80015d2: 2014 movs r0, #20 + 80015d4: f001 fad2 bl 8002b7c + 80015d8: e004 b.n 80015e4 else HAL_Delay(10); // Resistores puros e RTD estabilizam mais rapidamente - 8001842: 200a movs r0, #10 - 8001844: f001 fb5a bl 8002efc - 8001848: e000 b.n 800184c + 80015da: 200a movs r0, #10 + 80015dc: f001 face bl 8002b7c + 80015e0: e000 b.n 80015e4 return; - 800184a: bf00 nop + 80015e2: bf00 nop } - 800184c: 3708 adds r7, #8 - 800184e: 46bd mov sp, r7 - 8001850: bd80 pop {r7, pc} - 8001852: bf00 nop - 8001854: 08006794 .word 0x08006794 + 80015e4: 3708 adds r7, #8 + 80015e6: 46bd mov sp, r7 + 80015e8: bd80 pop {r7, pc} + 80015ea: bf00 nop + 80015ec: 080066c0 .word 0x080066c0 -08001858 : +080015f0 : ADC_HandleTypeDef hadc1; ADC_HandleTypeDef hadc2; /* ADC1 init function */ void MX_ADC1_Init(void) { - 8001858: b580 push {r7, lr} - 800185a: b084 sub sp, #16 - 800185c: af00 add r7, sp, #0 + 80015f0: b580 push {r7, lr} + 80015f2: b084 sub sp, #16 + 80015f4: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 800185e: 1d3b adds r3, r7, #4 - 8001860: 2200 movs r2, #0 - 8001862: 601a str r2, [r3, #0] - 8001864: 605a str r2, [r3, #4] - 8001866: 609a str r2, [r3, #8] + 80015f6: 1d3b adds r3, r7, #4 + 80015f8: 2200 movs r2, #0 + 80015fa: 601a str r2, [r3, #0] + 80015fc: 605a str r2, [r3, #4] + 80015fe: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; - 8001868: 4b18 ldr r3, [pc, #96] @ (80018cc ) - 800186a: 4a19 ldr r2, [pc, #100] @ (80018d0 ) - 800186c: 601a str r2, [r3, #0] + 8001600: 4b18 ldr r3, [pc, #96] @ (8001664 ) + 8001602: 4a19 ldr r2, [pc, #100] @ (8001668 ) + 8001604: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; - 800186e: 4b17 ldr r3, [pc, #92] @ (80018cc ) - 8001870: 2200 movs r2, #0 - 8001872: 609a str r2, [r3, #8] + 8001606: 4b17 ldr r3, [pc, #92] @ (8001664 ) + 8001608: 2200 movs r2, #0 + 800160a: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = ENABLE; - 8001874: 4b15 ldr r3, [pc, #84] @ (80018cc ) - 8001876: 2201 movs r2, #1 - 8001878: 731a strb r2, [r3, #12] + 800160c: 4b15 ldr r3, [pc, #84] @ (8001664 ) + 800160e: 2201 movs r2, #1 + 8001610: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; - 800187a: 4b14 ldr r3, [pc, #80] @ (80018cc ) - 800187c: 2200 movs r2, #0 - 800187e: 751a strb r2, [r3, #20] + 8001612: 4b14 ldr r3, [pc, #80] @ (8001664 ) + 8001614: 2200 movs r2, #0 + 8001616: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 8001880: 4b12 ldr r3, [pc, #72] @ (80018cc ) - 8001882: f44f 2260 mov.w r2, #917504 @ 0xe0000 - 8001886: 61da str r2, [r3, #28] + 8001618: 4b12 ldr r3, [pc, #72] @ (8001664 ) + 800161a: f44f 2260 mov.w r2, #917504 @ 0xe0000 + 800161e: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8001888: 4b10 ldr r3, [pc, #64] @ (80018cc ) - 800188a: 2200 movs r2, #0 - 800188c: 605a str r2, [r3, #4] + 8001620: 4b10 ldr r3, [pc, #64] @ (8001664 ) + 8001622: 2200 movs r2, #0 + 8001624: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 1; - 800188e: 4b0f ldr r3, [pc, #60] @ (80018cc ) - 8001890: 2201 movs r2, #1 - 8001892: 611a str r2, [r3, #16] + 8001626: 4b0f ldr r3, [pc, #60] @ (8001664 ) + 8001628: 2201 movs r2, #1 + 800162a: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) - 8001894: 480d ldr r0, [pc, #52] @ (80018cc ) - 8001896: f001 fb55 bl 8002f44 - 800189a: 4603 mov r3, r0 - 800189c: 2b00 cmp r3, #0 - 800189e: d001 beq.n 80018a4 + 800162c: 480d ldr r0, [pc, #52] @ (8001664 ) + 800162e: f001 fac9 bl 8002bc4 + 8001632: 4603 mov r3, r0 + 8001634: 2b00 cmp r3, #0 + 8001636: d001 beq.n 800163c { Error_Handler(); - 80018a0: f001 f8be bl 8002a20 + 8001638: f000 ffb4 bl 80025a4 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_0; - 80018a4: 2300 movs r3, #0 - 80018a6: 607b str r3, [r7, #4] + 800163c: 2300 movs r3, #0 + 800163e: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; - 80018a8: 2301 movs r3, #1 - 80018aa: 60bb str r3, [r7, #8] + 8001640: 2301 movs r3, #1 + 8001642: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; - 80018ac: 2300 movs r3, #0 - 80018ae: 60fb str r3, [r7, #12] + 8001644: 2300 movs r3, #0 + 8001646: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 80018b0: 1d3b adds r3, r7, #4 - 80018b2: 4619 mov r1, r3 - 80018b4: 4805 ldr r0, [pc, #20] @ (80018cc ) - 80018b6: f001 fc1d bl 80030f4 - 80018ba: 4603 mov r3, r0 - 80018bc: 2b00 cmp r3, #0 - 80018be: d001 beq.n 80018c4 + 8001648: 1d3b adds r3, r7, #4 + 800164a: 4619 mov r1, r3 + 800164c: 4805 ldr r0, [pc, #20] @ (8001664 ) + 800164e: f001 fb91 bl 8002d74 + 8001652: 4603 mov r3, r0 + 8001654: 2b00 cmp r3, #0 + 8001656: d001 beq.n 800165c { Error_Handler(); - 80018c0: f001 f8ae bl 8002a20 + 8001658: f000 ffa4 bl 80025a4 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } - 80018c4: bf00 nop - 80018c6: 3710 adds r7, #16 - 80018c8: 46bd mov sp, r7 - 80018ca: bd80 pop {r7, pc} - 80018cc: 2000016c .word 0x2000016c - 80018d0: 40012400 .word 0x40012400 + 800165c: bf00 nop + 800165e: 3710 adds r7, #16 + 8001660: 46bd mov sp, r7 + 8001662: bd80 pop {r7, pc} + 8001664: 200001bc .word 0x200001bc + 8001668: 40012400 .word 0x40012400 -080018d4 : +0800166c : /* ADC2 init function */ void MX_ADC2_Init(void) { - 80018d4: b580 push {r7, lr} - 80018d6: b084 sub sp, #16 - 80018d8: af00 add r7, sp, #0 + 800166c: b580 push {r7, lr} + 800166e: b084 sub sp, #16 + 8001670: af00 add r7, sp, #0 /* USER CODE BEGIN ADC2_Init 0 */ /* USER CODE END ADC2_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 80018da: 1d3b adds r3, r7, #4 - 80018dc: 2200 movs r2, #0 - 80018de: 601a str r2, [r3, #0] - 80018e0: 605a str r2, [r3, #4] - 80018e2: 609a str r2, [r3, #8] + 8001672: 1d3b adds r3, r7, #4 + 8001674: 2200 movs r2, #0 + 8001676: 601a str r2, [r3, #0] + 8001678: 605a str r2, [r3, #4] + 800167a: 609a str r2, [r3, #8] /* USER CODE END ADC2_Init 1 */ /** Common config */ hadc2.Instance = ADC2; - 80018e4: 4b18 ldr r3, [pc, #96] @ (8001948 ) - 80018e6: 4a19 ldr r2, [pc, #100] @ (800194c ) - 80018e8: 601a str r2, [r3, #0] + 800167c: 4b18 ldr r3, [pc, #96] @ (80016e0 ) + 800167e: 4a19 ldr r2, [pc, #100] @ (80016e4 ) + 8001680: 601a str r2, [r3, #0] hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; - 80018ea: 4b17 ldr r3, [pc, #92] @ (8001948 ) - 80018ec: 2200 movs r2, #0 - 80018ee: 609a str r2, [r3, #8] + 8001682: 4b17 ldr r3, [pc, #92] @ (80016e0 ) + 8001684: 2200 movs r2, #0 + 8001686: 609a str r2, [r3, #8] hadc2.Init.ContinuousConvMode = ENABLE; - 80018f0: 4b15 ldr r3, [pc, #84] @ (8001948 ) - 80018f2: 2201 movs r2, #1 - 80018f4: 731a strb r2, [r3, #12] + 8001688: 4b15 ldr r3, [pc, #84] @ (80016e0 ) + 800168a: 2201 movs r2, #1 + 800168c: 731a strb r2, [r3, #12] hadc2.Init.DiscontinuousConvMode = DISABLE; - 80018f6: 4b14 ldr r3, [pc, #80] @ (8001948 ) - 80018f8: 2200 movs r2, #0 - 80018fa: 751a strb r2, [r3, #20] + 800168e: 4b14 ldr r3, [pc, #80] @ (80016e0 ) + 8001690: 2200 movs r2, #0 + 8001692: 751a strb r2, [r3, #20] hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 80018fc: 4b12 ldr r3, [pc, #72] @ (8001948 ) - 80018fe: f44f 2260 mov.w r2, #917504 @ 0xe0000 - 8001902: 61da str r2, [r3, #28] + 8001694: 4b12 ldr r3, [pc, #72] @ (80016e0 ) + 8001696: f44f 2260 mov.w r2, #917504 @ 0xe0000 + 800169a: 61da str r2, [r3, #28] hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8001904: 4b10 ldr r3, [pc, #64] @ (8001948 ) - 8001906: 2200 movs r2, #0 - 8001908: 605a str r2, [r3, #4] + 800169c: 4b10 ldr r3, [pc, #64] @ (80016e0 ) + 800169e: 2200 movs r2, #0 + 80016a0: 605a str r2, [r3, #4] hadc2.Init.NbrOfConversion = 1; - 800190a: 4b0f ldr r3, [pc, #60] @ (8001948 ) - 800190c: 2201 movs r2, #1 - 800190e: 611a str r2, [r3, #16] + 80016a2: 4b0f ldr r3, [pc, #60] @ (80016e0 ) + 80016a4: 2201 movs r2, #1 + 80016a6: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc2) != HAL_OK) - 8001910: 480d ldr r0, [pc, #52] @ (8001948 ) - 8001912: f001 fb17 bl 8002f44 - 8001916: 4603 mov r3, r0 - 8001918: 2b00 cmp r3, #0 - 800191a: d001 beq.n 8001920 + 80016a8: 480d ldr r0, [pc, #52] @ (80016e0 ) + 80016aa: f001 fa8b bl 8002bc4 + 80016ae: 4603 mov r3, r0 + 80016b0: 2b00 cmp r3, #0 + 80016b2: d001 beq.n 80016b8 { Error_Handler(); - 800191c: f001 f880 bl 8002a20 + 80016b4: f000 ff76 bl 80025a4 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_1; - 8001920: 2301 movs r3, #1 - 8001922: 607b str r3, [r7, #4] + 80016b8: 2301 movs r3, #1 + 80016ba: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; - 8001924: 2301 movs r3, #1 - 8001926: 60bb str r3, [r7, #8] + 80016bc: 2301 movs r3, #1 + 80016be: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; - 8001928: 2300 movs r3, #0 - 800192a: 60fb str r3, [r7, #12] + 80016c0: 2300 movs r3, #0 + 80016c2: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) - 800192c: 1d3b adds r3, r7, #4 - 800192e: 4619 mov r1, r3 - 8001930: 4805 ldr r0, [pc, #20] @ (8001948 ) - 8001932: f001 fbdf bl 80030f4 - 8001936: 4603 mov r3, r0 - 8001938: 2b00 cmp r3, #0 - 800193a: d001 beq.n 8001940 + 80016c4: 1d3b adds r3, r7, #4 + 80016c6: 4619 mov r1, r3 + 80016c8: 4805 ldr r0, [pc, #20] @ (80016e0 ) + 80016ca: f001 fb53 bl 8002d74 + 80016ce: 4603 mov r3, r0 + 80016d0: 2b00 cmp r3, #0 + 80016d2: d001 beq.n 80016d8 { Error_Handler(); - 800193c: f001 f870 bl 8002a20 + 80016d4: f000 ff66 bl 80025a4 } /* USER CODE BEGIN ADC2_Init 2 */ /* USER CODE END ADC2_Init 2 */ } - 8001940: bf00 nop - 8001942: 3710 adds r7, #16 - 8001944: 46bd mov sp, r7 - 8001946: bd80 pop {r7, pc} - 8001948: 2000019c .word 0x2000019c - 800194c: 40012800 .word 0x40012800 + 80016d8: bf00 nop + 80016da: 3710 adds r7, #16 + 80016dc: 46bd mov sp, r7 + 80016de: bd80 pop {r7, pc} + 80016e0: 200001ec .word 0x200001ec + 80016e4: 40012800 .word 0x40012800 -08001950 : +080016e8 : void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { - 8001950: b580 push {r7, lr} - 8001952: b08a sub sp, #40 @ 0x28 - 8001954: af00 add r7, sp, #0 - 8001956: 6078 str r0, [r7, #4] + 80016e8: b580 push {r7, lr} + 80016ea: b08a sub sp, #40 @ 0x28 + 80016ec: af00 add r7, sp, #0 + 80016ee: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001958: f107 0318 add.w r3, r7, #24 - 800195c: 2200 movs r2, #0 - 800195e: 601a str r2, [r3, #0] - 8001960: 605a str r2, [r3, #4] - 8001962: 609a str r2, [r3, #8] - 8001964: 60da str r2, [r3, #12] + 80016f0: f107 0318 add.w r3, r7, #24 + 80016f4: 2200 movs r2, #0 + 80016f6: 601a str r2, [r3, #0] + 80016f8: 605a str r2, [r3, #4] + 80016fa: 609a str r2, [r3, #8] + 80016fc: 60da str r2, [r3, #12] if(adcHandle->Instance==ADC1) - 8001966: 687b ldr r3, [r7, #4] - 8001968: 681b ldr r3, [r3, #0] - 800196a: 4a28 ldr r2, [pc, #160] @ (8001a0c ) - 800196c: 4293 cmp r3, r2 - 800196e: d122 bne.n 80019b6 + 80016fe: 687b ldr r3, [r7, #4] + 8001700: 681b ldr r3, [r3, #0] + 8001702: 4a28 ldr r2, [pc, #160] @ (80017a4 ) + 8001704: 4293 cmp r3, r2 + 8001706: d122 bne.n 800174e { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* ADC1 clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); - 8001970: 4b27 ldr r3, [pc, #156] @ (8001a10 ) - 8001972: 699b ldr r3, [r3, #24] - 8001974: 4a26 ldr r2, [pc, #152] @ (8001a10 ) - 8001976: f443 7300 orr.w r3, r3, #512 @ 0x200 - 800197a: 6193 str r3, [r2, #24] - 800197c: 4b24 ldr r3, [pc, #144] @ (8001a10 ) - 800197e: 699b ldr r3, [r3, #24] - 8001980: f403 7300 and.w r3, r3, #512 @ 0x200 - 8001984: 617b str r3, [r7, #20] - 8001986: 697b ldr r3, [r7, #20] + 8001708: 4b27 ldr r3, [pc, #156] @ (80017a8 ) + 800170a: 699b ldr r3, [r3, #24] + 800170c: 4a26 ldr r2, [pc, #152] @ (80017a8 ) + 800170e: f443 7300 orr.w r3, r3, #512 @ 0x200 + 8001712: 6193 str r3, [r2, #24] + 8001714: 4b24 ldr r3, [pc, #144] @ (80017a8 ) + 8001716: 699b ldr r3, [r3, #24] + 8001718: f403 7300 and.w r3, r3, #512 @ 0x200 + 800171c: 617b str r3, [r7, #20] + 800171e: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001988: 4b21 ldr r3, [pc, #132] @ (8001a10 ) - 800198a: 699b ldr r3, [r3, #24] - 800198c: 4a20 ldr r2, [pc, #128] @ (8001a10 ) - 800198e: f043 0304 orr.w r3, r3, #4 - 8001992: 6193 str r3, [r2, #24] - 8001994: 4b1e ldr r3, [pc, #120] @ (8001a10 ) - 8001996: 699b ldr r3, [r3, #24] - 8001998: f003 0304 and.w r3, r3, #4 - 800199c: 613b str r3, [r7, #16] - 800199e: 693b ldr r3, [r7, #16] + 8001720: 4b21 ldr r3, [pc, #132] @ (80017a8 ) + 8001722: 699b ldr r3, [r3, #24] + 8001724: 4a20 ldr r2, [pc, #128] @ (80017a8 ) + 8001726: f043 0304 orr.w r3, r3, #4 + 800172a: 6193 str r3, [r2, #24] + 800172c: 4b1e ldr r3, [pc, #120] @ (80017a8 ) + 800172e: 699b ldr r3, [r3, #24] + 8001730: f003 0304 and.w r3, r3, #4 + 8001734: 613b str r3, [r7, #16] + 8001736: 693b ldr r3, [r7, #16] /**ADC1 GPIO Configuration PA0-WKUP ------> ADC1_IN0 PA1 ------> ADC1_IN1 */ GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin; - 80019a0: 2303 movs r3, #3 - 80019a2: 61bb str r3, [r7, #24] + 8001738: 2303 movs r3, #3 + 800173a: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 80019a4: 2303 movs r3, #3 - 80019a6: 61fb str r3, [r7, #28] + 800173c: 2303 movs r3, #3 + 800173e: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80019a8: f107 0318 add.w r3, r7, #24 - 80019ac: 4619 mov r1, r3 - 80019ae: 4819 ldr r0, [pc, #100] @ (8001a14 ) - 80019b0: f002 f89a bl 8003ae8 + 8001740: f107 0318 add.w r3, r7, #24 + 8001744: 4619 mov r1, r3 + 8001746: 4819 ldr r0, [pc, #100] @ (80017ac ) + 8001748: f001 fe0e bl 8003368 /* USER CODE BEGIN ADC2_MspInit 1 */ /* USER CODE END ADC2_MspInit 1 */ } } - 80019b4: e026 b.n 8001a04 + 800174c: e026 b.n 800179c else if(adcHandle->Instance==ADC2) - 80019b6: 687b ldr r3, [r7, #4] - 80019b8: 681b ldr r3, [r3, #0] - 80019ba: 4a17 ldr r2, [pc, #92] @ (8001a18 ) - 80019bc: 4293 cmp r3, r2 - 80019be: d121 bne.n 8001a04 + 800174e: 687b ldr r3, [r7, #4] + 8001750: 681b ldr r3, [r3, #0] + 8001752: 4a17 ldr r2, [pc, #92] @ (80017b0 ) + 8001754: 4293 cmp r3, r2 + 8001756: d121 bne.n 800179c __HAL_RCC_ADC2_CLK_ENABLE(); - 80019c0: 4b13 ldr r3, [pc, #76] @ (8001a10 ) - 80019c2: 699b ldr r3, [r3, #24] - 80019c4: 4a12 ldr r2, [pc, #72] @ (8001a10 ) - 80019c6: f443 6380 orr.w r3, r3, #1024 @ 0x400 - 80019ca: 6193 str r3, [r2, #24] - 80019cc: 4b10 ldr r3, [pc, #64] @ (8001a10 ) - 80019ce: 699b ldr r3, [r3, #24] - 80019d0: f403 6380 and.w r3, r3, #1024 @ 0x400 - 80019d4: 60fb str r3, [r7, #12] - 80019d6: 68fb ldr r3, [r7, #12] + 8001758: 4b13 ldr r3, [pc, #76] @ (80017a8 ) + 800175a: 699b ldr r3, [r3, #24] + 800175c: 4a12 ldr r2, [pc, #72] @ (80017a8 ) + 800175e: f443 6380 orr.w r3, r3, #1024 @ 0x400 + 8001762: 6193 str r3, [r2, #24] + 8001764: 4b10 ldr r3, [pc, #64] @ (80017a8 ) + 8001766: 699b ldr r3, [r3, #24] + 8001768: f403 6380 and.w r3, r3, #1024 @ 0x400 + 800176c: 60fb str r3, [r7, #12] + 800176e: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80019d8: 4b0d ldr r3, [pc, #52] @ (8001a10 ) - 80019da: 699b ldr r3, [r3, #24] - 80019dc: 4a0c ldr r2, [pc, #48] @ (8001a10 ) - 80019de: f043 0304 orr.w r3, r3, #4 - 80019e2: 6193 str r3, [r2, #24] - 80019e4: 4b0a ldr r3, [pc, #40] @ (8001a10 ) - 80019e6: 699b ldr r3, [r3, #24] - 80019e8: f003 0304 and.w r3, r3, #4 - 80019ec: 60bb str r3, [r7, #8] - 80019ee: 68bb ldr r3, [r7, #8] + 8001770: 4b0d ldr r3, [pc, #52] @ (80017a8 ) + 8001772: 699b ldr r3, [r3, #24] + 8001774: 4a0c ldr r2, [pc, #48] @ (80017a8 ) + 8001776: f043 0304 orr.w r3, r3, #4 + 800177a: 6193 str r3, [r2, #24] + 800177c: 4b0a ldr r3, [pc, #40] @ (80017a8 ) + 800177e: 699b ldr r3, [r3, #24] + 8001780: f003 0304 and.w r3, r3, #4 + 8001784: 60bb str r3, [r7, #8] + 8001786: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin; - 80019f0: 2303 movs r3, #3 - 80019f2: 61bb str r3, [r7, #24] + 8001788: 2303 movs r3, #3 + 800178a: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 80019f4: 2303 movs r3, #3 - 80019f6: 61fb str r3, [r7, #28] + 800178c: 2303 movs r3, #3 + 800178e: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80019f8: f107 0318 add.w r3, r7, #24 - 80019fc: 4619 mov r1, r3 - 80019fe: 4805 ldr r0, [pc, #20] @ (8001a14 ) - 8001a00: f002 f872 bl 8003ae8 + 8001790: f107 0318 add.w r3, r7, #24 + 8001794: 4619 mov r1, r3 + 8001796: 4805 ldr r0, [pc, #20] @ (80017ac ) + 8001798: f001 fde6 bl 8003368 } - 8001a04: bf00 nop - 8001a06: 3728 adds r7, #40 @ 0x28 - 8001a08: 46bd mov sp, r7 - 8001a0a: bd80 pop {r7, pc} - 8001a0c: 40012400 .word 0x40012400 - 8001a10: 40021000 .word 0x40021000 - 8001a14: 40010800 .word 0x40010800 - 8001a18: 40012800 .word 0x40012800 + 800179c: bf00 nop + 800179e: 3728 adds r7, #40 @ 0x28 + 80017a0: 46bd mov sp, r7 + 80017a2: bd80 pop {r7, pc} + 80017a4: 40012400 .word 0x40012400 + 80017a8: 40021000 .word 0x40021000 + 80017ac: 40010800 .word 0x40010800 + 80017b0: 40012800 .word 0x40012800 -08001a1c : +080017b4 : +ADS1015_filter_t g_ph_filter = {0}; -ADS1015_I2C i2c; -float ph_dut_samples[ADS1015_PH_AVERAGES]={0}; +volatile ADS1015_State_t ads1015_state = ADS1015_IDLE; // Write the register static void writeRegister(ADS1015_I2C *i2c, uint8_t reg, uint16_t value) { - 8001a1c: b580 push {r7, lr} - 8001a1e: b086 sub sp, #24 - 8001a20: af02 add r7, sp, #8 - 8001a22: 6078 str r0, [r7, #4] - 8001a24: 460b mov r3, r1 - 8001a26: 70fb strb r3, [r7, #3] - 8001a28: 4613 mov r3, r2 - 8001a2a: 803b strh r3, [r7, #0] + 80017b4: b580 push {r7, lr} + 80017b6: b086 sub sp, #24 + 80017b8: af02 add r7, sp, #8 + 80017ba: 6078 str r0, [r7, #4] + 80017bc: 460b mov r3, r1 + 80017be: 70fb strb r3, [r7, #3] + 80017c0: 4613 mov r3, r2 + 80017c2: 803b strh r3, [r7, #0] uint8_t pData[3] = { reg, (uint8_t) (value >> 8), (uint8_t) (value & 0xFF) }; - 8001a2c: 78fb ldrb r3, [r7, #3] - 8001a2e: 733b strb r3, [r7, #12] - 8001a30: 883b ldrh r3, [r7, #0] - 8001a32: 0a1b lsrs r3, r3, #8 - 8001a34: b29b uxth r3, r3 - 8001a36: b2db uxtb r3, r3 - 8001a38: 737b strb r3, [r7, #13] - 8001a3a: 883b ldrh r3, [r7, #0] - 8001a3c: b2db uxtb r3, r3 - 8001a3e: 73bb strb r3, [r7, #14] + 80017c4: 78fb ldrb r3, [r7, #3] + 80017c6: 733b strb r3, [r7, #12] + 80017c8: 883b ldrh r3, [r7, #0] + 80017ca: 0a1b lsrs r3, r3, #8 + 80017cc: b29b uxth r3, r3 + 80017ce: b2db uxtb r3, r3 + 80017d0: 737b strb r3, [r7, #13] + 80017d2: 883b ldrh r3, [r7, #0] + 80017d4: b2db uxtb r3, r3 + 80017d6: 73bb strb r3, [r7, #14] HAL_I2C_Master_Transmit(i2c->hi2c, i2c->m_i2cAddress, pData, 3, 10); - 8001a40: 687b ldr r3, [r7, #4] - 8001a42: 68d8 ldr r0, [r3, #12] - 8001a44: 687b ldr r3, [r7, #4] - 8001a46: 8819 ldrh r1, [r3, #0] - 8001a48: f107 020c add.w r2, r7, #12 - 8001a4c: 230a movs r3, #10 - 8001a4e: 9300 str r3, [sp, #0] - 8001a50: 2303 movs r3, #3 - 8001a52: f002 fb59 bl 8004108 + 80017d8: 687b ldr r3, [r7, #4] + 80017da: 68d8 ldr r0, [r3, #12] + 80017dc: 687b ldr r3, [r7, #4] + 80017de: 8819 ldrh r1, [r3, #0] + 80017e0: f107 020c add.w r2, r7, #12 + 80017e4: 230a movs r3, #10 + 80017e6: 9300 str r3, [sp, #0] + 80017e8: 2303 movs r3, #3 + 80017ea: f002 f8cd bl 8003988 } - 8001a56: bf00 nop - 8001a58: 3710 adds r7, #16 - 8001a5a: 46bd mov sp, r7 - 8001a5c: bd80 pop {r7, pc} + 80017ee: bf00 nop + 80017f0: 3710 adds r7, #16 + 80017f2: 46bd mov sp, r7 + 80017f4: bd80 pop {r7, pc} -08001a5e : +080017f6 : // Read the register static uint16_t readRegister(ADS1015_I2C *i2c, uint8_t reg) { - 8001a5e: b580 push {r7, lr} - 8001a60: b086 sub sp, #24 - 8001a62: af02 add r7, sp, #8 - 8001a64: 6078 str r0, [r7, #4] - 8001a66: 460b mov r3, r1 - 8001a68: 70fb strb r3, [r7, #3] + 80017f6: b580 push {r7, lr} + 80017f8: b086 sub sp, #24 + 80017fa: af02 add r7, sp, #8 + 80017fc: 6078 str r0, [r7, #4] + 80017fe: 460b mov r3, r1 + 8001800: 70fb strb r3, [r7, #3] HAL_I2C_Master_Transmit(i2c->hi2c, i2c->m_i2cAddress, ®, 1, 10); - 8001a6a: 687b ldr r3, [r7, #4] - 8001a6c: 68d8 ldr r0, [r3, #12] - 8001a6e: 687b ldr r3, [r7, #4] - 8001a70: 8819 ldrh r1, [r3, #0] - 8001a72: 1cfa adds r2, r7, #3 - 8001a74: 230a movs r3, #10 - 8001a76: 9300 str r3, [sp, #0] - 8001a78: 2301 movs r3, #1 - 8001a7a: f002 fb45 bl 8004108 + 8001802: 687b ldr r3, [r7, #4] + 8001804: 68d8 ldr r0, [r3, #12] + 8001806: 687b ldr r3, [r7, #4] + 8001808: 8819 ldrh r1, [r3, #0] + 800180a: 1cfa adds r2, r7, #3 + 800180c: 230a movs r3, #10 + 800180e: 9300 str r3, [sp, #0] + 8001810: 2301 movs r3, #1 + 8001812: f002 f8b9 bl 8003988 uint8_t pData[2] = { 0, 0 }; - 8001a7e: 2300 movs r3, #0 - 8001a80: 81bb strh r3, [r7, #12] + 8001816: 2300 movs r3, #0 + 8001818: 81bb strh r3, [r7, #12] HAL_I2C_Master_Receive(i2c->hi2c, i2c->m_i2cAddress, pData, 2, 10); - 8001a82: 687b ldr r3, [r7, #4] - 8001a84: 68d8 ldr r0, [r3, #12] - 8001a86: 687b ldr r3, [r7, #4] - 8001a88: 8819 ldrh r1, [r3, #0] - 8001a8a: f107 020c add.w r2, r7, #12 - 8001a8e: 230a movs r3, #10 - 8001a90: 9300 str r3, [sp, #0] - 8001a92: 2302 movs r3, #2 - 8001a94: f002 fc36 bl 8004304 + 800181a: 687b ldr r3, [r7, #4] + 800181c: 68d8 ldr r0, [r3, #12] + 800181e: 687b ldr r3, [r7, #4] + 8001820: 8819 ldrh r1, [r3, #0] + 8001822: f107 020c add.w r2, r7, #12 + 8001826: 230a movs r3, #10 + 8001828: 9300 str r3, [sp, #0] + 800182a: 2302 movs r3, #2 + 800182c: f002 f9aa bl 8003b84 return ((pData[0] << 8) | pData[1]); - 8001a98: 7b3b ldrb r3, [r7, #12] - 8001a9a: b21b sxth r3, r3 - 8001a9c: 021b lsls r3, r3, #8 - 8001a9e: b21a sxth r2, r3 - 8001aa0: 7b7b ldrb r3, [r7, #13] - 8001aa2: b21b sxth r3, r3 - 8001aa4: 4313 orrs r3, r2 - 8001aa6: b21b sxth r3, r3 - 8001aa8: b29b uxth r3, r3 + 8001830: 7b3b ldrb r3, [r7, #12] + 8001832: b21b sxth r3, r3 + 8001834: 021b lsls r3, r3, #8 + 8001836: b21a sxth r2, r3 + 8001838: 7b7b ldrb r3, [r7, #13] + 800183a: b21b sxth r3, r3 + 800183c: 4313 orrs r3, r2 + 800183e: b21b sxth r3, r3 + 8001840: b29b uxth r3, r3 } - 8001aaa: 4618 mov r0, r3 - 8001aac: 3710 adds r7, #16 - 8001aae: 46bd mov sp, r7 - 8001ab0: bd80 pop {r7, pc} + 8001842: 4618 mov r0, r3 + 8001844: 3710 adds r7, #16 + 8001846: 46bd mov sp, r7 + 8001848: bd80 pop {r7, pc} -08001ab2 : +0800184a : HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_SET); // This MUST have GPIO PA5 ready to use - ERROR I2C - Wrong address } // Declare an ADS1015 structure void ADS1015(ADS1015_I2C *i2c, I2C_HandleTypeDef *hi2c, uint8_t i2cAddress) { - 8001ab2: b480 push {r7} - 8001ab4: b085 sub sp, #20 - 8001ab6: af00 add r7, sp, #0 - 8001ab8: 60f8 str r0, [r7, #12] - 8001aba: 60b9 str r1, [r7, #8] - 8001abc: 4613 mov r3, r2 - 8001abe: 71fb strb r3, [r7, #7] + 800184a: b480 push {r7} + 800184c: b085 sub sp, #20 + 800184e: af00 add r7, sp, #0 + 8001850: 60f8 str r0, [r7, #12] + 8001852: 60b9 str r1, [r7, #8] + 8001854: 4613 mov r3, r2 + 8001856: 71fb strb r3, [r7, #7] i2c->hi2c = hi2c; - 8001ac0: 68fb ldr r3, [r7, #12] - 8001ac2: 68ba ldr r2, [r7, #8] - 8001ac4: 60da str r2, [r3, #12] - i2c->m_i2cAddress = i2cAddress << 1; // It's Important to shift the address << 1 - 8001ac6: 79fb ldrb r3, [r7, #7] - 8001ac8: b29b uxth r3, r3 - 8001aca: 005b lsls r3, r3, #1 - 8001acc: b29a uxth r2, r3 - 8001ace: 68fb ldr r3, [r7, #12] - 8001ad0: 801a strh r2, [r3, #0] + 8001858: 68fb ldr r3, [r7, #12] + 800185a: 68ba ldr r2, [r7, #8] + 800185c: 60da str r2, [r3, #12] + i2c->m_i2cAddress = i2cAddress; // << 1; // It's Important to shift the address << 1 + 800185e: 79fb ldrb r3, [r7, #7] + 8001860: b29a uxth r2, r3 + 8001862: 68fb ldr r3, [r7, #12] + 8001864: 801a strh r2, [r3, #0] i2c->m_conversionDelay = ADS1015_CONVERSIONDELAY; - 8001ad2: 68fb ldr r3, [r7, #12] - 8001ad4: 2204 movs r2, #4 - 8001ad6: 605a str r2, [r3, #4] + 8001866: 68fb ldr r3, [r7, #12] + 8001868: 2204 movs r2, #4 + 800186a: 605a str r2, [r3, #4] i2c->m_bitShift = 4; - 8001ad8: 68fb ldr r3, [r7, #12] - 8001ada: 2204 movs r2, #4 - 8001adc: 721a strb r2, [r3, #8] - i2c->m_gain = GAIN_TWOTHIRDS; /* +/- 6.144V range (limited to VDD +0.3V max!) */ - 8001ade: 68fb ldr r3, [r7, #12] - 8001ae0: 2200 movs r2, #0 - 8001ae2: 815a strh r2, [r3, #10] + 800186c: 68fb ldr r3, [r7, #12] + 800186e: 2204 movs r2, #4 + 8001870: 721a strb r2, [r3, #8] + i2c->m_gain = GAIN_SIXTEEN; /* +/- 6.144V range (limited to VDD +0.3V max!) */ + 8001872: 68fb ldr r3, [r7, #12] + 8001874: f44f 6220 mov.w r2, #2560 @ 0xa00 + 8001878: 815a strh r2, [r3, #10] //ADSbegin(i2c); //Ready is not used } - 8001ae4: bf00 nop - 8001ae6: 3714 adds r7, #20 - 8001ae8: 46bd mov sp, r7 - 8001aea: bc80 pop {r7} - 8001aec: 4770 bx lr + 800187a: bf00 nop + 800187c: 3714 adds r7, #20 + 800187e: 46bd mov sp, r7 + 8001880: bc80 pop {r7} + 8001882: 4770 bx lr -08001aee : - // ADSsetGain(GAIN_TWO); // 2x gain +/- 2.048V 1 bit = 1mV 0.0625mV - // ADSsetGain(GAIN_FOUR); // 4x gain +/- 1.024V 1 bit = 0.5mV 0.03125mV - // ADSsetGain(GAIN_EIGHT); // 8x gain +/- 0.512V 1 bit = 0.25mV 0.015625mV - // ADSsetGain(GAIN_SIXTEEN); // 16x gain +/- 0.256V 1 bit = 0.125mV 0.0078125mV - */ -void ADSsetGain(ADS1015_I2C *i2c, adsGain_t gain) { - 8001aee: b480 push {r7} - 8001af0: b083 sub sp, #12 - 8001af2: af00 add r7, sp, #0 - 8001af4: 6078 str r0, [r7, #4] - 8001af6: 460b mov r3, r1 - 8001af8: 807b strh r3, [r7, #2] - i2c->m_gain = gain; - 8001afa: 687b ldr r3, [r7, #4] - 8001afc: 887a ldrh r2, [r7, #2] - 8001afe: 815a strh r2, [r3, #10] +08001884 : + + + + +void ADS1015_Process_System(void) +{ + 8001884: b580 push {r7, lr} + 8001886: b082 sub sp, #8 + 8001888: af00 add r7, sp, #0 + static uint32_t state_timer = 0; + static uint32_t sample_count = 0; + uint16_t config_reg = 0; + 800188a: 2300 movs r3, #0 + 800188c: 80fb strh r3, [r7, #6] + + switch (ads1015_state) + 800188e: 4b3d ldr r3, [pc, #244] @ (8001984 ) + 8001890: 781b ldrb r3, [r3, #0] + 8001892: b2db uxtb r3, r3 + 8001894: 2b04 cmp r3, #4 + 8001896: d870 bhi.n 800197a + 8001898: a201 add r2, pc, #4 @ (adr r2, 80018a0 ) + 800189a: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 800189e: bf00 nop + 80018a0: 080018b5 .word 0x080018b5 + 80018a4: 080018c3 .word 0x080018c3 + 80018a8: 080018df .word 0x080018df + 80018ac: 08001909 .word 0x08001909 + 80018b0: 0800195f .word 0x0800195f + { + case ADS1015_IDLE: + sample_count = 0; + 80018b4: 4b34 ldr r3, [pc, #208] @ (8001988 ) + 80018b6: 2200 movs r2, #0 + 80018b8: 601a str r2, [r3, #0] + ads1015_state = ADS1015_START_CONVERSION; + 80018ba: 4b32 ldr r3, [pc, #200] @ (8001984 ) + 80018bc: 2201 movs r2, #1 + 80018be: 701a strb r2, [r3, #0] + break; + 80018c0: e05b b.n 800197a + + case ADS1015_START_CONVERSION: + state_timer = g_ms_counter; + 80018c2: 4b32 ldr r3, [pc, #200] @ (800198c ) + 80018c4: 681b ldr r3, [r3, #0] + 80018c6: 4a32 ldr r2, [pc, #200] @ (8001990 ) + 80018c8: 6013 str r3, [r2, #0] + + /* Escreve no Config Register (P[1:0]=01b) com OS=1 para + * iniciar a conversão single-shot. O bit OS só tem efeito + * quando o dispositivo está em power-down (seção 7.4.2.1) */ + // Write config register to the ADC + writeRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONFIG, ADS1015_CONFIG_START_SINGLE); + 80018ca: f648 3203 movw r2, #35587 @ 0x8b03 + 80018ce: 2101 movs r1, #1 + 80018d0: 4830 ldr r0, [pc, #192] @ (8001994 ) + 80018d2: f7ff ff6f bl 80017b4 + + ads1015_state = ADS1015_WAIT_CONVERSION; + 80018d6: 4b2b ldr r3, [pc, #172] @ (8001984 ) + 80018d8: 2202 movs r2, #2 + 80018da: 701a strb r2, [r3, #0] + break; + 80018dc: e04d b.n 800197a + * 0b = dispositivo ainda convertendo + * 1b = conversão concluída, dado pronto no Conversion Register + * (Tabela 8-4, descrição do bit OS) + */ + + config_reg = readRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONFIG); + 80018de: 2101 movs r1, #1 + 80018e0: 482c ldr r0, [pc, #176] @ (8001994 ) + 80018e2: f7ff ff88 bl 80017f6 + 80018e6: 4603 mov r3, r0 + 80018e8: 80fb strh r3, [r7, #6] + + if (((config_reg & ADS1015_REG_CONFIG_OS_SINGLE) != 0) && (g_ms_counter - state_timer)>ADS1015_TIME_PER_SAMPLE) + 80018ea: f9b7 3006 ldrsh.w r3, [r7, #6] + 80018ee: 2b00 cmp r3, #0 + 80018f0: da40 bge.n 8001974 + 80018f2: 4b26 ldr r3, [pc, #152] @ (800198c ) + 80018f4: 681a ldr r2, [r3, #0] + 80018f6: 4b26 ldr r3, [pc, #152] @ (8001990 ) + 80018f8: 681b ldr r3, [r3, #0] + 80018fa: 1ad3 subs r3, r2, r3 + 80018fc: 2b09 cmp r3, #9 + 80018fe: d939 bls.n 8001974 + { + ads1015_state = ADS1015_READ_DATA; + 8001900: 4b20 ldr r3, [pc, #128] @ (8001984 ) + 8001902: 2203 movs r2, #3 + 8001904: 701a strb r2, [r3, #0] + } + // (opcional) tratar timeout comparando g_ms_counter - state_timer + // Datasheet: conversão single-cycle, tempo = 1/DR (ex: 1600SPS ≈ 625µs) + break; + 8001906: e035 b.n 8001974 + case ADS1015_READ_DATA: + { + /* Muda o Address Pointer para o Conversion Register (P[1:0]=00b) + * e lê os 16 bits. Dado é 12 bits em complemento de 2, + * left-justified em D[15:4]; D[3:0] sempre lê 0h (Tabela 8-3) */ + int16_t raw = (int16_t)readRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONVERT); + 8001908: 2100 movs r1, #0 + 800190a: 4822 ldr r0, [pc, #136] @ (8001994 ) + 800190c: f7ff ff73 bl 80017f6 + 8001910: 4603 mov r3, r0 + 8001912: 80bb strh r3, [r7, #4] + raw >>= 4; // remove os 4 bits reservados (D[3:0]), resultado = 12 bits signed + 8001914: f9b7 3004 ldrsh.w r3, [r7, #4] + 8001918: 111b asrs r3, r3, #4 + 800191a: 80bb strh r3, [r7, #4] + + float value = (float)(4096 - raw); // ((float)raw * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; // usa FSR configurado no PGA + 800191c: f9b7 3004 ldrsh.w r3, [r7, #4] + 8001920: f5c3 5380 rsb r3, r3, #4096 @ 0x1000 + 8001924: 4618 mov r0, r3 + 8001926: f7ff f869 bl 80009fc <__aeabi_i2f> + 800192a: 4603 mov r3, r0 + 800192c: 603b str r3, [r7, #0] + + ADS1015_pH_NewSample(value); + 800192e: 6838 ldr r0, [r7, #0] + 8001930: f000 f986 bl 8001c40 + + sample_count++; + 8001934: 4b14 ldr r3, [pc, #80] @ (8001988 ) + 8001936: 681b ldr r3, [r3, #0] + 8001938: 3301 adds r3, #1 + 800193a: 4a13 ldr r2, [pc, #76] @ (8001988 ) + 800193c: 6013 str r3, [r2, #0] + + if (sample_count >= ADS1015_BURST_SIZE) + 800193e: 4b12 ldr r3, [pc, #72] @ (8001988 ) + 8001940: 681b ldr r3, [r3, #0] + 8001942: 2b04 cmp r3, #4 + 8001944: d903 bls.n 800194e + { + ads1015_state = ADS1015_IDLE; + 8001946: 4b0f ldr r3, [pc, #60] @ (8001984 ) + 8001948: 2200 movs r2, #0 + 800194a: 701a strb r2, [r3, #0] + { + state_timer = g_ms_counter; + ads1015_state = ADS1015_WAIT_NEXT_SAMPLE; + } + } + break; + 800194c: e015 b.n 800197a + state_timer = g_ms_counter; + 800194e: 4b0f ldr r3, [pc, #60] @ (800198c ) + 8001950: 681b ldr r3, [r3, #0] + 8001952: 4a0f ldr r2, [pc, #60] @ (8001990 ) + 8001954: 6013 str r3, [r2, #0] + ads1015_state = ADS1015_WAIT_NEXT_SAMPLE; + 8001956: 4b0b ldr r3, [pc, #44] @ (8001984 ) + 8001958: 2204 movs r2, #4 + 800195a: 701a strb r2, [r3, #0] + break; + 800195c: e00d b.n 800197a + + case ADS1015_WAIT_NEXT_SAMPLE: + if ((g_ms_counter - state_timer) >= ADS1015_TIME_PER_SAMPLE) + 800195e: 4b0b ldr r3, [pc, #44] @ (800198c ) + 8001960: 681a ldr r2, [r3, #0] + 8001962: 4b0b ldr r3, [pc, #44] @ (8001990 ) + 8001964: 681b ldr r3, [r3, #0] + 8001966: 1ad3 subs r3, r2, r3 + 8001968: 2b08 cmp r3, #8 + 800196a: d905 bls.n 8001978 + { + ads1015_state = ADS1015_START_CONVERSION; + 800196c: 4b05 ldr r3, [pc, #20] @ (8001984 ) + 800196e: 2201 movs r2, #1 + 8001970: 701a strb r2, [r3, #0] + } + break; + 8001972: e001 b.n 8001978 + break; + 8001974: bf00 nop + 8001976: e000 b.n 800197a + break; + 8001978: bf00 nop + } } - 8001b00: bf00 nop - 8001b02: 370c adds r7, #12 - 8001b04: 46bd mov sp, r7 - 8001b06: bc80 pop {r7} - 8001b08: 4770 bx lr + 800197a: bf00 nop + 800197c: 3708 adds r7, #8 + 800197e: 46bd mov sp, r7 + 8001980: bd80 pop {r7, pc} + 8001982: bf00 nop + 8001984: 20000278 .word 0x20000278 + 8001988: 2000027c .word 0x2000027c + 800198c: 200000b4 .word 0x200000b4 + 8001990: 20000280 .word 0x20000280 + 8001994: 2000021c .word 0x2000021c + +08001998 : +/** +* Simple insertion sort - BURST_SIZE is small, so the cost is negligible +* and it avoids depending on qsort/heap allocation. +**/ +void ADS1015_Sort_Array(float *v, uint8_t n) +{ + 8001998: b580 push {r7, lr} + 800199a: b084 sub sp, #16 + 800199c: af00 add r7, sp, #0 + 800199e: 6078 str r0, [r7, #4] + 80019a0: 460b mov r3, r1 + 80019a2: 70fb strb r3, [r7, #3] + for (uint8_t i = 1; i < n; i++) + 80019a4: 2301 movs r3, #1 + 80019a6: 73fb strb r3, [r7, #15] + 80019a8: e039 b.n 8001a1e + { + float key = v[i]; + 80019aa: 7bfb ldrb r3, [r7, #15] + 80019ac: 009b lsls r3, r3, #2 + 80019ae: 687a ldr r2, [r7, #4] + 80019b0: 4413 add r3, r2 + 80019b2: 681b ldr r3, [r3, #0] + 80019b4: 60bb str r3, [r7, #8] + int8_t j = (int8_t)i - 1; + 80019b6: 7bfb ldrb r3, [r7, #15] + 80019b8: 3b01 subs r3, #1 + 80019ba: b2db uxtb r3, r3 + 80019bc: 73bb strb r3, [r7, #14] + while (j >= 0 && v[j] > key) + 80019be: e012 b.n 80019e6 + { + v[j + 1] = v[j]; + 80019c0: f997 300e ldrsb.w r3, [r7, #14] + 80019c4: 009b lsls r3, r3, #2 + 80019c6: 687a ldr r2, [r7, #4] + 80019c8: 441a add r2, r3 + 80019ca: f997 300e ldrsb.w r3, [r7, #14] + 80019ce: 3301 adds r3, #1 + 80019d0: 009b lsls r3, r3, #2 + 80019d2: 6879 ldr r1, [r7, #4] + 80019d4: 440b add r3, r1 + 80019d6: 6812 ldr r2, [r2, #0] + 80019d8: 601a str r2, [r3, #0] + j--; + 80019da: f997 300e ldrsb.w r3, [r7, #14] + 80019de: b2db uxtb r3, r3 + 80019e0: 3b01 subs r3, #1 + 80019e2: b2db uxtb r3, r3 + 80019e4: 73bb strb r3, [r7, #14] + while (j >= 0 && v[j] > key) + 80019e6: f997 300e ldrsb.w r3, [r7, #14] + 80019ea: 2b00 cmp r3, #0 + 80019ec: db0c blt.n 8001a08 + 80019ee: f997 300e ldrsb.w r3, [r7, #14] + 80019f2: 009b lsls r3, r3, #2 + 80019f4: 687a ldr r2, [r7, #4] + 80019f6: 4413 add r3, r2 + 80019f8: 681b ldr r3, [r3, #0] + 80019fa: 4619 mov r1, r3 + 80019fc: 68b8 ldr r0, [r7, #8] + 80019fe: f7ff f9ef bl 8000de0 <__aeabi_fcmplt> + 8001a02: 4603 mov r3, r0 + 8001a04: 2b00 cmp r3, #0 + 8001a06: d1db bne.n 80019c0 + } + v[j + 1] = key; + 8001a08: f997 300e ldrsb.w r3, [r7, #14] + 8001a0c: 3301 adds r3, #1 + 8001a0e: 009b lsls r3, r3, #2 + 8001a10: 687a ldr r2, [r7, #4] + 8001a12: 4413 add r3, r2 + 8001a14: 68ba ldr r2, [r7, #8] + 8001a16: 601a str r2, [r3, #0] + for (uint8_t i = 1; i < n; i++) + 8001a18: 7bfb ldrb r3, [r7, #15] + 8001a1a: 3301 adds r3, #1 + 8001a1c: 73fb strb r3, [r7, #15] + 8001a1e: 7bfa ldrb r2, [r7, #15] + 8001a20: 78fb ldrb r3, [r7, #3] + 8001a22: 429a cmp r2, r3 + 8001a24: d3c1 bcc.n 80019aa + } +} + 8001a26: bf00 nop + 8001a28: bf00 nop + 8001a2a: 3710 adds r7, #16 + 8001a2c: 46bd mov sp, r7 + 8001a2e: bd80 pop {r7, pc} + +08001a30 : + * original order is not needed), discards TRIM_COUNT values from each + * end, and averages the remainder. Sorting in place avoids a temporary + * array and removes the need for memcpy()/string.h entirely. + **/ +float ADS1015_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim) +{ + 8001a30: b580 push {r7, lr} + 8001a32: b086 sub sp, #24 + 8001a34: af00 add r7, sp, #0 + 8001a36: 6078 str r0, [r7, #4] + 8001a38: 460b mov r3, r1 + 8001a3a: 70fb strb r3, [r7, #3] + 8001a3c: 4613 mov r3, r2 + 8001a3e: 70bb strb r3, [r7, #2] + ADS1015_Sort_Array(buffer, n); + 8001a40: 78fb ldrb r3, [r7, #3] + 8001a42: 4619 mov r1, r3 + 8001a44: 6878 ldr r0, [r7, #4] + 8001a46: f7ff ffa7 bl 8001998 + + uint8_t start = trim; + 8001a4a: 78bb ldrb r3, [r7, #2] + 8001a4c: 75fb strb r3, [r7, #23] + uint8_t end = n - trim; /* exclusive */ + 8001a4e: 78fa ldrb r2, [r7, #3] + 8001a50: 78bb ldrb r3, [r7, #2] + 8001a52: 1ad3 subs r3, r2, r3 + 8001a54: 75bb strb r3, [r7, #22] + + if (end <= start) /* guard against a misconfigured trim value */ + 8001a56: 7dba ldrb r2, [r7, #22] + 8001a58: 7dfb ldrb r3, [r7, #23] + 8001a5a: 429a cmp r2, r3 + 8001a5c: d803 bhi.n 8001a66 + { + start = 0; + 8001a5e: 2300 movs r3, #0 + 8001a60: 75fb strb r3, [r7, #23] + end = n; + 8001a62: 78fb ldrb r3, [r7, #3] + 8001a64: 75bb strb r3, [r7, #22] + } + + float sum = 0.0f; + 8001a66: f04f 0300 mov.w r3, #0 + 8001a6a: 613b str r3, [r7, #16] + uint8_t count = 0; + 8001a6c: 2300 movs r3, #0 + 8001a6e: 73fb strb r3, [r7, #15] + for (uint8_t i = start; i < end; i++) + 8001a70: 7dfb ldrb r3, [r7, #23] + 8001a72: 73bb strb r3, [r7, #14] + 8001a74: e010 b.n 8001a98 + { + sum += buffer[i]; + 8001a76: 7bbb ldrb r3, [r7, #14] + 8001a78: 009b lsls r3, r3, #2 + 8001a7a: 687a ldr r2, [r7, #4] + 8001a7c: 4413 add r3, r2 + 8001a7e: 681b ldr r3, [r3, #0] + 8001a80: 4619 mov r1, r3 + 8001a82: 6938 ldr r0, [r7, #16] + 8001a84: f7fe ff06 bl 8000894 <__addsf3> + 8001a88: 4603 mov r3, r0 + 8001a8a: 613b str r3, [r7, #16] + count++; + 8001a8c: 7bfb ldrb r3, [r7, #15] + 8001a8e: 3301 adds r3, #1 + 8001a90: 73fb strb r3, [r7, #15] + for (uint8_t i = start; i < end; i++) + 8001a92: 7bbb ldrb r3, [r7, #14] + 8001a94: 3301 adds r3, #1 + 8001a96: 73bb strb r3, [r7, #14] + 8001a98: 7bba ldrb r2, [r7, #14] + 8001a9a: 7dbb ldrb r3, [r7, #22] + 8001a9c: 429a cmp r2, r3 + 8001a9e: d3ea bcc.n 8001a76 + } + return sum / (float)count; + 8001aa0: 7bfb ldrb r3, [r7, #15] + 8001aa2: 4618 mov r0, r3 + 8001aa4: f7fe ffa6 bl 80009f4 <__aeabi_ui2f> + 8001aa8: 4603 mov r3, r0 + 8001aaa: 4619 mov r1, r3 + 8001aac: 6938 ldr r0, [r7, #16] + 8001aae: f7ff f8ad bl 8000c0c <__aeabi_fdiv> + 8001ab2: 4603 mov r3, r0 +} + 8001ab4: 4618 mov r0, r3 + 8001ab6: 3718 adds r7, #24 + 8001ab8: 46bd mov sp, r7 + 8001aba: bd80 pop {r7, pc} + +08001abc : -08001b0a : /* - * Reads the conversion results, measuring the voltage - * difference between the P (AIN0) and N (AIN1) input. Generates - * a signed value since the difference can be either positive or negative. + * Simple average of the history buffer (stage-2 sliding window) */ -int16_t ADSreadADC_Differential_0_1(ADS1015_I2C *i2c) { - 8001b0a: b580 push {r7, lr} - 8001b0c: b084 sub sp, #16 - 8001b0e: af00 add r7, sp, #0 - 8001b10: 6078 str r0, [r7, #4] - // Start with default values - uint16_t config = - 8001b12: f240 1303 movw r3, #259 @ 0x103 - 8001b16: 81bb strh r3, [r7, #12] - ADS1015_REG_CONFIG_CMODE_TRAD | // Traditional comparator (default val) - ADS1015_REG_CONFIG_DR_128SPS | // 128 samples per second (default) - ADS1015_REG_CONFIG_MODE_SINGLE; // Single-shot mode (default) - - // Set PGA/voltage range - config |= i2c->m_gain; - 8001b18: 687b ldr r3, [r7, #4] - 8001b1a: 895a ldrh r2, [r3, #10] - 8001b1c: 89bb ldrh r3, [r7, #12] - 8001b1e: 4313 orrs r3, r2 - 8001b20: 81bb strh r3, [r7, #12] - - // Set channels - config |= ADS1015_REG_CONFIG_MUX_DIFF_0_1; // AIN0 = P, AIN1 = N - - // Set 'start single-conversion' bit - config |= ADS1015_REG_CONFIG_OS_SINGLE; - 8001b22: 89bb ldrh r3, [r7, #12] - 8001b24: ea6f 4343 mvn.w r3, r3, lsl #17 - 8001b28: ea6f 4353 mvn.w r3, r3, lsr #17 - 8001b2c: 81bb strh r3, [r7, #12] - - // Write config register to the ADC - writeRegister(i2c, ADS1015_REG_POINTER_CONFIG, config); - 8001b2e: 89bb ldrh r3, [r7, #12] - 8001b30: 461a mov r2, r3 - 8001b32: 2101 movs r1, #1 - 8001b34: 6878 ldr r0, [r7, #4] - 8001b36: f7ff ff71 bl 8001a1c - - // Wait for the conversion to complete - HAL_Delay(i2c->m_conversionDelay); - 8001b3a: 687b ldr r3, [r7, #4] - 8001b3c: 685b ldr r3, [r3, #4] - 8001b3e: 4618 mov r0, r3 - 8001b40: f001 f9dc bl 8002efc - - // Read the conversion results - uint16_t res = readRegister(i2c, ADS1015_REG_POINTER_CONVERT) >> i2c->m_bitShift; - 8001b44: 2100 movs r1, #0 - 8001b46: 6878 ldr r0, [r7, #4] - 8001b48: f7ff ff89 bl 8001a5e - 8001b4c: 4603 mov r3, r0 - 8001b4e: 461a mov r2, r3 - 8001b50: 687b ldr r3, [r7, #4] - 8001b52: 7a1b ldrb r3, [r3, #8] - 8001b54: fa42 f303 asr.w r3, r2, r3 - 8001b58: 81fb strh r3, [r7, #14] - if (i2c->m_bitShift == 0) { - 8001b5a: 687b ldr r3, [r7, #4] - 8001b5c: 7a1b ldrb r3, [r3, #8] - 8001b5e: 2b00 cmp r3, #0 - 8001b60: d102 bne.n 8001b68 - return (int16_t) res; - 8001b62: f9b7 300e ldrsh.w r3, [r7, #14] - 8001b66: e00b b.n 8001b80 - } else { - // Shift 12-bit results right 4 bits for the ADS1015, - // making sure we keep the sign bit intact - if (res > 0x07FF) { - 8001b68: 89fb ldrh r3, [r7, #14] - 8001b6a: f5b3 6f00 cmp.w r3, #2048 @ 0x800 - 8001b6e: d305 bcc.n 8001b7c - // negative number - extend the sign to 16th bit - res |= 0xF000; - 8001b70: 89fb ldrh r3, [r7, #14] - 8001b72: ea6f 5303 mvn.w r3, r3, lsl #20 - 8001b76: ea6f 5313 mvn.w r3, r3, lsr #20 - 8001b7a: 81fb strh r3, [r7, #14] - } - return (int16_t) res; - 8001b7c: f9b7 300e ldrsh.w r3, [r7, #14] - } -} - 8001b80: 4618 mov r0, r3 - 8001b82: 3710 adds r7, #16 - 8001b84: 46bd mov sp, r7 - 8001b86: bd80 pop {r7, pc} - -08001b88 : - return (int16_t) res; - } -} - -float ADSCalculate_ph_mV(void) // pH in mV +float ADS1015_History_Average(const float *hist, uint8_t n) { - 8001b88: b580 push {r7, lr} - 8001b8a: b082 sub sp, #8 - 8001b8c: af00 add r7, sp, #0 - float ph_dut_sum; - uint8_t i; + 8001abc: b580 push {r7, lr} + 8001abe: b084 sub sp, #16 + 8001ac0: af00 add r7, sp, #0 + 8001ac2: 6078 str r0, [r7, #4] + 8001ac4: 460b mov r3, r1 + 8001ac6: 70fb strb r3, [r7, #3] + float sum = 0.0f; + 8001ac8: f04f 0300 mov.w r3, #0 + 8001acc: 60fb str r3, [r7, #12] + for (uint8_t i = 0; i < n; i++) + 8001ace: 2300 movs r3, #0 + 8001ad0: 72fb strb r3, [r7, #11] + 8001ad2: e00d b.n 8001af0 + sum += hist[i]; + 8001ad4: 7afb ldrb r3, [r7, #11] + 8001ad6: 009b lsls r3, r3, #2 + 8001ad8: 687a ldr r2, [r7, #4] + 8001ada: 4413 add r3, r2 + 8001adc: 681b ldr r3, [r3, #0] + 8001ade: 4619 mov r1, r3 + 8001ae0: 68f8 ldr r0, [r7, #12] + 8001ae2: f7fe fed7 bl 8000894 <__addsf3> + 8001ae6: 4603 mov r3, r0 + 8001ae8: 60fb str r3, [r7, #12] + for (uint8_t i = 0; i < n; i++) + 8001aea: 7afb ldrb r3, [r7, #11] + 8001aec: 3301 adds r3, #1 + 8001aee: 72fb strb r3, [r7, #11] + 8001af0: 7afa ldrb r2, [r7, #11] + 8001af2: 78fb ldrb r3, [r7, #3] + 8001af4: 429a cmp r2, r3 + 8001af6: d3ed bcc.n 8001ad4 + return sum / (float)n; + 8001af8: 78fb ldrb r3, [r7, #3] + 8001afa: 4618 mov r0, r3 + 8001afc: f7fe ff7a bl 80009f4 <__aeabi_ui2f> + 8001b00: 4603 mov r3, r0 + 8001b02: 4619 mov r1, r3 + 8001b04: 68f8 ldr r0, [r7, #12] + 8001b06: f7ff f881 bl 8000c0c <__aeabi_fdiv> + 8001b0a: 4603 mov r3, r0 +} + 8001b0c: 4618 mov r0, r3 + 8001b0e: 3710 adds r7, #16 + 8001b10: 46bd mov sp, r7 + 8001b12: bd80 pop {r7, pc} - for (i = (ADS1015_PH_AVERAGES-1); i > 0; i--) - 8001b8e: 230f movs r3, #15 - 8001b90: 70fb strb r3, [r7, #3] - 8001b92: e00b b.n 8001bac - ph_dut_samples[i] = ph_dut_samples[i-1]; - 8001b94: 78fb ldrb r3, [r7, #3] - 8001b96: 1e5a subs r2, r3, #1 - 8001b98: 78fb ldrb r3, [r7, #3] - 8001b9a: 4923 ldr r1, [pc, #140] @ (8001c28 ) - 8001b9c: f851 2022 ldr.w r2, [r1, r2, lsl #2] - 8001ba0: 4921 ldr r1, [pc, #132] @ (8001c28 ) - 8001ba2: f841 2023 str.w r2, [r1, r3, lsl #2] - for (i = (ADS1015_PH_AVERAGES-1); i > 0; i--) - 8001ba6: 78fb ldrb r3, [r7, #3] - 8001ba8: 3b01 subs r3, #1 - 8001baa: 70fb strb r3, [r7, #3] - 8001bac: 78fb ldrb r3, [r7, #3] - 8001bae: 2b00 cmp r3, #0 - 8001bb0: d1f0 bne.n 8001b94 +08001b14 : + * Common processing core: applied identically to all 3 channels. + * Receives the current raw reading and the channel's state (global + * arrays/struct). + **/ +void ADS1015_Process_Sample(ADS1015_filter_t *ch, float raw) +{ + 8001b14: b590 push {r4, r7, lr} + 8001b16: b085 sub sp, #20 + 8001b18: af00 add r7, sp, #0 + 8001b1a: 6078 str r0, [r7, #4] + 8001b1c: 6039 str r1, [r7, #0] + /* --- Stage 1: accumulate into the current burst --- */ + ch->burst[ch->burst_index] = raw; + 8001b1e: 687b ldr r3, [r7, #4] + 8001b20: 7d1b ldrb r3, [r3, #20] + 8001b22: 4619 mov r1, r3 + 8001b24: 687b ldr r3, [r7, #4] + 8001b26: 683a ldr r2, [r7, #0] + 8001b28: f843 2021 str.w r2, [r3, r1, lsl #2] + ch->burst_index++; + 8001b2c: 687b ldr r3, [r7, #4] + 8001b2e: 7d1b ldrb r3, [r3, #20] + 8001b30: 3301 adds r3, #1 + 8001b32: b2da uxtb r2, r3 + 8001b34: 687b ldr r3, [r7, #4] + 8001b36: 751a strb r2, [r3, #20] - ph_dut_samples[0] = (((float)(ADSreadADC_Differential_0_1(&i2c)) * ADS1015_ADC_VREF) / ADS1015_ADC_MAX); // 1. Converter leitura bruta do ADC para tensão real (mV) - 8001bb2: 481e ldr r0, [pc, #120] @ (8001c2c ) - 8001bb4: f7ff ffa9 bl 8001b0a - 8001bb8: 4603 mov r3, r0 - 8001bba: 4618 mov r0, r3 - 8001bbc: f7fe ff1e bl 80009fc <__aeabi_i2f> - 8001bc0: 4603 mov r3, r0 - 8001bc2: f04f 4189 mov.w r1, #1149239296 @ 0x44800000 - 8001bc6: 4618 mov r0, r3 - 8001bc8: f7fe ff6c bl 8000aa4 <__aeabi_fmul> - 8001bcc: 4603 mov r3, r0 - 8001bce: 4918 ldr r1, [pc, #96] @ (8001c30 ) - 8001bd0: 4618 mov r0, r3 - 8001bd2: f7ff f81b bl 8000c0c <__aeabi_fdiv> + if (ch->burst_index < ADS1015_BURST_SIZE) + 8001b38: 687b ldr r3, [r7, #4] + 8001b3a: 7d1b ldrb r3, [r3, #20] + 8001b3c: 2b04 cmp r3, #4 + 8001b3e: d977 bls.n 8001c30 + return; /* still collecting the burst, nothing else to do */ + + /* Burst complete: compute the trimmed mean */ + float burst_result = ADS1015_Trimmed_Mean(ch->burst, ADS1015_BURST_SIZE, ADS1015_TRIM_COUNT); + 8001b40: 687b ldr r3, [r7, #4] + 8001b42: 2201 movs r2, #1 + 8001b44: 2105 movs r1, #5 + 8001b46: 4618 mov r0, r3 + 8001b48: f7ff ff72 bl 8001a30 + 8001b4c: 60f8 str r0, [r7, #12] + ch->burst_index = 0; /* reset for the next burst */ + 8001b4e: 687b ldr r3, [r7, #4] + 8001b50: 2200 movs r2, #0 + 8001b52: 751a strb r2, [r3, #20] + + /* --- Stage 2a: rolling history / sliding window --- */ + ch->history[ch->history_index] = burst_result; + 8001b54: 687b ldr r3, [r7, #4] + 8001b56: f893 3038 ldrb.w r3, [r3, #56] @ 0x38 + 8001b5a: 461a mov r2, r3 + 8001b5c: 687b ldr r3, [r7, #4] + 8001b5e: 3206 adds r2, #6 + 8001b60: 68f9 ldr r1, [r7, #12] + 8001b62: f843 1022 str.w r1, [r3, r2, lsl #2] + ch->history_index = (uint8_t)((ch->history_index + 1) % ADS1015_HISTORY_SIZE); + 8001b66: 687b ldr r3, [r7, #4] + 8001b68: f893 3038 ldrb.w r3, [r3, #56] @ 0x38 + 8001b6c: 3301 adds r3, #1 + 8001b6e: 425a negs r2, r3 + 8001b70: f003 0307 and.w r3, r3, #7 + 8001b74: f002 0207 and.w r2, r2, #7 + 8001b78: bf58 it pl + 8001b7a: 4253 negpl r3, r2 + 8001b7c: b2da uxtb r2, r3 + 8001b7e: 687b ldr r3, [r7, #4] + 8001b80: f883 2038 strb.w r2, [r3, #56] @ 0x38 + if (ch->history_count < ADS1015_HISTORY_SIZE) + 8001b84: 687b ldr r3, [r7, #4] + 8001b86: f893 3039 ldrb.w r3, [r3, #57] @ 0x39 + 8001b8a: 2b07 cmp r3, #7 + 8001b8c: d807 bhi.n 8001b9e + ch->history_count++; + 8001b8e: 687b ldr r3, [r7, #4] + 8001b90: f893 3039 ldrb.w r3, [r3, #57] @ 0x39 + 8001b94: 3301 adds r3, #1 + 8001b96: b2da uxtb r2, r3 + 8001b98: 687b ldr r3, [r7, #4] + 8001b9a: f883 2039 strb.w r2, [r3, #57] @ 0x39 + + float window_average = ADS1015_History_Average(ch->history, ch->history_count); + 8001b9e: 687b ldr r3, [r7, #4] + 8001ba0: f103 0218 add.w r2, r3, #24 + 8001ba4: 687b ldr r3, [r7, #4] + 8001ba6: f893 3039 ldrb.w r3, [r3, #57] @ 0x39 + 8001baa: 4619 mov r1, r3 + 8001bac: 4610 mov r0, r2 + 8001bae: f7ff ff85 bl 8001abc + 8001bb2: 60b8 str r0, [r7, #8] + + /* --- Stage 2b: first-order IIR low-pass filter on the burst result --- */ + if (!ch->iir_initialized) + 8001bb4: 687b ldr r3, [r7, #4] + 8001bb6: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 + 8001bba: 2b00 cmp r3, #0 + 8001bbc: d107 bne.n 8001bce + { + ch->iir_state = burst_result; + 8001bbe: 687b ldr r3, [r7, #4] + 8001bc0: 68fa ldr r2, [r7, #12] + 8001bc2: 63da str r2, [r3, #60] @ 0x3c + ch->iir_initialized = 1; + 8001bc4: 687b ldr r3, [r7, #4] + 8001bc6: 2201 movs r2, #1 + 8001bc8: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 8001bcc: e014 b.n 8001bf8 + } + else + { + ch->iir_state = ADS1015_IIR_ALPHA * burst_result + (1.0f - ADS1015_IIR_ALPHA) * ch->iir_state; + 8001bce: 491a ldr r1, [pc, #104] @ (8001c38 ) + 8001bd0: 68f8 ldr r0, [r7, #12] + 8001bd2: f7fe ff67 bl 8000aa4 <__aeabi_fmul> 8001bd6: 4603 mov r3, r0 - 8001bd8: 461a mov r2, r3 - 8001bda: 4b13 ldr r3, [pc, #76] @ (8001c28 ) - 8001bdc: 601a str r2, [r3, #0] + 8001bd8: 461c mov r4, r3 + 8001bda: 687b ldr r3, [r7, #4] + 8001bdc: 6bdb ldr r3, [r3, #60] @ 0x3c + 8001bde: 4917 ldr r1, [pc, #92] @ (8001c3c ) + 8001be0: 4618 mov r0, r3 + 8001be2: f7fe ff5f bl 8000aa4 <__aeabi_fmul> + 8001be6: 4603 mov r3, r0 + 8001be8: 4619 mov r1, r3 + 8001bea: 4620 mov r0, r4 + 8001bec: f7fe fe52 bl 8000894 <__addsf3> + 8001bf0: 4603 mov r3, r0 + 8001bf2: 461a mov r2, r3 + 8001bf4: 687b ldr r3, [r7, #4] + 8001bf6: 63da str r2, [r3, #60] @ 0x3c + } - for (i = 0, ph_dut_sum=0; i < ADS1015_PH_AVERAGES; i++) - 8001bde: 2300 movs r3, #0 - 8001be0: 70fb strb r3, [r7, #3] - 8001be2: f04f 0300 mov.w r3, #0 - 8001be6: 607b str r3, [r7, #4] - 8001be8: e00c b.n 8001c04 - ph_dut_sum += ph_dut_samples[i]; - 8001bea: 78fb ldrb r3, [r7, #3] - 8001bec: 4a0e ldr r2, [pc, #56] @ (8001c28 ) - 8001bee: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8001bf2: 4619 mov r1, r3 - 8001bf4: 6878 ldr r0, [r7, #4] - 8001bf6: f7fe fe4d bl 8000894 <__addsf3> - 8001bfa: 4603 mov r3, r0 - 8001bfc: 607b str r3, [r7, #4] - for (i = 0, ph_dut_sum=0; i < ADS1015_PH_AVERAGES; i++) - 8001bfe: 78fb ldrb r3, [r7, #3] - 8001c00: 3301 adds r3, #1 - 8001c02: 70fb strb r3, [r7, #3] - 8001c04: 78fb ldrb r3, [r7, #3] - 8001c06: 2b0f cmp r3, #15 - 8001c08: d9ef bls.n 8001bea - - return (ADSRound_Float_Precision((ph_dut_sum/ADS1015_PH_AVERAGES),2)); - 8001c0a: f04f 4183 mov.w r1, #1098907648 @ 0x41800000 - 8001c0e: 6878 ldr r0, [r7, #4] - 8001c10: f7fe fffc bl 8000c0c <__aeabi_fdiv> + /* Final output: combines the IIR state (fast response to real drift) + * with the window average (more stable, slower response). Adjust + * the weighting per channel if needed. */ + ch->filtered_value = 0.5f * ch->iir_state + 0.5f * window_average; + 8001bf8: 687b ldr r3, [r7, #4] + 8001bfa: 6bdb ldr r3, [r3, #60] @ 0x3c + 8001bfc: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 + 8001c00: 4618 mov r0, r3 + 8001c02: f7fe ff4f bl 8000aa4 <__aeabi_fmul> + 8001c06: 4603 mov r3, r0 + 8001c08: 461c mov r4, r3 + 8001c0a: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 + 8001c0e: 68b8 ldr r0, [r7, #8] + 8001c10: f7fe ff48 bl 8000aa4 <__aeabi_fmul> 8001c14: 4603 mov r3, r0 - 8001c16: 2102 movs r1, #2 - 8001c18: 4618 mov r0, r3 - 8001c1a: f000 f8fb bl 8001e14 + 8001c16: 4619 mov r1, r3 + 8001c18: 4620 mov r0, r4 + 8001c1a: f7fe fe3b bl 8000894 <__addsf3> 8001c1e: 4603 mov r3, r0 + 8001c20: 461a mov r2, r3 + 8001c22: 687b ldr r3, [r7, #4] + 8001c24: 645a str r2, [r3, #68] @ 0x44 + ch->value_valid = 1; + 8001c26: 687b ldr r3, [r7, #4] + 8001c28: 2201 movs r2, #1 + 8001c2a: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 8001c2e: e000 b.n 8001c32 + return; /* still collecting the burst, nothing else to do */ + 8001c30: bf00 nop } - 8001c20: 4618 mov r0, r3 - 8001c22: 3708 adds r7, #8 - 8001c24: 46bd mov sp, r7 - 8001c26: bd80 pop {r7, pc} - 8001c28: 200001dc .word 0x200001dc - 8001c2c: 200001cc .word 0x200001cc - 8001c30: 457ff000 .word 0x457ff000 + 8001c32: 3714 adds r7, #20 + 8001c34: 46bd mov sp, r7 + 8001c36: bd90 pop {r4, r7, pc} + 8001c38: 3e99999a .word 0x3e99999a + 8001c3c: 3f333333 .word 0x3f333333 -08001c34 : - * - * @return float Valor de pH calculado (0.0 a 14.0). - */ +08001c40 : +/* PUBLIC FUNCTIONS - ONE PER CHANNEL */ +/* ---------------------------------------------------------------------- */ -float ADSCalculate_ph_Compensated(float temp_dut) + +void ADS1015_pH_NewSample(float raw) { - 8001c34: b590 push {r4, r7, lr} - 8001c36: b089 sub sp, #36 @ 0x24 - 8001c38: af00 add r7, sp, #0 - 8001c3a: 6078 str r0, [r7, #4] - - float dut_mV = ADSCalculate_ph_mV(); - 8001c3c: f7ff ffa4 bl 8001b88 - 8001c40: 61f8 str r0, [r7, #28] - - float t_cal_k = flash_data.ph_temperature + 273.15f; - 8001c42: 4b1c ldr r3, [pc, #112] @ (8001cb4 ) - 8001c44: 68db ldr r3, [r3, #12] - 8001c46: 491c ldr r1, [pc, #112] @ (8001cb8 ) - 8001c48: 4618 mov r0, r3 - 8001c4a: f7fe fe23 bl 8000894 <__addsf3> - 8001c4e: 4603 mov r3, r0 - 8001c50: 61bb str r3, [r7, #24] - float t_dut_k = temp_dut + 273.15f; - 8001c52: 4919 ldr r1, [pc, #100] @ (8001cb8 ) - 8001c54: 6878 ldr r0, [r7, #4] - 8001c56: f7fe fe1d bl 8000894 <__addsf3> - 8001c5a: 4603 mov r3, r0 - 8001c5c: 617b str r3, [r7, #20] - - float slope_dut = flash_data.ph_slope_mV * (t_dut_k / t_cal_k); - 8001c5e: 4b15 ldr r3, [pc, #84] @ (8001cb4 ) - 8001c60: 691c ldr r4, [r3, #16] - 8001c62: 69b9 ldr r1, [r7, #24] - 8001c64: 6978 ldr r0, [r7, #20] - 8001c66: f7fe ffd1 bl 8000c0c <__aeabi_fdiv> - 8001c6a: 4603 mov r3, r0 - 8001c6c: 4619 mov r1, r3 - 8001c6e: 4620 mov r0, r4 - 8001c70: f7fe ff18 bl 8000aa4 <__aeabi_fmul> - 8001c74: 4603 mov r3, r0 - 8001c76: 613b str r3, [r7, #16] - - float ph_result = (flash_data.ph7_real + ((dut_mV - flash_data.ph7_mV) / slope_dut)); - 8001c78: 4b0e ldr r3, [pc, #56] @ (8001cb4 ) - 8001c7a: 695c ldr r4, [r3, #20] - 8001c7c: 4b0d ldr r3, [pc, #52] @ (8001cb4 ) - 8001c7e: 689b ldr r3, [r3, #8] - 8001c80: 4619 mov r1, r3 - 8001c82: 69f8 ldr r0, [r7, #28] - 8001c84: f7fe fe04 bl 8000890 <__aeabi_fsub> - 8001c88: 4603 mov r3, r0 - 8001c8a: 6939 ldr r1, [r7, #16] - 8001c8c: 4618 mov r0, r3 - 8001c8e: f7fe ffbd bl 8000c0c <__aeabi_fdiv> - 8001c92: 4603 mov r3, r0 - 8001c94: 4619 mov r1, r3 - 8001c96: 4620 mov r0, r4 - 8001c98: f7fe fdfc bl 8000894 <__addsf3> - 8001c9c: 4603 mov r3, r0 - 8001c9e: 60fb str r3, [r7, #12] - - return (ADSRound_Float_Precision(ph_result,2)); - 8001ca0: 2102 movs r1, #2 - 8001ca2: 68f8 ldr r0, [r7, #12] - 8001ca4: f000 f8b6 bl 8001e14 - 8001ca8: 4603 mov r3, r0 - + 8001c40: b580 push {r7, lr} + 8001c42: b082 sub sp, #8 + 8001c44: af00 add r7, sp, #0 + 8001c46: 6078 str r0, [r7, #4] + ADS1015_Process_Sample(&g_ph_filter, raw); + 8001c48: 6879 ldr r1, [r7, #4] + 8001c4a: 4803 ldr r0, [pc, #12] @ (8001c58 ) + 8001c4c: f7ff ff62 bl 8001b14 } - 8001caa: 4618 mov r0, r3 - 8001cac: 3724 adds r7, #36 @ 0x24 - 8001cae: 46bd mov sp, r7 - 8001cb0: bd90 pop {r4, r7, pc} - 8001cb2: bf00 nop - 8001cb4: 20000224 .word 0x20000224 - 8001cb8: 43889333 .word 0x43889333 + 8001c50: bf00 nop + 8001c52: 3708 adds r7, #8 + 8001c54: 46bd mov sp, r7 + 8001c56: bd80 pop {r7, pc} + 8001c58: 2000022c .word 0x2000022c -08001cbc : - * @param temp_target The target temperature to interpolate for. - * @param row_index Index of the buffer row (1 for pH4, 2 for pH7). - * @return float Interpolated value from the matrix. - */ -float ADSinterpolate_ph(float temp_target, uint8_t row_index) -{ - 8001cbc: b5b0 push {r4, r5, r7, lr} - 8001cbe: b0ac sub sp, #176 @ 0xb0 - 8001cc0: af00 add r7, sp, #0 - 8001cc2: 6078 str r0, [r7, #4] - 8001cc4: 460b mov r3, r1 - 8001cc6: 70fb strb r3, [r7, #3] - - /* Matrix with {Temperature, Ph 4 Buffer, Ph 7 Buffer} */ - const float lut_matrix_buffer_ph[ADS1015_INTERPOLATION_ROWS][ADS1015_PH_TEMP_INTER_POINTS] = { - 8001cc8: 4a51 ldr r2, [pc, #324] @ (8001e10 ) - 8001cca: f107 030c add.w r3, r7, #12 - 8001cce: 4611 mov r1, r2 - 8001cd0: 2290 movs r2, #144 @ 0x90 - 8001cd2: 4618 mov r0, r3 - 8001cd4: f004 fc18 bl 8006508 - {0.0f, 5.0f, 10.0f, 15.0f, 20.0f, 25.0f, 30.0f, 35.0f, 40.0f, 45.0f, 50.0f, 55.0f}, // Temperature - {4.01f, 4.00f, 4.00f, 4.00f, 4.00f, 4.01f, 4.01f, 4.02f, 4.03f, 4.05f, 4.06f, 4.10f}, // Buffer ph 4 - {7.12f, 7.07f, 7.05f, 7.03f, 7.01f, 7.00f, 6.98f, 6.97f, 6.96f, 6.96f, 6.96f, 6.96f},}; // Buffer ph 7 - uint8_t i = 0; - 8001cd8: 2300 movs r3, #0 - 8001cda: f887 30af strb.w r3, [r7, #175] @ 0xaf - - /* Boundary Check: Clamp to first or last index if out of range */ - if (temp_target <= lut_matrix_buffer_ph[0][0]) - 8001cde: 68fb ldr r3, [r7, #12] - 8001ce0: 4619 mov r1, r3 - 8001ce2: 6878 ldr r0, [r7, #4] - 8001ce4: f7ff f886 bl 8000df4 <__aeabi_fcmple> - 8001ce8: 4603 mov r3, r0 - 8001cea: 2b00 cmp r3, #0 - 8001cec: d009 beq.n 8001d02 - return lut_matrix_buffer_ph[row_index][0]; - 8001cee: 78fa ldrb r2, [r7, #3] - 8001cf0: 4613 mov r3, r2 - 8001cf2: 005b lsls r3, r3, #1 - 8001cf4: 4413 add r3, r2 - 8001cf6: 011b lsls r3, r3, #4 - 8001cf8: 33b0 adds r3, #176 @ 0xb0 - 8001cfa: 443b add r3, r7 - 8001cfc: 3ba4 subs r3, #164 @ 0xa4 - 8001cfe: 681b ldr r3, [r3, #0] - 8001d00: e082 b.n 8001e08 - if (temp_target >= lut_matrix_buffer_ph[0][ADS1015_PH_TEMP_INTER_POINTS-1]) - 8001d02: 6bbb ldr r3, [r7, #56] @ 0x38 - 8001d04: 4619 mov r1, r3 - 8001d06: 6878 ldr r0, [r7, #4] - 8001d08: f7ff f87e bl 8000e08 <__aeabi_fcmpge> - 8001d0c: 4603 mov r3, r0 - 8001d0e: 2b00 cmp r3, #0 - 8001d10: d009 beq.n 8001d26 - return lut_matrix_buffer_ph[row_index][ADS1015_PH_TEMP_INTER_POINTS-1]; - 8001d12: 78fa ldrb r2, [r7, #3] - 8001d14: 4613 mov r3, r2 - 8001d16: 005b lsls r3, r3, #1 - 8001d18: 4413 add r3, r2 - 8001d1a: 011b lsls r3, r3, #4 - 8001d1c: 33b0 adds r3, #176 @ 0xb0 - 8001d1e: 443b add r3, r7 - 8001d20: 3b78 subs r3, #120 @ 0x78 - 8001d22: 681b ldr r3, [r3, #0] - 8001d24: e070 b.n 8001e08 - - /* Find interpolation interval */ - while (i < (ADS1015_PH_TEMP_INTER_POINTS-1) && lut_matrix_buffer_ph[0][i+1] < temp_target) - 8001d26: e004 b.n 8001d32 - { - i++; - 8001d28: f897 30af ldrb.w r3, [r7, #175] @ 0xaf - 8001d2c: 3301 adds r3, #1 - 8001d2e: f887 30af strb.w r3, [r7, #175] @ 0xaf - while (i < (ADS1015_PH_TEMP_INTER_POINTS-1) && lut_matrix_buffer_ph[0][i+1] < temp_target) - 8001d32: f897 30af ldrb.w r3, [r7, #175] @ 0xaf - 8001d36: 2b0a cmp r3, #10 - 8001d38: d80e bhi.n 8001d58 - 8001d3a: f897 30af ldrb.w r3, [r7, #175] @ 0xaf - 8001d3e: 3301 adds r3, #1 - 8001d40: 009b lsls r3, r3, #2 - 8001d42: 33b0 adds r3, #176 @ 0xb0 - 8001d44: 443b add r3, r7 - 8001d46: f853 3ca4 ldr.w r3, [r3, #-164] - 8001d4a: 4619 mov r1, r3 - 8001d4c: 6878 ldr r0, [r7, #4] - 8001d4e: f7ff f865 bl 8000e1c <__aeabi_fcmpgt> - 8001d52: 4603 mov r3, r0 - 8001d54: 2b00 cmp r3, #0 - 8001d56: d1e7 bne.n 8001d28 - } - - float x0 = lut_matrix_buffer_ph[0][i]; - 8001d58: f897 30af ldrb.w r3, [r7, #175] @ 0xaf - 8001d5c: 009b lsls r3, r3, #2 - 8001d5e: 33b0 adds r3, #176 @ 0xb0 - 8001d60: 443b add r3, r7 - 8001d62: f853 3ca4 ldr.w r3, [r3, #-164] - 8001d66: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 - float x1 = lut_matrix_buffer_ph[0][i+1]; - 8001d6a: f897 30af ldrb.w r3, [r7, #175] @ 0xaf - 8001d6e: 3301 adds r3, #1 - 8001d70: 009b lsls r3, r3, #2 - 8001d72: 33b0 adds r3, #176 @ 0xb0 - 8001d74: 443b add r3, r7 - 8001d76: f853 3ca4 ldr.w r3, [r3, #-164] - 8001d7a: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 - float y0 = lut_matrix_buffer_ph[row_index][i]; - 8001d7e: 78fa ldrb r2, [r7, #3] - 8001d80: f897 10af ldrb.w r1, [r7, #175] @ 0xaf - 8001d84: 4613 mov r3, r2 - 8001d86: 005b lsls r3, r3, #1 - 8001d88: 4413 add r3, r2 - 8001d8a: 009b lsls r3, r3, #2 - 8001d8c: 440b add r3, r1 - 8001d8e: 009b lsls r3, r3, #2 - 8001d90: 33b0 adds r3, #176 @ 0xb0 - 8001d92: 443b add r3, r7 - 8001d94: f853 3ca4 ldr.w r3, [r3, #-164] - 8001d98: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 - float y1 = lut_matrix_buffer_ph[row_index][i+1]; - 8001d9c: 78fa ldrb r2, [r7, #3] - 8001d9e: f897 30af ldrb.w r3, [r7, #175] @ 0xaf - 8001da2: 1c59 adds r1, r3, #1 - 8001da4: 4613 mov r3, r2 - 8001da6: 005b lsls r3, r3, #1 - 8001da8: 4413 add r3, r2 - 8001daa: 009b lsls r3, r3, #2 - 8001dac: 440b add r3, r1 - 8001dae: 009b lsls r3, r3, #2 - 8001db0: 33b0 adds r3, #176 @ 0xb0 - 8001db2: 443b add r3, r7 - 8001db4: f853 3ca4 ldr.w r3, [r3, #-164] - 8001db8: f8c7 309c str.w r3, [r7, #156] @ 0x9c - - /* Linear Interpolation: y = y0 + (x - x0) * ((y1 - y_0) / (x1 - x0)) */ - return y0 + (temp_target - x0) * ((y1 - y0) / (x1 - x0)); - 8001dbc: f8d7 10a8 ldr.w r1, [r7, #168] @ 0xa8 - 8001dc0: 6878 ldr r0, [r7, #4] - 8001dc2: f7fe fd65 bl 8000890 <__aeabi_fsub> - 8001dc6: 4603 mov r3, r0 - 8001dc8: 461c mov r4, r3 - 8001dca: f8d7 10a0 ldr.w r1, [r7, #160] @ 0xa0 - 8001dce: f8d7 009c ldr.w r0, [r7, #156] @ 0x9c - 8001dd2: f7fe fd5d bl 8000890 <__aeabi_fsub> - 8001dd6: 4603 mov r3, r0 - 8001dd8: 461d mov r5, r3 - 8001dda: f8d7 10a8 ldr.w r1, [r7, #168] @ 0xa8 - 8001dde: f8d7 00a4 ldr.w r0, [r7, #164] @ 0xa4 - 8001de2: f7fe fd55 bl 8000890 <__aeabi_fsub> - 8001de6: 4603 mov r3, r0 - 8001de8: 4619 mov r1, r3 - 8001dea: 4628 mov r0, r5 - 8001dec: f7fe ff0e bl 8000c0c <__aeabi_fdiv> - 8001df0: 4603 mov r3, r0 - 8001df2: 4619 mov r1, r3 - 8001df4: 4620 mov r0, r4 - 8001df6: f7fe fe55 bl 8000aa4 <__aeabi_fmul> - 8001dfa: 4603 mov r3, r0 - 8001dfc: f8d7 10a0 ldr.w r1, [r7, #160] @ 0xa0 - 8001e00: 4618 mov r0, r3 - 8001e02: f7fe fd47 bl 8000894 <__addsf3> - 8001e06: 4603 mov r3, r0 -} - 8001e08: 4618 mov r0, r3 - 8001e0a: 37b0 adds r7, #176 @ 0xb0 - 8001e0c: 46bd mov sp, r7 - 8001e0e: bdb0 pop {r4, r5, r7, pc} - 8001e10: 08006704 .word 0x08006704 - -08001e14 : - * @param valor O valor float original. - * @param casas_decimais Quantidade de casas que devem permanecer após a vírgula. - * @return float O valor com as casas decimais excedentes removidas. - */ -float ADSRound_Float_Precision(float value, uint8_t number_of_decimals) -{ - 8001e14: b580 push {r7, lr} - 8001e16: b084 sub sp, #16 - 8001e18: af00 add r7, sp, #0 - 8001e1a: 6078 str r0, [r7, #4] - 8001e1c: 460b mov r3, r1 - 8001e1e: 70fb strb r3, [r7, #3] - float multiply = 1.0f; - 8001e20: f04f 537e mov.w r3, #1065353216 @ 0x3f800000 - 8001e24: 60fb str r3, [r7, #12] - - for (uint8_t i = 0; i < number_of_decimals; i++) - 8001e26: 2300 movs r3, #0 - 8001e28: 72fb strb r3, [r7, #11] - 8001e2a: e008 b.n 8001e3e - multiply *= 10.0f; - 8001e2c: 490f ldr r1, [pc, #60] @ (8001e6c ) - 8001e2e: 68f8 ldr r0, [r7, #12] - 8001e30: f7fe fe38 bl 8000aa4 <__aeabi_fmul> - 8001e34: 4603 mov r3, r0 - 8001e36: 60fb str r3, [r7, #12] - for (uint8_t i = 0; i < number_of_decimals; i++) - 8001e38: 7afb ldrb r3, [r7, #11] - 8001e3a: 3301 adds r3, #1 - 8001e3c: 72fb strb r3, [r7, #11] - 8001e3e: 7afa ldrb r2, [r7, #11] - 8001e40: 78fb ldrb r3, [r7, #3] - 8001e42: 429a cmp r2, r3 - 8001e44: d3f2 bcc.n 8001e2c - - return roundf(value * multiply) / multiply; - 8001e46: 68f9 ldr r1, [r7, #12] - 8001e48: 6878 ldr r0, [r7, #4] - 8001e4a: f7fe fe2b bl 8000aa4 <__aeabi_fmul> - 8001e4e: 4603 mov r3, r0 - 8001e50: 4618 mov r0, r3 - 8001e52: f004 fbf7 bl 8006644 - 8001e56: 4603 mov r3, r0 - 8001e58: 68f9 ldr r1, [r7, #12] - 8001e5a: 4618 mov r0, r3 - 8001e5c: f7fe fed6 bl 8000c0c <__aeabi_fdiv> - 8001e60: 4603 mov r3, r0 -} - 8001e62: 4618 mov r0, r3 - 8001e64: 3710 adds r7, #16 - 8001e66: 46bd mov sp, r7 - 8001e68: bd80 pop {r7, pc} - 8001e6a: bf00 nop - 8001e6c: 41200000 .word 0x41200000 - -08001e70 : +08001c5c : * @brief Initializes the GPIO hardware and sets initial states. * @note This function replaces the handle-based init. * @retval None */ void digital_outputs_init(void) { - 8001e70: b580 push {r7, lr} - 8001e72: b086 sub sp, #24 - 8001e74: af00 add r7, sp, #0 + 8001c5c: b580 push {r7, lr} + 8001c5e: b086 sub sp, #24 + 8001c60: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001e76: 1d3b adds r3, r7, #4 - 8001e78: 2200 movs r2, #0 - 8001e7a: 601a str r2, [r3, #0] - 8001e7c: 605a str r2, [r3, #4] - 8001e7e: 609a str r2, [r3, #8] - 8001e80: 60da str r2, [r3, #12] + 8001c62: 1d3b adds r3, r7, #4 + 8001c64: 2200 movs r2, #0 + 8001c66: 601a str r2, [r3, #0] + 8001c68: 605a str r2, [r3, #4] + 8001c6a: 609a str r2, [r3, #8] + 8001c6c: 60da str r2, [r3, #12] for (int i = 0; i < OUTPUT_PINS_COUNT; i++) { - 8001e82: 2300 movs r3, #0 - 8001e84: 617b str r3, [r7, #20] - 8001e86: e029 b.n 8001edc + 8001c6e: 2300 movs r3, #0 + 8001c70: 617b str r3, [r7, #20] + 8001c72: e029 b.n 8001cc8 GPIO_InitStruct.Pin = output_pins[i].pin; - 8001e88: 4a18 ldr r2, [pc, #96] @ (8001eec ) - 8001e8a: 697b ldr r3, [r7, #20] - 8001e8c: 00db lsls r3, r3, #3 - 8001e8e: 4413 add r3, r2 - 8001e90: 889b ldrh r3, [r3, #4] - 8001e92: 607b str r3, [r7, #4] + 8001c74: 4a18 ldr r2, [pc, #96] @ (8001cd8 ) + 8001c76: 697b ldr r3, [r7, #20] + 8001c78: 00db lsls r3, r3, #3 + 8001c7a: 4413 add r3, r2 + 8001c7c: 889b ldrh r3, [r3, #4] + 8001c7e: 607b str r3, [r7, #4] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; // Open-drain - 8001e94: 2311 movs r3, #17 - 8001e96: 60bb str r3, [r7, #8] + 8001c80: 2311 movs r3, #17 + 8001c82: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001e98: 2300 movs r3, #0 - 8001e9a: 60fb str r3, [r7, #12] + 8001c84: 2300 movs r3, #0 + 8001c86: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001e9c: 2302 movs r3, #2 - 8001e9e: 613b str r3, [r7, #16] + 8001c88: 2302 movs r3, #2 + 8001c8a: 613b str r3, [r7, #16] HAL_GPIO_Init(output_pins[i].port, &GPIO_InitStruct); - 8001ea0: 4a12 ldr r2, [pc, #72] @ (8001eec ) - 8001ea2: 697b ldr r3, [r7, #20] - 8001ea4: f852 3033 ldr.w r3, [r2, r3, lsl #3] - 8001ea8: 1d3a adds r2, r7, #4 - 8001eaa: 4611 mov r1, r2 - 8001eac: 4618 mov r0, r3 - 8001eae: f001 fe1b bl 8003ae8 + 8001c8c: 4a12 ldr r2, [pc, #72] @ (8001cd8 ) + 8001c8e: 697b ldr r3, [r7, #20] + 8001c90: f852 3033 ldr.w r3, [r2, r3, lsl #3] + 8001c94: 1d3a adds r2, r7, #4 + 8001c96: 4611 mov r1, r2 + 8001c98: 4618 mov r0, r3 + 8001c9a: f001 fb65 bl 8003368 // Force initial state to LOW (Reset) HAL_GPIO_WritePin(output_pins[i].port, output_pins[i].pin, GPIO_PIN_RESET); - 8001eb2: 4a0e ldr r2, [pc, #56] @ (8001eec ) - 8001eb4: 697b ldr r3, [r7, #20] - 8001eb6: f852 0033 ldr.w r0, [r2, r3, lsl #3] - 8001eba: 4a0c ldr r2, [pc, #48] @ (8001eec ) - 8001ebc: 697b ldr r3, [r7, #20] - 8001ebe: 00db lsls r3, r3, #3 - 8001ec0: 4413 add r3, r2 - 8001ec2: 889b ldrh r3, [r3, #4] - 8001ec4: 2200 movs r2, #0 - 8001ec6: 4619 mov r1, r3 - 8001ec8: f001 ffa9 bl 8003e1e + 8001c9e: 4a0e ldr r2, [pc, #56] @ (8001cd8 ) + 8001ca0: 697b ldr r3, [r7, #20] + 8001ca2: f852 0033 ldr.w r0, [r2, r3, lsl #3] + 8001ca6: 4a0c ldr r2, [pc, #48] @ (8001cd8 ) + 8001ca8: 697b ldr r3, [r7, #20] + 8001caa: 00db lsls r3, r3, #3 + 8001cac: 4413 add r3, r2 + 8001cae: 889b ldrh r3, [r3, #4] + 8001cb0: 2200 movs r2, #0 + 8001cb2: 4619 mov r1, r3 + 8001cb4: f001 fcf3 bl 800369e pin_states[i] = 0; - 8001ecc: 4a08 ldr r2, [pc, #32] @ (8001ef0 ) - 8001ece: 697b ldr r3, [r7, #20] - 8001ed0: 4413 add r3, r2 - 8001ed2: 2200 movs r2, #0 - 8001ed4: 701a strb r2, [r3, #0] + 8001cb8: 4a08 ldr r2, [pc, #32] @ (8001cdc ) + 8001cba: 697b ldr r3, [r7, #20] + 8001cbc: 4413 add r3, r2 + 8001cbe: 2200 movs r2, #0 + 8001cc0: 701a strb r2, [r3, #0] for (int i = 0; i < OUTPUT_PINS_COUNT; i++) { - 8001ed6: 697b ldr r3, [r7, #20] - 8001ed8: 3301 adds r3, #1 - 8001eda: 617b str r3, [r7, #20] - 8001edc: 697b ldr r3, [r7, #20] - 8001ede: 2b07 cmp r3, #7 - 8001ee0: ddd2 ble.n 8001e88 + 8001cc2: 697b ldr r3, [r7, #20] + 8001cc4: 3301 adds r3, #1 + 8001cc6: 617b str r3, [r7, #20] + 8001cc8: 697b ldr r3, [r7, #20] + 8001cca: 2b07 cmp r3, #7 + 8001ccc: ddd2 ble.n 8001c74 } } - 8001ee2: bf00 nop - 8001ee4: bf00 nop - 8001ee6: 3718 adds r7, #24 - 8001ee8: 46bd mov sp, r7 - 8001eea: bd80 pop {r7, pc} - 8001eec: 080067a4 .word 0x080067a4 - 8001ef0: 2000021c .word 0x2000021c + 8001cce: bf00 nop + 8001cd0: bf00 nop + 8001cd2: 3718 adds r7, #24 + 8001cd4: 46bd mov sp, r7 + 8001cd6: bd80 pop {r7, pc} + 8001cd8: 080066d0 .word 0x080066d0 + 8001cdc: 20000284 .word 0x20000284 -08001ef4 : - * @return HAL_OK em caso de sucesso. - */ - -FlashPage_t flash_data; - -HAL_StatusTypeDef Flash_Save_Page(FlashPage_t *pPage) { - 8001ef4: b5b0 push {r4, r5, r7, lr} - 8001ef6: b08c sub sp, #48 @ 0x30 - 8001ef8: af00 add r7, sp, #0 - 8001efa: 6078 str r0, [r7, #4] - if (pPage == NULL) return HAL_ERROR; - 8001efc: 687b ldr r3, [r7, #4] - 8001efe: 2b00 cmp r3, #0 - 8001f00: d101 bne.n 8001f06 - 8001f02: 2301 movs r3, #1 - 8001f04: e04a b.n 8001f9c - - HAL_StatusTypeDef status = HAL_OK; - 8001f06: 2300 movs r3, #0 - 8001f08: f887 302f strb.w r3, [r7, #47] @ 0x2f - - HAL_FLASH_Unlock(); - 8001f0c: f001 fc5c bl 80037c8 - - // 1. Apagar a página inteira (limpa os 1024 bytes) - FLASH_EraseInitTypeDef EraseInitStruct; - uint32_t PageError = 0; - 8001f10: 2300 movs r3, #0 - 8001f12: 60bb str r3, [r7, #8] - - EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; - 8001f14: 2300 movs r3, #0 - 8001f16: 60fb str r3, [r7, #12] - EraseInitStruct.PageAddress = FLASH_PAGE_ADDR; - 8001f18: 4b22 ldr r3, [pc, #136] @ (8001fa4 ) - 8001f1a: 617b str r3, [r7, #20] - EraseInitStruct.NbPages = 1; - 8001f1c: 2301 movs r3, #1 - 8001f1e: 61bb str r3, [r7, #24] - - if (HAL_FLASHEx_Erase(&EraseInitStruct, &PageError) != HAL_OK) { - 8001f20: f107 0208 add.w r2, r7, #8 - 8001f24: f107 030c add.w r3, r7, #12 - 8001f28: 4611 mov r1, r2 - 8001f2a: 4618 mov r0, r3 - 8001f2c: f001 fd34 bl 8003998 - 8001f30: 4603 mov r3, r0 - 8001f32: 2b00 cmp r3, #0 - 8001f34: d003 beq.n 8001f3e - status = HAL_ERROR; - 8001f36: 2301 movs r3, #1 - 8001f38: f887 302f strb.w r3, [r7, #47] @ 0x2f - goto Exit; - 8001f3c: e02a b.n 8001f94 - - // 2. Gravar o bloco de 1KB - // Como a estrutura é exatamente 1KB e alinhada, podemos tratar como um array de uint32_t. - // O STM32F1 grava preferencialmente em DoubleWord (64-bit), mas HalfWord (16-bit) - // funciona de forma segura para qualquer tamanho múltiplo de 2. - uint32_t *pSrc = (uint32_t *)pPage; - 8001f3e: 687b ldr r3, [r7, #4] - 8001f40: 627b str r3, [r7, #36] @ 0x24 - uint32_t *pDest = (uint32_t *)FLASH_PAGE_ADDR; - 8001f42: 4b18 ldr r3, [pc, #96] @ (8001fa4 ) - 8001f44: 623b str r3, [r7, #32] - uint32_t iterations = FLASH_PAGE_SIZE / sizeof(uint32_t); // 1024 / 4 = 256 iterações - 8001f46: f44f 7380 mov.w r3, #256 @ 0x100 - 8001f4a: 61fb str r3, [r7, #28] - - for (uint32_t i = 0; i < iterations; i++) { - 8001f4c: 2300 movs r3, #0 - 8001f4e: 62bb str r3, [r7, #40] @ 0x28 - 8001f50: e01b b.n 8001f8a - // Usamos o modo de gravação de 32-bit (Word) se disponível, - // ou simulamos com duas gravações de 16-bit para máxima compatuidade no F1. - if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, (uint32_t)&pDest[i], pSrc[i]) != HAL_OK) { - 8001f52: 6abb ldr r3, [r7, #40] @ 0x28 - 8001f54: 009b lsls r3, r3, #2 - 8001f56: 6a3a ldr r2, [r7, #32] - 8001f58: 4413 add r3, r2 - 8001f5a: 4619 mov r1, r3 - 8001f5c: 6abb ldr r3, [r7, #40] @ 0x28 - 8001f5e: 009b lsls r3, r3, #2 - 8001f60: 6a7a ldr r2, [r7, #36] @ 0x24 - 8001f62: 4413 add r3, r2 - 8001f64: 681b ldr r3, [r3, #0] - 8001f66: 2200 movs r2, #0 - 8001f68: 461c mov r4, r3 - 8001f6a: 4615 mov r5, r2 - 8001f6c: 4622 mov r2, r4 - 8001f6e: 462b mov r3, r5 - 8001f70: 2002 movs r0, #2 - 8001f72: f001 fbb9 bl 80036e8 - 8001f76: 4603 mov r3, r0 - 8001f78: 2b00 cmp r3, #0 - 8001f7a: d003 beq.n 8001f84 - status = HAL_ERROR; - 8001f7c: 2301 movs r3, #1 - 8001f7e: f887 302f strb.w r3, [r7, #47] @ 0x2f - break; - 8001f82: e007 b.n 8001f94 - for (uint32_t i = 0; i < iterations; i++) { - 8001f84: 6abb ldr r3, [r7, #40] @ 0x28 - 8001f86: 3301 adds r3, #1 - 8001f88: 62bb str r3, [r7, #40] @ 0x28 - 8001f8a: 6aba ldr r2, [r7, #40] @ 0x28 - 8001f8c: 69fb ldr r3, [r7, #28] - 8001f8e: 429a cmp r2, r3 - 8001f90: d3df bcc.n 8001f52 - } - } - -Exit: - 8001f92: bf00 nop - HAL_FLASH_Lock(); - 8001f94: f001 fc3e bl 8003814 - return status; - 8001f98: f897 302f ldrb.w r3, [r7, #47] @ 0x2f +08001ce0 : } - 8001f9c: 4618 mov r0, r3 - 8001f9e: 3730 adds r7, #48 @ 0x30 - 8001fa0: 46bd mov sp, r7 - 8001fa2: bdb0 pop {r4, r5, r7, pc} - 8001fa4: 0800fc00 .word 0x0800fc00 - -08001fa8 : /** * @brief Lê a página da Flash para a RAM. */ HAL_StatusTypeDef Flash_Load_Page(FlashPage_t *pDest) { - 8001fa8: b580 push {r7, lr} - 8001faa: b082 sub sp, #8 - 8001fac: af00 add r7, sp, #0 - 8001fae: 6078 str r0, [r7, #4] + 8001ce0: b580 push {r7, lr} + 8001ce2: b082 sub sp, #8 + 8001ce4: af00 add r7, sp, #0 + 8001ce6: 6078 str r0, [r7, #4] if (pDest == NULL) return HAL_ERROR; - 8001fb0: 687b ldr r3, [r7, #4] - 8001fb2: 2b00 cmp r3, #0 - 8001fb4: d101 bne.n 8001fba - 8001fb6: 2301 movs r3, #1 - 8001fb8: e00d b.n 8001fd6 + 8001ce8: 687b ldr r3, [r7, #4] + 8001cea: 2b00 cmp r3, #0 + 8001cec: d101 bne.n 8001cf2 + 8001cee: 2301 movs r3, #1 + 8001cf0: e00d b.n 8001d0e // Leitura direta por memcpy (A Flash é mapeada no espaço de endereçamento comum) memcpy(pDest, (void *)FLASH_PAGE_ADDR, FLASH_PAGE_SIZE); - 8001fba: f44f 6280 mov.w r2, #1024 @ 0x400 - 8001fbe: 4908 ldr r1, [pc, #32] @ (8001fe0 ) - 8001fc0: 6878 ldr r0, [r7, #4] - 8001fc2: f004 faa1 bl 8006508 + 8001cf2: f44f 6280 mov.w r2, #1024 @ 0x400 + 8001cf6: 4908 ldr r1, [pc, #32] @ (8001d18 ) + 8001cf8: 6878 ldr r0, [r7, #4] + 8001cfa: f004 fc37 bl 800656c // Validação da integridade através do Magic Number if (pDest->magic_number != 0xDEADBEEF) { - 8001fc6: 687b ldr r3, [r7, #4] - 8001fc8: 681b ldr r3, [r3, #0] - 8001fca: 4a06 ldr r2, [pc, #24] @ (8001fe4 ) - 8001fcc: 4293 cmp r3, r2 - 8001fce: d001 beq.n 8001fd4 + 8001cfe: 687b ldr r3, [r7, #4] + 8001d00: 681b ldr r3, [r3, #0] + 8001d02: 4a06 ldr r2, [pc, #24] @ (8001d1c ) + 8001d04: 4293 cmp r3, r2 + 8001d06: d001 beq.n 8001d0c return HAL_ERROR; - 8001fd0: 2301 movs r3, #1 - 8001fd2: e000 b.n 8001fd6 + 8001d08: 2301 movs r3, #1 + 8001d0a: e000 b.n 8001d0e } return HAL_OK; - 8001fd4: 2300 movs r3, #0 + 8001d0c: 2300 movs r3, #0 } - 8001fd6: 4618 mov r0, r3 - 8001fd8: 3708 adds r7, #8 - 8001fda: 46bd mov sp, r7 - 8001fdc: bd80 pop {r7, pc} - 8001fde: bf00 nop - 8001fe0: 0800fc00 .word 0x0800fc00 - 8001fe4: deadbeef .word 0xdeadbeef + 8001d0e: 4618 mov r0, r3 + 8001d10: 3708 adds r7, #8 + 8001d12: 46bd mov sp, r7 + 8001d14: bd80 pop {r7, pc} + 8001d16: bf00 nop + 8001d18: 0800fc00 .word 0x0800fc00 + 8001d1c: deadbeef .word 0xdeadbeef -08001fe8 : +08001d20 : * EXTI * Free pins are configured automatically as Analog (this feature is enabled through * the Code Generation settings) */ void MX_GPIO_Init(void) { - 8001fe8: b580 push {r7, lr} - 8001fea: b088 sub sp, #32 - 8001fec: af00 add r7, sp, #0 + 8001d20: b580 push {r7, lr} + 8001d22: b088 sub sp, #32 + 8001d24: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001fee: f107 0310 add.w r3, r7, #16 - 8001ff2: 2200 movs r2, #0 - 8001ff4: 601a str r2, [r3, #0] - 8001ff6: 605a str r2, [r3, #4] - 8001ff8: 609a str r2, [r3, #8] - 8001ffa: 60da str r2, [r3, #12] + 8001d26: f107 0310 add.w r3, r7, #16 + 8001d2a: 2200 movs r2, #0 + 8001d2c: 601a str r2, [r3, #0] + 8001d2e: 605a str r2, [r3, #4] + 8001d30: 609a str r2, [r3, #8] + 8001d32: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); - 8001ffc: 4b46 ldr r3, [pc, #280] @ (8002118 ) - 8001ffe: 699b ldr r3, [r3, #24] - 8002000: 4a45 ldr r2, [pc, #276] @ (8002118 ) - 8002002: f043 0310 orr.w r3, r3, #16 - 8002006: 6193 str r3, [r2, #24] - 8002008: 4b43 ldr r3, [pc, #268] @ (8002118 ) - 800200a: 699b ldr r3, [r3, #24] - 800200c: f003 0310 and.w r3, r3, #16 - 8002010: 60fb str r3, [r7, #12] - 8002012: 68fb ldr r3, [r7, #12] + 8001d34: 4b46 ldr r3, [pc, #280] @ (8001e50 ) + 8001d36: 699b ldr r3, [r3, #24] + 8001d38: 4a45 ldr r2, [pc, #276] @ (8001e50 ) + 8001d3a: f043 0310 orr.w r3, r3, #16 + 8001d3e: 6193 str r3, [r2, #24] + 8001d40: 4b43 ldr r3, [pc, #268] @ (8001e50 ) + 8001d42: 699b ldr r3, [r3, #24] + 8001d44: f003 0310 and.w r3, r3, #16 + 8001d48: 60fb str r3, [r7, #12] + 8001d4a: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOD_CLK_ENABLE(); - 8002014: 4b40 ldr r3, [pc, #256] @ (8002118 ) - 8002016: 699b ldr r3, [r3, #24] - 8002018: 4a3f ldr r2, [pc, #252] @ (8002118 ) - 800201a: f043 0320 orr.w r3, r3, #32 - 800201e: 6193 str r3, [r2, #24] - 8002020: 4b3d ldr r3, [pc, #244] @ (8002118 ) - 8002022: 699b ldr r3, [r3, #24] - 8002024: f003 0320 and.w r3, r3, #32 - 8002028: 60bb str r3, [r7, #8] - 800202a: 68bb ldr r3, [r7, #8] + 8001d4c: 4b40 ldr r3, [pc, #256] @ (8001e50 ) + 8001d4e: 699b ldr r3, [r3, #24] + 8001d50: 4a3f ldr r2, [pc, #252] @ (8001e50 ) + 8001d52: f043 0320 orr.w r3, r3, #32 + 8001d56: 6193 str r3, [r2, #24] + 8001d58: 4b3d ldr r3, [pc, #244] @ (8001e50 ) + 8001d5a: 699b ldr r3, [r3, #24] + 8001d5c: f003 0320 and.w r3, r3, #32 + 8001d60: 60bb str r3, [r7, #8] + 8001d62: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); - 800202c: 4b3a ldr r3, [pc, #232] @ (8002118 ) - 800202e: 699b ldr r3, [r3, #24] - 8002030: 4a39 ldr r2, [pc, #228] @ (8002118 ) - 8002032: f043 0304 orr.w r3, r3, #4 - 8002036: 6193 str r3, [r2, #24] - 8002038: 4b37 ldr r3, [pc, #220] @ (8002118 ) - 800203a: 699b ldr r3, [r3, #24] - 800203c: f003 0304 and.w r3, r3, #4 - 8002040: 607b str r3, [r7, #4] - 8002042: 687b ldr r3, [r7, #4] + 8001d64: 4b3a ldr r3, [pc, #232] @ (8001e50 ) + 8001d66: 699b ldr r3, [r3, #24] + 8001d68: 4a39 ldr r2, [pc, #228] @ (8001e50 ) + 8001d6a: f043 0304 orr.w r3, r3, #4 + 8001d6e: 6193 str r3, [r2, #24] + 8001d70: 4b37 ldr r3, [pc, #220] @ (8001e50 ) + 8001d72: 699b ldr r3, [r3, #24] + 8001d74: f003 0304 and.w r3, r3, #4 + 8001d78: 607b str r3, [r7, #4] + 8001d7a: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002044: 4b34 ldr r3, [pc, #208] @ (8002118 ) - 8002046: 699b ldr r3, [r3, #24] - 8002048: 4a33 ldr r2, [pc, #204] @ (8002118 ) - 800204a: f043 0308 orr.w r3, r3, #8 - 800204e: 6193 str r3, [r2, #24] - 8002050: 4b31 ldr r3, [pc, #196] @ (8002118 ) - 8002052: 699b ldr r3, [r3, #24] - 8002054: f003 0308 and.w r3, r3, #8 - 8002058: 603b str r3, [r7, #0] - 800205a: 683b ldr r3, [r7, #0] + 8001d7c: 4b34 ldr r3, [pc, #208] @ (8001e50 ) + 8001d7e: 699b ldr r3, [r3, #24] + 8001d80: 4a33 ldr r2, [pc, #204] @ (8001e50 ) + 8001d82: f043 0308 orr.w r3, r3, #8 + 8001d86: 6193 str r3, [r2, #24] + 8001d88: 4b31 ldr r3, [pc, #196] @ (8001e50 ) + 8001d8a: 699b ldr r3, [r3, #24] + 8001d8c: f003 0308 and.w r3, r3, #8 + 8001d90: 603b str r3, [r7, #0] + 8001d92: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, DIGI_OUT5_Pin|DIGI_OUT6_Pin|DIGI_OUT7_Pin, GPIO_PIN_RESET); - 800205c: 2200 movs r2, #0 - 800205e: f44f 4160 mov.w r1, #57344 @ 0xe000 - 8002062: 482e ldr r0, [pc, #184] @ (800211c ) - 8002064: f001 fedb bl 8003e1e + 8001d94: 2200 movs r2, #0 + 8001d96: f44f 4160 mov.w r1, #57344 @ 0xe000 + 8001d9a: 482e ldr r0, [pc, #184] @ (8001e54 ) + 8001d9c: f001 fc7f bl 800369e /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, DIGI_OUT0_Pin|DIGI_OUT1_Pin|DIGI_OUT2_Pin|LED_Red_Pin - 8002068: 2200 movs r2, #0 - 800206a: f240 3137 movw r1, #823 @ 0x337 - 800206e: 482c ldr r0, [pc, #176] @ (8002120 ) - 8002070: f001 fed5 bl 8003e1e + 8001da0: 2200 movs r2, #0 + 8001da2: f240 3137 movw r1, #823 @ 0x337 + 8001da6: 482c ldr r0, [pc, #176] @ (8001e58 ) + 8001da8: f001 fc79 bl 800369e |LED_Green_Pin|DIGI_OUT3_Pin|DIGI_OUT4_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(TX_EN_RS485_GPIO_Port, TX_EN_RS485_Pin, GPIO_PIN_RESET); - 8002074: 2200 movs r2, #0 - 8002076: f44f 5180 mov.w r1, #4096 @ 0x1000 - 800207a: 482a ldr r0, [pc, #168] @ (8002124 ) - 800207c: f001 fecf bl 8003e1e + 8001dac: 2200 movs r2, #0 + 8001dae: f44f 5180 mov.w r1, #4096 @ 0x1000 + 8001db2: 482a ldr r0, [pc, #168] @ (8001e5c ) + 8001db4: f001 fc73 bl 800369e /*Configure GPIO pins : DIGI_OUT5_Pin DIGI_OUT6_Pin DIGI_OUT7_Pin */ GPIO_InitStruct.Pin = DIGI_OUT5_Pin|DIGI_OUT6_Pin|DIGI_OUT7_Pin; - 8002080: f44f 4360 mov.w r3, #57344 @ 0xe000 - 8002084: 613b str r3, [r7, #16] + 8001db8: f44f 4360 mov.w r3, #57344 @ 0xe000 + 8001dbc: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 8002086: 2311 movs r3, #17 - 8002088: 617b str r3, [r7, #20] + 8001dbe: 2311 movs r3, #17 + 8001dc0: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800208a: 2300 movs r3, #0 - 800208c: 61bb str r3, [r7, #24] + 8001dc2: 2300 movs r3, #0 + 8001dc4: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800208e: 2302 movs r3, #2 - 8002090: 61fb str r3, [r7, #28] + 8001dc6: 2302 movs r3, #2 + 8001dc8: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8002092: f107 0310 add.w r3, r7, #16 - 8002096: 4619 mov r1, r3 - 8002098: 4820 ldr r0, [pc, #128] @ (800211c ) - 800209a: f001 fd25 bl 8003ae8 + 8001dca: f107 0310 add.w r3, r7, #16 + 8001dce: 4619 mov r1, r3 + 8001dd0: 4820 ldr r0, [pc, #128] @ (8001e54 ) + 8001dd2: f001 fac9 bl 8003368 /*Configure GPIO pins : RS485_Addr0_Pin RS485_Addr1_Pin RS485_Addr2_Pin RS485_Addr3_Pin SYS_CFG0_Pin SYS_CFG1_Pin PG_RS485_Pin PG_CE_Pin PG_PH_Pin */ GPIO_InitStruct.Pin = RS485_Addr0_Pin|RS485_Addr1_Pin|RS485_Addr2_Pin|RS485_Addr3_Pin - 800209e: f648 13fc movw r3, #35324 @ 0x89fc - 80020a2: 613b str r3, [r7, #16] + 8001dd6: f648 13fc movw r3, #35324 @ 0x89fc + 8001dda: 613b str r3, [r7, #16] |SYS_CFG0_Pin|SYS_CFG1_Pin|PG_RS485_Pin|PG_CE_Pin |PG_PH_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80020a4: 2300 movs r3, #0 - 80020a6: 617b str r3, [r7, #20] + 8001ddc: 2300 movs r3, #0 + 8001dde: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_PULLUP; - 80020a8: 2301 movs r3, #1 - 80020aa: 61bb str r3, [r7, #24] + 8001de0: 2301 movs r3, #1 + 8001de2: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80020ac: f107 0310 add.w r3, r7, #16 - 80020b0: 4619 mov r1, r3 - 80020b2: 481c ldr r0, [pc, #112] @ (8002124 ) - 80020b4: f001 fd18 bl 8003ae8 + 8001de4: f107 0310 add.w r3, r7, #16 + 8001de8: 4619 mov r1, r3 + 8001dea: 481c ldr r0, [pc, #112] @ (8001e5c ) + 8001dec: f001 fabc bl 8003368 /*Configure GPIO pins : DIGI_OUT0_Pin DIGI_OUT1_Pin DIGI_OUT2_Pin LED_Red_Pin LED_Green_Pin DIGI_OUT3_Pin DIGI_OUT4_Pin */ GPIO_InitStruct.Pin = DIGI_OUT0_Pin|DIGI_OUT1_Pin|DIGI_OUT2_Pin|LED_Red_Pin - 80020b8: f240 3337 movw r3, #823 @ 0x337 - 80020bc: 613b str r3, [r7, #16] + 8001df0: f240 3337 movw r3, #823 @ 0x337 + 8001df4: 613b str r3, [r7, #16] |LED_Green_Pin|DIGI_OUT3_Pin|DIGI_OUT4_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 80020be: 2311 movs r3, #17 - 80020c0: 617b str r3, [r7, #20] + 8001df6: 2311 movs r3, #17 + 8001df8: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80020c2: 2300 movs r3, #0 - 80020c4: 61bb str r3, [r7, #24] + 8001dfa: 2300 movs r3, #0 + 8001dfc: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80020c6: 2302 movs r3, #2 - 80020c8: 61fb str r3, [r7, #28] + 8001dfe: 2302 movs r3, #2 + 8001e00: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80020ca: f107 0310 add.w r3, r7, #16 - 80020ce: 4619 mov r1, r3 - 80020d0: 4813 ldr r0, [pc, #76] @ (8002120 ) - 80020d2: f001 fd09 bl 8003ae8 + 8001e02: f107 0310 add.w r3, r7, #16 + 8001e06: 4619 mov r1, r3 + 8001e08: 4813 ldr r0, [pc, #76] @ (8001e58 ) + 8001e0a: f001 faad bl 8003368 /*Configure GPIO pins : RS485_Addr4_Pin RS485_Addr5_Pin RS485_Addr6_Pin RS485_Addr7_Pin Calib_PH_Pin */ GPIO_InitStruct.Pin = RS485_Addr4_Pin|RS485_Addr5_Pin|RS485_Addr6_Pin|RS485_Addr7_Pin - 80020d6: f24f 0308 movw r3, #61448 @ 0xf008 - 80020da: 613b str r3, [r7, #16] + 8001e0e: f24f 0308 movw r3, #61448 @ 0xf008 + 8001e12: 613b str r3, [r7, #16] |Calib_PH_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80020dc: 2300 movs r3, #0 - 80020de: 617b str r3, [r7, #20] + 8001e14: 2300 movs r3, #0 + 8001e16: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_PULLUP; - 80020e0: 2301 movs r3, #1 - 80020e2: 61bb str r3, [r7, #24] + 8001e18: 2301 movs r3, #1 + 8001e1a: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80020e4: f107 0310 add.w r3, r7, #16 - 80020e8: 4619 mov r1, r3 - 80020ea: 480d ldr r0, [pc, #52] @ (8002120 ) - 80020ec: f001 fcfc bl 8003ae8 + 8001e1c: f107 0310 add.w r3, r7, #16 + 8001e20: 4619 mov r1, r3 + 8001e22: 480d ldr r0, [pc, #52] @ (8001e58 ) + 8001e24: f001 faa0 bl 8003368 /*Configure GPIO pin : TX_EN_RS485_Pin */ GPIO_InitStruct.Pin = TX_EN_RS485_Pin; - 80020f0: f44f 5380 mov.w r3, #4096 @ 0x1000 - 80020f4: 613b str r3, [r7, #16] + 8001e28: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8001e2c: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 80020f6: 2301 movs r3, #1 - 80020f8: 617b str r3, [r7, #20] + 8001e2e: 2301 movs r3, #1 + 8001e30: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80020fa: 2300 movs r3, #0 - 80020fc: 61bb str r3, [r7, #24] + 8001e32: 2300 movs r3, #0 + 8001e34: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80020fe: 2302 movs r3, #2 - 8002100: 61fb str r3, [r7, #28] + 8001e36: 2302 movs r3, #2 + 8001e38: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_EN_RS485_GPIO_Port, &GPIO_InitStruct); - 8002102: f107 0310 add.w r3, r7, #16 - 8002106: 4619 mov r1, r3 - 8002108: 4806 ldr r0, [pc, #24] @ (8002124 ) - 800210a: f001 fced bl 8003ae8 + 8001e3a: f107 0310 add.w r3, r7, #16 + 8001e3e: 4619 mov r1, r3 + 8001e40: 4806 ldr r0, [pc, #24] @ (8001e5c ) + 8001e42: f001 fa91 bl 8003368 } - 800210e: bf00 nop - 8002110: 3720 adds r7, #32 - 8002112: 46bd mov sp, r7 - 8002114: bd80 pop {r7, pc} - 8002116: bf00 nop - 8002118: 40021000 .word 0x40021000 - 800211c: 40011000 .word 0x40011000 - 8002120: 40010c00 .word 0x40010c00 - 8002124: 40010800 .word 0x40010800 + 8001e46: bf00 nop + 8001e48: 3720 adds r7, #32 + 8001e4a: 46bd mov sp, r7 + 8001e4c: bd80 pop {r7, pc} + 8001e4e: bf00 nop + 8001e50: 40021000 .word 0x40021000 + 8001e54: 40011000 .word 0x40011000 + 8001e58: 40010c00 .word 0x40010c00 + 8001e5c: 40010800 .word 0x40010800 -08002128 : +08001e60 : I2C_HandleTypeDef hi2c1; I2C_HandleTypeDef hi2c2; /* I2C1 init function */ void MX_I2C1_Init(void) { - 8002128: b580 push {r7, lr} - 800212a: af00 add r7, sp, #0 + 8001e60: b580 push {r7, lr} + 8001e62: af00 add r7, sp, #0 /* USER CODE END I2C1_Init 0 */ /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ hi2c1.Instance = I2C1; - 800212c: 4b12 ldr r3, [pc, #72] @ (8002178 ) - 800212e: 4a13 ldr r2, [pc, #76] @ (800217c ) - 8002130: 601a str r2, [r3, #0] + 8001e64: 4b12 ldr r3, [pc, #72] @ (8001eb0 ) + 8001e66: 4a13 ldr r2, [pc, #76] @ (8001eb4 ) + 8001e68: 601a str r2, [r3, #0] hi2c1.Init.ClockSpeed = 100000; - 8002132: 4b11 ldr r3, [pc, #68] @ (8002178 ) - 8002134: 4a12 ldr r2, [pc, #72] @ (8002180 ) - 8002136: 605a str r2, [r3, #4] + 8001e6a: 4b11 ldr r3, [pc, #68] @ (8001eb0 ) + 8001e6c: 4a12 ldr r2, [pc, #72] @ (8001eb8 ) + 8001e6e: 605a str r2, [r3, #4] hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2; - 8002138: 4b0f ldr r3, [pc, #60] @ (8002178 ) - 800213a: 2200 movs r2, #0 - 800213c: 609a str r2, [r3, #8] + 8001e70: 4b0f ldr r3, [pc, #60] @ (8001eb0 ) + 8001e72: 2200 movs r2, #0 + 8001e74: 609a str r2, [r3, #8] hi2c1.Init.OwnAddress1 = 0; - 800213e: 4b0e ldr r3, [pc, #56] @ (8002178 ) - 8002140: 2200 movs r2, #0 - 8002142: 60da str r2, [r3, #12] + 8001e76: 4b0e ldr r3, [pc, #56] @ (8001eb0 ) + 8001e78: 2200 movs r2, #0 + 8001e7a: 60da str r2, [r3, #12] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 8002144: 4b0c ldr r3, [pc, #48] @ (8002178 ) - 8002146: f44f 4280 mov.w r2, #16384 @ 0x4000 - 800214a: 611a str r2, [r3, #16] + 8001e7c: 4b0c ldr r3, [pc, #48] @ (8001eb0 ) + 8001e7e: f44f 4280 mov.w r2, #16384 @ 0x4000 + 8001e82: 611a str r2, [r3, #16] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 800214c: 4b0a ldr r3, [pc, #40] @ (8002178 ) - 800214e: 2200 movs r2, #0 - 8002150: 615a str r2, [r3, #20] + 8001e84: 4b0a ldr r3, [pc, #40] @ (8001eb0 ) + 8001e86: 2200 movs r2, #0 + 8001e88: 615a str r2, [r3, #20] hi2c1.Init.OwnAddress2 = 0; - 8002152: 4b09 ldr r3, [pc, #36] @ (8002178 ) - 8002154: 2200 movs r2, #0 - 8002156: 619a str r2, [r3, #24] + 8001e8a: 4b09 ldr r3, [pc, #36] @ (8001eb0 ) + 8001e8c: 2200 movs r2, #0 + 8001e8e: 619a str r2, [r3, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 8002158: 4b07 ldr r3, [pc, #28] @ (8002178 ) - 800215a: 2200 movs r2, #0 - 800215c: 61da str r2, [r3, #28] + 8001e90: 4b07 ldr r3, [pc, #28] @ (8001eb0 ) + 8001e92: 2200 movs r2, #0 + 8001e94: 61da str r2, [r3, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 800215e: 4b06 ldr r3, [pc, #24] @ (8002178 ) - 8002160: 2200 movs r2, #0 - 8002162: 621a str r2, [r3, #32] + 8001e96: 4b06 ldr r3, [pc, #24] @ (8001eb0 ) + 8001e98: 2200 movs r2, #0 + 8001e9a: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) - 8002164: 4804 ldr r0, [pc, #16] @ (8002178 ) - 8002166: f001 fe8b bl 8003e80 - 800216a: 4603 mov r3, r0 - 800216c: 2b00 cmp r3, #0 - 800216e: d001 beq.n 8002174 + 8001e9c: 4804 ldr r0, [pc, #16] @ (8001eb0 ) + 8001e9e: f001 fc2f bl 8003700 + 8001ea2: 4603 mov r3, r0 + 8001ea4: 2b00 cmp r3, #0 + 8001ea6: d001 beq.n 8001eac { Error_Handler(); - 8002170: f000 fc56 bl 8002a20 + 8001ea8: f000 fb7c bl 80025a4 } /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } - 8002174: bf00 nop - 8002176: bd80 pop {r7, pc} - 8002178: 20000624 .word 0x20000624 - 800217c: 40005400 .word 0x40005400 - 8002180: 000186a0 .word 0x000186a0 + 8001eac: bf00 nop + 8001eae: bd80 pop {r7, pc} + 8001eb0: 2000068c .word 0x2000068c + 8001eb4: 40005400 .word 0x40005400 + 8001eb8: 000186a0 .word 0x000186a0 -08002184 : +08001ebc : /* I2C2 init function */ void MX_I2C2_Init(void) { - 8002184: b580 push {r7, lr} - 8002186: af00 add r7, sp, #0 + 8001ebc: b580 push {r7, lr} + 8001ebe: af00 add r7, sp, #0 /* USER CODE END I2C2_Init 0 */ /* USER CODE BEGIN I2C2_Init 1 */ /* USER CODE END I2C2_Init 1 */ hi2c2.Instance = I2C2; - 8002188: 4b12 ldr r3, [pc, #72] @ (80021d4 ) - 800218a: 4a13 ldr r2, [pc, #76] @ (80021d8 ) - 800218c: 601a str r2, [r3, #0] + 8001ec0: 4b12 ldr r3, [pc, #72] @ (8001f0c ) + 8001ec2: 4a13 ldr r2, [pc, #76] @ (8001f10 ) + 8001ec4: 601a str r2, [r3, #0] hi2c2.Init.ClockSpeed = 100000; - 800218e: 4b11 ldr r3, [pc, #68] @ (80021d4 ) - 8002190: 4a12 ldr r2, [pc, #72] @ (80021dc ) - 8002192: 605a str r2, [r3, #4] + 8001ec6: 4b11 ldr r3, [pc, #68] @ (8001f0c ) + 8001ec8: 4a12 ldr r2, [pc, #72] @ (8001f14 ) + 8001eca: 605a str r2, [r3, #4] hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; - 8002194: 4b0f ldr r3, [pc, #60] @ (80021d4 ) - 8002196: 2200 movs r2, #0 - 8002198: 609a str r2, [r3, #8] + 8001ecc: 4b0f ldr r3, [pc, #60] @ (8001f0c ) + 8001ece: 2200 movs r2, #0 + 8001ed0: 609a str r2, [r3, #8] hi2c2.Init.OwnAddress1 = 0; - 800219a: 4b0e ldr r3, [pc, #56] @ (80021d4 ) - 800219c: 2200 movs r2, #0 - 800219e: 60da str r2, [r3, #12] + 8001ed2: 4b0e ldr r3, [pc, #56] @ (8001f0c ) + 8001ed4: 2200 movs r2, #0 + 8001ed6: 60da str r2, [r3, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 80021a0: 4b0c ldr r3, [pc, #48] @ (80021d4 ) - 80021a2: f44f 4280 mov.w r2, #16384 @ 0x4000 - 80021a6: 611a str r2, [r3, #16] + 8001ed8: 4b0c ldr r3, [pc, #48] @ (8001f0c ) + 8001eda: f44f 4280 mov.w r2, #16384 @ 0x4000 + 8001ede: 611a str r2, [r3, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 80021a8: 4b0a ldr r3, [pc, #40] @ (80021d4 ) - 80021aa: 2200 movs r2, #0 - 80021ac: 615a str r2, [r3, #20] + 8001ee0: 4b0a ldr r3, [pc, #40] @ (8001f0c ) + 8001ee2: 2200 movs r2, #0 + 8001ee4: 615a str r2, [r3, #20] hi2c2.Init.OwnAddress2 = 0; - 80021ae: 4b09 ldr r3, [pc, #36] @ (80021d4 ) - 80021b0: 2200 movs r2, #0 - 80021b2: 619a str r2, [r3, #24] + 8001ee6: 4b09 ldr r3, [pc, #36] @ (8001f0c ) + 8001ee8: 2200 movs r2, #0 + 8001eea: 619a str r2, [r3, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 80021b4: 4b07 ldr r3, [pc, #28] @ (80021d4 ) - 80021b6: 2200 movs r2, #0 - 80021b8: 61da str r2, [r3, #28] + 8001eec: 4b07 ldr r3, [pc, #28] @ (8001f0c ) + 8001eee: 2200 movs r2, #0 + 8001ef0: 61da str r2, [r3, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 80021ba: 4b06 ldr r3, [pc, #24] @ (80021d4 ) - 80021bc: 2200 movs r2, #0 - 80021be: 621a str r2, [r3, #32] + 8001ef2: 4b06 ldr r3, [pc, #24] @ (8001f0c ) + 8001ef4: 2200 movs r2, #0 + 8001ef6: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) - 80021c0: 4804 ldr r0, [pc, #16] @ (80021d4 ) - 80021c2: f001 fe5d bl 8003e80 - 80021c6: 4603 mov r3, r0 - 80021c8: 2b00 cmp r3, #0 - 80021ca: d001 beq.n 80021d0 + 8001ef8: 4804 ldr r0, [pc, #16] @ (8001f0c ) + 8001efa: f001 fc01 bl 8003700 + 8001efe: 4603 mov r3, r0 + 8001f00: 2b00 cmp r3, #0 + 8001f02: d001 beq.n 8001f08 { Error_Handler(); - 80021cc: f000 fc28 bl 8002a20 + 8001f04: f000 fb4e bl 80025a4 } /* USER CODE BEGIN I2C2_Init 2 */ /* USER CODE END I2C2_Init 2 */ } - 80021d0: bf00 nop - 80021d2: bd80 pop {r7, pc} - 80021d4: 20000678 .word 0x20000678 - 80021d8: 40005800 .word 0x40005800 - 80021dc: 000186a0 .word 0x000186a0 + 8001f08: bf00 nop + 8001f0a: bd80 pop {r7, pc} + 8001f0c: 200006e0 .word 0x200006e0 + 8001f10: 40005800 .word 0x40005800 + 8001f14: 000186a0 .word 0x000186a0 -080021e0 : +08001f18 : void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) { - 80021e0: b580 push {r7, lr} - 80021e2: b08a sub sp, #40 @ 0x28 - 80021e4: af00 add r7, sp, #0 - 80021e6: 6078 str r0, [r7, #4] + 8001f18: b580 push {r7, lr} + 8001f1a: b08a sub sp, #40 @ 0x28 + 8001f1c: af00 add r7, sp, #0 + 8001f1e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80021e8: f107 0318 add.w r3, r7, #24 - 80021ec: 2200 movs r2, #0 - 80021ee: 601a str r2, [r3, #0] - 80021f0: 605a str r2, [r3, #4] - 80021f2: 609a str r2, [r3, #8] - 80021f4: 60da str r2, [r3, #12] + 8001f20: f107 0318 add.w r3, r7, #24 + 8001f24: 2200 movs r2, #0 + 8001f26: 601a str r2, [r3, #0] + 8001f28: 605a str r2, [r3, #4] + 8001f2a: 609a str r2, [r3, #8] + 8001f2c: 60da str r2, [r3, #12] if(i2cHandle->Instance==I2C1) - 80021f6: 687b ldr r3, [r7, #4] - 80021f8: 681b ldr r3, [r3, #0] - 80021fa: 4a2b ldr r2, [pc, #172] @ (80022a8 ) - 80021fc: 4293 cmp r3, r2 - 80021fe: d124 bne.n 800224a + 8001f2e: 687b ldr r3, [r7, #4] + 8001f30: 681b ldr r3, [r3, #0] + 8001f32: 4a2b ldr r2, [pc, #172] @ (8001fe0 ) + 8001f34: 4293 cmp r3, r2 + 8001f36: d124 bne.n 8001f82 { /* USER CODE BEGIN I2C1_MspInit 0 */ /* USER CODE END I2C1_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002200: 4b2a ldr r3, [pc, #168] @ (80022ac ) - 8002202: 699b ldr r3, [r3, #24] - 8002204: 4a29 ldr r2, [pc, #164] @ (80022ac ) - 8002206: f043 0308 orr.w r3, r3, #8 - 800220a: 6193 str r3, [r2, #24] - 800220c: 4b27 ldr r3, [pc, #156] @ (80022ac ) - 800220e: 699b ldr r3, [r3, #24] - 8002210: f003 0308 and.w r3, r3, #8 - 8002214: 617b str r3, [r7, #20] - 8002216: 697b ldr r3, [r7, #20] + 8001f38: 4b2a ldr r3, [pc, #168] @ (8001fe4 ) + 8001f3a: 699b ldr r3, [r3, #24] + 8001f3c: 4a29 ldr r2, [pc, #164] @ (8001fe4 ) + 8001f3e: f043 0308 orr.w r3, r3, #8 + 8001f42: 6193 str r3, [r2, #24] + 8001f44: 4b27 ldr r3, [pc, #156] @ (8001fe4 ) + 8001f46: 699b ldr r3, [r3, #24] + 8001f48: f003 0308 and.w r3, r3, #8 + 8001f4c: 617b str r3, [r7, #20] + 8001f4e: 697b ldr r3, [r7, #20] /**I2C1 GPIO Configuration PB6 ------> I2C1_SCL PB7 ------> I2C1_SDA */ GPIO_InitStruct.Pin = I2C1_SCL_PH_Pin|I2C1_SDA_PH_Pin; - 8002218: 23c0 movs r3, #192 @ 0xc0 - 800221a: 61bb str r3, [r7, #24] + 8001f50: 23c0 movs r3, #192 @ 0xc0 + 8001f52: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 800221c: 2312 movs r3, #18 - 800221e: 61fb str r3, [r7, #28] + 8001f54: 2312 movs r3, #18 + 8001f56: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002220: 2302 movs r3, #2 - 8002222: 627b str r3, [r7, #36] @ 0x24 + 8001f58: 2302 movs r3, #2 + 8001f5a: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002224: f107 0318 add.w r3, r7, #24 - 8002228: 4619 mov r1, r3 - 800222a: 4821 ldr r0, [pc, #132] @ (80022b0 ) - 800222c: f001 fc5c bl 8003ae8 + 8001f5c: f107 0318 add.w r3, r7, #24 + 8001f60: 4619 mov r1, r3 + 8001f62: 4821 ldr r0, [pc, #132] @ (8001fe8 ) + 8001f64: f001 fa00 bl 8003368 /* I2C1 clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); - 8002230: 4b1e ldr r3, [pc, #120] @ (80022ac ) - 8002232: 69db ldr r3, [r3, #28] - 8002234: 4a1d ldr r2, [pc, #116] @ (80022ac ) - 8002236: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 - 800223a: 61d3 str r3, [r2, #28] - 800223c: 4b1b ldr r3, [pc, #108] @ (80022ac ) - 800223e: 69db ldr r3, [r3, #28] - 8002240: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 8002244: 613b str r3, [r7, #16] - 8002246: 693b ldr r3, [r7, #16] + 8001f68: 4b1e ldr r3, [pc, #120] @ (8001fe4 ) + 8001f6a: 69db ldr r3, [r3, #28] + 8001f6c: 4a1d ldr r2, [pc, #116] @ (8001fe4 ) + 8001f6e: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 + 8001f72: 61d3 str r3, [r2, #28] + 8001f74: 4b1b ldr r3, [pc, #108] @ (8001fe4 ) + 8001f76: 69db ldr r3, [r3, #28] + 8001f78: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 8001f7c: 613b str r3, [r7, #16] + 8001f7e: 693b ldr r3, [r7, #16] __HAL_RCC_I2C2_CLK_ENABLE(); /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } - 8002248: e029 b.n 800229e + 8001f80: e029 b.n 8001fd6 else if(i2cHandle->Instance==I2C2) - 800224a: 687b ldr r3, [r7, #4] - 800224c: 681b ldr r3, [r3, #0] - 800224e: 4a19 ldr r2, [pc, #100] @ (80022b4 ) - 8002250: 4293 cmp r3, r2 - 8002252: d124 bne.n 800229e + 8001f82: 687b ldr r3, [r7, #4] + 8001f84: 681b ldr r3, [r3, #0] + 8001f86: 4a19 ldr r2, [pc, #100] @ (8001fec ) + 8001f88: 4293 cmp r3, r2 + 8001f8a: d124 bne.n 8001fd6 __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002254: 4b15 ldr r3, [pc, #84] @ (80022ac ) - 8002256: 699b ldr r3, [r3, #24] - 8002258: 4a14 ldr r2, [pc, #80] @ (80022ac ) - 800225a: f043 0308 orr.w r3, r3, #8 - 800225e: 6193 str r3, [r2, #24] - 8002260: 4b12 ldr r3, [pc, #72] @ (80022ac ) - 8002262: 699b ldr r3, [r3, #24] - 8002264: f003 0308 and.w r3, r3, #8 - 8002268: 60fb str r3, [r7, #12] - 800226a: 68fb ldr r3, [r7, #12] + 8001f8c: 4b15 ldr r3, [pc, #84] @ (8001fe4 ) + 8001f8e: 699b ldr r3, [r3, #24] + 8001f90: 4a14 ldr r2, [pc, #80] @ (8001fe4 ) + 8001f92: f043 0308 orr.w r3, r3, #8 + 8001f96: 6193 str r3, [r2, #24] + 8001f98: 4b12 ldr r3, [pc, #72] @ (8001fe4 ) + 8001f9a: 699b ldr r3, [r3, #24] + 8001f9c: f003 0308 and.w r3, r3, #8 + 8001fa0: 60fb str r3, [r7, #12] + 8001fa2: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = I2C2_SCL_CE_Pin|I2C2_SDA_CE_Pin; - 800226c: f44f 6340 mov.w r3, #3072 @ 0xc00 - 8002270: 61bb str r3, [r7, #24] + 8001fa4: f44f 6340 mov.w r3, #3072 @ 0xc00 + 8001fa8: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 8002272: 2312 movs r3, #18 - 8002274: 61fb str r3, [r7, #28] + 8001faa: 2312 movs r3, #18 + 8001fac: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002276: 2302 movs r3, #2 - 8002278: 627b str r3, [r7, #36] @ 0x24 + 8001fae: 2302 movs r3, #2 + 8001fb0: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 800227a: f107 0318 add.w r3, r7, #24 - 800227e: 4619 mov r1, r3 - 8002280: 480b ldr r0, [pc, #44] @ (80022b0 ) - 8002282: f001 fc31 bl 8003ae8 + 8001fb2: f107 0318 add.w r3, r7, #24 + 8001fb6: 4619 mov r1, r3 + 8001fb8: 480b ldr r0, [pc, #44] @ (8001fe8 ) + 8001fba: f001 f9d5 bl 8003368 __HAL_RCC_I2C2_CLK_ENABLE(); - 8002286: 4b09 ldr r3, [pc, #36] @ (80022ac ) - 8002288: 69db ldr r3, [r3, #28] - 800228a: 4a08 ldr r2, [pc, #32] @ (80022ac ) - 800228c: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 - 8002290: 61d3 str r3, [r2, #28] - 8002292: 4b06 ldr r3, [pc, #24] @ (80022ac ) - 8002294: 69db ldr r3, [r3, #28] - 8002296: f403 0380 and.w r3, r3, #4194304 @ 0x400000 - 800229a: 60bb str r3, [r7, #8] - 800229c: 68bb ldr r3, [r7, #8] + 8001fbe: 4b09 ldr r3, [pc, #36] @ (8001fe4 ) + 8001fc0: 69db ldr r3, [r3, #28] + 8001fc2: 4a08 ldr r2, [pc, #32] @ (8001fe4 ) + 8001fc4: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 + 8001fc8: 61d3 str r3, [r2, #28] + 8001fca: 4b06 ldr r3, [pc, #24] @ (8001fe4 ) + 8001fcc: 69db ldr r3, [r3, #28] + 8001fce: f403 0380 and.w r3, r3, #4194304 @ 0x400000 + 8001fd2: 60bb str r3, [r7, #8] + 8001fd4: 68bb ldr r3, [r7, #8] } - 800229e: bf00 nop - 80022a0: 3728 adds r7, #40 @ 0x28 - 80022a2: 46bd mov sp, r7 - 80022a4: bd80 pop {r7, pc} - 80022a6: bf00 nop - 80022a8: 40005400 .word 0x40005400 - 80022ac: 40021000 .word 0x40021000 - 80022b0: 40010c00 .word 0x40010c00 - 80022b4: 40005800 .word 0x40005800 + 8001fd6: bf00 nop + 8001fd8: 3728 adds r7, #40 @ 0x28 + 8001fda: 46bd mov sp, r7 + 8001fdc: bd80 pop {r7, pc} + 8001fde: bf00 nop + 8001fe0: 40005400 .word 0x40005400 + 8001fe4: 40021000 .word 0x40021000 + 8001fe8: 40010c00 .word 0x40010c00 + 8001fec: 40005800 .word 0x40005800 -080022b8
: +08001ff0
: /** * @brief The application entry point. * @retval int */ int main(void) { - 80022b8: b590 push {r4, r7, lr} - 80022ba: b093 sub sp, #76 @ 0x4c - 80022bc: af00 add r7, sp, #0 + 8001ff0: b580 push {r7, lr} + 8001ff2: b08e sub sp, #56 @ 0x38 + 8001ff4: af00 add r7, sp, #0 /* USER CODE BEGIN 1 */ HAL_StatusTypeDef status0,status1; // Variables to store previous LED states uint8_t previous_green_state = 0; - 80022be: 2300 movs r3, #0 - 80022c0: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 8001ff6: 2300 movs r3, #0 + 8001ff8: f887 3037 strb.w r3, [r7, #55] @ 0x37 uint8_t previous_red_state = 0; - 80022c4: 2300 movs r3, #0 - 80022c6: f887 3046 strb.w r3, [r7, #70] @ 0x46 + 8001ffc: 2300 movs r3, #0 + 8001ffe: f887 3036 strb.w r3, [r7, #54] @ 0x36 // Variables for timing uint32_t previous_millis_green = 0; - 80022ca: 2300 movs r3, #0 - 80022cc: 643b str r3, [r7, #64] @ 0x40 + 8002002: 2300 movs r3, #0 + 8002004: 633b str r3, [r7, #48] @ 0x30 uint32_t previous_millis_red = 0; - 80022ce: 2300 movs r3, #0 - 80022d0: 63fb str r3, [r7, #60] @ 0x3c + 8002006: 2300 movs r3, #0 + 8002008: 62fb str r3, [r7, #44] @ 0x2c /*! Temporary variables */ uint8_t tempString[10] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; - 80022d2: f107 030c add.w r3, r7, #12 - 80022d6: 2200 movs r2, #0 - 80022d8: 601a str r2, [r3, #0] - 80022da: 605a str r2, [r3, #4] - 80022dc: 811a strh r2, [r3, #8] + 800200a: f107 0308 add.w r3, r7, #8 + 800200e: 2200 movs r2, #0 + 8002010: 601a str r2, [r3, #0] + 8002012: 605a str r2, [r3, #4] + 8002014: 811a strh r2, [r3, #8] /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 80022de: f000 fdab bl 8002e38 + 8002016: f000 fd4f bl 8002ab8 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 80022e2: f000 fa39 bl 8002758 + 800201a: f000 f947 bl 80022ac /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 80022e6: f7ff fe7f bl 8001fe8 + 800201e: f7ff fe7f bl 8001d20 MX_ADC1_Init(); - 80022ea: f7ff fab5 bl 8001858 + 8002022: f7ff fae5 bl 80015f0 MX_ADC2_Init(); - 80022ee: f7ff faf1 bl 80018d4 + 8002026: f7ff fb21 bl 800166c MX_I2C1_Init(); - 80022f2: f7ff ff19 bl 8002128 + 800202a: f7ff ff19 bl 8001e60 MX_I2C2_Init(); - 80022f6: f7ff ff45 bl 8002184 + 800202e: f7ff ff45 bl 8001ebc MX_USART1_UART_Init(); - 80022fa: f000 fcf9 bl 8002cf0 + 8002032: f000 fc9d bl 8002970 + MX_TIM3_Init(); + 8002036: f000 fc27 bl 8002888 /* USER CODE BEGIN 2 */ + + Flash_Load_Page(&flash_data); - 80022fe: 4854 ldr r0, [pc, #336] @ (8002450 ) - 8002300: f7ff fe52 bl 8001fa8 - HAL_TIM_Base_Start(&htim3); + 800203a: 488b ldr r0, [pc, #556] @ (8002268 ) + 800203c: f7ff fe50 bl 8001ce0 + + + HAL_TIM_Base_Start_IT(&htim3); + 8002040: 488a ldr r0, [pc, #552] @ (800226c ) + 8002042: f003 f8a9 bl 8005198 +/* HAL_ADCEx_Calibration_Start(&hadc1); HAL_ADC_Start_DMA(&hadc1, (uint32_t*)AD_RES, 2); // Internal Temperature conversion */ digital_outputs_init(); - 8002304: f7ff fdb4 bl 8001e70 + 8002046: f7ff fe09 bl 8001c5c // Initialize RS-485 driver rs485_init(); - 8002308: f000 fb9c bl 8002a44 + 800204a: f000 fabd bl 80025c8 + + + ADS1015(&i2c_ads1015, &hi2c1, ADS1015_ADDR_GND); + 800204e: 2290 movs r2, #144 @ 0x90 + 8002050: 4987 ldr r1, [pc, #540] @ (8002270 ) + 8002052: 4888 ldr r0, [pc, #544] @ (8002274 ) + 8002054: f7ff fbf9 bl 800184a + + - ADS1015(&i2c, &hi2c1, ADS_ADDR_GND); - 800230c: 2248 movs r2, #72 @ 0x48 - 800230e: 4951 ldr r1, [pc, #324] @ (8002454 ) - 8002310: 4851 ldr r0, [pc, #324] @ (8002458 ) - 8002312: f7ff fbce bl 8001ab2 - ADSsetGain(&i2c, GAIN_FOUR); - 8002316: f44f 61c0 mov.w r1, #1536 @ 0x600 - 800231a: 484f ldr r0, [pc, #316] @ (8002458 ) - 800231c: f7ff fbe7 bl 8001aee ADG715_ResetChannels(); - 8002320: f7ff fa72 bl 8001808 + 8002058: f7ff faa2 bl 80015a0 // Start CE and RTD Measurement AD5934_Init(); - 8002324: f7fe fe3a bl 8000f9c - /* USER CODE END 2 */ - - /* Infinite loop */ - /* USER CODE BEGIN WHILE */ - - for(i=0;i - { - refResistance = AD5934_Get_Ref_Resistance(); // On Board Resistor - 8002330: f7fe fe90 bl 8001054 - 8002334: 6378 str r0, [r7, #52] @ 0x34 - temperature_RTD = AD5934_GetTemperature(refResistance); // Liquid Temperature is stored - 8002336: 6b78 ldr r0, [r7, #52] @ 0x34 - 8002338: f7fe ff18 bl 800116c - 800233c: 63b8 str r0, [r7, #56] @ 0x38 - admittance_EC = AD5934_GetImpedance(temperature_RTD); - 800233e: 6bb8 ldr r0, [r7, #56] @ 0x38 - 8002340: f7ff f806 bl 8001350 - 8002344: 61f8 str r0, [r7, #28] - ph_compensated = ADSCalculate_ph_Compensated(temperature_RTD); - 8002346: 6bb8 ldr r0, [r7, #56] @ 0x38 - 8002348: f7ff fc74 bl 8001c34 - 800234c: 61b8 str r0, [r7, #24] - for(i=0;i - } - - - if(HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_3) == GPIO_PIN_RESET) // When PB3 (with internal pull up) in the Prog Header is set to GND - 8002360: 2108 movs r1, #8 - 8002362: 483e ldr r0, [pc, #248] @ (800245c ) - 8002364: f001 fd44 bl 8003df0 - 8002368: 4603 mov r3, r0 - 800236a: 2b00 cmp r3, #0 - 800236c: f040 80dd bne.w 800252a - { - - main_state = STATE_PH4_DRY_EC_CALIBRATION; - 8002370: 4b3b ldr r3, [pc, #236] @ (8002460 ) - 8002372: 2202 movs r2, #2 - 8002374: 701a strb r2, [r3, #0] - - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); - 8002376: 2201 movs r2, #1 - 8002378: 2110 movs r1, #16 - 800237a: 4838 ldr r0, [pc, #224] @ (800245c ) - 800237c: f001 fd4f bl 8003e1e - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_RESET); // Red LED On - 8002380: 2200 movs r2, #0 - 8002382: 2120 movs r1, #32 - 8002384: 4835 ldr r0, [pc, #212] @ (800245c ) - 8002386: f001 fd4a bl 8003e1e - - for(i=0;i<(2*AD5934_TEMP_AVERAGES);i++) // Loop to get stability and get averages - 800238a: 2300 movs r3, #0 - 800238c: f887 3033 strb.w r3, [r7, #51] @ 0x33 - 8002390: e033 b.n 80023fa - { - flash_data.ph4_mV = ADSCalculate_ph_mV(); - 8002392: f7ff fbf9 bl 8001b88 - 8002396: 4603 mov r3, r0 - 8002398: 4a2d ldr r2, [pc, #180] @ (8002450 ) - 800239a: 6053 str r3, [r2, #4] - temperature_RTD = AD5934_GetTemperature(refResistance); // Air Temperature is not used in the function - 800239c: 6b78 ldr r0, [r7, #52] @ 0x34 - 800239e: f7fe fee5 bl 800116c - 80023a2: 63b8 str r0, [r7, #56] @ 0x38 - flash_data.ec0_mag = AD5934_GetImpedance(temperature_RTD); // Dry Probe - 80023a4: 6bb8 ldr r0, [r7, #56] @ 0x38 - 80023a6: f7fe ffd3 bl 8001350 - 80023aa: 4603 mov r3, r0 - 80023ac: 4a28 ldr r2, [pc, #160] @ (8002450 ) - 80023ae: 61d3 str r3, [r2, #28] - if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) - 80023b0: 2140 movs r1, #64 @ 0x40 - 80023b2: 482c ldr r0, [pc, #176] @ (8002464 ) - 80023b4: f001 fd1c bl 8003df0 - 80023b8: 4603 mov r3, r0 - 80023ba: 2b01 cmp r3, #1 - 80023bc: d104 bne.n 80023c8 - flash_data.EC10mS_EC5mS_switch = AD5934_CH_EC_HIGH_GAIN; // 5mS/cm option - 80023be: 4b24 ldr r3, [pc, #144] @ (8002450 ) - 80023c0: 220e movs r2, #14 - 80023c2: f883 2025 strb.w r2, [r3, #37] @ 0x25 - 80023c6: e003 b.n 80023d0 - else - flash_data.EC10mS_EC5mS_switch = AD5934_CH_EC_MID_GAIN; //10ms/cm option - 80023c8: 4b21 ldr r3, [pc, #132] @ (8002450 ) - 80023ca: 220d movs r2, #13 - 80023cc: f883 2025 strb.w r2, [r3, #37] @ 0x25 - if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) - 80023d0: 2180 movs r1, #128 @ 0x80 - 80023d2: 4824 ldr r0, [pc, #144] @ (8002464 ) - 80023d4: f001 fd0c bl 8003df0 - 80023d8: 4603 mov r3, r0 - 80023da: 2b01 cmp r3, #1 - 80023dc: d104 bne.n 80023e8 - flash_data.PT100_PT1000_switch = AD5934_CH_RTD_LOW_GAIN; //PT100 option - 80023de: 4b1c ldr r3, [pc, #112] @ (8002450 ) - 80023e0: 2209 movs r2, #9 - 80023e2: f883 2024 strb.w r2, [r3, #36] @ 0x24 - 80023e6: e003 b.n 80023f0 - else - flash_data.PT100_PT1000_switch = AD5934_CH_RTD_MID_GAIN; //PT1000 option - 80023e8: 4b19 ldr r3, [pc, #100] @ (8002450 ) - 80023ea: 220a movs r2, #10 - 80023ec: f883 2024 strb.w r2, [r3, #36] @ 0x24 - for(i=0;i<(2*AD5934_TEMP_AVERAGES);i++) // Loop to get stability and get averages - 80023f0: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 - 80023f4: 3301 adds r3, #1 - 80023f6: f887 3033 strb.w r3, [r7, #51] @ 0x33 - 80023fa: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 - 80023fe: 2b1f cmp r3, #31 - 8002400: d9c7 bls.n 8002392 - - } - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_RESET); // Green LED On - 8002402: 2200 movs r2, #0 - 8002404: 2110 movs r1, #16 - 8002406: 4815 ldr r0, [pc, #84] @ (800245c ) - 8002408: f001 fd09 bl 8003e1e - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); - 800240c: 2201 movs r2, #1 - 800240e: 2120 movs r1, #32 - 8002410: 4812 ldr r0, [pc, #72] @ (800245c ) - 8002412: f001 fd04 bl 8003e1e - - - while(HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_3) == GPIO_PIN_RESET); - 8002416: bf00 nop - 8002418: 2108 movs r1, #8 - 800241a: 4810 ldr r0, [pc, #64] @ (800245c ) - 800241c: f001 fce8 bl 8003df0 - 8002420: 4603 mov r3, r0 - 8002422: 2b00 cmp r3, #0 - 8002424: d0f8 beq.n 8002418 - HAL_Delay(500); - 8002426: f44f 70fa mov.w r0, #500 @ 0x1f4 - 800242a: f000 fd67 bl 8002efc - - main_state = STATE_PH7_WET_EC_CALIBRATION; - 800242e: 4b0c ldr r3, [pc, #48] @ (8002460 ) - 8002430: 2203 movs r2, #3 - 8002432: 701a strb r2, [r3, #0] - - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); - 8002434: 2201 movs r2, #1 - 8002436: 2110 movs r1, #16 - 8002438: 4808 ldr r0, [pc, #32] @ (800245c ) - 800243a: f001 fcf0 bl 8003e1e - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_RESET); // Red LED On - 800243e: 2200 movs r2, #0 - 8002440: 2120 movs r1, #32 - 8002442: 4806 ldr r0, [pc, #24] @ (800245c ) - 8002444: f001 fceb bl 8003e1e - - - - for(i=0;i<(2*AD5934_TEMP_AVERAGES);i++) // Loop to get stability and get averages - 8002448: 2300 movs r3, #0 - 800244a: f887 3033 strb.w r3, [r7, #51] @ 0x33 - 800244e: e02d b.n 80024ac - 8002450: 20000224 .word 0x20000224 - 8002454: 20000624 .word 0x20000624 - 8002458: 200001cc .word 0x200001cc - 800245c: 40010c00 .word 0x40010c00 - 8002460: 200006cc .word 0x200006cc - 8002464: 40010800 .word 0x40010800 - { - temperature_RTD = AD5934_GetTemperature(refResistance); // Liquid Temperature is stored - 8002468: 6b78 ldr r0, [r7, #52] @ 0x34 - 800246a: f7fe fe7f bl 800116c - 800246e: 63b8 str r0, [r7, #56] @ 0x38 - flash_data.ec_factor = AD5934_EC_Calibrate_Temperature(temperature_RTD); - 8002470: 6bb8 ldr r0, [r7, #56] @ 0x38 - 8002472: f7ff f90f bl 8001694 - 8002476: 4603 mov r3, r0 - 8002478: 4aac ldr r2, [pc, #688] @ (800272c ) - 800247a: 6213 str r3, [r2, #32] - flash_data.ph7_mV = ADSCalculate_ph_mV(); - 800247c: f7ff fb84 bl 8001b88 - 8002480: 4603 mov r3, r0 - 8002482: 4aaa ldr r2, [pc, #680] @ (800272c ) - 8002484: 6093 str r3, [r2, #8] - flash_data.ec1413_mag = AD5934_GetImpedance(temperature_RTD)*flash_data.ec_factor; // Get the magnitude of the reference liquid and compensate it to 25ºC - 8002486: 6bb8 ldr r0, [r7, #56] @ 0x38 - 8002488: f7fe ff62 bl 8001350 - 800248c: 4602 mov r2, r0 - 800248e: 4ba7 ldr r3, [pc, #668] @ (800272c ) - 8002490: 6a1b ldr r3, [r3, #32] - 8002492: 4619 mov r1, r3 - 8002494: 4610 mov r0, r2 - 8002496: f7fe fb05 bl 8000aa4 <__aeabi_fmul> - 800249a: 4603 mov r3, r0 - 800249c: 461a mov r2, r3 - 800249e: 4ba3 ldr r3, [pc, #652] @ (800272c ) - 80024a0: 619a str r2, [r3, #24] - for(i=0;i<(2*AD5934_TEMP_AVERAGES);i++) // Loop to get stability and get averages - 80024a2: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 - 80024a6: 3301 adds r3, #1 - 80024a8: f887 3033 strb.w r3, [r7, #51] @ 0x33 - 80024ac: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 - 80024b0: 2b1f cmp r3, #31 - 80024b2: d9d9 bls.n 8002468 - - } - - ph7_interp = ADSinterpolate_ph(temperature_RTD,ADS1015_PH_7_BUFFER_ROW); - 80024b4: 2102 movs r1, #2 - 80024b6: 6bb8 ldr r0, [r7, #56] @ 0x38 - 80024b8: f7ff fc00 bl 8001cbc - 80024bc: 62f8 str r0, [r7, #44] @ 0x2c - ph4_interp = ADSinterpolate_ph(temperature_RTD,ADS1015_PH_4_BUFFER_ROW); - 80024be: 2101 movs r1, #1 - 80024c0: 6bb8 ldr r0, [r7, #56] @ 0x38 - 80024c2: f7ff fbfb bl 8001cbc - 80024c6: 62b8 str r0, [r7, #40] @ 0x28 - - flash_data.ph_temperature = temperature_RTD; - 80024c8: 4a98 ldr r2, [pc, #608] @ (800272c ) - 80024ca: 6bbb ldr r3, [r7, #56] @ 0x38 - 80024cc: 60d3 str r3, [r2, #12] - flash_data.ph_slope_mV = (flash_data.ph7_mV - flash_data.ph4_mV) / (ph7_interp - ph4_interp); - 80024ce: 4b97 ldr r3, [pc, #604] @ (800272c ) - 80024d0: 689b ldr r3, [r3, #8] - 80024d2: 4a96 ldr r2, [pc, #600] @ (800272c ) - 80024d4: 6852 ldr r2, [r2, #4] - 80024d6: 4611 mov r1, r2 - 80024d8: 4618 mov r0, r3 - 80024da: f7fe f9d9 bl 8000890 <__aeabi_fsub> - 80024de: 4603 mov r3, r0 - 80024e0: 461c mov r4, r3 - 80024e2: 6ab9 ldr r1, [r7, #40] @ 0x28 - 80024e4: 6af8 ldr r0, [r7, #44] @ 0x2c - 80024e6: f7fe f9d3 bl 8000890 <__aeabi_fsub> - 80024ea: 4603 mov r3, r0 - 80024ec: 4619 mov r1, r3 - 80024ee: 4620 mov r0, r4 - 80024f0: f7fe fb8c bl 8000c0c <__aeabi_fdiv> - 80024f4: 4603 mov r3, r0 - 80024f6: 461a mov r2, r3 - 80024f8: 4b8c ldr r3, [pc, #560] @ (800272c ) - 80024fa: 611a str r2, [r3, #16] - flash_data.ph7_real = ph7_interp; - 80024fc: 4a8b ldr r2, [pc, #556] @ (800272c ) - 80024fe: 6afb ldr r3, [r7, #44] @ 0x2c - 8002500: 6153 str r3, [r2, #20] - - Flash_Save_Page(&flash_data); // Store Calibration parameters in Flash - 8002502: 488a ldr r0, [pc, #552] @ (800272c ) - 8002504: f7ff fcf6 bl 8001ef4 - - - HAL_Delay(500); - 8002508: f44f 70fa mov.w r0, #500 @ 0x1f4 - 800250c: f000 fcf6 bl 8002efc - - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_RESET); // Green LED On - 8002510: 2200 movs r2, #0 - 8002512: 2110 movs r1, #16 - 8002514: 4886 ldr r0, [pc, #536] @ (8002730 ) - 8002516: f001 fc82 bl 8003e1e - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); - 800251a: 2201 movs r2, #1 - 800251c: 2120 movs r1, #32 - 800251e: 4884 ldr r0, [pc, #528] @ (8002730 ) - 8002520: f001 fc7d bl 8003e1e - - - main_state = STATE_RUNNING_OK; - 8002524: 4b83 ldr r3, [pc, #524] @ (8002734 ) - 8002526: 2200 movs r2, #0 - 8002528: 701a strb r2, [r3, #0] + 800205c: f7fe ff78 bl 8000f50 +*/ + while (1) { + AD5934_Process_System(); + 8002060: f7ff f800 bl 8001064 + ADS1015_Process_System(); + 8002064: f7ff fc0e bl 8001884 - - current_millis = HAL_GetTick(); - 800252a: f000 fcdd bl 8002ee8 - 800252e: 6278 str r0, [r7, #36] @ 0x24 + current_millis = g_ms_counter; + 8002068: 4b83 ldr r3, [pc, #524] @ (8002278 ) + 800206a: 681b ldr r3, [r3, #0] + 800206c: 62bb str r3, [r7, #40] @ 0x28 // Piscar LED verde em PB5 a cada 0,5 segundos if ((current_millis - previous_millis_green) >= 500) - 8002530: 6a7a ldr r2, [r7, #36] @ 0x24 - 8002532: 6c3b ldr r3, [r7, #64] @ 0x40 - 8002534: 1ad3 subs r3, r2, r3 - 8002536: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 - 800253a: d31b bcc.n 8002574 + 800206e: 6aba ldr r2, [r7, #40] @ 0x28 + 8002070: 6b3b ldr r3, [r7, #48] @ 0x30 + 8002072: 1ad3 subs r3, r2, r3 + 8002074: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 + 8002078: d31b bcc.n 80020b2 { previous_millis_green = current_millis; - 800253c: 6a7b ldr r3, [r7, #36] @ 0x24 - 800253e: 643b str r3, [r7, #64] @ 0x40 + 800207a: 6abb ldr r3, [r7, #40] @ 0x28 + 800207c: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_5); - 8002540: 2120 movs r1, #32 - 8002542: 487b ldr r0, [pc, #492] @ (8002730 ) - 8002544: f001 fc83 bl 8003e4e + 800207e: 2120 movs r1, #32 + 8002080: 487e ldr r0, [pc, #504] @ (800227c ) + 8002082: f001 fb24 bl 80036ce // Check if state changed and send via RS485 uint8_t current_green_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_5); - 8002548: 2120 movs r1, #32 - 800254a: 4879 ldr r0, [pc, #484] @ (8002730 ) - 800254c: f001 fc50 bl 8003df0 - 8002550: 4603 mov r3, r0 - 8002552: f887 3023 strb.w r3, [r7, #35] @ 0x23 + 8002086: 2120 movs r1, #32 + 8002088: 487c ldr r0, [pc, #496] @ (800227c ) + 800208a: f001 faf1 bl 8003670 + 800208e: 4603 mov r3, r0 + 8002090: f887 3027 strb.w r3, [r7, #39] @ 0x27 if (current_green_state != previous_green_state) - 8002556: f897 2023 ldrb.w r2, [r7, #35] @ 0x23 - 800255a: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 800255e: 429a cmp r2, r3 - 8002560: d008 beq.n 8002574 + 8002094: f897 2027 ldrb.w r2, [r7, #39] @ 0x27 + 8002098: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 + 800209c: 429a cmp r2, r3 + 800209e: d008 beq.n 80020b2 { previous_green_state = current_green_state; - 8002562: f897 3023 ldrb.w r3, [r7, #35] @ 0x23 - 8002566: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 80020a0: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 + 80020a4: f887 3037 strb.w r3, [r7, #55] @ 0x37 uint8_t led_data[2] = {0x01, current_green_state}; // Command 0x01 for green LED - 800256a: 2301 movs r3, #1 - 800256c: 723b strb r3, [r7, #8] - 800256e: f897 3023 ldrb.w r3, [r7, #35] @ 0x23 - 8002572: 727b strb r3, [r7, #9] - + 80020a8: 2301 movs r3, #1 + 80020aa: 713b strb r3, [r7, #4] + 80020ac: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 + 80020b0: 717b strb r3, [r7, #5] +*/ } // Piscar LED vermelho em PB4 a cada 1 segundo if ((current_millis - previous_millis_red) >= 1000) - 8002574: 6a7a ldr r2, [r7, #36] @ 0x24 - 8002576: 6bfb ldr r3, [r7, #60] @ 0x3c - 8002578: 1ad3 subs r3, r2, r3 - 800257a: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 - 800257e: d3d4 bcc.n 800252a + 80020b2: 6aba ldr r2, [r7, #40] @ 0x28 + 80020b4: 6afb ldr r3, [r7, #44] @ 0x2c + 80020b6: 1ad3 subs r3, r2, r3 + 80020b8: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 + 80020bc: d3d0 bcc.n 8002060 { previous_millis_red = current_millis; - 8002580: 6a7b ldr r3, [r7, #36] @ 0x24 - 8002582: 63fb str r3, [r7, #60] @ 0x3c + 80020be: 6abb ldr r3, [r7, #40] @ 0x28 + 80020c0: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_4); - 8002584: 2110 movs r1, #16 - 8002586: 486a ldr r0, [pc, #424] @ (8002730 ) - 8002588: f001 fc61 bl 8003e4e + 80020c2: 2110 movs r1, #16 + 80020c4: 486d ldr r0, [pc, #436] @ (800227c ) + 80020c6: f001 fb02 bl 80036ce // Check if state changed and send via RS485 uint8_t current_red_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_4); - 800258c: 2110 movs r1, #16 - 800258e: 4868 ldr r0, [pc, #416] @ (8002730 ) - 8002590: f001 fc2e bl 8003df0 - 8002594: 4603 mov r3, r0 - 8002596: f887 3022 strb.w r3, [r7, #34] @ 0x22 + 80020ca: 2110 movs r1, #16 + 80020cc: 486b ldr r0, [pc, #428] @ (800227c ) + 80020ce: f001 facf bl 8003670 + 80020d2: 4603 mov r3, r0 + 80020d4: f887 3026 strb.w r3, [r7, #38] @ 0x26 if (current_red_state != previous_red_state) - 800259a: f897 2022 ldrb.w r2, [r7, #34] @ 0x22 - 800259e: f897 3046 ldrb.w r3, [r7, #70] @ 0x46 - 80025a2: 429a cmp r2, r3 - 80025a4: d008 beq.n 80025b8 + 80020d8: f897 2026 ldrb.w r2, [r7, #38] @ 0x26 + 80020dc: f897 3036 ldrb.w r3, [r7, #54] @ 0x36 + 80020e0: 429a cmp r2, r3 + 80020e2: d008 beq.n 80020f6 { previous_red_state = current_red_state; - 80025a6: f897 3022 ldrb.w r3, [r7, #34] @ 0x22 - 80025aa: f887 3046 strb.w r3, [r7, #70] @ 0x46 + 80020e4: f897 3026 ldrb.w r3, [r7, #38] @ 0x26 + 80020e8: f887 3036 strb.w r3, [r7, #54] @ 0x36 uint8_t led_data[2] = {0x02, current_red_state}; // Command 0x02 for red LED - 80025ae: 2302 movs r3, #2 - 80025b0: 713b strb r3, [r7, #4] - 80025b2: f897 3022 ldrb.w r3, [r7, #34] @ 0x22 - 80025b6: 717b strb r3, [r7, #5] + 80020ec: 2302 movs r3, #2 + 80020ee: 703b strb r3, [r7, #0] + 80020f0: f897 3026 ldrb.w r3, [r7, #38] @ 0x26 + 80020f4: 707b strb r3, [r7, #1] } + + if (g_rtd_filter.value_valid) + 80020f6: 4b62 ldr r3, [pc, #392] @ (8002280 ) + 80020f8: f893 3050 ldrb.w r3, [r3, #80] @ 0x50 + 80020fc: 2b00 cmp r3, #0 + 80020fe: d033 beq.n 8002168 + { + float rtd_final = g_rtd_filter.filtered_value; + 8002100: 4b5f ldr r3, [pc, #380] @ (8002280 ) + 8002102: 6cdb ldr r3, [r3, #76] @ 0x4c + 8002104: 623b str r3, [r7, #32] + status1 = rs485_send_broadcast(tm_t, strlen((char*)tm_t)); - 80025b8: 485f ldr r0, [pc, #380] @ (8002738 ) - 80025ba: f7fd fdc7 bl 800014c - 80025be: 4603 mov r3, r0 - 80025c0: b29b uxth r3, r3 - 80025c2: 4619 mov r1, r3 - 80025c4: 485c ldr r0, [pc, #368] @ (8002738 ) - 80025c6: f000 fa69 bl 8002a9c - 80025ca: 4603 mov r3, r0 - 80025cc: f887 3021 strb.w r3, [r7, #33] @ 0x21 - temperature_RTD = AD5934_GetTemperature(refResistance); - 80025d0: 6b78 ldr r0, [r7, #52] @ 0x34 - 80025d2: f7fe fdcb bl 800116c - 80025d6: 63b8 str r0, [r7, #56] @ 0x38 - FloatToString(tempString, temperature_RTD); - 80025d8: 6bb8 ldr r0, [r7, #56] @ 0x38 - 80025da: f7fe f84d bl 8000678 <__aeabi_f2d> - 80025de: 4602 mov r2, r0 - 80025e0: 460b mov r3, r1 - 80025e2: f107 010c add.w r1, r7, #12 - 80025e6: 4608 mov r0, r1 - 80025e8: f000 f906 bl 80027f8 + 8002106: 485f ldr r0, [pc, #380] @ (8002284 ) + 8002108: f7fe f820 bl 800014c + 800210c: 4603 mov r3, r0 + 800210e: b29b uxth r3, r3 + 8002110: 4619 mov r1, r3 + 8002112: 485c ldr r0, [pc, #368] @ (8002284 ) + 8002114: f000 fa84 bl 8002620 + 8002118: 4603 mov r3, r0 + 800211a: 77fb strb r3, [r7, #31] + //temperature_RTD = AD5934_GetTemperature(refResistance); + FloatToString(tempString, rtd_final); + 800211c: 6a38 ldr r0, [r7, #32] + 800211e: f7fe faab bl 8000678 <__aeabi_f2d> + 8002122: 4602 mov r2, r0 + 8002124: 460b mov r3, r1 + 8002126: f107 0108 add.w r1, r7, #8 + 800212a: 4608 mov r0, r1 + 800212c: f000 f90e bl 800234c status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); - 80025ec: f107 030c add.w r3, r7, #12 - 80025f0: 4618 mov r0, r3 - 80025f2: f7fd fdab bl 800014c - 80025f6: 4603 mov r3, r0 - 80025f8: b29b uxth r3, r3 - 80025fa: 3b01 subs r3, #1 - 80025fc: b29a uxth r2, r3 - 80025fe: f107 030c add.w r3, r7, #12 - 8002602: 4611 mov r1, r2 - 8002604: 4618 mov r0, r3 - 8002606: f000 fa49 bl 8002a9c - 800260a: 4603 mov r3, r0 - 800260c: f887 3020 strb.w r3, [r7, #32] + 8002130: f107 0308 add.w r3, r7, #8 + 8002134: 4618 mov r0, r3 + 8002136: f7fe f809 bl 800014c + 800213a: 4603 mov r3, r0 + 800213c: b29b uxth r3, r3 + 800213e: 3b01 subs r3, #1 + 8002140: b29a uxth r2, r3 + 8002142: f107 0308 add.w r3, r7, #8 + 8002146: 4611 mov r1, r2 + 8002148: 4618 mov r0, r3 + 800214a: f000 fa69 bl 8002620 + 800214e: 4603 mov r3, r0 + 8002150: 77bb strb r3, [r7, #30] status1 = rs485_send_broadcast(newline_temp, strlen((char*)newline_temp)); - 8002610: 484a ldr r0, [pc, #296] @ (800273c ) - 8002612: f7fd fd9b bl 800014c - 8002616: 4603 mov r3, r0 - 8002618: b29b uxth r3, r3 - 800261a: 4619 mov r1, r3 - 800261c: 4847 ldr r0, [pc, #284] @ (800273c ) - 800261e: f000 fa3d bl 8002a9c - 8002622: 4603 mov r3, r0 - 8002624: f887 3021 strb.w r3, [r7, #33] @ 0x21 + 8002152: 484d ldr r0, [pc, #308] @ (8002288 ) + 8002154: f7fd fffa bl 800014c + 8002158: 4603 mov r3, r0 + 800215a: b29b uxth r3, r3 + 800215c: 4619 mov r1, r3 + 800215e: 484a ldr r0, [pc, #296] @ (8002288 ) + 8002160: f000 fa5e bl 8002620 + 8002164: 4603 mov r3, r0 + 8002166: 77fb strb r3, [r7, #31] + } + if (g_ec_filter.value_valid) + 8002168: 4b48 ldr r3, [pc, #288] @ (800228c ) + 800216a: f893 3050 ldrb.w r3, [r3, #80] @ 0x50 + 800216e: 2b00 cmp r3, #0 + 8002170: d033 beq.n 80021da + { + float ec_final = g_ec_filter.filtered_value; + 8002172: 4b46 ldr r3, [pc, #280] @ (800228c ) + 8002174: 6cdb ldr r3, [r3, #76] @ 0x4c + 8002176: 61bb str r3, [r7, #24] status1 = rs485_send_broadcast(ad_t, strlen((char*)ad_t)); - 8002628: 4845 ldr r0, [pc, #276] @ (8002740 ) - 800262a: f7fd fd8f bl 800014c - 800262e: 4603 mov r3, r0 - 8002630: b29b uxth r3, r3 - 8002632: 4619 mov r1, r3 - 8002634: 4842 ldr r0, [pc, #264] @ (8002740 ) - 8002636: f000 fa31 bl 8002a9c - 800263a: 4603 mov r3, r0 - 800263c: f887 3021 strb.w r3, [r7, #33] @ 0x21 - admittance_EC = AD5934_GetImpedance(temperature_RTD); - 8002640: 6bb8 ldr r0, [r7, #56] @ 0x38 - 8002642: f7fe fe85 bl 8001350 - 8002646: 61f8 str r0, [r7, #28] - FloatToString(tempString, admittance_EC); - 8002648: 69f8 ldr r0, [r7, #28] - 800264a: f7fe f815 bl 8000678 <__aeabi_f2d> - 800264e: 4602 mov r2, r0 - 8002650: 460b mov r3, r1 - 8002652: f107 010c add.w r1, r7, #12 - 8002656: 4608 mov r0, r1 - 8002658: f000 f8ce bl 80027f8 + 8002178: 4845 ldr r0, [pc, #276] @ (8002290 ) + 800217a: f7fd ffe7 bl 800014c + 800217e: 4603 mov r3, r0 + 8002180: b29b uxth r3, r3 + 8002182: 4619 mov r1, r3 + 8002184: 4842 ldr r0, [pc, #264] @ (8002290 ) + 8002186: f000 fa4b bl 8002620 + 800218a: 4603 mov r3, r0 + 800218c: 77fb strb r3, [r7, #31] + //admittance_EC = AD5934_GetImpedance(temperature_RTD); + FloatToString(tempString, ec_final); + 800218e: 69b8 ldr r0, [r7, #24] + 8002190: f7fe fa72 bl 8000678 <__aeabi_f2d> + 8002194: 4602 mov r2, r0 + 8002196: 460b mov r3, r1 + 8002198: f107 0108 add.w r1, r7, #8 + 800219c: 4608 mov r0, r1 + 800219e: f000 f8d5 bl 800234c status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); - 800265c: f107 030c add.w r3, r7, #12 - 8002660: 4618 mov r0, r3 - 8002662: f7fd fd73 bl 800014c - 8002666: 4603 mov r3, r0 - 8002668: b29b uxth r3, r3 - 800266a: 3b01 subs r3, #1 - 800266c: b29a uxth r2, r3 - 800266e: f107 030c add.w r3, r7, #12 - 8002672: 4611 mov r1, r2 - 8002674: 4618 mov r0, r3 - 8002676: f000 fa11 bl 8002a9c - 800267a: 4603 mov r3, r0 - 800267c: f887 3020 strb.w r3, [r7, #32] + 80021a2: f107 0308 add.w r3, r7, #8 + 80021a6: 4618 mov r0, r3 + 80021a8: f7fd ffd0 bl 800014c + 80021ac: 4603 mov r3, r0 + 80021ae: b29b uxth r3, r3 + 80021b0: 3b01 subs r3, #1 + 80021b2: b29a uxth r2, r3 + 80021b4: f107 0308 add.w r3, r7, #8 + 80021b8: 4611 mov r1, r2 + 80021ba: 4618 mov r0, r3 + 80021bc: f000 fa30 bl 8002620 + 80021c0: 4603 mov r3, r0 + 80021c2: 77bb strb r3, [r7, #30] status1 = rs485_send_broadcast(newline_admi, strlen((char*)newline_admi)); - 8002680: 4830 ldr r0, [pc, #192] @ (8002744 ) - 8002682: f7fd fd63 bl 800014c - 8002686: 4603 mov r3, r0 - 8002688: b29b uxth r3, r3 - 800268a: 4619 mov r1, r3 - 800268c: 482d ldr r0, [pc, #180] @ (8002744 ) - 800268e: f000 fa05 bl 8002a9c - 8002692: 4603 mov r3, r0 - 8002694: f887 3021 strb.w r3, [r7, #33] @ 0x21 + 80021c4: 4833 ldr r0, [pc, #204] @ (8002294 ) + 80021c6: f7fd ffc1 bl 800014c + 80021ca: 4603 mov r3, r0 + 80021cc: b29b uxth r3, r3 + 80021ce: 4619 mov r1, r3 + 80021d0: 4830 ldr r0, [pc, #192] @ (8002294 ) + 80021d2: f000 fa25 bl 8002620 + 80021d6: 4603 mov r3, r0 + 80021d8: 77fb strb r3, [r7, #31] + } + if (g_ref_filter.value_valid) + 80021da: 4b2f ldr r3, [pc, #188] @ (8002298 ) + 80021dc: f893 3050 ldrb.w r3, [r3, #80] @ 0x50 + 80021e0: 2b00 cmp r3, #0 + 80021e2: f43f af3d beq.w 8002060 + { + //float reference_final = g_ref_filter.filtered_value; status1 = rs485_send_broadcast(ph_t, strlen((char*)ph_t)); - 8002698: 482b ldr r0, [pc, #172] @ (8002748 ) - 800269a: f7fd fd57 bl 800014c - 800269e: 4603 mov r3, r0 - 80026a0: b29b uxth r3, r3 - 80026a2: 4619 mov r1, r3 - 80026a4: 4828 ldr r0, [pc, #160] @ (8002748 ) - 80026a6: f000 f9f9 bl 8002a9c - 80026aa: 4603 mov r3, r0 - 80026ac: f887 3021 strb.w r3, [r7, #33] @ 0x21 - ph_compensated = 10*ADSCalculate_ph_mV();//ADSCalculate_ph_Compensated(temperature_RTD); - 80026b0: f7ff fa6a bl 8001b88 - 80026b4: 4603 mov r3, r0 - 80026b6: 4925 ldr r1, [pc, #148] @ (800274c ) - 80026b8: 4618 mov r0, r3 - 80026ba: f7fe f9f3 bl 8000aa4 <__aeabi_fmul> - 80026be: 4603 mov r3, r0 - 80026c0: 61bb str r3, [r7, #24] + 80021e6: 482d ldr r0, [pc, #180] @ (800229c ) + 80021e8: f7fd ffb0 bl 800014c + 80021ec: 4603 mov r3, r0 + 80021ee: b29b uxth r3, r3 + 80021f0: 4619 mov r1, r3 + 80021f2: 482a ldr r0, [pc, #168] @ (800229c ) + 80021f4: f000 fa14 bl 8002620 + 80021f8: 4603 mov r3, r0 + 80021fa: 77fb strb r3, [r7, #31] + ph_compensated = g_ph_filter.filtered_value; + 80021fc: 4b28 ldr r3, [pc, #160] @ (80022a0 ) + 80021fe: 6c5b ldr r3, [r3, #68] @ 0x44 + 8002200: 617b str r3, [r7, #20] FloatToString(tempString, ph_compensated); - 80026c2: 69b8 ldr r0, [r7, #24] - 80026c4: f7fd ffd8 bl 8000678 <__aeabi_f2d> - 80026c8: 4602 mov r2, r0 - 80026ca: 460b mov r3, r1 - 80026cc: f107 010c add.w r1, r7, #12 - 80026d0: 4608 mov r0, r1 - 80026d2: f000 f891 bl 80027f8 + 8002202: 6978 ldr r0, [r7, #20] + 8002204: f7fe fa38 bl 8000678 <__aeabi_f2d> + 8002208: 4602 mov r2, r0 + 800220a: 460b mov r3, r1 + 800220c: f107 0108 add.w r1, r7, #8 + 8002210: 4608 mov r0, r1 + 8002212: f000 f89b bl 800234c status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); - 80026d6: f107 030c add.w r3, r7, #12 - 80026da: 4618 mov r0, r3 - 80026dc: f7fd fd36 bl 800014c - 80026e0: 4603 mov r3, r0 - 80026e2: b29b uxth r3, r3 - 80026e4: 3b01 subs r3, #1 - 80026e6: b29a uxth r2, r3 - 80026e8: f107 030c add.w r3, r7, #12 - 80026ec: 4611 mov r1, r2 - 80026ee: 4618 mov r0, r3 - 80026f0: f000 f9d4 bl 8002a9c - 80026f4: 4603 mov r3, r0 - 80026f6: f887 3020 strb.w r3, [r7, #32] + 8002216: f107 0308 add.w r3, r7, #8 + 800221a: 4618 mov r0, r3 + 800221c: f7fd ff96 bl 800014c + 8002220: 4603 mov r3, r0 + 8002222: b29b uxth r3, r3 + 8002224: 3b01 subs r3, #1 + 8002226: b29a uxth r2, r3 + 8002228: f107 0308 add.w r3, r7, #8 + 800222c: 4611 mov r1, r2 + 800222e: 4618 mov r0, r3 + 8002230: f000 f9f6 bl 8002620 + 8002234: 4603 mov r3, r0 + 8002236: 77bb strb r3, [r7, #30] status1 = rs485_send_broadcast(newline_ph, strlen((char*)newline_ph)); - 80026fa: 4815 ldr r0, [pc, #84] @ (8002750 ) - 80026fc: f7fd fd26 bl 800014c - 8002700: 4603 mov r3, r0 - 8002702: b29b uxth r3, r3 - 8002704: 4619 mov r1, r3 - 8002706: 4812 ldr r0, [pc, #72] @ (8002750 ) - 8002708: f000 f9c8 bl 8002a9c - 800270c: 4603 mov r3, r0 - 800270e: f887 3021 strb.w r3, [r7, #33] @ 0x21 + 8002238: 481a ldr r0, [pc, #104] @ (80022a4 ) + 800223a: f7fd ff87 bl 800014c + 800223e: 4603 mov r3, r0 + 8002240: b29b uxth r3, r3 + 8002242: 4619 mov r1, r3 + 8002244: 4817 ldr r0, [pc, #92] @ (80022a4 ) + 8002246: f000 f9eb bl 8002620 + 800224a: 4603 mov r3, r0 + 800224c: 77fb strb r3, [r7, #31] status1 = rs485_send_broadcast(newline, strlen((char*)newline)); - 8002712: 4810 ldr r0, [pc, #64] @ (8002754 ) - 8002714: f7fd fd1a bl 800014c - 8002718: 4603 mov r3, r0 - 800271a: b29b uxth r3, r3 - 800271c: 4619 mov r1, r3 - 800271e: 480d ldr r0, [pc, #52] @ (8002754 ) - 8002720: f000 f9bc bl 8002a9c - 8002724: 4603 mov r3, r0 - 8002726: f887 3021 strb.w r3, [r7, #33] @ 0x21 - current_millis = HAL_GetTick(); - 800272a: e6fe b.n 800252a - 800272c: 20000224 .word 0x20000224 - 8002730: 40010c00 .word 0x40010c00 - 8002734: 200006cc .word 0x200006cc - 8002738: 2000002c .word 0x2000002c - 800273c: 20000014 .word 0x20000014 - 8002740: 2000001c .word 0x2000001c - 8002744: 2000000c .word 0x2000000c - 8002748: 20000024 .word 0x20000024 - 800274c: 41200000 .word 0x41200000 - 8002750: 20000004 .word 0x20000004 - 8002754: 20000000 .word 0x20000000 + 800224e: 4816 ldr r0, [pc, #88] @ (80022a8 ) + 8002250: f7fd ff7c bl 800014c + 8002254: 4603 mov r3, r0 + 8002256: b29b uxth r3, r3 + 8002258: 4619 mov r1, r3 + 800225a: 4813 ldr r0, [pc, #76] @ (80022a8 ) + 800225c: f000 f9e0 bl 8002620 + 8002260: 4603 mov r3, r0 + 8002262: 77fb strb r3, [r7, #31] + AD5934_Process_System(); + 8002264: e6fc b.n 8002060 + 8002266: bf00 nop + 8002268: 2000028c .word 0x2000028c + 800226c: 20000780 .word 0x20000780 + 8002270: 2000068c .word 0x2000068c + 8002274: 2000021c .word 0x2000021c + 8002278: 200000b4 .word 0x200000b4 + 800227c: 40010c00 .word 0x40010c00 + 8002280: 200000bc .word 0x200000bc + 8002284: 20000030 .word 0x20000030 + 8002288: 20000018 .word 0x20000018 + 800228c: 20000110 .word 0x20000110 + 8002290: 20000020 .word 0x20000020 + 8002294: 20000010 .word 0x20000010 + 8002298: 20000164 .word 0x20000164 + 800229c: 20000028 .word 0x20000028 + 80022a0: 2000022c .word 0x2000022c + 80022a4: 20000008 .word 0x20000008 + 80022a8: 20000004 .word 0x20000004 -08002758 : +080022ac : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8002758: b580 push {r7, lr} - 800275a: b094 sub sp, #80 @ 0x50 - 800275c: af00 add r7, sp, #0 + 80022ac: b580 push {r7, lr} + 80022ae: b094 sub sp, #80 @ 0x50 + 80022b0: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 800275e: f107 0328 add.w r3, r7, #40 @ 0x28 - 8002762: 2228 movs r2, #40 @ 0x28 - 8002764: 2100 movs r1, #0 - 8002766: 4618 mov r0, r3 - 8002768: f003 fe9c bl 80064a4 + 80022b2: f107 0328 add.w r3, r7, #40 @ 0x28 + 80022b6: 2228 movs r2, #40 @ 0x28 + 80022b8: 2100 movs r1, #0 + 80022ba: 4618 mov r0, r3 + 80022bc: f004 f924 bl 8006508 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 800276c: f107 0314 add.w r3, r7, #20 - 8002770: 2200 movs r2, #0 - 8002772: 601a str r2, [r3, #0] - 8002774: 605a str r2, [r3, #4] - 8002776: 609a str r2, [r3, #8] - 8002778: 60da str r2, [r3, #12] - 800277a: 611a str r2, [r3, #16] + 80022c0: f107 0314 add.w r3, r7, #20 + 80022c4: 2200 movs r2, #0 + 80022c6: 601a str r2, [r3, #0] + 80022c8: 605a str r2, [r3, #4] + 80022ca: 609a str r2, [r3, #8] + 80022cc: 60da str r2, [r3, #12] + 80022ce: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 800277c: 1d3b adds r3, r7, #4 - 800277e: 2200 movs r2, #0 - 8002780: 601a str r2, [r3, #0] - 8002782: 605a str r2, [r3, #4] - 8002784: 609a str r2, [r3, #8] - 8002786: 60da str r2, [r3, #12] + 80022d0: 1d3b adds r3, r7, #4 + 80022d2: 2200 movs r2, #0 + 80022d4: 601a str r2, [r3, #0] + 80022d6: 605a str r2, [r3, #4] + 80022d8: 609a str r2, [r3, #8] + 80022da: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 8002788: 2301 movs r3, #1 - 800278a: 62bb str r3, [r7, #40] @ 0x28 + 80022dc: 2301 movs r3, #1 + 80022de: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 800278c: f44f 3380 mov.w r3, #65536 @ 0x10000 - 8002790: 62fb str r3, [r7, #44] @ 0x2c + 80022e0: f44f 3380 mov.w r3, #65536 @ 0x10000 + 80022e4: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - 8002792: 2300 movs r3, #0 - 8002794: 647b str r3, [r7, #68] @ 0x44 + 80022e6: 2300 movs r3, #0 + 80022e8: 647b str r3, [r7, #68] @ 0x44 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8002796: f107 0328 add.w r3, r7, #40 @ 0x28 - 800279a: 4618 mov r0, r3 - 800279c: f002 fba4 bl 8004ee8 - 80027a0: 4603 mov r3, r0 - 80027a2: 2b00 cmp r3, #0 - 80027a4: d001 beq.n 80027aa + 80022ea: f107 0328 add.w r3, r7, #40 @ 0x28 + 80022ee: 4618 mov r0, r3 + 80022f0: f002 fa3a bl 8004768 + 80022f4: 4603 mov r3, r0 + 80022f6: 2b00 cmp r3, #0 + 80022f8: d001 beq.n 80022fe { Error_Handler(); - 80027a6: f000 f93b bl 8002a20 + 80022fa: f000 f953 bl 80025a4 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 80027aa: 230f movs r3, #15 - 80027ac: 617b str r3, [r7, #20] + 80022fe: 230f movs r3, #15 + 8002300: 617b str r3, [r7, #20] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; - 80027ae: 2301 movs r3, #1 - 80027b0: 61bb str r3, [r7, #24] + 8002302: 2301 movs r3, #1 + 8002304: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 80027b2: 2300 movs r3, #0 - 80027b4: 61fb str r3, [r7, #28] + 8002306: 2300 movs r3, #0 + 8002308: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 80027b6: 2300 movs r3, #0 - 80027b8: 623b str r3, [r7, #32] + 800230a: 2300 movs r3, #0 + 800230c: 623b str r3, [r7, #32] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 80027ba: 2300 movs r3, #0 - 80027bc: 627b str r3, [r7, #36] @ 0x24 + 800230e: 2300 movs r3, #0 + 8002310: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - 80027be: f107 0314 add.w r3, r7, #20 - 80027c2: 2100 movs r1, #0 - 80027c4: 4618 mov r0, r3 - 80027c6: f002 fe11 bl 80053ec - 80027ca: 4603 mov r3, r0 - 80027cc: 2b00 cmp r3, #0 - 80027ce: d001 beq.n 80027d4 + 8002312: f107 0314 add.w r3, r7, #20 + 8002316: 2100 movs r1, #0 + 8002318: 4618 mov r0, r3 + 800231a: f002 fca7 bl 8004c6c + 800231e: 4603 mov r3, r0 + 8002320: 2b00 cmp r3, #0 + 8002322: d001 beq.n 8002328 { Error_Handler(); - 80027d0: f000 f926 bl 8002a20 + 8002324: f000 f93e bl 80025a4 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; - 80027d4: 2302 movs r3, #2 - 80027d6: 607b str r3, [r7, #4] + 8002328: 2302 movs r3, #2 + 800232a: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV8; - 80027d8: f44f 4340 mov.w r3, #49152 @ 0xc000 - 80027dc: 60fb str r3, [r7, #12] + 800232c: f44f 4340 mov.w r3, #49152 @ 0xc000 + 8002330: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 80027de: 1d3b adds r3, r7, #4 - 80027e0: 4618 mov r0, r3 - 80027e2: f002 ff93 bl 800570c - 80027e6: 4603 mov r3, r0 - 80027e8: 2b00 cmp r3, #0 - 80027ea: d001 beq.n 80027f0 + 8002332: 1d3b adds r3, r7, #4 + 8002334: 4618 mov r0, r3 + 8002336: f002 fe29 bl 8004f8c + 800233a: 4603 mov r3, r0 + 800233c: 2b00 cmp r3, #0 + 800233e: d001 beq.n 8002344 { Error_Handler(); - 80027ec: f000 f918 bl 8002a20 + 8002340: f000 f930 bl 80025a4 } } - 80027f0: bf00 nop - 80027f2: 3750 adds r7, #80 @ 0x50 - 80027f4: 46bd mov sp, r7 - 80027f6: bd80 pop {r7, pc} + 8002344: bf00 nop + 8002346: 3750 adds r7, #80 @ 0x50 + 8002348: 46bd mov sp, r7 + 800234a: bd80 pop {r7, pc} -080027f8 : +0800234c : * @param val - value to be converted * * @return None. *******************************************************************************/ void FloatToString(char *buf, double val) { - 80027f8: b5b0 push {r4, r5, r7, lr} - 80027fa: b096 sub sp, #88 @ 0x58 - 80027fc: af00 add r7, sp, #0 - 80027fe: 60f8 str r0, [r7, #12] - 8002800: e9c7 2300 strd r2, r3, [r7] + 800234c: b5b0 push {r4, r5, r7, lr} + 800234e: b096 sub sp, #88 @ 0x58 + 8002350: af00 add r7, sp, #0 + 8002352: 60f8 str r0, [r7, #12] + 8002354: e9c7 2300 strd r2, r3, [r7] char temp[20]; // Buffer auxiliar para construção segura int i = 0; - 8002804: 2300 movs r3, #0 - 8002806: 657b str r3, [r7, #84] @ 0x54 + 8002358: 2300 movs r3, #0 + 800235a: 657b str r3, [r7, #84] @ 0x54 // 1. Tratar sinal negativo if (val < 0) { - 8002808: f04f 0200 mov.w r2, #0 - 800280c: f04f 0300 mov.w r3, #0 - 8002810: e9d7 0100 ldrd r0, r1, [r7] - 8002814: f7fd ffe8 bl 80007e8 <__aeabi_dcmplt> - 8002818: 4603 mov r3, r0 - 800281a: 2b00 cmp r3, #0 - 800281c: d00d beq.n 800283a + 800235c: f04f 0200 mov.w r2, #0 + 8002360: f04f 0300 mov.w r3, #0 + 8002364: e9d7 0100 ldrd r0, r1, [r7] + 8002368: f7fe fa3e bl 80007e8 <__aeabi_dcmplt> + 800236c: 4603 mov r3, r0 + 800236e: 2b00 cmp r3, #0 + 8002370: d00d beq.n 800238e temp[i++] = '-'; - 800281e: 6d7b ldr r3, [r7, #84] @ 0x54 - 8002820: 1c5a adds r2, r3, #1 - 8002822: 657a str r2, [r7, #84] @ 0x54 - 8002824: 3358 adds r3, #88 @ 0x58 - 8002826: 443b add r3, r7 - 8002828: 222d movs r2, #45 @ 0x2d - 800282a: f803 2c30 strb.w r2, [r3, #-48] + 8002372: 6d7b ldr r3, [r7, #84] @ 0x54 + 8002374: 1c5a adds r2, r3, #1 + 8002376: 657a str r2, [r7, #84] @ 0x54 + 8002378: 3358 adds r3, #88 @ 0x58 + 800237a: 443b add r3, r7 + 800237c: 222d movs r2, #45 @ 0x2d + 800237e: f803 2c30 strb.w r2, [r3, #-48] val = -val; - 800282e: 683c ldr r4, [r7, #0] - 8002830: 687b ldr r3, [r7, #4] - 8002832: f083 4500 eor.w r5, r3, #2147483648 @ 0x80000000 - 8002836: e9c7 4500 strd r4, r5, [r7] + 8002382: 683c ldr r4, [r7, #0] + 8002384: 687b ldr r3, [r7, #4] + 8002386: f083 4500 eor.w r5, r3, #2147483648 @ 0x80000000 + 800238a: e9c7 4500 strd r4, r5, [r7] } // 2. Separar parte inteira e fracionária long intPart = (long)val; - 800283a: e9d7 0100 ldrd r0, r1, [r7] - 800283e: f7fd fffb bl 8000838 <__aeabi_d2iz> - 8002842: 4603 mov r3, r0 - 8002844: 653b str r3, [r7, #80] @ 0x50 + 800238e: e9d7 0100 ldrd r0, r1, [r7] + 8002392: f7fe fa51 bl 8000838 <__aeabi_d2iz> + 8002396: 4603 mov r3, r0 + 8002398: 653b str r3, [r7, #80] @ 0x50 // Multiplicamos por 1000 para obter 3 casas decimais fixas int fracPart = (int)((val - (double)intPart) * 1000.0 + 0.5); - 8002846: 6d38 ldr r0, [r7, #80] @ 0x50 - 8002848: f7fd ff04 bl 8000654 <__aeabi_i2d> - 800284c: 4602 mov r2, r0 - 800284e: 460b mov r3, r1 - 8002850: e9d7 0100 ldrd r0, r1, [r7] - 8002854: f7fd fdb0 bl 80003b8 <__aeabi_dsub> - 8002858: 4602 mov r2, r0 - 800285a: 460b mov r3, r1 - 800285c: 4610 mov r0, r2 - 800285e: 4619 mov r1, r3 - 8002860: f04f 0200 mov.w r2, #0 - 8002864: 4b6a ldr r3, [pc, #424] @ (8002a10 ) - 8002866: f7fd fc79 bl 800015c <__aeabi_dmul> - 800286a: 4602 mov r2, r0 - 800286c: 460b mov r3, r1 - 800286e: 4610 mov r0, r2 - 8002870: 4619 mov r1, r3 - 8002872: f04f 0200 mov.w r2, #0 - 8002876: 4b67 ldr r3, [pc, #412] @ (8002a14 ) - 8002878: f7fd fda0 bl 80003bc <__adddf3> - 800287c: 4602 mov r2, r0 - 800287e: 460b mov r3, r1 - 8002880: 4610 mov r0, r2 - 8002882: 4619 mov r1, r3 - 8002884: f7fd ffd8 bl 8000838 <__aeabi_d2iz> - 8002888: 4603 mov r3, r0 - 800288a: 63fb str r3, [r7, #60] @ 0x3c + 800239a: 6d38 ldr r0, [r7, #80] @ 0x50 + 800239c: f7fe f95a bl 8000654 <__aeabi_i2d> + 80023a0: 4602 mov r2, r0 + 80023a2: 460b mov r3, r1 + 80023a4: e9d7 0100 ldrd r0, r1, [r7] + 80023a8: f7fe f806 bl 80003b8 <__aeabi_dsub> + 80023ac: 4602 mov r2, r0 + 80023ae: 460b mov r3, r1 + 80023b0: 4610 mov r0, r2 + 80023b2: 4619 mov r1, r3 + 80023b4: f04f 0200 mov.w r2, #0 + 80023b8: 4b6a ldr r3, [pc, #424] @ (8002564 ) + 80023ba: f7fd fecf bl 800015c <__aeabi_dmul> + 80023be: 4602 mov r2, r0 + 80023c0: 460b mov r3, r1 + 80023c2: 4610 mov r0, r2 + 80023c4: 4619 mov r1, r3 + 80023c6: f04f 0200 mov.w r2, #0 + 80023ca: 4b67 ldr r3, [pc, #412] @ (8002568 ) + 80023cc: f7fd fff6 bl 80003bc <__adddf3> + 80023d0: 4602 mov r2, r0 + 80023d2: 460b mov r3, r1 + 80023d4: 4610 mov r0, r2 + 80023d6: 4619 mov r1, r3 + 80023d8: f7fe fa2e bl 8000838 <__aeabi_d2iz> + 80023dc: 4603 mov r3, r0 + 80023de: 63fb str r3, [r7, #60] @ 0x3c // 3. Converter a parte inteira para o buffer temp // Usamos um buffer temporário de inversão para não precisar de lógica complexa de ponteiro char intRev[12]; int j = 0; - 800288c: 2300 movs r3, #0 - 800288e: 64fb str r3, [r7, #76] @ 0x4c + 80023e0: 2300 movs r3, #0 + 80023e2: 64fb str r3, [r7, #76] @ 0x4c if (intPart == 0) { - 8002890: 6d3b ldr r3, [r7, #80] @ 0x50 - 8002892: 2b00 cmp r3, #0 - 8002894: d126 bne.n 80028e4 + 80023e4: 6d3b ldr r3, [r7, #80] @ 0x50 + 80023e6: 2b00 cmp r3, #0 + 80023e8: d126 bne.n 8002438 intRev[j++] = '0'; - 8002896: 6cfb ldr r3, [r7, #76] @ 0x4c - 8002898: 1c5a adds r2, r3, #1 - 800289a: 64fa str r2, [r7, #76] @ 0x4c - 800289c: 3358 adds r3, #88 @ 0x58 - 800289e: 443b add r3, r7 - 80028a0: 2230 movs r2, #48 @ 0x30 - 80028a2: f803 2c3c strb.w r2, [r3, #-60] - 80028a6: e020 b.n 80028ea + 80023ea: 6cfb ldr r3, [r7, #76] @ 0x4c + 80023ec: 1c5a adds r2, r3, #1 + 80023ee: 64fa str r2, [r7, #76] @ 0x4c + 80023f0: 3358 adds r3, #88 @ 0x58 + 80023f2: 443b add r3, r7 + 80023f4: 2230 movs r2, #48 @ 0x30 + 80023f6: f803 2c3c strb.w r2, [r3, #-60] + 80023fa: e020 b.n 800243e } else { while (intPart > 0) { intRev[j++] = (intPart % 10) + '0'; - 80028a8: 6d3a ldr r2, [r7, #80] @ 0x50 - 80028aa: 4b5b ldr r3, [pc, #364] @ (8002a18 ) - 80028ac: fb83 1302 smull r1, r3, r3, r2 - 80028b0: 1099 asrs r1, r3, #2 - 80028b2: 17d3 asrs r3, r2, #31 - 80028b4: 1ac9 subs r1, r1, r3 - 80028b6: 460b mov r3, r1 - 80028b8: 009b lsls r3, r3, #2 - 80028ba: 440b add r3, r1 - 80028bc: 005b lsls r3, r3, #1 - 80028be: 1ad1 subs r1, r2, r3 - 80028c0: b2ca uxtb r2, r1 - 80028c2: 6cfb ldr r3, [r7, #76] @ 0x4c - 80028c4: 1c59 adds r1, r3, #1 - 80028c6: 64f9 str r1, [r7, #76] @ 0x4c - 80028c8: 3230 adds r2, #48 @ 0x30 - 80028ca: b2d2 uxtb r2, r2 - 80028cc: 3358 adds r3, #88 @ 0x58 - 80028ce: 443b add r3, r7 - 80028d0: f803 2c3c strb.w r2, [r3, #-60] + 80023fc: 6d3a ldr r2, [r7, #80] @ 0x50 + 80023fe: 4b5b ldr r3, [pc, #364] @ (800256c ) + 8002400: fb83 1302 smull r1, r3, r3, r2 + 8002404: 1099 asrs r1, r3, #2 + 8002406: 17d3 asrs r3, r2, #31 + 8002408: 1ac9 subs r1, r1, r3 + 800240a: 460b mov r3, r1 + 800240c: 009b lsls r3, r3, #2 + 800240e: 440b add r3, r1 + 8002410: 005b lsls r3, r3, #1 + 8002412: 1ad1 subs r1, r2, r3 + 8002414: b2ca uxtb r2, r1 + 8002416: 6cfb ldr r3, [r7, #76] @ 0x4c + 8002418: 1c59 adds r1, r3, #1 + 800241a: 64f9 str r1, [r7, #76] @ 0x4c + 800241c: 3230 adds r2, #48 @ 0x30 + 800241e: b2d2 uxtb r2, r2 + 8002420: 3358 adds r3, #88 @ 0x58 + 8002422: 443b add r3, r7 + 8002424: f803 2c3c strb.w r2, [r3, #-60] intPart /= 10; - 80028d4: 6d3b ldr r3, [r7, #80] @ 0x50 - 80028d6: 4a50 ldr r2, [pc, #320] @ (8002a18 ) - 80028d8: fb82 1203 smull r1, r2, r2, r3 - 80028dc: 1092 asrs r2, r2, #2 - 80028de: 17db asrs r3, r3, #31 - 80028e0: 1ad3 subs r3, r2, r3 - 80028e2: 653b str r3, [r7, #80] @ 0x50 + 8002428: 6d3b ldr r3, [r7, #80] @ 0x50 + 800242a: 4a50 ldr r2, [pc, #320] @ (800256c ) + 800242c: fb82 1203 smull r1, r2, r2, r3 + 8002430: 1092 asrs r2, r2, #2 + 8002432: 17db asrs r3, r3, #31 + 8002434: 1ad3 subs r3, r2, r3 + 8002436: 653b str r3, [r7, #80] @ 0x50 while (intPart > 0) { - 80028e4: 6d3b ldr r3, [r7, #80] @ 0x50 - 80028e6: 2b00 cmp r3, #0 - 80028e8: dcde bgt.n 80028a8 + 8002438: 6d3b ldr r3, [r7, #80] @ 0x50 + 800243a: 2b00 cmp r3, #0 + 800243c: dcde bgt.n 80023fc } } // Inverter a parte inteira de volta para o buffer principal for (int k = j - 1; k >= 0; k--) { - 80028ea: 6cfb ldr r3, [r7, #76] @ 0x4c - 80028ec: 3b01 subs r3, #1 - 80028ee: 64bb str r3, [r7, #72] @ 0x48 - 80028f0: e00e b.n 8002910 + 800243e: 6cfb ldr r3, [r7, #76] @ 0x4c + 8002440: 3b01 subs r3, #1 + 8002442: 64bb str r3, [r7, #72] @ 0x48 + 8002444: e00e b.n 8002464 temp[i++] = intRev[k]; - 80028f2: 6d7b ldr r3, [r7, #84] @ 0x54 - 80028f4: 1c5a adds r2, r3, #1 - 80028f6: 657a str r2, [r7, #84] @ 0x54 - 80028f8: f107 011c add.w r1, r7, #28 - 80028fc: 6cba ldr r2, [r7, #72] @ 0x48 - 80028fe: 440a add r2, r1 - 8002900: 7812 ldrb r2, [r2, #0] - 8002902: 3358 adds r3, #88 @ 0x58 - 8002904: 443b add r3, r7 - 8002906: f803 2c30 strb.w r2, [r3, #-48] + 8002446: 6d7b ldr r3, [r7, #84] @ 0x54 + 8002448: 1c5a adds r2, r3, #1 + 800244a: 657a str r2, [r7, #84] @ 0x54 + 800244c: f107 011c add.w r1, r7, #28 + 8002450: 6cba ldr r2, [r7, #72] @ 0x48 + 8002452: 440a add r2, r1 + 8002454: 7812 ldrb r2, [r2, #0] + 8002456: 3358 adds r3, #88 @ 0x58 + 8002458: 443b add r3, r7 + 800245a: f803 2c30 strb.w r2, [r3, #-48] for (int k = j - 1; k >= 0; k--) { - 800290a: 6cbb ldr r3, [r7, #72] @ 0x48 - 800290c: 3b01 subs r3, #1 - 800290e: 64bb str r3, [r7, #72] @ 0x48 - 8002910: 6cbb ldr r3, [r7, #72] @ 0x48 - 8002912: 2b00 cmp r3, #0 - 8002914: daed bge.n 80028f2 + 800245e: 6cbb ldr r3, [r7, #72] @ 0x48 + 8002460: 3b01 subs r3, #1 + 8002462: 64bb str r3, [r7, #72] @ 0x48 + 8002464: 6cbb ldr r3, [r7, #72] @ 0x48 + 8002466: 2b00 cmp r3, #0 + 8002468: daed bge.n 8002446 } // 4. Adicionar o ponto decimal e a parte fracionária (sempre 3 casas) temp[i++] = '.'; - 8002916: 6d7b ldr r3, [r7, #84] @ 0x54 - 8002918: 1c5a adds r2, r3, #1 - 800291a: 657a str r2, [r7, #84] @ 0x54 - 800291c: 3358 adds r3, #88 @ 0x58 - 800291e: 443b add r3, r7 - 8002920: 222e movs r2, #46 @ 0x2e - 8002922: f803 2c30 strb.w r2, [r3, #-48] + 800246a: 6d7b ldr r3, [r7, #84] @ 0x54 + 800246c: 1c5a adds r2, r3, #1 + 800246e: 657a str r2, [r7, #84] @ 0x54 + 8002470: 3358 adds r3, #88 @ 0x58 + 8002472: 443b add r3, r7 + 8002474: 222e movs r2, #46 @ 0x2e + 8002476: f803 2c30 strb.w r2, [r3, #-48] // Garantir que a parte fracionária tenha sempre 3 dígitos (ex: .005 em vez de .5) int fracBuffer[3]; fracBuffer[2] = fracPart % 10; // Unidade - 8002926: 6bf9 ldr r1, [r7, #60] @ 0x3c - 8002928: 4b3b ldr r3, [pc, #236] @ (8002a18 ) - 800292a: fb83 2301 smull r2, r3, r3, r1 - 800292e: 109a asrs r2, r3, #2 - 8002930: 17cb asrs r3, r1, #31 - 8002932: 1ad2 subs r2, r2, r3 - 8002934: 4613 mov r3, r2 - 8002936: 009b lsls r3, r3, #2 - 8002938: 4413 add r3, r2 - 800293a: 005b lsls r3, r3, #1 - 800293c: 1aca subs r2, r1, r3 - 800293e: 61ba str r2, [r7, #24] + 800247a: 6bf9 ldr r1, [r7, #60] @ 0x3c + 800247c: 4b3b ldr r3, [pc, #236] @ (800256c ) + 800247e: fb83 2301 smull r2, r3, r3, r1 + 8002482: 109a asrs r2, r3, #2 + 8002484: 17cb asrs r3, r1, #31 + 8002486: 1ad2 subs r2, r2, r3 + 8002488: 4613 mov r3, r2 + 800248a: 009b lsls r3, r3, #2 + 800248c: 4413 add r3, r2 + 800248e: 005b lsls r3, r3, #1 + 8002490: 1aca subs r2, r1, r3 + 8002492: 61ba str r2, [r7, #24] fracBuffer[1] = (fracPart / 10) % 10; // Dezena - 8002940: 6bfb ldr r3, [r7, #60] @ 0x3c - 8002942: 4a35 ldr r2, [pc, #212] @ (8002a18 ) - 8002944: fb82 1203 smull r1, r2, r2, r3 - 8002948: 1092 asrs r2, r2, #2 - 800294a: 17db asrs r3, r3, #31 - 800294c: 1ad1 subs r1, r2, r3 - 800294e: 4b32 ldr r3, [pc, #200] @ (8002a18 ) - 8002950: fb83 2301 smull r2, r3, r3, r1 - 8002954: 109a asrs r2, r3, #2 - 8002956: 17cb asrs r3, r1, #31 - 8002958: 1ad2 subs r2, r2, r3 - 800295a: 4613 mov r3, r2 - 800295c: 009b lsls r3, r3, #2 - 800295e: 4413 add r3, r2 - 8002960: 005b lsls r3, r3, #1 - 8002962: 1aca subs r2, r1, r3 - 8002964: 617a str r2, [r7, #20] + 8002494: 6bfb ldr r3, [r7, #60] @ 0x3c + 8002496: 4a35 ldr r2, [pc, #212] @ (800256c ) + 8002498: fb82 1203 smull r1, r2, r2, r3 + 800249c: 1092 asrs r2, r2, #2 + 800249e: 17db asrs r3, r3, #31 + 80024a0: 1ad1 subs r1, r2, r3 + 80024a2: 4b32 ldr r3, [pc, #200] @ (800256c ) + 80024a4: fb83 2301 smull r2, r3, r3, r1 + 80024a8: 109a asrs r2, r3, #2 + 80024aa: 17cb asrs r3, r1, #31 + 80024ac: 1ad2 subs r2, r2, r3 + 80024ae: 4613 mov r3, r2 + 80024b0: 009b lsls r3, r3, #2 + 80024b2: 4413 add r3, r2 + 80024b4: 005b lsls r3, r3, #1 + 80024b6: 1aca subs r2, r1, r3 + 80024b8: 617a str r2, [r7, #20] fracBuffer[0] = (fracPart / 100) % 10; // Centena - 8002966: 6bfb ldr r3, [r7, #60] @ 0x3c - 8002968: 4a2c ldr r2, [pc, #176] @ (8002a1c ) - 800296a: fb82 1203 smull r1, r2, r2, r3 - 800296e: 1152 asrs r2, r2, #5 - 8002970: 17db asrs r3, r3, #31 - 8002972: 1ad1 subs r1, r2, r3 - 8002974: 4b28 ldr r3, [pc, #160] @ (8002a18 ) - 8002976: fb83 2301 smull r2, r3, r3, r1 - 800297a: 109a asrs r2, r3, #2 - 800297c: 17cb asrs r3, r1, #31 - 800297e: 1ad2 subs r2, r2, r3 - 8002980: 4613 mov r3, r2 - 8002982: 009b lsls r3, r3, #2 - 8002984: 4413 add r3, r2 - 8002986: 005b lsls r3, r3, #1 - 8002988: 1aca subs r2, r1, r3 - 800298a: 613a str r2, [r7, #16] + 80024ba: 6bfb ldr r3, [r7, #60] @ 0x3c + 80024bc: 4a2c ldr r2, [pc, #176] @ (8002570 ) + 80024be: fb82 1203 smull r1, r2, r2, r3 + 80024c2: 1152 asrs r2, r2, #5 + 80024c4: 17db asrs r3, r3, #31 + 80024c6: 1ad1 subs r1, r2, r3 + 80024c8: 4b28 ldr r3, [pc, #160] @ (800256c ) + 80024ca: fb83 2301 smull r2, r3, r3, r1 + 80024ce: 109a asrs r2, r3, #2 + 80024d0: 17cb asrs r3, r1, #31 + 80024d2: 1ad2 subs r2, r2, r3 + 80024d4: 4613 mov r3, r2 + 80024d6: 009b lsls r3, r3, #2 + 80024d8: 4413 add r3, r2 + 80024da: 005b lsls r3, r3, #1 + 80024dc: 1aca subs r2, r1, r3 + 80024de: 613a str r2, [r7, #16] for (int k = 2; k >= 0; k--) { - 800298c: 2302 movs r3, #2 - 800298e: 647b str r3, [r7, #68] @ 0x44 - 8002990: e012 b.n 80029b8 + 80024e0: 2302 movs r3, #2 + 80024e2: 647b str r3, [r7, #68] @ 0x44 + 80024e4: e012 b.n 800250c temp[i++] = fracBuffer[k] + '0'; - 8002992: 6c7b ldr r3, [r7, #68] @ 0x44 - 8002994: 009b lsls r3, r3, #2 - 8002996: 3358 adds r3, #88 @ 0x58 - 8002998: 443b add r3, r7 - 800299a: f853 3c48 ldr.w r3, [r3, #-72] - 800299e: b2da uxtb r2, r3 - 80029a0: 6d7b ldr r3, [r7, #84] @ 0x54 - 80029a2: 1c59 adds r1, r3, #1 - 80029a4: 6579 str r1, [r7, #84] @ 0x54 - 80029a6: 3230 adds r2, #48 @ 0x30 - 80029a8: b2d2 uxtb r2, r2 - 80029aa: 3358 adds r3, #88 @ 0x58 - 80029ac: 443b add r3, r7 - 80029ae: f803 2c30 strb.w r2, [r3, #-48] + 80024e6: 6c7b ldr r3, [r7, #68] @ 0x44 + 80024e8: 009b lsls r3, r3, #2 + 80024ea: 3358 adds r3, #88 @ 0x58 + 80024ec: 443b add r3, r7 + 80024ee: f853 3c48 ldr.w r3, [r3, #-72] + 80024f2: b2da uxtb r2, r3 + 80024f4: 6d7b ldr r3, [r7, #84] @ 0x54 + 80024f6: 1c59 adds r1, r3, #1 + 80024f8: 6579 str r1, [r7, #84] @ 0x54 + 80024fa: 3230 adds r2, #48 @ 0x30 + 80024fc: b2d2 uxtb r2, r2 + 80024fe: 3358 adds r3, #88 @ 0x58 + 8002500: 443b add r3, r7 + 8002502: f803 2c30 strb.w r2, [r3, #-48] for (int k = 2; k >= 0; k--) { - 80029b2: 6c7b ldr r3, [r7, #68] @ 0x44 - 80029b4: 3b01 subs r3, #1 - 80029b6: 647b str r3, [r7, #68] @ 0x44 - 80029b8: 6c7b ldr r3, [r7, #68] @ 0x44 - 80029ba: 2b00 cmp r3, #0 - 80029bc: dae9 bge.n 8002992 + 8002506: 6c7b ldr r3, [r7, #68] @ 0x44 + 8002508: 3b01 subs r3, #1 + 800250a: 647b str r3, [r7, #68] @ 0x44 + 800250c: 6c7b ldr r3, [r7, #68] @ 0x44 + 800250e: 2b00 cmp r3, #0 + 8002510: dae9 bge.n 80024e6 } // 5. Finalizar a string com o caractere nulo temp[i] = '\0'; - 80029be: f107 0228 add.w r2, r7, #40 @ 0x28 - 80029c2: 6d7b ldr r3, [r7, #84] @ 0x54 - 80029c4: 4413 add r3, r2 - 80029c6: 2200 movs r2, #0 - 80029c8: 701a strb r2, [r3, #0] + 8002512: f107 0228 add.w r2, r7, #40 @ 0x28 + 8002516: 6d7b ldr r3, [r7, #84] @ 0x54 + 8002518: 4413 add r3, r2 + 800251a: 2200 movs r2, #0 + 800251c: 701a strb r2, [r3, #0] // 6. Copiar para o buffer de destino final (sem risco de lixo) int destIdx = 0; - 80029ca: 2300 movs r3, #0 - 80029cc: 643b str r3, [r7, #64] @ 0x40 + 800251e: 2300 movs r3, #0 + 8002520: 643b str r3, [r7, #64] @ 0x40 while (temp[destIdx] != '\0' && destIdx < 15) { // Limite de segurança - 80029ce: e00b b.n 80029e8 + 8002522: e00b b.n 800253c buf[destIdx] = temp[destIdx]; - 80029d0: 6c3b ldr r3, [r7, #64] @ 0x40 - 80029d2: 68fa ldr r2, [r7, #12] - 80029d4: 4413 add r3, r2 - 80029d6: f107 0128 add.w r1, r7, #40 @ 0x28 - 80029da: 6c3a ldr r2, [r7, #64] @ 0x40 - 80029dc: 440a add r2, r1 - 80029de: 7812 ldrb r2, [r2, #0] - 80029e0: 701a strb r2, [r3, #0] + 8002524: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002526: 68fa ldr r2, [r7, #12] + 8002528: 4413 add r3, r2 + 800252a: f107 0128 add.w r1, r7, #40 @ 0x28 + 800252e: 6c3a ldr r2, [r7, #64] @ 0x40 + 8002530: 440a add r2, r1 + 8002532: 7812 ldrb r2, [r2, #0] + 8002534: 701a strb r2, [r3, #0] destIdx++; - 80029e2: 6c3b ldr r3, [r7, #64] @ 0x40 - 80029e4: 3301 adds r3, #1 - 80029e6: 643b str r3, [r7, #64] @ 0x40 + 8002536: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002538: 3301 adds r3, #1 + 800253a: 643b str r3, [r7, #64] @ 0x40 while (temp[destIdx] != '\0' && destIdx < 15) { // Limite de segurança - 80029e8: f107 0228 add.w r2, r7, #40 @ 0x28 - 80029ec: 6c3b ldr r3, [r7, #64] @ 0x40 - 80029ee: 4413 add r3, r2 - 80029f0: 781b ldrb r3, [r3, #0] - 80029f2: 2b00 cmp r3, #0 - 80029f4: d002 beq.n 80029fc - 80029f6: 6c3b ldr r3, [r7, #64] @ 0x40 - 80029f8: 2b0e cmp r3, #14 - 80029fa: dde9 ble.n 80029d0 + 800253c: f107 0228 add.w r2, r7, #40 @ 0x28 + 8002540: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002542: 4413 add r3, r2 + 8002544: 781b ldrb r3, [r3, #0] + 8002546: 2b00 cmp r3, #0 + 8002548: d002 beq.n 8002550 + 800254a: 6c3b ldr r3, [r7, #64] @ 0x40 + 800254c: 2b0e cmp r3, #14 + 800254e: dde9 ble.n 8002524 } buf[destIdx] = '\0'; - 80029fc: 6c3b ldr r3, [r7, #64] @ 0x40 - 80029fe: 68fa ldr r2, [r7, #12] - 8002a00: 4413 add r3, r2 - 8002a02: 2200 movs r2, #0 - 8002a04: 701a strb r2, [r3, #0] + 8002550: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002552: 68fa ldr r2, [r7, #12] + 8002554: 4413 add r3, r2 + 8002556: 2200 movs r2, #0 + 8002558: 701a strb r2, [r3, #0] } - 8002a06: bf00 nop - 8002a08: 3758 adds r7, #88 @ 0x58 - 8002a0a: 46bd mov sp, r7 - 8002a0c: bdb0 pop {r4, r5, r7, pc} - 8002a0e: bf00 nop - 8002a10: 408f4000 .word 0x408f4000 - 8002a14: 3fe00000 .word 0x3fe00000 - 8002a18: 66666667 .word 0x66666667 - 8002a1c: 51eb851f .word 0x51eb851f + 800255a: bf00 nop + 800255c: 3758 adds r7, #88 @ 0x58 + 800255e: 46bd mov sp, r7 + 8002560: bdb0 pop {r4, r5, r7, pc} + 8002562: bf00 nop + 8002564: 408f4000 .word 0x408f4000 + 8002568: 3fe00000 .word 0x3fe00000 + 800256c: 66666667 .word 0x66666667 + 8002570: 51eb851f .word 0x51eb851f -08002a20 : +08002574 : + } +} + +/* TIM3 Timer Interrupt */ +void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) +{ + 8002574: b480 push {r7} + 8002576: b083 sub sp, #12 + 8002578: af00 add r7, sp, #0 + 800257a: 6078 str r0, [r7, #4] + if (htim->Instance == TIM3) + 800257c: 687b ldr r3, [r7, #4] + 800257e: 681b ldr r3, [r3, #0] + 8002580: 4a06 ldr r2, [pc, #24] @ (800259c ) + 8002582: 4293 cmp r3, r2 + 8002584: d104 bne.n 8002590 + { + g_ms_counter++; /* Relógio global do sistema */ + 8002586: 4b06 ldr r3, [pc, #24] @ (80025a0 ) + 8002588: 681b ldr r3, [r3, #0] + 800258a: 3301 adds r3, #1 + 800258c: 4a04 ldr r2, [pc, #16] @ (80025a0 ) + 800258e: 6013 str r3, [r2, #0] + + } +} + 8002590: bf00 nop + 8002592: 370c adds r7, #12 + 8002594: 46bd mov sp, r7 + 8002596: bc80 pop {r7} + 8002598: 4770 bx lr + 800259a: bf00 nop + 800259c: 40000400 .word 0x40000400 + 80025a0: 200000b4 .word 0x200000b4 + +080025a4 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 8002a20: b480 push {r7} - 8002a22: af00 add r7, sp, #0 + 80025a4: b480 push {r7} + 80025a6: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 8002a24: b672 cpsid i + 80025a8: b672 cpsid i } - 8002a26: bf00 nop + 80025aa: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 8002a28: bf00 nop - 8002a2a: e7fd b.n 8002a28 + 80025ac: bf00 nop + 80025ae: e7fd b.n 80025ac -08002a2c : +080025b0 : * @rmtoll IDR IDy LL_GPIO_ReadInputPort * @param GPIOx GPIO Port * @retval Input data register value of port */ __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx) { - 8002a2c: b480 push {r7} - 8002a2e: b083 sub sp, #12 - 8002a30: af00 add r7, sp, #0 - 8002a32: 6078 str r0, [r7, #4] + 80025b0: b480 push {r7} + 80025b2: b083 sub sp, #12 + 80025b4: af00 add r7, sp, #0 + 80025b6: 6078 str r0, [r7, #4] return (READ_REG(GPIOx->IDR)); - 8002a34: 687b ldr r3, [r7, #4] - 8002a36: 689b ldr r3, [r3, #8] + 80025b8: 687b ldr r3, [r7, #4] + 80025ba: 689b ldr r3, [r3, #8] } - 8002a38: 4618 mov r0, r3 - 8002a3a: 370c adds r7, #12 - 8002a3c: 46bd mov sp, r7 - 8002a3e: bc80 pop {r7} - 8002a40: 4770 bx lr + 80025bc: 4618 mov r0, r3 + 80025be: 370c adds r7, #12 + 80025c0: 46bd mov sp, r7 + 80025c2: bc80 pop {r7} + 80025c4: 4770 bx lr ... -08002a44 : +080025c8 : /** * @brief Initializes the RS-485 driver. * @note This function configures GPIOs for address detection and USART1 for communication. */ void rs485_init(void) { - 8002a44: b580 push {r7, lr} - 8002a46: af00 add r7, sp, #0 + 80025c8: b580 push {r7, lr} + 80025ca: af00 add r7, sp, #0 /* Configure GPIOs for address detection */ rs485_configure_gpio_address(); - 8002a48: f000 f864 bl 8002b14 + 80025cc: f000 f864 bl 8002698 /* Configure USART1 for RS-485 communication */ rs485_configure_usart1(); - 8002a4c: f000 f8a8 bl 8002ba0 + 80025d0: f000 f8a8 bl 8002724 /* Get the current device address from GPIOs */ device_address.full_address = rs485_get_address(); - 8002a50: f000 f808 bl 8002a64 - 8002a54: 4603 mov r3, r0 - 8002a56: 461a mov r2, r3 - 8002a58: 4b01 ldr r3, [pc, #4] @ (8002a60 ) - 8002a5a: 709a strb r2, [r3, #2] + 80025d4: f000 f808 bl 80025e8 + 80025d8: 4603 mov r3, r0 + 80025da: 461a mov r2, r3 + 80025dc: 4b01 ldr r3, [pc, #4] @ (80025e4 ) + 80025de: 709a strb r2, [r3, #2] } - 8002a5c: bf00 nop - 8002a5e: bd80 pop {r7, pc} - 8002a60: 200006d0 .word 0x200006d0 + 80025e0: bf00 nop + 80025e2: bd80 pop {r7, pc} + 80025e4: 20000734 .word 0x20000734 -08002a64 : +080025e8 : /** * @brief Gets the current device address from GPIOs. * @return The 8-bit device address. */ uint8_t rs485_get_address(void) { - 8002a64: b598 push {r3, r4, r7, lr} - 8002a66: af00 add r7, sp, #0 + 80025e8: b598 push {r3, r4, r7, lr} + 80025ea: af00 add r7, sp, #0 return ((uint8_t) ((((LL_GPIO_ReadInputPort(GPIOB) & RS485_ADDR_MASK_HIGH)>>RS485_ADDR_BIT_SET_HIGH) | (LL_GPIO_ReadInputPort(GPIOA) & RS485_ADDR_MASK_LOW)>>RS485_ADDR_BIT_SET_LOW))); - 8002a68: 480a ldr r0, [pc, #40] @ (8002a94 ) - 8002a6a: f7ff ffdf bl 8002a2c - 8002a6e: 4603 mov r3, r0 - 8002a70: 0a1b lsrs r3, r3, #8 - 8002a72: b2db uxtb r3, r3 - 8002a74: f023 030f bic.w r3, r3, #15 - 8002a78: b2dc uxtb r4, r3 - 8002a7a: 4807 ldr r0, [pc, #28] @ (8002a98 ) - 8002a7c: f7ff ffd6 bl 8002a2c - 8002a80: 4603 mov r3, r0 - 8002a82: 089b lsrs r3, r3, #2 - 8002a84: b2db uxtb r3, r3 - 8002a86: f003 030f and.w r3, r3, #15 - 8002a8a: b2db uxtb r3, r3 - 8002a8c: 4323 orrs r3, r4 - 8002a8e: b2db uxtb r3, r3 + 80025ec: 480a ldr r0, [pc, #40] @ (8002618 ) + 80025ee: f7ff ffdf bl 80025b0 + 80025f2: 4603 mov r3, r0 + 80025f4: 0a1b lsrs r3, r3, #8 + 80025f6: b2db uxtb r3, r3 + 80025f8: f023 030f bic.w r3, r3, #15 + 80025fc: b2dc uxtb r4, r3 + 80025fe: 4807 ldr r0, [pc, #28] @ (800261c ) + 8002600: f7ff ffd6 bl 80025b0 + 8002604: 4603 mov r3, r0 + 8002606: 089b lsrs r3, r3, #2 + 8002608: b2db uxtb r3, r3 + 800260a: f003 030f and.w r3, r3, #15 + 800260e: b2db uxtb r3, r3 + 8002610: 4323 orrs r3, r4 + 8002612: b2db uxtb r3, r3 } - 8002a90: 4618 mov r0, r3 - 8002a92: bd98 pop {r3, r4, r7, pc} - 8002a94: 40010c00 .word 0x40010c00 - 8002a98: 40010800 .word 0x40010800 + 8002614: 4618 mov r0, r3 + 8002616: bd98 pop {r3, r4, r7, pc} + 8002618: 40010c00 .word 0x40010c00 + 800261c: 40010800 .word 0x40010800 -08002a9c : +08002620 : * @param data Pointer to the data buffer. * @param length Number of bytes to send. * @retval HAL_OK on success, otherwise error code. */ HAL_StatusTypeDef rs485_send_broadcast(uint8_t* data, uint16_t length) { - 8002a9c: b580 push {r7, lr} - 8002a9e: b084 sub sp, #16 - 8002aa0: af00 add r7, sp, #0 - 8002aa2: 6078 str r0, [r7, #4] - 8002aa4: 460b mov r3, r1 - 8002aa6: 807b strh r3, [r7, #2] + 8002620: b580 push {r7, lr} + 8002622: b084 sub sp, #16 + 8002624: af00 add r7, sp, #0 + 8002626: 6078 str r0, [r7, #4] + 8002628: 460b mov r3, r1 + 800262a: 807b strh r3, [r7, #2] /* Enable transmission mode */ rs485_enable_tx(); - 8002aa8: f000 f81c bl 8002ae4 + 800262c: f000 f81c bl 8002668 /* Send the broadcast address (0x00) first */ uint8_t broadcast_address = 0x00; - 8002aac: 2300 movs r3, #0 - 8002aae: 73bb strb r3, [r7, #14] + 8002630: 2300 movs r3, #0 + 8002632: 73bb strb r3, [r7, #14] HAL_UART_Transmit(&huart1, &broadcast_address, 1, HAL_MAX_DELAY); - 8002ab0: f107 010e add.w r1, r7, #14 - 8002ab4: f04f 33ff mov.w r3, #4294967295 - 8002ab8: 2201 movs r2, #1 - 8002aba: 4809 ldr r0, [pc, #36] @ (8002ae0 ) - 8002abc: f002 ff2c bl 8005918 + 8002634: f107 010e add.w r1, r7, #14 + 8002638: f04f 33ff mov.w r3, #4294967295 + 800263c: 2201 movs r2, #1 + 800263e: 4809 ldr r0, [pc, #36] @ (8002664 ) + 8002640: f003 f99c bl 800597c /* Send the data */ HAL_StatusTypeDef status = HAL_UART_Transmit(&huart1, data, length, HAL_MAX_DELAY); - 8002ac0: 887a ldrh r2, [r7, #2] - 8002ac2: f04f 33ff mov.w r3, #4294967295 - 8002ac6: 6879 ldr r1, [r7, #4] - 8002ac8: 4805 ldr r0, [pc, #20] @ (8002ae0 ) - 8002aca: f002 ff25 bl 8005918 - 8002ace: 4603 mov r3, r0 - 8002ad0: 73fb strb r3, [r7, #15] + 8002644: 887a ldrh r2, [r7, #2] + 8002646: f04f 33ff mov.w r3, #4294967295 + 800264a: 6879 ldr r1, [r7, #4] + 800264c: 4805 ldr r0, [pc, #20] @ (8002664 ) + 800264e: f003 f995 bl 800597c + 8002652: 4603 mov r3, r0 + 8002654: 73fb strb r3, [r7, #15] /* Disable transmission mode after sending */ rs485_disable_tx(); - 8002ad2: f000 f813 bl 8002afc + 8002656: f000 f813 bl 8002680 return status; - 8002ad6: 7bfb ldrb r3, [r7, #15] + 800265a: 7bfb ldrb r3, [r7, #15] } - 8002ad8: 4618 mov r0, r3 - 8002ada: 3710 adds r7, #16 - 8002adc: 46bd mov sp, r7 - 8002ade: bd80 pop {r7, pc} - 8002ae0: 200006d4 .word 0x200006d4 + 800265c: 4618 mov r0, r3 + 800265e: 3710 adds r7, #16 + 8002660: 46bd mov sp, r7 + 8002662: bd80 pop {r7, pc} + 8002664: 20000738 .word 0x20000738 -08002ae4 : +08002668 : /** * @brief Enables transmission mode on RS-485 transceiver. */ void rs485_enable_tx(void) { - 8002ae4: b580 push {r7, lr} - 8002ae6: af00 add r7, sp, #0 + 8002668: b580 push {r7, lr} + 800266a: af00 add r7, sp, #0 /* Set TX EN pin high to enable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_SET); - 8002ae8: 2201 movs r2, #1 - 8002aea: f44f 5180 mov.w r1, #4096 @ 0x1000 - 8002aee: 4802 ldr r0, [pc, #8] @ (8002af8 ) - 8002af0: f001 f995 bl 8003e1e + 800266c: 2201 movs r2, #1 + 800266e: f44f 5180 mov.w r1, #4096 @ 0x1000 + 8002672: 4802 ldr r0, [pc, #8] @ (800267c ) + 8002674: f001 f813 bl 800369e } - 8002af4: bf00 nop - 8002af6: bd80 pop {r7, pc} - 8002af8: 40010800 .word 0x40010800 + 8002678: bf00 nop + 800267a: bd80 pop {r7, pc} + 800267c: 40010800 .word 0x40010800 -08002afc : +08002680 : /** * @brief Disables transmission mode on RS-485 transceiver. */ void rs485_disable_tx(void) { - 8002afc: b580 push {r7, lr} - 8002afe: af00 add r7, sp, #0 + 8002680: b580 push {r7, lr} + 8002682: af00 add r7, sp, #0 /* Set TX EN pin low to disable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_RESET); - 8002b00: 2200 movs r2, #0 - 8002b02: f44f 5180 mov.w r1, #4096 @ 0x1000 - 8002b06: 4802 ldr r0, [pc, #8] @ (8002b10 ) - 8002b08: f001 f989 bl 8003e1e + 8002684: 2200 movs r2, #0 + 8002686: f44f 5180 mov.w r1, #4096 @ 0x1000 + 800268a: 4802 ldr r0, [pc, #8] @ (8002694 ) + 800268c: f001 f807 bl 800369e } - 8002b0c: bf00 nop - 8002b0e: bd80 pop {r7, pc} - 8002b10: 40010800 .word 0x40010800 + 8002690: bf00 nop + 8002692: bd80 pop {r7, pc} + 8002694: 40010800 .word 0x40010800 -08002b14 : +08002698 : /** * @brief Configures GPIOs for address detection. */ static void rs485_configure_gpio_address(void) { - 8002b14: b580 push {r7, lr} - 8002b16: b086 sub sp, #24 - 8002b18: af00 add r7, sp, #0 + 8002698: b580 push {r7, lr} + 800269a: b086 sub sp, #24 + 800269c: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002b1a: f107 0308 add.w r3, r7, #8 - 8002b1e: 2200 movs r2, #0 - 8002b20: 601a str r2, [r3, #0] - 8002b22: 605a str r2, [r3, #4] - 8002b24: 609a str r2, [r3, #8] - 8002b26: 60da str r2, [r3, #12] + 800269e: f107 0308 add.w r3, r7, #8 + 80026a2: 2200 movs r2, #0 + 80026a4: 601a str r2, [r3, #0] + 80026a6: 605a str r2, [r3, #4] + 80026a8: 609a str r2, [r3, #8] + 80026aa: 60da str r2, [r3, #12] /* Enable clock for GPIOA and GPIOB */ __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002b28: 4b1a ldr r3, [pc, #104] @ (8002b94 ) - 8002b2a: 699b ldr r3, [r3, #24] - 8002b2c: 4a19 ldr r2, [pc, #100] @ (8002b94 ) - 8002b2e: f043 0304 orr.w r3, r3, #4 - 8002b32: 6193 str r3, [r2, #24] - 8002b34: 4b17 ldr r3, [pc, #92] @ (8002b94 ) - 8002b36: 699b ldr r3, [r3, #24] - 8002b38: f003 0304 and.w r3, r3, #4 - 8002b3c: 607b str r3, [r7, #4] - 8002b3e: 687b ldr r3, [r7, #4] + 80026ac: 4b1a ldr r3, [pc, #104] @ (8002718 ) + 80026ae: 699b ldr r3, [r3, #24] + 80026b0: 4a19 ldr r2, [pc, #100] @ (8002718 ) + 80026b2: f043 0304 orr.w r3, r3, #4 + 80026b6: 6193 str r3, [r2, #24] + 80026b8: 4b17 ldr r3, [pc, #92] @ (8002718 ) + 80026ba: 699b ldr r3, [r3, #24] + 80026bc: f003 0304 and.w r3, r3, #4 + 80026c0: 607b str r3, [r7, #4] + 80026c2: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002b40: 4b14 ldr r3, [pc, #80] @ (8002b94 ) - 8002b42: 699b ldr r3, [r3, #24] - 8002b44: 4a13 ldr r2, [pc, #76] @ (8002b94 ) - 8002b46: f043 0308 orr.w r3, r3, #8 - 8002b4a: 6193 str r3, [r2, #24] - 8002b4c: 4b11 ldr r3, [pc, #68] @ (8002b94 ) - 8002b4e: 699b ldr r3, [r3, #24] - 8002b50: f003 0308 and.w r3, r3, #8 - 8002b54: 603b str r3, [r7, #0] - 8002b56: 683b ldr r3, [r7, #0] + 80026c4: 4b14 ldr r3, [pc, #80] @ (8002718 ) + 80026c6: 699b ldr r3, [r3, #24] + 80026c8: 4a13 ldr r2, [pc, #76] @ (8002718 ) + 80026ca: f043 0308 orr.w r3, r3, #8 + 80026ce: 6193 str r3, [r2, #24] + 80026d0: 4b11 ldr r3, [pc, #68] @ (8002718 ) + 80026d2: 699b ldr r3, [r3, #24] + 80026d4: f003 0308 and.w r3, r3, #8 + 80026d8: 603b str r3, [r7, #0] + 80026da: 683b ldr r3, [r7, #0] /* Configure PA2-PA5 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; - 8002b58: 233c movs r3, #60 @ 0x3c - 8002b5a: 60bb str r3, [r7, #8] + 80026dc: 233c movs r3, #60 @ 0x3c + 80026de: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002b5c: 2300 movs r3, #0 - 8002b5e: 60fb str r3, [r7, #12] + 80026e0: 2300 movs r3, #0 + 80026e2: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8002b60: 2301 movs r3, #1 - 8002b62: 613b str r3, [r7, #16] + 80026e4: 2301 movs r3, #1 + 80026e6: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002b64: f107 0308 add.w r3, r7, #8 - 8002b68: 4619 mov r1, r3 - 8002b6a: 480b ldr r0, [pc, #44] @ (8002b98 ) - 8002b6c: f000 ffbc bl 8003ae8 + 80026e8: f107 0308 add.w r3, r7, #8 + 80026ec: 4619 mov r1, r3 + 80026ee: 480b ldr r0, [pc, #44] @ (800271c ) + 80026f0: f000 fe3a bl 8003368 /* Configure PB12-PB15 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15; - 8002b70: f44f 4370 mov.w r3, #61440 @ 0xf000 - 8002b74: 60bb str r3, [r7, #8] + 80026f4: f44f 4370 mov.w r3, #61440 @ 0xf000 + 80026f8: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002b76: 2300 movs r3, #0 - 8002b78: 60fb str r3, [r7, #12] + 80026fa: 2300 movs r3, #0 + 80026fc: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8002b7a: 2301 movs r3, #1 - 8002b7c: 613b str r3, [r7, #16] + 80026fe: 2301 movs r3, #1 + 8002700: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002b7e: f107 0308 add.w r3, r7, #8 - 8002b82: 4619 mov r1, r3 - 8002b84: 4805 ldr r0, [pc, #20] @ (8002b9c ) - 8002b86: f000 ffaf bl 8003ae8 + 8002702: f107 0308 add.w r3, r7, #8 + 8002706: 4619 mov r1, r3 + 8002708: 4805 ldr r0, [pc, #20] @ (8002720 ) + 800270a: f000 fe2d bl 8003368 } - 8002b8a: bf00 nop - 8002b8c: 3718 adds r7, #24 - 8002b8e: 46bd mov sp, r7 - 8002b90: bd80 pop {r7, pc} - 8002b92: bf00 nop - 8002b94: 40021000 .word 0x40021000 - 8002b98: 40010800 .word 0x40010800 - 8002b9c: 40010c00 .word 0x40010c00 + 800270e: bf00 nop + 8002710: 3718 adds r7, #24 + 8002712: 46bd mov sp, r7 + 8002714: bd80 pop {r7, pc} + 8002716: bf00 nop + 8002718: 40021000 .word 0x40021000 + 800271c: 40010800 .word 0x40010800 + 8002720: 40010c00 .word 0x40010c00 -08002ba0 : +08002724 : /** * @brief Configures USART1 for RS-485 communication. */ static void rs485_configure_usart1(void) { - 8002ba0: b580 push {r7, lr} - 8002ba2: b082 sub sp, #8 - 8002ba4: af00 add r7, sp, #0 + 8002724: b580 push {r7, lr} + 8002726: b082 sub sp, #8 + 8002728: af00 add r7, sp, #0 /* Enable clock for USART1 */ __HAL_RCC_USART1_CLK_ENABLE(); - 8002ba6: 4b18 ldr r3, [pc, #96] @ (8002c08 ) - 8002ba8: 699b ldr r3, [r3, #24] - 8002baa: 4a17 ldr r2, [pc, #92] @ (8002c08 ) - 8002bac: f443 4380 orr.w r3, r3, #16384 @ 0x4000 - 8002bb0: 6193 str r3, [r2, #24] - 8002bb2: 4b15 ldr r3, [pc, #84] @ (8002c08 ) - 8002bb4: 699b ldr r3, [r3, #24] - 8002bb6: f403 4380 and.w r3, r3, #16384 @ 0x4000 - 8002bba: 607b str r3, [r7, #4] - 8002bbc: 687b ldr r3, [r7, #4] + 800272a: 4b18 ldr r3, [pc, #96] @ (800278c ) + 800272c: 699b ldr r3, [r3, #24] + 800272e: 4a17 ldr r2, [pc, #92] @ (800278c ) + 8002730: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 8002734: 6193 str r3, [r2, #24] + 8002736: 4b15 ldr r3, [pc, #84] @ (800278c ) + 8002738: 699b ldr r3, [r3, #24] + 800273a: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 800273e: 607b str r3, [r7, #4] + 8002740: 687b ldr r3, [r7, #4] huart1.Instance = USART1; - 8002bbe: 4b13 ldr r3, [pc, #76] @ (8002c0c ) - 8002bc0: 4a13 ldr r2, [pc, #76] @ (8002c10 ) - 8002bc2: 601a str r2, [r3, #0] + 8002742: 4b13 ldr r3, [pc, #76] @ (8002790 ) + 8002744: 4a13 ldr r2, [pc, #76] @ (8002794 ) + 8002746: 601a str r2, [r3, #0] huart1.Init.BaudRate = 9600; /*!< Default baud rate for RS-485 */ - 8002bc4: 4b11 ldr r3, [pc, #68] @ (8002c0c ) - 8002bc6: f44f 5216 mov.w r2, #9600 @ 0x2580 - 8002bca: 605a str r2, [r3, #4] + 8002748: 4b11 ldr r3, [pc, #68] @ (8002790 ) + 800274a: f44f 5216 mov.w r2, #9600 @ 0x2580 + 800274e: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8002bcc: 4b0f ldr r3, [pc, #60] @ (8002c0c ) - 8002bce: 2200 movs r2, #0 - 8002bd0: 609a str r2, [r3, #8] + 8002750: 4b0f ldr r3, [pc, #60] @ (8002790 ) + 8002752: 2200 movs r2, #0 + 8002754: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 8002bd2: 4b0e ldr r3, [pc, #56] @ (8002c0c ) - 8002bd4: 2200 movs r2, #0 - 8002bd6: 60da str r2, [r3, #12] + 8002756: 4b0e ldr r3, [pc, #56] @ (8002790 ) + 8002758: 2200 movs r2, #0 + 800275a: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 8002bd8: 4b0c ldr r3, [pc, #48] @ (8002c0c ) - 8002bda: 2200 movs r2, #0 - 8002bdc: 611a str r2, [r3, #16] + 800275c: 4b0c ldr r3, [pc, #48] @ (8002790 ) + 800275e: 2200 movs r2, #0 + 8002760: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 8002bde: 4b0b ldr r3, [pc, #44] @ (8002c0c ) - 8002be0: 220c movs r2, #12 - 8002be2: 615a str r2, [r3, #20] + 8002762: 4b0b ldr r3, [pc, #44] @ (8002790 ) + 8002764: 220c movs r2, #12 + 8002766: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; /*!< Use NONE as TX enable */ - 8002be4: 4b09 ldr r3, [pc, #36] @ (8002c0c ) - 8002be6: 2200 movs r2, #0 - 8002be8: 619a str r2, [r3, #24] + 8002768: 4b09 ldr r3, [pc, #36] @ (8002790 ) + 800276a: 2200 movs r2, #0 + 800276c: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8002bea: 4b08 ldr r3, [pc, #32] @ (8002c0c ) - 8002bec: 2200 movs r2, #0 - 8002bee: 61da str r2, [r3, #28] + 800276e: 4b08 ldr r3, [pc, #32] @ (8002790 ) + 8002770: 2200 movs r2, #0 + 8002772: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) - 8002bf0: 4806 ldr r0, [pc, #24] @ (8002c0c ) - 8002bf2: f002 fe41 bl 8005878 - 8002bf6: 4603 mov r3, r0 - 8002bf8: 2b00 cmp r3, #0 - 8002bfa: d001 beq.n 8002c00 + 8002774: 4806 ldr r0, [pc, #24] @ (8002790 ) + 8002776: f003 f8b1 bl 80058dc + 800277a: 4603 mov r3, r0 + 800277c: 2b00 cmp r3, #0 + 800277e: d001 beq.n 8002784 { /* Initialization Error */ while(1); - 8002bfc: bf00 nop - 8002bfe: e7fd b.n 8002bfc + 8002780: bf00 nop + 8002782: e7fd b.n 8002780 } } - 8002c00: bf00 nop - 8002c02: 3708 adds r7, #8 - 8002c04: 46bd mov sp, r7 - 8002c06: bd80 pop {r7, pc} - 8002c08: 40021000 .word 0x40021000 - 8002c0c: 200006d4 .word 0x200006d4 - 8002c10: 40013800 .word 0x40013800 + 8002784: bf00 nop + 8002786: 3708 adds r7, #8 + 8002788: 46bd mov sp, r7 + 800278a: bd80 pop {r7, pc} + 800278c: 40021000 .word 0x40021000 + 8002790: 20000738 .word 0x20000738 + 8002794: 40013800 .word 0x40013800 -08002c14 : +08002798 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8002c14: b480 push {r7} - 8002c16: b085 sub sp, #20 - 8002c18: af00 add r7, sp, #0 + 8002798: b480 push {r7} + 800279a: b085 sub sp, #20 + 800279c: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); - 8002c1a: 4b15 ldr r3, [pc, #84] @ (8002c70 ) - 8002c1c: 699b ldr r3, [r3, #24] - 8002c1e: 4a14 ldr r2, [pc, #80] @ (8002c70 ) - 8002c20: f043 0301 orr.w r3, r3, #1 - 8002c24: 6193 str r3, [r2, #24] - 8002c26: 4b12 ldr r3, [pc, #72] @ (8002c70 ) - 8002c28: 699b ldr r3, [r3, #24] - 8002c2a: f003 0301 and.w r3, r3, #1 - 8002c2e: 60bb str r3, [r7, #8] - 8002c30: 68bb ldr r3, [r7, #8] + 800279e: 4b15 ldr r3, [pc, #84] @ (80027f4 ) + 80027a0: 699b ldr r3, [r3, #24] + 80027a2: 4a14 ldr r2, [pc, #80] @ (80027f4 ) + 80027a4: f043 0301 orr.w r3, r3, #1 + 80027a8: 6193 str r3, [r2, #24] + 80027aa: 4b12 ldr r3, [pc, #72] @ (80027f4 ) + 80027ac: 699b ldr r3, [r3, #24] + 80027ae: f003 0301 and.w r3, r3, #1 + 80027b2: 60bb str r3, [r7, #8] + 80027b4: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); - 8002c32: 4b0f ldr r3, [pc, #60] @ (8002c70 ) - 8002c34: 69db ldr r3, [r3, #28] - 8002c36: 4a0e ldr r2, [pc, #56] @ (8002c70 ) - 8002c38: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8002c3c: 61d3 str r3, [r2, #28] - 8002c3e: 4b0c ldr r3, [pc, #48] @ (8002c70 ) - 8002c40: 69db ldr r3, [r3, #28] - 8002c42: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8002c46: 607b str r3, [r7, #4] - 8002c48: 687b ldr r3, [r7, #4] + 80027b6: 4b0f ldr r3, [pc, #60] @ (80027f4 ) + 80027b8: 69db ldr r3, [r3, #28] + 80027ba: 4a0e ldr r2, [pc, #56] @ (80027f4 ) + 80027bc: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 80027c0: 61d3 str r3, [r2, #28] + 80027c2: 4b0c ldr r3, [pc, #48] @ (80027f4 ) + 80027c4: 69db ldr r3, [r3, #28] + 80027c6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80027ca: 607b str r3, [r7, #4] + 80027cc: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); - 8002c4a: 4b0a ldr r3, [pc, #40] @ (8002c74 ) - 8002c4c: 685b ldr r3, [r3, #4] - 8002c4e: 60fb str r3, [r7, #12] - 8002c50: 68fb ldr r3, [r7, #12] - 8002c52: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 - 8002c56: 60fb str r3, [r7, #12] - 8002c58: 68fb ldr r3, [r7, #12] - 8002c5a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 - 8002c5e: 60fb str r3, [r7, #12] - 8002c60: 4a04 ldr r2, [pc, #16] @ (8002c74 ) - 8002c62: 68fb ldr r3, [r7, #12] - 8002c64: 6053 str r3, [r2, #4] + 80027ce: 4b0a ldr r3, [pc, #40] @ (80027f8 ) + 80027d0: 685b ldr r3, [r3, #4] + 80027d2: 60fb str r3, [r7, #12] + 80027d4: 68fb ldr r3, [r7, #12] + 80027d6: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 + 80027da: 60fb str r3, [r7, #12] + 80027dc: 68fb ldr r3, [r7, #12] + 80027de: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 + 80027e2: 60fb str r3, [r7, #12] + 80027e4: 4a04 ldr r2, [pc, #16] @ (80027f8 ) + 80027e6: 68fb ldr r3, [r7, #12] + 80027e8: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 8002c66: bf00 nop - 8002c68: 3714 adds r7, #20 - 8002c6a: 46bd mov sp, r7 - 8002c6c: bc80 pop {r7} - 8002c6e: 4770 bx lr - 8002c70: 40021000 .word 0x40021000 - 8002c74: 40010000 .word 0x40010000 + 80027ea: bf00 nop + 80027ec: 3714 adds r7, #20 + 80027ee: 46bd mov sp, r7 + 80027f0: bc80 pop {r7} + 80027f2: 4770 bx lr + 80027f4: 40021000 .word 0x40021000 + 80027f8: 40010000 .word 0x40010000 -08002c78 : +080027fc : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 8002c78: b480 push {r7} - 8002c7a: af00 add r7, sp, #0 + 80027fc: b480 push {r7} + 80027fe: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8002c7c: bf00 nop - 8002c7e: e7fd b.n 8002c7c + 8002800: bf00 nop + 8002802: e7fd b.n 8002800 -08002c80 : +08002804 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 8002c80: b480 push {r7} - 8002c82: af00 add r7, sp, #0 + 8002804: b480 push {r7} + 8002806: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 8002c84: bf00 nop - 8002c86: e7fd b.n 8002c84 + 8002808: bf00 nop + 800280a: e7fd b.n 8002808 -08002c88 : +0800280c : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 8002c88: b480 push {r7} - 8002c8a: af00 add r7, sp, #0 + 800280c: b480 push {r7} + 800280e: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 8002c8c: bf00 nop - 8002c8e: e7fd b.n 8002c8c + 8002810: bf00 nop + 8002812: e7fd b.n 8002810 -08002c90 : +08002814 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { - 8002c90: b480 push {r7} - 8002c92: af00 add r7, sp, #0 + 8002814: b480 push {r7} + 8002816: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 8002c94: bf00 nop - 8002c96: e7fd b.n 8002c94 + 8002818: bf00 nop + 800281a: e7fd b.n 8002818 -08002c98 : +0800281c : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 8002c98: b480 push {r7} - 8002c9a: af00 add r7, sp, #0 + 800281c: b480 push {r7} + 800281e: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 8002c9c: bf00 nop - 8002c9e: e7fd b.n 8002c9c + 8002820: bf00 nop + 8002822: e7fd b.n 8002820 -08002ca0 : +08002824 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8002ca0: b480 push {r7} - 8002ca2: af00 add r7, sp, #0 + 8002824: b480 push {r7} + 8002826: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 8002ca4: bf00 nop - 8002ca6: 46bd mov sp, r7 - 8002ca8: bc80 pop {r7} - 8002caa: 4770 bx lr + 8002828: bf00 nop + 800282a: 46bd mov sp, r7 + 800282c: bc80 pop {r7} + 800282e: 4770 bx lr -08002cac : +08002830 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 8002cac: b480 push {r7} - 8002cae: af00 add r7, sp, #0 + 8002830: b480 push {r7} + 8002832: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 8002cb0: bf00 nop - 8002cb2: 46bd mov sp, r7 - 8002cb4: bc80 pop {r7} - 8002cb6: 4770 bx lr + 8002834: bf00 nop + 8002836: 46bd mov sp, r7 + 8002838: bc80 pop {r7} + 800283a: 4770 bx lr -08002cb8 : +0800283c : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8002cb8: b480 push {r7} - 8002cba: af00 add r7, sp, #0 + 800283c: b480 push {r7} + 800283e: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8002cbc: bf00 nop - 8002cbe: 46bd mov sp, r7 - 8002cc0: bc80 pop {r7} - 8002cc2: 4770 bx lr + 8002840: bf00 nop + 8002842: 46bd mov sp, r7 + 8002844: bc80 pop {r7} + 8002846: 4770 bx lr -08002cc4 : +08002848 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8002cc4: b580 push {r7, lr} - 8002cc6: af00 add r7, sp, #0 + 8002848: b580 push {r7, lr} + 800284a: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8002cc8: f000 f8fc bl 8002ec4 + 800284c: f000 f97a bl 8002b44 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8002ccc: bf00 nop - 8002cce: bd80 pop {r7, pc} + 8002850: bf00 nop + 8002852: bd80 pop {r7, pc} -08002cd0 : +08002854 : + +/** + * @brief This function handles TIM3 global interrupt. + */ +void TIM3_IRQHandler(void) +{ + 8002854: b580 push {r7, lr} + 8002856: af00 add r7, sp, #0 + /* USER CODE BEGIN TIM3_IRQn 0 */ + + /* USER CODE END TIM3_IRQn 0 */ + HAL_TIM_IRQHandler(&htim3); + 8002858: 4802 ldr r0, [pc, #8] @ (8002864 ) + 800285a: f002 fcef bl 800523c + /* USER CODE BEGIN TIM3_IRQn 1 */ + + /* USER CODE END TIM3_IRQn 1 */ +} + 800285e: bf00 nop + 8002860: bd80 pop {r7, pc} + 8002862: bf00 nop + 8002864: 20000780 .word 0x20000780 + +08002868 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { - 8002cd0: b580 push {r7, lr} - 8002cd2: af00 add r7, sp, #0 + 8002868: b580 push {r7, lr} + 800286a: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); - 8002cd4: 4802 ldr r0, [pc, #8] @ (8002ce0 ) - 8002cd6: f002 feab bl 8005a30 + 800286c: 4802 ldr r0, [pc, #8] @ (8002878 ) + 800286e: f003 f911 bl 8005a94 /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } - 8002cda: bf00 nop - 8002cdc: bd80 pop {r7, pc} - 8002cde: bf00 nop - 8002ce0: 2000071c .word 0x2000071c + 8002872: bf00 nop + 8002874: bd80 pop {r7, pc} + 8002876: bf00 nop + 8002878: 200007c8 .word 0x200007c8 -08002ce4 : +0800287c : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { - 8002ce4: b480 push {r7} - 8002ce6: af00 add r7, sp, #0 + 800287c: b480 push {r7} + 800287e: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } - 8002ce8: bf00 nop - 8002cea: 46bd mov sp, r7 - 8002cec: bc80 pop {r7} - 8002cee: 4770 bx lr + 8002880: bf00 nop + 8002882: 46bd mov sp, r7 + 8002884: bc80 pop {r7} + 8002886: 4770 bx lr -08002cf0 : +08002888 : + +TIM_HandleTypeDef htim3; + +/* TIM3 init function */ +void MX_TIM3_Init(void) +{ + 8002888: b580 push {r7, lr} + 800288a: b086 sub sp, #24 + 800288c: af00 add r7, sp, #0 + + /* USER CODE BEGIN TIM3_Init 0 */ + + /* USER CODE END TIM3_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + 800288e: f107 0308 add.w r3, r7, #8 + 8002892: 2200 movs r2, #0 + 8002894: 601a str r2, [r3, #0] + 8002896: 605a str r2, [r3, #4] + 8002898: 609a str r2, [r3, #8] + 800289a: 60da str r2, [r3, #12] + TIM_MasterConfigTypeDef sMasterConfig = {0}; + 800289c: 463b mov r3, r7 + 800289e: 2200 movs r2, #0 + 80028a0: 601a str r2, [r3, #0] + 80028a2: 605a str r2, [r3, #4] + + /* USER CODE BEGIN TIM3_Init 1 */ + + /* USER CODE END TIM3_Init 1 */ + htim3.Instance = TIM3; + 80028a4: 4b1d ldr r3, [pc, #116] @ (800291c ) + 80028a6: 4a1e ldr r2, [pc, #120] @ (8002920 ) + 80028a8: 601a str r2, [r3, #0] + htim3.Init.Prescaler = 2; + 80028aa: 4b1c ldr r3, [pc, #112] @ (800291c ) + 80028ac: 2202 movs r2, #2 + 80028ae: 605a str r2, [r3, #4] + htim3.Init.CounterMode = TIM_COUNTERMODE_UP; + 80028b0: 4b1a ldr r3, [pc, #104] @ (800291c ) + 80028b2: 2200 movs r2, #0 + 80028b4: 609a str r2, [r3, #8] + htim3.Init.Period = 999; + 80028b6: 4b19 ldr r3, [pc, #100] @ (800291c ) + 80028b8: f240 32e7 movw r2, #999 @ 0x3e7 + 80028bc: 60da str r2, [r3, #12] + htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 80028be: 4b17 ldr r3, [pc, #92] @ (800291c ) + 80028c0: 2200 movs r2, #0 + 80028c2: 611a str r2, [r3, #16] + htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + 80028c4: 4b15 ldr r3, [pc, #84] @ (800291c ) + 80028c6: 2280 movs r2, #128 @ 0x80 + 80028c8: 619a str r2, [r3, #24] + if (HAL_TIM_Base_Init(&htim3) != HAL_OK) + 80028ca: 4814 ldr r0, [pc, #80] @ (800291c ) + 80028cc: f002 fc14 bl 80050f8 + 80028d0: 4603 mov r3, r0 + 80028d2: 2b00 cmp r3, #0 + 80028d4: d001 beq.n 80028da + { + Error_Handler(); + 80028d6: f7ff fe65 bl 80025a4 + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + 80028da: f44f 5380 mov.w r3, #4096 @ 0x1000 + 80028de: 60bb str r3, [r7, #8] + if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) + 80028e0: f107 0308 add.w r3, r7, #8 + 80028e4: 4619 mov r1, r3 + 80028e6: 480d ldr r0, [pc, #52] @ (800291c ) + 80028e8: f002 fd98 bl 800541c + 80028ec: 4603 mov r3, r0 + 80028ee: 2b00 cmp r3, #0 + 80028f0: d001 beq.n 80028f6 + { + Error_Handler(); + 80028f2: f7ff fe57 bl 80025a4 + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + 80028f6: 2300 movs r3, #0 + 80028f8: 603b str r3, [r7, #0] + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 80028fa: 2300 movs r3, #0 + 80028fc: 607b str r3, [r7, #4] + if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) + 80028fe: 463b mov r3, r7 + 8002900: 4619 mov r1, r3 + 8002902: 4806 ldr r0, [pc, #24] @ (800291c ) + 8002904: f002 ff7a bl 80057fc + 8002908: 4603 mov r3, r0 + 800290a: 2b00 cmp r3, #0 + 800290c: d001 beq.n 8002912 + { + Error_Handler(); + 800290e: f7ff fe49 bl 80025a4 + } + /* USER CODE BEGIN TIM3_Init 2 */ + + /* USER CODE END TIM3_Init 2 */ + +} + 8002912: bf00 nop + 8002914: 3718 adds r7, #24 + 8002916: 46bd mov sp, r7 + 8002918: bd80 pop {r7, pc} + 800291a: bf00 nop + 800291c: 20000780 .word 0x20000780 + 8002920: 40000400 .word 0x40000400 + +08002924 : + +void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) +{ + 8002924: b580 push {r7, lr} + 8002926: b084 sub sp, #16 + 8002928: af00 add r7, sp, #0 + 800292a: 6078 str r0, [r7, #4] + + if(tim_baseHandle->Instance==TIM3) + 800292c: 687b ldr r3, [r7, #4] + 800292e: 681b ldr r3, [r3, #0] + 8002930: 4a0d ldr r2, [pc, #52] @ (8002968 ) + 8002932: 4293 cmp r3, r2 + 8002934: d113 bne.n 800295e + { + /* USER CODE BEGIN TIM3_MspInit 0 */ + + /* USER CODE END TIM3_MspInit 0 */ + /* TIM3 clock enable */ + __HAL_RCC_TIM3_CLK_ENABLE(); + 8002936: 4b0d ldr r3, [pc, #52] @ (800296c ) + 8002938: 69db ldr r3, [r3, #28] + 800293a: 4a0c ldr r2, [pc, #48] @ (800296c ) + 800293c: f043 0302 orr.w r3, r3, #2 + 8002940: 61d3 str r3, [r2, #28] + 8002942: 4b0a ldr r3, [pc, #40] @ (800296c ) + 8002944: 69db ldr r3, [r3, #28] + 8002946: f003 0302 and.w r3, r3, #2 + 800294a: 60fb str r3, [r7, #12] + 800294c: 68fb ldr r3, [r7, #12] + + /* TIM3 interrupt Init */ + HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0); + 800294e: 2200 movs r2, #0 + 8002950: 2100 movs r1, #0 + 8002952: 201d movs r0, #29 + 8002954: f000 fc1f bl 8003196 + HAL_NVIC_EnableIRQ(TIM3_IRQn); + 8002958: 201d movs r0, #29 + 800295a: f000 fc38 bl 80031ce + /* USER CODE BEGIN TIM3_MspInit 1 */ + + /* USER CODE END TIM3_MspInit 1 */ + } +} + 800295e: bf00 nop + 8002960: 3710 adds r7, #16 + 8002962: 46bd mov sp, r7 + 8002964: bd80 pop {r7, pc} + 8002966: bf00 nop + 8002968: 40000400 .word 0x40000400 + 800296c: 40021000 .word 0x40021000 + +08002970 : UART_HandleTypeDef huart1; /* USART1 init function */ void MX_USART1_UART_Init(void) { - 8002cf0: b580 push {r7, lr} - 8002cf2: af00 add r7, sp, #0 + 8002970: b580 push {r7, lr} + 8002972: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; - 8002cf4: 4b11 ldr r3, [pc, #68] @ (8002d3c ) - 8002cf6: 4a12 ldr r2, [pc, #72] @ (8002d40 ) - 8002cf8: 601a str r2, [r3, #0] + 8002974: 4b11 ldr r3, [pc, #68] @ (80029bc ) + 8002976: 4a12 ldr r2, [pc, #72] @ (80029c0 ) + 8002978: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; - 8002cfa: 4b10 ldr r3, [pc, #64] @ (8002d3c ) - 8002cfc: f44f 32e1 mov.w r2, #115200 @ 0x1c200 - 8002d00: 605a str r2, [r3, #4] + 800297a: 4b10 ldr r3, [pc, #64] @ (80029bc ) + 800297c: f44f 32e1 mov.w r2, #115200 @ 0x1c200 + 8002980: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8002d02: 4b0e ldr r3, [pc, #56] @ (8002d3c ) - 8002d04: 2200 movs r2, #0 - 8002d06: 609a str r2, [r3, #8] + 8002982: 4b0e ldr r3, [pc, #56] @ (80029bc ) + 8002984: 2200 movs r2, #0 + 8002986: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 8002d08: 4b0c ldr r3, [pc, #48] @ (8002d3c ) - 8002d0a: 2200 movs r2, #0 - 8002d0c: 60da str r2, [r3, #12] + 8002988: 4b0c ldr r3, [pc, #48] @ (80029bc ) + 800298a: 2200 movs r2, #0 + 800298c: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 8002d0e: 4b0b ldr r3, [pc, #44] @ (8002d3c ) - 8002d10: 2200 movs r2, #0 - 8002d12: 611a str r2, [r3, #16] + 800298e: 4b0b ldr r3, [pc, #44] @ (80029bc ) + 8002990: 2200 movs r2, #0 + 8002992: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 8002d14: 4b09 ldr r3, [pc, #36] @ (8002d3c ) - 8002d16: 220c movs r2, #12 - 8002d18: 615a str r2, [r3, #20] + 8002994: 4b09 ldr r3, [pc, #36] @ (80029bc ) + 8002996: 220c movs r2, #12 + 8002998: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8002d1a: 4b08 ldr r3, [pc, #32] @ (8002d3c ) - 8002d1c: 2200 movs r2, #0 - 8002d1e: 619a str r2, [r3, #24] + 800299a: 4b08 ldr r3, [pc, #32] @ (80029bc ) + 800299c: 2200 movs r2, #0 + 800299e: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8002d20: 4b06 ldr r3, [pc, #24] @ (8002d3c ) - 8002d22: 2200 movs r2, #0 - 8002d24: 61da str r2, [r3, #28] + 80029a0: 4b06 ldr r3, [pc, #24] @ (80029bc ) + 80029a2: 2200 movs r2, #0 + 80029a4: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) - 8002d26: 4805 ldr r0, [pc, #20] @ (8002d3c ) - 8002d28: f002 fda6 bl 8005878 - 8002d2c: 4603 mov r3, r0 - 8002d2e: 2b00 cmp r3, #0 - 8002d30: d001 beq.n 8002d36 + 80029a6: 4805 ldr r0, [pc, #20] @ (80029bc ) + 80029a8: f002 ff98 bl 80058dc + 80029ac: 4603 mov r3, r0 + 80029ae: 2b00 cmp r3, #0 + 80029b0: d001 beq.n 80029b6 { Error_Handler(); - 8002d32: f7ff fe75 bl 8002a20 + 80029b2: f7ff fdf7 bl 80025a4 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } - 8002d36: bf00 nop - 8002d38: bd80 pop {r7, pc} - 8002d3a: bf00 nop - 8002d3c: 2000071c .word 0x2000071c - 8002d40: 40013800 .word 0x40013800 + 80029b6: bf00 nop + 80029b8: bd80 pop {r7, pc} + 80029ba: bf00 nop + 80029bc: 200007c8 .word 0x200007c8 + 80029c0: 40013800 .word 0x40013800 -08002d44 : +080029c4 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { - 8002d44: b580 push {r7, lr} - 8002d46: b088 sub sp, #32 - 8002d48: af00 add r7, sp, #0 - 8002d4a: 6078 str r0, [r7, #4] + 80029c4: b580 push {r7, lr} + 80029c6: b088 sub sp, #32 + 80029c8: af00 add r7, sp, #0 + 80029ca: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002d4c: f107 0310 add.w r3, r7, #16 - 8002d50: 2200 movs r2, #0 - 8002d52: 601a str r2, [r3, #0] - 8002d54: 605a str r2, [r3, #4] - 8002d56: 609a str r2, [r3, #8] - 8002d58: 60da str r2, [r3, #12] + 80029cc: f107 0310 add.w r3, r7, #16 + 80029d0: 2200 movs r2, #0 + 80029d2: 601a str r2, [r3, #0] + 80029d4: 605a str r2, [r3, #4] + 80029d6: 609a str r2, [r3, #8] + 80029d8: 60da str r2, [r3, #12] if(uartHandle->Instance==USART1) - 8002d5a: 687b ldr r3, [r7, #4] - 8002d5c: 681b ldr r3, [r3, #0] - 8002d5e: 4a20 ldr r2, [pc, #128] @ (8002de0 ) - 8002d60: 4293 cmp r3, r2 - 8002d62: d139 bne.n 8002dd8 + 80029da: 687b ldr r3, [r7, #4] + 80029dc: 681b ldr r3, [r3, #0] + 80029de: 4a20 ldr r2, [pc, #128] @ (8002a60 ) + 80029e0: 4293 cmp r3, r2 + 80029e2: d139 bne.n 8002a58 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* USART1 clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); - 8002d64: 4b1f ldr r3, [pc, #124] @ (8002de4 ) - 8002d66: 699b ldr r3, [r3, #24] - 8002d68: 4a1e ldr r2, [pc, #120] @ (8002de4 ) - 8002d6a: f443 4380 orr.w r3, r3, #16384 @ 0x4000 - 8002d6e: 6193 str r3, [r2, #24] - 8002d70: 4b1c ldr r3, [pc, #112] @ (8002de4 ) - 8002d72: 699b ldr r3, [r3, #24] - 8002d74: f403 4380 and.w r3, r3, #16384 @ 0x4000 - 8002d78: 60fb str r3, [r7, #12] - 8002d7a: 68fb ldr r3, [r7, #12] + 80029e4: 4b1f ldr r3, [pc, #124] @ (8002a64 ) + 80029e6: 699b ldr r3, [r3, #24] + 80029e8: 4a1e ldr r2, [pc, #120] @ (8002a64 ) + 80029ea: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 80029ee: 6193 str r3, [r2, #24] + 80029f0: 4b1c ldr r3, [pc, #112] @ (8002a64 ) + 80029f2: 699b ldr r3, [r3, #24] + 80029f4: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 80029f8: 60fb str r3, [r7, #12] + 80029fa: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002d7c: 4b19 ldr r3, [pc, #100] @ (8002de4 ) - 8002d7e: 699b ldr r3, [r3, #24] - 8002d80: 4a18 ldr r2, [pc, #96] @ (8002de4 ) - 8002d82: f043 0304 orr.w r3, r3, #4 - 8002d86: 6193 str r3, [r2, #24] - 8002d88: 4b16 ldr r3, [pc, #88] @ (8002de4 ) - 8002d8a: 699b ldr r3, [r3, #24] - 8002d8c: f003 0304 and.w r3, r3, #4 - 8002d90: 60bb str r3, [r7, #8] - 8002d92: 68bb ldr r3, [r7, #8] + 80029fc: 4b19 ldr r3, [pc, #100] @ (8002a64 ) + 80029fe: 699b ldr r3, [r3, #24] + 8002a00: 4a18 ldr r2, [pc, #96] @ (8002a64 ) + 8002a02: f043 0304 orr.w r3, r3, #4 + 8002a06: 6193 str r3, [r2, #24] + 8002a08: 4b16 ldr r3, [pc, #88] @ (8002a64 ) + 8002a0a: 699b ldr r3, [r3, #24] + 8002a0c: f003 0304 and.w r3, r3, #4 + 8002a10: 60bb str r3, [r7, #8] + 8002a12: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = TX_RS485_Pin; - 8002d94: f44f 7300 mov.w r3, #512 @ 0x200 - 8002d98: 613b str r3, [r7, #16] + 8002a14: f44f 7300 mov.w r3, #512 @ 0x200 + 8002a18: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002d9a: 2302 movs r3, #2 - 8002d9c: 617b str r3, [r7, #20] + 8002a1a: 2302 movs r3, #2 + 8002a1c: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; - 8002d9e: 2301 movs r3, #1 - 8002da0: 61fb str r3, [r7, #28] + 8002a1e: 2301 movs r3, #1 + 8002a20: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_RS485_GPIO_Port, &GPIO_InitStruct); - 8002da2: f107 0310 add.w r3, r7, #16 - 8002da6: 4619 mov r1, r3 - 8002da8: 480f ldr r0, [pc, #60] @ (8002de8 ) - 8002daa: f000 fe9d bl 8003ae8 + 8002a22: f107 0310 add.w r3, r7, #16 + 8002a26: 4619 mov r1, r3 + 8002a28: 480f ldr r0, [pc, #60] @ (8002a68 ) + 8002a2a: f000 fc9d bl 8003368 GPIO_InitStruct.Pin = RX_RS485_Pin; - 8002dae: f44f 6380 mov.w r3, #1024 @ 0x400 - 8002db2: 613b str r3, [r7, #16] + 8002a2e: f44f 6380 mov.w r3, #1024 @ 0x400 + 8002a32: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002db4: 2300 movs r3, #0 - 8002db6: 617b str r3, [r7, #20] + 8002a34: 2300 movs r3, #0 + 8002a36: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002db8: 2300 movs r3, #0 - 8002dba: 61bb str r3, [r7, #24] + 8002a38: 2300 movs r3, #0 + 8002a3a: 61bb str r3, [r7, #24] HAL_GPIO_Init(RX_RS485_GPIO_Port, &GPIO_InitStruct); - 8002dbc: f107 0310 add.w r3, r7, #16 - 8002dc0: 4619 mov r1, r3 - 8002dc2: 4809 ldr r0, [pc, #36] @ (8002de8 ) - 8002dc4: f000 fe90 bl 8003ae8 + 8002a3c: f107 0310 add.w r3, r7, #16 + 8002a40: 4619 mov r1, r3 + 8002a42: 4809 ldr r0, [pc, #36] @ (8002a68 ) + 8002a44: f000 fc90 bl 8003368 /* USART1 interrupt Init */ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); - 8002dc8: 2200 movs r2, #0 - 8002dca: 2100 movs r1, #0 - 8002dcc: 2025 movs r0, #37 @ 0x25 - 8002dce: f000 fba2 bl 8003516 + 8002a48: 2200 movs r2, #0 + 8002a4a: 2100 movs r1, #0 + 8002a4c: 2025 movs r0, #37 @ 0x25 + 8002a4e: f000 fba2 bl 8003196 HAL_NVIC_EnableIRQ(USART1_IRQn); - 8002dd2: 2025 movs r0, #37 @ 0x25 - 8002dd4: f000 fbbb bl 800354e + 8002a52: 2025 movs r0, #37 @ 0x25 + 8002a54: f000 fbbb bl 80031ce /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } - 8002dd8: bf00 nop - 8002dda: 3720 adds r7, #32 - 8002ddc: 46bd mov sp, r7 - 8002dde: bd80 pop {r7, pc} - 8002de0: 40013800 .word 0x40013800 - 8002de4: 40021000 .word 0x40021000 - 8002de8: 40010800 .word 0x40010800 + 8002a58: bf00 nop + 8002a5a: 3720 adds r7, #32 + 8002a5c: 46bd mov sp, r7 + 8002a5e: bd80 pop {r7, pc} + 8002a60: 40013800 .word 0x40013800 + 8002a64: 40021000 .word 0x40021000 + 8002a68: 40010800 .word 0x40010800 -08002dec : +08002a6c : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit - 8002dec: f7ff ff7a bl 8002ce4 + 8002a6c: f7ff ff06 bl 800287c /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8002df0: 480b ldr r0, [pc, #44] @ (8002e20 ) + 8002a70: 480b ldr r0, [pc, #44] @ (8002aa0 ) ldr r1, =_edata - 8002df2: 490c ldr r1, [pc, #48] @ (8002e24 ) + 8002a72: 490c ldr r1, [pc, #48] @ (8002aa4 ) ldr r2, =_sidata - 8002df4: 4a0c ldr r2, [pc, #48] @ (8002e28 ) + 8002a74: 4a0c ldr r2, [pc, #48] @ (8002aa8 ) movs r3, #0 - 8002df6: 2300 movs r3, #0 + 8002a76: 2300 movs r3, #0 b LoopCopyDataInit - 8002df8: e002 b.n 8002e00 + 8002a78: e002 b.n 8002a80 -08002dfa : +08002a7a : CopyDataInit: ldr r4, [r2, r3] - 8002dfa: 58d4 ldr r4, [r2, r3] + 8002a7a: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 8002dfc: 50c4 str r4, [r0, r3] + 8002a7c: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 8002dfe: 3304 adds r3, #4 + 8002a7e: 3304 adds r3, #4 -08002e00 : +08002a80 : LoopCopyDataInit: adds r4, r0, r3 - 8002e00: 18c4 adds r4, r0, r3 + 8002a80: 18c4 adds r4, r0, r3 cmp r4, r1 - 8002e02: 428c cmp r4, r1 + 8002a82: 428c cmp r4, r1 bcc CopyDataInit - 8002e04: d3f9 bcc.n 8002dfa + 8002a84: d3f9 bcc.n 8002a7a /* Zero fill the bss segment. */ ldr r2, =_sbss - 8002e06: 4a09 ldr r2, [pc, #36] @ (8002e2c ) + 8002a86: 4a09 ldr r2, [pc, #36] @ (8002aac ) ldr r4, =_ebss - 8002e08: 4c09 ldr r4, [pc, #36] @ (8002e30 ) + 8002a88: 4c09 ldr r4, [pc, #36] @ (8002ab0 ) movs r3, #0 - 8002e0a: 2300 movs r3, #0 + 8002a8a: 2300 movs r3, #0 b LoopFillZerobss - 8002e0c: e001 b.n 8002e12 + 8002a8c: e001 b.n 8002a92 -08002e0e : +08002a8e : FillZerobss: str r3, [r2] - 8002e0e: 6013 str r3, [r2, #0] + 8002a8e: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8002e10: 3204 adds r2, #4 + 8002a90: 3204 adds r2, #4 -08002e12 : +08002a92 : LoopFillZerobss: cmp r2, r4 - 8002e12: 42a2 cmp r2, r4 + 8002a92: 42a2 cmp r2, r4 bcc FillZerobss - 8002e14: d3fb bcc.n 8002e0e + 8002a94: d3fb bcc.n 8002a8e /* Call static constructors */ bl __libc_init_array - 8002e16: f003 fb53 bl 80064c0 <__libc_init_array> + 8002a96: f003 fd45 bl 8006524 <__libc_init_array> /* Call the application's entry point.*/ bl main - 8002e1a: f7ff fa4d bl 80022b8
+ 8002a9a: f7ff faa9 bl 8001ff0
bx lr - 8002e1e: 4770 bx lr + 8002a9e: 4770 bx lr ldr r0, =_sdata - 8002e20: 20000000 .word 0x20000000 + 8002aa0: 20000000 .word 0x20000000 ldr r1, =_edata - 8002e24: 20000090 .word 0x20000090 + 8002aa4: 20000094 .word 0x20000094 ldr r2, =_sidata - 8002e28: 08006828 .word 0x08006828 + 8002aa8: 08006754 .word 0x08006754 ldr r2, =_sbss - 8002e2c: 20000090 .word 0x20000090 + 8002aac: 20000094 .word 0x20000094 ldr r4, =_ebss - 8002e30: 200008c0 .word 0x200008c0 + 8002ab0: 2000094c .word 0x2000094c -08002e34 : +08002ab4 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8002e34: e7fe b.n 8002e34 + 8002ab4: e7fe b.n 8002ab4 ... -08002e38 : +08002ab8 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8002e38: b580 push {r7, lr} - 8002e3a: af00 add r7, sp, #0 + 8002ab8: b580 push {r7, lr} + 8002aba: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 8002e3c: 4b08 ldr r3, [pc, #32] @ (8002e60 ) - 8002e3e: 681b ldr r3, [r3, #0] - 8002e40: 4a07 ldr r2, [pc, #28] @ (8002e60 ) - 8002e42: f043 0310 orr.w r3, r3, #16 - 8002e46: 6013 str r3, [r2, #0] + 8002abc: 4b08 ldr r3, [pc, #32] @ (8002ae0 ) + 8002abe: 681b ldr r3, [r3, #0] + 8002ac0: 4a07 ldr r2, [pc, #28] @ (8002ae0 ) + 8002ac2: f043 0310 orr.w r3, r3, #16 + 8002ac6: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 8002e48: 2003 movs r0, #3 - 8002e4a: f000 fb59 bl 8003500 + 8002ac8: 2003 movs r0, #3 + 8002aca: f000 fb59 bl 8003180 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); - 8002e4e: 200f movs r0, #15 - 8002e50: f000 f808 bl 8002e64 + 8002ace: 200f movs r0, #15 + 8002ad0: f000 f808 bl 8002ae4 /* Init the low level hardware */ HAL_MspInit(); - 8002e54: f7ff fede bl 8002c14 + 8002ad4: f7ff fe60 bl 8002798 /* Return function status */ return HAL_OK; - 8002e58: 2300 movs r3, #0 + 8002ad8: 2300 movs r3, #0 } - 8002e5a: 4618 mov r0, r3 - 8002e5c: bd80 pop {r7, pc} - 8002e5e: bf00 nop - 8002e60: 40022000 .word 0x40022000 + 8002ada: 4618 mov r0, r3 + 8002adc: bd80 pop {r7, pc} + 8002ade: bf00 nop + 8002ae0: 40022000 .word 0x40022000 -08002e64 : +08002ae4 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8002e64: b580 push {r7, lr} - 8002e66: b082 sub sp, #8 - 8002e68: af00 add r7, sp, #0 - 8002e6a: 6078 str r0, [r7, #4] + 8002ae4: b580 push {r7, lr} + 8002ae6: b082 sub sp, #8 + 8002ae8: af00 add r7, sp, #0 + 8002aea: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 8002e6c: 4b12 ldr r3, [pc, #72] @ (8002eb8 ) - 8002e6e: 681a ldr r2, [r3, #0] - 8002e70: 4b12 ldr r3, [pc, #72] @ (8002ebc ) - 8002e72: 781b ldrb r3, [r3, #0] - 8002e74: 4619 mov r1, r3 - 8002e76: f44f 737a mov.w r3, #1000 @ 0x3e8 - 8002e7a: fbb3 f3f1 udiv r3, r3, r1 - 8002e7e: fbb2 f3f3 udiv r3, r2, r3 - 8002e82: 4618 mov r0, r3 - 8002e84: f000 fb71 bl 800356a - 8002e88: 4603 mov r3, r0 - 8002e8a: 2b00 cmp r3, #0 - 8002e8c: d001 beq.n 8002e92 + 8002aec: 4b12 ldr r3, [pc, #72] @ (8002b38 ) + 8002aee: 681a ldr r2, [r3, #0] + 8002af0: 4b12 ldr r3, [pc, #72] @ (8002b3c ) + 8002af2: 781b ldrb r3, [r3, #0] + 8002af4: 4619 mov r1, r3 + 8002af6: f44f 737a mov.w r3, #1000 @ 0x3e8 + 8002afa: fbb3 f3f1 udiv r3, r3, r1 + 8002afe: fbb2 f3f3 udiv r3, r2, r3 + 8002b02: 4618 mov r0, r3 + 8002b04: f000 fb71 bl 80031ea + 8002b08: 4603 mov r3, r0 + 8002b0a: 2b00 cmp r3, #0 + 8002b0c: d001 beq.n 8002b12 { return HAL_ERROR; - 8002e8e: 2301 movs r3, #1 - 8002e90: e00e b.n 8002eb0 + 8002b0e: 2301 movs r3, #1 + 8002b10: e00e b.n 8002b30 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8002e92: 687b ldr r3, [r7, #4] - 8002e94: 2b0f cmp r3, #15 - 8002e96: d80a bhi.n 8002eae + 8002b12: 687b ldr r3, [r7, #4] + 8002b14: 2b0f cmp r3, #15 + 8002b16: d80a bhi.n 8002b2e { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8002e98: 2200 movs r2, #0 - 8002e9a: 6879 ldr r1, [r7, #4] - 8002e9c: f04f 30ff mov.w r0, #4294967295 - 8002ea0: f000 fb39 bl 8003516 + 8002b18: 2200 movs r2, #0 + 8002b1a: 6879 ldr r1, [r7, #4] + 8002b1c: f04f 30ff mov.w r0, #4294967295 + 8002b20: f000 fb39 bl 8003196 uwTickPrio = TickPriority; - 8002ea4: 4a06 ldr r2, [pc, #24] @ (8002ec0 ) - 8002ea6: 687b ldr r3, [r7, #4] - 8002ea8: 6013 str r3, [r2, #0] + 8002b24: 4a06 ldr r2, [pc, #24] @ (8002b40 ) + 8002b26: 687b ldr r3, [r7, #4] + 8002b28: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 8002eaa: 2300 movs r3, #0 - 8002eac: e000 b.n 8002eb0 + 8002b2a: 2300 movs r3, #0 + 8002b2c: e000 b.n 8002b30 return HAL_ERROR; - 8002eae: 2301 movs r3, #1 + 8002b2e: 2301 movs r3, #1 } - 8002eb0: 4618 mov r0, r3 - 8002eb2: 3708 adds r7, #8 - 8002eb4: 46bd mov sp, r7 - 8002eb6: bd80 pop {r7, pc} - 8002eb8: 20000034 .word 0x20000034 - 8002ebc: 2000003c .word 0x2000003c - 8002ec0: 20000038 .word 0x20000038 + 8002b30: 4618 mov r0, r3 + 8002b32: 3708 adds r7, #8 + 8002b34: 46bd mov sp, r7 + 8002b36: bd80 pop {r7, pc} + 8002b38: 20000038 .word 0x20000038 + 8002b3c: 20000040 .word 0x20000040 + 8002b40: 2000003c .word 0x2000003c -08002ec4 : +08002b44 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8002ec4: b480 push {r7} - 8002ec6: af00 add r7, sp, #0 + 8002b44: b480 push {r7} + 8002b46: af00 add r7, sp, #0 uwTick += uwTickFreq; - 8002ec8: 4b05 ldr r3, [pc, #20] @ (8002ee0 ) - 8002eca: 781b ldrb r3, [r3, #0] - 8002ecc: 461a mov r2, r3 - 8002ece: 4b05 ldr r3, [pc, #20] @ (8002ee4 ) - 8002ed0: 681b ldr r3, [r3, #0] - 8002ed2: 4413 add r3, r2 - 8002ed4: 4a03 ldr r2, [pc, #12] @ (8002ee4 ) - 8002ed6: 6013 str r3, [r2, #0] + 8002b48: 4b05 ldr r3, [pc, #20] @ (8002b60 ) + 8002b4a: 781b ldrb r3, [r3, #0] + 8002b4c: 461a mov r2, r3 + 8002b4e: 4b05 ldr r3, [pc, #20] @ (8002b64 ) + 8002b50: 681b ldr r3, [r3, #0] + 8002b52: 4413 add r3, r2 + 8002b54: 4a03 ldr r2, [pc, #12] @ (8002b64 ) + 8002b56: 6013 str r3, [r2, #0] } - 8002ed8: bf00 nop - 8002eda: 46bd mov sp, r7 - 8002edc: bc80 pop {r7} - 8002ede: 4770 bx lr - 8002ee0: 2000003c .word 0x2000003c - 8002ee4: 20000764 .word 0x20000764 + 8002b58: bf00 nop + 8002b5a: 46bd mov sp, r7 + 8002b5c: bc80 pop {r7} + 8002b5e: 4770 bx lr + 8002b60: 20000040 .word 0x20000040 + 8002b64: 20000810 .word 0x20000810 -08002ee8 : +08002b68 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8002ee8: b480 push {r7} - 8002eea: af00 add r7, sp, #0 + 8002b68: b480 push {r7} + 8002b6a: af00 add r7, sp, #0 return uwTick; - 8002eec: 4b02 ldr r3, [pc, #8] @ (8002ef8 ) - 8002eee: 681b ldr r3, [r3, #0] + 8002b6c: 4b02 ldr r3, [pc, #8] @ (8002b78 ) + 8002b6e: 681b ldr r3, [r3, #0] } - 8002ef0: 4618 mov r0, r3 - 8002ef2: 46bd mov sp, r7 - 8002ef4: bc80 pop {r7} - 8002ef6: 4770 bx lr - 8002ef8: 20000764 .word 0x20000764 + 8002b70: 4618 mov r0, r3 + 8002b72: 46bd mov sp, r7 + 8002b74: bc80 pop {r7} + 8002b76: 4770 bx lr + 8002b78: 20000810 .word 0x20000810 -08002efc : +08002b7c : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 8002efc: b580 push {r7, lr} - 8002efe: b084 sub sp, #16 - 8002f00: af00 add r7, sp, #0 - 8002f02: 6078 str r0, [r7, #4] + 8002b7c: b580 push {r7, lr} + 8002b7e: b084 sub sp, #16 + 8002b80: af00 add r7, sp, #0 + 8002b82: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 8002f04: f7ff fff0 bl 8002ee8 - 8002f08: 60b8 str r0, [r7, #8] + 8002b84: f7ff fff0 bl 8002b68 + 8002b88: 60b8 str r0, [r7, #8] uint32_t wait = Delay; - 8002f0a: 687b ldr r3, [r7, #4] - 8002f0c: 60fb str r3, [r7, #12] + 8002b8a: 687b ldr r3, [r7, #4] + 8002b8c: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 8002f0e: 68fb ldr r3, [r7, #12] - 8002f10: f1b3 3fff cmp.w r3, #4294967295 - 8002f14: d005 beq.n 8002f22 + 8002b8e: 68fb ldr r3, [r7, #12] + 8002b90: f1b3 3fff cmp.w r3, #4294967295 + 8002b94: d005 beq.n 8002ba2 { wait += (uint32_t)(uwTickFreq); - 8002f16: 4b0a ldr r3, [pc, #40] @ (8002f40 ) - 8002f18: 781b ldrb r3, [r3, #0] - 8002f1a: 461a mov r2, r3 - 8002f1c: 68fb ldr r3, [r7, #12] - 8002f1e: 4413 add r3, r2 - 8002f20: 60fb str r3, [r7, #12] + 8002b96: 4b0a ldr r3, [pc, #40] @ (8002bc0 ) + 8002b98: 781b ldrb r3, [r3, #0] + 8002b9a: 461a mov r2, r3 + 8002b9c: 68fb ldr r3, [r7, #12] + 8002b9e: 4413 add r3, r2 + 8002ba0: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) - 8002f22: bf00 nop - 8002f24: f7ff ffe0 bl 8002ee8 - 8002f28: 4602 mov r2, r0 - 8002f2a: 68bb ldr r3, [r7, #8] - 8002f2c: 1ad3 subs r3, r2, r3 - 8002f2e: 68fa ldr r2, [r7, #12] - 8002f30: 429a cmp r2, r3 - 8002f32: d8f7 bhi.n 8002f24 + 8002ba2: bf00 nop + 8002ba4: f7ff ffe0 bl 8002b68 + 8002ba8: 4602 mov r2, r0 + 8002baa: 68bb ldr r3, [r7, #8] + 8002bac: 1ad3 subs r3, r2, r3 + 8002bae: 68fa ldr r2, [r7, #12] + 8002bb0: 429a cmp r2, r3 + 8002bb2: d8f7 bhi.n 8002ba4 { } } - 8002f34: bf00 nop - 8002f36: bf00 nop - 8002f38: 3710 adds r7, #16 - 8002f3a: 46bd mov sp, r7 - 8002f3c: bd80 pop {r7, pc} - 8002f3e: bf00 nop - 8002f40: 2000003c .word 0x2000003c + 8002bb4: bf00 nop + 8002bb6: bf00 nop + 8002bb8: 3710 adds r7, #16 + 8002bba: 46bd mov sp, r7 + 8002bbc: bd80 pop {r7, pc} + 8002bbe: bf00 nop + 8002bc0: 20000040 .word 0x20000040 -08002f44 : +08002bc4 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { - 8002f44: b580 push {r7, lr} - 8002f46: b086 sub sp, #24 - 8002f48: af00 add r7, sp, #0 - 8002f4a: 6078 str r0, [r7, #4] + 8002bc4: b580 push {r7, lr} + 8002bc6: b086 sub sp, #24 + 8002bc8: af00 add r7, sp, #0 + 8002bca: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8002f4c: 2300 movs r3, #0 - 8002f4e: 75fb strb r3, [r7, #23] + 8002bcc: 2300 movs r3, #0 + 8002bce: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; - 8002f50: 2300 movs r3, #0 - 8002f52: 613b str r3, [r7, #16] + 8002bd0: 2300 movs r3, #0 + 8002bd2: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; - 8002f54: 2300 movs r3, #0 - 8002f56: 60bb str r3, [r7, #8] + 8002bd4: 2300 movs r3, #0 + 8002bd6: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; - 8002f58: 2300 movs r3, #0 - 8002f5a: 60fb str r3, [r7, #12] + 8002bd8: 2300 movs r3, #0 + 8002bda: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) - 8002f5c: 687b ldr r3, [r7, #4] - 8002f5e: 2b00 cmp r3, #0 - 8002f60: d101 bne.n 8002f66 + 8002bdc: 687b ldr r3, [r7, #4] + 8002bde: 2b00 cmp r3, #0 + 8002be0: d101 bne.n 8002be6 { return HAL_ERROR; - 8002f62: 2301 movs r3, #1 - 8002f64: e0be b.n 80030e4 + 8002be2: 2301 movs r3, #1 + 8002be4: e0be b.n 8002d64 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) - 8002f66: 687b ldr r3, [r7, #4] - 8002f68: 689b ldr r3, [r3, #8] - 8002f6a: 2b00 cmp r3, #0 + 8002be6: 687b ldr r3, [r7, #4] + 8002be8: 689b ldr r3, [r3, #8] + 8002bea: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) - 8002f6c: 687b ldr r3, [r7, #4] - 8002f6e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002f70: 2b00 cmp r3, #0 - 8002f72: d109 bne.n 8002f88 + 8002bec: 687b ldr r3, [r7, #4] + 8002bee: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002bf0: 2b00 cmp r3, #0 + 8002bf2: d109 bne.n 8002c08 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); - 8002f74: 687b ldr r3, [r7, #4] - 8002f76: 2200 movs r2, #0 - 8002f78: 62da str r2, [r3, #44] @ 0x2c + 8002bf4: 687b ldr r3, [r7, #4] + 8002bf6: 2200 movs r2, #0 + 8002bf8: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; - 8002f7a: 687b ldr r3, [r7, #4] - 8002f7c: 2200 movs r2, #0 - 8002f7e: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 8002bfa: 687b ldr r3, [r7, #4] + 8002bfc: 2200 movs r2, #0 + 8002bfe: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); - 8002f82: 6878 ldr r0, [r7, #4] - 8002f84: f7fe fce4 bl 8001950 + 8002c02: 6878 ldr r0, [r7, #4] + 8002c04: f7fe fd70 bl 80016e8 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); - 8002f88: 6878 ldr r0, [r7, #4] - 8002f8a: f000 f9ab bl 80032e4 - 8002f8e: 4603 mov r3, r0 - 8002f90: 75fb strb r3, [r7, #23] + 8002c08: 6878 ldr r0, [r7, #4] + 8002c0a: f000 f9ab bl 8002f64 + 8002c0e: 4603 mov r3, r0 + 8002c10: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && - 8002f92: 687b ldr r3, [r7, #4] - 8002f94: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002f96: f003 0310 and.w r3, r3, #16 - 8002f9a: 2b00 cmp r3, #0 - 8002f9c: f040 8099 bne.w 80030d2 - 8002fa0: 7dfb ldrb r3, [r7, #23] - 8002fa2: 2b00 cmp r3, #0 - 8002fa4: f040 8095 bne.w 80030d2 + 8002c12: 687b ldr r3, [r7, #4] + 8002c14: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002c16: f003 0310 and.w r3, r3, #16 + 8002c1a: 2b00 cmp r3, #0 + 8002c1c: f040 8099 bne.w 8002d52 + 8002c20: 7dfb ldrb r3, [r7, #23] + 8002c22: 2b00 cmp r3, #0 + 8002c24: f040 8095 bne.w 8002d52 (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8002fa8: 687b ldr r3, [r7, #4] - 8002faa: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002fac: f423 5388 bic.w r3, r3, #4352 @ 0x1100 - 8002fb0: f023 0302 bic.w r3, r3, #2 - 8002fb4: f043 0202 orr.w r2, r3, #2 - 8002fb8: 687b ldr r3, [r7, #4] - 8002fba: 629a str r2, [r3, #40] @ 0x28 + 8002c28: 687b ldr r3, [r7, #4] + 8002c2a: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002c2c: f423 5388 bic.w r3, r3, #4352 @ 0x1100 + 8002c30: f023 0302 bic.w r3, r3, #2 + 8002c34: f043 0202 orr.w r2, r3, #2 + 8002c38: 687b ldr r3, [r7, #4] + 8002c3a: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | - 8002fbc: 687b ldr r3, [r7, #4] - 8002fbe: 685a ldr r2, [r3, #4] + 8002c3c: 687b ldr r3, [r7, #4] + 8002c3e: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | - 8002fc0: 687b ldr r3, [r7, #4] - 8002fc2: 69db ldr r3, [r3, #28] + 8002c40: 687b ldr r3, [r7, #4] + 8002c42: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | - 8002fc4: 431a orrs r2, r3 + 8002c44: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); - 8002fc6: 687b ldr r3, [r7, #4] - 8002fc8: 7b1b ldrb r3, [r3, #12] - 8002fca: 005b lsls r3, r3, #1 + 8002c46: 687b ldr r3, [r7, #4] + 8002c48: 7b1b ldrb r3, [r3, #12] + 8002c4a: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | - 8002fcc: 4313 orrs r3, r2 + 8002c4c: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | - 8002fce: 68ba ldr r2, [r7, #8] - 8002fd0: 4313 orrs r3, r2 - 8002fd2: 60bb str r3, [r7, #8] + 8002c4e: 68ba ldr r2, [r7, #8] + 8002c50: 4313 orrs r3, r2 + 8002c52: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); - 8002fd4: 687b ldr r3, [r7, #4] - 8002fd6: 689b ldr r3, [r3, #8] - 8002fd8: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8002fdc: d003 beq.n 8002fe6 - 8002fde: 687b ldr r3, [r7, #4] - 8002fe0: 689b ldr r3, [r3, #8] - 8002fe2: 2b01 cmp r3, #1 - 8002fe4: d102 bne.n 8002fec - 8002fe6: f44f 7380 mov.w r3, #256 @ 0x100 - 8002fea: e000 b.n 8002fee - 8002fec: 2300 movs r3, #0 - 8002fee: 693a ldr r2, [r7, #16] - 8002ff0: 4313 orrs r3, r2 - 8002ff2: 613b str r3, [r7, #16] + 8002c54: 687b ldr r3, [r7, #4] + 8002c56: 689b ldr r3, [r3, #8] + 8002c58: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8002c5c: d003 beq.n 8002c66 + 8002c5e: 687b ldr r3, [r7, #4] + 8002c60: 689b ldr r3, [r3, #8] + 8002c62: 2b01 cmp r3, #1 + 8002c64: d102 bne.n 8002c6c + 8002c66: f44f 7380 mov.w r3, #256 @ 0x100 + 8002c6a: e000 b.n 8002c6e + 8002c6c: 2300 movs r3, #0 + 8002c6e: 693a ldr r2, [r7, #16] + 8002c70: 4313 orrs r3, r2 + 8002c72: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) - 8002ff4: 687b ldr r3, [r7, #4] - 8002ff6: 7d1b ldrb r3, [r3, #20] - 8002ff8: 2b01 cmp r3, #1 - 8002ffa: d119 bne.n 8003030 + 8002c74: 687b ldr r3, [r7, #4] + 8002c76: 7d1b ldrb r3, [r3, #20] + 8002c78: 2b01 cmp r3, #1 + 8002c7a: d119 bne.n 8002cb0 { if (hadc->Init.ContinuousConvMode == DISABLE) - 8002ffc: 687b ldr r3, [r7, #4] - 8002ffe: 7b1b ldrb r3, [r3, #12] - 8003000: 2b00 cmp r3, #0 - 8003002: d109 bne.n 8003018 + 8002c7c: 687b ldr r3, [r7, #4] + 8002c7e: 7b1b ldrb r3, [r3, #12] + 8002c80: 2b00 cmp r3, #0 + 8002c82: d109 bne.n 8002c98 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | - 8003004: 687b ldr r3, [r7, #4] - 8003006: 699b ldr r3, [r3, #24] - 8003008: 3b01 subs r3, #1 - 800300a: 035a lsls r2, r3, #13 - 800300c: 693b ldr r3, [r7, #16] - 800300e: 4313 orrs r3, r2 - 8003010: f443 6300 orr.w r3, r3, #2048 @ 0x800 - 8003014: 613b str r3, [r7, #16] - 8003016: e00b b.n 8003030 + 8002c84: 687b ldr r3, [r7, #4] + 8002c86: 699b ldr r3, [r3, #24] + 8002c88: 3b01 subs r3, #1 + 8002c8a: 035a lsls r2, r3, #13 + 8002c8c: 693b ldr r3, [r7, #16] + 8002c8e: 4313 orrs r3, r2 + 8002c90: f443 6300 orr.w r3, r3, #2048 @ 0x800 + 8002c94: 613b str r3, [r7, #16] + 8002c96: e00b b.n 8002cb0 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8003018: 687b ldr r3, [r7, #4] - 800301a: 6a9b ldr r3, [r3, #40] @ 0x28 - 800301c: f043 0220 orr.w r2, r3, #32 - 8003020: 687b ldr r3, [r7, #4] - 8003022: 629a str r2, [r3, #40] @ 0x28 + 8002c98: 687b ldr r3, [r7, #4] + 8002c9a: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002c9c: f043 0220 orr.w r2, r3, #32 + 8002ca0: 687b ldr r3, [r7, #4] + 8002ca2: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8003024: 687b ldr r3, [r7, #4] - 8003026: 6adb ldr r3, [r3, #44] @ 0x2c - 8003028: f043 0201 orr.w r2, r3, #1 - 800302c: 687b ldr r3, [r7, #4] - 800302e: 62da str r2, [r3, #44] @ 0x2c + 8002ca4: 687b ldr r3, [r7, #4] + 8002ca6: 6adb ldr r3, [r3, #44] @ 0x2c + 8002ca8: f043 0201 orr.w r2, r3, #1 + 8002cac: 687b ldr r3, [r7, #4] + 8002cae: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, - 8003030: 687b ldr r3, [r7, #4] - 8003032: 681b ldr r3, [r3, #0] - 8003034: 685b ldr r3, [r3, #4] - 8003036: f423 4169 bic.w r1, r3, #59648 @ 0xe900 - 800303a: 687b ldr r3, [r7, #4] - 800303c: 681b ldr r3, [r3, #0] - 800303e: 693a ldr r2, [r7, #16] - 8003040: 430a orrs r2, r1 - 8003042: 605a str r2, [r3, #4] + 8002cb0: 687b ldr r3, [r7, #4] + 8002cb2: 681b ldr r3, [r3, #0] + 8002cb4: 685b ldr r3, [r3, #4] + 8002cb6: f423 4169 bic.w r1, r3, #59648 @ 0xe900 + 8002cba: 687b ldr r3, [r7, #4] + 8002cbc: 681b ldr r3, [r3, #0] + 8002cbe: 693a ldr r2, [r7, #16] + 8002cc0: 430a orrs r2, r1 + 8002cc2: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, - 8003044: 687b ldr r3, [r7, #4] - 8003046: 681b ldr r3, [r3, #0] - 8003048: 689a ldr r2, [r3, #8] - 800304a: 4b28 ldr r3, [pc, #160] @ (80030ec ) - 800304c: 4013 ands r3, r2 - 800304e: 687a ldr r2, [r7, #4] - 8003050: 6812 ldr r2, [r2, #0] - 8003052: 68b9 ldr r1, [r7, #8] - 8003054: 430b orrs r3, r1 - 8003056: 6093 str r3, [r2, #8] + 8002cc4: 687b ldr r3, [r7, #4] + 8002cc6: 681b ldr r3, [r3, #0] + 8002cc8: 689a ldr r2, [r3, #8] + 8002cca: 4b28 ldr r3, [pc, #160] @ (8002d6c ) + 8002ccc: 4013 ands r3, r2 + 8002cce: 687a ldr r2, [r7, #4] + 8002cd0: 6812 ldr r2, [r2, #0] + 8002cd2: 68b9 ldr r1, [r7, #8] + 8002cd4: 430b orrs r3, r1 + 8002cd6: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) - 8003058: 687b ldr r3, [r7, #4] - 800305a: 689b ldr r3, [r3, #8] - 800305c: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8003060: d003 beq.n 800306a - 8003062: 687b ldr r3, [r7, #4] - 8003064: 689b ldr r3, [r3, #8] - 8003066: 2b01 cmp r3, #1 - 8003068: d104 bne.n 8003074 + 8002cd8: 687b ldr r3, [r7, #4] + 8002cda: 689b ldr r3, [r3, #8] + 8002cdc: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8002ce0: d003 beq.n 8002cea + 8002ce2: 687b ldr r3, [r7, #4] + 8002ce4: 689b ldr r3, [r3, #8] + 8002ce6: 2b01 cmp r3, #1 + 8002ce8: d104 bne.n 8002cf4 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); - 800306a: 687b ldr r3, [r7, #4] - 800306c: 691b ldr r3, [r3, #16] - 800306e: 3b01 subs r3, #1 - 8003070: 051b lsls r3, r3, #20 - 8003072: 60fb str r3, [r7, #12] + 8002cea: 687b ldr r3, [r7, #4] + 8002cec: 691b ldr r3, [r3, #16] + 8002cee: 3b01 subs r3, #1 + 8002cf0: 051b lsls r3, r3, #20 + 8002cf2: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, - 8003074: 687b ldr r3, [r7, #4] - 8003076: 681b ldr r3, [r3, #0] - 8003078: 6adb ldr r3, [r3, #44] @ 0x2c - 800307a: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 - 800307e: 687b ldr r3, [r7, #4] - 8003080: 681b ldr r3, [r3, #0] - 8003082: 68fa ldr r2, [r7, #12] - 8003084: 430a orrs r2, r1 - 8003086: 62da str r2, [r3, #44] @ 0x2c + 8002cf4: 687b ldr r3, [r7, #4] + 8002cf6: 681b ldr r3, [r3, #0] + 8002cf8: 6adb ldr r3, [r3, #44] @ 0x2c + 8002cfa: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 + 8002cfe: 687b ldr r3, [r7, #4] + 8002d00: 681b ldr r3, [r3, #0] + 8002d02: 68fa ldr r2, [r7, #12] + 8002d04: 430a orrs r2, r1 + 8002d06: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 8003088: 687b ldr r3, [r7, #4] - 800308a: 681b ldr r3, [r3, #0] - 800308c: 689a ldr r2, [r3, #8] - 800308e: 4b18 ldr r3, [pc, #96] @ (80030f0 ) - 8003090: 4013 ands r3, r2 - 8003092: 68ba ldr r2, [r7, #8] - 8003094: 429a cmp r2, r3 - 8003096: d10b bne.n 80030b0 + 8002d08: 687b ldr r3, [r7, #4] + 8002d0a: 681b ldr r3, [r3, #0] + 8002d0c: 689a ldr r2, [r3, #8] + 8002d0e: 4b18 ldr r3, [pc, #96] @ (8002d70 ) + 8002d10: 4013 ands r3, r2 + 8002d12: 68ba ldr r2, [r7, #8] + 8002d14: 429a cmp r2, r3 + 8002d16: d10b bne.n 8002d30 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); - 8003098: 687b ldr r3, [r7, #4] - 800309a: 2200 movs r2, #0 - 800309c: 62da str r2, [r3, #44] @ 0x2c + 8002d18: 687b ldr r3, [r7, #4] + 8002d1a: 2200 movs r2, #0 + 8002d1c: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, - 800309e: 687b ldr r3, [r7, #4] - 80030a0: 6a9b ldr r3, [r3, #40] @ 0x28 - 80030a2: f023 0303 bic.w r3, r3, #3 - 80030a6: f043 0201 orr.w r2, r3, #1 - 80030aa: 687b ldr r3, [r7, #4] - 80030ac: 629a str r2, [r3, #40] @ 0x28 + 8002d1e: 687b ldr r3, [r7, #4] + 8002d20: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002d22: f023 0303 bic.w r3, r3, #3 + 8002d26: f043 0201 orr.w r2, r3, #1 + 8002d2a: 687b ldr r3, [r7, #4] + 8002d2c: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 80030ae: e018 b.n 80030e2 + 8002d2e: e018 b.n 8002d62 HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, - 80030b0: 687b ldr r3, [r7, #4] - 80030b2: 6a9b ldr r3, [r3, #40] @ 0x28 - 80030b4: f023 0312 bic.w r3, r3, #18 - 80030b8: f043 0210 orr.w r2, r3, #16 - 80030bc: 687b ldr r3, [r7, #4] - 80030be: 629a str r2, [r3, #40] @ 0x28 + 8002d30: 687b ldr r3, [r7, #4] + 8002d32: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002d34: f023 0312 bic.w r3, r3, #18 + 8002d38: f043 0210 orr.w r2, r3, #16 + 8002d3c: 687b ldr r3, [r7, #4] + 8002d3e: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80030c0: 687b ldr r3, [r7, #4] - 80030c2: 6adb ldr r3, [r3, #44] @ 0x2c - 80030c4: f043 0201 orr.w r2, r3, #1 - 80030c8: 687b ldr r3, [r7, #4] - 80030ca: 62da str r2, [r3, #44] @ 0x2c + 8002d40: 687b ldr r3, [r7, #4] + 8002d42: 6adb ldr r3, [r3, #44] @ 0x2c + 8002d44: f043 0201 orr.w r2, r3, #1 + 8002d48: 687b ldr r3, [r7, #4] + 8002d4a: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; - 80030cc: 2301 movs r3, #1 - 80030ce: 75fb strb r3, [r7, #23] + 8002d4c: 2301 movs r3, #1 + 8002d4e: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 80030d0: e007 b.n 80030e2 + 8002d50: e007 b.n 8002d62 } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80030d2: 687b ldr r3, [r7, #4] - 80030d4: 6a9b ldr r3, [r3, #40] @ 0x28 - 80030d6: f043 0210 orr.w r2, r3, #16 - 80030da: 687b ldr r3, [r7, #4] - 80030dc: 629a str r2, [r3, #40] @ 0x28 + 8002d52: 687b ldr r3, [r7, #4] + 8002d54: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002d56: f043 0210 orr.w r2, r3, #16 + 8002d5a: 687b ldr r3, [r7, #4] + 8002d5c: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; - 80030de: 2301 movs r3, #1 - 80030e0: 75fb strb r3, [r7, #23] + 8002d5e: 2301 movs r3, #1 + 8002d60: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; - 80030e2: 7dfb ldrb r3, [r7, #23] + 8002d62: 7dfb ldrb r3, [r7, #23] } - 80030e4: 4618 mov r0, r3 - 80030e6: 3718 adds r7, #24 - 80030e8: 46bd mov sp, r7 - 80030ea: bd80 pop {r7, pc} - 80030ec: ffe1f7fd .word 0xffe1f7fd - 80030f0: ff1f0efe .word 0xff1f0efe + 8002d64: 4618 mov r0, r3 + 8002d66: 3718 adds r7, #24 + 8002d68: 46bd mov sp, r7 + 8002d6a: bd80 pop {r7, pc} + 8002d6c: ffe1f7fd .word 0xffe1f7fd + 8002d70: ff1f0efe .word 0xff1f0efe -080030f4 : +08002d74 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { - 80030f4: b480 push {r7} - 80030f6: b085 sub sp, #20 - 80030f8: af00 add r7, sp, #0 - 80030fa: 6078 str r0, [r7, #4] - 80030fc: 6039 str r1, [r7, #0] + 8002d74: b480 push {r7} + 8002d76: b085 sub sp, #20 + 8002d78: af00 add r7, sp, #0 + 8002d7a: 6078 str r0, [r7, #4] + 8002d7c: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 80030fe: 2300 movs r3, #0 - 8003100: 73fb strb r3, [r7, #15] + 8002d7e: 2300 movs r3, #0 + 8002d80: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; - 8003102: 2300 movs r3, #0 - 8003104: 60bb str r3, [r7, #8] + 8002d82: 2300 movs r3, #0 + 8002d84: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); - 8003106: 687b ldr r3, [r7, #4] - 8003108: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 - 800310c: 2b01 cmp r3, #1 - 800310e: d101 bne.n 8003114 - 8003110: 2302 movs r3, #2 - 8003112: e0dc b.n 80032ce - 8003114: 687b ldr r3, [r7, #4] - 8003116: 2201 movs r2, #1 - 8003118: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 8002d86: 687b ldr r3, [r7, #4] + 8002d88: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 + 8002d8c: 2b01 cmp r3, #1 + 8002d8e: d101 bne.n 8002d94 + 8002d90: 2302 movs r3, #2 + 8002d92: e0dc b.n 8002f4e + 8002d94: 687b ldr r3, [r7, #4] + 8002d96: 2201 movs r2, #1 + 8002d98: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) - 800311c: 683b ldr r3, [r7, #0] - 800311e: 685b ldr r3, [r3, #4] - 8003120: 2b06 cmp r3, #6 - 8003122: d81c bhi.n 800315e + 8002d9c: 683b ldr r3, [r7, #0] + 8002d9e: 685b ldr r3, [r3, #4] + 8002da0: 2b06 cmp r3, #6 + 8002da2: d81c bhi.n 8002dde { MODIFY_REG(hadc->Instance->SQR3 , - 8003124: 687b ldr r3, [r7, #4] - 8003126: 681b ldr r3, [r3, #0] - 8003128: 6b59 ldr r1, [r3, #52] @ 0x34 - 800312a: 683b ldr r3, [r7, #0] - 800312c: 685a ldr r2, [r3, #4] - 800312e: 4613 mov r3, r2 - 8003130: 009b lsls r3, r3, #2 - 8003132: 4413 add r3, r2 - 8003134: 3b05 subs r3, #5 - 8003136: 221f movs r2, #31 - 8003138: fa02 f303 lsl.w r3, r2, r3 - 800313c: 43db mvns r3, r3 - 800313e: 4019 ands r1, r3 - 8003140: 683b ldr r3, [r7, #0] - 8003142: 6818 ldr r0, [r3, #0] - 8003144: 683b ldr r3, [r7, #0] - 8003146: 685a ldr r2, [r3, #4] - 8003148: 4613 mov r3, r2 - 800314a: 009b lsls r3, r3, #2 - 800314c: 4413 add r3, r2 - 800314e: 3b05 subs r3, #5 - 8003150: fa00 f203 lsl.w r2, r0, r3 - 8003154: 687b ldr r3, [r7, #4] - 8003156: 681b ldr r3, [r3, #0] - 8003158: 430a orrs r2, r1 - 800315a: 635a str r2, [r3, #52] @ 0x34 - 800315c: e03c b.n 80031d8 + 8002da4: 687b ldr r3, [r7, #4] + 8002da6: 681b ldr r3, [r3, #0] + 8002da8: 6b59 ldr r1, [r3, #52] @ 0x34 + 8002daa: 683b ldr r3, [r7, #0] + 8002dac: 685a ldr r2, [r3, #4] + 8002dae: 4613 mov r3, r2 + 8002db0: 009b lsls r3, r3, #2 + 8002db2: 4413 add r3, r2 + 8002db4: 3b05 subs r3, #5 + 8002db6: 221f movs r2, #31 + 8002db8: fa02 f303 lsl.w r3, r2, r3 + 8002dbc: 43db mvns r3, r3 + 8002dbe: 4019 ands r1, r3 + 8002dc0: 683b ldr r3, [r7, #0] + 8002dc2: 6818 ldr r0, [r3, #0] + 8002dc4: 683b ldr r3, [r7, #0] + 8002dc6: 685a ldr r2, [r3, #4] + 8002dc8: 4613 mov r3, r2 + 8002dca: 009b lsls r3, r3, #2 + 8002dcc: 4413 add r3, r2 + 8002dce: 3b05 subs r3, #5 + 8002dd0: fa00 f203 lsl.w r2, r0, r3 + 8002dd4: 687b ldr r3, [r7, #4] + 8002dd6: 681b ldr r3, [r3, #0] + 8002dd8: 430a orrs r2, r1 + 8002dda: 635a str r2, [r3, #52] @ 0x34 + 8002ddc: e03c b.n 8002e58 ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) - 800315e: 683b ldr r3, [r7, #0] - 8003160: 685b ldr r3, [r3, #4] - 8003162: 2b0c cmp r3, #12 - 8003164: d81c bhi.n 80031a0 + 8002dde: 683b ldr r3, [r7, #0] + 8002de0: 685b ldr r3, [r3, #4] + 8002de2: 2b0c cmp r3, #12 + 8002de4: d81c bhi.n 8002e20 { MODIFY_REG(hadc->Instance->SQR2 , - 8003166: 687b ldr r3, [r7, #4] - 8003168: 681b ldr r3, [r3, #0] - 800316a: 6b19 ldr r1, [r3, #48] @ 0x30 - 800316c: 683b ldr r3, [r7, #0] - 800316e: 685a ldr r2, [r3, #4] - 8003170: 4613 mov r3, r2 - 8003172: 009b lsls r3, r3, #2 - 8003174: 4413 add r3, r2 - 8003176: 3b23 subs r3, #35 @ 0x23 - 8003178: 221f movs r2, #31 - 800317a: fa02 f303 lsl.w r3, r2, r3 - 800317e: 43db mvns r3, r3 - 8003180: 4019 ands r1, r3 - 8003182: 683b ldr r3, [r7, #0] - 8003184: 6818 ldr r0, [r3, #0] - 8003186: 683b ldr r3, [r7, #0] - 8003188: 685a ldr r2, [r3, #4] - 800318a: 4613 mov r3, r2 - 800318c: 009b lsls r3, r3, #2 - 800318e: 4413 add r3, r2 - 8003190: 3b23 subs r3, #35 @ 0x23 - 8003192: fa00 f203 lsl.w r2, r0, r3 - 8003196: 687b ldr r3, [r7, #4] - 8003198: 681b ldr r3, [r3, #0] - 800319a: 430a orrs r2, r1 - 800319c: 631a str r2, [r3, #48] @ 0x30 - 800319e: e01b b.n 80031d8 + 8002de6: 687b ldr r3, [r7, #4] + 8002de8: 681b ldr r3, [r3, #0] + 8002dea: 6b19 ldr r1, [r3, #48] @ 0x30 + 8002dec: 683b ldr r3, [r7, #0] + 8002dee: 685a ldr r2, [r3, #4] + 8002df0: 4613 mov r3, r2 + 8002df2: 009b lsls r3, r3, #2 + 8002df4: 4413 add r3, r2 + 8002df6: 3b23 subs r3, #35 @ 0x23 + 8002df8: 221f movs r2, #31 + 8002dfa: fa02 f303 lsl.w r3, r2, r3 + 8002dfe: 43db mvns r3, r3 + 8002e00: 4019 ands r1, r3 + 8002e02: 683b ldr r3, [r7, #0] + 8002e04: 6818 ldr r0, [r3, #0] + 8002e06: 683b ldr r3, [r7, #0] + 8002e08: 685a ldr r2, [r3, #4] + 8002e0a: 4613 mov r3, r2 + 8002e0c: 009b lsls r3, r3, #2 + 8002e0e: 4413 add r3, r2 + 8002e10: 3b23 subs r3, #35 @ 0x23 + 8002e12: fa00 f203 lsl.w r2, r0, r3 + 8002e16: 687b ldr r3, [r7, #4] + 8002e18: 681b ldr r3, [r3, #0] + 8002e1a: 430a orrs r2, r1 + 8002e1c: 631a str r2, [r3, #48] @ 0x30 + 8002e1e: e01b b.n 8002e58 ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , - 80031a0: 687b ldr r3, [r7, #4] - 80031a2: 681b ldr r3, [r3, #0] - 80031a4: 6ad9 ldr r1, [r3, #44] @ 0x2c - 80031a6: 683b ldr r3, [r7, #0] - 80031a8: 685a ldr r2, [r3, #4] - 80031aa: 4613 mov r3, r2 - 80031ac: 009b lsls r3, r3, #2 - 80031ae: 4413 add r3, r2 - 80031b0: 3b41 subs r3, #65 @ 0x41 - 80031b2: 221f movs r2, #31 - 80031b4: fa02 f303 lsl.w r3, r2, r3 - 80031b8: 43db mvns r3, r3 - 80031ba: 4019 ands r1, r3 - 80031bc: 683b ldr r3, [r7, #0] - 80031be: 6818 ldr r0, [r3, #0] - 80031c0: 683b ldr r3, [r7, #0] - 80031c2: 685a ldr r2, [r3, #4] - 80031c4: 4613 mov r3, r2 - 80031c6: 009b lsls r3, r3, #2 - 80031c8: 4413 add r3, r2 - 80031ca: 3b41 subs r3, #65 @ 0x41 - 80031cc: fa00 f203 lsl.w r2, r0, r3 - 80031d0: 687b ldr r3, [r7, #4] - 80031d2: 681b ldr r3, [r3, #0] - 80031d4: 430a orrs r2, r1 - 80031d6: 62da str r2, [r3, #44] @ 0x2c + 8002e20: 687b ldr r3, [r7, #4] + 8002e22: 681b ldr r3, [r3, #0] + 8002e24: 6ad9 ldr r1, [r3, #44] @ 0x2c + 8002e26: 683b ldr r3, [r7, #0] + 8002e28: 685a ldr r2, [r3, #4] + 8002e2a: 4613 mov r3, r2 + 8002e2c: 009b lsls r3, r3, #2 + 8002e2e: 4413 add r3, r2 + 8002e30: 3b41 subs r3, #65 @ 0x41 + 8002e32: 221f movs r2, #31 + 8002e34: fa02 f303 lsl.w r3, r2, r3 + 8002e38: 43db mvns r3, r3 + 8002e3a: 4019 ands r1, r3 + 8002e3c: 683b ldr r3, [r7, #0] + 8002e3e: 6818 ldr r0, [r3, #0] + 8002e40: 683b ldr r3, [r7, #0] + 8002e42: 685a ldr r2, [r3, #4] + 8002e44: 4613 mov r3, r2 + 8002e46: 009b lsls r3, r3, #2 + 8002e48: 4413 add r3, r2 + 8002e4a: 3b41 subs r3, #65 @ 0x41 + 8002e4c: fa00 f203 lsl.w r2, r0, r3 + 8002e50: 687b ldr r3, [r7, #4] + 8002e52: 681b ldr r3, [r3, #0] + 8002e54: 430a orrs r2, r1 + 8002e56: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) - 80031d8: 683b ldr r3, [r7, #0] - 80031da: 681b ldr r3, [r3, #0] - 80031dc: 2b09 cmp r3, #9 - 80031de: d91c bls.n 800321a + 8002e58: 683b ldr r3, [r7, #0] + 8002e5a: 681b ldr r3, [r3, #0] + 8002e5c: 2b09 cmp r3, #9 + 8002e5e: d91c bls.n 8002e9a { MODIFY_REG(hadc->Instance->SMPR1 , - 80031e0: 687b ldr r3, [r7, #4] - 80031e2: 681b ldr r3, [r3, #0] - 80031e4: 68d9 ldr r1, [r3, #12] - 80031e6: 683b ldr r3, [r7, #0] - 80031e8: 681a ldr r2, [r3, #0] - 80031ea: 4613 mov r3, r2 - 80031ec: 005b lsls r3, r3, #1 - 80031ee: 4413 add r3, r2 - 80031f0: 3b1e subs r3, #30 - 80031f2: 2207 movs r2, #7 - 80031f4: fa02 f303 lsl.w r3, r2, r3 - 80031f8: 43db mvns r3, r3 - 80031fa: 4019 ands r1, r3 - 80031fc: 683b ldr r3, [r7, #0] - 80031fe: 6898 ldr r0, [r3, #8] - 8003200: 683b ldr r3, [r7, #0] - 8003202: 681a ldr r2, [r3, #0] - 8003204: 4613 mov r3, r2 - 8003206: 005b lsls r3, r3, #1 - 8003208: 4413 add r3, r2 - 800320a: 3b1e subs r3, #30 - 800320c: fa00 f203 lsl.w r2, r0, r3 - 8003210: 687b ldr r3, [r7, #4] - 8003212: 681b ldr r3, [r3, #0] - 8003214: 430a orrs r2, r1 - 8003216: 60da str r2, [r3, #12] - 8003218: e019 b.n 800324e + 8002e60: 687b ldr r3, [r7, #4] + 8002e62: 681b ldr r3, [r3, #0] + 8002e64: 68d9 ldr r1, [r3, #12] + 8002e66: 683b ldr r3, [r7, #0] + 8002e68: 681a ldr r2, [r3, #0] + 8002e6a: 4613 mov r3, r2 + 8002e6c: 005b lsls r3, r3, #1 + 8002e6e: 4413 add r3, r2 + 8002e70: 3b1e subs r3, #30 + 8002e72: 2207 movs r2, #7 + 8002e74: fa02 f303 lsl.w r3, r2, r3 + 8002e78: 43db mvns r3, r3 + 8002e7a: 4019 ands r1, r3 + 8002e7c: 683b ldr r3, [r7, #0] + 8002e7e: 6898 ldr r0, [r3, #8] + 8002e80: 683b ldr r3, [r7, #0] + 8002e82: 681a ldr r2, [r3, #0] + 8002e84: 4613 mov r3, r2 + 8002e86: 005b lsls r3, r3, #1 + 8002e88: 4413 add r3, r2 + 8002e8a: 3b1e subs r3, #30 + 8002e8c: fa00 f203 lsl.w r2, r0, r3 + 8002e90: 687b ldr r3, [r7, #4] + 8002e92: 681b ldr r3, [r3, #0] + 8002e94: 430a orrs r2, r1 + 8002e96: 60da str r2, [r3, #12] + 8002e98: e019 b.n 8002ece ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , - 800321a: 687b ldr r3, [r7, #4] - 800321c: 681b ldr r3, [r3, #0] - 800321e: 6919 ldr r1, [r3, #16] - 8003220: 683b ldr r3, [r7, #0] - 8003222: 681a ldr r2, [r3, #0] - 8003224: 4613 mov r3, r2 - 8003226: 005b lsls r3, r3, #1 - 8003228: 4413 add r3, r2 - 800322a: 2207 movs r2, #7 - 800322c: fa02 f303 lsl.w r3, r2, r3 - 8003230: 43db mvns r3, r3 - 8003232: 4019 ands r1, r3 - 8003234: 683b ldr r3, [r7, #0] - 8003236: 6898 ldr r0, [r3, #8] - 8003238: 683b ldr r3, [r7, #0] - 800323a: 681a ldr r2, [r3, #0] - 800323c: 4613 mov r3, r2 - 800323e: 005b lsls r3, r3, #1 - 8003240: 4413 add r3, r2 - 8003242: fa00 f203 lsl.w r2, r0, r3 - 8003246: 687b ldr r3, [r7, #4] - 8003248: 681b ldr r3, [r3, #0] - 800324a: 430a orrs r2, r1 - 800324c: 611a str r2, [r3, #16] + 8002e9a: 687b ldr r3, [r7, #4] + 8002e9c: 681b ldr r3, [r3, #0] + 8002e9e: 6919 ldr r1, [r3, #16] + 8002ea0: 683b ldr r3, [r7, #0] + 8002ea2: 681a ldr r2, [r3, #0] + 8002ea4: 4613 mov r3, r2 + 8002ea6: 005b lsls r3, r3, #1 + 8002ea8: 4413 add r3, r2 + 8002eaa: 2207 movs r2, #7 + 8002eac: fa02 f303 lsl.w r3, r2, r3 + 8002eb0: 43db mvns r3, r3 + 8002eb2: 4019 ands r1, r3 + 8002eb4: 683b ldr r3, [r7, #0] + 8002eb6: 6898 ldr r0, [r3, #8] + 8002eb8: 683b ldr r3, [r7, #0] + 8002eba: 681a ldr r2, [r3, #0] + 8002ebc: 4613 mov r3, r2 + 8002ebe: 005b lsls r3, r3, #1 + 8002ec0: 4413 add r3, r2 + 8002ec2: fa00 f203 lsl.w r2, r0, r3 + 8002ec6: 687b ldr r3, [r7, #4] + 8002ec8: 681b ldr r3, [r3, #0] + 8002eca: 430a orrs r2, r1 + 8002ecc: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 800324e: 683b ldr r3, [r7, #0] - 8003250: 681b ldr r3, [r3, #0] - 8003252: 2b10 cmp r3, #16 - 8003254: d003 beq.n 800325e + 8002ece: 683b ldr r3, [r7, #0] + 8002ed0: 681b ldr r3, [r3, #0] + 8002ed2: 2b10 cmp r3, #16 + 8002ed4: d003 beq.n 8002ede (sConfig->Channel == ADC_CHANNEL_VREFINT) ) - 8003256: 683b ldr r3, [r7, #0] - 8003258: 681b ldr r3, [r3, #0] + 8002ed6: 683b ldr r3, [r7, #0] + 8002ed8: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 800325a: 2b11 cmp r3, #17 - 800325c: d132 bne.n 80032c4 + 8002eda: 2b11 cmp r3, #17 + 8002edc: d132 bne.n 8002f44 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) - 800325e: 687b ldr r3, [r7, #4] - 8003260: 681b ldr r3, [r3, #0] - 8003262: 4a1d ldr r2, [pc, #116] @ (80032d8 ) - 8003264: 4293 cmp r3, r2 - 8003266: d125 bne.n 80032b4 + 8002ede: 687b ldr r3, [r7, #4] + 8002ee0: 681b ldr r3, [r3, #0] + 8002ee2: 4a1d ldr r2, [pc, #116] @ (8002f58 ) + 8002ee4: 4293 cmp r3, r2 + 8002ee6: d125 bne.n 8002f34 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) - 8003268: 687b ldr r3, [r7, #4] - 800326a: 681b ldr r3, [r3, #0] - 800326c: 689b ldr r3, [r3, #8] - 800326e: f403 0300 and.w r3, r3, #8388608 @ 0x800000 - 8003272: 2b00 cmp r3, #0 - 8003274: d126 bne.n 80032c4 + 8002ee8: 687b ldr r3, [r7, #4] + 8002eea: 681b ldr r3, [r3, #0] + 8002eec: 689b ldr r3, [r3, #8] + 8002eee: f403 0300 and.w r3, r3, #8388608 @ 0x800000 + 8002ef2: 2b00 cmp r3, #0 + 8002ef4: d126 bne.n 8002f44 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); - 8003276: 687b ldr r3, [r7, #4] - 8003278: 681b ldr r3, [r3, #0] - 800327a: 689a ldr r2, [r3, #8] - 800327c: 687b ldr r3, [r7, #4] - 800327e: 681b ldr r3, [r3, #0] - 8003280: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 - 8003284: 609a str r2, [r3, #8] + 8002ef6: 687b ldr r3, [r7, #4] + 8002ef8: 681b ldr r3, [r3, #0] + 8002efa: 689a ldr r2, [r3, #8] + 8002efc: 687b ldr r3, [r7, #4] + 8002efe: 681b ldr r3, [r3, #0] + 8002f00: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 + 8002f04: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) - 8003286: 683b ldr r3, [r7, #0] - 8003288: 681b ldr r3, [r3, #0] - 800328a: 2b10 cmp r3, #16 - 800328c: d11a bne.n 80032c4 + 8002f06: 683b ldr r3, [r7, #0] + 8002f08: 681b ldr r3, [r3, #0] + 8002f0a: 2b10 cmp r3, #16 + 8002f0c: d11a bne.n 8002f44 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); - 800328e: 4b13 ldr r3, [pc, #76] @ (80032dc ) - 8003290: 681b ldr r3, [r3, #0] - 8003292: 4a13 ldr r2, [pc, #76] @ (80032e0 ) - 8003294: fba2 2303 umull r2, r3, r2, r3 - 8003298: 0c9a lsrs r2, r3, #18 - 800329a: 4613 mov r3, r2 - 800329c: 009b lsls r3, r3, #2 - 800329e: 4413 add r3, r2 - 80032a0: 005b lsls r3, r3, #1 - 80032a2: 60bb str r3, [r7, #8] + 8002f0e: 4b13 ldr r3, [pc, #76] @ (8002f5c ) + 8002f10: 681b ldr r3, [r3, #0] + 8002f12: 4a13 ldr r2, [pc, #76] @ (8002f60 ) + 8002f14: fba2 2303 umull r2, r3, r2, r3 + 8002f18: 0c9a lsrs r2, r3, #18 + 8002f1a: 4613 mov r3, r2 + 8002f1c: 009b lsls r3, r3, #2 + 8002f1e: 4413 add r3, r2 + 8002f20: 005b lsls r3, r3, #1 + 8002f22: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 80032a4: e002 b.n 80032ac + 8002f24: e002 b.n 8002f2c { wait_loop_index--; - 80032a6: 68bb ldr r3, [r7, #8] - 80032a8: 3b01 subs r3, #1 - 80032aa: 60bb str r3, [r7, #8] + 8002f26: 68bb ldr r3, [r7, #8] + 8002f28: 3b01 subs r3, #1 + 8002f2a: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 80032ac: 68bb ldr r3, [r7, #8] - 80032ae: 2b00 cmp r3, #0 - 80032b0: d1f9 bne.n 80032a6 - 80032b2: e007 b.n 80032c4 + 8002f2c: 68bb ldr r3, [r7, #8] + 8002f2e: 2b00 cmp r3, #0 + 8002f30: d1f9 bne.n 8002f26 + 8002f32: e007 b.n 8002f44 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 80032b4: 687b ldr r3, [r7, #4] - 80032b6: 6a9b ldr r3, [r3, #40] @ 0x28 - 80032b8: f043 0220 orr.w r2, r3, #32 - 80032bc: 687b ldr r3, [r7, #4] - 80032be: 629a str r2, [r3, #40] @ 0x28 + 8002f34: 687b ldr r3, [r7, #4] + 8002f36: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002f38: f043 0220 orr.w r2, r3, #32 + 8002f3c: 687b ldr r3, [r7, #4] + 8002f3e: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; - 80032c0: 2301 movs r3, #1 - 80032c2: 73fb strb r3, [r7, #15] + 8002f40: 2301 movs r3, #1 + 8002f42: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); - 80032c4: 687b ldr r3, [r7, #4] - 80032c6: 2200 movs r2, #0 - 80032c8: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 8002f44: 687b ldr r3, [r7, #4] + 8002f46: 2200 movs r2, #0 + 8002f48: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; - 80032cc: 7bfb ldrb r3, [r7, #15] + 8002f4c: 7bfb ldrb r3, [r7, #15] } - 80032ce: 4618 mov r0, r3 - 80032d0: 3714 adds r7, #20 - 80032d2: 46bd mov sp, r7 - 80032d4: bc80 pop {r7} - 80032d6: 4770 bx lr - 80032d8: 40012400 .word 0x40012400 - 80032dc: 20000034 .word 0x20000034 - 80032e0: 431bde83 .word 0x431bde83 + 8002f4e: 4618 mov r0, r3 + 8002f50: 3714 adds r7, #20 + 8002f52: 46bd mov sp, r7 + 8002f54: bc80 pop {r7} + 8002f56: 4770 bx lr + 8002f58: 40012400 .word 0x40012400 + 8002f5c: 20000038 .word 0x20000038 + 8002f60: 431bde83 .word 0x431bde83 -080032e4 : +08002f64 : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { - 80032e4: b580 push {r7, lr} - 80032e6: b084 sub sp, #16 - 80032e8: af00 add r7, sp, #0 - 80032ea: 6078 str r0, [r7, #4] + 8002f64: b580 push {r7, lr} + 8002f66: b084 sub sp, #16 + 8002f68: af00 add r7, sp, #0 + 8002f6a: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; - 80032ec: 2300 movs r3, #0 - 80032ee: 60fb str r3, [r7, #12] + 8002f6c: 2300 movs r3, #0 + 8002f6e: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) - 80032f0: 687b ldr r3, [r7, #4] - 80032f2: 681b ldr r3, [r3, #0] - 80032f4: 689b ldr r3, [r3, #8] - 80032f6: f003 0301 and.w r3, r3, #1 - 80032fa: 2b01 cmp r3, #1 - 80032fc: d12e bne.n 800335c + 8002f70: 687b ldr r3, [r7, #4] + 8002f72: 681b ldr r3, [r3, #0] + 8002f74: 689b ldr r3, [r3, #8] + 8002f76: f003 0301 and.w r3, r3, #1 + 8002f7a: 2b01 cmp r3, #1 + 8002f7c: d12e bne.n 8002fdc { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); - 80032fe: 687b ldr r3, [r7, #4] - 8003300: 681b ldr r3, [r3, #0] - 8003302: 689a ldr r2, [r3, #8] - 8003304: 687b ldr r3, [r7, #4] - 8003306: 681b ldr r3, [r3, #0] - 8003308: f022 0201 bic.w r2, r2, #1 - 800330c: 609a str r2, [r3, #8] + 8002f7e: 687b ldr r3, [r7, #4] + 8002f80: 681b ldr r3, [r3, #0] + 8002f82: 689a ldr r2, [r3, #8] + 8002f84: 687b ldr r3, [r7, #4] + 8002f86: 681b ldr r3, [r3, #0] + 8002f88: f022 0201 bic.w r2, r2, #1 + 8002f8c: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); - 800330e: f7ff fdeb bl 8002ee8 - 8003312: 60f8 str r0, [r7, #12] + 8002f8e: f7ff fdeb bl 8002b68 + 8002f92: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) - 8003314: e01b b.n 800334e + 8002f94: e01b b.n 8002fce { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) - 8003316: f7ff fde7 bl 8002ee8 - 800331a: 4602 mov r2, r0 - 800331c: 68fb ldr r3, [r7, #12] - 800331e: 1ad3 subs r3, r2, r3 - 8003320: 2b02 cmp r3, #2 - 8003322: d914 bls.n 800334e + 8002f96: f7ff fde7 bl 8002b68 + 8002f9a: 4602 mov r2, r0 + 8002f9c: 68fb ldr r3, [r7, #12] + 8002f9e: 1ad3 subs r3, r2, r3 + 8002fa0: 2b02 cmp r3, #2 + 8002fa2: d914 bls.n 8002fce { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) - 8003324: 687b ldr r3, [r7, #4] - 8003326: 681b ldr r3, [r3, #0] - 8003328: 689b ldr r3, [r3, #8] - 800332a: f003 0301 and.w r3, r3, #1 - 800332e: 2b01 cmp r3, #1 - 8003330: d10d bne.n 800334e + 8002fa4: 687b ldr r3, [r7, #4] + 8002fa6: 681b ldr r3, [r3, #0] + 8002fa8: 689b ldr r3, [r3, #8] + 8002faa: f003 0301 and.w r3, r3, #1 + 8002fae: 2b01 cmp r3, #1 + 8002fb0: d10d bne.n 8002fce { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8003332: 687b ldr r3, [r7, #4] - 8003334: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003336: f043 0210 orr.w r2, r3, #16 - 800333a: 687b ldr r3, [r7, #4] - 800333c: 629a str r2, [r3, #40] @ 0x28 + 8002fb2: 687b ldr r3, [r7, #4] + 8002fb4: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002fb6: f043 0210 orr.w r2, r3, #16 + 8002fba: 687b ldr r3, [r7, #4] + 8002fbc: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 800333e: 687b ldr r3, [r7, #4] - 8003340: 6adb ldr r3, [r3, #44] @ 0x2c - 8003342: f043 0201 orr.w r2, r3, #1 - 8003346: 687b ldr r3, [r7, #4] - 8003348: 62da str r2, [r3, #44] @ 0x2c + 8002fbe: 687b ldr r3, [r7, #4] + 8002fc0: 6adb ldr r3, [r3, #44] @ 0x2c + 8002fc2: f043 0201 orr.w r2, r3, #1 + 8002fc6: 687b ldr r3, [r7, #4] + 8002fc8: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; - 800334a: 2301 movs r3, #1 - 800334c: e007 b.n 800335e + 8002fca: 2301 movs r3, #1 + 8002fcc: e007 b.n 8002fde while(ADC_IS_ENABLE(hadc) != RESET) - 800334e: 687b ldr r3, [r7, #4] - 8003350: 681b ldr r3, [r3, #0] - 8003352: 689b ldr r3, [r3, #8] - 8003354: f003 0301 and.w r3, r3, #1 - 8003358: 2b01 cmp r3, #1 - 800335a: d0dc beq.n 8003316 + 8002fce: 687b ldr r3, [r7, #4] + 8002fd0: 681b ldr r3, [r3, #0] + 8002fd2: 689b ldr r3, [r3, #8] + 8002fd4: f003 0301 and.w r3, r3, #1 + 8002fd8: 2b01 cmp r3, #1 + 8002fda: d0dc beq.n 8002f96 } } } /* Return HAL status */ return HAL_OK; - 800335c: 2300 movs r3, #0 + 8002fdc: 2300 movs r3, #0 } - 800335e: 4618 mov r0, r3 - 8003360: 3710 adds r7, #16 - 8003362: 46bd mov sp, r7 - 8003364: bd80 pop {r7, pc} + 8002fde: 4618 mov r0, r3 + 8002fe0: 3710 adds r7, #16 + 8002fe2: 46bd mov sp, r7 + 8002fe4: bd80 pop {r7, pc} ... -08003368 <__NVIC_SetPriorityGrouping>: +08002fe8 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8003368: b480 push {r7} - 800336a: b085 sub sp, #20 - 800336c: af00 add r7, sp, #0 - 800336e: 6078 str r0, [r7, #4] + 8002fe8: b480 push {r7} + 8002fea: b085 sub sp, #20 + 8002fec: af00 add r7, sp, #0 + 8002fee: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8003370: 687b ldr r3, [r7, #4] - 8003372: f003 0307 and.w r3, r3, #7 - 8003376: 60fb str r3, [r7, #12] + 8002ff0: 687b ldr r3, [r7, #4] + 8002ff2: f003 0307 and.w r3, r3, #7 + 8002ff6: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 8003378: 4b0c ldr r3, [pc, #48] @ (80033ac <__NVIC_SetPriorityGrouping+0x44>) - 800337a: 68db ldr r3, [r3, #12] - 800337c: 60bb str r3, [r7, #8] + 8002ff8: 4b0c ldr r3, [pc, #48] @ (800302c <__NVIC_SetPriorityGrouping+0x44>) + 8002ffa: 68db ldr r3, [r3, #12] + 8002ffc: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 800337e: 68ba ldr r2, [r7, #8] - 8003380: f64f 03ff movw r3, #63743 @ 0xf8ff - 8003384: 4013 ands r3, r2 - 8003386: 60bb str r3, [r7, #8] + 8002ffe: 68ba ldr r2, [r7, #8] + 8003000: f64f 03ff movw r3, #63743 @ 0xf8ff + 8003004: 4013 ands r3, r2 + 8003006: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 8003388: 68fb ldr r3, [r7, #12] - 800338a: 021a lsls r2, r3, #8 + 8003008: 68fb ldr r3, [r7, #12] + 800300a: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 800338c: 68bb ldr r3, [r7, #8] - 800338e: 4313 orrs r3, r2 + 800300c: 68bb ldr r3, [r7, #8] + 800300e: 4313 orrs r3, r2 reg_value = (reg_value | - 8003390: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 - 8003394: f443 3300 orr.w r3, r3, #131072 @ 0x20000 - 8003398: 60bb str r3, [r7, #8] + 8003010: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 + 8003014: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 8003018: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 800339a: 4a04 ldr r2, [pc, #16] @ (80033ac <__NVIC_SetPriorityGrouping+0x44>) - 800339c: 68bb ldr r3, [r7, #8] - 800339e: 60d3 str r3, [r2, #12] + 800301a: 4a04 ldr r2, [pc, #16] @ (800302c <__NVIC_SetPriorityGrouping+0x44>) + 800301c: 68bb ldr r3, [r7, #8] + 800301e: 60d3 str r3, [r2, #12] } - 80033a0: bf00 nop - 80033a2: 3714 adds r7, #20 - 80033a4: 46bd mov sp, r7 - 80033a6: bc80 pop {r7} - 80033a8: 4770 bx lr - 80033aa: bf00 nop - 80033ac: e000ed00 .word 0xe000ed00 + 8003020: bf00 nop + 8003022: 3714 adds r7, #20 + 8003024: 46bd mov sp, r7 + 8003026: bc80 pop {r7} + 8003028: 4770 bx lr + 800302a: bf00 nop + 800302c: e000ed00 .word 0xe000ed00 -080033b0 <__NVIC_GetPriorityGrouping>: +08003030 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 80033b0: b480 push {r7} - 80033b2: af00 add r7, sp, #0 + 8003030: b480 push {r7} + 8003032: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 80033b4: 4b04 ldr r3, [pc, #16] @ (80033c8 <__NVIC_GetPriorityGrouping+0x18>) - 80033b6: 68db ldr r3, [r3, #12] - 80033b8: 0a1b lsrs r3, r3, #8 - 80033ba: f003 0307 and.w r3, r3, #7 + 8003034: 4b04 ldr r3, [pc, #16] @ (8003048 <__NVIC_GetPriorityGrouping+0x18>) + 8003036: 68db ldr r3, [r3, #12] + 8003038: 0a1b lsrs r3, r3, #8 + 800303a: f003 0307 and.w r3, r3, #7 } - 80033be: 4618 mov r0, r3 - 80033c0: 46bd mov sp, r7 - 80033c2: bc80 pop {r7} - 80033c4: 4770 bx lr - 80033c6: bf00 nop - 80033c8: e000ed00 .word 0xe000ed00 + 800303e: 4618 mov r0, r3 + 8003040: 46bd mov sp, r7 + 8003042: bc80 pop {r7} + 8003044: 4770 bx lr + 8003046: bf00 nop + 8003048: e000ed00 .word 0xe000ed00 -080033cc <__NVIC_EnableIRQ>: +0800304c <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { - 80033cc: b480 push {r7} - 80033ce: b083 sub sp, #12 - 80033d0: af00 add r7, sp, #0 - 80033d2: 4603 mov r3, r0 - 80033d4: 71fb strb r3, [r7, #7] + 800304c: b480 push {r7} + 800304e: b083 sub sp, #12 + 8003050: af00 add r7, sp, #0 + 8003052: 4603 mov r3, r0 + 8003054: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 80033d6: f997 3007 ldrsb.w r3, [r7, #7] - 80033da: 2b00 cmp r3, #0 - 80033dc: db0b blt.n 80033f6 <__NVIC_EnableIRQ+0x2a> + 8003056: f997 3007 ldrsb.w r3, [r7, #7] + 800305a: 2b00 cmp r3, #0 + 800305c: db0b blt.n 8003076 <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 80033de: 79fb ldrb r3, [r7, #7] - 80033e0: f003 021f and.w r2, r3, #31 - 80033e4: 4906 ldr r1, [pc, #24] @ (8003400 <__NVIC_EnableIRQ+0x34>) - 80033e6: f997 3007 ldrsb.w r3, [r7, #7] - 80033ea: 095b lsrs r3, r3, #5 - 80033ec: 2001 movs r0, #1 - 80033ee: fa00 f202 lsl.w r2, r0, r2 - 80033f2: f841 2023 str.w r2, [r1, r3, lsl #2] + 800305e: 79fb ldrb r3, [r7, #7] + 8003060: f003 021f and.w r2, r3, #31 + 8003064: 4906 ldr r1, [pc, #24] @ (8003080 <__NVIC_EnableIRQ+0x34>) + 8003066: f997 3007 ldrsb.w r3, [r7, #7] + 800306a: 095b lsrs r3, r3, #5 + 800306c: 2001 movs r0, #1 + 800306e: fa00 f202 lsl.w r2, r0, r2 + 8003072: f841 2023 str.w r2, [r1, r3, lsl #2] } } - 80033f6: bf00 nop - 80033f8: 370c adds r7, #12 - 80033fa: 46bd mov sp, r7 - 80033fc: bc80 pop {r7} - 80033fe: 4770 bx lr - 8003400: e000e100 .word 0xe000e100 + 8003076: bf00 nop + 8003078: 370c adds r7, #12 + 800307a: 46bd mov sp, r7 + 800307c: bc80 pop {r7} + 800307e: 4770 bx lr + 8003080: e000e100 .word 0xe000e100 -08003404 <__NVIC_SetPriority>: +08003084 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8003404: b480 push {r7} - 8003406: b083 sub sp, #12 - 8003408: af00 add r7, sp, #0 - 800340a: 4603 mov r3, r0 - 800340c: 6039 str r1, [r7, #0] - 800340e: 71fb strb r3, [r7, #7] + 8003084: b480 push {r7} + 8003086: b083 sub sp, #12 + 8003088: af00 add r7, sp, #0 + 800308a: 4603 mov r3, r0 + 800308c: 6039 str r1, [r7, #0] + 800308e: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8003410: f997 3007 ldrsb.w r3, [r7, #7] - 8003414: 2b00 cmp r3, #0 - 8003416: db0a blt.n 800342e <__NVIC_SetPriority+0x2a> + 8003090: f997 3007 ldrsb.w r3, [r7, #7] + 8003094: 2b00 cmp r3, #0 + 8003096: db0a blt.n 80030ae <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8003418: 683b ldr r3, [r7, #0] - 800341a: b2da uxtb r2, r3 - 800341c: 490c ldr r1, [pc, #48] @ (8003450 <__NVIC_SetPriority+0x4c>) - 800341e: f997 3007 ldrsb.w r3, [r7, #7] - 8003422: 0112 lsls r2, r2, #4 - 8003424: b2d2 uxtb r2, r2 - 8003426: 440b add r3, r1 - 8003428: f883 2300 strb.w r2, [r3, #768] @ 0x300 + 8003098: 683b ldr r3, [r7, #0] + 800309a: b2da uxtb r2, r3 + 800309c: 490c ldr r1, [pc, #48] @ (80030d0 <__NVIC_SetPriority+0x4c>) + 800309e: f997 3007 ldrsb.w r3, [r7, #7] + 80030a2: 0112 lsls r2, r2, #4 + 80030a4: b2d2 uxtb r2, r2 + 80030a6: 440b add r3, r1 + 80030a8: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 800342c: e00a b.n 8003444 <__NVIC_SetPriority+0x40> + 80030ac: e00a b.n 80030c4 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 800342e: 683b ldr r3, [r7, #0] - 8003430: b2da uxtb r2, r3 - 8003432: 4908 ldr r1, [pc, #32] @ (8003454 <__NVIC_SetPriority+0x50>) - 8003434: 79fb ldrb r3, [r7, #7] - 8003436: f003 030f and.w r3, r3, #15 - 800343a: 3b04 subs r3, #4 - 800343c: 0112 lsls r2, r2, #4 - 800343e: b2d2 uxtb r2, r2 - 8003440: 440b add r3, r1 - 8003442: 761a strb r2, [r3, #24] + 80030ae: 683b ldr r3, [r7, #0] + 80030b0: b2da uxtb r2, r3 + 80030b2: 4908 ldr r1, [pc, #32] @ (80030d4 <__NVIC_SetPriority+0x50>) + 80030b4: 79fb ldrb r3, [r7, #7] + 80030b6: f003 030f and.w r3, r3, #15 + 80030ba: 3b04 subs r3, #4 + 80030bc: 0112 lsls r2, r2, #4 + 80030be: b2d2 uxtb r2, r2 + 80030c0: 440b add r3, r1 + 80030c2: 761a strb r2, [r3, #24] } - 8003444: bf00 nop - 8003446: 370c adds r7, #12 - 8003448: 46bd mov sp, r7 - 800344a: bc80 pop {r7} - 800344c: 4770 bx lr - 800344e: bf00 nop - 8003450: e000e100 .word 0xe000e100 - 8003454: e000ed00 .word 0xe000ed00 + 80030c4: bf00 nop + 80030c6: 370c adds r7, #12 + 80030c8: 46bd mov sp, r7 + 80030ca: bc80 pop {r7} + 80030cc: 4770 bx lr + 80030ce: bf00 nop + 80030d0: e000e100 .word 0xe000e100 + 80030d4: e000ed00 .word 0xe000ed00 -08003458 : +080030d8 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 8003458: b480 push {r7} - 800345a: b089 sub sp, #36 @ 0x24 - 800345c: af00 add r7, sp, #0 - 800345e: 60f8 str r0, [r7, #12] - 8003460: 60b9 str r1, [r7, #8] - 8003462: 607a str r2, [r7, #4] + 80030d8: b480 push {r7} + 80030da: b089 sub sp, #36 @ 0x24 + 80030dc: af00 add r7, sp, #0 + 80030de: 60f8 str r0, [r7, #12] + 80030e0: 60b9 str r1, [r7, #8] + 80030e2: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8003464: 68fb ldr r3, [r7, #12] - 8003466: f003 0307 and.w r3, r3, #7 - 800346a: 61fb str r3, [r7, #28] + 80030e4: 68fb ldr r3, [r7, #12] + 80030e6: f003 0307 and.w r3, r3, #7 + 80030ea: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 800346c: 69fb ldr r3, [r7, #28] - 800346e: f1c3 0307 rsb r3, r3, #7 - 8003472: 2b04 cmp r3, #4 - 8003474: bf28 it cs - 8003476: 2304 movcs r3, #4 - 8003478: 61bb str r3, [r7, #24] + 80030ec: 69fb ldr r3, [r7, #28] + 80030ee: f1c3 0307 rsb r3, r3, #7 + 80030f2: 2b04 cmp r3, #4 + 80030f4: bf28 it cs + 80030f6: 2304 movcs r3, #4 + 80030f8: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 800347a: 69fb ldr r3, [r7, #28] - 800347c: 3304 adds r3, #4 - 800347e: 2b06 cmp r3, #6 - 8003480: d902 bls.n 8003488 - 8003482: 69fb ldr r3, [r7, #28] - 8003484: 3b03 subs r3, #3 - 8003486: e000 b.n 800348a - 8003488: 2300 movs r3, #0 - 800348a: 617b str r3, [r7, #20] + 80030fa: 69fb ldr r3, [r7, #28] + 80030fc: 3304 adds r3, #4 + 80030fe: 2b06 cmp r3, #6 + 8003100: d902 bls.n 8003108 + 8003102: 69fb ldr r3, [r7, #28] + 8003104: 3b03 subs r3, #3 + 8003106: e000 b.n 800310a + 8003108: 2300 movs r3, #0 + 800310a: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 800348c: f04f 32ff mov.w r2, #4294967295 - 8003490: 69bb ldr r3, [r7, #24] - 8003492: fa02 f303 lsl.w r3, r2, r3 - 8003496: 43da mvns r2, r3 - 8003498: 68bb ldr r3, [r7, #8] - 800349a: 401a ands r2, r3 - 800349c: 697b ldr r3, [r7, #20] - 800349e: 409a lsls r2, r3 + 800310c: f04f 32ff mov.w r2, #4294967295 + 8003110: 69bb ldr r3, [r7, #24] + 8003112: fa02 f303 lsl.w r3, r2, r3 + 8003116: 43da mvns r2, r3 + 8003118: 68bb ldr r3, [r7, #8] + 800311a: 401a ands r2, r3 + 800311c: 697b ldr r3, [r7, #20] + 800311e: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 80034a0: f04f 31ff mov.w r1, #4294967295 - 80034a4: 697b ldr r3, [r7, #20] - 80034a6: fa01 f303 lsl.w r3, r1, r3 - 80034aa: 43d9 mvns r1, r3 - 80034ac: 687b ldr r3, [r7, #4] - 80034ae: 400b ands r3, r1 + 8003120: f04f 31ff mov.w r1, #4294967295 + 8003124: 697b ldr r3, [r7, #20] + 8003126: fa01 f303 lsl.w r3, r1, r3 + 800312a: 43d9 mvns r1, r3 + 800312c: 687b ldr r3, [r7, #4] + 800312e: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 80034b0: 4313 orrs r3, r2 + 8003130: 4313 orrs r3, r2 ); } - 80034b2: 4618 mov r0, r3 - 80034b4: 3724 adds r7, #36 @ 0x24 - 80034b6: 46bd mov sp, r7 - 80034b8: bc80 pop {r7} - 80034ba: 4770 bx lr + 8003132: 4618 mov r0, r3 + 8003134: 3724 adds r7, #36 @ 0x24 + 8003136: 46bd mov sp, r7 + 8003138: bc80 pop {r7} + 800313a: 4770 bx lr -080034bc : +0800313c : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 80034bc: b580 push {r7, lr} - 80034be: b082 sub sp, #8 - 80034c0: af00 add r7, sp, #0 - 80034c2: 6078 str r0, [r7, #4] + 800313c: b580 push {r7, lr} + 800313e: b082 sub sp, #8 + 8003140: af00 add r7, sp, #0 + 8003142: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 80034c4: 687b ldr r3, [r7, #4] - 80034c6: 3b01 subs r3, #1 - 80034c8: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 - 80034cc: d301 bcc.n 80034d2 + 8003144: 687b ldr r3, [r7, #4] + 8003146: 3b01 subs r3, #1 + 8003148: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 + 800314c: d301 bcc.n 8003152 { return (1UL); /* Reload value impossible */ - 80034ce: 2301 movs r3, #1 - 80034d0: e00f b.n 80034f2 + 800314e: 2301 movs r3, #1 + 8003150: e00f b.n 8003172 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 80034d2: 4a0a ldr r2, [pc, #40] @ (80034fc ) - 80034d4: 687b ldr r3, [r7, #4] - 80034d6: 3b01 subs r3, #1 - 80034d8: 6053 str r3, [r2, #4] + 8003152: 4a0a ldr r2, [pc, #40] @ (800317c ) + 8003154: 687b ldr r3, [r7, #4] + 8003156: 3b01 subs r3, #1 + 8003158: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 80034da: 210f movs r1, #15 - 80034dc: f04f 30ff mov.w r0, #4294967295 - 80034e0: f7ff ff90 bl 8003404 <__NVIC_SetPriority> + 800315a: 210f movs r1, #15 + 800315c: f04f 30ff mov.w r0, #4294967295 + 8003160: f7ff ff90 bl 8003084 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 80034e4: 4b05 ldr r3, [pc, #20] @ (80034fc ) - 80034e6: 2200 movs r2, #0 - 80034e8: 609a str r2, [r3, #8] + 8003164: 4b05 ldr r3, [pc, #20] @ (800317c ) + 8003166: 2200 movs r2, #0 + 8003168: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 80034ea: 4b04 ldr r3, [pc, #16] @ (80034fc ) - 80034ec: 2207 movs r2, #7 - 80034ee: 601a str r2, [r3, #0] + 800316a: 4b04 ldr r3, [pc, #16] @ (800317c ) + 800316c: 2207 movs r2, #7 + 800316e: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 80034f0: 2300 movs r3, #0 + 8003170: 2300 movs r3, #0 } - 80034f2: 4618 mov r0, r3 - 80034f4: 3708 adds r7, #8 - 80034f6: 46bd mov sp, r7 - 80034f8: bd80 pop {r7, pc} - 80034fa: bf00 nop - 80034fc: e000e010 .word 0xe000e010 + 8003172: 4618 mov r0, r3 + 8003174: 3708 adds r7, #8 + 8003176: 46bd mov sp, r7 + 8003178: bd80 pop {r7, pc} + 800317a: bf00 nop + 800317c: e000e010 .word 0xe000e010 -08003500 : +08003180 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8003500: b580 push {r7, lr} - 8003502: b082 sub sp, #8 - 8003504: af00 add r7, sp, #0 - 8003506: 6078 str r0, [r7, #4] + 8003180: b580 push {r7, lr} + 8003182: b082 sub sp, #8 + 8003184: af00 add r7, sp, #0 + 8003186: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 8003508: 6878 ldr r0, [r7, #4] - 800350a: f7ff ff2d bl 8003368 <__NVIC_SetPriorityGrouping> + 8003188: 6878 ldr r0, [r7, #4] + 800318a: f7ff ff2d bl 8002fe8 <__NVIC_SetPriorityGrouping> } - 800350e: bf00 nop - 8003510: 3708 adds r7, #8 - 8003512: 46bd mov sp, r7 - 8003514: bd80 pop {r7, pc} + 800318e: bf00 nop + 8003190: 3708 adds r7, #8 + 8003192: 46bd mov sp, r7 + 8003194: bd80 pop {r7, pc} -08003516 : +08003196 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8003516: b580 push {r7, lr} - 8003518: b086 sub sp, #24 - 800351a: af00 add r7, sp, #0 - 800351c: 4603 mov r3, r0 - 800351e: 60b9 str r1, [r7, #8] - 8003520: 607a str r2, [r7, #4] - 8003522: 73fb strb r3, [r7, #15] + 8003196: b580 push {r7, lr} + 8003198: b086 sub sp, #24 + 800319a: af00 add r7, sp, #0 + 800319c: 4603 mov r3, r0 + 800319e: 60b9 str r1, [r7, #8] + 80031a0: 607a str r2, [r7, #4] + 80031a2: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; - 8003524: 2300 movs r3, #0 - 8003526: 617b str r3, [r7, #20] + 80031a4: 2300 movs r3, #0 + 80031a6: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8003528: f7ff ff42 bl 80033b0 <__NVIC_GetPriorityGrouping> - 800352c: 6178 str r0, [r7, #20] + 80031a8: f7ff ff42 bl 8003030 <__NVIC_GetPriorityGrouping> + 80031ac: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 800352e: 687a ldr r2, [r7, #4] - 8003530: 68b9 ldr r1, [r7, #8] - 8003532: 6978 ldr r0, [r7, #20] - 8003534: f7ff ff90 bl 8003458 - 8003538: 4602 mov r2, r0 - 800353a: f997 300f ldrsb.w r3, [r7, #15] - 800353e: 4611 mov r1, r2 - 8003540: 4618 mov r0, r3 - 8003542: f7ff ff5f bl 8003404 <__NVIC_SetPriority> + 80031ae: 687a ldr r2, [r7, #4] + 80031b0: 68b9 ldr r1, [r7, #8] + 80031b2: 6978 ldr r0, [r7, #20] + 80031b4: f7ff ff90 bl 80030d8 + 80031b8: 4602 mov r2, r0 + 80031ba: f997 300f ldrsb.w r3, [r7, #15] + 80031be: 4611 mov r1, r2 + 80031c0: 4618 mov r0, r3 + 80031c2: f7ff ff5f bl 8003084 <__NVIC_SetPriority> } - 8003546: bf00 nop - 8003548: 3718 adds r7, #24 - 800354a: 46bd mov sp, r7 - 800354c: bd80 pop {r7, pc} + 80031c6: bf00 nop + 80031c8: 3718 adds r7, #24 + 80031ca: 46bd mov sp, r7 + 80031cc: bd80 pop {r7, pc} -0800354e : +080031ce : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 800354e: b580 push {r7, lr} - 8003550: b082 sub sp, #8 - 8003552: af00 add r7, sp, #0 - 8003554: 4603 mov r3, r0 - 8003556: 71fb strb r3, [r7, #7] + 80031ce: b580 push {r7, lr} + 80031d0: b082 sub sp, #8 + 80031d2: af00 add r7, sp, #0 + 80031d4: 4603 mov r3, r0 + 80031d6: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 8003558: f997 3007 ldrsb.w r3, [r7, #7] - 800355c: 4618 mov r0, r3 - 800355e: f7ff ff35 bl 80033cc <__NVIC_EnableIRQ> + 80031d8: f997 3007 ldrsb.w r3, [r7, #7] + 80031dc: 4618 mov r0, r3 + 80031de: f7ff ff35 bl 800304c <__NVIC_EnableIRQ> } - 8003562: bf00 nop - 8003564: 3708 adds r7, #8 - 8003566: 46bd mov sp, r7 - 8003568: bd80 pop {r7, pc} + 80031e2: bf00 nop + 80031e4: 3708 adds r7, #8 + 80031e6: 46bd mov sp, r7 + 80031e8: bd80 pop {r7, pc} -0800356a : +080031ea : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 800356a: b580 push {r7, lr} - 800356c: b082 sub sp, #8 - 800356e: af00 add r7, sp, #0 - 8003570: 6078 str r0, [r7, #4] + 80031ea: b580 push {r7, lr} + 80031ec: b082 sub sp, #8 + 80031ee: af00 add r7, sp, #0 + 80031f0: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 8003572: 6878 ldr r0, [r7, #4] - 8003574: f7ff ffa2 bl 80034bc - 8003578: 4603 mov r3, r0 + 80031f2: 6878 ldr r0, [r7, #4] + 80031f4: f7ff ffa2 bl 800313c + 80031f8: 4603 mov r3, r0 } - 800357a: 4618 mov r0, r3 - 800357c: 3708 adds r7, #8 - 800357e: 46bd mov sp, r7 - 8003580: bd80 pop {r7, pc} + 80031fa: 4618 mov r0, r3 + 80031fc: 3708 adds r7, #8 + 80031fe: 46bd mov sp, r7 + 8003200: bd80 pop {r7, pc} -08003582 : +08003202 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { - 8003582: b480 push {r7} - 8003584: b085 sub sp, #20 - 8003586: af00 add r7, sp, #0 - 8003588: 6078 str r0, [r7, #4] + 8003202: b480 push {r7} + 8003204: b085 sub sp, #20 + 8003206: af00 add r7, sp, #0 + 8003208: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 800358a: 2300 movs r3, #0 - 800358c: 73fb strb r3, [r7, #15] + 800320a: 2300 movs r3, #0 + 800320c: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) - 800358e: 687b ldr r3, [r7, #4] - 8003590: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 - 8003594: b2db uxtb r3, r3 - 8003596: 2b02 cmp r3, #2 - 8003598: d008 beq.n 80035ac + 800320e: 687b ldr r3, [r7, #4] + 8003210: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 + 8003214: b2db uxtb r3, r3 + 8003216: 2b02 cmp r3, #2 + 8003218: d008 beq.n 800322c { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 800359a: 687b ldr r3, [r7, #4] - 800359c: 2204 movs r2, #4 - 800359e: 639a str r2, [r3, #56] @ 0x38 + 800321a: 687b ldr r3, [r7, #4] + 800321c: 2204 movs r2, #4 + 800321e: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80035a0: 687b ldr r3, [r7, #4] - 80035a2: 2200 movs r2, #0 - 80035a4: f883 2020 strb.w r2, [r3, #32] + 8003220: 687b ldr r3, [r7, #4] + 8003222: 2200 movs r2, #0 + 8003224: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; - 80035a8: 2301 movs r3, #1 - 80035aa: e020 b.n 80035ee + 8003228: 2301 movs r3, #1 + 800322a: e020 b.n 800326e } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 80035ac: 687b ldr r3, [r7, #4] - 80035ae: 681b ldr r3, [r3, #0] - 80035b0: 681a ldr r2, [r3, #0] - 80035b2: 687b ldr r3, [r7, #4] - 80035b4: 681b ldr r3, [r3, #0] - 80035b6: f022 020e bic.w r2, r2, #14 - 80035ba: 601a str r2, [r3, #0] + 800322c: 687b ldr r3, [r7, #4] + 800322e: 681b ldr r3, [r3, #0] + 8003230: 681a ldr r2, [r3, #0] + 8003232: 687b ldr r3, [r7, #4] + 8003234: 681b ldr r3, [r3, #0] + 8003236: f022 020e bic.w r2, r2, #14 + 800323a: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 80035bc: 687b ldr r3, [r7, #4] - 80035be: 681b ldr r3, [r3, #0] - 80035c0: 681a ldr r2, [r3, #0] - 80035c2: 687b ldr r3, [r7, #4] - 80035c4: 681b ldr r3, [r3, #0] - 80035c6: f022 0201 bic.w r2, r2, #1 - 80035ca: 601a str r2, [r3, #0] + 800323c: 687b ldr r3, [r7, #4] + 800323e: 681b ldr r3, [r3, #0] + 8003240: 681a ldr r2, [r3, #0] + 8003242: 687b ldr r3, [r7, #4] + 8003244: 681b ldr r3, [r3, #0] + 8003246: f022 0201 bic.w r2, r2, #1 + 800324a: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - 80035cc: 687b ldr r3, [r7, #4] - 80035ce: 6c1a ldr r2, [r3, #64] @ 0x40 - 80035d0: 687b ldr r3, [r7, #4] - 80035d2: 6bdb ldr r3, [r3, #60] @ 0x3c - 80035d4: 2101 movs r1, #1 - 80035d6: fa01 f202 lsl.w r2, r1, r2 - 80035da: 605a str r2, [r3, #4] + 800324c: 687b ldr r3, [r7, #4] + 800324e: 6c1a ldr r2, [r3, #64] @ 0x40 + 8003250: 687b ldr r3, [r7, #4] + 8003252: 6bdb ldr r3, [r3, #60] @ 0x3c + 8003254: 2101 movs r1, #1 + 8003256: fa01 f202 lsl.w r2, r1, r2 + 800325a: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 80035dc: 687b ldr r3, [r7, #4] - 80035de: 2201 movs r2, #1 - 80035e0: f883 2021 strb.w r2, [r3, #33] @ 0x21 + 800325c: 687b ldr r3, [r7, #4] + 800325e: 2201 movs r2, #1 + 8003260: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80035e4: 687b ldr r3, [r7, #4] - 80035e6: 2200 movs r2, #0 - 80035e8: f883 2020 strb.w r2, [r3, #32] + 8003264: 687b ldr r3, [r7, #4] + 8003266: 2200 movs r2, #0 + 8003268: f883 2020 strb.w r2, [r3, #32] return status; - 80035ec: 7bfb ldrb r3, [r7, #15] + 800326c: 7bfb ldrb r3, [r7, #15] } - 80035ee: 4618 mov r0, r3 - 80035f0: 3714 adds r7, #20 - 80035f2: 46bd mov sp, r7 - 80035f4: bc80 pop {r7} - 80035f6: 4770 bx lr + 800326e: 4618 mov r0, r3 + 8003270: 3714 adds r7, #20 + 8003272: 46bd mov sp, r7 + 8003274: bc80 pop {r7} + 8003276: 4770 bx lr -080035f8 : +08003278 : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { - 80035f8: b580 push {r7, lr} - 80035fa: b084 sub sp, #16 - 80035fc: af00 add r7, sp, #0 - 80035fe: 6078 str r0, [r7, #4] + 8003278: b580 push {r7, lr} + 800327a: b084 sub sp, #16 + 800327c: af00 add r7, sp, #0 + 800327e: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8003600: 2300 movs r3, #0 - 8003602: 73fb strb r3, [r7, #15] + 8003280: 2300 movs r3, #0 + 8003282: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) - 8003604: 687b ldr r3, [r7, #4] - 8003606: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 - 800360a: b2db uxtb r3, r3 - 800360c: 2b02 cmp r3, #2 - 800360e: d005 beq.n 800361c + 8003284: 687b ldr r3, [r7, #4] + 8003286: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 + 800328a: b2db uxtb r3, r3 + 800328c: 2b02 cmp r3, #2 + 800328e: d005 beq.n 800329c { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8003610: 687b ldr r3, [r7, #4] - 8003612: 2204 movs r2, #4 - 8003614: 639a str r2, [r3, #56] @ 0x38 + 8003290: 687b ldr r3, [r7, #4] + 8003292: 2204 movs r2, #4 + 8003294: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; - 8003616: 2301 movs r3, #1 - 8003618: 73fb strb r3, [r7, #15] - 800361a: e051 b.n 80036c0 + 8003296: 2301 movs r3, #1 + 8003298: 73fb strb r3, [r7, #15] + 800329a: e051 b.n 8003340 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 800361c: 687b ldr r3, [r7, #4] - 800361e: 681b ldr r3, [r3, #0] - 8003620: 681a ldr r2, [r3, #0] - 8003622: 687b ldr r3, [r7, #4] - 8003624: 681b ldr r3, [r3, #0] - 8003626: f022 020e bic.w r2, r2, #14 - 800362a: 601a str r2, [r3, #0] + 800329c: 687b ldr r3, [r7, #4] + 800329e: 681b ldr r3, [r3, #0] + 80032a0: 681a ldr r2, [r3, #0] + 80032a2: 687b ldr r3, [r7, #4] + 80032a4: 681b ldr r3, [r3, #0] + 80032a6: f022 020e bic.w r2, r2, #14 + 80032aa: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 800362c: 687b ldr r3, [r7, #4] - 800362e: 681b ldr r3, [r3, #0] - 8003630: 681a ldr r2, [r3, #0] - 8003632: 687b ldr r3, [r7, #4] - 8003634: 681b ldr r3, [r3, #0] - 8003636: f022 0201 bic.w r2, r2, #1 - 800363a: 601a str r2, [r3, #0] + 80032ac: 687b ldr r3, [r7, #4] + 80032ae: 681b ldr r3, [r3, #0] + 80032b0: 681a ldr r2, [r3, #0] + 80032b2: 687b ldr r3, [r7, #4] + 80032b4: 681b ldr r3, [r3, #0] + 80032b6: f022 0201 bic.w r2, r2, #1 + 80032ba: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); - 800363c: 687b ldr r3, [r7, #4] - 800363e: 681b ldr r3, [r3, #0] - 8003640: 4a22 ldr r2, [pc, #136] @ (80036cc ) - 8003642: 4293 cmp r3, r2 - 8003644: d029 beq.n 800369a - 8003646: 687b ldr r3, [r7, #4] - 8003648: 681b ldr r3, [r3, #0] - 800364a: 4a21 ldr r2, [pc, #132] @ (80036d0 ) - 800364c: 4293 cmp r3, r2 - 800364e: d022 beq.n 8003696 - 8003650: 687b ldr r3, [r7, #4] - 8003652: 681b ldr r3, [r3, #0] - 8003654: 4a1f ldr r2, [pc, #124] @ (80036d4 ) - 8003656: 4293 cmp r3, r2 - 8003658: d01a beq.n 8003690 - 800365a: 687b ldr r3, [r7, #4] - 800365c: 681b ldr r3, [r3, #0] - 800365e: 4a1e ldr r2, [pc, #120] @ (80036d8 ) - 8003660: 4293 cmp r3, r2 - 8003662: d012 beq.n 800368a - 8003664: 687b ldr r3, [r7, #4] - 8003666: 681b ldr r3, [r3, #0] - 8003668: 4a1c ldr r2, [pc, #112] @ (80036dc ) - 800366a: 4293 cmp r3, r2 - 800366c: d00a beq.n 8003684 - 800366e: 687b ldr r3, [r7, #4] - 8003670: 681b ldr r3, [r3, #0] - 8003672: 4a1b ldr r2, [pc, #108] @ (80036e0 ) - 8003674: 4293 cmp r3, r2 - 8003676: d102 bne.n 800367e - 8003678: f44f 1380 mov.w r3, #1048576 @ 0x100000 - 800367c: e00e b.n 800369c - 800367e: f04f 7380 mov.w r3, #16777216 @ 0x1000000 - 8003682: e00b b.n 800369c - 8003684: f44f 3380 mov.w r3, #65536 @ 0x10000 - 8003688: e008 b.n 800369c - 800368a: f44f 5380 mov.w r3, #4096 @ 0x1000 - 800368e: e005 b.n 800369c - 8003690: f44f 7380 mov.w r3, #256 @ 0x100 - 8003694: e002 b.n 800369c - 8003696: 2310 movs r3, #16 - 8003698: e000 b.n 800369c - 800369a: 2301 movs r3, #1 - 800369c: 4a11 ldr r2, [pc, #68] @ (80036e4 ) - 800369e: 6053 str r3, [r2, #4] + 80032bc: 687b ldr r3, [r7, #4] + 80032be: 681b ldr r3, [r3, #0] + 80032c0: 4a22 ldr r2, [pc, #136] @ (800334c ) + 80032c2: 4293 cmp r3, r2 + 80032c4: d029 beq.n 800331a + 80032c6: 687b ldr r3, [r7, #4] + 80032c8: 681b ldr r3, [r3, #0] + 80032ca: 4a21 ldr r2, [pc, #132] @ (8003350 ) + 80032cc: 4293 cmp r3, r2 + 80032ce: d022 beq.n 8003316 + 80032d0: 687b ldr r3, [r7, #4] + 80032d2: 681b ldr r3, [r3, #0] + 80032d4: 4a1f ldr r2, [pc, #124] @ (8003354 ) + 80032d6: 4293 cmp r3, r2 + 80032d8: d01a beq.n 8003310 + 80032da: 687b ldr r3, [r7, #4] + 80032dc: 681b ldr r3, [r3, #0] + 80032de: 4a1e ldr r2, [pc, #120] @ (8003358 ) + 80032e0: 4293 cmp r3, r2 + 80032e2: d012 beq.n 800330a + 80032e4: 687b ldr r3, [r7, #4] + 80032e6: 681b ldr r3, [r3, #0] + 80032e8: 4a1c ldr r2, [pc, #112] @ (800335c ) + 80032ea: 4293 cmp r3, r2 + 80032ec: d00a beq.n 8003304 + 80032ee: 687b ldr r3, [r7, #4] + 80032f0: 681b ldr r3, [r3, #0] + 80032f2: 4a1b ldr r2, [pc, #108] @ (8003360 ) + 80032f4: 4293 cmp r3, r2 + 80032f6: d102 bne.n 80032fe + 80032f8: f44f 1380 mov.w r3, #1048576 @ 0x100000 + 80032fc: e00e b.n 800331c + 80032fe: f04f 7380 mov.w r3, #16777216 @ 0x1000000 + 8003302: e00b b.n 800331c + 8003304: f44f 3380 mov.w r3, #65536 @ 0x10000 + 8003308: e008 b.n 800331c + 800330a: f44f 5380 mov.w r3, #4096 @ 0x1000 + 800330e: e005 b.n 800331c + 8003310: f44f 7380 mov.w r3, #256 @ 0x100 + 8003314: e002 b.n 800331c + 8003316: 2310 movs r3, #16 + 8003318: e000 b.n 800331c + 800331a: 2301 movs r3, #1 + 800331c: 4a11 ldr r2, [pc, #68] @ (8003364 ) + 800331e: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 80036a0: 687b ldr r3, [r7, #4] - 80036a2: 2201 movs r2, #1 - 80036a4: f883 2021 strb.w r2, [r3, #33] @ 0x21 + 8003320: 687b ldr r3, [r7, #4] + 8003322: 2201 movs r2, #1 + 8003324: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80036a8: 687b ldr r3, [r7, #4] - 80036aa: 2200 movs r2, #0 - 80036ac: f883 2020 strb.w r2, [r3, #32] + 8003328: 687b ldr r3, [r7, #4] + 800332a: 2200 movs r2, #0 + 800332c: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) - 80036b0: 687b ldr r3, [r7, #4] - 80036b2: 6b5b ldr r3, [r3, #52] @ 0x34 - 80036b4: 2b00 cmp r3, #0 - 80036b6: d003 beq.n 80036c0 + 8003330: 687b ldr r3, [r7, #4] + 8003332: 6b5b ldr r3, [r3, #52] @ 0x34 + 8003334: 2b00 cmp r3, #0 + 8003336: d003 beq.n 8003340 { hdma->XferAbortCallback(hdma); - 80036b8: 687b ldr r3, [r7, #4] - 80036ba: 6b5b ldr r3, [r3, #52] @ 0x34 - 80036bc: 6878 ldr r0, [r7, #4] - 80036be: 4798 blx r3 + 8003338: 687b ldr r3, [r7, #4] + 800333a: 6b5b ldr r3, [r3, #52] @ 0x34 + 800333c: 6878 ldr r0, [r7, #4] + 800333e: 4798 blx r3 } } return status; - 80036c0: 7bfb ldrb r3, [r7, #15] + 8003340: 7bfb ldrb r3, [r7, #15] } - 80036c2: 4618 mov r0, r3 - 80036c4: 3710 adds r7, #16 - 80036c6: 46bd mov sp, r7 - 80036c8: bd80 pop {r7, pc} - 80036ca: bf00 nop - 80036cc: 40020008 .word 0x40020008 - 80036d0: 4002001c .word 0x4002001c - 80036d4: 40020030 .word 0x40020030 - 80036d8: 40020044 .word 0x40020044 - 80036dc: 40020058 .word 0x40020058 - 80036e0: 4002006c .word 0x4002006c - 80036e4: 40020000 .word 0x40020000 + 8003342: 4618 mov r0, r3 + 8003344: 3710 adds r7, #16 + 8003346: 46bd mov sp, r7 + 8003348: bd80 pop {r7, pc} + 800334a: bf00 nop + 800334c: 40020008 .word 0x40020008 + 8003350: 4002001c .word 0x4002001c + 8003354: 40020030 .word 0x40020030 + 8003358: 40020044 .word 0x40020044 + 800335c: 40020058 .word 0x40020058 + 8003360: 4002006c .word 0x4002006c + 8003364: 40020000 .word 0x40020000 -080036e8 : - * @param Data: Specifies the data to be programmed - * - * @retval HAL_StatusTypeDef HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) -{ - 80036e8: b5f0 push {r4, r5, r6, r7, lr} - 80036ea: b087 sub sp, #28 - 80036ec: af00 add r7, sp, #0 - 80036ee: 60f8 str r0, [r7, #12] - 80036f0: 60b9 str r1, [r7, #8] - 80036f2: e9c7 2300 strd r2, r3, [r7] - HAL_StatusTypeDef status = HAL_ERROR; - 80036f6: 2301 movs r3, #1 - 80036f8: 75fb strb r3, [r7, #23] - uint8_t index = 0; - 80036fa: 2300 movs r3, #0 - 80036fc: 75bb strb r3, [r7, #22] - uint8_t nbiterations = 0; - 80036fe: 2300 movs r3, #0 - 8003700: 757b strb r3, [r7, #21] - - /* Process Locked */ - __HAL_LOCK(&pFlash); - 8003702: 4b2f ldr r3, [pc, #188] @ (80037c0 ) - 8003704: 7e1b ldrb r3, [r3, #24] - 8003706: 2b01 cmp r3, #1 - 8003708: d101 bne.n 800370e - 800370a: 2302 movs r3, #2 - 800370c: e054 b.n 80037b8 - 800370e: 4b2c ldr r3, [pc, #176] @ (80037c0 ) - 8003710: 2201 movs r2, #1 - 8003712: 761a strb r2, [r3, #24] -#if defined(FLASH_BANK2_END) - if(Address <= FLASH_BANK1_END) - { -#endif /* FLASH_BANK2_END */ - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 8003714: f24c 3050 movw r0, #50000 @ 0xc350 - 8003718: f000 f8a8 bl 800386c - 800371c: 4603 mov r3, r0 - 800371e: 75fb strb r3, [r7, #23] - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE); - } -#endif /* FLASH_BANK2_END */ - - if(status == HAL_OK) - 8003720: 7dfb ldrb r3, [r7, #23] - 8003722: 2b00 cmp r3, #0 - 8003724: d144 bne.n 80037b0 - { - if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) - 8003726: 68fb ldr r3, [r7, #12] - 8003728: 2b01 cmp r3, #1 - 800372a: d102 bne.n 8003732 - { - /* Program halfword (16-bit) at a specified address. */ - nbiterations = 1U; - 800372c: 2301 movs r3, #1 - 800372e: 757b strb r3, [r7, #21] - 8003730: e007 b.n 8003742 - } - else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) - 8003732: 68fb ldr r3, [r7, #12] - 8003734: 2b02 cmp r3, #2 - 8003736: d102 bne.n 800373e - { - /* Program word (32-bit = 2*16-bit) at a specified address. */ - nbiterations = 2U; - 8003738: 2302 movs r3, #2 - 800373a: 757b strb r3, [r7, #21] - 800373c: e001 b.n 8003742 - } - else - { - /* Program double word (64-bit = 4*16-bit) at a specified address. */ - nbiterations = 4U; - 800373e: 2304 movs r3, #4 - 8003740: 757b strb r3, [r7, #21] - } - - for (index = 0U; index < nbiterations; index++) - 8003742: 2300 movs r3, #0 - 8003744: 75bb strb r3, [r7, #22] - 8003746: e02d b.n 80037a4 - { - FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); - 8003748: 7dbb ldrb r3, [r7, #22] - 800374a: 005a lsls r2, r3, #1 - 800374c: 68bb ldr r3, [r7, #8] - 800374e: eb02 0c03 add.w ip, r2, r3 - 8003752: 7dbb ldrb r3, [r7, #22] - 8003754: 0119 lsls r1, r3, #4 - 8003756: e9d7 2300 ldrd r2, r3, [r7] - 800375a: f1c1 0620 rsb r6, r1, #32 - 800375e: f1a1 0020 sub.w r0, r1, #32 - 8003762: fa22 f401 lsr.w r4, r2, r1 - 8003766: fa03 f606 lsl.w r6, r3, r6 - 800376a: 4334 orrs r4, r6 - 800376c: fa23 f000 lsr.w r0, r3, r0 - 8003770: 4304 orrs r4, r0 - 8003772: fa23 f501 lsr.w r5, r3, r1 - 8003776: b2a3 uxth r3, r4 - 8003778: 4619 mov r1, r3 - 800377a: 4660 mov r0, ip - 800377c: f000 f85a bl 8003834 -#if defined(FLASH_BANK2_END) - if(Address <= FLASH_BANK1_END) - { -#endif /* FLASH_BANK2_END */ - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 8003780: f24c 3050 movw r0, #50000 @ 0xc350 - 8003784: f000 f872 bl 800386c - 8003788: 4603 mov r3, r0 - 800378a: 75fb strb r3, [r7, #23] - - /* If the program operation is completed, disable the PG Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_PG); - 800378c: 4b0d ldr r3, [pc, #52] @ (80037c4 ) - 800378e: 691b ldr r3, [r3, #16] - 8003790: 4a0c ldr r2, [pc, #48] @ (80037c4 ) - 8003792: f023 0301 bic.w r3, r3, #1 - 8003796: 6113 str r3, [r2, #16] - /* If the program operation is completed, disable the PG Bit */ - CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG); - } -#endif /* FLASH_BANK2_END */ - /* In case of error, stop programation procedure */ - if (status != HAL_OK) - 8003798: 7dfb ldrb r3, [r7, #23] - 800379a: 2b00 cmp r3, #0 - 800379c: d107 bne.n 80037ae - for (index = 0U; index < nbiterations; index++) - 800379e: 7dbb ldrb r3, [r7, #22] - 80037a0: 3301 adds r3, #1 - 80037a2: 75bb strb r3, [r7, #22] - 80037a4: 7dba ldrb r2, [r7, #22] - 80037a6: 7d7b ldrb r3, [r7, #21] - 80037a8: 429a cmp r2, r3 - 80037aa: d3cd bcc.n 8003748 - 80037ac: e000 b.n 80037b0 - { - break; - 80037ae: bf00 nop - } - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - 80037b0: 4b03 ldr r3, [pc, #12] @ (80037c0 ) - 80037b2: 2200 movs r2, #0 - 80037b4: 761a strb r2, [r3, #24] - - return status; - 80037b6: 7dfb ldrb r3, [r7, #23] -} - 80037b8: 4618 mov r0, r3 - 80037ba: 371c adds r7, #28 - 80037bc: 46bd mov sp, r7 - 80037be: bdf0 pop {r4, r5, r6, r7, pc} - 80037c0: 20000768 .word 0x20000768 - 80037c4: 40022000 .word 0x40022000 - -080037c8 : -/** - * @brief Unlock the FLASH control register access - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_Unlock(void) -{ - 80037c8: b480 push {r7} - 80037ca: b083 sub sp, #12 - 80037cc: af00 add r7, sp, #0 - HAL_StatusTypeDef status = HAL_OK; - 80037ce: 2300 movs r3, #0 - 80037d0: 71fb strb r3, [r7, #7] - - if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) - 80037d2: 4b0d ldr r3, [pc, #52] @ (8003808 ) - 80037d4: 691b ldr r3, [r3, #16] - 80037d6: f003 0380 and.w r3, r3, #128 @ 0x80 - 80037da: 2b00 cmp r3, #0 - 80037dc: d00d beq.n 80037fa - { - /* Authorize the FLASH Registers access */ - WRITE_REG(FLASH->KEYR, FLASH_KEY1); - 80037de: 4b0a ldr r3, [pc, #40] @ (8003808 ) - 80037e0: 4a0a ldr r2, [pc, #40] @ (800380c ) - 80037e2: 605a str r2, [r3, #4] - WRITE_REG(FLASH->KEYR, FLASH_KEY2); - 80037e4: 4b08 ldr r3, [pc, #32] @ (8003808 ) - 80037e6: 4a0a ldr r2, [pc, #40] @ (8003810 ) - 80037e8: 605a str r2, [r3, #4] - - /* Verify Flash is unlocked */ - if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) - 80037ea: 4b07 ldr r3, [pc, #28] @ (8003808 ) - 80037ec: 691b ldr r3, [r3, #16] - 80037ee: f003 0380 and.w r3, r3, #128 @ 0x80 - 80037f2: 2b00 cmp r3, #0 - 80037f4: d001 beq.n 80037fa - { - status = HAL_ERROR; - 80037f6: 2301 movs r3, #1 - 80037f8: 71fb strb r3, [r7, #7] - status = HAL_ERROR; - } - } -#endif /* FLASH_BANK2_END */ - - return status; - 80037fa: 79fb ldrb r3, [r7, #7] -} - 80037fc: 4618 mov r0, r3 - 80037fe: 370c adds r7, #12 - 8003800: 46bd mov sp, r7 - 8003802: bc80 pop {r7} - 8003804: 4770 bx lr - 8003806: bf00 nop - 8003808: 40022000 .word 0x40022000 - 800380c: 45670123 .word 0x45670123 - 8003810: cdef89ab .word 0xcdef89ab - -08003814 : -/** - * @brief Locks the FLASH control register access - * @retval HAL Status - */ -HAL_StatusTypeDef HAL_FLASH_Lock(void) -{ - 8003814: b480 push {r7} - 8003816: af00 add r7, sp, #0 - /* Set the LOCK Bit to lock the FLASH Registers access */ - SET_BIT(FLASH->CR, FLASH_CR_LOCK); - 8003818: 4b05 ldr r3, [pc, #20] @ (8003830 ) - 800381a: 691b ldr r3, [r3, #16] - 800381c: 4a04 ldr r2, [pc, #16] @ (8003830 ) - 800381e: f043 0380 orr.w r3, r3, #128 @ 0x80 - 8003822: 6113 str r3, [r2, #16] -#if defined(FLASH_BANK2_END) - /* Set the LOCK Bit to lock the FLASH BANK2 Registers access */ - SET_BIT(FLASH->CR2, FLASH_CR2_LOCK); - -#endif /* FLASH_BANK2_END */ - return HAL_OK; - 8003824: 2300 movs r3, #0 -} - 8003826: 4618 mov r0, r3 - 8003828: 46bd mov sp, r7 - 800382a: bc80 pop {r7} - 800382c: 4770 bx lr - 800382e: bf00 nop - 8003830: 40022000 .word 0x40022000 - -08003834 : - * @param Address specify the address to be programmed. - * @param Data specify the data to be programmed. - * @retval None - */ -static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) -{ - 8003834: b480 push {r7} - 8003836: b083 sub sp, #12 - 8003838: af00 add r7, sp, #0 - 800383a: 6078 str r0, [r7, #4] - 800383c: 460b mov r3, r1 - 800383e: 807b strh r3, [r7, #2] - /* Clean the error context */ - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 8003840: 4b08 ldr r3, [pc, #32] @ (8003864 ) - 8003842: 2200 movs r2, #0 - 8003844: 61da str r2, [r3, #28] -#if defined(FLASH_BANK2_END) - if(Address <= FLASH_BANK1_END) - { -#endif /* FLASH_BANK2_END */ - /* Proceed to program the new data */ - SET_BIT(FLASH->CR, FLASH_CR_PG); - 8003846: 4b08 ldr r3, [pc, #32] @ (8003868 ) - 8003848: 691b ldr r3, [r3, #16] - 800384a: 4a07 ldr r2, [pc, #28] @ (8003868 ) - 800384c: f043 0301 orr.w r3, r3, #1 - 8003850: 6113 str r3, [r2, #16] - SET_BIT(FLASH->CR2, FLASH_CR2_PG); - } -#endif /* FLASH_BANK2_END */ - - /* Write data in the address */ - *(__IO uint16_t*)Address = Data; - 8003852: 687b ldr r3, [r7, #4] - 8003854: 887a ldrh r2, [r7, #2] - 8003856: 801a strh r2, [r3, #0] -} - 8003858: bf00 nop - 800385a: 370c adds r7, #12 - 800385c: 46bd mov sp, r7 - 800385e: bc80 pop {r7} - 8003860: 4770 bx lr - 8003862: bf00 nop - 8003864: 20000768 .word 0x20000768 - 8003868: 40022000 .word 0x40022000 - -0800386c : - * @brief Wait for a FLASH operation to complete. - * @param Timeout maximum flash operation timeout - * @retval HAL Status - */ -HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) -{ - 800386c: b580 push {r7, lr} - 800386e: b084 sub sp, #16 - 8003870: af00 add r7, sp, #0 - 8003872: 6078 str r0, [r7, #4] - /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. - Even if the FLASH operation fails, the BUSY flag will be reset and an error - flag will be set */ - - uint32_t tickstart = HAL_GetTick(); - 8003874: f7ff fb38 bl 8002ee8 - 8003878: 60f8 str r0, [r7, #12] - - while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) - 800387a: e010 b.n 800389e - { - if (Timeout != HAL_MAX_DELAY) - 800387c: 687b ldr r3, [r7, #4] - 800387e: f1b3 3fff cmp.w r3, #4294967295 - 8003882: d00c beq.n 800389e - { - if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) - 8003884: 687b ldr r3, [r7, #4] - 8003886: 2b00 cmp r3, #0 - 8003888: d007 beq.n 800389a - 800388a: f7ff fb2d bl 8002ee8 - 800388e: 4602 mov r2, r0 - 8003890: 68fb ldr r3, [r7, #12] - 8003892: 1ad3 subs r3, r2, r3 - 8003894: 687a ldr r2, [r7, #4] - 8003896: 429a cmp r2, r3 - 8003898: d201 bcs.n 800389e - { - return HAL_TIMEOUT; - 800389a: 2303 movs r3, #3 - 800389c: e025 b.n 80038ea - while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) - 800389e: 4b15 ldr r3, [pc, #84] @ (80038f4 ) - 80038a0: 68db ldr r3, [r3, #12] - 80038a2: f003 0301 and.w r3, r3, #1 - 80038a6: 2b00 cmp r3, #0 - 80038a8: d1e8 bne.n 800387c - } - } - } - - /* Check FLASH End of Operation flag */ - if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) - 80038aa: 4b12 ldr r3, [pc, #72] @ (80038f4 ) - 80038ac: 68db ldr r3, [r3, #12] - 80038ae: f003 0320 and.w r3, r3, #32 - 80038b2: 2b00 cmp r3, #0 - 80038b4: d002 beq.n 80038bc - { - /* Clear FLASH End of Operation pending bit */ - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); - 80038b6: 4b0f ldr r3, [pc, #60] @ (80038f4 ) - 80038b8: 2220 movs r2, #32 - 80038ba: 60da str r2, [r3, #12] - } - - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || - 80038bc: 4b0d ldr r3, [pc, #52] @ (80038f4 ) - 80038be: 68db ldr r3, [r3, #12] - 80038c0: f003 0310 and.w r3, r3, #16 - 80038c4: 2b00 cmp r3, #0 - 80038c6: d10b bne.n 80038e0 - __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 80038c8: 4b0a ldr r3, [pc, #40] @ (80038f4 ) - 80038ca: 69db ldr r3, [r3, #28] - 80038cc: f003 0301 and.w r3, r3, #1 - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || - 80038d0: 2b00 cmp r3, #0 - 80038d2: d105 bne.n 80038e0 - __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) - 80038d4: 4b07 ldr r3, [pc, #28] @ (80038f4 ) - 80038d6: 68db ldr r3, [r3, #12] - 80038d8: f003 0304 and.w r3, r3, #4 - __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 80038dc: 2b00 cmp r3, #0 - 80038de: d003 beq.n 80038e8 - { - /*Save the error code*/ - FLASH_SetErrorCode(); - 80038e0: f000 f80a bl 80038f8 - return HAL_ERROR; - 80038e4: 2301 movs r3, #1 - 80038e6: e000 b.n 80038ea - } - - /* There is no error flag set */ - return HAL_OK; - 80038e8: 2300 movs r3, #0 -} - 80038ea: 4618 mov r0, r3 - 80038ec: 3710 adds r7, #16 - 80038ee: 46bd mov sp, r7 - 80038f0: bd80 pop {r7, pc} - 80038f2: bf00 nop - 80038f4: 40022000 .word 0x40022000 - -080038f8 : -/** - * @brief Set the specific FLASH error flag. - * @retval None - */ -static void FLASH_SetErrorCode(void) -{ - 80038f8: b480 push {r7} - 80038fa: b083 sub sp, #12 - 80038fc: af00 add r7, sp, #0 - uint32_t flags = 0U; - 80038fe: 2300 movs r3, #0 - 8003900: 607b str r3, [r7, #4] - -#if defined(FLASH_BANK2_END) - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) -#else - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) - 8003902: 4b23 ldr r3, [pc, #140] @ (8003990 ) - 8003904: 68db ldr r3, [r3, #12] - 8003906: f003 0310 and.w r3, r3, #16 - 800390a: 2b00 cmp r3, #0 - 800390c: d009 beq.n 8003922 -#endif /* FLASH_BANK2_END */ - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; - 800390e: 4b21 ldr r3, [pc, #132] @ (8003994 ) - 8003910: 69db ldr r3, [r3, #28] - 8003912: f043 0302 orr.w r3, r3, #2 - 8003916: 4a1f ldr r2, [pc, #124] @ (8003994 ) - 8003918: 61d3 str r3, [r2, #28] -#if defined(FLASH_BANK2_END) - flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; -#else - flags |= FLASH_FLAG_WRPERR; - 800391a: 687b ldr r3, [r7, #4] - 800391c: f043 0310 orr.w r3, r3, #16 - 8003920: 607b str r3, [r7, #4] -#endif /* FLASH_BANK2_END */ - } -#if defined(FLASH_BANK2_END) - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) -#else - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) - 8003922: 4b1b ldr r3, [pc, #108] @ (8003990 ) - 8003924: 68db ldr r3, [r3, #12] - 8003926: f003 0304 and.w r3, r3, #4 - 800392a: 2b00 cmp r3, #0 - 800392c: d009 beq.n 8003942 -#endif /* FLASH_BANK2_END */ - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; - 800392e: 4b19 ldr r3, [pc, #100] @ (8003994 ) - 8003930: 69db ldr r3, [r3, #28] - 8003932: f043 0301 orr.w r3, r3, #1 - 8003936: 4a17 ldr r2, [pc, #92] @ (8003994 ) - 8003938: 61d3 str r3, [r2, #28] -#if defined(FLASH_BANK2_END) - flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; -#else - flags |= FLASH_FLAG_PGERR; - 800393a: 687b ldr r3, [r7, #4] - 800393c: f043 0304 orr.w r3, r3, #4 - 8003940: 607b str r3, [r7, #4] -#endif /* FLASH_BANK2_END */ - } - if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) - 8003942: 4b13 ldr r3, [pc, #76] @ (8003990 ) - 8003944: 69db ldr r3, [r3, #28] - 8003946: f003 0301 and.w r3, r3, #1 - 800394a: 2b00 cmp r3, #0 - 800394c: d00b beq.n 8003966 - { - pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; - 800394e: 4b11 ldr r3, [pc, #68] @ (8003994 ) - 8003950: 69db ldr r3, [r3, #28] - 8003952: f043 0304 orr.w r3, r3, #4 - 8003956: 4a0f ldr r2, [pc, #60] @ (8003994 ) - 8003958: 61d3 str r3, [r2, #28] - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); - 800395a: 4b0d ldr r3, [pc, #52] @ (8003990 ) - 800395c: 69db ldr r3, [r3, #28] - 800395e: 4a0c ldr r2, [pc, #48] @ (8003990 ) - 8003960: f023 0301 bic.w r3, r3, #1 - 8003964: 61d3 str r3, [r2, #28] - } - - /* Clear FLASH error pending bits */ - __HAL_FLASH_CLEAR_FLAG(flags); - 8003966: 687b ldr r3, [r7, #4] - 8003968: f240 1201 movw r2, #257 @ 0x101 - 800396c: 4293 cmp r3, r2 - 800396e: d106 bne.n 800397e - 8003970: 4b07 ldr r3, [pc, #28] @ (8003990 ) - 8003972: 69db ldr r3, [r3, #28] - 8003974: 4a06 ldr r2, [pc, #24] @ (8003990 ) - 8003976: f023 0301 bic.w r3, r3, #1 - 800397a: 61d3 str r3, [r2, #28] -} - 800397c: e002 b.n 8003984 - __HAL_FLASH_CLEAR_FLAG(flags); - 800397e: 4a04 ldr r2, [pc, #16] @ (8003990 ) - 8003980: 687b ldr r3, [r7, #4] - 8003982: 60d3 str r3, [r2, #12] -} - 8003984: bf00 nop - 8003986: 370c adds r7, #12 - 8003988: 46bd mov sp, r7 - 800398a: bc80 pop {r7} - 800398c: 4770 bx lr - 800398e: bf00 nop - 8003990: 40022000 .word 0x40022000 - 8003994: 20000768 .word 0x20000768 - -08003998 : - * (0xFFFFFFFF means that all the pages have been correctly erased) - * - * @retval HAL_StatusTypeDef HAL Status - */ -HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) -{ - 8003998: b580 push {r7, lr} - 800399a: b084 sub sp, #16 - 800399c: af00 add r7, sp, #0 - 800399e: 6078 str r0, [r7, #4] - 80039a0: 6039 str r1, [r7, #0] - HAL_StatusTypeDef status = HAL_ERROR; - 80039a2: 2301 movs r3, #1 - 80039a4: 73fb strb r3, [r7, #15] - uint32_t address = 0U; - 80039a6: 2300 movs r3, #0 - 80039a8: 60bb str r3, [r7, #8] - - /* Process Locked */ - __HAL_LOCK(&pFlash); - 80039aa: 4b2f ldr r3, [pc, #188] @ (8003a68 ) - 80039ac: 7e1b ldrb r3, [r3, #24] - 80039ae: 2b01 cmp r3, #1 - 80039b0: d101 bne.n 80039b6 - 80039b2: 2302 movs r3, #2 - 80039b4: e053 b.n 8003a5e - 80039b6: 4b2c ldr r3, [pc, #176] @ (8003a68 ) - 80039b8: 2201 movs r2, #1 - 80039ba: 761a strb r2, [r3, #24] - - /* Check the parameters */ - assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); - - if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) - 80039bc: 687b ldr r3, [r7, #4] - 80039be: 681b ldr r3, [r3, #0] - 80039c0: 2b02 cmp r3, #2 - 80039c2: d116 bne.n 80039f2 - else -#endif /* FLASH_BANK2_END */ - { - /* Mass Erase requested for Bank1 */ - /* Wait for last operation to be completed */ - if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) - 80039c4: f24c 3050 movw r0, #50000 @ 0xc350 - 80039c8: f7ff ff50 bl 800386c - 80039cc: 4603 mov r3, r0 - 80039ce: 2b00 cmp r3, #0 - 80039d0: d141 bne.n 8003a56 - { - /*Mass erase to be done*/ - FLASH_MassErase(FLASH_BANK_1); - 80039d2: 2001 movs r0, #1 - 80039d4: f000 f84c bl 8003a70 - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - 80039d8: f24c 3050 movw r0, #50000 @ 0xc350 - 80039dc: f7ff ff46 bl 800386c - 80039e0: 4603 mov r3, r0 - 80039e2: 73fb strb r3, [r7, #15] - - /* If the erase operation is completed, disable the MER Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_MER); - 80039e4: 4b21 ldr r3, [pc, #132] @ (8003a6c ) - 80039e6: 691b ldr r3, [r3, #16] - 80039e8: 4a20 ldr r2, [pc, #128] @ (8003a6c ) - 80039ea: f023 0304 bic.w r3, r3, #4 - 80039ee: 6113 str r3, [r2, #16] - 80039f0: e031 b.n 8003a56 - else -#endif /* FLASH_BANK2_END */ - { - /* Page Erase requested on address located on bank1 */ - /* Wait for last operation to be completed */ - if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) - 80039f2: f24c 3050 movw r0, #50000 @ 0xc350 - 80039f6: f7ff ff39 bl 800386c - 80039fa: 4603 mov r3, r0 - 80039fc: 2b00 cmp r3, #0 - 80039fe: d12a bne.n 8003a56 - { - /*Initialization of PageError variable*/ - *PageError = 0xFFFFFFFFU; - 8003a00: 683b ldr r3, [r7, #0] - 8003a02: f04f 32ff mov.w r2, #4294967295 - 8003a06: 601a str r2, [r3, #0] - - /* Erase page by page to be done*/ - for(address = pEraseInit->PageAddress; - 8003a08: 687b ldr r3, [r7, #4] - 8003a0a: 689b ldr r3, [r3, #8] - 8003a0c: 60bb str r3, [r7, #8] - 8003a0e: e019 b.n 8003a44 - address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); - address += FLASH_PAGE_SIZE) - { - FLASH_PageErase(address); - 8003a10: 68b8 ldr r0, [r7, #8] - 8003a12: f000 f849 bl 8003aa8 - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - 8003a16: f24c 3050 movw r0, #50000 @ 0xc350 - 8003a1a: f7ff ff27 bl 800386c - 8003a1e: 4603 mov r3, r0 - 8003a20: 73fb strb r3, [r7, #15] - - /* If the erase operation is completed, disable the PER Bit */ - CLEAR_BIT(FLASH->CR, FLASH_CR_PER); - 8003a22: 4b12 ldr r3, [pc, #72] @ (8003a6c ) - 8003a24: 691b ldr r3, [r3, #16] - 8003a26: 4a11 ldr r2, [pc, #68] @ (8003a6c ) - 8003a28: f023 0302 bic.w r3, r3, #2 - 8003a2c: 6113 str r3, [r2, #16] - - if (status != HAL_OK) - 8003a2e: 7bfb ldrb r3, [r7, #15] - 8003a30: 2b00 cmp r3, #0 - 8003a32: d003 beq.n 8003a3c - { - /* In case of error, stop erase procedure and return the faulty address */ - *PageError = address; - 8003a34: 683b ldr r3, [r7, #0] - 8003a36: 68ba ldr r2, [r7, #8] - 8003a38: 601a str r2, [r3, #0] - break; - 8003a3a: e00c b.n 8003a56 - address += FLASH_PAGE_SIZE) - 8003a3c: 68bb ldr r3, [r7, #8] - 8003a3e: f503 6380 add.w r3, r3, #1024 @ 0x400 - 8003a42: 60bb str r3, [r7, #8] - address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); - 8003a44: 687b ldr r3, [r7, #4] - 8003a46: 68db ldr r3, [r3, #12] - 8003a48: 029a lsls r2, r3, #10 - 8003a4a: 687b ldr r3, [r7, #4] - 8003a4c: 689b ldr r3, [r3, #8] - 8003a4e: 4413 add r3, r2 - 8003a50: 68ba ldr r2, [r7, #8] - 8003a52: 429a cmp r2, r3 - 8003a54: d3dc bcc.n 8003a10 - } - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(&pFlash); - 8003a56: 4b04 ldr r3, [pc, #16] @ (8003a68 ) - 8003a58: 2200 movs r2, #0 - 8003a5a: 761a strb r2, [r3, #24] - - return status; - 8003a5c: 7bfb ldrb r3, [r7, #15] -} - 8003a5e: 4618 mov r0, r3 - 8003a60: 3710 adds r7, #16 - 8003a62: 46bd mov sp, r7 - 8003a64: bd80 pop {r7, pc} - 8003a66: bf00 nop - 8003a68: 20000768 .word 0x20000768 - 8003a6c: 40022000 .word 0x40022000 - -08003a70 : - @endif - * - * @retval None - */ -static void FLASH_MassErase(uint32_t Banks) -{ - 8003a70: b480 push {r7} - 8003a72: b083 sub sp, #12 - 8003a74: af00 add r7, sp, #0 - 8003a76: 6078 str r0, [r7, #4] - /* Check the parameters */ - assert_param(IS_FLASH_BANK(Banks)); - - /* Clean the error context */ - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 8003a78: 4b09 ldr r3, [pc, #36] @ (8003aa0 ) - 8003a7a: 2200 movs r2, #0 - 8003a7c: 61da str r2, [r3, #28] -#if !defined(FLASH_BANK2_END) - /* Prevent unused argument(s) compilation warning */ - UNUSED(Banks); -#endif /* FLASH_BANK2_END */ - /* Only bank1 will be erased*/ - SET_BIT(FLASH->CR, FLASH_CR_MER); - 8003a7e: 4b09 ldr r3, [pc, #36] @ (8003aa4 ) - 8003a80: 691b ldr r3, [r3, #16] - 8003a82: 4a08 ldr r2, [pc, #32] @ (8003aa4 ) - 8003a84: f043 0304 orr.w r3, r3, #4 - 8003a88: 6113 str r3, [r2, #16] - SET_BIT(FLASH->CR, FLASH_CR_STRT); - 8003a8a: 4b06 ldr r3, [pc, #24] @ (8003aa4 ) - 8003a8c: 691b ldr r3, [r3, #16] - 8003a8e: 4a05 ldr r2, [pc, #20] @ (8003aa4 ) - 8003a90: f043 0340 orr.w r3, r3, #64 @ 0x40 - 8003a94: 6113 str r3, [r2, #16] -#if defined(FLASH_BANK2_END) - } -#endif /* FLASH_BANK2_END */ -} - 8003a96: bf00 nop - 8003a98: 370c adds r7, #12 - 8003a9a: 46bd mov sp, r7 - 8003a9c: bc80 pop {r7} - 8003a9e: 4770 bx lr - 8003aa0: 20000768 .word 0x20000768 - 8003aa4: 40022000 .word 0x40022000 - -08003aa8 : - * The value of this parameter depend on device used within the same series - * - * @retval None - */ -void FLASH_PageErase(uint32_t PageAddress) -{ - 8003aa8: b480 push {r7} - 8003aaa: b083 sub sp, #12 - 8003aac: af00 add r7, sp, #0 - 8003aae: 6078 str r0, [r7, #4] - /* Clean the error context */ - pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 8003ab0: 4b0b ldr r3, [pc, #44] @ (8003ae0 ) - 8003ab2: 2200 movs r2, #0 - 8003ab4: 61da str r2, [r3, #28] - } - else - { -#endif /* FLASH_BANK2_END */ - /* Proceed to erase the page */ - SET_BIT(FLASH->CR, FLASH_CR_PER); - 8003ab6: 4b0b ldr r3, [pc, #44] @ (8003ae4 ) - 8003ab8: 691b ldr r3, [r3, #16] - 8003aba: 4a0a ldr r2, [pc, #40] @ (8003ae4 ) - 8003abc: f043 0302 orr.w r3, r3, #2 - 8003ac0: 6113 str r3, [r2, #16] - WRITE_REG(FLASH->AR, PageAddress); - 8003ac2: 4a08 ldr r2, [pc, #32] @ (8003ae4 ) - 8003ac4: 687b ldr r3, [r7, #4] - 8003ac6: 6153 str r3, [r2, #20] - SET_BIT(FLASH->CR, FLASH_CR_STRT); - 8003ac8: 4b06 ldr r3, [pc, #24] @ (8003ae4 ) - 8003aca: 691b ldr r3, [r3, #16] - 8003acc: 4a05 ldr r2, [pc, #20] @ (8003ae4 ) - 8003ace: f043 0340 orr.w r3, r3, #64 @ 0x40 - 8003ad2: 6113 str r3, [r2, #16] -#if defined(FLASH_BANK2_END) - } -#endif /* FLASH_BANK2_END */ -} - 8003ad4: bf00 nop - 8003ad6: 370c adds r7, #12 - 8003ad8: 46bd mov sp, r7 - 8003ada: bc80 pop {r7} - 8003adc: 4770 bx lr - 8003ade: bf00 nop - 8003ae0: 20000768 .word 0x20000768 - 8003ae4: 40022000 .word 0x40022000 - -08003ae8 : +08003368 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8003ae8: b480 push {r7} - 8003aea: b08b sub sp, #44 @ 0x2c - 8003aec: af00 add r7, sp, #0 - 8003aee: 6078 str r0, [r7, #4] - 8003af0: 6039 str r1, [r7, #0] + 8003368: b480 push {r7} + 800336a: b08b sub sp, #44 @ 0x2c + 800336c: af00 add r7, sp, #0 + 800336e: 6078 str r0, [r7, #4] + 8003370: 6039 str r1, [r7, #0] uint32_t position = 0x00u; - 8003af2: 2300 movs r3, #0 - 8003af4: 627b str r3, [r7, #36] @ 0x24 + 8003372: 2300 movs r3, #0 + 8003374: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; - 8003af6: 2300 movs r3, #0 - 8003af8: 623b str r3, [r7, #32] + 8003376: 2300 movs r3, #0 + 8003378: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) - 8003afa: e169 b.n 8003dd0 + 800337a: e169 b.n 8003650 { /* Get the IO position */ ioposition = (0x01uL << position); - 8003afc: 2201 movs r2, #1 - 8003afe: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003b00: fa02 f303 lsl.w r3, r2, r3 - 8003b04: 61fb str r3, [r7, #28] + 800337c: 2201 movs r2, #1 + 800337e: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003380: fa02 f303 lsl.w r3, r2, r3 + 8003384: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - 8003b06: 683b ldr r3, [r7, #0] - 8003b08: 681b ldr r3, [r3, #0] - 8003b0a: 69fa ldr r2, [r7, #28] - 8003b0c: 4013 ands r3, r2 - 8003b0e: 61bb str r3, [r7, #24] + 8003386: 683b ldr r3, [r7, #0] + 8003388: 681b ldr r3, [r3, #0] + 800338a: 69fa ldr r2, [r7, #28] + 800338c: 4013 ands r3, r2 + 800338e: 61bb str r3, [r7, #24] if (iocurrent == ioposition) - 8003b10: 69ba ldr r2, [r7, #24] - 8003b12: 69fb ldr r3, [r7, #28] - 8003b14: 429a cmp r2, r3 - 8003b16: f040 8158 bne.w 8003dca + 8003390: 69ba ldr r2, [r7, #24] + 8003392: 69fb ldr r3, [r7, #28] + 8003394: 429a cmp r2, r3 + 8003396: f040 8158 bne.w 800364a { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) - 8003b1a: 683b ldr r3, [r7, #0] - 8003b1c: 685b ldr r3, [r3, #4] - 8003b1e: 4a9a ldr r2, [pc, #616] @ (8003d88 ) - 8003b20: 4293 cmp r3, r2 - 8003b22: d05e beq.n 8003be2 - 8003b24: 4a98 ldr r2, [pc, #608] @ (8003d88 ) - 8003b26: 4293 cmp r3, r2 - 8003b28: d875 bhi.n 8003c16 - 8003b2a: 4a98 ldr r2, [pc, #608] @ (8003d8c ) - 8003b2c: 4293 cmp r3, r2 - 8003b2e: d058 beq.n 8003be2 - 8003b30: 4a96 ldr r2, [pc, #600] @ (8003d8c ) - 8003b32: 4293 cmp r3, r2 - 8003b34: d86f bhi.n 8003c16 - 8003b36: 4a96 ldr r2, [pc, #600] @ (8003d90 ) - 8003b38: 4293 cmp r3, r2 - 8003b3a: d052 beq.n 8003be2 - 8003b3c: 4a94 ldr r2, [pc, #592] @ (8003d90 ) - 8003b3e: 4293 cmp r3, r2 - 8003b40: d869 bhi.n 8003c16 - 8003b42: 4a94 ldr r2, [pc, #592] @ (8003d94 ) - 8003b44: 4293 cmp r3, r2 - 8003b46: d04c beq.n 8003be2 - 8003b48: 4a92 ldr r2, [pc, #584] @ (8003d94 ) - 8003b4a: 4293 cmp r3, r2 - 8003b4c: d863 bhi.n 8003c16 - 8003b4e: 4a92 ldr r2, [pc, #584] @ (8003d98 ) - 8003b50: 4293 cmp r3, r2 - 8003b52: d046 beq.n 8003be2 - 8003b54: 4a90 ldr r2, [pc, #576] @ (8003d98 ) - 8003b56: 4293 cmp r3, r2 - 8003b58: d85d bhi.n 8003c16 - 8003b5a: 2b12 cmp r3, #18 - 8003b5c: d82a bhi.n 8003bb4 - 8003b5e: 2b12 cmp r3, #18 - 8003b60: d859 bhi.n 8003c16 - 8003b62: a201 add r2, pc, #4 @ (adr r2, 8003b68 ) - 8003b64: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8003b68: 08003be3 .word 0x08003be3 - 8003b6c: 08003bbd .word 0x08003bbd - 8003b70: 08003bcf .word 0x08003bcf - 8003b74: 08003c11 .word 0x08003c11 - 8003b78: 08003c17 .word 0x08003c17 - 8003b7c: 08003c17 .word 0x08003c17 - 8003b80: 08003c17 .word 0x08003c17 - 8003b84: 08003c17 .word 0x08003c17 - 8003b88: 08003c17 .word 0x08003c17 - 8003b8c: 08003c17 .word 0x08003c17 - 8003b90: 08003c17 .word 0x08003c17 - 8003b94: 08003c17 .word 0x08003c17 - 8003b98: 08003c17 .word 0x08003c17 - 8003b9c: 08003c17 .word 0x08003c17 - 8003ba0: 08003c17 .word 0x08003c17 - 8003ba4: 08003c17 .word 0x08003c17 - 8003ba8: 08003c17 .word 0x08003c17 - 8003bac: 08003bc5 .word 0x08003bc5 - 8003bb0: 08003bd9 .word 0x08003bd9 - 8003bb4: 4a79 ldr r2, [pc, #484] @ (8003d9c ) - 8003bb6: 4293 cmp r3, r2 - 8003bb8: d013 beq.n 8003be2 + 800339a: 683b ldr r3, [r7, #0] + 800339c: 685b ldr r3, [r3, #4] + 800339e: 4a9a ldr r2, [pc, #616] @ (8003608 ) + 80033a0: 4293 cmp r3, r2 + 80033a2: d05e beq.n 8003462 + 80033a4: 4a98 ldr r2, [pc, #608] @ (8003608 ) + 80033a6: 4293 cmp r3, r2 + 80033a8: d875 bhi.n 8003496 + 80033aa: 4a98 ldr r2, [pc, #608] @ (800360c ) + 80033ac: 4293 cmp r3, r2 + 80033ae: d058 beq.n 8003462 + 80033b0: 4a96 ldr r2, [pc, #600] @ (800360c ) + 80033b2: 4293 cmp r3, r2 + 80033b4: d86f bhi.n 8003496 + 80033b6: 4a96 ldr r2, [pc, #600] @ (8003610 ) + 80033b8: 4293 cmp r3, r2 + 80033ba: d052 beq.n 8003462 + 80033bc: 4a94 ldr r2, [pc, #592] @ (8003610 ) + 80033be: 4293 cmp r3, r2 + 80033c0: d869 bhi.n 8003496 + 80033c2: 4a94 ldr r2, [pc, #592] @ (8003614 ) + 80033c4: 4293 cmp r3, r2 + 80033c6: d04c beq.n 8003462 + 80033c8: 4a92 ldr r2, [pc, #584] @ (8003614 ) + 80033ca: 4293 cmp r3, r2 + 80033cc: d863 bhi.n 8003496 + 80033ce: 4a92 ldr r2, [pc, #584] @ (8003618 ) + 80033d0: 4293 cmp r3, r2 + 80033d2: d046 beq.n 8003462 + 80033d4: 4a90 ldr r2, [pc, #576] @ (8003618 ) + 80033d6: 4293 cmp r3, r2 + 80033d8: d85d bhi.n 8003496 + 80033da: 2b12 cmp r3, #18 + 80033dc: d82a bhi.n 8003434 + 80033de: 2b12 cmp r3, #18 + 80033e0: d859 bhi.n 8003496 + 80033e2: a201 add r2, pc, #4 @ (adr r2, 80033e8 ) + 80033e4: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80033e8: 08003463 .word 0x08003463 + 80033ec: 0800343d .word 0x0800343d + 80033f0: 0800344f .word 0x0800344f + 80033f4: 08003491 .word 0x08003491 + 80033f8: 08003497 .word 0x08003497 + 80033fc: 08003497 .word 0x08003497 + 8003400: 08003497 .word 0x08003497 + 8003404: 08003497 .word 0x08003497 + 8003408: 08003497 .word 0x08003497 + 800340c: 08003497 .word 0x08003497 + 8003410: 08003497 .word 0x08003497 + 8003414: 08003497 .word 0x08003497 + 8003418: 08003497 .word 0x08003497 + 800341c: 08003497 .word 0x08003497 + 8003420: 08003497 .word 0x08003497 + 8003424: 08003497 .word 0x08003497 + 8003428: 08003497 .word 0x08003497 + 800342c: 08003445 .word 0x08003445 + 8003430: 08003459 .word 0x08003459 + 8003434: 4a79 ldr r2, [pc, #484] @ (800361c ) + 8003436: 4293 cmp r3, r2 + 8003438: d013 beq.n 8003462 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; - 8003bba: e02c b.n 8003c16 + 800343a: e02c b.n 8003496 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; - 8003bbc: 683b ldr r3, [r7, #0] - 8003bbe: 68db ldr r3, [r3, #12] - 8003bc0: 623b str r3, [r7, #32] + 800343c: 683b ldr r3, [r7, #0] + 800343e: 68db ldr r3, [r3, #12] + 8003440: 623b str r3, [r7, #32] break; - 8003bc2: e029 b.n 8003c18 + 8003442: e029 b.n 8003498 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; - 8003bc4: 683b ldr r3, [r7, #0] - 8003bc6: 68db ldr r3, [r3, #12] - 8003bc8: 3304 adds r3, #4 - 8003bca: 623b str r3, [r7, #32] + 8003444: 683b ldr r3, [r7, #0] + 8003446: 68db ldr r3, [r3, #12] + 8003448: 3304 adds r3, #4 + 800344a: 623b str r3, [r7, #32] break; - 8003bcc: e024 b.n 8003c18 + 800344c: e024 b.n 8003498 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; - 8003bce: 683b ldr r3, [r7, #0] - 8003bd0: 68db ldr r3, [r3, #12] - 8003bd2: 3308 adds r3, #8 - 8003bd4: 623b str r3, [r7, #32] + 800344e: 683b ldr r3, [r7, #0] + 8003450: 68db ldr r3, [r3, #12] + 8003452: 3308 adds r3, #8 + 8003454: 623b str r3, [r7, #32] break; - 8003bd6: e01f b.n 8003c18 + 8003456: e01f b.n 8003498 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; - 8003bd8: 683b ldr r3, [r7, #0] - 8003bda: 68db ldr r3, [r3, #12] - 8003bdc: 330c adds r3, #12 - 8003bde: 623b str r3, [r7, #32] + 8003458: 683b ldr r3, [r7, #0] + 800345a: 68db ldr r3, [r3, #12] + 800345c: 330c adds r3, #12 + 800345e: 623b str r3, [r7, #32] break; - 8003be0: e01a b.n 8003c18 + 8003460: e01a b.n 8003498 if (GPIO_Init->Pull == GPIO_NOPULL) - 8003be2: 683b ldr r3, [r7, #0] - 8003be4: 689b ldr r3, [r3, #8] - 8003be6: 2b00 cmp r3, #0 - 8003be8: d102 bne.n 8003bf0 + 8003462: 683b ldr r3, [r7, #0] + 8003464: 689b ldr r3, [r3, #8] + 8003466: 2b00 cmp r3, #0 + 8003468: d102 bne.n 8003470 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; - 8003bea: 2304 movs r3, #4 - 8003bec: 623b str r3, [r7, #32] + 800346a: 2304 movs r3, #4 + 800346c: 623b str r3, [r7, #32] break; - 8003bee: e013 b.n 8003c18 + 800346e: e013 b.n 8003498 else if (GPIO_Init->Pull == GPIO_PULLUP) - 8003bf0: 683b ldr r3, [r7, #0] - 8003bf2: 689b ldr r3, [r3, #8] - 8003bf4: 2b01 cmp r3, #1 - 8003bf6: d105 bne.n 8003c04 + 8003470: 683b ldr r3, [r7, #0] + 8003472: 689b ldr r3, [r3, #8] + 8003474: 2b01 cmp r3, #1 + 8003476: d105 bne.n 8003484 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 8003bf8: 2308 movs r3, #8 - 8003bfa: 623b str r3, [r7, #32] + 8003478: 2308 movs r3, #8 + 800347a: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; - 8003bfc: 687b ldr r3, [r7, #4] - 8003bfe: 69fa ldr r2, [r7, #28] - 8003c00: 611a str r2, [r3, #16] + 800347c: 687b ldr r3, [r7, #4] + 800347e: 69fa ldr r2, [r7, #28] + 8003480: 611a str r2, [r3, #16] break; - 8003c02: e009 b.n 8003c18 + 8003482: e009 b.n 8003498 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 8003c04: 2308 movs r3, #8 - 8003c06: 623b str r3, [r7, #32] + 8003484: 2308 movs r3, #8 + 8003486: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; - 8003c08: 687b ldr r3, [r7, #4] - 8003c0a: 69fa ldr r2, [r7, #28] - 8003c0c: 615a str r2, [r3, #20] + 8003488: 687b ldr r3, [r7, #4] + 800348a: 69fa ldr r2, [r7, #28] + 800348c: 615a str r2, [r3, #20] break; - 8003c0e: e003 b.n 8003c18 + 800348e: e003 b.n 8003498 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; - 8003c10: 2300 movs r3, #0 - 8003c12: 623b str r3, [r7, #32] + 8003490: 2300 movs r3, #0 + 8003492: 623b str r3, [r7, #32] break; - 8003c14: e000 b.n 8003c18 + 8003494: e000 b.n 8003498 break; - 8003c16: bf00 nop + 8003496: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; - 8003c18: 69bb ldr r3, [r7, #24] - 8003c1a: 2bff cmp r3, #255 @ 0xff - 8003c1c: d801 bhi.n 8003c22 - 8003c1e: 687b ldr r3, [r7, #4] - 8003c20: e001 b.n 8003c26 - 8003c22: 687b ldr r3, [r7, #4] - 8003c24: 3304 adds r3, #4 - 8003c26: 617b str r3, [r7, #20] + 8003498: 69bb ldr r3, [r7, #24] + 800349a: 2bff cmp r3, #255 @ 0xff + 800349c: d801 bhi.n 80034a2 + 800349e: 687b ldr r3, [r7, #4] + 80034a0: e001 b.n 80034a6 + 80034a2: 687b ldr r3, [r7, #4] + 80034a4: 3304 adds r3, #4 + 80034a6: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); - 8003c28: 69bb ldr r3, [r7, #24] - 8003c2a: 2bff cmp r3, #255 @ 0xff - 8003c2c: d802 bhi.n 8003c34 - 8003c2e: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003c30: 009b lsls r3, r3, #2 - 8003c32: e002 b.n 8003c3a - 8003c34: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003c36: 3b08 subs r3, #8 - 8003c38: 009b lsls r3, r3, #2 - 8003c3a: 613b str r3, [r7, #16] + 80034a8: 69bb ldr r3, [r7, #24] + 80034aa: 2bff cmp r3, #255 @ 0xff + 80034ac: d802 bhi.n 80034b4 + 80034ae: 6a7b ldr r3, [r7, #36] @ 0x24 + 80034b0: 009b lsls r3, r3, #2 + 80034b2: e002 b.n 80034ba + 80034b4: 6a7b ldr r3, [r7, #36] @ 0x24 + 80034b6: 3b08 subs r3, #8 + 80034b8: 009b lsls r3, r3, #2 + 80034ba: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); - 8003c3c: 697b ldr r3, [r7, #20] - 8003c3e: 681a ldr r2, [r3, #0] - 8003c40: 210f movs r1, #15 - 8003c42: 693b ldr r3, [r7, #16] - 8003c44: fa01 f303 lsl.w r3, r1, r3 - 8003c48: 43db mvns r3, r3 - 8003c4a: 401a ands r2, r3 - 8003c4c: 6a39 ldr r1, [r7, #32] - 8003c4e: 693b ldr r3, [r7, #16] - 8003c50: fa01 f303 lsl.w r3, r1, r3 - 8003c54: 431a orrs r2, r3 - 8003c56: 697b ldr r3, [r7, #20] - 8003c58: 601a str r2, [r3, #0] + 80034bc: 697b ldr r3, [r7, #20] + 80034be: 681a ldr r2, [r3, #0] + 80034c0: 210f movs r1, #15 + 80034c2: 693b ldr r3, [r7, #16] + 80034c4: fa01 f303 lsl.w r3, r1, r3 + 80034c8: 43db mvns r3, r3 + 80034ca: 401a ands r2, r3 + 80034cc: 6a39 ldr r1, [r7, #32] + 80034ce: 693b ldr r3, [r7, #16] + 80034d0: fa01 f303 lsl.w r3, r1, r3 + 80034d4: 431a orrs r2, r3 + 80034d6: 697b ldr r3, [r7, #20] + 80034d8: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 8003c5a: 683b ldr r3, [r7, #0] - 8003c5c: 685b ldr r3, [r3, #4] - 8003c5e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8003c62: 2b00 cmp r3, #0 - 8003c64: f000 80b1 beq.w 8003dca + 80034da: 683b ldr r3, [r7, #0] + 80034dc: 685b ldr r3, [r3, #4] + 80034de: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80034e2: 2b00 cmp r3, #0 + 80034e4: f000 80b1 beq.w 800364a { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); - 8003c68: 4b4d ldr r3, [pc, #308] @ (8003da0 ) - 8003c6a: 699b ldr r3, [r3, #24] - 8003c6c: 4a4c ldr r2, [pc, #304] @ (8003da0 ) - 8003c6e: f043 0301 orr.w r3, r3, #1 - 8003c72: 6193 str r3, [r2, #24] - 8003c74: 4b4a ldr r3, [pc, #296] @ (8003da0 ) - 8003c76: 699b ldr r3, [r3, #24] - 8003c78: f003 0301 and.w r3, r3, #1 - 8003c7c: 60bb str r3, [r7, #8] - 8003c7e: 68bb ldr r3, [r7, #8] + 80034e8: 4b4d ldr r3, [pc, #308] @ (8003620 ) + 80034ea: 699b ldr r3, [r3, #24] + 80034ec: 4a4c ldr r2, [pc, #304] @ (8003620 ) + 80034ee: f043 0301 orr.w r3, r3, #1 + 80034f2: 6193 str r3, [r2, #24] + 80034f4: 4b4a ldr r3, [pc, #296] @ (8003620 ) + 80034f6: 699b ldr r3, [r3, #24] + 80034f8: f003 0301 and.w r3, r3, #1 + 80034fc: 60bb str r3, [r7, #8] + 80034fe: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; - 8003c80: 4a48 ldr r2, [pc, #288] @ (8003da4 ) - 8003c82: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003c84: 089b lsrs r3, r3, #2 - 8003c86: 3302 adds r3, #2 - 8003c88: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8003c8c: 60fb str r3, [r7, #12] + 8003500: 4a48 ldr r2, [pc, #288] @ (8003624 ) + 8003502: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003504: 089b lsrs r3, r3, #2 + 8003506: 3302 adds r3, #2 + 8003508: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 800350c: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); - 8003c8e: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003c90: f003 0303 and.w r3, r3, #3 - 8003c94: 009b lsls r3, r3, #2 - 8003c96: 220f movs r2, #15 - 8003c98: fa02 f303 lsl.w r3, r2, r3 - 8003c9c: 43db mvns r3, r3 - 8003c9e: 68fa ldr r2, [r7, #12] - 8003ca0: 4013 ands r3, r2 - 8003ca2: 60fb str r3, [r7, #12] + 800350e: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003510: f003 0303 and.w r3, r3, #3 + 8003514: 009b lsls r3, r3, #2 + 8003516: 220f movs r2, #15 + 8003518: fa02 f303 lsl.w r3, r2, r3 + 800351c: 43db mvns r3, r3 + 800351e: 68fa ldr r2, [r7, #12] + 8003520: 4013 ands r3, r2 + 8003522: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); - 8003ca4: 687b ldr r3, [r7, #4] - 8003ca6: 4a40 ldr r2, [pc, #256] @ (8003da8 ) - 8003ca8: 4293 cmp r3, r2 - 8003caa: d013 beq.n 8003cd4 - 8003cac: 687b ldr r3, [r7, #4] - 8003cae: 4a3f ldr r2, [pc, #252] @ (8003dac ) - 8003cb0: 4293 cmp r3, r2 - 8003cb2: d00d beq.n 8003cd0 - 8003cb4: 687b ldr r3, [r7, #4] - 8003cb6: 4a3e ldr r2, [pc, #248] @ (8003db0 ) - 8003cb8: 4293 cmp r3, r2 - 8003cba: d007 beq.n 8003ccc - 8003cbc: 687b ldr r3, [r7, #4] - 8003cbe: 4a3d ldr r2, [pc, #244] @ (8003db4 ) - 8003cc0: 4293 cmp r3, r2 - 8003cc2: d101 bne.n 8003cc8 - 8003cc4: 2303 movs r3, #3 - 8003cc6: e006 b.n 8003cd6 - 8003cc8: 2304 movs r3, #4 - 8003cca: e004 b.n 8003cd6 - 8003ccc: 2302 movs r3, #2 - 8003cce: e002 b.n 8003cd6 - 8003cd0: 2301 movs r3, #1 - 8003cd2: e000 b.n 8003cd6 - 8003cd4: 2300 movs r3, #0 - 8003cd6: 6a7a ldr r2, [r7, #36] @ 0x24 - 8003cd8: f002 0203 and.w r2, r2, #3 - 8003cdc: 0092 lsls r2, r2, #2 - 8003cde: 4093 lsls r3, r2 - 8003ce0: 68fa ldr r2, [r7, #12] - 8003ce2: 4313 orrs r3, r2 - 8003ce4: 60fb str r3, [r7, #12] + 8003524: 687b ldr r3, [r7, #4] + 8003526: 4a40 ldr r2, [pc, #256] @ (8003628 ) + 8003528: 4293 cmp r3, r2 + 800352a: d013 beq.n 8003554 + 800352c: 687b ldr r3, [r7, #4] + 800352e: 4a3f ldr r2, [pc, #252] @ (800362c ) + 8003530: 4293 cmp r3, r2 + 8003532: d00d beq.n 8003550 + 8003534: 687b ldr r3, [r7, #4] + 8003536: 4a3e ldr r2, [pc, #248] @ (8003630 ) + 8003538: 4293 cmp r3, r2 + 800353a: d007 beq.n 800354c + 800353c: 687b ldr r3, [r7, #4] + 800353e: 4a3d ldr r2, [pc, #244] @ (8003634 ) + 8003540: 4293 cmp r3, r2 + 8003542: d101 bne.n 8003548 + 8003544: 2303 movs r3, #3 + 8003546: e006 b.n 8003556 + 8003548: 2304 movs r3, #4 + 800354a: e004 b.n 8003556 + 800354c: 2302 movs r3, #2 + 800354e: e002 b.n 8003556 + 8003550: 2301 movs r3, #1 + 8003552: e000 b.n 8003556 + 8003554: 2300 movs r3, #0 + 8003556: 6a7a ldr r2, [r7, #36] @ 0x24 + 8003558: f002 0203 and.w r2, r2, #3 + 800355c: 0092 lsls r2, r2, #2 + 800355e: 4093 lsls r3, r2 + 8003560: 68fa ldr r2, [r7, #12] + 8003562: 4313 orrs r3, r2 + 8003564: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; - 8003ce6: 492f ldr r1, [pc, #188] @ (8003da4 ) - 8003ce8: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003cea: 089b lsrs r3, r3, #2 - 8003cec: 3302 adds r3, #2 - 8003cee: 68fa ldr r2, [r7, #12] - 8003cf0: f841 2023 str.w r2, [r1, r3, lsl #2] + 8003566: 492f ldr r1, [pc, #188] @ (8003624 ) + 8003568: 6a7b ldr r3, [r7, #36] @ 0x24 + 800356a: 089b lsrs r3, r3, #2 + 800356c: 3302 adds r3, #2 + 800356e: 68fa ldr r2, [r7, #12] + 8003570: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 8003cf4: 683b ldr r3, [r7, #0] - 8003cf6: 685b ldr r3, [r3, #4] - 8003cf8: f403 1380 and.w r3, r3, #1048576 @ 0x100000 - 8003cfc: 2b00 cmp r3, #0 - 8003cfe: d006 beq.n 8003d0e + 8003574: 683b ldr r3, [r7, #0] + 8003576: 685b ldr r3, [r3, #4] + 8003578: f403 1380 and.w r3, r3, #1048576 @ 0x100000 + 800357c: 2b00 cmp r3, #0 + 800357e: d006 beq.n 800358e { SET_BIT(EXTI->RTSR, iocurrent); - 8003d00: 4b2d ldr r3, [pc, #180] @ (8003db8 ) - 8003d02: 689a ldr r2, [r3, #8] - 8003d04: 492c ldr r1, [pc, #176] @ (8003db8 ) - 8003d06: 69bb ldr r3, [r7, #24] - 8003d08: 4313 orrs r3, r2 - 8003d0a: 608b str r3, [r1, #8] - 8003d0c: e006 b.n 8003d1c + 8003580: 4b2d ldr r3, [pc, #180] @ (8003638 ) + 8003582: 689a ldr r2, [r3, #8] + 8003584: 492c ldr r1, [pc, #176] @ (8003638 ) + 8003586: 69bb ldr r3, [r7, #24] + 8003588: 4313 orrs r3, r2 + 800358a: 608b str r3, [r1, #8] + 800358c: e006 b.n 800359c } else { CLEAR_BIT(EXTI->RTSR, iocurrent); - 8003d0e: 4b2a ldr r3, [pc, #168] @ (8003db8 ) - 8003d10: 689a ldr r2, [r3, #8] - 8003d12: 69bb ldr r3, [r7, #24] - 8003d14: 43db mvns r3, r3 - 8003d16: 4928 ldr r1, [pc, #160] @ (8003db8 ) - 8003d18: 4013 ands r3, r2 - 8003d1a: 608b str r3, [r1, #8] + 800358e: 4b2a ldr r3, [pc, #168] @ (8003638 ) + 8003590: 689a ldr r2, [r3, #8] + 8003592: 69bb ldr r3, [r7, #24] + 8003594: 43db mvns r3, r3 + 8003596: 4928 ldr r1, [pc, #160] @ (8003638 ) + 8003598: 4013 ands r3, r2 + 800359a: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 8003d1c: 683b ldr r3, [r7, #0] - 8003d1e: 685b ldr r3, [r3, #4] - 8003d20: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 8003d24: 2b00 cmp r3, #0 - 8003d26: d006 beq.n 8003d36 + 800359c: 683b ldr r3, [r7, #0] + 800359e: 685b ldr r3, [r3, #4] + 80035a0: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 80035a4: 2b00 cmp r3, #0 + 80035a6: d006 beq.n 80035b6 { SET_BIT(EXTI->FTSR, iocurrent); - 8003d28: 4b23 ldr r3, [pc, #140] @ (8003db8 ) - 8003d2a: 68da ldr r2, [r3, #12] - 8003d2c: 4922 ldr r1, [pc, #136] @ (8003db8 ) - 8003d2e: 69bb ldr r3, [r7, #24] - 8003d30: 4313 orrs r3, r2 - 8003d32: 60cb str r3, [r1, #12] - 8003d34: e006 b.n 8003d44 + 80035a8: 4b23 ldr r3, [pc, #140] @ (8003638 ) + 80035aa: 68da ldr r2, [r3, #12] + 80035ac: 4922 ldr r1, [pc, #136] @ (8003638 ) + 80035ae: 69bb ldr r3, [r7, #24] + 80035b0: 4313 orrs r3, r2 + 80035b2: 60cb str r3, [r1, #12] + 80035b4: e006 b.n 80035c4 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); - 8003d36: 4b20 ldr r3, [pc, #128] @ (8003db8 ) - 8003d38: 68da ldr r2, [r3, #12] - 8003d3a: 69bb ldr r3, [r7, #24] - 8003d3c: 43db mvns r3, r3 - 8003d3e: 491e ldr r1, [pc, #120] @ (8003db8 ) - 8003d40: 4013 ands r3, r2 - 8003d42: 60cb str r3, [r1, #12] + 80035b6: 4b20 ldr r3, [pc, #128] @ (8003638 ) + 80035b8: 68da ldr r2, [r3, #12] + 80035ba: 69bb ldr r3, [r7, #24] + 80035bc: 43db mvns r3, r3 + 80035be: 491e ldr r1, [pc, #120] @ (8003638 ) + 80035c0: 4013 ands r3, r2 + 80035c2: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 8003d44: 683b ldr r3, [r7, #0] - 8003d46: 685b ldr r3, [r3, #4] - 8003d48: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8003d4c: 2b00 cmp r3, #0 - 8003d4e: d006 beq.n 8003d5e + 80035c4: 683b ldr r3, [r7, #0] + 80035c6: 685b ldr r3, [r3, #4] + 80035c8: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 80035cc: 2b00 cmp r3, #0 + 80035ce: d006 beq.n 80035de { SET_BIT(EXTI->EMR, iocurrent); - 8003d50: 4b19 ldr r3, [pc, #100] @ (8003db8 ) - 8003d52: 685a ldr r2, [r3, #4] - 8003d54: 4918 ldr r1, [pc, #96] @ (8003db8 ) - 8003d56: 69bb ldr r3, [r7, #24] - 8003d58: 4313 orrs r3, r2 - 8003d5a: 604b str r3, [r1, #4] - 8003d5c: e006 b.n 8003d6c + 80035d0: 4b19 ldr r3, [pc, #100] @ (8003638 ) + 80035d2: 685a ldr r2, [r3, #4] + 80035d4: 4918 ldr r1, [pc, #96] @ (8003638 ) + 80035d6: 69bb ldr r3, [r7, #24] + 80035d8: 4313 orrs r3, r2 + 80035da: 604b str r3, [r1, #4] + 80035dc: e006 b.n 80035ec } else { CLEAR_BIT(EXTI->EMR, iocurrent); - 8003d5e: 4b16 ldr r3, [pc, #88] @ (8003db8 ) - 8003d60: 685a ldr r2, [r3, #4] - 8003d62: 69bb ldr r3, [r7, #24] - 8003d64: 43db mvns r3, r3 - 8003d66: 4914 ldr r1, [pc, #80] @ (8003db8 ) - 8003d68: 4013 ands r3, r2 - 8003d6a: 604b str r3, [r1, #4] + 80035de: 4b16 ldr r3, [pc, #88] @ (8003638 ) + 80035e0: 685a ldr r2, [r3, #4] + 80035e2: 69bb ldr r3, [r7, #24] + 80035e4: 43db mvns r3, r3 + 80035e6: 4914 ldr r1, [pc, #80] @ (8003638 ) + 80035e8: 4013 ands r3, r2 + 80035ea: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 8003d6c: 683b ldr r3, [r7, #0] - 8003d6e: 685b ldr r3, [r3, #4] - 8003d70: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8003d74: 2b00 cmp r3, #0 - 8003d76: d021 beq.n 8003dbc + 80035ec: 683b ldr r3, [r7, #0] + 80035ee: 685b ldr r3, [r3, #4] + 80035f0: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 80035f4: 2b00 cmp r3, #0 + 80035f6: d021 beq.n 800363c { SET_BIT(EXTI->IMR, iocurrent); - 8003d78: 4b0f ldr r3, [pc, #60] @ (8003db8 ) - 8003d7a: 681a ldr r2, [r3, #0] - 8003d7c: 490e ldr r1, [pc, #56] @ (8003db8 ) - 8003d7e: 69bb ldr r3, [r7, #24] - 8003d80: 4313 orrs r3, r2 - 8003d82: 600b str r3, [r1, #0] - 8003d84: e021 b.n 8003dca - 8003d86: bf00 nop - 8003d88: 10320000 .word 0x10320000 - 8003d8c: 10310000 .word 0x10310000 - 8003d90: 10220000 .word 0x10220000 - 8003d94: 10210000 .word 0x10210000 - 8003d98: 10120000 .word 0x10120000 - 8003d9c: 10110000 .word 0x10110000 - 8003da0: 40021000 .word 0x40021000 - 8003da4: 40010000 .word 0x40010000 - 8003da8: 40010800 .word 0x40010800 - 8003dac: 40010c00 .word 0x40010c00 - 8003db0: 40011000 .word 0x40011000 - 8003db4: 40011400 .word 0x40011400 - 8003db8: 40010400 .word 0x40010400 + 80035f8: 4b0f ldr r3, [pc, #60] @ (8003638 ) + 80035fa: 681a ldr r2, [r3, #0] + 80035fc: 490e ldr r1, [pc, #56] @ (8003638 ) + 80035fe: 69bb ldr r3, [r7, #24] + 8003600: 4313 orrs r3, r2 + 8003602: 600b str r3, [r1, #0] + 8003604: e021 b.n 800364a + 8003606: bf00 nop + 8003608: 10320000 .word 0x10320000 + 800360c: 10310000 .word 0x10310000 + 8003610: 10220000 .word 0x10220000 + 8003614: 10210000 .word 0x10210000 + 8003618: 10120000 .word 0x10120000 + 800361c: 10110000 .word 0x10110000 + 8003620: 40021000 .word 0x40021000 + 8003624: 40010000 .word 0x40010000 + 8003628: 40010800 .word 0x40010800 + 800362c: 40010c00 .word 0x40010c00 + 8003630: 40011000 .word 0x40011000 + 8003634: 40011400 .word 0x40011400 + 8003638: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); - 8003dbc: 4b0b ldr r3, [pc, #44] @ (8003dec ) - 8003dbe: 681a ldr r2, [r3, #0] - 8003dc0: 69bb ldr r3, [r7, #24] - 8003dc2: 43db mvns r3, r3 - 8003dc4: 4909 ldr r1, [pc, #36] @ (8003dec ) - 8003dc6: 4013 ands r3, r2 - 8003dc8: 600b str r3, [r1, #0] + 800363c: 4b0b ldr r3, [pc, #44] @ (800366c ) + 800363e: 681a ldr r2, [r3, #0] + 8003640: 69bb ldr r3, [r7, #24] + 8003642: 43db mvns r3, r3 + 8003644: 4909 ldr r1, [pc, #36] @ (800366c ) + 8003646: 4013 ands r3, r2 + 8003648: 600b str r3, [r1, #0] } } } position++; - 8003dca: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003dcc: 3301 adds r3, #1 - 8003dce: 627b str r3, [r7, #36] @ 0x24 + 800364a: 6a7b ldr r3, [r7, #36] @ 0x24 + 800364c: 3301 adds r3, #1 + 800364e: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) - 8003dd0: 683b ldr r3, [r7, #0] - 8003dd2: 681a ldr r2, [r3, #0] - 8003dd4: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003dd6: fa22 f303 lsr.w r3, r2, r3 - 8003dda: 2b00 cmp r3, #0 - 8003ddc: f47f ae8e bne.w 8003afc + 8003650: 683b ldr r3, [r7, #0] + 8003652: 681a ldr r2, [r3, #0] + 8003654: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003656: fa22 f303 lsr.w r3, r2, r3 + 800365a: 2b00 cmp r3, #0 + 800365c: f47f ae8e bne.w 800337c } } - 8003de0: bf00 nop - 8003de2: bf00 nop - 8003de4: 372c adds r7, #44 @ 0x2c - 8003de6: 46bd mov sp, r7 - 8003de8: bc80 pop {r7} - 8003dea: 4770 bx lr - 8003dec: 40010400 .word 0x40010400 + 8003660: bf00 nop + 8003662: bf00 nop + 8003664: 372c adds r7, #44 @ 0x2c + 8003666: 46bd mov sp, r7 + 8003668: bc80 pop {r7} + 800366a: 4770 bx lr + 800366c: 40010400 .word 0x40010400 -08003df0 : +08003670 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 8003df0: b480 push {r7} - 8003df2: b085 sub sp, #20 - 8003df4: af00 add r7, sp, #0 - 8003df6: 6078 str r0, [r7, #4] - 8003df8: 460b mov r3, r1 - 8003dfa: 807b strh r3, [r7, #2] + 8003670: b480 push {r7} + 8003672: b085 sub sp, #20 + 8003674: af00 add r7, sp, #0 + 8003676: 6078 str r0, [r7, #4] + 8003678: 460b mov r3, r1 + 800367a: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - 8003dfc: 687b ldr r3, [r7, #4] - 8003dfe: 689a ldr r2, [r3, #8] - 8003e00: 887b ldrh r3, [r7, #2] - 8003e02: 4013 ands r3, r2 - 8003e04: 2b00 cmp r3, #0 - 8003e06: d002 beq.n 8003e0e + 800367c: 687b ldr r3, [r7, #4] + 800367e: 689a ldr r2, [r3, #8] + 8003680: 887b ldrh r3, [r7, #2] + 8003682: 4013 ands r3, r2 + 8003684: 2b00 cmp r3, #0 + 8003686: d002 beq.n 800368e { bitstatus = GPIO_PIN_SET; - 8003e08: 2301 movs r3, #1 - 8003e0a: 73fb strb r3, [r7, #15] - 8003e0c: e001 b.n 8003e12 + 8003688: 2301 movs r3, #1 + 800368a: 73fb strb r3, [r7, #15] + 800368c: e001 b.n 8003692 } else { bitstatus = GPIO_PIN_RESET; - 8003e0e: 2300 movs r3, #0 - 8003e10: 73fb strb r3, [r7, #15] + 800368e: 2300 movs r3, #0 + 8003690: 73fb strb r3, [r7, #15] } return bitstatus; - 8003e12: 7bfb ldrb r3, [r7, #15] + 8003692: 7bfb ldrb r3, [r7, #15] } - 8003e14: 4618 mov r0, r3 - 8003e16: 3714 adds r7, #20 - 8003e18: 46bd mov sp, r7 - 8003e1a: bc80 pop {r7} - 8003e1c: 4770 bx lr + 8003694: 4618 mov r0, r3 + 8003696: 3714 adds r7, #20 + 8003698: 46bd mov sp, r7 + 800369a: bc80 pop {r7} + 800369c: 4770 bx lr -08003e1e : +0800369e : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8003e1e: b480 push {r7} - 8003e20: b083 sub sp, #12 - 8003e22: af00 add r7, sp, #0 - 8003e24: 6078 str r0, [r7, #4] - 8003e26: 460b mov r3, r1 - 8003e28: 807b strh r3, [r7, #2] - 8003e2a: 4613 mov r3, r2 - 8003e2c: 707b strb r3, [r7, #1] + 800369e: b480 push {r7} + 80036a0: b083 sub sp, #12 + 80036a2: af00 add r7, sp, #0 + 80036a4: 6078 str r0, [r7, #4] + 80036a6: 460b mov r3, r1 + 80036a8: 807b strh r3, [r7, #2] + 80036aa: 4613 mov r3, r2 + 80036ac: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 8003e2e: 787b ldrb r3, [r7, #1] - 8003e30: 2b00 cmp r3, #0 - 8003e32: d003 beq.n 8003e3c + 80036ae: 787b ldrb r3, [r7, #1] + 80036b0: 2b00 cmp r3, #0 + 80036b2: d003 beq.n 80036bc { GPIOx->BSRR = GPIO_Pin; - 8003e34: 887a ldrh r2, [r7, #2] - 8003e36: 687b ldr r3, [r7, #4] - 8003e38: 611a str r2, [r3, #16] + 80036b4: 887a ldrh r2, [r7, #2] + 80036b6: 687b ldr r3, [r7, #4] + 80036b8: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } - 8003e3a: e003 b.n 8003e44 + 80036ba: e003 b.n 80036c4 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; - 8003e3c: 887b ldrh r3, [r7, #2] - 8003e3e: 041a lsls r2, r3, #16 - 8003e40: 687b ldr r3, [r7, #4] - 8003e42: 611a str r2, [r3, #16] + 80036bc: 887b ldrh r3, [r7, #2] + 80036be: 041a lsls r2, r3, #16 + 80036c0: 687b ldr r3, [r7, #4] + 80036c2: 611a str r2, [r3, #16] } - 8003e44: bf00 nop - 8003e46: 370c adds r7, #12 - 8003e48: 46bd mov sp, r7 - 8003e4a: bc80 pop {r7} - 8003e4c: 4770 bx lr + 80036c4: bf00 nop + 80036c6: 370c adds r7, #12 + 80036c8: 46bd mov sp, r7 + 80036ca: bc80 pop {r7} + 80036cc: 4770 bx lr -08003e4e : +080036ce : * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral * @param GPIO_Pin: Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 8003e4e: b480 push {r7} - 8003e50: b085 sub sp, #20 - 8003e52: af00 add r7, sp, #0 - 8003e54: 6078 str r0, [r7, #4] - 8003e56: 460b mov r3, r1 - 8003e58: 807b strh r3, [r7, #2] + 80036ce: b480 push {r7} + 80036d0: b085 sub sp, #20 + 80036d2: af00 add r7, sp, #0 + 80036d4: 6078 str r0, [r7, #4] + 80036d6: 460b mov r3, r1 + 80036d8: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; - 8003e5a: 687b ldr r3, [r7, #4] - 8003e5c: 68db ldr r3, [r3, #12] - 8003e5e: 60fb str r3, [r7, #12] + 80036da: 687b ldr r3, [r7, #4] + 80036dc: 68db ldr r3, [r3, #12] + 80036de: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); - 8003e60: 887a ldrh r2, [r7, #2] - 8003e62: 68fb ldr r3, [r7, #12] - 8003e64: 4013 ands r3, r2 - 8003e66: 041a lsls r2, r3, #16 - 8003e68: 68fb ldr r3, [r7, #12] - 8003e6a: 43d9 mvns r1, r3 - 8003e6c: 887b ldrh r3, [r7, #2] - 8003e6e: 400b ands r3, r1 - 8003e70: 431a orrs r2, r3 - 8003e72: 687b ldr r3, [r7, #4] - 8003e74: 611a str r2, [r3, #16] + 80036e0: 887a ldrh r2, [r7, #2] + 80036e2: 68fb ldr r3, [r7, #12] + 80036e4: 4013 ands r3, r2 + 80036e6: 041a lsls r2, r3, #16 + 80036e8: 68fb ldr r3, [r7, #12] + 80036ea: 43d9 mvns r1, r3 + 80036ec: 887b ldrh r3, [r7, #2] + 80036ee: 400b ands r3, r1 + 80036f0: 431a orrs r2, r3 + 80036f2: 687b ldr r3, [r7, #4] + 80036f4: 611a str r2, [r3, #16] } - 8003e76: bf00 nop - 8003e78: 3714 adds r7, #20 - 8003e7a: 46bd mov sp, r7 - 8003e7c: bc80 pop {r7} - 8003e7e: 4770 bx lr + 80036f6: bf00 nop + 80036f8: 3714 adds r7, #20 + 80036fa: 46bd mov sp, r7 + 80036fc: bc80 pop {r7} + 80036fe: 4770 bx lr -08003e80 : +08003700 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { - 8003e80: b580 push {r7, lr} - 8003e82: b084 sub sp, #16 - 8003e84: af00 add r7, sp, #0 - 8003e86: 6078 str r0, [r7, #4] + 8003700: b580 push {r7, lr} + 8003702: b084 sub sp, #16 + 8003704: af00 add r7, sp, #0 + 8003706: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) - 8003e88: 687b ldr r3, [r7, #4] - 8003e8a: 2b00 cmp r3, #0 - 8003e8c: d101 bne.n 8003e92 + 8003708: 687b ldr r3, [r7, #4] + 800370a: 2b00 cmp r3, #0 + 800370c: d101 bne.n 8003712 { return HAL_ERROR; - 8003e8e: 2301 movs r3, #1 - 8003e90: e12b b.n 80040ea + 800370e: 2301 movs r3, #1 + 8003710: e12b b.n 800396a assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) - 8003e92: 687b ldr r3, [r7, #4] - 8003e94: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8003e98: b2db uxtb r3, r3 - 8003e9a: 2b00 cmp r3, #0 - 8003e9c: d106 bne.n 8003eac + 8003712: 687b ldr r3, [r7, #4] + 8003714: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8003718: b2db uxtb r3, r3 + 800371a: 2b00 cmp r3, #0 + 800371c: d106 bne.n 800372c { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; - 8003e9e: 687b ldr r3, [r7, #4] - 8003ea0: 2200 movs r2, #0 - 8003ea2: f883 203c strb.w r2, [r3, #60] @ 0x3c + 800371e: 687b ldr r3, [r7, #4] + 8003720: 2200 movs r2, #0 + 8003722: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); - 8003ea6: 6878 ldr r0, [r7, #4] - 8003ea8: f7fe f99a bl 80021e0 + 8003726: 6878 ldr r0, [r7, #4] + 8003728: f7fe fbf6 bl 8001f18 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; - 8003eac: 687b ldr r3, [r7, #4] - 8003eae: 2224 movs r2, #36 @ 0x24 - 8003eb0: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800372c: 687b ldr r3, [r7, #4] + 800372e: 2224 movs r2, #36 @ 0x24 + 8003730: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 8003eb4: 687b ldr r3, [r7, #4] - 8003eb6: 681b ldr r3, [r3, #0] - 8003eb8: 681a ldr r2, [r3, #0] - 8003eba: 687b ldr r3, [r7, #4] - 8003ebc: 681b ldr r3, [r3, #0] - 8003ebe: f022 0201 bic.w r2, r2, #1 - 8003ec2: 601a str r2, [r3, #0] + 8003734: 687b ldr r3, [r7, #4] + 8003736: 681b ldr r3, [r3, #0] + 8003738: 681a ldr r2, [r3, #0] + 800373a: 687b ldr r3, [r7, #4] + 800373c: 681b ldr r3, [r3, #0] + 800373e: f022 0201 bic.w r2, r2, #1 + 8003742: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; - 8003ec4: 687b ldr r3, [r7, #4] - 8003ec6: 681b ldr r3, [r3, #0] - 8003ec8: 681a ldr r2, [r3, #0] - 8003eca: 687b ldr r3, [r7, #4] - 8003ecc: 681b ldr r3, [r3, #0] - 8003ece: f442 4200 orr.w r2, r2, #32768 @ 0x8000 - 8003ed2: 601a str r2, [r3, #0] + 8003744: 687b ldr r3, [r7, #4] + 8003746: 681b ldr r3, [r3, #0] + 8003748: 681a ldr r2, [r3, #0] + 800374a: 687b ldr r3, [r7, #4] + 800374c: 681b ldr r3, [r3, #0] + 800374e: f442 4200 orr.w r2, r2, #32768 @ 0x8000 + 8003752: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; - 8003ed4: 687b ldr r3, [r7, #4] - 8003ed6: 681b ldr r3, [r3, #0] - 8003ed8: 681a ldr r2, [r3, #0] - 8003eda: 687b ldr r3, [r7, #4] - 8003edc: 681b ldr r3, [r3, #0] - 8003ede: f422 4200 bic.w r2, r2, #32768 @ 0x8000 - 8003ee2: 601a str r2, [r3, #0] + 8003754: 687b ldr r3, [r7, #4] + 8003756: 681b ldr r3, [r3, #0] + 8003758: 681a ldr r2, [r3, #0] + 800375a: 687b ldr r3, [r7, #4] + 800375c: 681b ldr r3, [r3, #0] + 800375e: f422 4200 bic.w r2, r2, #32768 @ 0x8000 + 8003762: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); - 8003ee4: f001 fbcc bl 8005680 - 8003ee8: 60f8 str r0, [r7, #12] + 8003764: f001 fbcc bl 8004f00 + 8003768: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) - 8003eea: 687b ldr r3, [r7, #4] - 8003eec: 685b ldr r3, [r3, #4] - 8003eee: 4a81 ldr r2, [pc, #516] @ (80040f4 ) - 8003ef0: 4293 cmp r3, r2 - 8003ef2: d807 bhi.n 8003f04 - 8003ef4: 68fb ldr r3, [r7, #12] - 8003ef6: 4a80 ldr r2, [pc, #512] @ (80040f8 ) - 8003ef8: 4293 cmp r3, r2 - 8003efa: bf94 ite ls - 8003efc: 2301 movls r3, #1 - 8003efe: 2300 movhi r3, #0 - 8003f00: b2db uxtb r3, r3 - 8003f02: e006 b.n 8003f12 - 8003f04: 68fb ldr r3, [r7, #12] - 8003f06: 4a7d ldr r2, [pc, #500] @ (80040fc ) - 8003f08: 4293 cmp r3, r2 - 8003f0a: bf94 ite ls - 8003f0c: 2301 movls r3, #1 - 8003f0e: 2300 movhi r3, #0 - 8003f10: b2db uxtb r3, r3 - 8003f12: 2b00 cmp r3, #0 - 8003f14: d001 beq.n 8003f1a + 800376a: 687b ldr r3, [r7, #4] + 800376c: 685b ldr r3, [r3, #4] + 800376e: 4a81 ldr r2, [pc, #516] @ (8003974 ) + 8003770: 4293 cmp r3, r2 + 8003772: d807 bhi.n 8003784 + 8003774: 68fb ldr r3, [r7, #12] + 8003776: 4a80 ldr r2, [pc, #512] @ (8003978 ) + 8003778: 4293 cmp r3, r2 + 800377a: bf94 ite ls + 800377c: 2301 movls r3, #1 + 800377e: 2300 movhi r3, #0 + 8003780: b2db uxtb r3, r3 + 8003782: e006 b.n 8003792 + 8003784: 68fb ldr r3, [r7, #12] + 8003786: 4a7d ldr r2, [pc, #500] @ (800397c ) + 8003788: 4293 cmp r3, r2 + 800378a: bf94 ite ls + 800378c: 2301 movls r3, #1 + 800378e: 2300 movhi r3, #0 + 8003790: b2db uxtb r3, r3 + 8003792: 2b00 cmp r3, #0 + 8003794: d001 beq.n 800379a { return HAL_ERROR; - 8003f16: 2301 movs r3, #1 - 8003f18: e0e7 b.n 80040ea + 8003796: 2301 movs r3, #1 + 8003798: e0e7 b.n 800396a } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); - 8003f1a: 68fb ldr r3, [r7, #12] - 8003f1c: 4a78 ldr r2, [pc, #480] @ (8004100 ) - 8003f1e: fba2 2303 umull r2, r3, r2, r3 - 8003f22: 0c9b lsrs r3, r3, #18 - 8003f24: 60bb str r3, [r7, #8] + 800379a: 68fb ldr r3, [r7, #12] + 800379c: 4a78 ldr r2, [pc, #480] @ (8003980 ) + 800379e: fba2 2303 umull r2, r3, r2, r3 + 80037a2: 0c9b lsrs r3, r3, #18 + 80037a4: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); - 8003f26: 687b ldr r3, [r7, #4] - 8003f28: 681b ldr r3, [r3, #0] - 8003f2a: 685b ldr r3, [r3, #4] - 8003f2c: f023 013f bic.w r1, r3, #63 @ 0x3f - 8003f30: 687b ldr r3, [r7, #4] - 8003f32: 681b ldr r3, [r3, #0] - 8003f34: 68ba ldr r2, [r7, #8] - 8003f36: 430a orrs r2, r1 - 8003f38: 605a str r2, [r3, #4] + 80037a6: 687b ldr r3, [r7, #4] + 80037a8: 681b ldr r3, [r3, #0] + 80037aa: 685b ldr r3, [r3, #4] + 80037ac: f023 013f bic.w r1, r3, #63 @ 0x3f + 80037b0: 687b ldr r3, [r7, #4] + 80037b2: 681b ldr r3, [r3, #0] + 80037b4: 68ba ldr r2, [r7, #8] + 80037b6: 430a orrs r2, r1 + 80037b8: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); - 8003f3a: 687b ldr r3, [r7, #4] - 8003f3c: 681b ldr r3, [r3, #0] - 8003f3e: 6a1b ldr r3, [r3, #32] - 8003f40: f023 013f bic.w r1, r3, #63 @ 0x3f - 8003f44: 687b ldr r3, [r7, #4] - 8003f46: 685b ldr r3, [r3, #4] - 8003f48: 4a6a ldr r2, [pc, #424] @ (80040f4 ) - 8003f4a: 4293 cmp r3, r2 - 8003f4c: d802 bhi.n 8003f54 - 8003f4e: 68bb ldr r3, [r7, #8] - 8003f50: 3301 adds r3, #1 - 8003f52: e009 b.n 8003f68 - 8003f54: 68bb ldr r3, [r7, #8] - 8003f56: f44f 7296 mov.w r2, #300 @ 0x12c - 8003f5a: fb02 f303 mul.w r3, r2, r3 - 8003f5e: 4a69 ldr r2, [pc, #420] @ (8004104 ) - 8003f60: fba2 2303 umull r2, r3, r2, r3 - 8003f64: 099b lsrs r3, r3, #6 - 8003f66: 3301 adds r3, #1 - 8003f68: 687a ldr r2, [r7, #4] - 8003f6a: 6812 ldr r2, [r2, #0] - 8003f6c: 430b orrs r3, r1 - 8003f6e: 6213 str r3, [r2, #32] + 80037ba: 687b ldr r3, [r7, #4] + 80037bc: 681b ldr r3, [r3, #0] + 80037be: 6a1b ldr r3, [r3, #32] + 80037c0: f023 013f bic.w r1, r3, #63 @ 0x3f + 80037c4: 687b ldr r3, [r7, #4] + 80037c6: 685b ldr r3, [r3, #4] + 80037c8: 4a6a ldr r2, [pc, #424] @ (8003974 ) + 80037ca: 4293 cmp r3, r2 + 80037cc: d802 bhi.n 80037d4 + 80037ce: 68bb ldr r3, [r7, #8] + 80037d0: 3301 adds r3, #1 + 80037d2: e009 b.n 80037e8 + 80037d4: 68bb ldr r3, [r7, #8] + 80037d6: f44f 7296 mov.w r2, #300 @ 0x12c + 80037da: fb02 f303 mul.w r3, r2, r3 + 80037de: 4a69 ldr r2, [pc, #420] @ (8003984 ) + 80037e0: fba2 2303 umull r2, r3, r2, r3 + 80037e4: 099b lsrs r3, r3, #6 + 80037e6: 3301 adds r3, #1 + 80037e8: 687a ldr r2, [r7, #4] + 80037ea: 6812 ldr r2, [r2, #0] + 80037ec: 430b orrs r3, r1 + 80037ee: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); - 8003f70: 687b ldr r3, [r7, #4] - 8003f72: 681b ldr r3, [r3, #0] - 8003f74: 69db ldr r3, [r3, #28] - 8003f76: f423 424f bic.w r2, r3, #52992 @ 0xcf00 - 8003f7a: f022 02ff bic.w r2, r2, #255 @ 0xff - 8003f7e: 687b ldr r3, [r7, #4] - 8003f80: 685b ldr r3, [r3, #4] - 8003f82: 495c ldr r1, [pc, #368] @ (80040f4 ) - 8003f84: 428b cmp r3, r1 - 8003f86: d819 bhi.n 8003fbc - 8003f88: 68fb ldr r3, [r7, #12] - 8003f8a: 1e59 subs r1, r3, #1 - 8003f8c: 687b ldr r3, [r7, #4] - 8003f8e: 685b ldr r3, [r3, #4] - 8003f90: 005b lsls r3, r3, #1 - 8003f92: fbb1 f3f3 udiv r3, r1, r3 - 8003f96: 1c59 adds r1, r3, #1 - 8003f98: f640 73fc movw r3, #4092 @ 0xffc - 8003f9c: 400b ands r3, r1 - 8003f9e: 2b00 cmp r3, #0 - 8003fa0: d00a beq.n 8003fb8 - 8003fa2: 68fb ldr r3, [r7, #12] - 8003fa4: 1e59 subs r1, r3, #1 - 8003fa6: 687b ldr r3, [r7, #4] - 8003fa8: 685b ldr r3, [r3, #4] - 8003faa: 005b lsls r3, r3, #1 - 8003fac: fbb1 f3f3 udiv r3, r1, r3 - 8003fb0: 3301 adds r3, #1 - 8003fb2: f3c3 030b ubfx r3, r3, #0, #12 - 8003fb6: e051 b.n 800405c - 8003fb8: 2304 movs r3, #4 - 8003fba: e04f b.n 800405c - 8003fbc: 687b ldr r3, [r7, #4] - 8003fbe: 689b ldr r3, [r3, #8] - 8003fc0: 2b00 cmp r3, #0 - 8003fc2: d111 bne.n 8003fe8 - 8003fc4: 68fb ldr r3, [r7, #12] - 8003fc6: 1e58 subs r0, r3, #1 - 8003fc8: 687b ldr r3, [r7, #4] - 8003fca: 6859 ldr r1, [r3, #4] - 8003fcc: 460b mov r3, r1 - 8003fce: 005b lsls r3, r3, #1 - 8003fd0: 440b add r3, r1 - 8003fd2: fbb0 f3f3 udiv r3, r0, r3 - 8003fd6: 3301 adds r3, #1 - 8003fd8: f3c3 030b ubfx r3, r3, #0, #12 - 8003fdc: 2b00 cmp r3, #0 - 8003fde: bf0c ite eq - 8003fe0: 2301 moveq r3, #1 - 8003fe2: 2300 movne r3, #0 - 8003fe4: b2db uxtb r3, r3 - 8003fe6: e012 b.n 800400e - 8003fe8: 68fb ldr r3, [r7, #12] - 8003fea: 1e58 subs r0, r3, #1 - 8003fec: 687b ldr r3, [r7, #4] - 8003fee: 6859 ldr r1, [r3, #4] - 8003ff0: 460b mov r3, r1 - 8003ff2: 009b lsls r3, r3, #2 - 8003ff4: 440b add r3, r1 - 8003ff6: 0099 lsls r1, r3, #2 - 8003ff8: 440b add r3, r1 - 8003ffa: fbb0 f3f3 udiv r3, r0, r3 - 8003ffe: 3301 adds r3, #1 - 8004000: f3c3 030b ubfx r3, r3, #0, #12 - 8004004: 2b00 cmp r3, #0 - 8004006: bf0c ite eq - 8004008: 2301 moveq r3, #1 - 800400a: 2300 movne r3, #0 - 800400c: b2db uxtb r3, r3 - 800400e: 2b00 cmp r3, #0 - 8004010: d001 beq.n 8004016 - 8004012: 2301 movs r3, #1 - 8004014: e022 b.n 800405c - 8004016: 687b ldr r3, [r7, #4] - 8004018: 689b ldr r3, [r3, #8] - 800401a: 2b00 cmp r3, #0 - 800401c: d10e bne.n 800403c - 800401e: 68fb ldr r3, [r7, #12] - 8004020: 1e58 subs r0, r3, #1 - 8004022: 687b ldr r3, [r7, #4] - 8004024: 6859 ldr r1, [r3, #4] - 8004026: 460b mov r3, r1 - 8004028: 005b lsls r3, r3, #1 - 800402a: 440b add r3, r1 - 800402c: fbb0 f3f3 udiv r3, r0, r3 - 8004030: 3301 adds r3, #1 - 8004032: f3c3 030b ubfx r3, r3, #0, #12 - 8004036: f443 4300 orr.w r3, r3, #32768 @ 0x8000 - 800403a: e00f b.n 800405c - 800403c: 68fb ldr r3, [r7, #12] - 800403e: 1e58 subs r0, r3, #1 - 8004040: 687b ldr r3, [r7, #4] - 8004042: 6859 ldr r1, [r3, #4] - 8004044: 460b mov r3, r1 - 8004046: 009b lsls r3, r3, #2 - 8004048: 440b add r3, r1 - 800404a: 0099 lsls r1, r3, #2 - 800404c: 440b add r3, r1 - 800404e: fbb0 f3f3 udiv r3, r0, r3 - 8004052: 3301 adds r3, #1 - 8004054: f3c3 030b ubfx r3, r3, #0, #12 - 8004058: f443 4340 orr.w r3, r3, #49152 @ 0xc000 - 800405c: 6879 ldr r1, [r7, #4] - 800405e: 6809 ldr r1, [r1, #0] - 8004060: 4313 orrs r3, r2 - 8004062: 61cb str r3, [r1, #28] + 80037f0: 687b ldr r3, [r7, #4] + 80037f2: 681b ldr r3, [r3, #0] + 80037f4: 69db ldr r3, [r3, #28] + 80037f6: f423 424f bic.w r2, r3, #52992 @ 0xcf00 + 80037fa: f022 02ff bic.w r2, r2, #255 @ 0xff + 80037fe: 687b ldr r3, [r7, #4] + 8003800: 685b ldr r3, [r3, #4] + 8003802: 495c ldr r1, [pc, #368] @ (8003974 ) + 8003804: 428b cmp r3, r1 + 8003806: d819 bhi.n 800383c + 8003808: 68fb ldr r3, [r7, #12] + 800380a: 1e59 subs r1, r3, #1 + 800380c: 687b ldr r3, [r7, #4] + 800380e: 685b ldr r3, [r3, #4] + 8003810: 005b lsls r3, r3, #1 + 8003812: fbb1 f3f3 udiv r3, r1, r3 + 8003816: 1c59 adds r1, r3, #1 + 8003818: f640 73fc movw r3, #4092 @ 0xffc + 800381c: 400b ands r3, r1 + 800381e: 2b00 cmp r3, #0 + 8003820: d00a beq.n 8003838 + 8003822: 68fb ldr r3, [r7, #12] + 8003824: 1e59 subs r1, r3, #1 + 8003826: 687b ldr r3, [r7, #4] + 8003828: 685b ldr r3, [r3, #4] + 800382a: 005b lsls r3, r3, #1 + 800382c: fbb1 f3f3 udiv r3, r1, r3 + 8003830: 3301 adds r3, #1 + 8003832: f3c3 030b ubfx r3, r3, #0, #12 + 8003836: e051 b.n 80038dc + 8003838: 2304 movs r3, #4 + 800383a: e04f b.n 80038dc + 800383c: 687b ldr r3, [r7, #4] + 800383e: 689b ldr r3, [r3, #8] + 8003840: 2b00 cmp r3, #0 + 8003842: d111 bne.n 8003868 + 8003844: 68fb ldr r3, [r7, #12] + 8003846: 1e58 subs r0, r3, #1 + 8003848: 687b ldr r3, [r7, #4] + 800384a: 6859 ldr r1, [r3, #4] + 800384c: 460b mov r3, r1 + 800384e: 005b lsls r3, r3, #1 + 8003850: 440b add r3, r1 + 8003852: fbb0 f3f3 udiv r3, r0, r3 + 8003856: 3301 adds r3, #1 + 8003858: f3c3 030b ubfx r3, r3, #0, #12 + 800385c: 2b00 cmp r3, #0 + 800385e: bf0c ite eq + 8003860: 2301 moveq r3, #1 + 8003862: 2300 movne r3, #0 + 8003864: b2db uxtb r3, r3 + 8003866: e012 b.n 800388e + 8003868: 68fb ldr r3, [r7, #12] + 800386a: 1e58 subs r0, r3, #1 + 800386c: 687b ldr r3, [r7, #4] + 800386e: 6859 ldr r1, [r3, #4] + 8003870: 460b mov r3, r1 + 8003872: 009b lsls r3, r3, #2 + 8003874: 440b add r3, r1 + 8003876: 0099 lsls r1, r3, #2 + 8003878: 440b add r3, r1 + 800387a: fbb0 f3f3 udiv r3, r0, r3 + 800387e: 3301 adds r3, #1 + 8003880: f3c3 030b ubfx r3, r3, #0, #12 + 8003884: 2b00 cmp r3, #0 + 8003886: bf0c ite eq + 8003888: 2301 moveq r3, #1 + 800388a: 2300 movne r3, #0 + 800388c: b2db uxtb r3, r3 + 800388e: 2b00 cmp r3, #0 + 8003890: d001 beq.n 8003896 + 8003892: 2301 movs r3, #1 + 8003894: e022 b.n 80038dc + 8003896: 687b ldr r3, [r7, #4] + 8003898: 689b ldr r3, [r3, #8] + 800389a: 2b00 cmp r3, #0 + 800389c: d10e bne.n 80038bc + 800389e: 68fb ldr r3, [r7, #12] + 80038a0: 1e58 subs r0, r3, #1 + 80038a2: 687b ldr r3, [r7, #4] + 80038a4: 6859 ldr r1, [r3, #4] + 80038a6: 460b mov r3, r1 + 80038a8: 005b lsls r3, r3, #1 + 80038aa: 440b add r3, r1 + 80038ac: fbb0 f3f3 udiv r3, r0, r3 + 80038b0: 3301 adds r3, #1 + 80038b2: f3c3 030b ubfx r3, r3, #0, #12 + 80038b6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 + 80038ba: e00f b.n 80038dc + 80038bc: 68fb ldr r3, [r7, #12] + 80038be: 1e58 subs r0, r3, #1 + 80038c0: 687b ldr r3, [r7, #4] + 80038c2: 6859 ldr r1, [r3, #4] + 80038c4: 460b mov r3, r1 + 80038c6: 009b lsls r3, r3, #2 + 80038c8: 440b add r3, r1 + 80038ca: 0099 lsls r1, r3, #2 + 80038cc: 440b add r3, r1 + 80038ce: fbb0 f3f3 udiv r3, r0, r3 + 80038d2: 3301 adds r3, #1 + 80038d4: f3c3 030b ubfx r3, r3, #0, #12 + 80038d8: f443 4340 orr.w r3, r3, #49152 @ 0xc000 + 80038dc: 6879 ldr r1, [r7, #4] + 80038de: 6809 ldr r1, [r1, #0] + 80038e0: 4313 orrs r3, r2 + 80038e2: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); - 8004064: 687b ldr r3, [r7, #4] - 8004066: 681b ldr r3, [r3, #0] - 8004068: 681b ldr r3, [r3, #0] - 800406a: f023 01c0 bic.w r1, r3, #192 @ 0xc0 - 800406e: 687b ldr r3, [r7, #4] - 8004070: 69da ldr r2, [r3, #28] - 8004072: 687b ldr r3, [r7, #4] - 8004074: 6a1b ldr r3, [r3, #32] - 8004076: 431a orrs r2, r3 - 8004078: 687b ldr r3, [r7, #4] - 800407a: 681b ldr r3, [r3, #0] - 800407c: 430a orrs r2, r1 - 800407e: 601a str r2, [r3, #0] + 80038e4: 687b ldr r3, [r7, #4] + 80038e6: 681b ldr r3, [r3, #0] + 80038e8: 681b ldr r3, [r3, #0] + 80038ea: f023 01c0 bic.w r1, r3, #192 @ 0xc0 + 80038ee: 687b ldr r3, [r7, #4] + 80038f0: 69da ldr r2, [r3, #28] + 80038f2: 687b ldr r3, [r7, #4] + 80038f4: 6a1b ldr r3, [r3, #32] + 80038f6: 431a orrs r2, r3 + 80038f8: 687b ldr r3, [r7, #4] + 80038fa: 681b ldr r3, [r3, #0] + 80038fc: 430a orrs r2, r1 + 80038fe: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); - 8004080: 687b ldr r3, [r7, #4] - 8004082: 681b ldr r3, [r3, #0] - 8004084: 689b ldr r3, [r3, #8] - 8004086: f423 4303 bic.w r3, r3, #33536 @ 0x8300 - 800408a: f023 03ff bic.w r3, r3, #255 @ 0xff - 800408e: 687a ldr r2, [r7, #4] - 8004090: 6911 ldr r1, [r2, #16] - 8004092: 687a ldr r2, [r7, #4] - 8004094: 68d2 ldr r2, [r2, #12] - 8004096: 4311 orrs r1, r2 - 8004098: 687a ldr r2, [r7, #4] - 800409a: 6812 ldr r2, [r2, #0] - 800409c: 430b orrs r3, r1 - 800409e: 6093 str r3, [r2, #8] + 8003900: 687b ldr r3, [r7, #4] + 8003902: 681b ldr r3, [r3, #0] + 8003904: 689b ldr r3, [r3, #8] + 8003906: f423 4303 bic.w r3, r3, #33536 @ 0x8300 + 800390a: f023 03ff bic.w r3, r3, #255 @ 0xff + 800390e: 687a ldr r2, [r7, #4] + 8003910: 6911 ldr r1, [r2, #16] + 8003912: 687a ldr r2, [r7, #4] + 8003914: 68d2 ldr r2, [r2, #12] + 8003916: 4311 orrs r1, r2 + 8003918: 687a ldr r2, [r7, #4] + 800391a: 6812 ldr r2, [r2, #0] + 800391c: 430b orrs r3, r1 + 800391e: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); - 80040a0: 687b ldr r3, [r7, #4] - 80040a2: 681b ldr r3, [r3, #0] - 80040a4: 68db ldr r3, [r3, #12] - 80040a6: f023 01ff bic.w r1, r3, #255 @ 0xff - 80040aa: 687b ldr r3, [r7, #4] - 80040ac: 695a ldr r2, [r3, #20] - 80040ae: 687b ldr r3, [r7, #4] - 80040b0: 699b ldr r3, [r3, #24] - 80040b2: 431a orrs r2, r3 - 80040b4: 687b ldr r3, [r7, #4] - 80040b6: 681b ldr r3, [r3, #0] - 80040b8: 430a orrs r2, r1 - 80040ba: 60da str r2, [r3, #12] + 8003920: 687b ldr r3, [r7, #4] + 8003922: 681b ldr r3, [r3, #0] + 8003924: 68db ldr r3, [r3, #12] + 8003926: f023 01ff bic.w r1, r3, #255 @ 0xff + 800392a: 687b ldr r3, [r7, #4] + 800392c: 695a ldr r2, [r3, #20] + 800392e: 687b ldr r3, [r7, #4] + 8003930: 699b ldr r3, [r3, #24] + 8003932: 431a orrs r2, r3 + 8003934: 687b ldr r3, [r7, #4] + 8003936: 681b ldr r3, [r3, #0] + 8003938: 430a orrs r2, r1 + 800393a: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 80040bc: 687b ldr r3, [r7, #4] - 80040be: 681b ldr r3, [r3, #0] - 80040c0: 681a ldr r2, [r3, #0] - 80040c2: 687b ldr r3, [r7, #4] - 80040c4: 681b ldr r3, [r3, #0] - 80040c6: f042 0201 orr.w r2, r2, #1 - 80040ca: 601a str r2, [r3, #0] + 800393c: 687b ldr r3, [r7, #4] + 800393e: 681b ldr r3, [r3, #0] + 8003940: 681a ldr r2, [r3, #0] + 8003942: 687b ldr r3, [r7, #4] + 8003944: 681b ldr r3, [r3, #0] + 8003946: f042 0201 orr.w r2, r2, #1 + 800394a: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 80040cc: 687b ldr r3, [r7, #4] - 80040ce: 2200 movs r2, #0 - 80040d0: 641a str r2, [r3, #64] @ 0x40 + 800394c: 687b ldr r3, [r7, #4] + 800394e: 2200 movs r2, #0 + 8003950: 641a str r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_READY; - 80040d2: 687b ldr r3, [r7, #4] - 80040d4: 2220 movs r2, #32 - 80040d6: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003952: 687b ldr r3, [r7, #4] + 8003954: 2220 movs r2, #32 + 8003956: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->PreviousState = I2C_STATE_NONE; - 80040da: 687b ldr r3, [r7, #4] - 80040dc: 2200 movs r2, #0 - 80040de: 631a str r2, [r3, #48] @ 0x30 + 800395a: 687b ldr r3, [r7, #4] + 800395c: 2200 movs r2, #0 + 800395e: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; - 80040e0: 687b ldr r3, [r7, #4] - 80040e2: 2200 movs r2, #0 - 80040e4: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003960: 687b ldr r3, [r7, #4] + 8003962: 2200 movs r2, #0 + 8003964: f883 203e strb.w r2, [r3, #62] @ 0x3e return HAL_OK; - 80040e8: 2300 movs r3, #0 + 8003968: 2300 movs r3, #0 } - 80040ea: 4618 mov r0, r3 - 80040ec: 3710 adds r7, #16 - 80040ee: 46bd mov sp, r7 - 80040f0: bd80 pop {r7, pc} - 80040f2: bf00 nop - 80040f4: 000186a0 .word 0x000186a0 - 80040f8: 001e847f .word 0x001e847f - 80040fc: 003d08ff .word 0x003d08ff - 8004100: 431bde83 .word 0x431bde83 - 8004104: 10624dd3 .word 0x10624dd3 + 800396a: 4618 mov r0, r3 + 800396c: 3710 adds r7, #16 + 800396e: 46bd mov sp, r7 + 8003970: bd80 pop {r7, pc} + 8003972: bf00 nop + 8003974: 000186a0 .word 0x000186a0 + 8003978: 001e847f .word 0x001e847f + 800397c: 003d08ff .word 0x003d08ff + 8003980: 431bde83 .word 0x431bde83 + 8003984: 10624dd3 .word 0x10624dd3 -08004108 : +08003988 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8004108: b580 push {r7, lr} - 800410a: b088 sub sp, #32 - 800410c: af02 add r7, sp, #8 - 800410e: 60f8 str r0, [r7, #12] - 8004110: 607a str r2, [r7, #4] - 8004112: 461a mov r2, r3 - 8004114: 460b mov r3, r1 - 8004116: 817b strh r3, [r7, #10] - 8004118: 4613 mov r3, r2 - 800411a: 813b strh r3, [r7, #8] + 8003988: b580 push {r7, lr} + 800398a: b088 sub sp, #32 + 800398c: af02 add r7, sp, #8 + 800398e: 60f8 str r0, [r7, #12] + 8003990: 607a str r2, [r7, #4] + 8003992: 461a mov r2, r3 + 8003994: 460b mov r3, r1 + 8003996: 817b strh r3, [r7, #10] + 8003998: 4613 mov r3, r2 + 800399a: 813b strh r3, [r7, #8] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); - 800411c: f7fe fee4 bl 8002ee8 - 8004120: 6178 str r0, [r7, #20] + 800399c: f7ff f8e4 bl 8002b68 + 80039a0: 6178 str r0, [r7, #20] if (hi2c->State == HAL_I2C_STATE_READY) - 8004122: 68fb ldr r3, [r7, #12] - 8004124: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8004128: b2db uxtb r3, r3 - 800412a: 2b20 cmp r3, #32 - 800412c: f040 80e0 bne.w 80042f0 + 80039a2: 68fb ldr r3, [r7, #12] + 80039a4: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 80039a8: b2db uxtb r3, r3 + 80039aa: 2b20 cmp r3, #32 + 80039ac: f040 80e0 bne.w 8003b70 { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) - 8004130: 697b ldr r3, [r7, #20] - 8004132: 9300 str r3, [sp, #0] - 8004134: 2319 movs r3, #25 - 8004136: 2201 movs r2, #1 - 8004138: 4970 ldr r1, [pc, #448] @ (80042fc ) - 800413a: 68f8 ldr r0, [r7, #12] - 800413c: f000 fc9e bl 8004a7c - 8004140: 4603 mov r3, r0 - 8004142: 2b00 cmp r3, #0 - 8004144: d001 beq.n 800414a + 80039b0: 697b ldr r3, [r7, #20] + 80039b2: 9300 str r3, [sp, #0] + 80039b4: 2319 movs r3, #25 + 80039b6: 2201 movs r2, #1 + 80039b8: 4970 ldr r1, [pc, #448] @ (8003b7c ) + 80039ba: 68f8 ldr r0, [r7, #12] + 80039bc: f000 fc9e bl 80042fc + 80039c0: 4603 mov r3, r0 + 80039c2: 2b00 cmp r3, #0 + 80039c4: d001 beq.n 80039ca { return HAL_BUSY; - 8004146: 2302 movs r3, #2 - 8004148: e0d3 b.n 80042f2 + 80039c6: 2302 movs r3, #2 + 80039c8: e0d3 b.n 8003b72 } /* Process Locked */ __HAL_LOCK(hi2c); - 800414a: 68fb ldr r3, [r7, #12] - 800414c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8004150: 2b01 cmp r3, #1 - 8004152: d101 bne.n 8004158 - 8004154: 2302 movs r3, #2 - 8004156: e0cc b.n 80042f2 - 8004158: 68fb ldr r3, [r7, #12] - 800415a: 2201 movs r2, #1 - 800415c: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80039ca: 68fb ldr r3, [r7, #12] + 80039cc: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 80039d0: 2b01 cmp r3, #1 + 80039d2: d101 bne.n 80039d8 + 80039d4: 2302 movs r3, #2 + 80039d6: e0cc b.n 8003b72 + 80039d8: 68fb ldr r3, [r7, #12] + 80039da: 2201 movs r2, #1 + 80039dc: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) - 8004160: 68fb ldr r3, [r7, #12] - 8004162: 681b ldr r3, [r3, #0] - 8004164: 681b ldr r3, [r3, #0] - 8004166: f003 0301 and.w r3, r3, #1 - 800416a: 2b01 cmp r3, #1 - 800416c: d007 beq.n 800417e + 80039e0: 68fb ldr r3, [r7, #12] + 80039e2: 681b ldr r3, [r3, #0] + 80039e4: 681b ldr r3, [r3, #0] + 80039e6: f003 0301 and.w r3, r3, #1 + 80039ea: 2b01 cmp r3, #1 + 80039ec: d007 beq.n 80039fe { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 800416e: 68fb ldr r3, [r7, #12] - 8004170: 681b ldr r3, [r3, #0] - 8004172: 681a ldr r2, [r3, #0] - 8004174: 68fb ldr r3, [r7, #12] - 8004176: 681b ldr r3, [r3, #0] - 8004178: f042 0201 orr.w r2, r2, #1 - 800417c: 601a str r2, [r3, #0] + 80039ee: 68fb ldr r3, [r7, #12] + 80039f0: 681b ldr r3, [r3, #0] + 80039f2: 681a ldr r2, [r3, #0] + 80039f4: 68fb ldr r3, [r7, #12] + 80039f6: 681b ldr r3, [r3, #0] + 80039f8: f042 0201 orr.w r2, r2, #1 + 80039fc: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 800417e: 68fb ldr r3, [r7, #12] - 8004180: 681b ldr r3, [r3, #0] - 8004182: 681a ldr r2, [r3, #0] - 8004184: 68fb ldr r3, [r7, #12] - 8004186: 681b ldr r3, [r3, #0] - 8004188: f422 6200 bic.w r2, r2, #2048 @ 0x800 - 800418c: 601a str r2, [r3, #0] + 80039fe: 68fb ldr r3, [r7, #12] + 8003a00: 681b ldr r3, [r3, #0] + 8003a02: 681a ldr r2, [r3, #0] + 8003a04: 68fb ldr r3, [r7, #12] + 8003a06: 681b ldr r3, [r3, #0] + 8003a08: f422 6200 bic.w r2, r2, #2048 @ 0x800 + 8003a0c: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; - 800418e: 68fb ldr r3, [r7, #12] - 8004190: 2221 movs r2, #33 @ 0x21 - 8004192: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003a0e: 68fb ldr r3, [r7, #12] + 8003a10: 2221 movs r2, #33 @ 0x21 + 8003a12: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_MASTER; - 8004196: 68fb ldr r3, [r7, #12] - 8004198: 2210 movs r2, #16 - 800419a: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003a16: 68fb ldr r3, [r7, #12] + 8003a18: 2210 movs r2, #16 + 8003a1a: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 800419e: 68fb ldr r3, [r7, #12] - 80041a0: 2200 movs r2, #0 - 80041a2: 641a str r2, [r3, #64] @ 0x40 + 8003a1e: 68fb ldr r3, [r7, #12] + 8003a20: 2200 movs r2, #0 + 8003a22: 641a str r2, [r3, #64] @ 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; - 80041a4: 68fb ldr r3, [r7, #12] - 80041a6: 687a ldr r2, [r7, #4] - 80041a8: 625a str r2, [r3, #36] @ 0x24 + 8003a24: 68fb ldr r3, [r7, #12] + 8003a26: 687a ldr r2, [r7, #4] + 8003a28: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; - 80041aa: 68fb ldr r3, [r7, #12] - 80041ac: 893a ldrh r2, [r7, #8] - 80041ae: 855a strh r2, [r3, #42] @ 0x2a + 8003a2a: 68fb ldr r3, [r7, #12] + 8003a2c: 893a ldrh r2, [r7, #8] + 8003a2e: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize = hi2c->XferCount; - 80041b0: 68fb ldr r3, [r7, #12] - 80041b2: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80041b4: b29a uxth r2, r3 - 80041b6: 68fb ldr r3, [r7, #12] - 80041b8: 851a strh r2, [r3, #40] @ 0x28 + 8003a30: 68fb ldr r3, [r7, #12] + 8003a32: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003a34: b29a uxth r2, r3 + 8003a36: 68fb ldr r3, [r7, #12] + 8003a38: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 80041ba: 68fb ldr r3, [r7, #12] - 80041bc: 4a50 ldr r2, [pc, #320] @ (8004300 ) - 80041be: 62da str r2, [r3, #44] @ 0x2c + 8003a3a: 68fb ldr r3, [r7, #12] + 8003a3c: 4a50 ldr r2, [pc, #320] @ (8003b80 ) + 8003a3e: 62da str r2, [r3, #44] @ 0x2c /* Send Slave Address */ if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) - 80041c0: 8979 ldrh r1, [r7, #10] - 80041c2: 697b ldr r3, [r7, #20] - 80041c4: 6a3a ldr r2, [r7, #32] - 80041c6: 68f8 ldr r0, [r7, #12] - 80041c8: f000 fb08 bl 80047dc - 80041cc: 4603 mov r3, r0 - 80041ce: 2b00 cmp r3, #0 - 80041d0: d001 beq.n 80041d6 + 8003a40: 8979 ldrh r1, [r7, #10] + 8003a42: 697b ldr r3, [r7, #20] + 8003a44: 6a3a ldr r2, [r7, #32] + 8003a46: 68f8 ldr r0, [r7, #12] + 8003a48: f000 fb08 bl 800405c + 8003a4c: 4603 mov r3, r0 + 8003a4e: 2b00 cmp r3, #0 + 8003a50: d001 beq.n 8003a56 { return HAL_ERROR; - 80041d2: 2301 movs r3, #1 - 80041d4: e08d b.n 80042f2 + 8003a52: 2301 movs r3, #1 + 8003a54: e08d b.n 8003b72 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80041d6: 2300 movs r3, #0 - 80041d8: 613b str r3, [r7, #16] - 80041da: 68fb ldr r3, [r7, #12] - 80041dc: 681b ldr r3, [r3, #0] - 80041de: 695b ldr r3, [r3, #20] - 80041e0: 613b str r3, [r7, #16] - 80041e2: 68fb ldr r3, [r7, #12] - 80041e4: 681b ldr r3, [r3, #0] - 80041e6: 699b ldr r3, [r3, #24] - 80041e8: 613b str r3, [r7, #16] - 80041ea: 693b ldr r3, [r7, #16] + 8003a56: 2300 movs r3, #0 + 8003a58: 613b str r3, [r7, #16] + 8003a5a: 68fb ldr r3, [r7, #12] + 8003a5c: 681b ldr r3, [r3, #0] + 8003a5e: 695b ldr r3, [r3, #20] + 8003a60: 613b str r3, [r7, #16] + 8003a62: 68fb ldr r3, [r7, #12] + 8003a64: 681b ldr r3, [r3, #0] + 8003a66: 699b ldr r3, [r3, #24] + 8003a68: 613b str r3, [r7, #16] + 8003a6a: 693b ldr r3, [r7, #16] while (hi2c->XferSize > 0U) - 80041ec: e066 b.n 80042bc + 8003a6c: e066 b.n 8003b3c { /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 80041ee: 697a ldr r2, [r7, #20] - 80041f0: 6a39 ldr r1, [r7, #32] - 80041f2: 68f8 ldr r0, [r7, #12] - 80041f4: f000 fd5c bl 8004cb0 - 80041f8: 4603 mov r3, r0 - 80041fa: 2b00 cmp r3, #0 - 80041fc: d00d beq.n 800421a + 8003a6e: 697a ldr r2, [r7, #20] + 8003a70: 6a39 ldr r1, [r7, #32] + 8003a72: 68f8 ldr r0, [r7, #12] + 8003a74: f000 fd5c bl 8004530 + 8003a78: 4603 mov r3, r0 + 8003a7a: 2b00 cmp r3, #0 + 8003a7c: d00d beq.n 8003a9a { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 80041fe: 68fb ldr r3, [r7, #12] - 8004200: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004202: 2b04 cmp r3, #4 - 8004204: d107 bne.n 8004216 + 8003a7e: 68fb ldr r3, [r7, #12] + 8003a80: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003a82: 2b04 cmp r3, #4 + 8003a84: d107 bne.n 8003a96 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8004206: 68fb ldr r3, [r7, #12] - 8004208: 681b ldr r3, [r3, #0] - 800420a: 681a ldr r2, [r3, #0] - 800420c: 68fb ldr r3, [r7, #12] - 800420e: 681b ldr r3, [r3, #0] - 8004210: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8004214: 601a str r2, [r3, #0] + 8003a86: 68fb ldr r3, [r7, #12] + 8003a88: 681b ldr r3, [r3, #0] + 8003a8a: 681a ldr r2, [r3, #0] + 8003a8c: 68fb ldr r3, [r7, #12] + 8003a8e: 681b ldr r3, [r3, #0] + 8003a90: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003a94: 601a str r2, [r3, #0] } return HAL_ERROR; - 8004216: 2301 movs r3, #1 - 8004218: e06b b.n 80042f2 + 8003a96: 2301 movs r3, #1 + 8003a98: e06b b.n 8003b72 } /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; - 800421a: 68fb ldr r3, [r7, #12] - 800421c: 6a5b ldr r3, [r3, #36] @ 0x24 - 800421e: 781a ldrb r2, [r3, #0] - 8004220: 68fb ldr r3, [r7, #12] - 8004222: 681b ldr r3, [r3, #0] - 8004224: 611a str r2, [r3, #16] + 8003a9a: 68fb ldr r3, [r7, #12] + 8003a9c: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003a9e: 781a ldrb r2, [r3, #0] + 8003aa0: 68fb ldr r3, [r7, #12] + 8003aa2: 681b ldr r3, [r3, #0] + 8003aa4: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8004226: 68fb ldr r3, [r7, #12] - 8004228: 6a5b ldr r3, [r3, #36] @ 0x24 - 800422a: 1c5a adds r2, r3, #1 - 800422c: 68fb ldr r3, [r7, #12] - 800422e: 625a str r2, [r3, #36] @ 0x24 + 8003aa6: 68fb ldr r3, [r7, #12] + 8003aa8: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003aaa: 1c5a adds r2, r3, #1 + 8003aac: 68fb ldr r3, [r7, #12] + 8003aae: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; - 8004230: 68fb ldr r3, [r7, #12] - 8004232: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8004234: b29b uxth r3, r3 - 8004236: 3b01 subs r3, #1 - 8004238: b29a uxth r2, r3 - 800423a: 68fb ldr r3, [r7, #12] - 800423c: 855a strh r2, [r3, #42] @ 0x2a + 8003ab0: 68fb ldr r3, [r7, #12] + 8003ab2: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003ab4: b29b uxth r3, r3 + 8003ab6: 3b01 subs r3, #1 + 8003ab8: b29a uxth r2, r3 + 8003aba: 68fb ldr r3, [r7, #12] + 8003abc: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; - 800423e: 68fb ldr r3, [r7, #12] - 8004240: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8004242: 3b01 subs r3, #1 - 8004244: b29a uxth r2, r3 - 8004246: 68fb ldr r3, [r7, #12] - 8004248: 851a strh r2, [r3, #40] @ 0x28 + 8003abe: 68fb ldr r3, [r7, #12] + 8003ac0: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003ac2: 3b01 subs r3, #1 + 8003ac4: b29a uxth r2, r3 + 8003ac6: 68fb ldr r3, [r7, #12] + 8003ac8: 851a strh r2, [r3, #40] @ 0x28 if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) - 800424a: 68fb ldr r3, [r7, #12] - 800424c: 681b ldr r3, [r3, #0] - 800424e: 695b ldr r3, [r3, #20] - 8004250: f003 0304 and.w r3, r3, #4 - 8004254: 2b04 cmp r3, #4 - 8004256: d11b bne.n 8004290 - 8004258: 68fb ldr r3, [r7, #12] - 800425a: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800425c: 2b00 cmp r3, #0 - 800425e: d017 beq.n 8004290 + 8003aca: 68fb ldr r3, [r7, #12] + 8003acc: 681b ldr r3, [r3, #0] + 8003ace: 695b ldr r3, [r3, #20] + 8003ad0: f003 0304 and.w r3, r3, #4 + 8003ad4: 2b04 cmp r3, #4 + 8003ad6: d11b bne.n 8003b10 + 8003ad8: 68fb ldr r3, [r7, #12] + 8003ada: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003adc: 2b00 cmp r3, #0 + 8003ade: d017 beq.n 8003b10 { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; - 8004260: 68fb ldr r3, [r7, #12] - 8004262: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004264: 781a ldrb r2, [r3, #0] - 8004266: 68fb ldr r3, [r7, #12] - 8004268: 681b ldr r3, [r3, #0] - 800426a: 611a str r2, [r3, #16] + 8003ae0: 68fb ldr r3, [r7, #12] + 8003ae2: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003ae4: 781a ldrb r2, [r3, #0] + 8003ae6: 68fb ldr r3, [r7, #12] + 8003ae8: 681b ldr r3, [r3, #0] + 8003aea: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 800426c: 68fb ldr r3, [r7, #12] - 800426e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004270: 1c5a adds r2, r3, #1 - 8004272: 68fb ldr r3, [r7, #12] - 8004274: 625a str r2, [r3, #36] @ 0x24 + 8003aec: 68fb ldr r3, [r7, #12] + 8003aee: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003af0: 1c5a adds r2, r3, #1 + 8003af2: 68fb ldr r3, [r7, #12] + 8003af4: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; - 8004276: 68fb ldr r3, [r7, #12] - 8004278: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800427a: b29b uxth r3, r3 - 800427c: 3b01 subs r3, #1 - 800427e: b29a uxth r2, r3 - 8004280: 68fb ldr r3, [r7, #12] - 8004282: 855a strh r2, [r3, #42] @ 0x2a + 8003af6: 68fb ldr r3, [r7, #12] + 8003af8: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003afa: b29b uxth r3, r3 + 8003afc: 3b01 subs r3, #1 + 8003afe: b29a uxth r2, r3 + 8003b00: 68fb ldr r3, [r7, #12] + 8003b02: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; - 8004284: 68fb ldr r3, [r7, #12] - 8004286: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8004288: 3b01 subs r3, #1 - 800428a: b29a uxth r2, r3 - 800428c: 68fb ldr r3, [r7, #12] - 800428e: 851a strh r2, [r3, #40] @ 0x28 + 8003b04: 68fb ldr r3, [r7, #12] + 8003b06: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003b08: 3b01 subs r3, #1 + 8003b0a: b29a uxth r2, r3 + 8003b0c: 68fb ldr r3, [r7, #12] + 8003b0e: 851a strh r2, [r3, #40] @ 0x28 } /* Wait until BTF flag is set */ if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8004290: 697a ldr r2, [r7, #20] - 8004292: 6a39 ldr r1, [r7, #32] - 8004294: 68f8 ldr r0, [r7, #12] - 8004296: f000 fd53 bl 8004d40 - 800429a: 4603 mov r3, r0 - 800429c: 2b00 cmp r3, #0 - 800429e: d00d beq.n 80042bc + 8003b10: 697a ldr r2, [r7, #20] + 8003b12: 6a39 ldr r1, [r7, #32] + 8003b14: 68f8 ldr r0, [r7, #12] + 8003b16: f000 fd53 bl 80045c0 + 8003b1a: 4603 mov r3, r0 + 8003b1c: 2b00 cmp r3, #0 + 8003b1e: d00d beq.n 8003b3c { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 80042a0: 68fb ldr r3, [r7, #12] - 80042a2: 6c1b ldr r3, [r3, #64] @ 0x40 - 80042a4: 2b04 cmp r3, #4 - 80042a6: d107 bne.n 80042b8 + 8003b20: 68fb ldr r3, [r7, #12] + 8003b22: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003b24: 2b04 cmp r3, #4 + 8003b26: d107 bne.n 8003b38 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 80042a8: 68fb ldr r3, [r7, #12] - 80042aa: 681b ldr r3, [r3, #0] - 80042ac: 681a ldr r2, [r3, #0] - 80042ae: 68fb ldr r3, [r7, #12] - 80042b0: 681b ldr r3, [r3, #0] - 80042b2: f442 7200 orr.w r2, r2, #512 @ 0x200 - 80042b6: 601a str r2, [r3, #0] + 8003b28: 68fb ldr r3, [r7, #12] + 8003b2a: 681b ldr r3, [r3, #0] + 8003b2c: 681a ldr r2, [r3, #0] + 8003b2e: 68fb ldr r3, [r7, #12] + 8003b30: 681b ldr r3, [r3, #0] + 8003b32: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003b36: 601a str r2, [r3, #0] } return HAL_ERROR; - 80042b8: 2301 movs r3, #1 - 80042ba: e01a b.n 80042f2 + 8003b38: 2301 movs r3, #1 + 8003b3a: e01a b.n 8003b72 while (hi2c->XferSize > 0U) - 80042bc: 68fb ldr r3, [r7, #12] - 80042be: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80042c0: 2b00 cmp r3, #0 - 80042c2: d194 bne.n 80041ee + 8003b3c: 68fb ldr r3, [r7, #12] + 8003b3e: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003b40: 2b00 cmp r3, #0 + 8003b42: d194 bne.n 8003a6e } } /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 80042c4: 68fb ldr r3, [r7, #12] - 80042c6: 681b ldr r3, [r3, #0] - 80042c8: 681a ldr r2, [r3, #0] - 80042ca: 68fb ldr r3, [r7, #12] - 80042cc: 681b ldr r3, [r3, #0] - 80042ce: f442 7200 orr.w r2, r2, #512 @ 0x200 - 80042d2: 601a str r2, [r3, #0] + 8003b44: 68fb ldr r3, [r7, #12] + 8003b46: 681b ldr r3, [r3, #0] + 8003b48: 681a ldr r2, [r3, #0] + 8003b4a: 68fb ldr r3, [r7, #12] + 8003b4c: 681b ldr r3, [r3, #0] + 8003b4e: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003b52: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; - 80042d4: 68fb ldr r3, [r7, #12] - 80042d6: 2220 movs r2, #32 - 80042d8: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003b54: 68fb ldr r3, [r7, #12] + 8003b56: 2220 movs r2, #32 + 8003b58: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80042dc: 68fb ldr r3, [r7, #12] - 80042de: 2200 movs r2, #0 - 80042e0: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003b5c: 68fb ldr r3, [r7, #12] + 8003b5e: 2200 movs r2, #0 + 8003b60: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80042e4: 68fb ldr r3, [r7, #12] - 80042e6: 2200 movs r2, #0 - 80042e8: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003b64: 68fb ldr r3, [r7, #12] + 8003b66: 2200 movs r2, #0 + 8003b68: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 80042ec: 2300 movs r3, #0 - 80042ee: e000 b.n 80042f2 + 8003b6c: 2300 movs r3, #0 + 8003b6e: e000 b.n 8003b72 } else { return HAL_BUSY; - 80042f0: 2302 movs r3, #2 + 8003b70: 2302 movs r3, #2 } } - 80042f2: 4618 mov r0, r3 - 80042f4: 3718 adds r7, #24 - 80042f6: 46bd mov sp, r7 - 80042f8: bd80 pop {r7, pc} - 80042fa: bf00 nop - 80042fc: 00100002 .word 0x00100002 - 8004300: ffff0000 .word 0xffff0000 + 8003b72: 4618 mov r0, r3 + 8003b74: 3718 adds r7, #24 + 8003b76: 46bd mov sp, r7 + 8003b78: bd80 pop {r7, pc} + 8003b7a: bf00 nop + 8003b7c: 00100002 .word 0x00100002 + 8003b80: ffff0000 .word 0xffff0000 -08004304 : +08003b84 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8004304: b580 push {r7, lr} - 8004306: b08c sub sp, #48 @ 0x30 - 8004308: af02 add r7, sp, #8 - 800430a: 60f8 str r0, [r7, #12] - 800430c: 607a str r2, [r7, #4] - 800430e: 461a mov r2, r3 - 8004310: 460b mov r3, r1 - 8004312: 817b strh r3, [r7, #10] - 8004314: 4613 mov r3, r2 - 8004316: 813b strh r3, [r7, #8] + 8003b84: b580 push {r7, lr} + 8003b86: b08c sub sp, #48 @ 0x30 + 8003b88: af02 add r7, sp, #8 + 8003b8a: 60f8 str r0, [r7, #12] + 8003b8c: 607a str r2, [r7, #4] + 8003b8e: 461a mov r2, r3 + 8003b90: 460b mov r3, r1 + 8003b92: 817b strh r3, [r7, #10] + 8003b94: 4613 mov r3, r2 + 8003b96: 813b strh r3, [r7, #8] __IO uint32_t count = 0U; - 8004318: 2300 movs r3, #0 - 800431a: 623b str r3, [r7, #32] + 8003b98: 2300 movs r3, #0 + 8003b9a: 623b str r3, [r7, #32] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); - 800431c: f7fe fde4 bl 8002ee8 - 8004320: 6278 str r0, [r7, #36] @ 0x24 + 8003b9c: f7fe ffe4 bl 8002b68 + 8003ba0: 6278 str r0, [r7, #36] @ 0x24 if (hi2c->State == HAL_I2C_STATE_READY) - 8004322: 68fb ldr r3, [r7, #12] - 8004324: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8004328: b2db uxtb r3, r3 - 800432a: 2b20 cmp r3, #32 - 800432c: f040 824b bne.w 80047c6 + 8003ba2: 68fb ldr r3, [r7, #12] + 8003ba4: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8003ba8: b2db uxtb r3, r3 + 8003baa: 2b20 cmp r3, #32 + 8003bac: f040 824b bne.w 8004046 { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) - 8004330: 6a7b ldr r3, [r7, #36] @ 0x24 - 8004332: 9300 str r3, [sp, #0] - 8004334: 2319 movs r3, #25 - 8004336: 2201 movs r2, #1 - 8004338: 497f ldr r1, [pc, #508] @ (8004538 ) - 800433a: 68f8 ldr r0, [r7, #12] - 800433c: f000 fb9e bl 8004a7c - 8004340: 4603 mov r3, r0 - 8004342: 2b00 cmp r3, #0 - 8004344: d001 beq.n 800434a + 8003bb0: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003bb2: 9300 str r3, [sp, #0] + 8003bb4: 2319 movs r3, #25 + 8003bb6: 2201 movs r2, #1 + 8003bb8: 497f ldr r1, [pc, #508] @ (8003db8 ) + 8003bba: 68f8 ldr r0, [r7, #12] + 8003bbc: f000 fb9e bl 80042fc + 8003bc0: 4603 mov r3, r0 + 8003bc2: 2b00 cmp r3, #0 + 8003bc4: d001 beq.n 8003bca { return HAL_BUSY; - 8004346: 2302 movs r3, #2 - 8004348: e23e b.n 80047c8 + 8003bc6: 2302 movs r3, #2 + 8003bc8: e23e b.n 8004048 } /* Process Locked */ __HAL_LOCK(hi2c); - 800434a: 68fb ldr r3, [r7, #12] - 800434c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8004350: 2b01 cmp r3, #1 - 8004352: d101 bne.n 8004358 - 8004354: 2302 movs r3, #2 - 8004356: e237 b.n 80047c8 - 8004358: 68fb ldr r3, [r7, #12] - 800435a: 2201 movs r2, #1 - 800435c: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003bca: 68fb ldr r3, [r7, #12] + 8003bcc: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8003bd0: 2b01 cmp r3, #1 + 8003bd2: d101 bne.n 8003bd8 + 8003bd4: 2302 movs r3, #2 + 8003bd6: e237 b.n 8004048 + 8003bd8: 68fb ldr r3, [r7, #12] + 8003bda: 2201 movs r2, #1 + 8003bdc: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) - 8004360: 68fb ldr r3, [r7, #12] - 8004362: 681b ldr r3, [r3, #0] - 8004364: 681b ldr r3, [r3, #0] - 8004366: f003 0301 and.w r3, r3, #1 - 800436a: 2b01 cmp r3, #1 - 800436c: d007 beq.n 800437e + 8003be0: 68fb ldr r3, [r7, #12] + 8003be2: 681b ldr r3, [r3, #0] + 8003be4: 681b ldr r3, [r3, #0] + 8003be6: f003 0301 and.w r3, r3, #1 + 8003bea: 2b01 cmp r3, #1 + 8003bec: d007 beq.n 8003bfe { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 800436e: 68fb ldr r3, [r7, #12] - 8004370: 681b ldr r3, [r3, #0] - 8004372: 681a ldr r2, [r3, #0] - 8004374: 68fb ldr r3, [r7, #12] - 8004376: 681b ldr r3, [r3, #0] - 8004378: f042 0201 orr.w r2, r2, #1 - 800437c: 601a str r2, [r3, #0] + 8003bee: 68fb ldr r3, [r7, #12] + 8003bf0: 681b ldr r3, [r3, #0] + 8003bf2: 681a ldr r2, [r3, #0] + 8003bf4: 68fb ldr r3, [r7, #12] + 8003bf6: 681b ldr r3, [r3, #0] + 8003bf8: f042 0201 orr.w r2, r2, #1 + 8003bfc: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 800437e: 68fb ldr r3, [r7, #12] - 8004380: 681b ldr r3, [r3, #0] - 8004382: 681a ldr r2, [r3, #0] - 8004384: 68fb ldr r3, [r7, #12] - 8004386: 681b ldr r3, [r3, #0] - 8004388: f422 6200 bic.w r2, r2, #2048 @ 0x800 - 800438c: 601a str r2, [r3, #0] + 8003bfe: 68fb ldr r3, [r7, #12] + 8003c00: 681b ldr r3, [r3, #0] + 8003c02: 681a ldr r2, [r3, #0] + 8003c04: 68fb ldr r3, [r7, #12] + 8003c06: 681b ldr r3, [r3, #0] + 8003c08: f422 6200 bic.w r2, r2, #2048 @ 0x800 + 8003c0c: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; - 800438e: 68fb ldr r3, [r7, #12] - 8004390: 2222 movs r2, #34 @ 0x22 - 8004392: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003c0e: 68fb ldr r3, [r7, #12] + 8003c10: 2222 movs r2, #34 @ 0x22 + 8003c12: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_MASTER; - 8004396: 68fb ldr r3, [r7, #12] - 8004398: 2210 movs r2, #16 - 800439a: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003c16: 68fb ldr r3, [r7, #12] + 8003c18: 2210 movs r2, #16 + 8003c1a: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 800439e: 68fb ldr r3, [r7, #12] - 80043a0: 2200 movs r2, #0 - 80043a2: 641a str r2, [r3, #64] @ 0x40 + 8003c1e: 68fb ldr r3, [r7, #12] + 8003c20: 2200 movs r2, #0 + 8003c22: 641a str r2, [r3, #64] @ 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; - 80043a4: 68fb ldr r3, [r7, #12] - 80043a6: 687a ldr r2, [r7, #4] - 80043a8: 625a str r2, [r3, #36] @ 0x24 + 8003c24: 68fb ldr r3, [r7, #12] + 8003c26: 687a ldr r2, [r7, #4] + 8003c28: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; - 80043aa: 68fb ldr r3, [r7, #12] - 80043ac: 893a ldrh r2, [r7, #8] - 80043ae: 855a strh r2, [r3, #42] @ 0x2a + 8003c2a: 68fb ldr r3, [r7, #12] + 8003c2c: 893a ldrh r2, [r7, #8] + 8003c2e: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize = hi2c->XferCount; - 80043b0: 68fb ldr r3, [r7, #12] - 80043b2: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80043b4: b29a uxth r2, r3 - 80043b6: 68fb ldr r3, [r7, #12] - 80043b8: 851a strh r2, [r3, #40] @ 0x28 + 8003c30: 68fb ldr r3, [r7, #12] + 8003c32: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003c34: b29a uxth r2, r3 + 8003c36: 68fb ldr r3, [r7, #12] + 8003c38: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 80043ba: 68fb ldr r3, [r7, #12] - 80043bc: 4a5f ldr r2, [pc, #380] @ (800453c ) - 80043be: 62da str r2, [r3, #44] @ 0x2c + 8003c3a: 68fb ldr r3, [r7, #12] + 8003c3c: 4a5f ldr r2, [pc, #380] @ (8003dbc ) + 8003c3e: 62da str r2, [r3, #44] @ 0x2c /* Send Slave Address */ if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) - 80043c0: 8979 ldrh r1, [r7, #10] - 80043c2: 6a7b ldr r3, [r7, #36] @ 0x24 - 80043c4: 6b3a ldr r2, [r7, #48] @ 0x30 - 80043c6: 68f8 ldr r0, [r7, #12] - 80043c8: f000 fa8a bl 80048e0 - 80043cc: 4603 mov r3, r0 - 80043ce: 2b00 cmp r3, #0 - 80043d0: d001 beq.n 80043d6 + 8003c40: 8979 ldrh r1, [r7, #10] + 8003c42: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003c44: 6b3a ldr r2, [r7, #48] @ 0x30 + 8003c46: 68f8 ldr r0, [r7, #12] + 8003c48: f000 fa8a bl 8004160 + 8003c4c: 4603 mov r3, r0 + 8003c4e: 2b00 cmp r3, #0 + 8003c50: d001 beq.n 8003c56 { return HAL_ERROR; - 80043d2: 2301 movs r3, #1 - 80043d4: e1f8 b.n 80047c8 + 8003c52: 2301 movs r3, #1 + 8003c54: e1f8 b.n 8004048 } if (hi2c->XferSize == 0U) - 80043d6: 68fb ldr r3, [r7, #12] - 80043d8: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80043da: 2b00 cmp r3, #0 - 80043dc: d113 bne.n 8004406 + 8003c56: 68fb ldr r3, [r7, #12] + 8003c58: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003c5a: 2b00 cmp r3, #0 + 8003c5c: d113 bne.n 8003c86 { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80043de: 2300 movs r3, #0 - 80043e0: 61fb str r3, [r7, #28] - 80043e2: 68fb ldr r3, [r7, #12] - 80043e4: 681b ldr r3, [r3, #0] - 80043e6: 695b ldr r3, [r3, #20] - 80043e8: 61fb str r3, [r7, #28] - 80043ea: 68fb ldr r3, [r7, #12] - 80043ec: 681b ldr r3, [r3, #0] - 80043ee: 699b ldr r3, [r3, #24] - 80043f0: 61fb str r3, [r7, #28] - 80043f2: 69fb ldr r3, [r7, #28] + 8003c5e: 2300 movs r3, #0 + 8003c60: 61fb str r3, [r7, #28] + 8003c62: 68fb ldr r3, [r7, #12] + 8003c64: 681b ldr r3, [r3, #0] + 8003c66: 695b ldr r3, [r3, #20] + 8003c68: 61fb str r3, [r7, #28] + 8003c6a: 68fb ldr r3, [r7, #12] + 8003c6c: 681b ldr r3, [r3, #0] + 8003c6e: 699b ldr r3, [r3, #24] + 8003c70: 61fb str r3, [r7, #28] + 8003c72: 69fb ldr r3, [r7, #28] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 80043f4: 68fb ldr r3, [r7, #12] - 80043f6: 681b ldr r3, [r3, #0] - 80043f8: 681a ldr r2, [r3, #0] - 80043fa: 68fb ldr r3, [r7, #12] - 80043fc: 681b ldr r3, [r3, #0] - 80043fe: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8004402: 601a str r2, [r3, #0] - 8004404: e1cc b.n 80047a0 + 8003c74: 68fb ldr r3, [r7, #12] + 8003c76: 681b ldr r3, [r3, #0] + 8003c78: 681a ldr r2, [r3, #0] + 8003c7a: 68fb ldr r3, [r7, #12] + 8003c7c: 681b ldr r3, [r3, #0] + 8003c7e: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003c82: 601a str r2, [r3, #0] + 8003c84: e1cc b.n 8004020 } else if (hi2c->XferSize == 1U) - 8004406: 68fb ldr r3, [r7, #12] - 8004408: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800440a: 2b01 cmp r3, #1 - 800440c: d11e bne.n 800444c + 8003c86: 68fb ldr r3, [r7, #12] + 8003c88: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003c8a: 2b01 cmp r3, #1 + 8003c8c: d11e bne.n 8003ccc { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 800440e: 68fb ldr r3, [r7, #12] - 8004410: 681b ldr r3, [r3, #0] - 8004412: 681a ldr r2, [r3, #0] - 8004414: 68fb ldr r3, [r7, #12] - 8004416: 681b ldr r3, [r3, #0] - 8004418: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 800441c: 601a str r2, [r3, #0] + 8003c8e: 68fb ldr r3, [r7, #12] + 8003c90: 681b ldr r3, [r3, #0] + 8003c92: 681a ldr r2, [r3, #0] + 8003c94: 68fb ldr r3, [r7, #12] + 8003c96: 681b ldr r3, [r3, #0] + 8003c98: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8003c9c: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 800441e: b672 cpsid i + 8003c9e: b672 cpsid i } - 8004420: bf00 nop + 8003ca0: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8004422: 2300 movs r3, #0 - 8004424: 61bb str r3, [r7, #24] - 8004426: 68fb ldr r3, [r7, #12] - 8004428: 681b ldr r3, [r3, #0] - 800442a: 695b ldr r3, [r3, #20] - 800442c: 61bb str r3, [r7, #24] - 800442e: 68fb ldr r3, [r7, #12] - 8004430: 681b ldr r3, [r3, #0] - 8004432: 699b ldr r3, [r3, #24] - 8004434: 61bb str r3, [r7, #24] - 8004436: 69bb ldr r3, [r7, #24] + 8003ca2: 2300 movs r3, #0 + 8003ca4: 61bb str r3, [r7, #24] + 8003ca6: 68fb ldr r3, [r7, #12] + 8003ca8: 681b ldr r3, [r3, #0] + 8003caa: 695b ldr r3, [r3, #20] + 8003cac: 61bb str r3, [r7, #24] + 8003cae: 68fb ldr r3, [r7, #12] + 8003cb0: 681b ldr r3, [r3, #0] + 8003cb2: 699b ldr r3, [r3, #24] + 8003cb4: 61bb str r3, [r7, #24] + 8003cb6: 69bb ldr r3, [r7, #24] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8004438: 68fb ldr r3, [r7, #12] - 800443a: 681b ldr r3, [r3, #0] - 800443c: 681a ldr r2, [r3, #0] - 800443e: 68fb ldr r3, [r7, #12] - 8004440: 681b ldr r3, [r3, #0] - 8004442: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8004446: 601a str r2, [r3, #0] + 8003cb8: 68fb ldr r3, [r7, #12] + 8003cba: 681b ldr r3, [r3, #0] + 8003cbc: 681a ldr r2, [r3, #0] + 8003cbe: 68fb ldr r3, [r7, #12] + 8003cc0: 681b ldr r3, [r3, #0] + 8003cc2: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003cc6: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); - 8004448: b662 cpsie i + 8003cc8: b662 cpsie i } - 800444a: e035 b.n 80044b8 + 8003cca: e035 b.n 8003d38 /* Re-enable IRQs */ __enable_irq(); } else if (hi2c->XferSize == 2U) - 800444c: 68fb ldr r3, [r7, #12] - 800444e: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8004450: 2b02 cmp r3, #2 - 8004452: d11e bne.n 8004492 + 8003ccc: 68fb ldr r3, [r7, #12] + 8003cce: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003cd0: 2b02 cmp r3, #2 + 8003cd2: d11e bne.n 8003d12 { /* Enable Pos */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 8004454: 68fb ldr r3, [r7, #12] - 8004456: 681b ldr r3, [r3, #0] - 8004458: 681a ldr r2, [r3, #0] - 800445a: 68fb ldr r3, [r7, #12] - 800445c: 681b ldr r3, [r3, #0] - 800445e: f442 6200 orr.w r2, r2, #2048 @ 0x800 - 8004462: 601a str r2, [r3, #0] + 8003cd4: 68fb ldr r3, [r7, #12] + 8003cd6: 681b ldr r3, [r3, #0] + 8003cd8: 681a ldr r2, [r3, #0] + 8003cda: 68fb ldr r3, [r7, #12] + 8003cdc: 681b ldr r3, [r3, #0] + 8003cde: f442 6200 orr.w r2, r2, #2048 @ 0x800 + 8003ce2: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 8004464: b672 cpsid i + 8003ce4: b672 cpsid i } - 8004466: bf00 nop + 8003ce6: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8004468: 2300 movs r3, #0 - 800446a: 617b str r3, [r7, #20] - 800446c: 68fb ldr r3, [r7, #12] - 800446e: 681b ldr r3, [r3, #0] - 8004470: 695b ldr r3, [r3, #20] - 8004472: 617b str r3, [r7, #20] - 8004474: 68fb ldr r3, [r7, #12] - 8004476: 681b ldr r3, [r3, #0] - 8004478: 699b ldr r3, [r3, #24] - 800447a: 617b str r3, [r7, #20] - 800447c: 697b ldr r3, [r7, #20] + 8003ce8: 2300 movs r3, #0 + 8003cea: 617b str r3, [r7, #20] + 8003cec: 68fb ldr r3, [r7, #12] + 8003cee: 681b ldr r3, [r3, #0] + 8003cf0: 695b ldr r3, [r3, #20] + 8003cf2: 617b str r3, [r7, #20] + 8003cf4: 68fb ldr r3, [r7, #12] + 8003cf6: 681b ldr r3, [r3, #0] + 8003cf8: 699b ldr r3, [r3, #24] + 8003cfa: 617b str r3, [r7, #20] + 8003cfc: 697b ldr r3, [r7, #20] /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 800447e: 68fb ldr r3, [r7, #12] - 8004480: 681b ldr r3, [r3, #0] - 8004482: 681a ldr r2, [r3, #0] - 8004484: 68fb ldr r3, [r7, #12] - 8004486: 681b ldr r3, [r3, #0] - 8004488: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 800448c: 601a str r2, [r3, #0] + 8003cfe: 68fb ldr r3, [r7, #12] + 8003d00: 681b ldr r3, [r3, #0] + 8003d02: 681a ldr r2, [r3, #0] + 8003d04: 68fb ldr r3, [r7, #12] + 8003d06: 681b ldr r3, [r3, #0] + 8003d08: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8003d0c: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); - 800448e: b662 cpsie i + 8003d0e: b662 cpsie i } - 8004490: e012 b.n 80044b8 + 8003d10: e012 b.n 8003d38 __enable_irq(); } else { /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8004492: 68fb ldr r3, [r7, #12] - 8004494: 681b ldr r3, [r3, #0] - 8004496: 681a ldr r2, [r3, #0] - 8004498: 68fb ldr r3, [r7, #12] - 800449a: 681b ldr r3, [r3, #0] - 800449c: f442 6280 orr.w r2, r2, #1024 @ 0x400 - 80044a0: 601a str r2, [r3, #0] + 8003d12: 68fb ldr r3, [r7, #12] + 8003d14: 681b ldr r3, [r3, #0] + 8003d16: 681a ldr r2, [r3, #0] + 8003d18: 68fb ldr r3, [r7, #12] + 8003d1a: 681b ldr r3, [r3, #0] + 8003d1c: f442 6280 orr.w r2, r2, #1024 @ 0x400 + 8003d20: 601a str r2, [r3, #0] /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80044a2: 2300 movs r3, #0 - 80044a4: 613b str r3, [r7, #16] - 80044a6: 68fb ldr r3, [r7, #12] - 80044a8: 681b ldr r3, [r3, #0] - 80044aa: 695b ldr r3, [r3, #20] - 80044ac: 613b str r3, [r7, #16] - 80044ae: 68fb ldr r3, [r7, #12] - 80044b0: 681b ldr r3, [r3, #0] - 80044b2: 699b ldr r3, [r3, #24] - 80044b4: 613b str r3, [r7, #16] - 80044b6: 693b ldr r3, [r7, #16] + 8003d22: 2300 movs r3, #0 + 8003d24: 613b str r3, [r7, #16] + 8003d26: 68fb ldr r3, [r7, #12] + 8003d28: 681b ldr r3, [r3, #0] + 8003d2a: 695b ldr r3, [r3, #20] + 8003d2c: 613b str r3, [r7, #16] + 8003d2e: 68fb ldr r3, [r7, #12] + 8003d30: 681b ldr r3, [r3, #0] + 8003d32: 699b ldr r3, [r3, #24] + 8003d34: 613b str r3, [r7, #16] + 8003d36: 693b ldr r3, [r7, #16] } while (hi2c->XferSize > 0U) - 80044b8: e172 b.n 80047a0 + 8003d38: e172 b.n 8004020 { if (hi2c->XferSize <= 3U) - 80044ba: 68fb ldr r3, [r7, #12] - 80044bc: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80044be: 2b03 cmp r3, #3 - 80044c0: f200 811f bhi.w 8004702 + 8003d3a: 68fb ldr r3, [r7, #12] + 8003d3c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003d3e: 2b03 cmp r3, #3 + 8003d40: f200 811f bhi.w 8003f82 { /* One byte */ if (hi2c->XferSize == 1U) - 80044c4: 68fb ldr r3, [r7, #12] - 80044c6: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80044c8: 2b01 cmp r3, #1 - 80044ca: d123 bne.n 8004514 + 8003d44: 68fb ldr r3, [r7, #12] + 8003d46: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003d48: 2b01 cmp r3, #1 + 8003d4a: d123 bne.n 8003d94 { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 80044cc: 6a7a ldr r2, [r7, #36] @ 0x24 - 80044ce: 6b39 ldr r1, [r7, #48] @ 0x30 - 80044d0: 68f8 ldr r0, [r7, #12] - 80044d2: f000 fc7d bl 8004dd0 - 80044d6: 4603 mov r3, r0 - 80044d8: 2b00 cmp r3, #0 - 80044da: d001 beq.n 80044e0 + 8003d4c: 6a7a ldr r2, [r7, #36] @ 0x24 + 8003d4e: 6b39 ldr r1, [r7, #48] @ 0x30 + 8003d50: 68f8 ldr r0, [r7, #12] + 8003d52: f000 fc7d bl 8004650 + 8003d56: 4603 mov r3, r0 + 8003d58: 2b00 cmp r3, #0 + 8003d5a: d001 beq.n 8003d60 { return HAL_ERROR; - 80044dc: 2301 movs r3, #1 - 80044de: e173 b.n 80047c8 + 8003d5c: 2301 movs r3, #1 + 8003d5e: e173 b.n 8004048 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 80044e0: 68fb ldr r3, [r7, #12] - 80044e2: 681b ldr r3, [r3, #0] - 80044e4: 691a ldr r2, [r3, #16] - 80044e6: 68fb ldr r3, [r7, #12] - 80044e8: 6a5b ldr r3, [r3, #36] @ 0x24 - 80044ea: b2d2 uxtb r2, r2 - 80044ec: 701a strb r2, [r3, #0] + 8003d60: 68fb ldr r3, [r7, #12] + 8003d62: 681b ldr r3, [r3, #0] + 8003d64: 691a ldr r2, [r3, #16] + 8003d66: 68fb ldr r3, [r7, #12] + 8003d68: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003d6a: b2d2 uxtb r2, r2 + 8003d6c: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80044ee: 68fb ldr r3, [r7, #12] - 80044f0: 6a5b ldr r3, [r3, #36] @ 0x24 - 80044f2: 1c5a adds r2, r3, #1 - 80044f4: 68fb ldr r3, [r7, #12] - 80044f6: 625a str r2, [r3, #36] @ 0x24 + 8003d6e: 68fb ldr r3, [r7, #12] + 8003d70: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003d72: 1c5a adds r2, r3, #1 + 8003d74: 68fb ldr r3, [r7, #12] + 8003d76: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 80044f8: 68fb ldr r3, [r7, #12] - 80044fa: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80044fc: 3b01 subs r3, #1 - 80044fe: b29a uxth r2, r3 - 8004500: 68fb ldr r3, [r7, #12] - 8004502: 851a strh r2, [r3, #40] @ 0x28 + 8003d78: 68fb ldr r3, [r7, #12] + 8003d7a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003d7c: 3b01 subs r3, #1 + 8003d7e: b29a uxth r2, r3 + 8003d80: 68fb ldr r3, [r7, #12] + 8003d82: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8004504: 68fb ldr r3, [r7, #12] - 8004506: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8004508: b29b uxth r3, r3 - 800450a: 3b01 subs r3, #1 - 800450c: b29a uxth r2, r3 - 800450e: 68fb ldr r3, [r7, #12] - 8004510: 855a strh r2, [r3, #42] @ 0x2a - 8004512: e145 b.n 80047a0 + 8003d84: 68fb ldr r3, [r7, #12] + 8003d86: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003d88: b29b uxth r3, r3 + 8003d8a: 3b01 subs r3, #1 + 8003d8c: b29a uxth r2, r3 + 8003d8e: 68fb ldr r3, [r7, #12] + 8003d90: 855a strh r2, [r3, #42] @ 0x2a + 8003d92: e145 b.n 8004020 } /* Two bytes */ else if (hi2c->XferSize == 2U) - 8004514: 68fb ldr r3, [r7, #12] - 8004516: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8004518: 2b02 cmp r3, #2 - 800451a: d152 bne.n 80045c2 + 8003d94: 68fb ldr r3, [r7, #12] + 8003d96: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003d98: 2b02 cmp r3, #2 + 8003d9a: d152 bne.n 8003e42 { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) - 800451c: 6a7b ldr r3, [r7, #36] @ 0x24 - 800451e: 9300 str r3, [sp, #0] - 8004520: 6b3b ldr r3, [r7, #48] @ 0x30 - 8004522: 2200 movs r2, #0 - 8004524: 4906 ldr r1, [pc, #24] @ (8004540 ) - 8004526: 68f8 ldr r0, [r7, #12] - 8004528: f000 faa8 bl 8004a7c - 800452c: 4603 mov r3, r0 - 800452e: 2b00 cmp r3, #0 - 8004530: d008 beq.n 8004544 + 8003d9c: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003d9e: 9300 str r3, [sp, #0] + 8003da0: 6b3b ldr r3, [r7, #48] @ 0x30 + 8003da2: 2200 movs r2, #0 + 8003da4: 4906 ldr r1, [pc, #24] @ (8003dc0 ) + 8003da6: 68f8 ldr r0, [r7, #12] + 8003da8: f000 faa8 bl 80042fc + 8003dac: 4603 mov r3, r0 + 8003dae: 2b00 cmp r3, #0 + 8003db0: d008 beq.n 8003dc4 { return HAL_ERROR; - 8004532: 2301 movs r3, #1 - 8004534: e148 b.n 80047c8 - 8004536: bf00 nop - 8004538: 00100002 .word 0x00100002 - 800453c: ffff0000 .word 0xffff0000 - 8004540: 00010004 .word 0x00010004 + 8003db2: 2301 movs r3, #1 + 8003db4: e148 b.n 8004048 + 8003db6: bf00 nop + 8003db8: 00100002 .word 0x00100002 + 8003dbc: ffff0000 .word 0xffff0000 + 8003dc0: 00010004 .word 0x00010004 __ASM volatile ("cpsid i" : : : "memory"); - 8004544: b672 cpsid i + 8003dc4: b672 cpsid i } - 8004546: bf00 nop + 8003dc6: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8004548: 68fb ldr r3, [r7, #12] - 800454a: 681b ldr r3, [r3, #0] - 800454c: 681a ldr r2, [r3, #0] - 800454e: 68fb ldr r3, [r7, #12] - 8004550: 681b ldr r3, [r3, #0] - 8004552: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8004556: 601a str r2, [r3, #0] + 8003dc8: 68fb ldr r3, [r7, #12] + 8003dca: 681b ldr r3, [r3, #0] + 8003dcc: 681a ldr r2, [r3, #0] + 8003dce: 68fb ldr r3, [r7, #12] + 8003dd0: 681b ldr r3, [r3, #0] + 8003dd2: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003dd6: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8004558: 68fb ldr r3, [r7, #12] - 800455a: 681b ldr r3, [r3, #0] - 800455c: 691a ldr r2, [r3, #16] - 800455e: 68fb ldr r3, [r7, #12] - 8004560: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004562: b2d2 uxtb r2, r2 - 8004564: 701a strb r2, [r3, #0] + 8003dd8: 68fb ldr r3, [r7, #12] + 8003dda: 681b ldr r3, [r3, #0] + 8003ddc: 691a ldr r2, [r3, #16] + 8003dde: 68fb ldr r3, [r7, #12] + 8003de0: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003de2: b2d2 uxtb r2, r2 + 8003de4: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8004566: 68fb ldr r3, [r7, #12] - 8004568: 6a5b ldr r3, [r3, #36] @ 0x24 - 800456a: 1c5a adds r2, r3, #1 - 800456c: 68fb ldr r3, [r7, #12] - 800456e: 625a str r2, [r3, #36] @ 0x24 + 8003de6: 68fb ldr r3, [r7, #12] + 8003de8: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003dea: 1c5a adds r2, r3, #1 + 8003dec: 68fb ldr r3, [r7, #12] + 8003dee: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8004570: 68fb ldr r3, [r7, #12] - 8004572: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8004574: 3b01 subs r3, #1 - 8004576: b29a uxth r2, r3 - 8004578: 68fb ldr r3, [r7, #12] - 800457a: 851a strh r2, [r3, #40] @ 0x28 + 8003df0: 68fb ldr r3, [r7, #12] + 8003df2: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003df4: 3b01 subs r3, #1 + 8003df6: b29a uxth r2, r3 + 8003df8: 68fb ldr r3, [r7, #12] + 8003dfa: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 800457c: 68fb ldr r3, [r7, #12] - 800457e: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8004580: b29b uxth r3, r3 - 8004582: 3b01 subs r3, #1 - 8004584: b29a uxth r2, r3 - 8004586: 68fb ldr r3, [r7, #12] - 8004588: 855a strh r2, [r3, #42] @ 0x2a + 8003dfc: 68fb ldr r3, [r7, #12] + 8003dfe: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003e00: b29b uxth r3, r3 + 8003e02: 3b01 subs r3, #1 + 8003e04: b29a uxth r2, r3 + 8003e06: 68fb ldr r3, [r7, #12] + 8003e08: 855a strh r2, [r3, #42] @ 0x2a __ASM volatile ("cpsie i" : : : "memory"); - 800458a: b662 cpsie i + 8003e0a: b662 cpsie i } - 800458c: bf00 nop + 8003e0c: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 800458e: 68fb ldr r3, [r7, #12] - 8004590: 681b ldr r3, [r3, #0] - 8004592: 691a ldr r2, [r3, #16] - 8004594: 68fb ldr r3, [r7, #12] - 8004596: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004598: b2d2 uxtb r2, r2 - 800459a: 701a strb r2, [r3, #0] + 8003e0e: 68fb ldr r3, [r7, #12] + 8003e10: 681b ldr r3, [r3, #0] + 8003e12: 691a ldr r2, [r3, #16] + 8003e14: 68fb ldr r3, [r7, #12] + 8003e16: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003e18: b2d2 uxtb r2, r2 + 8003e1a: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 800459c: 68fb ldr r3, [r7, #12] - 800459e: 6a5b ldr r3, [r3, #36] @ 0x24 - 80045a0: 1c5a adds r2, r3, #1 - 80045a2: 68fb ldr r3, [r7, #12] - 80045a4: 625a str r2, [r3, #36] @ 0x24 + 8003e1c: 68fb ldr r3, [r7, #12] + 8003e1e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003e20: 1c5a adds r2, r3, #1 + 8003e22: 68fb ldr r3, [r7, #12] + 8003e24: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 80045a6: 68fb ldr r3, [r7, #12] - 80045a8: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80045aa: 3b01 subs r3, #1 - 80045ac: b29a uxth r2, r3 - 80045ae: 68fb ldr r3, [r7, #12] - 80045b0: 851a strh r2, [r3, #40] @ 0x28 + 8003e26: 68fb ldr r3, [r7, #12] + 8003e28: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003e2a: 3b01 subs r3, #1 + 8003e2c: b29a uxth r2, r3 + 8003e2e: 68fb ldr r3, [r7, #12] + 8003e30: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 80045b2: 68fb ldr r3, [r7, #12] - 80045b4: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80045b6: b29b uxth r3, r3 - 80045b8: 3b01 subs r3, #1 - 80045ba: b29a uxth r2, r3 - 80045bc: 68fb ldr r3, [r7, #12] - 80045be: 855a strh r2, [r3, #42] @ 0x2a - 80045c0: e0ee b.n 80047a0 + 8003e32: 68fb ldr r3, [r7, #12] + 8003e34: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003e36: b29b uxth r3, r3 + 8003e38: 3b01 subs r3, #1 + 8003e3a: b29a uxth r2, r3 + 8003e3c: 68fb ldr r3, [r7, #12] + 8003e3e: 855a strh r2, [r3, #42] @ 0x2a + 8003e40: e0ee b.n 8004020 } /* 3 Last bytes */ else { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) - 80045c2: 6a7b ldr r3, [r7, #36] @ 0x24 - 80045c4: 9300 str r3, [sp, #0] - 80045c6: 6b3b ldr r3, [r7, #48] @ 0x30 - 80045c8: 2200 movs r2, #0 - 80045ca: 4981 ldr r1, [pc, #516] @ (80047d0 ) - 80045cc: 68f8 ldr r0, [r7, #12] - 80045ce: f000 fa55 bl 8004a7c - 80045d2: 4603 mov r3, r0 - 80045d4: 2b00 cmp r3, #0 - 80045d6: d001 beq.n 80045dc + 8003e42: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003e44: 9300 str r3, [sp, #0] + 8003e46: 6b3b ldr r3, [r7, #48] @ 0x30 + 8003e48: 2200 movs r2, #0 + 8003e4a: 4981 ldr r1, [pc, #516] @ (8004050 ) + 8003e4c: 68f8 ldr r0, [r7, #12] + 8003e4e: f000 fa55 bl 80042fc + 8003e52: 4603 mov r3, r0 + 8003e54: 2b00 cmp r3, #0 + 8003e56: d001 beq.n 8003e5c { return HAL_ERROR; - 80045d8: 2301 movs r3, #1 - 80045da: e0f5 b.n 80047c8 + 8003e58: 2301 movs r3, #1 + 8003e5a: e0f5 b.n 8004048 } /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 80045dc: 68fb ldr r3, [r7, #12] - 80045de: 681b ldr r3, [r3, #0] - 80045e0: 681a ldr r2, [r3, #0] - 80045e2: 68fb ldr r3, [r7, #12] - 80045e4: 681b ldr r3, [r3, #0] - 80045e6: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 80045ea: 601a str r2, [r3, #0] + 8003e5c: 68fb ldr r3, [r7, #12] + 8003e5e: 681b ldr r3, [r3, #0] + 8003e60: 681a ldr r2, [r3, #0] + 8003e62: 68fb ldr r3, [r7, #12] + 8003e64: 681b ldr r3, [r3, #0] + 8003e66: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8003e6a: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 80045ec: b672 cpsid i + 8003e6c: b672 cpsid i } - 80045ee: bf00 nop + 8003e6e: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 80045f0: 68fb ldr r3, [r7, #12] - 80045f2: 681b ldr r3, [r3, #0] - 80045f4: 691a ldr r2, [r3, #16] - 80045f6: 68fb ldr r3, [r7, #12] - 80045f8: 6a5b ldr r3, [r3, #36] @ 0x24 - 80045fa: b2d2 uxtb r2, r2 - 80045fc: 701a strb r2, [r3, #0] + 8003e70: 68fb ldr r3, [r7, #12] + 8003e72: 681b ldr r3, [r3, #0] + 8003e74: 691a ldr r2, [r3, #16] + 8003e76: 68fb ldr r3, [r7, #12] + 8003e78: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003e7a: b2d2 uxtb r2, r2 + 8003e7c: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80045fe: 68fb ldr r3, [r7, #12] - 8004600: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004602: 1c5a adds r2, r3, #1 - 8004604: 68fb ldr r3, [r7, #12] - 8004606: 625a str r2, [r3, #36] @ 0x24 + 8003e7e: 68fb ldr r3, [r7, #12] + 8003e80: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003e82: 1c5a adds r2, r3, #1 + 8003e84: 68fb ldr r3, [r7, #12] + 8003e86: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8004608: 68fb ldr r3, [r7, #12] - 800460a: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800460c: 3b01 subs r3, #1 - 800460e: b29a uxth r2, r3 - 8004610: 68fb ldr r3, [r7, #12] - 8004612: 851a strh r2, [r3, #40] @ 0x28 + 8003e88: 68fb ldr r3, [r7, #12] + 8003e8a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003e8c: 3b01 subs r3, #1 + 8003e8e: b29a uxth r2, r3 + 8003e90: 68fb ldr r3, [r7, #12] + 8003e92: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8004614: 68fb ldr r3, [r7, #12] - 8004616: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8004618: b29b uxth r3, r3 - 800461a: 3b01 subs r3, #1 - 800461c: b29a uxth r2, r3 - 800461e: 68fb ldr r3, [r7, #12] - 8004620: 855a strh r2, [r3, #42] @ 0x2a + 8003e94: 68fb ldr r3, [r7, #12] + 8003e96: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003e98: b29b uxth r3, r3 + 8003e9a: 3b01 subs r3, #1 + 8003e9c: b29a uxth r2, r3 + 8003e9e: 68fb ldr r3, [r7, #12] + 8003ea0: 855a strh r2, [r3, #42] @ 0x2a /* Wait until BTF flag is set */ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U); - 8004622: 4b6c ldr r3, [pc, #432] @ (80047d4 ) - 8004624: 681b ldr r3, [r3, #0] - 8004626: 08db lsrs r3, r3, #3 - 8004628: 4a6b ldr r2, [pc, #428] @ (80047d8 ) - 800462a: fba2 2303 umull r2, r3, r2, r3 - 800462e: 0a1a lsrs r2, r3, #8 - 8004630: 4613 mov r3, r2 - 8004632: 009b lsls r3, r3, #2 - 8004634: 4413 add r3, r2 - 8004636: 00da lsls r2, r3, #3 - 8004638: 1ad3 subs r3, r2, r3 - 800463a: 623b str r3, [r7, #32] + 8003ea2: 4b6c ldr r3, [pc, #432] @ (8004054 ) + 8003ea4: 681b ldr r3, [r3, #0] + 8003ea6: 08db lsrs r3, r3, #3 + 8003ea8: 4a6b ldr r2, [pc, #428] @ (8004058 ) + 8003eaa: fba2 2303 umull r2, r3, r2, r3 + 8003eae: 0a1a lsrs r2, r3, #8 + 8003eb0: 4613 mov r3, r2 + 8003eb2: 009b lsls r3, r3, #2 + 8003eb4: 4413 add r3, r2 + 8003eb6: 00da lsls r2, r3, #3 + 8003eb8: 1ad3 subs r3, r2, r3 + 8003eba: 623b str r3, [r7, #32] do { count--; - 800463c: 6a3b ldr r3, [r7, #32] - 800463e: 3b01 subs r3, #1 - 8004640: 623b str r3, [r7, #32] + 8003ebc: 6a3b ldr r3, [r7, #32] + 8003ebe: 3b01 subs r3, #1 + 8003ec0: 623b str r3, [r7, #32] if (count == 0U) - 8004642: 6a3b ldr r3, [r7, #32] - 8004644: 2b00 cmp r3, #0 - 8004646: d118 bne.n 800467a + 8003ec2: 6a3b ldr r3, [r7, #32] + 8003ec4: 2b00 cmp r3, #0 + 8003ec6: d118 bne.n 8003efa { hi2c->PreviousState = I2C_STATE_NONE; - 8004648: 68fb ldr r3, [r7, #12] - 800464a: 2200 movs r2, #0 - 800464c: 631a str r2, [r3, #48] @ 0x30 + 8003ec8: 68fb ldr r3, [r7, #12] + 8003eca: 2200 movs r2, #0 + 8003ecc: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 800464e: 68fb ldr r3, [r7, #12] - 8004650: 2220 movs r2, #32 - 8004652: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003ece: 68fb ldr r3, [r7, #12] + 8003ed0: 2220 movs r2, #32 + 8003ed2: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004656: 68fb ldr r3, [r7, #12] - 8004658: 2200 movs r2, #0 - 800465a: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003ed6: 68fb ldr r3, [r7, #12] + 8003ed8: 2200 movs r2, #0 + 8003eda: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 800465e: 68fb ldr r3, [r7, #12] - 8004660: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004662: f043 0220 orr.w r2, r3, #32 - 8004666: 68fb ldr r3, [r7, #12] - 8004668: 641a str r2, [r3, #64] @ 0x40 + 8003ede: 68fb ldr r3, [r7, #12] + 8003ee0: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003ee2: f043 0220 orr.w r2, r3, #32 + 8003ee6: 68fb ldr r3, [r7, #12] + 8003ee8: 641a str r2, [r3, #64] @ 0x40 __ASM volatile ("cpsie i" : : : "memory"); - 800466a: b662 cpsie i + 8003eea: b662 cpsie i } - 800466c: bf00 nop + 8003eec: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 800466e: 68fb ldr r3, [r7, #12] - 8004670: 2200 movs r2, #0 - 8004672: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003eee: 68fb ldr r3, [r7, #12] + 8003ef0: 2200 movs r2, #0 + 8003ef2: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004676: 2301 movs r3, #1 - 8004678: e0a6 b.n 80047c8 + 8003ef6: 2301 movs r3, #1 + 8003ef8: e0a6 b.n 8004048 } } while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET); - 800467a: 68fb ldr r3, [r7, #12] - 800467c: 681b ldr r3, [r3, #0] - 800467e: 695b ldr r3, [r3, #20] - 8004680: f003 0304 and.w r3, r3, #4 - 8004684: 2b04 cmp r3, #4 - 8004686: d1d9 bne.n 800463c + 8003efa: 68fb ldr r3, [r7, #12] + 8003efc: 681b ldr r3, [r3, #0] + 8003efe: 695b ldr r3, [r3, #20] + 8003f00: f003 0304 and.w r3, r3, #4 + 8003f04: 2b04 cmp r3, #4 + 8003f06: d1d9 bne.n 8003ebc /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8004688: 68fb ldr r3, [r7, #12] - 800468a: 681b ldr r3, [r3, #0] - 800468c: 681a ldr r2, [r3, #0] - 800468e: 68fb ldr r3, [r7, #12] - 8004690: 681b ldr r3, [r3, #0] - 8004692: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8004696: 601a str r2, [r3, #0] + 8003f08: 68fb ldr r3, [r7, #12] + 8003f0a: 681b ldr r3, [r3, #0] + 8003f0c: 681a ldr r2, [r3, #0] + 8003f0e: 68fb ldr r3, [r7, #12] + 8003f10: 681b ldr r3, [r3, #0] + 8003f12: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003f16: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8004698: 68fb ldr r3, [r7, #12] - 800469a: 681b ldr r3, [r3, #0] - 800469c: 691a ldr r2, [r3, #16] - 800469e: 68fb ldr r3, [r7, #12] - 80046a0: 6a5b ldr r3, [r3, #36] @ 0x24 - 80046a2: b2d2 uxtb r2, r2 - 80046a4: 701a strb r2, [r3, #0] + 8003f18: 68fb ldr r3, [r7, #12] + 8003f1a: 681b ldr r3, [r3, #0] + 8003f1c: 691a ldr r2, [r3, #16] + 8003f1e: 68fb ldr r3, [r7, #12] + 8003f20: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003f22: b2d2 uxtb r2, r2 + 8003f24: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80046a6: 68fb ldr r3, [r7, #12] - 80046a8: 6a5b ldr r3, [r3, #36] @ 0x24 - 80046aa: 1c5a adds r2, r3, #1 - 80046ac: 68fb ldr r3, [r7, #12] - 80046ae: 625a str r2, [r3, #36] @ 0x24 + 8003f26: 68fb ldr r3, [r7, #12] + 8003f28: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003f2a: 1c5a adds r2, r3, #1 + 8003f2c: 68fb ldr r3, [r7, #12] + 8003f2e: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 80046b0: 68fb ldr r3, [r7, #12] - 80046b2: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80046b4: 3b01 subs r3, #1 - 80046b6: b29a uxth r2, r3 - 80046b8: 68fb ldr r3, [r7, #12] - 80046ba: 851a strh r2, [r3, #40] @ 0x28 + 8003f30: 68fb ldr r3, [r7, #12] + 8003f32: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003f34: 3b01 subs r3, #1 + 8003f36: b29a uxth r2, r3 + 8003f38: 68fb ldr r3, [r7, #12] + 8003f3a: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 80046bc: 68fb ldr r3, [r7, #12] - 80046be: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80046c0: b29b uxth r3, r3 - 80046c2: 3b01 subs r3, #1 - 80046c4: b29a uxth r2, r3 - 80046c6: 68fb ldr r3, [r7, #12] - 80046c8: 855a strh r2, [r3, #42] @ 0x2a + 8003f3c: 68fb ldr r3, [r7, #12] + 8003f3e: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003f40: b29b uxth r3, r3 + 8003f42: 3b01 subs r3, #1 + 8003f44: b29a uxth r2, r3 + 8003f46: 68fb ldr r3, [r7, #12] + 8003f48: 855a strh r2, [r3, #42] @ 0x2a __ASM volatile ("cpsie i" : : : "memory"); - 80046ca: b662 cpsie i + 8003f4a: b662 cpsie i } - 80046cc: bf00 nop + 8003f4c: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 80046ce: 68fb ldr r3, [r7, #12] - 80046d0: 681b ldr r3, [r3, #0] - 80046d2: 691a ldr r2, [r3, #16] - 80046d4: 68fb ldr r3, [r7, #12] - 80046d6: 6a5b ldr r3, [r3, #36] @ 0x24 - 80046d8: b2d2 uxtb r2, r2 - 80046da: 701a strb r2, [r3, #0] + 8003f4e: 68fb ldr r3, [r7, #12] + 8003f50: 681b ldr r3, [r3, #0] + 8003f52: 691a ldr r2, [r3, #16] + 8003f54: 68fb ldr r3, [r7, #12] + 8003f56: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003f58: b2d2 uxtb r2, r2 + 8003f5a: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80046dc: 68fb ldr r3, [r7, #12] - 80046de: 6a5b ldr r3, [r3, #36] @ 0x24 - 80046e0: 1c5a adds r2, r3, #1 - 80046e2: 68fb ldr r3, [r7, #12] - 80046e4: 625a str r2, [r3, #36] @ 0x24 + 8003f5c: 68fb ldr r3, [r7, #12] + 8003f5e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003f60: 1c5a adds r2, r3, #1 + 8003f62: 68fb ldr r3, [r7, #12] + 8003f64: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 80046e6: 68fb ldr r3, [r7, #12] - 80046e8: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80046ea: 3b01 subs r3, #1 - 80046ec: b29a uxth r2, r3 - 80046ee: 68fb ldr r3, [r7, #12] - 80046f0: 851a strh r2, [r3, #40] @ 0x28 + 8003f66: 68fb ldr r3, [r7, #12] + 8003f68: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003f6a: 3b01 subs r3, #1 + 8003f6c: b29a uxth r2, r3 + 8003f6e: 68fb ldr r3, [r7, #12] + 8003f70: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 80046f2: 68fb ldr r3, [r7, #12] - 80046f4: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80046f6: b29b uxth r3, r3 - 80046f8: 3b01 subs r3, #1 - 80046fa: b29a uxth r2, r3 - 80046fc: 68fb ldr r3, [r7, #12] - 80046fe: 855a strh r2, [r3, #42] @ 0x2a - 8004700: e04e b.n 80047a0 + 8003f72: 68fb ldr r3, [r7, #12] + 8003f74: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003f76: b29b uxth r3, r3 + 8003f78: 3b01 subs r3, #1 + 8003f7a: b29a uxth r2, r3 + 8003f7c: 68fb ldr r3, [r7, #12] + 8003f7e: 855a strh r2, [r3, #42] @ 0x2a + 8003f80: e04e b.n 8004020 } } else { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8004702: 6a7a ldr r2, [r7, #36] @ 0x24 - 8004704: 6b39 ldr r1, [r7, #48] @ 0x30 - 8004706: 68f8 ldr r0, [r7, #12] - 8004708: f000 fb62 bl 8004dd0 - 800470c: 4603 mov r3, r0 - 800470e: 2b00 cmp r3, #0 - 8004710: d001 beq.n 8004716 + 8003f82: 6a7a ldr r2, [r7, #36] @ 0x24 + 8003f84: 6b39 ldr r1, [r7, #48] @ 0x30 + 8003f86: 68f8 ldr r0, [r7, #12] + 8003f88: f000 fb62 bl 8004650 + 8003f8c: 4603 mov r3, r0 + 8003f8e: 2b00 cmp r3, #0 + 8003f90: d001 beq.n 8003f96 { return HAL_ERROR; - 8004712: 2301 movs r3, #1 - 8004714: e058 b.n 80047c8 + 8003f92: 2301 movs r3, #1 + 8003f94: e058 b.n 8004048 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8004716: 68fb ldr r3, [r7, #12] - 8004718: 681b ldr r3, [r3, #0] - 800471a: 691a ldr r2, [r3, #16] - 800471c: 68fb ldr r3, [r7, #12] - 800471e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004720: b2d2 uxtb r2, r2 - 8004722: 701a strb r2, [r3, #0] + 8003f96: 68fb ldr r3, [r7, #12] + 8003f98: 681b ldr r3, [r3, #0] + 8003f9a: 691a ldr r2, [r3, #16] + 8003f9c: 68fb ldr r3, [r7, #12] + 8003f9e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003fa0: b2d2 uxtb r2, r2 + 8003fa2: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8004724: 68fb ldr r3, [r7, #12] - 8004726: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004728: 1c5a adds r2, r3, #1 - 800472a: 68fb ldr r3, [r7, #12] - 800472c: 625a str r2, [r3, #36] @ 0x24 + 8003fa4: 68fb ldr r3, [r7, #12] + 8003fa6: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003fa8: 1c5a adds r2, r3, #1 + 8003faa: 68fb ldr r3, [r7, #12] + 8003fac: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 800472e: 68fb ldr r3, [r7, #12] - 8004730: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8004732: 3b01 subs r3, #1 - 8004734: b29a uxth r2, r3 - 8004736: 68fb ldr r3, [r7, #12] - 8004738: 851a strh r2, [r3, #40] @ 0x28 + 8003fae: 68fb ldr r3, [r7, #12] + 8003fb0: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003fb2: 3b01 subs r3, #1 + 8003fb4: b29a uxth r2, r3 + 8003fb6: 68fb ldr r3, [r7, #12] + 8003fb8: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 800473a: 68fb ldr r3, [r7, #12] - 800473c: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800473e: b29b uxth r3, r3 - 8004740: 3b01 subs r3, #1 - 8004742: b29a uxth r2, r3 - 8004744: 68fb ldr r3, [r7, #12] - 8004746: 855a strh r2, [r3, #42] @ 0x2a + 8003fba: 68fb ldr r3, [r7, #12] + 8003fbc: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003fbe: b29b uxth r3, r3 + 8003fc0: 3b01 subs r3, #1 + 8003fc2: b29a uxth r2, r3 + 8003fc4: 68fb ldr r3, [r7, #12] + 8003fc6: 855a strh r2, [r3, #42] @ 0x2a if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) - 8004748: 68fb ldr r3, [r7, #12] - 800474a: 681b ldr r3, [r3, #0] - 800474c: 695b ldr r3, [r3, #20] - 800474e: f003 0304 and.w r3, r3, #4 - 8004752: 2b04 cmp r3, #4 - 8004754: d124 bne.n 80047a0 + 8003fc8: 68fb ldr r3, [r7, #12] + 8003fca: 681b ldr r3, [r3, #0] + 8003fcc: 695b ldr r3, [r3, #20] + 8003fce: f003 0304 and.w r3, r3, #4 + 8003fd2: 2b04 cmp r3, #4 + 8003fd4: d124 bne.n 8004020 { if (hi2c->XferSize == 3U) - 8004756: 68fb ldr r3, [r7, #12] - 8004758: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800475a: 2b03 cmp r3, #3 - 800475c: d107 bne.n 800476e + 8003fd6: 68fb ldr r3, [r7, #12] + 8003fd8: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003fda: 2b03 cmp r3, #3 + 8003fdc: d107 bne.n 8003fee { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 800475e: 68fb ldr r3, [r7, #12] - 8004760: 681b ldr r3, [r3, #0] - 8004762: 681a ldr r2, [r3, #0] - 8004764: 68fb ldr r3, [r7, #12] - 8004766: 681b ldr r3, [r3, #0] - 8004768: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 800476c: 601a str r2, [r3, #0] + 8003fde: 68fb ldr r3, [r7, #12] + 8003fe0: 681b ldr r3, [r3, #0] + 8003fe2: 681a ldr r2, [r3, #0] + 8003fe4: 68fb ldr r3, [r7, #12] + 8003fe6: 681b ldr r3, [r3, #0] + 8003fe8: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8003fec: 601a str r2, [r3, #0] } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 800476e: 68fb ldr r3, [r7, #12] - 8004770: 681b ldr r3, [r3, #0] - 8004772: 691a ldr r2, [r3, #16] - 8004774: 68fb ldr r3, [r7, #12] - 8004776: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004778: b2d2 uxtb r2, r2 - 800477a: 701a strb r2, [r3, #0] + 8003fee: 68fb ldr r3, [r7, #12] + 8003ff0: 681b ldr r3, [r3, #0] + 8003ff2: 691a ldr r2, [r3, #16] + 8003ff4: 68fb ldr r3, [r7, #12] + 8003ff6: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003ff8: b2d2 uxtb r2, r2 + 8003ffa: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 800477c: 68fb ldr r3, [r7, #12] - 800477e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004780: 1c5a adds r2, r3, #1 - 8004782: 68fb ldr r3, [r7, #12] - 8004784: 625a str r2, [r3, #36] @ 0x24 + 8003ffc: 68fb ldr r3, [r7, #12] + 8003ffe: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004000: 1c5a adds r2, r3, #1 + 8004002: 68fb ldr r3, [r7, #12] + 8004004: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8004786: 68fb ldr r3, [r7, #12] - 8004788: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800478a: 3b01 subs r3, #1 - 800478c: b29a uxth r2, r3 - 800478e: 68fb ldr r3, [r7, #12] - 8004790: 851a strh r2, [r3, #40] @ 0x28 + 8004006: 68fb ldr r3, [r7, #12] + 8004008: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800400a: 3b01 subs r3, #1 + 800400c: b29a uxth r2, r3 + 800400e: 68fb ldr r3, [r7, #12] + 8004010: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8004792: 68fb ldr r3, [r7, #12] - 8004794: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8004796: b29b uxth r3, r3 - 8004798: 3b01 subs r3, #1 - 800479a: b29a uxth r2, r3 - 800479c: 68fb ldr r3, [r7, #12] - 800479e: 855a strh r2, [r3, #42] @ 0x2a + 8004012: 68fb ldr r3, [r7, #12] + 8004014: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004016: b29b uxth r3, r3 + 8004018: 3b01 subs r3, #1 + 800401a: b29a uxth r2, r3 + 800401c: 68fb ldr r3, [r7, #12] + 800401e: 855a strh r2, [r3, #42] @ 0x2a while (hi2c->XferSize > 0U) - 80047a0: 68fb ldr r3, [r7, #12] - 80047a2: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80047a4: 2b00 cmp r3, #0 - 80047a6: f47f ae88 bne.w 80044ba + 8004020: 68fb ldr r3, [r7, #12] + 8004022: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004024: 2b00 cmp r3, #0 + 8004026: f47f ae88 bne.w 8003d3a } } } hi2c->State = HAL_I2C_STATE_READY; - 80047aa: 68fb ldr r3, [r7, #12] - 80047ac: 2220 movs r2, #32 - 80047ae: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800402a: 68fb ldr r3, [r7, #12] + 800402c: 2220 movs r2, #32 + 800402e: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80047b2: 68fb ldr r3, [r7, #12] - 80047b4: 2200 movs r2, #0 - 80047b6: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004032: 68fb ldr r3, [r7, #12] + 8004034: 2200 movs r2, #0 + 8004036: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80047ba: 68fb ldr r3, [r7, #12] - 80047bc: 2200 movs r2, #0 - 80047be: f883 203c strb.w r2, [r3, #60] @ 0x3c + 800403a: 68fb ldr r3, [r7, #12] + 800403c: 2200 movs r2, #0 + 800403e: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 80047c2: 2300 movs r3, #0 - 80047c4: e000 b.n 80047c8 + 8004042: 2300 movs r3, #0 + 8004044: e000 b.n 8004048 } else { return HAL_BUSY; - 80047c6: 2302 movs r3, #2 + 8004046: 2302 movs r3, #2 } } - 80047c8: 4618 mov r0, r3 - 80047ca: 3728 adds r7, #40 @ 0x28 - 80047cc: 46bd mov sp, r7 - 80047ce: bd80 pop {r7, pc} - 80047d0: 00010004 .word 0x00010004 - 80047d4: 20000034 .word 0x20000034 - 80047d8: 14f8b589 .word 0x14f8b589 + 8004048: 4618 mov r0, r3 + 800404a: 3728 adds r7, #40 @ 0x28 + 800404c: 46bd mov sp, r7 + 800404e: bd80 pop {r7, pc} + 8004050: 00010004 .word 0x00010004 + 8004054: 20000038 .word 0x20000038 + 8004058: 14f8b589 .word 0x14f8b589 -080047dc : +0800405c : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) { - 80047dc: b580 push {r7, lr} - 80047de: b088 sub sp, #32 - 80047e0: af02 add r7, sp, #8 - 80047e2: 60f8 str r0, [r7, #12] - 80047e4: 607a str r2, [r7, #4] - 80047e6: 603b str r3, [r7, #0] - 80047e8: 460b mov r3, r1 - 80047ea: 817b strh r3, [r7, #10] + 800405c: b580 push {r7, lr} + 800405e: b088 sub sp, #32 + 8004060: af02 add r7, sp, #8 + 8004062: 60f8 str r0, [r7, #12] + 8004064: 607a str r2, [r7, #4] + 8004066: 603b str r3, [r7, #0] + 8004068: 460b mov r3, r1 + 800406a: 817b strh r3, [r7, #10] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; - 80047ec: 68fb ldr r3, [r7, #12] - 80047ee: 6adb ldr r3, [r3, #44] @ 0x2c - 80047f0: 617b str r3, [r7, #20] + 800406c: 68fb ldr r3, [r7, #12] + 800406e: 6adb ldr r3, [r3, #44] @ 0x2c + 8004070: 617b str r3, [r7, #20] /* Generate Start condition if first transfer */ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) - 80047f2: 697b ldr r3, [r7, #20] - 80047f4: 2b08 cmp r3, #8 - 80047f6: d006 beq.n 8004806 - 80047f8: 697b ldr r3, [r7, #20] - 80047fa: 2b01 cmp r3, #1 - 80047fc: d003 beq.n 8004806 - 80047fe: 697b ldr r3, [r7, #20] - 8004800: f513 3f80 cmn.w r3, #65536 @ 0x10000 - 8004804: d108 bne.n 8004818 + 8004072: 697b ldr r3, [r7, #20] + 8004074: 2b08 cmp r3, #8 + 8004076: d006 beq.n 8004086 + 8004078: 697b ldr r3, [r7, #20] + 800407a: 2b01 cmp r3, #1 + 800407c: d003 beq.n 8004086 + 800407e: 697b ldr r3, [r7, #20] + 8004080: f513 3f80 cmn.w r3, #65536 @ 0x10000 + 8004084: d108 bne.n 8004098 { /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8004806: 68fb ldr r3, [r7, #12] - 8004808: 681b ldr r3, [r3, #0] - 800480a: 681a ldr r2, [r3, #0] - 800480c: 68fb ldr r3, [r7, #12] - 800480e: 681b ldr r3, [r3, #0] - 8004810: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8004814: 601a str r2, [r3, #0] - 8004816: e00b b.n 8004830 + 8004086: 68fb ldr r3, [r7, #12] + 8004088: 681b ldr r3, [r3, #0] + 800408a: 681a ldr r2, [r3, #0] + 800408c: 68fb ldr r3, [r7, #12] + 800408e: 681b ldr r3, [r3, #0] + 8004090: f442 7280 orr.w r2, r2, #256 @ 0x100 + 8004094: 601a str r2, [r3, #0] + 8004096: e00b b.n 80040b0 } else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) - 8004818: 68fb ldr r3, [r7, #12] - 800481a: 6b1b ldr r3, [r3, #48] @ 0x30 - 800481c: 2b12 cmp r3, #18 - 800481e: d107 bne.n 8004830 + 8004098: 68fb ldr r3, [r7, #12] + 800409a: 6b1b ldr r3, [r3, #48] @ 0x30 + 800409c: 2b12 cmp r3, #18 + 800409e: d107 bne.n 80040b0 { /* Generate ReStart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8004820: 68fb ldr r3, [r7, #12] - 8004822: 681b ldr r3, [r3, #0] - 8004824: 681a ldr r2, [r3, #0] - 8004826: 68fb ldr r3, [r7, #12] - 8004828: 681b ldr r3, [r3, #0] - 800482a: f442 7280 orr.w r2, r2, #256 @ 0x100 - 800482e: 601a str r2, [r3, #0] + 80040a0: 68fb ldr r3, [r7, #12] + 80040a2: 681b ldr r3, [r3, #0] + 80040a4: 681a ldr r2, [r3, #0] + 80040a6: 68fb ldr r3, [r7, #12] + 80040a8: 681b ldr r3, [r3, #0] + 80040aa: f442 7280 orr.w r2, r2, #256 @ 0x100 + 80040ae: 601a str r2, [r3, #0] { /* Do nothing */ } /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8004830: 683b ldr r3, [r7, #0] - 8004832: 9300 str r3, [sp, #0] - 8004834: 687b ldr r3, [r7, #4] - 8004836: 2200 movs r2, #0 - 8004838: f04f 1101 mov.w r1, #65537 @ 0x10001 - 800483c: 68f8 ldr r0, [r7, #12] - 800483e: f000 f91d bl 8004a7c - 8004842: 4603 mov r3, r0 - 8004844: 2b00 cmp r3, #0 - 8004846: d00d beq.n 8004864 + 80040b0: 683b ldr r3, [r7, #0] + 80040b2: 9300 str r3, [sp, #0] + 80040b4: 687b ldr r3, [r7, #4] + 80040b6: 2200 movs r2, #0 + 80040b8: f04f 1101 mov.w r1, #65537 @ 0x10001 + 80040bc: 68f8 ldr r0, [r7, #12] + 80040be: f000 f91d bl 80042fc + 80040c2: 4603 mov r3, r0 + 80040c4: 2b00 cmp r3, #0 + 80040c6: d00d beq.n 80040e4 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 8004848: 68fb ldr r3, [r7, #12] - 800484a: 681b ldr r3, [r3, #0] - 800484c: 681b ldr r3, [r3, #0] - 800484e: f403 7380 and.w r3, r3, #256 @ 0x100 - 8004852: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8004856: d103 bne.n 8004860 + 80040c8: 68fb ldr r3, [r7, #12] + 80040ca: 681b ldr r3, [r3, #0] + 80040cc: 681b ldr r3, [r3, #0] + 80040ce: f403 7380 and.w r3, r3, #256 @ 0x100 + 80040d2: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80040d6: d103 bne.n 80040e0 { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 8004858: 68fb ldr r3, [r7, #12] - 800485a: f44f 7200 mov.w r2, #512 @ 0x200 - 800485e: 641a str r2, [r3, #64] @ 0x40 + 80040d8: 68fb ldr r3, [r7, #12] + 80040da: f44f 7200 mov.w r2, #512 @ 0x200 + 80040de: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 8004860: 2303 movs r3, #3 - 8004862: e035 b.n 80048d0 + 80040e0: 2303 movs r3, #3 + 80040e2: e035 b.n 8004150 } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 8004864: 68fb ldr r3, [r7, #12] - 8004866: 691b ldr r3, [r3, #16] - 8004868: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 - 800486c: d108 bne.n 8004880 + 80040e4: 68fb ldr r3, [r7, #12] + 80040e6: 691b ldr r3, [r3, #16] + 80040e8: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 + 80040ec: d108 bne.n 8004100 { /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); - 800486e: 897b ldrh r3, [r7, #10] - 8004870: b2db uxtb r3, r3 - 8004872: 461a mov r2, r3 - 8004874: 68fb ldr r3, [r7, #12] - 8004876: 681b ldr r3, [r3, #0] - 8004878: f002 02fe and.w r2, r2, #254 @ 0xfe - 800487c: 611a str r2, [r3, #16] - 800487e: e01b b.n 80048b8 + 80040ee: 897b ldrh r3, [r7, #10] + 80040f0: b2db uxtb r3, r3 + 80040f2: 461a mov r2, r3 + 80040f4: 68fb ldr r3, [r7, #12] + 80040f6: 681b ldr r3, [r3, #0] + 80040f8: f002 02fe and.w r2, r2, #254 @ 0xfe + 80040fc: 611a str r2, [r3, #16] + 80040fe: e01b b.n 8004138 } else { /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); - 8004880: 897b ldrh r3, [r7, #10] - 8004882: 11db asrs r3, r3, #7 - 8004884: b2db uxtb r3, r3 - 8004886: f003 0306 and.w r3, r3, #6 - 800488a: b2db uxtb r3, r3 - 800488c: f063 030f orn r3, r3, #15 - 8004890: b2da uxtb r2, r3 - 8004892: 68fb ldr r3, [r7, #12] - 8004894: 681b ldr r3, [r3, #0] - 8004896: 611a str r2, [r3, #16] + 8004100: 897b ldrh r3, [r7, #10] + 8004102: 11db asrs r3, r3, #7 + 8004104: b2db uxtb r3, r3 + 8004106: f003 0306 and.w r3, r3, #6 + 800410a: b2db uxtb r3, r3 + 800410c: f063 030f orn r3, r3, #15 + 8004110: b2da uxtb r2, r3 + 8004112: 68fb ldr r3, [r7, #12] + 8004114: 681b ldr r3, [r3, #0] + 8004116: 611a str r2, [r3, #16] /* Wait until ADD10 flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) - 8004898: 683b ldr r3, [r7, #0] - 800489a: 687a ldr r2, [r7, #4] - 800489c: 490e ldr r1, [pc, #56] @ (80048d8 ) - 800489e: 68f8 ldr r0, [r7, #12] - 80048a0: f000 f966 bl 8004b70 - 80048a4: 4603 mov r3, r0 - 80048a6: 2b00 cmp r3, #0 - 80048a8: d001 beq.n 80048ae + 8004118: 683b ldr r3, [r7, #0] + 800411a: 687a ldr r2, [r7, #4] + 800411c: 490e ldr r1, [pc, #56] @ (8004158 ) + 800411e: 68f8 ldr r0, [r7, #12] + 8004120: f000 f966 bl 80043f0 + 8004124: 4603 mov r3, r0 + 8004126: 2b00 cmp r3, #0 + 8004128: d001 beq.n 800412e { return HAL_ERROR; - 80048aa: 2301 movs r3, #1 - 80048ac: e010 b.n 80048d0 + 800412a: 2301 movs r3, #1 + 800412c: e010 b.n 8004150 } /* Send slave address */ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); - 80048ae: 897b ldrh r3, [r7, #10] - 80048b0: b2da uxtb r2, r3 - 80048b2: 68fb ldr r3, [r7, #12] - 80048b4: 681b ldr r3, [r3, #0] - 80048b6: 611a str r2, [r3, #16] + 800412e: 897b ldrh r3, [r7, #10] + 8004130: b2da uxtb r2, r3 + 8004132: 68fb ldr r3, [r7, #12] + 8004134: 681b ldr r3, [r3, #0] + 8004136: 611a str r2, [r3, #16] } /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 80048b8: 683b ldr r3, [r7, #0] - 80048ba: 687a ldr r2, [r7, #4] - 80048bc: 4907 ldr r1, [pc, #28] @ (80048dc ) - 80048be: 68f8 ldr r0, [r7, #12] - 80048c0: f000 f956 bl 8004b70 - 80048c4: 4603 mov r3, r0 - 80048c6: 2b00 cmp r3, #0 - 80048c8: d001 beq.n 80048ce + 8004138: 683b ldr r3, [r7, #0] + 800413a: 687a ldr r2, [r7, #4] + 800413c: 4907 ldr r1, [pc, #28] @ (800415c ) + 800413e: 68f8 ldr r0, [r7, #12] + 8004140: f000 f956 bl 80043f0 + 8004144: 4603 mov r3, r0 + 8004146: 2b00 cmp r3, #0 + 8004148: d001 beq.n 800414e { return HAL_ERROR; - 80048ca: 2301 movs r3, #1 - 80048cc: e000 b.n 80048d0 + 800414a: 2301 movs r3, #1 + 800414c: e000 b.n 8004150 } return HAL_OK; - 80048ce: 2300 movs r3, #0 + 800414e: 2300 movs r3, #0 } - 80048d0: 4618 mov r0, r3 - 80048d2: 3718 adds r7, #24 - 80048d4: 46bd mov sp, r7 - 80048d6: bd80 pop {r7, pc} - 80048d8: 00010008 .word 0x00010008 - 80048dc: 00010002 .word 0x00010002 + 8004150: 4618 mov r0, r3 + 8004152: 3718 adds r7, #24 + 8004154: 46bd mov sp, r7 + 8004156: bd80 pop {r7, pc} + 8004158: 00010008 .word 0x00010008 + 800415c: 00010002 .word 0x00010002 -080048e0 : +08004160 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) { - 80048e0: b580 push {r7, lr} - 80048e2: b088 sub sp, #32 - 80048e4: af02 add r7, sp, #8 - 80048e6: 60f8 str r0, [r7, #12] - 80048e8: 607a str r2, [r7, #4] - 80048ea: 603b str r3, [r7, #0] - 80048ec: 460b mov r3, r1 - 80048ee: 817b strh r3, [r7, #10] + 8004160: b580 push {r7, lr} + 8004162: b088 sub sp, #32 + 8004164: af02 add r7, sp, #8 + 8004166: 60f8 str r0, [r7, #12] + 8004168: 607a str r2, [r7, #4] + 800416a: 603b str r3, [r7, #0] + 800416c: 460b mov r3, r1 + 800416e: 817b strh r3, [r7, #10] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; - 80048f0: 68fb ldr r3, [r7, #12] - 80048f2: 6adb ldr r3, [r3, #44] @ 0x2c - 80048f4: 617b str r3, [r7, #20] + 8004170: 68fb ldr r3, [r7, #12] + 8004172: 6adb ldr r3, [r3, #44] @ 0x2c + 8004174: 617b str r3, [r7, #20] /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 80048f6: 68fb ldr r3, [r7, #12] - 80048f8: 681b ldr r3, [r3, #0] - 80048fa: 681a ldr r2, [r3, #0] - 80048fc: 68fb ldr r3, [r7, #12] - 80048fe: 681b ldr r3, [r3, #0] - 8004900: f442 6280 orr.w r2, r2, #1024 @ 0x400 - 8004904: 601a str r2, [r3, #0] + 8004176: 68fb ldr r3, [r7, #12] + 8004178: 681b ldr r3, [r3, #0] + 800417a: 681a ldr r2, [r3, #0] + 800417c: 68fb ldr r3, [r7, #12] + 800417e: 681b ldr r3, [r3, #0] + 8004180: f442 6280 orr.w r2, r2, #1024 @ 0x400 + 8004184: 601a str r2, [r3, #0] /* Generate Start condition if first transfer */ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) - 8004906: 697b ldr r3, [r7, #20] - 8004908: 2b08 cmp r3, #8 - 800490a: d006 beq.n 800491a - 800490c: 697b ldr r3, [r7, #20] - 800490e: 2b01 cmp r3, #1 - 8004910: d003 beq.n 800491a - 8004912: 697b ldr r3, [r7, #20] - 8004914: f513 3f80 cmn.w r3, #65536 @ 0x10000 - 8004918: d108 bne.n 800492c + 8004186: 697b ldr r3, [r7, #20] + 8004188: 2b08 cmp r3, #8 + 800418a: d006 beq.n 800419a + 800418c: 697b ldr r3, [r7, #20] + 800418e: 2b01 cmp r3, #1 + 8004190: d003 beq.n 800419a + 8004192: 697b ldr r3, [r7, #20] + 8004194: f513 3f80 cmn.w r3, #65536 @ 0x10000 + 8004198: d108 bne.n 80041ac { /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 800491a: 68fb ldr r3, [r7, #12] - 800491c: 681b ldr r3, [r3, #0] - 800491e: 681a ldr r2, [r3, #0] - 8004920: 68fb ldr r3, [r7, #12] - 8004922: 681b ldr r3, [r3, #0] - 8004924: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8004928: 601a str r2, [r3, #0] - 800492a: e00b b.n 8004944 + 800419a: 68fb ldr r3, [r7, #12] + 800419c: 681b ldr r3, [r3, #0] + 800419e: 681a ldr r2, [r3, #0] + 80041a0: 68fb ldr r3, [r7, #12] + 80041a2: 681b ldr r3, [r3, #0] + 80041a4: f442 7280 orr.w r2, r2, #256 @ 0x100 + 80041a8: 601a str r2, [r3, #0] + 80041aa: e00b b.n 80041c4 } else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) - 800492c: 68fb ldr r3, [r7, #12] - 800492e: 6b1b ldr r3, [r3, #48] @ 0x30 - 8004930: 2b11 cmp r3, #17 - 8004932: d107 bne.n 8004944 + 80041ac: 68fb ldr r3, [r7, #12] + 80041ae: 6b1b ldr r3, [r3, #48] @ 0x30 + 80041b0: 2b11 cmp r3, #17 + 80041b2: d107 bne.n 80041c4 { /* Generate ReStart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8004934: 68fb ldr r3, [r7, #12] - 8004936: 681b ldr r3, [r3, #0] - 8004938: 681a ldr r2, [r3, #0] - 800493a: 68fb ldr r3, [r7, #12] - 800493c: 681b ldr r3, [r3, #0] - 800493e: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8004942: 601a str r2, [r3, #0] + 80041b4: 68fb ldr r3, [r7, #12] + 80041b6: 681b ldr r3, [r3, #0] + 80041b8: 681a ldr r2, [r3, #0] + 80041ba: 68fb ldr r3, [r7, #12] + 80041bc: 681b ldr r3, [r3, #0] + 80041be: f442 7280 orr.w r2, r2, #256 @ 0x100 + 80041c2: 601a str r2, [r3, #0] { /* Do nothing */ } /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8004944: 683b ldr r3, [r7, #0] - 8004946: 9300 str r3, [sp, #0] - 8004948: 687b ldr r3, [r7, #4] - 800494a: 2200 movs r2, #0 - 800494c: f04f 1101 mov.w r1, #65537 @ 0x10001 - 8004950: 68f8 ldr r0, [r7, #12] - 8004952: f000 f893 bl 8004a7c - 8004956: 4603 mov r3, r0 - 8004958: 2b00 cmp r3, #0 - 800495a: d00d beq.n 8004978 + 80041c4: 683b ldr r3, [r7, #0] + 80041c6: 9300 str r3, [sp, #0] + 80041c8: 687b ldr r3, [r7, #4] + 80041ca: 2200 movs r2, #0 + 80041cc: f04f 1101 mov.w r1, #65537 @ 0x10001 + 80041d0: 68f8 ldr r0, [r7, #12] + 80041d2: f000 f893 bl 80042fc + 80041d6: 4603 mov r3, r0 + 80041d8: 2b00 cmp r3, #0 + 80041da: d00d beq.n 80041f8 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 800495c: 68fb ldr r3, [r7, #12] - 800495e: 681b ldr r3, [r3, #0] - 8004960: 681b ldr r3, [r3, #0] - 8004962: f403 7380 and.w r3, r3, #256 @ 0x100 - 8004966: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 800496a: d103 bne.n 8004974 + 80041dc: 68fb ldr r3, [r7, #12] + 80041de: 681b ldr r3, [r3, #0] + 80041e0: 681b ldr r3, [r3, #0] + 80041e2: f403 7380 and.w r3, r3, #256 @ 0x100 + 80041e6: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80041ea: d103 bne.n 80041f4 { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 800496c: 68fb ldr r3, [r7, #12] - 800496e: f44f 7200 mov.w r2, #512 @ 0x200 - 8004972: 641a str r2, [r3, #64] @ 0x40 + 80041ec: 68fb ldr r3, [r7, #12] + 80041ee: f44f 7200 mov.w r2, #512 @ 0x200 + 80041f2: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 8004974: 2303 movs r3, #3 - 8004976: e079 b.n 8004a6c + 80041f4: 2303 movs r3, #3 + 80041f6: e079 b.n 80042ec } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 8004978: 68fb ldr r3, [r7, #12] - 800497a: 691b ldr r3, [r3, #16] - 800497c: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 - 8004980: d108 bne.n 8004994 + 80041f8: 68fb ldr r3, [r7, #12] + 80041fa: 691b ldr r3, [r3, #16] + 80041fc: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 + 8004200: d108 bne.n 8004214 { /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); - 8004982: 897b ldrh r3, [r7, #10] - 8004984: b2db uxtb r3, r3 - 8004986: f043 0301 orr.w r3, r3, #1 - 800498a: b2da uxtb r2, r3 - 800498c: 68fb ldr r3, [r7, #12] - 800498e: 681b ldr r3, [r3, #0] - 8004990: 611a str r2, [r3, #16] - 8004992: e05f b.n 8004a54 + 8004202: 897b ldrh r3, [r7, #10] + 8004204: b2db uxtb r3, r3 + 8004206: f043 0301 orr.w r3, r3, #1 + 800420a: b2da uxtb r2, r3 + 800420c: 68fb ldr r3, [r7, #12] + 800420e: 681b ldr r3, [r3, #0] + 8004210: 611a str r2, [r3, #16] + 8004212: e05f b.n 80042d4 } else { /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); - 8004994: 897b ldrh r3, [r7, #10] - 8004996: 11db asrs r3, r3, #7 - 8004998: b2db uxtb r3, r3 - 800499a: f003 0306 and.w r3, r3, #6 - 800499e: b2db uxtb r3, r3 - 80049a0: f063 030f orn r3, r3, #15 - 80049a4: b2da uxtb r2, r3 - 80049a6: 68fb ldr r3, [r7, #12] - 80049a8: 681b ldr r3, [r3, #0] - 80049aa: 611a str r2, [r3, #16] + 8004214: 897b ldrh r3, [r7, #10] + 8004216: 11db asrs r3, r3, #7 + 8004218: b2db uxtb r3, r3 + 800421a: f003 0306 and.w r3, r3, #6 + 800421e: b2db uxtb r3, r3 + 8004220: f063 030f orn r3, r3, #15 + 8004224: b2da uxtb r2, r3 + 8004226: 68fb ldr r3, [r7, #12] + 8004228: 681b ldr r3, [r3, #0] + 800422a: 611a str r2, [r3, #16] /* Wait until ADD10 flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) - 80049ac: 683b ldr r3, [r7, #0] - 80049ae: 687a ldr r2, [r7, #4] - 80049b0: 4930 ldr r1, [pc, #192] @ (8004a74 ) - 80049b2: 68f8 ldr r0, [r7, #12] - 80049b4: f000 f8dc bl 8004b70 - 80049b8: 4603 mov r3, r0 - 80049ba: 2b00 cmp r3, #0 - 80049bc: d001 beq.n 80049c2 + 800422c: 683b ldr r3, [r7, #0] + 800422e: 687a ldr r2, [r7, #4] + 8004230: 4930 ldr r1, [pc, #192] @ (80042f4 ) + 8004232: 68f8 ldr r0, [r7, #12] + 8004234: f000 f8dc bl 80043f0 + 8004238: 4603 mov r3, r0 + 800423a: 2b00 cmp r3, #0 + 800423c: d001 beq.n 8004242 { return HAL_ERROR; - 80049be: 2301 movs r3, #1 - 80049c0: e054 b.n 8004a6c + 800423e: 2301 movs r3, #1 + 8004240: e054 b.n 80042ec } /* Send slave address */ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); - 80049c2: 897b ldrh r3, [r7, #10] - 80049c4: b2da uxtb r2, r3 - 80049c6: 68fb ldr r3, [r7, #12] - 80049c8: 681b ldr r3, [r3, #0] - 80049ca: 611a str r2, [r3, #16] + 8004242: 897b ldrh r3, [r7, #10] + 8004244: b2da uxtb r2, r3 + 8004246: 68fb ldr r3, [r7, #12] + 8004248: 681b ldr r3, [r3, #0] + 800424a: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 80049cc: 683b ldr r3, [r7, #0] - 80049ce: 687a ldr r2, [r7, #4] - 80049d0: 4929 ldr r1, [pc, #164] @ (8004a78 ) - 80049d2: 68f8 ldr r0, [r7, #12] - 80049d4: f000 f8cc bl 8004b70 - 80049d8: 4603 mov r3, r0 - 80049da: 2b00 cmp r3, #0 - 80049dc: d001 beq.n 80049e2 + 800424c: 683b ldr r3, [r7, #0] + 800424e: 687a ldr r2, [r7, #4] + 8004250: 4929 ldr r1, [pc, #164] @ (80042f8 ) + 8004252: 68f8 ldr r0, [r7, #12] + 8004254: f000 f8cc bl 80043f0 + 8004258: 4603 mov r3, r0 + 800425a: 2b00 cmp r3, #0 + 800425c: d001 beq.n 8004262 { return HAL_ERROR; - 80049de: 2301 movs r3, #1 - 80049e0: e044 b.n 8004a6c + 800425e: 2301 movs r3, #1 + 8004260: e044 b.n 80042ec } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80049e2: 2300 movs r3, #0 - 80049e4: 613b str r3, [r7, #16] - 80049e6: 68fb ldr r3, [r7, #12] - 80049e8: 681b ldr r3, [r3, #0] - 80049ea: 695b ldr r3, [r3, #20] - 80049ec: 613b str r3, [r7, #16] - 80049ee: 68fb ldr r3, [r7, #12] - 80049f0: 681b ldr r3, [r3, #0] - 80049f2: 699b ldr r3, [r3, #24] - 80049f4: 613b str r3, [r7, #16] - 80049f6: 693b ldr r3, [r7, #16] + 8004262: 2300 movs r3, #0 + 8004264: 613b str r3, [r7, #16] + 8004266: 68fb ldr r3, [r7, #12] + 8004268: 681b ldr r3, [r3, #0] + 800426a: 695b ldr r3, [r3, #20] + 800426c: 613b str r3, [r7, #16] + 800426e: 68fb ldr r3, [r7, #12] + 8004270: 681b ldr r3, [r3, #0] + 8004272: 699b ldr r3, [r3, #24] + 8004274: 613b str r3, [r7, #16] + 8004276: 693b ldr r3, [r7, #16] /* Generate Restart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 80049f8: 68fb ldr r3, [r7, #12] - 80049fa: 681b ldr r3, [r3, #0] - 80049fc: 681a ldr r2, [r3, #0] - 80049fe: 68fb ldr r3, [r7, #12] - 8004a00: 681b ldr r3, [r3, #0] - 8004a02: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8004a06: 601a str r2, [r3, #0] + 8004278: 68fb ldr r3, [r7, #12] + 800427a: 681b ldr r3, [r3, #0] + 800427c: 681a ldr r2, [r3, #0] + 800427e: 68fb ldr r3, [r7, #12] + 8004280: 681b ldr r3, [r3, #0] + 8004282: f442 7280 orr.w r2, r2, #256 @ 0x100 + 8004286: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8004a08: 683b ldr r3, [r7, #0] - 8004a0a: 9300 str r3, [sp, #0] - 8004a0c: 687b ldr r3, [r7, #4] - 8004a0e: 2200 movs r2, #0 - 8004a10: f04f 1101 mov.w r1, #65537 @ 0x10001 - 8004a14: 68f8 ldr r0, [r7, #12] - 8004a16: f000 f831 bl 8004a7c - 8004a1a: 4603 mov r3, r0 - 8004a1c: 2b00 cmp r3, #0 - 8004a1e: d00d beq.n 8004a3c + 8004288: 683b ldr r3, [r7, #0] + 800428a: 9300 str r3, [sp, #0] + 800428c: 687b ldr r3, [r7, #4] + 800428e: 2200 movs r2, #0 + 8004290: f04f 1101 mov.w r1, #65537 @ 0x10001 + 8004294: 68f8 ldr r0, [r7, #12] + 8004296: f000 f831 bl 80042fc + 800429a: 4603 mov r3, r0 + 800429c: 2b00 cmp r3, #0 + 800429e: d00d beq.n 80042bc { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 8004a20: 68fb ldr r3, [r7, #12] - 8004a22: 681b ldr r3, [r3, #0] - 8004a24: 681b ldr r3, [r3, #0] - 8004a26: f403 7380 and.w r3, r3, #256 @ 0x100 - 8004a2a: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8004a2e: d103 bne.n 8004a38 + 80042a0: 68fb ldr r3, [r7, #12] + 80042a2: 681b ldr r3, [r3, #0] + 80042a4: 681b ldr r3, [r3, #0] + 80042a6: f403 7380 and.w r3, r3, #256 @ 0x100 + 80042aa: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80042ae: d103 bne.n 80042b8 { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 8004a30: 68fb ldr r3, [r7, #12] - 8004a32: f44f 7200 mov.w r2, #512 @ 0x200 - 8004a36: 641a str r2, [r3, #64] @ 0x40 + 80042b0: 68fb ldr r3, [r7, #12] + 80042b2: f44f 7200 mov.w r2, #512 @ 0x200 + 80042b6: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 8004a38: 2303 movs r3, #3 - 8004a3a: e017 b.n 8004a6c + 80042b8: 2303 movs r3, #3 + 80042ba: e017 b.n 80042ec } /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress); - 8004a3c: 897b ldrh r3, [r7, #10] - 8004a3e: 11db asrs r3, r3, #7 - 8004a40: b2db uxtb r3, r3 - 8004a42: f003 0306 and.w r3, r3, #6 - 8004a46: b2db uxtb r3, r3 - 8004a48: f063 030e orn r3, r3, #14 - 8004a4c: b2da uxtb r2, r3 - 8004a4e: 68fb ldr r3, [r7, #12] - 8004a50: 681b ldr r3, [r3, #0] - 8004a52: 611a str r2, [r3, #16] + 80042bc: 897b ldrh r3, [r7, #10] + 80042be: 11db asrs r3, r3, #7 + 80042c0: b2db uxtb r3, r3 + 80042c2: f003 0306 and.w r3, r3, #6 + 80042c6: b2db uxtb r3, r3 + 80042c8: f063 030e orn r3, r3, #14 + 80042cc: b2da uxtb r2, r3 + 80042ce: 68fb ldr r3, [r7, #12] + 80042d0: 681b ldr r3, [r3, #0] + 80042d2: 611a str r2, [r3, #16] } /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 8004a54: 683b ldr r3, [r7, #0] - 8004a56: 687a ldr r2, [r7, #4] - 8004a58: 4907 ldr r1, [pc, #28] @ (8004a78 ) - 8004a5a: 68f8 ldr r0, [r7, #12] - 8004a5c: f000 f888 bl 8004b70 - 8004a60: 4603 mov r3, r0 - 8004a62: 2b00 cmp r3, #0 - 8004a64: d001 beq.n 8004a6a + 80042d4: 683b ldr r3, [r7, #0] + 80042d6: 687a ldr r2, [r7, #4] + 80042d8: 4907 ldr r1, [pc, #28] @ (80042f8 ) + 80042da: 68f8 ldr r0, [r7, #12] + 80042dc: f000 f888 bl 80043f0 + 80042e0: 4603 mov r3, r0 + 80042e2: 2b00 cmp r3, #0 + 80042e4: d001 beq.n 80042ea { return HAL_ERROR; - 8004a66: 2301 movs r3, #1 - 8004a68: e000 b.n 8004a6c + 80042e6: 2301 movs r3, #1 + 80042e8: e000 b.n 80042ec } return HAL_OK; - 8004a6a: 2300 movs r3, #0 + 80042ea: 2300 movs r3, #0 } - 8004a6c: 4618 mov r0, r3 - 8004a6e: 3718 adds r7, #24 - 8004a70: 46bd mov sp, r7 - 8004a72: bd80 pop {r7, pc} - 8004a74: 00010008 .word 0x00010008 - 8004a78: 00010002 .word 0x00010002 + 80042ec: 4618 mov r0, r3 + 80042ee: 3718 adds r7, #24 + 80042f0: 46bd mov sp, r7 + 80042f2: bd80 pop {r7, pc} + 80042f4: 00010008 .word 0x00010008 + 80042f8: 00010002 .word 0x00010002 -08004a7c : +080042fc : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { - 8004a7c: b580 push {r7, lr} - 8004a7e: b084 sub sp, #16 - 8004a80: af00 add r7, sp, #0 - 8004a82: 60f8 str r0, [r7, #12] - 8004a84: 60b9 str r1, [r7, #8] - 8004a86: 603b str r3, [r7, #0] - 8004a88: 4613 mov r3, r2 - 8004a8a: 71fb strb r3, [r7, #7] + 80042fc: b580 push {r7, lr} + 80042fe: b084 sub sp, #16 + 8004300: af00 add r7, sp, #0 + 8004302: 60f8 str r0, [r7, #12] + 8004304: 60b9 str r1, [r7, #8] + 8004306: 603b str r3, [r7, #0] + 8004308: 4613 mov r3, r2 + 800430a: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - 8004a8c: e048 b.n 8004b20 + 800430c: e048 b.n 80043a0 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8004a8e: 683b ldr r3, [r7, #0] - 8004a90: f1b3 3fff cmp.w r3, #4294967295 - 8004a94: d044 beq.n 8004b20 + 800430e: 683b ldr r3, [r7, #0] + 8004310: f1b3 3fff cmp.w r3, #4294967295 + 8004314: d044 beq.n 80043a0 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8004a96: f7fe fa27 bl 8002ee8 - 8004a9a: 4602 mov r2, r0 - 8004a9c: 69bb ldr r3, [r7, #24] - 8004a9e: 1ad3 subs r3, r2, r3 - 8004aa0: 683a ldr r2, [r7, #0] - 8004aa2: 429a cmp r2, r3 - 8004aa4: d302 bcc.n 8004aac - 8004aa6: 683b ldr r3, [r7, #0] - 8004aa8: 2b00 cmp r3, #0 - 8004aaa: d139 bne.n 8004b20 + 8004316: f7fe fc27 bl 8002b68 + 800431a: 4602 mov r2, r0 + 800431c: 69bb ldr r3, [r7, #24] + 800431e: 1ad3 subs r3, r2, r3 + 8004320: 683a ldr r2, [r7, #0] + 8004322: 429a cmp r2, r3 + 8004324: d302 bcc.n 800432c + 8004326: 683b ldr r3, [r7, #0] + 8004328: 2b00 cmp r3, #0 + 800432a: d139 bne.n 80043a0 { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) - 8004aac: 68bb ldr r3, [r7, #8] - 8004aae: 0c1b lsrs r3, r3, #16 - 8004ab0: b2db uxtb r3, r3 - 8004ab2: 2b01 cmp r3, #1 - 8004ab4: d10d bne.n 8004ad2 - 8004ab6: 68fb ldr r3, [r7, #12] - 8004ab8: 681b ldr r3, [r3, #0] - 8004aba: 695b ldr r3, [r3, #20] - 8004abc: 43da mvns r2, r3 - 8004abe: 68bb ldr r3, [r7, #8] - 8004ac0: 4013 ands r3, r2 - 8004ac2: b29b uxth r3, r3 - 8004ac4: 2b00 cmp r3, #0 - 8004ac6: bf0c ite eq - 8004ac8: 2301 moveq r3, #1 - 8004aca: 2300 movne r3, #0 - 8004acc: b2db uxtb r3, r3 - 8004ace: 461a mov r2, r3 - 8004ad0: e00c b.n 8004aec - 8004ad2: 68fb ldr r3, [r7, #12] - 8004ad4: 681b ldr r3, [r3, #0] - 8004ad6: 699b ldr r3, [r3, #24] - 8004ad8: 43da mvns r2, r3 - 8004ada: 68bb ldr r3, [r7, #8] - 8004adc: 4013 ands r3, r2 - 8004ade: b29b uxth r3, r3 - 8004ae0: 2b00 cmp r3, #0 - 8004ae2: bf0c ite eq - 8004ae4: 2301 moveq r3, #1 - 8004ae6: 2300 movne r3, #0 - 8004ae8: b2db uxtb r3, r3 - 8004aea: 461a mov r2, r3 - 8004aec: 79fb ldrb r3, [r7, #7] - 8004aee: 429a cmp r2, r3 - 8004af0: d116 bne.n 8004b20 + 800432c: 68bb ldr r3, [r7, #8] + 800432e: 0c1b lsrs r3, r3, #16 + 8004330: b2db uxtb r3, r3 + 8004332: 2b01 cmp r3, #1 + 8004334: d10d bne.n 8004352 + 8004336: 68fb ldr r3, [r7, #12] + 8004338: 681b ldr r3, [r3, #0] + 800433a: 695b ldr r3, [r3, #20] + 800433c: 43da mvns r2, r3 + 800433e: 68bb ldr r3, [r7, #8] + 8004340: 4013 ands r3, r2 + 8004342: b29b uxth r3, r3 + 8004344: 2b00 cmp r3, #0 + 8004346: bf0c ite eq + 8004348: 2301 moveq r3, #1 + 800434a: 2300 movne r3, #0 + 800434c: b2db uxtb r3, r3 + 800434e: 461a mov r2, r3 + 8004350: e00c b.n 800436c + 8004352: 68fb ldr r3, [r7, #12] + 8004354: 681b ldr r3, [r3, #0] + 8004356: 699b ldr r3, [r3, #24] + 8004358: 43da mvns r2, r3 + 800435a: 68bb ldr r3, [r7, #8] + 800435c: 4013 ands r3, r2 + 800435e: b29b uxth r3, r3 + 8004360: 2b00 cmp r3, #0 + 8004362: bf0c ite eq + 8004364: 2301 moveq r3, #1 + 8004366: 2300 movne r3, #0 + 8004368: b2db uxtb r3, r3 + 800436a: 461a mov r2, r3 + 800436c: 79fb ldrb r3, [r7, #7] + 800436e: 429a cmp r2, r3 + 8004370: d116 bne.n 80043a0 { hi2c->PreviousState = I2C_STATE_NONE; - 8004af2: 68fb ldr r3, [r7, #12] - 8004af4: 2200 movs r2, #0 - 8004af6: 631a str r2, [r3, #48] @ 0x30 + 8004372: 68fb ldr r3, [r7, #12] + 8004374: 2200 movs r2, #0 + 8004376: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004af8: 68fb ldr r3, [r7, #12] - 8004afa: 2220 movs r2, #32 - 8004afc: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004378: 68fb ldr r3, [r7, #12] + 800437a: 2220 movs r2, #32 + 800437c: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004b00: 68fb ldr r3, [r7, #12] - 8004b02: 2200 movs r2, #0 - 8004b04: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004380: 68fb ldr r3, [r7, #12] + 8004382: 2200 movs r2, #0 + 8004384: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8004b08: 68fb ldr r3, [r7, #12] - 8004b0a: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004b0c: f043 0220 orr.w r2, r3, #32 - 8004b10: 68fb ldr r3, [r7, #12] - 8004b12: 641a str r2, [r3, #64] @ 0x40 + 8004388: 68fb ldr r3, [r7, #12] + 800438a: 6c1b ldr r3, [r3, #64] @ 0x40 + 800438c: f043 0220 orr.w r2, r3, #32 + 8004390: 68fb ldr r3, [r7, #12] + 8004392: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004b14: 68fb ldr r3, [r7, #12] - 8004b16: 2200 movs r2, #0 - 8004b18: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004394: 68fb ldr r3, [r7, #12] + 8004396: 2200 movs r2, #0 + 8004398: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004b1c: 2301 movs r3, #1 - 8004b1e: e023 b.n 8004b68 + 800439c: 2301 movs r3, #1 + 800439e: e023 b.n 80043e8 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - 8004b20: 68bb ldr r3, [r7, #8] - 8004b22: 0c1b lsrs r3, r3, #16 - 8004b24: b2db uxtb r3, r3 - 8004b26: 2b01 cmp r3, #1 - 8004b28: d10d bne.n 8004b46 - 8004b2a: 68fb ldr r3, [r7, #12] - 8004b2c: 681b ldr r3, [r3, #0] - 8004b2e: 695b ldr r3, [r3, #20] - 8004b30: 43da mvns r2, r3 - 8004b32: 68bb ldr r3, [r7, #8] - 8004b34: 4013 ands r3, r2 - 8004b36: b29b uxth r3, r3 - 8004b38: 2b00 cmp r3, #0 - 8004b3a: bf0c ite eq - 8004b3c: 2301 moveq r3, #1 - 8004b3e: 2300 movne r3, #0 - 8004b40: b2db uxtb r3, r3 - 8004b42: 461a mov r2, r3 - 8004b44: e00c b.n 8004b60 - 8004b46: 68fb ldr r3, [r7, #12] - 8004b48: 681b ldr r3, [r3, #0] - 8004b4a: 699b ldr r3, [r3, #24] - 8004b4c: 43da mvns r2, r3 - 8004b4e: 68bb ldr r3, [r7, #8] - 8004b50: 4013 ands r3, r2 - 8004b52: b29b uxth r3, r3 - 8004b54: 2b00 cmp r3, #0 - 8004b56: bf0c ite eq - 8004b58: 2301 moveq r3, #1 - 8004b5a: 2300 movne r3, #0 - 8004b5c: b2db uxtb r3, r3 - 8004b5e: 461a mov r2, r3 - 8004b60: 79fb ldrb r3, [r7, #7] - 8004b62: 429a cmp r2, r3 - 8004b64: d093 beq.n 8004a8e + 80043a0: 68bb ldr r3, [r7, #8] + 80043a2: 0c1b lsrs r3, r3, #16 + 80043a4: b2db uxtb r3, r3 + 80043a6: 2b01 cmp r3, #1 + 80043a8: d10d bne.n 80043c6 + 80043aa: 68fb ldr r3, [r7, #12] + 80043ac: 681b ldr r3, [r3, #0] + 80043ae: 695b ldr r3, [r3, #20] + 80043b0: 43da mvns r2, r3 + 80043b2: 68bb ldr r3, [r7, #8] + 80043b4: 4013 ands r3, r2 + 80043b6: b29b uxth r3, r3 + 80043b8: 2b00 cmp r3, #0 + 80043ba: bf0c ite eq + 80043bc: 2301 moveq r3, #1 + 80043be: 2300 movne r3, #0 + 80043c0: b2db uxtb r3, r3 + 80043c2: 461a mov r2, r3 + 80043c4: e00c b.n 80043e0 + 80043c6: 68fb ldr r3, [r7, #12] + 80043c8: 681b ldr r3, [r3, #0] + 80043ca: 699b ldr r3, [r3, #24] + 80043cc: 43da mvns r2, r3 + 80043ce: 68bb ldr r3, [r7, #8] + 80043d0: 4013 ands r3, r2 + 80043d2: b29b uxth r3, r3 + 80043d4: 2b00 cmp r3, #0 + 80043d6: bf0c ite eq + 80043d8: 2301 moveq r3, #1 + 80043da: 2300 movne r3, #0 + 80043dc: b2db uxtb r3, r3 + 80043de: 461a mov r2, r3 + 80043e0: 79fb ldrb r3, [r7, #7] + 80043e2: 429a cmp r2, r3 + 80043e4: d093 beq.n 800430e } } } } return HAL_OK; - 8004b66: 2300 movs r3, #0 + 80043e6: 2300 movs r3, #0 } - 8004b68: 4618 mov r0, r3 - 8004b6a: 3710 adds r7, #16 - 8004b6c: 46bd mov sp, r7 - 8004b6e: bd80 pop {r7, pc} + 80043e8: 4618 mov r0, r3 + 80043ea: 3710 adds r7, #16 + 80043ec: 46bd mov sp, r7 + 80043ee: bd80 pop {r7, pc} -08004b70 : +080043f0 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart) { - 8004b70: b580 push {r7, lr} - 8004b72: b084 sub sp, #16 - 8004b74: af00 add r7, sp, #0 - 8004b76: 60f8 str r0, [r7, #12] - 8004b78: 60b9 str r1, [r7, #8] - 8004b7a: 607a str r2, [r7, #4] - 8004b7c: 603b str r3, [r7, #0] + 80043f0: b580 push {r7, lr} + 80043f2: b084 sub sp, #16 + 80043f4: af00 add r7, sp, #0 + 80043f6: 60f8 str r0, [r7, #12] + 80043f8: 60b9 str r1, [r7, #8] + 80043fa: 607a str r2, [r7, #4] + 80043fc: 603b str r3, [r7, #0] while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) - 8004b7e: e071 b.n 8004c64 + 80043fe: e071 b.n 80044e4 { if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 8004b80: 68fb ldr r3, [r7, #12] - 8004b82: 681b ldr r3, [r3, #0] - 8004b84: 695b ldr r3, [r3, #20] - 8004b86: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8004b8a: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 8004b8e: d123 bne.n 8004bd8 + 8004400: 68fb ldr r3, [r7, #12] + 8004402: 681b ldr r3, [r3, #0] + 8004404: 695b ldr r3, [r3, #20] + 8004406: f403 6380 and.w r3, r3, #1024 @ 0x400 + 800440a: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 800440e: d123 bne.n 8004458 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8004b90: 68fb ldr r3, [r7, #12] - 8004b92: 681b ldr r3, [r3, #0] - 8004b94: 681a ldr r2, [r3, #0] - 8004b96: 68fb ldr r3, [r7, #12] - 8004b98: 681b ldr r3, [r3, #0] - 8004b9a: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8004b9e: 601a str r2, [r3, #0] + 8004410: 68fb ldr r3, [r7, #12] + 8004412: 681b ldr r3, [r3, #0] + 8004414: 681a ldr r2, [r3, #0] + 8004416: 68fb ldr r3, [r7, #12] + 8004418: 681b ldr r3, [r3, #0] + 800441a: f442 7200 orr.w r2, r2, #512 @ 0x200 + 800441e: 601a str r2, [r3, #0] /* Clear AF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8004ba0: 68fb ldr r3, [r7, #12] - 8004ba2: 681b ldr r3, [r3, #0] - 8004ba4: f46f 6280 mvn.w r2, #1024 @ 0x400 - 8004ba8: 615a str r2, [r3, #20] + 8004420: 68fb ldr r3, [r7, #12] + 8004422: 681b ldr r3, [r3, #0] + 8004424: f46f 6280 mvn.w r2, #1024 @ 0x400 + 8004428: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 8004baa: 68fb ldr r3, [r7, #12] - 8004bac: 2200 movs r2, #0 - 8004bae: 631a str r2, [r3, #48] @ 0x30 + 800442a: 68fb ldr r3, [r7, #12] + 800442c: 2200 movs r2, #0 + 800442e: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004bb0: 68fb ldr r3, [r7, #12] - 8004bb2: 2220 movs r2, #32 - 8004bb4: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004430: 68fb ldr r3, [r7, #12] + 8004432: 2220 movs r2, #32 + 8004434: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004bb8: 68fb ldr r3, [r7, #12] - 8004bba: 2200 movs r2, #0 - 8004bbc: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004438: 68fb ldr r3, [r7, #12] + 800443a: 2200 movs r2, #0 + 800443c: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8004bc0: 68fb ldr r3, [r7, #12] - 8004bc2: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004bc4: f043 0204 orr.w r2, r3, #4 - 8004bc8: 68fb ldr r3, [r7, #12] - 8004bca: 641a str r2, [r3, #64] @ 0x40 + 8004440: 68fb ldr r3, [r7, #12] + 8004442: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004444: f043 0204 orr.w r2, r3, #4 + 8004448: 68fb ldr r3, [r7, #12] + 800444a: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004bcc: 68fb ldr r3, [r7, #12] - 8004bce: 2200 movs r2, #0 - 8004bd0: f883 203c strb.w r2, [r3, #60] @ 0x3c + 800444c: 68fb ldr r3, [r7, #12] + 800444e: 2200 movs r2, #0 + 8004450: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004bd4: 2301 movs r3, #1 - 8004bd6: e067 b.n 8004ca8 + 8004454: 2301 movs r3, #1 + 8004456: e067 b.n 8004528 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8004bd8: 687b ldr r3, [r7, #4] - 8004bda: f1b3 3fff cmp.w r3, #4294967295 - 8004bde: d041 beq.n 8004c64 + 8004458: 687b ldr r3, [r7, #4] + 800445a: f1b3 3fff cmp.w r3, #4294967295 + 800445e: d041 beq.n 80044e4 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8004be0: f7fe f982 bl 8002ee8 - 8004be4: 4602 mov r2, r0 - 8004be6: 683b ldr r3, [r7, #0] - 8004be8: 1ad3 subs r3, r2, r3 - 8004bea: 687a ldr r2, [r7, #4] - 8004bec: 429a cmp r2, r3 - 8004bee: d302 bcc.n 8004bf6 - 8004bf0: 687b ldr r3, [r7, #4] - 8004bf2: 2b00 cmp r3, #0 - 8004bf4: d136 bne.n 8004c64 + 8004460: f7fe fb82 bl 8002b68 + 8004464: 4602 mov r2, r0 + 8004466: 683b ldr r3, [r7, #0] + 8004468: 1ad3 subs r3, r2, r3 + 800446a: 687a ldr r2, [r7, #4] + 800446c: 429a cmp r2, r3 + 800446e: d302 bcc.n 8004476 + 8004470: 687b ldr r3, [r7, #4] + 8004472: 2b00 cmp r3, #0 + 8004474: d136 bne.n 80044e4 { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)) - 8004bf6: 68bb ldr r3, [r7, #8] - 8004bf8: 0c1b lsrs r3, r3, #16 - 8004bfa: b2db uxtb r3, r3 - 8004bfc: 2b01 cmp r3, #1 - 8004bfe: d10c bne.n 8004c1a - 8004c00: 68fb ldr r3, [r7, #12] - 8004c02: 681b ldr r3, [r3, #0] - 8004c04: 695b ldr r3, [r3, #20] - 8004c06: 43da mvns r2, r3 - 8004c08: 68bb ldr r3, [r7, #8] - 8004c0a: 4013 ands r3, r2 - 8004c0c: b29b uxth r3, r3 - 8004c0e: 2b00 cmp r3, #0 - 8004c10: bf14 ite ne - 8004c12: 2301 movne r3, #1 - 8004c14: 2300 moveq r3, #0 - 8004c16: b2db uxtb r3, r3 - 8004c18: e00b b.n 8004c32 - 8004c1a: 68fb ldr r3, [r7, #12] - 8004c1c: 681b ldr r3, [r3, #0] - 8004c1e: 699b ldr r3, [r3, #24] - 8004c20: 43da mvns r2, r3 - 8004c22: 68bb ldr r3, [r7, #8] - 8004c24: 4013 ands r3, r2 - 8004c26: b29b uxth r3, r3 - 8004c28: 2b00 cmp r3, #0 - 8004c2a: bf14 ite ne - 8004c2c: 2301 movne r3, #1 - 8004c2e: 2300 moveq r3, #0 - 8004c30: b2db uxtb r3, r3 - 8004c32: 2b00 cmp r3, #0 - 8004c34: d016 beq.n 8004c64 + 8004476: 68bb ldr r3, [r7, #8] + 8004478: 0c1b lsrs r3, r3, #16 + 800447a: b2db uxtb r3, r3 + 800447c: 2b01 cmp r3, #1 + 800447e: d10c bne.n 800449a + 8004480: 68fb ldr r3, [r7, #12] + 8004482: 681b ldr r3, [r3, #0] + 8004484: 695b ldr r3, [r3, #20] + 8004486: 43da mvns r2, r3 + 8004488: 68bb ldr r3, [r7, #8] + 800448a: 4013 ands r3, r2 + 800448c: b29b uxth r3, r3 + 800448e: 2b00 cmp r3, #0 + 8004490: bf14 ite ne + 8004492: 2301 movne r3, #1 + 8004494: 2300 moveq r3, #0 + 8004496: b2db uxtb r3, r3 + 8004498: e00b b.n 80044b2 + 800449a: 68fb ldr r3, [r7, #12] + 800449c: 681b ldr r3, [r3, #0] + 800449e: 699b ldr r3, [r3, #24] + 80044a0: 43da mvns r2, r3 + 80044a2: 68bb ldr r3, [r7, #8] + 80044a4: 4013 ands r3, r2 + 80044a6: b29b uxth r3, r3 + 80044a8: 2b00 cmp r3, #0 + 80044aa: bf14 ite ne + 80044ac: 2301 movne r3, #1 + 80044ae: 2300 moveq r3, #0 + 80044b0: b2db uxtb r3, r3 + 80044b2: 2b00 cmp r3, #0 + 80044b4: d016 beq.n 80044e4 { hi2c->PreviousState = I2C_STATE_NONE; - 8004c36: 68fb ldr r3, [r7, #12] - 8004c38: 2200 movs r2, #0 - 8004c3a: 631a str r2, [r3, #48] @ 0x30 + 80044b6: 68fb ldr r3, [r7, #12] + 80044b8: 2200 movs r2, #0 + 80044ba: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004c3c: 68fb ldr r3, [r7, #12] - 8004c3e: 2220 movs r2, #32 - 8004c40: f883 203d strb.w r2, [r3, #61] @ 0x3d + 80044bc: 68fb ldr r3, [r7, #12] + 80044be: 2220 movs r2, #32 + 80044c0: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004c44: 68fb ldr r3, [r7, #12] - 8004c46: 2200 movs r2, #0 - 8004c48: f883 203e strb.w r2, [r3, #62] @ 0x3e + 80044c4: 68fb ldr r3, [r7, #12] + 80044c6: 2200 movs r2, #0 + 80044c8: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8004c4c: 68fb ldr r3, [r7, #12] - 8004c4e: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004c50: f043 0220 orr.w r2, r3, #32 - 8004c54: 68fb ldr r3, [r7, #12] - 8004c56: 641a str r2, [r3, #64] @ 0x40 + 80044cc: 68fb ldr r3, [r7, #12] + 80044ce: 6c1b ldr r3, [r3, #64] @ 0x40 + 80044d0: f043 0220 orr.w r2, r3, #32 + 80044d4: 68fb ldr r3, [r7, #12] + 80044d6: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004c58: 68fb ldr r3, [r7, #12] - 8004c5a: 2200 movs r2, #0 - 8004c5c: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80044d8: 68fb ldr r3, [r7, #12] + 80044da: 2200 movs r2, #0 + 80044dc: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004c60: 2301 movs r3, #1 - 8004c62: e021 b.n 8004ca8 + 80044e0: 2301 movs r3, #1 + 80044e2: e021 b.n 8004528 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) - 8004c64: 68bb ldr r3, [r7, #8] - 8004c66: 0c1b lsrs r3, r3, #16 - 8004c68: b2db uxtb r3, r3 - 8004c6a: 2b01 cmp r3, #1 - 8004c6c: d10c bne.n 8004c88 - 8004c6e: 68fb ldr r3, [r7, #12] - 8004c70: 681b ldr r3, [r3, #0] - 8004c72: 695b ldr r3, [r3, #20] - 8004c74: 43da mvns r2, r3 - 8004c76: 68bb ldr r3, [r7, #8] - 8004c78: 4013 ands r3, r2 - 8004c7a: b29b uxth r3, r3 - 8004c7c: 2b00 cmp r3, #0 - 8004c7e: bf14 ite ne - 8004c80: 2301 movne r3, #1 - 8004c82: 2300 moveq r3, #0 - 8004c84: b2db uxtb r3, r3 - 8004c86: e00b b.n 8004ca0 - 8004c88: 68fb ldr r3, [r7, #12] - 8004c8a: 681b ldr r3, [r3, #0] - 8004c8c: 699b ldr r3, [r3, #24] - 8004c8e: 43da mvns r2, r3 - 8004c90: 68bb ldr r3, [r7, #8] - 8004c92: 4013 ands r3, r2 - 8004c94: b29b uxth r3, r3 - 8004c96: 2b00 cmp r3, #0 - 8004c98: bf14 ite ne - 8004c9a: 2301 movne r3, #1 - 8004c9c: 2300 moveq r3, #0 - 8004c9e: b2db uxtb r3, r3 - 8004ca0: 2b00 cmp r3, #0 - 8004ca2: f47f af6d bne.w 8004b80 + 80044e4: 68bb ldr r3, [r7, #8] + 80044e6: 0c1b lsrs r3, r3, #16 + 80044e8: b2db uxtb r3, r3 + 80044ea: 2b01 cmp r3, #1 + 80044ec: d10c bne.n 8004508 + 80044ee: 68fb ldr r3, [r7, #12] + 80044f0: 681b ldr r3, [r3, #0] + 80044f2: 695b ldr r3, [r3, #20] + 80044f4: 43da mvns r2, r3 + 80044f6: 68bb ldr r3, [r7, #8] + 80044f8: 4013 ands r3, r2 + 80044fa: b29b uxth r3, r3 + 80044fc: 2b00 cmp r3, #0 + 80044fe: bf14 ite ne + 8004500: 2301 movne r3, #1 + 8004502: 2300 moveq r3, #0 + 8004504: b2db uxtb r3, r3 + 8004506: e00b b.n 8004520 + 8004508: 68fb ldr r3, [r7, #12] + 800450a: 681b ldr r3, [r3, #0] + 800450c: 699b ldr r3, [r3, #24] + 800450e: 43da mvns r2, r3 + 8004510: 68bb ldr r3, [r7, #8] + 8004512: 4013 ands r3, r2 + 8004514: b29b uxth r3, r3 + 8004516: 2b00 cmp r3, #0 + 8004518: bf14 ite ne + 800451a: 2301 movne r3, #1 + 800451c: 2300 moveq r3, #0 + 800451e: b2db uxtb r3, r3 + 8004520: 2b00 cmp r3, #0 + 8004522: f47f af6d bne.w 8004400 } } } } return HAL_OK; - 8004ca6: 2300 movs r3, #0 + 8004526: 2300 movs r3, #0 } - 8004ca8: 4618 mov r0, r3 - 8004caa: 3710 adds r7, #16 - 8004cac: 46bd mov sp, r7 - 8004cae: bd80 pop {r7, pc} + 8004528: 4618 mov r0, r3 + 800452a: 3710 adds r7, #16 + 800452c: 46bd mov sp, r7 + 800452e: bd80 pop {r7, pc} -08004cb0 : +08004530 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 8004cb0: b580 push {r7, lr} - 8004cb2: b084 sub sp, #16 - 8004cb4: af00 add r7, sp, #0 - 8004cb6: 60f8 str r0, [r7, #12] - 8004cb8: 60b9 str r1, [r7, #8] - 8004cba: 607a str r2, [r7, #4] + 8004530: b580 push {r7, lr} + 8004532: b084 sub sp, #16 + 8004534: af00 add r7, sp, #0 + 8004536: 60f8 str r0, [r7, #12] + 8004538: 60b9 str r1, [r7, #8] + 800453a: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 8004cbc: e034 b.n 8004d28 + 800453c: e034 b.n 80045a8 { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) - 8004cbe: 68f8 ldr r0, [r7, #12] - 8004cc0: f000 f8e3 bl 8004e8a - 8004cc4: 4603 mov r3, r0 - 8004cc6: 2b00 cmp r3, #0 - 8004cc8: d001 beq.n 8004cce + 800453e: 68f8 ldr r0, [r7, #12] + 8004540: f000 f8e3 bl 800470a + 8004544: 4603 mov r3, r0 + 8004546: 2b00 cmp r3, #0 + 8004548: d001 beq.n 800454e { return HAL_ERROR; - 8004cca: 2301 movs r3, #1 - 8004ccc: e034 b.n 8004d38 + 800454a: 2301 movs r3, #1 + 800454c: e034 b.n 80045b8 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8004cce: 68bb ldr r3, [r7, #8] - 8004cd0: f1b3 3fff cmp.w r3, #4294967295 - 8004cd4: d028 beq.n 8004d28 + 800454e: 68bb ldr r3, [r7, #8] + 8004550: f1b3 3fff cmp.w r3, #4294967295 + 8004554: d028 beq.n 80045a8 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8004cd6: f7fe f907 bl 8002ee8 - 8004cda: 4602 mov r2, r0 - 8004cdc: 687b ldr r3, [r7, #4] - 8004cde: 1ad3 subs r3, r2, r3 - 8004ce0: 68ba ldr r2, [r7, #8] - 8004ce2: 429a cmp r2, r3 - 8004ce4: d302 bcc.n 8004cec - 8004ce6: 68bb ldr r3, [r7, #8] - 8004ce8: 2b00 cmp r3, #0 - 8004cea: d11d bne.n 8004d28 + 8004556: f7fe fb07 bl 8002b68 + 800455a: 4602 mov r2, r0 + 800455c: 687b ldr r3, [r7, #4] + 800455e: 1ad3 subs r3, r2, r3 + 8004560: 68ba ldr r2, [r7, #8] + 8004562: 429a cmp r2, r3 + 8004564: d302 bcc.n 800456c + 8004566: 68bb ldr r3, [r7, #8] + 8004568: 2b00 cmp r3, #0 + 800456a: d11d bne.n 80045a8 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)) - 8004cec: 68fb ldr r3, [r7, #12] - 8004cee: 681b ldr r3, [r3, #0] - 8004cf0: 695b ldr r3, [r3, #20] - 8004cf2: f003 0380 and.w r3, r3, #128 @ 0x80 - 8004cf6: 2b80 cmp r3, #128 @ 0x80 - 8004cf8: d016 beq.n 8004d28 + 800456c: 68fb ldr r3, [r7, #12] + 800456e: 681b ldr r3, [r3, #0] + 8004570: 695b ldr r3, [r3, #20] + 8004572: f003 0380 and.w r3, r3, #128 @ 0x80 + 8004576: 2b80 cmp r3, #128 @ 0x80 + 8004578: d016 beq.n 80045a8 { hi2c->PreviousState = I2C_STATE_NONE; - 8004cfa: 68fb ldr r3, [r7, #12] - 8004cfc: 2200 movs r2, #0 - 8004cfe: 631a str r2, [r3, #48] @ 0x30 + 800457a: 68fb ldr r3, [r7, #12] + 800457c: 2200 movs r2, #0 + 800457e: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004d00: 68fb ldr r3, [r7, #12] - 8004d02: 2220 movs r2, #32 - 8004d04: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004580: 68fb ldr r3, [r7, #12] + 8004582: 2220 movs r2, #32 + 8004584: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004d08: 68fb ldr r3, [r7, #12] - 8004d0a: 2200 movs r2, #0 - 8004d0c: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004588: 68fb ldr r3, [r7, #12] + 800458a: 2200 movs r2, #0 + 800458c: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8004d10: 68fb ldr r3, [r7, #12] - 8004d12: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004d14: f043 0220 orr.w r2, r3, #32 - 8004d18: 68fb ldr r3, [r7, #12] - 8004d1a: 641a str r2, [r3, #64] @ 0x40 + 8004590: 68fb ldr r3, [r7, #12] + 8004592: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004594: f043 0220 orr.w r2, r3, #32 + 8004598: 68fb ldr r3, [r7, #12] + 800459a: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004d1c: 68fb ldr r3, [r7, #12] - 8004d1e: 2200 movs r2, #0 - 8004d20: f883 203c strb.w r2, [r3, #60] @ 0x3c + 800459c: 68fb ldr r3, [r7, #12] + 800459e: 2200 movs r2, #0 + 80045a0: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004d24: 2301 movs r3, #1 - 8004d26: e007 b.n 8004d38 + 80045a4: 2301 movs r3, #1 + 80045a6: e007 b.n 80045b8 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 8004d28: 68fb ldr r3, [r7, #12] - 8004d2a: 681b ldr r3, [r3, #0] - 8004d2c: 695b ldr r3, [r3, #20] - 8004d2e: f003 0380 and.w r3, r3, #128 @ 0x80 - 8004d32: 2b80 cmp r3, #128 @ 0x80 - 8004d34: d1c3 bne.n 8004cbe + 80045a8: 68fb ldr r3, [r7, #12] + 80045aa: 681b ldr r3, [r3, #0] + 80045ac: 695b ldr r3, [r3, #20] + 80045ae: f003 0380 and.w r3, r3, #128 @ 0x80 + 80045b2: 2b80 cmp r3, #128 @ 0x80 + 80045b4: d1c3 bne.n 800453e } } } } return HAL_OK; - 8004d36: 2300 movs r3, #0 + 80045b6: 2300 movs r3, #0 } - 8004d38: 4618 mov r0, r3 - 8004d3a: 3710 adds r7, #16 - 8004d3c: 46bd mov sp, r7 - 8004d3e: bd80 pop {r7, pc} + 80045b8: 4618 mov r0, r3 + 80045ba: 3710 adds r7, #16 + 80045bc: 46bd mov sp, r7 + 80045be: bd80 pop {r7, pc} -08004d40 : +080045c0 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 8004d40: b580 push {r7, lr} - 8004d42: b084 sub sp, #16 - 8004d44: af00 add r7, sp, #0 - 8004d46: 60f8 str r0, [r7, #12] - 8004d48: 60b9 str r1, [r7, #8] - 8004d4a: 607a str r2, [r7, #4] + 80045c0: b580 push {r7, lr} + 80045c2: b084 sub sp, #16 + 80045c4: af00 add r7, sp, #0 + 80045c6: 60f8 str r0, [r7, #12] + 80045c8: 60b9 str r1, [r7, #8] + 80045ca: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) - 8004d4c: e034 b.n 8004db8 + 80045cc: e034 b.n 8004638 { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) - 8004d4e: 68f8 ldr r0, [r7, #12] - 8004d50: f000 f89b bl 8004e8a - 8004d54: 4603 mov r3, r0 - 8004d56: 2b00 cmp r3, #0 - 8004d58: d001 beq.n 8004d5e + 80045ce: 68f8 ldr r0, [r7, #12] + 80045d0: f000 f89b bl 800470a + 80045d4: 4603 mov r3, r0 + 80045d6: 2b00 cmp r3, #0 + 80045d8: d001 beq.n 80045de { return HAL_ERROR; - 8004d5a: 2301 movs r3, #1 - 8004d5c: e034 b.n 8004dc8 + 80045da: 2301 movs r3, #1 + 80045dc: e034 b.n 8004648 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8004d5e: 68bb ldr r3, [r7, #8] - 8004d60: f1b3 3fff cmp.w r3, #4294967295 - 8004d64: d028 beq.n 8004db8 + 80045de: 68bb ldr r3, [r7, #8] + 80045e0: f1b3 3fff cmp.w r3, #4294967295 + 80045e4: d028 beq.n 8004638 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8004d66: f7fe f8bf bl 8002ee8 - 8004d6a: 4602 mov r2, r0 - 8004d6c: 687b ldr r3, [r7, #4] - 8004d6e: 1ad3 subs r3, r2, r3 - 8004d70: 68ba ldr r2, [r7, #8] - 8004d72: 429a cmp r2, r3 - 8004d74: d302 bcc.n 8004d7c - 8004d76: 68bb ldr r3, [r7, #8] - 8004d78: 2b00 cmp r3, #0 - 8004d7a: d11d bne.n 8004db8 + 80045e6: f7fe fabf bl 8002b68 + 80045ea: 4602 mov r2, r0 + 80045ec: 687b ldr r3, [r7, #4] + 80045ee: 1ad3 subs r3, r2, r3 + 80045f0: 68ba ldr r2, [r7, #8] + 80045f2: 429a cmp r2, r3 + 80045f4: d302 bcc.n 80045fc + 80045f6: 68bb ldr r3, [r7, #8] + 80045f8: 2b00 cmp r3, #0 + 80045fa: d11d bne.n 8004638 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)) - 8004d7c: 68fb ldr r3, [r7, #12] - 8004d7e: 681b ldr r3, [r3, #0] - 8004d80: 695b ldr r3, [r3, #20] - 8004d82: f003 0304 and.w r3, r3, #4 - 8004d86: 2b04 cmp r3, #4 - 8004d88: d016 beq.n 8004db8 + 80045fc: 68fb ldr r3, [r7, #12] + 80045fe: 681b ldr r3, [r3, #0] + 8004600: 695b ldr r3, [r3, #20] + 8004602: f003 0304 and.w r3, r3, #4 + 8004606: 2b04 cmp r3, #4 + 8004608: d016 beq.n 8004638 { hi2c->PreviousState = I2C_STATE_NONE; - 8004d8a: 68fb ldr r3, [r7, #12] - 8004d8c: 2200 movs r2, #0 - 8004d8e: 631a str r2, [r3, #48] @ 0x30 + 800460a: 68fb ldr r3, [r7, #12] + 800460c: 2200 movs r2, #0 + 800460e: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004d90: 68fb ldr r3, [r7, #12] - 8004d92: 2220 movs r2, #32 - 8004d94: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004610: 68fb ldr r3, [r7, #12] + 8004612: 2220 movs r2, #32 + 8004614: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004d98: 68fb ldr r3, [r7, #12] - 8004d9a: 2200 movs r2, #0 - 8004d9c: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004618: 68fb ldr r3, [r7, #12] + 800461a: 2200 movs r2, #0 + 800461c: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8004da0: 68fb ldr r3, [r7, #12] - 8004da2: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004da4: f043 0220 orr.w r2, r3, #32 - 8004da8: 68fb ldr r3, [r7, #12] - 8004daa: 641a str r2, [r3, #64] @ 0x40 + 8004620: 68fb ldr r3, [r7, #12] + 8004622: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004624: f043 0220 orr.w r2, r3, #32 + 8004628: 68fb ldr r3, [r7, #12] + 800462a: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004dac: 68fb ldr r3, [r7, #12] - 8004dae: 2200 movs r2, #0 - 8004db0: f883 203c strb.w r2, [r3, #60] @ 0x3c + 800462c: 68fb ldr r3, [r7, #12] + 800462e: 2200 movs r2, #0 + 8004630: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004db4: 2301 movs r3, #1 - 8004db6: e007 b.n 8004dc8 + 8004634: 2301 movs r3, #1 + 8004636: e007 b.n 8004648 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) - 8004db8: 68fb ldr r3, [r7, #12] - 8004dba: 681b ldr r3, [r3, #0] - 8004dbc: 695b ldr r3, [r3, #20] - 8004dbe: f003 0304 and.w r3, r3, #4 - 8004dc2: 2b04 cmp r3, #4 - 8004dc4: d1c3 bne.n 8004d4e + 8004638: 68fb ldr r3, [r7, #12] + 800463a: 681b ldr r3, [r3, #0] + 800463c: 695b ldr r3, [r3, #20] + 800463e: f003 0304 and.w r3, r3, #4 + 8004642: 2b04 cmp r3, #4 + 8004644: d1c3 bne.n 80045ce } } } } return HAL_OK; - 8004dc6: 2300 movs r3, #0 + 8004646: 2300 movs r3, #0 } - 8004dc8: 4618 mov r0, r3 - 8004dca: 3710 adds r7, #16 - 8004dcc: 46bd mov sp, r7 - 8004dce: bd80 pop {r7, pc} + 8004648: 4618 mov r0, r3 + 800464a: 3710 adds r7, #16 + 800464c: 46bd mov sp, r7 + 800464e: bd80 pop {r7, pc} -08004dd0 : +08004650 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 8004dd0: b580 push {r7, lr} - 8004dd2: b084 sub sp, #16 - 8004dd4: af00 add r7, sp, #0 - 8004dd6: 60f8 str r0, [r7, #12] - 8004dd8: 60b9 str r1, [r7, #8] - 8004dda: 607a str r2, [r7, #4] + 8004650: b580 push {r7, lr} + 8004652: b084 sub sp, #16 + 8004654: af00 add r7, sp, #0 + 8004656: 60f8 str r0, [r7, #12] + 8004658: 60b9 str r1, [r7, #8] + 800465a: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - 8004ddc: e049 b.n 8004e72 + 800465c: e049 b.n 80046f2 { /* Check if a STOPF is detected */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) - 8004dde: 68fb ldr r3, [r7, #12] - 8004de0: 681b ldr r3, [r3, #0] - 8004de2: 695b ldr r3, [r3, #20] - 8004de4: f003 0310 and.w r3, r3, #16 - 8004de8: 2b10 cmp r3, #16 - 8004dea: d119 bne.n 8004e20 + 800465e: 68fb ldr r3, [r7, #12] + 8004660: 681b ldr r3, [r3, #0] + 8004662: 695b ldr r3, [r3, #20] + 8004664: f003 0310 and.w r3, r3, #16 + 8004668: 2b10 cmp r3, #16 + 800466a: d119 bne.n 80046a0 { /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 8004dec: 68fb ldr r3, [r7, #12] - 8004dee: 681b ldr r3, [r3, #0] - 8004df0: f06f 0210 mvn.w r2, #16 - 8004df4: 615a str r2, [r3, #20] + 800466c: 68fb ldr r3, [r7, #12] + 800466e: 681b ldr r3, [r3, #0] + 8004670: f06f 0210 mvn.w r2, #16 + 8004674: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 8004df6: 68fb ldr r3, [r7, #12] - 8004df8: 2200 movs r2, #0 - 8004dfa: 631a str r2, [r3, #48] @ 0x30 + 8004676: 68fb ldr r3, [r7, #12] + 8004678: 2200 movs r2, #0 + 800467a: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004dfc: 68fb ldr r3, [r7, #12] - 8004dfe: 2220 movs r2, #32 - 8004e00: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800467c: 68fb ldr r3, [r7, #12] + 800467e: 2220 movs r2, #32 + 8004680: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004e04: 68fb ldr r3, [r7, #12] - 8004e06: 2200 movs r2, #0 - 8004e08: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004684: 68fb ldr r3, [r7, #12] + 8004686: 2200 movs r2, #0 + 8004688: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_NONE; - 8004e0c: 68fb ldr r3, [r7, #12] - 8004e0e: 6c1a ldr r2, [r3, #64] @ 0x40 - 8004e10: 68fb ldr r3, [r7, #12] - 8004e12: 641a str r2, [r3, #64] @ 0x40 + 800468c: 68fb ldr r3, [r7, #12] + 800468e: 6c1a ldr r2, [r3, #64] @ 0x40 + 8004690: 68fb ldr r3, [r7, #12] + 8004692: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004e14: 68fb ldr r3, [r7, #12] - 8004e16: 2200 movs r2, #0 - 8004e18: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004694: 68fb ldr r3, [r7, #12] + 8004696: 2200 movs r2, #0 + 8004698: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004e1c: 2301 movs r3, #1 - 8004e1e: e030 b.n 8004e82 + 800469c: 2301 movs r3, #1 + 800469e: e030 b.n 8004702 } /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8004e20: f7fe f862 bl 8002ee8 - 8004e24: 4602 mov r2, r0 - 8004e26: 687b ldr r3, [r7, #4] - 8004e28: 1ad3 subs r3, r2, r3 - 8004e2a: 68ba ldr r2, [r7, #8] - 8004e2c: 429a cmp r2, r3 - 8004e2e: d302 bcc.n 8004e36 - 8004e30: 68bb ldr r3, [r7, #8] - 8004e32: 2b00 cmp r3, #0 - 8004e34: d11d bne.n 8004e72 + 80046a0: f7fe fa62 bl 8002b68 + 80046a4: 4602 mov r2, r0 + 80046a6: 687b ldr r3, [r7, #4] + 80046a8: 1ad3 subs r3, r2, r3 + 80046aa: 68ba ldr r2, [r7, #8] + 80046ac: 429a cmp r2, r3 + 80046ae: d302 bcc.n 80046b6 + 80046b0: 68bb ldr r3, [r7, #8] + 80046b2: 2b00 cmp r3, #0 + 80046b4: d11d bne.n 80046f2 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) - 8004e36: 68fb ldr r3, [r7, #12] - 8004e38: 681b ldr r3, [r3, #0] - 8004e3a: 695b ldr r3, [r3, #20] - 8004e3c: f003 0340 and.w r3, r3, #64 @ 0x40 - 8004e40: 2b40 cmp r3, #64 @ 0x40 - 8004e42: d016 beq.n 8004e72 + 80046b6: 68fb ldr r3, [r7, #12] + 80046b8: 681b ldr r3, [r3, #0] + 80046ba: 695b ldr r3, [r3, #20] + 80046bc: f003 0340 and.w r3, r3, #64 @ 0x40 + 80046c0: 2b40 cmp r3, #64 @ 0x40 + 80046c2: d016 beq.n 80046f2 { hi2c->PreviousState = I2C_STATE_NONE; - 8004e44: 68fb ldr r3, [r7, #12] - 8004e46: 2200 movs r2, #0 - 8004e48: 631a str r2, [r3, #48] @ 0x30 + 80046c4: 68fb ldr r3, [r7, #12] + 80046c6: 2200 movs r2, #0 + 80046c8: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004e4a: 68fb ldr r3, [r7, #12] - 8004e4c: 2220 movs r2, #32 - 8004e4e: f883 203d strb.w r2, [r3, #61] @ 0x3d + 80046ca: 68fb ldr r3, [r7, #12] + 80046cc: 2220 movs r2, #32 + 80046ce: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004e52: 68fb ldr r3, [r7, #12] - 8004e54: 2200 movs r2, #0 - 8004e56: f883 203e strb.w r2, [r3, #62] @ 0x3e + 80046d2: 68fb ldr r3, [r7, #12] + 80046d4: 2200 movs r2, #0 + 80046d6: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8004e5a: 68fb ldr r3, [r7, #12] - 8004e5c: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004e5e: f043 0220 orr.w r2, r3, #32 - 8004e62: 68fb ldr r3, [r7, #12] - 8004e64: 641a str r2, [r3, #64] @ 0x40 + 80046da: 68fb ldr r3, [r7, #12] + 80046dc: 6c1b ldr r3, [r3, #64] @ 0x40 + 80046de: f043 0220 orr.w r2, r3, #32 + 80046e2: 68fb ldr r3, [r7, #12] + 80046e4: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004e66: 68fb ldr r3, [r7, #12] - 8004e68: 2200 movs r2, #0 - 8004e6a: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80046e6: 68fb ldr r3, [r7, #12] + 80046e8: 2200 movs r2, #0 + 80046ea: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004e6e: 2301 movs r3, #1 - 8004e70: e007 b.n 8004e82 + 80046ee: 2301 movs r3, #1 + 80046f0: e007 b.n 8004702 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - 8004e72: 68fb ldr r3, [r7, #12] - 8004e74: 681b ldr r3, [r3, #0] - 8004e76: 695b ldr r3, [r3, #20] - 8004e78: f003 0340 and.w r3, r3, #64 @ 0x40 - 8004e7c: 2b40 cmp r3, #64 @ 0x40 - 8004e7e: d1ae bne.n 8004dde + 80046f2: 68fb ldr r3, [r7, #12] + 80046f4: 681b ldr r3, [r3, #0] + 80046f6: 695b ldr r3, [r3, #20] + 80046f8: f003 0340 and.w r3, r3, #64 @ 0x40 + 80046fc: 2b40 cmp r3, #64 @ 0x40 + 80046fe: d1ae bne.n 800465e } } } return HAL_OK; - 8004e80: 2300 movs r3, #0 + 8004700: 2300 movs r3, #0 } - 8004e82: 4618 mov r0, r3 - 8004e84: 3710 adds r7, #16 - 8004e86: 46bd mov sp, r7 - 8004e88: bd80 pop {r7, pc} + 8004702: 4618 mov r0, r3 + 8004704: 3710 adds r7, #16 + 8004706: 46bd mov sp, r7 + 8004708: bd80 pop {r7, pc} -08004e8a : +0800470a : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { - 8004e8a: b480 push {r7} - 8004e8c: b083 sub sp, #12 - 8004e8e: af00 add r7, sp, #0 - 8004e90: 6078 str r0, [r7, #4] + 800470a: b480 push {r7} + 800470c: b083 sub sp, #12 + 800470e: af00 add r7, sp, #0 + 8004710: 6078 str r0, [r7, #4] if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 8004e92: 687b ldr r3, [r7, #4] - 8004e94: 681b ldr r3, [r3, #0] - 8004e96: 695b ldr r3, [r3, #20] - 8004e98: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8004e9c: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 8004ea0: d11b bne.n 8004eda + 8004712: 687b ldr r3, [r7, #4] + 8004714: 681b ldr r3, [r3, #0] + 8004716: 695b ldr r3, [r3, #20] + 8004718: f403 6380 and.w r3, r3, #1024 @ 0x400 + 800471c: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 8004720: d11b bne.n 800475a { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8004ea2: 687b ldr r3, [r7, #4] - 8004ea4: 681b ldr r3, [r3, #0] - 8004ea6: f46f 6280 mvn.w r2, #1024 @ 0x400 - 8004eaa: 615a str r2, [r3, #20] + 8004722: 687b ldr r3, [r7, #4] + 8004724: 681b ldr r3, [r3, #0] + 8004726: f46f 6280 mvn.w r2, #1024 @ 0x400 + 800472a: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 8004eac: 687b ldr r3, [r7, #4] - 8004eae: 2200 movs r2, #0 - 8004eb0: 631a str r2, [r3, #48] @ 0x30 + 800472c: 687b ldr r3, [r7, #4] + 800472e: 2200 movs r2, #0 + 8004730: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004eb2: 687b ldr r3, [r7, #4] - 8004eb4: 2220 movs r2, #32 - 8004eb6: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004732: 687b ldr r3, [r7, #4] + 8004734: 2220 movs r2, #32 + 8004736: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004eba: 687b ldr r3, [r7, #4] - 8004ebc: 2200 movs r2, #0 - 8004ebe: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800473a: 687b ldr r3, [r7, #4] + 800473c: 2200 movs r2, #0 + 800473e: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8004ec2: 687b ldr r3, [r7, #4] - 8004ec4: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004ec6: f043 0204 orr.w r2, r3, #4 - 8004eca: 687b ldr r3, [r7, #4] - 8004ecc: 641a str r2, [r3, #64] @ 0x40 + 8004742: 687b ldr r3, [r7, #4] + 8004744: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004746: f043 0204 orr.w r2, r3, #4 + 800474a: 687b ldr r3, [r7, #4] + 800474c: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004ece: 687b ldr r3, [r7, #4] - 8004ed0: 2200 movs r2, #0 - 8004ed2: f883 203c strb.w r2, [r3, #60] @ 0x3c + 800474e: 687b ldr r3, [r7, #4] + 8004750: 2200 movs r2, #0 + 8004752: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004ed6: 2301 movs r3, #1 - 8004ed8: e000 b.n 8004edc + 8004756: 2301 movs r3, #1 + 8004758: e000 b.n 800475c } return HAL_OK; - 8004eda: 2300 movs r3, #0 + 800475a: 2300 movs r3, #0 } - 8004edc: 4618 mov r0, r3 - 8004ede: 370c adds r7, #12 - 8004ee0: 46bd mov sp, r7 - 8004ee2: bc80 pop {r7} - 8004ee4: 4770 bx lr + 800475c: 4618 mov r0, r3 + 800475e: 370c adds r7, #12 + 8004760: 46bd mov sp, r7 + 8004762: bc80 pop {r7} + 8004764: 4770 bx lr ... -08004ee8 : +08004768 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8004ee8: b580 push {r7, lr} - 8004eea: b086 sub sp, #24 - 8004eec: af00 add r7, sp, #0 - 8004eee: 6078 str r0, [r7, #4] + 8004768: b580 push {r7, lr} + 800476a: b086 sub sp, #24 + 800476c: af00 add r7, sp, #0 + 800476e: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) - 8004ef0: 687b ldr r3, [r7, #4] - 8004ef2: 2b00 cmp r3, #0 - 8004ef4: d101 bne.n 8004efa + 8004770: 687b ldr r3, [r7, #4] + 8004772: 2b00 cmp r3, #0 + 8004774: d101 bne.n 800477a { return HAL_ERROR; - 8004ef6: 2301 movs r3, #1 - 8004ef8: e272 b.n 80053e0 + 8004776: 2301 movs r3, #1 + 8004778: e272 b.n 8004c60 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8004efa: 687b ldr r3, [r7, #4] - 8004efc: 681b ldr r3, [r3, #0] - 8004efe: f003 0301 and.w r3, r3, #1 - 8004f02: 2b00 cmp r3, #0 - 8004f04: f000 8087 beq.w 8005016 + 800477a: 687b ldr r3, [r7, #4] + 800477c: 681b ldr r3, [r3, #0] + 800477e: f003 0301 and.w r3, r3, #1 + 8004782: 2b00 cmp r3, #0 + 8004784: f000 8087 beq.w 8004896 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 8004f08: 4b92 ldr r3, [pc, #584] @ (8005154 ) - 8004f0a: 685b ldr r3, [r3, #4] - 8004f0c: f003 030c and.w r3, r3, #12 - 8004f10: 2b04 cmp r3, #4 - 8004f12: d00c beq.n 8004f2e + 8004788: 4b92 ldr r3, [pc, #584] @ (80049d4 ) + 800478a: 685b ldr r3, [r3, #4] + 800478c: f003 030c and.w r3, r3, #12 + 8004790: 2b04 cmp r3, #4 + 8004792: d00c beq.n 80047ae || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - 8004f14: 4b8f ldr r3, [pc, #572] @ (8005154 ) - 8004f16: 685b ldr r3, [r3, #4] - 8004f18: f003 030c and.w r3, r3, #12 - 8004f1c: 2b08 cmp r3, #8 - 8004f1e: d112 bne.n 8004f46 - 8004f20: 4b8c ldr r3, [pc, #560] @ (8005154 ) - 8004f22: 685b ldr r3, [r3, #4] - 8004f24: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8004f28: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8004f2c: d10b bne.n 8004f46 + 8004794: 4b8f ldr r3, [pc, #572] @ (80049d4 ) + 8004796: 685b ldr r3, [r3, #4] + 8004798: f003 030c and.w r3, r3, #12 + 800479c: 2b08 cmp r3, #8 + 800479e: d112 bne.n 80047c6 + 80047a0: 4b8c ldr r3, [pc, #560] @ (80049d4 ) + 80047a2: 685b ldr r3, [r3, #4] + 80047a4: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 80047a8: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 80047ac: d10b bne.n 80047c6 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8004f2e: 4b89 ldr r3, [pc, #548] @ (8005154 ) - 8004f30: 681b ldr r3, [r3, #0] - 8004f32: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8004f36: 2b00 cmp r3, #0 - 8004f38: d06c beq.n 8005014 - 8004f3a: 687b ldr r3, [r7, #4] - 8004f3c: 685b ldr r3, [r3, #4] - 8004f3e: 2b00 cmp r3, #0 - 8004f40: d168 bne.n 8005014 + 80047ae: 4b89 ldr r3, [pc, #548] @ (80049d4 ) + 80047b0: 681b ldr r3, [r3, #0] + 80047b2: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 80047b6: 2b00 cmp r3, #0 + 80047b8: d06c beq.n 8004894 + 80047ba: 687b ldr r3, [r7, #4] + 80047bc: 685b ldr r3, [r3, #4] + 80047be: 2b00 cmp r3, #0 + 80047c0: d168 bne.n 8004894 { return HAL_ERROR; - 8004f42: 2301 movs r3, #1 - 8004f44: e24c b.n 80053e0 + 80047c2: 2301 movs r3, #1 + 80047c4: e24c b.n 8004c60 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8004f46: 687b ldr r3, [r7, #4] - 8004f48: 685b ldr r3, [r3, #4] - 8004f4a: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8004f4e: d106 bne.n 8004f5e - 8004f50: 4b80 ldr r3, [pc, #512] @ (8005154 ) - 8004f52: 681b ldr r3, [r3, #0] - 8004f54: 4a7f ldr r2, [pc, #508] @ (8005154 ) - 8004f56: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 8004f5a: 6013 str r3, [r2, #0] - 8004f5c: e02e b.n 8004fbc - 8004f5e: 687b ldr r3, [r7, #4] - 8004f60: 685b ldr r3, [r3, #4] - 8004f62: 2b00 cmp r3, #0 - 8004f64: d10c bne.n 8004f80 - 8004f66: 4b7b ldr r3, [pc, #492] @ (8005154 ) - 8004f68: 681b ldr r3, [r3, #0] - 8004f6a: 4a7a ldr r2, [pc, #488] @ (8005154 ) - 8004f6c: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 8004f70: 6013 str r3, [r2, #0] - 8004f72: 4b78 ldr r3, [pc, #480] @ (8005154 ) - 8004f74: 681b ldr r3, [r3, #0] - 8004f76: 4a77 ldr r2, [pc, #476] @ (8005154 ) - 8004f78: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 8004f7c: 6013 str r3, [r2, #0] - 8004f7e: e01d b.n 8004fbc - 8004f80: 687b ldr r3, [r7, #4] - 8004f82: 685b ldr r3, [r3, #4] - 8004f84: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 - 8004f88: d10c bne.n 8004fa4 - 8004f8a: 4b72 ldr r3, [pc, #456] @ (8005154 ) - 8004f8c: 681b ldr r3, [r3, #0] - 8004f8e: 4a71 ldr r2, [pc, #452] @ (8005154 ) - 8004f90: f443 2380 orr.w r3, r3, #262144 @ 0x40000 - 8004f94: 6013 str r3, [r2, #0] - 8004f96: 4b6f ldr r3, [pc, #444] @ (8005154 ) - 8004f98: 681b ldr r3, [r3, #0] - 8004f9a: 4a6e ldr r2, [pc, #440] @ (8005154 ) - 8004f9c: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 8004fa0: 6013 str r3, [r2, #0] - 8004fa2: e00b b.n 8004fbc - 8004fa4: 4b6b ldr r3, [pc, #428] @ (8005154 ) - 8004fa6: 681b ldr r3, [r3, #0] - 8004fa8: 4a6a ldr r2, [pc, #424] @ (8005154 ) - 8004faa: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 8004fae: 6013 str r3, [r2, #0] - 8004fb0: 4b68 ldr r3, [pc, #416] @ (8005154 ) - 8004fb2: 681b ldr r3, [r3, #0] - 8004fb4: 4a67 ldr r2, [pc, #412] @ (8005154 ) - 8004fb6: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 8004fba: 6013 str r3, [r2, #0] + 80047c6: 687b ldr r3, [r7, #4] + 80047c8: 685b ldr r3, [r3, #4] + 80047ca: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 80047ce: d106 bne.n 80047de + 80047d0: 4b80 ldr r3, [pc, #512] @ (80049d4 ) + 80047d2: 681b ldr r3, [r3, #0] + 80047d4: 4a7f ldr r2, [pc, #508] @ (80049d4 ) + 80047d6: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 80047da: 6013 str r3, [r2, #0] + 80047dc: e02e b.n 800483c + 80047de: 687b ldr r3, [r7, #4] + 80047e0: 685b ldr r3, [r3, #4] + 80047e2: 2b00 cmp r3, #0 + 80047e4: d10c bne.n 8004800 + 80047e6: 4b7b ldr r3, [pc, #492] @ (80049d4 ) + 80047e8: 681b ldr r3, [r3, #0] + 80047ea: 4a7a ldr r2, [pc, #488] @ (80049d4 ) + 80047ec: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 80047f0: 6013 str r3, [r2, #0] + 80047f2: 4b78 ldr r3, [pc, #480] @ (80049d4 ) + 80047f4: 681b ldr r3, [r3, #0] + 80047f6: 4a77 ldr r2, [pc, #476] @ (80049d4 ) + 80047f8: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 80047fc: 6013 str r3, [r2, #0] + 80047fe: e01d b.n 800483c + 8004800: 687b ldr r3, [r7, #4] + 8004802: 685b ldr r3, [r3, #4] + 8004804: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 + 8004808: d10c bne.n 8004824 + 800480a: 4b72 ldr r3, [pc, #456] @ (80049d4 ) + 800480c: 681b ldr r3, [r3, #0] + 800480e: 4a71 ldr r2, [pc, #452] @ (80049d4 ) + 8004810: f443 2380 orr.w r3, r3, #262144 @ 0x40000 + 8004814: 6013 str r3, [r2, #0] + 8004816: 4b6f ldr r3, [pc, #444] @ (80049d4 ) + 8004818: 681b ldr r3, [r3, #0] + 800481a: 4a6e ldr r2, [pc, #440] @ (80049d4 ) + 800481c: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8004820: 6013 str r3, [r2, #0] + 8004822: e00b b.n 800483c + 8004824: 4b6b ldr r3, [pc, #428] @ (80049d4 ) + 8004826: 681b ldr r3, [r3, #0] + 8004828: 4a6a ldr r2, [pc, #424] @ (80049d4 ) + 800482a: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 800482e: 6013 str r3, [r2, #0] + 8004830: 4b68 ldr r3, [pc, #416] @ (80049d4 ) + 8004832: 681b ldr r3, [r3, #0] + 8004834: 4a67 ldr r2, [pc, #412] @ (80049d4 ) + 8004836: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 800483a: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 8004fbc: 687b ldr r3, [r7, #4] - 8004fbe: 685b ldr r3, [r3, #4] - 8004fc0: 2b00 cmp r3, #0 - 8004fc2: d013 beq.n 8004fec + 800483c: 687b ldr r3, [r7, #4] + 800483e: 685b ldr r3, [r3, #4] + 8004840: 2b00 cmp r3, #0 + 8004842: d013 beq.n 800486c { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004fc4: f7fd ff90 bl 8002ee8 - 8004fc8: 6138 str r0, [r7, #16] + 8004844: f7fe f990 bl 8002b68 + 8004848: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8004fca: e008 b.n 8004fde + 800484a: e008 b.n 800485e { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 8004fcc: f7fd ff8c bl 8002ee8 - 8004fd0: 4602 mov r2, r0 - 8004fd2: 693b ldr r3, [r7, #16] - 8004fd4: 1ad3 subs r3, r2, r3 - 8004fd6: 2b64 cmp r3, #100 @ 0x64 - 8004fd8: d901 bls.n 8004fde + 800484c: f7fe f98c bl 8002b68 + 8004850: 4602 mov r2, r0 + 8004852: 693b ldr r3, [r7, #16] + 8004854: 1ad3 subs r3, r2, r3 + 8004856: 2b64 cmp r3, #100 @ 0x64 + 8004858: d901 bls.n 800485e { return HAL_TIMEOUT; - 8004fda: 2303 movs r3, #3 - 8004fdc: e200 b.n 80053e0 + 800485a: 2303 movs r3, #3 + 800485c: e200 b.n 8004c60 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8004fde: 4b5d ldr r3, [pc, #372] @ (8005154 ) - 8004fe0: 681b ldr r3, [r3, #0] - 8004fe2: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8004fe6: 2b00 cmp r3, #0 - 8004fe8: d0f0 beq.n 8004fcc - 8004fea: e014 b.n 8005016 + 800485e: 4b5d ldr r3, [pc, #372] @ (80049d4 ) + 8004860: 681b ldr r3, [r3, #0] + 8004862: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004866: 2b00 cmp r3, #0 + 8004868: d0f0 beq.n 800484c + 800486a: e014 b.n 8004896 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004fec: f7fd ff7c bl 8002ee8 - 8004ff0: 6138 str r0, [r7, #16] + 800486c: f7fe f97c bl 8002b68 + 8004870: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8004ff2: e008 b.n 8005006 + 8004872: e008 b.n 8004886 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 8004ff4: f7fd ff78 bl 8002ee8 - 8004ff8: 4602 mov r2, r0 - 8004ffa: 693b ldr r3, [r7, #16] - 8004ffc: 1ad3 subs r3, r2, r3 - 8004ffe: 2b64 cmp r3, #100 @ 0x64 - 8005000: d901 bls.n 8005006 + 8004874: f7fe f978 bl 8002b68 + 8004878: 4602 mov r2, r0 + 800487a: 693b ldr r3, [r7, #16] + 800487c: 1ad3 subs r3, r2, r3 + 800487e: 2b64 cmp r3, #100 @ 0x64 + 8004880: d901 bls.n 8004886 { return HAL_TIMEOUT; - 8005002: 2303 movs r3, #3 - 8005004: e1ec b.n 80053e0 + 8004882: 2303 movs r3, #3 + 8004884: e1ec b.n 8004c60 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8005006: 4b53 ldr r3, [pc, #332] @ (8005154 ) - 8005008: 681b ldr r3, [r3, #0] - 800500a: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 800500e: 2b00 cmp r3, #0 - 8005010: d1f0 bne.n 8004ff4 - 8005012: e000 b.n 8005016 + 8004886: 4b53 ldr r3, [pc, #332] @ (80049d4 ) + 8004888: 681b ldr r3, [r3, #0] + 800488a: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 800488e: 2b00 cmp r3, #0 + 8004890: d1f0 bne.n 8004874 + 8004892: e000 b.n 8004896 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8005014: bf00 nop + 8004894: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8005016: 687b ldr r3, [r7, #4] - 8005018: 681b ldr r3, [r3, #0] - 800501a: f003 0302 and.w r3, r3, #2 - 800501e: 2b00 cmp r3, #0 - 8005020: d063 beq.n 80050ea + 8004896: 687b ldr r3, [r7, #4] + 8004898: 681b ldr r3, [r3, #0] + 800489a: f003 0302 and.w r3, r3, #2 + 800489e: 2b00 cmp r3, #0 + 80048a0: d063 beq.n 800496a /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 8005022: 4b4c ldr r3, [pc, #304] @ (8005154 ) - 8005024: 685b ldr r3, [r3, #4] - 8005026: f003 030c and.w r3, r3, #12 - 800502a: 2b00 cmp r3, #0 - 800502c: d00b beq.n 8005046 + 80048a2: 4b4c ldr r3, [pc, #304] @ (80049d4 ) + 80048a4: 685b ldr r3, [r3, #4] + 80048a6: f003 030c and.w r3, r3, #12 + 80048aa: 2b00 cmp r3, #0 + 80048ac: d00b beq.n 80048c6 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) - 800502e: 4b49 ldr r3, [pc, #292] @ (8005154 ) - 8005030: 685b ldr r3, [r3, #4] - 8005032: f003 030c and.w r3, r3, #12 - 8005036: 2b08 cmp r3, #8 - 8005038: d11c bne.n 8005074 - 800503a: 4b46 ldr r3, [pc, #280] @ (8005154 ) - 800503c: 685b ldr r3, [r3, #4] - 800503e: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8005042: 2b00 cmp r3, #0 - 8005044: d116 bne.n 8005074 + 80048ae: 4b49 ldr r3, [pc, #292] @ (80049d4 ) + 80048b0: 685b ldr r3, [r3, #4] + 80048b2: f003 030c and.w r3, r3, #12 + 80048b6: 2b08 cmp r3, #8 + 80048b8: d11c bne.n 80048f4 + 80048ba: 4b46 ldr r3, [pc, #280] @ (80049d4 ) + 80048bc: 685b ldr r3, [r3, #4] + 80048be: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 80048c2: 2b00 cmp r3, #0 + 80048c4: d116 bne.n 80048f4 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8005046: 4b43 ldr r3, [pc, #268] @ (8005154 ) - 8005048: 681b ldr r3, [r3, #0] - 800504a: f003 0302 and.w r3, r3, #2 - 800504e: 2b00 cmp r3, #0 - 8005050: d005 beq.n 800505e - 8005052: 687b ldr r3, [r7, #4] - 8005054: 691b ldr r3, [r3, #16] - 8005056: 2b01 cmp r3, #1 - 8005058: d001 beq.n 800505e + 80048c6: 4b43 ldr r3, [pc, #268] @ (80049d4 ) + 80048c8: 681b ldr r3, [r3, #0] + 80048ca: f003 0302 and.w r3, r3, #2 + 80048ce: 2b00 cmp r3, #0 + 80048d0: d005 beq.n 80048de + 80048d2: 687b ldr r3, [r7, #4] + 80048d4: 691b ldr r3, [r3, #16] + 80048d6: 2b01 cmp r3, #1 + 80048d8: d001 beq.n 80048de { return HAL_ERROR; - 800505a: 2301 movs r3, #1 - 800505c: e1c0 b.n 80053e0 + 80048da: 2301 movs r3, #1 + 80048dc: e1c0 b.n 8004c60 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 800505e: 4b3d ldr r3, [pc, #244] @ (8005154 ) - 8005060: 681b ldr r3, [r3, #0] - 8005062: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 8005066: 687b ldr r3, [r7, #4] - 8005068: 695b ldr r3, [r3, #20] - 800506a: 00db lsls r3, r3, #3 - 800506c: 4939 ldr r1, [pc, #228] @ (8005154 ) - 800506e: 4313 orrs r3, r2 - 8005070: 600b str r3, [r1, #0] + 80048de: 4b3d ldr r3, [pc, #244] @ (80049d4 ) + 80048e0: 681b ldr r3, [r3, #0] + 80048e2: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 80048e6: 687b ldr r3, [r7, #4] + 80048e8: 695b ldr r3, [r3, #20] + 80048ea: 00db lsls r3, r3, #3 + 80048ec: 4939 ldr r1, [pc, #228] @ (80049d4 ) + 80048ee: 4313 orrs r3, r2 + 80048f0: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8005072: e03a b.n 80050ea + 80048f2: e03a b.n 800496a } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 8005074: 687b ldr r3, [r7, #4] - 8005076: 691b ldr r3, [r3, #16] - 8005078: 2b00 cmp r3, #0 - 800507a: d020 beq.n 80050be + 80048f4: 687b ldr r3, [r7, #4] + 80048f6: 691b ldr r3, [r3, #16] + 80048f8: 2b00 cmp r3, #0 + 80048fa: d020 beq.n 800493e { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 800507c: 4b36 ldr r3, [pc, #216] @ (8005158 ) - 800507e: 2201 movs r2, #1 - 8005080: 601a str r2, [r3, #0] + 80048fc: 4b36 ldr r3, [pc, #216] @ (80049d8 ) + 80048fe: 2201 movs r2, #1 + 8004900: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005082: f7fd ff31 bl 8002ee8 - 8005086: 6138 str r0, [r7, #16] + 8004902: f7fe f931 bl 8002b68 + 8004906: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8005088: e008 b.n 800509c + 8004908: e008 b.n 800491c { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 800508a: f7fd ff2d bl 8002ee8 - 800508e: 4602 mov r2, r0 - 8005090: 693b ldr r3, [r7, #16] - 8005092: 1ad3 subs r3, r2, r3 - 8005094: 2b02 cmp r3, #2 - 8005096: d901 bls.n 800509c + 800490a: f7fe f92d bl 8002b68 + 800490e: 4602 mov r2, r0 + 8004910: 693b ldr r3, [r7, #16] + 8004912: 1ad3 subs r3, r2, r3 + 8004914: 2b02 cmp r3, #2 + 8004916: d901 bls.n 800491c { return HAL_TIMEOUT; - 8005098: 2303 movs r3, #3 - 800509a: e1a1 b.n 80053e0 + 8004918: 2303 movs r3, #3 + 800491a: e1a1 b.n 8004c60 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 800509c: 4b2d ldr r3, [pc, #180] @ (8005154 ) - 800509e: 681b ldr r3, [r3, #0] - 80050a0: f003 0302 and.w r3, r3, #2 - 80050a4: 2b00 cmp r3, #0 - 80050a6: d0f0 beq.n 800508a + 800491c: 4b2d ldr r3, [pc, #180] @ (80049d4 ) + 800491e: 681b ldr r3, [r3, #0] + 8004920: f003 0302 and.w r3, r3, #2 + 8004924: 2b00 cmp r3, #0 + 8004926: d0f0 beq.n 800490a } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80050a8: 4b2a ldr r3, [pc, #168] @ (8005154 ) - 80050aa: 681b ldr r3, [r3, #0] - 80050ac: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 80050b0: 687b ldr r3, [r7, #4] - 80050b2: 695b ldr r3, [r3, #20] - 80050b4: 00db lsls r3, r3, #3 - 80050b6: 4927 ldr r1, [pc, #156] @ (8005154 ) - 80050b8: 4313 orrs r3, r2 - 80050ba: 600b str r3, [r1, #0] - 80050bc: e015 b.n 80050ea + 8004928: 4b2a ldr r3, [pc, #168] @ (80049d4 ) + 800492a: 681b ldr r3, [r3, #0] + 800492c: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 8004930: 687b ldr r3, [r7, #4] + 8004932: 695b ldr r3, [r3, #20] + 8004934: 00db lsls r3, r3, #3 + 8004936: 4927 ldr r1, [pc, #156] @ (80049d4 ) + 8004938: 4313 orrs r3, r2 + 800493a: 600b str r3, [r1, #0] + 800493c: e015 b.n 800496a } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 80050be: 4b26 ldr r3, [pc, #152] @ (8005158 ) - 80050c0: 2200 movs r2, #0 - 80050c2: 601a str r2, [r3, #0] + 800493e: 4b26 ldr r3, [pc, #152] @ (80049d8 ) + 8004940: 2200 movs r2, #0 + 8004942: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80050c4: f7fd ff10 bl 8002ee8 - 80050c8: 6138 str r0, [r7, #16] + 8004944: f7fe f910 bl 8002b68 + 8004948: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80050ca: e008 b.n 80050de + 800494a: e008 b.n 800495e { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 80050cc: f7fd ff0c bl 8002ee8 - 80050d0: 4602 mov r2, r0 - 80050d2: 693b ldr r3, [r7, #16] - 80050d4: 1ad3 subs r3, r2, r3 - 80050d6: 2b02 cmp r3, #2 - 80050d8: d901 bls.n 80050de + 800494c: f7fe f90c bl 8002b68 + 8004950: 4602 mov r2, r0 + 8004952: 693b ldr r3, [r7, #16] + 8004954: 1ad3 subs r3, r2, r3 + 8004956: 2b02 cmp r3, #2 + 8004958: d901 bls.n 800495e { return HAL_TIMEOUT; - 80050da: 2303 movs r3, #3 - 80050dc: e180 b.n 80053e0 + 800495a: 2303 movs r3, #3 + 800495c: e180 b.n 8004c60 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80050de: 4b1d ldr r3, [pc, #116] @ (8005154 ) - 80050e0: 681b ldr r3, [r3, #0] - 80050e2: f003 0302 and.w r3, r3, #2 - 80050e6: 2b00 cmp r3, #0 - 80050e8: d1f0 bne.n 80050cc + 800495e: 4b1d ldr r3, [pc, #116] @ (80049d4 ) + 8004960: 681b ldr r3, [r3, #0] + 8004962: f003 0302 and.w r3, r3, #2 + 8004966: 2b00 cmp r3, #0 + 8004968: d1f0 bne.n 800494c } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 80050ea: 687b ldr r3, [r7, #4] - 80050ec: 681b ldr r3, [r3, #0] - 80050ee: f003 0308 and.w r3, r3, #8 - 80050f2: 2b00 cmp r3, #0 - 80050f4: d03a beq.n 800516c + 800496a: 687b ldr r3, [r7, #4] + 800496c: 681b ldr r3, [r3, #0] + 800496e: f003 0308 and.w r3, r3, #8 + 8004972: 2b00 cmp r3, #0 + 8004974: d03a beq.n 80049ec { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 80050f6: 687b ldr r3, [r7, #4] - 80050f8: 699b ldr r3, [r3, #24] - 80050fa: 2b00 cmp r3, #0 - 80050fc: d019 beq.n 8005132 + 8004976: 687b ldr r3, [r7, #4] + 8004978: 699b ldr r3, [r3, #24] + 800497a: 2b00 cmp r3, #0 + 800497c: d019 beq.n 80049b2 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 80050fe: 4b17 ldr r3, [pc, #92] @ (800515c ) - 8005100: 2201 movs r2, #1 - 8005102: 601a str r2, [r3, #0] + 800497e: 4b17 ldr r3, [pc, #92] @ (80049dc ) + 8004980: 2201 movs r2, #1 + 8004982: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005104: f7fd fef0 bl 8002ee8 - 8005108: 6138 str r0, [r7, #16] + 8004984: f7fe f8f0 bl 8002b68 + 8004988: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 800510a: e008 b.n 800511e + 800498a: e008 b.n 800499e { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 800510c: f7fd feec bl 8002ee8 - 8005110: 4602 mov r2, r0 - 8005112: 693b ldr r3, [r7, #16] - 8005114: 1ad3 subs r3, r2, r3 - 8005116: 2b02 cmp r3, #2 - 8005118: d901 bls.n 800511e + 800498c: f7fe f8ec bl 8002b68 + 8004990: 4602 mov r2, r0 + 8004992: 693b ldr r3, [r7, #16] + 8004994: 1ad3 subs r3, r2, r3 + 8004996: 2b02 cmp r3, #2 + 8004998: d901 bls.n 800499e { return HAL_TIMEOUT; - 800511a: 2303 movs r3, #3 - 800511c: e160 b.n 80053e0 + 800499a: 2303 movs r3, #3 + 800499c: e160 b.n 8004c60 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 800511e: 4b0d ldr r3, [pc, #52] @ (8005154 ) - 8005120: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005122: f003 0302 and.w r3, r3, #2 - 8005126: 2b00 cmp r3, #0 - 8005128: d0f0 beq.n 800510c + 800499e: 4b0d ldr r3, [pc, #52] @ (80049d4 ) + 80049a0: 6a5b ldr r3, [r3, #36] @ 0x24 + 80049a2: f003 0302 and.w r3, r3, #2 + 80049a6: 2b00 cmp r3, #0 + 80049a8: d0f0 beq.n 800498c } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); - 800512a: 2001 movs r0, #1 - 800512c: f000 fad0 bl 80056d0 - 8005130: e01c b.n 800516c + 80049aa: 2001 movs r0, #1 + 80049ac: f000 fad0 bl 8004f50 + 80049b0: e01c b.n 80049ec } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 8005132: 4b0a ldr r3, [pc, #40] @ (800515c ) - 8005134: 2200 movs r2, #0 - 8005136: 601a str r2, [r3, #0] + 80049b2: 4b0a ldr r3, [pc, #40] @ (80049dc ) + 80049b4: 2200 movs r2, #0 + 80049b6: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005138: f7fd fed6 bl 8002ee8 - 800513c: 6138 str r0, [r7, #16] + 80049b8: f7fe f8d6 bl 8002b68 + 80049bc: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 800513e: e00f b.n 8005160 + 80049be: e00f b.n 80049e0 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 8005140: f7fd fed2 bl 8002ee8 - 8005144: 4602 mov r2, r0 - 8005146: 693b ldr r3, [r7, #16] - 8005148: 1ad3 subs r3, r2, r3 - 800514a: 2b02 cmp r3, #2 - 800514c: d908 bls.n 8005160 + 80049c0: f7fe f8d2 bl 8002b68 + 80049c4: 4602 mov r2, r0 + 80049c6: 693b ldr r3, [r7, #16] + 80049c8: 1ad3 subs r3, r2, r3 + 80049ca: 2b02 cmp r3, #2 + 80049cc: d908 bls.n 80049e0 { return HAL_TIMEOUT; - 800514e: 2303 movs r3, #3 - 8005150: e146 b.n 80053e0 - 8005152: bf00 nop - 8005154: 40021000 .word 0x40021000 - 8005158: 42420000 .word 0x42420000 - 800515c: 42420480 .word 0x42420480 + 80049ce: 2303 movs r3, #3 + 80049d0: e146 b.n 8004c60 + 80049d2: bf00 nop + 80049d4: 40021000 .word 0x40021000 + 80049d8: 42420000 .word 0x42420000 + 80049dc: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8005160: 4b92 ldr r3, [pc, #584] @ (80053ac ) - 8005162: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005164: f003 0302 and.w r3, r3, #2 - 8005168: 2b00 cmp r3, #0 - 800516a: d1e9 bne.n 8005140 + 80049e0: 4b92 ldr r3, [pc, #584] @ (8004c2c ) + 80049e2: 6a5b ldr r3, [r3, #36] @ 0x24 + 80049e4: f003 0302 and.w r3, r3, #2 + 80049e8: 2b00 cmp r3, #0 + 80049ea: d1e9 bne.n 80049c0 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 800516c: 687b ldr r3, [r7, #4] - 800516e: 681b ldr r3, [r3, #0] - 8005170: f003 0304 and.w r3, r3, #4 - 8005174: 2b00 cmp r3, #0 - 8005176: f000 80a6 beq.w 80052c6 + 80049ec: 687b ldr r3, [r7, #4] + 80049ee: 681b ldr r3, [r3, #0] + 80049f0: f003 0304 and.w r3, r3, #4 + 80049f4: 2b00 cmp r3, #0 + 80049f6: f000 80a6 beq.w 8004b46 { FlagStatus pwrclkchanged = RESET; - 800517a: 2300 movs r3, #0 - 800517c: 75fb strb r3, [r7, #23] + 80049fa: 2300 movs r3, #0 + 80049fc: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 800517e: 4b8b ldr r3, [pc, #556] @ (80053ac ) - 8005180: 69db ldr r3, [r3, #28] - 8005182: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8005186: 2b00 cmp r3, #0 - 8005188: d10d bne.n 80051a6 + 80049fe: 4b8b ldr r3, [pc, #556] @ (8004c2c ) + 8004a00: 69db ldr r3, [r3, #28] + 8004a02: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8004a06: 2b00 cmp r3, #0 + 8004a08: d10d bne.n 8004a26 { __HAL_RCC_PWR_CLK_ENABLE(); - 800518a: 4b88 ldr r3, [pc, #544] @ (80053ac ) - 800518c: 69db ldr r3, [r3, #28] - 800518e: 4a87 ldr r2, [pc, #540] @ (80053ac ) - 8005190: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8005194: 61d3 str r3, [r2, #28] - 8005196: 4b85 ldr r3, [pc, #532] @ (80053ac ) - 8005198: 69db ldr r3, [r3, #28] - 800519a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 800519e: 60bb str r3, [r7, #8] - 80051a0: 68bb ldr r3, [r7, #8] + 8004a0a: 4b88 ldr r3, [pc, #544] @ (8004c2c ) + 8004a0c: 69db ldr r3, [r3, #28] + 8004a0e: 4a87 ldr r2, [pc, #540] @ (8004c2c ) + 8004a10: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8004a14: 61d3 str r3, [r2, #28] + 8004a16: 4b85 ldr r3, [pc, #532] @ (8004c2c ) + 8004a18: 69db ldr r3, [r3, #28] + 8004a1a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8004a1e: 60bb str r3, [r7, #8] + 8004a20: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 80051a2: 2301 movs r3, #1 - 80051a4: 75fb strb r3, [r7, #23] + 8004a22: 2301 movs r3, #1 + 8004a24: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80051a6: 4b82 ldr r3, [pc, #520] @ (80053b0 ) - 80051a8: 681b ldr r3, [r3, #0] - 80051aa: f403 7380 and.w r3, r3, #256 @ 0x100 - 80051ae: 2b00 cmp r3, #0 - 80051b0: d118 bne.n 80051e4 + 8004a26: 4b82 ldr r3, [pc, #520] @ (8004c30 ) + 8004a28: 681b ldr r3, [r3, #0] + 8004a2a: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004a2e: 2b00 cmp r3, #0 + 8004a30: d118 bne.n 8004a64 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 80051b2: 4b7f ldr r3, [pc, #508] @ (80053b0 ) - 80051b4: 681b ldr r3, [r3, #0] - 80051b6: 4a7e ldr r2, [pc, #504] @ (80053b0 ) - 80051b8: f443 7380 orr.w r3, r3, #256 @ 0x100 - 80051bc: 6013 str r3, [r2, #0] + 8004a32: 4b7f ldr r3, [pc, #508] @ (8004c30 ) + 8004a34: 681b ldr r3, [r3, #0] + 8004a36: 4a7e ldr r2, [pc, #504] @ (8004c30 ) + 8004a38: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8004a3c: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 80051be: f7fd fe93 bl 8002ee8 - 80051c2: 6138 str r0, [r7, #16] + 8004a3e: f7fe f893 bl 8002b68 + 8004a42: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80051c4: e008 b.n 80051d8 + 8004a44: e008 b.n 8004a58 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 80051c6: f7fd fe8f bl 8002ee8 - 80051ca: 4602 mov r2, r0 - 80051cc: 693b ldr r3, [r7, #16] - 80051ce: 1ad3 subs r3, r2, r3 - 80051d0: 2b64 cmp r3, #100 @ 0x64 - 80051d2: d901 bls.n 80051d8 + 8004a46: f7fe f88f bl 8002b68 + 8004a4a: 4602 mov r2, r0 + 8004a4c: 693b ldr r3, [r7, #16] + 8004a4e: 1ad3 subs r3, r2, r3 + 8004a50: 2b64 cmp r3, #100 @ 0x64 + 8004a52: d901 bls.n 8004a58 { return HAL_TIMEOUT; - 80051d4: 2303 movs r3, #3 - 80051d6: e103 b.n 80053e0 + 8004a54: 2303 movs r3, #3 + 8004a56: e103 b.n 8004c60 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80051d8: 4b75 ldr r3, [pc, #468] @ (80053b0 ) - 80051da: 681b ldr r3, [r3, #0] - 80051dc: f403 7380 and.w r3, r3, #256 @ 0x100 - 80051e0: 2b00 cmp r3, #0 - 80051e2: d0f0 beq.n 80051c6 + 8004a58: 4b75 ldr r3, [pc, #468] @ (8004c30 ) + 8004a5a: 681b ldr r3, [r3, #0] + 8004a5c: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004a60: 2b00 cmp r3, #0 + 8004a62: d0f0 beq.n 8004a46 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 80051e4: 687b ldr r3, [r7, #4] - 80051e6: 68db ldr r3, [r3, #12] - 80051e8: 2b01 cmp r3, #1 - 80051ea: d106 bne.n 80051fa - 80051ec: 4b6f ldr r3, [pc, #444] @ (80053ac ) - 80051ee: 6a1b ldr r3, [r3, #32] - 80051f0: 4a6e ldr r2, [pc, #440] @ (80053ac ) - 80051f2: f043 0301 orr.w r3, r3, #1 - 80051f6: 6213 str r3, [r2, #32] - 80051f8: e02d b.n 8005256 - 80051fa: 687b ldr r3, [r7, #4] - 80051fc: 68db ldr r3, [r3, #12] - 80051fe: 2b00 cmp r3, #0 - 8005200: d10c bne.n 800521c - 8005202: 4b6a ldr r3, [pc, #424] @ (80053ac ) - 8005204: 6a1b ldr r3, [r3, #32] - 8005206: 4a69 ldr r2, [pc, #420] @ (80053ac ) - 8005208: f023 0301 bic.w r3, r3, #1 - 800520c: 6213 str r3, [r2, #32] - 800520e: 4b67 ldr r3, [pc, #412] @ (80053ac ) - 8005210: 6a1b ldr r3, [r3, #32] - 8005212: 4a66 ldr r2, [pc, #408] @ (80053ac ) - 8005214: f023 0304 bic.w r3, r3, #4 - 8005218: 6213 str r3, [r2, #32] - 800521a: e01c b.n 8005256 - 800521c: 687b ldr r3, [r7, #4] - 800521e: 68db ldr r3, [r3, #12] - 8005220: 2b05 cmp r3, #5 - 8005222: d10c bne.n 800523e - 8005224: 4b61 ldr r3, [pc, #388] @ (80053ac ) - 8005226: 6a1b ldr r3, [r3, #32] - 8005228: 4a60 ldr r2, [pc, #384] @ (80053ac ) - 800522a: f043 0304 orr.w r3, r3, #4 - 800522e: 6213 str r3, [r2, #32] - 8005230: 4b5e ldr r3, [pc, #376] @ (80053ac ) - 8005232: 6a1b ldr r3, [r3, #32] - 8005234: 4a5d ldr r2, [pc, #372] @ (80053ac ) - 8005236: f043 0301 orr.w r3, r3, #1 - 800523a: 6213 str r3, [r2, #32] - 800523c: e00b b.n 8005256 - 800523e: 4b5b ldr r3, [pc, #364] @ (80053ac ) - 8005240: 6a1b ldr r3, [r3, #32] - 8005242: 4a5a ldr r2, [pc, #360] @ (80053ac ) - 8005244: f023 0301 bic.w r3, r3, #1 - 8005248: 6213 str r3, [r2, #32] - 800524a: 4b58 ldr r3, [pc, #352] @ (80053ac ) - 800524c: 6a1b ldr r3, [r3, #32] - 800524e: 4a57 ldr r2, [pc, #348] @ (80053ac ) - 8005250: f023 0304 bic.w r3, r3, #4 - 8005254: 6213 str r3, [r2, #32] + 8004a64: 687b ldr r3, [r7, #4] + 8004a66: 68db ldr r3, [r3, #12] + 8004a68: 2b01 cmp r3, #1 + 8004a6a: d106 bne.n 8004a7a + 8004a6c: 4b6f ldr r3, [pc, #444] @ (8004c2c ) + 8004a6e: 6a1b ldr r3, [r3, #32] + 8004a70: 4a6e ldr r2, [pc, #440] @ (8004c2c ) + 8004a72: f043 0301 orr.w r3, r3, #1 + 8004a76: 6213 str r3, [r2, #32] + 8004a78: e02d b.n 8004ad6 + 8004a7a: 687b ldr r3, [r7, #4] + 8004a7c: 68db ldr r3, [r3, #12] + 8004a7e: 2b00 cmp r3, #0 + 8004a80: d10c bne.n 8004a9c + 8004a82: 4b6a ldr r3, [pc, #424] @ (8004c2c ) + 8004a84: 6a1b ldr r3, [r3, #32] + 8004a86: 4a69 ldr r2, [pc, #420] @ (8004c2c ) + 8004a88: f023 0301 bic.w r3, r3, #1 + 8004a8c: 6213 str r3, [r2, #32] + 8004a8e: 4b67 ldr r3, [pc, #412] @ (8004c2c ) + 8004a90: 6a1b ldr r3, [r3, #32] + 8004a92: 4a66 ldr r2, [pc, #408] @ (8004c2c ) + 8004a94: f023 0304 bic.w r3, r3, #4 + 8004a98: 6213 str r3, [r2, #32] + 8004a9a: e01c b.n 8004ad6 + 8004a9c: 687b ldr r3, [r7, #4] + 8004a9e: 68db ldr r3, [r3, #12] + 8004aa0: 2b05 cmp r3, #5 + 8004aa2: d10c bne.n 8004abe + 8004aa4: 4b61 ldr r3, [pc, #388] @ (8004c2c ) + 8004aa6: 6a1b ldr r3, [r3, #32] + 8004aa8: 4a60 ldr r2, [pc, #384] @ (8004c2c ) + 8004aaa: f043 0304 orr.w r3, r3, #4 + 8004aae: 6213 str r3, [r2, #32] + 8004ab0: 4b5e ldr r3, [pc, #376] @ (8004c2c ) + 8004ab2: 6a1b ldr r3, [r3, #32] + 8004ab4: 4a5d ldr r2, [pc, #372] @ (8004c2c ) + 8004ab6: f043 0301 orr.w r3, r3, #1 + 8004aba: 6213 str r3, [r2, #32] + 8004abc: e00b b.n 8004ad6 + 8004abe: 4b5b ldr r3, [pc, #364] @ (8004c2c ) + 8004ac0: 6a1b ldr r3, [r3, #32] + 8004ac2: 4a5a ldr r2, [pc, #360] @ (8004c2c ) + 8004ac4: f023 0301 bic.w r3, r3, #1 + 8004ac8: 6213 str r3, [r2, #32] + 8004aca: 4b58 ldr r3, [pc, #352] @ (8004c2c ) + 8004acc: 6a1b ldr r3, [r3, #32] + 8004ace: 4a57 ldr r2, [pc, #348] @ (8004c2c ) + 8004ad0: f023 0304 bic.w r3, r3, #4 + 8004ad4: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 8005256: 687b ldr r3, [r7, #4] - 8005258: 68db ldr r3, [r3, #12] - 800525a: 2b00 cmp r3, #0 - 800525c: d015 beq.n 800528a + 8004ad6: 687b ldr r3, [r7, #4] + 8004ad8: 68db ldr r3, [r3, #12] + 8004ada: 2b00 cmp r3, #0 + 8004adc: d015 beq.n 8004b0a { /* Get Start Tick */ tickstart = HAL_GetTick(); - 800525e: f7fd fe43 bl 8002ee8 - 8005262: 6138 str r0, [r7, #16] + 8004ade: f7fe f843 bl 8002b68 + 8004ae2: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8005264: e00a b.n 800527c + 8004ae4: e00a b.n 8004afc { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8005266: f7fd fe3f bl 8002ee8 - 800526a: 4602 mov r2, r0 - 800526c: 693b ldr r3, [r7, #16] - 800526e: 1ad3 subs r3, r2, r3 - 8005270: f241 3288 movw r2, #5000 @ 0x1388 - 8005274: 4293 cmp r3, r2 - 8005276: d901 bls.n 800527c + 8004ae6: f7fe f83f bl 8002b68 + 8004aea: 4602 mov r2, r0 + 8004aec: 693b ldr r3, [r7, #16] + 8004aee: 1ad3 subs r3, r2, r3 + 8004af0: f241 3288 movw r2, #5000 @ 0x1388 + 8004af4: 4293 cmp r3, r2 + 8004af6: d901 bls.n 8004afc { return HAL_TIMEOUT; - 8005278: 2303 movs r3, #3 - 800527a: e0b1 b.n 80053e0 + 8004af8: 2303 movs r3, #3 + 8004afa: e0b1 b.n 8004c60 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 800527c: 4b4b ldr r3, [pc, #300] @ (80053ac ) - 800527e: 6a1b ldr r3, [r3, #32] - 8005280: f003 0302 and.w r3, r3, #2 - 8005284: 2b00 cmp r3, #0 - 8005286: d0ee beq.n 8005266 - 8005288: e014 b.n 80052b4 + 8004afc: 4b4b ldr r3, [pc, #300] @ (8004c2c ) + 8004afe: 6a1b ldr r3, [r3, #32] + 8004b00: f003 0302 and.w r3, r3, #2 + 8004b04: 2b00 cmp r3, #0 + 8004b06: d0ee beq.n 8004ae6 + 8004b08: e014 b.n 8004b34 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 800528a: f7fd fe2d bl 8002ee8 - 800528e: 6138 str r0, [r7, #16] + 8004b0a: f7fe f82d bl 8002b68 + 8004b0e: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8005290: e00a b.n 80052a8 + 8004b10: e00a b.n 8004b28 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8005292: f7fd fe29 bl 8002ee8 - 8005296: 4602 mov r2, r0 - 8005298: 693b ldr r3, [r7, #16] - 800529a: 1ad3 subs r3, r2, r3 - 800529c: f241 3288 movw r2, #5000 @ 0x1388 - 80052a0: 4293 cmp r3, r2 - 80052a2: d901 bls.n 80052a8 + 8004b12: f7fe f829 bl 8002b68 + 8004b16: 4602 mov r2, r0 + 8004b18: 693b ldr r3, [r7, #16] + 8004b1a: 1ad3 subs r3, r2, r3 + 8004b1c: f241 3288 movw r2, #5000 @ 0x1388 + 8004b20: 4293 cmp r3, r2 + 8004b22: d901 bls.n 8004b28 { return HAL_TIMEOUT; - 80052a4: 2303 movs r3, #3 - 80052a6: e09b b.n 80053e0 + 8004b24: 2303 movs r3, #3 + 8004b26: e09b b.n 8004c60 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 80052a8: 4b40 ldr r3, [pc, #256] @ (80053ac ) - 80052aa: 6a1b ldr r3, [r3, #32] - 80052ac: f003 0302 and.w r3, r3, #2 - 80052b0: 2b00 cmp r3, #0 - 80052b2: d1ee bne.n 8005292 + 8004b28: 4b40 ldr r3, [pc, #256] @ (8004c2c ) + 8004b2a: 6a1b ldr r3, [r3, #32] + 8004b2c: f003 0302 and.w r3, r3, #2 + 8004b30: 2b00 cmp r3, #0 + 8004b32: d1ee bne.n 8004b12 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) - 80052b4: 7dfb ldrb r3, [r7, #23] - 80052b6: 2b01 cmp r3, #1 - 80052b8: d105 bne.n 80052c6 + 8004b34: 7dfb ldrb r3, [r7, #23] + 8004b36: 2b01 cmp r3, #1 + 8004b38: d105 bne.n 8004b46 { __HAL_RCC_PWR_CLK_DISABLE(); - 80052ba: 4b3c ldr r3, [pc, #240] @ (80053ac ) - 80052bc: 69db ldr r3, [r3, #28] - 80052be: 4a3b ldr r2, [pc, #236] @ (80053ac ) - 80052c0: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 80052c4: 61d3 str r3, [r2, #28] + 8004b3a: 4b3c ldr r3, [pc, #240] @ (8004c2c ) + 8004b3c: 69db ldr r3, [r3, #28] + 8004b3e: 4a3b ldr r2, [pc, #236] @ (8004c2c ) + 8004b40: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 8004b44: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 80052c6: 687b ldr r3, [r7, #4] - 80052c8: 69db ldr r3, [r3, #28] - 80052ca: 2b00 cmp r3, #0 - 80052cc: f000 8087 beq.w 80053de + 8004b46: 687b ldr r3, [r7, #4] + 8004b48: 69db ldr r3, [r3, #28] + 8004b4a: 2b00 cmp r3, #0 + 8004b4c: f000 8087 beq.w 8004c5e { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 80052d0: 4b36 ldr r3, [pc, #216] @ (80053ac ) - 80052d2: 685b ldr r3, [r3, #4] - 80052d4: f003 030c and.w r3, r3, #12 - 80052d8: 2b08 cmp r3, #8 - 80052da: d061 beq.n 80053a0 + 8004b50: 4b36 ldr r3, [pc, #216] @ (8004c2c ) + 8004b52: 685b ldr r3, [r3, #4] + 8004b54: f003 030c and.w r3, r3, #12 + 8004b58: 2b08 cmp r3, #8 + 8004b5a: d061 beq.n 8004c20 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 80052dc: 687b ldr r3, [r7, #4] - 80052de: 69db ldr r3, [r3, #28] - 80052e0: 2b02 cmp r3, #2 - 80052e2: d146 bne.n 8005372 + 8004b5c: 687b ldr r3, [r7, #4] + 8004b5e: 69db ldr r3, [r3, #28] + 8004b60: 2b02 cmp r3, #2 + 8004b62: d146 bne.n 8004bf2 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 80052e4: 4b33 ldr r3, [pc, #204] @ (80053b4 ) - 80052e6: 2200 movs r2, #0 - 80052e8: 601a str r2, [r3, #0] + 8004b64: 4b33 ldr r3, [pc, #204] @ (8004c34 ) + 8004b66: 2200 movs r2, #0 + 8004b68: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80052ea: f7fd fdfd bl 8002ee8 - 80052ee: 6138 str r0, [r7, #16] + 8004b6a: f7fd fffd bl 8002b68 + 8004b6e: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80052f0: e008 b.n 8005304 + 8004b70: e008 b.n 8004b84 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 80052f2: f7fd fdf9 bl 8002ee8 - 80052f6: 4602 mov r2, r0 - 80052f8: 693b ldr r3, [r7, #16] - 80052fa: 1ad3 subs r3, r2, r3 - 80052fc: 2b02 cmp r3, #2 - 80052fe: d901 bls.n 8005304 + 8004b72: f7fd fff9 bl 8002b68 + 8004b76: 4602 mov r2, r0 + 8004b78: 693b ldr r3, [r7, #16] + 8004b7a: 1ad3 subs r3, r2, r3 + 8004b7c: 2b02 cmp r3, #2 + 8004b7e: d901 bls.n 8004b84 { return HAL_TIMEOUT; - 8005300: 2303 movs r3, #3 - 8005302: e06d b.n 80053e0 + 8004b80: 2303 movs r3, #3 + 8004b82: e06d b.n 8004c60 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8005304: 4b29 ldr r3, [pc, #164] @ (80053ac ) - 8005306: 681b ldr r3, [r3, #0] - 8005308: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 800530c: 2b00 cmp r3, #0 - 800530e: d1f0 bne.n 80052f2 + 8004b84: 4b29 ldr r3, [pc, #164] @ (8004c2c ) + 8004b86: 681b ldr r3, [r3, #0] + 8004b88: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8004b8c: 2b00 cmp r3, #0 + 8004b8e: d1f0 bne.n 8004b72 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) - 8005310: 687b ldr r3, [r7, #4] - 8005312: 6a1b ldr r3, [r3, #32] - 8005314: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8005318: d108 bne.n 800532c + 8004b90: 687b ldr r3, [r7, #4] + 8004b92: 6a1b ldr r3, [r3, #32] + 8004b94: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8004b98: d108 bne.n 8004bac /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); - 800531a: 4b24 ldr r3, [pc, #144] @ (80053ac ) - 800531c: 685b ldr r3, [r3, #4] - 800531e: f423 3200 bic.w r2, r3, #131072 @ 0x20000 - 8005322: 687b ldr r3, [r7, #4] - 8005324: 689b ldr r3, [r3, #8] - 8005326: 4921 ldr r1, [pc, #132] @ (80053ac ) - 8005328: 4313 orrs r3, r2 - 800532a: 604b str r3, [r1, #4] + 8004b9a: 4b24 ldr r3, [pc, #144] @ (8004c2c ) + 8004b9c: 685b ldr r3, [r3, #4] + 8004b9e: f423 3200 bic.w r2, r3, #131072 @ 0x20000 + 8004ba2: 687b ldr r3, [r7, #4] + 8004ba4: 689b ldr r3, [r3, #8] + 8004ba6: 4921 ldr r1, [pc, #132] @ (8004c2c ) + 8004ba8: 4313 orrs r3, r2 + 8004baa: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 800532c: 4b1f ldr r3, [pc, #124] @ (80053ac ) - 800532e: 685b ldr r3, [r3, #4] - 8005330: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 - 8005334: 687b ldr r3, [r7, #4] - 8005336: 6a19 ldr r1, [r3, #32] - 8005338: 687b ldr r3, [r7, #4] - 800533a: 6a5b ldr r3, [r3, #36] @ 0x24 - 800533c: 430b orrs r3, r1 - 800533e: 491b ldr r1, [pc, #108] @ (80053ac ) - 8005340: 4313 orrs r3, r2 - 8005342: 604b str r3, [r1, #4] + 8004bac: 4b1f ldr r3, [pc, #124] @ (8004c2c ) + 8004bae: 685b ldr r3, [r3, #4] + 8004bb0: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 + 8004bb4: 687b ldr r3, [r7, #4] + 8004bb6: 6a19 ldr r1, [r3, #32] + 8004bb8: 687b ldr r3, [r7, #4] + 8004bba: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004bbc: 430b orrs r3, r1 + 8004bbe: 491b ldr r1, [pc, #108] @ (8004c2c ) + 8004bc0: 4313 orrs r3, r2 + 8004bc2: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 8005344: 4b1b ldr r3, [pc, #108] @ (80053b4 ) - 8005346: 2201 movs r2, #1 - 8005348: 601a str r2, [r3, #0] + 8004bc4: 4b1b ldr r3, [pc, #108] @ (8004c34 ) + 8004bc6: 2201 movs r2, #1 + 8004bc8: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800534a: f7fd fdcd bl 8002ee8 - 800534e: 6138 str r0, [r7, #16] + 8004bca: f7fd ffcd bl 8002b68 + 8004bce: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8005350: e008 b.n 8005364 + 8004bd0: e008 b.n 8004be4 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8005352: f7fd fdc9 bl 8002ee8 - 8005356: 4602 mov r2, r0 - 8005358: 693b ldr r3, [r7, #16] - 800535a: 1ad3 subs r3, r2, r3 - 800535c: 2b02 cmp r3, #2 - 800535e: d901 bls.n 8005364 + 8004bd2: f7fd ffc9 bl 8002b68 + 8004bd6: 4602 mov r2, r0 + 8004bd8: 693b ldr r3, [r7, #16] + 8004bda: 1ad3 subs r3, r2, r3 + 8004bdc: 2b02 cmp r3, #2 + 8004bde: d901 bls.n 8004be4 { return HAL_TIMEOUT; - 8005360: 2303 movs r3, #3 - 8005362: e03d b.n 80053e0 + 8004be0: 2303 movs r3, #3 + 8004be2: e03d b.n 8004c60 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8005364: 4b11 ldr r3, [pc, #68] @ (80053ac ) - 8005366: 681b ldr r3, [r3, #0] - 8005368: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 800536c: 2b00 cmp r3, #0 - 800536e: d0f0 beq.n 8005352 - 8005370: e035 b.n 80053de + 8004be4: 4b11 ldr r3, [pc, #68] @ (8004c2c ) + 8004be6: 681b ldr r3, [r3, #0] + 8004be8: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8004bec: 2b00 cmp r3, #0 + 8004bee: d0f0 beq.n 8004bd2 + 8004bf0: e035 b.n 8004c5e } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8005372: 4b10 ldr r3, [pc, #64] @ (80053b4 ) - 8005374: 2200 movs r2, #0 - 8005376: 601a str r2, [r3, #0] + 8004bf2: 4b10 ldr r3, [pc, #64] @ (8004c34 ) + 8004bf4: 2200 movs r2, #0 + 8004bf6: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005378: f7fd fdb6 bl 8002ee8 - 800537c: 6138 str r0, [r7, #16] + 8004bf8: f7fd ffb6 bl 8002b68 + 8004bfc: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 800537e: e008 b.n 8005392 + 8004bfe: e008 b.n 8004c12 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8005380: f7fd fdb2 bl 8002ee8 - 8005384: 4602 mov r2, r0 - 8005386: 693b ldr r3, [r7, #16] - 8005388: 1ad3 subs r3, r2, r3 - 800538a: 2b02 cmp r3, #2 - 800538c: d901 bls.n 8005392 + 8004c00: f7fd ffb2 bl 8002b68 + 8004c04: 4602 mov r2, r0 + 8004c06: 693b ldr r3, [r7, #16] + 8004c08: 1ad3 subs r3, r2, r3 + 8004c0a: 2b02 cmp r3, #2 + 8004c0c: d901 bls.n 8004c12 { return HAL_TIMEOUT; - 800538e: 2303 movs r3, #3 - 8005390: e026 b.n 80053e0 + 8004c0e: 2303 movs r3, #3 + 8004c10: e026 b.n 8004c60 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8005392: 4b06 ldr r3, [pc, #24] @ (80053ac ) - 8005394: 681b ldr r3, [r3, #0] - 8005396: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 800539a: 2b00 cmp r3, #0 - 800539c: d1f0 bne.n 8005380 - 800539e: e01e b.n 80053de + 8004c12: 4b06 ldr r3, [pc, #24] @ (8004c2c ) + 8004c14: 681b ldr r3, [r3, #0] + 8004c16: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8004c1a: 2b00 cmp r3, #0 + 8004c1c: d1f0 bne.n 8004c00 + 8004c1e: e01e b.n 8004c5e } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 80053a0: 687b ldr r3, [r7, #4] - 80053a2: 69db ldr r3, [r3, #28] - 80053a4: 2b01 cmp r3, #1 - 80053a6: d107 bne.n 80053b8 + 8004c20: 687b ldr r3, [r7, #4] + 8004c22: 69db ldr r3, [r3, #28] + 8004c24: 2b01 cmp r3, #1 + 8004c26: d107 bne.n 8004c38 { return HAL_ERROR; - 80053a8: 2301 movs r3, #1 - 80053aa: e019 b.n 80053e0 - 80053ac: 40021000 .word 0x40021000 - 80053b0: 40007000 .word 0x40007000 - 80053b4: 42420060 .word 0x42420060 + 8004c28: 2301 movs r3, #1 + 8004c2a: e019 b.n 8004c60 + 8004c2c: 40021000 .word 0x40021000 + 8004c30: 40007000 .word 0x40007000 + 8004c34: 42420060 .word 0x42420060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 80053b8: 4b0b ldr r3, [pc, #44] @ (80053e8 ) - 80053ba: 685b ldr r3, [r3, #4] - 80053bc: 60fb str r3, [r7, #12] + 8004c38: 4b0b ldr r3, [pc, #44] @ (8004c68 ) + 8004c3a: 685b ldr r3, [r3, #4] + 8004c3c: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80053be: 68fb ldr r3, [r7, #12] - 80053c0: f403 3280 and.w r2, r3, #65536 @ 0x10000 - 80053c4: 687b ldr r3, [r7, #4] - 80053c6: 6a1b ldr r3, [r3, #32] - 80053c8: 429a cmp r2, r3 - 80053ca: d106 bne.n 80053da + 8004c3e: 68fb ldr r3, [r7, #12] + 8004c40: f403 3280 and.w r2, r3, #65536 @ 0x10000 + 8004c44: 687b ldr r3, [r7, #4] + 8004c46: 6a1b ldr r3, [r3, #32] + 8004c48: 429a cmp r2, r3 + 8004c4a: d106 bne.n 8004c5a (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) - 80053cc: 68fb ldr r3, [r7, #12] - 80053ce: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 - 80053d2: 687b ldr r3, [r7, #4] - 80053d4: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004c4c: 68fb ldr r3, [r7, #12] + 8004c4e: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 + 8004c52: 687b ldr r3, [r7, #4] + 8004c54: 6a5b ldr r3, [r3, #36] @ 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80053d6: 429a cmp r2, r3 - 80053d8: d001 beq.n 80053de + 8004c56: 429a cmp r2, r3 + 8004c58: d001 beq.n 8004c5e { return HAL_ERROR; - 80053da: 2301 movs r3, #1 - 80053dc: e000 b.n 80053e0 + 8004c5a: 2301 movs r3, #1 + 8004c5c: e000 b.n 8004c60 } } } } return HAL_OK; - 80053de: 2300 movs r3, #0 + 8004c5e: 2300 movs r3, #0 } - 80053e0: 4618 mov r0, r3 - 80053e2: 3718 adds r7, #24 - 80053e4: 46bd mov sp, r7 - 80053e6: bd80 pop {r7, pc} - 80053e8: 40021000 .word 0x40021000 + 8004c60: 4618 mov r0, r3 + 8004c62: 3718 adds r7, #24 + 8004c64: 46bd mov sp, r7 + 8004c66: bd80 pop {r7, pc} + 8004c68: 40021000 .word 0x40021000 -080053ec : +08004c6c : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 80053ec: b580 push {r7, lr} - 80053ee: b084 sub sp, #16 - 80053f0: af00 add r7, sp, #0 - 80053f2: 6078 str r0, [r7, #4] - 80053f4: 6039 str r1, [r7, #0] + 8004c6c: b580 push {r7, lr} + 8004c6e: b084 sub sp, #16 + 8004c70: af00 add r7, sp, #0 + 8004c72: 6078 str r0, [r7, #4] + 8004c74: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) - 80053f6: 687b ldr r3, [r7, #4] - 80053f8: 2b00 cmp r3, #0 - 80053fa: d101 bne.n 8005400 + 8004c76: 687b ldr r3, [r7, #4] + 8004c78: 2b00 cmp r3, #0 + 8004c7a: d101 bne.n 8004c80 { return HAL_ERROR; - 80053fc: 2301 movs r3, #1 - 80053fe: e0d0 b.n 80055a2 + 8004c7c: 2301 movs r3, #1 + 8004c7e: e0d0 b.n 8004e22 must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) - 8005400: 4b6a ldr r3, [pc, #424] @ (80055ac ) - 8005402: 681b ldr r3, [r3, #0] - 8005404: f003 0307 and.w r3, r3, #7 - 8005408: 683a ldr r2, [r7, #0] - 800540a: 429a cmp r2, r3 - 800540c: d910 bls.n 8005430 + 8004c80: 4b6a ldr r3, [pc, #424] @ (8004e2c ) + 8004c82: 681b ldr r3, [r3, #0] + 8004c84: f003 0307 and.w r3, r3, #7 + 8004c88: 683a ldr r2, [r7, #0] + 8004c8a: 429a cmp r2, r3 + 8004c8c: d910 bls.n 8004cb0 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 800540e: 4b67 ldr r3, [pc, #412] @ (80055ac ) - 8005410: 681b ldr r3, [r3, #0] - 8005412: f023 0207 bic.w r2, r3, #7 - 8005416: 4965 ldr r1, [pc, #404] @ (80055ac ) - 8005418: 683b ldr r3, [r7, #0] - 800541a: 4313 orrs r3, r2 - 800541c: 600b str r3, [r1, #0] + 8004c8e: 4b67 ldr r3, [pc, #412] @ (8004e2c ) + 8004c90: 681b ldr r3, [r3, #0] + 8004c92: f023 0207 bic.w r2, r3, #7 + 8004c96: 4965 ldr r1, [pc, #404] @ (8004e2c ) + 8004c98: 683b ldr r3, [r7, #0] + 8004c9a: 4313 orrs r3, r2 + 8004c9c: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 800541e: 4b63 ldr r3, [pc, #396] @ (80055ac ) - 8005420: 681b ldr r3, [r3, #0] - 8005422: f003 0307 and.w r3, r3, #7 - 8005426: 683a ldr r2, [r7, #0] - 8005428: 429a cmp r2, r3 - 800542a: d001 beq.n 8005430 + 8004c9e: 4b63 ldr r3, [pc, #396] @ (8004e2c ) + 8004ca0: 681b ldr r3, [r3, #0] + 8004ca2: f003 0307 and.w r3, r3, #7 + 8004ca6: 683a ldr r2, [r7, #0] + 8004ca8: 429a cmp r2, r3 + 8004caa: d001 beq.n 8004cb0 { return HAL_ERROR; - 800542c: 2301 movs r3, #1 - 800542e: e0b8 b.n 80055a2 + 8004cac: 2301 movs r3, #1 + 8004cae: e0b8 b.n 8004e22 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8005430: 687b ldr r3, [r7, #4] - 8005432: 681b ldr r3, [r3, #0] - 8005434: f003 0302 and.w r3, r3, #2 - 8005438: 2b00 cmp r3, #0 - 800543a: d020 beq.n 800547e + 8004cb0: 687b ldr r3, [r7, #4] + 8004cb2: 681b ldr r3, [r3, #0] + 8004cb4: f003 0302 and.w r3, r3, #2 + 8004cb8: 2b00 cmp r3, #0 + 8004cba: d020 beq.n 8004cfe { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 800543c: 687b ldr r3, [r7, #4] - 800543e: 681b ldr r3, [r3, #0] - 8005440: f003 0304 and.w r3, r3, #4 - 8005444: 2b00 cmp r3, #0 - 8005446: d005 beq.n 8005454 + 8004cbc: 687b ldr r3, [r7, #4] + 8004cbe: 681b ldr r3, [r3, #0] + 8004cc0: f003 0304 and.w r3, r3, #4 + 8004cc4: 2b00 cmp r3, #0 + 8004cc6: d005 beq.n 8004cd4 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); - 8005448: 4b59 ldr r3, [pc, #356] @ (80055b0 ) - 800544a: 685b ldr r3, [r3, #4] - 800544c: 4a58 ldr r2, [pc, #352] @ (80055b0 ) - 800544e: f443 63e0 orr.w r3, r3, #1792 @ 0x700 - 8005452: 6053 str r3, [r2, #4] + 8004cc8: 4b59 ldr r3, [pc, #356] @ (8004e30 ) + 8004cca: 685b ldr r3, [r3, #4] + 8004ccc: 4a58 ldr r2, [pc, #352] @ (8004e30 ) + 8004cce: f443 63e0 orr.w r3, r3, #1792 @ 0x700 + 8004cd2: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8005454: 687b ldr r3, [r7, #4] - 8005456: 681b ldr r3, [r3, #0] - 8005458: f003 0308 and.w r3, r3, #8 - 800545c: 2b00 cmp r3, #0 - 800545e: d005 beq.n 800546c + 8004cd4: 687b ldr r3, [r7, #4] + 8004cd6: 681b ldr r3, [r3, #0] + 8004cd8: f003 0308 and.w r3, r3, #8 + 8004cdc: 2b00 cmp r3, #0 + 8004cde: d005 beq.n 8004cec { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); - 8005460: 4b53 ldr r3, [pc, #332] @ (80055b0 ) - 8005462: 685b ldr r3, [r3, #4] - 8005464: 4a52 ldr r2, [pc, #328] @ (80055b0 ) - 8005466: f443 5360 orr.w r3, r3, #14336 @ 0x3800 - 800546a: 6053 str r3, [r2, #4] + 8004ce0: 4b53 ldr r3, [pc, #332] @ (8004e30 ) + 8004ce2: 685b ldr r3, [r3, #4] + 8004ce4: 4a52 ldr r2, [pc, #328] @ (8004e30 ) + 8004ce6: f443 5360 orr.w r3, r3, #14336 @ 0x3800 + 8004cea: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 800546c: 4b50 ldr r3, [pc, #320] @ (80055b0 ) - 800546e: 685b ldr r3, [r3, #4] - 8005470: f023 02f0 bic.w r2, r3, #240 @ 0xf0 - 8005474: 687b ldr r3, [r7, #4] - 8005476: 689b ldr r3, [r3, #8] - 8005478: 494d ldr r1, [pc, #308] @ (80055b0 ) - 800547a: 4313 orrs r3, r2 - 800547c: 604b str r3, [r1, #4] + 8004cec: 4b50 ldr r3, [pc, #320] @ (8004e30 ) + 8004cee: 685b ldr r3, [r3, #4] + 8004cf0: f023 02f0 bic.w r2, r3, #240 @ 0xf0 + 8004cf4: 687b ldr r3, [r7, #4] + 8004cf6: 689b ldr r3, [r3, #8] + 8004cf8: 494d ldr r1, [pc, #308] @ (8004e30 ) + 8004cfa: 4313 orrs r3, r2 + 8004cfc: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 800547e: 687b ldr r3, [r7, #4] - 8005480: 681b ldr r3, [r3, #0] - 8005482: f003 0301 and.w r3, r3, #1 - 8005486: 2b00 cmp r3, #0 - 8005488: d040 beq.n 800550c + 8004cfe: 687b ldr r3, [r7, #4] + 8004d00: 681b ldr r3, [r3, #0] + 8004d02: f003 0301 and.w r3, r3, #1 + 8004d06: 2b00 cmp r3, #0 + 8004d08: d040 beq.n 8004d8c { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 800548a: 687b ldr r3, [r7, #4] - 800548c: 685b ldr r3, [r3, #4] - 800548e: 2b01 cmp r3, #1 - 8005490: d107 bne.n 80054a2 + 8004d0a: 687b ldr r3, [r7, #4] + 8004d0c: 685b ldr r3, [r3, #4] + 8004d0e: 2b01 cmp r3, #1 + 8004d10: d107 bne.n 8004d22 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8005492: 4b47 ldr r3, [pc, #284] @ (80055b0 ) - 8005494: 681b ldr r3, [r3, #0] - 8005496: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 800549a: 2b00 cmp r3, #0 - 800549c: d115 bne.n 80054ca + 8004d12: 4b47 ldr r3, [pc, #284] @ (8004e30 ) + 8004d14: 681b ldr r3, [r3, #0] + 8004d16: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004d1a: 2b00 cmp r3, #0 + 8004d1c: d115 bne.n 8004d4a { return HAL_ERROR; - 800549e: 2301 movs r3, #1 - 80054a0: e07f b.n 80055a2 + 8004d1e: 2301 movs r3, #1 + 8004d20: e07f b.n 8004e22 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 80054a2: 687b ldr r3, [r7, #4] - 80054a4: 685b ldr r3, [r3, #4] - 80054a6: 2b02 cmp r3, #2 - 80054a8: d107 bne.n 80054ba + 8004d22: 687b ldr r3, [r7, #4] + 8004d24: 685b ldr r3, [r3, #4] + 8004d26: 2b02 cmp r3, #2 + 8004d28: d107 bne.n 8004d3a { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 80054aa: 4b41 ldr r3, [pc, #260] @ (80055b0 ) - 80054ac: 681b ldr r3, [r3, #0] - 80054ae: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 80054b2: 2b00 cmp r3, #0 - 80054b4: d109 bne.n 80054ca + 8004d2a: 4b41 ldr r3, [pc, #260] @ (8004e30 ) + 8004d2c: 681b ldr r3, [r3, #0] + 8004d2e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8004d32: 2b00 cmp r3, #0 + 8004d34: d109 bne.n 8004d4a { return HAL_ERROR; - 80054b6: 2301 movs r3, #1 - 80054b8: e073 b.n 80055a2 + 8004d36: 2301 movs r3, #1 + 8004d38: e073 b.n 8004e22 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80054ba: 4b3d ldr r3, [pc, #244] @ (80055b0 ) - 80054bc: 681b ldr r3, [r3, #0] - 80054be: f003 0302 and.w r3, r3, #2 - 80054c2: 2b00 cmp r3, #0 - 80054c4: d101 bne.n 80054ca + 8004d3a: 4b3d ldr r3, [pc, #244] @ (8004e30 ) + 8004d3c: 681b ldr r3, [r3, #0] + 8004d3e: f003 0302 and.w r3, r3, #2 + 8004d42: 2b00 cmp r3, #0 + 8004d44: d101 bne.n 8004d4a { return HAL_ERROR; - 80054c6: 2301 movs r3, #1 - 80054c8: e06b b.n 80055a2 + 8004d46: 2301 movs r3, #1 + 8004d48: e06b b.n 8004e22 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 80054ca: 4b39 ldr r3, [pc, #228] @ (80055b0 ) - 80054cc: 685b ldr r3, [r3, #4] - 80054ce: f023 0203 bic.w r2, r3, #3 - 80054d2: 687b ldr r3, [r7, #4] - 80054d4: 685b ldr r3, [r3, #4] - 80054d6: 4936 ldr r1, [pc, #216] @ (80055b0 ) - 80054d8: 4313 orrs r3, r2 - 80054da: 604b str r3, [r1, #4] + 8004d4a: 4b39 ldr r3, [pc, #228] @ (8004e30 ) + 8004d4c: 685b ldr r3, [r3, #4] + 8004d4e: f023 0203 bic.w r2, r3, #3 + 8004d52: 687b ldr r3, [r7, #4] + 8004d54: 685b ldr r3, [r3, #4] + 8004d56: 4936 ldr r1, [pc, #216] @ (8004e30 ) + 8004d58: 4313 orrs r3, r2 + 8004d5a: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80054dc: f7fd fd04 bl 8002ee8 - 80054e0: 60f8 str r0, [r7, #12] + 8004d5c: f7fd ff04 bl 8002b68 + 8004d60: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80054e2: e00a b.n 80054fa + 8004d62: e00a b.n 8004d7a { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 80054e4: f7fd fd00 bl 8002ee8 - 80054e8: 4602 mov r2, r0 - 80054ea: 68fb ldr r3, [r7, #12] - 80054ec: 1ad3 subs r3, r2, r3 - 80054ee: f241 3288 movw r2, #5000 @ 0x1388 - 80054f2: 4293 cmp r3, r2 - 80054f4: d901 bls.n 80054fa + 8004d64: f7fd ff00 bl 8002b68 + 8004d68: 4602 mov r2, r0 + 8004d6a: 68fb ldr r3, [r7, #12] + 8004d6c: 1ad3 subs r3, r2, r3 + 8004d6e: f241 3288 movw r2, #5000 @ 0x1388 + 8004d72: 4293 cmp r3, r2 + 8004d74: d901 bls.n 8004d7a { return HAL_TIMEOUT; - 80054f6: 2303 movs r3, #3 - 80054f8: e053 b.n 80055a2 + 8004d76: 2303 movs r3, #3 + 8004d78: e053 b.n 8004e22 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80054fa: 4b2d ldr r3, [pc, #180] @ (80055b0 ) - 80054fc: 685b ldr r3, [r3, #4] - 80054fe: f003 020c and.w r2, r3, #12 - 8005502: 687b ldr r3, [r7, #4] - 8005504: 685b ldr r3, [r3, #4] - 8005506: 009b lsls r3, r3, #2 - 8005508: 429a cmp r2, r3 - 800550a: d1eb bne.n 80054e4 + 8004d7a: 4b2d ldr r3, [pc, #180] @ (8004e30 ) + 8004d7c: 685b ldr r3, [r3, #4] + 8004d7e: f003 020c and.w r2, r3, #12 + 8004d82: 687b ldr r3, [r7, #4] + 8004d84: 685b ldr r3, [r3, #4] + 8004d86: 009b lsls r3, r3, #2 + 8004d88: 429a cmp r2, r3 + 8004d8a: d1eb bne.n 8004d64 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) - 800550c: 4b27 ldr r3, [pc, #156] @ (80055ac ) - 800550e: 681b ldr r3, [r3, #0] - 8005510: f003 0307 and.w r3, r3, #7 - 8005514: 683a ldr r2, [r7, #0] - 8005516: 429a cmp r2, r3 - 8005518: d210 bcs.n 800553c + 8004d8c: 4b27 ldr r3, [pc, #156] @ (8004e2c ) + 8004d8e: 681b ldr r3, [r3, #0] + 8004d90: f003 0307 and.w r3, r3, #7 + 8004d94: 683a ldr r2, [r7, #0] + 8004d96: 429a cmp r2, r3 + 8004d98: d210 bcs.n 8004dbc { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 800551a: 4b24 ldr r3, [pc, #144] @ (80055ac ) - 800551c: 681b ldr r3, [r3, #0] - 800551e: f023 0207 bic.w r2, r3, #7 - 8005522: 4922 ldr r1, [pc, #136] @ (80055ac ) - 8005524: 683b ldr r3, [r7, #0] - 8005526: 4313 orrs r3, r2 - 8005528: 600b str r3, [r1, #0] + 8004d9a: 4b24 ldr r3, [pc, #144] @ (8004e2c ) + 8004d9c: 681b ldr r3, [r3, #0] + 8004d9e: f023 0207 bic.w r2, r3, #7 + 8004da2: 4922 ldr r1, [pc, #136] @ (8004e2c ) + 8004da4: 683b ldr r3, [r7, #0] + 8004da6: 4313 orrs r3, r2 + 8004da8: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 800552a: 4b20 ldr r3, [pc, #128] @ (80055ac ) - 800552c: 681b ldr r3, [r3, #0] - 800552e: f003 0307 and.w r3, r3, #7 - 8005532: 683a ldr r2, [r7, #0] - 8005534: 429a cmp r2, r3 - 8005536: d001 beq.n 800553c + 8004daa: 4b20 ldr r3, [pc, #128] @ (8004e2c ) + 8004dac: 681b ldr r3, [r3, #0] + 8004dae: f003 0307 and.w r3, r3, #7 + 8004db2: 683a ldr r2, [r7, #0] + 8004db4: 429a cmp r2, r3 + 8004db6: d001 beq.n 8004dbc { return HAL_ERROR; - 8005538: 2301 movs r3, #1 - 800553a: e032 b.n 80055a2 + 8004db8: 2301 movs r3, #1 + 8004dba: e032 b.n 8004e22 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 800553c: 687b ldr r3, [r7, #4] - 800553e: 681b ldr r3, [r3, #0] - 8005540: f003 0304 and.w r3, r3, #4 - 8005544: 2b00 cmp r3, #0 - 8005546: d008 beq.n 800555a + 8004dbc: 687b ldr r3, [r7, #4] + 8004dbe: 681b ldr r3, [r3, #0] + 8004dc0: f003 0304 and.w r3, r3, #4 + 8004dc4: 2b00 cmp r3, #0 + 8004dc6: d008 beq.n 8004dda { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8005548: 4b19 ldr r3, [pc, #100] @ (80055b0 ) - 800554a: 685b ldr r3, [r3, #4] - 800554c: f423 62e0 bic.w r2, r3, #1792 @ 0x700 - 8005550: 687b ldr r3, [r7, #4] - 8005552: 68db ldr r3, [r3, #12] - 8005554: 4916 ldr r1, [pc, #88] @ (80055b0 ) - 8005556: 4313 orrs r3, r2 - 8005558: 604b str r3, [r1, #4] + 8004dc8: 4b19 ldr r3, [pc, #100] @ (8004e30 ) + 8004dca: 685b ldr r3, [r3, #4] + 8004dcc: f423 62e0 bic.w r2, r3, #1792 @ 0x700 + 8004dd0: 687b ldr r3, [r7, #4] + 8004dd2: 68db ldr r3, [r3, #12] + 8004dd4: 4916 ldr r1, [pc, #88] @ (8004e30 ) + 8004dd6: 4313 orrs r3, r2 + 8004dd8: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 800555a: 687b ldr r3, [r7, #4] - 800555c: 681b ldr r3, [r3, #0] - 800555e: f003 0308 and.w r3, r3, #8 - 8005562: 2b00 cmp r3, #0 - 8005564: d009 beq.n 800557a + 8004dda: 687b ldr r3, [r7, #4] + 8004ddc: 681b ldr r3, [r3, #0] + 8004dde: f003 0308 and.w r3, r3, #8 + 8004de2: 2b00 cmp r3, #0 + 8004de4: d009 beq.n 8004dfa { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); - 8005566: 4b12 ldr r3, [pc, #72] @ (80055b0 ) - 8005568: 685b ldr r3, [r3, #4] - 800556a: f423 5260 bic.w r2, r3, #14336 @ 0x3800 - 800556e: 687b ldr r3, [r7, #4] - 8005570: 691b ldr r3, [r3, #16] - 8005572: 00db lsls r3, r3, #3 - 8005574: 490e ldr r1, [pc, #56] @ (80055b0 ) - 8005576: 4313 orrs r3, r2 - 8005578: 604b str r3, [r1, #4] + 8004de6: 4b12 ldr r3, [pc, #72] @ (8004e30 ) + 8004de8: 685b ldr r3, [r3, #4] + 8004dea: f423 5260 bic.w r2, r3, #14336 @ 0x3800 + 8004dee: 687b ldr r3, [r7, #4] + 8004df0: 691b ldr r3, [r3, #16] + 8004df2: 00db lsls r3, r3, #3 + 8004df4: 490e ldr r1, [pc, #56] @ (8004e30 ) + 8004df6: 4313 orrs r3, r2 + 8004df8: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; - 800557a: f000 f821 bl 80055c0 - 800557e: 4602 mov r2, r0 - 8005580: 4b0b ldr r3, [pc, #44] @ (80055b0 ) - 8005582: 685b ldr r3, [r3, #4] - 8005584: 091b lsrs r3, r3, #4 - 8005586: f003 030f and.w r3, r3, #15 - 800558a: 490a ldr r1, [pc, #40] @ (80055b4 ) - 800558c: 5ccb ldrb r3, [r1, r3] - 800558e: fa22 f303 lsr.w r3, r2, r3 - 8005592: 4a09 ldr r2, [pc, #36] @ (80055b8 ) - 8005594: 6013 str r3, [r2, #0] + 8004dfa: f000 f821 bl 8004e40 + 8004dfe: 4602 mov r2, r0 + 8004e00: 4b0b ldr r3, [pc, #44] @ (8004e30 ) + 8004e02: 685b ldr r3, [r3, #4] + 8004e04: 091b lsrs r3, r3, #4 + 8004e06: f003 030f and.w r3, r3, #15 + 8004e0a: 490a ldr r1, [pc, #40] @ (8004e34 ) + 8004e0c: 5ccb ldrb r3, [r1, r3] + 8004e0e: fa22 f303 lsr.w r3, r2, r3 + 8004e12: 4a09 ldr r2, [pc, #36] @ (8004e38 ) + 8004e14: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); - 8005596: 4b09 ldr r3, [pc, #36] @ (80055bc ) - 8005598: 681b ldr r3, [r3, #0] - 800559a: 4618 mov r0, r3 - 800559c: f7fd fc62 bl 8002e64 + 8004e16: 4b09 ldr r3, [pc, #36] @ (8004e3c ) + 8004e18: 681b ldr r3, [r3, #0] + 8004e1a: 4618 mov r0, r3 + 8004e1c: f7fd fe62 bl 8002ae4 return HAL_OK; - 80055a0: 2300 movs r3, #0 + 8004e20: 2300 movs r3, #0 } - 80055a2: 4618 mov r0, r3 - 80055a4: 3710 adds r7, #16 - 80055a6: 46bd mov sp, r7 - 80055a8: bd80 pop {r7, pc} - 80055aa: bf00 nop - 80055ac: 40022000 .word 0x40022000 - 80055b0: 40021000 .word 0x40021000 - 80055b4: 080067e4 .word 0x080067e4 - 80055b8: 20000034 .word 0x20000034 - 80055bc: 20000038 .word 0x20000038 + 8004e22: 4618 mov r0, r3 + 8004e24: 3710 adds r7, #16 + 8004e26: 46bd mov sp, r7 + 8004e28: bd80 pop {r7, pc} + 8004e2a: bf00 nop + 8004e2c: 40022000 .word 0x40022000 + 8004e30: 40021000 .word 0x40021000 + 8004e34: 08006710 .word 0x08006710 + 8004e38: 20000038 .word 0x20000038 + 8004e3c: 2000003c .word 0x2000003c -080055c0 : +08004e40 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 80055c0: b480 push {r7} - 80055c2: b087 sub sp, #28 - 80055c4: af00 add r7, sp, #0 + 8004e40: b480 push {r7} + 8004e42: b087 sub sp, #28 + 8004e44: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; - 80055c6: 2300 movs r3, #0 - 80055c8: 60fb str r3, [r7, #12] - 80055ca: 2300 movs r3, #0 - 80055cc: 60bb str r3, [r7, #8] - 80055ce: 2300 movs r3, #0 - 80055d0: 617b str r3, [r7, #20] - 80055d2: 2300 movs r3, #0 - 80055d4: 607b str r3, [r7, #4] + 8004e46: 2300 movs r3, #0 + 8004e48: 60fb str r3, [r7, #12] + 8004e4a: 2300 movs r3, #0 + 8004e4c: 60bb str r3, [r7, #8] + 8004e4e: 2300 movs r3, #0 + 8004e50: 617b str r3, [r7, #20] + 8004e52: 2300 movs r3, #0 + 8004e54: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; - 80055d6: 2300 movs r3, #0 - 80055d8: 613b str r3, [r7, #16] + 8004e56: 2300 movs r3, #0 + 8004e58: 613b str r3, [r7, #16] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; - 80055da: 4b1e ldr r3, [pc, #120] @ (8005654 ) - 80055dc: 685b ldr r3, [r3, #4] - 80055de: 60fb str r3, [r7, #12] + 8004e5a: 4b1e ldr r3, [pc, #120] @ (8004ed4 ) + 8004e5c: 685b ldr r3, [r3, #4] + 8004e5e: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 80055e0: 68fb ldr r3, [r7, #12] - 80055e2: f003 030c and.w r3, r3, #12 - 80055e6: 2b04 cmp r3, #4 - 80055e8: d002 beq.n 80055f0 - 80055ea: 2b08 cmp r3, #8 - 80055ec: d003 beq.n 80055f6 - 80055ee: e027 b.n 8005640 + 8004e60: 68fb ldr r3, [r7, #12] + 8004e62: f003 030c and.w r3, r3, #12 + 8004e66: 2b04 cmp r3, #4 + 8004e68: d002 beq.n 8004e70 + 8004e6a: 2b08 cmp r3, #8 + 8004e6c: d003 beq.n 8004e76 + 8004e6e: e027 b.n 8004ec0 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 80055f0: 4b19 ldr r3, [pc, #100] @ (8005658 ) - 80055f2: 613b str r3, [r7, #16] + 8004e70: 4b19 ldr r3, [pc, #100] @ (8004ed8 ) + 8004e72: 613b str r3, [r7, #16] break; - 80055f4: e027 b.n 8005646 + 8004e74: e027 b.n 8004ec6 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; - 80055f6: 68fb ldr r3, [r7, #12] - 80055f8: 0c9b lsrs r3, r3, #18 - 80055fa: f003 030f and.w r3, r3, #15 - 80055fe: 4a17 ldr r2, [pc, #92] @ (800565c ) - 8005600: 5cd3 ldrb r3, [r2, r3] - 8005602: 607b str r3, [r7, #4] + 8004e76: 68fb ldr r3, [r7, #12] + 8004e78: 0c9b lsrs r3, r3, #18 + 8004e7a: f003 030f and.w r3, r3, #15 + 8004e7e: 4a17 ldr r2, [pc, #92] @ (8004edc ) + 8004e80: 5cd3 ldrb r3, [r2, r3] + 8004e82: 607b str r3, [r7, #4] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) - 8005604: 68fb ldr r3, [r7, #12] - 8005606: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 800560a: 2b00 cmp r3, #0 - 800560c: d010 beq.n 8005630 + 8004e84: 68fb ldr r3, [r7, #12] + 8004e86: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8004e8a: 2b00 cmp r3, #0 + 8004e8c: d010 beq.n 8004eb0 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; - 800560e: 4b11 ldr r3, [pc, #68] @ (8005654 ) - 8005610: 685b ldr r3, [r3, #4] - 8005612: 0c5b lsrs r3, r3, #17 - 8005614: f003 0301 and.w r3, r3, #1 - 8005618: 4a11 ldr r2, [pc, #68] @ (8005660 ) - 800561a: 5cd3 ldrb r3, [r2, r3] - 800561c: 60bb str r3, [r7, #8] + 8004e8e: 4b11 ldr r3, [pc, #68] @ (8004ed4 ) + 8004e90: 685b ldr r3, [r3, #4] + 8004e92: 0c5b lsrs r3, r3, #17 + 8004e94: f003 0301 and.w r3, r3, #1 + 8004e98: 4a11 ldr r2, [pc, #68] @ (8004ee0 ) + 8004e9a: 5cd3 ldrb r3, [r2, r3] + 8004e9c: 60bb str r3, [r7, #8] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); - 800561e: 687b ldr r3, [r7, #4] - 8005620: 4a0d ldr r2, [pc, #52] @ (8005658 ) - 8005622: fb03 f202 mul.w r2, r3, r2 - 8005626: 68bb ldr r3, [r7, #8] - 8005628: fbb2 f3f3 udiv r3, r2, r3 - 800562c: 617b str r3, [r7, #20] - 800562e: e004 b.n 800563a + 8004e9e: 687b ldr r3, [r7, #4] + 8004ea0: 4a0d ldr r2, [pc, #52] @ (8004ed8 ) + 8004ea2: fb03 f202 mul.w r2, r3, r2 + 8004ea6: 68bb ldr r3, [r7, #8] + 8004ea8: fbb2 f3f3 udiv r3, r2, r3 + 8004eac: 617b str r3, [r7, #20] + 8004eae: e004 b.n 8004eba #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); - 8005630: 687b ldr r3, [r7, #4] - 8005632: 4a0c ldr r2, [pc, #48] @ (8005664 ) - 8005634: fb02 f303 mul.w r3, r2, r3 - 8005638: 617b str r3, [r7, #20] + 8004eb0: 687b ldr r3, [r7, #4] + 8004eb2: 4a0c ldr r2, [pc, #48] @ (8004ee4 ) + 8004eb4: fb02 f303 mul.w r3, r2, r3 + 8004eb8: 617b str r3, [r7, #20] } sysclockfreq = pllclk; - 800563a: 697b ldr r3, [r7, #20] - 800563c: 613b str r3, [r7, #16] + 8004eba: 697b ldr r3, [r7, #20] + 8004ebc: 613b str r3, [r7, #16] break; - 800563e: e002 b.n 8005646 + 8004ebe: e002 b.n 8004ec6 } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; - 8005640: 4b09 ldr r3, [pc, #36] @ (8005668 ) - 8005642: 613b str r3, [r7, #16] + 8004ec0: 4b09 ldr r3, [pc, #36] @ (8004ee8 ) + 8004ec2: 613b str r3, [r7, #16] break; - 8005644: bf00 nop + 8004ec4: bf00 nop } } return sysclockfreq; - 8005646: 693b ldr r3, [r7, #16] + 8004ec6: 693b ldr r3, [r7, #16] } - 8005648: 4618 mov r0, r3 - 800564a: 371c adds r7, #28 - 800564c: 46bd mov sp, r7 - 800564e: bc80 pop {r7} - 8005650: 4770 bx lr - 8005652: bf00 nop - 8005654: 40021000 .word 0x40021000 - 8005658: 00b71b00 .word 0x00b71b00 - 800565c: 080067fc .word 0x080067fc - 8005660: 0800680c .word 0x0800680c - 8005664: 003d0900 .word 0x003d0900 - 8005668: 007a1200 .word 0x007a1200 + 8004ec8: 4618 mov r0, r3 + 8004eca: 371c adds r7, #28 + 8004ecc: 46bd mov sp, r7 + 8004ece: bc80 pop {r7} + 8004ed0: 4770 bx lr + 8004ed2: bf00 nop + 8004ed4: 40021000 .word 0x40021000 + 8004ed8: 00b71b00 .word 0x00b71b00 + 8004edc: 08006728 .word 0x08006728 + 8004ee0: 08006738 .word 0x08006738 + 8004ee4: 003d0900 .word 0x003d0900 + 8004ee8: 007a1200 .word 0x007a1200 -0800566c : +08004eec : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 800566c: b480 push {r7} - 800566e: af00 add r7, sp, #0 + 8004eec: b480 push {r7} + 8004eee: af00 add r7, sp, #0 return SystemCoreClock; - 8005670: 4b02 ldr r3, [pc, #8] @ (800567c ) - 8005672: 681b ldr r3, [r3, #0] + 8004ef0: 4b02 ldr r3, [pc, #8] @ (8004efc ) + 8004ef2: 681b ldr r3, [r3, #0] } - 8005674: 4618 mov r0, r3 - 8005676: 46bd mov sp, r7 - 8005678: bc80 pop {r7} - 800567a: 4770 bx lr - 800567c: 20000034 .word 0x20000034 + 8004ef4: 4618 mov r0, r3 + 8004ef6: 46bd mov sp, r7 + 8004ef8: bc80 pop {r7} + 8004efa: 4770 bx lr + 8004efc: 20000038 .word 0x20000038 -08005680 : +08004f00 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 8005680: b580 push {r7, lr} - 8005682: af00 add r7, sp, #0 + 8004f00: b580 push {r7, lr} + 8004f02: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); - 8005684: f7ff fff2 bl 800566c - 8005688: 4602 mov r2, r0 - 800568a: 4b05 ldr r3, [pc, #20] @ (80056a0 ) - 800568c: 685b ldr r3, [r3, #4] - 800568e: 0a1b lsrs r3, r3, #8 - 8005690: f003 0307 and.w r3, r3, #7 - 8005694: 4903 ldr r1, [pc, #12] @ (80056a4 ) - 8005696: 5ccb ldrb r3, [r1, r3] - 8005698: fa22 f303 lsr.w r3, r2, r3 + 8004f04: f7ff fff2 bl 8004eec + 8004f08: 4602 mov r2, r0 + 8004f0a: 4b05 ldr r3, [pc, #20] @ (8004f20 ) + 8004f0c: 685b ldr r3, [r3, #4] + 8004f0e: 0a1b lsrs r3, r3, #8 + 8004f10: f003 0307 and.w r3, r3, #7 + 8004f14: 4903 ldr r1, [pc, #12] @ (8004f24 ) + 8004f16: 5ccb ldrb r3, [r1, r3] + 8004f18: fa22 f303 lsr.w r3, r2, r3 } - 800569c: 4618 mov r0, r3 - 800569e: bd80 pop {r7, pc} - 80056a0: 40021000 .word 0x40021000 - 80056a4: 080067f4 .word 0x080067f4 + 8004f1c: 4618 mov r0, r3 + 8004f1e: bd80 pop {r7, pc} + 8004f20: 40021000 .word 0x40021000 + 8004f24: 08006720 .word 0x08006720 -080056a8 : +08004f28 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 80056a8: b580 push {r7, lr} - 80056aa: af00 add r7, sp, #0 + 8004f28: b580 push {r7, lr} + 8004f2a: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); - 80056ac: f7ff ffde bl 800566c - 80056b0: 4602 mov r2, r0 - 80056b2: 4b05 ldr r3, [pc, #20] @ (80056c8 ) - 80056b4: 685b ldr r3, [r3, #4] - 80056b6: 0adb lsrs r3, r3, #11 - 80056b8: f003 0307 and.w r3, r3, #7 - 80056bc: 4903 ldr r1, [pc, #12] @ (80056cc ) - 80056be: 5ccb ldrb r3, [r1, r3] - 80056c0: fa22 f303 lsr.w r3, r2, r3 + 8004f2c: f7ff ffde bl 8004eec + 8004f30: 4602 mov r2, r0 + 8004f32: 4b05 ldr r3, [pc, #20] @ (8004f48 ) + 8004f34: 685b ldr r3, [r3, #4] + 8004f36: 0adb lsrs r3, r3, #11 + 8004f38: f003 0307 and.w r3, r3, #7 + 8004f3c: 4903 ldr r1, [pc, #12] @ (8004f4c ) + 8004f3e: 5ccb ldrb r3, [r1, r3] + 8004f40: fa22 f303 lsr.w r3, r2, r3 } - 80056c4: 4618 mov r0, r3 - 80056c6: bd80 pop {r7, pc} - 80056c8: 40021000 .word 0x40021000 - 80056cc: 080067f4 .word 0x080067f4 + 8004f44: 4618 mov r0, r3 + 8004f46: bd80 pop {r7, pc} + 8004f48: 40021000 .word 0x40021000 + 8004f4c: 08006720 .word 0x08006720 -080056d0 : +08004f50 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { - 80056d0: b480 push {r7} - 80056d2: b085 sub sp, #20 - 80056d4: af00 add r7, sp, #0 - 80056d6: 6078 str r0, [r7, #4] + 8004f50: b480 push {r7} + 8004f52: b085 sub sp, #20 + 8004f54: af00 add r7, sp, #0 + 8004f56: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); - 80056d8: 4b0a ldr r3, [pc, #40] @ (8005704 ) - 80056da: 681b ldr r3, [r3, #0] - 80056dc: 4a0a ldr r2, [pc, #40] @ (8005708 ) - 80056de: fba2 2303 umull r2, r3, r2, r3 - 80056e2: 0a5b lsrs r3, r3, #9 - 80056e4: 687a ldr r2, [r7, #4] - 80056e6: fb02 f303 mul.w r3, r2, r3 - 80056ea: 60fb str r3, [r7, #12] + 8004f58: 4b0a ldr r3, [pc, #40] @ (8004f84 ) + 8004f5a: 681b ldr r3, [r3, #0] + 8004f5c: 4a0a ldr r2, [pc, #40] @ (8004f88 ) + 8004f5e: fba2 2303 umull r2, r3, r2, r3 + 8004f62: 0a5b lsrs r3, r3, #9 + 8004f64: 687a ldr r2, [r7, #4] + 8004f66: fb02 f303 mul.w r3, r2, r3 + 8004f6a: 60fb str r3, [r7, #12] do { __NOP(); - 80056ec: bf00 nop + 8004f6c: bf00 nop } while (Delay --); - 80056ee: 68fb ldr r3, [r7, #12] - 80056f0: 1e5a subs r2, r3, #1 - 80056f2: 60fa str r2, [r7, #12] - 80056f4: 2b00 cmp r3, #0 - 80056f6: d1f9 bne.n 80056ec + 8004f6e: 68fb ldr r3, [r7, #12] + 8004f70: 1e5a subs r2, r3, #1 + 8004f72: 60fa str r2, [r7, #12] + 8004f74: 2b00 cmp r3, #0 + 8004f76: d1f9 bne.n 8004f6c } - 80056f8: bf00 nop - 80056fa: bf00 nop - 80056fc: 3714 adds r7, #20 - 80056fe: 46bd mov sp, r7 - 8005700: bc80 pop {r7} - 8005702: 4770 bx lr - 8005704: 20000034 .word 0x20000034 - 8005708: 10624dd3 .word 0x10624dd3 + 8004f78: bf00 nop + 8004f7a: bf00 nop + 8004f7c: 3714 adds r7, #20 + 8004f7e: 46bd mov sp, r7 + 8004f80: bc80 pop {r7} + 8004f82: 4770 bx lr + 8004f84: 20000038 .word 0x20000038 + 8004f88: 10624dd3 .word 0x10624dd3 -0800570c : +08004f8c : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 800570c: b580 push {r7, lr} - 800570e: b086 sub sp, #24 - 8005710: af00 add r7, sp, #0 - 8005712: 6078 str r0, [r7, #4] + 8004f8c: b580 push {r7, lr} + 8004f8e: b086 sub sp, #24 + 8004f90: af00 add r7, sp, #0 + 8004f92: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; - 8005714: 2300 movs r3, #0 - 8005716: 613b str r3, [r7, #16] - 8005718: 2300 movs r3, #0 - 800571a: 60fb str r3, [r7, #12] + 8004f94: 2300 movs r3, #0 + 8004f96: 613b str r3, [r7, #16] + 8004f98: 2300 movs r3, #0 + 8004f9a: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) - 800571c: 687b ldr r3, [r7, #4] - 800571e: 681b ldr r3, [r3, #0] - 8005720: f003 0301 and.w r3, r3, #1 - 8005724: 2b00 cmp r3, #0 - 8005726: d07d beq.n 8005824 + 8004f9c: 687b ldr r3, [r7, #4] + 8004f9e: 681b ldr r3, [r3, #0] + 8004fa0: f003 0301 and.w r3, r3, #1 + 8004fa4: 2b00 cmp r3, #0 + 8004fa6: d07d beq.n 80050a4 { FlagStatus pwrclkchanged = RESET; - 8005728: 2300 movs r3, #0 - 800572a: 75fb strb r3, [r7, #23] + 8004fa8: 2300 movs r3, #0 + 8004faa: 75fb strb r3, [r7, #23] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 800572c: 4b4f ldr r3, [pc, #316] @ (800586c ) - 800572e: 69db ldr r3, [r3, #28] - 8005730: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8005734: 2b00 cmp r3, #0 - 8005736: d10d bne.n 8005754 + 8004fac: 4b4f ldr r3, [pc, #316] @ (80050ec ) + 8004fae: 69db ldr r3, [r3, #28] + 8004fb0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8004fb4: 2b00 cmp r3, #0 + 8004fb6: d10d bne.n 8004fd4 { __HAL_RCC_PWR_CLK_ENABLE(); - 8005738: 4b4c ldr r3, [pc, #304] @ (800586c ) - 800573a: 69db ldr r3, [r3, #28] - 800573c: 4a4b ldr r2, [pc, #300] @ (800586c ) - 800573e: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8005742: 61d3 str r3, [r2, #28] - 8005744: 4b49 ldr r3, [pc, #292] @ (800586c ) - 8005746: 69db ldr r3, [r3, #28] - 8005748: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 800574c: 60bb str r3, [r7, #8] - 800574e: 68bb ldr r3, [r7, #8] + 8004fb8: 4b4c ldr r3, [pc, #304] @ (80050ec ) + 8004fba: 69db ldr r3, [r3, #28] + 8004fbc: 4a4b ldr r2, [pc, #300] @ (80050ec ) + 8004fbe: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8004fc2: 61d3 str r3, [r2, #28] + 8004fc4: 4b49 ldr r3, [pc, #292] @ (80050ec ) + 8004fc6: 69db ldr r3, [r3, #28] + 8004fc8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8004fcc: 60bb str r3, [r7, #8] + 8004fce: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 8005750: 2301 movs r3, #1 - 8005752: 75fb strb r3, [r7, #23] + 8004fd0: 2301 movs r3, #1 + 8004fd2: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8005754: 4b46 ldr r3, [pc, #280] @ (8005870 ) - 8005756: 681b ldr r3, [r3, #0] - 8005758: f403 7380 and.w r3, r3, #256 @ 0x100 - 800575c: 2b00 cmp r3, #0 - 800575e: d118 bne.n 8005792 + 8004fd4: 4b46 ldr r3, [pc, #280] @ (80050f0 ) + 8004fd6: 681b ldr r3, [r3, #0] + 8004fd8: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004fdc: 2b00 cmp r3, #0 + 8004fde: d118 bne.n 8005012 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 8005760: 4b43 ldr r3, [pc, #268] @ (8005870 ) - 8005762: 681b ldr r3, [r3, #0] - 8005764: 4a42 ldr r2, [pc, #264] @ (8005870 ) - 8005766: f443 7380 orr.w r3, r3, #256 @ 0x100 - 800576a: 6013 str r3, [r2, #0] + 8004fe0: 4b43 ldr r3, [pc, #268] @ (80050f0 ) + 8004fe2: 681b ldr r3, [r3, #0] + 8004fe4: 4a42 ldr r2, [pc, #264] @ (80050f0 ) + 8004fe6: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8004fea: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 800576c: f7fd fbbc bl 8002ee8 - 8005770: 6138 str r0, [r7, #16] + 8004fec: f7fd fdbc bl 8002b68 + 8004ff0: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8005772: e008 b.n 8005786 + 8004ff2: e008 b.n 8005006 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8005774: f7fd fbb8 bl 8002ee8 - 8005778: 4602 mov r2, r0 - 800577a: 693b ldr r3, [r7, #16] - 800577c: 1ad3 subs r3, r2, r3 - 800577e: 2b64 cmp r3, #100 @ 0x64 - 8005780: d901 bls.n 8005786 + 8004ff4: f7fd fdb8 bl 8002b68 + 8004ff8: 4602 mov r2, r0 + 8004ffa: 693b ldr r3, [r7, #16] + 8004ffc: 1ad3 subs r3, r2, r3 + 8004ffe: 2b64 cmp r3, #100 @ 0x64 + 8005000: d901 bls.n 8005006 { return HAL_TIMEOUT; - 8005782: 2303 movs r3, #3 - 8005784: e06d b.n 8005862 + 8005002: 2303 movs r3, #3 + 8005004: e06d b.n 80050e2 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8005786: 4b3a ldr r3, [pc, #232] @ (8005870 ) - 8005788: 681b ldr r3, [r3, #0] - 800578a: f403 7380 and.w r3, r3, #256 @ 0x100 - 800578e: 2b00 cmp r3, #0 - 8005790: d0f0 beq.n 8005774 + 8005006: 4b3a ldr r3, [pc, #232] @ (80050f0 ) + 8005008: 681b ldr r3, [r3, #0] + 800500a: f403 7380 and.w r3, r3, #256 @ 0x100 + 800500e: 2b00 cmp r3, #0 + 8005010: d0f0 beq.n 8004ff4 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); - 8005792: 4b36 ldr r3, [pc, #216] @ (800586c ) - 8005794: 6a1b ldr r3, [r3, #32] - 8005796: f403 7340 and.w r3, r3, #768 @ 0x300 - 800579a: 60fb str r3, [r7, #12] + 8005012: 4b36 ldr r3, [pc, #216] @ (80050ec ) + 8005014: 6a1b ldr r3, [r3, #32] + 8005016: f403 7340 and.w r3, r3, #768 @ 0x300 + 800501a: 60fb str r3, [r7, #12] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) - 800579c: 68fb ldr r3, [r7, #12] - 800579e: 2b00 cmp r3, #0 - 80057a0: d02e beq.n 8005800 - 80057a2: 687b ldr r3, [r7, #4] - 80057a4: 685b ldr r3, [r3, #4] - 80057a6: f403 7340 and.w r3, r3, #768 @ 0x300 - 80057aa: 68fa ldr r2, [r7, #12] - 80057ac: 429a cmp r2, r3 - 80057ae: d027 beq.n 8005800 + 800501c: 68fb ldr r3, [r7, #12] + 800501e: 2b00 cmp r3, #0 + 8005020: d02e beq.n 8005080 + 8005022: 687b ldr r3, [r7, #4] + 8005024: 685b ldr r3, [r3, #4] + 8005026: f403 7340 and.w r3, r3, #768 @ 0x300 + 800502a: 68fa ldr r2, [r7, #12] + 800502c: 429a cmp r2, r3 + 800502e: d027 beq.n 8005080 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); - 80057b0: 4b2e ldr r3, [pc, #184] @ (800586c ) - 80057b2: 6a1b ldr r3, [r3, #32] - 80057b4: f423 7340 bic.w r3, r3, #768 @ 0x300 - 80057b8: 60fb str r3, [r7, #12] + 8005030: 4b2e ldr r3, [pc, #184] @ (80050ec ) + 8005032: 6a1b ldr r3, [r3, #32] + 8005034: f423 7340 bic.w r3, r3, #768 @ 0x300 + 8005038: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); - 80057ba: 4b2e ldr r3, [pc, #184] @ (8005874 ) - 80057bc: 2201 movs r2, #1 - 80057be: 601a str r2, [r3, #0] + 800503a: 4b2e ldr r3, [pc, #184] @ (80050f4 ) + 800503c: 2201 movs r2, #1 + 800503e: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); - 80057c0: 4b2c ldr r3, [pc, #176] @ (8005874 ) - 80057c2: 2200 movs r2, #0 - 80057c4: 601a str r2, [r3, #0] + 8005040: 4b2c ldr r3, [pc, #176] @ (80050f4 ) + 8005042: 2200 movs r2, #0 + 8005044: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; - 80057c6: 4a29 ldr r2, [pc, #164] @ (800586c ) - 80057c8: 68fb ldr r3, [r7, #12] - 80057ca: 6213 str r3, [r2, #32] + 8005046: 4a29 ldr r2, [pc, #164] @ (80050ec ) + 8005048: 68fb ldr r3, [r7, #12] + 800504a: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) - 80057cc: 68fb ldr r3, [r7, #12] - 80057ce: f003 0301 and.w r3, r3, #1 - 80057d2: 2b00 cmp r3, #0 - 80057d4: d014 beq.n 8005800 + 800504c: 68fb ldr r3, [r7, #12] + 800504e: f003 0301 and.w r3, r3, #1 + 8005052: 2b00 cmp r3, #0 + 8005054: d014 beq.n 8005080 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80057d6: f7fd fb87 bl 8002ee8 - 80057da: 6138 str r0, [r7, #16] + 8005056: f7fd fd87 bl 8002b68 + 800505a: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 80057dc: e00a b.n 80057f4 + 800505c: e00a b.n 8005074 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 80057de: f7fd fb83 bl 8002ee8 - 80057e2: 4602 mov r2, r0 - 80057e4: 693b ldr r3, [r7, #16] - 80057e6: 1ad3 subs r3, r2, r3 - 80057e8: f241 3288 movw r2, #5000 @ 0x1388 - 80057ec: 4293 cmp r3, r2 - 80057ee: d901 bls.n 80057f4 + 800505e: f7fd fd83 bl 8002b68 + 8005062: 4602 mov r2, r0 + 8005064: 693b ldr r3, [r7, #16] + 8005066: 1ad3 subs r3, r2, r3 + 8005068: f241 3288 movw r2, #5000 @ 0x1388 + 800506c: 4293 cmp r3, r2 + 800506e: d901 bls.n 8005074 { return HAL_TIMEOUT; - 80057f0: 2303 movs r3, #3 - 80057f2: e036 b.n 8005862 + 8005070: 2303 movs r3, #3 + 8005072: e036 b.n 80050e2 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 80057f4: 4b1d ldr r3, [pc, #116] @ (800586c ) - 80057f6: 6a1b ldr r3, [r3, #32] - 80057f8: f003 0302 and.w r3, r3, #2 - 80057fc: 2b00 cmp r3, #0 - 80057fe: d0ee beq.n 80057de + 8005074: 4b1d ldr r3, [pc, #116] @ (80050ec ) + 8005076: 6a1b ldr r3, [r3, #32] + 8005078: f003 0302 and.w r3, r3, #2 + 800507c: 2b00 cmp r3, #0 + 800507e: d0ee beq.n 800505e } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 8005800: 4b1a ldr r3, [pc, #104] @ (800586c ) - 8005802: 6a1b ldr r3, [r3, #32] - 8005804: f423 7240 bic.w r2, r3, #768 @ 0x300 - 8005808: 687b ldr r3, [r7, #4] - 800580a: 685b ldr r3, [r3, #4] - 800580c: 4917 ldr r1, [pc, #92] @ (800586c ) - 800580e: 4313 orrs r3, r2 - 8005810: 620b str r3, [r1, #32] + 8005080: 4b1a ldr r3, [pc, #104] @ (80050ec ) + 8005082: 6a1b ldr r3, [r3, #32] + 8005084: f423 7240 bic.w r2, r3, #768 @ 0x300 + 8005088: 687b ldr r3, [r7, #4] + 800508a: 685b ldr r3, [r3, #4] + 800508c: 4917 ldr r1, [pc, #92] @ (80050ec ) + 800508e: 4313 orrs r3, r2 + 8005090: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) - 8005812: 7dfb ldrb r3, [r7, #23] - 8005814: 2b01 cmp r3, #1 - 8005816: d105 bne.n 8005824 + 8005092: 7dfb ldrb r3, [r7, #23] + 8005094: 2b01 cmp r3, #1 + 8005096: d105 bne.n 80050a4 { __HAL_RCC_PWR_CLK_DISABLE(); - 8005818: 4b14 ldr r3, [pc, #80] @ (800586c ) - 800581a: 69db ldr r3, [r3, #28] - 800581c: 4a13 ldr r2, [pc, #76] @ (800586c ) - 800581e: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 8005822: 61d3 str r3, [r2, #28] + 8005098: 4b14 ldr r3, [pc, #80] @ (80050ec ) + 800509a: 69db ldr r3, [r3, #28] + 800509c: 4a13 ldr r2, [pc, #76] @ (80050ec ) + 800509e: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 80050a2: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - 8005824: 687b ldr r3, [r7, #4] - 8005826: 681b ldr r3, [r3, #0] - 8005828: f003 0302 and.w r3, r3, #2 - 800582c: 2b00 cmp r3, #0 - 800582e: d008 beq.n 8005842 + 80050a4: 687b ldr r3, [r7, #4] + 80050a6: 681b ldr r3, [r3, #0] + 80050a8: f003 0302 and.w r3, r3, #2 + 80050ac: 2b00 cmp r3, #0 + 80050ae: d008 beq.n 80050c2 { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - 8005830: 4b0e ldr r3, [pc, #56] @ (800586c ) - 8005832: 685b ldr r3, [r3, #4] - 8005834: f423 4240 bic.w r2, r3, #49152 @ 0xc000 - 8005838: 687b ldr r3, [r7, #4] - 800583a: 689b ldr r3, [r3, #8] - 800583c: 490b ldr r1, [pc, #44] @ (800586c ) - 800583e: 4313 orrs r3, r2 - 8005840: 604b str r3, [r1, #4] + 80050b0: 4b0e ldr r3, [pc, #56] @ (80050ec ) + 80050b2: 685b ldr r3, [r3, #4] + 80050b4: f423 4240 bic.w r2, r3, #49152 @ 0xc000 + 80050b8: 687b ldr r3, [r7, #4] + 80050ba: 689b ldr r3, [r3, #8] + 80050bc: 490b ldr r1, [pc, #44] @ (80050ec ) + 80050be: 4313 orrs r3, r2 + 80050c0: 604b str r3, [r1, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) - 8005842: 687b ldr r3, [r7, #4] - 8005844: 681b ldr r3, [r3, #0] - 8005846: f003 0310 and.w r3, r3, #16 - 800584a: 2b00 cmp r3, #0 - 800584c: d008 beq.n 8005860 + 80050c2: 687b ldr r3, [r7, #4] + 80050c4: 681b ldr r3, [r3, #0] + 80050c6: f003 0310 and.w r3, r3, #16 + 80050ca: 2b00 cmp r3, #0 + 80050cc: d008 beq.n 80050e0 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); - 800584e: 4b07 ldr r3, [pc, #28] @ (800586c ) - 8005850: 685b ldr r3, [r3, #4] - 8005852: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 - 8005856: 687b ldr r3, [r7, #4] - 8005858: 68db ldr r3, [r3, #12] - 800585a: 4904 ldr r1, [pc, #16] @ (800586c ) - 800585c: 4313 orrs r3, r2 - 800585e: 604b str r3, [r1, #4] + 80050ce: 4b07 ldr r3, [pc, #28] @ (80050ec ) + 80050d0: 685b ldr r3, [r3, #4] + 80050d2: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 + 80050d6: 687b ldr r3, [r7, #4] + 80050d8: 68db ldr r3, [r3, #12] + 80050da: 4904 ldr r1, [pc, #16] @ (80050ec ) + 80050dc: 4313 orrs r3, r2 + 80050de: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; - 8005860: 2300 movs r3, #0 + 80050e0: 2300 movs r3, #0 } - 8005862: 4618 mov r0, r3 - 8005864: 3718 adds r7, #24 - 8005866: 46bd mov sp, r7 - 8005868: bd80 pop {r7, pc} - 800586a: bf00 nop - 800586c: 40021000 .word 0x40021000 - 8005870: 40007000 .word 0x40007000 - 8005874: 42420440 .word 0x42420440 + 80050e2: 4618 mov r0, r3 + 80050e4: 3718 adds r7, #24 + 80050e6: 46bd mov sp, r7 + 80050e8: bd80 pop {r7, pc} + 80050ea: bf00 nop + 80050ec: 40021000 .word 0x40021000 + 80050f0: 40007000 .word 0x40007000 + 80050f4: 42420440 .word 0x42420440 -08005878 : +080050f8 : + * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() + * @param htim TIM Base handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) +{ + 80050f8: b580 push {r7, lr} + 80050fa: b082 sub sp, #8 + 80050fc: af00 add r7, sp, #0 + 80050fe: 6078 str r0, [r7, #4] + /* Check the TIM handle allocation */ + if (htim == NULL) + 8005100: 687b ldr r3, [r7, #4] + 8005102: 2b00 cmp r3, #0 + 8005104: d101 bne.n 800510a + { + return HAL_ERROR; + 8005106: 2301 movs r3, #1 + 8005108: e041 b.n 800518e + assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); + assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); + assert_param(IS_TIM_PERIOD(htim->Init.Period)); + assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); + + if (htim->State == HAL_TIM_STATE_RESET) + 800510a: 687b ldr r3, [r7, #4] + 800510c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8005110: b2db uxtb r3, r3 + 8005112: 2b00 cmp r3, #0 + 8005114: d106 bne.n 8005124 + { + /* Allocate lock resource and initialize it */ + htim->Lock = HAL_UNLOCKED; + 8005116: 687b ldr r3, [r7, #4] + 8005118: 2200 movs r2, #0 + 800511a: f883 203c strb.w r2, [r3, #60] @ 0x3c + } + /* Init the low level hardware : GPIO, CLOCK, NVIC */ + htim->Base_MspInitCallback(htim); +#else + /* Init the low level hardware : GPIO, CLOCK, NVIC */ + HAL_TIM_Base_MspInit(htim); + 800511e: 6878 ldr r0, [r7, #4] + 8005120: f7fd fc00 bl 8002924 +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + + /* Set the TIM state */ + htim->State = HAL_TIM_STATE_BUSY; + 8005124: 687b ldr r3, [r7, #4] + 8005126: 2202 movs r2, #2 + 8005128: f883 203d strb.w r2, [r3, #61] @ 0x3d + + /* Set the Time Base configuration */ + TIM_Base_SetConfig(htim->Instance, &htim->Init); + 800512c: 687b ldr r3, [r7, #4] + 800512e: 681a ldr r2, [r3, #0] + 8005130: 687b ldr r3, [r7, #4] + 8005132: 3304 adds r3, #4 + 8005134: 4619 mov r1, r3 + 8005136: 4610 mov r0, r2 + 8005138: f000 fa5c bl 80055f4 + + /* Initialize the DMA burst operation state */ + htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + 800513c: 687b ldr r3, [r7, #4] + 800513e: 2201 movs r2, #1 + 8005140: f883 2046 strb.w r2, [r3, #70] @ 0x46 + + /* Initialize the TIM channels state */ + TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 8005144: 687b ldr r3, [r7, #4] + 8005146: 2201 movs r2, #1 + 8005148: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800514c: 687b ldr r3, [r7, #4] + 800514e: 2201 movs r2, #1 + 8005150: f883 203f strb.w r2, [r3, #63] @ 0x3f + 8005154: 687b ldr r3, [r7, #4] + 8005156: 2201 movs r2, #1 + 8005158: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 800515c: 687b ldr r3, [r7, #4] + 800515e: 2201 movs r2, #1 + 8005160: f883 2041 strb.w r2, [r3, #65] @ 0x41 + TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); + 8005164: 687b ldr r3, [r7, #4] + 8005166: 2201 movs r2, #1 + 8005168: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 800516c: 687b ldr r3, [r7, #4] + 800516e: 2201 movs r2, #1 + 8005170: f883 2043 strb.w r2, [r3, #67] @ 0x43 + 8005174: 687b ldr r3, [r7, #4] + 8005176: 2201 movs r2, #1 + 8005178: f883 2044 strb.w r2, [r3, #68] @ 0x44 + 800517c: 687b ldr r3, [r7, #4] + 800517e: 2201 movs r2, #1 + 8005180: f883 2045 strb.w r2, [r3, #69] @ 0x45 + + /* Initialize the TIM state*/ + htim->State = HAL_TIM_STATE_READY; + 8005184: 687b ldr r3, [r7, #4] + 8005186: 2201 movs r2, #1 + 8005188: f883 203d strb.w r2, [r3, #61] @ 0x3d + + return HAL_OK; + 800518c: 2300 movs r3, #0 +} + 800518e: 4618 mov r0, r3 + 8005190: 3708 adds r7, #8 + 8005192: 46bd mov sp, r7 + 8005194: bd80 pop {r7, pc} + ... + +08005198 : + * @brief Starts the TIM Base generation in interrupt mode. + * @param htim TIM Base handle + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) +{ + 8005198: b480 push {r7} + 800519a: b085 sub sp, #20 + 800519c: af00 add r7, sp, #0 + 800519e: 6078 str r0, [r7, #4] + + /* Check the parameters */ + assert_param(IS_TIM_INSTANCE(htim->Instance)); + + /* Check the TIM state */ + if (htim->State != HAL_TIM_STATE_READY) + 80051a0: 687b ldr r3, [r7, #4] + 80051a2: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 80051a6: b2db uxtb r3, r3 + 80051a8: 2b01 cmp r3, #1 + 80051aa: d001 beq.n 80051b0 + { + return HAL_ERROR; + 80051ac: 2301 movs r3, #1 + 80051ae: e03a b.n 8005226 + } + + /* Set the TIM state */ + htim->State = HAL_TIM_STATE_BUSY; + 80051b0: 687b ldr r3, [r7, #4] + 80051b2: 2202 movs r2, #2 + 80051b4: f883 203d strb.w r2, [r3, #61] @ 0x3d + + /* Enable the TIM Update interrupt */ + __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); + 80051b8: 687b ldr r3, [r7, #4] + 80051ba: 681b ldr r3, [r3, #0] + 80051bc: 68da ldr r2, [r3, #12] + 80051be: 687b ldr r3, [r7, #4] + 80051c0: 681b ldr r3, [r3, #0] + 80051c2: f042 0201 orr.w r2, r2, #1 + 80051c6: 60da str r2, [r3, #12] + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 80051c8: 687b ldr r3, [r7, #4] + 80051ca: 681b ldr r3, [r3, #0] + 80051cc: 4a18 ldr r2, [pc, #96] @ (8005230 ) + 80051ce: 4293 cmp r3, r2 + 80051d0: d00e beq.n 80051f0 + 80051d2: 687b ldr r3, [r7, #4] + 80051d4: 681b ldr r3, [r3, #0] + 80051d6: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 80051da: d009 beq.n 80051f0 + 80051dc: 687b ldr r3, [r7, #4] + 80051de: 681b ldr r3, [r3, #0] + 80051e0: 4a14 ldr r2, [pc, #80] @ (8005234 ) + 80051e2: 4293 cmp r3, r2 + 80051e4: d004 beq.n 80051f0 + 80051e6: 687b ldr r3, [r7, #4] + 80051e8: 681b ldr r3, [r3, #0] + 80051ea: 4a13 ldr r2, [pc, #76] @ (8005238 ) + 80051ec: 4293 cmp r3, r2 + 80051ee: d111 bne.n 8005214 + { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + 80051f0: 687b ldr r3, [r7, #4] + 80051f2: 681b ldr r3, [r3, #0] + 80051f4: 689b ldr r3, [r3, #8] + 80051f6: f003 0307 and.w r3, r3, #7 + 80051fa: 60fb str r3, [r7, #12] + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 80051fc: 68fb ldr r3, [r7, #12] + 80051fe: 2b06 cmp r3, #6 + 8005200: d010 beq.n 8005224 + { + __HAL_TIM_ENABLE(htim); + 8005202: 687b ldr r3, [r7, #4] + 8005204: 681b ldr r3, [r3, #0] + 8005206: 681a ldr r2, [r3, #0] + 8005208: 687b ldr r3, [r7, #4] + 800520a: 681b ldr r3, [r3, #0] + 800520c: f042 0201 orr.w r2, r2, #1 + 8005210: 601a str r2, [r3, #0] + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + 8005212: e007 b.n 8005224 + } + } + else + { + __HAL_TIM_ENABLE(htim); + 8005214: 687b ldr r3, [r7, #4] + 8005216: 681b ldr r3, [r3, #0] + 8005218: 681a ldr r2, [r3, #0] + 800521a: 687b ldr r3, [r7, #4] + 800521c: 681b ldr r3, [r3, #0] + 800521e: f042 0201 orr.w r2, r2, #1 + 8005222: 601a str r2, [r3, #0] + } + + /* Return function status */ + return HAL_OK; + 8005224: 2300 movs r3, #0 +} + 8005226: 4618 mov r0, r3 + 8005228: 3714 adds r7, #20 + 800522a: 46bd mov sp, r7 + 800522c: bc80 pop {r7} + 800522e: 4770 bx lr + 8005230: 40012c00 .word 0x40012c00 + 8005234: 40000400 .word 0x40000400 + 8005238: 40000800 .word 0x40000800 + +0800523c : + * @brief This function handles TIM interrupts requests. + * @param htim TIM handle + * @retval None + */ +void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) +{ + 800523c: b580 push {r7, lr} + 800523e: b084 sub sp, #16 + 8005240: af00 add r7, sp, #0 + 8005242: 6078 str r0, [r7, #4] + uint32_t itsource = htim->Instance->DIER; + 8005244: 687b ldr r3, [r7, #4] + 8005246: 681b ldr r3, [r3, #0] + 8005248: 68db ldr r3, [r3, #12] + 800524a: 60fb str r3, [r7, #12] + uint32_t itflag = htim->Instance->SR; + 800524c: 687b ldr r3, [r7, #4] + 800524e: 681b ldr r3, [r3, #0] + 8005250: 691b ldr r3, [r3, #16] + 8005252: 60bb str r3, [r7, #8] + + /* Capture compare 1 event */ + if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) + 8005254: 68bb ldr r3, [r7, #8] + 8005256: f003 0302 and.w r3, r3, #2 + 800525a: 2b00 cmp r3, #0 + 800525c: d020 beq.n 80052a0 + { + if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) + 800525e: 68fb ldr r3, [r7, #12] + 8005260: f003 0302 and.w r3, r3, #2 + 8005264: 2b00 cmp r3, #0 + 8005266: d01b beq.n 80052a0 + { + { + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); + 8005268: 687b ldr r3, [r7, #4] + 800526a: 681b ldr r3, [r3, #0] + 800526c: f06f 0202 mvn.w r2, #2 + 8005270: 611a str r2, [r3, #16] + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; + 8005272: 687b ldr r3, [r7, #4] + 8005274: 2201 movs r2, #1 + 8005276: 771a strb r2, [r3, #28] + + /* Input capture event */ + if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) + 8005278: 687b ldr r3, [r7, #4] + 800527a: 681b ldr r3, [r3, #0] + 800527c: 699b ldr r3, [r3, #24] + 800527e: f003 0303 and.w r3, r3, #3 + 8005282: 2b00 cmp r3, #0 + 8005284: d003 beq.n 800528e + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->IC_CaptureCallback(htim); +#else + HAL_TIM_IC_CaptureCallback(htim); + 8005286: 6878 ldr r0, [r7, #4] + 8005288: f000 f998 bl 80055bc + 800528c: e005 b.n 800529a + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->OC_DelayElapsedCallback(htim); + htim->PWM_PulseFinishedCallback(htim); +#else + HAL_TIM_OC_DelayElapsedCallback(htim); + 800528e: 6878 ldr r0, [r7, #4] + 8005290: f000 f98b bl 80055aa + HAL_TIM_PWM_PulseFinishedCallback(htim); + 8005294: 6878 ldr r0, [r7, #4] + 8005296: f000 f99a bl 80055ce +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; + 800529a: 687b ldr r3, [r7, #4] + 800529c: 2200 movs r2, #0 + 800529e: 771a strb r2, [r3, #28] + } + } + } + /* Capture compare 2 event */ + if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) + 80052a0: 68bb ldr r3, [r7, #8] + 80052a2: f003 0304 and.w r3, r3, #4 + 80052a6: 2b00 cmp r3, #0 + 80052a8: d020 beq.n 80052ec + { + if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) + 80052aa: 68fb ldr r3, [r7, #12] + 80052ac: f003 0304 and.w r3, r3, #4 + 80052b0: 2b00 cmp r3, #0 + 80052b2: d01b beq.n 80052ec + { + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); + 80052b4: 687b ldr r3, [r7, #4] + 80052b6: 681b ldr r3, [r3, #0] + 80052b8: f06f 0204 mvn.w r2, #4 + 80052bc: 611a str r2, [r3, #16] + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; + 80052be: 687b ldr r3, [r7, #4] + 80052c0: 2202 movs r2, #2 + 80052c2: 771a strb r2, [r3, #28] + /* Input capture event */ + if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) + 80052c4: 687b ldr r3, [r7, #4] + 80052c6: 681b ldr r3, [r3, #0] + 80052c8: 699b ldr r3, [r3, #24] + 80052ca: f403 7340 and.w r3, r3, #768 @ 0x300 + 80052ce: 2b00 cmp r3, #0 + 80052d0: d003 beq.n 80052da + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->IC_CaptureCallback(htim); +#else + HAL_TIM_IC_CaptureCallback(htim); + 80052d2: 6878 ldr r0, [r7, #4] + 80052d4: f000 f972 bl 80055bc + 80052d8: e005 b.n 80052e6 + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->OC_DelayElapsedCallback(htim); + htim->PWM_PulseFinishedCallback(htim); +#else + HAL_TIM_OC_DelayElapsedCallback(htim); + 80052da: 6878 ldr r0, [r7, #4] + 80052dc: f000 f965 bl 80055aa + HAL_TIM_PWM_PulseFinishedCallback(htim); + 80052e0: 6878 ldr r0, [r7, #4] + 80052e2: f000 f974 bl 80055ce +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; + 80052e6: 687b ldr r3, [r7, #4] + 80052e8: 2200 movs r2, #0 + 80052ea: 771a strb r2, [r3, #28] + } + } + /* Capture compare 3 event */ + if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) + 80052ec: 68bb ldr r3, [r7, #8] + 80052ee: f003 0308 and.w r3, r3, #8 + 80052f2: 2b00 cmp r3, #0 + 80052f4: d020 beq.n 8005338 + { + if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) + 80052f6: 68fb ldr r3, [r7, #12] + 80052f8: f003 0308 and.w r3, r3, #8 + 80052fc: 2b00 cmp r3, #0 + 80052fe: d01b beq.n 8005338 + { + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); + 8005300: 687b ldr r3, [r7, #4] + 8005302: 681b ldr r3, [r3, #0] + 8005304: f06f 0208 mvn.w r2, #8 + 8005308: 611a str r2, [r3, #16] + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; + 800530a: 687b ldr r3, [r7, #4] + 800530c: 2204 movs r2, #4 + 800530e: 771a strb r2, [r3, #28] + /* Input capture event */ + if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) + 8005310: 687b ldr r3, [r7, #4] + 8005312: 681b ldr r3, [r3, #0] + 8005314: 69db ldr r3, [r3, #28] + 8005316: f003 0303 and.w r3, r3, #3 + 800531a: 2b00 cmp r3, #0 + 800531c: d003 beq.n 8005326 + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->IC_CaptureCallback(htim); +#else + HAL_TIM_IC_CaptureCallback(htim); + 800531e: 6878 ldr r0, [r7, #4] + 8005320: f000 f94c bl 80055bc + 8005324: e005 b.n 8005332 + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->OC_DelayElapsedCallback(htim); + htim->PWM_PulseFinishedCallback(htim); +#else + HAL_TIM_OC_DelayElapsedCallback(htim); + 8005326: 6878 ldr r0, [r7, #4] + 8005328: f000 f93f bl 80055aa + HAL_TIM_PWM_PulseFinishedCallback(htim); + 800532c: 6878 ldr r0, [r7, #4] + 800532e: f000 f94e bl 80055ce +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; + 8005332: 687b ldr r3, [r7, #4] + 8005334: 2200 movs r2, #0 + 8005336: 771a strb r2, [r3, #28] + } + } + /* Capture compare 4 event */ + if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) + 8005338: 68bb ldr r3, [r7, #8] + 800533a: f003 0310 and.w r3, r3, #16 + 800533e: 2b00 cmp r3, #0 + 8005340: d020 beq.n 8005384 + { + if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) + 8005342: 68fb ldr r3, [r7, #12] + 8005344: f003 0310 and.w r3, r3, #16 + 8005348: 2b00 cmp r3, #0 + 800534a: d01b beq.n 8005384 + { + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); + 800534c: 687b ldr r3, [r7, #4] + 800534e: 681b ldr r3, [r3, #0] + 8005350: f06f 0210 mvn.w r2, #16 + 8005354: 611a str r2, [r3, #16] + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; + 8005356: 687b ldr r3, [r7, #4] + 8005358: 2208 movs r2, #8 + 800535a: 771a strb r2, [r3, #28] + /* Input capture event */ + if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) + 800535c: 687b ldr r3, [r7, #4] + 800535e: 681b ldr r3, [r3, #0] + 8005360: 69db ldr r3, [r3, #28] + 8005362: f403 7340 and.w r3, r3, #768 @ 0x300 + 8005366: 2b00 cmp r3, #0 + 8005368: d003 beq.n 8005372 + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->IC_CaptureCallback(htim); +#else + HAL_TIM_IC_CaptureCallback(htim); + 800536a: 6878 ldr r0, [r7, #4] + 800536c: f000 f926 bl 80055bc + 8005370: e005 b.n 800537e + { +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->OC_DelayElapsedCallback(htim); + htim->PWM_PulseFinishedCallback(htim); +#else + HAL_TIM_OC_DelayElapsedCallback(htim); + 8005372: 6878 ldr r0, [r7, #4] + 8005374: f000 f919 bl 80055aa + HAL_TIM_PWM_PulseFinishedCallback(htim); + 8005378: 6878 ldr r0, [r7, #4] + 800537a: f000 f928 bl 80055ce +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; + 800537e: 687b ldr r3, [r7, #4] + 8005380: 2200 movs r2, #0 + 8005382: 771a strb r2, [r3, #28] + } + } + /* TIM Update event */ + if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) + 8005384: 68bb ldr r3, [r7, #8] + 8005386: f003 0301 and.w r3, r3, #1 + 800538a: 2b00 cmp r3, #0 + 800538c: d00c beq.n 80053a8 + { + if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) + 800538e: 68fb ldr r3, [r7, #12] + 8005390: f003 0301 and.w r3, r3, #1 + 8005394: 2b00 cmp r3, #0 + 8005396: d007 beq.n 80053a8 + { + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); + 8005398: 687b ldr r3, [r7, #4] + 800539a: 681b ldr r3, [r3, #0] + 800539c: f06f 0201 mvn.w r2, #1 + 80053a0: 611a str r2, [r3, #16] +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->PeriodElapsedCallback(htim); +#else + HAL_TIM_PeriodElapsedCallback(htim); + 80053a2: 6878 ldr r0, [r7, #4] + 80053a4: f7fd f8e6 bl 8002574 +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + } + /* TIM Break input event */ + if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) + 80053a8: 68bb ldr r3, [r7, #8] + 80053aa: f003 0380 and.w r3, r3, #128 @ 0x80 + 80053ae: 2b00 cmp r3, #0 + 80053b0: d00c beq.n 80053cc + { + if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) + 80053b2: 68fb ldr r3, [r7, #12] + 80053b4: f003 0380 and.w r3, r3, #128 @ 0x80 + 80053b8: 2b00 cmp r3, #0 + 80053ba: d007 beq.n 80053cc + { + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK); + 80053bc: 687b ldr r3, [r7, #4] + 80053be: 681b ldr r3, [r3, #0] + 80053c0: f06f 0280 mvn.w r2, #128 @ 0x80 + 80053c4: 611a str r2, [r3, #16] +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->BreakCallback(htim); +#else + HAL_TIMEx_BreakCallback(htim); + 80053c6: 6878 ldr r0, [r7, #4] + 80053c8: f000 fa7f bl 80058ca +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + } + /* TIM Trigger detection event */ + if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) + 80053cc: 68bb ldr r3, [r7, #8] + 80053ce: f003 0340 and.w r3, r3, #64 @ 0x40 + 80053d2: 2b00 cmp r3, #0 + 80053d4: d00c beq.n 80053f0 + { + if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) + 80053d6: 68fb ldr r3, [r7, #12] + 80053d8: f003 0340 and.w r3, r3, #64 @ 0x40 + 80053dc: 2b00 cmp r3, #0 + 80053de: d007 beq.n 80053f0 + { + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); + 80053e0: 687b ldr r3, [r7, #4] + 80053e2: 681b ldr r3, [r3, #0] + 80053e4: f06f 0240 mvn.w r2, #64 @ 0x40 + 80053e8: 611a str r2, [r3, #16] +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->TriggerCallback(htim); +#else + HAL_TIM_TriggerCallback(htim); + 80053ea: 6878 ldr r0, [r7, #4] + 80053ec: f000 f8f8 bl 80055e0 +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + } + /* TIM commutation event */ + if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM)) + 80053f0: 68bb ldr r3, [r7, #8] + 80053f2: f003 0320 and.w r3, r3, #32 + 80053f6: 2b00 cmp r3, #0 + 80053f8: d00c beq.n 8005414 + { + if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM)) + 80053fa: 68fb ldr r3, [r7, #12] + 80053fc: f003 0320 and.w r3, r3, #32 + 8005400: 2b00 cmp r3, #0 + 8005402: d007 beq.n 8005414 + { + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); + 8005404: 687b ldr r3, [r7, #4] + 8005406: 681b ldr r3, [r3, #0] + 8005408: f06f 0220 mvn.w r2, #32 + 800540c: 611a str r2, [r3, #16] +#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) + htim->CommutationCallback(htim); +#else + HAL_TIMEx_CommutCallback(htim); + 800540e: 6878 ldr r0, [r7, #4] + 8005410: f000 fa52 bl 80058b8 +#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ + } + } +} + 8005414: bf00 nop + 8005416: 3710 adds r7, #16 + 8005418: 46bd mov sp, r7 + 800541a: bd80 pop {r7, pc} + +0800541c : + * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that + * contains the clock source information for the TIM peripheral. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) +{ + 800541c: b580 push {r7, lr} + 800541e: b084 sub sp, #16 + 8005420: af00 add r7, sp, #0 + 8005422: 6078 str r0, [r7, #4] + 8005424: 6039 str r1, [r7, #0] + HAL_StatusTypeDef status = HAL_OK; + 8005426: 2300 movs r3, #0 + 8005428: 73fb strb r3, [r7, #15] + uint32_t tmpsmcr; + + /* Process Locked */ + __HAL_LOCK(htim); + 800542a: 687b ldr r3, [r7, #4] + 800542c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8005430: 2b01 cmp r3, #1 + 8005432: d101 bne.n 8005438 + 8005434: 2302 movs r3, #2 + 8005436: e0b4 b.n 80055a2 + 8005438: 687b ldr r3, [r7, #4] + 800543a: 2201 movs r2, #1 + 800543c: f883 203c strb.w r2, [r3, #60] @ 0x3c + + htim->State = HAL_TIM_STATE_BUSY; + 8005440: 687b ldr r3, [r7, #4] + 8005442: 2202 movs r2, #2 + 8005444: f883 203d strb.w r2, [r3, #61] @ 0x3d + + /* Check the parameters */ + assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); + + /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ + tmpsmcr = htim->Instance->SMCR; + 8005448: 687b ldr r3, [r7, #4] + 800544a: 681b ldr r3, [r3, #0] + 800544c: 689b ldr r3, [r3, #8] + 800544e: 60bb str r3, [r7, #8] + tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); + 8005450: 68bb ldr r3, [r7, #8] + 8005452: f023 0377 bic.w r3, r3, #119 @ 0x77 + 8005456: 60bb str r3, [r7, #8] + tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); + 8005458: 68bb ldr r3, [r7, #8] + 800545a: f423 437f bic.w r3, r3, #65280 @ 0xff00 + 800545e: 60bb str r3, [r7, #8] + htim->Instance->SMCR = tmpsmcr; + 8005460: 687b ldr r3, [r7, #4] + 8005462: 681b ldr r3, [r3, #0] + 8005464: 68ba ldr r2, [r7, #8] + 8005466: 609a str r2, [r3, #8] + + switch (sClockSourceConfig->ClockSource) + 8005468: 683b ldr r3, [r7, #0] + 800546a: 681b ldr r3, [r3, #0] + 800546c: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 + 8005470: d03e beq.n 80054f0 + 8005472: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 + 8005476: f200 8087 bhi.w 8005588 + 800547a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 800547e: f000 8086 beq.w 800558e + 8005482: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8005486: d87f bhi.n 8005588 + 8005488: 2b70 cmp r3, #112 @ 0x70 + 800548a: d01a beq.n 80054c2 + 800548c: 2b70 cmp r3, #112 @ 0x70 + 800548e: d87b bhi.n 8005588 + 8005490: 2b60 cmp r3, #96 @ 0x60 + 8005492: d050 beq.n 8005536 + 8005494: 2b60 cmp r3, #96 @ 0x60 + 8005496: d877 bhi.n 8005588 + 8005498: 2b50 cmp r3, #80 @ 0x50 + 800549a: d03c beq.n 8005516 + 800549c: 2b50 cmp r3, #80 @ 0x50 + 800549e: d873 bhi.n 8005588 + 80054a0: 2b40 cmp r3, #64 @ 0x40 + 80054a2: d058 beq.n 8005556 + 80054a4: 2b40 cmp r3, #64 @ 0x40 + 80054a6: d86f bhi.n 8005588 + 80054a8: 2b30 cmp r3, #48 @ 0x30 + 80054aa: d064 beq.n 8005576 + 80054ac: 2b30 cmp r3, #48 @ 0x30 + 80054ae: d86b bhi.n 8005588 + 80054b0: 2b20 cmp r3, #32 + 80054b2: d060 beq.n 8005576 + 80054b4: 2b20 cmp r3, #32 + 80054b6: d867 bhi.n 8005588 + 80054b8: 2b00 cmp r3, #0 + 80054ba: d05c beq.n 8005576 + 80054bc: 2b10 cmp r3, #16 + 80054be: d05a beq.n 8005576 + 80054c0: e062 b.n 8005588 + assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); + assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + + /* Configure the ETR Clock source */ + TIM_ETR_SetConfig(htim->Instance, + 80054c2: 687b ldr r3, [r7, #4] + 80054c4: 6818 ldr r0, [r3, #0] + sClockSourceConfig->ClockPrescaler, + 80054c6: 683b ldr r3, [r7, #0] + 80054c8: 6899 ldr r1, [r3, #8] + sClockSourceConfig->ClockPolarity, + 80054ca: 683b ldr r3, [r7, #0] + 80054cc: 685a ldr r2, [r3, #4] + sClockSourceConfig->ClockFilter); + 80054ce: 683b ldr r3, [r7, #0] + 80054d0: 68db ldr r3, [r3, #12] + TIM_ETR_SetConfig(htim->Instance, + 80054d2: f000 f974 bl 80057be + + /* Select the External clock mode1 and the ETRF trigger */ + tmpsmcr = htim->Instance->SMCR; + 80054d6: 687b ldr r3, [r7, #4] + 80054d8: 681b ldr r3, [r3, #0] + 80054da: 689b ldr r3, [r3, #8] + 80054dc: 60bb str r3, [r7, #8] + tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); + 80054de: 68bb ldr r3, [r7, #8] + 80054e0: f043 0377 orr.w r3, r3, #119 @ 0x77 + 80054e4: 60bb str r3, [r7, #8] + /* Write to TIMx SMCR */ + htim->Instance->SMCR = tmpsmcr; + 80054e6: 687b ldr r3, [r7, #4] + 80054e8: 681b ldr r3, [r3, #0] + 80054ea: 68ba ldr r2, [r7, #8] + 80054ec: 609a str r2, [r3, #8] + break; + 80054ee: e04f b.n 8005590 + assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); + assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + + /* Configure the ETR Clock source */ + TIM_ETR_SetConfig(htim->Instance, + 80054f0: 687b ldr r3, [r7, #4] + 80054f2: 6818 ldr r0, [r3, #0] + sClockSourceConfig->ClockPrescaler, + 80054f4: 683b ldr r3, [r7, #0] + 80054f6: 6899 ldr r1, [r3, #8] + sClockSourceConfig->ClockPolarity, + 80054f8: 683b ldr r3, [r7, #0] + 80054fa: 685a ldr r2, [r3, #4] + sClockSourceConfig->ClockFilter); + 80054fc: 683b ldr r3, [r7, #0] + 80054fe: 68db ldr r3, [r3, #12] + TIM_ETR_SetConfig(htim->Instance, + 8005500: f000 f95d bl 80057be + /* Enable the External clock mode2 */ + htim->Instance->SMCR |= TIM_SMCR_ECE; + 8005504: 687b ldr r3, [r7, #4] + 8005506: 681b ldr r3, [r3, #0] + 8005508: 689a ldr r2, [r3, #8] + 800550a: 687b ldr r3, [r7, #4] + 800550c: 681b ldr r3, [r3, #0] + 800550e: f442 4280 orr.w r2, r2, #16384 @ 0x4000 + 8005512: 609a str r2, [r3, #8] + break; + 8005514: e03c b.n 8005590 + + /* Check TI1 input conditioning related parameters */ + assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + + TIM_TI1_ConfigInputStage(htim->Instance, + 8005516: 687b ldr r3, [r7, #4] + 8005518: 6818 ldr r0, [r3, #0] + sClockSourceConfig->ClockPolarity, + 800551a: 683b ldr r3, [r7, #0] + 800551c: 6859 ldr r1, [r3, #4] + sClockSourceConfig->ClockFilter); + 800551e: 683b ldr r3, [r7, #0] + 8005520: 68db ldr r3, [r3, #12] + TIM_TI1_ConfigInputStage(htim->Instance, + 8005522: 461a mov r2, r3 + 8005524: f000 f8d4 bl 80056d0 + TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); + 8005528: 687b ldr r3, [r7, #4] + 800552a: 681b ldr r3, [r3, #0] + 800552c: 2150 movs r1, #80 @ 0x50 + 800552e: 4618 mov r0, r3 + 8005530: f000 f92b bl 800578a + break; + 8005534: e02c b.n 8005590 + + /* Check TI2 input conditioning related parameters */ + assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + + TIM_TI2_ConfigInputStage(htim->Instance, + 8005536: 687b ldr r3, [r7, #4] + 8005538: 6818 ldr r0, [r3, #0] + sClockSourceConfig->ClockPolarity, + 800553a: 683b ldr r3, [r7, #0] + 800553c: 6859 ldr r1, [r3, #4] + sClockSourceConfig->ClockFilter); + 800553e: 683b ldr r3, [r7, #0] + 8005540: 68db ldr r3, [r3, #12] + TIM_TI2_ConfigInputStage(htim->Instance, + 8005542: 461a mov r2, r3 + 8005544: f000 f8f2 bl 800572c + TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); + 8005548: 687b ldr r3, [r7, #4] + 800554a: 681b ldr r3, [r3, #0] + 800554c: 2160 movs r1, #96 @ 0x60 + 800554e: 4618 mov r0, r3 + 8005550: f000 f91b bl 800578a + break; + 8005554: e01c b.n 8005590 + + /* Check TI1 input conditioning related parameters */ + assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); + assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); + + TIM_TI1_ConfigInputStage(htim->Instance, + 8005556: 687b ldr r3, [r7, #4] + 8005558: 6818 ldr r0, [r3, #0] + sClockSourceConfig->ClockPolarity, + 800555a: 683b ldr r3, [r7, #0] + 800555c: 6859 ldr r1, [r3, #4] + sClockSourceConfig->ClockFilter); + 800555e: 683b ldr r3, [r7, #0] + 8005560: 68db ldr r3, [r3, #12] + TIM_TI1_ConfigInputStage(htim->Instance, + 8005562: 461a mov r2, r3 + 8005564: f000 f8b4 bl 80056d0 + TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); + 8005568: 687b ldr r3, [r7, #4] + 800556a: 681b ldr r3, [r3, #0] + 800556c: 2140 movs r1, #64 @ 0x40 + 800556e: 4618 mov r0, r3 + 8005570: f000 f90b bl 800578a + break; + 8005574: e00c b.n 8005590 + case TIM_CLOCKSOURCE_ITR3: + { + /* Check whether or not the timer instance supports internal trigger input */ + assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); + + TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); + 8005576: 687b ldr r3, [r7, #4] + 8005578: 681a ldr r2, [r3, #0] + 800557a: 683b ldr r3, [r7, #0] + 800557c: 681b ldr r3, [r3, #0] + 800557e: 4619 mov r1, r3 + 8005580: 4610 mov r0, r2 + 8005582: f000 f902 bl 800578a + break; + 8005586: e003 b.n 8005590 + } + + default: + status = HAL_ERROR; + 8005588: 2301 movs r3, #1 + 800558a: 73fb strb r3, [r7, #15] + break; + 800558c: e000 b.n 8005590 + break; + 800558e: bf00 nop + } + htim->State = HAL_TIM_STATE_READY; + 8005590: 687b ldr r3, [r7, #4] + 8005592: 2201 movs r2, #1 + 8005594: f883 203d strb.w r2, [r3, #61] @ 0x3d + + __HAL_UNLOCK(htim); + 8005598: 687b ldr r3, [r7, #4] + 800559a: 2200 movs r2, #0 + 800559c: f883 203c strb.w r2, [r3, #60] @ 0x3c + + return status; + 80055a0: 7bfb ldrb r3, [r7, #15] +} + 80055a2: 4618 mov r0, r3 + 80055a4: 3710 adds r7, #16 + 80055a6: 46bd mov sp, r7 + 80055a8: bd80 pop {r7, pc} + +080055aa : + * @brief Output Compare callback in non-blocking mode + * @param htim TIM OC handle + * @retval None + */ +__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) +{ + 80055aa: b480 push {r7} + 80055ac: b083 sub sp, #12 + 80055ae: af00 add r7, sp, #0 + 80055b0: 6078 str r0, [r7, #4] + UNUSED(htim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file + */ +} + 80055b2: bf00 nop + 80055b4: 370c adds r7, #12 + 80055b6: 46bd mov sp, r7 + 80055b8: bc80 pop {r7} + 80055ba: 4770 bx lr + +080055bc : + * @brief Input Capture callback in non-blocking mode + * @param htim TIM IC handle + * @retval None + */ +__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) +{ + 80055bc: b480 push {r7} + 80055be: b083 sub sp, #12 + 80055c0: af00 add r7, sp, #0 + 80055c2: 6078 str r0, [r7, #4] + UNUSED(htim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIM_IC_CaptureCallback could be implemented in the user file + */ +} + 80055c4: bf00 nop + 80055c6: 370c adds r7, #12 + 80055c8: 46bd mov sp, r7 + 80055ca: bc80 pop {r7} + 80055cc: 4770 bx lr + +080055ce : + * @brief PWM Pulse finished callback in non-blocking mode + * @param htim TIM handle + * @retval None + */ +__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) +{ + 80055ce: b480 push {r7} + 80055d0: b083 sub sp, #12 + 80055d2: af00 add r7, sp, #0 + 80055d4: 6078 str r0, [r7, #4] + UNUSED(htim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file + */ +} + 80055d6: bf00 nop + 80055d8: 370c adds r7, #12 + 80055da: 46bd mov sp, r7 + 80055dc: bc80 pop {r7} + 80055de: 4770 bx lr + +080055e0 : + * @brief Hall Trigger detection callback in non-blocking mode + * @param htim TIM handle + * @retval None + */ +__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) +{ + 80055e0: b480 push {r7} + 80055e2: b083 sub sp, #12 + 80055e4: af00 add r7, sp, #0 + 80055e6: 6078 str r0, [r7, #4] + UNUSED(htim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIM_TriggerCallback could be implemented in the user file + */ +} + 80055e8: bf00 nop + 80055ea: 370c adds r7, #12 + 80055ec: 46bd mov sp, r7 + 80055ee: bc80 pop {r7} + 80055f0: 4770 bx lr + ... + +080055f4 : + * @param TIMx TIM peripheral + * @param Structure TIM Base configuration structure + * @retval None + */ +void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) +{ + 80055f4: b480 push {r7} + 80055f6: b085 sub sp, #20 + 80055f8: af00 add r7, sp, #0 + 80055fa: 6078 str r0, [r7, #4] + 80055fc: 6039 str r1, [r7, #0] + uint32_t tmpcr1; + tmpcr1 = TIMx->CR1; + 80055fe: 687b ldr r3, [r7, #4] + 8005600: 681b ldr r3, [r3, #0] + 8005602: 60fb str r3, [r7, #12] + + /* Set TIM Time Base Unit parameters ---------------------------------------*/ + if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) + 8005604: 687b ldr r3, [r7, #4] + 8005606: 4a2f ldr r2, [pc, #188] @ (80056c4 ) + 8005608: 4293 cmp r3, r2 + 800560a: d00b beq.n 8005624 + 800560c: 687b ldr r3, [r7, #4] + 800560e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005612: d007 beq.n 8005624 + 8005614: 687b ldr r3, [r7, #4] + 8005616: 4a2c ldr r2, [pc, #176] @ (80056c8 ) + 8005618: 4293 cmp r3, r2 + 800561a: d003 beq.n 8005624 + 800561c: 687b ldr r3, [r7, #4] + 800561e: 4a2b ldr r2, [pc, #172] @ (80056cc ) + 8005620: 4293 cmp r3, r2 + 8005622: d108 bne.n 8005636 + { + /* Select the Counter Mode */ + tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); + 8005624: 68fb ldr r3, [r7, #12] + 8005626: f023 0370 bic.w r3, r3, #112 @ 0x70 + 800562a: 60fb str r3, [r7, #12] + tmpcr1 |= Structure->CounterMode; + 800562c: 683b ldr r3, [r7, #0] + 800562e: 685b ldr r3, [r3, #4] + 8005630: 68fa ldr r2, [r7, #12] + 8005632: 4313 orrs r3, r2 + 8005634: 60fb str r3, [r7, #12] + } + + if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) + 8005636: 687b ldr r3, [r7, #4] + 8005638: 4a22 ldr r2, [pc, #136] @ (80056c4 ) + 800563a: 4293 cmp r3, r2 + 800563c: d00b beq.n 8005656 + 800563e: 687b ldr r3, [r7, #4] + 8005640: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005644: d007 beq.n 8005656 + 8005646: 687b ldr r3, [r7, #4] + 8005648: 4a1f ldr r2, [pc, #124] @ (80056c8 ) + 800564a: 4293 cmp r3, r2 + 800564c: d003 beq.n 8005656 + 800564e: 687b ldr r3, [r7, #4] + 8005650: 4a1e ldr r2, [pc, #120] @ (80056cc ) + 8005652: 4293 cmp r3, r2 + 8005654: d108 bne.n 8005668 + { + /* Set the clock division */ + tmpcr1 &= ~TIM_CR1_CKD; + 8005656: 68fb ldr r3, [r7, #12] + 8005658: f423 7340 bic.w r3, r3, #768 @ 0x300 + 800565c: 60fb str r3, [r7, #12] + tmpcr1 |= (uint32_t)Structure->ClockDivision; + 800565e: 683b ldr r3, [r7, #0] + 8005660: 68db ldr r3, [r3, #12] + 8005662: 68fa ldr r2, [r7, #12] + 8005664: 4313 orrs r3, r2 + 8005666: 60fb str r3, [r7, #12] + } + + /* Set the auto-reload preload */ + MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); + 8005668: 68fb ldr r3, [r7, #12] + 800566a: f023 0280 bic.w r2, r3, #128 @ 0x80 + 800566e: 683b ldr r3, [r7, #0] + 8005670: 695b ldr r3, [r3, #20] + 8005672: 4313 orrs r3, r2 + 8005674: 60fb str r3, [r7, #12] + + TIMx->CR1 = tmpcr1; + 8005676: 687b ldr r3, [r7, #4] + 8005678: 68fa ldr r2, [r7, #12] + 800567a: 601a str r2, [r3, #0] + + /* Set the Autoreload value */ + TIMx->ARR = (uint32_t)Structure->Period ; + 800567c: 683b ldr r3, [r7, #0] + 800567e: 689a ldr r2, [r3, #8] + 8005680: 687b ldr r3, [r7, #4] + 8005682: 62da str r2, [r3, #44] @ 0x2c + + /* Set the Prescaler value */ + TIMx->PSC = Structure->Prescaler; + 8005684: 683b ldr r3, [r7, #0] + 8005686: 681a ldr r2, [r3, #0] + 8005688: 687b ldr r3, [r7, #4] + 800568a: 629a str r2, [r3, #40] @ 0x28 + + if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) + 800568c: 687b ldr r3, [r7, #4] + 800568e: 4a0d ldr r2, [pc, #52] @ (80056c4 ) + 8005690: 4293 cmp r3, r2 + 8005692: d103 bne.n 800569c + { + /* Set the Repetition Counter value */ + TIMx->RCR = Structure->RepetitionCounter; + 8005694: 683b ldr r3, [r7, #0] + 8005696: 691a ldr r2, [r3, #16] + 8005698: 687b ldr r3, [r7, #4] + 800569a: 631a str r2, [r3, #48] @ 0x30 + } + + /* Generate an update event to reload the Prescaler + and the repetition counter (only for advanced timer) value immediately */ + TIMx->EGR = TIM_EGR_UG; + 800569c: 687b ldr r3, [r7, #4] + 800569e: 2201 movs r2, #1 + 80056a0: 615a str r2, [r3, #20] + + /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ + if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) + 80056a2: 687b ldr r3, [r7, #4] + 80056a4: 691b ldr r3, [r3, #16] + 80056a6: f003 0301 and.w r3, r3, #1 + 80056aa: 2b00 cmp r3, #0 + 80056ac: d005 beq.n 80056ba + { + /* Clear the update flag */ + CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); + 80056ae: 687b ldr r3, [r7, #4] + 80056b0: 691b ldr r3, [r3, #16] + 80056b2: f023 0201 bic.w r2, r3, #1 + 80056b6: 687b ldr r3, [r7, #4] + 80056b8: 611a str r2, [r3, #16] + } +} + 80056ba: bf00 nop + 80056bc: 3714 adds r7, #20 + 80056be: 46bd mov sp, r7 + 80056c0: bc80 pop {r7} + 80056c2: 4770 bx lr + 80056c4: 40012c00 .word 0x40012c00 + 80056c8: 40000400 .word 0x40000400 + 80056cc: 40000800 .word 0x40000800 + +080056d0 : + * @param TIM_ICFilter Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) +{ + 80056d0: b480 push {r7} + 80056d2: b087 sub sp, #28 + 80056d4: af00 add r7, sp, #0 + 80056d6: 60f8 str r0, [r7, #12] + 80056d8: 60b9 str r1, [r7, #8] + 80056da: 607a str r2, [r7, #4] + uint32_t tmpccmr1; + uint32_t tmpccer; + + /* Disable the Channel 1: Reset the CC1E Bit */ + tmpccer = TIMx->CCER; + 80056dc: 68fb ldr r3, [r7, #12] + 80056de: 6a1b ldr r3, [r3, #32] + 80056e0: 617b str r3, [r7, #20] + TIMx->CCER &= ~TIM_CCER_CC1E; + 80056e2: 68fb ldr r3, [r7, #12] + 80056e4: 6a1b ldr r3, [r3, #32] + 80056e6: f023 0201 bic.w r2, r3, #1 + 80056ea: 68fb ldr r3, [r7, #12] + 80056ec: 621a str r2, [r3, #32] + tmpccmr1 = TIMx->CCMR1; + 80056ee: 68fb ldr r3, [r7, #12] + 80056f0: 699b ldr r3, [r3, #24] + 80056f2: 613b str r3, [r7, #16] + + /* Set the filter */ + tmpccmr1 &= ~TIM_CCMR1_IC1F; + 80056f4: 693b ldr r3, [r7, #16] + 80056f6: f023 03f0 bic.w r3, r3, #240 @ 0xf0 + 80056fa: 613b str r3, [r7, #16] + tmpccmr1 |= (TIM_ICFilter << 4U); + 80056fc: 687b ldr r3, [r7, #4] + 80056fe: 011b lsls r3, r3, #4 + 8005700: 693a ldr r2, [r7, #16] + 8005702: 4313 orrs r3, r2 + 8005704: 613b str r3, [r7, #16] + + /* Select the Polarity and set the CC1E Bit */ + tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); + 8005706: 697b ldr r3, [r7, #20] + 8005708: f023 030a bic.w r3, r3, #10 + 800570c: 617b str r3, [r7, #20] + tmpccer |= TIM_ICPolarity; + 800570e: 697a ldr r2, [r7, #20] + 8005710: 68bb ldr r3, [r7, #8] + 8005712: 4313 orrs r3, r2 + 8005714: 617b str r3, [r7, #20] + + /* Write to TIMx CCMR1 and CCER registers */ + TIMx->CCMR1 = tmpccmr1; + 8005716: 68fb ldr r3, [r7, #12] + 8005718: 693a ldr r2, [r7, #16] + 800571a: 619a str r2, [r3, #24] + TIMx->CCER = tmpccer; + 800571c: 68fb ldr r3, [r7, #12] + 800571e: 697a ldr r2, [r7, #20] + 8005720: 621a str r2, [r3, #32] +} + 8005722: bf00 nop + 8005724: 371c adds r7, #28 + 8005726: 46bd mov sp, r7 + 8005728: bc80 pop {r7} + 800572a: 4770 bx lr + +0800572c : + * @param TIM_ICFilter Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) +{ + 800572c: b480 push {r7} + 800572e: b087 sub sp, #28 + 8005730: af00 add r7, sp, #0 + 8005732: 60f8 str r0, [r7, #12] + 8005734: 60b9 str r1, [r7, #8] + 8005736: 607a str r2, [r7, #4] + uint32_t tmpccmr1; + uint32_t tmpccer; + + /* Disable the Channel 2: Reset the CC2E Bit */ + tmpccer = TIMx->CCER; + 8005738: 68fb ldr r3, [r7, #12] + 800573a: 6a1b ldr r3, [r3, #32] + 800573c: 617b str r3, [r7, #20] + TIMx->CCER &= ~TIM_CCER_CC2E; + 800573e: 68fb ldr r3, [r7, #12] + 8005740: 6a1b ldr r3, [r3, #32] + 8005742: f023 0210 bic.w r2, r3, #16 + 8005746: 68fb ldr r3, [r7, #12] + 8005748: 621a str r2, [r3, #32] + tmpccmr1 = TIMx->CCMR1; + 800574a: 68fb ldr r3, [r7, #12] + 800574c: 699b ldr r3, [r3, #24] + 800574e: 613b str r3, [r7, #16] + + /* Set the filter */ + tmpccmr1 &= ~TIM_CCMR1_IC2F; + 8005750: 693b ldr r3, [r7, #16] + 8005752: f423 4370 bic.w r3, r3, #61440 @ 0xf000 + 8005756: 613b str r3, [r7, #16] + tmpccmr1 |= (TIM_ICFilter << 12U); + 8005758: 687b ldr r3, [r7, #4] + 800575a: 031b lsls r3, r3, #12 + 800575c: 693a ldr r2, [r7, #16] + 800575e: 4313 orrs r3, r2 + 8005760: 613b str r3, [r7, #16] + + /* Select the Polarity and set the CC2E Bit */ + tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); + 8005762: 697b ldr r3, [r7, #20] + 8005764: f023 03a0 bic.w r3, r3, #160 @ 0xa0 + 8005768: 617b str r3, [r7, #20] + tmpccer |= (TIM_ICPolarity << 4U); + 800576a: 68bb ldr r3, [r7, #8] + 800576c: 011b lsls r3, r3, #4 + 800576e: 697a ldr r2, [r7, #20] + 8005770: 4313 orrs r3, r2 + 8005772: 617b str r3, [r7, #20] + + /* Write to TIMx CCMR1 and CCER registers */ + TIMx->CCMR1 = tmpccmr1 ; + 8005774: 68fb ldr r3, [r7, #12] + 8005776: 693a ldr r2, [r7, #16] + 8005778: 619a str r2, [r3, #24] + TIMx->CCER = tmpccer; + 800577a: 68fb ldr r3, [r7, #12] + 800577c: 697a ldr r2, [r7, #20] + 800577e: 621a str r2, [r3, #32] +} + 8005780: bf00 nop + 8005782: 371c adds r7, #28 + 8005784: 46bd mov sp, r7 + 8005786: bc80 pop {r7} + 8005788: 4770 bx lr + +0800578a : + * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 + * @arg TIM_TS_ETRF: External Trigger input + * @retval None + */ +static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) +{ + 800578a: b480 push {r7} + 800578c: b085 sub sp, #20 + 800578e: af00 add r7, sp, #0 + 8005790: 6078 str r0, [r7, #4] + 8005792: 6039 str r1, [r7, #0] + uint32_t tmpsmcr; + + /* Get the TIMx SMCR register value */ + tmpsmcr = TIMx->SMCR; + 8005794: 687b ldr r3, [r7, #4] + 8005796: 689b ldr r3, [r3, #8] + 8005798: 60fb str r3, [r7, #12] + /* Reset the TS Bits */ + tmpsmcr &= ~TIM_SMCR_TS; + 800579a: 68fb ldr r3, [r7, #12] + 800579c: f023 0370 bic.w r3, r3, #112 @ 0x70 + 80057a0: 60fb str r3, [r7, #12] + /* Set the Input Trigger source and the slave mode*/ + tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); + 80057a2: 683a ldr r2, [r7, #0] + 80057a4: 68fb ldr r3, [r7, #12] + 80057a6: 4313 orrs r3, r2 + 80057a8: f043 0307 orr.w r3, r3, #7 + 80057ac: 60fb str r3, [r7, #12] + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; + 80057ae: 687b ldr r3, [r7, #4] + 80057b0: 68fa ldr r2, [r7, #12] + 80057b2: 609a str r2, [r3, #8] +} + 80057b4: bf00 nop + 80057b6: 3714 adds r7, #20 + 80057b8: 46bd mov sp, r7 + 80057ba: bc80 pop {r7} + 80057bc: 4770 bx lr + +080057be : + * This parameter must be a value between 0x00 and 0x0F + * @retval None + */ +void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, + uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) +{ + 80057be: b480 push {r7} + 80057c0: b087 sub sp, #28 + 80057c2: af00 add r7, sp, #0 + 80057c4: 60f8 str r0, [r7, #12] + 80057c6: 60b9 str r1, [r7, #8] + 80057c8: 607a str r2, [r7, #4] + 80057ca: 603b str r3, [r7, #0] + uint32_t tmpsmcr; + + tmpsmcr = TIMx->SMCR; + 80057cc: 68fb ldr r3, [r7, #12] + 80057ce: 689b ldr r3, [r3, #8] + 80057d0: 617b str r3, [r7, #20] + + /* Reset the ETR Bits */ + tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); + 80057d2: 697b ldr r3, [r7, #20] + 80057d4: f423 437f bic.w r3, r3, #65280 @ 0xff00 + 80057d8: 617b str r3, [r7, #20] + + /* Set the Prescaler, the Filter value and the Polarity */ + tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); + 80057da: 683b ldr r3, [r7, #0] + 80057dc: 021a lsls r2, r3, #8 + 80057de: 687b ldr r3, [r7, #4] + 80057e0: 431a orrs r2, r3 + 80057e2: 68bb ldr r3, [r7, #8] + 80057e4: 4313 orrs r3, r2 + 80057e6: 697a ldr r2, [r7, #20] + 80057e8: 4313 orrs r3, r2 + 80057ea: 617b str r3, [r7, #20] + + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; + 80057ec: 68fb ldr r3, [r7, #12] + 80057ee: 697a ldr r2, [r7, #20] + 80057f0: 609a str r2, [r3, #8] +} + 80057f2: bf00 nop + 80057f4: 371c adds r7, #28 + 80057f6: 46bd mov sp, r7 + 80057f8: bc80 pop {r7} + 80057fa: 4770 bx lr + +080057fc : + * mode. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, + const TIM_MasterConfigTypeDef *sMasterConfig) +{ + 80057fc: b480 push {r7} + 80057fe: b085 sub sp, #20 + 8005800: af00 add r7, sp, #0 + 8005802: 6078 str r0, [r7, #4] + 8005804: 6039 str r1, [r7, #0] + assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); + assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); + assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); + + /* Check input state */ + __HAL_LOCK(htim); + 8005806: 687b ldr r3, [r7, #4] + 8005808: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 800580c: 2b01 cmp r3, #1 + 800580e: d101 bne.n 8005814 + 8005810: 2302 movs r3, #2 + 8005812: e046 b.n 80058a2 + 8005814: 687b ldr r3, [r7, #4] + 8005816: 2201 movs r2, #1 + 8005818: f883 203c strb.w r2, [r3, #60] @ 0x3c + + /* Change the handler state */ + htim->State = HAL_TIM_STATE_BUSY; + 800581c: 687b ldr r3, [r7, #4] + 800581e: 2202 movs r2, #2 + 8005820: f883 203d strb.w r2, [r3, #61] @ 0x3d + + /* Get the TIMx CR2 register value */ + tmpcr2 = htim->Instance->CR2; + 8005824: 687b ldr r3, [r7, #4] + 8005826: 681b ldr r3, [r3, #0] + 8005828: 685b ldr r3, [r3, #4] + 800582a: 60fb str r3, [r7, #12] + + /* Get the TIMx SMCR register value */ + tmpsmcr = htim->Instance->SMCR; + 800582c: 687b ldr r3, [r7, #4] + 800582e: 681b ldr r3, [r3, #0] + 8005830: 689b ldr r3, [r3, #8] + 8005832: 60bb str r3, [r7, #8] + + /* Reset the MMS Bits */ + tmpcr2 &= ~TIM_CR2_MMS; + 8005834: 68fb ldr r3, [r7, #12] + 8005836: f023 0370 bic.w r3, r3, #112 @ 0x70 + 800583a: 60fb str r3, [r7, #12] + /* Select the TRGO source */ + tmpcr2 |= sMasterConfig->MasterOutputTrigger; + 800583c: 683b ldr r3, [r7, #0] + 800583e: 681b ldr r3, [r3, #0] + 8005840: 68fa ldr r2, [r7, #12] + 8005842: 4313 orrs r3, r2 + 8005844: 60fb str r3, [r7, #12] + + /* Update TIMx CR2 */ + htim->Instance->CR2 = tmpcr2; + 8005846: 687b ldr r3, [r7, #4] + 8005848: 681b ldr r3, [r3, #0] + 800584a: 68fa ldr r2, [r7, #12] + 800584c: 605a str r2, [r3, #4] + + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + 800584e: 687b ldr r3, [r7, #4] + 8005850: 681b ldr r3, [r3, #0] + 8005852: 4a16 ldr r2, [pc, #88] @ (80058ac ) + 8005854: 4293 cmp r3, r2 + 8005856: d00e beq.n 8005876 + 8005858: 687b ldr r3, [r7, #4] + 800585a: 681b ldr r3, [r3, #0] + 800585c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005860: d009 beq.n 8005876 + 8005862: 687b ldr r3, [r7, #4] + 8005864: 681b ldr r3, [r3, #0] + 8005866: 4a12 ldr r2, [pc, #72] @ (80058b0 ) + 8005868: 4293 cmp r3, r2 + 800586a: d004 beq.n 8005876 + 800586c: 687b ldr r3, [r7, #4] + 800586e: 681b ldr r3, [r3, #0] + 8005870: 4a10 ldr r2, [pc, #64] @ (80058b4 ) + 8005872: 4293 cmp r3, r2 + 8005874: d10c bne.n 8005890 + { + /* Reset the MSM Bit */ + tmpsmcr &= ~TIM_SMCR_MSM; + 8005876: 68bb ldr r3, [r7, #8] + 8005878: f023 0380 bic.w r3, r3, #128 @ 0x80 + 800587c: 60bb str r3, [r7, #8] + /* Set master mode */ + tmpsmcr |= sMasterConfig->MasterSlaveMode; + 800587e: 683b ldr r3, [r7, #0] + 8005880: 685b ldr r3, [r3, #4] + 8005882: 68ba ldr r2, [r7, #8] + 8005884: 4313 orrs r3, r2 + 8005886: 60bb str r3, [r7, #8] + + /* Update TIMx SMCR */ + htim->Instance->SMCR = tmpsmcr; + 8005888: 687b ldr r3, [r7, #4] + 800588a: 681b ldr r3, [r3, #0] + 800588c: 68ba ldr r2, [r7, #8] + 800588e: 609a str r2, [r3, #8] + } + + /* Change the htim state */ + htim->State = HAL_TIM_STATE_READY; + 8005890: 687b ldr r3, [r7, #4] + 8005892: 2201 movs r2, #1 + 8005894: f883 203d strb.w r2, [r3, #61] @ 0x3d + + __HAL_UNLOCK(htim); + 8005898: 687b ldr r3, [r7, #4] + 800589a: 2200 movs r2, #0 + 800589c: f883 203c strb.w r2, [r3, #60] @ 0x3c + + return HAL_OK; + 80058a0: 2300 movs r3, #0 +} + 80058a2: 4618 mov r0, r3 + 80058a4: 3714 adds r7, #20 + 80058a6: 46bd mov sp, r7 + 80058a8: bc80 pop {r7} + 80058aa: 4770 bx lr + 80058ac: 40012c00 .word 0x40012c00 + 80058b0: 40000400 .word 0x40000400 + 80058b4: 40000800 .word 0x40000800 + +080058b8 : + * @brief Commutation callback in non-blocking mode + * @param htim TIM handle + * @retval None + */ +__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) +{ + 80058b8: b480 push {r7} + 80058ba: b083 sub sp, #12 + 80058bc: af00 add r7, sp, #0 + 80058be: 6078 str r0, [r7, #4] + UNUSED(htim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIMEx_CommutCallback could be implemented in the user file + */ +} + 80058c0: bf00 nop + 80058c2: 370c adds r7, #12 + 80058c4: 46bd mov sp, r7 + 80058c6: bc80 pop {r7} + 80058c8: 4770 bx lr + +080058ca : + * @brief Break detection callback in non-blocking mode + * @param htim TIM handle + * @retval None + */ +__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) +{ + 80058ca: b480 push {r7} + 80058cc: b083 sub sp, #12 + 80058ce: af00 add r7, sp, #0 + 80058d0: 6078 str r0, [r7, #4] + UNUSED(htim); + + /* NOTE : This function should not be modified, when the callback is needed, + the HAL_TIMEx_BreakCallback could be implemented in the user file + */ +} + 80058d2: bf00 nop + 80058d4: 370c adds r7, #12 + 80058d6: 46bd mov sp, r7 + 80058d8: bc80 pop {r7} + 80058da: 4770 bx lr + +080058dc : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8005878: b580 push {r7, lr} - 800587a: b082 sub sp, #8 - 800587c: af00 add r7, sp, #0 - 800587e: 6078 str r0, [r7, #4] + 80058dc: b580 push {r7, lr} + 80058de: b082 sub sp, #8 + 80058e0: af00 add r7, sp, #0 + 80058e2: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8005880: 687b ldr r3, [r7, #4] - 8005882: 2b00 cmp r3, #0 - 8005884: d101 bne.n 800588a + 80058e4: 687b ldr r3, [r7, #4] + 80058e6: 2b00 cmp r3, #0 + 80058e8: d101 bne.n 80058ee { return HAL_ERROR; - 8005886: 2301 movs r3, #1 - 8005888: e042 b.n 8005910 + 80058ea: 2301 movs r3, #1 + 80058ec: e042 b.n 8005974 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) - 800588a: 687b ldr r3, [r7, #4] - 800588c: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 8005890: b2db uxtb r3, r3 - 8005892: 2b00 cmp r3, #0 - 8005894: d106 bne.n 80058a4 + 80058ee: 687b ldr r3, [r7, #4] + 80058f0: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 80058f4: b2db uxtb r3, r3 + 80058f6: 2b00 cmp r3, #0 + 80058f8: d106 bne.n 8005908 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 8005896: 687b ldr r3, [r7, #4] - 8005898: 2200 movs r2, #0 - 800589a: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 80058fa: 687b ldr r3, [r7, #4] + 80058fc: 2200 movs r2, #0 + 80058fe: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 800589e: 6878 ldr r0, [r7, #4] - 80058a0: f7fd fa50 bl 8002d44 + 8005902: 6878 ldr r0, [r7, #4] + 8005904: f7fd f85e bl 80029c4 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 80058a4: 687b ldr r3, [r7, #4] - 80058a6: 2224 movs r2, #36 @ 0x24 - 80058a8: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005908: 687b ldr r3, [r7, #4] + 800590a: 2224 movs r2, #36 @ 0x24 + 800590c: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); - 80058ac: 687b ldr r3, [r7, #4] - 80058ae: 681b ldr r3, [r3, #0] - 80058b0: 68da ldr r2, [r3, #12] - 80058b2: 687b ldr r3, [r7, #4] - 80058b4: 681b ldr r3, [r3, #0] - 80058b6: f422 5200 bic.w r2, r2, #8192 @ 0x2000 - 80058ba: 60da str r2, [r3, #12] + 8005910: 687b ldr r3, [r7, #4] + 8005912: 681b ldr r3, [r3, #0] + 8005914: 68da ldr r2, [r3, #12] + 8005916: 687b ldr r3, [r7, #4] + 8005918: 681b ldr r3, [r3, #0] + 800591a: f422 5200 bic.w r2, r2, #8192 @ 0x2000 + 800591e: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); - 80058bc: 6878 ldr r0, [r7, #4] - 80058be: f000 fd63 bl 8006388 + 8005920: 6878 ldr r0, [r7, #4] + 8005922: f000 fd63 bl 80063ec /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 80058c2: 687b ldr r3, [r7, #4] - 80058c4: 681b ldr r3, [r3, #0] - 80058c6: 691a ldr r2, [r3, #16] - 80058c8: 687b ldr r3, [r7, #4] - 80058ca: 681b ldr r3, [r3, #0] - 80058cc: f422 4290 bic.w r2, r2, #18432 @ 0x4800 - 80058d0: 611a str r2, [r3, #16] + 8005926: 687b ldr r3, [r7, #4] + 8005928: 681b ldr r3, [r3, #0] + 800592a: 691a ldr r2, [r3, #16] + 800592c: 687b ldr r3, [r7, #4] + 800592e: 681b ldr r3, [r3, #0] + 8005930: f422 4290 bic.w r2, r2, #18432 @ 0x4800 + 8005934: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 80058d2: 687b ldr r3, [r7, #4] - 80058d4: 681b ldr r3, [r3, #0] - 80058d6: 695a ldr r2, [r3, #20] - 80058d8: 687b ldr r3, [r7, #4] - 80058da: 681b ldr r3, [r3, #0] - 80058dc: f022 022a bic.w r2, r2, #42 @ 0x2a - 80058e0: 615a str r2, [r3, #20] + 8005936: 687b ldr r3, [r7, #4] + 8005938: 681b ldr r3, [r3, #0] + 800593a: 695a ldr r2, [r3, #20] + 800593c: 687b ldr r3, [r7, #4] + 800593e: 681b ldr r3, [r3, #0] + 8005940: f022 022a bic.w r2, r2, #42 @ 0x2a + 8005944: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); - 80058e2: 687b ldr r3, [r7, #4] - 80058e4: 681b ldr r3, [r3, #0] - 80058e6: 68da ldr r2, [r3, #12] - 80058e8: 687b ldr r3, [r7, #4] - 80058ea: 681b ldr r3, [r3, #0] - 80058ec: f442 5200 orr.w r2, r2, #8192 @ 0x2000 - 80058f0: 60da str r2, [r3, #12] + 8005946: 687b ldr r3, [r7, #4] + 8005948: 681b ldr r3, [r3, #0] + 800594a: 68da ldr r2, [r3, #12] + 800594c: 687b ldr r3, [r7, #4] + 800594e: 681b ldr r3, [r3, #0] + 8005950: f442 5200 orr.w r2, r2, #8192 @ 0x2000 + 8005954: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 80058f2: 687b ldr r3, [r7, #4] - 80058f4: 2200 movs r2, #0 - 80058f6: 645a str r2, [r3, #68] @ 0x44 + 8005956: 687b ldr r3, [r7, #4] + 8005958: 2200 movs r2, #0 + 800595a: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; - 80058f8: 687b ldr r3, [r7, #4] - 80058fa: 2220 movs r2, #32 - 80058fc: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 800595c: 687b ldr r3, [r7, #4] + 800595e: 2220 movs r2, #32 + 8005960: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; - 8005900: 687b ldr r3, [r7, #4] - 8005902: 2220 movs r2, #32 - 8005904: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005964: 687b ldr r3, [r7, #4] + 8005966: 2220 movs r2, #32 + 8005968: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; - 8005908: 687b ldr r3, [r7, #4] - 800590a: 2200 movs r2, #0 - 800590c: 635a str r2, [r3, #52] @ 0x34 + 800596c: 687b ldr r3, [r7, #4] + 800596e: 2200 movs r2, #0 + 8005970: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; - 800590e: 2300 movs r3, #0 + 8005972: 2300 movs r3, #0 } - 8005910: 4618 mov r0, r3 - 8005912: 3708 adds r7, #8 - 8005914: 46bd mov sp, r7 - 8005916: bd80 pop {r7, pc} + 8005974: 4618 mov r0, r3 + 8005976: 3708 adds r7, #8 + 8005978: 46bd mov sp, r7 + 800597a: bd80 pop {r7, pc} -08005918 : +0800597c : * @param Size Amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8005918: b580 push {r7, lr} - 800591a: b08a sub sp, #40 @ 0x28 - 800591c: af02 add r7, sp, #8 - 800591e: 60f8 str r0, [r7, #12] - 8005920: 60b9 str r1, [r7, #8] - 8005922: 603b str r3, [r7, #0] - 8005924: 4613 mov r3, r2 - 8005926: 80fb strh r3, [r7, #6] + 800597c: b580 push {r7, lr} + 800597e: b08a sub sp, #40 @ 0x28 + 8005980: af02 add r7, sp, #8 + 8005982: 60f8 str r0, [r7, #12] + 8005984: 60b9 str r1, [r7, #8] + 8005986: 603b str r3, [r7, #0] + 8005988: 4613 mov r3, r2 + 800598a: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart = 0U; - 8005928: 2300 movs r3, #0 - 800592a: 617b str r3, [r7, #20] + 800598c: 2300 movs r3, #0 + 800598e: 617b str r3, [r7, #20] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 800592c: 68fb ldr r3, [r7, #12] - 800592e: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 8005932: b2db uxtb r3, r3 - 8005934: 2b20 cmp r3, #32 - 8005936: d175 bne.n 8005a24 + 8005990: 68fb ldr r3, [r7, #12] + 8005992: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 8005996: b2db uxtb r3, r3 + 8005998: 2b20 cmp r3, #32 + 800599a: d175 bne.n 8005a88 { if ((pData == NULL) || (Size == 0U)) - 8005938: 68bb ldr r3, [r7, #8] - 800593a: 2b00 cmp r3, #0 - 800593c: d002 beq.n 8005944 - 800593e: 88fb ldrh r3, [r7, #6] - 8005940: 2b00 cmp r3, #0 - 8005942: d101 bne.n 8005948 + 800599c: 68bb ldr r3, [r7, #8] + 800599e: 2b00 cmp r3, #0 + 80059a0: d002 beq.n 80059a8 + 80059a2: 88fb ldrh r3, [r7, #6] + 80059a4: 2b00 cmp r3, #0 + 80059a6: d101 bne.n 80059ac { return HAL_ERROR; - 8005944: 2301 movs r3, #1 - 8005946: e06e b.n 8005a26 + 80059a8: 2301 movs r3, #1 + 80059aa: e06e b.n 8005a8a } huart->ErrorCode = HAL_UART_ERROR_NONE; - 8005948: 68fb ldr r3, [r7, #12] - 800594a: 2200 movs r2, #0 - 800594c: 645a str r2, [r3, #68] @ 0x44 + 80059ac: 68fb ldr r3, [r7, #12] + 80059ae: 2200 movs r2, #0 + 80059b0: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; - 800594e: 68fb ldr r3, [r7, #12] - 8005950: 2221 movs r2, #33 @ 0x21 - 8005952: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 80059b2: 68fb ldr r3, [r7, #12] + 80059b4: 2221 movs r2, #33 @ 0x21 + 80059b6: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 8005956: f7fd fac7 bl 8002ee8 - 800595a: 6178 str r0, [r7, #20] + 80059ba: f7fd f8d5 bl 8002b68 + 80059be: 6178 str r0, [r7, #20] huart->TxXferSize = Size; - 800595c: 68fb ldr r3, [r7, #12] - 800595e: 88fa ldrh r2, [r7, #6] - 8005960: 849a strh r2, [r3, #36] @ 0x24 + 80059c0: 68fb ldr r3, [r7, #12] + 80059c2: 88fa ldrh r2, [r7, #6] + 80059c4: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; - 8005962: 68fb ldr r3, [r7, #12] - 8005964: 88fa ldrh r2, [r7, #6] - 8005966: 84da strh r2, [r3, #38] @ 0x26 + 80059c6: 68fb ldr r3, [r7, #12] + 80059c8: 88fa ldrh r2, [r7, #6] + 80059ca: 84da strh r2, [r3, #38] @ 0x26 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005968: 68fb ldr r3, [r7, #12] - 800596a: 689b ldr r3, [r3, #8] - 800596c: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8005970: d108 bne.n 8005984 - 8005972: 68fb ldr r3, [r7, #12] - 8005974: 691b ldr r3, [r3, #16] - 8005976: 2b00 cmp r3, #0 - 8005978: d104 bne.n 8005984 + 80059cc: 68fb ldr r3, [r7, #12] + 80059ce: 689b ldr r3, [r3, #8] + 80059d0: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 80059d4: d108 bne.n 80059e8 + 80059d6: 68fb ldr r3, [r7, #12] + 80059d8: 691b ldr r3, [r3, #16] + 80059da: 2b00 cmp r3, #0 + 80059dc: d104 bne.n 80059e8 { pdata8bits = NULL; - 800597a: 2300 movs r3, #0 - 800597c: 61fb str r3, [r7, #28] + 80059de: 2300 movs r3, #0 + 80059e0: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; - 800597e: 68bb ldr r3, [r7, #8] - 8005980: 61bb str r3, [r7, #24] - 8005982: e003 b.n 800598c + 80059e2: 68bb ldr r3, [r7, #8] + 80059e4: 61bb str r3, [r7, #24] + 80059e6: e003 b.n 80059f0 } else { pdata8bits = pData; - 8005984: 68bb ldr r3, [r7, #8] - 8005986: 61fb str r3, [r7, #28] + 80059e8: 68bb ldr r3, [r7, #8] + 80059ea: 61fb str r3, [r7, #28] pdata16bits = NULL; - 8005988: 2300 movs r3, #0 - 800598a: 61bb str r3, [r7, #24] + 80059ec: 2300 movs r3, #0 + 80059ee: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) - 800598c: e02e b.n 80059ec + 80059f0: e02e b.n 8005a50 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 800598e: 683b ldr r3, [r7, #0] - 8005990: 9300 str r3, [sp, #0] - 8005992: 697b ldr r3, [r7, #20] - 8005994: 2200 movs r2, #0 - 8005996: 2180 movs r1, #128 @ 0x80 - 8005998: 68f8 ldr r0, [r7, #12] - 800599a: f000 fb01 bl 8005fa0 - 800599e: 4603 mov r3, r0 - 80059a0: 2b00 cmp r3, #0 - 80059a2: d005 beq.n 80059b0 + 80059f2: 683b ldr r3, [r7, #0] + 80059f4: 9300 str r3, [sp, #0] + 80059f6: 697b ldr r3, [r7, #20] + 80059f8: 2200 movs r2, #0 + 80059fa: 2180 movs r1, #128 @ 0x80 + 80059fc: 68f8 ldr r0, [r7, #12] + 80059fe: f000 fb01 bl 8006004 + 8005a02: 4603 mov r3, r0 + 8005a04: 2b00 cmp r3, #0 + 8005a06: d005 beq.n 8005a14 { huart->gState = HAL_UART_STATE_READY; - 80059a4: 68fb ldr r3, [r7, #12] - 80059a6: 2220 movs r2, #32 - 80059a8: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005a08: 68fb ldr r3, [r7, #12] + 8005a0a: 2220 movs r2, #32 + 8005a0c: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; - 80059ac: 2303 movs r3, #3 - 80059ae: e03a b.n 8005a26 + 8005a10: 2303 movs r3, #3 + 8005a12: e03a b.n 8005a8a } if (pdata8bits == NULL) - 80059b0: 69fb ldr r3, [r7, #28] - 80059b2: 2b00 cmp r3, #0 - 80059b4: d10b bne.n 80059ce + 8005a14: 69fb ldr r3, [r7, #28] + 8005a16: 2b00 cmp r3, #0 + 8005a18: d10b bne.n 8005a32 { huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); - 80059b6: 69bb ldr r3, [r7, #24] - 80059b8: 881b ldrh r3, [r3, #0] - 80059ba: 461a mov r2, r3 - 80059bc: 68fb ldr r3, [r7, #12] - 80059be: 681b ldr r3, [r3, #0] - 80059c0: f3c2 0208 ubfx r2, r2, #0, #9 - 80059c4: 605a str r2, [r3, #4] + 8005a1a: 69bb ldr r3, [r7, #24] + 8005a1c: 881b ldrh r3, [r3, #0] + 8005a1e: 461a mov r2, r3 + 8005a20: 68fb ldr r3, [r7, #12] + 8005a22: 681b ldr r3, [r3, #0] + 8005a24: f3c2 0208 ubfx r2, r2, #0, #9 + 8005a28: 605a str r2, [r3, #4] pdata16bits++; - 80059c6: 69bb ldr r3, [r7, #24] - 80059c8: 3302 adds r3, #2 - 80059ca: 61bb str r3, [r7, #24] - 80059cc: e007 b.n 80059de + 8005a2a: 69bb ldr r3, [r7, #24] + 8005a2c: 3302 adds r3, #2 + 8005a2e: 61bb str r3, [r7, #24] + 8005a30: e007 b.n 8005a42 } else { huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); - 80059ce: 69fb ldr r3, [r7, #28] - 80059d0: 781a ldrb r2, [r3, #0] - 80059d2: 68fb ldr r3, [r7, #12] - 80059d4: 681b ldr r3, [r3, #0] - 80059d6: 605a str r2, [r3, #4] + 8005a32: 69fb ldr r3, [r7, #28] + 8005a34: 781a ldrb r2, [r3, #0] + 8005a36: 68fb ldr r3, [r7, #12] + 8005a38: 681b ldr r3, [r3, #0] + 8005a3a: 605a str r2, [r3, #4] pdata8bits++; - 80059d8: 69fb ldr r3, [r7, #28] - 80059da: 3301 adds r3, #1 - 80059dc: 61fb str r3, [r7, #28] + 8005a3c: 69fb ldr r3, [r7, #28] + 8005a3e: 3301 adds r3, #1 + 8005a40: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 80059de: 68fb ldr r3, [r7, #12] - 80059e0: 8cdb ldrh r3, [r3, #38] @ 0x26 - 80059e2: b29b uxth r3, r3 - 80059e4: 3b01 subs r3, #1 - 80059e6: b29a uxth r2, r3 - 80059e8: 68fb ldr r3, [r7, #12] - 80059ea: 84da strh r2, [r3, #38] @ 0x26 + 8005a42: 68fb ldr r3, [r7, #12] + 8005a44: 8cdb ldrh r3, [r3, #38] @ 0x26 + 8005a46: b29b uxth r3, r3 + 8005a48: 3b01 subs r3, #1 + 8005a4a: b29a uxth r2, r3 + 8005a4c: 68fb ldr r3, [r7, #12] + 8005a4e: 84da strh r2, [r3, #38] @ 0x26 while (huart->TxXferCount > 0U) - 80059ec: 68fb ldr r3, [r7, #12] - 80059ee: 8cdb ldrh r3, [r3, #38] @ 0x26 - 80059f0: b29b uxth r3, r3 - 80059f2: 2b00 cmp r3, #0 - 80059f4: d1cb bne.n 800598e + 8005a50: 68fb ldr r3, [r7, #12] + 8005a52: 8cdb ldrh r3, [r3, #38] @ 0x26 + 8005a54: b29b uxth r3, r3 + 8005a56: 2b00 cmp r3, #0 + 8005a58: d1cb bne.n 80059f2 } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 80059f6: 683b ldr r3, [r7, #0] - 80059f8: 9300 str r3, [sp, #0] - 80059fa: 697b ldr r3, [r7, #20] - 80059fc: 2200 movs r2, #0 - 80059fe: 2140 movs r1, #64 @ 0x40 - 8005a00: 68f8 ldr r0, [r7, #12] - 8005a02: f000 facd bl 8005fa0 - 8005a06: 4603 mov r3, r0 - 8005a08: 2b00 cmp r3, #0 - 8005a0a: d005 beq.n 8005a18 + 8005a5a: 683b ldr r3, [r7, #0] + 8005a5c: 9300 str r3, [sp, #0] + 8005a5e: 697b ldr r3, [r7, #20] + 8005a60: 2200 movs r2, #0 + 8005a62: 2140 movs r1, #64 @ 0x40 + 8005a64: 68f8 ldr r0, [r7, #12] + 8005a66: f000 facd bl 8006004 + 8005a6a: 4603 mov r3, r0 + 8005a6c: 2b00 cmp r3, #0 + 8005a6e: d005 beq.n 8005a7c { huart->gState = HAL_UART_STATE_READY; - 8005a0c: 68fb ldr r3, [r7, #12] - 8005a0e: 2220 movs r2, #32 - 8005a10: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005a70: 68fb ldr r3, [r7, #12] + 8005a72: 2220 movs r2, #32 + 8005a74: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; - 8005a14: 2303 movs r3, #3 - 8005a16: e006 b.n 8005a26 + 8005a78: 2303 movs r3, #3 + 8005a7a: e006 b.n 8005a8a } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8005a18: 68fb ldr r3, [r7, #12] - 8005a1a: 2220 movs r2, #32 - 8005a1c: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005a7c: 68fb ldr r3, [r7, #12] + 8005a7e: 2220 movs r2, #32 + 8005a80: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_OK; - 8005a20: 2300 movs r3, #0 - 8005a22: e000 b.n 8005a26 + 8005a84: 2300 movs r3, #0 + 8005a86: e000 b.n 8005a8a } else { return HAL_BUSY; - 8005a24: 2302 movs r3, #2 + 8005a88: 2302 movs r3, #2 } } - 8005a26: 4618 mov r0, r3 - 8005a28: 3720 adds r7, #32 - 8005a2a: 46bd mov sp, r7 - 8005a2c: bd80 pop {r7, pc} + 8005a8a: 4618 mov r0, r3 + 8005a8c: 3720 adds r7, #32 + 8005a8e: 46bd mov sp, r7 + 8005a90: bd80 pop {r7, pc} ... -08005a30 : +08005a94 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - 8005a30: b580 push {r7, lr} - 8005a32: b0ba sub sp, #232 @ 0xe8 - 8005a34: af00 add r7, sp, #0 - 8005a36: 6078 str r0, [r7, #4] + 8005a94: b580 push {r7, lr} + 8005a96: b0ba sub sp, #232 @ 0xe8 + 8005a98: af00 add r7, sp, #0 + 8005a9a: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->SR); - 8005a38: 687b ldr r3, [r7, #4] - 8005a3a: 681b ldr r3, [r3, #0] - 8005a3c: 681b ldr r3, [r3, #0] - 8005a3e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 + 8005a9c: 687b ldr r3, [r7, #4] + 8005a9e: 681b ldr r3, [r3, #0] + 8005aa0: 681b ldr r3, [r3, #0] + 8005aa2: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8005a42: 687b ldr r3, [r7, #4] - 8005a44: 681b ldr r3, [r3, #0] - 8005a46: 68db ldr r3, [r3, #12] - 8005a48: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 + 8005aa6: 687b ldr r3, [r7, #4] + 8005aa8: 681b ldr r3, [r3, #0] + 8005aaa: 68db ldr r3, [r3, #12] + 8005aac: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8005a4c: 687b ldr r3, [r7, #4] - 8005a4e: 681b ldr r3, [r3, #0] - 8005a50: 695b ldr r3, [r3, #20] - 8005a52: f8c7 30dc str.w r3, [r7, #220] @ 0xdc + 8005ab0: 687b ldr r3, [r7, #4] + 8005ab2: 681b ldr r3, [r3, #0] + 8005ab4: 695b ldr r3, [r3, #20] + 8005ab6: f8c7 30dc str.w r3, [r7, #220] @ 0xdc uint32_t errorflags = 0x00U; - 8005a56: 2300 movs r3, #0 - 8005a58: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 + 8005aba: 2300 movs r3, #0 + 8005abc: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 uint32_t dmarequest = 0x00U; - 8005a5c: 2300 movs r3, #0 - 8005a5e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 + 8005ac0: 2300 movs r3, #0 + 8005ac2: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); - 8005a62: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005a66: f003 030f and.w r3, r3, #15 - 8005a6a: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 + 8005ac6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005aca: f003 030f and.w r3, r3, #15 + 8005ace: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 if (errorflags == RESET) - 8005a6e: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 - 8005a72: 2b00 cmp r3, #0 - 8005a74: d10f bne.n 8005a96 + 8005ad2: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 + 8005ad6: 2b00 cmp r3, #0 + 8005ad8: d10f bne.n 8005afa { /* UART in mode Receiver -------------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 8005a76: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005a7a: f003 0320 and.w r3, r3, #32 - 8005a7e: 2b00 cmp r3, #0 - 8005a80: d009 beq.n 8005a96 - 8005a82: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005a86: f003 0320 and.w r3, r3, #32 - 8005a8a: 2b00 cmp r3, #0 - 8005a8c: d003 beq.n 8005a96 + 8005ada: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005ade: f003 0320 and.w r3, r3, #32 + 8005ae2: 2b00 cmp r3, #0 + 8005ae4: d009 beq.n 8005afa + 8005ae6: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005aea: f003 0320 and.w r3, r3, #32 + 8005aee: 2b00 cmp r3, #0 + 8005af0: d003 beq.n 8005afa { UART_Receive_IT(huart); - 8005a8e: 6878 ldr r0, [r7, #4] - 8005a90: f000 fbbc bl 800620c + 8005af2: 6878 ldr r0, [r7, #4] + 8005af4: f000 fbbc bl 8006270 return; - 8005a94: e25b b.n 8005f4e + 8005af8: e25b b.n 8005fb2 } } /* If some errors occur */ if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) - 8005a96: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 - 8005a9a: 2b00 cmp r3, #0 - 8005a9c: f000 80de beq.w 8005c5c - 8005aa0: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 8005aa4: f003 0301 and.w r3, r3, #1 - 8005aa8: 2b00 cmp r3, #0 - 8005aaa: d106 bne.n 8005aba + 8005afa: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 + 8005afe: 2b00 cmp r3, #0 + 8005b00: f000 80de beq.w 8005cc0 + 8005b04: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8005b08: f003 0301 and.w r3, r3, #1 + 8005b0c: 2b00 cmp r3, #0 + 8005b0e: d106 bne.n 8005b1e || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) - 8005aac: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005ab0: f403 7390 and.w r3, r3, #288 @ 0x120 - 8005ab4: 2b00 cmp r3, #0 - 8005ab6: f000 80d1 beq.w 8005c5c + 8005b10: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005b14: f403 7390 and.w r3, r3, #288 @ 0x120 + 8005b18: 2b00 cmp r3, #0 + 8005b1a: f000 80d1 beq.w 8005cc0 { /* UART parity error interrupt occurred ----------------------------------*/ if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) - 8005aba: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005abe: f003 0301 and.w r3, r3, #1 - 8005ac2: 2b00 cmp r3, #0 - 8005ac4: d00b beq.n 8005ade - 8005ac6: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005aca: f403 7380 and.w r3, r3, #256 @ 0x100 - 8005ace: 2b00 cmp r3, #0 - 8005ad0: d005 beq.n 8005ade + 8005b1e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005b22: f003 0301 and.w r3, r3, #1 + 8005b26: 2b00 cmp r3, #0 + 8005b28: d00b beq.n 8005b42 + 8005b2a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005b2e: f403 7380 and.w r3, r3, #256 @ 0x100 + 8005b32: 2b00 cmp r3, #0 + 8005b34: d005 beq.n 8005b42 { huart->ErrorCode |= HAL_UART_ERROR_PE; - 8005ad2: 687b ldr r3, [r7, #4] - 8005ad4: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005ad6: f043 0201 orr.w r2, r3, #1 - 8005ada: 687b ldr r3, [r7, #4] - 8005adc: 645a str r2, [r3, #68] @ 0x44 + 8005b36: 687b ldr r3, [r7, #4] + 8005b38: 6c5b ldr r3, [r3, #68] @ 0x44 + 8005b3a: f043 0201 orr.w r2, r3, #1 + 8005b3e: 687b ldr r3, [r7, #4] + 8005b40: 645a str r2, [r3, #68] @ 0x44 } /* UART noise error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 8005ade: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005ae2: f003 0304 and.w r3, r3, #4 - 8005ae6: 2b00 cmp r3, #0 - 8005ae8: d00b beq.n 8005b02 - 8005aea: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 8005aee: f003 0301 and.w r3, r3, #1 - 8005af2: 2b00 cmp r3, #0 - 8005af4: d005 beq.n 8005b02 + 8005b42: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005b46: f003 0304 and.w r3, r3, #4 + 8005b4a: 2b00 cmp r3, #0 + 8005b4c: d00b beq.n 8005b66 + 8005b4e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8005b52: f003 0301 and.w r3, r3, #1 + 8005b56: 2b00 cmp r3, #0 + 8005b58: d005 beq.n 8005b66 { huart->ErrorCode |= HAL_UART_ERROR_NE; - 8005af6: 687b ldr r3, [r7, #4] - 8005af8: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005afa: f043 0202 orr.w r2, r3, #2 - 8005afe: 687b ldr r3, [r7, #4] - 8005b00: 645a str r2, [r3, #68] @ 0x44 + 8005b5a: 687b ldr r3, [r7, #4] + 8005b5c: 6c5b ldr r3, [r3, #68] @ 0x44 + 8005b5e: f043 0202 orr.w r2, r3, #2 + 8005b62: 687b ldr r3, [r7, #4] + 8005b64: 645a str r2, [r3, #68] @ 0x44 } /* UART frame error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 8005b02: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005b06: f003 0302 and.w r3, r3, #2 - 8005b0a: 2b00 cmp r3, #0 - 8005b0c: d00b beq.n 8005b26 - 8005b0e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 8005b12: f003 0301 and.w r3, r3, #1 - 8005b16: 2b00 cmp r3, #0 - 8005b18: d005 beq.n 8005b26 + 8005b66: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005b6a: f003 0302 and.w r3, r3, #2 + 8005b6e: 2b00 cmp r3, #0 + 8005b70: d00b beq.n 8005b8a + 8005b72: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8005b76: f003 0301 and.w r3, r3, #1 + 8005b7a: 2b00 cmp r3, #0 + 8005b7c: d005 beq.n 8005b8a { huart->ErrorCode |= HAL_UART_ERROR_FE; - 8005b1a: 687b ldr r3, [r7, #4] - 8005b1c: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005b1e: f043 0204 orr.w r2, r3, #4 - 8005b22: 687b ldr r3, [r7, #4] - 8005b24: 645a str r2, [r3, #68] @ 0x44 + 8005b7e: 687b ldr r3, [r7, #4] + 8005b80: 6c5b ldr r3, [r3, #68] @ 0x44 + 8005b82: f043 0204 orr.w r2, r3, #4 + 8005b86: 687b ldr r3, [r7, #4] + 8005b88: 645a str r2, [r3, #68] @ 0x44 } /* UART Over-Run interrupt occurred --------------------------------------*/ if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) - 8005b26: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005b2a: f003 0308 and.w r3, r3, #8 - 8005b2e: 2b00 cmp r3, #0 - 8005b30: d011 beq.n 8005b56 - 8005b32: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005b36: f003 0320 and.w r3, r3, #32 - 8005b3a: 2b00 cmp r3, #0 - 8005b3c: d105 bne.n 8005b4a + 8005b8a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005b8e: f003 0308 and.w r3, r3, #8 + 8005b92: 2b00 cmp r3, #0 + 8005b94: d011 beq.n 8005bba + 8005b96: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005b9a: f003 0320 and.w r3, r3, #32 + 8005b9e: 2b00 cmp r3, #0 + 8005ba0: d105 bne.n 8005bae || ((cr3its & USART_CR3_EIE) != RESET))) - 8005b3e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 8005b42: f003 0301 and.w r3, r3, #1 - 8005b46: 2b00 cmp r3, #0 - 8005b48: d005 beq.n 8005b56 + 8005ba2: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8005ba6: f003 0301 and.w r3, r3, #1 + 8005baa: 2b00 cmp r3, #0 + 8005bac: d005 beq.n 8005bba { huart->ErrorCode |= HAL_UART_ERROR_ORE; - 8005b4a: 687b ldr r3, [r7, #4] - 8005b4c: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005b4e: f043 0208 orr.w r2, r3, #8 - 8005b52: 687b ldr r3, [r7, #4] - 8005b54: 645a str r2, [r3, #68] @ 0x44 + 8005bae: 687b ldr r3, [r7, #4] + 8005bb0: 6c5b ldr r3, [r3, #68] @ 0x44 + 8005bb2: f043 0208 orr.w r2, r3, #8 + 8005bb6: 687b ldr r3, [r7, #4] + 8005bb8: 645a str r2, [r3, #68] @ 0x44 } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8005b56: 687b ldr r3, [r7, #4] - 8005b58: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005b5a: 2b00 cmp r3, #0 - 8005b5c: f000 81f2 beq.w 8005f44 + 8005bba: 687b ldr r3, [r7, #4] + 8005bbc: 6c5b ldr r3, [r3, #68] @ 0x44 + 8005bbe: 2b00 cmp r3, #0 + 8005bc0: f000 81f2 beq.w 8005fa8 { /* UART in mode Receiver -----------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 8005b60: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005b64: f003 0320 and.w r3, r3, #32 - 8005b68: 2b00 cmp r3, #0 - 8005b6a: d008 beq.n 8005b7e - 8005b6c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005b70: f003 0320 and.w r3, r3, #32 - 8005b74: 2b00 cmp r3, #0 - 8005b76: d002 beq.n 8005b7e + 8005bc4: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005bc8: f003 0320 and.w r3, r3, #32 + 8005bcc: 2b00 cmp r3, #0 + 8005bce: d008 beq.n 8005be2 + 8005bd0: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005bd4: f003 0320 and.w r3, r3, #32 + 8005bd8: 2b00 cmp r3, #0 + 8005bda: d002 beq.n 8005be2 { UART_Receive_IT(huart); - 8005b78: 6878 ldr r0, [r7, #4] - 8005b7a: f000 fb47 bl 800620c + 8005bdc: 6878 ldr r0, [r7, #4] + 8005bde: f000 fb47 bl 8006270 } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - 8005b7e: 687b ldr r3, [r7, #4] - 8005b80: 681b ldr r3, [r3, #0] - 8005b82: 695b ldr r3, [r3, #20] - 8005b84: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005b88: 2b00 cmp r3, #0 - 8005b8a: bf14 ite ne - 8005b8c: 2301 movne r3, #1 - 8005b8e: 2300 moveq r3, #0 - 8005b90: b2db uxtb r3, r3 - 8005b92: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 + 8005be2: 687b ldr r3, [r7, #4] + 8005be4: 681b ldr r3, [r3, #0] + 8005be6: 695b ldr r3, [r3, #20] + 8005be8: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005bec: 2b00 cmp r3, #0 + 8005bee: bf14 ite ne + 8005bf0: 2301 movne r3, #1 + 8005bf2: 2300 moveq r3, #0 + 8005bf4: b2db uxtb r3, r3 + 8005bf6: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) - 8005b96: 687b ldr r3, [r7, #4] - 8005b98: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005b9a: f003 0308 and.w r3, r3, #8 - 8005b9e: 2b00 cmp r3, #0 - 8005ba0: d103 bne.n 8005baa - 8005ba2: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 - 8005ba6: 2b00 cmp r3, #0 - 8005ba8: d04f beq.n 8005c4a + 8005bfa: 687b ldr r3, [r7, #4] + 8005bfc: 6c5b ldr r3, [r3, #68] @ 0x44 + 8005bfe: f003 0308 and.w r3, r3, #8 + 8005c02: 2b00 cmp r3, #0 + 8005c04: d103 bne.n 8005c0e + 8005c06: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 + 8005c0a: 2b00 cmp r3, #0 + 8005c0c: d04f beq.n 8005cae { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); - 8005baa: 6878 ldr r0, [r7, #4] - 8005bac: f000 fa51 bl 8006052 + 8005c0e: 6878 ldr r0, [r7, #4] + 8005c10: f000 fa51 bl 80060b6 /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005bb0: 687b ldr r3, [r7, #4] - 8005bb2: 681b ldr r3, [r3, #0] - 8005bb4: 695b ldr r3, [r3, #20] - 8005bb6: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005bba: 2b00 cmp r3, #0 - 8005bbc: d041 beq.n 8005c42 + 8005c14: 687b ldr r3, [r7, #4] + 8005c16: 681b ldr r3, [r3, #0] + 8005c18: 695b ldr r3, [r3, #20] + 8005c1a: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005c1e: 2b00 cmp r3, #0 + 8005c20: d041 beq.n 8005ca6 { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8005bbe: 687b ldr r3, [r7, #4] - 8005bc0: 681b ldr r3, [r3, #0] - 8005bc2: 3314 adds r3, #20 - 8005bc4: f8c7 309c str.w r3, [r7, #156] @ 0x9c + 8005c22: 687b ldr r3, [r7, #4] + 8005c24: 681b ldr r3, [r3, #0] + 8005c26: 3314 adds r3, #20 + 8005c28: f8c7 309c str.w r3, [r7, #156] @ 0x9c */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005bc8: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c - 8005bcc: e853 3f00 ldrex r3, [r3] - 8005bd0: f8c7 3098 str.w r3, [r7, #152] @ 0x98 + 8005c2c: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c + 8005c30: e853 3f00 ldrex r3, [r3] + 8005c34: f8c7 3098 str.w r3, [r7, #152] @ 0x98 return(result); - 8005bd4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 - 8005bd8: f023 0340 bic.w r3, r3, #64 @ 0x40 - 8005bdc: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 - 8005be0: 687b ldr r3, [r7, #4] - 8005be2: 681b ldr r3, [r3, #0] - 8005be4: 3314 adds r3, #20 - 8005be6: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 - 8005bea: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 - 8005bee: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 + 8005c38: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 + 8005c3c: f023 0340 bic.w r3, r3, #64 @ 0x40 + 8005c40: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 + 8005c44: 687b ldr r3, [r7, #4] + 8005c46: 681b ldr r3, [r3, #0] + 8005c48: 3314 adds r3, #20 + 8005c4a: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 + 8005c4e: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 + 8005c52: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005bf2: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 - 8005bf6: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 - 8005bfa: e841 2300 strex r3, r2, [r1] - 8005bfe: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 + 8005c56: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 + 8005c5a: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 + 8005c5e: e841 2300 strex r3, r2, [r1] + 8005c62: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 return(result); - 8005c02: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 - 8005c06: 2b00 cmp r3, #0 - 8005c08: d1d9 bne.n 8005bbe + 8005c66: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 + 8005c6a: 2b00 cmp r3, #0 + 8005c6c: d1d9 bne.n 8005c22 /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) - 8005c0a: 687b ldr r3, [r7, #4] - 8005c0c: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005c0e: 2b00 cmp r3, #0 - 8005c10: d013 beq.n 8005c3a + 8005c6e: 687b ldr r3, [r7, #4] + 8005c70: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005c72: 2b00 cmp r3, #0 + 8005c74: d013 beq.n 8005c9e { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 8005c12: 687b ldr r3, [r7, #4] - 8005c14: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005c16: 4a7e ldr r2, [pc, #504] @ (8005e10 ) - 8005c18: 635a str r2, [r3, #52] @ 0x34 + 8005c76: 687b ldr r3, [r7, #4] + 8005c78: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005c7a: 4a7e ldr r2, [pc, #504] @ (8005e74 ) + 8005c7c: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 8005c1a: 687b ldr r3, [r7, #4] - 8005c1c: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005c1e: 4618 mov r0, r3 - 8005c20: f7fd fcea bl 80035f8 - 8005c24: 4603 mov r3, r0 - 8005c26: 2b00 cmp r3, #0 - 8005c28: d016 beq.n 8005c58 + 8005c7e: 687b ldr r3, [r7, #4] + 8005c80: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005c82: 4618 mov r0, r3 + 8005c84: f7fd faf8 bl 8003278 + 8005c88: 4603 mov r3, r0 + 8005c8a: 2b00 cmp r3, #0 + 8005c8c: d016 beq.n 8005cbc { /* Call Directly XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); - 8005c2a: 687b ldr r3, [r7, #4] - 8005c2c: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005c2e: 6b5b ldr r3, [r3, #52] @ 0x34 - 8005c30: 687a ldr r2, [r7, #4] - 8005c32: 6bd2 ldr r2, [r2, #60] @ 0x3c - 8005c34: 4610 mov r0, r2 - 8005c36: 4798 blx r3 + 8005c8e: 687b ldr r3, [r7, #4] + 8005c90: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005c92: 6b5b ldr r3, [r3, #52] @ 0x34 + 8005c94: 687a ldr r2, [r7, #4] + 8005c96: 6bd2 ldr r2, [r2, #60] @ 0x3c + 8005c98: 4610 mov r0, r2 + 8005c9a: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005c38: e00e b.n 8005c58 + 8005c9c: e00e b.n 8005cbc #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005c3a: 6878 ldr r0, [r7, #4] - 8005c3c: f000 f99c bl 8005f78 + 8005c9e: 6878 ldr r0, [r7, #4] + 8005ca0: f000 f99c bl 8005fdc if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005c40: e00a b.n 8005c58 + 8005ca4: e00a b.n 8005cbc #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005c42: 6878 ldr r0, [r7, #4] - 8005c44: f000 f998 bl 8005f78 + 8005ca6: 6878 ldr r0, [r7, #4] + 8005ca8: f000 f998 bl 8005fdc if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005c48: e006 b.n 8005c58 + 8005cac: e006 b.n 8005cbc #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005c4a: 6878 ldr r0, [r7, #4] - 8005c4c: f000 f994 bl 8005f78 + 8005cae: 6878 ldr r0, [r7, #4] + 8005cb0: f000 f994 bl 8005fdc #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8005c50: 687b ldr r3, [r7, #4] - 8005c52: 2200 movs r2, #0 - 8005c54: 645a str r2, [r3, #68] @ 0x44 + 8005cb4: 687b ldr r3, [r7, #4] + 8005cb6: 2200 movs r2, #0 + 8005cb8: 645a str r2, [r3, #68] @ 0x44 } } return; - 8005c56: e175 b.n 8005f44 + 8005cba: e175 b.n 8005fa8 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005c58: bf00 nop + 8005cbc: bf00 nop return; - 8005c5a: e173 b.n 8005f44 + 8005cbe: e173 b.n 8005fa8 } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8005c5c: 687b ldr r3, [r7, #4] - 8005c5e: 6b1b ldr r3, [r3, #48] @ 0x30 - 8005c60: 2b01 cmp r3, #1 - 8005c62: f040 814f bne.w 8005f04 + 8005cc0: 687b ldr r3, [r7, #4] + 8005cc2: 6b1b ldr r3, [r3, #48] @ 0x30 + 8005cc4: 2b01 cmp r3, #1 + 8005cc6: f040 814f bne.w 8005f68 && ((isrflags & USART_SR_IDLE) != 0U) - 8005c66: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005c6a: f003 0310 and.w r3, r3, #16 - 8005c6e: 2b00 cmp r3, #0 - 8005c70: f000 8148 beq.w 8005f04 + 8005cca: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005cce: f003 0310 and.w r3, r3, #16 + 8005cd2: 2b00 cmp r3, #0 + 8005cd4: f000 8148 beq.w 8005f68 && ((cr1its & USART_SR_IDLE) != 0U)) - 8005c74: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005c78: f003 0310 and.w r3, r3, #16 - 8005c7c: 2b00 cmp r3, #0 - 8005c7e: f000 8141 beq.w 8005f04 + 8005cd8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005cdc: f003 0310 and.w r3, r3, #16 + 8005ce0: 2b00 cmp r3, #0 + 8005ce2: f000 8141 beq.w 8005f68 { __HAL_UART_CLEAR_IDLEFLAG(huart); - 8005c82: 2300 movs r3, #0 - 8005c84: 60bb str r3, [r7, #8] - 8005c86: 687b ldr r3, [r7, #4] - 8005c88: 681b ldr r3, [r3, #0] - 8005c8a: 681b ldr r3, [r3, #0] - 8005c8c: 60bb str r3, [r7, #8] - 8005c8e: 687b ldr r3, [r7, #4] - 8005c90: 681b ldr r3, [r3, #0] - 8005c92: 685b ldr r3, [r3, #4] - 8005c94: 60bb str r3, [r7, #8] - 8005c96: 68bb ldr r3, [r7, #8] + 8005ce6: 2300 movs r3, #0 + 8005ce8: 60bb str r3, [r7, #8] + 8005cea: 687b ldr r3, [r7, #4] + 8005cec: 681b ldr r3, [r3, #0] + 8005cee: 681b ldr r3, [r3, #0] + 8005cf0: 60bb str r3, [r7, #8] + 8005cf2: 687b ldr r3, [r7, #4] + 8005cf4: 681b ldr r3, [r3, #0] + 8005cf6: 685b ldr r3, [r3, #4] + 8005cf8: 60bb str r3, [r7, #8] + 8005cfa: 68bb ldr r3, [r7, #8] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005c98: 687b ldr r3, [r7, #4] - 8005c9a: 681b ldr r3, [r3, #0] - 8005c9c: 695b ldr r3, [r3, #20] - 8005c9e: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005ca2: 2b00 cmp r3, #0 - 8005ca4: f000 80b6 beq.w 8005e14 + 8005cfc: 687b ldr r3, [r7, #4] + 8005cfe: 681b ldr r3, [r3, #0] + 8005d00: 695b ldr r3, [r3, #20] + 8005d02: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005d06: 2b00 cmp r3, #0 + 8005d08: f000 80b6 beq.w 8005e78 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 8005ca8: 687b ldr r3, [r7, #4] - 8005caa: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005cac: 681b ldr r3, [r3, #0] - 8005cae: 685b ldr r3, [r3, #4] - 8005cb0: f8a7 30be strh.w r3, [r7, #190] @ 0xbe + 8005d0c: 687b ldr r3, [r7, #4] + 8005d0e: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005d10: 681b ldr r3, [r3, #0] + 8005d12: 685b ldr r3, [r3, #4] + 8005d14: f8a7 30be strh.w r3, [r7, #190] @ 0xbe if ((nb_remaining_rx_data > 0U) - 8005cb4: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe - 8005cb8: 2b00 cmp r3, #0 - 8005cba: f000 8145 beq.w 8005f48 + 8005d18: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe + 8005d1c: 2b00 cmp r3, #0 + 8005d1e: f000 8145 beq.w 8005fac && (nb_remaining_rx_data < huart->RxXferSize)) - 8005cbe: 687b ldr r3, [r7, #4] - 8005cc0: 8d9b ldrh r3, [r3, #44] @ 0x2c - 8005cc2: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe - 8005cc6: 429a cmp r2, r3 - 8005cc8: f080 813e bcs.w 8005f48 + 8005d22: 687b ldr r3, [r7, #4] + 8005d24: 8d9b ldrh r3, [r3, #44] @ 0x2c + 8005d26: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe + 8005d2a: 429a cmp r2, r3 + 8005d2c: f080 813e bcs.w 8005fac { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; - 8005ccc: 687b ldr r3, [r7, #4] - 8005cce: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe - 8005cd2: 85da strh r2, [r3, #46] @ 0x2e + 8005d30: 687b ldr r3, [r7, #4] + 8005d32: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe + 8005d36: 85da strh r2, [r3, #46] @ 0x2e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) - 8005cd4: 687b ldr r3, [r7, #4] - 8005cd6: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005cd8: 699b ldr r3, [r3, #24] - 8005cda: 2b20 cmp r3, #32 - 8005cdc: f000 8088 beq.w 8005df0 + 8005d38: 687b ldr r3, [r7, #4] + 8005d3a: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005d3c: 699b ldr r3, [r3, #24] + 8005d3e: 2b20 cmp r3, #32 + 8005d40: f000 8088 beq.w 8005e54 { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8005ce0: 687b ldr r3, [r7, #4] - 8005ce2: 681b ldr r3, [r3, #0] - 8005ce4: 330c adds r3, #12 - 8005ce6: f8c7 3088 str.w r3, [r7, #136] @ 0x88 + 8005d44: 687b ldr r3, [r7, #4] + 8005d46: 681b ldr r3, [r3, #0] + 8005d48: 330c adds r3, #12 + 8005d4a: f8c7 3088 str.w r3, [r7, #136] @ 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005cea: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 - 8005cee: e853 3f00 ldrex r3, [r3] - 8005cf2: f8c7 3084 str.w r3, [r7, #132] @ 0x84 + 8005d4e: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 + 8005d52: e853 3f00 ldrex r3, [r3] + 8005d56: f8c7 3084 str.w r3, [r7, #132] @ 0x84 return(result); - 8005cf6: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 - 8005cfa: f423 7380 bic.w r3, r3, #256 @ 0x100 - 8005cfe: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 - 8005d02: 687b ldr r3, [r7, #4] - 8005d04: 681b ldr r3, [r3, #0] - 8005d06: 330c adds r3, #12 - 8005d08: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 - 8005d0c: f8c7 2094 str.w r2, [r7, #148] @ 0x94 - 8005d10: f8c7 3090 str.w r3, [r7, #144] @ 0x90 + 8005d5a: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 + 8005d5e: f423 7380 bic.w r3, r3, #256 @ 0x100 + 8005d62: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 + 8005d66: 687b ldr r3, [r7, #4] + 8005d68: 681b ldr r3, [r3, #0] + 8005d6a: 330c adds r3, #12 + 8005d6c: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 + 8005d70: f8c7 2094 str.w r2, [r7, #148] @ 0x94 + 8005d74: f8c7 3090 str.w r3, [r7, #144] @ 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005d14: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 - 8005d18: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 - 8005d1c: e841 2300 strex r3, r2, [r1] - 8005d20: f8c7 308c str.w r3, [r7, #140] @ 0x8c + 8005d78: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 + 8005d7c: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 + 8005d80: e841 2300 strex r3, r2, [r1] + 8005d84: f8c7 308c str.w r3, [r7, #140] @ 0x8c return(result); - 8005d24: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c - 8005d28: 2b00 cmp r3, #0 - 8005d2a: d1d9 bne.n 8005ce0 + 8005d88: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c + 8005d8c: 2b00 cmp r3, #0 + 8005d8e: d1d9 bne.n 8005d44 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005d2c: 687b ldr r3, [r7, #4] - 8005d2e: 681b ldr r3, [r3, #0] - 8005d30: 3314 adds r3, #20 - 8005d32: 677b str r3, [r7, #116] @ 0x74 + 8005d90: 687b ldr r3, [r7, #4] + 8005d92: 681b ldr r3, [r3, #0] + 8005d94: 3314 adds r3, #20 + 8005d96: 677b str r3, [r7, #116] @ 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005d34: 6f7b ldr r3, [r7, #116] @ 0x74 - 8005d36: e853 3f00 ldrex r3, [r3] - 8005d3a: 673b str r3, [r7, #112] @ 0x70 + 8005d98: 6f7b ldr r3, [r7, #116] @ 0x74 + 8005d9a: e853 3f00 ldrex r3, [r3] + 8005d9e: 673b str r3, [r7, #112] @ 0x70 return(result); - 8005d3c: 6f3b ldr r3, [r7, #112] @ 0x70 - 8005d3e: f023 0301 bic.w r3, r3, #1 - 8005d42: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 - 8005d46: 687b ldr r3, [r7, #4] - 8005d48: 681b ldr r3, [r3, #0] - 8005d4a: 3314 adds r3, #20 - 8005d4c: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 - 8005d50: f8c7 2080 str.w r2, [r7, #128] @ 0x80 - 8005d54: 67fb str r3, [r7, #124] @ 0x7c + 8005da0: 6f3b ldr r3, [r7, #112] @ 0x70 + 8005da2: f023 0301 bic.w r3, r3, #1 + 8005da6: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 + 8005daa: 687b ldr r3, [r7, #4] + 8005dac: 681b ldr r3, [r3, #0] + 8005dae: 3314 adds r3, #20 + 8005db0: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 + 8005db4: f8c7 2080 str.w r2, [r7, #128] @ 0x80 + 8005db8: 67fb str r3, [r7, #124] @ 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005d56: 6ff9 ldr r1, [r7, #124] @ 0x7c - 8005d58: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 - 8005d5c: e841 2300 strex r3, r2, [r1] - 8005d60: 67bb str r3, [r7, #120] @ 0x78 + 8005dba: 6ff9 ldr r1, [r7, #124] @ 0x7c + 8005dbc: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 + 8005dc0: e841 2300 strex r3, r2, [r1] + 8005dc4: 67bb str r3, [r7, #120] @ 0x78 return(result); - 8005d62: 6fbb ldr r3, [r7, #120] @ 0x78 - 8005d64: 2b00 cmp r3, #0 - 8005d66: d1e1 bne.n 8005d2c + 8005dc6: 6fbb ldr r3, [r7, #120] @ 0x78 + 8005dc8: 2b00 cmp r3, #0 + 8005dca: d1e1 bne.n 8005d90 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8005d68: 687b ldr r3, [r7, #4] - 8005d6a: 681b ldr r3, [r3, #0] - 8005d6c: 3314 adds r3, #20 - 8005d6e: 663b str r3, [r7, #96] @ 0x60 + 8005dcc: 687b ldr r3, [r7, #4] + 8005dce: 681b ldr r3, [r3, #0] + 8005dd0: 3314 adds r3, #20 + 8005dd2: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005d70: 6e3b ldr r3, [r7, #96] @ 0x60 - 8005d72: e853 3f00 ldrex r3, [r3] - 8005d76: 65fb str r3, [r7, #92] @ 0x5c + 8005dd4: 6e3b ldr r3, [r7, #96] @ 0x60 + 8005dd6: e853 3f00 ldrex r3, [r3] + 8005dda: 65fb str r3, [r7, #92] @ 0x5c return(result); - 8005d78: 6dfb ldr r3, [r7, #92] @ 0x5c - 8005d7a: f023 0340 bic.w r3, r3, #64 @ 0x40 - 8005d7e: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 - 8005d82: 687b ldr r3, [r7, #4] - 8005d84: 681b ldr r3, [r3, #0] - 8005d86: 3314 adds r3, #20 - 8005d88: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 - 8005d8c: 66fa str r2, [r7, #108] @ 0x6c - 8005d8e: 66bb str r3, [r7, #104] @ 0x68 + 8005ddc: 6dfb ldr r3, [r7, #92] @ 0x5c + 8005dde: f023 0340 bic.w r3, r3, #64 @ 0x40 + 8005de2: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 + 8005de6: 687b ldr r3, [r7, #4] + 8005de8: 681b ldr r3, [r3, #0] + 8005dea: 3314 adds r3, #20 + 8005dec: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 + 8005df0: 66fa str r2, [r7, #108] @ 0x6c + 8005df2: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005d90: 6eb9 ldr r1, [r7, #104] @ 0x68 - 8005d92: 6efa ldr r2, [r7, #108] @ 0x6c - 8005d94: e841 2300 strex r3, r2, [r1] - 8005d98: 667b str r3, [r7, #100] @ 0x64 + 8005df4: 6eb9 ldr r1, [r7, #104] @ 0x68 + 8005df6: 6efa ldr r2, [r7, #108] @ 0x6c + 8005df8: e841 2300 strex r3, r2, [r1] + 8005dfc: 667b str r3, [r7, #100] @ 0x64 return(result); - 8005d9a: 6e7b ldr r3, [r7, #100] @ 0x64 - 8005d9c: 2b00 cmp r3, #0 - 8005d9e: d1e3 bne.n 8005d68 + 8005dfe: 6e7b ldr r3, [r7, #100] @ 0x64 + 8005e00: 2b00 cmp r3, #0 + 8005e02: d1e3 bne.n 8005dcc /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8005da0: 687b ldr r3, [r7, #4] - 8005da2: 2220 movs r2, #32 - 8005da4: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005e04: 687b ldr r3, [r7, #4] + 8005e06: 2220 movs r2, #32 + 8005e08: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005da8: 687b ldr r3, [r7, #4] - 8005daa: 2200 movs r2, #0 - 8005dac: 631a str r2, [r3, #48] @ 0x30 + 8005e0c: 687b ldr r3, [r7, #4] + 8005e0e: 2200 movs r2, #0 + 8005e10: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005dae: 687b ldr r3, [r7, #4] - 8005db0: 681b ldr r3, [r3, #0] - 8005db2: 330c adds r3, #12 - 8005db4: 64fb str r3, [r7, #76] @ 0x4c + 8005e12: 687b ldr r3, [r7, #4] + 8005e14: 681b ldr r3, [r3, #0] + 8005e16: 330c adds r3, #12 + 8005e18: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005db6: 6cfb ldr r3, [r7, #76] @ 0x4c - 8005db8: e853 3f00 ldrex r3, [r3] - 8005dbc: 64bb str r3, [r7, #72] @ 0x48 + 8005e1a: 6cfb ldr r3, [r7, #76] @ 0x4c + 8005e1c: e853 3f00 ldrex r3, [r3] + 8005e20: 64bb str r3, [r7, #72] @ 0x48 return(result); - 8005dbe: 6cbb ldr r3, [r7, #72] @ 0x48 - 8005dc0: f023 0310 bic.w r3, r3, #16 - 8005dc4: f8c7 30ac str.w r3, [r7, #172] @ 0xac - 8005dc8: 687b ldr r3, [r7, #4] - 8005dca: 681b ldr r3, [r3, #0] - 8005dcc: 330c adds r3, #12 - 8005dce: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac - 8005dd2: 65ba str r2, [r7, #88] @ 0x58 - 8005dd4: 657b str r3, [r7, #84] @ 0x54 + 8005e22: 6cbb ldr r3, [r7, #72] @ 0x48 + 8005e24: f023 0310 bic.w r3, r3, #16 + 8005e28: f8c7 30ac str.w r3, [r7, #172] @ 0xac + 8005e2c: 687b ldr r3, [r7, #4] + 8005e2e: 681b ldr r3, [r3, #0] + 8005e30: 330c adds r3, #12 + 8005e32: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac + 8005e36: 65ba str r2, [r7, #88] @ 0x58 + 8005e38: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005dd6: 6d79 ldr r1, [r7, #84] @ 0x54 - 8005dd8: 6dba ldr r2, [r7, #88] @ 0x58 - 8005dda: e841 2300 strex r3, r2, [r1] - 8005dde: 653b str r3, [r7, #80] @ 0x50 + 8005e3a: 6d79 ldr r1, [r7, #84] @ 0x54 + 8005e3c: 6dba ldr r2, [r7, #88] @ 0x58 + 8005e3e: e841 2300 strex r3, r2, [r1] + 8005e42: 653b str r3, [r7, #80] @ 0x50 return(result); - 8005de0: 6d3b ldr r3, [r7, #80] @ 0x50 - 8005de2: 2b00 cmp r3, #0 - 8005de4: d1e3 bne.n 8005dae + 8005e44: 6d3b ldr r3, [r7, #80] @ 0x50 + 8005e46: 2b00 cmp r3, #0 + 8005e48: d1e3 bne.n 8005e12 /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); - 8005de6: 687b ldr r3, [r7, #4] - 8005de8: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005dea: 4618 mov r0, r3 - 8005dec: f7fd fbc9 bl 8003582 + 8005e4a: 687b ldr r3, [r7, #4] + 8005e4c: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005e4e: 4618 mov r0, r3 + 8005e50: f7fd f9d7 bl 8003202 } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 8005df0: 687b ldr r3, [r7, #4] - 8005df2: 2202 movs r2, #2 - 8005df4: 635a str r2, [r3, #52] @ 0x34 + 8005e54: 687b ldr r3, [r7, #4] + 8005e56: 2202 movs r2, #2 + 8005e58: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 8005df6: 687b ldr r3, [r7, #4] - 8005df8: 8d9a ldrh r2, [r3, #44] @ 0x2c - 8005dfa: 687b ldr r3, [r7, #4] - 8005dfc: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8005dfe: b29b uxth r3, r3 - 8005e00: 1ad3 subs r3, r2, r3 - 8005e02: b29b uxth r3, r3 - 8005e04: 4619 mov r1, r3 - 8005e06: 6878 ldr r0, [r7, #4] - 8005e08: f000 f8bf bl 8005f8a + 8005e5a: 687b ldr r3, [r7, #4] + 8005e5c: 8d9a ldrh r2, [r3, #44] @ 0x2c + 8005e5e: 687b ldr r3, [r7, #4] + 8005e60: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8005e62: b29b uxth r3, r3 + 8005e64: 1ad3 subs r3, r2, r3 + 8005e66: b29b uxth r3, r3 + 8005e68: 4619 mov r1, r3 + 8005e6a: 6878 ldr r0, [r7, #4] + 8005e6c: f000 f8bf bl 8005fee #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; - 8005e0c: e09c b.n 8005f48 - 8005e0e: bf00 nop - 8005e10: 08006117 .word 0x08006117 + 8005e70: e09c b.n 8005fac + 8005e72: bf00 nop + 8005e74: 0800617b .word 0x0800617b else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 8005e14: 687b ldr r3, [r7, #4] - 8005e16: 8d9a ldrh r2, [r3, #44] @ 0x2c - 8005e18: 687b ldr r3, [r7, #4] - 8005e1a: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8005e1c: b29b uxth r3, r3 - 8005e1e: 1ad3 subs r3, r2, r3 - 8005e20: f8a7 30ce strh.w r3, [r7, #206] @ 0xce + 8005e78: 687b ldr r3, [r7, #4] + 8005e7a: 8d9a ldrh r2, [r3, #44] @ 0x2c + 8005e7c: 687b ldr r3, [r7, #4] + 8005e7e: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8005e80: b29b uxth r3, r3 + 8005e82: 1ad3 subs r3, r2, r3 + 8005e84: f8a7 30ce strh.w r3, [r7, #206] @ 0xce if ((huart->RxXferCount > 0U) - 8005e24: 687b ldr r3, [r7, #4] - 8005e26: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8005e28: b29b uxth r3, r3 - 8005e2a: 2b00 cmp r3, #0 - 8005e2c: f000 808e beq.w 8005f4c + 8005e88: 687b ldr r3, [r7, #4] + 8005e8a: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8005e8c: b29b uxth r3, r3 + 8005e8e: 2b00 cmp r3, #0 + 8005e90: f000 808e beq.w 8005fb0 && (nb_rx_data > 0U)) - 8005e30: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce - 8005e34: 2b00 cmp r3, #0 - 8005e36: f000 8089 beq.w 8005f4c + 8005e94: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce + 8005e98: 2b00 cmp r3, #0 + 8005e9a: f000 8089 beq.w 8005fb0 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8005e3a: 687b ldr r3, [r7, #4] - 8005e3c: 681b ldr r3, [r3, #0] - 8005e3e: 330c adds r3, #12 - 8005e40: 63bb str r3, [r7, #56] @ 0x38 + 8005e9e: 687b ldr r3, [r7, #4] + 8005ea0: 681b ldr r3, [r3, #0] + 8005ea2: 330c adds r3, #12 + 8005ea4: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005e42: 6bbb ldr r3, [r7, #56] @ 0x38 - 8005e44: e853 3f00 ldrex r3, [r3] - 8005e48: 637b str r3, [r7, #52] @ 0x34 + 8005ea6: 6bbb ldr r3, [r7, #56] @ 0x38 + 8005ea8: e853 3f00 ldrex r3, [r3] + 8005eac: 637b str r3, [r7, #52] @ 0x34 return(result); - 8005e4a: 6b7b ldr r3, [r7, #52] @ 0x34 - 8005e4c: f423 7390 bic.w r3, r3, #288 @ 0x120 - 8005e50: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 - 8005e54: 687b ldr r3, [r7, #4] - 8005e56: 681b ldr r3, [r3, #0] - 8005e58: 330c adds r3, #12 - 8005e5a: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 - 8005e5e: 647a str r2, [r7, #68] @ 0x44 - 8005e60: 643b str r3, [r7, #64] @ 0x40 - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005e62: 6c39 ldr r1, [r7, #64] @ 0x40 - 8005e64: 6c7a ldr r2, [r7, #68] @ 0x44 - 8005e66: e841 2300 strex r3, r2, [r1] - 8005e6a: 63fb str r3, [r7, #60] @ 0x3c - return(result); - 8005e6c: 6bfb ldr r3, [r7, #60] @ 0x3c - 8005e6e: 2b00 cmp r3, #0 - 8005e70: d1e3 bne.n 8005e3a - - /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005e72: 687b ldr r3, [r7, #4] - 8005e74: 681b ldr r3, [r3, #0] - 8005e76: 3314 adds r3, #20 - 8005e78: 627b str r3, [r7, #36] @ 0x24 - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005e7a: 6a7b ldr r3, [r7, #36] @ 0x24 - 8005e7c: e853 3f00 ldrex r3, [r3] - 8005e80: 623b str r3, [r7, #32] - return(result); - 8005e82: 6a3b ldr r3, [r7, #32] - 8005e84: f023 0301 bic.w r3, r3, #1 - 8005e88: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 - 8005e8c: 687b ldr r3, [r7, #4] - 8005e8e: 681b ldr r3, [r3, #0] - 8005e90: 3314 adds r3, #20 - 8005e92: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 - 8005e96: 633a str r2, [r7, #48] @ 0x30 - 8005e98: 62fb str r3, [r7, #44] @ 0x2c - __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005e9a: 6af9 ldr r1, [r7, #44] @ 0x2c - 8005e9c: 6b3a ldr r2, [r7, #48] @ 0x30 - 8005e9e: e841 2300 strex r3, r2, [r1] - 8005ea2: 62bb str r3, [r7, #40] @ 0x28 - return(result); - 8005ea4: 6abb ldr r3, [r7, #40] @ 0x28 - 8005ea6: 2b00 cmp r3, #0 - 8005ea8: d1e3 bne.n 8005e72 - - /* Rx process is completed, restore huart->RxState to Ready */ - huart->RxState = HAL_UART_STATE_READY; - 8005eaa: 687b ldr r3, [r7, #4] - 8005eac: 2220 movs r2, #32 - 8005eae: f883 2042 strb.w r2, [r3, #66] @ 0x42 - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005eb2: 687b ldr r3, [r7, #4] - 8005eb4: 2200 movs r2, #0 - 8005eb6: 631a str r2, [r3, #48] @ 0x30 - - ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + 8005eae: 6b7b ldr r3, [r7, #52] @ 0x34 + 8005eb0: f423 7390 bic.w r3, r3, #288 @ 0x120 + 8005eb4: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 8005eb8: 687b ldr r3, [r7, #4] 8005eba: 681b ldr r3, [r3, #0] 8005ebc: 330c adds r3, #12 - 8005ebe: 613b str r3, [r7, #16] - __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005ec0: 693b ldr r3, [r7, #16] - 8005ec2: e853 3f00 ldrex r3, [r3] - 8005ec6: 60fb str r3, [r7, #12] - return(result); - 8005ec8: 68fb ldr r3, [r7, #12] - 8005eca: f023 0310 bic.w r3, r3, #16 - 8005ece: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 - 8005ed2: 687b ldr r3, [r7, #4] - 8005ed4: 681b ldr r3, [r3, #0] - 8005ed6: 330c adds r3, #12 - 8005ed8: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 - 8005edc: 61fa str r2, [r7, #28] - 8005ede: 61bb str r3, [r7, #24] + 8005ebe: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 + 8005ec2: 647a str r2, [r7, #68] @ 0x44 + 8005ec4: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005ee0: 69b9 ldr r1, [r7, #24] - 8005ee2: 69fa ldr r2, [r7, #28] - 8005ee4: e841 2300 strex r3, r2, [r1] - 8005ee8: 617b str r3, [r7, #20] + 8005ec6: 6c39 ldr r1, [r7, #64] @ 0x40 + 8005ec8: 6c7a ldr r2, [r7, #68] @ 0x44 + 8005eca: e841 2300 strex r3, r2, [r1] + 8005ece: 63fb str r3, [r7, #60] @ 0x3c return(result); - 8005eea: 697b ldr r3, [r7, #20] - 8005eec: 2b00 cmp r3, #0 - 8005eee: d1e3 bne.n 8005eb8 + 8005ed0: 6bfb ldr r3, [r7, #60] @ 0x3c + 8005ed2: 2b00 cmp r3, #0 + 8005ed4: d1e3 bne.n 8005e9e + + /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + 8005ed6: 687b ldr r3, [r7, #4] + 8005ed8: 681b ldr r3, [r3, #0] + 8005eda: 3314 adds r3, #20 + 8005edc: 627b str r3, [r7, #36] @ 0x24 + __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); + 8005ede: 6a7b ldr r3, [r7, #36] @ 0x24 + 8005ee0: e853 3f00 ldrex r3, [r3] + 8005ee4: 623b str r3, [r7, #32] + return(result); + 8005ee6: 6a3b ldr r3, [r7, #32] + 8005ee8: f023 0301 bic.w r3, r3, #1 + 8005eec: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 + 8005ef0: 687b ldr r3, [r7, #4] + 8005ef2: 681b ldr r3, [r3, #0] + 8005ef4: 3314 adds r3, #20 + 8005ef6: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 + 8005efa: 633a str r2, [r7, #48] @ 0x30 + 8005efc: 62fb str r3, [r7, #44] @ 0x2c + __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); + 8005efe: 6af9 ldr r1, [r7, #44] @ 0x2c + 8005f00: 6b3a ldr r2, [r7, #48] @ 0x30 + 8005f02: e841 2300 strex r3, r2, [r1] + 8005f06: 62bb str r3, [r7, #40] @ 0x28 + return(result); + 8005f08: 6abb ldr r3, [r7, #40] @ 0x28 + 8005f0a: 2b00 cmp r3, #0 + 8005f0c: d1e3 bne.n 8005ed6 + + /* Rx process is completed, restore huart->RxState to Ready */ + huart->RxState = HAL_UART_STATE_READY; + 8005f0e: 687b ldr r3, [r7, #4] + 8005f10: 2220 movs r2, #32 + 8005f12: f883 2042 strb.w r2, [r3, #66] @ 0x42 + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + 8005f16: 687b ldr r3, [r7, #4] + 8005f18: 2200 movs r2, #0 + 8005f1a: 631a str r2, [r3, #48] @ 0x30 + + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + 8005f1c: 687b ldr r3, [r7, #4] + 8005f1e: 681b ldr r3, [r3, #0] + 8005f20: 330c adds r3, #12 + 8005f22: 613b str r3, [r7, #16] + __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); + 8005f24: 693b ldr r3, [r7, #16] + 8005f26: e853 3f00 ldrex r3, [r3] + 8005f2a: 60fb str r3, [r7, #12] + return(result); + 8005f2c: 68fb ldr r3, [r7, #12] + 8005f2e: f023 0310 bic.w r3, r3, #16 + 8005f32: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 + 8005f36: 687b ldr r3, [r7, #4] + 8005f38: 681b ldr r3, [r3, #0] + 8005f3a: 330c adds r3, #12 + 8005f3c: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 + 8005f40: 61fa str r2, [r7, #28] + 8005f42: 61bb str r3, [r7, #24] + __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); + 8005f44: 69b9 ldr r1, [r7, #24] + 8005f46: 69fa ldr r2, [r7, #28] + 8005f48: e841 2300 strex r3, r2, [r1] + 8005f4c: 617b str r3, [r7, #20] + return(result); + 8005f4e: 697b ldr r3, [r7, #20] + 8005f50: 2b00 cmp r3, #0 + 8005f52: d1e3 bne.n 8005f1c /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 8005ef0: 687b ldr r3, [r7, #4] - 8005ef2: 2202 movs r2, #2 - 8005ef4: 635a str r2, [r3, #52] @ 0x34 + 8005f54: 687b ldr r3, [r7, #4] + 8005f56: 2202 movs r2, #2 + 8005f58: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); - 8005ef6: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce - 8005efa: 4619 mov r1, r3 - 8005efc: 6878 ldr r0, [r7, #4] - 8005efe: f000 f844 bl 8005f8a + 8005f5a: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce + 8005f5e: 4619 mov r1, r3 + 8005f60: 6878 ldr r0, [r7, #4] + 8005f62: f000 f844 bl 8005fee #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; - 8005f02: e023 b.n 8005f4c + 8005f66: e023 b.n 8005fb0 } } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) - 8005f04: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005f08: f003 0380 and.w r3, r3, #128 @ 0x80 - 8005f0c: 2b00 cmp r3, #0 - 8005f0e: d009 beq.n 8005f24 - 8005f10: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005f14: f003 0380 and.w r3, r3, #128 @ 0x80 - 8005f18: 2b00 cmp r3, #0 - 8005f1a: d003 beq.n 8005f24 + 8005f68: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005f6c: f003 0380 and.w r3, r3, #128 @ 0x80 + 8005f70: 2b00 cmp r3, #0 + 8005f72: d009 beq.n 8005f88 + 8005f74: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005f78: f003 0380 and.w r3, r3, #128 @ 0x80 + 8005f7c: 2b00 cmp r3, #0 + 8005f7e: d003 beq.n 8005f88 { UART_Transmit_IT(huart); - 8005f1c: 6878 ldr r0, [r7, #4] - 8005f1e: f000 f90e bl 800613e + 8005f80: 6878 ldr r0, [r7, #4] + 8005f82: f000 f90e bl 80061a2 return; - 8005f22: e014 b.n 8005f4e + 8005f86: e014 b.n 8005fb2 } /* UART in mode Transmitter end --------------------------------------------*/ if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) - 8005f24: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005f28: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005f2c: 2b00 cmp r3, #0 - 8005f2e: d00e beq.n 8005f4e - 8005f30: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005f34: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005f38: 2b00 cmp r3, #0 - 8005f3a: d008 beq.n 8005f4e + 8005f88: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005f8c: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005f90: 2b00 cmp r3, #0 + 8005f92: d00e beq.n 8005fb2 + 8005f94: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005f98: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005f9c: 2b00 cmp r3, #0 + 8005f9e: d008 beq.n 8005fb2 { UART_EndTransmit_IT(huart); - 8005f3c: 6878 ldr r0, [r7, #4] - 8005f3e: f000 f94d bl 80061dc + 8005fa0: 6878 ldr r0, [r7, #4] + 8005fa2: f000 f94d bl 8006240 return; - 8005f42: e004 b.n 8005f4e + 8005fa6: e004 b.n 8005fb2 return; - 8005f44: bf00 nop - 8005f46: e002 b.n 8005f4e + 8005fa8: bf00 nop + 8005faa: e002 b.n 8005fb2 return; - 8005f48: bf00 nop - 8005f4a: e000 b.n 8005f4e + 8005fac: bf00 nop + 8005fae: e000 b.n 8005fb2 return; - 8005f4c: bf00 nop + 8005fb0: bf00 nop } } - 8005f4e: 37e8 adds r7, #232 @ 0xe8 - 8005f50: 46bd mov sp, r7 - 8005f52: bd80 pop {r7, pc} + 8005fb2: 37e8 adds r7, #232 @ 0xe8 + 8005fb4: 46bd mov sp, r7 + 8005fb6: bd80 pop {r7, pc} -08005f54 : +08005fb8 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { - 8005f54: b480 push {r7} - 8005f56: b083 sub sp, #12 - 8005f58: af00 add r7, sp, #0 - 8005f5a: 6078 str r0, [r7, #4] + 8005fb8: b480 push {r7} + 8005fba: b083 sub sp, #12 + 8005fbc: af00 add r7, sp, #0 + 8005fbe: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_TxCpltCallback could be implemented in the user file */ } - 8005f5c: bf00 nop - 8005f5e: 370c adds r7, #12 - 8005f60: 46bd mov sp, r7 - 8005f62: bc80 pop {r7} - 8005f64: 4770 bx lr + 8005fc0: bf00 nop + 8005fc2: 370c adds r7, #12 + 8005fc4: 46bd mov sp, r7 + 8005fc6: bc80 pop {r7} + 8005fc8: 4770 bx lr -08005f66 : +08005fca : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { - 8005f66: b480 push {r7} - 8005f68: b083 sub sp, #12 - 8005f6a: af00 add r7, sp, #0 - 8005f6c: 6078 str r0, [r7, #4] + 8005fca: b480 push {r7} + 8005fcc: b083 sub sp, #12 + 8005fce: af00 add r7, sp, #0 + 8005fd0: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxCpltCallback could be implemented in the user file */ } - 8005f6e: bf00 nop - 8005f70: 370c adds r7, #12 - 8005f72: 46bd mov sp, r7 - 8005f74: bc80 pop {r7} - 8005f76: 4770 bx lr + 8005fd2: bf00 nop + 8005fd4: 370c adds r7, #12 + 8005fd6: 46bd mov sp, r7 + 8005fd8: bc80 pop {r7} + 8005fda: 4770 bx lr -08005f78 : +08005fdc : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { - 8005f78: b480 push {r7} - 8005f7a: b083 sub sp, #12 - 8005f7c: af00 add r7, sp, #0 - 8005f7e: 6078 str r0, [r7, #4] + 8005fdc: b480 push {r7} + 8005fde: b083 sub sp, #12 + 8005fe0: af00 add r7, sp, #0 + 8005fe2: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback could be implemented in the user file */ } - 8005f80: bf00 nop - 8005f82: 370c adds r7, #12 - 8005f84: 46bd mov sp, r7 - 8005f86: bc80 pop {r7} - 8005f88: 4770 bx lr + 8005fe4: bf00 nop + 8005fe6: 370c adds r7, #12 + 8005fe8: 46bd mov sp, r7 + 8005fea: bc80 pop {r7} + 8005fec: 4770 bx lr -08005f8a : +08005fee : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { - 8005f8a: b480 push {r7} - 8005f8c: b083 sub sp, #12 - 8005f8e: af00 add r7, sp, #0 - 8005f90: 6078 str r0, [r7, #4] - 8005f92: 460b mov r3, r1 - 8005f94: 807b strh r3, [r7, #2] + 8005fee: b480 push {r7} + 8005ff0: b083 sub sp, #12 + 8005ff2: af00 add r7, sp, #0 + 8005ff4: 6078 str r0, [r7, #4] + 8005ff6: 460b mov r3, r1 + 8005ff8: 807b strh r3, [r7, #2] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } - 8005f96: bf00 nop - 8005f98: 370c adds r7, #12 - 8005f9a: 46bd mov sp, r7 - 8005f9c: bc80 pop {r7} - 8005f9e: 4770 bx lr + 8005ffa: bf00 nop + 8005ffc: 370c adds r7, #12 + 8005ffe: 46bd mov sp, r7 + 8006000: bc80 pop {r7} + 8006002: 4770 bx lr -08005fa0 : +08006004 : * @param Timeout Timeout duration * @retval HAL status */ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 8005fa0: b580 push {r7, lr} - 8005fa2: b086 sub sp, #24 - 8005fa4: af00 add r7, sp, #0 - 8005fa6: 60f8 str r0, [r7, #12] - 8005fa8: 60b9 str r1, [r7, #8] - 8005faa: 603b str r3, [r7, #0] - 8005fac: 4613 mov r3, r2 - 8005fae: 71fb strb r3, [r7, #7] + 8006004: b580 push {r7, lr} + 8006006: b086 sub sp, #24 + 8006008: af00 add r7, sp, #0 + 800600a: 60f8 str r0, [r7, #12] + 800600c: 60b9 str r1, [r7, #8] + 800600e: 603b str r3, [r7, #0] + 8006010: 4613 mov r3, r2 + 8006012: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8005fb0: e03b b.n 800602a + 8006014: e03b b.n 800608e { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8005fb2: 6a3b ldr r3, [r7, #32] - 8005fb4: f1b3 3fff cmp.w r3, #4294967295 - 8005fb8: d037 beq.n 800602a + 8006016: 6a3b ldr r3, [r7, #32] + 8006018: f1b3 3fff cmp.w r3, #4294967295 + 800601c: d037 beq.n 800608e { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8005fba: f7fc ff95 bl 8002ee8 - 8005fbe: 4602 mov r2, r0 - 8005fc0: 683b ldr r3, [r7, #0] - 8005fc2: 1ad3 subs r3, r2, r3 - 8005fc4: 6a3a ldr r2, [r7, #32] - 8005fc6: 429a cmp r2, r3 - 8005fc8: d302 bcc.n 8005fd0 - 8005fca: 6a3b ldr r3, [r7, #32] - 8005fcc: 2b00 cmp r3, #0 - 8005fce: d101 bne.n 8005fd4 + 800601e: f7fc fda3 bl 8002b68 + 8006022: 4602 mov r2, r0 + 8006024: 683b ldr r3, [r7, #0] + 8006026: 1ad3 subs r3, r2, r3 + 8006028: 6a3a ldr r2, [r7, #32] + 800602a: 429a cmp r2, r3 + 800602c: d302 bcc.n 8006034 + 800602e: 6a3b ldr r3, [r7, #32] + 8006030: 2b00 cmp r3, #0 + 8006032: d101 bne.n 8006038 { return HAL_TIMEOUT; - 8005fd0: 2303 movs r3, #3 - 8005fd2: e03a b.n 800604a + 8006034: 2303 movs r3, #3 + 8006036: e03a b.n 80060ae } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) - 8005fd4: 68fb ldr r3, [r7, #12] - 8005fd6: 681b ldr r3, [r3, #0] - 8005fd8: 68db ldr r3, [r3, #12] - 8005fda: f003 0304 and.w r3, r3, #4 - 8005fde: 2b00 cmp r3, #0 - 8005fe0: d023 beq.n 800602a - 8005fe2: 68bb ldr r3, [r7, #8] - 8005fe4: 2b80 cmp r3, #128 @ 0x80 - 8005fe6: d020 beq.n 800602a - 8005fe8: 68bb ldr r3, [r7, #8] - 8005fea: 2b40 cmp r3, #64 @ 0x40 - 8005fec: d01d beq.n 800602a + 8006038: 68fb ldr r3, [r7, #12] + 800603a: 681b ldr r3, [r3, #0] + 800603c: 68db ldr r3, [r3, #12] + 800603e: f003 0304 and.w r3, r3, #4 + 8006042: 2b00 cmp r3, #0 + 8006044: d023 beq.n 800608e + 8006046: 68bb ldr r3, [r7, #8] + 8006048: 2b80 cmp r3, #128 @ 0x80 + 800604a: d020 beq.n 800608e + 800604c: 68bb ldr r3, [r7, #8] + 800604e: 2b40 cmp r3, #64 @ 0x40 + 8006050: d01d beq.n 800608e { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) - 8005fee: 68fb ldr r3, [r7, #12] - 8005ff0: 681b ldr r3, [r3, #0] - 8005ff2: 681b ldr r3, [r3, #0] - 8005ff4: f003 0308 and.w r3, r3, #8 - 8005ff8: 2b08 cmp r3, #8 - 8005ffa: d116 bne.n 800602a + 8006052: 68fb ldr r3, [r7, #12] + 8006054: 681b ldr r3, [r3, #0] + 8006056: 681b ldr r3, [r3, #0] + 8006058: f003 0308 and.w r3, r3, #8 + 800605c: 2b08 cmp r3, #8 + 800605e: d116 bne.n 800608e { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_OREFLAG(huart); - 8005ffc: 2300 movs r3, #0 - 8005ffe: 617b str r3, [r7, #20] - 8006000: 68fb ldr r3, [r7, #12] - 8006002: 681b ldr r3, [r3, #0] - 8006004: 681b ldr r3, [r3, #0] - 8006006: 617b str r3, [r7, #20] - 8006008: 68fb ldr r3, [r7, #12] - 800600a: 681b ldr r3, [r3, #0] - 800600c: 685b ldr r3, [r3, #4] - 800600e: 617b str r3, [r7, #20] - 8006010: 697b ldr r3, [r7, #20] + 8006060: 2300 movs r3, #0 + 8006062: 617b str r3, [r7, #20] + 8006064: 68fb ldr r3, [r7, #12] + 8006066: 681b ldr r3, [r3, #0] + 8006068: 681b ldr r3, [r3, #0] + 800606a: 617b str r3, [r7, #20] + 800606c: 68fb ldr r3, [r7, #12] + 800606e: 681b ldr r3, [r3, #0] + 8006070: 685b ldr r3, [r3, #4] + 8006072: 617b str r3, [r7, #20] + 8006074: 697b ldr r3, [r7, #20] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); - 8006012: 68f8 ldr r0, [r7, #12] - 8006014: f000 f81d bl 8006052 + 8006076: 68f8 ldr r0, [r7, #12] + 8006078: f000 f81d bl 80060b6 huart->ErrorCode = HAL_UART_ERROR_ORE; - 8006018: 68fb ldr r3, [r7, #12] - 800601a: 2208 movs r2, #8 - 800601c: 645a str r2, [r3, #68] @ 0x44 + 800607c: 68fb ldr r3, [r7, #12] + 800607e: 2208 movs r2, #8 + 8006080: 645a str r2, [r3, #68] @ 0x44 /* Process Unlocked */ __HAL_UNLOCK(huart); - 800601e: 68fb ldr r3, [r7, #12] - 8006020: 2200 movs r2, #0 - 8006022: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 8006082: 68fb ldr r3, [r7, #12] + 8006084: 2200 movs r2, #0 + 8006086: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; - 8006026: 2301 movs r3, #1 - 8006028: e00f b.n 800604a + 800608a: 2301 movs r3, #1 + 800608c: e00f b.n 80060ae while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 800602a: 68fb ldr r3, [r7, #12] - 800602c: 681b ldr r3, [r3, #0] - 800602e: 681a ldr r2, [r3, #0] - 8006030: 68bb ldr r3, [r7, #8] - 8006032: 4013 ands r3, r2 - 8006034: 68ba ldr r2, [r7, #8] - 8006036: 429a cmp r2, r3 - 8006038: bf0c ite eq - 800603a: 2301 moveq r3, #1 - 800603c: 2300 movne r3, #0 - 800603e: b2db uxtb r3, r3 - 8006040: 461a mov r2, r3 - 8006042: 79fb ldrb r3, [r7, #7] - 8006044: 429a cmp r2, r3 - 8006046: d0b4 beq.n 8005fb2 + 800608e: 68fb ldr r3, [r7, #12] + 8006090: 681b ldr r3, [r3, #0] + 8006092: 681a ldr r2, [r3, #0] + 8006094: 68bb ldr r3, [r7, #8] + 8006096: 4013 ands r3, r2 + 8006098: 68ba ldr r2, [r7, #8] + 800609a: 429a cmp r2, r3 + 800609c: bf0c ite eq + 800609e: 2301 moveq r3, #1 + 80060a0: 2300 movne r3, #0 + 80060a2: b2db uxtb r3, r3 + 80060a4: 461a mov r2, r3 + 80060a6: 79fb ldrb r3, [r7, #7] + 80060a8: 429a cmp r2, r3 + 80060aa: d0b4 beq.n 8006016 } } } } return HAL_OK; - 8006048: 2300 movs r3, #0 + 80060ac: 2300 movs r3, #0 } - 800604a: 4618 mov r0, r3 - 800604c: 3718 adds r7, #24 - 800604e: 46bd mov sp, r7 - 8006050: bd80 pop {r7, pc} + 80060ae: 4618 mov r0, r3 + 80060b0: 3718 adds r7, #24 + 80060b2: 46bd mov sp, r7 + 80060b4: bd80 pop {r7, pc} -08006052 : +080060b6 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 8006052: b480 push {r7} - 8006054: b095 sub sp, #84 @ 0x54 - 8006056: af00 add r7, sp, #0 - 8006058: 6078 str r0, [r7, #4] + 80060b6: b480 push {r7} + 80060b8: b095 sub sp, #84 @ 0x54 + 80060ba: af00 add r7, sp, #0 + 80060bc: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 800605a: 687b ldr r3, [r7, #4] - 800605c: 681b ldr r3, [r3, #0] - 800605e: 330c adds r3, #12 - 8006060: 637b str r3, [r7, #52] @ 0x34 + 80060be: 687b ldr r3, [r7, #4] + 80060c0: 681b ldr r3, [r3, #0] + 80060c2: 330c adds r3, #12 + 80060c4: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8006062: 6b7b ldr r3, [r7, #52] @ 0x34 - 8006064: e853 3f00 ldrex r3, [r3] - 8006068: 633b str r3, [r7, #48] @ 0x30 + 80060c6: 6b7b ldr r3, [r7, #52] @ 0x34 + 80060c8: e853 3f00 ldrex r3, [r3] + 80060cc: 633b str r3, [r7, #48] @ 0x30 return(result); - 800606a: 6b3b ldr r3, [r7, #48] @ 0x30 - 800606c: f423 7390 bic.w r3, r3, #288 @ 0x120 - 8006070: 64fb str r3, [r7, #76] @ 0x4c - 8006072: 687b ldr r3, [r7, #4] - 8006074: 681b ldr r3, [r3, #0] - 8006076: 330c adds r3, #12 - 8006078: 6cfa ldr r2, [r7, #76] @ 0x4c - 800607a: 643a str r2, [r7, #64] @ 0x40 - 800607c: 63fb str r3, [r7, #60] @ 0x3c + 80060ce: 6b3b ldr r3, [r7, #48] @ 0x30 + 80060d0: f423 7390 bic.w r3, r3, #288 @ 0x120 + 80060d4: 64fb str r3, [r7, #76] @ 0x4c + 80060d6: 687b ldr r3, [r7, #4] + 80060d8: 681b ldr r3, [r3, #0] + 80060da: 330c adds r3, #12 + 80060dc: 6cfa ldr r2, [r7, #76] @ 0x4c + 80060de: 643a str r2, [r7, #64] @ 0x40 + 80060e0: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800607e: 6bf9 ldr r1, [r7, #60] @ 0x3c - 8006080: 6c3a ldr r2, [r7, #64] @ 0x40 - 8006082: e841 2300 strex r3, r2, [r1] - 8006086: 63bb str r3, [r7, #56] @ 0x38 + 80060e2: 6bf9 ldr r1, [r7, #60] @ 0x3c + 80060e4: 6c3a ldr r2, [r7, #64] @ 0x40 + 80060e6: e841 2300 strex r3, r2, [r1] + 80060ea: 63bb str r3, [r7, #56] @ 0x38 return(result); - 8006088: 6bbb ldr r3, [r7, #56] @ 0x38 - 800608a: 2b00 cmp r3, #0 - 800608c: d1e5 bne.n 800605a + 80060ec: 6bbb ldr r3, [r7, #56] @ 0x38 + 80060ee: 2b00 cmp r3, #0 + 80060f0: d1e5 bne.n 80060be ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 800608e: 687b ldr r3, [r7, #4] - 8006090: 681b ldr r3, [r3, #0] - 8006092: 3314 adds r3, #20 - 8006094: 623b str r3, [r7, #32] + 80060f2: 687b ldr r3, [r7, #4] + 80060f4: 681b ldr r3, [r3, #0] + 80060f6: 3314 adds r3, #20 + 80060f8: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8006096: 6a3b ldr r3, [r7, #32] - 8006098: e853 3f00 ldrex r3, [r3] - 800609c: 61fb str r3, [r7, #28] + 80060fa: 6a3b ldr r3, [r7, #32] + 80060fc: e853 3f00 ldrex r3, [r3] + 8006100: 61fb str r3, [r7, #28] return(result); - 800609e: 69fb ldr r3, [r7, #28] - 80060a0: f023 0301 bic.w r3, r3, #1 - 80060a4: 64bb str r3, [r7, #72] @ 0x48 - 80060a6: 687b ldr r3, [r7, #4] - 80060a8: 681b ldr r3, [r3, #0] - 80060aa: 3314 adds r3, #20 - 80060ac: 6cba ldr r2, [r7, #72] @ 0x48 - 80060ae: 62fa str r2, [r7, #44] @ 0x2c - 80060b0: 62bb str r3, [r7, #40] @ 0x28 + 8006102: 69fb ldr r3, [r7, #28] + 8006104: f023 0301 bic.w r3, r3, #1 + 8006108: 64bb str r3, [r7, #72] @ 0x48 + 800610a: 687b ldr r3, [r7, #4] + 800610c: 681b ldr r3, [r3, #0] + 800610e: 3314 adds r3, #20 + 8006110: 6cba ldr r2, [r7, #72] @ 0x48 + 8006112: 62fa str r2, [r7, #44] @ 0x2c + 8006114: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80060b2: 6ab9 ldr r1, [r7, #40] @ 0x28 - 80060b4: 6afa ldr r2, [r7, #44] @ 0x2c - 80060b6: e841 2300 strex r3, r2, [r1] - 80060ba: 627b str r3, [r7, #36] @ 0x24 + 8006116: 6ab9 ldr r1, [r7, #40] @ 0x28 + 8006118: 6afa ldr r2, [r7, #44] @ 0x2c + 800611a: e841 2300 strex r3, r2, [r1] + 800611e: 627b str r3, [r7, #36] @ 0x24 return(result); - 80060bc: 6a7b ldr r3, [r7, #36] @ 0x24 - 80060be: 2b00 cmp r3, #0 - 80060c0: d1e5 bne.n 800608e + 8006120: 6a7b ldr r3, [r7, #36] @ 0x24 + 8006122: 2b00 cmp r3, #0 + 8006124: d1e5 bne.n 80060f2 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 80060c2: 687b ldr r3, [r7, #4] - 80060c4: 6b1b ldr r3, [r3, #48] @ 0x30 - 80060c6: 2b01 cmp r3, #1 - 80060c8: d119 bne.n 80060fe + 8006126: 687b ldr r3, [r7, #4] + 8006128: 6b1b ldr r3, [r3, #48] @ 0x30 + 800612a: 2b01 cmp r3, #1 + 800612c: d119 bne.n 8006162 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 80060ca: 687b ldr r3, [r7, #4] - 80060cc: 681b ldr r3, [r3, #0] - 80060ce: 330c adds r3, #12 - 80060d0: 60fb str r3, [r7, #12] + 800612e: 687b ldr r3, [r7, #4] + 8006130: 681b ldr r3, [r3, #0] + 8006132: 330c adds r3, #12 + 8006134: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80060d2: 68fb ldr r3, [r7, #12] - 80060d4: e853 3f00 ldrex r3, [r3] - 80060d8: 60bb str r3, [r7, #8] + 8006136: 68fb ldr r3, [r7, #12] + 8006138: e853 3f00 ldrex r3, [r3] + 800613c: 60bb str r3, [r7, #8] return(result); - 80060da: 68bb ldr r3, [r7, #8] - 80060dc: f023 0310 bic.w r3, r3, #16 - 80060e0: 647b str r3, [r7, #68] @ 0x44 - 80060e2: 687b ldr r3, [r7, #4] - 80060e4: 681b ldr r3, [r3, #0] - 80060e6: 330c adds r3, #12 - 80060e8: 6c7a ldr r2, [r7, #68] @ 0x44 - 80060ea: 61ba str r2, [r7, #24] - 80060ec: 617b str r3, [r7, #20] + 800613e: 68bb ldr r3, [r7, #8] + 8006140: f023 0310 bic.w r3, r3, #16 + 8006144: 647b str r3, [r7, #68] @ 0x44 + 8006146: 687b ldr r3, [r7, #4] + 8006148: 681b ldr r3, [r3, #0] + 800614a: 330c adds r3, #12 + 800614c: 6c7a ldr r2, [r7, #68] @ 0x44 + 800614e: 61ba str r2, [r7, #24] + 8006150: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80060ee: 6979 ldr r1, [r7, #20] - 80060f0: 69ba ldr r2, [r7, #24] - 80060f2: e841 2300 strex r3, r2, [r1] - 80060f6: 613b str r3, [r7, #16] + 8006152: 6979 ldr r1, [r7, #20] + 8006154: 69ba ldr r2, [r7, #24] + 8006156: e841 2300 strex r3, r2, [r1] + 800615a: 613b str r3, [r7, #16] return(result); - 80060f8: 693b ldr r3, [r7, #16] - 80060fa: 2b00 cmp r3, #0 - 80060fc: d1e5 bne.n 80060ca + 800615c: 693b ldr r3, [r7, #16] + 800615e: 2b00 cmp r3, #0 + 8006160: d1e5 bne.n 800612e } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 80060fe: 687b ldr r3, [r7, #4] - 8006100: 2220 movs r2, #32 - 8006102: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8006162: 687b ldr r3, [r7, #4] + 8006164: 2220 movs r2, #32 + 8006166: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8006106: 687b ldr r3, [r7, #4] - 8006108: 2200 movs r2, #0 - 800610a: 631a str r2, [r3, #48] @ 0x30 + 800616a: 687b ldr r3, [r7, #4] + 800616c: 2200 movs r2, #0 + 800616e: 631a str r2, [r3, #48] @ 0x30 } - 800610c: bf00 nop - 800610e: 3754 adds r7, #84 @ 0x54 - 8006110: 46bd mov sp, r7 - 8006112: bc80 pop {r7} - 8006114: 4770 bx lr + 8006170: bf00 nop + 8006172: 3754 adds r7, #84 @ 0x54 + 8006174: 46bd mov sp, r7 + 8006176: bc80 pop {r7} + 8006178: 4770 bx lr -08006116 : +0800617a : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - 8006116: b580 push {r7, lr} - 8006118: b084 sub sp, #16 - 800611a: af00 add r7, sp, #0 - 800611c: 6078 str r0, [r7, #4] + 800617a: b580 push {r7, lr} + 800617c: b084 sub sp, #16 + 800617e: af00 add r7, sp, #0 + 8006180: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 800611e: 687b ldr r3, [r7, #4] - 8006120: 6a5b ldr r3, [r3, #36] @ 0x24 - 8006122: 60fb str r3, [r7, #12] + 8006182: 687b ldr r3, [r7, #4] + 8006184: 6a5b ldr r3, [r3, #36] @ 0x24 + 8006186: 60fb str r3, [r7, #12] huart->RxXferCount = 0x00U; - 8006124: 68fb ldr r3, [r7, #12] - 8006126: 2200 movs r2, #0 - 8006128: 85da strh r2, [r3, #46] @ 0x2e + 8006188: 68fb ldr r3, [r7, #12] + 800618a: 2200 movs r2, #0 + 800618c: 85da strh r2, [r3, #46] @ 0x2e huart->TxXferCount = 0x00U; - 800612a: 68fb ldr r3, [r7, #12] - 800612c: 2200 movs r2, #0 - 800612e: 84da strh r2, [r3, #38] @ 0x26 + 800618e: 68fb ldr r3, [r7, #12] + 8006190: 2200 movs r2, #0 + 8006192: 84da strh r2, [r3, #38] @ 0x26 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8006130: 68f8 ldr r0, [r7, #12] - 8006132: f7ff ff21 bl 8005f78 + 8006194: 68f8 ldr r0, [r7, #12] + 8006196: f7ff ff21 bl 8005fdc #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8006136: bf00 nop - 8006138: 3710 adds r7, #16 - 800613a: 46bd mov sp, r7 - 800613c: bd80 pop {r7, pc} + 800619a: bf00 nop + 800619c: 3710 adds r7, #16 + 800619e: 46bd mov sp, r7 + 80061a0: bd80 pop {r7, pc} -0800613e : +080061a2 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) { - 800613e: b480 push {r7} - 8006140: b085 sub sp, #20 - 8006142: af00 add r7, sp, #0 - 8006144: 6078 str r0, [r7, #4] + 80061a2: b480 push {r7} + 80061a4: b085 sub sp, #20 + 80061a6: af00 add r7, sp, #0 + 80061a8: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) - 8006146: 687b ldr r3, [r7, #4] - 8006148: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 800614c: b2db uxtb r3, r3 - 800614e: 2b21 cmp r3, #33 @ 0x21 - 8006150: d13e bne.n 80061d0 + 80061aa: 687b ldr r3, [r7, #4] + 80061ac: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 80061b0: b2db uxtb r3, r3 + 80061b2: 2b21 cmp r3, #33 @ 0x21 + 80061b4: d13e bne.n 8006234 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8006152: 687b ldr r3, [r7, #4] - 8006154: 689b ldr r3, [r3, #8] - 8006156: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 800615a: d114 bne.n 8006186 - 800615c: 687b ldr r3, [r7, #4] - 800615e: 691b ldr r3, [r3, #16] - 8006160: 2b00 cmp r3, #0 - 8006162: d110 bne.n 8006186 + 80061b6: 687b ldr r3, [r7, #4] + 80061b8: 689b ldr r3, [r3, #8] + 80061ba: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 80061be: d114 bne.n 80061ea + 80061c0: 687b ldr r3, [r7, #4] + 80061c2: 691b ldr r3, [r3, #16] + 80061c4: 2b00 cmp r3, #0 + 80061c6: d110 bne.n 80061ea { tmp = (const uint16_t *) huart->pTxBuffPtr; - 8006164: 687b ldr r3, [r7, #4] - 8006166: 6a1b ldr r3, [r3, #32] - 8006168: 60fb str r3, [r7, #12] + 80061c8: 687b ldr r3, [r7, #4] + 80061ca: 6a1b ldr r3, [r3, #32] + 80061cc: 60fb str r3, [r7, #12] huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); - 800616a: 68fb ldr r3, [r7, #12] - 800616c: 881b ldrh r3, [r3, #0] - 800616e: 461a mov r2, r3 - 8006170: 687b ldr r3, [r7, #4] - 8006172: 681b ldr r3, [r3, #0] - 8006174: f3c2 0208 ubfx r2, r2, #0, #9 - 8006178: 605a str r2, [r3, #4] + 80061ce: 68fb ldr r3, [r7, #12] + 80061d0: 881b ldrh r3, [r3, #0] + 80061d2: 461a mov r2, r3 + 80061d4: 687b ldr r3, [r7, #4] + 80061d6: 681b ldr r3, [r3, #0] + 80061d8: f3c2 0208 ubfx r2, r2, #0, #9 + 80061dc: 605a str r2, [r3, #4] huart->pTxBuffPtr += 2U; - 800617a: 687b ldr r3, [r7, #4] - 800617c: 6a1b ldr r3, [r3, #32] - 800617e: 1c9a adds r2, r3, #2 - 8006180: 687b ldr r3, [r7, #4] - 8006182: 621a str r2, [r3, #32] - 8006184: e008 b.n 8006198 + 80061de: 687b ldr r3, [r7, #4] + 80061e0: 6a1b ldr r3, [r3, #32] + 80061e2: 1c9a adds r2, r3, #2 + 80061e4: 687b ldr r3, [r7, #4] + 80061e6: 621a str r2, [r3, #32] + 80061e8: e008 b.n 80061fc } else { huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); - 8006186: 687b ldr r3, [r7, #4] - 8006188: 6a1b ldr r3, [r3, #32] - 800618a: 1c59 adds r1, r3, #1 - 800618c: 687a ldr r2, [r7, #4] - 800618e: 6211 str r1, [r2, #32] - 8006190: 781a ldrb r2, [r3, #0] - 8006192: 687b ldr r3, [r7, #4] - 8006194: 681b ldr r3, [r3, #0] - 8006196: 605a str r2, [r3, #4] + 80061ea: 687b ldr r3, [r7, #4] + 80061ec: 6a1b ldr r3, [r3, #32] + 80061ee: 1c59 adds r1, r3, #1 + 80061f0: 687a ldr r2, [r7, #4] + 80061f2: 6211 str r1, [r2, #32] + 80061f4: 781a ldrb r2, [r3, #0] + 80061f6: 687b ldr r3, [r7, #4] + 80061f8: 681b ldr r3, [r3, #0] + 80061fa: 605a str r2, [r3, #4] } if (--huart->TxXferCount == 0U) - 8006198: 687b ldr r3, [r7, #4] - 800619a: 8cdb ldrh r3, [r3, #38] @ 0x26 - 800619c: b29b uxth r3, r3 - 800619e: 3b01 subs r3, #1 - 80061a0: b29b uxth r3, r3 - 80061a2: 687a ldr r2, [r7, #4] - 80061a4: 4619 mov r1, r3 - 80061a6: 84d1 strh r1, [r2, #38] @ 0x26 - 80061a8: 2b00 cmp r3, #0 - 80061aa: d10f bne.n 80061cc + 80061fc: 687b ldr r3, [r7, #4] + 80061fe: 8cdb ldrh r3, [r3, #38] @ 0x26 + 8006200: b29b uxth r3, r3 + 8006202: 3b01 subs r3, #1 + 8006204: b29b uxth r3, r3 + 8006206: 687a ldr r2, [r7, #4] + 8006208: 4619 mov r1, r3 + 800620a: 84d1 strh r1, [r2, #38] @ 0x26 + 800620c: 2b00 cmp r3, #0 + 800620e: d10f bne.n 8006230 { /* Disable the UART Transmit Data Register Empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); - 80061ac: 687b ldr r3, [r7, #4] - 80061ae: 681b ldr r3, [r3, #0] - 80061b0: 68da ldr r2, [r3, #12] - 80061b2: 687b ldr r3, [r7, #4] - 80061b4: 681b ldr r3, [r3, #0] - 80061b6: f022 0280 bic.w r2, r2, #128 @ 0x80 - 80061ba: 60da str r2, [r3, #12] + 8006210: 687b ldr r3, [r7, #4] + 8006212: 681b ldr r3, [r3, #0] + 8006214: 68da ldr r2, [r3, #12] + 8006216: 687b ldr r3, [r7, #4] + 8006218: 681b ldr r3, [r3, #0] + 800621a: f022 0280 bic.w r2, r2, #128 @ 0x80 + 800621e: 60da str r2, [r3, #12] /* Enable the UART Transmit Complete Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TC); - 80061bc: 687b ldr r3, [r7, #4] - 80061be: 681b ldr r3, [r3, #0] - 80061c0: 68da ldr r2, [r3, #12] - 80061c2: 687b ldr r3, [r7, #4] - 80061c4: 681b ldr r3, [r3, #0] - 80061c6: f042 0240 orr.w r2, r2, #64 @ 0x40 - 80061ca: 60da str r2, [r3, #12] + 8006220: 687b ldr r3, [r7, #4] + 8006222: 681b ldr r3, [r3, #0] + 8006224: 68da ldr r2, [r3, #12] + 8006226: 687b ldr r3, [r7, #4] + 8006228: 681b ldr r3, [r3, #0] + 800622a: f042 0240 orr.w r2, r2, #64 @ 0x40 + 800622e: 60da str r2, [r3, #12] } return HAL_OK; - 80061cc: 2300 movs r3, #0 - 80061ce: e000 b.n 80061d2 + 8006230: 2300 movs r3, #0 + 8006232: e000 b.n 8006236 } else { return HAL_BUSY; - 80061d0: 2302 movs r3, #2 + 8006234: 2302 movs r3, #2 } } - 80061d2: 4618 mov r0, r3 - 80061d4: 3714 adds r7, #20 - 80061d6: 46bd mov sp, r7 - 80061d8: bc80 pop {r7} - 80061da: 4770 bx lr + 8006236: 4618 mov r0, r3 + 8006238: 3714 adds r7, #20 + 800623a: 46bd mov sp, r7 + 800623c: bc80 pop {r7} + 800623e: 4770 bx lr -080061dc : +08006240 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) { - 80061dc: b580 push {r7, lr} - 80061de: b082 sub sp, #8 - 80061e0: af00 add r7, sp, #0 - 80061e2: 6078 str r0, [r7, #4] + 8006240: b580 push {r7, lr} + 8006242: b082 sub sp, #8 + 8006244: af00 add r7, sp, #0 + 8006246: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TC); - 80061e4: 687b ldr r3, [r7, #4] - 80061e6: 681b ldr r3, [r3, #0] - 80061e8: 68da ldr r2, [r3, #12] - 80061ea: 687b ldr r3, [r7, #4] - 80061ec: 681b ldr r3, [r3, #0] - 80061ee: f022 0240 bic.w r2, r2, #64 @ 0x40 - 80061f2: 60da str r2, [r3, #12] + 8006248: 687b ldr r3, [r7, #4] + 800624a: 681b ldr r3, [r3, #0] + 800624c: 68da ldr r2, [r3, #12] + 800624e: 687b ldr r3, [r7, #4] + 8006250: 681b ldr r3, [r3, #0] + 8006252: f022 0240 bic.w r2, r2, #64 @ 0x40 + 8006256: 60da str r2, [r3, #12] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 80061f4: 687b ldr r3, [r7, #4] - 80061f6: 2220 movs r2, #32 - 80061f8: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8006258: 687b ldr r3, [r7, #4] + 800625a: 2220 movs r2, #32 + 800625c: f883 2041 strb.w r2, [r3, #65] @ 0x41 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); - 80061fc: 6878 ldr r0, [r7, #4] - 80061fe: f7ff fea9 bl 8005f54 + 8006260: 6878 ldr r0, [r7, #4] + 8006262: f7ff fea9 bl 8005fb8 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return HAL_OK; - 8006202: 2300 movs r3, #0 + 8006266: 2300 movs r3, #0 } - 8006204: 4618 mov r0, r3 - 8006206: 3708 adds r7, #8 - 8006208: 46bd mov sp, r7 - 800620a: bd80 pop {r7, pc} + 8006268: 4618 mov r0, r3 + 800626a: 3708 adds r7, #8 + 800626c: 46bd mov sp, r7 + 800626e: bd80 pop {r7, pc} -0800620c : +08006270 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { - 800620c: b580 push {r7, lr} - 800620e: b08c sub sp, #48 @ 0x30 - 8006210: af00 add r7, sp, #0 - 8006212: 6078 str r0, [r7, #4] + 8006270: b580 push {r7, lr} + 8006272: b08c sub sp, #48 @ 0x30 + 8006274: af00 add r7, sp, #0 + 8006276: 6078 str r0, [r7, #4] uint8_t *pdata8bits; uint16_t *pdata16bits; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8006214: 687b ldr r3, [r7, #4] - 8006216: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 - 800621a: b2db uxtb r3, r3 - 800621c: 2b22 cmp r3, #34 @ 0x22 - 800621e: f040 80ae bne.w 800637e + 8006278: 687b ldr r3, [r7, #4] + 800627a: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 + 800627e: b2db uxtb r3, r3 + 8006280: 2b22 cmp r3, #34 @ 0x22 + 8006282: f040 80ae bne.w 80063e2 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8006222: 687b ldr r3, [r7, #4] - 8006224: 689b ldr r3, [r3, #8] - 8006226: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 800622a: d117 bne.n 800625c - 800622c: 687b ldr r3, [r7, #4] - 800622e: 691b ldr r3, [r3, #16] - 8006230: 2b00 cmp r3, #0 - 8006232: d113 bne.n 800625c + 8006286: 687b ldr r3, [r7, #4] + 8006288: 689b ldr r3, [r3, #8] + 800628a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 800628e: d117 bne.n 80062c0 + 8006290: 687b ldr r3, [r7, #4] + 8006292: 691b ldr r3, [r3, #16] + 8006294: 2b00 cmp r3, #0 + 8006296: d113 bne.n 80062c0 { pdata8bits = NULL; - 8006234: 2300 movs r3, #0 - 8006236: 62fb str r3, [r7, #44] @ 0x2c + 8006298: 2300 movs r3, #0 + 800629a: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = (uint16_t *) huart->pRxBuffPtr; - 8006238: 687b ldr r3, [r7, #4] - 800623a: 6a9b ldr r3, [r3, #40] @ 0x28 - 800623c: 62bb str r3, [r7, #40] @ 0x28 + 800629c: 687b ldr r3, [r7, #4] + 800629e: 6a9b ldr r3, [r3, #40] @ 0x28 + 80062a0: 62bb str r3, [r7, #40] @ 0x28 *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); - 800623e: 687b ldr r3, [r7, #4] - 8006240: 681b ldr r3, [r3, #0] - 8006242: 685b ldr r3, [r3, #4] - 8006244: b29b uxth r3, r3 - 8006246: f3c3 0308 ubfx r3, r3, #0, #9 - 800624a: b29a uxth r2, r3 - 800624c: 6abb ldr r3, [r7, #40] @ 0x28 - 800624e: 801a strh r2, [r3, #0] + 80062a2: 687b ldr r3, [r7, #4] + 80062a4: 681b ldr r3, [r3, #0] + 80062a6: 685b ldr r3, [r3, #4] + 80062a8: b29b uxth r3, r3 + 80062aa: f3c3 0308 ubfx r3, r3, #0, #9 + 80062ae: b29a uxth r2, r3 + 80062b0: 6abb ldr r3, [r7, #40] @ 0x28 + 80062b2: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; - 8006250: 687b ldr r3, [r7, #4] - 8006252: 6a9b ldr r3, [r3, #40] @ 0x28 - 8006254: 1c9a adds r2, r3, #2 - 8006256: 687b ldr r3, [r7, #4] - 8006258: 629a str r2, [r3, #40] @ 0x28 - 800625a: e026 b.n 80062aa + 80062b4: 687b ldr r3, [r7, #4] + 80062b6: 6a9b ldr r3, [r3, #40] @ 0x28 + 80062b8: 1c9a adds r2, r3, #2 + 80062ba: 687b ldr r3, [r7, #4] + 80062bc: 629a str r2, [r3, #40] @ 0x28 + 80062be: e026 b.n 800630e } else { pdata8bits = (uint8_t *) huart->pRxBuffPtr; - 800625c: 687b ldr r3, [r7, #4] - 800625e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8006260: 62fb str r3, [r7, #44] @ 0x2c + 80062c0: 687b ldr r3, [r7, #4] + 80062c2: 6a9b ldr r3, [r3, #40] @ 0x28 + 80062c4: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = NULL; - 8006262: 2300 movs r3, #0 - 8006264: 62bb str r3, [r7, #40] @ 0x28 + 80062c6: 2300 movs r3, #0 + 80062c8: 62bb str r3, [r7, #40] @ 0x28 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) - 8006266: 687b ldr r3, [r7, #4] - 8006268: 689b ldr r3, [r3, #8] - 800626a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 800626e: d007 beq.n 8006280 - 8006270: 687b ldr r3, [r7, #4] - 8006272: 689b ldr r3, [r3, #8] - 8006274: 2b00 cmp r3, #0 - 8006276: d10a bne.n 800628e - 8006278: 687b ldr r3, [r7, #4] - 800627a: 691b ldr r3, [r3, #16] - 800627c: 2b00 cmp r3, #0 - 800627e: d106 bne.n 800628e + 80062ca: 687b ldr r3, [r7, #4] + 80062cc: 689b ldr r3, [r3, #8] + 80062ce: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 80062d2: d007 beq.n 80062e4 + 80062d4: 687b ldr r3, [r7, #4] + 80062d6: 689b ldr r3, [r3, #8] + 80062d8: 2b00 cmp r3, #0 + 80062da: d10a bne.n 80062f2 + 80062dc: 687b ldr r3, [r7, #4] + 80062de: 691b ldr r3, [r3, #16] + 80062e0: 2b00 cmp r3, #0 + 80062e2: d106 bne.n 80062f2 { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); - 8006280: 687b ldr r3, [r7, #4] - 8006282: 681b ldr r3, [r3, #0] - 8006284: 685b ldr r3, [r3, #4] - 8006286: b2da uxtb r2, r3 - 8006288: 6afb ldr r3, [r7, #44] @ 0x2c - 800628a: 701a strb r2, [r3, #0] - 800628c: e008 b.n 80062a0 + 80062e4: 687b ldr r3, [r7, #4] + 80062e6: 681b ldr r3, [r3, #0] + 80062e8: 685b ldr r3, [r3, #4] + 80062ea: b2da uxtb r2, r3 + 80062ec: 6afb ldr r3, [r7, #44] @ 0x2c + 80062ee: 701a strb r2, [r3, #0] + 80062f0: e008 b.n 8006304 } else { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); - 800628e: 687b ldr r3, [r7, #4] - 8006290: 681b ldr r3, [r3, #0] - 8006292: 685b ldr r3, [r3, #4] - 8006294: b2db uxtb r3, r3 - 8006296: f003 037f and.w r3, r3, #127 @ 0x7f - 800629a: b2da uxtb r2, r3 - 800629c: 6afb ldr r3, [r7, #44] @ 0x2c - 800629e: 701a strb r2, [r3, #0] + 80062f2: 687b ldr r3, [r7, #4] + 80062f4: 681b ldr r3, [r3, #0] + 80062f6: 685b ldr r3, [r3, #4] + 80062f8: b2db uxtb r3, r3 + 80062fa: f003 037f and.w r3, r3, #127 @ 0x7f + 80062fe: b2da uxtb r2, r3 + 8006300: 6afb ldr r3, [r7, #44] @ 0x2c + 8006302: 701a strb r2, [r3, #0] } huart->pRxBuffPtr += 1U; - 80062a0: 687b ldr r3, [r7, #4] - 80062a2: 6a9b ldr r3, [r3, #40] @ 0x28 - 80062a4: 1c5a adds r2, r3, #1 - 80062a6: 687b ldr r3, [r7, #4] - 80062a8: 629a str r2, [r3, #40] @ 0x28 + 8006304: 687b ldr r3, [r7, #4] + 8006306: 6a9b ldr r3, [r3, #40] @ 0x28 + 8006308: 1c5a adds r2, r3, #1 + 800630a: 687b ldr r3, [r7, #4] + 800630c: 629a str r2, [r3, #40] @ 0x28 } if (--huart->RxXferCount == 0U) - 80062aa: 687b ldr r3, [r7, #4] - 80062ac: 8ddb ldrh r3, [r3, #46] @ 0x2e - 80062ae: b29b uxth r3, r3 - 80062b0: 3b01 subs r3, #1 - 80062b2: b29b uxth r3, r3 - 80062b4: 687a ldr r2, [r7, #4] - 80062b6: 4619 mov r1, r3 - 80062b8: 85d1 strh r1, [r2, #46] @ 0x2e - 80062ba: 2b00 cmp r3, #0 - 80062bc: d15d bne.n 800637a + 800630e: 687b ldr r3, [r7, #4] + 8006310: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8006312: b29b uxth r3, r3 + 8006314: 3b01 subs r3, #1 + 8006316: b29b uxth r3, r3 + 8006318: 687a ldr r2, [r7, #4] + 800631a: 4619 mov r1, r3 + 800631c: 85d1 strh r1, [r2, #46] @ 0x2e + 800631e: 2b00 cmp r3, #0 + 8006320: d15d bne.n 80063de { /* Disable the UART Data Register not empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); - 80062be: 687b ldr r3, [r7, #4] - 80062c0: 681b ldr r3, [r3, #0] - 80062c2: 68da ldr r2, [r3, #12] - 80062c4: 687b ldr r3, [r7, #4] - 80062c6: 681b ldr r3, [r3, #0] - 80062c8: f022 0220 bic.w r2, r2, #32 - 80062cc: 60da str r2, [r3, #12] + 8006322: 687b ldr r3, [r7, #4] + 8006324: 681b ldr r3, [r3, #0] + 8006326: 68da ldr r2, [r3, #12] + 8006328: 687b ldr r3, [r7, #4] + 800632a: 681b ldr r3, [r3, #0] + 800632c: f022 0220 bic.w r2, r2, #32 + 8006330: 60da str r2, [r3, #12] /* Disable the UART Parity Error Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_PE); - 80062ce: 687b ldr r3, [r7, #4] - 80062d0: 681b ldr r3, [r3, #0] - 80062d2: 68da ldr r2, [r3, #12] - 80062d4: 687b ldr r3, [r7, #4] - 80062d6: 681b ldr r3, [r3, #0] - 80062d8: f422 7280 bic.w r2, r2, #256 @ 0x100 - 80062dc: 60da str r2, [r3, #12] + 8006332: 687b ldr r3, [r7, #4] + 8006334: 681b ldr r3, [r3, #0] + 8006336: 68da ldr r2, [r3, #12] + 8006338: 687b ldr r3, [r7, #4] + 800633a: 681b ldr r3, [r3, #0] + 800633c: f422 7280 bic.w r2, r2, #256 @ 0x100 + 8006340: 60da str r2, [r3, #12] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); - 80062de: 687b ldr r3, [r7, #4] - 80062e0: 681b ldr r3, [r3, #0] - 80062e2: 695a ldr r2, [r3, #20] - 80062e4: 687b ldr r3, [r7, #4] - 80062e6: 681b ldr r3, [r3, #0] - 80062e8: f022 0201 bic.w r2, r2, #1 - 80062ec: 615a str r2, [r3, #20] + 8006342: 687b ldr r3, [r7, #4] + 8006344: 681b ldr r3, [r3, #0] + 8006346: 695a ldr r2, [r3, #20] + 8006348: 687b ldr r3, [r7, #4] + 800634a: 681b ldr r3, [r3, #0] + 800634c: f022 0201 bic.w r2, r2, #1 + 8006350: 615a str r2, [r3, #20] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 80062ee: 687b ldr r3, [r7, #4] - 80062f0: 2220 movs r2, #32 - 80062f2: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8006352: 687b ldr r3, [r7, #4] + 8006354: 2220 movs r2, #32 + 8006356: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Initialize type of RxEvent to Transfer Complete */ huart->RxEventType = HAL_UART_RXEVENT_TC; - 80062f6: 687b ldr r3, [r7, #4] - 80062f8: 2200 movs r2, #0 - 80062fa: 635a str r2, [r3, #52] @ 0x34 + 800635a: 687b ldr r3, [r7, #4] + 800635c: 2200 movs r2, #0 + 800635e: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 80062fc: 687b ldr r3, [r7, #4] - 80062fe: 6b1b ldr r3, [r3, #48] @ 0x30 - 8006300: 2b01 cmp r3, #1 - 8006302: d135 bne.n 8006370 + 8006360: 687b ldr r3, [r7, #4] + 8006362: 6b1b ldr r3, [r3, #48] @ 0x30 + 8006364: 2b01 cmp r3, #1 + 8006366: d135 bne.n 80063d4 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8006304: 687b ldr r3, [r7, #4] - 8006306: 2200 movs r2, #0 - 8006308: 631a str r2, [r3, #48] @ 0x30 + 8006368: 687b ldr r3, [r7, #4] + 800636a: 2200 movs r2, #0 + 800636c: 631a str r2, [r3, #48] @ 0x30 /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 800630a: 687b ldr r3, [r7, #4] - 800630c: 681b ldr r3, [r3, #0] - 800630e: 330c adds r3, #12 - 8006310: 617b str r3, [r7, #20] + 800636e: 687b ldr r3, [r7, #4] + 8006370: 681b ldr r3, [r3, #0] + 8006372: 330c adds r3, #12 + 8006374: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8006312: 697b ldr r3, [r7, #20] - 8006314: e853 3f00 ldrex r3, [r3] - 8006318: 613b str r3, [r7, #16] + 8006376: 697b ldr r3, [r7, #20] + 8006378: e853 3f00 ldrex r3, [r3] + 800637c: 613b str r3, [r7, #16] return(result); - 800631a: 693b ldr r3, [r7, #16] - 800631c: f023 0310 bic.w r3, r3, #16 - 8006320: 627b str r3, [r7, #36] @ 0x24 - 8006322: 687b ldr r3, [r7, #4] - 8006324: 681b ldr r3, [r3, #0] - 8006326: 330c adds r3, #12 - 8006328: 6a7a ldr r2, [r7, #36] @ 0x24 - 800632a: 623a str r2, [r7, #32] - 800632c: 61fb str r3, [r7, #28] + 800637e: 693b ldr r3, [r7, #16] + 8006380: f023 0310 bic.w r3, r3, #16 + 8006384: 627b str r3, [r7, #36] @ 0x24 + 8006386: 687b ldr r3, [r7, #4] + 8006388: 681b ldr r3, [r3, #0] + 800638a: 330c adds r3, #12 + 800638c: 6a7a ldr r2, [r7, #36] @ 0x24 + 800638e: 623a str r2, [r7, #32] + 8006390: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800632e: 69f9 ldr r1, [r7, #28] - 8006330: 6a3a ldr r2, [r7, #32] - 8006332: e841 2300 strex r3, r2, [r1] - 8006336: 61bb str r3, [r7, #24] + 8006392: 69f9 ldr r1, [r7, #28] + 8006394: 6a3a ldr r2, [r7, #32] + 8006396: e841 2300 strex r3, r2, [r1] + 800639a: 61bb str r3, [r7, #24] return(result); - 8006338: 69bb ldr r3, [r7, #24] - 800633a: 2b00 cmp r3, #0 - 800633c: d1e5 bne.n 800630a + 800639c: 69bb ldr r3, [r7, #24] + 800639e: 2b00 cmp r3, #0 + 80063a0: d1e5 bne.n 800636e /* Check if IDLE flag is set */ if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) - 800633e: 687b ldr r3, [r7, #4] - 8006340: 681b ldr r3, [r3, #0] - 8006342: 681b ldr r3, [r3, #0] - 8006344: f003 0310 and.w r3, r3, #16 - 8006348: 2b10 cmp r3, #16 - 800634a: d10a bne.n 8006362 + 80063a2: 687b ldr r3, [r7, #4] + 80063a4: 681b ldr r3, [r3, #0] + 80063a6: 681b ldr r3, [r3, #0] + 80063a8: f003 0310 and.w r3, r3, #16 + 80063ac: 2b10 cmp r3, #16 + 80063ae: d10a bne.n 80063c6 { /* Clear IDLE flag in ISR */ __HAL_UART_CLEAR_IDLEFLAG(huart); - 800634c: 2300 movs r3, #0 - 800634e: 60fb str r3, [r7, #12] - 8006350: 687b ldr r3, [r7, #4] - 8006352: 681b ldr r3, [r3, #0] - 8006354: 681b ldr r3, [r3, #0] - 8006356: 60fb str r3, [r7, #12] - 8006358: 687b ldr r3, [r7, #4] - 800635a: 681b ldr r3, [r3, #0] - 800635c: 685b ldr r3, [r3, #4] - 800635e: 60fb str r3, [r7, #12] - 8006360: 68fb ldr r3, [r7, #12] + 80063b0: 2300 movs r3, #0 + 80063b2: 60fb str r3, [r7, #12] + 80063b4: 687b ldr r3, [r7, #4] + 80063b6: 681b ldr r3, [r3, #0] + 80063b8: 681b ldr r3, [r3, #0] + 80063ba: 60fb str r3, [r7, #12] + 80063bc: 687b ldr r3, [r7, #4] + 80063be: 681b ldr r3, [r3, #0] + 80063c0: 685b ldr r3, [r3, #4] + 80063c2: 60fb str r3, [r7, #12] + 80063c4: 68fb ldr r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8006362: 687b ldr r3, [r7, #4] - 8006364: 8d9b ldrh r3, [r3, #44] @ 0x2c - 8006366: 4619 mov r1, r3 - 8006368: 6878 ldr r0, [r7, #4] - 800636a: f7ff fe0e bl 8005f8a - 800636e: e002 b.n 8006376 + 80063c6: 687b ldr r3, [r7, #4] + 80063c8: 8d9b ldrh r3, [r3, #44] @ 0x2c + 80063ca: 4619 mov r1, r3 + 80063cc: 6878 ldr r0, [r7, #4] + 80063ce: f7ff fe0e bl 8005fee + 80063d2: e002 b.n 80063da #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); - 8006370: 6878 ldr r0, [r7, #4] - 8006372: f7ff fdf8 bl 8005f66 + 80063d4: 6878 ldr r0, [r7, #4] + 80063d6: f7ff fdf8 bl 8005fca #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; - 8006376: 2300 movs r3, #0 - 8006378: e002 b.n 8006380 + 80063da: 2300 movs r3, #0 + 80063dc: e002 b.n 80063e4 } return HAL_OK; - 800637a: 2300 movs r3, #0 - 800637c: e000 b.n 8006380 + 80063de: 2300 movs r3, #0 + 80063e0: e000 b.n 80063e4 } else { return HAL_BUSY; - 800637e: 2302 movs r3, #2 + 80063e2: 2302 movs r3, #2 } } - 8006380: 4618 mov r0, r3 - 8006382: 3730 adds r7, #48 @ 0x30 - 8006384: 46bd mov sp, r7 - 8006386: bd80 pop {r7, pc} + 80063e4: 4618 mov r0, r3 + 80063e6: 3730 adds r7, #48 @ 0x30 + 80063e8: 46bd mov sp, r7 + 80063ea: bd80 pop {r7, pc} -08006388 : +080063ec : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { - 8006388: b580 push {r7, lr} - 800638a: b084 sub sp, #16 - 800638c: af00 add r7, sp, #0 - 800638e: 6078 str r0, [r7, #4] + 80063ec: b580 push {r7, lr} + 80063ee: b084 sub sp, #16 + 80063f0: af00 add r7, sp, #0 + 80063f2: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8006390: 687b ldr r3, [r7, #4] - 8006392: 681b ldr r3, [r3, #0] - 8006394: 691b ldr r3, [r3, #16] - 8006396: f423 5140 bic.w r1, r3, #12288 @ 0x3000 - 800639a: 687b ldr r3, [r7, #4] - 800639c: 68da ldr r2, [r3, #12] - 800639e: 687b ldr r3, [r7, #4] - 80063a0: 681b ldr r3, [r3, #0] - 80063a2: 430a orrs r2, r1 - 80063a4: 611a str r2, [r3, #16] + 80063f4: 687b ldr r3, [r7, #4] + 80063f6: 681b ldr r3, [r3, #0] + 80063f8: 691b ldr r3, [r3, #16] + 80063fa: f423 5140 bic.w r1, r3, #12288 @ 0x3000 + 80063fe: 687b ldr r3, [r7, #4] + 8006400: 68da ldr r2, [r3, #12] + 8006402: 687b ldr r3, [r7, #4] + 8006404: 681b ldr r3, [r3, #0] + 8006406: 430a orrs r2, r1 + 8006408: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; - 80063a6: 687b ldr r3, [r7, #4] - 80063a8: 689a ldr r2, [r3, #8] - 80063aa: 687b ldr r3, [r7, #4] - 80063ac: 691b ldr r3, [r3, #16] - 80063ae: 431a orrs r2, r3 - 80063b0: 687b ldr r3, [r7, #4] - 80063b2: 695b ldr r3, [r3, #20] - 80063b4: 4313 orrs r3, r2 - 80063b6: 60bb str r3, [r7, #8] + 800640a: 687b ldr r3, [r7, #4] + 800640c: 689a ldr r2, [r3, #8] + 800640e: 687b ldr r3, [r7, #4] + 8006410: 691b ldr r3, [r3, #16] + 8006412: 431a orrs r2, r3 + 8006414: 687b ldr r3, [r7, #4] + 8006416: 695b ldr r3, [r3, #20] + 8006418: 4313 orrs r3, r2 + 800641a: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, - 80063b8: 687b ldr r3, [r7, #4] - 80063ba: 681b ldr r3, [r3, #0] - 80063bc: 68db ldr r3, [r3, #12] - 80063be: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 - 80063c2: f023 030c bic.w r3, r3, #12 - 80063c6: 687a ldr r2, [r7, #4] - 80063c8: 6812 ldr r2, [r2, #0] - 80063ca: 68b9 ldr r1, [r7, #8] - 80063cc: 430b orrs r3, r1 - 80063ce: 60d3 str r3, [r2, #12] + 800641c: 687b ldr r3, [r7, #4] + 800641e: 681b ldr r3, [r3, #0] + 8006420: 68db ldr r3, [r3, #12] + 8006422: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 + 8006426: f023 030c bic.w r3, r3, #12 + 800642a: 687a ldr r2, [r7, #4] + 800642c: 6812 ldr r2, [r2, #0] + 800642e: 68b9 ldr r1, [r7, #8] + 8006430: 430b orrs r3, r1 + 8006432: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); - 80063d0: 687b ldr r3, [r7, #4] - 80063d2: 681b ldr r3, [r3, #0] - 80063d4: 695b ldr r3, [r3, #20] - 80063d6: f423 7140 bic.w r1, r3, #768 @ 0x300 - 80063da: 687b ldr r3, [r7, #4] - 80063dc: 699a ldr r2, [r3, #24] - 80063de: 687b ldr r3, [r7, #4] - 80063e0: 681b ldr r3, [r3, #0] - 80063e2: 430a orrs r2, r1 - 80063e4: 615a str r2, [r3, #20] + 8006434: 687b ldr r3, [r7, #4] + 8006436: 681b ldr r3, [r3, #0] + 8006438: 695b ldr r3, [r3, #20] + 800643a: f423 7140 bic.w r1, r3, #768 @ 0x300 + 800643e: 687b ldr r3, [r7, #4] + 8006440: 699a ldr r2, [r3, #24] + 8006442: 687b ldr r3, [r7, #4] + 8006444: 681b ldr r3, [r3, #0] + 8006446: 430a orrs r2, r1 + 8006448: 615a str r2, [r3, #20] if(huart->Instance == USART1) - 80063e6: 687b ldr r3, [r7, #4] - 80063e8: 681b ldr r3, [r3, #0] - 80063ea: 4a2c ldr r2, [pc, #176] @ (800649c ) - 80063ec: 4293 cmp r3, r2 - 80063ee: d103 bne.n 80063f8 + 800644a: 687b ldr r3, [r7, #4] + 800644c: 681b ldr r3, [r3, #0] + 800644e: 4a2c ldr r2, [pc, #176] @ (8006500 ) + 8006450: 4293 cmp r3, r2 + 8006452: d103 bne.n 800645c { pclk = HAL_RCC_GetPCLK2Freq(); - 80063f0: f7ff f95a bl 80056a8 - 80063f4: 60f8 str r0, [r7, #12] - 80063f6: e002 b.n 80063fe + 8006454: f7fe fd68 bl 8004f28 + 8006458: 60f8 str r0, [r7, #12] + 800645a: e002 b.n 8006462 } else { pclk = HAL_RCC_GetPCLK1Freq(); - 80063f8: f7ff f942 bl 8005680 - 80063fc: 60f8 str r0, [r7, #12] + 800645c: f7fe fd50 bl 8004f00 + 8006460: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); - 80063fe: 68fa ldr r2, [r7, #12] - 8006400: 4613 mov r3, r2 - 8006402: 009b lsls r3, r3, #2 - 8006404: 4413 add r3, r2 - 8006406: 009a lsls r2, r3, #2 - 8006408: 441a add r2, r3 - 800640a: 687b ldr r3, [r7, #4] - 800640c: 685b ldr r3, [r3, #4] - 800640e: 009b lsls r3, r3, #2 - 8006410: fbb2 f3f3 udiv r3, r2, r3 - 8006414: 4a22 ldr r2, [pc, #136] @ (80064a0 ) - 8006416: fba2 2303 umull r2, r3, r2, r3 - 800641a: 095b lsrs r3, r3, #5 - 800641c: 0119 lsls r1, r3, #4 - 800641e: 68fa ldr r2, [r7, #12] - 8006420: 4613 mov r3, r2 - 8006422: 009b lsls r3, r3, #2 - 8006424: 4413 add r3, r2 - 8006426: 009a lsls r2, r3, #2 - 8006428: 441a add r2, r3 - 800642a: 687b ldr r3, [r7, #4] - 800642c: 685b ldr r3, [r3, #4] - 800642e: 009b lsls r3, r3, #2 - 8006430: fbb2 f2f3 udiv r2, r2, r3 - 8006434: 4b1a ldr r3, [pc, #104] @ (80064a0 ) - 8006436: fba3 0302 umull r0, r3, r3, r2 - 800643a: 095b lsrs r3, r3, #5 - 800643c: 2064 movs r0, #100 @ 0x64 - 800643e: fb00 f303 mul.w r3, r0, r3 - 8006442: 1ad3 subs r3, r2, r3 - 8006444: 011b lsls r3, r3, #4 - 8006446: 3332 adds r3, #50 @ 0x32 - 8006448: 4a15 ldr r2, [pc, #84] @ (80064a0 ) - 800644a: fba2 2303 umull r2, r3, r2, r3 - 800644e: 095b lsrs r3, r3, #5 - 8006450: f003 03f0 and.w r3, r3, #240 @ 0xf0 - 8006454: 4419 add r1, r3 - 8006456: 68fa ldr r2, [r7, #12] - 8006458: 4613 mov r3, r2 - 800645a: 009b lsls r3, r3, #2 - 800645c: 4413 add r3, r2 - 800645e: 009a lsls r2, r3, #2 - 8006460: 441a add r2, r3 - 8006462: 687b ldr r3, [r7, #4] - 8006464: 685b ldr r3, [r3, #4] + 8006462: 68fa ldr r2, [r7, #12] + 8006464: 4613 mov r3, r2 8006466: 009b lsls r3, r3, #2 - 8006468: fbb2 f2f3 udiv r2, r2, r3 - 800646c: 4b0c ldr r3, [pc, #48] @ (80064a0 ) - 800646e: fba3 0302 umull r0, r3, r3, r2 - 8006472: 095b lsrs r3, r3, #5 - 8006474: 2064 movs r0, #100 @ 0x64 - 8006476: fb00 f303 mul.w r3, r0, r3 - 800647a: 1ad3 subs r3, r2, r3 - 800647c: 011b lsls r3, r3, #4 - 800647e: 3332 adds r3, #50 @ 0x32 - 8006480: 4a07 ldr r2, [pc, #28] @ (80064a0 ) - 8006482: fba2 2303 umull r2, r3, r2, r3 - 8006486: 095b lsrs r3, r3, #5 - 8006488: f003 020f and.w r2, r3, #15 - 800648c: 687b ldr r3, [r7, #4] - 800648e: 681b ldr r3, [r3, #0] - 8006490: 440a add r2, r1 - 8006492: 609a str r2, [r3, #8] + 8006468: 4413 add r3, r2 + 800646a: 009a lsls r2, r3, #2 + 800646c: 441a add r2, r3 + 800646e: 687b ldr r3, [r7, #4] + 8006470: 685b ldr r3, [r3, #4] + 8006472: 009b lsls r3, r3, #2 + 8006474: fbb2 f3f3 udiv r3, r2, r3 + 8006478: 4a22 ldr r2, [pc, #136] @ (8006504 ) + 800647a: fba2 2303 umull r2, r3, r2, r3 + 800647e: 095b lsrs r3, r3, #5 + 8006480: 0119 lsls r1, r3, #4 + 8006482: 68fa ldr r2, [r7, #12] + 8006484: 4613 mov r3, r2 + 8006486: 009b lsls r3, r3, #2 + 8006488: 4413 add r3, r2 + 800648a: 009a lsls r2, r3, #2 + 800648c: 441a add r2, r3 + 800648e: 687b ldr r3, [r7, #4] + 8006490: 685b ldr r3, [r3, #4] + 8006492: 009b lsls r3, r3, #2 + 8006494: fbb2 f2f3 udiv r2, r2, r3 + 8006498: 4b1a ldr r3, [pc, #104] @ (8006504 ) + 800649a: fba3 0302 umull r0, r3, r3, r2 + 800649e: 095b lsrs r3, r3, #5 + 80064a0: 2064 movs r0, #100 @ 0x64 + 80064a2: fb00 f303 mul.w r3, r0, r3 + 80064a6: 1ad3 subs r3, r2, r3 + 80064a8: 011b lsls r3, r3, #4 + 80064aa: 3332 adds r3, #50 @ 0x32 + 80064ac: 4a15 ldr r2, [pc, #84] @ (8006504 ) + 80064ae: fba2 2303 umull r2, r3, r2, r3 + 80064b2: 095b lsrs r3, r3, #5 + 80064b4: f003 03f0 and.w r3, r3, #240 @ 0xf0 + 80064b8: 4419 add r1, r3 + 80064ba: 68fa ldr r2, [r7, #12] + 80064bc: 4613 mov r3, r2 + 80064be: 009b lsls r3, r3, #2 + 80064c0: 4413 add r3, r2 + 80064c2: 009a lsls r2, r3, #2 + 80064c4: 441a add r2, r3 + 80064c6: 687b ldr r3, [r7, #4] + 80064c8: 685b ldr r3, [r3, #4] + 80064ca: 009b lsls r3, r3, #2 + 80064cc: fbb2 f2f3 udiv r2, r2, r3 + 80064d0: 4b0c ldr r3, [pc, #48] @ (8006504 ) + 80064d2: fba3 0302 umull r0, r3, r3, r2 + 80064d6: 095b lsrs r3, r3, #5 + 80064d8: 2064 movs r0, #100 @ 0x64 + 80064da: fb00 f303 mul.w r3, r0, r3 + 80064de: 1ad3 subs r3, r2, r3 + 80064e0: 011b lsls r3, r3, #4 + 80064e2: 3332 adds r3, #50 @ 0x32 + 80064e4: 4a07 ldr r2, [pc, #28] @ (8006504 ) + 80064e6: fba2 2303 umull r2, r3, r2, r3 + 80064ea: 095b lsrs r3, r3, #5 + 80064ec: f003 020f and.w r2, r3, #15 + 80064f0: 687b ldr r3, [r7, #4] + 80064f2: 681b ldr r3, [r3, #0] + 80064f4: 440a add r2, r1 + 80064f6: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } - 8006494: bf00 nop - 8006496: 3710 adds r7, #16 - 8006498: 46bd mov sp, r7 - 800649a: bd80 pop {r7, pc} - 800649c: 40013800 .word 0x40013800 - 80064a0: 51eb851f .word 0x51eb851f + 80064f8: bf00 nop + 80064fa: 3710 adds r7, #16 + 80064fc: 46bd mov sp, r7 + 80064fe: bd80 pop {r7, pc} + 8006500: 40013800 .word 0x40013800 + 8006504: 51eb851f .word 0x51eb851f -080064a4 : - 80064a4: 4603 mov r3, r0 - 80064a6: 4402 add r2, r0 - 80064a8: 4293 cmp r3, r2 - 80064aa: d100 bne.n 80064ae - 80064ac: 4770 bx lr - 80064ae: f803 1b01 strb.w r1, [r3], #1 - 80064b2: e7f9 b.n 80064a8 +08006508 : + 8006508: 4603 mov r3, r0 + 800650a: 4402 add r2, r0 + 800650c: 4293 cmp r3, r2 + 800650e: d100 bne.n 8006512 + 8006510: 4770 bx lr + 8006512: f803 1b01 strb.w r1, [r3], #1 + 8006516: e7f9 b.n 800650c -080064b4 <__errno>: - 80064b4: 4b01 ldr r3, [pc, #4] @ (80064bc <__errno+0x8>) - 80064b6: 6818 ldr r0, [r3, #0] - 80064b8: 4770 bx lr - 80064ba: bf00 nop - 80064bc: 20000040 .word 0x20000040 +08006518 <__errno>: + 8006518: 4b01 ldr r3, [pc, #4] @ (8006520 <__errno+0x8>) + 800651a: 6818 ldr r0, [r3, #0] + 800651c: 4770 bx lr + 800651e: bf00 nop + 8006520: 20000044 .word 0x20000044 -080064c0 <__libc_init_array>: - 80064c0: b570 push {r4, r5, r6, lr} - 80064c2: 2600 movs r6, #0 - 80064c4: 4d0c ldr r5, [pc, #48] @ (80064f8 <__libc_init_array+0x38>) - 80064c6: 4b0d ldr r3, [pc, #52] @ (80064fc <__libc_init_array+0x3c>) - 80064c8: 1b5b subs r3, r3, r5 - 80064ca: 109c asrs r4, r3, #2 - 80064cc: 42a6 cmp r6, r4 - 80064ce: d109 bne.n 80064e4 <__libc_init_array+0x24> - 80064d0: 2600 movs r6, #0 - 80064d2: f000 f8db bl 800668c <_init> - 80064d6: 4d0a ldr r5, [pc, #40] @ (8006500 <__libc_init_array+0x40>) - 80064d8: 4b0a ldr r3, [pc, #40] @ (8006504 <__libc_init_array+0x44>) - 80064da: 1b5b subs r3, r3, r5 - 80064dc: 109c asrs r4, r3, #2 - 80064de: 42a6 cmp r6, r4 - 80064e0: d105 bne.n 80064ee <__libc_init_array+0x2e> - 80064e2: bd70 pop {r4, r5, r6, pc} - 80064e4: f855 3b04 ldr.w r3, [r5], #4 - 80064e8: 4798 blx r3 - 80064ea: 3601 adds r6, #1 - 80064ec: e7ee b.n 80064cc <__libc_init_array+0xc> - 80064ee: f855 3b04 ldr.w r3, [r5], #4 - 80064f2: 4798 blx r3 - 80064f4: 3601 adds r6, #1 - 80064f6: e7f2 b.n 80064de <__libc_init_array+0x1e> - 80064f8: 08006820 .word 0x08006820 - 80064fc: 08006820 .word 0x08006820 - 8006500: 08006820 .word 0x08006820 - 8006504: 08006824 .word 0x08006824 +08006524 <__libc_init_array>: + 8006524: b570 push {r4, r5, r6, lr} + 8006526: 2600 movs r6, #0 + 8006528: 4d0c ldr r5, [pc, #48] @ (800655c <__libc_init_array+0x38>) + 800652a: 4b0d ldr r3, [pc, #52] @ (8006560 <__libc_init_array+0x3c>) + 800652c: 1b5b subs r3, r3, r5 + 800652e: 109c asrs r4, r3, #2 + 8006530: 42a6 cmp r6, r4 + 8006532: d109 bne.n 8006548 <__libc_init_array+0x24> + 8006534: 2600 movs r6, #0 + 8006536: f000 f8b7 bl 80066a8 <_init> + 800653a: 4d0a ldr r5, [pc, #40] @ (8006564 <__libc_init_array+0x40>) + 800653c: 4b0a ldr r3, [pc, #40] @ (8006568 <__libc_init_array+0x44>) + 800653e: 1b5b subs r3, r3, r5 + 8006540: 109c asrs r4, r3, #2 + 8006542: 42a6 cmp r6, r4 + 8006544: d105 bne.n 8006552 <__libc_init_array+0x2e> + 8006546: bd70 pop {r4, r5, r6, pc} + 8006548: f855 3b04 ldr.w r3, [r5], #4 + 800654c: 4798 blx r3 + 800654e: 3601 adds r6, #1 + 8006550: e7ee b.n 8006530 <__libc_init_array+0xc> + 8006552: f855 3b04 ldr.w r3, [r5], #4 + 8006556: 4798 blx r3 + 8006558: 3601 adds r6, #1 + 800655a: e7f2 b.n 8006542 <__libc_init_array+0x1e> + 800655c: 0800674c .word 0x0800674c + 8006560: 0800674c .word 0x0800674c + 8006564: 0800674c .word 0x0800674c + 8006568: 08006750 .word 0x08006750 -08006508 : - 8006508: 440a add r2, r1 - 800650a: 4291 cmp r1, r2 - 800650c: f100 33ff add.w r3, r0, #4294967295 - 8006510: d100 bne.n 8006514 - 8006512: 4770 bx lr - 8006514: b510 push {r4, lr} - 8006516: f811 4b01 ldrb.w r4, [r1], #1 - 800651a: 4291 cmp r1, r2 - 800651c: f803 4f01 strb.w r4, [r3, #1]! - 8006520: d1f9 bne.n 8006516 - 8006522: bd10 pop {r4, pc} +0800656c : + 800656c: 440a add r2, r1 + 800656e: 4291 cmp r1, r2 + 8006570: f100 33ff add.w r3, r0, #4294967295 + 8006574: d100 bne.n 8006578 + 8006576: 4770 bx lr + 8006578: b510 push {r4, lr} + 800657a: f811 4b01 ldrb.w r4, [r1], #1 + 800657e: 4291 cmp r1, r2 + 8006580: f803 4f01 strb.w r4, [r3, #1]! + 8006584: d1f9 bne.n 800657a + 8006586: bd10 pop {r4, pc} -08006524 : - 8006524: b538 push {r3, r4, r5, lr} - 8006526: 4604 mov r4, r0 - 8006528: f000 f81a bl 8006560 <__ieee754_sqrtf> - 800652c: 4621 mov r1, r4 - 800652e: 4605 mov r5, r0 - 8006530: 4620 mov r0, r4 - 8006532: f7fa fc7d bl 8000e30 <__aeabi_fcmpun> - 8006536: b920 cbnz r0, 8006542 - 8006538: 4620 mov r0, r4 - 800653a: 2100 movs r1, #0 - 800653c: f7fa fc50 bl 8000de0 <__aeabi_fcmplt> - 8006540: b908 cbnz r0, 8006546 - 8006542: 4628 mov r0, r5 - 8006544: bd38 pop {r3, r4, r5, pc} - 8006546: f7ff ffb5 bl 80064b4 <__errno> - 800654a: 2221 movs r2, #33 @ 0x21 - 800654c: 4603 mov r3, r0 - 800654e: 2100 movs r1, #0 - 8006550: 601a str r2, [r3, #0] - 8006552: 4608 mov r0, r1 - 8006554: f7fa fb5a bl 8000c0c <__aeabi_fdiv> - 8006558: 4605 mov r5, r0 - 800655a: 4628 mov r0, r5 - 800655c: bd38 pop {r3, r4, r5, pc} - 800655e: bf00 nop +08006588 : + 8006588: b538 push {r3, r4, r5, lr} + 800658a: 4604 mov r4, r0 + 800658c: f000 f81a bl 80065c4 <__ieee754_sqrtf> + 8006590: 4621 mov r1, r4 + 8006592: 4605 mov r5, r0 + 8006594: 4620 mov r0, r4 + 8006596: f7fa fc4b bl 8000e30 <__aeabi_fcmpun> + 800659a: b920 cbnz r0, 80065a6 + 800659c: 4620 mov r0, r4 + 800659e: 2100 movs r1, #0 + 80065a0: f7fa fc1e bl 8000de0 <__aeabi_fcmplt> + 80065a4: b908 cbnz r0, 80065aa + 80065a6: 4628 mov r0, r5 + 80065a8: bd38 pop {r3, r4, r5, pc} + 80065aa: f7ff ffb5 bl 8006518 <__errno> + 80065ae: 2221 movs r2, #33 @ 0x21 + 80065b0: 4603 mov r3, r0 + 80065b2: 2100 movs r1, #0 + 80065b4: 601a str r2, [r3, #0] + 80065b6: 4608 mov r0, r1 + 80065b8: f7fa fb28 bl 8000c0c <__aeabi_fdiv> + 80065bc: 4605 mov r5, r0 + 80065be: 4628 mov r0, r5 + 80065c0: bd38 pop {r3, r4, r5, pc} + 80065c2: bf00 nop -08006560 <__ieee754_sqrtf>: - 8006560: f020 4200 bic.w r2, r0, #2147483648 @ 0x80000000 - 8006564: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000 - 8006568: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 800656c: 4604 mov r4, r0 - 800656e: d24f bcs.n 8006610 <__ieee754_sqrtf+0xb0> - 8006570: 2a00 cmp r2, #0 - 8006572: d04b beq.n 800660c <__ieee754_sqrtf+0xac> - 8006574: 2800 cmp r0, #0 - 8006576: 4603 mov r3, r0 - 8006578: db54 blt.n 8006624 <__ieee754_sqrtf+0xc4> - 800657a: f010 42ff ands.w r2, r0, #2139095040 @ 0x7f800000 - 800657e: d14f bne.n 8006620 <__ieee754_sqrtf+0xc0> - 8006580: 005b lsls r3, r3, #1 - 8006582: 0218 lsls r0, r3, #8 - 8006584: 4611 mov r1, r2 - 8006586: f102 0201 add.w r2, r2, #1 - 800658a: d5f9 bpl.n 8006580 <__ieee754_sqrtf+0x20> - 800658c: 4249 negs r1, r1 - 800658e: 2400 movs r4, #0 - 8006590: f3c3 0216 ubfx r2, r3, #0, #23 - 8006594: f1a1 057f sub.w r5, r1, #127 @ 0x7f - 8006598: 07cb lsls r3, r1, #31 - 800659a: f04f 0e19 mov.w lr, #25 - 800659e: f04f 7c80 mov.w ip, #16777216 @ 0x1000000 - 80065a2: 4621 mov r1, r4 - 80065a4: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 - 80065a8: bf58 it pl - 80065aa: 0052 lslpl r2, r2, #1 - 80065ac: 106d asrs r5, r5, #1 - 80065ae: 0052 lsls r2, r2, #1 - 80065b0: eb01 030c add.w r3, r1, ip - 80065b4: 4293 cmp r3, r2 - 80065b6: bfcf iteee gt - 80065b8: 4613 movgt r3, r2 - 80065ba: eb03 010c addle.w r1, r3, ip - 80065be: 4464 addle r4, ip - 80065c0: 1ad3 suble r3, r2, r3 - 80065c2: f1be 0e01 subs.w lr, lr, #1 - 80065c6: ea4f 0243 mov.w r2, r3, lsl #1 - 80065ca: ea4f 0c5c mov.w ip, ip, lsr #1 - 80065ce: d1ef bne.n 80065b0 <__ieee754_sqrtf+0x50> - 80065d0: b1bb cbz r3, 8006602 <__ieee754_sqrtf+0xa2> - 80065d2: 4e1a ldr r6, [pc, #104] @ (800663c <__ieee754_sqrtf+0xdc>) - 80065d4: 4f1a ldr r7, [pc, #104] @ (8006640 <__ieee754_sqrtf+0xe0>) - 80065d6: 6830 ldr r0, [r6, #0] - 80065d8: 6839 ldr r1, [r7, #0] - 80065da: f7fa f959 bl 8000890 <__aeabi_fsub> - 80065de: f8d6 8000 ldr.w r8, [r6] - 80065e2: 4601 mov r1, r0 - 80065e4: 4640 mov r0, r8 - 80065e6: f7fa fc05 bl 8000df4 <__aeabi_fcmple> - 80065ea: b150 cbz r0, 8006602 <__ieee754_sqrtf+0xa2> - 80065ec: 6830 ldr r0, [r6, #0] - 80065ee: 6839 ldr r1, [r7, #0] - 80065f0: f7fa f950 bl 8000894 <__addsf3> - 80065f4: 6836 ldr r6, [r6, #0] - 80065f6: 4601 mov r1, r0 - 80065f8: 4630 mov r0, r6 - 80065fa: f7fa fbf1 bl 8000de0 <__aeabi_fcmplt> - 80065fe: b1c8 cbz r0, 8006634 <__ieee754_sqrtf+0xd4> - 8006600: 3402 adds r4, #2 - 8006602: 1060 asrs r0, r4, #1 - 8006604: f100 507c add.w r0, r0, #1056964608 @ 0x3f000000 - 8006608: eb00 50c5 add.w r0, r0, r5, lsl #23 - 800660c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8006610: 4601 mov r1, r0 - 8006612: f7fa fa47 bl 8000aa4 <__aeabi_fmul> - 8006616: 4621 mov r1, r4 - 8006618: f7fa f93c bl 8000894 <__addsf3> - 800661c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8006620: 15c1 asrs r1, r0, #23 - 8006622: e7b4 b.n 800658e <__ieee754_sqrtf+0x2e> - 8006624: 4601 mov r1, r0 - 8006626: f7fa f933 bl 8000890 <__aeabi_fsub> - 800662a: 4601 mov r1, r0 - 800662c: f7fa faee bl 8000c0c <__aeabi_fdiv> - 8006630: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8006634: 3401 adds r4, #1 - 8006636: f024 0401 bic.w r4, r4, #1 - 800663a: e7e2 b.n 8006602 <__ieee754_sqrtf+0xa2> - 800663c: 08006814 .word 0x08006814 - 8006640: 08006810 .word 0x08006810 +080065c4 <__ieee754_sqrtf>: + 80065c4: f020 4200 bic.w r2, r0, #2147483648 @ 0x80000000 + 80065c8: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000 + 80065cc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 80065d0: 4604 mov r4, r0 + 80065d2: d24f bcs.n 8006674 <__ieee754_sqrtf+0xb0> + 80065d4: 2a00 cmp r2, #0 + 80065d6: d04b beq.n 8006670 <__ieee754_sqrtf+0xac> + 80065d8: 2800 cmp r0, #0 + 80065da: 4603 mov r3, r0 + 80065dc: db54 blt.n 8006688 <__ieee754_sqrtf+0xc4> + 80065de: f010 42ff ands.w r2, r0, #2139095040 @ 0x7f800000 + 80065e2: d14f bne.n 8006684 <__ieee754_sqrtf+0xc0> + 80065e4: 005b lsls r3, r3, #1 + 80065e6: 0218 lsls r0, r3, #8 + 80065e8: 4611 mov r1, r2 + 80065ea: f102 0201 add.w r2, r2, #1 + 80065ee: d5f9 bpl.n 80065e4 <__ieee754_sqrtf+0x20> + 80065f0: 4249 negs r1, r1 + 80065f2: 2400 movs r4, #0 + 80065f4: f3c3 0216 ubfx r2, r3, #0, #23 + 80065f8: f1a1 057f sub.w r5, r1, #127 @ 0x7f + 80065fc: 07cb lsls r3, r1, #31 + 80065fe: f04f 0e19 mov.w lr, #25 + 8006602: f04f 7c80 mov.w ip, #16777216 @ 0x1000000 + 8006606: 4621 mov r1, r4 + 8006608: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 + 800660c: bf58 it pl + 800660e: 0052 lslpl r2, r2, #1 + 8006610: 106d asrs r5, r5, #1 + 8006612: 0052 lsls r2, r2, #1 + 8006614: eb01 030c add.w r3, r1, ip + 8006618: 4293 cmp r3, r2 + 800661a: bfcf iteee gt + 800661c: 4613 movgt r3, r2 + 800661e: eb03 010c addle.w r1, r3, ip + 8006622: 4464 addle r4, ip + 8006624: 1ad3 suble r3, r2, r3 + 8006626: f1be 0e01 subs.w lr, lr, #1 + 800662a: ea4f 0243 mov.w r2, r3, lsl #1 + 800662e: ea4f 0c5c mov.w ip, ip, lsr #1 + 8006632: d1ef bne.n 8006614 <__ieee754_sqrtf+0x50> + 8006634: b1bb cbz r3, 8006666 <__ieee754_sqrtf+0xa2> + 8006636: 4e1a ldr r6, [pc, #104] @ (80066a0 <__ieee754_sqrtf+0xdc>) + 8006638: 4f1a ldr r7, [pc, #104] @ (80066a4 <__ieee754_sqrtf+0xe0>) + 800663a: 6830 ldr r0, [r6, #0] + 800663c: 6839 ldr r1, [r7, #0] + 800663e: f7fa f927 bl 8000890 <__aeabi_fsub> + 8006642: f8d6 8000 ldr.w r8, [r6] + 8006646: 4601 mov r1, r0 + 8006648: 4640 mov r0, r8 + 800664a: f7fa fbd3 bl 8000df4 <__aeabi_fcmple> + 800664e: b150 cbz r0, 8006666 <__ieee754_sqrtf+0xa2> + 8006650: 6830 ldr r0, [r6, #0] + 8006652: 6839 ldr r1, [r7, #0] + 8006654: f7fa f91e bl 8000894 <__addsf3> + 8006658: 6836 ldr r6, [r6, #0] + 800665a: 4601 mov r1, r0 + 800665c: 4630 mov r0, r6 + 800665e: f7fa fbbf bl 8000de0 <__aeabi_fcmplt> + 8006662: b1c8 cbz r0, 8006698 <__ieee754_sqrtf+0xd4> + 8006664: 3402 adds r4, #2 + 8006666: 1060 asrs r0, r4, #1 + 8006668: f100 507c add.w r0, r0, #1056964608 @ 0x3f000000 + 800666c: eb00 50c5 add.w r0, r0, r5, lsl #23 + 8006670: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006674: 4601 mov r1, r0 + 8006676: f7fa fa15 bl 8000aa4 <__aeabi_fmul> + 800667a: 4621 mov r1, r4 + 800667c: f7fa f90a bl 8000894 <__addsf3> + 8006680: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006684: 15c1 asrs r1, r0, #23 + 8006686: e7b4 b.n 80065f2 <__ieee754_sqrtf+0x2e> + 8006688: 4601 mov r1, r0 + 800668a: f7fa f901 bl 8000890 <__aeabi_fsub> + 800668e: 4601 mov r1, r0 + 8006690: f7fa fabc bl 8000c0c <__aeabi_fdiv> + 8006694: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006698: 3401 adds r4, #1 + 800669a: f024 0401 bic.w r4, r4, #1 + 800669e: e7e2 b.n 8006666 <__ieee754_sqrtf+0xa2> + 80066a0: 08006740 .word 0x08006740 + 80066a4: 0800673c .word 0x0800673c -08006644 : - 8006644: b508 push {r3, lr} - 8006646: f3c0 53c7 ubfx r3, r0, #23, #8 - 800664a: 3b7f subs r3, #127 @ 0x7f - 800664c: 2b16 cmp r3, #22 - 800664e: 4601 mov r1, r0 - 8006650: dc0e bgt.n 8006670 - 8006652: 2b00 cmp r3, #0 - 8006654: 4602 mov r2, r0 - 8006656: db10 blt.n 800667a - 8006658: 480b ldr r0, [pc, #44] @ (8006688 ) - 800665a: 4118 asrs r0, r3 - 800665c: 4201 tst r1, r0 - 800665e: d005 beq.n 800666c - 8006660: f44f 0180 mov.w r1, #4194304 @ 0x400000 - 8006664: 4119 asrs r1, r3 - 8006666: 4411 add r1, r2 - 8006668: ea21 0100 bic.w r1, r1, r0 - 800666c: 4608 mov r0, r1 - 800666e: bd08 pop {r3, pc} - 8006670: 2b80 cmp r3, #128 @ 0x80 - 8006672: d1fb bne.n 800666c - 8006674: f7fa f90e bl 8000894 <__addsf3> - 8006678: bd08 pop {r3, pc} - 800667a: 3301 adds r3, #1 - 800667c: f000 4100 and.w r1, r0, #2147483648 @ 0x80000000 - 8006680: d1f4 bne.n 800666c - 8006682: f041 517e orr.w r1, r1, #1065353216 @ 0x3f800000 - 8006686: e7f1 b.n 800666c - 8006688: 007fffff .word 0x007fffff +080066a8 <_init>: + 80066a8: b5f8 push {r3, r4, r5, r6, r7, lr} + 80066aa: bf00 nop + 80066ac: bcf8 pop {r3, r4, r5, r6, r7} + 80066ae: bc08 pop {r3} + 80066b0: 469e mov lr, r3 + 80066b2: 4770 bx lr -0800668c <_init>: - 800668c: b5f8 push {r3, r4, r5, r6, r7, lr} - 800668e: bf00 nop - 8006690: bcf8 pop {r3, r4, r5, r6, r7} - 8006692: bc08 pop {r3} - 8006694: 469e mov lr, r3 - 8006696: 4770 bx lr - -08006698 <_fini>: - 8006698: b5f8 push {r3, r4, r5, r6, r7, lr} - 800669a: bf00 nop - 800669c: bcf8 pop {r3, r4, r5, r6, r7} - 800669e: bc08 pop {r3} - 80066a0: 469e mov lr, r3 - 80066a2: 4770 bx lr +080066b4 <_fini>: + 80066b4: b5f8 push {r3, r4, r5, r6, r7, lr} + 80066b6: bf00 nop + 80066b8: bcf8 pop {r3, r4, r5, r6, r7} + 80066ba: bc08 pop {r3} + 80066bc: 469e mov lr, r3 + 80066be: 4770 bx lr diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.map b/Fertirrega_v6/Debug/Fertirrega_v6.map index 44493b3..958b54e 100644 --- a/Fertirrega_v6/Debug/Fertirrega_v6.map +++ b/Fertirrega_v6/Debug/Fertirrega_v6.map @@ -144,15 +144,41 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/ad5934_driver.o .group 0x00000000 0xc ./Core/Src/ad5934_driver.o .group 0x00000000 0xc ./Core/Src/ad5934_driver.o + .group 0x00000000 0xc ./Core/Src/ad5934_driver.o .text 0x00000000 0x0 ./Core/Src/ad5934_driver.o .data 0x00000000 0x0 ./Core/Src/ad5934_driver.o .bss 0x00000000 0x0 ./Core/Src/ad5934_driver.o + .bss.temperature_dut_samples + 0x00000000 0x40 ./Core/Src/ad5934_driver.o + .bss.temperature_ref_samples + 0x00000000 0x40 ./Core/Src/ad5934_driver.o .bss.temperature_display 0x00000000 0x40 ./Core/Src/ad5934_driver.o + .bss.ec_dut_samples + 0x00000000 0x40 ./Core/Src/ad5934_driver.o .bss.ec_display 0x00000000 0x40 ./Core/Src/ad5934_driver.o .text.AD5934_ReadRegister 0x00000000 0x9c ./Core/Src/ad5934_driver.o + .text.AD5934_Sweep + 0x00000000 0x3a ./Core/Src/ad5934_driver.o + .text.AD5934_Get_Ref_Resistance + 0x00000000 0x118 ./Core/Src/ad5934_driver.o + .text.AD5934_GetTemperature + 0x00000000 0x1e4 ./Core/Src/ad5934_driver.o + .text.AD5934_GetImpedance + 0x00000000 0x20c ./Core/Src/ad5934_driver.o + .text.AD5934_Wait_For_Data_Valid + 0x00000000 0x4a ./Core/Src/ad5934_driver.o + .text.AD5934_Round_Float_Precision + 0x00000000 0x5c ./Core/Src/ad5934_driver.o + .text.AD5934_Linear_Correction + 0x00000000 0x34 ./Core/Src/ad5934_driver.o + .text.AD5934_EC_Compensate_To_25C + 0x00000000 0x5c ./Core/Src/ad5934_driver.o + .rodata 0x00000000 0x60 ./Core/Src/ad5934_driver.o + .text.AD5934_EC_Calibrate_Temperature + 0x00000000 0x144 ./Core/Src/ad5934_driver.o .text.AD5934_Calibrate 0x00000000 0x78 ./Core/Src/ad5934_driver.o .text.ADG715_SetChannels @@ -196,13 +222,14 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/adc.o .group 0x00000000 0xc ./Core/Src/adc.o .group 0x00000000 0xc ./Core/Src/adc.o + .group 0x00000000 0xc ./Core/Src/adc.o .text 0x00000000 0x0 ./Core/Src/adc.o .data 0x00000000 0x0 ./Core/Src/adc.o .bss 0x00000000 0x0 ./Core/Src/adc.o .text.HAL_ADC_MspDeInit 0x00000000 0x60 ./Core/Src/adc.o .debug_macro 0x00000000 0xacc ./Core/Src/adc.o - .debug_macro 0x00000000 0x221 ./Core/Src/adc.o + .debug_macro 0x00000000 0x227 ./Core/Src/adc.o .debug_macro 0x00000000 0x2e ./Core/Src/adc.o .debug_macro 0x00000000 0x22 ./Core/Src/adc.o .debug_macro 0x00000000 0x22 ./Core/Src/adc.o @@ -237,6 +264,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/adc.o .debug_macro 0x00000000 0x287 ./Core/Src/adc.o .debug_macro 0x00000000 0x140 ./Core/Src/adc.o + .debug_macro 0x00000000 0x8ed ./Core/Src/adc.o .debug_macro 0x00000000 0x28e ./Core/Src/adc.o .debug_macro 0x00000000 0x83 ./Core/Src/adc.o .group 0x00000000 0xc ./Core/Src/ads1015_driver.o @@ -297,23 +325,39 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/ads1015_driver.o .group 0x00000000 0xc ./Core/Src/ads1015_driver.o .group 0x00000000 0xc ./Core/Src/ads1015_driver.o + .group 0x00000000 0xc ./Core/Src/ads1015_driver.o .text 0x00000000 0x0 ./Core/Src/ads1015_driver.o .data 0x00000000 0x0 ./Core/Src/ads1015_driver.o .bss 0x00000000 0x0 ./Core/Src/ads1015_driver.o + .bss.ph_dut_samples + 0x00000000 0x40 ./Core/Src/ads1015_driver.o .text.ADSbegin 0x00000000 0x34 ./Core/Src/ads1015_driver.o + .text.ADSsetGain + 0x00000000 0x1c ./Core/Src/ads1015_driver.o .text.ADSgetGain 0x00000000 0x16 ./Core/Src/ads1015_driver.o .text.ADSreadADC_SingleEnded 0x00000000 0xac ./Core/Src/ads1015_driver.o + .text.ADSreadADC_Differential_0_1 + 0x00000000 0x7e ./Core/Src/ads1015_driver.o .text.ADSreadADC_Differential_2_3 0x00000000 0x86 ./Core/Src/ads1015_driver.o .text.ADSstartComparator_SingleEnded 0x00000000 0x90 ./Core/Src/ads1015_driver.o .text.ADSgetLastConversionResults 0x00000000 0x56 ./Core/Src/ads1015_driver.o + .text.ADSCalculate_ph_mV + 0x00000000 0xac ./Core/Src/ads1015_driver.o + .text.ADSCalculate_ph_Compensated + 0x00000000 0x88 ./Core/Src/ads1015_driver.o .text.ADSCalculate_ph_Uncompensated - 0x00000000 0xd8 ./Core/Src/ads1015_driver.o + 0x00000000 0xd4 ./Core/Src/ads1015_driver.o + .rodata 0x00000000 0x90 ./Core/Src/ads1015_driver.o + .text.ADSinterpolate_ph + 0x00000000 0x158 ./Core/Src/ads1015_driver.o + .text.ADSRound_Float_Precision + 0x00000000 0x5c ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0xacc ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x8e ./Core/Src/ads1015_driver.o @@ -336,7 +380,7 @@ Discarded input sections .debug_macro 0x00000000 0x1c ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x17e ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x19b ./Core/Src/ads1015_driver.o - .debug_macro 0x00000000 0x221 ./Core/Src/ads1015_driver.o + .debug_macro 0x00000000 0x227 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x2e ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x1c ./Core/Src/ads1015_driver.o @@ -363,6 +407,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x287 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x140 ./Core/Src/ads1015_driver.o + .debug_macro 0x00000000 0x8ed ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x28e ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x83 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x1c8 ./Core/Src/ads1015_driver.o @@ -408,6 +453,7 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/analog_loop_driver.o .group 0x00000000 0xc ./Core/Src/analog_loop_driver.o .group 0x00000000 0xc ./Core/Src/analog_loop_driver.o + .group 0x00000000 0xc ./Core/Src/analog_loop_driver.o .text 0x00000000 0x0 ./Core/Src/analog_loop_driver.o .data 0x00000000 0x0 ./Core/Src/analog_loop_driver.o .bss 0x00000000 0x0 ./Core/Src/analog_loop_driver.o @@ -434,9 +480,9 @@ Discarded input sections 0x00000000 0x40 ./Core/Src/analog_loop_driver.o .debug_rnglists 0x00000000 0x2c ./Core/Src/analog_loop_driver.o - .debug_macro 0x00000000 0x1bb ./Core/Src/analog_loop_driver.o + .debug_macro 0x00000000 0x1d0 ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0xacc ./Core/Src/analog_loop_driver.o - .debug_macro 0x00000000 0x221 ./Core/Src/analog_loop_driver.o + .debug_macro 0x00000000 0x227 ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x2e ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/analog_loop_driver.o @@ -471,11 +517,12 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x287 ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x140 ./Core/Src/analog_loop_driver.o + .debug_macro 0x00000000 0x8ed ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x28e ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x83 ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x34 ./Core/Src/analog_loop_driver.o - .debug_line 0x00000000 0x7e3 ./Core/Src/analog_loop_driver.o - .debug_str 0x00000000 0x831df ./Core/Src/analog_loop_driver.o + .debug_line 0x00000000 0x814 ./Core/Src/analog_loop_driver.o + .debug_str 0x00000000 0x89f28 ./Core/Src/analog_loop_driver.o .comment 0x00000000 0x44 ./Core/Src/analog_loop_driver.o .debug_frame 0x00000000 0xbc ./Core/Src/analog_loop_driver.o .ARM.attributes @@ -519,6 +566,7 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/digital_outputs_driver.o .group 0x00000000 0xc ./Core/Src/digital_outputs_driver.o .group 0x00000000 0xc ./Core/Src/digital_outputs_driver.o + .group 0x00000000 0xc ./Core/Src/digital_outputs_driver.o .text 0x00000000 0x0 ./Core/Src/digital_outputs_driver.o .data 0x00000000 0x0 ./Core/Src/digital_outputs_driver.o .bss 0x00000000 0x0 ./Core/Src/digital_outputs_driver.o @@ -531,7 +579,7 @@ Discarded input sections .text.digital_outputs_reset_all 0x00000000 0x2e ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0xacc ./Core/Src/digital_outputs_driver.o - .debug_macro 0x00000000 0x221 ./Core/Src/digital_outputs_driver.o + .debug_macro 0x00000000 0x227 ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x2e ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/digital_outputs_driver.o @@ -566,6 +614,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x287 ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x140 ./Core/Src/digital_outputs_driver.o + .debug_macro 0x00000000 0x8ed ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x28e ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x83 ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x1c8 ./Core/Src/digital_outputs_driver.o @@ -624,12 +673,15 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/flash_manager.o .group 0x00000000 0xc ./Core/Src/flash_manager.o .group 0x00000000 0xc ./Core/Src/flash_manager.o + .group 0x00000000 0xc ./Core/Src/flash_manager.o .text 0x00000000 0x0 ./Core/Src/flash_manager.o .data 0x00000000 0x0 ./Core/Src/flash_manager.o .bss 0x00000000 0x0 ./Core/Src/flash_manager.o + .text.Flash_Save_Page + 0x00000000 0xb4 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0xacc ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x10 ./Core/Src/flash_manager.o - .debug_macro 0x00000000 0x221 ./Core/Src/flash_manager.o + .debug_macro 0x00000000 0x227 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x2e ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x22 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x22 ./Core/Src/flash_manager.o @@ -664,6 +716,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x287 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x140 ./Core/Src/flash_manager.o + .debug_macro 0x00000000 0x8ed ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x28e ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x83 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x61 ./Core/Src/flash_manager.o @@ -722,6 +775,7 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/gpio.o .group 0x00000000 0xc ./Core/Src/gpio.o .group 0x00000000 0xc ./Core/Src/gpio.o + .group 0x00000000 0xc ./Core/Src/gpio.o .text 0x00000000 0x0 ./Core/Src/gpio.o .data 0x00000000 0x0 ./Core/Src/gpio.o .bss 0x00000000 0x0 ./Core/Src/gpio.o @@ -738,7 +792,7 @@ Discarded input sections .text.HAL_GPIO_EXTI_Callback 0x00000000 0x14 ./Core/Src/gpio.o .debug_macro 0x00000000 0xacc ./Core/Src/gpio.o - .debug_macro 0x00000000 0x221 ./Core/Src/gpio.o + .debug_macro 0x00000000 0x227 ./Core/Src/gpio.o .debug_macro 0x00000000 0x2e ./Core/Src/gpio.o .debug_macro 0x00000000 0x22 ./Core/Src/gpio.o .debug_macro 0x00000000 0x22 ./Core/Src/gpio.o @@ -773,6 +827,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/gpio.o .debug_macro 0x00000000 0x287 ./Core/Src/gpio.o .debug_macro 0x00000000 0x140 ./Core/Src/gpio.o + .debug_macro 0x00000000 0x8ed ./Core/Src/gpio.o .debug_macro 0x00000000 0x28e ./Core/Src/gpio.o .debug_macro 0x00000000 0x83 ./Core/Src/gpio.o .debug_macro 0x00000000 0x1c8 ./Core/Src/gpio.o @@ -815,13 +870,14 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/i2c.o .group 0x00000000 0xc ./Core/Src/i2c.o .group 0x00000000 0xc ./Core/Src/i2c.o + .group 0x00000000 0xc ./Core/Src/i2c.o .text 0x00000000 0x0 ./Core/Src/i2c.o .data 0x00000000 0x0 ./Core/Src/i2c.o .bss 0x00000000 0x0 ./Core/Src/i2c.o .text.HAL_I2C_MspDeInit 0x00000000 0x74 ./Core/Src/i2c.o .debug_macro 0x00000000 0xacc ./Core/Src/i2c.o - .debug_macro 0x00000000 0x221 ./Core/Src/i2c.o + .debug_macro 0x00000000 0x227 ./Core/Src/i2c.o .debug_macro 0x00000000 0x2e ./Core/Src/i2c.o .debug_macro 0x00000000 0x22 ./Core/Src/i2c.o .debug_macro 0x00000000 0x22 ./Core/Src/i2c.o @@ -856,6 +912,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/i2c.o .debug_macro 0x00000000 0x287 ./Core/Src/i2c.o .debug_macro 0x00000000 0x140 ./Core/Src/i2c.o + .debug_macro 0x00000000 0x8ed ./Core/Src/i2c.o .debug_macro 0x00000000 0x28e ./Core/Src/i2c.o .debug_macro 0x00000000 0x83 ./Core/Src/i2c.o .debug_macro 0x00000000 0x1c8 ./Core/Src/i2c.o @@ -924,6 +981,7 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/main.o .group 0x00000000 0xc ./Core/Src/main.o .group 0x00000000 0xc ./Core/Src/main.o + .group 0x00000000 0xc ./Core/Src/main.o .text 0x00000000 0x0 ./Core/Src/main.o .data 0x00000000 0x0 ./Core/Src/main.o .bss 0x00000000 0x0 ./Core/Src/main.o @@ -946,6 +1004,8 @@ Discarded input sections .data.newline_485 0x00000000 0x5 ./Core/Src/main.o .data.minus 0x00000000 0x2 ./Core/Src/main.o + .bss.main_state + 0x00000000 0x1 ./Core/Src/main.o .bss.rs485_address 0x00000000 0x1 ./Core/Src/main.o .bss.AD_RES 0x00000000 0x4 ./Core/Src/main.o @@ -961,7 +1021,7 @@ Discarded input sections .text.intToStr 0x00000000 0xd8 ./Core/Src/main.o .debug_macro 0x00000000 0xacc ./Core/Src/main.o - .debug_macro 0x00000000 0x221 ./Core/Src/main.o + .debug_macro 0x00000000 0x227 ./Core/Src/main.o .debug_macro 0x00000000 0x2e ./Core/Src/main.o .debug_macro 0x00000000 0x22 ./Core/Src/main.o .debug_macro 0x00000000 0x22 ./Core/Src/main.o @@ -996,6 +1056,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/main.o .debug_macro 0x00000000 0x287 ./Core/Src/main.o .debug_macro 0x00000000 0x140 ./Core/Src/main.o + .debug_macro 0x00000000 0x8ed ./Core/Src/main.o .debug_macro 0x00000000 0x28e ./Core/Src/main.o .debug_macro 0x00000000 0x83 ./Core/Src/main.o .debug_macro 0x00000000 0x1c8 ./Core/Src/main.o @@ -1017,11 +1078,12 @@ Discarded input sections .debug_macro 0x00000000 0x16 ./Core/Src/main.o .debug_macro 0x00000000 0x3c ./Core/Src/main.o .debug_macro 0x00000000 0x20 ./Core/Src/main.o - .debug_macro 0x00000000 0x199 ./Core/Src/main.o + .debug_macro 0x00000000 0x1b9 ./Core/Src/main.o .debug_macro 0x00000000 0x16 ./Core/Src/main.o .debug_macro 0x00000000 0x16 ./Core/Src/main.o .debug_macro 0x00000000 0x29 ./Core/Src/main.o - .debug_macro 0x00000000 0x1f8 ./Core/Src/main.o + .debug_macro 0x00000000 0x245 ./Core/Src/main.o + .group 0x00000000 0xc ./Core/Src/rs485_driver.o .group 0x00000000 0xc ./Core/Src/rs485_driver.o .group 0x00000000 0xc ./Core/Src/rs485_driver.o .group 0x00000000 0xc ./Core/Src/rs485_driver.o @@ -1076,7 +1138,7 @@ Discarded input sections .debug_macro 0x00000000 0x103 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x6a ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x1df ./Core/Src/rs485_driver.o - .debug_macro 0x00000000 0x221 ./Core/Src/rs485_driver.o + .debug_macro 0x00000000 0x227 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x2e ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x1c ./Core/Src/rs485_driver.o @@ -1105,6 +1167,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x287 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x140 ./Core/Src/rs485_driver.o + .debug_macro 0x00000000 0x8ed ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x28e ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x83 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x229 ./Core/Src/rs485_driver.o @@ -1148,11 +1211,12 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/stm32f1xx_hal_msp.o .group 0x00000000 0xc ./Core/Src/stm32f1xx_hal_msp.o .group 0x00000000 0xc ./Core/Src/stm32f1xx_hal_msp.o + .group 0x00000000 0xc ./Core/Src/stm32f1xx_hal_msp.o .text 0x00000000 0x0 ./Core/Src/stm32f1xx_hal_msp.o .data 0x00000000 0x0 ./Core/Src/stm32f1xx_hal_msp.o .bss 0x00000000 0x0 ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0xacc ./Core/Src/stm32f1xx_hal_msp.o - .debug_macro 0x00000000 0x221 ./Core/Src/stm32f1xx_hal_msp.o + .debug_macro 0x00000000 0x227 ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x2e ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x22 ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x22 ./Core/Src/stm32f1xx_hal_msp.o @@ -1187,6 +1251,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x287 ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x140 ./Core/Src/stm32f1xx_hal_msp.o + .debug_macro 0x00000000 0x8ed ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x28e ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x83 ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x1c8 ./Core/Src/stm32f1xx_hal_msp.o @@ -1229,11 +1294,12 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/stm32f1xx_it.o .group 0x00000000 0xc ./Core/Src/stm32f1xx_it.o .group 0x00000000 0xc ./Core/Src/stm32f1xx_it.o + .group 0x00000000 0xc ./Core/Src/stm32f1xx_it.o .text 0x00000000 0x0 ./Core/Src/stm32f1xx_it.o .data 0x00000000 0x0 ./Core/Src/stm32f1xx_it.o .bss 0x00000000 0x0 ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0xacc ./Core/Src/stm32f1xx_it.o - .debug_macro 0x00000000 0x221 ./Core/Src/stm32f1xx_it.o + .debug_macro 0x00000000 0x227 ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x2e ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x22 ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x22 ./Core/Src/stm32f1xx_it.o @@ -1268,6 +1334,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x287 ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x140 ./Core/Src/stm32f1xx_it.o + .debug_macro 0x00000000 0x8ed ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x28e ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x83 ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x1c8 ./Core/Src/stm32f1xx_it.o @@ -1509,6 +1576,7 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/system_stm32f1xx.o .group 0x00000000 0xc ./Core/Src/system_stm32f1xx.o .group 0x00000000 0xc ./Core/Src/system_stm32f1xx.o + .group 0x00000000 0xc ./Core/Src/system_stm32f1xx.o .text 0x00000000 0x0 ./Core/Src/system_stm32f1xx.o .data 0x00000000 0x0 ./Core/Src/system_stm32f1xx.o .bss 0x00000000 0x0 ./Core/Src/system_stm32f1xx.o @@ -1529,7 +1597,7 @@ Discarded input sections .debug_macro 0x00000000 0xd23 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0xe09e ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x6d ./Core/Src/system_stm32f1xx.o - .debug_macro 0x00000000 0x221 ./Core/Src/system_stm32f1xx.o + .debug_macro 0x00000000 0x227 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x34a2 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x190 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x5c ./Core/Src/system_stm32f1xx.o @@ -1550,8 +1618,95 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x287 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x140 ./Core/Src/system_stm32f1xx.o + .debug_macro 0x00000000 0x8ed ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x28e ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x83 ./Core/Src/system_stm32f1xx.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/tim.o + .text 0x00000000 0x0 ./Core/Src/tim.o + .data 0x00000000 0x0 ./Core/Src/tim.o + .bss 0x00000000 0x0 ./Core/Src/tim.o + .text.HAL_TIM_Base_MspDeInit + 0x00000000 0x34 ./Core/Src/tim.o + .debug_macro 0x00000000 0xacc ./Core/Src/tim.o + .debug_macro 0x00000000 0x227 ./Core/Src/tim.o + .debug_macro 0x00000000 0x2e ./Core/Src/tim.o + .debug_macro 0x00000000 0x22 ./Core/Src/tim.o + .debug_macro 0x00000000 0x22 ./Core/Src/tim.o + .debug_macro 0x00000000 0x8e ./Core/Src/tim.o + .debug_macro 0x00000000 0x51 ./Core/Src/tim.o + .debug_macro 0x00000000 0x103 ./Core/Src/tim.o + .debug_macro 0x00000000 0x6a ./Core/Src/tim.o + .debug_macro 0x00000000 0x1df ./Core/Src/tim.o + .debug_macro 0x00000000 0x1c ./Core/Src/tim.o + .debug_macro 0x00000000 0x22 ./Core/Src/tim.o + .debug_macro 0x00000000 0xbd ./Core/Src/tim.o + .debug_macro 0x00000000 0xd23 ./Core/Src/tim.o + .debug_macro 0x00000000 0xe09e ./Core/Src/tim.o + .debug_macro 0x00000000 0x6d ./Core/Src/tim.o + .debug_macro 0x00000000 0x34a2 ./Core/Src/tim.o + .debug_macro 0x00000000 0x190 ./Core/Src/tim.o + .debug_macro 0x00000000 0x5c ./Core/Src/tim.o + .debug_macro 0x00000000 0x5bc ./Core/Src/tim.o + .debug_macro 0x00000000 0x289 ./Core/Src/tim.o + .debug_macro 0x00000000 0x1cb ./Core/Src/tim.o + .debug_macro 0x00000000 0x114 ./Core/Src/tim.o + .debug_macro 0x00000000 0x1b2 ./Core/Src/tim.o + .debug_macro 0x00000000 0x27 ./Core/Src/tim.o + .debug_macro 0x00000000 0x136 ./Core/Src/tim.o + .debug_macro 0x00000000 0x1bc ./Core/Src/tim.o + .debug_macro 0x00000000 0x34 ./Core/Src/tim.o + .debug_macro 0x00000000 0x3c ./Core/Src/tim.o + .debug_macro 0x00000000 0x57 ./Core/Src/tim.o + .debug_macro 0x00000000 0x46a ./Core/Src/tim.o + .debug_macro 0x00000000 0x1b5 ./Core/Src/tim.o + .debug_macro 0x00000000 0x87 ./Core/Src/tim.o + .debug_macro 0x00000000 0x240 ./Core/Src/tim.o + .debug_macro 0x00000000 0x287 ./Core/Src/tim.o + .debug_macro 0x00000000 0x140 ./Core/Src/tim.o + .debug_macro 0x00000000 0x8ed ./Core/Src/tim.o + .debug_macro 0x00000000 0x28e ./Core/Src/tim.o + .debug_macro 0x00000000 0x83 ./Core/Src/tim.o + .debug_macro 0x00000000 0x1c8 ./Core/Src/tim.o + .group 0x00000000 0xc ./Core/Src/usart.o .group 0x00000000 0xc ./Core/Src/usart.o .group 0x00000000 0xc ./Core/Src/usart.o .group 0x00000000 0xc ./Core/Src/usart.o @@ -1597,7 +1752,7 @@ Discarded input sections .text.HAL_UART_MspDeInit 0x00000000 0x44 ./Core/Src/usart.o .debug_macro 0x00000000 0xacc ./Core/Src/usart.o - .debug_macro 0x00000000 0x221 ./Core/Src/usart.o + .debug_macro 0x00000000 0x227 ./Core/Src/usart.o .debug_macro 0x00000000 0x2e ./Core/Src/usart.o .debug_macro 0x00000000 0x22 ./Core/Src/usart.o .debug_macro 0x00000000 0x22 ./Core/Src/usart.o @@ -1632,6 +1787,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/usart.o .debug_macro 0x00000000 0x287 ./Core/Src/usart.o .debug_macro 0x00000000 0x140 ./Core/Src/usart.o + .debug_macro 0x00000000 0x8ed ./Core/Src/usart.o .debug_macro 0x00000000 0x28e ./Core/Src/usart.o .debug_macro 0x00000000 0x83 ./Core/Src/usart.o .debug_macro 0x00000000 0x1c8 ./Core/Src/usart.o @@ -1676,6 +1832,7 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o @@ -1720,7 +1877,7 @@ Discarded input sections .text.HAL_DBGMCU_DisableDBGStandbyMode 0x00000000 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o @@ -1755,6 +1912,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o @@ -1795,6 +1953,7 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o @@ -1847,7 +2006,7 @@ Discarded input sections .text.ADC_DMAError 0x00000000 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o @@ -1882,6 +2041,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o @@ -1922,6 +2082,7 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o @@ -1957,9 +2118,9 @@ Discarded input sections 0x00000000 0x80 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_rnglists 0x00000000 0x65 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o - .debug_macro 0x00000000 0x1be ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_macro 0x00000000 0x1d3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o @@ -1994,10 +2155,11 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o - .debug_line 0x00000000 0xd0e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o - .debug_str 0x00000000 0x833e4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_line 0x00000000 0xd3f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_str 0x00000000 0x8a12d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .comment 0x00000000 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_frame 0x00000000 0x1f4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .ARM.attributes @@ -2040,6 +2202,7 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o @@ -2082,7 +2245,7 @@ Discarded input sections .text.HAL_SYSTICK_Callback 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o @@ -2117,6 +2280,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o @@ -2157,6 +2321,7 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o @@ -2183,7 +2348,7 @@ Discarded input sections .text.DMA_SetConfig 0x00000000 0x5a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o @@ -2218,6 +2383,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o @@ -2258,6 +2424,7 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o @@ -2285,9 +2452,9 @@ Discarded input sections 0x00000000 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_rnglists 0x00000000 0x46 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o - .debug_macro 0x00000000 0x1ac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o + .debug_macro 0x00000000 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o @@ -2322,10 +2489,11 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o - .debug_line 0x00000000 0xa11 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o - .debug_str 0x00000000 0x82eb2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o + .debug_line 0x00000000 0xa42 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o + .debug_str 0x00000000 0x89bfb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .comment 0x00000000 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_frame 0x00000000 0x154 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .ARM.attributes @@ -2368,9 +2536,13 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .bss.pFlash 0x00000000 0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .text.HAL_FLASH_Program + 0x00000000 0xe0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .text.HAL_FLASH_Program_IT 0x00000000 0x80 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .text.HAL_FLASH_IRQHandler @@ -2379,6 +2551,10 @@ Discarded input sections 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .text.HAL_FLASH_OperationErrorCallback 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .text.HAL_FLASH_Unlock + 0x00000000 0x4c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .text.HAL_FLASH_Lock + 0x00000000 0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .text.HAL_FLASH_OB_Unlock 0x00000000 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .text.HAL_FLASH_OB_Lock @@ -2387,8 +2563,21 @@ Discarded input sections 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .text.HAL_FLASH_GetError 0x00000000 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .text.FLASH_Program_HalfWord + 0x00000000 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .text.FLASH_WaitForLastOperation + 0x00000000 0x8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .text.FLASH_SetErrorCode + 0x00000000 0xa0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_info 0x00000000 0x4f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_abbrev 0x00000000 0x250 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_aranges + 0x00000000 0x88 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_rnglists + 0x00000000 0x66 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_macro 0x00000000 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o @@ -2423,8 +2612,16 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_line 0x00000000 0xab2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_str 0x00000000 0x89d54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .comment 0x00000000 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_frame 0x00000000 0x1e8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .ARM.attributes + 0x00000000 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o @@ -2466,6 +2663,8 @@ Discarded input sections .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .text.HAL_FLASHEx_Erase + 0x00000000 0xd8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .text.HAL_FLASHEx_Erase_IT 0x00000000 0x74 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .text.HAL_FLASHEx_OBErase @@ -2476,6 +2675,8 @@ Discarded input sections 0x00000000 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .text.HAL_FLASHEx_OBGetUserData 0x00000000 0x40 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .text.FLASH_MassErase + 0x00000000 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .text.FLASH_OB_EnableWRP 0x00000000 0x144 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .text.FLASH_OB_DisableWRP @@ -2492,8 +2693,17 @@ Discarded input sections 0x00000000 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .text.FLASH_OB_GetUser 0x00000000 0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .text.FLASH_PageErase + 0x00000000 0x40 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_info 0x00000000 0x777 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_abbrev 0x00000000 0x247 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_aranges + 0x00000000 0x98 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_rnglists + 0x00000000 0x73 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_macro 0x00000000 0x1d3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o @@ -2528,8 +2738,16 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_line 0x00000000 0xbbf ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_str 0x00000000 0x89f02 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .comment 0x00000000 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_frame 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .ARM.attributes + 0x00000000 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o @@ -2580,7 +2798,7 @@ Discarded input sections .text.HAL_GPIO_EXTI_Callback 0x00000000 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o @@ -2615,6 +2833,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o @@ -2655,6 +2874,7 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o @@ -2670,9 +2890,9 @@ Discarded input sections 0x00000000 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_rnglists 0x00000000 0x1f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o - .debug_macro 0x00000000 0x1ac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o + .debug_macro 0x00000000 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o @@ -2707,10 +2927,11 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o - .debug_line 0x00000000 0x759 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o - .debug_str 0x00000000 0x82d33 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o + .debug_line 0x00000000 0x78a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o + .debug_str 0x00000000 0x89a7c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .comment 0x00000000 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_frame 0x00000000 0x6c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .ARM.attributes @@ -2753,6 +2974,7 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o @@ -2899,7 +3121,7 @@ Discarded input sections .text.I2C_ConvertOtherXferOptions 0x00000000 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o @@ -2934,6 +3156,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o @@ -2974,6 +3197,7 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o @@ -3019,9 +3243,9 @@ Discarded input sections 0x00000000 0xa8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_rnglists 0x00000000 0x7a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o - .debug_macro 0x00000000 0x20c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o - .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o + .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o @@ -3056,10 +3280,11 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o - .debug_line 0x00000000 0x96b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o - .debug_str 0x00000000 0x83267 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o + .debug_line 0x00000000 0x99c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o + .debug_str 0x00000000 0x89fb0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .comment 0x00000000 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_frame 0x00000000 0x230 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .ARM.attributes @@ -3102,6 +3327,7 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o @@ -3122,7 +3348,7 @@ Discarded input sections .text.HAL_RCC_CSSCallback 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o @@ -3157,6 +3383,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o @@ -3197,6 +3424,7 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o @@ -3209,7 +3437,7 @@ Discarded input sections .rodata.aPredivFactorTable.0 0x00000000 0x2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o @@ -3244,8 +3472,462 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Base_DeInit + 0x00000000 0xa8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Base_MspInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Base_MspDeInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Base_Start + 0x00000000 0x94 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Base_Stop + 0x00000000 0x4c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Base_Stop_IT + 0x00000000 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Base_Start_DMA + 0x00000000 0x10c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Base_Stop_DMA + 0x00000000 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OC_Init + 0x00000000 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OC_DeInit + 0x00000000 0xa8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OC_MspInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OC_MspDeInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OC_Start + 0x00000000 0x144 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OC_Stop + 0x00000000 0xc8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OC_Start_IT + 0x00000000 0x1e0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OC_Stop_IT + 0x00000000 0x164 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OC_Start_DMA + 0x00000000 0x344 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OC_Stop_DMA + 0x00000000 0x18c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_Init + 0x00000000 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_DeInit + 0x00000000 0xa8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_MspInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_MspDeInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_Start + 0x00000000 0x144 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_Stop + 0x00000000 0xc8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_Start_IT + 0x00000000 0x1e0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_Stop_IT + 0x00000000 0x164 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_Start_DMA + 0x00000000 0x344 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_Stop_DMA + 0x00000000 0x18c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_Init + 0x00000000 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_DeInit + 0x00000000 0xa8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_MspInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_MspDeInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_Start + 0x00000000 0x180 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_Stop + 0x00000000 0xc2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_Start_IT + 0x00000000 0x218 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_Stop_IT + 0x00000000 0x15c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_Start_DMA + 0x00000000 0x31c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_Stop_DMA + 0x00000000 0x184 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OnePulse_Init + 0x00000000 0xa0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OnePulse_DeInit + 0x00000000 0x88 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OnePulse_MspInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OnePulse_MspDeInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OnePulse_Start + 0x00000000 0xac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OnePulse_Stop + 0x00000000 0xc0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OnePulse_Start_IT + 0x00000000 0xcc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OnePulse_Stop_IT + 0x00000000 0xe0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Encoder_Init + 0x00000000 0x144 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Encoder_DeInit + 0x00000000 0x88 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Encoder_MspInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Encoder_MspDeInit + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Encoder_Start + 0x00000000 0x11c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Encoder_Stop + 0x00000000 0x12e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Encoder_Start_IT + 0x00000000 0x15c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Encoder_Stop_IT + 0x00000000 0x16a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Encoder_Start_DMA + 0x00000000 0x2d8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_Encoder_Stop_DMA + 0x00000000 0x192 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OC_ConfigChannel + 0x00000000 0xb8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_ConfigChannel + 0x00000000 0x138 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_ConfigChannel + 0x00000000 0x184 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_OnePulse_ConfigChannel + 0x00000000 0x1a4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_DMABurst_WriteStart + 0x00000000 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_DMABurst_MultiWriteStart + 0x00000000 0x2a8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_DMABurst_WriteStop + 0x00000000 0xf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_DMABurst_ReadStart + 0x00000000 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_DMABurst_MultiReadStart + 0x00000000 0x2a8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_DMABurst_ReadStop + 0x00000000 0xf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_GenerateEvent + 0x00000000 0x4c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_ConfigOCrefClear + 0x00000000 0x198 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_ConfigTI1Input + 0x00000000 0x36 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_SlaveConfigSynchro + 0x00000000 0x84 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_SlaveConfigSynchro_IT + 0x00000000 0x84 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_ReadCapturedValue + 0x00000000 0x88 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PeriodElapsedCallback + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PeriodElapsedHalfCpltCallback + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_IC_CaptureHalfCpltCallback + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 0x00000000 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./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x8e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x51 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x103 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x6a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0xe09e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x6d 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./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x3c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x57 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x46a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x1b5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x87 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o @@ -3384,7 +4066,7 @@ Discarded input sections .text.UART_DMARxOnlyAbortCallback 0x00000000 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + .debug_macro 0x00000000 0x227 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o @@ -3419,6 +4101,7 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-exit.o) @@ -3635,6 +4318,10 @@ Discarded input sections .text 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) + .text.roundf 0x00000000 0x48 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) + .debug_frame 0x00000000 0x28 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) + .ARM.attributes + 0x00000000 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) .text 0x00000000 0x168 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_mulsf3.o) @@ -3657,8 +4344,12 @@ Discarded input sections .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) + .text 0x00000000 0x4c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) + .debug_frame 0x00000000 0x24 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) + .ARM.attributes + 0x00000000 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) .text 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtend.o .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtend.o .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtend.o @@ -3697,6 +4388,7 @@ LOAD ./Core/Src/stm32f1xx_it.o LOAD ./Core/Src/syscalls.o LOAD ./Core/Src/sysmem.o LOAD ./Core/Src/system_stm32f1xx.o +LOAD ./Core/Src/tim.o LOAD ./Core/Src/usart.o LOAD ./Core/Startup/startup_stm32f103c8tx.o LOAD ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o @@ -3713,6 +4405,8 @@ LOAD ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o LOAD ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o LOAD ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o LOAD ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o +LOAD ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o +LOAD ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o LOAD ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o START GROUP LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a @@ -3745,7 +4439,7 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte 0x08000000 g_pfnVectors 0x0800010c . = ALIGN (0x4) -.text 0x0800010c 0x6598 +.text 0x0800010c 0x65b4 0x0800010c . = ALIGN (0x4) *(.text) .text 0x0800010c 0x40 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o @@ -3827,642 +4521,700 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .text 0x08000e30 0x2c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) 0x08000e30 __unordsf2 0x08000e30 __aeabi_fcmpun - .text 0x08000e5c 0x4c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) - 0x08000e5c __aeabi_f2iz - 0x08000e5c __fixsfsi *(.text*) .text.AD5934_SetRegisterValue - 0x08000ea8 0x64 ./Core/Src/ad5934_driver.o - 0x08000ea8 AD5934_SetRegisterValue + 0x08000e5c 0x64 ./Core/Src/ad5934_driver.o + 0x08000e5c AD5934_SetRegisterValue .text.AD5934_GetRegisterValue - 0x08000f0c 0x90 ./Core/Src/ad5934_driver.o - 0x08000f0c AD5934_GetRegisterValue + 0x08000ec0 0x90 ./Core/Src/ad5934_driver.o + 0x08000ec0 AD5934_GetRegisterValue .text.AD5934_Init - 0x08000f9c 0x40 ./Core/Src/ad5934_driver.o - 0x08000f9c AD5934_Init + 0x08000f50 0x40 ./Core/Src/ad5934_driver.o + 0x08000f50 AD5934_Init .text.AD5934_RestartSweep - 0x08000fdc 0x3e ./Core/Src/ad5934_driver.o - 0x08000fdc AD5934_RestartSweep - .text.AD5934_Sweep - 0x0800101a 0x3a ./Core/Src/ad5934_driver.o - 0x0800101a AD5934_Sweep - .text.AD5934_Get_Ref_Resistance - 0x08001054 0x118 ./Core/Src/ad5934_driver.o - 0x08001054 AD5934_Get_Ref_Resistance - .text.AD5934_GetTemperature - 0x0800116c 0x1e4 ./Core/Src/ad5934_driver.o - 0x0800116c AD5934_GetTemperature - .text.AD5934_GetImpedance - 0x08001350 0x20c ./Core/Src/ad5934_driver.o - 0x08001350 AD5934_GetImpedance - .text.AD5934_Wait_For_Data_Valid - 0x0800155c 0x4a ./Core/Src/ad5934_driver.o - 0x0800155c AD5934_Wait_For_Data_Valid - *fill* 0x080015a6 0x2 - .text.AD5934_Round_Float_Precision - 0x080015a8 0x5c ./Core/Src/ad5934_driver.o - 0x080015a8 AD5934_Round_Float_Precision - .text.AD5934_Linear_Correction - 0x08001604 0x34 ./Core/Src/ad5934_driver.o - 0x08001604 AD5934_Linear_Correction - .text.AD5934_EC_Compensate_To_25C - 0x08001638 0x5c ./Core/Src/ad5934_driver.o - 0x08001638 AD5934_EC_Compensate_To_25C - .text.AD5934_EC_Calibrate_Temperature - 0x08001694 0x144 ./Core/Src/ad5934_driver.o - 0x08001694 AD5934_EC_Calibrate_Temperature + 0x08000f90 0x30 ./Core/Src/ad5934_driver.o + 0x08000f90 AD5934_RestartSweep + .text.AD5934_Repeat_Sweep + 0x08000fc0 0x12 ./Core/Src/ad5934_driver.o + 0x08000fc0 AD5934_Repeat_Sweep + .text.AD5934_StopSweep + 0x08000fd2 0x12 ./Core/Src/ad5934_driver.o + 0x08000fd2 AD5934_StopSweep + .text.AD5934_GetMagnitude + 0x08000fe4 0x80 ./Core/Src/ad5934_driver.o + 0x08000fe4 AD5934_GetMagnitude + .text.AD5934_Process_System + 0x08001064 0x214 ./Core/Src/ad5934_driver.o + 0x08001064 AD5934_Process_System + .text.AD5934_Sort_Array + 0x08001278 0x98 ./Core/Src/ad5934_driver.o + 0x08001278 AD5934_Sort_Array + .text.AD5934_Trimmed_Mean + 0x08001310 0x8c ./Core/Src/ad5934_driver.o + 0x08001310 AD5934_Trimmed_Mean + .text.AD5934_History_Average + 0x0800139c 0x58 ./Core/Src/ad5934_driver.o + 0x0800139c AD5934_History_Average + .text.AD5934_Process_Sample + 0x080013f4 0x128 ./Core/Src/ad5934_driver.o + 0x080013f4 AD5934_Process_Sample + .text.AD5934_RTD_NewSample + 0x0800151c 0x1c ./Core/Src/ad5934_driver.o + 0x0800151c AD5934_RTD_NewSample + .text.AD5934_EC_NewSample + 0x08001538 0x1c ./Core/Src/ad5934_driver.o + 0x08001538 AD5934_EC_NewSample + .text.AD5934_Reference_NewSample + 0x08001554 0x1c ./Core/Src/ad5934_driver.o + 0x08001554 AD5934_Reference_NewSample .text.ADG715_SetRegisterValue - 0x080017d8 0x30 ./Core/Src/ad5934_driver.o - 0x080017d8 ADG715_SetRegisterValue + 0x08001570 0x30 ./Core/Src/ad5934_driver.o + 0x08001570 ADG715_SetRegisterValue .text.ADG715_ResetChannels - 0x08001808 0xe ./Core/Src/ad5934_driver.o - 0x08001808 ADG715_ResetChannels - *fill* 0x08001816 0x2 + 0x080015a0 0xe ./Core/Src/ad5934_driver.o + 0x080015a0 ADG715_ResetChannels + *fill* 0x080015ae 0x2 .text.ADG715_Update - 0x08001818 0x40 ./Core/Src/ad5934_driver.o - 0x08001818 ADG715_Update + 0x080015b0 0x40 ./Core/Src/ad5934_driver.o + 0x080015b0 ADG715_Update .text.MX_ADC1_Init - 0x08001858 0x7c ./Core/Src/adc.o - 0x08001858 MX_ADC1_Init + 0x080015f0 0x7c ./Core/Src/adc.o + 0x080015f0 MX_ADC1_Init .text.MX_ADC2_Init - 0x080018d4 0x7c ./Core/Src/adc.o - 0x080018d4 MX_ADC2_Init + 0x0800166c 0x7c ./Core/Src/adc.o + 0x0800166c MX_ADC2_Init .text.HAL_ADC_MspInit - 0x08001950 0xcc ./Core/Src/adc.o - 0x08001950 HAL_ADC_MspInit + 0x080016e8 0xcc ./Core/Src/adc.o + 0x080016e8 HAL_ADC_MspInit .text.writeRegister - 0x08001a1c 0x42 ./Core/Src/ads1015_driver.o + 0x080017b4 0x42 ./Core/Src/ads1015_driver.o .text.readRegister - 0x08001a5e 0x54 ./Core/Src/ads1015_driver.o - .text.ADS1015 0x08001ab2 0x3c ./Core/Src/ads1015_driver.o - 0x08001ab2 ADS1015 - .text.ADSsetGain - 0x08001aee 0x1c ./Core/Src/ads1015_driver.o - 0x08001aee ADSsetGain - .text.ADSreadADC_Differential_0_1 - 0x08001b0a 0x7e ./Core/Src/ads1015_driver.o - 0x08001b0a ADSreadADC_Differential_0_1 - .text.ADSCalculate_ph_mV - 0x08001b88 0xac ./Core/Src/ads1015_driver.o - 0x08001b88 ADSCalculate_ph_mV - .text.ADSCalculate_ph_Compensated - 0x08001c34 0x88 ./Core/Src/ads1015_driver.o - 0x08001c34 ADSCalculate_ph_Compensated - .text.ADSinterpolate_ph - 0x08001cbc 0x158 ./Core/Src/ads1015_driver.o - 0x08001cbc ADSinterpolate_ph - .text.ADSRound_Float_Precision - 0x08001e14 0x5c ./Core/Src/ads1015_driver.o - 0x08001e14 ADSRound_Float_Precision + 0x080017f6 0x54 ./Core/Src/ads1015_driver.o + .text.ADS1015 0x0800184a 0x3a ./Core/Src/ads1015_driver.o + 0x0800184a ADS1015 + .text.ADS1015_Process_System + 0x08001884 0x114 ./Core/Src/ads1015_driver.o + 0x08001884 ADS1015_Process_System + .text.ADS1015_Sort_Array + 0x08001998 0x98 ./Core/Src/ads1015_driver.o + 0x08001998 ADS1015_Sort_Array + .text.ADS1015_Trimmed_Mean + 0x08001a30 0x8c ./Core/Src/ads1015_driver.o + 0x08001a30 ADS1015_Trimmed_Mean + .text.ADS1015_History_Average + 0x08001abc 0x58 ./Core/Src/ads1015_driver.o + 0x08001abc ADS1015_History_Average + .text.ADS1015_Process_Sample + 0x08001b14 0x12c ./Core/Src/ads1015_driver.o + 0x08001b14 ADS1015_Process_Sample + .text.ADS1015_pH_NewSample + 0x08001c40 0x1c ./Core/Src/ads1015_driver.o + 0x08001c40 ADS1015_pH_NewSample .text.digital_outputs_init - 0x08001e70 0x84 ./Core/Src/digital_outputs_driver.o - 0x08001e70 digital_outputs_init - .text.Flash_Save_Page - 0x08001ef4 0xb4 ./Core/Src/flash_manager.o - 0x08001ef4 Flash_Save_Page + 0x08001c5c 0x84 ./Core/Src/digital_outputs_driver.o + 0x08001c5c digital_outputs_init .text.Flash_Load_Page - 0x08001fa8 0x40 ./Core/Src/flash_manager.o - 0x08001fa8 Flash_Load_Page + 0x08001ce0 0x40 ./Core/Src/flash_manager.o + 0x08001ce0 Flash_Load_Page .text.MX_GPIO_Init - 0x08001fe8 0x140 ./Core/Src/gpio.o - 0x08001fe8 MX_GPIO_Init + 0x08001d20 0x140 ./Core/Src/gpio.o + 0x08001d20 MX_GPIO_Init .text.MX_I2C1_Init - 0x08002128 0x5c ./Core/Src/i2c.o - 0x08002128 MX_I2C1_Init + 0x08001e60 0x5c ./Core/Src/i2c.o + 0x08001e60 MX_I2C1_Init .text.MX_I2C2_Init - 0x08002184 0x5c ./Core/Src/i2c.o - 0x08002184 MX_I2C2_Init + 0x08001ebc 0x5c ./Core/Src/i2c.o + 0x08001ebc MX_I2C2_Init .text.HAL_I2C_MspInit - 0x080021e0 0xd8 ./Core/Src/i2c.o - 0x080021e0 HAL_I2C_MspInit - .text.main 0x080022b8 0x4a0 ./Core/Src/main.o - 0x080022b8 main + 0x08001f18 0xd8 ./Core/Src/i2c.o + 0x08001f18 HAL_I2C_MspInit + .text.main 0x08001ff0 0x2bc ./Core/Src/main.o + 0x08001ff0 main .text.SystemClock_Config - 0x08002758 0xa0 ./Core/Src/main.o - 0x08002758 SystemClock_Config + 0x080022ac 0xa0 ./Core/Src/main.o + 0x080022ac SystemClock_Config .text.FloatToString - 0x080027f8 0x228 ./Core/Src/main.o - 0x080027f8 FloatToString + 0x0800234c 0x228 ./Core/Src/main.o + 0x0800234c FloatToString + .text.HAL_TIM_PeriodElapsedCallback + 0x08002574 0x30 ./Core/Src/main.o + 0x08002574 HAL_TIM_PeriodElapsedCallback .text.Error_Handler - 0x08002a20 0xc ./Core/Src/main.o - 0x08002a20 Error_Handler + 0x080025a4 0xc ./Core/Src/main.o + 0x080025a4 Error_Handler .text.LL_GPIO_ReadInputPort - 0x08002a2c 0x16 ./Core/Src/rs485_driver.o - *fill* 0x08002a42 0x2 + 0x080025b0 0x16 ./Core/Src/rs485_driver.o + *fill* 0x080025c6 0x2 .text.rs485_init - 0x08002a44 0x20 ./Core/Src/rs485_driver.o - 0x08002a44 rs485_init + 0x080025c8 0x20 ./Core/Src/rs485_driver.o + 0x080025c8 rs485_init .text.rs485_get_address - 0x08002a64 0x38 ./Core/Src/rs485_driver.o - 0x08002a64 rs485_get_address + 0x080025e8 0x38 ./Core/Src/rs485_driver.o + 0x080025e8 rs485_get_address .text.rs485_send_broadcast - 0x08002a9c 0x48 ./Core/Src/rs485_driver.o - 0x08002a9c rs485_send_broadcast + 0x08002620 0x48 ./Core/Src/rs485_driver.o + 0x08002620 rs485_send_broadcast .text.rs485_enable_tx - 0x08002ae4 0x18 ./Core/Src/rs485_driver.o - 0x08002ae4 rs485_enable_tx + 0x08002668 0x18 ./Core/Src/rs485_driver.o + 0x08002668 rs485_enable_tx .text.rs485_disable_tx - 0x08002afc 0x18 ./Core/Src/rs485_driver.o - 0x08002afc rs485_disable_tx + 0x08002680 0x18 ./Core/Src/rs485_driver.o + 0x08002680 rs485_disable_tx .text.rs485_configure_gpio_address - 0x08002b14 0x8c ./Core/Src/rs485_driver.o + 0x08002698 0x8c ./Core/Src/rs485_driver.o .text.rs485_configure_usart1 - 0x08002ba0 0x74 ./Core/Src/rs485_driver.o + 0x08002724 0x74 ./Core/Src/rs485_driver.o .text.HAL_MspInit - 0x08002c14 0x64 ./Core/Src/stm32f1xx_hal_msp.o - 0x08002c14 HAL_MspInit + 0x08002798 0x64 ./Core/Src/stm32f1xx_hal_msp.o + 0x08002798 HAL_MspInit .text.NMI_Handler - 0x08002c78 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002c78 NMI_Handler + 0x080027fc 0x8 ./Core/Src/stm32f1xx_it.o + 0x080027fc NMI_Handler .text.HardFault_Handler - 0x08002c80 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002c80 HardFault_Handler + 0x08002804 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002804 HardFault_Handler .text.MemManage_Handler - 0x08002c88 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002c88 MemManage_Handler + 0x0800280c 0x8 ./Core/Src/stm32f1xx_it.o + 0x0800280c MemManage_Handler .text.BusFault_Handler - 0x08002c90 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002c90 BusFault_Handler + 0x08002814 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002814 BusFault_Handler .text.UsageFault_Handler - 0x08002c98 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002c98 UsageFault_Handler + 0x0800281c 0x8 ./Core/Src/stm32f1xx_it.o + 0x0800281c UsageFault_Handler .text.SVC_Handler - 0x08002ca0 0xc ./Core/Src/stm32f1xx_it.o - 0x08002ca0 SVC_Handler + 0x08002824 0xc ./Core/Src/stm32f1xx_it.o + 0x08002824 SVC_Handler .text.DebugMon_Handler - 0x08002cac 0xc ./Core/Src/stm32f1xx_it.o - 0x08002cac DebugMon_Handler + 0x08002830 0xc ./Core/Src/stm32f1xx_it.o + 0x08002830 DebugMon_Handler .text.PendSV_Handler - 0x08002cb8 0xc ./Core/Src/stm32f1xx_it.o - 0x08002cb8 PendSV_Handler + 0x0800283c 0xc ./Core/Src/stm32f1xx_it.o + 0x0800283c PendSV_Handler .text.SysTick_Handler - 0x08002cc4 0xc ./Core/Src/stm32f1xx_it.o - 0x08002cc4 SysTick_Handler + 0x08002848 0xc ./Core/Src/stm32f1xx_it.o + 0x08002848 SysTick_Handler + .text.TIM3_IRQHandler + 0x08002854 0x14 ./Core/Src/stm32f1xx_it.o + 0x08002854 TIM3_IRQHandler .text.USART1_IRQHandler - 0x08002cd0 0x14 ./Core/Src/stm32f1xx_it.o - 0x08002cd0 USART1_IRQHandler + 0x08002868 0x14 ./Core/Src/stm32f1xx_it.o + 0x08002868 USART1_IRQHandler .text.SystemInit - 0x08002ce4 0xc ./Core/Src/system_stm32f1xx.o - 0x08002ce4 SystemInit + 0x0800287c 0xc ./Core/Src/system_stm32f1xx.o + 0x0800287c SystemInit + .text.MX_TIM3_Init + 0x08002888 0x9c ./Core/Src/tim.o + 0x08002888 MX_TIM3_Init + .text.HAL_TIM_Base_MspInit + 0x08002924 0x4c ./Core/Src/tim.o + 0x08002924 HAL_TIM_Base_MspInit .text.MX_USART1_UART_Init - 0x08002cf0 0x54 ./Core/Src/usart.o - 0x08002cf0 MX_USART1_UART_Init + 0x08002970 0x54 ./Core/Src/usart.o + 0x08002970 MX_USART1_UART_Init .text.HAL_UART_MspInit - 0x08002d44 0xa8 ./Core/Src/usart.o - 0x08002d44 HAL_UART_MspInit + 0x080029c4 0xa8 ./Core/Src/usart.o + 0x080029c4 HAL_UART_MspInit .text.Reset_Handler - 0x08002dec 0x48 ./Core/Startup/startup_stm32f103c8tx.o - 0x08002dec Reset_Handler + 0x08002a6c 0x48 ./Core/Startup/startup_stm32f103c8tx.o + 0x08002a6c Reset_Handler .text.Default_Handler - 0x08002e34 0x2 ./Core/Startup/startup_stm32f103c8tx.o - 0x08002e34 RTC_Alarm_IRQHandler - 0x08002e34 EXTI2_IRQHandler - 0x08002e34 TIM1_CC_IRQHandler - 0x08002e34 PVD_IRQHandler - 0x08002e34 EXTI3_IRQHandler - 0x08002e34 EXTI0_IRQHandler - 0x08002e34 I2C2_EV_IRQHandler - 0x08002e34 ADC1_2_IRQHandler - 0x08002e34 SPI1_IRQHandler - 0x08002e34 TAMPER_IRQHandler - 0x08002e34 DMA1_Channel4_IRQHandler - 0x08002e34 USART3_IRQHandler - 0x08002e34 RTC_IRQHandler - 0x08002e34 DMA1_Channel7_IRQHandler - 0x08002e34 CAN1_RX1_IRQHandler - 0x08002e34 TIM4_IRQHandler - 0x08002e34 I2C1_EV_IRQHandler - 0x08002e34 DMA1_Channel6_IRQHandler - 0x08002e34 TIM3_IRQHandler - 0x08002e34 RCC_IRQHandler - 0x08002e34 TIM1_TRG_COM_IRQHandler - 0x08002e34 DMA1_Channel1_IRQHandler - 0x08002e34 Default_Handler - 0x08002e34 EXTI15_10_IRQHandler - 0x08002e34 EXTI9_5_IRQHandler - 0x08002e34 SPI2_IRQHandler - 0x08002e34 DMA1_Channel5_IRQHandler - 0x08002e34 EXTI4_IRQHandler - 0x08002e34 USB_LP_CAN1_RX0_IRQHandler - 0x08002e34 USB_HP_CAN1_TX_IRQHandler - 0x08002e34 DMA1_Channel3_IRQHandler - 0x08002e34 TIM1_UP_IRQHandler - 0x08002e34 WWDG_IRQHandler - 0x08002e34 TIM2_IRQHandler - 0x08002e34 TIM1_BRK_IRQHandler - 0x08002e34 EXTI1_IRQHandler - 0x08002e34 USART2_IRQHandler - 0x08002e34 I2C2_ER_IRQHandler - 0x08002e34 DMA1_Channel2_IRQHandler - 0x08002e34 CAN1_SCE_IRQHandler - 0x08002e34 FLASH_IRQHandler - 0x08002e34 I2C1_ER_IRQHandler - 0x08002e34 USBWakeUp_IRQHandler - *fill* 0x08002e36 0x2 + 0x08002ab4 0x2 ./Core/Startup/startup_stm32f103c8tx.o + 0x08002ab4 RTC_Alarm_IRQHandler + 0x08002ab4 EXTI2_IRQHandler + 0x08002ab4 TIM1_CC_IRQHandler + 0x08002ab4 PVD_IRQHandler + 0x08002ab4 EXTI3_IRQHandler + 0x08002ab4 EXTI0_IRQHandler + 0x08002ab4 I2C2_EV_IRQHandler + 0x08002ab4 ADC1_2_IRQHandler + 0x08002ab4 SPI1_IRQHandler + 0x08002ab4 TAMPER_IRQHandler + 0x08002ab4 DMA1_Channel4_IRQHandler + 0x08002ab4 USART3_IRQHandler + 0x08002ab4 RTC_IRQHandler + 0x08002ab4 DMA1_Channel7_IRQHandler + 0x08002ab4 CAN1_RX1_IRQHandler + 0x08002ab4 TIM4_IRQHandler + 0x08002ab4 I2C1_EV_IRQHandler + 0x08002ab4 DMA1_Channel6_IRQHandler + 0x08002ab4 RCC_IRQHandler + 0x08002ab4 TIM1_TRG_COM_IRQHandler + 0x08002ab4 DMA1_Channel1_IRQHandler + 0x08002ab4 Default_Handler + 0x08002ab4 EXTI15_10_IRQHandler + 0x08002ab4 EXTI9_5_IRQHandler + 0x08002ab4 SPI2_IRQHandler + 0x08002ab4 DMA1_Channel5_IRQHandler + 0x08002ab4 EXTI4_IRQHandler + 0x08002ab4 USB_LP_CAN1_RX0_IRQHandler + 0x08002ab4 USB_HP_CAN1_TX_IRQHandler + 0x08002ab4 DMA1_Channel3_IRQHandler + 0x08002ab4 TIM1_UP_IRQHandler + 0x08002ab4 WWDG_IRQHandler + 0x08002ab4 TIM2_IRQHandler + 0x08002ab4 TIM1_BRK_IRQHandler + 0x08002ab4 EXTI1_IRQHandler + 0x08002ab4 USART2_IRQHandler + 0x08002ab4 I2C2_ER_IRQHandler + 0x08002ab4 DMA1_Channel2_IRQHandler + 0x08002ab4 CAN1_SCE_IRQHandler + 0x08002ab4 FLASH_IRQHandler + 0x08002ab4 I2C1_ER_IRQHandler + 0x08002ab4 USBWakeUp_IRQHandler + *fill* 0x08002ab6 0x2 .text.HAL_Init - 0x08002e38 0x2c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08002e38 HAL_Init + 0x08002ab8 0x2c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002ab8 HAL_Init .text.HAL_InitTick - 0x08002e64 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08002e64 HAL_InitTick + 0x08002ae4 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002ae4 HAL_InitTick .text.HAL_IncTick - 0x08002ec4 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08002ec4 HAL_IncTick + 0x08002b44 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002b44 HAL_IncTick .text.HAL_GetTick - 0x08002ee8 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08002ee8 HAL_GetTick + 0x08002b68 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002b68 HAL_GetTick .text.HAL_Delay - 0x08002efc 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08002efc HAL_Delay + 0x08002b7c 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002b7c HAL_Delay .text.HAL_ADC_Init - 0x08002f44 0x1b0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x08002f44 HAL_ADC_Init + 0x08002bc4 0x1b0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x08002bc4 HAL_ADC_Init .text.HAL_ADC_ConfigChannel - 0x080030f4 0x1f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x080030f4 HAL_ADC_ConfigChannel + 0x08002d74 0x1f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x08002d74 HAL_ADC_ConfigChannel .text.ADC_ConversionStop_Disable - 0x080032e4 0x82 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x080032e4 ADC_ConversionStop_Disable - *fill* 0x08003366 0x2 + 0x08002f64 0x82 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x08002f64 ADC_ConversionStop_Disable + *fill* 0x08002fe6 0x2 .text.__NVIC_SetPriorityGrouping - 0x08003368 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08002fe8 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_GetPriorityGrouping - 0x080033b0 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003030 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_EnableIRQ - 0x080033cc 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x0800304c 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_SetPriority - 0x08003404 0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003084 0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.NVIC_EncodePriority - 0x08003458 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080030d8 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.SysTick_Config - 0x080034bc 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x0800313c 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.HAL_NVIC_SetPriorityGrouping - 0x08003500 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08003500 HAL_NVIC_SetPriorityGrouping + 0x08003180 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003180 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x08003516 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08003516 HAL_NVIC_SetPriority + 0x08003196 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003196 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x0800354e 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x0800354e HAL_NVIC_EnableIRQ + 0x080031ce 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080031ce HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x0800356a 0x18 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x0800356a HAL_SYSTICK_Config + 0x080031ea 0x18 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080031ea HAL_SYSTICK_Config .text.HAL_DMA_Abort - 0x08003582 0x76 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x08003582 HAL_DMA_Abort + 0x08003202 0x76 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x08003202 HAL_DMA_Abort .text.HAL_DMA_Abort_IT - 0x080035f8 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x080035f8 HAL_DMA_Abort_IT - .text.HAL_FLASH_Program - 0x080036e8 0xe0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - 0x080036e8 HAL_FLASH_Program - .text.HAL_FLASH_Unlock - 0x080037c8 0x4c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - 0x080037c8 HAL_FLASH_Unlock - .text.HAL_FLASH_Lock - 0x08003814 0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - 0x08003814 HAL_FLASH_Lock - .text.FLASH_Program_HalfWord - 0x08003834 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - .text.FLASH_WaitForLastOperation - 0x0800386c 0x8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - 0x0800386c FLASH_WaitForLastOperation - .text.FLASH_SetErrorCode - 0x080038f8 0xa0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - .text.HAL_FLASHEx_Erase - 0x08003998 0xd8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o - 0x08003998 HAL_FLASHEx_Erase - .text.FLASH_MassErase - 0x08003a70 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o - .text.FLASH_PageErase - 0x08003aa8 0x40 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o - 0x08003aa8 FLASH_PageErase + 0x08003278 0xf0 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C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) + 0x20000044 _impure_ptr .data._impure_data - 0x20000044 0x4c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) - 0x20000044 _impure_data + 0x20000048 0x4c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) + 0x20000048 _impure_data *(.RamFunc) *(.RamFunc*) - 0x20000090 . = ALIGN (0x4) - 0x20000090 _edata = . + 0x20000094 . = ALIGN (0x4) + 0x20000094 _edata = . -.igot.plt 0x20000090 0x0 load address 0x080068b8 - .igot.plt 0x20000090 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o - 0x20000090 . = ALIGN (0x4) +.igot.plt 0x20000094 0x0 load address 0x080067e8 + .igot.plt 0x20000094 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + 0x20000094 . = ALIGN (0x4) -.bss 0x20000090 0x830 load address 0x080068b8 - 0x20000090 _sbss = . - 0x20000090 __bss_start__ = _sbss +.bss 0x20000094 0x8b8 load address 0x080067e8 + 0x20000094 _sbss = . + 0x20000094 __bss_start__ = _sbss *(.bss) - .bss 0x20000090 0x1c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + .bss 0x20000094 0x1c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o *(.bss*) - .bss.temperature_dut_samples - 0x200000ac 0x40 ./Core/Src/ad5934_driver.o - 0x200000ac temperature_dut_samples - .bss.temperature_ref_samples - 0x200000ec 0x40 ./Core/Src/ad5934_driver.o - 0x200000ec temperature_ref_samples - .bss.ec_dut_samples - 0x2000012c 0x40 ./Core/Src/ad5934_driver.o - 0x2000012c ec_dut_samples - .bss.hadc1 0x2000016c 0x30 ./Core/Src/adc.o - 0x2000016c hadc1 - .bss.hadc2 0x2000019c 0x30 ./Core/Src/adc.o - 0x2000019c hadc2 - .bss.i2c 0x200001cc 0x10 ./Core/Src/ads1015_driver.o - 0x200001cc i2c - .bss.ph_dut_samples - 0x200001dc 0x40 ./Core/Src/ads1015_driver.o - 0x200001dc ph_dut_samples + .bss.ad5934_state + 0x200000b0 0x1 ./Core/Src/ad5934_driver.o + 0x200000b0 ad5934_state + *fill* 0x200000b1 0x3 + .bss.g_ms_counter + 0x200000b4 0x4 ./Core/Src/ad5934_driver.o + 0x200000b4 g_ms_counter + .bss.current_mux_channel + 0x200000b8 0x1 ./Core/Src/ad5934_driver.o + 0x200000b8 current_mux_channel + .bss.sweep_count + 0x200000b9 0x1 ./Core/Src/ad5934_driver.o + 0x200000b9 sweep_count + *fill* 0x200000ba 0x2 + .bss.g_rtd_filter + 0x200000bc 0x54 ./Core/Src/ad5934_driver.o + 0x200000bc g_rtd_filter + .bss.g_ec_filter + 0x20000110 0x54 ./Core/Src/ad5934_driver.o + 0x20000110 g_ec_filter + .bss.g_ref_filter + 0x20000164 0x54 ./Core/Src/ad5934_driver.o + 0x20000164 g_ref_filter + .bss.state_timer.0 + 0x200001b8 0x4 ./Core/Src/ad5934_driver.o + .bss.hadc1 0x200001bc 0x30 ./Core/Src/adc.o + 0x200001bc hadc1 + .bss.hadc2 0x200001ec 0x30 ./Core/Src/adc.o + 0x200001ec hadc2 + .bss.i2c_ads1015 + 0x2000021c 0x10 ./Core/Src/ads1015_driver.o + 0x2000021c i2c_ads1015 + .bss.g_ph_filter + 0x2000022c 0x4c ./Core/Src/ads1015_driver.o + 0x2000022c g_ph_filter + .bss.ads1015_state + 0x20000278 0x1 ./Core/Src/ads1015_driver.o + 0x20000278 ads1015_state + *fill* 0x20000279 0x3 + .bss.sample_count.1 + 0x2000027c 0x4 ./Core/Src/ads1015_driver.o + .bss.state_timer.0 + 0x20000280 0x4 ./Core/Src/ads1015_driver.o .bss.pin_states - 0x2000021c 0x8 ./Core/Src/digital_outputs_driver.o + 0x20000284 0x8 ./Core/Src/digital_outputs_driver.o .bss.flash_data - 0x20000224 0x400 ./Core/Src/flash_manager.o - 0x20000224 flash_data - .bss.hi2c1 0x20000624 0x54 ./Core/Src/i2c.o - 0x20000624 hi2c1 - .bss.hi2c2 0x20000678 0x54 ./Core/Src/i2c.o - 0x20000678 hi2c2 - .bss.main_state - 0x200006cc 0x1 ./Core/Src/main.o - 0x200006cc main_state - *fill* 0x200006cd 0x3 + 0x2000028c 0x400 ./Core/Src/flash_manager.o + 0x2000028c flash_data + .bss.hi2c1 0x2000068c 0x54 ./Core/Src/i2c.o + 0x2000068c hi2c1 + .bss.hi2c2 0x200006e0 0x54 ./Core/Src/i2c.o + 0x200006e0 hi2c2 .bss.device_address - 0x200006d0 0x3 ./Core/Src/rs485_driver.o - *fill* 0x200006d3 0x1 - .bss.huart1 0x200006d4 0x48 ./Core/Src/rs485_driver.o - .bss.huart1 0x2000071c 0x48 ./Core/Src/usart.o - 0x2000071c huart1 - .bss.uwTick 0x20000764 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x20000764 uwTick - .bss.pFlash 0x20000768 0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - 0x20000768 pFlash - .bss.__sf 0x20000788 0x138 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) - 0x20000788 __sf + 0x20000734 0x3 ./Core/Src/rs485_driver.o + *fill* 0x20000737 0x1 + .bss.huart1 0x20000738 0x48 ./Core/Src/rs485_driver.o + .bss.htim3 0x20000780 0x48 ./Core/Src/tim.o + 0x20000780 htim3 + .bss.huart1 0x200007c8 0x48 ./Core/Src/usart.o + 0x200007c8 huart1 + .bss.uwTick 0x20000810 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x20000810 uwTick + .bss.__sf 0x20000814 0x138 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) + 0x20000814 __sf *(COMMON) - 0x200008c0 . = ALIGN (0x4) - 0x200008c0 _ebss = . - 0x200008c0 __bss_end__ = _ebss + 0x2000094c . = ALIGN (0x4) + 0x2000094c _ebss = . + 0x2000094c __bss_end__ = _ebss ._user_heap_stack - 0x200008c0 0x600 load address 0x080068b8 - 0x200008c0 . = ALIGN (0x8) + 0x2000094c 0x604 load address 0x080067e8 + 0x20000950 . = ALIGN (0x8) + *fill* 0x2000094c 0x4 [!provide] PROVIDE (end = .) - 0x200008c0 PROVIDE (_end = .) - 0x20000ac0 . = (. + _Min_Heap_Size) - *fill* 0x200008c0 0x200 - 0x20000ec0 . = (. + _Min_Stack_Size) - *fill* 0x20000ac0 0x400 - 0x20000ec0 . = ALIGN (0x8) + 0x20000950 PROVIDE (_end = .) + 0x20000b50 . = (. + _Min_Heap_Size) + *fill* 0x20000950 0x200 + 0x20000f50 . = (. + _Min_Stack_Size) + *fill* 0x20000b50 0x400 + 0x20000f50 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -4501,51 +5253,51 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .ARM.attributes 0x00000239 0x2d ./Core/Src/system_stm32f1xx.o .ARM.attributes - 0x00000266 0x2d ./Core/Src/usart.o + 0x00000266 0x2d ./Core/Src/tim.o .ARM.attributes - 0x00000293 0x21 ./Core/Startup/startup_stm32f103c8tx.o + 0x00000293 0x2d ./Core/Src/usart.o .ARM.attributes - 0x000002b4 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x000002c0 0x21 ./Core/Startup/startup_stm32f103c8tx.o .ARM.attributes - 0x000002e1 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x000002e1 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .ARM.attributes - 0x0000030e 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x0000030e 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .ARM.attributes - 0x0000033b 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x0000033b 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .ARM.attributes - 0x00000368 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + 0x00000368 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .ARM.attributes - 0x00000395 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + 0x00000395 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .ARM.attributes - 0x000003c2 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x000003c2 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .ARM.attributes - 0x000003ef 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x000003ef 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .ARM.attributes - 0x0000041c 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x0000041c 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .ARM.attributes - 0x00000449 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + 0x00000449 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .ARM.attributes - 0x00000476 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x00000476 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o .ARM.attributes - 0x000004a3 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) + 0x000004a3 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .ARM.attributes - 0x000004d0 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memset.o) + 0x000004d0 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) .ARM.attributes - 0x000004fd 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) + 0x000004fd 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memset.o) .ARM.attributes - 0x0000052a 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-errno.o) + 0x0000052a 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) .ARM.attributes - 0x00000557 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-init.o) + 0x00000557 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-errno.o) .ARM.attributes - 0x00000584 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memcpy-stub.o) + 0x00000584 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-init.o) .ARM.attributes - 0x000005b1 0x17 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) + 0x000005b1 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memcpy-stub.o) .ARM.attributes - 0x000005c8 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-wf_sqrt.o) + 0x000005de 0x17 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) .ARM.attributes - 0x000005f5 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) + 0x000005f5 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-wf_sqrt.o) .ARM.attributes - 0x00000622 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) + 0x00000622 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) .ARM.attributes 0x0000064f 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) .ARM.attributes @@ -4563,323 +5315,331 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .ARM.attributes 0x0000071a 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) .ARM.attributes - 0x00000737 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) - .ARM.attributes - 0x00000754 0x1d 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.debug_frame 0x00004f64 0x38 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o) + .debug_frame 0x00004f9c 0xc8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o) + .debug_frame 0x00005064 0x24 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) .debug_line_str 0x00000000 0x52 diff --git a/Fertirrega_v6/Debug/objects.list b/Fertirrega_v6/Debug/objects.list index f9c78b7..9b3dd4c 100644 --- a/Fertirrega_v6/Debug/objects.list +++ b/Fertirrega_v6/Debug/objects.list @@ -13,6 +13,7 @@ "./Core/Src/syscalls.o" "./Core/Src/sysmem.o" "./Core/Src/system_stm32f1xx.o" +"./Core/Src/tim.o" "./Core/Src/usart.o" "./Core/Startup/startup_stm32f103c8tx.o" "./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o" @@ -29,4 +30,6 @@ "./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o" "./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o" "./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o" +"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o" +"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o" "./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o" diff --git a/Fertirrega_v6/Fertirrega_v6.ioc b/Fertirrega_v6/Fertirrega_v6.ioc index 9ea7627..2d6461a 100644 --- a/Fertirrega_v6/Fertirrega_v6.ioc +++ b/Fertirrega_v6/Fertirrega_v6.ioc @@ -27,8 +27,9 @@ Mcu.IP3=I2C2 Mcu.IP4=NVIC Mcu.IP5=RCC Mcu.IP6=SYS -Mcu.IP7=USART1 -Mcu.IPNb=8 +Mcu.IP7=TIM3 +Mcu.IP8=USART1 +Mcu.IPNb=9 Mcu.Name=STM32F103C(8-B)Tx Mcu.Package=LQFP48 Mcu.Pin0=PC13-TAMPER-RTC @@ -63,13 +64,14 @@ Mcu.Pin34=PB7 Mcu.Pin35=PB8 Mcu.Pin36=PB9 Mcu.Pin37=VP_SYS_VS_Systick +Mcu.Pin38=VP_TIM3_VS_ClockSourceINT Mcu.Pin4=PD1-OSC_OUT Mcu.Pin5=PA0-WKUP Mcu.Pin6=PA1 Mcu.Pin7=PA2 Mcu.Pin8=PA3 Mcu.Pin9=PA4 -Mcu.PinsNb=38 +Mcu.PinsNb=39 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32F103C8Tx @@ -85,6 +87,7 @@ NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false +NVIC.TIM3_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false PA0-WKUP.GPIOParameters=GPIO_Label @@ -311,7 +314,7 @@ ProjectManager.ToolChainLocation= ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptBeforePath= ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_ADC2_Init-ADC2-false-HAL-true,5-MX_I2C1_Init-I2C1-false-HAL-true,6-MX_I2C2_Init-I2C2-false-HAL-true,7-MX_USART1_UART_Init-USART1-false-HAL-true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_ADC2_Init-ADC2-false-HAL-true,5-MX_I2C1_Init-I2C1-false-HAL-true,6-MX_I2C2_Init-I2C2-false-HAL-true,7-MX_USART1_UART_Init-USART1-false-HAL-true,8-MX_TIM3_Init-TIM3-false-HAL-true RCC.ADCFreqValue=1500000 RCC.ADCPresc=RCC_ADCPCLK2_DIV8 RCC.AHBFreq_Value=12000000 @@ -323,12 +326,14 @@ RCC.FCLKCortexFreq_Value=12000000 RCC.FamilyName=M RCC.HCLKFreq_Value=12000000 RCC.HSE_VALUE=12000000 -RCC.IPParameters=ADCFreqValue,ADCPresc,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLSourceVirtual,PREFETCH_ENABLE,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,TimSys_Div,USBFreq_Value,VCOOutput2Freq_Value +RCC.IPParameters=ADCFreqValue,ADCPresc,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLSourceVirtual,PREFETCH_ENABLE,RTCClockSelection,RTCFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,TimSys_Div,USBFreq_Value,VCOOutput2Freq_Value RCC.MCOFreq_Value=12000000 RCC.PLLCLKFreq_Value=24000000 RCC.PLLMCOFreq_Value=12000000 RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE RCC.PREFETCH_ENABLE=1 +RCC.RTCClockSelection=RCC_RTCCLKSOURCE_HSE_DIV128 +RCC.RTCFreq_Value=93750 RCC.SYSCLKFreq_VALUE=12000000 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_HSE RCC.TimSysFreq_Value=1500000 @@ -341,8 +346,14 @@ SH.ADCx_IN0.ConfNb=2 SH.ADCx_IN1.0=ADC2_IN1,IN1 SH.ADCx_IN1.1=ADC1_IN1 SH.ADCx_IN1.ConfNb=2 +TIM3.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE +TIM3.IPParameters=Prescaler,AutoReloadPreload,Period +TIM3.Period=999 +TIM3.Prescaler=2 USART1.IPParameters=VirtualMode USART1.VirtualMode=VM_ASYNC VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick +VP_TIM3_VS_ClockSourceINT.Mode=Internal +VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT board=custom