: /** * @brief The application entry point. * @retval int */ int main(void) { 800218c: b580 push {r7, lr} 800218e: b090 sub sp, #64 @ 0x40 8002190: af00 add r7, sp, #0 /* USER CODE BEGIN 1 */ HAL_StatusTypeDef status0,status1; // Variables to store previous LED states uint8_t previous_green_state = 0; 8002192: 2300 movs r3, #0 8002194: f887 303f strb.w r3, [r7, #63] @ 0x3f uint8_t previous_red_state = 0; 8002198: 2300 movs r3, #0 800219a: f887 303e strb.w r3, [r7, #62] @ 0x3e // Variables for timing uint32_t previous_millis_green = 0; 800219e: 2300 movs r3, #0 80021a0: 63bb str r3, [r7, #56] @ 0x38 uint32_t previous_millis_red = 0; 80021a2: 2300 movs r3, #0 80021a4: 637b str r3, [r7, #52] @ 0x34 /*! Temporary variables */ uint8_t tempString[10] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; 80021a6: f107 0308 add.w r3, r7, #8 80021aa: 2200 movs r2, #0 80021ac: 601a str r2, [r3, #0] 80021ae: 605a str r2, [r3, #4] 80021b0: 811a strh r2, [r3, #8] /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 80021b2: f000 fd03 bl 8002bbc /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 80021b6: f000 f991 bl 80024dc /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 80021ba: f7ff fe7f bl 8001ebc MX_ADC1_Init(); 80021be: f7ff fb65 bl 800188c MX_ADC2_Init(); 80021c2: f7ff fba1 bl 8001908 MX_I2C1_Init(); 80021c6: f7ff ff19 bl 8001ffc MX_I2C2_Init(); 80021ca: f7ff ff45 bl 8002058 MX_USART1_UART_Init(); 80021ce: f000 fc51 bl 8002a74 /* USER CODE BEGIN 2 */ Flash_Load_Page(&flash_data); 80021d2: 48b9 ldr r0, [pc, #740] @ (80024b8 ) 80021d4: f7ff fe52 bl 8001e7c HAL_TIM_Base_Start(&htim3); HAL_ADCEx_Calibration_Start(&hadc1); HAL_ADC_Start_DMA(&hadc1, (uint32_t*)AD_RES, 2); // Internal Temperature conversion */ digital_outputs_init(); 80021d8: f7ff fdb4 bl 8001d44 // Initialize RS-485 driver rs485_init(); 80021dc: f000 faf4 bl 80027c8 ADS1015(&i2c, &hi2c1, ADS_ADDR_GND); 80021e0: 2248 movs r2, #72 @ 0x48 80021e2: 49b6 ldr r1, [pc, #728] @ (80024bc ) 80021e4: 48b6 ldr r0, [pc, #728] @ (80024c0 ) 80021e6: f7ff fc7e bl 8001ae6 ADSsetGain(&i2c, GAIN_SIXTEEN); 80021ea: f44f 6120 mov.w r1, #2560 @ 0xa00 80021ee: 48b4 ldr r0, [pc, #720] @ (80024c0 ) 80021f0: f7ff fc97 bl 8001b22 // Start CE and RTD Measurement AD5934_Init(); 80021f4: f7fe fed2 bl 8000f9c /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ if(HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_3) == GPIO_PIN_RESET) // When PB3 (with internal pull up) in the Prog Header is set to GND 80021f8: 2108 movs r1, #8 80021fa: 48b2 ldr r0, [pc, #712] @ (80024c4 ) 80021fc: f001 fcba bl 8003b74 8002200: 4603 mov r3, r0 8002202: 2b00 cmp r3, #0 8002204: f040 8091 bne.w 800232a { main_state = STATE_SETUP_CALIBRATION; 8002208: 4baf ldr r3, [pc, #700] @ (80024c8 ) 800220a: 2201 movs r2, #1 800220c: 701a strb r2, [r3, #0] HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); 800220e: 2201 movs r2, #1 8002210: 2110 movs r1, #16 8002212: 48ac ldr r0, [pc, #688] @ (80024c4 ) 8002214: f001 fcc5 bl 8003ba2 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_RESET); // Red LED On 8002218: 2200 movs r2, #0 800221a: 2120 movs r1, #32 800221c: 48a9 ldr r0, [pc, #676] @ (80024c4 ) 800221e: f001 fcc0 bl 8003ba2 for(i=0;i<32;i++) // Loop to get stability and get averages 8002222: 2300 movs r3, #0 8002224: f887 3033 strb.w r3, [r7, #51] @ 0x33 8002228: e032 b.n 8002290 { flash_data.ph4_volts = ADSCalculate_ph_Volts(); 800222a: f7ff fcc7 bl 8001bbc 800222e: 4603 mov r3, r0 8002230: 4aa1 ldr r2, [pc, #644] @ (80024b8 ) 8002232: 6053 str r3, [r2, #4] flash_data.temperature_value = AD5934_GetTemperature(); // Air Temperature is not stored, just used to calculate impedance 8002234: f7fe ff0e bl 8001054 8002238: 4603 mov r3, r0 800223a: 4a9f ldr r2, [pc, #636] @ (80024b8 ) 800223c: 6153 str r3, [r2, #20] flash_data.ec0_mag = AD5934_GetImpedance(flash_data.temperature_value); // Dry Probe 800223e: 4b9e ldr r3, [pc, #632] @ (80024b8 ) 8002240: 695b ldr r3, [r3, #20] 8002242: 4618 mov r0, r3 8002244: f7ff f902 bl 800144c 8002248: 4603 mov r3, r0 800224a: 4a9b ldr r2, [pc, #620] @ (80024b8 ) 800224c: 6113 str r3, [r2, #16] if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) 800224e: 2140 movs r1, #64 @ 0x40 8002250: 489e ldr r0, [pc, #632] @ (80024cc ) 8002252: f001 fc8f bl 8003b74 8002256: 4603 mov r3, r0 8002258: 2b01 cmp r3, #1 800225a: d103 bne.n 8002264 flash_data.EC10mS_EC5mS_switch = AD5934_CH_EC_HIGH_GAIN; // 5mS/cm option 800225c: 4b96 ldr r3, [pc, #600] @ (80024b8 ) 800225e: 2284 movs r2, #132 @ 0x84 8002260: 765a strb r2, [r3, #25] 8002262: e002 b.n 800226a else flash_data.EC10mS_EC5mS_switch = AD5934_CH_EC_MID_GAIN; //10ms/cm option 8002264: 4b94 ldr r3, [pc, #592] @ (80024b8 ) 8002266: 2282 movs r2, #130 @ 0x82 8002268: 765a strb r2, [r3, #25] if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) 800226a: 2180 movs r1, #128 @ 0x80 800226c: 4897 ldr r0, [pc, #604] @ (80024cc ) 800226e: f001 fc81 bl 8003b74 8002272: 4603 mov r3, r0 8002274: 2b01 cmp r3, #1 8002276: d103 bne.n 8002280 flash_data.PT100_PT1000_switch = AD5934_CH_RTD_LOW_GAIN; //PT100 option 8002278: 4b8f ldr r3, [pc, #572] @ (80024b8 ) 800227a: 2241 movs r2, #65 @ 0x41 800227c: 761a strb r2, [r3, #24] 800227e: e002 b.n 8002286 else flash_data.PT100_PT1000_switch = AD5934_CH_RTD_MID_GAIN; //PT1000 option 8002280: 4b8d ldr r3, [pc, #564] @ (80024b8 ) 8002282: 2242 movs r2, #66 @ 0x42 8002284: 761a strb r2, [r3, #24] for(i=0;i<32;i++) // Loop to get stability and get averages 8002286: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 800228a: 3301 adds r3, #1 800228c: f887 3033 strb.w r3, [r7, #51] @ 0x33 8002290: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 8002294: 2b1f cmp r3, #31 8002296: d9c8 bls.n 800222a } while(HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_3) == GPIO_PIN_RESET); 8002298: bf00 nop 800229a: 2108 movs r1, #8 800229c: 4889 ldr r0, [pc, #548] @ (80024c4 ) 800229e: f001 fc69 bl 8003b74 80022a2: 4603 mov r3, r0 80022a4: 2b00 cmp r3, #0 80022a6: d0f8 beq.n 800229a HAL_Delay(500); 80022a8: f44f 70fa mov.w r0, #500 @ 0x1f4 80022ac: f000 fce8 bl 8002c80 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_RESET); // Green LED On 80022b0: 2200 movs r2, #0 80022b2: 2110 movs r1, #16 80022b4: 4883 ldr r0, [pc, #524] @ (80024c4 ) 80022b6: f001 fc74 bl 8003ba2 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); 80022ba: 2201 movs r2, #1 80022bc: 2120 movs r1, #32 80022be: 4881 ldr r0, [pc, #516] @ (80024c4 ) 80022c0: f001 fc6f bl 8003ba2 for(i=0;i<32;i++) // Loop to get stability and get averages 80022c4: 2300 movs r3, #0 80022c6: f887 3033 strb.w r3, [r7, #51] @ 0x33 80022ca: e019 b.n 8002300 { flash_data.temperature_value = AD5934_GetTemperature(); // Liquid Temperature is stored 80022cc: f7fe fec2 bl 8001054 80022d0: 4603 mov r3, r0 80022d2: 4a79 ldr r2, [pc, #484] @ (80024b8 ) 80022d4: 6153 str r3, [r2, #20] flash_data.ph7_volts = ADSCalculate_ph_Volts(); 80022d6: f7ff fc71 bl 8001bbc 80022da: 4603 mov r3, r0 80022dc: 4a76 ldr r2, [pc, #472] @ (80024b8 ) 80022de: 6093 str r3, [r2, #8] flash_data.ec1413_mag = AD5934_GetImpedance(flash_data.temperature_value); // Get the impedance of the reference liquid 80022e0: 4b75 ldr r3, [pc, #468] @ (80024b8 ) 80022e2: 695b ldr r3, [r3, #20] 80022e4: 4618 mov r0, r3 80022e6: f7ff f8b1 bl 800144c 80022ea: 4603 mov r3, r0 80022ec: 4a72 ldr r2, [pc, #456] @ (80024b8 ) 80022ee: 60d3 str r3, [r2, #12] Flash_Save_Page(&flash_data); // Store Calibration parameters in Flash 80022f0: 4871 ldr r0, [pc, #452] @ (80024b8 ) 80022f2: f7ff fd69 bl 8001dc8 for(i=0;i<32;i++) // Loop to get stability and get averages 80022f6: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 80022fa: 3301 adds r3, #1 80022fc: f887 3033 strb.w r3, [r7, #51] @ 0x33 8002300: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 8002304: 2b1f cmp r3, #31 8002306: d9e1 bls.n 80022cc } HAL_Delay(500); 8002308: f44f 70fa mov.w r0, #500 @ 0x1f4 800230c: f000 fcb8 bl 8002c80 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_RESET); // Green LED On 8002310: 2200 movs r2, #0 8002312: 2110 movs r1, #16 8002314: 486b ldr r0, [pc, #428] @ (80024c4 ) 8002316: f001 fc44 bl 8003ba2 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_RESET); // Red LED On 800231a: 2200 movs r2, #0 800231c: 2120 movs r1, #32 800231e: 4869 ldr r0, [pc, #420] @ (80024c4 ) 8002320: f001 fc3f bl 8003ba2 main_state = STATE_RUNNING_OK; 8002324: 4b68 ldr r3, [pc, #416] @ (80024c8 ) 8002326: 2200 movs r2, #0 8002328: 701a strb r2, [r3, #0] { current_millis = HAL_GetTick(); 800232a: f000 fc9f bl 8002c6c 800232e: 62f8 str r0, [r7, #44] @ 0x2c // Piscar LED verde em PB5 a cada 0,5 segundos if ((current_millis - previous_millis_green) >= 500) 8002330: 6afa ldr r2, [r7, #44] @ 0x2c 8002332: 6bbb ldr r3, [r7, #56] @ 0x38 8002334: 1ad3 subs r3, r2, r3 8002336: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800233a: d372 bcc.n 8002422 { previous_millis_green = current_millis; 800233c: 6afb ldr r3, [r7, #44] @ 0x2c 800233e: 63bb str r3, [r7, #56] @ 0x38 HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_5); 8002340: 2120 movs r1, #32 8002342: 4860 ldr r0, [pc, #384] @ (80024c4 ) 8002344: f001 fc45 bl 8003bd2 // Check if state changed and send via RS485 uint8_t current_green_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_5); 8002348: 2120 movs r1, #32 800234a: 485e ldr r0, [pc, #376] @ (80024c4 ) 800234c: f001 fc12 bl 8003b74 8002350: 4603 mov r3, r0 8002352: f887 302b strb.w r3, [r7, #43] @ 0x2b if (current_green_state != previous_green_state) 8002356: f897 202b ldrb.w r2, [r7, #43] @ 0x2b 800235a: f897 303f ldrb.w r3, [r7, #63] @ 0x3f 800235e: 429a cmp r2, r3 8002360: d008 beq.n 8002374 { previous_green_state = current_green_state; 8002362: f897 302b ldrb.w r3, [r7, #43] @ 0x2b 8002366: f887 303f strb.w r3, [r7, #63] @ 0x3f uint8_t led_data[2] = {0x01, current_green_state}; // Command 0x01 for green LED 800236a: 2301 movs r3, #1 800236c: 713b strb r3, [r7, #4] 800236e: f897 302b ldrb.w r3, [r7, #43] @ 0x2b 8002372: 717b strb r3, [r7, #5] } temperature_RTD = AD5934_GetTemperature(); 8002374: f7fe fe6e bl 8001054 8002378: 6278 str r0, [r7, #36] @ 0x24 FloatToString(tempString, temperature_RTD); 800237a: 6a78 ldr r0, [r7, #36] @ 0x24 800237c: f7fe f97c bl 8000678 <__aeabi_f2d> 8002380: 4602 mov r2, r0 8002382: 460b mov r3, r1 8002384: f107 0108 add.w r1, r7, #8 8002388: 4608 mov r0, r1 800238a: f000 f8f7 bl 800257c status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); 800238e: f107 0308 add.w r3, r7, #8 8002392: 4618 mov r0, r3 8002394: f7fd feda bl 800014c 8002398: 4603 mov r3, r0 800239a: b29b uxth r3, r3 800239c: 3b01 subs r3, #1 800239e: b29a uxth r2, r3 80023a0: f107 0308 add.w r3, r7, #8 80023a4: 4611 mov r1, r2 80023a6: 4618 mov r0, r3 80023a8: f000 fa3a bl 8002820 80023ac: 4603 mov r3, r0 80023ae: f887 3023 strb.w r3, [r7, #35] @ 0x23 status1 = rs485_send_broadcast(newline_temp, strlen((char*)newline_temp)); 80023b2: 4847 ldr r0, [pc, #284] @ (80024d0 ) 80023b4: f7fd feca bl 800014c 80023b8: 4603 mov r3, r0 80023ba: b29b uxth r3, r3 80023bc: 4619 mov r1, r3 80023be: 4844 ldr r0, [pc, #272] @ (80024d0 ) 80023c0: f000 fa2e bl 8002820 80023c4: 4603 mov r3, r0 80023c6: f887 3022 strb.w r3, [r7, #34] @ 0x22 admittance_EC = AD5934_GetImpedance(temperature_RTD); 80023ca: 6a78 ldr r0, [r7, #36] @ 0x24 80023cc: f7ff f83e bl 800144c 80023d0: 61f8 str r0, [r7, #28] FloatToString(tempString, admittance_EC); 80023d2: 69f8 ldr r0, [r7, #28] 80023d4: f7fe f950 bl 8000678 <__aeabi_f2d> 80023d8: 4602 mov r2, r0 80023da: 460b mov r3, r1 80023dc: f107 0108 add.w r1, r7, #8 80023e0: 4608 mov r0, r1 80023e2: f000 f8cb bl 800257c status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); 80023e6: f107 0308 add.w r3, r7, #8 80023ea: 4618 mov r0, r3 80023ec: f7fd feae bl 800014c 80023f0: 4603 mov r3, r0 80023f2: b29b uxth r3, r3 80023f4: 3b01 subs r3, #1 80023f6: b29a uxth r2, r3 80023f8: f107 0308 add.w r3, r7, #8 80023fc: 4611 mov r1, r2 80023fe: 4618 mov r0, r3 8002400: f000 fa0e bl 8002820 8002404: 4603 mov r3, r0 8002406: f887 3023 strb.w r3, [r7, #35] @ 0x23 status1 = rs485_send_broadcast(newline_admi, strlen((char*)newline_admi)); 800240a: 4832 ldr r0, [pc, #200] @ (80024d4 ) 800240c: f7fd fe9e bl 800014c 8002410: 4603 mov r3, r0 8002412: b29b uxth r3, r3 8002414: 4619 mov r1, r3 8002416: 482f ldr r0, [pc, #188] @ (80024d4 ) 8002418: f000 fa02 bl 8002820 800241c: 4603 mov r3, r0 800241e: f887 3022 strb.w r3, [r7, #34] @ 0x22 } // Piscar LED vermelho em PB4 a cada 1 segundo if ((current_millis - previous_millis_red) >= 1000) 8002422: 6afa ldr r2, [r7, #44] @ 0x2c 8002424: 6b7b ldr r3, [r7, #52] @ 0x34 8002426: 1ad3 subs r3, r2, r3 8002428: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800242c: f4ff af7d bcc.w 800232a { previous_millis_red = current_millis; 8002430: 6afb ldr r3, [r7, #44] @ 0x2c 8002432: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_4); 8002434: 2110 movs r1, #16 8002436: 4823 ldr r0, [pc, #140] @ (80024c4 ) 8002438: f001 fbcb bl 8003bd2 // Check if state changed and send via RS485 uint8_t current_red_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_4); 800243c: 2110 movs r1, #16 800243e: 4821 ldr r0, [pc, #132] @ (80024c4 ) 8002440: f001 fb98 bl 8003b74 8002444: 4603 mov r3, r0 8002446: 76fb strb r3, [r7, #27] if (current_red_state != previous_red_state) 8002448: 7efa ldrb r2, [r7, #27] 800244a: f897 303e ldrb.w r3, [r7, #62] @ 0x3e 800244e: 429a cmp r2, r3 8002450: d006 beq.n 8002460 { previous_red_state = current_red_state; 8002452: 7efb ldrb r3, [r7, #27] 8002454: f887 303e strb.w r3, [r7, #62] @ 0x3e uint8_t led_data[2] = {0x02, current_red_state}; // Command 0x02 for red LED 8002458: 2302 movs r3, #2 800245a: 703b strb r3, [r7, #0] 800245c: 7efb ldrb r3, [r7, #27] 800245e: 707b strb r3, [r7, #1] } ph_compensated = ADSCalculate_ph_Uncompensated(); 8002460: f7ff fc02 bl 8001c68 8002464: 6178 str r0, [r7, #20] FloatToString(tempString, ph_compensated); 8002466: 6978 ldr r0, [r7, #20] 8002468: f7fe f906 bl 8000678 <__aeabi_f2d> 800246c: 4602 mov r2, r0 800246e: 460b mov r3, r1 8002470: f107 0108 add.w r1, r7, #8 8002474: 4608 mov r0, r1 8002476: f000 f881 bl 800257c status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); 800247a: f107 0308 add.w r3, r7, #8 800247e: 4618 mov r0, r3 8002480: f7fd fe64 bl 800014c 8002484: 4603 mov r3, r0 8002486: b29b uxth r3, r3 8002488: 3b01 subs r3, #1 800248a: b29a uxth r2, r3 800248c: f107 0308 add.w r3, r7, #8 8002490: 4611 mov r1, r2 8002492: 4618 mov r0, r3 8002494: f000 f9c4 bl 8002820 8002498: 4603 mov r3, r0 800249a: f887 3023 strb.w r3, [r7, #35] @ 0x23 status1 = rs485_send_broadcast(newline_ph, strlen((char*)newline_ph)); 800249e: 480e ldr r0, [pc, #56] @ (80024d8 ) 80024a0: f7fd fe54 bl 800014c 80024a4: 4603 mov r3, r0 80024a6: b29b uxth r3, r3 80024a8: 4619 mov r1, r3 80024aa: 480b ldr r0, [pc, #44] @ (80024d8 ) 80024ac: f000 f9b8 bl 8002820 80024b0: 4603 mov r3, r0 80024b2: f887 3022 strb.w r3, [r7, #34] @ 0x22 current_millis = HAL_GetTick(); 80024b6: e738 b.n 800232a 80024b8: 200001ac .word 0x200001ac 80024bc: 200005ac .word 0x200005ac 80024c0: 20000174 .word 0x20000174 80024c4: 40010c00 .word 0x40010c00 80024c8: 20000654 .word 0x20000654 80024cc: 40010800 .word 0x40010800 80024d0: 20000010 .word 0x20000010 80024d4: 20000008 .word 0x20000008 80024d8: 20000000 .word 0x20000000 080024dc : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 80024dc: b580 push {r7, lr} 80024de: b094 sub sp, #80 @ 0x50 80024e0: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 80024e2: f107 0328 add.w r3, r7, #40 @ 0x28 80024e6: 2228 movs r2, #40 @ 0x28 80024e8: 2100 movs r1, #0 80024ea: 4618 mov r0, r3 80024ec: f003 fe9c bl 8006228 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 80024f0: f107 0314 add.w r3, r7, #20 80024f4: 2200 movs r2, #0 80024f6: 601a str r2, [r3, #0] 80024f8: 605a str r2, [r3, #4] 80024fa: 609a str r2, [r3, #8] 80024fc: 60da str r2, [r3, #12] 80024fe: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8002500: 1d3b adds r3, r7, #4 8002502: 2200 movs r2, #0 8002504: 601a str r2, [r3, #0] 8002506: 605a str r2, [r3, #4] 8002508: 609a str r2, [r3, #8] 800250a: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 800250c: 2301 movs r3, #1 800250e: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8002510: f44f 3380 mov.w r3, #65536 @ 0x10000 8002514: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; 8002516: 2300 movs r3, #0 8002518: 647b str r3, [r7, #68] @ 0x44 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 800251a: f107 0328 add.w r3, r7, #40 @ 0x28 800251e: 4618 mov r0, r3 8002520: f002 fba4 bl 8004c6c 8002524: 4603 mov r3, r0 8002526: 2b00 cmp r3, #0 8002528: d001 beq.n 800252e { Error_Handler(); 800252a: f000 f93b bl 80027a4 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800252e: 230f movs r3, #15 8002530: 617b str r3, [r7, #20] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; 8002532: 2301 movs r3, #1 8002534: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8002536: 2300 movs r3, #0 8002538: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 800253a: 2300 movs r3, #0 800253c: 623b str r3, [r7, #32] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 800253e: 2300 movs r3, #0 8002540: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 8002542: f107 0314 add.w r3, r7, #20 8002546: 2100 movs r1, #0 8002548: 4618 mov r0, r3 800254a: f002 fe11 bl 8005170 800254e: 4603 mov r3, r0 8002550: 2b00 cmp r3, #0 8002552: d001 beq.n 8002558 { Error_Handler(); 8002554: f000 f926 bl 80027a4 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; 8002558: 2302 movs r3, #2 800255a: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV8; 800255c: f44f 4340 mov.w r3, #49152 @ 0xc000 8002560: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8002562: 1d3b adds r3, r7, #4 8002564: 4618 mov r0, r3 8002566: f002 ff93 bl 8005490 800256a: 4603 mov r3, r0 800256c: 2b00 cmp r3, #0 800256e: d001 beq.n 8002574 { Error_Handler(); 8002570: f000 f918 bl 80027a4 } } 8002574: bf00 nop 8002576: 3750 adds r7, #80 @ 0x50 8002578: 46bd mov sp, r7 800257a: bd80 pop {r7, pc} 0800257c : * @param val - value to be converted * * @return None. *******************************************************************************/ void FloatToString(char *buf, double val) { 800257c: b5b0 push {r4, r5, r7, lr} 800257e: b096 sub sp, #88 @ 0x58 8002580: af00 add r7, sp, #0 8002582: 60f8 str r0, [r7, #12] 8002584: e9c7 2300 strd r2, r3, [r7] char temp[20]; // Buffer auxiliar para construção segura int i = 0; 8002588: 2300 movs r3, #0 800258a: 657b str r3, [r7, #84] @ 0x54 // 1. Tratar sinal negativo if (val < 0) { 800258c: f04f 0200 mov.w r2, #0 8002590: f04f 0300 mov.w r3, #0 8002594: e9d7 0100 ldrd r0, r1, [r7] 8002598: f7fe f926 bl 80007e8 <__aeabi_dcmplt> 800259c: 4603 mov r3, r0 800259e: 2b00 cmp r3, #0 80025a0: d00d beq.n 80025be temp[i++] = '-'; 80025a2: 6d7b ldr r3, [r7, #84] @ 0x54 80025a4: 1c5a adds r2, r3, #1 80025a6: 657a str r2, [r7, #84] @ 0x54 80025a8: 3358 adds r3, #88 @ 0x58 80025aa: 443b add r3, r7 80025ac: 222d movs r2, #45 @ 0x2d 80025ae: f803 2c30 strb.w r2, [r3, #-48] val = -val; 80025b2: 683c ldr r4, [r7, #0] 80025b4: 687b ldr r3, [r7, #4] 80025b6: f083 4500 eor.w r5, r3, #2147483648 @ 0x80000000 80025ba: e9c7 4500 strd r4, r5, [r7] } // 2. Separar parte inteira e fracionária long intPart = (long)val; 80025be: e9d7 0100 ldrd r0, r1, [r7] 80025c2: f7fe f939 bl 8000838 <__aeabi_d2iz> 80025c6: 4603 mov r3, r0 80025c8: 653b str r3, [r7, #80] @ 0x50 // Multiplicamos por 1000 para obter 3 casas decimais fixas int fracPart = (int)((val - (double)intPart) * 1000.0 + 0.5); 80025ca: 6d38 ldr r0, [r7, #80] @ 0x50 80025cc: f7fe f842 bl 8000654 <__aeabi_i2d> 80025d0: 4602 mov r2, r0 80025d2: 460b mov r3, r1 80025d4: e9d7 0100 ldrd r0, r1, [r7] 80025d8: f7fd feee bl 80003b8 <__aeabi_dsub> 80025dc: 4602 mov r2, r0 80025de: 460b mov r3, r1 80025e0: 4610 mov r0, r2 80025e2: 4619 mov r1, r3 80025e4: f04f 0200 mov.w r2, #0 80025e8: 4b6a ldr r3, [pc, #424] @ (8002794 ) 80025ea: f7fd fdb7 bl 800015c <__aeabi_dmul> 80025ee: 4602 mov r2, r0 80025f0: 460b mov r3, r1 80025f2: 4610 mov r0, r2 80025f4: 4619 mov r1, r3 80025f6: f04f 0200 mov.w r2, #0 80025fa: 4b67 ldr r3, [pc, #412] @ (8002798 ) 80025fc: f7fd fede bl 80003bc <__adddf3> 8002600: 4602 mov r2, r0 8002602: 460b mov r3, r1 8002604: 4610 mov r0, r2 8002606: 4619 mov r1, r3 8002608: f7fe f916 bl 8000838 <__aeabi_d2iz> 800260c: 4603 mov r3, r0 800260e: 63fb str r3, [r7, #60] @ 0x3c // 3. Converter a parte inteira para o buffer temp // Usamos um buffer temporário de inversão para não precisar de lógica complexa de ponteiro char intRev[12]; int j = 0; 8002610: 2300 movs r3, #0 8002612: 64fb str r3, [r7, #76] @ 0x4c if (intPart == 0) { 8002614: 6d3b ldr r3, [r7, #80] @ 0x50 8002616: 2b00 cmp r3, #0 8002618: d126 bne.n 8002668 intRev[j++] = '0'; 800261a: 6cfb ldr r3, [r7, #76] @ 0x4c 800261c: 1c5a adds r2, r3, #1 800261e: 64fa str r2, [r7, #76] @ 0x4c 8002620: 3358 adds r3, #88 @ 0x58 8002622: 443b add r3, r7 8002624: 2230 movs r2, #48 @ 0x30 8002626: f803 2c3c strb.w r2, [r3, #-60] 800262a: e020 b.n 800266e } else { while (intPart > 0) { intRev[j++] = (intPart % 10) + '0'; 800262c: 6d3a ldr r2, [r7, #80] @ 0x50 800262e: 4b5b ldr r3, [pc, #364] @ (800279c ) 8002630: fb83 1302 smull r1, r3, r3, r2 8002634: 1099 asrs r1, r3, #2 8002636: 17d3 asrs r3, r2, #31 8002638: 1ac9 subs r1, r1, r3 800263a: 460b mov r3, r1 800263c: 009b lsls r3, r3, #2 800263e: 440b add r3, r1 8002640: 005b lsls r3, r3, #1 8002642: 1ad1 subs r1, r2, r3 8002644: b2ca uxtb r2, r1 8002646: 6cfb ldr r3, [r7, #76] @ 0x4c 8002648: 1c59 adds r1, r3, #1 800264a: 64f9 str r1, [r7, #76] @ 0x4c 800264c: 3230 adds r2, #48 @ 0x30 800264e: b2d2 uxtb r2, r2 8002650: 3358 adds r3, #88 @ 0x58 8002652: 443b add r3, r7 8002654: f803 2c3c strb.w r2, [r3, #-60] intPart /= 10; 8002658: 6d3b ldr r3, [r7, #80] @ 0x50 800265a: 4a50 ldr r2, [pc, #320] @ (800279c ) 800265c: fb82 1203 smull r1, r2, r2, r3 8002660: 1092 asrs r2, r2, #2 8002662: 17db asrs r3, r3, #31 8002664: 1ad3 subs r3, r2, r3 8002666: 653b str r3, [r7, #80] @ 0x50 while (intPart > 0) { 8002668: 6d3b ldr r3, [r7, #80] @ 0x50 800266a: 2b00 cmp r3, #0 800266c: dcde bgt.n 800262c } } // Inverter a parte inteira de volta para o buffer principal for (int k = j - 1; k >= 0; k--) { 800266e: 6cfb ldr r3, [r7, #76] @ 0x4c 8002670: 3b01 subs r3, #1 8002672: 64bb str r3, [r7, #72] @ 0x48 8002674: e00e b.n 8002694 temp[i++] = intRev[k]; 8002676: 6d7b ldr r3, [r7, #84] @ 0x54 8002678: 1c5a adds r2, r3, #1 800267a: 657a str r2, [r7, #84] @ 0x54 800267c: f107 011c add.w r1, r7, #28 8002680: 6cba ldr r2, [r7, #72] @ 0x48 8002682: 440a add r2, r1 8002684: 7812 ldrb r2, [r2, #0] 8002686: 3358 adds r3, #88 @ 0x58 8002688: 443b add r3, r7 800268a: f803 2c30 strb.w r2, [r3, #-48] for (int k = j - 1; k >= 0; k--) { 800268e: 6cbb ldr r3, [r7, #72] @ 0x48 8002690: 3b01 subs r3, #1 8002692: 64bb str r3, [r7, #72] @ 0x48 8002694: 6cbb ldr r3, [r7, #72] @ 0x48 8002696: 2b00 cmp r3, #0 8002698: daed bge.n 8002676 } // 4. Adicionar o ponto decimal e a parte fracionária (sempre 3 casas) temp[i++] = '.'; 800269a: 6d7b ldr r3, [r7, #84] @ 0x54 800269c: 1c5a adds r2, r3, #1 800269e: 657a str r2, [r7, #84] @ 0x54 80026a0: 3358 adds r3, #88 @ 0x58 80026a2: 443b add r3, r7 80026a4: 222e movs r2, #46 @ 0x2e 80026a6: f803 2c30 strb.w r2, [r3, #-48] // Garantir que a parte fracionária tenha sempre 3 dígitos (ex: .005 em vez de .5) int fracBuffer[3]; fracBuffer[2] = fracPart % 10; // Unidade 80026aa: 6bf9 ldr r1, [r7, #60] @ 0x3c 80026ac: 4b3b ldr r3, [pc, #236] @ (800279c ) 80026ae: fb83 2301 smull r2, r3, r3, r1 80026b2: 109a asrs r2, r3, #2 80026b4: 17cb asrs r3, r1, #31 80026b6: 1ad2 subs r2, r2, r3 80026b8: 4613 mov r3, r2 80026ba: 009b lsls r3, r3, #2 80026bc: 4413 add r3, r2 80026be: 005b lsls r3, r3, #1 80026c0: 1aca subs r2, r1, r3 80026c2: 61ba str r2, [r7, #24] fracBuffer[1] = (fracPart / 10) % 10; // Dezena 80026c4: 6bfb ldr r3, [r7, #60] @ 0x3c 80026c6: 4a35 ldr r2, [pc, #212] @ (800279c ) 80026c8: fb82 1203 smull r1, r2, r2, r3 80026cc: 1092 asrs r2, r2, #2 80026ce: 17db asrs r3, r3, #31 80026d0: 1ad1 subs r1, r2, r3 80026d2: 4b32 ldr r3, [pc, #200] @ (800279c ) 80026d4: fb83 2301 smull r2, r3, r3, r1 80026d8: 109a asrs r2, r3, #2 80026da: 17cb asrs r3, r1, #31 80026dc: 1ad2 subs r2, r2, r3 80026de: 4613 mov r3, r2 80026e0: 009b lsls r3, r3, #2 80026e2: 4413 add r3, r2 80026e4: 005b lsls r3, r3, #1 80026e6: 1aca subs r2, r1, r3 80026e8: 617a str r2, [r7, #20] fracBuffer[0] = (fracPart / 100) % 10; // Centena 80026ea: 6bfb ldr r3, [r7, #60] @ 0x3c 80026ec: 4a2c ldr r2, [pc, #176] @ (80027a0 ) 80026ee: fb82 1203 smull r1, r2, r2, r3 80026f2: 1152 asrs r2, r2, #5 80026f4: 17db asrs r3, r3, #31 80026f6: 1ad1 subs r1, r2, r3 80026f8: 4b28 ldr r3, [pc, #160] @ (800279c ) 80026fa: fb83 2301 smull r2, r3, r3, r1 80026fe: 109a asrs r2, r3, #2 8002700: 17cb asrs r3, r1, #31 8002702: 1ad2 subs r2, r2, r3 8002704: 4613 mov r3, r2 8002706: 009b lsls r3, r3, #2 8002708: 4413 add r3, r2 800270a: 005b lsls r3, r3, #1 800270c: 1aca subs r2, r1, r3 800270e: 613a str r2, [r7, #16] for (int k = 2; k >= 0; k--) { 8002710: 2302 movs r3, #2 8002712: 647b str r3, [r7, #68] @ 0x44 8002714: e012 b.n 800273c temp[i++] = fracBuffer[k] + '0'; 8002716: 6c7b ldr r3, [r7, #68] @ 0x44 8002718: 009b lsls r3, r3, #2 800271a: 3358 adds r3, #88 @ 0x58 800271c: 443b add r3, r7 800271e: f853 3c48 ldr.w r3, [r3, #-72] 8002722: b2da uxtb r2, r3 8002724: 6d7b ldr r3, [r7, #84] @ 0x54 8002726: 1c59 adds r1, r3, #1 8002728: 6579 str r1, [r7, #84] @ 0x54 800272a: 3230 adds r2, #48 @ 0x30 800272c: b2d2 uxtb r2, r2 800272e: 3358 adds r3, #88 @ 0x58 8002730: 443b add r3, r7 8002732: f803 2c30 strb.w r2, [r3, #-48] for (int k = 2; k >= 0; k--) { 8002736: 6c7b ldr r3, [r7, #68] @ 0x44 8002738: 3b01 subs r3, #1 800273a: 647b str r3, [r7, #68] @ 0x44 800273c: 6c7b ldr r3, [r7, #68] @ 0x44 800273e: 2b00 cmp r3, #0 8002740: dae9 bge.n 8002716 } // 5. Finalizar a string com o caractere nulo temp[i] = '\0'; 8002742: f107 0228 add.w r2, r7, #40 @ 0x28 8002746: 6d7b ldr r3, [r7, #84] @ 0x54 8002748: 4413 add r3, r2 800274a: 2200 movs r2, #0 800274c: 701a strb r2, [r3, #0] // 6. Copiar para o buffer de destino final (sem risco de lixo) int destIdx = 0; 800274e: 2300 movs r3, #0 8002750: 643b str r3, [r7, #64] @ 0x40 while (temp[destIdx] != '\0' && destIdx < 15) { // Limite de segurança 8002752: e00b b.n 800276c buf[destIdx] = temp[destIdx]; 8002754: 6c3b ldr r3, [r7, #64] @ 0x40 8002756: 68fa ldr r2, [r7, #12] 8002758: 4413 add r3, r2 800275a: f107 0128 add.w r1, r7, #40 @ 0x28 800275e: 6c3a ldr r2, [r7, #64] @ 0x40 8002760: 440a add r2, r1 8002762: 7812 ldrb r2, [r2, #0] 8002764: 701a strb r2, [r3, #0] destIdx++; 8002766: 6c3b ldr r3, [r7, #64] @ 0x40 8002768: 3301 adds r3, #1 800276a: 643b str r3, [r7, #64] @ 0x40 while (temp[destIdx] != '\0' && destIdx < 15) { // Limite de segurança 800276c: f107 0228 add.w r2, r7, #40 @ 0x28 8002770: 6c3b ldr r3, [r7, #64] @ 0x40 8002772: 4413 add r3, r2 8002774: 781b ldrb r3, [r3, #0] 8002776: 2b00 cmp r3, #0 8002778: d002 beq.n 8002780 800277a: 6c3b ldr r3, [r7, #64] @ 0x40 800277c: 2b0e cmp r3, #14 800277e: dde9 ble.n 8002754 } buf[destIdx] = '\0'; 8002780: 6c3b ldr r3, [r7, #64] @ 0x40 8002782: 68fa ldr r2, [r7, #12] 8002784: 4413 add r3, r2 8002786: 2200 movs r2, #0 8002788: 701a strb r2, [r3, #0] } 800278a: bf00 nop 800278c: 3758 adds r7, #88 @ 0x58 800278e: 46bd mov sp, r7 8002790: bdb0 pop {r4, r5, r7, pc} 8002792: bf00 nop 8002794: 408f4000 .word 0x408f4000 8002798: 3fe00000 .word 0x3fe00000 800279c: 66666667 .word 0x66666667 80027a0: 51eb851f .word 0x51eb851f 080027a4 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80027a4: b480 push {r7} 80027a6: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 80027a8: b672 cpsid i } 80027aa: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 80027ac: bf00 nop 80027ae: e7fd b.n 80027ac 080027b0 : * @rmtoll IDR IDy LL_GPIO_ReadInputPort * @param GPIOx GPIO Port * @retval Input data register value of port */ __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx) { 80027b0: b480 push {r7} 80027b2: b083 sub sp, #12 80027b4: af00 add r7, sp, #0 80027b6: 6078 str r0, [r7, #4] return (READ_REG(GPIOx->IDR)); 80027b8: 687b ldr r3, [r7, #4] 80027ba: 689b ldr r3, [r3, #8] } 80027bc: 4618 mov r0, r3 80027be: 370c adds r7, #12 80027c0: 46bd mov sp, r7 80027c2: bc80 pop {r7} 80027c4: 4770 bx lr ... 080027c8 : /** * @brief Initializes the RS-485 driver. * @note This function configures GPIOs for address detection and USART1 for communication. */ void rs485_init(void) { 80027c8: b580 push {r7, lr} 80027ca: af00 add r7, sp, #0 /* Configure GPIOs for address detection */ rs485_configure_gpio_address(); 80027cc: f000 f864 bl 8002898 /* Configure USART1 for RS-485 communication */ rs485_configure_usart1(); 80027d0: f000 f8a8 bl 8002924 /* Get the current device address from GPIOs */ device_address.full_address = rs485_get_address(); 80027d4: f000 f808 bl 80027e8 80027d8: 4603 mov r3, r0 80027da: 461a mov r2, r3 80027dc: 4b01 ldr r3, [pc, #4] @ (80027e4 ) 80027de: 709a strb r2, [r3, #2] } 80027e0: bf00 nop 80027e2: bd80 pop {r7, pc} 80027e4: 20000658 .word 0x20000658 080027e8 : /** * @brief Gets the current device address from GPIOs. * @return The 8-bit device address. */ uint8_t rs485_get_address(void) { 80027e8: b598 push {r3, r4, r7, lr} 80027ea: af00 add r7, sp, #0 return ((uint8_t) ((((LL_GPIO_ReadInputPort(GPIOB) & RS485_ADDR_MASK_HIGH)>>RS485_ADDR_BIT_SET_HIGH) | (LL_GPIO_ReadInputPort(GPIOA) & RS485_ADDR_MASK_LOW)>>RS485_ADDR_BIT_SET_LOW))); 80027ec: 480a ldr r0, [pc, #40] @ (8002818 ) 80027ee: f7ff ffdf bl 80027b0 80027f2: 4603 mov r3, r0 80027f4: 0a1b lsrs r3, r3, #8 80027f6: b2db uxtb r3, r3 80027f8: f023 030f bic.w r3, r3, #15 80027fc: b2dc uxtb r4, r3 80027fe: 4807 ldr r0, [pc, #28] @ (800281c ) 8002800: f7ff ffd6 bl 80027b0 8002804: 4603 mov r3, r0 8002806: 089b lsrs r3, r3, #2 8002808: b2db uxtb r3, r3 800280a: f003 030f and.w r3, r3, #15 800280e: b2db uxtb r3, r3 8002810: 4323 orrs r3, r4 8002812: b2db uxtb r3, r3 } 8002814: 4618 mov r0, r3 8002816: bd98 pop {r3, r4, r7, pc} 8002818: 40010c00 .word 0x40010c00 800281c: 40010800 .word 0x40010800 08002820 : * @param data Pointer to the data buffer. * @param length Number of bytes to send. * @retval HAL_OK on success, otherwise error code. */ HAL_StatusTypeDef rs485_send_broadcast(uint8_t* data, uint16_t length) { 8002820: b580 push {r7, lr} 8002822: b084 sub sp, #16 8002824: af00 add r7, sp, #0 8002826: 6078 str r0, [r7, #4] 8002828: 460b mov r3, r1 800282a: 807b strh r3, [r7, #2] /* Enable transmission mode */ rs485_enable_tx(); 800282c: f000 f81c bl 8002868 /* Send the broadcast address (0x00) first */ uint8_t broadcast_address = 0x00; 8002830: 2300 movs r3, #0 8002832: 73bb strb r3, [r7, #14] HAL_UART_Transmit(&huart1, &broadcast_address, 1, HAL_MAX_DELAY); 8002834: f107 010e add.w r1, r7, #14 8002838: f04f 33ff mov.w r3, #4294967295 800283c: 2201 movs r2, #1 800283e: 4809 ldr r0, [pc, #36] @ (8002864 ) 8002840: f002 ff2c bl 800569c /* Send the data */ HAL_StatusTypeDef status = HAL_UART_Transmit(&huart1, data, length, HAL_MAX_DELAY); 8002844: 887a ldrh r2, [r7, #2] 8002846: f04f 33ff mov.w r3, #4294967295 800284a: 6879 ldr r1, [r7, #4] 800284c: 4805 ldr r0, [pc, #20] @ (8002864 ) 800284e: f002 ff25 bl 800569c 8002852: 4603 mov r3, r0 8002854: 73fb strb r3, [r7, #15] /* Disable transmission mode after sending */ rs485_disable_tx(); 8002856: f000 f813 bl 8002880 return status; 800285a: 7bfb ldrb r3, [r7, #15] } 800285c: 4618 mov r0, r3 800285e: 3710 adds r7, #16 8002860: 46bd mov sp, r7 8002862: bd80 pop {r7, pc} 8002864: 2000065c .word 0x2000065c 08002868 : /** * @brief Enables transmission mode on RS-485 transceiver. */ void rs485_enable_tx(void) { 8002868: b580 push {r7, lr} 800286a: af00 add r7, sp, #0 /* Set TX EN pin high to enable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_SET); 800286c: 2201 movs r2, #1 800286e: f44f 5180 mov.w r1, #4096 @ 0x1000 8002872: 4802 ldr r0, [pc, #8] @ (800287c ) 8002874: f001 f995 bl 8003ba2 } 8002878: bf00 nop 800287a: bd80 pop {r7, pc} 800287c: 40010800 .word 0x40010800 08002880 : /** * @brief Disables transmission mode on RS-485 transceiver. */ void rs485_disable_tx(void) { 8002880: b580 push {r7, lr} 8002882: af00 add r7, sp, #0 /* Set TX EN pin low to disable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_RESET); 8002884: 2200 movs r2, #0 8002886: f44f 5180 mov.w r1, #4096 @ 0x1000 800288a: 4802 ldr r0, [pc, #8] @ (8002894 ) 800288c: f001 f989 bl 8003ba2 } 8002890: bf00 nop 8002892: bd80 pop {r7, pc} 8002894: 40010800 .word 0x40010800 08002898 : /** * @brief Configures GPIOs for address detection. */ static void rs485_configure_gpio_address(void) { 8002898: b580 push {r7, lr} 800289a: b086 sub sp, #24 800289c: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800289e: f107 0308 add.w r3, r7, #8 80028a2: 2200 movs r2, #0 80028a4: 601a str r2, [r3, #0] 80028a6: 605a str r2, [r3, #4] 80028a8: 609a str r2, [r3, #8] 80028aa: 60da str r2, [r3, #12] /* Enable clock for GPIOA and GPIOB */ __HAL_RCC_GPIOA_CLK_ENABLE(); 80028ac: 4b1a ldr r3, [pc, #104] @ (8002918 ) 80028ae: 699b ldr r3, [r3, #24] 80028b0: 4a19 ldr r2, [pc, #100] @ (8002918 ) 80028b2: f043 0304 orr.w r3, r3, #4 80028b6: 6193 str r3, [r2, #24] 80028b8: 4b17 ldr r3, [pc, #92] @ (8002918 ) 80028ba: 699b ldr r3, [r3, #24] 80028bc: f003 0304 and.w r3, r3, #4 80028c0: 607b str r3, [r7, #4] 80028c2: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); 80028c4: 4b14 ldr r3, [pc, #80] @ (8002918 ) 80028c6: 699b ldr r3, [r3, #24] 80028c8: 4a13 ldr r2, [pc, #76] @ (8002918 ) 80028ca: f043 0308 orr.w r3, r3, #8 80028ce: 6193 str r3, [r2, #24] 80028d0: 4b11 ldr r3, [pc, #68] @ (8002918 ) 80028d2: 699b ldr r3, [r3, #24] 80028d4: f003 0308 and.w r3, r3, #8 80028d8: 603b str r3, [r7, #0] 80028da: 683b ldr r3, [r7, #0] /* Configure PA2-PA5 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; 80028dc: 233c movs r3, #60 @ 0x3c 80028de: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80028e0: 2300 movs r3, #0 80028e2: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; 80028e4: 2301 movs r3, #1 80028e6: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80028e8: f107 0308 add.w r3, r7, #8 80028ec: 4619 mov r1, r3 80028ee: 480b ldr r0, [pc, #44] @ (800291c ) 80028f0: f000 ffbc bl 800386c /* Configure PB12-PB15 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15; 80028f4: f44f 4370 mov.w r3, #61440 @ 0xf000 80028f8: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80028fa: 2300 movs r3, #0 80028fc: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; 80028fe: 2301 movs r3, #1 8002900: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8002902: f107 0308 add.w r3, r7, #8 8002906: 4619 mov r1, r3 8002908: 4805 ldr r0, [pc, #20] @ (8002920 ) 800290a: f000 ffaf bl 800386c } 800290e: bf00 nop 8002910: 3718 adds r7, #24 8002912: 46bd mov sp, r7 8002914: bd80 pop {r7, pc} 8002916: bf00 nop 8002918: 40021000 .word 0x40021000 800291c: 40010800 .word 0x40010800 8002920: 40010c00 .word 0x40010c00 08002924 : /** * @brief Configures USART1 for RS-485 communication. */ static void rs485_configure_usart1(void) { 8002924: b580 push {r7, lr} 8002926: b082 sub sp, #8 8002928: af00 add r7, sp, #0 /* Enable clock for USART1 */ __HAL_RCC_USART1_CLK_ENABLE(); 800292a: 4b18 ldr r3, [pc, #96] @ (800298c ) 800292c: 699b ldr r3, [r3, #24] 800292e: 4a17 ldr r2, [pc, #92] @ (800298c ) 8002930: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8002934: 6193 str r3, [r2, #24] 8002936: 4b15 ldr r3, [pc, #84] @ (800298c ) 8002938: 699b ldr r3, [r3, #24] 800293a: f403 4380 and.w r3, r3, #16384 @ 0x4000 800293e: 607b str r3, [r7, #4] 8002940: 687b ldr r3, [r7, #4] huart1.Instance = USART1; 8002942: 4b13 ldr r3, [pc, #76] @ (8002990 ) 8002944: 4a13 ldr r2, [pc, #76] @ (8002994 ) 8002946: 601a str r2, [r3, #0] huart1.Init.BaudRate = 9600; /*!< Default baud rate for RS-485 */ 8002948: 4b11 ldr r3, [pc, #68] @ (8002990 ) 800294a: f44f 5216 mov.w r2, #9600 @ 0x2580 800294e: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8002950: 4b0f ldr r3, [pc, #60] @ (8002990 ) 8002952: 2200 movs r2, #0 8002954: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8002956: 4b0e ldr r3, [pc, #56] @ (8002990 ) 8002958: 2200 movs r2, #0 800295a: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 800295c: 4b0c ldr r3, [pc, #48] @ (8002990 ) 800295e: 2200 movs r2, #0 8002960: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8002962: 4b0b ldr r3, [pc, #44] @ (8002990 ) 8002964: 220c movs r2, #12 8002966: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; /*!< Use NONE as TX enable */ 8002968: 4b09 ldr r3, [pc, #36] @ (8002990 ) 800296a: 2200 movs r2, #0 800296c: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 800296e: 4b08 ldr r3, [pc, #32] @ (8002990 ) 8002970: 2200 movs r2, #0 8002972: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8002974: 4806 ldr r0, [pc, #24] @ (8002990 ) 8002976: f002 fe41 bl 80055fc 800297a: 4603 mov r3, r0 800297c: 2b00 cmp r3, #0 800297e: d001 beq.n 8002984 { /* Initialization Error */ while(1); 8002980: bf00 nop 8002982: e7fd b.n 8002980 } } 8002984: bf00 nop 8002986: 3708 adds r7, #8 8002988: 46bd mov sp, r7 800298a: bd80 pop {r7, pc} 800298c: 40021000 .word 0x40021000 8002990: 2000065c .word 0x2000065c 8002994: 40013800 .word 0x40013800 08002998 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8002998: b480 push {r7} 800299a: b085 sub sp, #20 800299c: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 800299e: 4b15 ldr r3, [pc, #84] @ (80029f4 ) 80029a0: 699b ldr r3, [r3, #24] 80029a2: 4a14 ldr r2, [pc, #80] @ (80029f4 ) 80029a4: f043 0301 orr.w r3, r3, #1 80029a8: 6193 str r3, [r2, #24] 80029aa: 4b12 ldr r3, [pc, #72] @ (80029f4 ) 80029ac: 699b ldr r3, [r3, #24] 80029ae: f003 0301 and.w r3, r3, #1 80029b2: 60bb str r3, [r7, #8] 80029b4: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 80029b6: 4b0f ldr r3, [pc, #60] @ (80029f4 ) 80029b8: 69db ldr r3, [r3, #28] 80029ba: 4a0e ldr r2, [pc, #56] @ (80029f4 ) 80029bc: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80029c0: 61d3 str r3, [r2, #28] 80029c2: 4b0c ldr r3, [pc, #48] @ (80029f4 ) 80029c4: 69db ldr r3, [r3, #28] 80029c6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80029ca: 607b str r3, [r7, #4] 80029cc: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80029ce: 4b0a ldr r3, [pc, #40] @ (80029f8 ) 80029d0: 685b ldr r3, [r3, #4] 80029d2: 60fb str r3, [r7, #12] 80029d4: 68fb ldr r3, [r7, #12] 80029d6: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 80029da: 60fb str r3, [r7, #12] 80029dc: 68fb ldr r3, [r7, #12] 80029de: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 80029e2: 60fb str r3, [r7, #12] 80029e4: 4a04 ldr r2, [pc, #16] @ (80029f8 ) 80029e6: 68fb ldr r3, [r7, #12] 80029e8: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 80029ea: bf00 nop 80029ec: 3714 adds r7, #20 80029ee: 46bd mov sp, r7 80029f0: bc80 pop {r7} 80029f2: 4770 bx lr 80029f4: 40021000 .word 0x40021000 80029f8: 40010000 .word 0x40010000 080029fc : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 80029fc: b480 push {r7} 80029fe: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8002a00: bf00 nop 8002a02: e7fd b.n 8002a00 08002a04 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8002a04: b480 push {r7} 8002a06: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8002a08: bf00 nop 8002a0a: e7fd b.n 8002a08 08002a0c : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8002a0c: b480 push {r7} 8002a0e: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8002a10: bf00 nop 8002a12: e7fd b.n 8002a10 08002a14 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8002a14: b480 push {r7} 8002a16: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8002a18: bf00 nop 8002a1a: e7fd b.n 8002a18 08002a1c : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8002a1c: b480 push {r7} 8002a1e: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8002a20: bf00 nop 8002a22: e7fd b.n 8002a20 08002a24 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 8002a24: b480 push {r7} 8002a26: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 8002a28: bf00 nop 8002a2a: 46bd mov sp, r7 8002a2c: bc80 pop {r7} 8002a2e: 4770 bx lr 08002a30 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8002a30: b480 push {r7} 8002a32: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8002a34: bf00 nop 8002a36: 46bd mov sp, r7 8002a38: bc80 pop {r7} 8002a3a: 4770 bx lr 08002a3c : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8002a3c: b480 push {r7} 8002a3e: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8002a40: bf00 nop 8002a42: 46bd mov sp, r7 8002a44: bc80 pop {r7} 8002a46: 4770 bx lr 08002a48 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8002a48: b580 push {r7, lr} 8002a4a: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8002a4c: f000 f8fc bl 8002c48 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 8002a50: bf00 nop 8002a52: bd80 pop {r7, pc} 08002a54 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { 8002a54: b580 push {r7, lr} 8002a56: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8002a58: 4802 ldr r0, [pc, #8] @ (8002a64 ) 8002a5a: f002 feab bl 80057b4 /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } 8002a5e: bf00 nop 8002a60: bd80 pop {r7, pc} 8002a62: bf00 nop 8002a64: 200006a4 .word 0x200006a4 08002a68 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 8002a68: b480 push {r7} 8002a6a: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 8002a6c: bf00 nop 8002a6e: 46bd mov sp, r7 8002a70: bc80 pop {r7} 8002a72: 4770 bx lr 08002a74 : UART_HandleTypeDef huart1; /* USART1 init function */ void MX_USART1_UART_Init(void) { 8002a74: b580 push {r7, lr} 8002a76: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 8002a78: 4b11 ldr r3, [pc, #68] @ (8002ac0 ) 8002a7a: 4a12 ldr r2, [pc, #72] @ (8002ac4 ) 8002a7c: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 8002a7e: 4b10 ldr r3, [pc, #64] @ (8002ac0 ) 8002a80: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8002a84: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8002a86: 4b0e ldr r3, [pc, #56] @ (8002ac0 ) 8002a88: 2200 movs r2, #0 8002a8a: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 8002a8c: 4b0c ldr r3, [pc, #48] @ (8002ac0 ) 8002a8e: 2200 movs r2, #0 8002a90: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 8002a92: 4b0b ldr r3, [pc, #44] @ (8002ac0 ) 8002a94: 2200 movs r2, #0 8002a96: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 8002a98: 4b09 ldr r3, [pc, #36] @ (8002ac0 ) 8002a9a: 220c movs r2, #12 8002a9c: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8002a9e: 4b08 ldr r3, [pc, #32] @ (8002ac0 ) 8002aa0: 2200 movs r2, #0 8002aa2: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8002aa4: 4b06 ldr r3, [pc, #24] @ (8002ac0 ) 8002aa6: 2200 movs r2, #0 8002aa8: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 8002aaa: 4805 ldr r0, [pc, #20] @ (8002ac0 ) 8002aac: f002 fda6 bl 80055fc 8002ab0: 4603 mov r3, r0 8002ab2: 2b00 cmp r3, #0 8002ab4: d001 beq.n 8002aba { Error_Handler(); 8002ab6: f7ff fe75 bl 80027a4 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 8002aba: bf00 nop 8002abc: bd80 pop {r7, pc} 8002abe: bf00 nop 8002ac0: 200006a4 .word 0x200006a4 8002ac4: 40013800 .word 0x40013800 08002ac8 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { 8002ac8: b580 push {r7, lr} 8002aca: b088 sub sp, #32 8002acc: af00 add r7, sp, #0 8002ace: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8002ad0: f107 0310 add.w r3, r7, #16 8002ad4: 2200 movs r2, #0 8002ad6: 601a str r2, [r3, #0] 8002ad8: 605a str r2, [r3, #4] 8002ada: 609a str r2, [r3, #8] 8002adc: 60da str r2, [r3, #12] if(uartHandle->Instance==USART1) 8002ade: 687b ldr r3, [r7, #4] 8002ae0: 681b ldr r3, [r3, #0] 8002ae2: 4a20 ldr r2, [pc, #128] @ (8002b64 ) 8002ae4: 4293 cmp r3, r2 8002ae6: d139 bne.n 8002b5c { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* USART1 clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 8002ae8: 4b1f ldr r3, [pc, #124] @ (8002b68 ) 8002aea: 699b ldr r3, [r3, #24] 8002aec: 4a1e ldr r2, [pc, #120] @ (8002b68 ) 8002aee: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8002af2: 6193 str r3, [r2, #24] 8002af4: 4b1c ldr r3, [pc, #112] @ (8002b68 ) 8002af6: 699b ldr r3, [r3, #24] 8002af8: f403 4380 and.w r3, r3, #16384 @ 0x4000 8002afc: 60fb str r3, [r7, #12] 8002afe: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8002b00: 4b19 ldr r3, [pc, #100] @ (8002b68 ) 8002b02: 699b ldr r3, [r3, #24] 8002b04: 4a18 ldr r2, [pc, #96] @ (8002b68 ) 8002b06: f043 0304 orr.w r3, r3, #4 8002b0a: 6193 str r3, [r2, #24] 8002b0c: 4b16 ldr r3, [pc, #88] @ (8002b68 ) 8002b0e: 699b ldr r3, [r3, #24] 8002b10: f003 0304 and.w r3, r3, #4 8002b14: 60bb str r3, [r7, #8] 8002b16: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = TX_RS485_Pin; 8002b18: f44f 7300 mov.w r3, #512 @ 0x200 8002b1c: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8002b1e: 2302 movs r3, #2 8002b20: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; 8002b22: 2301 movs r3, #1 8002b24: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_RS485_GPIO_Port, &GPIO_InitStruct); 8002b26: f107 0310 add.w r3, r7, #16 8002b2a: 4619 mov r1, r3 8002b2c: 480f ldr r0, [pc, #60] @ (8002b6c ) 8002b2e: f000 fe9d bl 800386c GPIO_InitStruct.Pin = RX_RS485_Pin; 8002b32: f44f 6380 mov.w r3, #1024 @ 0x400 8002b36: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8002b38: 2300 movs r3, #0 8002b3a: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002b3c: 2300 movs r3, #0 8002b3e: 61bb str r3, [r7, #24] HAL_GPIO_Init(RX_RS485_GPIO_Port, &GPIO_InitStruct); 8002b40: f107 0310 add.w r3, r7, #16 8002b44: 4619 mov r1, r3 8002b46: 4809 ldr r0, [pc, #36] @ (8002b6c ) 8002b48: f000 fe90 bl 800386c /* USART1 interrupt Init */ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8002b4c: 2200 movs r2, #0 8002b4e: 2100 movs r1, #0 8002b50: 2025 movs r0, #37 @ 0x25 8002b52: f000 fba2 bl 800329a HAL_NVIC_EnableIRQ(USART1_IRQn); 8002b56: 2025 movs r0, #37 @ 0x25 8002b58: f000 fbbb bl 80032d2 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 8002b5c: bf00 nop 8002b5e: 3720 adds r7, #32 8002b60: 46bd mov sp, r7 8002b62: bd80 pop {r7, pc} 8002b64: 40013800 .word 0x40013800 8002b68: 40021000 .word 0x40021000 8002b6c: 40010800 .word 0x40010800 08002b70 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit 8002b70: f7ff ff7a bl 8002a68 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8002b74: 480b ldr r0, [pc, #44] @ (8002ba4 ) ldr r1, =_edata 8002b76: 490c ldr r1, [pc, #48] @ (8002ba8 ) ldr r2, =_sidata 8002b78: 4a0c ldr r2, [pc, #48] @ (8002bac ) movs r3, #0 8002b7a: 2300 movs r3, #0 b LoopCopyDataInit 8002b7c: e002 b.n 8002b84 08002b7e : CopyDataInit: ldr r4, [r2, r3] 8002b7e: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8002b80: 50c4 str r4, [r0, r3] adds r3, r3, #4 8002b82: 3304 adds r3, #4 08002b84 : LoopCopyDataInit: adds r4, r0, r3 8002b84: 18c4 adds r4, r0, r3 cmp r4, r1 8002b86: 428c cmp r4, r1 bcc CopyDataInit 8002b88: d3f9 bcc.n 8002b7e /* Zero fill the bss segment. */ ldr r2, =_sbss 8002b8a: 4a09 ldr r2, [pc, #36] @ (8002bb0 ) ldr r4, =_ebss 8002b8c: 4c09 ldr r4, [pc, #36] @ (8002bb4 ) movs r3, #0 8002b8e: 2300 movs r3, #0 b LoopFillZerobss 8002b90: e001 b.n 8002b96 08002b92 : FillZerobss: str r3, [r2] 8002b92: 6013 str r3, [r2, #0] adds r2, r2, #4 8002b94: 3204 adds r2, #4 08002b96 : LoopFillZerobss: cmp r2, r4 8002b96: 42a2 cmp r2, r4 bcc FillZerobss 8002b98: d3fb bcc.n 8002b92 /* Call static constructors */ bl __libc_init_array 8002b9a: f003 fb53 bl 8006244 <__libc_init_array> /* Call the application's entry point.*/ bl main 8002b9e: f7ff faf5 bl 800218c

bx lr 8002ba2: 4770 bx lr ldr r0, =_sdata 8002ba4: 20000000 .word 0x20000000 ldr r1, =_edata 8002ba8: 20000074 .word 0x20000074 ldr r2, =_sidata 8002bac: 080064ac .word 0x080064ac ldr r2, =_sbss 8002bb0: 20000078 .word 0x20000078 ldr r4, =_ebss 8002bb4: 20000848 .word 0x20000848 08002bb8 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8002bb8: e7fe b.n 8002bb8 ... 08002bbc : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8002bbc: b580 push {r7, lr} 8002bbe: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8002bc0: 4b08 ldr r3, [pc, #32] @ (8002be4 ) 8002bc2: 681b ldr r3, [r3, #0] 8002bc4: 4a07 ldr r2, [pc, #28] @ (8002be4 ) 8002bc6: f043 0310 orr.w r3, r3, #16 8002bca: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8002bcc: 2003 movs r0, #3 8002bce: f000 fb59 bl 8003284 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 8002bd2: 200f movs r0, #15 8002bd4: f000 f808 bl 8002be8 /* Init the low level hardware */ HAL_MspInit(); 8002bd8: f7ff fede bl 8002998 /* Return function status */ return HAL_OK; 8002bdc: 2300 movs r3, #0 } 8002bde: 4618 mov r0, r3 8002be0: bd80 pop {r7, pc} 8002be2: bf00 nop 8002be4: 40022000 .word 0x40022000 08002be8 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8002be8: b580 push {r7, lr} 8002bea: b082 sub sp, #8 8002bec: af00 add r7, sp, #0 8002bee: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8002bf0: 4b12 ldr r3, [pc, #72] @ (8002c3c ) 8002bf2: 681a ldr r2, [r3, #0] 8002bf4: 4b12 ldr r3, [pc, #72] @ (8002c40 ) 8002bf6: 781b ldrb r3, [r3, #0] 8002bf8: 4619 mov r1, r3 8002bfa: f44f 737a mov.w r3, #1000 @ 0x3e8 8002bfe: fbb3 f3f1 udiv r3, r3, r1 8002c02: fbb2 f3f3 udiv r3, r2, r3 8002c06: 4618 mov r0, r3 8002c08: f000 fb71 bl 80032ee 8002c0c: 4603 mov r3, r0 8002c0e: 2b00 cmp r3, #0 8002c10: d001 beq.n 8002c16 { return HAL_ERROR; 8002c12: 2301 movs r3, #1 8002c14: e00e b.n 8002c34 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8002c16: 687b ldr r3, [r7, #4] 8002c18: 2b0f cmp r3, #15 8002c1a: d80a bhi.n 8002c32 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8002c1c: 2200 movs r2, #0 8002c1e: 6879 ldr r1, [r7, #4] 8002c20: f04f 30ff mov.w r0, #4294967295 8002c24: f000 fb39 bl 800329a uwTickPrio = TickPriority; 8002c28: 4a06 ldr r2, [pc, #24] @ (8002c44 ) 8002c2a: 687b ldr r3, [r7, #4] 8002c2c: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 8002c2e: 2300 movs r3, #0 8002c30: e000 b.n 8002c34 return HAL_ERROR; 8002c32: 2301 movs r3, #1 } 8002c34: 4618 mov r0, r3 8002c36: 3708 adds r7, #8 8002c38: 46bd mov sp, r7 8002c3a: bd80 pop {r7, pc} 8002c3c: 20000018 .word 0x20000018 8002c40: 20000020 .word 0x20000020 8002c44: 2000001c .word 0x2000001c 08002c48 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8002c48: b480 push {r7} 8002c4a: af00 add r7, sp, #0 uwTick += uwTickFreq; 8002c4c: 4b05 ldr r3, [pc, #20] @ (8002c64 ) 8002c4e: 781b ldrb r3, [r3, #0] 8002c50: 461a mov r2, r3 8002c52: 4b05 ldr r3, [pc, #20] @ (8002c68 ) 8002c54: 681b ldr r3, [r3, #0] 8002c56: 4413 add r3, r2 8002c58: 4a03 ldr r2, [pc, #12] @ (8002c68 ) 8002c5a: 6013 str r3, [r2, #0] } 8002c5c: bf00 nop 8002c5e: 46bd mov sp, r7 8002c60: bc80 pop {r7} 8002c62: 4770 bx lr 8002c64: 20000020 .word 0x20000020 8002c68: 200006ec .word 0x200006ec 08002c6c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8002c6c: b480 push {r7} 8002c6e: af00 add r7, sp, #0 return uwTick; 8002c70: 4b02 ldr r3, [pc, #8] @ (8002c7c ) 8002c72: 681b ldr r3, [r3, #0] } 8002c74: 4618 mov r0, r3 8002c76: 46bd mov sp, r7 8002c78: bc80 pop {r7} 8002c7a: 4770 bx lr 8002c7c: 200006ec .word 0x200006ec 08002c80 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8002c80: b580 push {r7, lr} 8002c82: b084 sub sp, #16 8002c84: af00 add r7, sp, #0 8002c86: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8002c88: f7ff fff0 bl 8002c6c 8002c8c: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 8002c8e: 687b ldr r3, [r7, #4] 8002c90: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 8002c92: 68fb ldr r3, [r7, #12] 8002c94: f1b3 3fff cmp.w r3, #4294967295 8002c98: d005 beq.n 8002ca6 { wait += (uint32_t)(uwTickFreq); 8002c9a: 4b0a ldr r3, [pc, #40] @ (8002cc4 ) 8002c9c: 781b ldrb r3, [r3, #0] 8002c9e: 461a mov r2, r3 8002ca0: 68fb ldr r3, [r7, #12] 8002ca2: 4413 add r3, r2 8002ca4: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 8002ca6: bf00 nop 8002ca8: f7ff ffe0 bl 8002c6c 8002cac: 4602 mov r2, r0 8002cae: 68bb ldr r3, [r7, #8] 8002cb0: 1ad3 subs r3, r2, r3 8002cb2: 68fa ldr r2, [r7, #12] 8002cb4: 429a cmp r2, r3 8002cb6: d8f7 bhi.n 8002ca8 { } } 8002cb8: bf00 nop 8002cba: bf00 nop 8002cbc: 3710 adds r7, #16 8002cbe: 46bd mov sp, r7 8002cc0: bd80 pop {r7, pc} 8002cc2: bf00 nop 8002cc4: 20000020 .word 0x20000020 08002cc8 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 8002cc8: b580 push {r7, lr} 8002cca: b086 sub sp, #24 8002ccc: af00 add r7, sp, #0 8002cce: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8002cd0: 2300 movs r3, #0 8002cd2: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 8002cd4: 2300 movs r3, #0 8002cd6: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 8002cd8: 2300 movs r3, #0 8002cda: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 8002cdc: 2300 movs r3, #0 8002cde: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 8002ce0: 687b ldr r3, [r7, #4] 8002ce2: 2b00 cmp r3, #0 8002ce4: d101 bne.n 8002cea { return HAL_ERROR; 8002ce6: 2301 movs r3, #1 8002ce8: e0be b.n 8002e68 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 8002cea: 687b ldr r3, [r7, #4] 8002cec: 689b ldr r3, [r3, #8] 8002cee: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 8002cf0: 687b ldr r3, [r7, #4] 8002cf2: 6a9b ldr r3, [r3, #40] @ 0x28 8002cf4: 2b00 cmp r3, #0 8002cf6: d109 bne.n 8002d0c { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 8002cf8: 687b ldr r3, [r7, #4] 8002cfa: 2200 movs r2, #0 8002cfc: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 8002cfe: 687b ldr r3, [r7, #4] 8002d00: 2200 movs r2, #0 8002d02: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 8002d06: 6878 ldr r0, [r7, #4] 8002d08: f7fe fe3c bl 8001984 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 8002d0c: 6878 ldr r0, [r7, #4] 8002d0e: f000 f9ab bl 8003068 8002d12: 4603 mov r3, r0 8002d14: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 8002d16: 687b ldr r3, [r7, #4] 8002d18: 6a9b ldr r3, [r3, #40] @ 0x28 8002d1a: f003 0310 and.w r3, r3, #16 8002d1e: 2b00 cmp r3, #0 8002d20: f040 8099 bne.w 8002e56 8002d24: 7dfb ldrb r3, [r7, #23] 8002d26: 2b00 cmp r3, #0 8002d28: f040 8095 bne.w 8002e56 (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 8002d2c: 687b ldr r3, [r7, #4] 8002d2e: 6a9b ldr r3, [r3, #40] @ 0x28 8002d30: f423 5388 bic.w r3, r3, #4352 @ 0x1100 8002d34: f023 0302 bic.w r3, r3, #2 8002d38: f043 0202 orr.w r2, r3, #2 8002d3c: 687b ldr r3, [r7, #4] 8002d3e: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 8002d40: 687b ldr r3, [r7, #4] 8002d42: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8002d44: 687b ldr r3, [r7, #4] 8002d46: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 8002d48: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 8002d4a: 687b ldr r3, [r7, #4] 8002d4c: 7b1b ldrb r3, [r3, #12] 8002d4e: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8002d50: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 8002d52: 68ba ldr r2, [r7, #8] 8002d54: 4313 orrs r3, r2 8002d56: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 8002d58: 687b ldr r3, [r7, #4] 8002d5a: 689b ldr r3, [r3, #8] 8002d5c: f5b3 7f80 cmp.w r3, #256 @ 0x100 8002d60: d003 beq.n 8002d6a 8002d62: 687b ldr r3, [r7, #4] 8002d64: 689b ldr r3, [r3, #8] 8002d66: 2b01 cmp r3, #1 8002d68: d102 bne.n 8002d70 8002d6a: f44f 7380 mov.w r3, #256 @ 0x100 8002d6e: e000 b.n 8002d72 8002d70: 2300 movs r3, #0 8002d72: 693a ldr r2, [r7, #16] 8002d74: 4313 orrs r3, r2 8002d76: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 8002d78: 687b ldr r3, [r7, #4] 8002d7a: 7d1b ldrb r3, [r3, #20] 8002d7c: 2b01 cmp r3, #1 8002d7e: d119 bne.n 8002db4 { if (hadc->Init.ContinuousConvMode == DISABLE) 8002d80: 687b ldr r3, [r7, #4] 8002d82: 7b1b ldrb r3, [r3, #12] 8002d84: 2b00 cmp r3, #0 8002d86: d109 bne.n 8002d9c { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 8002d88: 687b ldr r3, [r7, #4] 8002d8a: 699b ldr r3, [r3, #24] 8002d8c: 3b01 subs r3, #1 8002d8e: 035a lsls r2, r3, #13 8002d90: 693b ldr r3, [r7, #16] 8002d92: 4313 orrs r3, r2 8002d94: f443 6300 orr.w r3, r3, #2048 @ 0x800 8002d98: 613b str r3, [r7, #16] 8002d9a: e00b b.n 8002db4 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8002d9c: 687b ldr r3, [r7, #4] 8002d9e: 6a9b ldr r3, [r3, #40] @ 0x28 8002da0: f043 0220 orr.w r2, r3, #32 8002da4: 687b ldr r3, [r7, #4] 8002da6: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8002da8: 687b ldr r3, [r7, #4] 8002daa: 6adb ldr r3, [r3, #44] @ 0x2c 8002dac: f043 0201 orr.w r2, r3, #1 8002db0: 687b ldr r3, [r7, #4] 8002db2: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 8002db4: 687b ldr r3, [r7, #4] 8002db6: 681b ldr r3, [r3, #0] 8002db8: 685b ldr r3, [r3, #4] 8002dba: f423 4169 bic.w r1, r3, #59648 @ 0xe900 8002dbe: 687b ldr r3, [r7, #4] 8002dc0: 681b ldr r3, [r3, #0] 8002dc2: 693a ldr r2, [r7, #16] 8002dc4: 430a orrs r2, r1 8002dc6: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 8002dc8: 687b ldr r3, [r7, #4] 8002dca: 681b ldr r3, [r3, #0] 8002dcc: 689a ldr r2, [r3, #8] 8002dce: 4b28 ldr r3, [pc, #160] @ (8002e70 ) 8002dd0: 4013 ands r3, r2 8002dd2: 687a ldr r2, [r7, #4] 8002dd4: 6812 ldr r2, [r2, #0] 8002dd6: 68b9 ldr r1, [r7, #8] 8002dd8: 430b orrs r3, r1 8002dda: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 8002ddc: 687b ldr r3, [r7, #4] 8002dde: 689b ldr r3, [r3, #8] 8002de0: f5b3 7f80 cmp.w r3, #256 @ 0x100 8002de4: d003 beq.n 8002dee 8002de6: 687b ldr r3, [r7, #4] 8002de8: 689b ldr r3, [r3, #8] 8002dea: 2b01 cmp r3, #1 8002dec: d104 bne.n 8002df8 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 8002dee: 687b ldr r3, [r7, #4] 8002df0: 691b ldr r3, [r3, #16] 8002df2: 3b01 subs r3, #1 8002df4: 051b lsls r3, r3, #20 8002df6: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 8002df8: 687b ldr r3, [r7, #4] 8002dfa: 681b ldr r3, [r3, #0] 8002dfc: 6adb ldr r3, [r3, #44] @ 0x2c 8002dfe: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 8002e02: 687b ldr r3, [r7, #4] 8002e04: 681b ldr r3, [r3, #0] 8002e06: 68fa ldr r2, [r7, #12] 8002e08: 430a orrs r2, r1 8002e0a: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8002e0c: 687b ldr r3, [r7, #4] 8002e0e: 681b ldr r3, [r3, #0] 8002e10: 689a ldr r2, [r3, #8] 8002e12: 4b18 ldr r3, [pc, #96] @ (8002e74 ) 8002e14: 4013 ands r3, r2 8002e16: 68ba ldr r2, [r7, #8] 8002e18: 429a cmp r2, r3 8002e1a: d10b bne.n 8002e34 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 8002e1c: 687b ldr r3, [r7, #4] 8002e1e: 2200 movs r2, #0 8002e20: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 8002e22: 687b ldr r3, [r7, #4] 8002e24: 6a9b ldr r3, [r3, #40] @ 0x28 8002e26: f023 0303 bic.w r3, r3, #3 8002e2a: f043 0201 orr.w r2, r3, #1 8002e2e: 687b ldr r3, [r7, #4] 8002e30: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8002e32: e018 b.n 8002e66 HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 8002e34: 687b ldr r3, [r7, #4] 8002e36: 6a9b ldr r3, [r3, #40] @ 0x28 8002e38: f023 0312 bic.w r3, r3, #18 8002e3c: f043 0210 orr.w r2, r3, #16 8002e40: 687b ldr r3, [r7, #4] 8002e42: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8002e44: 687b ldr r3, [r7, #4] 8002e46: 6adb ldr r3, [r3, #44] @ 0x2c 8002e48: f043 0201 orr.w r2, r3, #1 8002e4c: 687b ldr r3, [r7, #4] 8002e4e: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 8002e50: 2301 movs r3, #1 8002e52: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8002e54: e007 b.n 8002e66 } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8002e56: 687b ldr r3, [r7, #4] 8002e58: 6a9b ldr r3, [r3, #40] @ 0x28 8002e5a: f043 0210 orr.w r2, r3, #16 8002e5e: 687b ldr r3, [r7, #4] 8002e60: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 8002e62: 2301 movs r3, #1 8002e64: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 8002e66: 7dfb ldrb r3, [r7, #23] } 8002e68: 4618 mov r0, r3 8002e6a: 3718 adds r7, #24 8002e6c: 46bd mov sp, r7 8002e6e: bd80 pop {r7, pc} 8002e70: ffe1f7fd .word 0xffe1f7fd 8002e74: ff1f0efe .word 0xff1f0efe 08002e78 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 8002e78: b480 push {r7} 8002e7a: b085 sub sp, #20 8002e7c: af00 add r7, sp, #0 8002e7e: 6078 str r0, [r7, #4] 8002e80: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8002e82: 2300 movs r3, #0 8002e84: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 8002e86: 2300 movs r3, #0 8002e88: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 8002e8a: 687b ldr r3, [r7, #4] 8002e8c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8002e90: 2b01 cmp r3, #1 8002e92: d101 bne.n 8002e98 8002e94: 2302 movs r3, #2 8002e96: e0dc b.n 8003052 8002e98: 687b ldr r3, [r7, #4] 8002e9a: 2201 movs r2, #1 8002e9c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 8002ea0: 683b ldr r3, [r7, #0] 8002ea2: 685b ldr r3, [r3, #4] 8002ea4: 2b06 cmp r3, #6 8002ea6: d81c bhi.n 8002ee2 { MODIFY_REG(hadc->Instance->SQR3 , 8002ea8: 687b ldr r3, [r7, #4] 8002eaa: 681b ldr r3, [r3, #0] 8002eac: 6b59 ldr r1, [r3, #52] @ 0x34 8002eae: 683b ldr r3, [r7, #0] 8002eb0: 685a ldr r2, [r3, #4] 8002eb2: 4613 mov r3, r2 8002eb4: 009b lsls r3, r3, #2 8002eb6: 4413 add r3, r2 8002eb8: 3b05 subs r3, #5 8002eba: 221f movs r2, #31 8002ebc: fa02 f303 lsl.w r3, r2, r3 8002ec0: 43db mvns r3, r3 8002ec2: 4019 ands r1, r3 8002ec4: 683b ldr r3, [r7, #0] 8002ec6: 6818 ldr r0, [r3, #0] 8002ec8: 683b ldr r3, [r7, #0] 8002eca: 685a ldr r2, [r3, #4] 8002ecc: 4613 mov r3, r2 8002ece: 009b lsls r3, r3, #2 8002ed0: 4413 add r3, r2 8002ed2: 3b05 subs r3, #5 8002ed4: fa00 f203 lsl.w r2, r0, r3 8002ed8: 687b ldr r3, [r7, #4] 8002eda: 681b ldr r3, [r3, #0] 8002edc: 430a orrs r2, r1 8002ede: 635a str r2, [r3, #52] @ 0x34 8002ee0: e03c b.n 8002f5c ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 8002ee2: 683b ldr r3, [r7, #0] 8002ee4: 685b ldr r3, [r3, #4] 8002ee6: 2b0c cmp r3, #12 8002ee8: d81c bhi.n 8002f24 { MODIFY_REG(hadc->Instance->SQR2 , 8002eea: 687b ldr r3, [r7, #4] 8002eec: 681b ldr r3, [r3, #0] 8002eee: 6b19 ldr r1, [r3, #48] @ 0x30 8002ef0: 683b ldr r3, [r7, #0] 8002ef2: 685a ldr r2, [r3, #4] 8002ef4: 4613 mov r3, r2 8002ef6: 009b lsls r3, r3, #2 8002ef8: 4413 add r3, r2 8002efa: 3b23 subs r3, #35 @ 0x23 8002efc: 221f movs r2, #31 8002efe: fa02 f303 lsl.w r3, r2, r3 8002f02: 43db mvns r3, r3 8002f04: 4019 ands r1, r3 8002f06: 683b ldr r3, [r7, #0] 8002f08: 6818 ldr r0, [r3, #0] 8002f0a: 683b ldr r3, [r7, #0] 8002f0c: 685a ldr r2, [r3, #4] 8002f0e: 4613 mov r3, r2 8002f10: 009b lsls r3, r3, #2 8002f12: 4413 add r3, r2 8002f14: 3b23 subs r3, #35 @ 0x23 8002f16: fa00 f203 lsl.w r2, r0, r3 8002f1a: 687b ldr r3, [r7, #4] 8002f1c: 681b ldr r3, [r3, #0] 8002f1e: 430a orrs r2, r1 8002f20: 631a str r2, [r3, #48] @ 0x30 8002f22: e01b b.n 8002f5c ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 8002f24: 687b ldr r3, [r7, #4] 8002f26: 681b ldr r3, [r3, #0] 8002f28: 6ad9 ldr r1, [r3, #44] @ 0x2c 8002f2a: 683b ldr r3, [r7, #0] 8002f2c: 685a ldr r2, [r3, #4] 8002f2e: 4613 mov r3, r2 8002f30: 009b lsls r3, r3, #2 8002f32: 4413 add r3, r2 8002f34: 3b41 subs r3, #65 @ 0x41 8002f36: 221f movs r2, #31 8002f38: fa02 f303 lsl.w r3, r2, r3 8002f3c: 43db mvns r3, r3 8002f3e: 4019 ands r1, r3 8002f40: 683b ldr r3, [r7, #0] 8002f42: 6818 ldr r0, [r3, #0] 8002f44: 683b ldr r3, [r7, #0] 8002f46: 685a ldr r2, [r3, #4] 8002f48: 4613 mov r3, r2 8002f4a: 009b lsls r3, r3, #2 8002f4c: 4413 add r3, r2 8002f4e: 3b41 subs r3, #65 @ 0x41 8002f50: fa00 f203 lsl.w r2, r0, r3 8002f54: 687b ldr r3, [r7, #4] 8002f56: 681b ldr r3, [r3, #0] 8002f58: 430a orrs r2, r1 8002f5a: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 8002f5c: 683b ldr r3, [r7, #0] 8002f5e: 681b ldr r3, [r3, #0] 8002f60: 2b09 cmp r3, #9 8002f62: d91c bls.n 8002f9e { MODIFY_REG(hadc->Instance->SMPR1 , 8002f64: 687b ldr r3, [r7, #4] 8002f66: 681b ldr r3, [r3, #0] 8002f68: 68d9 ldr r1, [r3, #12] 8002f6a: 683b ldr r3, [r7, #0] 8002f6c: 681a ldr r2, [r3, #0] 8002f6e: 4613 mov r3, r2 8002f70: 005b lsls r3, r3, #1 8002f72: 4413 add r3, r2 8002f74: 3b1e subs r3, #30 8002f76: 2207 movs r2, #7 8002f78: fa02 f303 lsl.w r3, r2, r3 8002f7c: 43db mvns r3, r3 8002f7e: 4019 ands r1, r3 8002f80: 683b ldr r3, [r7, #0] 8002f82: 6898 ldr r0, [r3, #8] 8002f84: 683b ldr r3, [r7, #0] 8002f86: 681a ldr r2, [r3, #0] 8002f88: 4613 mov r3, r2 8002f8a: 005b lsls r3, r3, #1 8002f8c: 4413 add r3, r2 8002f8e: 3b1e subs r3, #30 8002f90: fa00 f203 lsl.w r2, r0, r3 8002f94: 687b ldr r3, [r7, #4] 8002f96: 681b ldr r3, [r3, #0] 8002f98: 430a orrs r2, r1 8002f9a: 60da str r2, [r3, #12] 8002f9c: e019 b.n 8002fd2 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 8002f9e: 687b ldr r3, [r7, #4] 8002fa0: 681b ldr r3, [r3, #0] 8002fa2: 6919 ldr r1, [r3, #16] 8002fa4: 683b ldr r3, [r7, #0] 8002fa6: 681a ldr r2, [r3, #0] 8002fa8: 4613 mov r3, r2 8002faa: 005b lsls r3, r3, #1 8002fac: 4413 add r3, r2 8002fae: 2207 movs r2, #7 8002fb0: fa02 f303 lsl.w r3, r2, r3 8002fb4: 43db mvns r3, r3 8002fb6: 4019 ands r1, r3 8002fb8: 683b ldr r3, [r7, #0] 8002fba: 6898 ldr r0, [r3, #8] 8002fbc: 683b ldr r3, [r7, #0] 8002fbe: 681a ldr r2, [r3, #0] 8002fc0: 4613 mov r3, r2 8002fc2: 005b lsls r3, r3, #1 8002fc4: 4413 add r3, r2 8002fc6: fa00 f203 lsl.w r2, r0, r3 8002fca: 687b ldr r3, [r7, #4] 8002fcc: 681b ldr r3, [r3, #0] 8002fce: 430a orrs r2, r1 8002fd0: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 8002fd2: 683b ldr r3, [r7, #0] 8002fd4: 681b ldr r3, [r3, #0] 8002fd6: 2b10 cmp r3, #16 8002fd8: d003 beq.n 8002fe2 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 8002fda: 683b ldr r3, [r7, #0] 8002fdc: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 8002fde: 2b11 cmp r3, #17 8002fe0: d132 bne.n 8003048 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 8002fe2: 687b ldr r3, [r7, #4] 8002fe4: 681b ldr r3, [r3, #0] 8002fe6: 4a1d ldr r2, [pc, #116] @ (800305c ) 8002fe8: 4293 cmp r3, r2 8002fea: d125 bne.n 8003038 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 8002fec: 687b ldr r3, [r7, #4] 8002fee: 681b ldr r3, [r3, #0] 8002ff0: 689b ldr r3, [r3, #8] 8002ff2: f403 0300 and.w r3, r3, #8388608 @ 0x800000 8002ff6: 2b00 cmp r3, #0 8002ff8: d126 bne.n 8003048 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 8002ffa: 687b ldr r3, [r7, #4] 8002ffc: 681b ldr r3, [r3, #0] 8002ffe: 689a ldr r2, [r3, #8] 8003000: 687b ldr r3, [r7, #4] 8003002: 681b ldr r3, [r3, #0] 8003004: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 8003008: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 800300a: 683b ldr r3, [r7, #0] 800300c: 681b ldr r3, [r3, #0] 800300e: 2b10 cmp r3, #16 8003010: d11a bne.n 8003048 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 8003012: 4b13 ldr r3, [pc, #76] @ (8003060 ) 8003014: 681b ldr r3, [r3, #0] 8003016: 4a13 ldr r2, [pc, #76] @ (8003064 ) 8003018: fba2 2303 umull r2, r3, r2, r3 800301c: 0c9a lsrs r2, r3, #18 800301e: 4613 mov r3, r2 8003020: 009b lsls r3, r3, #2 8003022: 4413 add r3, r2 8003024: 005b lsls r3, r3, #1 8003026: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8003028: e002 b.n 8003030 { wait_loop_index--; 800302a: 68bb ldr r3, [r7, #8] 800302c: 3b01 subs r3, #1 800302e: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8003030: 68bb ldr r3, [r7, #8] 8003032: 2b00 cmp r3, #0 8003034: d1f9 bne.n 800302a 8003036: e007 b.n 8003048 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8003038: 687b ldr r3, [r7, #4] 800303a: 6a9b ldr r3, [r3, #40] @ 0x28 800303c: f043 0220 orr.w r2, r3, #32 8003040: 687b ldr r3, [r7, #4] 8003042: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 8003044: 2301 movs r3, #1 8003046: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 8003048: 687b ldr r3, [r7, #4] 800304a: 2200 movs r2, #0 800304c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 8003050: 7bfb ldrb r3, [r7, #15] } 8003052: 4618 mov r0, r3 8003054: 3714 adds r7, #20 8003056: 46bd mov sp, r7 8003058: bc80 pop {r7} 800305a: 4770 bx lr 800305c: 40012400 .word 0x40012400 8003060: 20000018 .word 0x20000018 8003064: 431bde83 .word 0x431bde83 08003068 : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 8003068: b580 push {r7, lr} 800306a: b084 sub sp, #16 800306c: af00 add r7, sp, #0 800306e: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8003070: 2300 movs r3, #0 8003072: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 8003074: 687b ldr r3, [r7, #4] 8003076: 681b ldr r3, [r3, #0] 8003078: 689b ldr r3, [r3, #8] 800307a: f003 0301 and.w r3, r3, #1 800307e: 2b01 cmp r3, #1 8003080: d12e bne.n 80030e0 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 8003082: 687b ldr r3, [r7, #4] 8003084: 681b ldr r3, [r3, #0] 8003086: 689a ldr r2, [r3, #8] 8003088: 687b ldr r3, [r7, #4] 800308a: 681b ldr r3, [r3, #0] 800308c: f022 0201 bic.w r2, r2, #1 8003090: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 8003092: f7ff fdeb bl 8002c6c 8003096: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 8003098: e01b b.n 80030d2 { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 800309a: f7ff fde7 bl 8002c6c 800309e: 4602 mov r2, r0 80030a0: 68fb ldr r3, [r7, #12] 80030a2: 1ad3 subs r3, r2, r3 80030a4: 2b02 cmp r3, #2 80030a6: d914 bls.n 80030d2 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 80030a8: 687b ldr r3, [r7, #4] 80030aa: 681b ldr r3, [r3, #0] 80030ac: 689b ldr r3, [r3, #8] 80030ae: f003 0301 and.w r3, r3, #1 80030b2: 2b01 cmp r3, #1 80030b4: d10d bne.n 80030d2 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 80030b6: 687b ldr r3, [r7, #4] 80030b8: 6a9b ldr r3, [r3, #40] @ 0x28 80030ba: f043 0210 orr.w r2, r3, #16 80030be: 687b ldr r3, [r7, #4] 80030c0: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 80030c2: 687b ldr r3, [r7, #4] 80030c4: 6adb ldr r3, [r3, #44] @ 0x2c 80030c6: f043 0201 orr.w r2, r3, #1 80030ca: 687b ldr r3, [r7, #4] 80030cc: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 80030ce: 2301 movs r3, #1 80030d0: e007 b.n 80030e2 while(ADC_IS_ENABLE(hadc) != RESET) 80030d2: 687b ldr r3, [r7, #4] 80030d4: 681b ldr r3, [r3, #0] 80030d6: 689b ldr r3, [r3, #8] 80030d8: f003 0301 and.w r3, r3, #1 80030dc: 2b01 cmp r3, #1 80030de: d0dc beq.n 800309a } } } /* Return HAL status */ return HAL_OK; 80030e0: 2300 movs r3, #0 } 80030e2: 4618 mov r0, r3 80030e4: 3710 adds r7, #16 80030e6: 46bd mov sp, r7 80030e8: bd80 pop {r7, pc} ... 080030ec <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 80030ec: b480 push {r7} 80030ee: b085 sub sp, #20 80030f0: af00 add r7, sp, #0 80030f2: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80030f4: 687b ldr r3, [r7, #4] 80030f6: f003 0307 and.w r3, r3, #7 80030fa: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 80030fc: 4b0c ldr r3, [pc, #48] @ (8003130 <__NVIC_SetPriorityGrouping+0x44>) 80030fe: 68db ldr r3, [r3, #12] 8003100: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8003102: 68ba ldr r2, [r7, #8] 8003104: f64f 03ff movw r3, #63743 @ 0xf8ff 8003108: 4013 ands r3, r2 800310a: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 800310c: 68fb ldr r3, [r7, #12] 800310e: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8003110: 68bb ldr r3, [r7, #8] 8003112: 4313 orrs r3, r2 reg_value = (reg_value | 8003114: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 8003118: f443 3300 orr.w r3, r3, #131072 @ 0x20000 800311c: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 800311e: 4a04 ldr r2, [pc, #16] @ (8003130 <__NVIC_SetPriorityGrouping+0x44>) 8003120: 68bb ldr r3, [r7, #8] 8003122: 60d3 str r3, [r2, #12] } 8003124: bf00 nop 8003126: 3714 adds r7, #20 8003128: 46bd mov sp, r7 800312a: bc80 pop {r7} 800312c: 4770 bx lr 800312e: bf00 nop 8003130: e000ed00 .word 0xe000ed00 08003134 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8003134: b480 push {r7} 8003136: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8003138: 4b04 ldr r3, [pc, #16] @ (800314c <__NVIC_GetPriorityGrouping+0x18>) 800313a: 68db ldr r3, [r3, #12] 800313c: 0a1b lsrs r3, r3, #8 800313e: f003 0307 and.w r3, r3, #7 } 8003142: 4618 mov r0, r3 8003144: 46bd mov sp, r7 8003146: bc80 pop {r7} 8003148: 4770 bx lr 800314a: bf00 nop 800314c: e000ed00 .word 0xe000ed00 08003150 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8003150: b480 push {r7} 8003152: b083 sub sp, #12 8003154: af00 add r7, sp, #0 8003156: 4603 mov r3, r0 8003158: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 800315a: f997 3007 ldrsb.w r3, [r7, #7] 800315e: 2b00 cmp r3, #0 8003160: db0b blt.n 800317a <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8003162: 79fb ldrb r3, [r7, #7] 8003164: f003 021f and.w r2, r3, #31 8003168: 4906 ldr r1, [pc, #24] @ (8003184 <__NVIC_EnableIRQ+0x34>) 800316a: f997 3007 ldrsb.w r3, [r7, #7] 800316e: 095b lsrs r3, r3, #5 8003170: 2001 movs r0, #1 8003172: fa00 f202 lsl.w r2, r0, r2 8003176: f841 2023 str.w r2, [r1, r3, lsl #2] } } 800317a: bf00 nop 800317c: 370c adds r7, #12 800317e: 46bd mov sp, r7 8003180: bc80 pop {r7} 8003182: 4770 bx lr 8003184: e000e100 .word 0xe000e100 08003188 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8003188: b480 push {r7} 800318a: b083 sub sp, #12 800318c: af00 add r7, sp, #0 800318e: 4603 mov r3, r0 8003190: 6039 str r1, [r7, #0] 8003192: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8003194: f997 3007 ldrsb.w r3, [r7, #7] 8003198: 2b00 cmp r3, #0 800319a: db0a blt.n 80031b2 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800319c: 683b ldr r3, [r7, #0] 800319e: b2da uxtb r2, r3 80031a0: 490c ldr r1, [pc, #48] @ (80031d4 <__NVIC_SetPriority+0x4c>) 80031a2: f997 3007 ldrsb.w r3, [r7, #7] 80031a6: 0112 lsls r2, r2, #4 80031a8: b2d2 uxtb r2, r2 80031aa: 440b add r3, r1 80031ac: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 80031b0: e00a b.n 80031c8 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80031b2: 683b ldr r3, [r7, #0] 80031b4: b2da uxtb r2, r3 80031b6: 4908 ldr r1, [pc, #32] @ (80031d8 <__NVIC_SetPriority+0x50>) 80031b8: 79fb ldrb r3, [r7, #7] 80031ba: f003 030f and.w r3, r3, #15 80031be: 3b04 subs r3, #4 80031c0: 0112 lsls r2, r2, #4 80031c2: b2d2 uxtb r2, r2 80031c4: 440b add r3, r1 80031c6: 761a strb r2, [r3, #24] } 80031c8: bf00 nop 80031ca: 370c adds r7, #12 80031cc: 46bd mov sp, r7 80031ce: bc80 pop {r7} 80031d0: 4770 bx lr 80031d2: bf00 nop 80031d4: e000e100 .word 0xe000e100 80031d8: e000ed00 .word 0xe000ed00 080031dc : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 80031dc: b480 push {r7} 80031de: b089 sub sp, #36 @ 0x24 80031e0: af00 add r7, sp, #0 80031e2: 60f8 str r0, [r7, #12] 80031e4: 60b9 str r1, [r7, #8] 80031e6: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80031e8: 68fb ldr r3, [r7, #12] 80031ea: f003 0307 and.w r3, r3, #7 80031ee: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80031f0: 69fb ldr r3, [r7, #28] 80031f2: f1c3 0307 rsb r3, r3, #7 80031f6: 2b04 cmp r3, #4 80031f8: bf28 it cs 80031fa: 2304 movcs r3, #4 80031fc: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80031fe: 69fb ldr r3, [r7, #28] 8003200: 3304 adds r3, #4 8003202: 2b06 cmp r3, #6 8003204: d902 bls.n 800320c 8003206: 69fb ldr r3, [r7, #28] 8003208: 3b03 subs r3, #3 800320a: e000 b.n 800320e 800320c: 2300 movs r3, #0 800320e: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8003210: f04f 32ff mov.w r2, #4294967295 8003214: 69bb ldr r3, [r7, #24] 8003216: fa02 f303 lsl.w r3, r2, r3 800321a: 43da mvns r2, r3 800321c: 68bb ldr r3, [r7, #8] 800321e: 401a ands r2, r3 8003220: 697b ldr r3, [r7, #20] 8003222: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8003224: f04f 31ff mov.w r1, #4294967295 8003228: 697b ldr r3, [r7, #20] 800322a: fa01 f303 lsl.w r3, r1, r3 800322e: 43d9 mvns r1, r3 8003230: 687b ldr r3, [r7, #4] 8003232: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8003234: 4313 orrs r3, r2 ); } 8003236: 4618 mov r0, r3 8003238: 3724 adds r7, #36 @ 0x24 800323a: 46bd mov sp, r7 800323c: bc80 pop {r7} 800323e: 4770 bx lr 08003240 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8003240: b580 push {r7, lr} 8003242: b082 sub sp, #8 8003244: af00 add r7, sp, #0 8003246: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8003248: 687b ldr r3, [r7, #4] 800324a: 3b01 subs r3, #1 800324c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8003250: d301 bcc.n 8003256 { return (1UL); /* Reload value impossible */ 8003252: 2301 movs r3, #1 8003254: e00f b.n 8003276 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8003256: 4a0a ldr r2, [pc, #40] @ (8003280 ) 8003258: 687b ldr r3, [r7, #4] 800325a: 3b01 subs r3, #1 800325c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 800325e: 210f movs r1, #15 8003260: f04f 30ff mov.w r0, #4294967295 8003264: f7ff ff90 bl 8003188 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8003268: 4b05 ldr r3, [pc, #20] @ (8003280 ) 800326a: 2200 movs r2, #0 800326c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 800326e: 4b04 ldr r3, [pc, #16] @ (8003280 ) 8003270: 2207 movs r2, #7 8003272: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8003274: 2300 movs r3, #0 } 8003276: 4618 mov r0, r3 8003278: 3708 adds r7, #8 800327a: 46bd mov sp, r7 800327c: bd80 pop {r7, pc} 800327e: bf00 nop 8003280: e000e010 .word 0xe000e010 08003284 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8003284: b580 push {r7, lr} 8003286: b082 sub sp, #8 8003288: af00 add r7, sp, #0 800328a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 800328c: 6878 ldr r0, [r7, #4] 800328e: f7ff ff2d bl 80030ec <__NVIC_SetPriorityGrouping> } 8003292: bf00 nop 8003294: 3708 adds r7, #8 8003296: 46bd mov sp, r7 8003298: bd80 pop {r7, pc} 0800329a : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 800329a: b580 push {r7, lr} 800329c: b086 sub sp, #24 800329e: af00 add r7, sp, #0 80032a0: 4603 mov r3, r0 80032a2: 60b9 str r1, [r7, #8] 80032a4: 607a str r2, [r7, #4] 80032a6: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 80032a8: 2300 movs r3, #0 80032aa: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 80032ac: f7ff ff42 bl 8003134 <__NVIC_GetPriorityGrouping> 80032b0: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 80032b2: 687a ldr r2, [r7, #4] 80032b4: 68b9 ldr r1, [r7, #8] 80032b6: 6978 ldr r0, [r7, #20] 80032b8: f7ff ff90 bl 80031dc 80032bc: 4602 mov r2, r0 80032be: f997 300f ldrsb.w r3, [r7, #15] 80032c2: 4611 mov r1, r2 80032c4: 4618 mov r0, r3 80032c6: f7ff ff5f bl 8003188 <__NVIC_SetPriority> } 80032ca: bf00 nop 80032cc: 3718 adds r7, #24 80032ce: 46bd mov sp, r7 80032d0: bd80 pop {r7, pc} 080032d2 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 80032d2: b580 push {r7, lr} 80032d4: b082 sub sp, #8 80032d6: af00 add r7, sp, #0 80032d8: 4603 mov r3, r0 80032da: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 80032dc: f997 3007 ldrsb.w r3, [r7, #7] 80032e0: 4618 mov r0, r3 80032e2: f7ff ff35 bl 8003150 <__NVIC_EnableIRQ> } 80032e6: bf00 nop 80032e8: 3708 adds r7, #8 80032ea: 46bd mov sp, r7 80032ec: bd80 pop {r7, pc} 080032ee : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 80032ee: b580 push {r7, lr} 80032f0: b082 sub sp, #8 80032f2: af00 add r7, sp, #0 80032f4: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 80032f6: 6878 ldr r0, [r7, #4] 80032f8: f7ff ffa2 bl 8003240 80032fc: 4603 mov r3, r0 } 80032fe: 4618 mov r0, r3 8003300: 3708 adds r7, #8 8003302: 46bd mov sp, r7 8003304: bd80 pop {r7, pc} 08003306 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { 8003306: b480 push {r7} 8003308: b085 sub sp, #20 800330a: af00 add r7, sp, #0 800330c: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 800330e: 2300 movs r3, #0 8003310: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) 8003312: 687b ldr r3, [r7, #4] 8003314: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 8003318: b2db uxtb r3, r3 800331a: 2b02 cmp r3, #2 800331c: d008 beq.n 8003330 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 800331e: 687b ldr r3, [r7, #4] 8003320: 2204 movs r2, #4 8003322: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8003324: 687b ldr r3, [r7, #4] 8003326: 2200 movs r2, #0 8003328: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 800332c: 2301 movs r3, #1 800332e: e020 b.n 8003372 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8003330: 687b ldr r3, [r7, #4] 8003332: 681b ldr r3, [r3, #0] 8003334: 681a ldr r2, [r3, #0] 8003336: 687b ldr r3, [r7, #4] 8003338: 681b ldr r3, [r3, #0] 800333a: f022 020e bic.w r2, r2, #14 800333e: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 8003340: 687b ldr r3, [r7, #4] 8003342: 681b ldr r3, [r3, #0] 8003344: 681a ldr r2, [r3, #0] 8003346: 687b ldr r3, [r7, #4] 8003348: 681b ldr r3, [r3, #0] 800334a: f022 0201 bic.w r2, r2, #1 800334e: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8003350: 687b ldr r3, [r7, #4] 8003352: 6c1a ldr r2, [r3, #64] @ 0x40 8003354: 687b ldr r3, [r7, #4] 8003356: 6bdb ldr r3, [r3, #60] @ 0x3c 8003358: 2101 movs r1, #1 800335a: fa01 f202 lsl.w r2, r1, r2 800335e: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8003360: 687b ldr r3, [r7, #4] 8003362: 2201 movs r2, #1 8003364: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8003368: 687b ldr r3, [r7, #4] 800336a: 2200 movs r2, #0 800336c: f883 2020 strb.w r2, [r3, #32] return status; 8003370: 7bfb ldrb r3, [r7, #15] } 8003372: 4618 mov r0, r3 8003374: 3714 adds r7, #20 8003376: 46bd mov sp, r7 8003378: bc80 pop {r7} 800337a: 4770 bx lr 0800337c : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { 800337c: b580 push {r7, lr} 800337e: b084 sub sp, #16 8003380: af00 add r7, sp, #0 8003382: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8003384: 2300 movs r3, #0 8003386: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) 8003388: 687b ldr r3, [r7, #4] 800338a: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 800338e: b2db uxtb r3, r3 8003390: 2b02 cmp r3, #2 8003392: d005 beq.n 80033a0 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8003394: 687b ldr r3, [r7, #4] 8003396: 2204 movs r2, #4 8003398: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; 800339a: 2301 movs r3, #1 800339c: 73fb strb r3, [r7, #15] 800339e: e051 b.n 8003444 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80033a0: 687b ldr r3, [r7, #4] 80033a2: 681b ldr r3, [r3, #0] 80033a4: 681a ldr r2, [r3, #0] 80033a6: 687b ldr r3, [r7, #4] 80033a8: 681b ldr r3, [r3, #0] 80033aa: f022 020e bic.w r2, r2, #14 80033ae: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 80033b0: 687b ldr r3, [r7, #4] 80033b2: 681b ldr r3, [r3, #0] 80033b4: 681a ldr r2, [r3, #0] 80033b6: 687b ldr r3, [r7, #4] 80033b8: 681b ldr r3, [r3, #0] 80033ba: f022 0201 bic.w r2, r2, #1 80033be: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80033c0: 687b ldr r3, [r7, #4] 80033c2: 681b ldr r3, [r3, #0] 80033c4: 4a22 ldr r2, [pc, #136] @ (8003450 ) 80033c6: 4293 cmp r3, r2 80033c8: d029 beq.n 800341e 80033ca: 687b ldr r3, [r7, #4] 80033cc: 681b ldr r3, [r3, #0] 80033ce: 4a21 ldr r2, [pc, #132] @ (8003454 ) 80033d0: 4293 cmp r3, r2 80033d2: d022 beq.n 800341a 80033d4: 687b ldr r3, [r7, #4] 80033d6: 681b ldr r3, [r3, #0] 80033d8: 4a1f ldr r2, [pc, #124] @ (8003458 ) 80033da: 4293 cmp r3, r2 80033dc: d01a beq.n 8003414 80033de: 687b ldr r3, [r7, #4] 80033e0: 681b ldr r3, [r3, #0] 80033e2: 4a1e ldr r2, [pc, #120] @ (800345c ) 80033e4: 4293 cmp r3, r2 80033e6: d012 beq.n 800340e 80033e8: 687b ldr r3, [r7, #4] 80033ea: 681b ldr r3, [r3, #0] 80033ec: 4a1c ldr r2, [pc, #112] @ (8003460 ) 80033ee: 4293 cmp r3, r2 80033f0: d00a beq.n 8003408 80033f2: 687b ldr r3, [r7, #4] 80033f4: 681b ldr r3, [r3, #0] 80033f6: 4a1b ldr r2, [pc, #108] @ (8003464 ) 80033f8: 4293 cmp r3, r2 80033fa: d102 bne.n 8003402 80033fc: f44f 1380 mov.w r3, #1048576 @ 0x100000 8003400: e00e b.n 8003420 8003402: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8003406: e00b b.n 8003420 8003408: f44f 3380 mov.w r3, #65536 @ 0x10000 800340c: e008 b.n 8003420 800340e: f44f 5380 mov.w r3, #4096 @ 0x1000 8003412: e005 b.n 8003420 8003414: f44f 7380 mov.w r3, #256 @ 0x100 8003418: e002 b.n 8003420 800341a: 2310 movs r3, #16 800341c: e000 b.n 8003420 800341e: 2301 movs r3, #1 8003420: 4a11 ldr r2, [pc, #68] @ (8003468 ) 8003422: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8003424: 687b ldr r3, [r7, #4] 8003426: 2201 movs r2, #1 8003428: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 800342c: 687b ldr r3, [r7, #4] 800342e: 2200 movs r2, #0 8003430: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 8003434: 687b ldr r3, [r7, #4] 8003436: 6b5b ldr r3, [r3, #52] @ 0x34 8003438: 2b00 cmp r3, #0 800343a: d003 beq.n 8003444 { hdma->XferAbortCallback(hdma); 800343c: 687b ldr r3, [r7, #4] 800343e: 6b5b ldr r3, [r3, #52] @ 0x34 8003440: 6878 ldr r0, [r7, #4] 8003442: 4798 blx r3 } } return status; 8003444: 7bfb ldrb r3, [r7, #15] } 8003446: 4618 mov r0, r3 8003448: 3710 adds r7, #16 800344a: 46bd mov sp, r7 800344c: bd80 pop {r7, pc} 800344e: bf00 nop 8003450: 40020008 .word 0x40020008 8003454: 4002001c .word 0x4002001c 8003458: 40020030 .word 0x40020030 800345c: 40020044 .word 0x40020044 8003460: 40020058 .word 0x40020058 8003464: 4002006c .word 0x4002006c 8003468: 40020000 .word 0x40020000 0800346c : * @param Data: Specifies the data to be programmed * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) { 800346c: b5f0 push {r4, r5, r6, r7, lr} 800346e: b087 sub sp, #28 8003470: af00 add r7, sp, #0 8003472: 60f8 str r0, [r7, #12] 8003474: 60b9 str r1, [r7, #8] 8003476: e9c7 2300 strd r2, r3, [r7] HAL_StatusTypeDef status = HAL_ERROR; 800347a: 2301 movs r3, #1 800347c: 75fb strb r3, [r7, #23] uint8_t index = 0; 800347e: 2300 movs r3, #0 8003480: 75bb strb r3, [r7, #22] uint8_t nbiterations = 0; 8003482: 2300 movs r3, #0 8003484: 757b strb r3, [r7, #21] /* Process Locked */ __HAL_LOCK(&pFlash); 8003486: 4b2f ldr r3, [pc, #188] @ (8003544 ) 8003488: 7e1b ldrb r3, [r3, #24] 800348a: 2b01 cmp r3, #1 800348c: d101 bne.n 8003492 800348e: 2302 movs r3, #2 8003490: e054 b.n 800353c 8003492: 4b2c ldr r3, [pc, #176] @ (8003544 ) 8003494: 2201 movs r2, #1 8003496: 761a strb r2, [r3, #24] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); 8003498: f24c 3050 movw r0, #50000 @ 0xc350 800349c: f000 f8a8 bl 80035f0 80034a0: 4603 mov r3, r0 80034a2: 75fb strb r3, [r7, #23] /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE); } #endif /* FLASH_BANK2_END */ if(status == HAL_OK) 80034a4: 7dfb ldrb r3, [r7, #23] 80034a6: 2b00 cmp r3, #0 80034a8: d144 bne.n 8003534 { if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) 80034aa: 68fb ldr r3, [r7, #12] 80034ac: 2b01 cmp r3, #1 80034ae: d102 bne.n 80034b6 { /* Program halfword (16-bit) at a specified address. */ nbiterations = 1U; 80034b0: 2301 movs r3, #1 80034b2: 757b strb r3, [r7, #21] 80034b4: e007 b.n 80034c6 } else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) 80034b6: 68fb ldr r3, [r7, #12] 80034b8: 2b02 cmp r3, #2 80034ba: d102 bne.n 80034c2 { /* Program word (32-bit = 2*16-bit) at a specified address. */ nbiterations = 2U; 80034bc: 2302 movs r3, #2 80034be: 757b strb r3, [r7, #21] 80034c0: e001 b.n 80034c6