: /** * @brief The application entry point. * @retval int */ int main(void) { 8001ec4: b590 push {r4, r7, lr} 8001ec6: b097 sub sp, #92 @ 0x5c 8001ec8: af02 add r7, sp, #8 /* USER CODE BEGIN 1 */ uint8_t tempString[15] = {0}; 8001eca: f107 0308 add.w r3, r7, #8 8001ece: 2200 movs r2, #0 8001ed0: 601a str r2, [r3, #0] 8001ed2: 605a str r2, [r3, #4] 8001ed4: 609a str r2, [r3, #8] 8001ed6: f8c3 200b str.w r2, [r3, #11] uint8_t averages = 0; 8001eda: 2300 movs r3, #0 8001edc: f887 304f strb.w r3, [r7, #79] @ 0x4f uint8_t newline = '\n'; 8001ee0: 230a movs r3, #10 8001ee2: 71fb strb r3, [r7, #7] // Variables for timing uint32_t previous_millis_green = 0; 8001ee4: 2300 movs r3, #0 8001ee6: 64bb str r3, [r7, #72] @ 0x48 uint32_t previous_millis_red = 0; 8001ee8: 2300 movs r3, #0 8001eea: 643b str r3, [r7, #64] @ 0x40 uint32_t current_millis; float reference_resistor_100R = 0, reference_resistor_1K = 0, temperature_RTD = 0, thermal_compensaded_EC = 0; 8001eec: f04f 0300 mov.w r3, #0 8001ef0: 63fb str r3, [r7, #60] @ 0x3c 8001ef2: f04f 0300 mov.w r3, #0 8001ef6: 63bb str r3, [r7, #56] @ 0x38 8001ef8: f04f 0300 mov.w r3, #0 8001efc: 647b str r3, [r7, #68] @ 0x44 8001efe: f04f 0300 mov.w r3, #0 8001f02: 637b str r3, [r7, #52] @ 0x34 float mag_rtd_reference = 0, mag_ec_reference = 0, mag_rtd = 0, mag_ec = 0; 8001f04: f04f 0300 mov.w r3, #0 8001f08: 633b str r3, [r7, #48] @ 0x30 8001f0a: f04f 0300 mov.w r3, #0 8001f0e: 62fb str r3, [r7, #44] @ 0x2c 8001f10: f04f 0300 mov.w r3, #0 8001f14: 62bb str r3, [r7, #40] @ 0x28 8001f16: f04f 0300 mov.w r3, #0 8001f1a: 627b str r3, [r7, #36] @ 0x24 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8001f1c: f000 fce0 bl 80028e0 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8001f20: f000 f920 bl 8002164 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8001f24: f7ff fe66 bl 8001bf4 MX_ADC1_Init(); 8001f28: f7ff fa4e bl 80013c8 MX_ADC2_Init(); 8001f2c: f7ff fa8a bl 8001444 MX_I2C1_Init(); 8001f30: f7ff ff00 bl 8001d34 MX_I2C2_Init(); 8001f34: f7ff ff2c bl 8001d90 MX_USART1_UART_Init(); 8001f38: f000 fc2e bl 8002798 MX_TIM3_Init(); 8001f3c: f000 fbb8 bl 80026b0 /* USER CODE BEGIN 2 */ HAL_TIM_Base_Start_IT(&htim3); 8001f40: 4879 ldr r0, [pc, #484] @ (8002128 ) 8001f42: f003 f83d bl 8004fc0 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); // LED Green Off 8001f46: 2201 movs r2, #1 8001f48: 2110 movs r1, #16 8001f4a: 4878 ldr r0, [pc, #480] @ (800212c ) 8001f4c: f001 fabb bl 80034c6 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); // LED Red Off 8001f50: 2201 movs r2, #1 8001f52: 2120 movs r1, #32 8001f54: 4875 ldr r0, [pc, #468] @ (800212c ) 8001f56: f001 fab6 bl 80034c6 digital_outputs_init(); 8001f5a: f7ff fdb3 bl 8001ac4 rs485_init(); 8001f5e: f000 fa47 bl 80023f0 ADG715_ResetChannels(); 8001f62: f7ff fa13 bl 800138c ADS1015_Init(); // Initializes pH Measurement 8001f66: f7ff fb5d bl 8001624 AD5934_Init(); // Initializes CE and RTD Measurement 8001f6a: f7fe fc7b bl 8000864 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while(averages<20) 8001f6e: e016 b.n 8001f9e { AD5934_Process_System(); 8001f70: f7fe fec4 bl 8000cfc ADS1015_Process_System(); 8001f74: f7ff fbb4 bl 80016e0 current_millis = g_ms_counter; 8001f78: 4b6d ldr r3, [pc, #436] @ (8002130 ) 8001f7a: 681b ldr r3, [r3, #0] 8001f7c: 623b str r3, [r7, #32] if((current_millis % 100) == 0) // Send data each 40ms 8001f7e: 6a3a ldr r2, [r7, #32] 8001f80: 4b6c ldr r3, [pc, #432] @ (8002134 ) 8001f82: fba3 1302 umull r1, r3, r3, r2 8001f86: 095b lsrs r3, r3, #5 8001f88: 2164 movs r1, #100 @ 0x64 8001f8a: fb01 f303 mul.w r3, r1, r3 8001f8e: 1ad3 subs r3, r2, r3 8001f90: 2b00 cmp r3, #0 8001f92: d104 bne.n 8001f9e { averages++; 8001f94: f897 304f ldrb.w r3, [r7, #79] @ 0x4f 8001f98: 3301 adds r3, #1 8001f9a: f887 304f strb.w r3, [r7, #79] @ 0x4f while(averages<20) 8001f9e: f897 304f ldrb.w r3, [r7, #79] @ 0x4f 8001fa2: 2b13 cmp r3, #19 8001fa4: d9e4 bls.n 8001f70 } } digital_outputs_toggle(0); 8001fa6: 2000 movs r0, #0 8001fa8: f7ff fe06 bl 8001bb8 while (1) { AD5934_Process_System(); 8001fac: f7fe fea6 bl 8000cfc ADS1015_Process_System(); 8001fb0: f7ff fb96 bl 80016e0 current_millis = g_ms_counter; 8001fb4: 4b5e ldr r3, [pc, #376] @ (8002130 ) 8001fb6: 681b ldr r3, [r3, #0] 8001fb8: 623b str r3, [r7, #32] if((current_millis % 500) == 0) // Send data each 100ms 8001fba: 6a3a ldr r2, [r7, #32] 8001fbc: 4b5e ldr r3, [pc, #376] @ (8002138 ) 8001fbe: fba3 1302 umull r1, r3, r3, r2 8001fc2: 095b lsrs r3, r3, #5 8001fc4: f44f 71fa mov.w r1, #500 @ 0x1f4 8001fc8: fb01 f303 mul.w r3, r1, r3 8001fcc: 1ad3 subs r3, r2, r3 8001fce: 2b00 cmp r3, #0 8001fd0: f040 809c bne.w 800210c { if (g_rtd_filter.value_valid) // PT100 or PT1000 in °C 8001fd4: 4b59 ldr r3, [pc, #356] @ (800213c ) 8001fd6: f893 3058 ldrb.w r3, [r3, #88] @ 0x58 8001fda: 2b00 cmp r3, #0 8001fdc: d02b beq.n 8002036 { temperature_RTD = AD5934_Calculate_Temperature(g_ref_100R_LowGain_filter.filtered_value, g_ref_1K_MidGain_filter.filtered_value, g_rtd_filter.filtered_value);// AD5934_GetImpedance(mag_reference,mag_rtd);// 8001fde: 4b58 ldr r3, [pc, #352] @ (8002140 ) 8001fe0: 6d5b ldr r3, [r3, #84] @ 0x54 8001fe2: 4a58 ldr r2, [pc, #352] @ (8002144 ) 8001fe4: 6d51 ldr r1, [r2, #84] @ 0x54 8001fe6: 4a55 ldr r2, [pc, #340] @ (800213c ) 8001fe8: 6d52 ldr r2, [r2, #84] @ 0x54 8001fea: 4618 mov r0, r3 8001fec: f7fe fc86 bl 80008fc 8001ff0: 6478 str r0, [r7, #68] @ 0x44 //uint16_t rtd_final = AD5934_RTD_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_rtd_filter.filtered_value, current_rtd_mux); uint16_t rtd_final = AD5934_Compress_To_IntScale(temperature_RTD, current_rtd_mux); 8001ff2: 4b55 ldr r3, [pc, #340] @ (8002148 ) 8001ff4: 781b ldrb r3, [r3, #0] 8001ff6: 4619 mov r1, r3 8001ff8: 6c78 ldr r0, [r7, #68] @ 0x44 8001ffa: f7fe fdc3 bl 8000b84 8001ffe: 4603 mov r3, r0 8002000: 83fb strh r3, [r7, #30] intToStr(rtd_final, tempString); 8002002: f9b7 301e ldrsh.w r3, [r7, #30] 8002006: f107 0208 add.w r2, r7, #8 800200a: 4611 mov r1, r2 800200c: 4618 mov r0, r3 800200e: f000 f8f9 bl 8002204 //FloatToString(tempString, temperature_RTD); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); 8002012: f107 0308 add.w r3, r7, #8 8002016: 4618 mov r0, r3 8002018: f7fe f898 bl 800014c 800201c: 4603 mov r3, r0 800201e: b29a uxth r2, r3 8002020: f107 0308 add.w r3, r7, #8 8002024: 4611 mov r1, r2 8002026: 4618 mov r0, r3 8002028: f000 fa0e bl 8002448 rs485_send_broadcast(&newline, 1); 800202c: 1dfb adds r3, r7, #7 800202e: 2101 movs r1, #1 8002030: 4618 mov r0, r3 8002032: f000 fa09 bl 8002448 } if (g_ec_filter.value_valid) // EC 8002036: 4b45 ldr r3, [pc, #276] @ (800214c ) 8002038: f893 3058 ldrb.w r3, [r3, #88] @ 0x58 800203c: 2b00 cmp r3, #0 800203e: d035 beq.n 80020ac { mag_ec = AD5934_GetAdmittance(g_ref_100R_MidGain_filter.filtered_value, g_ref_1K_MidGain_filter.filtered_value, g_ref_1K_HighGain_filter.filtered_value, g_ref_10K_HighGain_filter.filtered_value, g_ec_filter.filtered_value); 8002040: 4b43 ldr r3, [pc, #268] @ (8002150 ) 8002042: 6d58 ldr r0, [r3, #84] @ 0x54 8002044: 4b3f ldr r3, [pc, #252] @ (8002144 ) 8002046: 6d59 ldr r1, [r3, #84] @ 0x54 8002048: 4b42 ldr r3, [pc, #264] @ (8002154 ) 800204a: 6d5a ldr r2, [r3, #84] @ 0x54 800204c: 4b42 ldr r3, [pc, #264] @ (8002158 ) 800204e: 6d5c ldr r4, [r3, #84] @ 0x54 8002050: 4b3e ldr r3, [pc, #248] @ (800214c ) 8002052: 6d5b ldr r3, [r3, #84] @ 0x54 8002054: 9300 str r3, [sp, #0] 8002056: 4623 mov r3, r4 8002058: f7fe fd14 bl 8000a84 800205c: 6278 str r0, [r7, #36] @ 0x24 thermal_compensaded_EC = AD5934_EC_Compensate_Magnitude_To_25C(mag_ec, temperature_RTD); 800205e: 6c79 ldr r1, [r7, #68] @ 0x44 8002060: 6a78 ldr r0, [r7, #36] @ 0x24 8002062: f7fe fcdb bl 8000a1c 8002066: 6378 str r0, [r7, #52] @ 0x34 uint16_t ec_final = AD5934_Compress_To_IntScale(mag_ec, current_ec_mux); 8002068: 4b3c ldr r3, [pc, #240] @ (800215c ) 800206a: 781b ldrb r3, [r3, #0] 800206c: 4619 mov r1, r3 800206e: 6a78 ldr r0, [r7, #36] @ 0x24 8002070: f7fe fd88 bl 8000b84 8002074: 4603 mov r3, r0 8002076: 83bb strh r3, [r7, #28] intToStr(ec_final, tempString); 8002078: f9b7 301c ldrsh.w r3, [r7, #28] 800207c: f107 0208 add.w r2, r7, #8 8002080: 4611 mov r1, r2 8002082: 4618 mov r0, r3 8002084: f000 f8be bl 8002204 //FloatToString(tempString, thermal_compensaded_EC); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); 8002088: f107 0308 add.w r3, r7, #8 800208c: 4618 mov r0, r3 800208e: f7fe f85d bl 800014c 8002092: 4603 mov r3, r0 8002094: b29a uxth r2, r3 8002096: f107 0308 add.w r3, r7, #8 800209a: 4611 mov r1, r2 800209c: 4618 mov r0, r3 800209e: f000 f9d3 bl 8002448 rs485_send_broadcast(&newline, 1); 80020a2: 1dfb adds r3, r7, #7 80020a4: 2101 movs r1, #1 80020a6: 4618 mov r0, r3 80020a8: f000 f9ce bl 8002448 } if (g_ph_filter.value_valid) // pH 80020ac: 4b2c ldr r3, [pc, #176] @ (8002160 ) 80020ae: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80020b2: 2b00 cmp r3, #0 80020b4: d025 beq.n 8002102 { uint16_t ph_final = ADS1015_Compress_To_IntScale(g_ph_filter.filtered_value); 80020b6: 4b2a ldr r3, [pc, #168] @ (8002160 ) 80020b8: 6b9b ldr r3, [r3, #56] @ 0x38 80020ba: 4618 mov r0, r3 80020bc: f7ff facc bl 8001658 80020c0: 4603 mov r3, r0 80020c2: 837b strh r3, [r7, #26] intToStr(ph_final, tempString); 80020c4: f9b7 301a ldrsh.w r3, [r7, #26] 80020c8: f107 0208 add.w r2, r7, #8 80020cc: 4611 mov r1, r2 80020ce: 4618 mov r0, r3 80020d0: f000 f898 bl 8002204 //float ph_final = g_ph_filter.filtered_value; //FloatToString(tempString, ph_final); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); 80020d4: f107 0308 add.w r3, r7, #8 80020d8: 4618 mov r0, r3 80020da: f7fe f837 bl 800014c 80020de: 4603 mov r3, r0 80020e0: b29a uxth r2, r3 80020e2: f107 0308 add.w r3, r7, #8 80020e6: 4611 mov r1, r2 80020e8: 4618 mov r0, r3 80020ea: f000 f9ad bl 8002448 rs485_send_broadcast(&newline, 1); 80020ee: 1dfb adds r3, r7, #7 80020f0: 2101 movs r1, #1 80020f2: 4618 mov r0, r3 80020f4: f000 f9a8 bl 8002448 rs485_send_broadcast(&newline, 1); 80020f8: 1dfb adds r3, r7, #7 80020fa: 2101 movs r1, #1 80020fc: 4618 mov r0, r3 80020fe: f000 f9a3 bl 8002448 } rs485_send_broadcast(&newline, 1); 8002102: 1dfb adds r3, r7, #7 8002104: 2101 movs r1, #1 8002106: 4618 mov r0, r3 8002108: f000 f99e bl 8002448 } // Piscar LED verde em PB4 a cada 1 segundo if ((current_millis - previous_millis_green) >= 1000) 800210c: 6a3a ldr r2, [r7, #32] 800210e: 6cbb ldr r3, [r7, #72] @ 0x48 8002110: 1ad3 subs r3, r2, r3 8002112: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8002116: f4ff af49 bcc.w 8001fac { previous_millis_green = current_millis; 800211a: 6a3b ldr r3, [r7, #32] 800211c: 64bb str r3, [r7, #72] @ 0x48 HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_4); 800211e: 2110 movs r1, #16 8002120: 4802 ldr r0, [pc, #8] @ (800212c ) 8002122: f001 f9e8 bl 80034f6 AD5934_Process_System(); 8002126: e741 b.n 8001fac 8002128: 20000524 .word 0x20000524 800212c: 40010c00 .word 0x40010c00 8002130: 20000084 .word 0x20000084 8002134: 51eb851f .word 0x51eb851f 8002138: 10624dd3 .word 0x10624dd3 800213c: 2000008c .word 0x2000008c 8002140: 20000144 .word 0x20000144 8002144: 20000258 .word 0x20000258 8002148: 20000001 .word 0x20000001 800214c: 200000e8 .word 0x200000e8 8002150: 200001a0 .word 0x200001a0 8002154: 200002b4 .word 0x200002b4 8002158: 20000310 .word 0x20000310 800215c: 20000000 .word 0x20000000 8002160: 200003dc .word 0x200003dc 08002164 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8002164: b580 push {r7, lr} 8002166: b094 sub sp, #80 @ 0x50 8002168: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 800216a: f107 0328 add.w r3, r7, #40 @ 0x28 800216e: 2228 movs r2, #40 @ 0x28 8002170: 2100 movs r1, #0 8002172: 4618 mov r0, r3 8002174: f004 f8dc bl 8006330 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8002178: f107 0314 add.w r3, r7, #20 800217c: 2200 movs r2, #0 800217e: 601a str r2, [r3, #0] 8002180: 605a str r2, [r3, #4] 8002182: 609a str r2, [r3, #8] 8002184: 60da str r2, [r3, #12] 8002186: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8002188: 1d3b adds r3, r7, #4 800218a: 2200 movs r2, #0 800218c: 601a str r2, [r3, #0] 800218e: 605a str r2, [r3, #4] 8002190: 609a str r2, [r3, #8] 8002192: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 8002194: 2301 movs r3, #1 8002196: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8002198: f44f 3380 mov.w r3, #65536 @ 0x10000 800219c: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; 800219e: 2300 movs r3, #0 80021a0: 647b str r3, [r7, #68] @ 0x44 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 80021a2: f107 0328 add.w r3, r7, #40 @ 0x28 80021a6: 4618 mov r0, r3 80021a8: f002 f9f2 bl 8004590 80021ac: 4603 mov r3, r0 80021ae: 2b00 cmp r3, #0 80021b0: d001 beq.n 80021b6 { Error_Handler(); 80021b2: f000 f90b bl 80023cc } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 80021b6: 230f movs r3, #15 80021b8: 617b str r3, [r7, #20] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; 80021ba: 2301 movs r3, #1 80021bc: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 80021be: 2300 movs r3, #0 80021c0: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 80021c2: 2300 movs r3, #0 80021c4: 623b str r3, [r7, #32] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 80021c6: 2300 movs r3, #0 80021c8: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) 80021ca: f107 0314 add.w r3, r7, #20 80021ce: 2100 movs r1, #0 80021d0: 4618 mov r0, r3 80021d2: f002 fc5f bl 8004a94 80021d6: 4603 mov r3, r0 80021d8: 2b00 cmp r3, #0 80021da: d001 beq.n 80021e0 { Error_Handler(); 80021dc: f000 f8f6 bl 80023cc } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; 80021e0: 2302 movs r3, #2 80021e2: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV8; 80021e4: f44f 4340 mov.w r3, #49152 @ 0xc000 80021e8: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 80021ea: 1d3b adds r3, r7, #4 80021ec: 4618 mov r0, r3 80021ee: f002 fde1 bl 8004db4 80021f2: 4603 mov r3, r0 80021f4: 2b00 cmp r3, #0 80021f6: d001 beq.n 80021fc { Error_Handler(); 80021f8: f000 f8e8 bl 80023cc } } 80021fc: bf00 nop 80021fe: 3750 adds r7, #80 @ 0x50 8002200: 46bd mov sp, r7 8002202: bd80 pop {r7, pc} 08002204 : } void intToStr(int16_t N, uint8_t *str) { 8002204: b480 push {r7} 8002206: b087 sub sp, #28 8002208: af00 add r7, sp, #0 800220a: 4603 mov r3, r0 800220c: 6039 str r1, [r7, #0] 800220e: 80fb strh r3, [r7, #6] int16_t i = 0; 8002210: 2300 movs r3, #0 8002212: 82fb strh r3, [r7, #22] int16_t sign = N; 8002214: 88fb ldrh r3, [r7, #6] 8002216: 823b strh r3, [r7, #16] uint8_t max_len = 15; // Tamanho máximo do buffer 8002218: 230f movs r3, #15 800221a: 73fb strb r3, [r7, #15] uint8_t width = 4; // mínimo 4 caracteres 800221c: 2304 movs r3, #4 800221e: 757b strb r3, [r7, #21] // Trata o caso do número zero isoladamente if (N == 0) 8002220: f9b7 3006 ldrsh.w r3, [r7, #6] 8002224: 2b00 cmp r3, #0 8002226: d127 bne.n 8002278 { // Preenche com zeros à esquerda até atingir a largura desejada while (width > 1 && i < (max_len - 1)) 8002228: e00c b.n 8002244 { str[i++] = '0'; 800222a: f9b7 2016 ldrsh.w r2, [r7, #22] 800222e: b293 uxth r3, r2 8002230: 3301 adds r3, #1 8002232: b29b uxth r3, r3 8002234: 82fb strh r3, [r7, #22] 8002236: 683b ldr r3, [r7, #0] 8002238: 4413 add r3, r2 800223a: 2230 movs r2, #48 @ 0x30 800223c: 701a strb r2, [r3, #0] width--; 800223e: 7d7b ldrb r3, [r7, #21] 8002240: 3b01 subs r3, #1 8002242: 757b strb r3, [r7, #21] while (width > 1 && i < (max_len - 1)) 8002244: 7d7b ldrb r3, [r7, #21] 8002246: 2b01 cmp r3, #1 8002248: d905 bls.n 8002256 800224a: f9b7 2016 ldrsh.w r2, [r7, #22] 800224e: 7bfb ldrb r3, [r7, #15] 8002250: 3b01 subs r3, #1 8002252: 429a cmp r2, r3 8002254: dbe9 blt.n 800222a } str[i++] = '0'; 8002256: f9b7 2016 ldrsh.w r2, [r7, #22] 800225a: b293 uxth r3, r2 800225c: 3301 adds r3, #1 800225e: b29b uxth r3, r3 8002260: 82fb strh r3, [r7, #22] 8002262: 683b ldr r3, [r7, #0] 8002264: 4413 add r3, r2 8002266: 2230 movs r2, #48 @ 0x30 8002268: 701a strb r2, [r3, #0] str[i] = '\0'; 800226a: f9b7 3016 ldrsh.w r3, [r7, #22] 800226e: 683a ldr r2, [r7, #0] 8002270: 4413 add r3, r2 8002272: 2200 movs r2, #0 8002274: 701a strb r2, [r3, #0] return; 8002276: e08a b.n 800238e } if (N < 0) 8002278: f9b7 3006 ldrsh.w r3, [r7, #6] 800227c: 2b00 cmp r3, #0 800227e: da2d bge.n 80022dc N = -N; 8002280: 88fb ldrh r3, [r7, #6] 8002282: 425b negs r3, r3 8002284: b29b uxth r3, r3 8002286: 80fb strh r3, [r7, #6] // Extração dos dígitos while (N > 0) 8002288: e028 b.n 80022dc { if (i >= (max_len - 1)) 800228a: f9b7 2016 ldrsh.w r2, [r7, #22] 800228e: 7bfb ldrb r3, [r7, #15] 8002290: 3b01 subs r3, #1 8002292: 429a cmp r2, r3 8002294: da27 bge.n 80022e6 break; // Proteção de estouro str[i++] = (N % 10) + '0'; 8002296: f9b7 2006 ldrsh.w r2, [r7, #6] 800229a: 4b3f ldr r3, [pc, #252] @ (8002398 ) 800229c: fb83 1302 smull r1, r3, r3, r2 80022a0: 1099 asrs r1, r3, #2 80022a2: 17d3 asrs r3, r2, #31 80022a4: 1ac9 subs r1, r1, r3 80022a6: 460b mov r3, r1 80022a8: 009b lsls r3, r3, #2 80022aa: 440b add r3, r1 80022ac: 005b lsls r3, r3, #1 80022ae: 1ad3 subs r3, r2, r3 80022b0: b21b sxth r3, r3 80022b2: b2da uxtb r2, r3 80022b4: f9b7 1016 ldrsh.w r1, [r7, #22] 80022b8: b28b uxth r3, r1 80022ba: 3301 adds r3, #1 80022bc: b29b uxth r3, r3 80022be: 82fb strh r3, [r7, #22] 80022c0: 683b ldr r3, [r7, #0] 80022c2: 440b add r3, r1 80022c4: 3230 adds r2, #48 @ 0x30 80022c6: b2d2 uxtb r2, r2 80022c8: 701a strb r2, [r3, #0] N /= 10; 80022ca: f9b7 3006 ldrsh.w r3, [r7, #6] 80022ce: 4a32 ldr r2, [pc, #200] @ (8002398 ) 80022d0: fb82 1203 smull r1, r2, r2, r3 80022d4: 1092 asrs r2, r2, #2 80022d6: 17db asrs r3, r3, #31 80022d8: 1ad3 subs r3, r2, r3 80022da: 80fb strh r3, [r7, #6] while (N > 0) 80022dc: f9b7 3006 ldrsh.w r3, [r7, #6] 80022e0: 2b00 cmp r3, #0 80022e2: dcd2 bgt.n 800228a 80022e4: e000 b.n 80022e8 break; // Proteção de estouro 80022e6: bf00 nop } // Adiciona o sinal de menos se necessário if (sign < 0) 80022e8: f9b7 3010 ldrsh.w r3, [r7, #16] 80022ec: 2b00 cmp r3, #0 80022ee: da1a bge.n 8002326 { if (i < (max_len - 1)) 80022f0: f9b7 2016 ldrsh.w r2, [r7, #22] 80022f4: 7bfb ldrb r3, [r7, #15] 80022f6: 3b01 subs r3, #1 80022f8: 429a cmp r2, r3 80022fa: da14 bge.n 8002326 str[i++] = '-'; 80022fc: f9b7 2016 ldrsh.w r2, [r7, #22] 8002300: b293 uxth r3, r2 8002302: 3301 adds r3, #1 8002304: b29b uxth r3, r3 8002306: 82fb strh r3, [r7, #22] 8002308: 683b ldr r3, [r7, #0] 800230a: 4413 add r3, r2 800230c: 222d movs r2, #45 @ 0x2d 800230e: 701a strb r2, [r3, #0] } // Preenche com zeros à esquerda (considerando o espaço ocupado pelos dígitos e sinal) while (i < width && i < (max_len - 1)) 8002310: e009 b.n 8002326 { str[i++] = '0'; 8002312: f9b7 2016 ldrsh.w r2, [r7, #22] 8002316: b293 uxth r3, r2 8002318: 3301 adds r3, #1 800231a: b29b uxth r3, r3 800231c: 82fb strh r3, [r7, #22] 800231e: 683b ldr r3, [r7, #0] 8002320: 4413 add r3, r2 8002322: 2230 movs r2, #48 @ 0x30 8002324: 701a strb r2, [r3, #0] while (i < width && i < (max_len - 1)) 8002326: f9b7 2016 ldrsh.w r2, [r7, #22] 800232a: 7d7b ldrb r3, [r7, #21] 800232c: 429a cmp r2, r3 800232e: da05 bge.n 800233c 8002330: f9b7 2016 ldrsh.w r2, [r7, #22] 8002334: 7bfb ldrb r3, [r7, #15] 8002336: 3b01 subs r3, #1 8002338: 429a cmp r2, r3 800233a: dbea blt.n 8002312 } str[i] = '\0'; 800233c: f9b7 3016 ldrsh.w r3, [r7, #22] 8002340: 683a ldr r2, [r7, #0] 8002342: 4413 add r3, r2 8002344: 2200 movs r2, #0 8002346: 701a strb r2, [r3, #0] // Inverte a string para colocar na ordem correta for (uint8_t j = 0, k = i - 1; j < k; j++, k--) 8002348: 2300 movs r3, #0 800234a: 753b strb r3, [r7, #20] 800234c: 8afb ldrh r3, [r7, #22] 800234e: b2db uxtb r3, r3 8002350: 3b01 subs r3, #1 8002352: 74fb strb r3, [r7, #19] 8002354: e017 b.n 8002386 { uint8_t temp = str[j]; 8002356: 7d3b ldrb r3, [r7, #20] 8002358: 683a ldr r2, [r7, #0] 800235a: 4413 add r3, r2 800235c: 781b ldrb r3, [r3, #0] 800235e: 73bb strb r3, [r7, #14] str[j] = str[k]; 8002360: 7cfb ldrb r3, [r7, #19] 8002362: 683a ldr r2, [r7, #0] 8002364: 441a add r2, r3 8002366: 7d3b ldrb r3, [r7, #20] 8002368: 6839 ldr r1, [r7, #0] 800236a: 440b add r3, r1 800236c: 7812 ldrb r2, [r2, #0] 800236e: 701a strb r2, [r3, #0] str[k] = temp; 8002370: 7cfb ldrb r3, [r7, #19] 8002372: 683a ldr r2, [r7, #0] 8002374: 4413 add r3, r2 8002376: 7bba ldrb r2, [r7, #14] 8002378: 701a strb r2, [r3, #0] for (uint8_t j = 0, k = i - 1; j < k; j++, k--) 800237a: 7d3b ldrb r3, [r7, #20] 800237c: 3301 adds r3, #1 800237e: 753b strb r3, [r7, #20] 8002380: 7cfb ldrb r3, [r7, #19] 8002382: 3b01 subs r3, #1 8002384: 74fb strb r3, [r7, #19] 8002386: 7d3a ldrb r2, [r7, #20] 8002388: 7cfb ldrb r3, [r7, #19] 800238a: 429a cmp r2, r3 800238c: d3e3 bcc.n 8002356 } } 800238e: 371c adds r7, #28 8002390: 46bd mov sp, r7 8002392: bc80 pop {r7} 8002394: 4770 bx lr 8002396: bf00 nop 8002398: 66666667 .word 0x66666667 0800239c : } /* TIM3 Timer Interrupt */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { 800239c: b480 push {r7} 800239e: b083 sub sp, #12 80023a0: af00 add r7, sp, #0 80023a2: 6078 str r0, [r7, #4] if (htim->Instance == TIM3) 80023a4: 687b ldr r3, [r7, #4] 80023a6: 681b ldr r3, [r3, #0] 80023a8: 4a06 ldr r2, [pc, #24] @ (80023c4 ) 80023aa: 4293 cmp r3, r2 80023ac: d104 bne.n 80023b8 { g_ms_counter++; /* Relógio global do sistema */ 80023ae: 4b06 ldr r3, [pc, #24] @ (80023c8 ) 80023b0: 681b ldr r3, [r3, #0] 80023b2: 3301 adds r3, #1 80023b4: 4a04 ldr r2, [pc, #16] @ (80023c8 ) 80023b6: 6013 str r3, [r2, #0] } } 80023b8: bf00 nop 80023ba: 370c adds r7, #12 80023bc: 46bd mov sp, r7 80023be: bc80 pop {r7} 80023c0: 4770 bx lr 80023c2: bf00 nop 80023c4: 40000400 .word 0x40000400 80023c8: 20000084 .word 0x20000084 080023cc : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 80023cc: b480 push {r7} 80023ce: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 80023d0: b672 cpsid i } 80023d2: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 80023d4: bf00 nop 80023d6: e7fd b.n 80023d4 080023d8 : * @rmtoll IDR IDy LL_GPIO_ReadInputPort * @param GPIOx GPIO Port * @retval Input data register value of port */ __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx) { 80023d8: b480 push {r7} 80023da: b083 sub sp, #12 80023dc: af00 add r7, sp, #0 80023de: 6078 str r0, [r7, #4] return (READ_REG(GPIOx->IDR)); 80023e0: 687b ldr r3, [r7, #4] 80023e2: 689b ldr r3, [r3, #8] } 80023e4: 4618 mov r0, r3 80023e6: 370c adds r7, #12 80023e8: 46bd mov sp, r7 80023ea: bc80 pop {r7} 80023ec: 4770 bx lr ... 080023f0 : /** * @brief Initializes the RS-485 driver. * @note This function configures GPIOs for address detection and USART1 for communication. */ void rs485_init(void) { 80023f0: b580 push {r7, lr} 80023f2: af00 add r7, sp, #0 /* Configure GPIOs for address detection */ rs485_configure_gpio_address(); 80023f4: f000 f864 bl 80024c0 /* Configure USART1 for RS-485 communication */ rs485_configure_usart1(); 80023f8: f000 f8a8 bl 800254c /* Get the current device address from GPIOs */ device_address.full_address = rs485_get_address(); 80023fc: f000 f808 bl 8002410 8002400: 4603 mov r3, r0 8002402: 461a mov r2, r3 8002404: 4b01 ldr r3, [pc, #4] @ (800240c ) 8002406: 709a strb r2, [r3, #2] } 8002408: bf00 nop 800240a: bd80 pop {r7, pc} 800240c: 200004d8 .word 0x200004d8 08002410 : /** * @brief Gets the current device address from GPIOs. * @return The 8-bit device address. */ uint8_t rs485_get_address(void) { 8002410: b598 push {r3, r4, r7, lr} 8002412: af00 add r7, sp, #0 return ((uint8_t) ((((LL_GPIO_ReadInputPort(GPIOB) & RS485_ADDR_MASK_HIGH)>>RS485_ADDR_BIT_SET_HIGH) | (LL_GPIO_ReadInputPort(GPIOA) & RS485_ADDR_MASK_LOW)>>RS485_ADDR_BIT_SET_LOW))); 8002414: 480a ldr r0, [pc, #40] @ (8002440 ) 8002416: f7ff ffdf bl 80023d8 800241a: 4603 mov r3, r0 800241c: 0a1b lsrs r3, r3, #8 800241e: b2db uxtb r3, r3 8002420: f023 030f bic.w r3, r3, #15 8002424: b2dc uxtb r4, r3 8002426: 4807 ldr r0, [pc, #28] @ (8002444 ) 8002428: f7ff ffd6 bl 80023d8 800242c: 4603 mov r3, r0 800242e: 089b lsrs r3, r3, #2 8002430: b2db uxtb r3, r3 8002432: f003 030f and.w r3, r3, #15 8002436: b2db uxtb r3, r3 8002438: 4323 orrs r3, r4 800243a: b2db uxtb r3, r3 } 800243c: 4618 mov r0, r3 800243e: bd98 pop {r3, r4, r7, pc} 8002440: 40010c00 .word 0x40010c00 8002444: 40010800 .word 0x40010800 08002448 : * @param data Pointer to the data buffer. * @param length Number of bytes to send. * @retval HAL_OK on success, otherwise error code. */ HAL_StatusTypeDef rs485_send_broadcast(uint8_t* data, uint16_t length) { 8002448: b580 push {r7, lr} 800244a: b084 sub sp, #16 800244c: af00 add r7, sp, #0 800244e: 6078 str r0, [r7, #4] 8002450: 460b mov r3, r1 8002452: 807b strh r3, [r7, #2] /* Enable transmission mode */ rs485_enable_tx(); 8002454: f000 f81c bl 8002490 /* Send the broadcast address (0x00) first */ uint8_t broadcast_address = 0x00; 8002458: 2300 movs r3, #0 800245a: 73bb strb r3, [r7, #14] HAL_UART_Transmit(&huart1, &broadcast_address, 1, HAL_MAX_DELAY); 800245c: f107 010e add.w r1, r7, #14 8002460: f04f 33ff mov.w r3, #4294967295 8002464: 2201 movs r2, #1 8002466: 4809 ldr r0, [pc, #36] @ (800248c ) 8002468: f003 f99c bl 80057a4 /* Send the data */ HAL_StatusTypeDef status = HAL_UART_Transmit(&huart1, data, length, HAL_MAX_DELAY); 800246c: 887a ldrh r2, [r7, #2] 800246e: f04f 33ff mov.w r3, #4294967295 8002472: 6879 ldr r1, [r7, #4] 8002474: 4805 ldr r0, [pc, #20] @ (800248c ) 8002476: f003 f995 bl 80057a4 800247a: 4603 mov r3, r0 800247c: 73fb strb r3, [r7, #15] /* Disable transmission mode after sending */ rs485_disable_tx(); 800247e: f000 f813 bl 80024a8 return status; 8002482: 7bfb ldrb r3, [r7, #15] } 8002484: 4618 mov r0, r3 8002486: 3710 adds r7, #16 8002488: 46bd mov sp, r7 800248a: bd80 pop {r7, pc} 800248c: 200004dc .word 0x200004dc 08002490 : /** * @brief Enables transmission mode on RS-485 transceiver. */ void rs485_enable_tx(void) { 8002490: b580 push {r7, lr} 8002492: af00 add r7, sp, #0 /* Set TX EN pin high to enable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_SET); 8002494: 2201 movs r2, #1 8002496: f44f 5180 mov.w r1, #4096 @ 0x1000 800249a: 4802 ldr r0, [pc, #8] @ (80024a4 ) 800249c: f001 f813 bl 80034c6 } 80024a0: bf00 nop 80024a2: bd80 pop {r7, pc} 80024a4: 40010800 .word 0x40010800 080024a8 : /** * @brief Disables transmission mode on RS-485 transceiver. */ void rs485_disable_tx(void) { 80024a8: b580 push {r7, lr} 80024aa: af00 add r7, sp, #0 /* Set TX EN pin low to disable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_RESET); 80024ac: 2200 movs r2, #0 80024ae: f44f 5180 mov.w r1, #4096 @ 0x1000 80024b2: 4802 ldr r0, [pc, #8] @ (80024bc ) 80024b4: f001 f807 bl 80034c6 } 80024b8: bf00 nop 80024ba: bd80 pop {r7, pc} 80024bc: 40010800 .word 0x40010800 080024c0 : /** * @brief Configures GPIOs for address detection. */ static void rs485_configure_gpio_address(void) { 80024c0: b580 push {r7, lr} 80024c2: b086 sub sp, #24 80024c4: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80024c6: f107 0308 add.w r3, r7, #8 80024ca: 2200 movs r2, #0 80024cc: 601a str r2, [r3, #0] 80024ce: 605a str r2, [r3, #4] 80024d0: 609a str r2, [r3, #8] 80024d2: 60da str r2, [r3, #12] /* Enable clock for GPIOA and GPIOB */ __HAL_RCC_GPIOA_CLK_ENABLE(); 80024d4: 4b1a ldr r3, [pc, #104] @ (8002540 ) 80024d6: 699b ldr r3, [r3, #24] 80024d8: 4a19 ldr r2, [pc, #100] @ (8002540 ) 80024da: f043 0304 orr.w r3, r3, #4 80024de: 6193 str r3, [r2, #24] 80024e0: 4b17 ldr r3, [pc, #92] @ (8002540 ) 80024e2: 699b ldr r3, [r3, #24] 80024e4: f003 0304 and.w r3, r3, #4 80024e8: 607b str r3, [r7, #4] 80024ea: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); 80024ec: 4b14 ldr r3, [pc, #80] @ (8002540 ) 80024ee: 699b ldr r3, [r3, #24] 80024f0: 4a13 ldr r2, [pc, #76] @ (8002540 ) 80024f2: f043 0308 orr.w r3, r3, #8 80024f6: 6193 str r3, [r2, #24] 80024f8: 4b11 ldr r3, [pc, #68] @ (8002540 ) 80024fa: 699b ldr r3, [r3, #24] 80024fc: f003 0308 and.w r3, r3, #8 8002500: 603b str r3, [r7, #0] 8002502: 683b ldr r3, [r7, #0] /* Configure PA2-PA5 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; 8002504: 233c movs r3, #60 @ 0x3c 8002506: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8002508: 2300 movs r3, #0 800250a: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; 800250c: 2301 movs r3, #1 800250e: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8002510: f107 0308 add.w r3, r7, #8 8002514: 4619 mov r1, r3 8002516: 480b ldr r0, [pc, #44] @ (8002544 ) 8002518: f000 fe3a bl 8003190 /* Configure PB12-PB15 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15; 800251c: f44f 4370 mov.w r3, #61440 @ 0xf000 8002520: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8002522: 2300 movs r3, #0 8002524: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; 8002526: 2301 movs r3, #1 8002528: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 800252a: f107 0308 add.w r3, r7, #8 800252e: 4619 mov r1, r3 8002530: 4805 ldr r0, [pc, #20] @ (8002548 ) 8002532: f000 fe2d bl 8003190 } 8002536: bf00 nop 8002538: 3718 adds r7, #24 800253a: 46bd mov sp, r7 800253c: bd80 pop {r7, pc} 800253e: bf00 nop 8002540: 40021000 .word 0x40021000 8002544: 40010800 .word 0x40010800 8002548: 40010c00 .word 0x40010c00 0800254c : /** * @brief Configures USART1 for RS-485 communication. */ static void rs485_configure_usart1(void) { 800254c: b580 push {r7, lr} 800254e: b082 sub sp, #8 8002550: af00 add r7, sp, #0 /* Enable clock for USART1 */ __HAL_RCC_USART1_CLK_ENABLE(); 8002552: 4b18 ldr r3, [pc, #96] @ (80025b4 ) 8002554: 699b ldr r3, [r3, #24] 8002556: 4a17 ldr r2, [pc, #92] @ (80025b4 ) 8002558: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800255c: 6193 str r3, [r2, #24] 800255e: 4b15 ldr r3, [pc, #84] @ (80025b4 ) 8002560: 699b ldr r3, [r3, #24] 8002562: f403 4380 and.w r3, r3, #16384 @ 0x4000 8002566: 607b str r3, [r7, #4] 8002568: 687b ldr r3, [r7, #4] huart1.Instance = USART1; 800256a: 4b13 ldr r3, [pc, #76] @ (80025b8 ) 800256c: 4a13 ldr r2, [pc, #76] @ (80025bc ) 800256e: 601a str r2, [r3, #0] huart1.Init.BaudRate = 9600; /*!< Default baud rate for RS-485 */ 8002570: 4b11 ldr r3, [pc, #68] @ (80025b8 ) 8002572: f44f 5216 mov.w r2, #9600 @ 0x2580 8002576: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 8002578: 4b0f ldr r3, [pc, #60] @ (80025b8 ) 800257a: 2200 movs r2, #0 800257c: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 800257e: 4b0e ldr r3, [pc, #56] @ (80025b8 ) 8002580: 2200 movs r2, #0 8002582: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 8002584: 4b0c ldr r3, [pc, #48] @ (80025b8 ) 8002586: 2200 movs r2, #0 8002588: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 800258a: 4b0b ldr r3, [pc, #44] @ (80025b8 ) 800258c: 220c movs r2, #12 800258e: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; /*!< Use NONE as TX enable */ 8002590: 4b09 ldr r3, [pc, #36] @ (80025b8 ) 8002592: 2200 movs r2, #0 8002594: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 8002596: 4b08 ldr r3, [pc, #32] @ (80025b8 ) 8002598: 2200 movs r2, #0 800259a: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 800259c: 4806 ldr r0, [pc, #24] @ (80025b8 ) 800259e: f003 f8b1 bl 8005704 80025a2: 4603 mov r3, r0 80025a4: 2b00 cmp r3, #0 80025a6: d001 beq.n 80025ac { /* Initialization Error */ while(1); 80025a8: bf00 nop 80025aa: e7fd b.n 80025a8 } } 80025ac: bf00 nop 80025ae: 3708 adds r7, #8 80025b0: 46bd mov sp, r7 80025b2: bd80 pop {r7, pc} 80025b4: 40021000 .word 0x40021000 80025b8: 200004dc .word 0x200004dc 80025bc: 40013800 .word 0x40013800 080025c0 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 80025c0: b480 push {r7} 80025c2: b085 sub sp, #20 80025c4: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); 80025c6: 4b15 ldr r3, [pc, #84] @ (800261c ) 80025c8: 699b ldr r3, [r3, #24] 80025ca: 4a14 ldr r2, [pc, #80] @ (800261c ) 80025cc: f043 0301 orr.w r3, r3, #1 80025d0: 6193 str r3, [r2, #24] 80025d2: 4b12 ldr r3, [pc, #72] @ (800261c ) 80025d4: 699b ldr r3, [r3, #24] 80025d6: f003 0301 and.w r3, r3, #1 80025da: 60bb str r3, [r7, #8] 80025dc: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); 80025de: 4b0f ldr r3, [pc, #60] @ (800261c ) 80025e0: 69db ldr r3, [r3, #28] 80025e2: 4a0e ldr r2, [pc, #56] @ (800261c ) 80025e4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80025e8: 61d3 str r3, [r2, #28] 80025ea: 4b0c ldr r3, [pc, #48] @ (800261c ) 80025ec: 69db ldr r3, [r3, #28] 80025ee: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80025f2: 607b str r3, [r7, #4] 80025f4: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); 80025f6: 4b0a ldr r3, [pc, #40] @ (8002620 ) 80025f8: 685b ldr r3, [r3, #4] 80025fa: 60fb str r3, [r7, #12] 80025fc: 68fb ldr r3, [r7, #12] 80025fe: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 8002602: 60fb str r3, [r7, #12] 8002604: 68fb ldr r3, [r7, #12] 8002606: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 800260a: 60fb str r3, [r7, #12] 800260c: 4a04 ldr r2, [pc, #16] @ (8002620 ) 800260e: 68fb ldr r3, [r7, #12] 8002610: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8002612: bf00 nop 8002614: 3714 adds r7, #20 8002616: 46bd mov sp, r7 8002618: bc80 pop {r7} 800261a: 4770 bx lr 800261c: 40021000 .word 0x40021000 8002620: 40010000 .word 0x40010000 08002624 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8002624: b480 push {r7} 8002626: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8002628: bf00 nop 800262a: e7fd b.n 8002628 0800262c : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 800262c: b480 push {r7} 800262e: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8002630: bf00 nop 8002632: e7fd b.n 8002630 08002634 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8002634: b480 push {r7} 8002636: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8002638: bf00 nop 800263a: e7fd b.n 8002638 0800263c : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 800263c: b480 push {r7} 800263e: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8002640: bf00 nop 8002642: e7fd b.n 8002640 08002644 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8002644: b480 push {r7} 8002646: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8002648: bf00 nop 800264a: e7fd b.n 8002648 0800264c : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 800264c: b480 push {r7} 800264e: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 8002650: bf00 nop 8002652: 46bd mov sp, r7 8002654: bc80 pop {r7} 8002656: 4770 bx lr 08002658 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8002658: b480 push {r7} 800265a: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 800265c: bf00 nop 800265e: 46bd mov sp, r7 8002660: bc80 pop {r7} 8002662: 4770 bx lr 08002664 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8002664: b480 push {r7} 8002666: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8002668: bf00 nop 800266a: 46bd mov sp, r7 800266c: bc80 pop {r7} 800266e: 4770 bx lr 08002670 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8002670: b580 push {r7, lr} 8002672: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8002674: f000 f97a bl 800296c /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 8002678: bf00 nop 800267a: bd80 pop {r7, pc} 0800267c : /** * @brief This function handles TIM3 global interrupt. */ void TIM3_IRQHandler(void) { 800267c: b580 push {r7, lr} 800267e: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_IRQn 0 */ /* USER CODE END TIM3_IRQn 0 */ HAL_TIM_IRQHandler(&htim3); 8002680: 4802 ldr r0, [pc, #8] @ (800268c ) 8002682: f002 fcef bl 8005064 /* USER CODE BEGIN TIM3_IRQn 1 */ /* USER CODE END TIM3_IRQn 1 */ } 8002686: bf00 nop 8002688: bd80 pop {r7, pc} 800268a: bf00 nop 800268c: 20000524 .word 0x20000524 08002690 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { 8002690: b580 push {r7, lr} 8002692: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8002694: 4802 ldr r0, [pc, #8] @ (80026a0 ) 8002696: f003 f911 bl 80058bc /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } 800269a: bf00 nop 800269c: bd80 pop {r7, pc} 800269e: bf00 nop 80026a0: 2000056c .word 0x2000056c 080026a4 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { 80026a4: b480 push {r7} 80026a6: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } 80026a8: bf00 nop 80026aa: 46bd mov sp, r7 80026ac: bc80 pop {r7} 80026ae: 4770 bx lr 080026b0 : TIM_HandleTypeDef htim3; /* TIM3 init function */ void MX_TIM3_Init(void) { 80026b0: b580 push {r7, lr} 80026b2: b086 sub sp, #24 80026b4: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_Init 0 */ /* USER CODE END TIM3_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 80026b6: f107 0308 add.w r3, r7, #8 80026ba: 2200 movs r2, #0 80026bc: 601a str r2, [r3, #0] 80026be: 605a str r2, [r3, #4] 80026c0: 609a str r2, [r3, #8] 80026c2: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 80026c4: 463b mov r3, r7 80026c6: 2200 movs r2, #0 80026c8: 601a str r2, [r3, #0] 80026ca: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM3_Init 1 */ /* USER CODE END TIM3_Init 1 */ htim3.Instance = TIM3; 80026cc: 4b1d ldr r3, [pc, #116] @ (8002744 ) 80026ce: 4a1e ldr r2, [pc, #120] @ (8002748 ) 80026d0: 601a str r2, [r3, #0] htim3.Init.Prescaler = 2; 80026d2: 4b1c ldr r3, [pc, #112] @ (8002744 ) 80026d4: 2202 movs r2, #2 80026d6: 605a str r2, [r3, #4] htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 80026d8: 4b1a ldr r3, [pc, #104] @ (8002744 ) 80026da: 2200 movs r2, #0 80026dc: 609a str r2, [r3, #8] htim3.Init.Period = 999; 80026de: 4b19 ldr r3, [pc, #100] @ (8002744 ) 80026e0: f240 32e7 movw r2, #999 @ 0x3e7 80026e4: 60da str r2, [r3, #12] htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 80026e6: 4b17 ldr r3, [pc, #92] @ (8002744 ) 80026e8: 2200 movs r2, #0 80026ea: 611a str r2, [r3, #16] htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; 80026ec: 4b15 ldr r3, [pc, #84] @ (8002744 ) 80026ee: 2280 movs r2, #128 @ 0x80 80026f0: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim3) != HAL_OK) 80026f2: 4814 ldr r0, [pc, #80] @ (8002744 ) 80026f4: f002 fc14 bl 8004f20 80026f8: 4603 mov r3, r0 80026fa: 2b00 cmp r3, #0 80026fc: d001 beq.n 8002702 { Error_Handler(); 80026fe: f7ff fe65 bl 80023cc } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 8002702: f44f 5380 mov.w r3, #4096 @ 0x1000 8002706: 60bb str r3, [r7, #8] if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) 8002708: f107 0308 add.w r3, r7, #8 800270c: 4619 mov r1, r3 800270e: 480d ldr r0, [pc, #52] @ (8002744 ) 8002710: f002 fd98 bl 8005244 8002714: 4603 mov r3, r0 8002716: 2b00 cmp r3, #0 8002718: d001 beq.n 800271e { Error_Handler(); 800271a: f7ff fe57 bl 80023cc } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 800271e: 2300 movs r3, #0 8002720: 603b str r3, [r7, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8002722: 2300 movs r3, #0 8002724: 607b str r3, [r7, #4] if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 8002726: 463b mov r3, r7 8002728: 4619 mov r1, r3 800272a: 4806 ldr r0, [pc, #24] @ (8002744 ) 800272c: f002 ff7a bl 8005624 8002730: 4603 mov r3, r0 8002732: 2b00 cmp r3, #0 8002734: d001 beq.n 800273a { Error_Handler(); 8002736: f7ff fe49 bl 80023cc } /* USER CODE BEGIN TIM3_Init 2 */ /* USER CODE END TIM3_Init 2 */ } 800273a: bf00 nop 800273c: 3718 adds r7, #24 800273e: 46bd mov sp, r7 8002740: bd80 pop {r7, pc} 8002742: bf00 nop 8002744: 20000524 .word 0x20000524 8002748: 40000400 .word 0x40000400 0800274c : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { 800274c: b580 push {r7, lr} 800274e: b084 sub sp, #16 8002750: af00 add r7, sp, #0 8002752: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM3) 8002754: 687b ldr r3, [r7, #4] 8002756: 681b ldr r3, [r3, #0] 8002758: 4a0d ldr r2, [pc, #52] @ (8002790 ) 800275a: 4293 cmp r3, r2 800275c: d113 bne.n 8002786 { /* USER CODE BEGIN TIM3_MspInit 0 */ /* USER CODE END TIM3_MspInit 0 */ /* TIM3 clock enable */ __HAL_RCC_TIM3_CLK_ENABLE(); 800275e: 4b0d ldr r3, [pc, #52] @ (8002794 ) 8002760: 69db ldr r3, [r3, #28] 8002762: 4a0c ldr r2, [pc, #48] @ (8002794 ) 8002764: f043 0302 orr.w r3, r3, #2 8002768: 61d3 str r3, [r2, #28] 800276a: 4b0a ldr r3, [pc, #40] @ (8002794 ) 800276c: 69db ldr r3, [r3, #28] 800276e: f003 0302 and.w r3, r3, #2 8002772: 60fb str r3, [r7, #12] 8002774: 68fb ldr r3, [r7, #12] /* TIM3 interrupt Init */ HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0); 8002776: 2200 movs r2, #0 8002778: 2100 movs r1, #0 800277a: 201d movs r0, #29 800277c: f000 fc1f bl 8002fbe HAL_NVIC_EnableIRQ(TIM3_IRQn); 8002780: 201d movs r0, #29 8002782: f000 fc38 bl 8002ff6 /* USER CODE BEGIN TIM3_MspInit 1 */ /* USER CODE END TIM3_MspInit 1 */ } } 8002786: bf00 nop 8002788: 3710 adds r7, #16 800278a: 46bd mov sp, r7 800278c: bd80 pop {r7, pc} 800278e: bf00 nop 8002790: 40000400 .word 0x40000400 8002794: 40021000 .word 0x40021000 08002798 : UART_HandleTypeDef huart1; /* USART1 init function */ void MX_USART1_UART_Init(void) { 8002798: b580 push {r7, lr} 800279a: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 800279c: 4b11 ldr r3, [pc, #68] @ (80027e4 ) 800279e: 4a12 ldr r2, [pc, #72] @ (80027e8 ) 80027a0: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 80027a2: 4b10 ldr r3, [pc, #64] @ (80027e4 ) 80027a4: f44f 32e1 mov.w r2, #115200 @ 0x1c200 80027a8: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 80027aa: 4b0e ldr r3, [pc, #56] @ (80027e4 ) 80027ac: 2200 movs r2, #0 80027ae: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 80027b0: 4b0c ldr r3, [pc, #48] @ (80027e4 ) 80027b2: 2200 movs r2, #0 80027b4: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 80027b6: 4b0b ldr r3, [pc, #44] @ (80027e4 ) 80027b8: 2200 movs r2, #0 80027ba: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 80027bc: 4b09 ldr r3, [pc, #36] @ (80027e4 ) 80027be: 220c movs r2, #12 80027c0: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 80027c2: 4b08 ldr r3, [pc, #32] @ (80027e4 ) 80027c4: 2200 movs r2, #0 80027c6: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 80027c8: 4b06 ldr r3, [pc, #24] @ (80027e4 ) 80027ca: 2200 movs r2, #0 80027cc: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 80027ce: 4805 ldr r0, [pc, #20] @ (80027e4 ) 80027d0: f002 ff98 bl 8005704 80027d4: 4603 mov r3, r0 80027d6: 2b00 cmp r3, #0 80027d8: d001 beq.n 80027de { Error_Handler(); 80027da: f7ff fdf7 bl 80023cc } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 80027de: bf00 nop 80027e0: bd80 pop {r7, pc} 80027e2: bf00 nop 80027e4: 2000056c .word 0x2000056c 80027e8: 40013800 .word 0x40013800 080027ec : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { 80027ec: b580 push {r7, lr} 80027ee: b088 sub sp, #32 80027f0: af00 add r7, sp, #0 80027f2: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 80027f4: f107 0310 add.w r3, r7, #16 80027f8: 2200 movs r2, #0 80027fa: 601a str r2, [r3, #0] 80027fc: 605a str r2, [r3, #4] 80027fe: 609a str r2, [r3, #8] 8002800: 60da str r2, [r3, #12] if(uartHandle->Instance==USART1) 8002802: 687b ldr r3, [r7, #4] 8002804: 681b ldr r3, [r3, #0] 8002806: 4a20 ldr r2, [pc, #128] @ (8002888 ) 8002808: 4293 cmp r3, r2 800280a: d139 bne.n 8002880 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* USART1 clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); 800280c: 4b1f ldr r3, [pc, #124] @ (800288c ) 800280e: 699b ldr r3, [r3, #24] 8002810: 4a1e ldr r2, [pc, #120] @ (800288c ) 8002812: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8002816: 6193 str r3, [r2, #24] 8002818: 4b1c ldr r3, [pc, #112] @ (800288c ) 800281a: 699b ldr r3, [r3, #24] 800281c: f403 4380 and.w r3, r3, #16384 @ 0x4000 8002820: 60fb str r3, [r7, #12] 8002822: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8002824: 4b19 ldr r3, [pc, #100] @ (800288c ) 8002826: 699b ldr r3, [r3, #24] 8002828: 4a18 ldr r2, [pc, #96] @ (800288c ) 800282a: f043 0304 orr.w r3, r3, #4 800282e: 6193 str r3, [r2, #24] 8002830: 4b16 ldr r3, [pc, #88] @ (800288c ) 8002832: 699b ldr r3, [r3, #24] 8002834: f003 0304 and.w r3, r3, #4 8002838: 60bb str r3, [r7, #8] 800283a: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = TX_RS485_Pin; 800283c: f44f 7300 mov.w r3, #512 @ 0x200 8002840: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8002842: 2302 movs r3, #2 8002844: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; 8002846: 2301 movs r3, #1 8002848: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_RS485_GPIO_Port, &GPIO_InitStruct); 800284a: f107 0310 add.w r3, r7, #16 800284e: 4619 mov r1, r3 8002850: 480f ldr r0, [pc, #60] @ (8002890 ) 8002852: f000 fc9d bl 8003190 GPIO_InitStruct.Pin = RX_RS485_Pin; 8002856: f44f 6380 mov.w r3, #1024 @ 0x400 800285a: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 800285c: 2300 movs r3, #0 800285e: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; 8002860: 2300 movs r3, #0 8002862: 61bb str r3, [r7, #24] HAL_GPIO_Init(RX_RS485_GPIO_Port, &GPIO_InitStruct); 8002864: f107 0310 add.w r3, r7, #16 8002868: 4619 mov r1, r3 800286a: 4809 ldr r0, [pc, #36] @ (8002890 ) 800286c: f000 fc90 bl 8003190 /* USART1 interrupt Init */ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8002870: 2200 movs r2, #0 8002872: 2100 movs r1, #0 8002874: 2025 movs r0, #37 @ 0x25 8002876: f000 fba2 bl 8002fbe HAL_NVIC_EnableIRQ(USART1_IRQn); 800287a: 2025 movs r0, #37 @ 0x25 800287c: f000 fbbb bl 8002ff6 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } 8002880: bf00 nop 8002882: 3720 adds r7, #32 8002884: 46bd mov sp, r7 8002886: bd80 pop {r7, pc} 8002888: 40013800 .word 0x40013800 800288c: 40021000 .word 0x40021000 8002890: 40010800 .word 0x40010800 08002894 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit 8002894: f7ff ff06 bl 80026a4 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8002898: 480b ldr r0, [pc, #44] @ (80028c8 ) ldr r1, =_edata 800289a: 490c ldr r1, [pc, #48] @ (80028cc ) ldr r2, =_sidata 800289c: 4a0c ldr r2, [pc, #48] @ (80028d0 ) movs r3, #0 800289e: 2300 movs r3, #0 b LoopCopyDataInit 80028a0: e002 b.n 80028a8 080028a2 : CopyDataInit: ldr r4, [r2, r3] 80028a2: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 80028a4: 50c4 str r4, [r0, r3] adds r3, r3, #4 80028a6: 3304 adds r3, #4 080028a8 : LoopCopyDataInit: adds r4, r0, r3 80028a8: 18c4 adds r4, r0, r3 cmp r4, r1 80028aa: 428c cmp r4, r1 bcc CopyDataInit 80028ac: d3f9 bcc.n 80028a2 /* Zero fill the bss segment. */ ldr r2, =_sbss 80028ae: 4a09 ldr r2, [pc, #36] @ (80028d4 ) ldr r4, =_ebss 80028b0: 4c09 ldr r4, [pc, #36] @ (80028d8 ) movs r3, #0 80028b2: 2300 movs r3, #0 b LoopFillZerobss 80028b4: e001 b.n 80028ba 080028b6 : FillZerobss: str r3, [r2] 80028b6: 6013 str r3, [r2, #0] adds r2, r2, #4 80028b8: 3204 adds r2, #4 080028ba : LoopFillZerobss: cmp r2, r4 80028ba: 42a2 cmp r2, r4 bcc FillZerobss 80028bc: d3fb bcc.n 80028b6 /* Call static constructors */ bl __libc_init_array 80028be: f003 fd45 bl 800634c <__libc_init_array> /* Call the application's entry point.*/ bl main 80028c2: f7ff faff bl 8001ec4

bx lr 80028c6: 4770 bx lr ldr r0, =_sdata 80028c8: 20000000 .word 0x20000000 ldr r1, =_edata 80028cc: 20000060 .word 0x20000060 ldr r2, =_sidata 80028d0: 08006660 .word 0x08006660 ldr r2, =_sbss 80028d4: 20000060 .word 0x20000060 ldr r4, =_ebss 80028d8: 200006f0 .word 0x200006f0 080028dc : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 80028dc: e7fe b.n 80028dc ... 080028e0 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 80028e0: b580 push {r7, lr} 80028e2: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 80028e4: 4b08 ldr r3, [pc, #32] @ (8002908 ) 80028e6: 681b ldr r3, [r3, #0] 80028e8: 4a07 ldr r2, [pc, #28] @ (8002908 ) 80028ea: f043 0310 orr.w r3, r3, #16 80028ee: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 80028f0: 2003 movs r0, #3 80028f2: f000 fb59 bl 8002fa8 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 80028f6: 200f movs r0, #15 80028f8: f000 f808 bl 800290c /* Init the low level hardware */ HAL_MspInit(); 80028fc: f7ff fe60 bl 80025c0 /* Return function status */ return HAL_OK; 8002900: 2300 movs r3, #0 } 8002902: 4618 mov r0, r3 8002904: bd80 pop {r7, pc} 8002906: bf00 nop 8002908: 40022000 .word 0x40022000 0800290c : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 800290c: b580 push {r7, lr} 800290e: b082 sub sp, #8 8002910: af00 add r7, sp, #0 8002912: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8002914: 4b12 ldr r3, [pc, #72] @ (8002960 ) 8002916: 681a ldr r2, [r3, #0] 8002918: 4b12 ldr r3, [pc, #72] @ (8002964 ) 800291a: 781b ldrb r3, [r3, #0] 800291c: 4619 mov r1, r3 800291e: f44f 737a mov.w r3, #1000 @ 0x3e8 8002922: fbb3 f3f1 udiv r3, r3, r1 8002926: fbb2 f3f3 udiv r3, r2, r3 800292a: 4618 mov r0, r3 800292c: f000 fb71 bl 8003012 8002930: 4603 mov r3, r0 8002932: 2b00 cmp r3, #0 8002934: d001 beq.n 800293a { return HAL_ERROR; 8002936: 2301 movs r3, #1 8002938: e00e b.n 8002958 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800293a: 687b ldr r3, [r7, #4] 800293c: 2b0f cmp r3, #15 800293e: d80a bhi.n 8002956 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8002940: 2200 movs r2, #0 8002942: 6879 ldr r1, [r7, #4] 8002944: f04f 30ff mov.w r0, #4294967295 8002948: f000 fb39 bl 8002fbe uwTickPrio = TickPriority; 800294c: 4a06 ldr r2, [pc, #24] @ (8002968 ) 800294e: 687b ldr r3, [r7, #4] 8002950: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 8002952: 2300 movs r3, #0 8002954: e000 b.n 8002958 return HAL_ERROR; 8002956: 2301 movs r3, #1 } 8002958: 4618 mov r0, r3 800295a: 3708 adds r7, #8 800295c: 46bd mov sp, r7 800295e: bd80 pop {r7, pc} 8002960: 20000004 .word 0x20000004 8002964: 2000000c .word 0x2000000c 8002968: 20000008 .word 0x20000008 0800296c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 800296c: b480 push {r7} 800296e: af00 add r7, sp, #0 uwTick += uwTickFreq; 8002970: 4b05 ldr r3, [pc, #20] @ (8002988 ) 8002972: 781b ldrb r3, [r3, #0] 8002974: 461a mov r2, r3 8002976: 4b05 ldr r3, [pc, #20] @ (800298c ) 8002978: 681b ldr r3, [r3, #0] 800297a: 4413 add r3, r2 800297c: 4a03 ldr r2, [pc, #12] @ (800298c ) 800297e: 6013 str r3, [r2, #0] } 8002980: bf00 nop 8002982: 46bd mov sp, r7 8002984: bc80 pop {r7} 8002986: 4770 bx lr 8002988: 2000000c .word 0x2000000c 800298c: 200005b4 .word 0x200005b4 08002990 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8002990: b480 push {r7} 8002992: af00 add r7, sp, #0 return uwTick; 8002994: 4b02 ldr r3, [pc, #8] @ (80029a0 ) 8002996: 681b ldr r3, [r3, #0] } 8002998: 4618 mov r0, r3 800299a: 46bd mov sp, r7 800299c: bc80 pop {r7} 800299e: 4770 bx lr 80029a0: 200005b4 .word 0x200005b4 080029a4 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80029a4: b580 push {r7, lr} 80029a6: b084 sub sp, #16 80029a8: af00 add r7, sp, #0 80029aa: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 80029ac: f7ff fff0 bl 8002990 80029b0: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 80029b2: 687b ldr r3, [r7, #4] 80029b4: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80029b6: 68fb ldr r3, [r7, #12] 80029b8: f1b3 3fff cmp.w r3, #4294967295 80029bc: d005 beq.n 80029ca { wait += (uint32_t)(uwTickFreq); 80029be: 4b0a ldr r3, [pc, #40] @ (80029e8 ) 80029c0: 781b ldrb r3, [r3, #0] 80029c2: 461a mov r2, r3 80029c4: 68fb ldr r3, [r7, #12] 80029c6: 4413 add r3, r2 80029c8: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 80029ca: bf00 nop 80029cc: f7ff ffe0 bl 8002990 80029d0: 4602 mov r2, r0 80029d2: 68bb ldr r3, [r7, #8] 80029d4: 1ad3 subs r3, r2, r3 80029d6: 68fa ldr r2, [r7, #12] 80029d8: 429a cmp r2, r3 80029da: d8f7 bhi.n 80029cc { } } 80029dc: bf00 nop 80029de: bf00 nop 80029e0: 3710 adds r7, #16 80029e2: 46bd mov sp, r7 80029e4: bd80 pop {r7, pc} 80029e6: bf00 nop 80029e8: 2000000c .word 0x2000000c 080029ec : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { 80029ec: b580 push {r7, lr} 80029ee: b086 sub sp, #24 80029f0: af00 add r7, sp, #0 80029f2: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 80029f4: 2300 movs r3, #0 80029f6: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; 80029f8: 2300 movs r3, #0 80029fa: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; 80029fc: 2300 movs r3, #0 80029fe: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; 8002a00: 2300 movs r3, #0 8002a02: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) 8002a04: 687b ldr r3, [r7, #4] 8002a06: 2b00 cmp r3, #0 8002a08: d101 bne.n 8002a0e { return HAL_ERROR; 8002a0a: 2301 movs r3, #1 8002a0c: e0be b.n 8002b8c assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) 8002a0e: 687b ldr r3, [r7, #4] 8002a10: 689b ldr r3, [r3, #8] 8002a12: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) 8002a14: 687b ldr r3, [r7, #4] 8002a16: 6a9b ldr r3, [r3, #40] @ 0x28 8002a18: 2b00 cmp r3, #0 8002a1a: d109 bne.n 8002a30 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); 8002a1c: 687b ldr r3, [r7, #4] 8002a1e: 2200 movs r2, #0 8002a20: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; 8002a22: 687b ldr r3, [r7, #4] 8002a24: 2200 movs r2, #0 8002a26: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); 8002a2a: 6878 ldr r0, [r7, #4] 8002a2c: f7fe fd48 bl 80014c0 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); 8002a30: 6878 ldr r0, [r7, #4] 8002a32: f000 f9ab bl 8002d8c 8002a36: 4603 mov r3, r0 8002a38: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && 8002a3a: 687b ldr r3, [r7, #4] 8002a3c: 6a9b ldr r3, [r3, #40] @ 0x28 8002a3e: f003 0310 and.w r3, r3, #16 8002a42: 2b00 cmp r3, #0 8002a44: f040 8099 bne.w 8002b7a 8002a48: 7dfb ldrb r3, [r7, #23] 8002a4a: 2b00 cmp r3, #0 8002a4c: f040 8095 bne.w 8002b7a (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, 8002a50: 687b ldr r3, [r7, #4] 8002a52: 6a9b ldr r3, [r3, #40] @ 0x28 8002a54: f423 5388 bic.w r3, r3, #4352 @ 0x1100 8002a58: f023 0302 bic.w r3, r3, #2 8002a5c: f043 0202 orr.w r2, r3, #2 8002a60: 687b ldr r3, [r7, #4] 8002a62: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | 8002a64: 687b ldr r3, [r7, #4] 8002a66: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8002a68: 687b ldr r3, [r7, #4] 8002a6a: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | 8002a6c: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); 8002a6e: 687b ldr r3, [r7, #4] 8002a70: 7b1b ldrb r3, [r3, #12] 8002a72: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | 8002a74: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | 8002a76: 68ba ldr r2, [r7, #8] 8002a78: 4313 orrs r3, r2 8002a7a: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); 8002a7c: 687b ldr r3, [r7, #4] 8002a7e: 689b ldr r3, [r3, #8] 8002a80: f5b3 7f80 cmp.w r3, #256 @ 0x100 8002a84: d003 beq.n 8002a8e 8002a86: 687b ldr r3, [r7, #4] 8002a88: 689b ldr r3, [r3, #8] 8002a8a: 2b01 cmp r3, #1 8002a8c: d102 bne.n 8002a94 8002a8e: f44f 7380 mov.w r3, #256 @ 0x100 8002a92: e000 b.n 8002a96 8002a94: 2300 movs r3, #0 8002a96: 693a ldr r2, [r7, #16] 8002a98: 4313 orrs r3, r2 8002a9a: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) 8002a9c: 687b ldr r3, [r7, #4] 8002a9e: 7d1b ldrb r3, [r3, #20] 8002aa0: 2b01 cmp r3, #1 8002aa2: d119 bne.n 8002ad8 { if (hadc->Init.ContinuousConvMode == DISABLE) 8002aa4: 687b ldr r3, [r7, #4] 8002aa6: 7b1b ldrb r3, [r3, #12] 8002aa8: 2b00 cmp r3, #0 8002aaa: d109 bne.n 8002ac0 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | 8002aac: 687b ldr r3, [r7, #4] 8002aae: 699b ldr r3, [r3, #24] 8002ab0: 3b01 subs r3, #1 8002ab2: 035a lsls r2, r3, #13 8002ab4: 693b ldr r3, [r7, #16] 8002ab6: 4313 orrs r3, r2 8002ab8: f443 6300 orr.w r3, r3, #2048 @ 0x800 8002abc: 613b str r3, [r7, #16] 8002abe: e00b b.n 8002ad8 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8002ac0: 687b ldr r3, [r7, #4] 8002ac2: 6a9b ldr r3, [r3, #40] @ 0x28 8002ac4: f043 0220 orr.w r2, r3, #32 8002ac8: 687b ldr r3, [r7, #4] 8002aca: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8002acc: 687b ldr r3, [r7, #4] 8002ace: 6adb ldr r3, [r3, #44] @ 0x2c 8002ad0: f043 0201 orr.w r2, r3, #1 8002ad4: 687b ldr r3, [r7, #4] 8002ad6: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, 8002ad8: 687b ldr r3, [r7, #4] 8002ada: 681b ldr r3, [r3, #0] 8002adc: 685b ldr r3, [r3, #4] 8002ade: f423 4169 bic.w r1, r3, #59648 @ 0xe900 8002ae2: 687b ldr r3, [r7, #4] 8002ae4: 681b ldr r3, [r3, #0] 8002ae6: 693a ldr r2, [r7, #16] 8002ae8: 430a orrs r2, r1 8002aea: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, 8002aec: 687b ldr r3, [r7, #4] 8002aee: 681b ldr r3, [r3, #0] 8002af0: 689a ldr r2, [r3, #8] 8002af2: 4b28 ldr r3, [pc, #160] @ (8002b94 ) 8002af4: 4013 ands r3, r2 8002af6: 687a ldr r2, [r7, #4] 8002af8: 6812 ldr r2, [r2, #0] 8002afa: 68b9 ldr r1, [r7, #8] 8002afc: 430b orrs r3, r1 8002afe: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) 8002b00: 687b ldr r3, [r7, #4] 8002b02: 689b ldr r3, [r3, #8] 8002b04: f5b3 7f80 cmp.w r3, #256 @ 0x100 8002b08: d003 beq.n 8002b12 8002b0a: 687b ldr r3, [r7, #4] 8002b0c: 689b ldr r3, [r3, #8] 8002b0e: 2b01 cmp r3, #1 8002b10: d104 bne.n 8002b1c { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); 8002b12: 687b ldr r3, [r7, #4] 8002b14: 691b ldr r3, [r3, #16] 8002b16: 3b01 subs r3, #1 8002b18: 051b lsls r3, r3, #20 8002b1a: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, 8002b1c: 687b ldr r3, [r7, #4] 8002b1e: 681b ldr r3, [r3, #0] 8002b20: 6adb ldr r3, [r3, #44] @ 0x2c 8002b22: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 8002b26: 687b ldr r3, [r7, #4] 8002b28: 681b ldr r3, [r3, #0] 8002b2a: 68fa ldr r2, [r7, #12] 8002b2c: 430a orrs r2, r1 8002b2e: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8002b30: 687b ldr r3, [r7, #4] 8002b32: 681b ldr r3, [r3, #0] 8002b34: 689a ldr r2, [r3, #8] 8002b36: 4b18 ldr r3, [pc, #96] @ (8002b98 ) 8002b38: 4013 ands r3, r2 8002b3a: 68ba ldr r2, [r7, #8] 8002b3c: 429a cmp r2, r3 8002b3e: d10b bne.n 8002b58 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); 8002b40: 687b ldr r3, [r7, #4] 8002b42: 2200 movs r2, #0 8002b44: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, 8002b46: 687b ldr r3, [r7, #4] 8002b48: 6a9b ldr r3, [r3, #40] @ 0x28 8002b4a: f023 0303 bic.w r3, r3, #3 8002b4e: f043 0201 orr.w r2, r3, #1 8002b52: 687b ldr r3, [r7, #4] 8002b54: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8002b56: e018 b.n 8002b8a HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, 8002b58: 687b ldr r3, [r7, #4] 8002b5a: 6a9b ldr r3, [r3, #40] @ 0x28 8002b5c: f023 0312 bic.w r3, r3, #18 8002b60: f043 0210 orr.w r2, r3, #16 8002b64: 687b ldr r3, [r7, #4] 8002b66: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8002b68: 687b ldr r3, [r7, #4] 8002b6a: 6adb ldr r3, [r3, #44] @ 0x2c 8002b6c: f043 0201 orr.w r2, r3, #1 8002b70: 687b ldr r3, [r7, #4] 8002b72: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; 8002b74: 2301 movs r3, #1 8002b76: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | 8002b78: e007 b.n 8002b8a } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8002b7a: 687b ldr r3, [r7, #4] 8002b7c: 6a9b ldr r3, [r3, #40] @ 0x28 8002b7e: f043 0210 orr.w r2, r3, #16 8002b82: 687b ldr r3, [r7, #4] 8002b84: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 8002b86: 2301 movs r3, #1 8002b88: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; 8002b8a: 7dfb ldrb r3, [r7, #23] } 8002b8c: 4618 mov r0, r3 8002b8e: 3718 adds r7, #24 8002b90: 46bd mov sp, r7 8002b92: bd80 pop {r7, pc} 8002b94: ffe1f7fd .word 0xffe1f7fd 8002b98: ff1f0efe .word 0xff1f0efe 08002b9c : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { 8002b9c: b480 push {r7} 8002b9e: b085 sub sp, #20 8002ba0: af00 add r7, sp, #0 8002ba2: 6078 str r0, [r7, #4] 8002ba4: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; 8002ba6: 2300 movs r3, #0 8002ba8: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; 8002baa: 2300 movs r3, #0 8002bac: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); 8002bae: 687b ldr r3, [r7, #4] 8002bb0: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 8002bb4: 2b01 cmp r3, #1 8002bb6: d101 bne.n 8002bbc 8002bb8: 2302 movs r3, #2 8002bba: e0dc b.n 8002d76 8002bbc: 687b ldr r3, [r7, #4] 8002bbe: 2201 movs r2, #1 8002bc0: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) 8002bc4: 683b ldr r3, [r7, #0] 8002bc6: 685b ldr r3, [r3, #4] 8002bc8: 2b06 cmp r3, #6 8002bca: d81c bhi.n 8002c06 { MODIFY_REG(hadc->Instance->SQR3 , 8002bcc: 687b ldr r3, [r7, #4] 8002bce: 681b ldr r3, [r3, #0] 8002bd0: 6b59 ldr r1, [r3, #52] @ 0x34 8002bd2: 683b ldr r3, [r7, #0] 8002bd4: 685a ldr r2, [r3, #4] 8002bd6: 4613 mov r3, r2 8002bd8: 009b lsls r3, r3, #2 8002bda: 4413 add r3, r2 8002bdc: 3b05 subs r3, #5 8002bde: 221f movs r2, #31 8002be0: fa02 f303 lsl.w r3, r2, r3 8002be4: 43db mvns r3, r3 8002be6: 4019 ands r1, r3 8002be8: 683b ldr r3, [r7, #0] 8002bea: 6818 ldr r0, [r3, #0] 8002bec: 683b ldr r3, [r7, #0] 8002bee: 685a ldr r2, [r3, #4] 8002bf0: 4613 mov r3, r2 8002bf2: 009b lsls r3, r3, #2 8002bf4: 4413 add r3, r2 8002bf6: 3b05 subs r3, #5 8002bf8: fa00 f203 lsl.w r2, r0, r3 8002bfc: 687b ldr r3, [r7, #4] 8002bfe: 681b ldr r3, [r3, #0] 8002c00: 430a orrs r2, r1 8002c02: 635a str r2, [r3, #52] @ 0x34 8002c04: e03c b.n 8002c80 ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) 8002c06: 683b ldr r3, [r7, #0] 8002c08: 685b ldr r3, [r3, #4] 8002c0a: 2b0c cmp r3, #12 8002c0c: d81c bhi.n 8002c48 { MODIFY_REG(hadc->Instance->SQR2 , 8002c0e: 687b ldr r3, [r7, #4] 8002c10: 681b ldr r3, [r3, #0] 8002c12: 6b19 ldr r1, [r3, #48] @ 0x30 8002c14: 683b ldr r3, [r7, #0] 8002c16: 685a ldr r2, [r3, #4] 8002c18: 4613 mov r3, r2 8002c1a: 009b lsls r3, r3, #2 8002c1c: 4413 add r3, r2 8002c1e: 3b23 subs r3, #35 @ 0x23 8002c20: 221f movs r2, #31 8002c22: fa02 f303 lsl.w r3, r2, r3 8002c26: 43db mvns r3, r3 8002c28: 4019 ands r1, r3 8002c2a: 683b ldr r3, [r7, #0] 8002c2c: 6818 ldr r0, [r3, #0] 8002c2e: 683b ldr r3, [r7, #0] 8002c30: 685a ldr r2, [r3, #4] 8002c32: 4613 mov r3, r2 8002c34: 009b lsls r3, r3, #2 8002c36: 4413 add r3, r2 8002c38: 3b23 subs r3, #35 @ 0x23 8002c3a: fa00 f203 lsl.w r2, r0, r3 8002c3e: 687b ldr r3, [r7, #4] 8002c40: 681b ldr r3, [r3, #0] 8002c42: 430a orrs r2, r1 8002c44: 631a str r2, [r3, #48] @ 0x30 8002c46: e01b b.n 8002c80 ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , 8002c48: 687b ldr r3, [r7, #4] 8002c4a: 681b ldr r3, [r3, #0] 8002c4c: 6ad9 ldr r1, [r3, #44] @ 0x2c 8002c4e: 683b ldr r3, [r7, #0] 8002c50: 685a ldr r2, [r3, #4] 8002c52: 4613 mov r3, r2 8002c54: 009b lsls r3, r3, #2 8002c56: 4413 add r3, r2 8002c58: 3b41 subs r3, #65 @ 0x41 8002c5a: 221f movs r2, #31 8002c5c: fa02 f303 lsl.w r3, r2, r3 8002c60: 43db mvns r3, r3 8002c62: 4019 ands r1, r3 8002c64: 683b ldr r3, [r7, #0] 8002c66: 6818 ldr r0, [r3, #0] 8002c68: 683b ldr r3, [r7, #0] 8002c6a: 685a ldr r2, [r3, #4] 8002c6c: 4613 mov r3, r2 8002c6e: 009b lsls r3, r3, #2 8002c70: 4413 add r3, r2 8002c72: 3b41 subs r3, #65 @ 0x41 8002c74: fa00 f203 lsl.w r2, r0, r3 8002c78: 687b ldr r3, [r7, #4] 8002c7a: 681b ldr r3, [r3, #0] 8002c7c: 430a orrs r2, r1 8002c7e: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) 8002c80: 683b ldr r3, [r7, #0] 8002c82: 681b ldr r3, [r3, #0] 8002c84: 2b09 cmp r3, #9 8002c86: d91c bls.n 8002cc2 { MODIFY_REG(hadc->Instance->SMPR1 , 8002c88: 687b ldr r3, [r7, #4] 8002c8a: 681b ldr r3, [r3, #0] 8002c8c: 68d9 ldr r1, [r3, #12] 8002c8e: 683b ldr r3, [r7, #0] 8002c90: 681a ldr r2, [r3, #0] 8002c92: 4613 mov r3, r2 8002c94: 005b lsls r3, r3, #1 8002c96: 4413 add r3, r2 8002c98: 3b1e subs r3, #30 8002c9a: 2207 movs r2, #7 8002c9c: fa02 f303 lsl.w r3, r2, r3 8002ca0: 43db mvns r3, r3 8002ca2: 4019 ands r1, r3 8002ca4: 683b ldr r3, [r7, #0] 8002ca6: 6898 ldr r0, [r3, #8] 8002ca8: 683b ldr r3, [r7, #0] 8002caa: 681a ldr r2, [r3, #0] 8002cac: 4613 mov r3, r2 8002cae: 005b lsls r3, r3, #1 8002cb0: 4413 add r3, r2 8002cb2: 3b1e subs r3, #30 8002cb4: fa00 f203 lsl.w r2, r0, r3 8002cb8: 687b ldr r3, [r7, #4] 8002cba: 681b ldr r3, [r3, #0] 8002cbc: 430a orrs r2, r1 8002cbe: 60da str r2, [r3, #12] 8002cc0: e019 b.n 8002cf6 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , 8002cc2: 687b ldr r3, [r7, #4] 8002cc4: 681b ldr r3, [r3, #0] 8002cc6: 6919 ldr r1, [r3, #16] 8002cc8: 683b ldr r3, [r7, #0] 8002cca: 681a ldr r2, [r3, #0] 8002ccc: 4613 mov r3, r2 8002cce: 005b lsls r3, r3, #1 8002cd0: 4413 add r3, r2 8002cd2: 2207 movs r2, #7 8002cd4: fa02 f303 lsl.w r3, r2, r3 8002cd8: 43db mvns r3, r3 8002cda: 4019 ands r1, r3 8002cdc: 683b ldr r3, [r7, #0] 8002cde: 6898 ldr r0, [r3, #8] 8002ce0: 683b ldr r3, [r7, #0] 8002ce2: 681a ldr r2, [r3, #0] 8002ce4: 4613 mov r3, r2 8002ce6: 005b lsls r3, r3, #1 8002ce8: 4413 add r3, r2 8002cea: fa00 f203 lsl.w r2, r0, r3 8002cee: 687b ldr r3, [r7, #4] 8002cf0: 681b ldr r3, [r3, #0] 8002cf2: 430a orrs r2, r1 8002cf4: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 8002cf6: 683b ldr r3, [r7, #0] 8002cf8: 681b ldr r3, [r3, #0] 8002cfa: 2b10 cmp r3, #16 8002cfc: d003 beq.n 8002d06 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) 8002cfe: 683b ldr r3, [r7, #0] 8002d00: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || 8002d02: 2b11 cmp r3, #17 8002d04: d132 bne.n 8002d6c { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) 8002d06: 687b ldr r3, [r7, #4] 8002d08: 681b ldr r3, [r3, #0] 8002d0a: 4a1d ldr r2, [pc, #116] @ (8002d80 ) 8002d0c: 4293 cmp r3, r2 8002d0e: d125 bne.n 8002d5c { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) 8002d10: 687b ldr r3, [r7, #4] 8002d12: 681b ldr r3, [r3, #0] 8002d14: 689b ldr r3, [r3, #8] 8002d16: f403 0300 and.w r3, r3, #8388608 @ 0x800000 8002d1a: 2b00 cmp r3, #0 8002d1c: d126 bne.n 8002d6c { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); 8002d1e: 687b ldr r3, [r7, #4] 8002d20: 681b ldr r3, [r3, #0] 8002d22: 689a ldr r2, [r3, #8] 8002d24: 687b ldr r3, [r7, #4] 8002d26: 681b ldr r3, [r3, #0] 8002d28: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 8002d2c: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) 8002d2e: 683b ldr r3, [r7, #0] 8002d30: 681b ldr r3, [r3, #0] 8002d32: 2b10 cmp r3, #16 8002d34: d11a bne.n 8002d6c { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); 8002d36: 4b13 ldr r3, [pc, #76] @ (8002d84 ) 8002d38: 681b ldr r3, [r3, #0] 8002d3a: 4a13 ldr r2, [pc, #76] @ (8002d88 ) 8002d3c: fba2 2303 umull r2, r3, r2, r3 8002d40: 0c9a lsrs r2, r3, #18 8002d42: 4613 mov r3, r2 8002d44: 009b lsls r3, r3, #2 8002d46: 4413 add r3, r2 8002d48: 005b lsls r3, r3, #1 8002d4a: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8002d4c: e002 b.n 8002d54 { wait_loop_index--; 8002d4e: 68bb ldr r3, [r7, #8] 8002d50: 3b01 subs r3, #1 8002d52: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) 8002d54: 68bb ldr r3, [r7, #8] 8002d56: 2b00 cmp r3, #0 8002d58: d1f9 bne.n 8002d4e 8002d5a: e007 b.n 8002d6c } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); 8002d5c: 687b ldr r3, [r7, #4] 8002d5e: 6a9b ldr r3, [r3, #40] @ 0x28 8002d60: f043 0220 orr.w r2, r3, #32 8002d64: 687b ldr r3, [r7, #4] 8002d66: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; 8002d68: 2301 movs r3, #1 8002d6a: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); 8002d6c: 687b ldr r3, [r7, #4] 8002d6e: 2200 movs r2, #0 8002d70: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; 8002d74: 7bfb ldrb r3, [r7, #15] } 8002d76: 4618 mov r0, r3 8002d78: 3714 adds r7, #20 8002d7a: 46bd mov sp, r7 8002d7c: bc80 pop {r7} 8002d7e: 4770 bx lr 8002d80: 40012400 .word 0x40012400 8002d84: 20000004 .word 0x20000004 8002d88: 431bde83 .word 0x431bde83 08002d8c : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { 8002d8c: b580 push {r7, lr} 8002d8e: b084 sub sp, #16 8002d90: af00 add r7, sp, #0 8002d92: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8002d94: 2300 movs r3, #0 8002d96: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) 8002d98: 687b ldr r3, [r7, #4] 8002d9a: 681b ldr r3, [r3, #0] 8002d9c: 689b ldr r3, [r3, #8] 8002d9e: f003 0301 and.w r3, r3, #1 8002da2: 2b01 cmp r3, #1 8002da4: d12e bne.n 8002e04 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); 8002da6: 687b ldr r3, [r7, #4] 8002da8: 681b ldr r3, [r3, #0] 8002daa: 689a ldr r2, [r3, #8] 8002dac: 687b ldr r3, [r7, #4] 8002dae: 681b ldr r3, [r3, #0] 8002db0: f022 0201 bic.w r2, r2, #1 8002db4: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); 8002db6: f7ff fdeb bl 8002990 8002dba: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) 8002dbc: e01b b.n 8002df6 { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) 8002dbe: f7ff fde7 bl 8002990 8002dc2: 4602 mov r2, r0 8002dc4: 68fb ldr r3, [r7, #12] 8002dc6: 1ad3 subs r3, r2, r3 8002dc8: 2b02 cmp r3, #2 8002dca: d914 bls.n 8002df6 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) 8002dcc: 687b ldr r3, [r7, #4] 8002dce: 681b ldr r3, [r3, #0] 8002dd0: 689b ldr r3, [r3, #8] 8002dd2: f003 0301 and.w r3, r3, #1 8002dd6: 2b01 cmp r3, #1 8002dd8: d10d bne.n 8002df6 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); 8002dda: 687b ldr r3, [r7, #4] 8002ddc: 6a9b ldr r3, [r3, #40] @ 0x28 8002dde: f043 0210 orr.w r2, r3, #16 8002de2: 687b ldr r3, [r7, #4] 8002de4: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); 8002de6: 687b ldr r3, [r7, #4] 8002de8: 6adb ldr r3, [r3, #44] @ 0x2c 8002dea: f043 0201 orr.w r2, r3, #1 8002dee: 687b ldr r3, [r7, #4] 8002df0: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; 8002df2: 2301 movs r3, #1 8002df4: e007 b.n 8002e06 while(ADC_IS_ENABLE(hadc) != RESET) 8002df6: 687b ldr r3, [r7, #4] 8002df8: 681b ldr r3, [r3, #0] 8002dfa: 689b ldr r3, [r3, #8] 8002dfc: f003 0301 and.w r3, r3, #1 8002e00: 2b01 cmp r3, #1 8002e02: d0dc beq.n 8002dbe } } } /* Return HAL status */ return HAL_OK; 8002e04: 2300 movs r3, #0 } 8002e06: 4618 mov r0, r3 8002e08: 3710 adds r7, #16 8002e0a: 46bd mov sp, r7 8002e0c: bd80 pop {r7, pc} ... 08002e10 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8002e10: b480 push {r7} 8002e12: b085 sub sp, #20 8002e14: af00 add r7, sp, #0 8002e16: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8002e18: 687b ldr r3, [r7, #4] 8002e1a: f003 0307 and.w r3, r3, #7 8002e1e: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 8002e20: 4b0c ldr r3, [pc, #48] @ (8002e54 <__NVIC_SetPriorityGrouping+0x44>) 8002e22: 68db ldr r3, [r3, #12] 8002e24: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8002e26: 68ba ldr r2, [r7, #8] 8002e28: f64f 03ff movw r3, #63743 @ 0xf8ff 8002e2c: 4013 ands r3, r2 8002e2e: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 8002e30: 68fb ldr r3, [r7, #12] 8002e32: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8002e34: 68bb ldr r3, [r7, #8] 8002e36: 4313 orrs r3, r2 reg_value = (reg_value | 8002e38: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 8002e3c: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8002e40: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 8002e42: 4a04 ldr r2, [pc, #16] @ (8002e54 <__NVIC_SetPriorityGrouping+0x44>) 8002e44: 68bb ldr r3, [r7, #8] 8002e46: 60d3 str r3, [r2, #12] } 8002e48: bf00 nop 8002e4a: 3714 adds r7, #20 8002e4c: 46bd mov sp, r7 8002e4e: bc80 pop {r7} 8002e50: 4770 bx lr 8002e52: bf00 nop 8002e54: e000ed00 .word 0xe000ed00 08002e58 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8002e58: b480 push {r7} 8002e5a: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8002e5c: 4b04 ldr r3, [pc, #16] @ (8002e70 <__NVIC_GetPriorityGrouping+0x18>) 8002e5e: 68db ldr r3, [r3, #12] 8002e60: 0a1b lsrs r3, r3, #8 8002e62: f003 0307 and.w r3, r3, #7 } 8002e66: 4618 mov r0, r3 8002e68: 46bd mov sp, r7 8002e6a: bc80 pop {r7} 8002e6c: 4770 bx lr 8002e6e: bf00 nop 8002e70: e000ed00 .word 0xe000ed00 08002e74 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8002e74: b480 push {r7} 8002e76: b083 sub sp, #12 8002e78: af00 add r7, sp, #0 8002e7a: 4603 mov r3, r0 8002e7c: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8002e7e: f997 3007 ldrsb.w r3, [r7, #7] 8002e82: 2b00 cmp r3, #0 8002e84: db0b blt.n 8002e9e <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8002e86: 79fb ldrb r3, [r7, #7] 8002e88: f003 021f and.w r2, r3, #31 8002e8c: 4906 ldr r1, [pc, #24] @ (8002ea8 <__NVIC_EnableIRQ+0x34>) 8002e8e: f997 3007 ldrsb.w r3, [r7, #7] 8002e92: 095b lsrs r3, r3, #5 8002e94: 2001 movs r0, #1 8002e96: fa00 f202 lsl.w r2, r0, r2 8002e9a: f841 2023 str.w r2, [r1, r3, lsl #2] } } 8002e9e: bf00 nop 8002ea0: 370c adds r7, #12 8002ea2: 46bd mov sp, r7 8002ea4: bc80 pop {r7} 8002ea6: 4770 bx lr 8002ea8: e000e100 .word 0xe000e100 08002eac <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8002eac: b480 push {r7} 8002eae: b083 sub sp, #12 8002eb0: af00 add r7, sp, #0 8002eb2: 4603 mov r3, r0 8002eb4: 6039 str r1, [r7, #0] 8002eb6: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8002eb8: f997 3007 ldrsb.w r3, [r7, #7] 8002ebc: 2b00 cmp r3, #0 8002ebe: db0a blt.n 8002ed6 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8002ec0: 683b ldr r3, [r7, #0] 8002ec2: b2da uxtb r2, r3 8002ec4: 490c ldr r1, [pc, #48] @ (8002ef8 <__NVIC_SetPriority+0x4c>) 8002ec6: f997 3007 ldrsb.w r3, [r7, #7] 8002eca: 0112 lsls r2, r2, #4 8002ecc: b2d2 uxtb r2, r2 8002ece: 440b add r3, r1 8002ed0: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8002ed4: e00a b.n 8002eec <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8002ed6: 683b ldr r3, [r7, #0] 8002ed8: b2da uxtb r2, r3 8002eda: 4908 ldr r1, [pc, #32] @ (8002efc <__NVIC_SetPriority+0x50>) 8002edc: 79fb ldrb r3, [r7, #7] 8002ede: f003 030f and.w r3, r3, #15 8002ee2: 3b04 subs r3, #4 8002ee4: 0112 lsls r2, r2, #4 8002ee6: b2d2 uxtb r2, r2 8002ee8: 440b add r3, r1 8002eea: 761a strb r2, [r3, #24] } 8002eec: bf00 nop 8002eee: 370c adds r7, #12 8002ef0: 46bd mov sp, r7 8002ef2: bc80 pop {r7} 8002ef4: 4770 bx lr 8002ef6: bf00 nop 8002ef8: e000e100 .word 0xe000e100 8002efc: e000ed00 .word 0xe000ed00 08002f00 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 8002f00: b480 push {r7} 8002f02: b089 sub sp, #36 @ 0x24 8002f04: af00 add r7, sp, #0 8002f06: 60f8 str r0, [r7, #12] 8002f08: 60b9 str r1, [r7, #8] 8002f0a: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8002f0c: 68fb ldr r3, [r7, #12] 8002f0e: f003 0307 and.w r3, r3, #7 8002f12: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8002f14: 69fb ldr r3, [r7, #28] 8002f16: f1c3 0307 rsb r3, r3, #7 8002f1a: 2b04 cmp r3, #4 8002f1c: bf28 it cs 8002f1e: 2304 movcs r3, #4 8002f20: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8002f22: 69fb ldr r3, [r7, #28] 8002f24: 3304 adds r3, #4 8002f26: 2b06 cmp r3, #6 8002f28: d902 bls.n 8002f30 8002f2a: 69fb ldr r3, [r7, #28] 8002f2c: 3b03 subs r3, #3 8002f2e: e000 b.n 8002f32 8002f30: 2300 movs r3, #0 8002f32: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8002f34: f04f 32ff mov.w r2, #4294967295 8002f38: 69bb ldr r3, [r7, #24] 8002f3a: fa02 f303 lsl.w r3, r2, r3 8002f3e: 43da mvns r2, r3 8002f40: 68bb ldr r3, [r7, #8] 8002f42: 401a ands r2, r3 8002f44: 697b ldr r3, [r7, #20] 8002f46: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8002f48: f04f 31ff mov.w r1, #4294967295 8002f4c: 697b ldr r3, [r7, #20] 8002f4e: fa01 f303 lsl.w r3, r1, r3 8002f52: 43d9 mvns r1, r3 8002f54: 687b ldr r3, [r7, #4] 8002f56: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8002f58: 4313 orrs r3, r2 ); } 8002f5a: 4618 mov r0, r3 8002f5c: 3724 adds r7, #36 @ 0x24 8002f5e: 46bd mov sp, r7 8002f60: bc80 pop {r7} 8002f62: 4770 bx lr 08002f64 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8002f64: b580 push {r7, lr} 8002f66: b082 sub sp, #8 8002f68: af00 add r7, sp, #0 8002f6a: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8002f6c: 687b ldr r3, [r7, #4] 8002f6e: 3b01 subs r3, #1 8002f70: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8002f74: d301 bcc.n 8002f7a { return (1UL); /* Reload value impossible */ 8002f76: 2301 movs r3, #1 8002f78: e00f b.n 8002f9a } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8002f7a: 4a0a ldr r2, [pc, #40] @ (8002fa4 ) 8002f7c: 687b ldr r3, [r7, #4] 8002f7e: 3b01 subs r3, #1 8002f80: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8002f82: 210f movs r1, #15 8002f84: f04f 30ff mov.w r0, #4294967295 8002f88: f7ff ff90 bl 8002eac <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8002f8c: 4b05 ldr r3, [pc, #20] @ (8002fa4 ) 8002f8e: 2200 movs r2, #0 8002f90: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8002f92: 4b04 ldr r3, [pc, #16] @ (8002fa4 ) 8002f94: 2207 movs r2, #7 8002f96: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8002f98: 2300 movs r3, #0 } 8002f9a: 4618 mov r0, r3 8002f9c: 3708 adds r7, #8 8002f9e: 46bd mov sp, r7 8002fa0: bd80 pop {r7, pc} 8002fa2: bf00 nop 8002fa4: e000e010 .word 0xe000e010 08002fa8 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8002fa8: b580 push {r7, lr} 8002faa: b082 sub sp, #8 8002fac: af00 add r7, sp, #0 8002fae: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8002fb0: 6878 ldr r0, [r7, #4] 8002fb2: f7ff ff2d bl 8002e10 <__NVIC_SetPriorityGrouping> } 8002fb6: bf00 nop 8002fb8: 3708 adds r7, #8 8002fba: 46bd mov sp, r7 8002fbc: bd80 pop {r7, pc} 08002fbe : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8002fbe: b580 push {r7, lr} 8002fc0: b086 sub sp, #24 8002fc2: af00 add r7, sp, #0 8002fc4: 4603 mov r3, r0 8002fc6: 60b9 str r1, [r7, #8] 8002fc8: 607a str r2, [r7, #4] 8002fca: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8002fcc: 2300 movs r3, #0 8002fce: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8002fd0: f7ff ff42 bl 8002e58 <__NVIC_GetPriorityGrouping> 8002fd4: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8002fd6: 687a ldr r2, [r7, #4] 8002fd8: 68b9 ldr r1, [r7, #8] 8002fda: 6978 ldr r0, [r7, #20] 8002fdc: f7ff ff90 bl 8002f00 8002fe0: 4602 mov r2, r0 8002fe2: f997 300f ldrsb.w r3, [r7, #15] 8002fe6: 4611 mov r1, r2 8002fe8: 4618 mov r0, r3 8002fea: f7ff ff5f bl 8002eac <__NVIC_SetPriority> } 8002fee: bf00 nop 8002ff0: 3718 adds r7, #24 8002ff2: 46bd mov sp, r7 8002ff4: bd80 pop {r7, pc} 08002ff6 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 8002ff6: b580 push {r7, lr} 8002ff8: b082 sub sp, #8 8002ffa: af00 add r7, sp, #0 8002ffc: 4603 mov r3, r0 8002ffe: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8003000: f997 3007 ldrsb.w r3, [r7, #7] 8003004: 4618 mov r0, r3 8003006: f7ff ff35 bl 8002e74 <__NVIC_EnableIRQ> } 800300a: bf00 nop 800300c: 3708 adds r7, #8 800300e: 46bd mov sp, r7 8003010: bd80 pop {r7, pc} 08003012 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8003012: b580 push {r7, lr} 8003014: b082 sub sp, #8 8003016: af00 add r7, sp, #0 8003018: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 800301a: 6878 ldr r0, [r7, #4] 800301c: f7ff ffa2 bl 8002f64 8003020: 4603 mov r3, r0 } 8003022: 4618 mov r0, r3 8003024: 3708 adds r7, #8 8003026: 46bd mov sp, r7 8003028: bd80 pop {r7, pc} 0800302a : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { 800302a: b480 push {r7} 800302c: b085 sub sp, #20 800302e: af00 add r7, sp, #0 8003030: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8003032: 2300 movs r3, #0 8003034: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) 8003036: 687b ldr r3, [r7, #4] 8003038: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 800303c: b2db uxtb r3, r3 800303e: 2b02 cmp r3, #2 8003040: d008 beq.n 8003054 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8003042: 687b ldr r3, [r7, #4] 8003044: 2204 movs r2, #4 8003046: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8003048: 687b ldr r3, [r7, #4] 800304a: 2200 movs r2, #0 800304c: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; 8003050: 2301 movs r3, #1 8003052: e020 b.n 8003096 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8003054: 687b ldr r3, [r7, #4] 8003056: 681b ldr r3, [r3, #0] 8003058: 681a ldr r2, [r3, #0] 800305a: 687b ldr r3, [r7, #4] 800305c: 681b ldr r3, [r3, #0] 800305e: f022 020e bic.w r2, r2, #14 8003062: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 8003064: 687b ldr r3, [r7, #4] 8003066: 681b ldr r3, [r3, #0] 8003068: 681a ldr r2, [r3, #0] 800306a: 687b ldr r3, [r7, #4] 800306c: 681b ldr r3, [r3, #0] 800306e: f022 0201 bic.w r2, r2, #1 8003072: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); 8003074: 687b ldr r3, [r7, #4] 8003076: 6c1a ldr r2, [r3, #64] @ 0x40 8003078: 687b ldr r3, [r7, #4] 800307a: 6bdb ldr r3, [r3, #60] @ 0x3c 800307c: 2101 movs r1, #1 800307e: fa01 f202 lsl.w r2, r1, r2 8003082: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8003084: 687b ldr r3, [r7, #4] 8003086: 2201 movs r2, #1 8003088: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 800308c: 687b ldr r3, [r7, #4] 800308e: 2200 movs r2, #0 8003090: f883 2020 strb.w r2, [r3, #32] return status; 8003094: 7bfb ldrb r3, [r7, #15] } 8003096: 4618 mov r0, r3 8003098: 3714 adds r7, #20 800309a: 46bd mov sp, r7 800309c: bc80 pop {r7} 800309e: 4770 bx lr 080030a0 : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { 80030a0: b580 push {r7, lr} 80030a2: b084 sub sp, #16 80030a4: af00 add r7, sp, #0 80030a6: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80030a8: 2300 movs r3, #0 80030aa: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) 80030ac: 687b ldr r3, [r7, #4] 80030ae: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 80030b2: b2db uxtb r3, r3 80030b4: 2b02 cmp r3, #2 80030b6: d005 beq.n 80030c4 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 80030b8: 687b ldr r3, [r7, #4] 80030ba: 2204 movs r2, #4 80030bc: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; 80030be: 2301 movs r3, #1 80030c0: 73fb strb r3, [r7, #15] 80030c2: e051 b.n 8003168 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 80030c4: 687b ldr r3, [r7, #4] 80030c6: 681b ldr r3, [r3, #0] 80030c8: 681a ldr r2, [r3, #0] 80030ca: 687b ldr r3, [r7, #4] 80030cc: 681b ldr r3, [r3, #0] 80030ce: f022 020e bic.w r2, r2, #14 80030d2: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 80030d4: 687b ldr r3, [r7, #4] 80030d6: 681b ldr r3, [r3, #0] 80030d8: 681a ldr r2, [r3, #0] 80030da: 687b ldr r3, [r7, #4] 80030dc: 681b ldr r3, [r3, #0] 80030de: f022 0201 bic.w r2, r2, #1 80030e2: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); 80030e4: 687b ldr r3, [r7, #4] 80030e6: 681b ldr r3, [r3, #0] 80030e8: 4a22 ldr r2, [pc, #136] @ (8003174 ) 80030ea: 4293 cmp r3, r2 80030ec: d029 beq.n 8003142 80030ee: 687b ldr r3, [r7, #4] 80030f0: 681b ldr r3, [r3, #0] 80030f2: 4a21 ldr r2, [pc, #132] @ (8003178 ) 80030f4: 4293 cmp r3, r2 80030f6: d022 beq.n 800313e 80030f8: 687b ldr r3, [r7, #4] 80030fa: 681b ldr r3, [r3, #0] 80030fc: 4a1f ldr r2, [pc, #124] @ (800317c ) 80030fe: 4293 cmp r3, r2 8003100: d01a beq.n 8003138 8003102: 687b ldr r3, [r7, #4] 8003104: 681b ldr r3, [r3, #0] 8003106: 4a1e ldr r2, [pc, #120] @ (8003180 ) 8003108: 4293 cmp r3, r2 800310a: d012 beq.n 8003132 800310c: 687b ldr r3, [r7, #4] 800310e: 681b ldr r3, [r3, #0] 8003110: 4a1c ldr r2, [pc, #112] @ (8003184 ) 8003112: 4293 cmp r3, r2 8003114: d00a beq.n 800312c 8003116: 687b ldr r3, [r7, #4] 8003118: 681b ldr r3, [r3, #0] 800311a: 4a1b ldr r2, [pc, #108] @ (8003188 ) 800311c: 4293 cmp r3, r2 800311e: d102 bne.n 8003126 8003120: f44f 1380 mov.w r3, #1048576 @ 0x100000 8003124: e00e b.n 8003144 8003126: f04f 7380 mov.w r3, #16777216 @ 0x1000000 800312a: e00b b.n 8003144 800312c: f44f 3380 mov.w r3, #65536 @ 0x10000 8003130: e008 b.n 8003144 8003132: f44f 5380 mov.w r3, #4096 @ 0x1000 8003136: e005 b.n 8003144 8003138: f44f 7380 mov.w r3, #256 @ 0x100 800313c: e002 b.n 8003144 800313e: 2310 movs r3, #16 8003140: e000 b.n 8003144 8003142: 2301 movs r3, #1 8003144: 4a11 ldr r2, [pc, #68] @ (800318c ) 8003146: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8003148: 687b ldr r3, [r7, #4] 800314a: 2201 movs r2, #1 800314c: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8003150: 687b ldr r3, [r7, #4] 8003152: 2200 movs r2, #0 8003154: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) 8003158: 687b ldr r3, [r7, #4] 800315a: 6b5b ldr r3, [r3, #52] @ 0x34 800315c: 2b00 cmp r3, #0 800315e: d003 beq.n 8003168 { hdma->XferAbortCallback(hdma); 8003160: 687b ldr r3, [r7, #4] 8003162: 6b5b ldr r3, [r3, #52] @ 0x34 8003164: 6878 ldr r0, [r7, #4] 8003166: 4798 blx r3 } } return status; 8003168: 7bfb ldrb r3, [r7, #15] } 800316a: 4618 mov r0, r3 800316c: 3710 adds r7, #16 800316e: 46bd mov sp, r7 8003170: bd80 pop {r7, pc} 8003172: bf00 nop 8003174: 40020008 .word 0x40020008 8003178: 4002001c .word 0x4002001c 800317c: 40020030 .word 0x40020030 8003180: 40020044 .word 0x40020044 8003184: 40020058 .word 0x40020058 8003188: 4002006c .word 0x4002006c 800318c: 40020000 .word 0x40020000 08003190 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 8003190: b480 push {r7} 8003192: b08b sub sp, #44 @ 0x2c 8003194: af00 add r7, sp, #0 8003196: 6078 str r0, [r7, #4] 8003198: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 800319a: 2300 movs r3, #0 800319c: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; 800319e: 2300 movs r3, #0 80031a0: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 80031a2: e169 b.n 8003478 { /* Get the IO position */ ioposition = (0x01uL << position); 80031a4: 2201 movs r2, #1 80031a6: 6a7b ldr r3, [r7, #36] @ 0x24 80031a8: fa02 f303 lsl.w r3, r2, r3 80031ac: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80031ae: 683b ldr r3, [r7, #0] 80031b0: 681b ldr r3, [r3, #0] 80031b2: 69fa ldr r2, [r7, #28] 80031b4: 4013 ands r3, r2 80031b6: 61bb str r3, [r7, #24] if (iocurrent == ioposition) 80031b8: 69ba ldr r2, [r7, #24] 80031ba: 69fb ldr r3, [r7, #28] 80031bc: 429a cmp r2, r3 80031be: f040 8158 bne.w 8003472 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) 80031c2: 683b ldr r3, [r7, #0] 80031c4: 685b ldr r3, [r3, #4] 80031c6: 4a9a ldr r2, [pc, #616] @ (8003430 ) 80031c8: 4293 cmp r3, r2 80031ca: d05e beq.n 800328a 80031cc: 4a98 ldr r2, [pc, #608] @ (8003430 ) 80031ce: 4293 cmp r3, r2 80031d0: d875 bhi.n 80032be 80031d2: 4a98 ldr r2, [pc, #608] @ (8003434 ) 80031d4: 4293 cmp r3, r2 80031d6: d058 beq.n 800328a 80031d8: 4a96 ldr r2, [pc, #600] @ (8003434 ) 80031da: 4293 cmp r3, r2 80031dc: d86f bhi.n 80032be 80031de: 4a96 ldr r2, [pc, #600] @ (8003438