diff --git a/Fertirrega_v6/Core/Inc/ad5934_driver.h b/Fertirrega_v6/Core/Inc/ad5934_driver.h index 4cb621a..b296164 100644 --- a/Fertirrega_v6/Core/Inc/ad5934_driver.h +++ b/Fertirrega_v6/Core/Inc/ad5934_driver.h @@ -87,12 +87,24 @@ extern "C" { // Values for frequency counts = (freq*2^27)/(1MHz/16) #define AD5934_FREQ_4K882HZ 0x009FF92F // 4.882kHz +#define AD5934_FREQ_3K761HZ 0x007B3D8E // 3.761kHZ +#define AD5934_FREQ_2K599HZ 0x005529FE // 2.599kHz #define AD5934_FREQ_2K5HZ 0x0051EB86 // 2.5kHz +#define AD5934_FREQ_2K293HZ 0x004B2314 // 2.293kHz +#define AD5934_FREQ_2K018HZ 0x00422036 // 2.018kHz #define AD5934_FREQ_1K953HZ 0x003FFEF3 // 1.953kHz +#define AD5934_FREQ_1K865HZ 0x003D1CC1 // 1.865kHz #define AD5934_FREQ_1K590HZ 0x003419E3 // 1.59kHz #define AD5934_FREQ_0HZ 0x00000000 // 0Hz #define AD5934_STEP_FREQ_0 0x0000 // 0 passos +#define AD5934_SETTLING_TIME_23 0x0017 // 17 ciclos +#define AD5934_SETTLING_TIME_32 0x0020 // 32 ciclos +#define AD5934_SETTLING_TIME_48 0x0030 // 48 ciclos #define AD5934_SETTLING_TIME_64 0x0040 // 64 ciclos +#define AD5934_SETTLING_TIME_90 0x0060 // 90 ciclos +#define AD5934_SETTLING_TIME_117 0x0075 // 117 ciclos +#define AD5934_SETTLING_TIME_160 0x00A0 // 160 ciclos +#define AD5934_SETTLING_TIME_191 0x00BF // 191 ciclos /*****************************************************************************/ @@ -116,7 +128,7 @@ extern "C" { #define ADG715_SW7 0x40 //RTD Input #define ADG715_SW8 0x80 //CE Input - +#define ADG715_SWOFF 0x00 //Dummy /*****************************************************************************/ /**************************** General Defines ********************************/ @@ -141,6 +153,9 @@ extern "C" { #define AD5934_GAIN_FACTOR_1413US 1413.0f #define AD5934_GAIN_FACTOR_12880US 12880.0f +// Aproximação linear do coeficiente PT100/PT1000 (α), usada abaixo de 0°C +// R(T) ≈ R0 * (1 + ALPHA * T) → T ≈ (R/R0 - 1) / ALPHA +#define AD5934_RTD_ALPHA 0.00385f // ohms/ohm/°C, padrão IEC 60751 #define AD5934_RTD_A 3.9083e-3f #define AD5934_RTD_B (-5.775e-7f) @@ -150,27 +165,22 @@ extern "C" { #define AD5934_EC_ALPHA_PER_C 0.02f #define AD5934_EC_TEMP_REF_C 25.0f -// Values for sample timming sync -#define AD5934_SYNC_PER_SWEEP 60 // 60 ms between sweeps -#define AD5934_SYNC_MUX_SETTLING 5 // 5 ms to wait before read after change ADG715 channels //Mux Set to Read... #define AD5934_ID_RTD 0 #define AD5934_ID_EC 1 #define AD5934_ID_REF 2 - - /*****************************************************************************/ /**************************** Filtering Defines *****************************/ /*****************************************************************************/ -#define AD5934_TIME_PER_SWEEP 60 // 60 ms entre o início de cada sweep -#define AD5934_TIME_MUX_SETTLING 10 // 10 ms de espera após trocar o MUX +#define AD5934_TIME_PER_SWEEP 10 // 60 ms entre o início de cada sweep +#define AD5934_SYNC_MUX_SETTLING 40 // 10 ms to wait before read after change ADG715 channels -#define AD5934_BURST_SIZE 5 -#define AD5934_TRIM_COUNT 1 -#define AD5934_HISTORY_SIZE 5 -#define AD5934_IIR_ALPHA 0.55f +#define AD5934_BURST_SIZE 1 // Number of Repeated Sweeps on the same channel before change the Mux +#define AD5934_TRIM_COUNT 0 +#define AD5934_HISTORY_SIZE 8 +#define AD5934_IIR_ALPHA 0.10f #define AD5934_REF_FLOAT_SCALE_MIN 1850.0f #define AD5934_REF_FLOAT_SCALE_MAX 2450.0f @@ -241,12 +251,12 @@ typedef enum { typedef enum { AD5934_IDLE, + AD5934_WAIT_MUX, AD5934_START_CONVERSION, AD5934_WAIT_CONVERSION, AD5934_READ_DATA, AD5934_WAIT_NEXT_SWEEP, - AD5934_SWITCH_MUX, - AD5934_WAIT_MUX + AD5934_SWITCH_MUX } AD5934_State_t; @@ -263,6 +273,14 @@ typedef struct { uint8_t value_valid; } AD5934_filter_t; +typedef struct { + float buffer[AD5934_HISTORY_SIZE]; + float sum; + uint8_t index; + uint8_t count; // quantas amostras já foram inseridas (até encher o buffer) + float average; +} AD5934_AvgFilter_t; + static const uint8_t ADG715_Channel_Map[AD5934_CH_MAX] = { [AD5934_CH_REF100R_LOW_GAIN] = (ADG715_SW1 | ADG715_SW4), [AD5934_CH_REF100R_MID_GAIN] = (ADG715_SW2 | ADG715_SW4), @@ -357,12 +375,14 @@ static const uint16_t AD5934_Scale_Out_Max[AD5934_CH_MAX] = { AD5934_EC5_OUT_SCALE_MAX }; + extern I2C_HandleTypeDef hi2c2; extern float reference_resistor, temperature_RTD, thermal_compensaded_EC; extern volatile AD5934_State_t ad5934_state; extern volatile uint32_t g_ms_counter; // Increment each 1ms Timer +extern volatile uint32_t state_timer; extern uint8_t current_mux_channel; extern uint8_t sweep_count; // Count how many sweeps done at the same channel now (0 a 7) @@ -373,6 +393,9 @@ extern uint8_t current_ref_mux; extern AD5934_filter_t g_rtd_filter, g_ec_filter, g_ref_filter; +extern int16_t rtd_now, ref_now, ec_now; +extern int16_t rtd_now_i, ref_now_i, ec_now_i; + /*****************************************************************************/ /************************ Functions Declarations *****************************/ /*****************************************************************************/ @@ -380,6 +403,8 @@ void AD5934_SetRegisterValue(uint8_t registerAddress, uint32_t registerValue, ui uint32_t AD5934_GetRegisterValue(uint8_t registerAddress, uint8_t numberOfBytes); +uint32_t AD5934_ReadRegister(uint8_t regAddr, uint8_t numberOfBytes); + void AD5934_Init(void); void AD5934_RestartSweep(void); @@ -398,12 +423,20 @@ float AD5934_EC_Calibrate_Temperature(float temp_C); float AD5934_GetMagnitude(void); +float AD5934_GetImpedance(float mag_ref, float mag_dut); + +uint32_t AD5934_Get_Real_Imag_Numbers(void); + uint16_t AD5934_Compress_To_IntScale(float value, uint8_t scale); float AD5934_Round_Float_Precision(float value, uint8_t number_of_decimals); float AD5934_Linear_Correction(float raw_value); +void AD5934_MovingAvg_Init(AD5934_AvgFilter_t *filt); + +void AD5934_MovingAvg_Process(AD5934_AvgFilter_t *filt, float new_sample); + void AD5934_Process_System(void); void AD5934_Sort_Array(float *v, uint8_t n); @@ -416,10 +449,22 @@ void AD5934_Process_Sample(AD5934_filter_t *ch, float raw); void AD5934_RTD_NewSample(float raw); +void AD5934_RTD_Real_NewSample(float raw); + +void AD5934_RTD_Imag_NewSample(float raw); + void AD5934_EC_NewSample(float raw); +void AD5934_EC_Real_NewSample(float raw); + +void AD5934_EC_Imag_NewSample(float raw); + void AD5934_Reference_NewSample(float raw); +void AD5934_Reference_Real_NewSample(float raw); + +void AD5934_Reference_Imag_NewSample(float raw); + void ADG715_SetRegisterValue(char value); void ADG715_ResetChannels(void); diff --git a/Fertirrega_v6/Core/Src/ad5934_driver.c b/Fertirrega_v6/Core/Src/ad5934_driver.c index 0effacd..65fc515 100644 --- a/Fertirrega_v6/Core/Src/ad5934_driver.c +++ b/Fertirrega_v6/Core/Src/ad5934_driver.c @@ -12,13 +12,13 @@ #include "ad5934_driver.h" volatile AD5934_State_t ad5934_state = AD5934_IDLE; - +volatile uint32_t state_timer = 0; volatile uint32_t g_ms_counter = 0; /* Incrementado a cada 1ms no Timer */ float reference_resistor = 0, temperature_RTD = 0, thermal_compensaded_EC = 0; -uint8_t current_mux_channel = AD5934_ID_RTD; -uint8_t current_hw_mux_connection = ADG715_Channel_Map[AD5934_CH_RTD_LOW_GAIN]; // PT100 Connection +uint8_t current_mux_channel = 0; +uint8_t current_hw_mux_connection = AD5934_CH_REF100R_LOW_GAIN; // Connection uint8_t current_ec_mux = AD5934_CH_EC_MID_GAIN; uint8_t current_rtd_mux = AD5934_CH_RTD_LOW_GAIN; uint8_t current_ref_mux = AD5934_CH_REF100R_LOW_GAIN; @@ -29,6 +29,9 @@ AD5934_filter_t g_rtd_filter = {0}; AD5934_filter_t g_ec_filter = {0}; AD5934_filter_t g_ref_filter = {0}; +int16_t rtd_now, ref_now, ec_now; +int16_t rtd_now_i, ref_now_i, ec_now_i; + uint8_t is_new_channel = 1; /****************************************************************************** @@ -98,6 +101,43 @@ uint32_t AD5934_GetRegisterValue(uint8_t registerAddress, uint8_t numberOfBytes) } +/************************************************************************************ + * @brief Lê um registrador do AD5934 usando a abstração Mem_Read (mais segura). + * + * @param regAddr Endereço do registrador no AD5934. + * @return uint32_t Valor lido do registrador. + ***********************************************************************************/ +uint32_t AD5934_ReadRegister(uint8_t regAddr, uint8_t numberOfBytes) +{ + uint32_t registerValue = 0; + uint8_t readData[4] = {0,0,0,0}; // Buffer para receber 16 bits (AD5934 usa regs de 16-bit) + uint8_t writeData[2] = {AD5934_ADDR_POINTER,regAddr}; + //HAL_StatusTypeDef status; + + //Limit buffer size to prevent stack overflow (AD5934 regs are max 4 bytes) */ + if (numberOfBytes > 4) + { + return 0xFFFFFFFF; + } + + HAL_I2C_Master_Transmit(&hi2c2, AD5934_I2C_ADDRESS, writeData, 2, 5); + + //HAL_Delay(1); + + // Usamos Mem_Read que faz: START -> ADDR+W -> REG_ADDR -> REPEATED_START -> ADDR+R -> DATA -> STOP + HAL_I2C_Mem_Read(&hi2c2, AD5934_I2C_ADDRESS, AD5934_BLOCK_READ, I2C_MEMADD_SIZE_8BIT, readData, numberOfBytes, 5); + + /* 5. Reconstruct value from Big-Endian buffer */ + for (uint8_t i = 0; i < numberOfBytes; i++) + { + registerValue = (registerValue << 8) | readData[i]; + } + + return registerValue; + +} + + /****************************************************************************** * @brief Configure and Start the AD5934 frequency sweep parameters. * @@ -116,7 +156,7 @@ void AD5934_Init(void) AD5934_SetRegisterValue(AD5934_CONTROL_REG_LB, (AD5934_CONTROL_FUNCTION(AD5934_RESET)), 1); // Configure starting frequency - AD5934_SetRegisterValue(AD5934_START_FREQ_REG_LB, AD5934_FREQ_2K5HZ, 3); + AD5934_SetRegisterValue(AD5934_START_FREQ_REG_LB, AD5934_FREQ_2K293HZ, 3); // Configure frequency increment step AD5934_SetRegisterValue(AD5934_FREQ_INCR_REG_LB, AD5934_FREQ_0HZ, 3); @@ -195,7 +235,7 @@ void AD5934_StopSweep(void) float AD5934_Calculate_Temperature(float mag_ref, float mag_dut) { uint8_t ch_ref; - float gain_factor, impedance_dut, ratio, discriminant; + float gain_factor, impedance_dut, temperature; if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND { @@ -217,12 +257,23 @@ float AD5934_Calculate_Temperature(float mag_ref, float mag_dut) impedance_dut = gain_factor * ratio_mag; // Calculate impedance ratio with the Reference Resistor - ratio = impedance_dut / gain_factor; + float ratio = impedance_dut / gain_factor; // Calculate impedance discriminant with the ratio - discriminant = (AD5934_RTD_A*AD5934_RTD_A)-(4.0f * AD5934_RTD_B * (1.0f - ratio)); + float discriminant = (AD5934_RTD_A*AD5934_RTD_A)-(4.0f * AD5934_RTD_B * (1.0f - ratio)); - return ((-AD5934_RTD_A + sqrtf(discriminant))/(2.0f * AD5934_RTD_B)); + if (discriminant >= 0.0f && impedance_dut >= gain_factor) + { + // Ramo T >= 0°C: solução quadrática exata + temperature = (-AD5934_RTD_A + sqrtf(discriminant))/(2.0f * AD5934_RTD_B); + } + else + { + // Ramo T < 0°C (ou discriminante inválido por ruído): aproximação linear + temperature = (ratio - 1.0f) / AD5934_RTD_ALPHA; + } + + return AD5934_Round_Float_Precision(temperature,1); } @@ -299,10 +350,10 @@ float AD5934_GetMagnitude(void) { // Get Real Data register - int16_t real_value = ((AD5934_GetRegisterValue(AD5934_REAL_REG_LB,2))); + int16_t real_value = ((AD5934_GetRegisterValue(AD5934_REAL_REG_HB,2))); // Get Imaginary Data register - int16_t imag_value = ((AD5934_GetRegisterValue(AD5934_IMG_REG_LB,2))); + int16_t imag_value = ((AD5934_GetRegisterValue(AD5934_IMG_REG_HB,2))); // Calculate Magnitude using float function sqrtf float magnitude = sqrtf(((float)real_value * (float)real_value) + ((float)imag_value * (float)imag_value)); @@ -312,6 +363,55 @@ float AD5934_GetMagnitude(void) } +/****************************************************************************** +* @brief Get Real and Imaginary values and calculate Magnitude. +* +* @param: none +* +* @return Magnitude (float). +******************************************************************************/ +float AD5934_GetImpedance(float mag_ref, float mag_dut) +{ + uint8_t ch_ref; + float gain_factor; + + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND + { + ch_ref = AD5934_CH_RTD_LOW_GAIN; //PT100 + gain_factor = AD5934_GAIN_FACTOR_100R; + } + else + { + ch_ref = AD5934_CH_RTD_MID_GAIN; //PT1000 + gain_factor = AD5934_GAIN_FACTOR_1K; + } + + float impedance_ref = (1/(mag_ref * gain_factor)); + + float impedance_dut = (1/(mag_dut * impedance_ref)); + + return impedance_dut; +} + + +/****************************************************************************** +* @brief Get Real and Imag values from Magnitude. +* +* @param: none +* +* @return Magnitude (int16). +******************************************************************************/ +uint32_t AD5934_Get_Real_Imag_Numbers(void) +{ + uint32_t real_imag_reg = AD5934_GetRegisterValue(AD5934_IMG_REG_LB, 4); //AD5934_ReadRegister(AD5934_REAL_REG_LB, 4); // + + return (real_imag_reg); +} + + + + + /** * @brief Converte um valor float em uma escala de FLOAT_MIN a FLOAT_MAX para uint16_t em escala de UINT16_MIN a UINT16_MAX * @@ -333,7 +433,10 @@ uint16_t AD5934_Compress_To_IntScale(float value, uint8_t scale) return AD5934_Scale_Out_Max[scale]; // Converte o valor usando a fórmula: ((value - FLOAT_MIN) / (FLOAT_MAX - FLOAT_MIN)) * (UINT16_MAX - UINT16_MIN) + UINT16_MIN - uint16_t result = (uint16_t)(((value - AD5934_Scale_Float_Min[scale]) / (AD5934_Scale_Float_Max[scale] - AD5934_Scale_Float_Min[scale])) * ((float)AD5934_Scale_Out_Max[scale] - (float)AD5934_Scale_Out_Min[scale]) + (float)AD5934_Scale_Out_Min[scale]); + //uint16_t result = (uint16_t)(((value - AD5934_Scale_Float_Min[scale]) / (AD5934_Scale_Float_Max[scale] - AD5934_Scale_Float_Min[scale])) * ((float)AD5934_Scale_Out_Max[scale] - (float)AD5934_Scale_Out_Min[scale]) + (float)AD5934_Scale_Out_Min[scale]); + + float factor = ((float)AD5934_Scale_Out_Max[scale] - (float)AD5934_Scale_Out_Min[scale]) / (AD5934_Scale_Float_Max[scale] - AD5934_Scale_Float_Min[scale]); + uint16_t result = (uint16_t)((float)AD5934_Scale_Out_Min[scale] + (value - AD5934_Scale_Float_Min[scale]) * factor); // Garante que o resultado não exceda o limite superior if (result > AD5934_Scale_Out_Max[scale]) @@ -418,92 +521,87 @@ float AD5934_Calibrate(float dry_probe_real, float dry_probe_imag, float standar */ void AD5934_Process_System(void) { - static uint32_t state_timer = 0; - uint8_t status = 0; - - switch (ad5934_state) + switch (ad5934_state) { case AD5934_IDLE: - ADG715_SetChannels(current_mux_channel); // Starts changing the mux channel + ADG715_SetChannels(current_hw_mux_connection); // Starts changing the mux channel is_new_channel = 1; // Forces first channel state_timer = g_ms_counter; ad5934_state = AD5934_WAIT_MUX; break; case AD5934_WAIT_MUX: - if ((g_ms_counter - state_timer) >= AD5934_SYNC_MUX_SETTLING) // Wait until AD715 Mux switch stability - { - sweep_count = 0; - ad5934_state = AD5934_START_CONVERSION; - } + //if ((g_ms_counter - state_timer) >= AD5934_SYNC_MUX_SETTLING) // Wait until AD715 Mux switch stability + //{ + HAL_Delay(15); + ad5934_state = AD5934_START_CONVERSION; + //} break; case AD5934_START_CONVERSION: - state_timer = g_ms_counter; // Starts to count the Burst period for the sweeps - /* DECISÃO DE COMANDO: Novo canal vs Leituras sucessivas */ - if (is_new_channel) // Decision: Channel Switched or Next Sample in the Burst ? - { - AD5934_RestartSweep(); // Clean some AD5934 internal registers to Re-Start Sweep - is_new_channel = 0; // Resets the flag to read the next Sample Burst - } - else - { - AD5934_Repeat_Sweep(); // Get Sample and just repeat reading - } + //state_timer = g_ms_counter; // Starts to count the Burst period for the sweeps + + /* DECISÃO DE COMANDO: Novo canal vs Leituras sucessivas */ + if (is_new_channel) // Decision: Channel Switched or Next Sample in the Burst ? + { + AD5934_RestartSweep(); // Clean some AD5934 internal registers to Re-Start Sweep + is_new_channel = 0; // Resets the flag to read the next Sample Burst + } + else + { + AD5934_Repeat_Sweep(); // Get Sample and just repeat reading + } + + ad5934_state = AD5934_WAIT_CONVERSION; // Next State - ad5934_state = AD5934_WAIT_CONVERSION; // Next State break; case AD5934_WAIT_CONVERSION: - status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); // Check if the current converion is ready in the AD5934 + uint8_t status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); // Check if the current converion is ready in the AD5934 if ((status & AD5934_STATUS_DATA_VALID) != 0) { - ad5934_state = AD5934_READ_DATA; + uint32_t magnitude_int = AD5934_Get_Real_Imag_Numbers(); + int16_t mag_real = (int16_t)(magnitude_int>>16); + int16_t mag_imag = (int16_t)(magnitude_int & 0x0000FFFF); + float mag_float = sqrtf(((float)mag_real * (float)mag_real) + ((float)mag_imag * (float)mag_imag)); + + switch (current_mux_channel) + { + case AD5934_ID_RTD: + AD5934_RTD_NewSample(mag_float); + rtd_now = mag_float; + rtd_now_i = mag_imag; + break; + + case AD5934_ID_EC: + AD5934_EC_NewSample(mag_float); + ec_now = mag_real; + ec_now_i = mag_imag; + break; + + case AD5934_ID_REF: + AD5934_Reference_NewSample(mag_float); + ref_now = mag_float; + ref_now_i = mag_imag; + break; + } + if(sweep_count<(AD5934_BURST_SIZE-1)) + { + sweep_count++; + ad5934_state = AD5934_START_CONVERSION; + } + else + { + sweep_count = 0; + ad5934_state = AD5934_SWITCH_MUX; + } } break; - case AD5934_READ_DATA: - { - float magnitude = AD5934_GetMagnitude(); - - switch (current_mux_channel) - { - case AD5934_ID_RTD: - AD5934_RTD_NewSample(magnitude); - break; - - case AD5934_ID_EC: - AD5934_EC_NewSample(magnitude); - break; - - case AD5934_ID_REF: - AD5934_Reference_NewSample(magnitude); - break; - } - - sweep_count++; - - if (sweep_count >= AD5934_BURST_SIZE) // Check if number of samples for the burst is complete - { - ad5934_state = AD5934_SWITCH_MUX; // Next Re-Start Sweep - } - else - { - ad5934_state = AD5934_WAIT_NEXT_SWEEP; // Next Repeat Sweep - } - } - break; - - case AD5934_WAIT_NEXT_SWEEP: - if ((g_ms_counter - state_timer) >= AD5934_TIME_PER_SWEEP) - { - ad5934_state = AD5934_START_CONVERSION; - } - break; case AD5934_SWITCH_MUX: - AD5934_StopSweep(); // Put AD5934 in Standby + AD5934_StopSweep(); // Put AD5934 in Standby current_mux_channel = (uint8_t)((current_mux_channel + 1) % 3); // Pointer to the next channel (Circular Buffer 0 to 2) switch (current_mux_channel) { @@ -529,9 +627,11 @@ void AD5934_Process_System(void) break; } ADG715_SetChannels(current_hw_mux_connection); // Change the analog mux + HAL_Delay(12); is_new_channel = 1; // Channel Switched - state_timer = g_ms_counter; // Reload timer to wait for stability - ad5934_state = AD5934_WAIT_MUX; // Next State + //state_timer = g_ms_counter; // Reload timer to wait for stability + //ad5934_state = AD5934_WAIT_MUX; // Next State + ad5934_state = AD5934_START_CONVERSION; break; } } @@ -638,10 +738,35 @@ void AD5934_Process_Sample(AD5934_filter_t *ch, float raw) /* Final output: combines the IIR state (fast response to real drift) * with the window average (more stable, slower response). Adjust * the weighting per channel if needed. */ - ch->filtered_value = 0.5f * ch->iir_state + 0.5f * window_average; + ch->filtered_value = 0.65f * ch->iir_state + 0.35f * window_average; + //ch->filtered_value = window_average; ch->value_valid = 1; } +void AD5934_MovingAvg_Init(AD5934_AvgFilter_t *filt) +{ + for (uint8_t i = 0; i < AD5934_HISTORY_SIZE; i++) { + filt->buffer[i] = 0.0f; + } + filt->sum = 0.0f; + filt->index = 0; + filt->count = 0; + filt->average = 0.0f; +} + +void AD5934_MovingAvg_Process(AD5934_AvgFilter_t *filt, float new_sample) +{ + for (uint8_t i = (AD5934_HISTORY_SIZE-1); i > 0; i--) + filt->buffer[i] = filt->buffer[i-1]; + + filt->buffer[0] = new_sample; + + for (uint8_t i = 0; i < AD5934_HISTORY_SIZE; i++) + filt->sum += new_sample; + + filt->average = (filt->sum / (float)AD5934_HISTORY_SIZE); +} + /* ---------------------------------------------------------------------- */ /* PUBLIC FUNCTIONS - ONE PER CHANNEL */ @@ -654,6 +779,7 @@ void AD5934_RTD_NewSample(float raw) AD5934_Process_Sample(&g_rtd_filter, raw); } + /* Call this every time a sweep completes with the mux on the EC * (conductivity probe) channel */ void AD5934_EC_NewSample(float raw) @@ -661,6 +787,7 @@ void AD5934_EC_NewSample(float raw) AD5934_Process_Sample(&g_ec_filter, raw); } + /* Call this every time a sweep completes with the mux on the on-board * precision reference resistor channel */ void AD5934_Reference_NewSample(float raw) @@ -669,6 +796,7 @@ void AD5934_Reference_NewSample(float raw) } + /***************************************************************************** * ADG715 ***************************************************************************** diff --git a/Fertirrega_v6/Core/Src/main.c b/Fertirrega_v6/Core/Src/main.c index 903b9a8..8f98d50 100644 --- a/Fertirrega_v6/Core/Src/main.c +++ b/Fertirrega_v6/Core/Src/main.c @@ -62,6 +62,7 @@ void SystemClock_Config(void); /* USER CODE BEGIN PFP */ void intToStr(int16_t N, uint8_t *str); void FloatToString(uint8_t * buf, double val); +void Convert2Hex(uint32_t value, char *str); /* USER CODE END PFP */ @@ -89,7 +90,9 @@ int main(void) uint32_t previous_millis_red = 0; uint32_t current_millis; + float ref_final; + float mag_reference, mag_rtd, mag_ec; /* USER CODE END 1 */ @@ -122,6 +125,9 @@ int main(void) HAL_TIM_Base_Start_IT(&htim3); + //AD5934_MovingAvg_Init (&g_rtd_filter); + //AD5934_MovingAvg_Init (&g_ref_filter); + //AD5934_MovingAvg_Init (&g_ec_filter); HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); // LED Green Off HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); // LED Red Off @@ -129,6 +135,7 @@ int main(void) digital_outputs_init(); rs485_init(); + ADG715_ResetChannels(); ADS1015_Init(); // Initializes pH Measurement AD5934_Init(); // Initializes CE and RTD Measurement @@ -136,8 +143,8 @@ int main(void) /* Infinite loop */ /* USER CODE BEGIN WHILE */ - - while(averages<15) +/* + while(averages<20) { AD5934_Process_System(); ADS1015_Process_System(); @@ -146,16 +153,18 @@ int main(void) if((current_millis % 20) == 0) // Send data each 20ms { - if (g_ref_filter.value_valid) // Reference Resistor on Board: 100 Ohms or 1000 Ohms + if (g_ref_imag_filter.value_valid) // Reference Resistor on Board: 100 Ohms or 1000 Ohms { - reference_resistor = g_ref_filter.filtered_value; - uint16_t reference_final = AD5934_REF_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_ref_filter.filtered_value, current_ref_mux); + //reference_resistor = g_ref_filter.filtered_value; + reference_resistor = sqrtf((g_ref_real_filter.filtered_value * g_ref_real_filter.filtered_value)+(g_ref_imag_filter.filtered_value * g_ref_imag_filter.filtered_value)); + //reference_resistor = ref_now; + //uint16_t reference_final = AD5934_REF_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_ref_filter.filtered_value, current_ref_mux); averages++; } } } - +*/ digital_outputs_toggle(0); digital_outputs_toggle(1); digital_outputs_toggle(2); @@ -177,41 +186,78 @@ int main(void) if((current_millis % 500) == 0) // Send data each 100ms { - /* if (g_ref_filter.value_valid) // Reference Resistor on Board: 100 Ohms or 1000 Ohms - { + //if (g_ref_filter.value_valid) // Reference Resistor on Board: 100 Ohms or 1000 Ohms + //{ + mag_reference = g_ref_filter.filtered_value; + //mag_reference = sqrtf(((float)ref_now * (float)ref_now) + ((float)ref_now_i * (float)ref_now_i)); + //mag_reference = sqrtf((g_ref_real_filter.average * g_ref_real_filter.average)+(g_ref_imag_filter.average * g_ref_imag_filter.average)); + //mag_reference = (float)ref_now; //reference_resistor = g_ref_filter.filtered_value; - uint16_t reference_final = AD5934_REF_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_ref_filter.filtered_value, current_ref_mux); + //uint16_t reference_final = AD5934_REF_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_ref_filter.filtered_value, current_ref_mux); - intToStr(reference_final, tempString); - // float ref_final = g_ref_filter.filtered_value; - //FloatToString(tempString, ref_final); + //intToStr(reference_final, tempString); + //ref_final = g_ref_filter.filtered_value; + FloatToString(tempString, mag_reference); + //Convert2Hex(ref_now, tempString); + //intToStr(ref_now, tempString); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); + //intToStr(ref_now_i, tempString); + //rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); rs485_send_broadcast(&newline, 1); + //} + + //if (g_rtd_filter.value_valid) // PT100 or PT1000 in °C + //{ + //mag_rtd = (float)rtd_now; + mag_rtd = g_rtd_filter.filtered_value; + //mag_rtd = sqrtf((g_rtd_real_filter.average * g_rtd_real_filter.average)+(g_rtd_imag_filter.average * g_rtd_imag_filter.average)); + //mag_rtd = sqrtf(((float)rtd_now * (float)rtd_now) + ((float)rtd_now_i * (float)rtd_now_i)); + //temperature_RTD = AD5934_Calculate_Temperature(mag_reference, mag_rtd); + temperature_RTD = AD5934_Calculate_Temperature(mag_reference,mag_rtd);// AD5934_GetImpedance(mag_reference,mag_rtd);// + //uint16_t rtd_final = AD5934_RTD_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_rtd_filter.filtered_value, current_rtd_mux); + //uint16_t rtd_final = AD5934_Compress_To_IntScale(temperature_RTD, current_rtd_mux); + //intToStr(rtd_final, tempString); + //float rtd_final = g_rtd_filter.filtered_value; //g_rtd_filter.filtered_value; + FloatToString(tempString, temperature_RTD); + //Convert2Hex(rtd_now, tempString); + //intToStr(rtd_now, tempString); + rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); + //Convert2Hex(rtd_now_i, tempString); + //intToStr(rtd_now_i, tempString); + //rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); + rs485_send_broadcast(&newline, 1); + + //} + /*if (g_rtd_imag_filter.value_valid) // PT100 or PT1000 in °C + { + + //float mag_rtd = sqrtf((g_rtd_real_filter.filtered_value * g_rtd_real_filter.filtered_value)+(g_rtd_imag_filter.filtered_value * g_rtd_imag_filter.filtered_value)); + temperature_RTD = AD5934_Calculate_Temperature(reference_resistor, mag_rtd); + //uint16_t rtd_final = AD5934_RTD_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_rtd_filter.filtered_value, current_rtd_mux); + //uint16_t rtd_final = AD5934_Compress_To_IntScale(temperature_RTD, current_rtd_mux); + //intToStr(rtd_final, tempString); + float rtd_final = temperature_RTD; //g_rtd_filter.filtered_value; + FloatToString(tempString, rtd_final); + rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); + rs485_send_broadcast(&newline, 1); }*/ - if (g_rtd_filter.value_valid) // PT100 or PT1000 in °C - { - temperature_RTD = AD5934_Calculate_Temperature(reference_resistor, g_rtd_filter.filtered_value); - uint16_t rtd_final = AD5934_RTD_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(temperature_RTD, current_rtd_mux); + //if (g_ec_filter.value_valid) // EC + //{ + //mag_ec = sqrtf((g_ec_real_filter.filtered_value * g_ec_real_filter.filtered_value)+(g_ec_imag_filter.filtered_value * g_ec_imag_filter.filtered_value)); + mag_ec = sqrtf(((float)ec_now * (float)ec_now) + ((float)ec_now_i * (float)ec_now_i)); + thermal_compensaded_EC = AD5934_EC_Compensate_Magnitude_To_25C(mag_ec, temperature_RTD); + //uint16_t ec_final = AD5934_Compress_To_IntScale(thermal_compensaded_EC, current_ec_mux); - intToStr(rtd_final, tempString); - //float rtd_final = g_rtd_filter.filtered_value; - //FloatToString(tempString, rtd_final); - rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); - rs485_send_broadcast(&newline, 1); - } - - if (g_ec_filter.value_valid) // EC - { - thermal_compensaded_EC = AD5934_EC_Compensate_Magnitude_To_25C(g_ec_filter.filtered_value, temperature_RTD); - uint16_t ec_final = AD5934_Compress_To_IntScale(thermal_compensaded_EC, current_ec_mux); - - intToStr(ec_final, tempString); + //intToStr(ec_now, tempString); // float ec_final = g_ec_filter.filtered_value; - // FloatToString(tempString, ec_final); + FloatToString(tempString, mag_ec); + //Convert2Hex((ec_now+0x80008000), tempString); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); + //intToStr(ec_now_i, tempString); + //rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); rs485_send_broadcast(&newline, 1); - } + //} if (g_ph_filter.value_valid) // pH { @@ -222,6 +268,7 @@ int main(void) //FloatToString(tempString, ph_final); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); rs485_send_broadcast(&newline, 1); + rs485_send_broadcast(&newline, 1); } rs485_send_broadcast(&newline, 1); @@ -359,7 +406,7 @@ void FloatToString(uint8_t *buf, double val) fracBuffer[1] = (fracPart / 10) % 10; // Dezena fracBuffer[0] = (fracPart / 100) % 10; // Centena - for (int k = 2; k >= 0; k--) { + for (int k = 0; k <= 2; k++) { temp[i++] = fracBuffer[k] + '0'; } @@ -434,6 +481,28 @@ void intToStr(int16_t N, uint8_t *str) } } + +/** + * Converte um valor uint32_t para string hexadecimal, + * escrevendo o resultado no buffer apontado por 'str'. + * + * @param value Valor a ser convertido (ex: 4276803469) + * @param str Ponteiro para buffer de destino (mínimo 9 bytes: + * 8 dígitos hex + terminador nulo) + */ +void Convert2Hex(uint32_t value, char *str) +{ + const char hexTable[] = "0123456789ABCDEF"; + + for (int8_t i = 7; i >= 0; i--) + { + str[i] = hexTable[value & 0xF]; + value >>= 4; + } + //str[8] = '\0'; +} + + /* TIM3 Timer Interrupt */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo index 97633f6..0c69c7f 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo @@ -1,25 +1,30 @@ -../Core/Src/ad5934_driver.c:45:6:AD5934_SetRegisterValue 2 -../Core/Src/ad5934_driver.c:73:10:AD5934_GetRegisterValue 3 -../Core/Src/ad5934_driver.c:108:6:AD5934_Init 1 -../Core/Src/ad5934_driver.c:139:6:AD5934_RestartSweep 1 -../Core/Src/ad5934_driver.c:162:6:AD5934_Repeat_Sweep 1 -../Core/Src/ad5934_driver.c:175:6:AD5934_StopSweep 1 -../Core/Src/ad5934_driver.c:195:7:AD5934_Calculate_Temperature 2 -../Core/Src/ad5934_driver.c:237:7:AD5934_EC_Compensate_Magnitude_To_25C 2 -../Core/Src/ad5934_driver.c:252:7:AD5934_EC_Calibrate_Temperature 5 -../Core/Src/ad5934_driver.c:298:7:AD5934_GetMagnitude 1 -../Core/Src/ad5934_driver.c:323:10:AD5934_Compress_To_IntScale 5 -../Core/Src/ad5934_driver.c:353:7:AD5934_Round_Float_Precision 2 -../Core/Src/ad5934_driver.c:378:7:AD5934_Linear_Correction 1 -../Core/Src/ad5934_driver.c:397:7:AD5934_Calibrate 1 -../Core/Src/ad5934_driver.c:419:6:AD5934_Process_System 24 -../Core/Src/ad5934_driver.c:544:6:AD5934_Sort_Array 4 -../Core/Src/ad5934_driver.c:566:7:AD5934_Trimmed_Mean 3 -../Core/Src/ad5934_driver.c:592:7:AD5934_History_Average 2 -../Core/Src/ad5934_driver.c:606:6:AD5934_Process_Sample 4 -../Core/Src/ad5934_driver.c:652:6:AD5934_RTD_NewSample 1 -../Core/Src/ad5934_driver.c:659:6:AD5934_EC_NewSample 1 -../Core/Src/ad5934_driver.c:666:6:AD5934_Reference_NewSample 1 -../Core/Src/ad5934_driver.c:682:6:ADG715_SetRegisterValue 1 -../Core/Src/ad5934_driver.c:700:6:ADG715_ResetChannels 1 -../Core/Src/ad5934_driver.c:712:6:ADG715_SetChannels 2 +../Core/Src/ad5934_driver.c:48:6:AD5934_SetRegisterValue 2 +../Core/Src/ad5934_driver.c:76:10:AD5934_GetRegisterValue 3 +../Core/Src/ad5934_driver.c:110:10:AD5934_ReadRegister 3 +../Core/Src/ad5934_driver.c:148:6:AD5934_Init 1 +../Core/Src/ad5934_driver.c:179:6:AD5934_RestartSweep 1 +../Core/Src/ad5934_driver.c:202:6:AD5934_Repeat_Sweep 1 +../Core/Src/ad5934_driver.c:215:6:AD5934_StopSweep 1 +../Core/Src/ad5934_driver.c:235:7:AD5934_Calculate_Temperature 4 +../Core/Src/ad5934_driver.c:288:7:AD5934_EC_Compensate_Magnitude_To_25C 2 +../Core/Src/ad5934_driver.c:303:7:AD5934_EC_Calibrate_Temperature 5 +../Core/Src/ad5934_driver.c:349:7:AD5934_GetMagnitude 1 +../Core/Src/ad5934_driver.c:373:7:AD5934_GetImpedance 2 +../Core/Src/ad5934_driver.c:404:10:AD5934_Get_Real_Imag_Numbers 1 +../Core/Src/ad5934_driver.c:423:10:AD5934_Compress_To_IntScale 5 +../Core/Src/ad5934_driver.c:456:7:AD5934_Round_Float_Precision 2 +../Core/Src/ad5934_driver.c:481:7:AD5934_Linear_Correction 1 +../Core/Src/ad5934_driver.c:500:7:AD5934_Calibrate 1 +../Core/Src/ad5934_driver.c:522:6:AD5934_Process_System 19 +../Core/Src/ad5934_driver.c:644:6:AD5934_Sort_Array 4 +../Core/Src/ad5934_driver.c:666:7:AD5934_Trimmed_Mean 3 +../Core/Src/ad5934_driver.c:692:7:AD5934_History_Average 2 +../Core/Src/ad5934_driver.c:706:6:AD5934_Process_Sample 4 +../Core/Src/ad5934_driver.c:746:6:AD5934_MovingAvg_Init 2 +../Core/Src/ad5934_driver.c:757:6:AD5934_MovingAvg_Process 3 +../Core/Src/ad5934_driver.c:777:6:AD5934_RTD_NewSample 1 +../Core/Src/ad5934_driver.c:785:6:AD5934_EC_NewSample 1 +../Core/Src/ad5934_driver.c:793:6:AD5934_Reference_NewSample 1 +../Core/Src/ad5934_driver.c:810:6:ADG715_SetRegisterValue 1 +../Core/Src/ad5934_driver.c:828:6:ADG715_ResetChannels 1 +../Core/Src/ad5934_driver.c:840:6:ADG715_SetChannels 2 diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o index 839c4f1..9a047b7 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o and b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su index e5eddbe..e2ae2f0 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su @@ -1,25 +1,30 @@ -../Core/Src/ad5934_driver.c:45:6:AD5934_SetRegisterValue 32 static -../Core/Src/ad5934_driver.c:73:10:AD5934_GetRegisterValue 40 static -../Core/Src/ad5934_driver.c:108:6:AD5934_Init 8 static -../Core/Src/ad5934_driver.c:139:6:AD5934_RestartSweep 8 static -../Core/Src/ad5934_driver.c:162:6:AD5934_Repeat_Sweep 8 static -../Core/Src/ad5934_driver.c:175:6:AD5934_StopSweep 8 static -../Core/Src/ad5934_driver.c:195:7:AD5934_Calculate_Temperature 40 static -../Core/Src/ad5934_driver.c:237:7:AD5934_EC_Compensate_Magnitude_To_25C 24 static -../Core/Src/ad5934_driver.c:252:7:AD5934_EC_Calibrate_Temperature 152 static -../Core/Src/ad5934_driver.c:298:7:AD5934_GetMagnitude 24 static -../Core/Src/ad5934_driver.c:323:10:AD5934_Compress_To_IntScale 32 static -../Core/Src/ad5934_driver.c:353:7:AD5934_Round_Float_Precision 24 static -../Core/Src/ad5934_driver.c:378:7:AD5934_Linear_Correction 24 static -../Core/Src/ad5934_driver.c:397:7:AD5934_Calibrate 48 static -../Core/Src/ad5934_driver.c:419:6:AD5934_Process_System 16 static -../Core/Src/ad5934_driver.c:544:6:AD5934_Sort_Array 24 static -../Core/Src/ad5934_driver.c:566:7:AD5934_Trimmed_Mean 32 static -../Core/Src/ad5934_driver.c:592:7:AD5934_History_Average 24 static -../Core/Src/ad5934_driver.c:606:6:AD5934_Process_Sample 32 static -../Core/Src/ad5934_driver.c:652:6:AD5934_RTD_NewSample 16 static -../Core/Src/ad5934_driver.c:659:6:AD5934_EC_NewSample 16 static -../Core/Src/ad5934_driver.c:666:6:AD5934_Reference_NewSample 16 static -../Core/Src/ad5934_driver.c:682:6:ADG715_SetRegisterValue 32 static -../Core/Src/ad5934_driver.c:700:6:ADG715_ResetChannels 8 static -../Core/Src/ad5934_driver.c:712:6:ADG715_SetChannels 16 static +../Core/Src/ad5934_driver.c:48:6:AD5934_SetRegisterValue 32 static +../Core/Src/ad5934_driver.c:76:10:AD5934_GetRegisterValue 40 static +../Core/Src/ad5934_driver.c:110:10:AD5934_ReadRegister 48 static +../Core/Src/ad5934_driver.c:148:6:AD5934_Init 8 static +../Core/Src/ad5934_driver.c:179:6:AD5934_RestartSweep 8 static +../Core/Src/ad5934_driver.c:202:6:AD5934_Repeat_Sweep 8 static +../Core/Src/ad5934_driver.c:215:6:AD5934_StopSweep 8 static +../Core/Src/ad5934_driver.c:235:7:AD5934_Calculate_Temperature 48 static +../Core/Src/ad5934_driver.c:288:7:AD5934_EC_Compensate_Magnitude_To_25C 24 static +../Core/Src/ad5934_driver.c:303:7:AD5934_EC_Calibrate_Temperature 152 static +../Core/Src/ad5934_driver.c:349:7:AD5934_GetMagnitude 24 static +../Core/Src/ad5934_driver.c:373:7:AD5934_GetImpedance 32 static +../Core/Src/ad5934_driver.c:404:10:AD5934_Get_Real_Imag_Numbers 16 static +../Core/Src/ad5934_driver.c:423:10:AD5934_Compress_To_IntScale 32 static +../Core/Src/ad5934_driver.c:456:7:AD5934_Round_Float_Precision 24 static +../Core/Src/ad5934_driver.c:481:7:AD5934_Linear_Correction 24 static +../Core/Src/ad5934_driver.c:500:7:AD5934_Calibrate 48 static +../Core/Src/ad5934_driver.c:522:6:AD5934_Process_System 32 static +../Core/Src/ad5934_driver.c:644:6:AD5934_Sort_Array 24 static +../Core/Src/ad5934_driver.c:666:7:AD5934_Trimmed_Mean 32 static +../Core/Src/ad5934_driver.c:692:7:AD5934_History_Average 24 static +../Core/Src/ad5934_driver.c:706:6:AD5934_Process_Sample 32 static +../Core/Src/ad5934_driver.c:746:6:AD5934_MovingAvg_Init 24 static +../Core/Src/ad5934_driver.c:757:6:AD5934_MovingAvg_Process 24 static +../Core/Src/ad5934_driver.c:777:6:AD5934_RTD_NewSample 16 static +../Core/Src/ad5934_driver.c:785:6:AD5934_EC_NewSample 16 static +../Core/Src/ad5934_driver.c:793:6:AD5934_Reference_NewSample 16 static +../Core/Src/ad5934_driver.c:810:6:ADG715_SetRegisterValue 32 static +../Core/Src/ad5934_driver.c:828:6:ADG715_ResetChannels 8 static +../Core/Src/ad5934_driver.c:840:6:ADG715_SetChannels 16 static diff --git a/Fertirrega_v6/Debug/Core/Src/main.cyclo b/Fertirrega_v6/Debug/Core/Src/main.cyclo index d8c6f20..5c0c42f 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/main.cyclo @@ -1,6 +1,7 @@ -../Core/Src/main.c:78:5:main 9 -../Core/Src/main.c:267:6:SystemClock_Config 4 -../Core/Src/main.c:318:6:FloatToString 8 -../Core/Src/main.c:380:6:intToStr 12 -../Core/Src/main.c:438:6:HAL_TIM_PeriodElapsedCallback 2 -../Core/Src/main.c:454:6:Error_Handler 1 +../Core/Src/main.c:79:5:main 4 +../Core/Src/main.c:314:6:SystemClock_Config 4 +../Core/Src/main.c:365:6:FloatToString 8 +../Core/Src/main.c:427:6:intToStr 12 +../Core/Src/main.c:493:6:Convert2Hex 2 +../Core/Src/main.c:507:6:HAL_TIM_PeriodElapsedCallback 2 +../Core/Src/main.c:523:6:Error_Handler 1 diff --git a/Fertirrega_v6/Debug/Core/Src/main.o b/Fertirrega_v6/Debug/Core/Src/main.o index 4807e09..7750ff0 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/main.o and b/Fertirrega_v6/Debug/Core/Src/main.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/main.su b/Fertirrega_v6/Debug/Core/Src/main.su index 5901799..7b32a54 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.su +++ b/Fertirrega_v6/Debug/Core/Src/main.su @@ -1,6 +1,7 @@ -../Core/Src/main.c:78:5:main 56 static -../Core/Src/main.c:267:6:SystemClock_Config 88 static -../Core/Src/main.c:318:6:FloatToString 104 static -../Core/Src/main.c:380:6:intToStr 32 static -../Core/Src/main.c:438:6:HAL_TIM_PeriodElapsedCallback 16 static -../Core/Src/main.c:454:6:Error_Handler 4 static,ignoring_inline_asm +../Core/Src/main.c:79:5:main 72 static +../Core/Src/main.c:314:6:SystemClock_Config 88 static +../Core/Src/main.c:365:6:FloatToString 104 static +../Core/Src/main.c:427:6:intToStr 32 static +../Core/Src/main.c:493:6:Convert2Hex 48 static +../Core/Src/main.c:507:6:HAL_TIM_PeriodElapsedCallback 16 static +../Core/Src/main.c:523:6:Error_Handler 4 static,ignoring_inline_asm diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.elf b/Fertirrega_v6/Debug/Fertirrega_v6.elf index 02678db..a9919b8 100644 Binary files a/Fertirrega_v6/Debug/Fertirrega_v6.elf and b/Fertirrega_v6/Debug/Fertirrega_v6.elf differ diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.list b/Fertirrega_v6/Debug/Fertirrega_v6.list index e0cb3d7..3c814b6 100644 --- a/Fertirrega_v6/Debug/Fertirrega_v6.list +++ b/Fertirrega_v6/Debug/Fertirrega_v6.list @@ -5,47 +5,47 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 0000010c 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00006130 0800010c 0800010c 0000110c 2**2 + 1 .text 00006acc 0800010c 0800010c 0000110c 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 0000013c 0800623c 0800623c 0000723c 2**2 + 2 .rodata 00000084 08006bd8 08006bd8 00007bd8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08006378 08006378 00008060 2**0 + 3 .ARM.extab 00000000 08006c5c 08006c5c 00008060 2**0 CONTENTS, READONLY - 4 .ARM 00000008 08006378 08006378 00007378 2**2 + 4 .ARM 00000008 08006c5c 08006c5c 00007c5c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 08006380 08006380 00008060 2**0 + 5 .preinit_array 00000000 08006c64 08006c64 00008060 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08006380 08006380 00007380 2**2 + 6 .init_array 00000004 08006c64 08006c64 00007c64 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 7 .fini_array 00000004 08006384 08006384 00007384 2**2 + 7 .fini_array 00000004 08006c68 08006c68 00007c68 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 8 .data 00000060 20000000 08006388 00008000 2**2 + 8 .data 00000060 20000000 08006c6c 00008000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 0000047c 20000060 080063e8 00008060 2**2 + 9 .bss 00000478 20000060 08006ccc 00008060 2**2 ALLOC - 10 ._user_heap_stack 00000604 200004dc 080063e8 000084dc 2**0 + 10 ._user_heap_stack 00000600 200004d8 08006ccc 000084d8 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 00008060 2**0 CONTENTS, READONLY - 12 .debug_info 0001386b 00000000 00000000 00008089 2**0 + 12 .debug_info 00013c73 00000000 00000000 00008089 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 000032e2 00000000 00000000 0001b8f4 2**0 + 13 .debug_abbrev 00003323 00000000 00000000 0001bcfc 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 00001260 00000000 00000000 0001ebd8 2**3 + 14 .debug_aranges 00001290 00000000 00000000 0001f020 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_rnglists 00000e79 00000000 00000000 0001fe38 2**0 + 15 .debug_rnglists 00000e92 00000000 00000000 000202b0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 0001a53e 00000000 00000000 00020cb1 2**0 + 16 .debug_macro 0001a58b 00000000 00000000 00021142 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 00017c61 00000000 00000000 0003b1ef 2**0 + 17 .debug_line 00017dbe 00000000 00000000 0003b6cd 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 00095803 00000000 00000000 00052e50 2**0 + 18 .debug_str 00095ab0 00000000 00000000 0005348b 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000043 00000000 00000000 000e8653 2**0 + 19 .comment 00000043 00000000 00000000 000e8f3b 2**0 CONTENTS, READONLY - 20 .debug_frame 00004be4 00000000 00000000 000e8698 2**2 + 20 .debug_frame 00004ee0 00000000 00000000 000e8f80 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 21 .debug_line_str 00000052 00000000 00000000 000ed27c 2**0 + 21 .debug_line_str 00000052 00000000 00000000 000ede60 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -64,7 +64,7 @@ Disassembly of section .text: 8000122: bd10 pop {r4, pc} 8000124: 20000060 .word 0x20000060 8000128: 00000000 .word 0x00000000 - 800012c: 08006224 .word 0x08006224 + 800012c: 08006bc0 .word 0x08006bc0 08000130 : 8000130: b508 push {r3, lr} @@ -76,7 +76,7 @@ Disassembly of section .text: 800013e: bd08 pop {r3, pc} 8000140: 00000000 .word 0x00000000 8000144: 20000064 .word 0x20000064 - 8000148: 08006224 .word 0x08006224 + 8000148: 08006bc0 .word 0x08006bc0 0800014c : 800014c: 4603 mov r3, r0 @@ -87,16405 +87,17377 @@ Disassembly of section .text: 8000158: 3801 subs r0, #1 800015a: 4770 bx lr -0800015c <__aeabi_frsub>: - 800015c: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 - 8000160: e002 b.n 8000168 <__addsf3> - 8000162: bf00 nop - -08000164 <__aeabi_fsub>: - 8000164: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 - -08000168 <__addsf3>: - 8000168: 0042 lsls r2, r0, #1 - 800016a: bf1f itttt ne - 800016c: ea5f 0341 movsne.w r3, r1, lsl #1 - 8000170: ea92 0f03 teqne r2, r3 - 8000174: ea7f 6c22 mvnsne.w ip, r2, asr #24 - 8000178: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 800017c: d06a beq.n 8000254 <__addsf3+0xec> - 800017e: ea4f 6212 mov.w r2, r2, lsr #24 - 8000182: ebd2 6313 rsbs r3, r2, r3, lsr #24 - 8000186: bfc1 itttt gt - 8000188: 18d2 addgt r2, r2, r3 - 800018a: 4041 eorgt r1, r0 - 800018c: 4048 eorgt r0, r1 - 800018e: 4041 eorgt r1, r0 - 8000190: bfb8 it lt - 8000192: 425b neglt r3, r3 - 8000194: 2b19 cmp r3, #25 - 8000196: bf88 it hi - 8000198: 4770 bxhi lr - 800019a: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 - 800019e: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 80001a2: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 - 80001a6: bf18 it ne - 80001a8: 4240 negne r0, r0 - 80001aa: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 - 80001ae: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 - 80001b2: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 - 80001b6: bf18 it ne - 80001b8: 4249 negne r1, r1 - 80001ba: ea92 0f03 teq r2, r3 - 80001be: d03f beq.n 8000240 <__addsf3+0xd8> - 80001c0: f1a2 0201 sub.w r2, r2, #1 - 80001c4: fa41 fc03 asr.w ip, r1, r3 - 80001c8: eb10 000c adds.w r0, r0, ip - 80001cc: f1c3 0320 rsb r3, r3, #32 - 80001d0: fa01 f103 lsl.w r1, r1, r3 - 80001d4: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 - 80001d8: d502 bpl.n 80001e0 <__addsf3+0x78> - 80001da: 4249 negs r1, r1 - 80001dc: eb60 0040 sbc.w r0, r0, r0, lsl #1 - 80001e0: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 - 80001e4: d313 bcc.n 800020e <__addsf3+0xa6> - 80001e6: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 - 80001ea: d306 bcc.n 80001fa <__addsf3+0x92> - 80001ec: 0840 lsrs r0, r0, #1 - 80001ee: ea4f 0131 mov.w r1, r1, rrx - 80001f2: f102 0201 add.w r2, r2, #1 - 80001f6: 2afe cmp r2, #254 @ 0xfe - 80001f8: d251 bcs.n 800029e <__addsf3+0x136> - 80001fa: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 - 80001fe: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 8000202: bf08 it eq - 8000204: f020 0001 biceq.w r0, r0, #1 - 8000208: ea40 0003 orr.w r0, r0, r3 - 800020c: 4770 bx lr - 800020e: 0049 lsls r1, r1, #1 - 8000210: eb40 0000 adc.w r0, r0, r0 - 8000214: 3a01 subs r2, #1 - 8000216: bf28 it cs - 8000218: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 - 800021c: d2ed bcs.n 80001fa <__addsf3+0x92> - 800021e: fab0 fc80 clz ip, r0 - 8000222: f1ac 0c08 sub.w ip, ip, #8 - 8000226: ebb2 020c subs.w r2, r2, ip - 800022a: fa00 f00c lsl.w r0, r0, ip - 800022e: bfaa itet ge - 8000230: eb00 50c2 addge.w r0, r0, r2, lsl #23 - 8000234: 4252 neglt r2, r2 - 8000236: 4318 orrge r0, r3 - 8000238: bfbc itt lt - 800023a: 40d0 lsrlt r0, r2 - 800023c: 4318 orrlt r0, r3 - 800023e: 4770 bx lr - 8000240: f092 0f00 teq r2, #0 - 8000244: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 - 8000248: bf06 itte eq - 800024a: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 - 800024e: 3201 addeq r2, #1 - 8000250: 3b01 subne r3, #1 - 8000252: e7b5 b.n 80001c0 <__addsf3+0x58> - 8000254: ea4f 0341 mov.w r3, r1, lsl #1 - 8000258: ea7f 6c22 mvns.w ip, r2, asr #24 - 800025c: bf18 it ne - 800025e: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 8000262: d021 beq.n 80002a8 <__addsf3+0x140> - 8000264: ea92 0f03 teq r2, r3 - 8000268: d004 beq.n 8000274 <__addsf3+0x10c> - 800026a: f092 0f00 teq r2, #0 - 800026e: bf08 it eq - 8000270: 4608 moveq r0, r1 - 8000272: 4770 bx lr - 8000274: ea90 0f01 teq r0, r1 - 8000278: bf1c itt ne - 800027a: 2000 movne r0, #0 - 800027c: 4770 bxne lr - 800027e: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 - 8000282: d104 bne.n 800028e <__addsf3+0x126> - 8000284: 0040 lsls r0, r0, #1 - 8000286: bf28 it cs - 8000288: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 - 800028c: 4770 bx lr - 800028e: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 - 8000292: bf3c itt cc - 8000294: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 - 8000298: 4770 bxcc lr - 800029a: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 - 800029e: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 - 80002a2: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 80002a6: 4770 bx lr - 80002a8: ea7f 6222 mvns.w r2, r2, asr #24 - 80002ac: bf16 itet ne - 80002ae: 4608 movne r0, r1 - 80002b0: ea7f 6323 mvnseq.w r3, r3, asr #24 - 80002b4: 4601 movne r1, r0 - 80002b6: 0242 lsls r2, r0, #9 - 80002b8: bf06 itte eq - 80002ba: ea5f 2341 movseq.w r3, r1, lsl #9 - 80002be: ea90 0f01 teqeq r0, r1 - 80002c2: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 - 80002c6: 4770 bx lr - -080002c8 <__aeabi_ui2f>: - 80002c8: f04f 0300 mov.w r3, #0 - 80002cc: e004 b.n 80002d8 <__aeabi_i2f+0x8> - 80002ce: bf00 nop - -080002d0 <__aeabi_i2f>: - 80002d0: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 - 80002d4: bf48 it mi - 80002d6: 4240 negmi r0, r0 - 80002d8: ea5f 0c00 movs.w ip, r0 - 80002dc: bf08 it eq - 80002de: 4770 bxeq lr - 80002e0: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 - 80002e4: 4601 mov r1, r0 - 80002e6: f04f 0000 mov.w r0, #0 - 80002ea: e01c b.n 8000326 <__aeabi_l2f+0x2a> - -080002ec <__aeabi_ul2f>: - 80002ec: ea50 0201 orrs.w r2, r0, r1 +0800015c <__aeabi_dmul>: + 800015c: b570 push {r4, r5, r6, lr} + 800015e: f04f 0cff mov.w ip, #255 @ 0xff + 8000162: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 + 8000166: ea1c 5411 ands.w r4, ip, r1, lsr #20 + 800016a: bf1d ittte ne + 800016c: ea1c 5513 andsne.w r5, ip, r3, lsr #20 + 8000170: ea94 0f0c teqne r4, ip + 8000174: ea95 0f0c teqne r5, ip + 8000178: f000 f8de bleq 8000338 <__aeabi_dmul+0x1dc> + 800017c: 442c add r4, r5 + 800017e: ea81 0603 eor.w r6, r1, r3 + 8000182: ea21 514c bic.w r1, r1, ip, lsl #21 + 8000186: ea23 534c bic.w r3, r3, ip, lsl #21 + 800018a: ea50 3501 orrs.w r5, r0, r1, lsl #12 + 800018e: bf18 it ne + 8000190: ea52 3503 orrsne.w r5, r2, r3, lsl #12 + 8000194: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 + 8000198: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 + 800019c: d038 beq.n 8000210 <__aeabi_dmul+0xb4> + 800019e: fba0 ce02 umull ip, lr, r0, r2 + 80001a2: f04f 0500 mov.w r5, #0 + 80001a6: fbe1 e502 umlal lr, r5, r1, r2 + 80001aa: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 + 80001ae: fbe0 e503 umlal lr, r5, r0, r3 + 80001b2: f04f 0600 mov.w r6, #0 + 80001b6: fbe1 5603 umlal r5, r6, r1, r3 + 80001ba: f09c 0f00 teq ip, #0 + 80001be: bf18 it ne + 80001c0: f04e 0e01 orrne.w lr, lr, #1 + 80001c4: f1a4 04ff sub.w r4, r4, #255 @ 0xff + 80001c8: f5b6 7f00 cmp.w r6, #512 @ 0x200 + 80001cc: f564 7440 sbc.w r4, r4, #768 @ 0x300 + 80001d0: d204 bcs.n 80001dc <__aeabi_dmul+0x80> + 80001d2: ea5f 0e4e movs.w lr, lr, lsl #1 + 80001d6: 416d adcs r5, r5 + 80001d8: eb46 0606 adc.w r6, r6, r6 + 80001dc: ea42 21c6 orr.w r1, r2, r6, lsl #11 + 80001e0: ea41 5155 orr.w r1, r1, r5, lsr #21 + 80001e4: ea4f 20c5 mov.w r0, r5, lsl #11 + 80001e8: ea40 505e orr.w r0, r0, lr, lsr #21 + 80001ec: ea4f 2ece mov.w lr, lr, lsl #11 + 80001f0: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd + 80001f4: bf88 it hi + 80001f6: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 + 80001fa: d81e bhi.n 800023a <__aeabi_dmul+0xde> + 80001fc: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 + 8000200: bf08 it eq + 8000202: ea5f 0e50 movseq.w lr, r0, lsr #1 + 8000206: f150 0000 adcs.w r0, r0, #0 + 800020a: eb41 5104 adc.w r1, r1, r4, lsl #20 + 800020e: bd70 pop {r4, r5, r6, pc} + 8000210: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 + 8000214: ea46 0101 orr.w r1, r6, r1 + 8000218: ea40 0002 orr.w r0, r0, r2 + 800021c: ea81 0103 eor.w r1, r1, r3 + 8000220: ebb4 045c subs.w r4, r4, ip, lsr #1 + 8000224: bfc2 ittt gt + 8000226: ebd4 050c rsbsgt r5, r4, ip + 800022a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 + 800022e: bd70 popgt {r4, r5, r6, pc} + 8000230: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 + 8000234: f04f 0e00 mov.w lr, #0 + 8000238: 3c01 subs r4, #1 + 800023a: f300 80ab bgt.w 8000394 <__aeabi_dmul+0x238> + 800023e: f114 0f36 cmn.w r4, #54 @ 0x36 + 8000242: bfde ittt le + 8000244: 2000 movle r0, #0 + 8000246: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 + 800024a: bd70 pople {r4, r5, r6, pc} + 800024c: f1c4 0400 rsb r4, r4, #0 + 8000250: 3c20 subs r4, #32 + 8000252: da35 bge.n 80002c0 <__aeabi_dmul+0x164> + 8000254: 340c adds r4, #12 + 8000256: dc1b bgt.n 8000290 <__aeabi_dmul+0x134> + 8000258: f104 0414 add.w r4, r4, #20 + 800025c: f1c4 0520 rsb r5, r4, #32 + 8000260: fa00 f305 lsl.w r3, r0, r5 + 8000264: fa20 f004 lsr.w r0, r0, r4 + 8000268: fa01 f205 lsl.w r2, r1, r5 + 800026c: ea40 0002 orr.w r0, r0, r2 + 8000270: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 + 8000274: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 + 8000278: eb10 70d3 adds.w r0, r0, r3, lsr #31 + 800027c: fa21 f604 lsr.w r6, r1, r4 + 8000280: eb42 0106 adc.w r1, r2, r6 + 8000284: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 8000288: bf08 it eq + 800028a: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 800028e: bd70 pop {r4, r5, r6, pc} + 8000290: f1c4 040c rsb r4, r4, #12 + 8000294: f1c4 0520 rsb r5, r4, #32 + 8000298: fa00 f304 lsl.w r3, r0, r4 + 800029c: fa20 f005 lsr.w r0, r0, r5 + 80002a0: fa01 f204 lsl.w r2, r1, r4 + 80002a4: ea40 0002 orr.w r0, r0, r2 + 80002a8: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 80002ac: eb10 70d3 adds.w r0, r0, r3, lsr #31 + 80002b0: f141 0100 adc.w r1, r1, #0 + 80002b4: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 80002b8: bf08 it eq + 80002ba: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 80002be: bd70 pop {r4, r5, r6, pc} + 80002c0: f1c4 0520 rsb r5, r4, #32 + 80002c4: fa00 f205 lsl.w r2, r0, r5 + 80002c8: ea4e 0e02 orr.w lr, lr, r2 + 80002cc: fa20 f304 lsr.w r3, r0, r4 + 80002d0: fa01 f205 lsl.w r2, r1, r5 + 80002d4: ea43 0302 orr.w r3, r3, r2 + 80002d8: fa21 f004 lsr.w r0, r1, r4 + 80002dc: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 80002e0: fa21 f204 lsr.w r2, r1, r4 + 80002e4: ea20 0002 bic.w r0, r0, r2 + 80002e8: eb00 70d3 add.w r0, r0, r3, lsr #31 + 80002ec: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80002f0: bf08 it eq - 80002f2: 4770 bxeq lr - 80002f4: f04f 0300 mov.w r3, #0 - 80002f8: e00a b.n 8000310 <__aeabi_l2f+0x14> - 80002fa: bf00 nop + 80002f2: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 80002f6: bd70 pop {r4, r5, r6, pc} + 80002f8: f094 0f00 teq r4, #0 + 80002fc: d10f bne.n 800031e <__aeabi_dmul+0x1c2> + 80002fe: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 + 8000302: 0040 lsls r0, r0, #1 + 8000304: eb41 0101 adc.w r1, r1, r1 + 8000308: f411 1f80 tst.w r1, #1048576 @ 0x100000 + 800030c: bf08 it eq + 800030e: 3c01 subeq r4, #1 + 8000310: d0f7 beq.n 8000302 <__aeabi_dmul+0x1a6> + 8000312: ea41 0106 orr.w r1, r1, r6 + 8000316: f095 0f00 teq r5, #0 + 800031a: bf18 it ne + 800031c: 4770 bxne lr + 800031e: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 + 8000322: 0052 lsls r2, r2, #1 + 8000324: eb43 0303 adc.w r3, r3, r3 + 8000328: f413 1f80 tst.w r3, #1048576 @ 0x100000 + 800032c: bf08 it eq + 800032e: 3d01 subeq r5, #1 + 8000330: d0f7 beq.n 8000322 <__aeabi_dmul+0x1c6> + 8000332: ea43 0306 orr.w r3, r3, r6 + 8000336: 4770 bx lr + 8000338: ea94 0f0c teq r4, ip + 800033c: ea0c 5513 and.w r5, ip, r3, lsr #20 + 8000340: bf18 it ne + 8000342: ea95 0f0c teqne r5, ip + 8000346: d00c beq.n 8000362 <__aeabi_dmul+0x206> + 8000348: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 800034c: bf18 it ne + 800034e: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 8000352: d1d1 bne.n 80002f8 <__aeabi_dmul+0x19c> + 8000354: ea81 0103 eor.w r1, r1, r3 + 8000358: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 800035c: f04f 0000 mov.w r0, #0 + 8000360: bd70 pop {r4, r5, r6, pc} + 8000362: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 8000366: bf06 itte eq + 8000368: 4610 moveq r0, r2 + 800036a: 4619 moveq r1, r3 + 800036c: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 8000370: d019 beq.n 80003a6 <__aeabi_dmul+0x24a> + 8000372: ea94 0f0c teq r4, ip + 8000376: d102 bne.n 800037e <__aeabi_dmul+0x222> + 8000378: ea50 3601 orrs.w r6, r0, r1, lsl #12 + 800037c: d113 bne.n 80003a6 <__aeabi_dmul+0x24a> + 800037e: ea95 0f0c teq r5, ip + 8000382: d105 bne.n 8000390 <__aeabi_dmul+0x234> + 8000384: ea52 3603 orrs.w r6, r2, r3, lsl #12 + 8000388: bf1c itt ne + 800038a: 4610 movne r0, r2 + 800038c: 4619 movne r1, r3 + 800038e: d10a bne.n 80003a6 <__aeabi_dmul+0x24a> + 8000390: ea81 0103 eor.w r1, r1, r3 + 8000394: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 8000398: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 + 800039c: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 + 80003a0: f04f 0000 mov.w r0, #0 + 80003a4: bd70 pop {r4, r5, r6, pc} + 80003a6: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 + 80003aa: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 + 80003ae: bd70 pop {r4, r5, r6, pc} -080002fc <__aeabi_l2f>: - 80002fc: ea50 0201 orrs.w r2, r0, r1 - 8000300: bf08 it eq - 8000302: 4770 bxeq lr - 8000304: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 - 8000308: d502 bpl.n 8000310 <__aeabi_l2f+0x14> - 800030a: 4240 negs r0, r0 - 800030c: eb61 0141 sbc.w r1, r1, r1, lsl #1 - 8000310: ea5f 0c01 movs.w ip, r1 - 8000314: bf02 ittt eq - 8000316: 4684 moveq ip, r0 - 8000318: 4601 moveq r1, r0 - 800031a: 2000 moveq r0, #0 - 800031c: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 - 8000320: bf08 it eq - 8000322: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 - 8000326: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 - 800032a: fabc f28c clz r2, ip - 800032e: 3a08 subs r2, #8 - 8000330: eba3 53c2 sub.w r3, r3, r2, lsl #23 - 8000334: db10 blt.n 8000358 <__aeabi_l2f+0x5c> - 8000336: fa01 fc02 lsl.w ip, r1, r2 - 800033a: 4463 add r3, ip - 800033c: fa00 fc02 lsl.w ip, r0, r2 - 8000340: f1c2 0220 rsb r2, r2, #32 - 8000344: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 - 8000348: fa20 f202 lsr.w r2, r0, r2 - 800034c: eb43 0002 adc.w r0, r3, r2 - 8000350: bf08 it eq - 8000352: f020 0001 biceq.w r0, r0, #1 - 8000356: 4770 bx lr - 8000358: f102 0220 add.w r2, r2, #32 - 800035c: fa01 fc02 lsl.w ip, r1, r2 - 8000360: f1c2 0220 rsb r2, r2, #32 - 8000364: ea50 004c orrs.w r0, r0, ip, lsl #1 - 8000368: fa21 f202 lsr.w r2, r1, r2 - 800036c: eb43 0002 adc.w r0, r3, r2 - 8000370: bf08 it eq - 8000372: ea20 70dc biceq.w r0, r0, ip, lsr #31 - 8000376: 4770 bx lr +080003b0 <__aeabi_drsub>: + 80003b0: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 + 80003b4: e002 b.n 80003bc <__adddf3> + 80003b6: bf00 nop -08000378 <__aeabi_fmul>: - 8000378: f04f 0cff mov.w ip, #255 @ 0xff - 800037c: ea1c 52d0 ands.w r2, ip, r0, lsr #23 - 8000380: bf1e ittt ne - 8000382: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 - 8000386: ea92 0f0c teqne r2, ip - 800038a: ea93 0f0c teqne r3, ip - 800038e: d06f beq.n 8000470 <__aeabi_fmul+0xf8> - 8000390: 441a add r2, r3 - 8000392: ea80 0c01 eor.w ip, r0, r1 - 8000396: 0240 lsls r0, r0, #9 - 8000398: bf18 it ne - 800039a: ea5f 2141 movsne.w r1, r1, lsl #9 - 800039e: d01e beq.n 80003de <__aeabi_fmul+0x66> - 80003a0: f04f 6300 mov.w r3, #134217728 @ 0x8000000 - 80003a4: ea43 1050 orr.w r0, r3, r0, lsr #5 - 80003a8: ea43 1151 orr.w r1, r3, r1, lsr #5 - 80003ac: fba0 3101 umull r3, r1, r0, r1 - 80003b0: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 - 80003b4: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 - 80003b8: bf3e ittt cc - 80003ba: 0049 lslcc r1, r1, #1 - 80003bc: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 - 80003c0: 005b lslcc r3, r3, #1 - 80003c2: ea40 0001 orr.w r0, r0, r1 - 80003c6: f162 027f sbc.w r2, r2, #127 @ 0x7f - 80003ca: 2afd cmp r2, #253 @ 0xfd - 80003cc: d81d bhi.n 800040a <__aeabi_fmul+0x92> - 80003ce: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 - 80003d2: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 80003d6: bf08 it eq - 80003d8: f020 0001 biceq.w r0, r0, #1 - 80003dc: 4770 bx lr - 80003de: f090 0f00 teq r0, #0 - 80003e2: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 - 80003e6: bf08 it eq - 80003e8: 0249 lsleq r1, r1, #9 - 80003ea: ea4c 2050 orr.w r0, ip, r0, lsr #9 - 80003ee: ea40 2051 orr.w r0, r0, r1, lsr #9 - 80003f2: 3a7f subs r2, #127 @ 0x7f - 80003f4: bfc2 ittt gt - 80003f6: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff - 80003fa: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 - 80003fe: 4770 bxgt lr - 8000400: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 8000404: f04f 0300 mov.w r3, #0 - 8000408: 3a01 subs r2, #1 - 800040a: dc5d bgt.n 80004c8 <__aeabi_fmul+0x150> - 800040c: f112 0f19 cmn.w r2, #25 - 8000410: bfdc itt le - 8000412: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 - 8000416: 4770 bxle lr - 8000418: f1c2 0200 rsb r2, r2, #0 - 800041c: 0041 lsls r1, r0, #1 - 800041e: fa21 f102 lsr.w r1, r1, r2 - 8000422: f1c2 0220 rsb r2, r2, #32 - 8000426: fa00 fc02 lsl.w ip, r0, r2 - 800042a: ea5f 0031 movs.w r0, r1, rrx - 800042e: f140 0000 adc.w r0, r0, #0 - 8000432: ea53 034c orrs.w r3, r3, ip, lsl #1 - 8000436: bf08 it eq - 8000438: ea20 70dc biceq.w r0, r0, ip, lsr #31 - 800043c: 4770 bx lr - 800043e: f092 0f00 teq r2, #0 - 8000442: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 - 8000446: bf02 ittt eq - 8000448: 0040 lsleq r0, r0, #1 - 800044a: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 - 800044e: 3a01 subeq r2, #1 - 8000450: d0f9 beq.n 8000446 <__aeabi_fmul+0xce> - 8000452: ea40 000c orr.w r0, r0, ip - 8000456: f093 0f00 teq r3, #0 - 800045a: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 - 800045e: bf02 ittt eq - 8000460: 0049 lsleq r1, r1, #1 - 8000462: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 - 8000466: 3b01 subeq r3, #1 - 8000468: d0f9 beq.n 800045e <__aeabi_fmul+0xe6> - 800046a: ea41 010c orr.w r1, r1, ip - 800046e: e78f b.n 8000390 <__aeabi_fmul+0x18> - 8000470: ea0c 53d1 and.w r3, ip, r1, lsr #23 - 8000474: ea92 0f0c teq r2, ip - 8000478: bf18 it ne - 800047a: ea93 0f0c teqne r3, ip - 800047e: d00a beq.n 8000496 <__aeabi_fmul+0x11e> - 8000480: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 - 8000484: bf18 it ne - 8000486: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 - 800048a: d1d8 bne.n 800043e <__aeabi_fmul+0xc6> - 800048c: ea80 0001 eor.w r0, r0, r1 - 8000490: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 - 8000494: 4770 bx lr - 8000496: f090 0f00 teq r0, #0 - 800049a: bf17 itett ne - 800049c: f090 4f00 teqne r0, #2147483648 @ 0x80000000 - 80004a0: 4608 moveq r0, r1 - 80004a2: f091 0f00 teqne r1, #0 - 80004a6: f091 4f00 teqne r1, #2147483648 @ 0x80000000 - 80004aa: d014 beq.n 80004d6 <__aeabi_fmul+0x15e> - 80004ac: ea92 0f0c teq r2, ip - 80004b0: d101 bne.n 80004b6 <__aeabi_fmul+0x13e> - 80004b2: 0242 lsls r2, r0, #9 - 80004b4: d10f bne.n 80004d6 <__aeabi_fmul+0x15e> - 80004b6: ea93 0f0c teq r3, ip - 80004ba: d103 bne.n 80004c4 <__aeabi_fmul+0x14c> - 80004bc: 024b lsls r3, r1, #9 - 80004be: bf18 it ne - 80004c0: 4608 movne r0, r1 - 80004c2: d108 bne.n 80004d6 <__aeabi_fmul+0x15e> - 80004c4: ea80 0001 eor.w r0, r0, r1 - 80004c8: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 - 80004cc: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 - 80004d0: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 80004d4: 4770 bx lr - 80004d6: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 - 80004da: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 - 80004de: 4770 bx lr +080003b8 <__aeabi_dsub>: + 80003b8: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 -080004e0 <__aeabi_fdiv>: - 80004e0: f04f 0cff mov.w ip, #255 @ 0xff - 80004e4: ea1c 52d0 ands.w r2, ip, r0, lsr #23 - 80004e8: bf1e ittt ne - 80004ea: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 - 80004ee: ea92 0f0c teqne r2, ip - 80004f2: ea93 0f0c teqne r3, ip - 80004f6: d069 beq.n 80005cc <__aeabi_fdiv+0xec> - 80004f8: eba2 0203 sub.w r2, r2, r3 - 80004fc: ea80 0c01 eor.w ip, r0, r1 - 8000500: 0249 lsls r1, r1, #9 - 8000502: ea4f 2040 mov.w r0, r0, lsl #9 - 8000506: d037 beq.n 8000578 <__aeabi_fdiv+0x98> - 8000508: f04f 5380 mov.w r3, #268435456 @ 0x10000000 - 800050c: ea43 1111 orr.w r1, r3, r1, lsr #4 - 8000510: ea43 1310 orr.w r3, r3, r0, lsr #4 - 8000514: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 - 8000518: 428b cmp r3, r1 - 800051a: bf38 it cc - 800051c: 005b lslcc r3, r3, #1 - 800051e: f142 027d adc.w r2, r2, #125 @ 0x7d - 8000522: f44f 0c00 mov.w ip, #8388608 @ 0x800000 - 8000526: 428b cmp r3, r1 - 8000528: bf24 itt cs - 800052a: 1a5b subcs r3, r3, r1 - 800052c: ea40 000c orrcs.w r0, r0, ip - 8000530: ebb3 0f51 cmp.w r3, r1, lsr #1 - 8000534: bf24 itt cs - 8000536: eba3 0351 subcs.w r3, r3, r1, lsr #1 - 800053a: ea40 005c orrcs.w r0, r0, ip, lsr #1 - 800053e: ebb3 0f91 cmp.w r3, r1, lsr #2 - 8000542: bf24 itt cs - 8000544: eba3 0391 subcs.w r3, r3, r1, lsr #2 - 8000548: ea40 009c orrcs.w r0, r0, ip, lsr #2 - 800054c: ebb3 0fd1 cmp.w r3, r1, lsr #3 - 8000550: bf24 itt cs - 8000552: eba3 03d1 subcs.w r3, r3, r1, lsr #3 - 8000556: ea40 00dc orrcs.w r0, r0, ip, lsr #3 - 800055a: 011b lsls r3, r3, #4 - 800055c: bf18 it ne - 800055e: ea5f 1c1c movsne.w ip, ip, lsr #4 - 8000562: d1e0 bne.n 8000526 <__aeabi_fdiv+0x46> - 8000564: 2afd cmp r2, #253 @ 0xfd - 8000566: f63f af50 bhi.w 800040a <__aeabi_fmul+0x92> - 800056a: 428b cmp r3, r1 - 800056c: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 8000570: bf08 it eq - 8000572: f020 0001 biceq.w r0, r0, #1 - 8000576: 4770 bx lr - 8000578: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 - 800057c: ea4c 2050 orr.w r0, ip, r0, lsr #9 - 8000580: 327f adds r2, #127 @ 0x7f - 8000582: bfc2 ittt gt - 8000584: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff - 8000588: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 - 800058c: 4770 bxgt lr - 800058e: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 8000592: f04f 0300 mov.w r3, #0 - 8000596: 3a01 subs r2, #1 - 8000598: e737 b.n 800040a <__aeabi_fmul+0x92> - 800059a: f092 0f00 teq r2, #0 - 800059e: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 - 80005a2: bf02 ittt eq - 80005a4: 0040 lsleq r0, r0, #1 - 80005a6: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 - 80005aa: 3a01 subeq r2, #1 - 80005ac: d0f9 beq.n 80005a2 <__aeabi_fdiv+0xc2> - 80005ae: ea40 000c orr.w r0, r0, ip - 80005b2: f093 0f00 teq r3, #0 - 80005b6: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 - 80005ba: bf02 ittt eq - 80005bc: 0049 lsleq r1, r1, #1 - 80005be: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 - 80005c2: 3b01 subeq r3, #1 - 80005c4: d0f9 beq.n 80005ba <__aeabi_fdiv+0xda> - 80005c6: ea41 010c orr.w r1, r1, ip - 80005ca: e795 b.n 80004f8 <__aeabi_fdiv+0x18> - 80005cc: ea0c 53d1 and.w r3, ip, r1, lsr #23 - 80005d0: ea92 0f0c teq r2, ip - 80005d4: d108 bne.n 80005e8 <__aeabi_fdiv+0x108> - 80005d6: 0242 lsls r2, r0, #9 - 80005d8: f47f af7d bne.w 80004d6 <__aeabi_fmul+0x15e> - 80005dc: ea93 0f0c teq r3, ip - 80005e0: f47f af70 bne.w 80004c4 <__aeabi_fmul+0x14c> - 80005e4: 4608 mov r0, r1 - 80005e6: e776 b.n 80004d6 <__aeabi_fmul+0x15e> - 80005e8: ea93 0f0c teq r3, ip - 80005ec: d104 bne.n 80005f8 <__aeabi_fdiv+0x118> - 80005ee: 024b lsls r3, r1, #9 - 80005f0: f43f af4c beq.w 800048c <__aeabi_fmul+0x114> - 80005f4: 4608 mov r0, r1 - 80005f6: e76e b.n 80004d6 <__aeabi_fmul+0x15e> - 80005f8: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 - 80005fc: bf18 it ne - 80005fe: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 - 8000602: d1ca bne.n 800059a <__aeabi_fdiv+0xba> - 8000604: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 - 8000608: f47f af5c bne.w 80004c4 <__aeabi_fmul+0x14c> - 800060c: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 - 8000610: f47f af3c bne.w 800048c <__aeabi_fmul+0x114> - 8000614: e75f b.n 80004d6 <__aeabi_fmul+0x15e> - 8000616: bf00 nop +080003bc <__adddf3>: + 80003bc: b530 push {r4, r5, lr} + 80003be: ea4f 0441 mov.w r4, r1, lsl #1 + 80003c2: ea4f 0543 mov.w r5, r3, lsl #1 + 80003c6: ea94 0f05 teq r4, r5 + 80003ca: bf08 it eq + 80003cc: ea90 0f02 teqeq r0, r2 + 80003d0: bf1f itttt ne + 80003d2: ea54 0c00 orrsne.w ip, r4, r0 + 80003d6: ea55 0c02 orrsne.w ip, r5, r2 + 80003da: ea7f 5c64 mvnsne.w ip, r4, asr #21 + 80003de: ea7f 5c65 mvnsne.w ip, r5, asr #21 + 80003e2: f000 80e2 beq.w 80005aa <__adddf3+0x1ee> + 80003e6: ea4f 5454 mov.w r4, r4, lsr #21 + 80003ea: ebd4 5555 rsbs r5, r4, r5, lsr #21 + 80003ee: bfb8 it lt + 80003f0: 426d neglt r5, r5 + 80003f2: dd0c ble.n 800040e <__adddf3+0x52> + 80003f4: 442c add r4, r5 + 80003f6: ea80 0202 eor.w r2, r0, r2 + 80003fa: ea81 0303 eor.w r3, r1, r3 + 80003fe: ea82 0000 eor.w r0, r2, r0 + 8000402: ea83 0101 eor.w r1, r3, r1 + 8000406: ea80 0202 eor.w r2, r0, r2 + 800040a: ea81 0303 eor.w r3, r1, r3 + 800040e: 2d36 cmp r5, #54 @ 0x36 + 8000410: bf88 it hi + 8000412: bd30 pophi {r4, r5, pc} + 8000414: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 + 8000418: ea4f 3101 mov.w r1, r1, lsl #12 + 800041c: f44f 1c80 mov.w ip, #1048576 @ 0x100000 + 8000420: ea4c 3111 orr.w r1, ip, r1, lsr #12 + 8000424: d002 beq.n 800042c <__adddf3+0x70> + 8000426: 4240 negs r0, r0 + 8000428: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 800042c: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 + 8000430: ea4f 3303 mov.w r3, r3, lsl #12 + 8000434: ea4c 3313 orr.w r3, ip, r3, lsr #12 + 8000438: d002 beq.n 8000440 <__adddf3+0x84> + 800043a: 4252 negs r2, r2 + 800043c: eb63 0343 sbc.w r3, r3, r3, lsl #1 + 8000440: ea94 0f05 teq r4, r5 + 8000444: f000 80a7 beq.w 8000596 <__adddf3+0x1da> + 8000448: f1a4 0401 sub.w r4, r4, #1 + 800044c: f1d5 0e20 rsbs lr, r5, #32 + 8000450: db0d blt.n 800046e <__adddf3+0xb2> + 8000452: fa02 fc0e lsl.w ip, r2, lr + 8000456: fa22 f205 lsr.w r2, r2, r5 + 800045a: 1880 adds r0, r0, r2 + 800045c: f141 0100 adc.w r1, r1, #0 + 8000460: fa03 f20e lsl.w r2, r3, lr + 8000464: 1880 adds r0, r0, r2 + 8000466: fa43 f305 asr.w r3, r3, r5 + 800046a: 4159 adcs r1, r3 + 800046c: e00e b.n 800048c <__adddf3+0xd0> + 800046e: f1a5 0520 sub.w r5, r5, #32 + 8000472: f10e 0e20 add.w lr, lr, #32 + 8000476: 2a01 cmp r2, #1 + 8000478: fa03 fc0e lsl.w ip, r3, lr + 800047c: bf28 it cs + 800047e: f04c 0c02 orrcs.w ip, ip, #2 + 8000482: fa43 f305 asr.w r3, r3, r5 + 8000486: 18c0 adds r0, r0, r3 + 8000488: eb51 71e3 adcs.w r1, r1, r3, asr #31 + 800048c: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 + 8000490: d507 bpl.n 80004a2 <__adddf3+0xe6> + 8000492: f04f 0e00 mov.w lr, #0 + 8000496: f1dc 0c00 rsbs ip, ip, #0 + 800049a: eb7e 0000 sbcs.w r0, lr, r0 + 800049e: eb6e 0101 sbc.w r1, lr, r1 + 80004a2: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 + 80004a6: d31b bcc.n 80004e0 <__adddf3+0x124> + 80004a8: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 + 80004ac: d30c bcc.n 80004c8 <__adddf3+0x10c> + 80004ae: 0849 lsrs r1, r1, #1 + 80004b0: ea5f 0030 movs.w r0, r0, rrx + 80004b4: ea4f 0c3c mov.w ip, ip, rrx + 80004b8: f104 0401 add.w r4, r4, #1 + 80004bc: ea4f 5244 mov.w r2, r4, lsl #21 + 80004c0: f512 0f80 cmn.w r2, #4194304 @ 0x400000 + 80004c4: f080 809a bcs.w 80005fc <__adddf3+0x240> + 80004c8: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 + 80004cc: bf08 it eq + 80004ce: ea5f 0c50 movseq.w ip, r0, lsr #1 + 80004d2: f150 0000 adcs.w r0, r0, #0 + 80004d6: eb41 5104 adc.w r1, r1, r4, lsl #20 + 80004da: ea41 0105 orr.w r1, r1, r5 + 80004de: bd30 pop {r4, r5, pc} + 80004e0: ea5f 0c4c movs.w ip, ip, lsl #1 + 80004e4: 4140 adcs r0, r0 + 80004e6: eb41 0101 adc.w r1, r1, r1 + 80004ea: 3c01 subs r4, #1 + 80004ec: bf28 it cs + 80004ee: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 + 80004f2: d2e9 bcs.n 80004c8 <__adddf3+0x10c> + 80004f4: f091 0f00 teq r1, #0 + 80004f8: bf04 itt eq + 80004fa: 4601 moveq r1, r0 + 80004fc: 2000 moveq r0, #0 + 80004fe: fab1 f381 clz r3, r1 + 8000502: bf08 it eq + 8000504: 3320 addeq r3, #32 + 8000506: f1a3 030b sub.w r3, r3, #11 + 800050a: f1b3 0220 subs.w r2, r3, #32 + 800050e: da0c bge.n 800052a <__adddf3+0x16e> + 8000510: 320c adds r2, #12 + 8000512: dd08 ble.n 8000526 <__adddf3+0x16a> + 8000514: f102 0c14 add.w ip, r2, #20 + 8000518: f1c2 020c rsb r2, r2, #12 + 800051c: fa01 f00c lsl.w r0, r1, ip + 8000520: fa21 f102 lsr.w r1, r1, r2 + 8000524: e00c b.n 8000540 <__adddf3+0x184> + 8000526: f102 0214 add.w r2, r2, #20 + 800052a: bfd8 it le + 800052c: f1c2 0c20 rsble ip, r2, #32 + 8000530: fa01 f102 lsl.w r1, r1, r2 + 8000534: fa20 fc0c lsr.w ip, r0, ip + 8000538: bfdc itt le + 800053a: ea41 010c orrle.w r1, r1, ip + 800053e: 4090 lslle r0, r2 + 8000540: 1ae4 subs r4, r4, r3 + 8000542: bfa2 ittt ge + 8000544: eb01 5104 addge.w r1, r1, r4, lsl #20 + 8000548: 4329 orrge r1, r5 + 800054a: bd30 popge {r4, r5, pc} + 800054c: ea6f 0404 mvn.w r4, r4 + 8000550: 3c1f subs r4, #31 + 8000552: da1c bge.n 800058e <__adddf3+0x1d2> + 8000554: 340c adds r4, #12 + 8000556: dc0e bgt.n 8000576 <__adddf3+0x1ba> + 8000558: f104 0414 add.w r4, r4, #20 + 800055c: f1c4 0220 rsb r2, r4, #32 + 8000560: fa20 f004 lsr.w r0, r0, r4 + 8000564: fa01 f302 lsl.w r3, r1, r2 + 8000568: ea40 0003 orr.w r0, r0, r3 + 800056c: fa21 f304 lsr.w r3, r1, r4 + 8000570: ea45 0103 orr.w r1, r5, r3 + 8000574: bd30 pop {r4, r5, pc} + 8000576: f1c4 040c rsb r4, r4, #12 + 800057a: f1c4 0220 rsb r2, r4, #32 + 800057e: fa20 f002 lsr.w r0, r0, r2 + 8000582: fa01 f304 lsl.w r3, r1, r4 + 8000586: ea40 0003 orr.w r0, r0, r3 + 800058a: 4629 mov r1, r5 + 800058c: bd30 pop {r4, r5, pc} + 800058e: fa21 f004 lsr.w r0, r1, r4 + 8000592: 4629 mov r1, r5 + 8000594: bd30 pop {r4, r5, pc} + 8000596: f094 0f00 teq r4, #0 + 800059a: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 + 800059e: bf06 itte eq + 80005a0: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 + 80005a4: 3401 addeq r4, #1 + 80005a6: 3d01 subne r5, #1 + 80005a8: e74e b.n 8000448 <__adddf3+0x8c> + 80005aa: ea7f 5c64 mvns.w ip, r4, asr #21 + 80005ae: bf18 it ne + 80005b0: ea7f 5c65 mvnsne.w ip, r5, asr #21 + 80005b4: d029 beq.n 800060a <__adddf3+0x24e> + 80005b6: ea94 0f05 teq r4, r5 + 80005ba: bf08 it eq + 80005bc: ea90 0f02 teqeq r0, r2 + 80005c0: d005 beq.n 80005ce <__adddf3+0x212> + 80005c2: ea54 0c00 orrs.w ip, r4, r0 + 80005c6: bf04 itt eq + 80005c8: 4619 moveq r1, r3 + 80005ca: 4610 moveq r0, r2 + 80005cc: bd30 pop {r4, r5, pc} + 80005ce: ea91 0f03 teq r1, r3 + 80005d2: bf1e ittt ne + 80005d4: 2100 movne r1, #0 + 80005d6: 2000 movne r0, #0 + 80005d8: bd30 popne {r4, r5, pc} + 80005da: ea5f 5c54 movs.w ip, r4, lsr #21 + 80005de: d105 bne.n 80005ec <__adddf3+0x230> + 80005e0: 0040 lsls r0, r0, #1 + 80005e2: 4149 adcs r1, r1 + 80005e4: bf28 it cs + 80005e6: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 + 80005ea: bd30 pop {r4, r5, pc} + 80005ec: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 + 80005f0: bf3c itt cc + 80005f2: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 + 80005f6: bd30 popcc {r4, r5, pc} + 80005f8: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 + 80005fc: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 + 8000600: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 + 8000604: f04f 0000 mov.w r0, #0 + 8000608: bd30 pop {r4, r5, pc} + 800060a: ea7f 5c64 mvns.w ip, r4, asr #21 + 800060e: bf1a itte ne + 8000610: 4619 movne r1, r3 + 8000612: 4610 movne r0, r2 + 8000614: ea7f 5c65 mvnseq.w ip, r5, asr #21 + 8000618: bf1c itt ne + 800061a: 460b movne r3, r1 + 800061c: 4602 movne r2, r0 + 800061e: ea50 3401 orrs.w r4, r0, r1, lsl #12 + 8000622: bf06 itte eq + 8000624: ea52 3503 orrseq.w r5, r2, r3, lsl #12 + 8000628: ea91 0f03 teqeq r1, r3 + 800062c: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 + 8000630: bd30 pop {r4, r5, pc} + 8000632: bf00 nop -08000618 <__gesf2>: - 8000618: f04f 3cff mov.w ip, #4294967295 - 800061c: e006 b.n 800062c <__cmpsf2+0x4> - 800061e: bf00 nop +08000634 <__aeabi_ui2d>: + 8000634: f090 0f00 teq r0, #0 + 8000638: bf04 itt eq + 800063a: 2100 moveq r1, #0 + 800063c: 4770 bxeq lr + 800063e: b530 push {r4, r5, lr} + 8000640: f44f 6480 mov.w r4, #1024 @ 0x400 + 8000644: f104 0432 add.w r4, r4, #50 @ 0x32 + 8000648: f04f 0500 mov.w r5, #0 + 800064c: f04f 0100 mov.w r1, #0 + 8000650: e750 b.n 80004f4 <__adddf3+0x138> + 8000652: bf00 nop -08000620 <__lesf2>: - 8000620: f04f 0c01 mov.w ip, #1 - 8000624: e002 b.n 800062c <__cmpsf2+0x4> - 8000626: bf00 nop +08000654 <__aeabi_i2d>: + 8000654: f090 0f00 teq r0, #0 + 8000658: bf04 itt eq + 800065a: 2100 moveq r1, #0 + 800065c: 4770 bxeq lr + 800065e: b530 push {r4, r5, lr} + 8000660: f44f 6480 mov.w r4, #1024 @ 0x400 + 8000664: f104 0432 add.w r4, r4, #50 @ 0x32 + 8000668: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 + 800066c: bf48 it mi + 800066e: 4240 negmi r0, r0 + 8000670: f04f 0100 mov.w r1, #0 + 8000674: e73e b.n 80004f4 <__adddf3+0x138> + 8000676: bf00 nop -08000628 <__cmpsf2>: - 8000628: f04f 0c01 mov.w ip, #1 - 800062c: f84d cd04 str.w ip, [sp, #-4]! - 8000630: ea4f 0240 mov.w r2, r0, lsl #1 - 8000634: ea4f 0341 mov.w r3, r1, lsl #1 - 8000638: ea7f 6c22 mvns.w ip, r2, asr #24 - 800063c: bf18 it ne - 800063e: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 8000642: d011 beq.n 8000668 <__cmpsf2+0x40> - 8000644: b001 add sp, #4 - 8000646: ea52 0c53 orrs.w ip, r2, r3, lsr #1 - 800064a: bf18 it ne - 800064c: ea90 0f01 teqne r0, r1 - 8000650: bf58 it pl - 8000652: ebb2 0003 subspl.w r0, r2, r3 - 8000656: bf88 it hi - 8000658: 17c8 asrhi r0, r1, #31 - 800065a: bf38 it cc - 800065c: ea6f 70e1 mvncc.w r0, r1, asr #31 - 8000660: bf18 it ne - 8000662: f040 0001 orrne.w r0, r0, #1 - 8000666: 4770 bx lr - 8000668: ea7f 6c22 mvns.w ip, r2, asr #24 - 800066c: d102 bne.n 8000674 <__cmpsf2+0x4c> - 800066e: ea5f 2c40 movs.w ip, r0, lsl #9 - 8000672: d105 bne.n 8000680 <__cmpsf2+0x58> - 8000674: ea7f 6c23 mvns.w ip, r3, asr #24 - 8000678: d1e4 bne.n 8000644 <__cmpsf2+0x1c> - 800067a: ea5f 2c41 movs.w ip, r1, lsl #9 - 800067e: d0e1 beq.n 8000644 <__cmpsf2+0x1c> - 8000680: f85d 0b04 ldr.w r0, [sp], #4 - 8000684: 4770 bx lr - 8000686: bf00 nop +08000678 <__aeabi_f2d>: + 8000678: 0042 lsls r2, r0, #1 + 800067a: ea4f 01e2 mov.w r1, r2, asr #3 + 800067e: ea4f 0131 mov.w r1, r1, rrx + 8000682: ea4f 7002 mov.w r0, r2, lsl #28 + 8000686: bf1f itttt ne + 8000688: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 + 800068c: f093 4f7f teqne r3, #4278190080 @ 0xff000000 + 8000690: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 + 8000694: 4770 bxne lr + 8000696: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 + 800069a: bf08 it eq + 800069c: 4770 bxeq lr + 800069e: f093 4f7f teq r3, #4278190080 @ 0xff000000 + 80006a2: bf04 itt eq + 80006a4: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 + 80006a8: 4770 bxeq lr + 80006aa: b530 push {r4, r5, lr} + 80006ac: f44f 7460 mov.w r4, #896 @ 0x380 + 80006b0: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 + 80006b4: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 + 80006b8: e71c b.n 80004f4 <__adddf3+0x138> + 80006ba: bf00 nop -08000688 <__aeabi_cfrcmple>: - 8000688: 4684 mov ip, r0 - 800068a: 4608 mov r0, r1 - 800068c: 4661 mov r1, ip - 800068e: e7ff b.n 8000690 <__aeabi_cfcmpeq> +080006bc <__aeabi_ul2d>: + 80006bc: ea50 0201 orrs.w r2, r0, r1 + 80006c0: bf08 it eq + 80006c2: 4770 bxeq lr + 80006c4: b530 push {r4, r5, lr} + 80006c6: f04f 0500 mov.w r5, #0 + 80006ca: e00a b.n 80006e2 <__aeabi_l2d+0x16> -08000690 <__aeabi_cfcmpeq>: - 8000690: b50f push {r0, r1, r2, r3, lr} - 8000692: f7ff ffc9 bl 8000628 <__cmpsf2> - 8000696: 2800 cmp r0, #0 - 8000698: bf48 it mi - 800069a: f110 0f00 cmnmi.w r0, #0 - 800069e: bd0f pop {r0, r1, r2, r3, pc} +080006cc <__aeabi_l2d>: + 80006cc: ea50 0201 orrs.w r2, r0, r1 + 80006d0: bf08 it eq + 80006d2: 4770 bxeq lr + 80006d4: b530 push {r4, r5, lr} + 80006d6: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 + 80006da: d502 bpl.n 80006e2 <__aeabi_l2d+0x16> + 80006dc: 4240 negs r0, r0 + 80006de: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 80006e2: f44f 6480 mov.w r4, #1024 @ 0x400 + 80006e6: f104 0432 add.w r4, r4, #50 @ 0x32 + 80006ea: ea5f 5c91 movs.w ip, r1, lsr #22 + 80006ee: f43f aed8 beq.w 80004a2 <__adddf3+0xe6> + 80006f2: f04f 0203 mov.w r2, #3 + 80006f6: ea5f 0cdc movs.w ip, ip, lsr #3 + 80006fa: bf18 it ne + 80006fc: 3203 addne r2, #3 + 80006fe: ea5f 0cdc movs.w ip, ip, lsr #3 + 8000702: bf18 it ne + 8000704: 3203 addne r2, #3 + 8000706: eb02 02dc add.w r2, r2, ip, lsr #3 + 800070a: f1c2 0320 rsb r3, r2, #32 + 800070e: fa00 fc03 lsl.w ip, r0, r3 + 8000712: fa20 f002 lsr.w r0, r0, r2 + 8000716: fa01 fe03 lsl.w lr, r1, r3 + 800071a: ea40 000e orr.w r0, r0, lr + 800071e: fa21 f102 lsr.w r1, r1, r2 + 8000722: 4414 add r4, r2 + 8000724: e6bd b.n 80004a2 <__adddf3+0xe6> + 8000726: bf00 nop -080006a0 <__aeabi_fcmpeq>: - 80006a0: f84d ed08 str.w lr, [sp, #-8]! - 80006a4: f7ff fff4 bl 8000690 <__aeabi_cfcmpeq> - 80006a8: bf0c ite eq - 80006aa: 2001 moveq r0, #1 - 80006ac: 2000 movne r0, #0 - 80006ae: f85d fb08 ldr.w pc, [sp], #8 - 80006b2: bf00 nop +08000728 <__gedf2>: + 8000728: f04f 3cff mov.w ip, #4294967295 + 800072c: e006 b.n 800073c <__cmpdf2+0x4> + 800072e: bf00 nop -080006b4 <__aeabi_fcmplt>: - 80006b4: f84d ed08 str.w lr, [sp, #-8]! - 80006b8: f7ff ffea bl 8000690 <__aeabi_cfcmpeq> - 80006bc: bf34 ite cc - 80006be: 2001 movcc r0, #1 - 80006c0: 2000 movcs r0, #0 - 80006c2: f85d fb08 ldr.w pc, [sp], #8 - 80006c6: bf00 nop +08000730 <__ledf2>: + 8000730: f04f 0c01 mov.w ip, #1 + 8000734: e002 b.n 800073c <__cmpdf2+0x4> + 8000736: bf00 nop -080006c8 <__aeabi_fcmple>: - 80006c8: f84d ed08 str.w lr, [sp, #-8]! - 80006cc: f7ff ffe0 bl 8000690 <__aeabi_cfcmpeq> - 80006d0: bf94 ite ls - 80006d2: 2001 movls r0, #1 - 80006d4: 2000 movhi r0, #0 - 80006d6: f85d fb08 ldr.w pc, [sp], #8 - 80006da: bf00 nop +08000738 <__cmpdf2>: + 8000738: f04f 0c01 mov.w ip, #1 + 800073c: f84d cd04 str.w ip, [sp, #-4]! + 8000740: ea4f 0c41 mov.w ip, r1, lsl #1 + 8000744: ea7f 5c6c mvns.w ip, ip, asr #21 + 8000748: ea4f 0c43 mov.w ip, r3, lsl #1 + 800074c: bf18 it ne + 800074e: ea7f 5c6c mvnsne.w ip, ip, asr #21 + 8000752: d01b beq.n 800078c <__cmpdf2+0x54> + 8000754: b001 add sp, #4 + 8000756: ea50 0c41 orrs.w ip, r0, r1, lsl #1 + 800075a: bf0c ite eq + 800075c: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 + 8000760: ea91 0f03 teqne r1, r3 + 8000764: bf02 ittt eq + 8000766: ea90 0f02 teqeq r0, r2 + 800076a: 2000 moveq r0, #0 + 800076c: 4770 bxeq lr + 800076e: f110 0f00 cmn.w r0, #0 + 8000772: ea91 0f03 teq r1, r3 + 8000776: bf58 it pl + 8000778: 4299 cmppl r1, r3 + 800077a: bf08 it eq + 800077c: 4290 cmpeq r0, r2 + 800077e: bf2c ite cs + 8000780: 17d8 asrcs r0, r3, #31 + 8000782: ea6f 70e3 mvncc.w r0, r3, asr #31 + 8000786: f040 0001 orr.w r0, r0, #1 + 800078a: 4770 bx lr + 800078c: ea4f 0c41 mov.w ip, r1, lsl #1 + 8000790: ea7f 5c6c mvns.w ip, ip, asr #21 + 8000794: d102 bne.n 800079c <__cmpdf2+0x64> + 8000796: ea50 3c01 orrs.w ip, r0, r1, lsl #12 + 800079a: d107 bne.n 80007ac <__cmpdf2+0x74> + 800079c: ea4f 0c43 mov.w ip, r3, lsl #1 + 80007a0: ea7f 5c6c mvns.w ip, ip, asr #21 + 80007a4: d1d6 bne.n 8000754 <__cmpdf2+0x1c> + 80007a6: ea52 3c03 orrs.w ip, r2, r3, lsl #12 + 80007aa: d0d3 beq.n 8000754 <__cmpdf2+0x1c> + 80007ac: f85d 0b04 ldr.w r0, [sp], #4 + 80007b0: 4770 bx lr + 80007b2: bf00 nop -080006dc <__aeabi_fcmpge>: - 80006dc: f84d ed08 str.w lr, [sp, #-8]! - 80006e0: f7ff ffd2 bl 8000688 <__aeabi_cfrcmple> - 80006e4: bf94 ite ls - 80006e6: 2001 movls r0, #1 - 80006e8: 2000 movhi r0, #0 - 80006ea: f85d fb08 ldr.w pc, [sp], #8 - 80006ee: bf00 nop +080007b4 <__aeabi_cdrcmple>: + 80007b4: 4684 mov ip, r0 + 80007b6: 4610 mov r0, r2 + 80007b8: 4662 mov r2, ip + 80007ba: 468c mov ip, r1 + 80007bc: 4619 mov r1, r3 + 80007be: 4663 mov r3, ip + 80007c0: e000 b.n 80007c4 <__aeabi_cdcmpeq> + 80007c2: bf00 nop -080006f0 <__aeabi_fcmpgt>: - 80006f0: f84d ed08 str.w lr, [sp, #-8]! - 80006f4: f7ff ffc8 bl 8000688 <__aeabi_cfrcmple> - 80006f8: bf34 ite cc - 80006fa: 2001 movcc r0, #1 - 80006fc: 2000 movcs r0, #0 - 80006fe: f85d fb08 ldr.w pc, [sp], #8 - 8000702: bf00 nop +080007c4 <__aeabi_cdcmpeq>: + 80007c4: b501 push {r0, lr} + 80007c6: f7ff ffb7 bl 8000738 <__cmpdf2> + 80007ca: 2800 cmp r0, #0 + 80007cc: bf48 it mi + 80007ce: f110 0f00 cmnmi.w r0, #0 + 80007d2: bd01 pop {r0, pc} -08000704 <__aeabi_fcmpun>: - 8000704: ea4f 0240 mov.w r2, r0, lsl #1 - 8000708: ea4f 0341 mov.w r3, r1, lsl #1 - 800070c: ea7f 6c22 mvns.w ip, r2, asr #24 - 8000710: d102 bne.n 8000718 <__aeabi_fcmpun+0x14> - 8000712: ea5f 2c40 movs.w ip, r0, lsl #9 - 8000716: d108 bne.n 800072a <__aeabi_fcmpun+0x26> - 8000718: ea7f 6c23 mvns.w ip, r3, asr #24 - 800071c: d102 bne.n 8000724 <__aeabi_fcmpun+0x20> - 800071e: ea5f 2c41 movs.w ip, r1, lsl #9 - 8000722: d102 bne.n 800072a <__aeabi_fcmpun+0x26> - 8000724: f04f 0000 mov.w r0, #0 - 8000728: 4770 bx lr - 800072a: f04f 0001 mov.w r0, #1 - 800072e: 4770 bx lr +080007d4 <__aeabi_dcmpeq>: + 80007d4: f84d ed08 str.w lr, [sp, #-8]! + 80007d8: f7ff fff4 bl 80007c4 <__aeabi_cdcmpeq> + 80007dc: bf0c ite eq + 80007de: 2001 moveq r0, #1 + 80007e0: 2000 movne r0, #0 + 80007e2: f85d fb08 ldr.w pc, [sp], #8 + 80007e6: bf00 nop -08000730 <__aeabi_f2uiz>: - 8000730: 0042 lsls r2, r0, #1 - 8000732: d20e bcs.n 8000752 <__aeabi_f2uiz+0x22> - 8000734: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 - 8000738: d30b bcc.n 8000752 <__aeabi_f2uiz+0x22> - 800073a: f04f 039e mov.w r3, #158 @ 0x9e - 800073e: ebb3 6212 subs.w r2, r3, r2, lsr #24 - 8000742: d409 bmi.n 8000758 <__aeabi_f2uiz+0x28> - 8000744: ea4f 2300 mov.w r3, r0, lsl #8 - 8000748: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 - 800074c: fa23 f002 lsr.w r0, r3, r2 - 8000750: 4770 bx lr - 8000752: f04f 0000 mov.w r0, #0 - 8000756: 4770 bx lr - 8000758: f112 0f61 cmn.w r2, #97 @ 0x61 - 800075c: d101 bne.n 8000762 <__aeabi_f2uiz+0x32> - 800075e: 0242 lsls r2, r0, #9 - 8000760: d102 bne.n 8000768 <__aeabi_f2uiz+0x38> - 8000762: f04f 30ff mov.w r0, #4294967295 - 8000766: 4770 bx lr - 8000768: f04f 0000 mov.w r0, #0 - 800076c: 4770 bx lr - 800076e: bf00 nop +080007e8 <__aeabi_dcmplt>: + 80007e8: f84d ed08 str.w lr, [sp, #-8]! + 80007ec: f7ff ffea bl 80007c4 <__aeabi_cdcmpeq> + 80007f0: bf34 ite cc + 80007f2: 2001 movcc r0, #1 + 80007f4: 2000 movcs r0, #0 + 80007f6: f85d fb08 ldr.w pc, [sp], #8 + 80007fa: bf00 nop -08000770 : +080007fc <__aeabi_dcmple>: + 80007fc: f84d ed08 str.w lr, [sp, #-8]! + 8000800: f7ff ffe0 bl 80007c4 <__aeabi_cdcmpeq> + 8000804: bf94 ite ls + 8000806: 2001 movls r0, #1 + 8000808: 2000 movhi r0, #0 + 800080a: f85d fb08 ldr.w pc, [sp], #8 + 800080e: bf00 nop + +08000810 <__aeabi_dcmpge>: + 8000810: f84d ed08 str.w lr, [sp, #-8]! + 8000814: f7ff ffce bl 80007b4 <__aeabi_cdrcmple> + 8000818: bf94 ite ls + 800081a: 2001 movls r0, #1 + 800081c: 2000 movhi r0, #0 + 800081e: f85d fb08 ldr.w pc, [sp], #8 + 8000822: bf00 nop + +08000824 <__aeabi_dcmpgt>: + 8000824: f84d ed08 str.w lr, [sp, #-8]! + 8000828: f7ff ffc4 bl 80007b4 <__aeabi_cdrcmple> + 800082c: bf34 ite cc + 800082e: 2001 movcc r0, #1 + 8000830: 2000 movcs r0, #0 + 8000832: f85d fb08 ldr.w pc, [sp], #8 + 8000836: bf00 nop + +08000838 <__aeabi_d2iz>: + 8000838: ea4f 0241 mov.w r2, r1, lsl #1 + 800083c: f512 1200 adds.w r2, r2, #2097152 @ 0x200000 + 8000840: d215 bcs.n 800086e <__aeabi_d2iz+0x36> + 8000842: d511 bpl.n 8000868 <__aeabi_d2iz+0x30> + 8000844: f46f 7378 mvn.w r3, #992 @ 0x3e0 + 8000848: ebb3 5262 subs.w r2, r3, r2, asr #21 + 800084c: d912 bls.n 8000874 <__aeabi_d2iz+0x3c> + 800084e: ea4f 23c1 mov.w r3, r1, lsl #11 + 8000852: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 + 8000856: ea43 5350 orr.w r3, r3, r0, lsr #21 + 800085a: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 + 800085e: fa23 f002 lsr.w r0, r3, r2 + 8000862: bf18 it ne + 8000864: 4240 negne r0, r0 + 8000866: 4770 bx lr + 8000868: f04f 0000 mov.w r0, #0 + 800086c: 4770 bx lr + 800086e: ea50 3001 orrs.w r0, r0, r1, lsl #12 + 8000872: d105 bne.n 8000880 <__aeabi_d2iz+0x48> + 8000874: f011 4000 ands.w r0, r1, #2147483648 @ 0x80000000 + 8000878: bf08 it eq + 800087a: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 + 800087e: 4770 bx lr + 8000880: f04f 0000 mov.w r0, #0 + 8000884: 4770 bx lr + 8000886: bf00 nop + +08000888 <__aeabi_frsub>: + 8000888: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 + 800088c: e002 b.n 8000894 <__addsf3> + 800088e: bf00 nop + +08000890 <__aeabi_fsub>: + 8000890: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 + +08000894 <__addsf3>: + 8000894: 0042 lsls r2, r0, #1 + 8000896: bf1f itttt ne + 8000898: ea5f 0341 movsne.w r3, r1, lsl #1 + 800089c: ea92 0f03 teqne r2, r3 + 80008a0: ea7f 6c22 mvnsne.w ip, r2, asr #24 + 80008a4: ea7f 6c23 mvnsne.w ip, r3, asr #24 + 80008a8: d06a beq.n 8000980 <__addsf3+0xec> + 80008aa: ea4f 6212 mov.w r2, r2, lsr #24 + 80008ae: ebd2 6313 rsbs r3, r2, r3, lsr #24 + 80008b2: bfc1 itttt gt + 80008b4: 18d2 addgt r2, r2, r3 + 80008b6: 4041 eorgt r1, r0 + 80008b8: 4048 eorgt r0, r1 + 80008ba: 4041 eorgt r1, r0 + 80008bc: bfb8 it lt + 80008be: 425b neglt r3, r3 + 80008c0: 2b19 cmp r3, #25 + 80008c2: bf88 it hi + 80008c4: 4770 bxhi lr + 80008c6: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 + 80008ca: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 80008ce: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 + 80008d2: bf18 it ne + 80008d4: 4240 negne r0, r0 + 80008d6: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 + 80008da: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 + 80008de: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 + 80008e2: bf18 it ne + 80008e4: 4249 negne r1, r1 + 80008e6: ea92 0f03 teq r2, r3 + 80008ea: d03f beq.n 800096c <__addsf3+0xd8> + 80008ec: f1a2 0201 sub.w r2, r2, #1 + 80008f0: fa41 fc03 asr.w ip, r1, r3 + 80008f4: eb10 000c adds.w r0, r0, ip + 80008f8: f1c3 0320 rsb r3, r3, #32 + 80008fc: fa01 f103 lsl.w r1, r1, r3 + 8000900: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 + 8000904: d502 bpl.n 800090c <__addsf3+0x78> + 8000906: 4249 negs r1, r1 + 8000908: eb60 0040 sbc.w r0, r0, r0, lsl #1 + 800090c: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 + 8000910: d313 bcc.n 800093a <__addsf3+0xa6> + 8000912: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 + 8000916: d306 bcc.n 8000926 <__addsf3+0x92> + 8000918: 0840 lsrs r0, r0, #1 + 800091a: ea4f 0131 mov.w r1, r1, rrx + 800091e: f102 0201 add.w r2, r2, #1 + 8000922: 2afe cmp r2, #254 @ 0xfe + 8000924: d251 bcs.n 80009ca <__addsf3+0x136> + 8000926: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 + 800092a: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 800092e: bf08 it eq + 8000930: f020 0001 biceq.w r0, r0, #1 + 8000934: ea40 0003 orr.w r0, r0, r3 + 8000938: 4770 bx lr + 800093a: 0049 lsls r1, r1, #1 + 800093c: eb40 0000 adc.w r0, r0, r0 + 8000940: 3a01 subs r2, #1 + 8000942: bf28 it cs + 8000944: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 + 8000948: d2ed bcs.n 8000926 <__addsf3+0x92> + 800094a: fab0 fc80 clz ip, r0 + 800094e: f1ac 0c08 sub.w ip, ip, #8 + 8000952: ebb2 020c subs.w r2, r2, ip + 8000956: fa00 f00c lsl.w r0, r0, ip + 800095a: bfaa itet ge + 800095c: eb00 50c2 addge.w r0, r0, r2, lsl #23 + 8000960: 4252 neglt r2, r2 + 8000962: 4318 orrge r0, r3 + 8000964: bfbc itt lt + 8000966: 40d0 lsrlt r0, r2 + 8000968: 4318 orrlt r0, r3 + 800096a: 4770 bx lr + 800096c: f092 0f00 teq r2, #0 + 8000970: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 + 8000974: bf06 itte eq + 8000976: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 + 800097a: 3201 addeq r2, #1 + 800097c: 3b01 subne r3, #1 + 800097e: e7b5 b.n 80008ec <__addsf3+0x58> + 8000980: ea4f 0341 mov.w r3, r1, lsl #1 + 8000984: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000988: bf18 it ne + 800098a: ea7f 6c23 mvnsne.w ip, r3, asr #24 + 800098e: d021 beq.n 80009d4 <__addsf3+0x140> + 8000990: ea92 0f03 teq r2, r3 + 8000994: d004 beq.n 80009a0 <__addsf3+0x10c> + 8000996: f092 0f00 teq r2, #0 + 800099a: bf08 it eq + 800099c: 4608 moveq r0, r1 + 800099e: 4770 bx lr + 80009a0: ea90 0f01 teq r0, r1 + 80009a4: bf1c itt ne + 80009a6: 2000 movne r0, #0 + 80009a8: 4770 bxne lr + 80009aa: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 + 80009ae: d104 bne.n 80009ba <__addsf3+0x126> + 80009b0: 0040 lsls r0, r0, #1 + 80009b2: bf28 it cs + 80009b4: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 + 80009b8: 4770 bx lr + 80009ba: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 + 80009be: bf3c itt cc + 80009c0: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 + 80009c4: 4770 bxcc lr + 80009c6: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 + 80009ca: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 + 80009ce: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 80009d2: 4770 bx lr + 80009d4: ea7f 6222 mvns.w r2, r2, asr #24 + 80009d8: bf16 itet ne + 80009da: 4608 movne r0, r1 + 80009dc: ea7f 6323 mvnseq.w r3, r3, asr #24 + 80009e0: 4601 movne r1, r0 + 80009e2: 0242 lsls r2, r0, #9 + 80009e4: bf06 itte eq + 80009e6: ea5f 2341 movseq.w r3, r1, lsl #9 + 80009ea: ea90 0f01 teqeq r0, r1 + 80009ee: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 + 80009f2: 4770 bx lr + +080009f4 <__aeabi_ui2f>: + 80009f4: f04f 0300 mov.w r3, #0 + 80009f8: e004 b.n 8000a04 <__aeabi_i2f+0x8> + 80009fa: bf00 nop + +080009fc <__aeabi_i2f>: + 80009fc: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 + 8000a00: bf48 it mi + 8000a02: 4240 negmi r0, r0 + 8000a04: ea5f 0c00 movs.w ip, r0 + 8000a08: bf08 it eq + 8000a0a: 4770 bxeq lr + 8000a0c: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 + 8000a10: 4601 mov r1, r0 + 8000a12: f04f 0000 mov.w r0, #0 + 8000a16: e01c b.n 8000a52 <__aeabi_l2f+0x2a> + +08000a18 <__aeabi_ul2f>: + 8000a18: ea50 0201 orrs.w r2, r0, r1 + 8000a1c: bf08 it eq + 8000a1e: 4770 bxeq lr + 8000a20: f04f 0300 mov.w r3, #0 + 8000a24: e00a b.n 8000a3c <__aeabi_l2f+0x14> + 8000a26: bf00 nop + +08000a28 <__aeabi_l2f>: + 8000a28: ea50 0201 orrs.w r2, r0, r1 + 8000a2c: bf08 it eq + 8000a2e: 4770 bxeq lr + 8000a30: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 + 8000a34: d502 bpl.n 8000a3c <__aeabi_l2f+0x14> + 8000a36: 4240 negs r0, r0 + 8000a38: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 8000a3c: ea5f 0c01 movs.w ip, r1 + 8000a40: bf02 ittt eq + 8000a42: 4684 moveq ip, r0 + 8000a44: 4601 moveq r1, r0 + 8000a46: 2000 moveq r0, #0 + 8000a48: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 + 8000a4c: bf08 it eq + 8000a4e: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 + 8000a52: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 + 8000a56: fabc f28c clz r2, ip + 8000a5a: 3a08 subs r2, #8 + 8000a5c: eba3 53c2 sub.w r3, r3, r2, lsl #23 + 8000a60: db10 blt.n 8000a84 <__aeabi_l2f+0x5c> + 8000a62: fa01 fc02 lsl.w ip, r1, r2 + 8000a66: 4463 add r3, ip + 8000a68: fa00 fc02 lsl.w ip, r0, r2 + 8000a6c: f1c2 0220 rsb r2, r2, #32 + 8000a70: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 + 8000a74: fa20 f202 lsr.w r2, r0, r2 + 8000a78: eb43 0002 adc.w r0, r3, r2 + 8000a7c: bf08 it eq + 8000a7e: f020 0001 biceq.w r0, r0, #1 + 8000a82: 4770 bx lr + 8000a84: f102 0220 add.w r2, r2, #32 + 8000a88: fa01 fc02 lsl.w ip, r1, r2 + 8000a8c: f1c2 0220 rsb r2, r2, #32 + 8000a90: ea50 004c orrs.w r0, r0, ip, lsl #1 + 8000a94: fa21 f202 lsr.w r2, r1, r2 + 8000a98: eb43 0002 adc.w r0, r3, r2 + 8000a9c: bf08 it eq + 8000a9e: ea20 70dc biceq.w r0, r0, ip, lsr #31 + 8000aa2: 4770 bx lr + +08000aa4 <__aeabi_fmul>: + 8000aa4: f04f 0cff mov.w ip, #255 @ 0xff + 8000aa8: ea1c 52d0 ands.w r2, ip, r0, lsr #23 + 8000aac: bf1e ittt ne + 8000aae: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 + 8000ab2: ea92 0f0c teqne r2, ip + 8000ab6: ea93 0f0c teqne r3, ip + 8000aba: d06f beq.n 8000b9c <__aeabi_fmul+0xf8> + 8000abc: 441a add r2, r3 + 8000abe: ea80 0c01 eor.w ip, r0, r1 + 8000ac2: 0240 lsls r0, r0, #9 + 8000ac4: bf18 it ne + 8000ac6: ea5f 2141 movsne.w r1, r1, lsl #9 + 8000aca: d01e beq.n 8000b0a <__aeabi_fmul+0x66> + 8000acc: f04f 6300 mov.w r3, #134217728 @ 0x8000000 + 8000ad0: ea43 1050 orr.w r0, r3, r0, lsr #5 + 8000ad4: ea43 1151 orr.w r1, r3, r1, lsr #5 + 8000ad8: fba0 3101 umull r3, r1, r0, r1 + 8000adc: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 + 8000ae0: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 + 8000ae4: bf3e ittt cc + 8000ae6: 0049 lslcc r1, r1, #1 + 8000ae8: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 + 8000aec: 005b lslcc r3, r3, #1 + 8000aee: ea40 0001 orr.w r0, r0, r1 + 8000af2: f162 027f sbc.w r2, r2, #127 @ 0x7f + 8000af6: 2afd cmp r2, #253 @ 0xfd + 8000af8: d81d bhi.n 8000b36 <__aeabi_fmul+0x92> + 8000afa: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 + 8000afe: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 8000b02: bf08 it eq + 8000b04: f020 0001 biceq.w r0, r0, #1 + 8000b08: 4770 bx lr + 8000b0a: f090 0f00 teq r0, #0 + 8000b0e: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 + 8000b12: bf08 it eq + 8000b14: 0249 lsleq r1, r1, #9 + 8000b16: ea4c 2050 orr.w r0, ip, r0, lsr #9 + 8000b1a: ea40 2051 orr.w r0, r0, r1, lsr #9 + 8000b1e: 3a7f subs r2, #127 @ 0x7f + 8000b20: bfc2 ittt gt + 8000b22: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff + 8000b26: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 + 8000b2a: 4770 bxgt lr + 8000b2c: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000b30: f04f 0300 mov.w r3, #0 + 8000b34: 3a01 subs r2, #1 + 8000b36: dc5d bgt.n 8000bf4 <__aeabi_fmul+0x150> + 8000b38: f112 0f19 cmn.w r2, #25 + 8000b3c: bfdc itt le + 8000b3e: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 + 8000b42: 4770 bxle lr + 8000b44: f1c2 0200 rsb r2, r2, #0 + 8000b48: 0041 lsls r1, r0, #1 + 8000b4a: fa21 f102 lsr.w r1, r1, r2 + 8000b4e: f1c2 0220 rsb r2, r2, #32 + 8000b52: fa00 fc02 lsl.w ip, r0, r2 + 8000b56: ea5f 0031 movs.w r0, r1, rrx + 8000b5a: f140 0000 adc.w r0, r0, #0 + 8000b5e: ea53 034c orrs.w r3, r3, ip, lsl #1 + 8000b62: bf08 it eq + 8000b64: ea20 70dc biceq.w r0, r0, ip, lsr #31 + 8000b68: 4770 bx lr + 8000b6a: f092 0f00 teq r2, #0 + 8000b6e: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 + 8000b72: bf02 ittt eq + 8000b74: 0040 lsleq r0, r0, #1 + 8000b76: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 + 8000b7a: 3a01 subeq r2, #1 + 8000b7c: d0f9 beq.n 8000b72 <__aeabi_fmul+0xce> + 8000b7e: ea40 000c orr.w r0, r0, ip + 8000b82: f093 0f00 teq r3, #0 + 8000b86: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 + 8000b8a: bf02 ittt eq + 8000b8c: 0049 lsleq r1, r1, #1 + 8000b8e: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 + 8000b92: 3b01 subeq r3, #1 + 8000b94: d0f9 beq.n 8000b8a <__aeabi_fmul+0xe6> + 8000b96: ea41 010c orr.w r1, r1, ip + 8000b9a: e78f b.n 8000abc <__aeabi_fmul+0x18> + 8000b9c: ea0c 53d1 and.w r3, ip, r1, lsr #23 + 8000ba0: ea92 0f0c teq r2, ip + 8000ba4: bf18 it ne + 8000ba6: ea93 0f0c teqne r3, ip + 8000baa: d00a beq.n 8000bc2 <__aeabi_fmul+0x11e> + 8000bac: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 + 8000bb0: bf18 it ne + 8000bb2: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 + 8000bb6: d1d8 bne.n 8000b6a <__aeabi_fmul+0xc6> + 8000bb8: ea80 0001 eor.w r0, r0, r1 + 8000bbc: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 + 8000bc0: 4770 bx lr + 8000bc2: f090 0f00 teq r0, #0 + 8000bc6: bf17 itett ne + 8000bc8: f090 4f00 teqne r0, #2147483648 @ 0x80000000 + 8000bcc: 4608 moveq r0, r1 + 8000bce: f091 0f00 teqne r1, #0 + 8000bd2: f091 4f00 teqne r1, #2147483648 @ 0x80000000 + 8000bd6: d014 beq.n 8000c02 <__aeabi_fmul+0x15e> + 8000bd8: ea92 0f0c teq r2, ip + 8000bdc: d101 bne.n 8000be2 <__aeabi_fmul+0x13e> + 8000bde: 0242 lsls r2, r0, #9 + 8000be0: d10f bne.n 8000c02 <__aeabi_fmul+0x15e> + 8000be2: ea93 0f0c teq r3, ip + 8000be6: d103 bne.n 8000bf0 <__aeabi_fmul+0x14c> + 8000be8: 024b lsls r3, r1, #9 + 8000bea: bf18 it ne + 8000bec: 4608 movne r0, r1 + 8000bee: d108 bne.n 8000c02 <__aeabi_fmul+0x15e> + 8000bf0: ea80 0001 eor.w r0, r0, r1 + 8000bf4: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 + 8000bf8: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 + 8000bfc: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000c00: 4770 bx lr + 8000c02: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 + 8000c06: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 + 8000c0a: 4770 bx lr + +08000c0c <__aeabi_fdiv>: + 8000c0c: f04f 0cff mov.w ip, #255 @ 0xff + 8000c10: ea1c 52d0 ands.w r2, ip, r0, lsr #23 + 8000c14: bf1e ittt ne + 8000c16: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 + 8000c1a: ea92 0f0c teqne r2, ip + 8000c1e: ea93 0f0c teqne r3, ip + 8000c22: d069 beq.n 8000cf8 <__aeabi_fdiv+0xec> + 8000c24: eba2 0203 sub.w r2, r2, r3 + 8000c28: ea80 0c01 eor.w ip, r0, r1 + 8000c2c: 0249 lsls r1, r1, #9 + 8000c2e: ea4f 2040 mov.w r0, r0, lsl #9 + 8000c32: d037 beq.n 8000ca4 <__aeabi_fdiv+0x98> + 8000c34: f04f 5380 mov.w r3, #268435456 @ 0x10000000 + 8000c38: ea43 1111 orr.w r1, r3, r1, lsr #4 + 8000c3c: ea43 1310 orr.w r3, r3, r0, lsr #4 + 8000c40: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 + 8000c44: 428b cmp r3, r1 + 8000c46: bf38 it cc + 8000c48: 005b lslcc r3, r3, #1 + 8000c4a: f142 027d adc.w r2, r2, #125 @ 0x7d + 8000c4e: f44f 0c00 mov.w ip, #8388608 @ 0x800000 + 8000c52: 428b cmp r3, r1 + 8000c54: bf24 itt cs + 8000c56: 1a5b subcs r3, r3, r1 + 8000c58: ea40 000c orrcs.w r0, r0, ip + 8000c5c: ebb3 0f51 cmp.w r3, r1, lsr #1 + 8000c60: bf24 itt cs + 8000c62: eba3 0351 subcs.w r3, r3, r1, lsr #1 + 8000c66: ea40 005c orrcs.w r0, r0, ip, lsr #1 + 8000c6a: ebb3 0f91 cmp.w r3, r1, lsr #2 + 8000c6e: bf24 itt cs + 8000c70: eba3 0391 subcs.w r3, r3, r1, lsr #2 + 8000c74: ea40 009c orrcs.w r0, r0, ip, lsr #2 + 8000c78: ebb3 0fd1 cmp.w r3, r1, lsr #3 + 8000c7c: bf24 itt cs + 8000c7e: eba3 03d1 subcs.w r3, r3, r1, lsr #3 + 8000c82: ea40 00dc orrcs.w r0, r0, ip, lsr #3 + 8000c86: 011b lsls r3, r3, #4 + 8000c88: bf18 it ne + 8000c8a: ea5f 1c1c movsne.w ip, ip, lsr #4 + 8000c8e: d1e0 bne.n 8000c52 <__aeabi_fdiv+0x46> + 8000c90: 2afd cmp r2, #253 @ 0xfd + 8000c92: f63f af50 bhi.w 8000b36 <__aeabi_fmul+0x92> + 8000c96: 428b cmp r3, r1 + 8000c98: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 8000c9c: bf08 it eq + 8000c9e: f020 0001 biceq.w r0, r0, #1 + 8000ca2: 4770 bx lr + 8000ca4: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 + 8000ca8: ea4c 2050 orr.w r0, ip, r0, lsr #9 + 8000cac: 327f adds r2, #127 @ 0x7f + 8000cae: bfc2 ittt gt + 8000cb0: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff + 8000cb4: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 + 8000cb8: 4770 bxgt lr + 8000cba: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000cbe: f04f 0300 mov.w r3, #0 + 8000cc2: 3a01 subs r2, #1 + 8000cc4: e737 b.n 8000b36 <__aeabi_fmul+0x92> + 8000cc6: f092 0f00 teq r2, #0 + 8000cca: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 + 8000cce: bf02 ittt eq + 8000cd0: 0040 lsleq r0, r0, #1 + 8000cd2: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 + 8000cd6: 3a01 subeq r2, #1 + 8000cd8: d0f9 beq.n 8000cce <__aeabi_fdiv+0xc2> + 8000cda: ea40 000c orr.w r0, r0, ip + 8000cde: f093 0f00 teq r3, #0 + 8000ce2: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 + 8000ce6: bf02 ittt eq + 8000ce8: 0049 lsleq r1, r1, #1 + 8000cea: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 + 8000cee: 3b01 subeq r3, #1 + 8000cf0: d0f9 beq.n 8000ce6 <__aeabi_fdiv+0xda> + 8000cf2: ea41 010c orr.w r1, r1, ip + 8000cf6: e795 b.n 8000c24 <__aeabi_fdiv+0x18> + 8000cf8: ea0c 53d1 and.w r3, ip, r1, lsr #23 + 8000cfc: ea92 0f0c teq r2, ip + 8000d00: d108 bne.n 8000d14 <__aeabi_fdiv+0x108> + 8000d02: 0242 lsls r2, r0, #9 + 8000d04: f47f af7d bne.w 8000c02 <__aeabi_fmul+0x15e> + 8000d08: ea93 0f0c teq r3, ip + 8000d0c: f47f af70 bne.w 8000bf0 <__aeabi_fmul+0x14c> + 8000d10: 4608 mov r0, r1 + 8000d12: e776 b.n 8000c02 <__aeabi_fmul+0x15e> + 8000d14: ea93 0f0c teq r3, ip + 8000d18: d104 bne.n 8000d24 <__aeabi_fdiv+0x118> + 8000d1a: 024b lsls r3, r1, #9 + 8000d1c: f43f af4c beq.w 8000bb8 <__aeabi_fmul+0x114> + 8000d20: 4608 mov r0, r1 + 8000d22: e76e b.n 8000c02 <__aeabi_fmul+0x15e> + 8000d24: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 + 8000d28: bf18 it ne + 8000d2a: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 + 8000d2e: d1ca bne.n 8000cc6 <__aeabi_fdiv+0xba> + 8000d30: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 + 8000d34: f47f af5c bne.w 8000bf0 <__aeabi_fmul+0x14c> + 8000d38: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 + 8000d3c: f47f af3c bne.w 8000bb8 <__aeabi_fmul+0x114> + 8000d40: e75f b.n 8000c02 <__aeabi_fmul+0x15e> + 8000d42: bf00 nop + +08000d44 <__gesf2>: + 8000d44: f04f 3cff mov.w ip, #4294967295 + 8000d48: e006 b.n 8000d58 <__cmpsf2+0x4> + 8000d4a: bf00 nop + +08000d4c <__lesf2>: + 8000d4c: f04f 0c01 mov.w ip, #1 + 8000d50: e002 b.n 8000d58 <__cmpsf2+0x4> + 8000d52: bf00 nop + +08000d54 <__cmpsf2>: + 8000d54: f04f 0c01 mov.w ip, #1 + 8000d58: f84d cd04 str.w ip, [sp, #-4]! + 8000d5c: ea4f 0240 mov.w r2, r0, lsl #1 + 8000d60: ea4f 0341 mov.w r3, r1, lsl #1 + 8000d64: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000d68: bf18 it ne + 8000d6a: ea7f 6c23 mvnsne.w ip, r3, asr #24 + 8000d6e: d011 beq.n 8000d94 <__cmpsf2+0x40> + 8000d70: b001 add sp, #4 + 8000d72: ea52 0c53 orrs.w ip, r2, r3, lsr #1 + 8000d76: bf18 it ne + 8000d78: ea90 0f01 teqne r0, r1 + 8000d7c: bf58 it pl + 8000d7e: ebb2 0003 subspl.w r0, r2, r3 + 8000d82: bf88 it hi + 8000d84: 17c8 asrhi r0, r1, #31 + 8000d86: bf38 it cc + 8000d88: ea6f 70e1 mvncc.w r0, r1, asr #31 + 8000d8c: bf18 it ne + 8000d8e: f040 0001 orrne.w r0, r0, #1 + 8000d92: 4770 bx lr + 8000d94: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000d98: d102 bne.n 8000da0 <__cmpsf2+0x4c> + 8000d9a: ea5f 2c40 movs.w ip, r0, lsl #9 + 8000d9e: d105 bne.n 8000dac <__cmpsf2+0x58> + 8000da0: ea7f 6c23 mvns.w ip, r3, asr #24 + 8000da4: d1e4 bne.n 8000d70 <__cmpsf2+0x1c> + 8000da6: ea5f 2c41 movs.w ip, r1, lsl #9 + 8000daa: d0e1 beq.n 8000d70 <__cmpsf2+0x1c> + 8000dac: f85d 0b04 ldr.w r0, [sp], #4 + 8000db0: 4770 bx lr + 8000db2: bf00 nop + +08000db4 <__aeabi_cfrcmple>: + 8000db4: 4684 mov ip, r0 + 8000db6: 4608 mov r0, r1 + 8000db8: 4661 mov r1, ip + 8000dba: e7ff b.n 8000dbc <__aeabi_cfcmpeq> + +08000dbc <__aeabi_cfcmpeq>: + 8000dbc: b50f push {r0, r1, r2, r3, lr} + 8000dbe: f7ff ffc9 bl 8000d54 <__cmpsf2> + 8000dc2: 2800 cmp r0, #0 + 8000dc4: bf48 it mi + 8000dc6: f110 0f00 cmnmi.w r0, #0 + 8000dca: bd0f pop {r0, r1, r2, r3, pc} + +08000dcc <__aeabi_fcmpeq>: + 8000dcc: f84d ed08 str.w lr, [sp, #-8]! + 8000dd0: f7ff fff4 bl 8000dbc <__aeabi_cfcmpeq> + 8000dd4: bf0c ite eq + 8000dd6: 2001 moveq r0, #1 + 8000dd8: 2000 movne r0, #0 + 8000dda: f85d fb08 ldr.w pc, [sp], #8 + 8000dde: bf00 nop + +08000de0 <__aeabi_fcmplt>: + 8000de0: f84d ed08 str.w lr, [sp, #-8]! + 8000de4: f7ff ffea bl 8000dbc <__aeabi_cfcmpeq> + 8000de8: bf34 ite cc + 8000dea: 2001 movcc r0, #1 + 8000dec: 2000 movcs r0, #0 + 8000dee: f85d fb08 ldr.w pc, [sp], #8 + 8000df2: bf00 nop + +08000df4 <__aeabi_fcmple>: + 8000df4: f84d ed08 str.w lr, [sp, #-8]! + 8000df8: f7ff ffe0 bl 8000dbc <__aeabi_cfcmpeq> + 8000dfc: bf94 ite ls + 8000dfe: 2001 movls r0, #1 + 8000e00: 2000 movhi r0, #0 + 8000e02: f85d fb08 ldr.w pc, [sp], #8 + 8000e06: bf00 nop + +08000e08 <__aeabi_fcmpge>: + 8000e08: f84d ed08 str.w lr, [sp, #-8]! + 8000e0c: f7ff ffd2 bl 8000db4 <__aeabi_cfrcmple> + 8000e10: bf94 ite ls + 8000e12: 2001 movls r0, #1 + 8000e14: 2000 movhi r0, #0 + 8000e16: f85d fb08 ldr.w pc, [sp], #8 + 8000e1a: bf00 nop + +08000e1c <__aeabi_fcmpgt>: + 8000e1c: f84d ed08 str.w lr, [sp, #-8]! + 8000e20: f7ff ffc8 bl 8000db4 <__aeabi_cfrcmple> + 8000e24: bf34 ite cc + 8000e26: 2001 movcc r0, #1 + 8000e28: 2000 movcs r0, #0 + 8000e2a: f85d fb08 ldr.w pc, [sp], #8 + 8000e2e: bf00 nop + +08000e30 <__aeabi_fcmpun>: + 8000e30: ea4f 0240 mov.w r2, r0, lsl #1 + 8000e34: ea4f 0341 mov.w r3, r1, lsl #1 + 8000e38: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000e3c: d102 bne.n 8000e44 <__aeabi_fcmpun+0x14> + 8000e3e: ea5f 2c40 movs.w ip, r0, lsl #9 + 8000e42: d108 bne.n 8000e56 <__aeabi_fcmpun+0x26> + 8000e44: ea7f 6c23 mvns.w ip, r3, asr #24 + 8000e48: d102 bne.n 8000e50 <__aeabi_fcmpun+0x20> + 8000e4a: ea5f 2c41 movs.w ip, r1, lsl #9 + 8000e4e: d102 bne.n 8000e56 <__aeabi_fcmpun+0x26> + 8000e50: f04f 0000 mov.w r0, #0 + 8000e54: 4770 bx lr + 8000e56: f04f 0001 mov.w r0, #1 + 8000e5a: 4770 bx lr + +08000e5c <__aeabi_f2iz>: + 8000e5c: ea4f 0240 mov.w r2, r0, lsl #1 + 8000e60: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 + 8000e64: d30f bcc.n 8000e86 <__aeabi_f2iz+0x2a> + 8000e66: f04f 039e mov.w r3, #158 @ 0x9e + 8000e6a: ebb3 6212 subs.w r2, r3, r2, lsr #24 + 8000e6e: d90d bls.n 8000e8c <__aeabi_f2iz+0x30> + 8000e70: ea4f 2300 mov.w r3, r0, lsl #8 + 8000e74: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 + 8000e78: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 + 8000e7c: fa23 f002 lsr.w r0, r3, r2 + 8000e80: bf18 it ne + 8000e82: 4240 negne r0, r0 + 8000e84: 4770 bx lr + 8000e86: f04f 0000 mov.w r0, #0 + 8000e8a: 4770 bx lr + 8000e8c: f112 0f61 cmn.w r2, #97 @ 0x61 + 8000e90: d101 bne.n 8000e96 <__aeabi_f2iz+0x3a> + 8000e92: 0242 lsls r2, r0, #9 + 8000e94: d105 bne.n 8000ea2 <__aeabi_f2iz+0x46> + 8000e96: f010 4000 ands.w r0, r0, #2147483648 @ 0x80000000 + 8000e9a: bf08 it eq + 8000e9c: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 + 8000ea0: 4770 bx lr + 8000ea2: f04f 0000 mov.w r0, #0 + 8000ea6: 4770 bx lr + +08000ea8 <__aeabi_f2uiz>: + 8000ea8: 0042 lsls r2, r0, #1 + 8000eaa: d20e bcs.n 8000eca <__aeabi_f2uiz+0x22> + 8000eac: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 + 8000eb0: d30b bcc.n 8000eca <__aeabi_f2uiz+0x22> + 8000eb2: f04f 039e mov.w r3, #158 @ 0x9e + 8000eb6: ebb3 6212 subs.w r2, r3, r2, lsr #24 + 8000eba: d409 bmi.n 8000ed0 <__aeabi_f2uiz+0x28> + 8000ebc: ea4f 2300 mov.w r3, r0, lsl #8 + 8000ec0: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 + 8000ec4: fa23 f002 lsr.w r0, r3, r2 + 8000ec8: 4770 bx lr + 8000eca: f04f 0000 mov.w r0, #0 + 8000ece: 4770 bx lr + 8000ed0: f112 0f61 cmn.w r2, #97 @ 0x61 + 8000ed4: d101 bne.n 8000eda <__aeabi_f2uiz+0x32> + 8000ed6: 0242 lsls r2, r0, #9 + 8000ed8: d102 bne.n 8000ee0 <__aeabi_f2uiz+0x38> + 8000eda: f04f 30ff mov.w r0, #4294967295 + 8000ede: 4770 bx lr + 8000ee0: f04f 0000 mov.w r0, #0 + 8000ee4: 4770 bx lr + 8000ee6: bf00 nop + +08000ee8 : * @param numberOfBytes - Number of bytes to be written in the register * * @return None. ******************************************************************************/ void AD5934_SetRegisterValue(uint8_t registerAddress, uint32_t registerValue, uint8_t numberOfBytes) { - 8000770: b580 push {r7, lr} - 8000772: b086 sub sp, #24 - 8000774: af02 add r7, sp, #8 - 8000776: 4603 mov r3, r0 - 8000778: 6039 str r1, [r7, #0] - 800077a: 71fb strb r3, [r7, #7] - 800077c: 4613 mov r3, r2 - 800077e: 71bb strb r3, [r7, #6] + 8000ee8: b580 push {r7, lr} + 8000eea: b086 sub sp, #24 + 8000eec: af02 add r7, sp, #8 + 8000eee: 4603 mov r3, r0 + 8000ef0: 6039 str r1, [r7, #0] + 8000ef2: 71fb strb r3, [r7, #7] + 8000ef4: 4613 mov r3, r2 + 8000ef6: 71bb strb r3, [r7, #6] uint8_t writeData[2] = {0, 0}; - 8000780: 2300 movs r3, #0 - 8000782: 81bb strh r3, [r7, #12] + 8000ef8: 2300 movs r3, #0 + 8000efa: 81bb strh r3, [r7, #12] HAL_StatusTypeDef status; union Bytes2Long AD5934_reg; AD5934_reg.number = registerValue; - 8000784: 683b ldr r3, [r7, #0] - 8000786: 60bb str r3, [r7, #8] + 8000efc: 683b ldr r3, [r7, #0] + 8000efe: 60bb str r3, [r7, #8] for (uint8_t i = 0; i < numberOfBytes; i++) - 8000788: 2300 movs r3, #0 - 800078a: 73fb strb r3, [r7, #15] - 800078c: e018 b.n 80007c0 + 8000f00: 2300 movs r3, #0 + 8000f02: 73fb strb r3, [r7, #15] + 8000f04: e018 b.n 8000f38 { writeData[0] = registerAddress - i; - 800078e: 79fa ldrb r2, [r7, #7] - 8000790: 7bfb ldrb r3, [r7, #15] - 8000792: 1ad3 subs r3, r2, r3 - 8000794: b2db uxtb r3, r3 - 8000796: 733b strb r3, [r7, #12] + 8000f06: 79fa ldrb r2, [r7, #7] + 8000f08: 7bfb ldrb r3, [r7, #15] + 8000f0a: 1ad3 subs r3, r2, r3 + 8000f0c: b2db uxtb r3, r3 + 8000f0e: 733b strb r3, [r7, #12] writeData[1] = AD5934_reg.bytes[i]; - 8000798: 7bfb ldrb r3, [r7, #15] - 800079a: 3310 adds r3, #16 - 800079c: 443b add r3, r7 - 800079e: f813 3c08 ldrb.w r3, [r3, #-8] - 80007a2: 737b strb r3, [r7, #13] + 8000f10: 7bfb ldrb r3, [r7, #15] + 8000f12: 3310 adds r3, #16 + 8000f14: 443b add r3, r7 + 8000f16: f813 3c08 ldrb.w r3, [r3, #-8] + 8000f1a: 737b strb r3, [r7, #13] status = HAL_I2C_Master_Transmit(&hi2c2, AD5934_I2C_ADDRESS, writeData, 2, 5); - 80007a4: f107 020c add.w r2, r7, #12 - 80007a8: 2305 movs r3, #5 - 80007aa: 9300 str r3, [sp, #0] - 80007ac: 2302 movs r3, #2 - 80007ae: 211a movs r1, #26 - 80007b0: 4807 ldr r0, [pc, #28] @ (80007d0 ) - 80007b2: f002 feb5 bl 8003520 - 80007b6: 4603 mov r3, r0 - 80007b8: 73bb strb r3, [r7, #14] + 8000f1c: f107 020c add.w r2, r7, #12 + 8000f20: 2305 movs r3, #5 + 8000f22: 9300 str r3, [sp, #0] + 8000f24: 2302 movs r3, #2 + 8000f26: 211a movs r1, #26 + 8000f28: 4807 ldr r0, [pc, #28] @ (8000f48 ) + 8000f2a: f002 ffa3 bl 8003e74 + 8000f2e: 4603 mov r3, r0 + 8000f30: 73bb strb r3, [r7, #14] for (uint8_t i = 0; i < numberOfBytes; i++) - 80007ba: 7bfb ldrb r3, [r7, #15] - 80007bc: 3301 adds r3, #1 - 80007be: 73fb strb r3, [r7, #15] - 80007c0: 7bfa ldrb r2, [r7, #15] - 80007c2: 79bb ldrb r3, [r7, #6] - 80007c4: 429a cmp r2, r3 - 80007c6: d3e2 bcc.n 800078e + 8000f32: 7bfb ldrb r3, [r7, #15] + 8000f34: 3301 adds r3, #1 + 8000f36: 73fb strb r3, [r7, #15] + 8000f38: 7bfa ldrb r2, [r7, #15] + 8000f3a: 79bb ldrb r3, [r7, #6] + 8000f3c: 429a cmp r2, r3 + 8000f3e: d3e2 bcc.n 8000f06 } return; - 80007c8: bf00 nop + 8000f40: bf00 nop } - 80007ca: 3710 adds r7, #16 - 80007cc: 46bd mov sp, r7 - 80007ce: bd80 pop {r7, pc} - 80007d0: 20000270 .word 0x20000270 + 8000f42: 3710 adds r7, #16 + 8000f44: 46bd mov sp, r7 + 8000f46: bd80 pop {r7, pc} + 8000f48: 2000026c .word 0x2000026c -080007d4 : +08000f4c : * @param numberOfBytes - Number of bytes to be read from the register. * * @return Register value. ******************************************************************************/ uint32_t AD5934_GetRegisterValue(uint8_t registerAddress, uint8_t numberOfBytes) { - 80007d4: b580 push {r7, lr} - 80007d6: b088 sub sp, #32 - 80007d8: af02 add r7, sp, #8 - 80007da: 4603 mov r3, r0 - 80007dc: 460a mov r2, r1 - 80007de: 71fb strb r3, [r7, #7] - 80007e0: 4613 mov r3, r2 - 80007e2: 71bb strb r3, [r7, #6] + 8000f4c: b580 push {r7, lr} + 8000f4e: b088 sub sp, #32 + 8000f50: af02 add r7, sp, #8 + 8000f52: 4603 mov r3, r0 + 8000f54: 460a mov r2, r1 + 8000f56: 71fb strb r3, [r7, #7] + 8000f58: 4613 mov r3, r2 + 8000f5a: 71bb strb r3, [r7, #6] uint8_t readData[1] = {0}; - 80007e4: 2300 movs r3, #0 - 80007e6: 753b strb r3, [r7, #20] + 8000f5c: 2300 movs r3, #0 + 8000f5e: 753b strb r3, [r7, #20] uint8_t writeData[2]; //= {AD5934_ADDR_POINTER, registerAddress}; union Bytes2Long AD5934_reg; HAL_StatusTypeDef status; if(numberOfBytes > 4) - 80007e8: 79bb ldrb r3, [r7, #6] - 80007ea: 2b04 cmp r3, #4 - 80007ec: d902 bls.n 80007f4 + 8000f60: 79bb ldrb r3, [r7, #6] + 8000f62: 2b04 cmp r3, #4 + 8000f64: d902 bls.n 8000f6c return 0xFFFFFFFF; //Overflow - 80007ee: f04f 33ff mov.w r3, #4294967295 - 80007f2: e031 b.n 8000858 + 8000f66: f04f 33ff mov.w r3, #4294967295 + 8000f6a: e031 b.n 8000fd0 AD5934_reg.number = 0; - 80007f4: 2300 movs r3, #0 - 80007f6: 60fb str r3, [r7, #12] + 8000f6c: 2300 movs r3, #0 + 8000f6e: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < numberOfBytes; i++) - 80007f8: 2300 movs r3, #0 - 80007fa: 75fb strb r3, [r7, #23] - 80007fc: e027 b.n 800084e + 8000f70: 2300 movs r3, #0 + 8000f72: 75fb strb r3, [r7, #23] + 8000f74: e027 b.n 8000fc6 { writeData[0] = AD5934_ADDR_POINTER; - 80007fe: 23b0 movs r3, #176 @ 0xb0 - 8000800: 743b strb r3, [r7, #16] + 8000f76: 23b0 movs r3, #176 @ 0xb0 + 8000f78: 743b strb r3, [r7, #16] writeData[1] = registerAddress - i; - 8000802: 79fa ldrb r2, [r7, #7] - 8000804: 7dfb ldrb r3, [r7, #23] - 8000806: 1ad3 subs r3, r2, r3 - 8000808: b2db uxtb r3, r3 - 800080a: 747b strb r3, [r7, #17] + 8000f7a: 79fa ldrb r2, [r7, #7] + 8000f7c: 7dfb ldrb r3, [r7, #23] + 8000f7e: 1ad3 subs r3, r2, r3 + 8000f80: b2db uxtb r3, r3 + 8000f82: 747b strb r3, [r7, #17] status = HAL_I2C_Master_Transmit(&hi2c2, AD5934_I2C_ADDRESS, writeData, 2, 5); - 800080c: f107 0210 add.w r2, r7, #16 - 8000810: 2305 movs r3, #5 - 8000812: 9300 str r3, [sp, #0] - 8000814: 2302 movs r3, #2 - 8000816: 211a movs r1, #26 - 8000818: 4811 ldr r0, [pc, #68] @ (8000860 ) - 800081a: f002 fe81 bl 8003520 - 800081e: 4603 mov r3, r0 - 8000820: 75bb strb r3, [r7, #22] + 8000f84: f107 0210 add.w r2, r7, #16 + 8000f88: 2305 movs r3, #5 + 8000f8a: 9300 str r3, [sp, #0] + 8000f8c: 2302 movs r3, #2 + 8000f8e: 211a movs r1, #26 + 8000f90: 4811 ldr r0, [pc, #68] @ (8000fd8 ) + 8000f92: f002 ff6f bl 8003e74 + 8000f96: 4603 mov r3, r0 + 8000f98: 75bb strb r3, [r7, #22] //HAL_Delay(1); readData[0] = 0; - 8000822: 2300 movs r3, #0 - 8000824: 753b strb r3, [r7, #20] + 8000f9a: 2300 movs r3, #0 + 8000f9c: 753b strb r3, [r7, #20] status = HAL_I2C_Master_Receive(&hi2c2, AD5934_I2C_ADDRESS, readData, 1, 5); - 8000826: f107 0214 add.w r2, r7, #20 - 800082a: 2305 movs r3, #5 - 800082c: 9300 str r3, [sp, #0] - 800082e: 2301 movs r3, #1 - 8000830: 211a movs r1, #26 - 8000832: 480b ldr r0, [pc, #44] @ (8000860 ) - 8000834: f002 ff72 bl 800371c - 8000838: 4603 mov r3, r0 - 800083a: 75bb strb r3, [r7, #22] + 8000f9e: f107 0214 add.w r2, r7, #20 + 8000fa2: 2305 movs r3, #5 + 8000fa4: 9300 str r3, [sp, #0] + 8000fa6: 2301 movs r3, #1 + 8000fa8: 211a movs r1, #26 + 8000faa: 480b ldr r0, [pc, #44] @ (8000fd8 ) + 8000fac: f003 f860 bl 8004070 + 8000fb0: 4603 mov r3, r0 + 8000fb2: 75bb strb r3, [r7, #22] AD5934_reg.bytes[i]=readData[0]; - 800083c: 7dfb ldrb r3, [r7, #23] - 800083e: 7d3a ldrb r2, [r7, #20] - 8000840: 3318 adds r3, #24 - 8000842: 443b add r3, r7 - 8000844: f803 2c0c strb.w r2, [r3, #-12] + 8000fb4: 7dfb ldrb r3, [r7, #23] + 8000fb6: 7d3a ldrb r2, [r7, #20] + 8000fb8: 3318 adds r3, #24 + 8000fba: 443b add r3, r7 + 8000fbc: f803 2c0c strb.w r2, [r3, #-12] for (uint8_t i = 0; i < numberOfBytes; i++) - 8000848: 7dfb ldrb r3, [r7, #23] - 800084a: 3301 adds r3, #1 - 800084c: 75fb strb r3, [r7, #23] - 800084e: 7dfa ldrb r2, [r7, #23] - 8000850: 79bb ldrb r3, [r7, #6] - 8000852: 429a cmp r2, r3 - 8000854: d3d3 bcc.n 80007fe + 8000fc0: 7dfb ldrb r3, [r7, #23] + 8000fc2: 3301 adds r3, #1 + 8000fc4: 75fb strb r3, [r7, #23] + 8000fc6: 7dfa ldrb r2, [r7, #23] + 8000fc8: 79bb ldrb r3, [r7, #6] + 8000fca: 429a cmp r2, r3 + 8000fcc: d3d3 bcc.n 8000f76 } return AD5934_reg.number; - 8000856: 68fb ldr r3, [r7, #12] + 8000fce: 68fb ldr r3, [r7, #12] } - 8000858: 4618 mov r0, r3 - 800085a: 3718 adds r7, #24 - 800085c: 46bd mov sp, r7 - 800085e: bd80 pop {r7, pc} - 8000860: 20000270 .word 0x20000270 + 8000fd0: 4618 mov r0, r3 + 8000fd2: 3718 adds r7, #24 + 8000fd4: 46bd mov sp, r7 + 8000fd6: bd80 pop {r7, pc} + 8000fd8: 2000026c .word 0x2000026c -08000864 : +08000fdc : * @param None. * * @return None. ******************************************************************************/ void AD5934_Init(void) { - 8000864: b580 push {r7, lr} - 8000866: af00 add r7, sp, #0 + 8000fdc: b580 push {r7, lr} + 8000fde: af00 add r7, sp, #0 ADG715_ResetChannels(); // Disconnects Analog Switch on the CE / RTD / Ref Resistor - 8000868: f000 fc60 bl 800112c + 8000fe0: f000 fc18 bl 8001814 /************ Config Sweep******************/ // Place AD5934 in reset AD5934_SetRegisterValue(AD5934_CONTROL_REG_LB, (AD5934_CONTROL_FUNCTION(AD5934_RESET)), 1); - 800086c: 2201 movs r2, #1 - 800086e: f44f 7180 mov.w r1, #256 @ 0x100 - 8000872: 2081 movs r0, #129 @ 0x81 - 8000874: f7ff ff7c bl 8000770 + 8000fe4: 2201 movs r2, #1 + 8000fe6: f44f 7180 mov.w r1, #256 @ 0x100 + 8000fea: 2081 movs r0, #129 @ 0x81 + 8000fec: f7ff ff7c bl 8000ee8 // Configure starting frequency - AD5934_SetRegisterValue(AD5934_START_FREQ_REG_LB, AD5934_FREQ_2K5HZ, 3); - 8000878: 2203 movs r2, #3 - 800087a: 490a ldr r1, [pc, #40] @ (80008a4 ) - 800087c: 2084 movs r0, #132 @ 0x84 - 800087e: f7ff ff77 bl 8000770 + AD5934_SetRegisterValue(AD5934_START_FREQ_REG_LB, AD5934_FREQ_2K293HZ, 3); + 8000ff0: 2203 movs r2, #3 + 8000ff2: 490a ldr r1, [pc, #40] @ (800101c ) + 8000ff4: 2084 movs r0, #132 @ 0x84 + 8000ff6: f7ff ff77 bl 8000ee8 // Configure frequency increment step AD5934_SetRegisterValue(AD5934_FREQ_INCR_REG_LB, AD5934_FREQ_0HZ, 3); - 8000882: 2203 movs r2, #3 - 8000884: 2100 movs r1, #0 - 8000886: 2087 movs r0, #135 @ 0x87 - 8000888: f7ff ff72 bl 8000770 + 8000ffa: 2203 movs r2, #3 + 8000ffc: 2100 movs r1, #0 + 8000ffe: 2087 movs r0, #135 @ 0x87 + 8001000: f7ff ff72 bl 8000ee8 // Configure number of steps AD5934_SetRegisterValue(AD5934_NR_INCR_REG_LB, AD5934_STEP_FREQ_0, 2); - 800088c: 2202 movs r2, #2 - 800088e: 2100 movs r1, #0 - 8000890: 2089 movs r0, #137 @ 0x89 - 8000892: f7ff ff6d bl 8000770 + 8001004: 2202 movs r2, #2 + 8001006: 2100 movs r1, #0 + 8001008: 2089 movs r0, #137 @ 0x89 + 800100a: f7ff ff6d bl 8000ee8 // Set 128 Settling Time AD5934_SetRegisterValue(AD5934_NR_SETTLE_REG_LB, AD5934_SETTLING_TIME_64, 2); - 8000896: 2202 movs r2, #2 - 8000898: 2140 movs r1, #64 @ 0x40 - 800089a: 208b movs r0, #139 @ 0x8b - 800089c: f7ff ff68 bl 8000770 + 800100e: 2202 movs r2, #2 + 8001010: 2140 movs r1, #64 @ 0x40 + 8001012: 208b movs r0, #139 @ 0x8b + 8001014: f7ff ff68 bl 8000ee8 } - 80008a0: bf00 nop - 80008a2: bd80 pop {r7, pc} - 80008a4: 0051eb86 .word 0x0051eb86 + 8001018: bf00 nop + 800101a: bd80 pop {r7, pc} + 800101c: 004b2314 .word 0x004b2314 -080008a8 : +08001020 : * @param None. * * @return None. ******************************************************************************/ void AD5934_RestartSweep(void) { - 80008a8: b580 push {r7, lr} - 80008aa: af00 add r7, sp, #0 + 8001020: b580 push {r7, lr} + 8001022: af00 add r7, sp, #0 // Place AD5934 in standby AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_STANDBY) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 80008ac: 2201 movs r2, #1 - 80008ae: 21b5 movs r1, #181 @ 0xb5 - 80008b0: 2080 movs r0, #128 @ 0x80 - 80008b2: f7ff ff5d bl 8000770 + 8001024: 2201 movs r2, #1 + 8001026: 21b5 movs r1, #181 @ 0xb5 + 8001028: 2080 movs r0, #128 @ 0x80 + 800102a: f7ff ff5d bl 8000ee8 // Initialize starting frequency, Start frequency sweep, standby AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, ((AD5934_CONTROL_FUNCTION(AD5934_INIT_START_FREQ)) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 80008b6: 2201 movs r2, #1 - 80008b8: 2115 movs r1, #21 - 80008ba: 2080 movs r0, #128 @ 0x80 - 80008bc: f7ff ff58 bl 8000770 + 800102e: 2201 movs r2, #1 + 8001030: 2115 movs r1, #21 + 8001032: 2080 movs r0, #128 @ 0x80 + 8001034: f7ff ff58 bl 8000ee8 // Disable Internal Reset State AD5934_SetRegisterValue(AD5934_CONTROL_REG_LB, AD5934_CONTROL_FUNCTION(AD5934_RESERVED), 1); - 80008c0: 2201 movs r2, #1 - 80008c2: 2180 movs r1, #128 @ 0x80 - 80008c4: 2081 movs r0, #129 @ 0x81 - 80008c6: f7ff ff53 bl 8000770 + 8001038: 2201 movs r2, #1 + 800103a: 2180 movs r1, #128 @ 0x80 + 800103c: 2081 movs r0, #129 @ 0x81 + 800103e: f7ff ff53 bl 8000ee8 // Configure Range Output, PGA gain andPlace AD5934 in sweep AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_START_FREQ_SWEEP) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 80008ca: 2201 movs r2, #1 - 80008cc: 2125 movs r1, #37 @ 0x25 - 80008ce: 2080 movs r0, #128 @ 0x80 - 80008d0: f7ff ff4e bl 8000770 + 8001042: 2201 movs r2, #1 + 8001044: 2125 movs r1, #37 @ 0x25 + 8001046: 2080 movs r0, #128 @ 0x80 + 8001048: f7ff ff4e bl 8000ee8 } - 80008d4: bf00 nop - 80008d6: bd80 pop {r7, pc} + 800104c: bf00 nop + 800104e: bd80 pop {r7, pc} -080008d8 : +08001050 : * @param None. * * @return none. ******************************************************************************/ void AD5934_Repeat_Sweep(void) { - 80008d8: b580 push {r7, lr} - 80008da: af00 add r7, sp, #0 + 8001050: b580 push {r7, lr} + 8001052: af00 add r7, sp, #0 // Repeat AD5934 Sweep AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_REPEAT_FREQ) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 80008dc: 2201 movs r2, #1 - 80008de: 2145 movs r1, #69 @ 0x45 - 80008e0: 2080 movs r0, #128 @ 0x80 - 80008e2: f7ff ff45 bl 8000770 + 8001054: 2201 movs r2, #1 + 8001056: 2145 movs r1, #69 @ 0x45 + 8001058: 2080 movs r0, #128 @ 0x80 + 800105a: f7ff ff45 bl 8000ee8 } - 80008e6: bf00 nop - 80008e8: bd80 pop {r7, pc} + 800105e: bf00 nop + 8001060: bd80 pop {r7, pc} -080008ea : +08001062 : * @param None. * * @return None. ******************************************************************************/ void AD5934_StopSweep(void) { - 80008ea: b580 push {r7, lr} - 80008ec: af00 add r7, sp, #0 + 8001062: b580 push {r7, lr} + 8001064: af00 add r7, sp, #0 // Power Down //AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_POWER_DOWN) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); // Place AD5934 in standby (instead of power down to save startup time) AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_STANDBY) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 80008ee: 2201 movs r2, #1 - 80008f0: 21b5 movs r1, #181 @ 0xb5 - 80008f2: 2080 movs r0, #128 @ 0x80 - 80008f4: f7ff ff3c bl 8000770 + 8001066: 2201 movs r2, #1 + 8001068: 21b5 movs r1, #181 @ 0xb5 + 800106a: 2080 movs r0, #128 @ 0x80 + 800106c: f7ff ff3c bl 8000ee8 } - 80008f8: bf00 nop - 80008fa: bd80 pop {r7, pc} + 8001070: bf00 nop + 8001072: bd80 pop {r7, pc} -080008fc : +08001074 : * @param mag_dut - Magnitude of the device under test. * * @return Temperature in Celsius. ******************************************************************************/ float AD5934_Calculate_Temperature(float mag_ref, float mag_dut) { - 80008fc: b580 push {r7, lr} - 80008fe: b088 sub sp, #32 - 8000900: af00 add r7, sp, #0 - 8000902: 6078 str r0, [r7, #4] - 8000904: 6039 str r1, [r7, #0] + 8001074: b580 push {r7, lr} + 8001076: b08a sub sp, #40 @ 0x28 + 8001078: af00 add r7, sp, #0 + 800107a: 6078 str r0, [r7, #4] + 800107c: 6039 str r1, [r7, #0] uint8_t ch_ref; - float gain_factor, impedance_dut, ratio, discriminant; + float gain_factor, impedance_dut, temperature; if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 8000906: 2180 movs r1, #128 @ 0x80 - 8000908: 4821 ldr r0, [pc, #132] @ (8000990 ) - 800090a: f002 fc7d bl 8003208 - 800090e: 4603 mov r3, r0 - 8000910: 2b01 cmp r3, #1 - 8000912: d104 bne.n 800091e + 800107e: 2180 movs r1, #128 @ 0x80 + 8001080: 4832 ldr r0, [pc, #200] @ (800114c ) + 8001082: f002 fd6b bl 8003b5c + 8001086: 4603 mov r3, r0 + 8001088: 2b01 cmp r3, #1 + 800108a: d104 bne.n 8001096 { ch_ref = AD5934_CH_RTD_LOW_GAIN; //PT100 - 8000914: 2309 movs r3, #9 - 8000916: 76fb strb r3, [r7, #27] + 800108c: 2309 movs r3, #9 + 800108e: 77fb strb r3, [r7, #31] gain_factor = AD5934_GAIN_FACTOR_100R; - 8000918: 4b1e ldr r3, [pc, #120] @ (8000994 ) - 800091a: 61fb str r3, [r7, #28] - 800091c: e003 b.n 8000926 + 8001090: 4b2f ldr r3, [pc, #188] @ (8001150 ) + 8001092: 627b str r3, [r7, #36] @ 0x24 + 8001094: e003 b.n 800109e } else { ch_ref = AD5934_CH_RTD_MID_GAIN; //PT1000 - 800091e: 230a movs r3, #10 - 8000920: 76fb strb r3, [r7, #27] + 8001096: 230a movs r3, #10 + 8001098: 77fb strb r3, [r7, #31] gain_factor = AD5934_GAIN_FACTOR_1K; - 8000922: 4b1d ldr r3, [pc, #116] @ (8000998 ) - 8000924: 61fb str r3, [r7, #28] + 800109a: 4b2e ldr r3, [pc, #184] @ (8001154 ) + 800109c: 627b str r3, [r7, #36] @ 0x24 } float ratio_mag = mag_ref / mag_dut; - 8000926: 6839 ldr r1, [r7, #0] - 8000928: 6878 ldr r0, [r7, #4] - 800092a: f7ff fdd9 bl 80004e0 <__aeabi_fdiv> - 800092e: 4603 mov r3, r0 - 8000930: 617b str r3, [r7, #20] + 800109e: 6839 ldr r1, [r7, #0] + 80010a0: 6878 ldr r0, [r7, #4] + 80010a2: f7ff fdb3 bl 8000c0c <__aeabi_fdiv> + 80010a6: 4603 mov r3, r0 + 80010a8: 61bb str r3, [r7, #24] // This correction isn't validated /*if(ch_ref==AD5934_CH_REF100R_LOW_GAIN) // only for PT100 impedance_dut = AD5934_Linear_Correction(gain_factor * ratio_mag); else*/ impedance_dut = gain_factor * ratio_mag; - 8000932: 6979 ldr r1, [r7, #20] - 8000934: 69f8 ldr r0, [r7, #28] - 8000936: f7ff fd1f bl 8000378 <__aeabi_fmul> - 800093a: 4603 mov r3, r0 - 800093c: 613b str r3, [r7, #16] + 80010aa: 69b9 ldr r1, [r7, #24] + 80010ac: 6a78 ldr r0, [r7, #36] @ 0x24 + 80010ae: f7ff fcf9 bl 8000aa4 <__aeabi_fmul> + 80010b2: 4603 mov r3, r0 + 80010b4: 617b str r3, [r7, #20] // Calculate impedance ratio with the Reference Resistor - ratio = impedance_dut / gain_factor; - 800093e: 69f9 ldr r1, [r7, #28] - 8000940: 6938 ldr r0, [r7, #16] - 8000942: f7ff fdcd bl 80004e0 <__aeabi_fdiv> - 8000946: 4603 mov r3, r0 - 8000948: 60fb str r3, [r7, #12] + float ratio = impedance_dut / gain_factor; + 80010b6: 6a79 ldr r1, [r7, #36] @ 0x24 + 80010b8: 6978 ldr r0, [r7, #20] + 80010ba: f7ff fda7 bl 8000c0c <__aeabi_fdiv> + 80010be: 4603 mov r3, r0 + 80010c0: 613b str r3, [r7, #16] // Calculate impedance discriminant with the ratio - discriminant = (AD5934_RTD_A*AD5934_RTD_A)-(4.0f * AD5934_RTD_B * (1.0f - ratio)); - 800094a: 68f9 ldr r1, [r7, #12] - 800094c: f04f 507e mov.w r0, #1065353216 @ 0x3f800000 - 8000950: f7ff fc08 bl 8000164 <__aeabi_fsub> - 8000954: 4603 mov r3, r0 - 8000956: 4911 ldr r1, [pc, #68] @ (800099c ) - 8000958: 4618 mov r0, r3 - 800095a: f7ff fd0d bl 8000378 <__aeabi_fmul> - 800095e: 4603 mov r3, r0 - 8000960: 490f ldr r1, [pc, #60] @ (80009a0 ) - 8000962: 4618 mov r0, r3 - 8000964: f7ff fc00 bl 8000168 <__addsf3> - 8000968: 4603 mov r3, r0 - 800096a: 60bb str r3, [r7, #8] + float discriminant = (AD5934_RTD_A*AD5934_RTD_A)-(4.0f * AD5934_RTD_B * (1.0f - ratio)); + 80010c2: 6939 ldr r1, [r7, #16] + 80010c4: f04f 507e mov.w r0, #1065353216 @ 0x3f800000 + 80010c8: f7ff fbe2 bl 8000890 <__aeabi_fsub> + 80010cc: 4603 mov r3, r0 + 80010ce: 4922 ldr r1, [pc, #136] @ (8001158 ) + 80010d0: 4618 mov r0, r3 + 80010d2: f7ff fce7 bl 8000aa4 <__aeabi_fmul> + 80010d6: 4603 mov r3, r0 + 80010d8: 4920 ldr r1, [pc, #128] @ (800115c ) + 80010da: 4618 mov r0, r3 + 80010dc: f7ff fbda bl 8000894 <__addsf3> + 80010e0: 4603 mov r3, r0 + 80010e2: 60fb str r3, [r7, #12] - return ((-AD5934_RTD_A + sqrtf(discriminant))/(2.0f * AD5934_RTD_B)); - 800096c: 68b8 ldr r0, [r7, #8] - 800096e: f005 fbc9 bl 8006104 - 8000972: 4603 mov r3, r0 - 8000974: 490b ldr r1, [pc, #44] @ (80009a4 ) - 8000976: 4618 mov r0, r3 - 8000978: f7ff fbf4 bl 8000164 <__aeabi_fsub> - 800097c: 4603 mov r3, r0 - 800097e: 490a ldr r1, [pc, #40] @ (80009a8 ) - 8000980: 4618 mov r0, r3 - 8000982: f7ff fdad bl 80004e0 <__aeabi_fdiv> - 8000986: 4603 mov r3, r0 + if (discriminant >= 0.0f && impedance_dut >= gain_factor) + 80010e4: f04f 0100 mov.w r1, #0 + 80010e8: 68f8 ldr r0, [r7, #12] + 80010ea: f7ff fe8d bl 8000e08 <__aeabi_fcmpge> + 80010ee: 4603 mov r3, r0 + 80010f0: 2b00 cmp r3, #0 + 80010f2: d016 beq.n 8001122 + 80010f4: 6a79 ldr r1, [r7, #36] @ 0x24 + 80010f6: 6978 ldr r0, [r7, #20] + 80010f8: f7ff fe86 bl 8000e08 <__aeabi_fcmpge> + 80010fc: 4603 mov r3, r0 + 80010fe: 2b00 cmp r3, #0 + 8001100: d00f beq.n 8001122 + { + // Ramo T >= 0°C: solução quadrática exata + temperature = (-AD5934_RTD_A + sqrtf(discriminant))/(2.0f * AD5934_RTD_B); + 8001102: 68f8 ldr r0, [r7, #12] + 8001104: f005 fca8 bl 8006a58 + 8001108: 4603 mov r3, r0 + 800110a: 4915 ldr r1, [pc, #84] @ (8001160 ) + 800110c: 4618 mov r0, r3 + 800110e: f7ff fbbf bl 8000890 <__aeabi_fsub> + 8001112: 4603 mov r3, r0 + 8001114: 4913 ldr r1, [pc, #76] @ (8001164 ) + 8001116: 4618 mov r0, r3 + 8001118: f7ff fd78 bl 8000c0c <__aeabi_fdiv> + 800111c: 4603 mov r3, r0 + 800111e: 623b str r3, [r7, #32] + 8001120: e00b b.n 800113a + } + else + { + // Ramo T < 0°C (ou discriminante inválido por ruído): aproximação linear + temperature = (ratio - 1.0f) / AD5934_RTD_ALPHA; + 8001122: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 + 8001126: 6938 ldr r0, [r7, #16] + 8001128: f7ff fbb2 bl 8000890 <__aeabi_fsub> + 800112c: 4603 mov r3, r0 + 800112e: 490e ldr r1, [pc, #56] @ (8001168 ) + 8001130: 4618 mov r0, r3 + 8001132: f7ff fd6b bl 8000c0c <__aeabi_fdiv> + 8001136: 4603 mov r3, r0 + 8001138: 623b str r3, [r7, #32] + } + + return AD5934_Round_Float_Precision(temperature,1); + 800113a: 2101 movs r1, #1 + 800113c: 6a38 ldr r0, [r7, #32] + 800113e: f000 f851 bl 80011e4 + 8001142: 4603 mov r3, r0 } - 8000988: 4618 mov r0, r3 - 800098a: 3720 adds r7, #32 - 800098c: 46bd mov sp, r7 - 800098e: bd80 pop {r7, pc} - 8000990: 40010800 .word 0x40010800 - 8000994: 42c80000 .word 0x42c80000 - 8000998: 447a0000 .word 0x447a0000 - 800099c: 361b057f .word 0x361b057f - 80009a0: 37802266 .word 0x37802266 - 80009a4: 3b801132 .word 0x3b801132 - 80009a8: b59b057f .word 0xb59b057f + 8001144: 4618 mov r0, r3 + 8001146: 3728 adds r7, #40 @ 0x28 + 8001148: 46bd mov sp, r7 + 800114a: bd80 pop {r7, pc} + 800114c: 40010800 .word 0x40010800 + 8001150: 42c80000 .word 0x42c80000 + 8001154: 447a0000 .word 0x447a0000 + 8001158: 361b057f .word 0x361b057f + 800115c: 37802266 .word 0x37802266 + 8001160: 3b801132 .word 0x3b801132 + 8001164: b59b057f .word 0xb59b057f + 8001168: 3b7c5048 .word 0x3b7c5048 -080009ac : +0800116c : * @param temperature_dut The current temperature of the DUT (Device Under Test). * * @return The value of the Magnitude of the dut when it in 25C. */ float AD5934_EC_Compensate_Magnitude_To_25C(float mag_dut, float temperature_dut) { - 80009ac: b580 push {r7, lr} - 80009ae: b084 sub sp, #16 - 80009b0: af00 add r7, sp, #0 - 80009b2: 6078 str r0, [r7, #4] - 80009b4: 6039 str r1, [r7, #0] + 800116c: b580 push {r7, lr} + 800116e: b084 sub sp, #16 + 8001170: af00 add r7, sp, #0 + 8001172: 6078 str r0, [r7, #4] + 8001174: 6039 str r1, [r7, #0] float factor = 1.0f + AD5934_EC_ALPHA_PER_C * (temperature_dut - AD5934_EC_TEMP_REF_C); - 80009b6: 4911 ldr r1, [pc, #68] @ (80009fc ) - 80009b8: 6838 ldr r0, [r7, #0] - 80009ba: f7ff fbd3 bl 8000164 <__aeabi_fsub> - 80009be: 4603 mov r3, r0 - 80009c0: 490f ldr r1, [pc, #60] @ (8000a00 ) - 80009c2: 4618 mov r0, r3 - 80009c4: f7ff fcd8 bl 8000378 <__aeabi_fmul> - 80009c8: 4603 mov r3, r0 - 80009ca: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 - 80009ce: 4618 mov r0, r3 - 80009d0: f7ff fbca bl 8000168 <__addsf3> - 80009d4: 4603 mov r3, r0 - 80009d6: 60fb str r3, [r7, #12] + 8001176: 4911 ldr r1, [pc, #68] @ (80011bc ) + 8001178: 6838 ldr r0, [r7, #0] + 800117a: f7ff fb89 bl 8000890 <__aeabi_fsub> + 800117e: 4603 mov r3, r0 + 8001180: 490f ldr r1, [pc, #60] @ (80011c0 ) + 8001182: 4618 mov r0, r3 + 8001184: f7ff fc8e bl 8000aa4 <__aeabi_fmul> + 8001188: 4603 mov r3, r0 + 800118a: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 + 800118e: 4618 mov r0, r3 + 8001190: f7ff fb80 bl 8000894 <__addsf3> + 8001194: 4603 mov r3, r0 + 8001196: 60fb str r3, [r7, #12] if (factor < 0.1f) - 80009d8: 490a ldr r1, [pc, #40] @ (8000a04 ) - 80009da: 68f8 ldr r0, [r7, #12] - 80009dc: f7ff fe6a bl 80006b4 <__aeabi_fcmplt> - 80009e0: 4603 mov r3, r0 - 80009e2: 2b00 cmp r3, #0 - 80009e4: d001 beq.n 80009ea + 8001198: 490a ldr r1, [pc, #40] @ (80011c4 ) + 800119a: 68f8 ldr r0, [r7, #12] + 800119c: f7ff fe20 bl 8000de0 <__aeabi_fcmplt> + 80011a0: 4603 mov r3, r0 + 80011a2: 2b00 cmp r3, #0 + 80011a4: d001 beq.n 80011aa factor = 0.1f; - 80009e6: 4b07 ldr r3, [pc, #28] @ (8000a04 ) - 80009e8: 60fb str r3, [r7, #12] + 80011a6: 4b07 ldr r3, [pc, #28] @ (80011c4 ) + 80011a8: 60fb str r3, [r7, #12] return (mag_dut / factor); - 80009ea: 68f9 ldr r1, [r7, #12] - 80009ec: 6878 ldr r0, [r7, #4] - 80009ee: f7ff fd77 bl 80004e0 <__aeabi_fdiv> - 80009f2: 4603 mov r3, r0 + 80011aa: 68f9 ldr r1, [r7, #12] + 80011ac: 6878 ldr r0, [r7, #4] + 80011ae: f7ff fd2d bl 8000c0c <__aeabi_fdiv> + 80011b2: 4603 mov r3, r0 } - 80009f4: 4618 mov r0, r3 - 80009f6: 3710 adds r7, #16 - 80009f8: 46bd mov sp, r7 - 80009fa: bd80 pop {r7, pc} - 80009fc: 41c80000 .word 0x41c80000 - 8000a00: 3ca3d70a .word 0x3ca3d70a - 8000a04: 3dcccccd .word 0x3dcccccd + 80011b4: 4618 mov r0, r3 + 80011b6: 3710 adds r7, #16 + 80011b8: 46bd mov sp, r7 + 80011ba: bd80 pop {r7, pc} + 80011bc: 41c80000 .word 0x41c80000 + 80011c0: 3ca3d70a .word 0x3ca3d70a + 80011c4: 3dcccccd .word 0x3dcccccd -08000a08 : +080011c8 : * @param: none * -* @return Magnitude (float). +* @return Magnitude (int16). ******************************************************************************/ -float AD5934_GetMagnitude(void) +uint32_t AD5934_Get_Real_Imag_Numbers(void) { - 8000a08: b5b0 push {r4, r5, r7, lr} - 8000a0a: b082 sub sp, #8 - 8000a0c: af00 add r7, sp, #0 + 80011c8: b580 push {r7, lr} + 80011ca: b082 sub sp, #8 + 80011cc: af00 add r7, sp, #0 + uint32_t real_imag_reg = AD5934_GetRegisterValue(AD5934_IMG_REG_LB, 4); //AD5934_ReadRegister(AD5934_REAL_REG_LB, 4); // + 80011ce: 2104 movs r1, #4 + 80011d0: 2097 movs r0, #151 @ 0x97 + 80011d2: f7ff febb bl 8000f4c + 80011d6: 6078 str r0, [r7, #4] - // Get Real Data register - int16_t real_value = ((AD5934_GetRegisterValue(AD5934_REAL_REG_LB,2))); - 8000a0e: 2102 movs r1, #2 - 8000a10: 2095 movs r0, #149 @ 0x95 - 8000a12: f7ff fedf bl 80007d4 - 8000a16: 4603 mov r3, r0 - 8000a18: 80fb strh r3, [r7, #6] - - // Get Imaginary Data register - int16_t imag_value = ((AD5934_GetRegisterValue(AD5934_IMG_REG_LB,2))); - 8000a1a: 2102 movs r1, #2 - 8000a1c: 2097 movs r0, #151 @ 0x97 - 8000a1e: f7ff fed9 bl 80007d4 - 8000a22: 4603 mov r3, r0 - 8000a24: 80bb strh r3, [r7, #4] - - // Calculate Magnitude using float function sqrtf - float magnitude = sqrtf(((float)real_value * (float)real_value) + ((float)imag_value * (float)imag_value)); - 8000a26: f9b7 3006 ldrsh.w r3, [r7, #6] - 8000a2a: 4618 mov r0, r3 - 8000a2c: f7ff fc50 bl 80002d0 <__aeabi_i2f> - 8000a30: 4604 mov r4, r0 - 8000a32: f9b7 3006 ldrsh.w r3, [r7, #6] - 8000a36: 4618 mov r0, r3 - 8000a38: f7ff fc4a bl 80002d0 <__aeabi_i2f> - 8000a3c: 4603 mov r3, r0 - 8000a3e: 4619 mov r1, r3 - 8000a40: 4620 mov r0, r4 - 8000a42: f7ff fc99 bl 8000378 <__aeabi_fmul> - 8000a46: 4603 mov r3, r0 - 8000a48: 461d mov r5, r3 - 8000a4a: f9b7 3004 ldrsh.w r3, [r7, #4] - 8000a4e: 4618 mov r0, r3 - 8000a50: f7ff fc3e bl 80002d0 <__aeabi_i2f> - 8000a54: 4604 mov r4, r0 - 8000a56: f9b7 3004 ldrsh.w r3, [r7, #4] - 8000a5a: 4618 mov r0, r3 - 8000a5c: f7ff fc38 bl 80002d0 <__aeabi_i2f> - 8000a60: 4603 mov r3, r0 - 8000a62: 4619 mov r1, r3 - 8000a64: 4620 mov r0, r4 - 8000a66: f7ff fc87 bl 8000378 <__aeabi_fmul> - 8000a6a: 4603 mov r3, r0 - 8000a6c: 4619 mov r1, r3 - 8000a6e: 4628 mov r0, r5 - 8000a70: f7ff fb7a bl 8000168 <__addsf3> - 8000a74: 4603 mov r3, r0 - 8000a76: 4618 mov r0, r3 - 8000a78: f005 fb44 bl 8006104 - 8000a7c: 6038 str r0, [r7, #0] - - // Return magnitude value - return (magnitude); - 8000a7e: 683b ldr r3, [r7, #0] + return (real_imag_reg); + 80011d8: 687b ldr r3, [r7, #4] } - 8000a80: 4618 mov r0, r3 - 8000a82: 3708 adds r7, #8 - 8000a84: 46bd mov sp, r7 - 8000a86: bdb0 pop {r4, r5, r7, pc} + 80011da: 4618 mov r0, r3 + 80011dc: 3708 adds r7, #8 + 80011de: 46bd mov sp, r7 + 80011e0: bd80 pop {r7, pc} + ... -08000a88 : - * @param scale Escala de Ref Res, EC e RTD - * - * @return uint16_t Valor convertido na escala de UINT16_MIN a UINT16_MAX +080011e4 : + * @param valor O valor float original. + * @param casas_decimais Quantidade de casas que devem permanecer após a vírgula. + * @return float O valor com as casas decimais excedentes removidas. */ -uint16_t AD5934_Compress_To_IntScale(float value, uint8_t scale) +float AD5934_Round_Float_Precision(float value, uint8_t number_of_decimals) { - 8000a88: b5b0 push {r4, r5, r7, lr} - 8000a8a: b084 sub sp, #16 - 8000a8c: af00 add r7, sp, #0 - 8000a8e: 6078 str r0, [r7, #4] - 8000a90: 460b mov r3, r1 - 8000a92: 70fb strb r3, [r7, #3] - // Proteção contra índice inválido para evitar HardFault - if (scale >= AD5934_CH_MAX) - 8000a94: 78fb ldrb r3, [r7, #3] - 8000a96: 2b0e cmp r3, #14 - 8000a98: d901 bls.n 8000a9e - return 0; - 8000a9a: 2300 movs r3, #0 - 8000a9c: e076 b.n 8000b8c + 80011e4: b580 push {r7, lr} + 80011e6: b084 sub sp, #16 + 80011e8: af00 add r7, sp, #0 + 80011ea: 6078 str r0, [r7, #4] + 80011ec: 460b mov r3, r1 + 80011ee: 70fb strb r3, [r7, #3] + float multiply = 1.0f; + 80011f0: f04f 537e mov.w r3, #1065353216 @ 0x3f800000 + 80011f4: 60fb str r3, [r7, #12] - // Verifica limites do valor de entrada - if (value < AD5934_Scale_Float_Min[scale]) - 8000a9e: 78fb ldrb r3, [r7, #3] - 8000aa0: 4a3c ldr r2, [pc, #240] @ (8000b94 ) - 8000aa2: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8000aa6: 4619 mov r1, r3 - 8000aa8: 6878 ldr r0, [r7, #4] - 8000aaa: f7ff fe03 bl 80006b4 <__aeabi_fcmplt> - 8000aae: 4603 mov r3, r0 - 8000ab0: 2b00 cmp r3, #0 - 8000ab2: d004 beq.n 8000abe - return AD5934_Scale_Out_Min[scale]; - 8000ab4: 78fb ldrb r3, [r7, #3] - 8000ab6: 4a38 ldr r2, [pc, #224] @ (8000b98 ) - 8000ab8: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000abc: e066 b.n 8000b8c - else if (value > AD5934_Scale_Float_Max[scale]) - 8000abe: 78fb ldrb r3, [r7, #3] - 8000ac0: 4a36 ldr r2, [pc, #216] @ (8000b9c ) - 8000ac2: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8000ac6: 4619 mov r1, r3 - 8000ac8: 6878 ldr r0, [r7, #4] - 8000aca: f7ff fe11 bl 80006f0 <__aeabi_fcmpgt> - 8000ace: 4603 mov r3, r0 - 8000ad0: 2b00 cmp r3, #0 - 8000ad2: d004 beq.n 8000ade - return AD5934_Scale_Out_Max[scale]; - 8000ad4: 78fb ldrb r3, [r7, #3] - 8000ad6: 4a32 ldr r2, [pc, #200] @ (8000ba0 ) - 8000ad8: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000adc: e056 b.n 8000b8c + for (uint8_t i = 0; i < number_of_decimals; i++) + 80011f6: 2300 movs r3, #0 + 80011f8: 72fb strb r3, [r7, #11] + 80011fa: e008 b.n 800120e + multiply *= 10.0f; + 80011fc: 490f ldr r1, [pc, #60] @ (800123c ) + 80011fe: 68f8 ldr r0, [r7, #12] + 8001200: f7ff fc50 bl 8000aa4 <__aeabi_fmul> + 8001204: 4603 mov r3, r0 + 8001206: 60fb str r3, [r7, #12] + for (uint8_t i = 0; i < number_of_decimals; i++) + 8001208: 7afb ldrb r3, [r7, #11] + 800120a: 3301 adds r3, #1 + 800120c: 72fb strb r3, [r7, #11] + 800120e: 7afa ldrb r2, [r7, #11] + 8001210: 78fb ldrb r3, [r7, #3] + 8001212: 429a cmp r2, r3 + 8001214: d3f2 bcc.n 80011fc - // Converte o valor usando a fórmula: ((value - FLOAT_MIN) / (FLOAT_MAX - FLOAT_MIN)) * (UINT16_MAX - UINT16_MIN) + UINT16_MIN - uint16_t result = (uint16_t)(((value - AD5934_Scale_Float_Min[scale]) / (AD5934_Scale_Float_Max[scale] - AD5934_Scale_Float_Min[scale])) * ((float)AD5934_Scale_Out_Max[scale] - (float)AD5934_Scale_Out_Min[scale]) + (float)AD5934_Scale_Out_Min[scale]); - 8000ade: 78fb ldrb r3, [r7, #3] - 8000ae0: 4a2c ldr r2, [pc, #176] @ (8000b94 ) - 8000ae2: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8000ae6: 4619 mov r1, r3 - 8000ae8: 6878 ldr r0, [r7, #4] - 8000aea: f7ff fb3b bl 8000164 <__aeabi_fsub> - 8000aee: 4603 mov r3, r0 - 8000af0: 461c mov r4, r3 - 8000af2: 78fb ldrb r3, [r7, #3] - 8000af4: 4a29 ldr r2, [pc, #164] @ (8000b9c ) - 8000af6: f852 2023 ldr.w r2, [r2, r3, lsl #2] - 8000afa: 78fb ldrb r3, [r7, #3] - 8000afc: 4925 ldr r1, [pc, #148] @ (8000b94 ) - 8000afe: f851 3023 ldr.w r3, [r1, r3, lsl #2] - 8000b02: 4619 mov r1, r3 - 8000b04: 4610 mov r0, r2 - 8000b06: f7ff fb2d bl 8000164 <__aeabi_fsub> - 8000b0a: 4603 mov r3, r0 - 8000b0c: 4619 mov r1, r3 - 8000b0e: 4620 mov r0, r4 - 8000b10: f7ff fce6 bl 80004e0 <__aeabi_fdiv> - 8000b14: 4603 mov r3, r0 - 8000b16: 461d mov r5, r3 - 8000b18: 78fb ldrb r3, [r7, #3] - 8000b1a: 4a21 ldr r2, [pc, #132] @ (8000ba0 ) - 8000b1c: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000b20: 4618 mov r0, r3 - 8000b22: f7ff fbd1 bl 80002c8 <__aeabi_ui2f> - 8000b26: 4604 mov r4, r0 - 8000b28: 78fb ldrb r3, [r7, #3] - 8000b2a: 4a1b ldr r2, [pc, #108] @ (8000b98 ) - 8000b2c: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000b30: 4618 mov r0, r3 - 8000b32: f7ff fbc9 bl 80002c8 <__aeabi_ui2f> - 8000b36: 4603 mov r3, r0 - 8000b38: 4619 mov r1, r3 - 8000b3a: 4620 mov r0, r4 - 8000b3c: f7ff fb12 bl 8000164 <__aeabi_fsub> - 8000b40: 4603 mov r3, r0 - 8000b42: 4619 mov r1, r3 - 8000b44: 4628 mov r0, r5 - 8000b46: f7ff fc17 bl 8000378 <__aeabi_fmul> - 8000b4a: 4603 mov r3, r0 - 8000b4c: 461c mov r4, r3 - 8000b4e: 78fb ldrb r3, [r7, #3] - 8000b50: 4a11 ldr r2, [pc, #68] @ (8000b98 ) - 8000b52: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000b56: 4618 mov r0, r3 - 8000b58: f7ff fbb6 bl 80002c8 <__aeabi_ui2f> - 8000b5c: 4603 mov r3, r0 - 8000b5e: 4619 mov r1, r3 - 8000b60: 4620 mov r0, r4 - 8000b62: f7ff fb01 bl 8000168 <__addsf3> - 8000b66: 4603 mov r3, r0 - 8000b68: 4618 mov r0, r3 - 8000b6a: f7ff fde1 bl 8000730 <__aeabi_f2uiz> - 8000b6e: 4603 mov r3, r0 - 8000b70: 81fb strh r3, [r7, #14] - - // Garante que o resultado não exceda o limite superior - if (result > AD5934_Scale_Out_Max[scale]) - 8000b72: 78fb ldrb r3, [r7, #3] - 8000b74: 4a0a ldr r2, [pc, #40] @ (8000ba0 ) - 8000b76: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000b7a: 89fa ldrh r2, [r7, #14] - 8000b7c: 429a cmp r2, r3 - 8000b7e: d904 bls.n 8000b8a - return (AD5934_Scale_Out_Max[scale]); - 8000b80: 78fb ldrb r3, [r7, #3] - 8000b82: 4a07 ldr r2, [pc, #28] @ (8000ba0 ) - 8000b84: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000b88: e000 b.n 8000b8c - - return result; - 8000b8a: 89fb ldrh r3, [r7, #14] + return roundf(value * multiply) / multiply; + 8001216: 68f9 ldr r1, [r7, #12] + 8001218: 6878 ldr r0, [r7, #4] + 800121a: f7ff fc43 bl 8000aa4 <__aeabi_fmul> + 800121e: 4603 mov r3, r0 + 8001220: 4618 mov r0, r3 + 8001222: f005 fca9 bl 8006b78 + 8001226: 4603 mov r3, r0 + 8001228: 68f9 ldr r1, [r7, #12] + 800122a: 4618 mov r0, r3 + 800122c: f7ff fcee bl 8000c0c <__aeabi_fdiv> + 8001230: 4603 mov r3, r0 } - 8000b8c: 4618 mov r0, r3 - 8000b8e: 3710 adds r7, #16 - 8000b90: 46bd mov sp, r7 - 8000b92: bdb0 pop {r4, r5, r7, pc} - 8000b94: 0800624c .word 0x0800624c - 8000b98: 080062c4 .word 0x080062c4 - 8000b9c: 08006288 .word 0x08006288 - 8000ba0: 080062e4 .word 0x080062e4 + 8001232: 4618 mov r0, r3 + 8001234: 3710 adds r7, #16 + 8001236: 46bd mov sp, r7 + 8001238: bd80 pop {r7, pc} + 800123a: bf00 nop + 800123c: 41200000 .word 0x41200000 -08000ba4 : +08001240 : * @param none * * @return none */ void AD5934_Process_System(void) { - 8000ba4: b580 push {r7, lr} - 8000ba6: b082 sub sp, #8 - 8000ba8: af00 add r7, sp, #0 - static uint32_t state_timer = 0; - uint8_t status = 0; - 8000baa: 2300 movs r3, #0 - 8000bac: 71fb strb r3, [r7, #7] - - switch (ad5934_state) - 8000bae: 4b85 ldr r3, [pc, #532] @ (8000dc4 ) - 8000bb0: 781b ldrb r3, [r3, #0] - 8000bb2: b2db uxtb r3, r3 - 8000bb4: 2b06 cmp r3, #6 - 8000bb6: f200 8101 bhi.w 8000dbc - 8000bba: a201 add r2, pc, #4 @ (adr r2, 8000bc0 ) - 8000bbc: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8000bc0: 08000bdd .word 0x08000bdd - 8000bc4: 08000c1b .word 0x08000c1b - 8000bc8: 08000c43 .word 0x08000c43 - 8000bcc: 08000c63 .word 0x08000c63 - 8000bd0: 08000cbb .word 0x08000cbb - 8000bd4: 08000cd1 .word 0x08000cd1 - 8000bd8: 08000bfd .word 0x08000bfd + 8001240: b5b0 push {r4, r5, r7, lr} + 8001242: b084 sub sp, #16 + 8001244: af00 add r7, sp, #0 + switch (ad5934_state) + 8001246: 4b95 ldr r3, [pc, #596] @ (800149c ) + 8001248: 781b ldrb r3, [r3, #0] + 800124a: b2db uxtb r3, r3 + 800124c: 2b06 cmp r3, #6 + 800124e: f200 8121 bhi.w 8001494 + 8001252: a201 add r2, pc, #4 @ (adr r2, 8001258 ) + 8001254: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8001258: 08001275 .word 0x08001275 + 800125c: 08001295 .word 0x08001295 + 8001260: 080012a3 .word 0x080012a3 + 8001264: 080012c3 .word 0x080012c3 + 8001268: 08001495 .word 0x08001495 + 800126c: 08001495 .word 0x08001495 + 8001270: 080013b3 .word 0x080013b3 { case AD5934_IDLE: - ADG715_SetChannels(current_mux_channel); // Starts changing the mux channel - 8000bdc: 4b7a ldr r3, [pc, #488] @ (8000dc8 ) - 8000bde: 781b ldrb r3, [r3, #0] - 8000be0: 4618 mov r0, r3 - 8000be2: f000 faab bl 800113c + ADG715_SetChannels(current_hw_mux_connection); // Starts changing the mux channel + 8001274: 4b8a ldr r3, [pc, #552] @ (80014a0 ) + 8001276: 781b ldrb r3, [r3, #0] + 8001278: 4618 mov r0, r3 + 800127a: f000 fad3 bl 8001824 is_new_channel = 1; // Forces first channel - 8000be6: 4b79 ldr r3, [pc, #484] @ (8000dcc ) - 8000be8: 2201 movs r2, #1 - 8000bea: 701a strb r2, [r3, #0] + 800127e: 4b89 ldr r3, [pc, #548] @ (80014a4 ) + 8001280: 2201 movs r2, #1 + 8001282: 701a strb r2, [r3, #0] state_timer = g_ms_counter; - 8000bec: 4b78 ldr r3, [pc, #480] @ (8000dd0 ) - 8000bee: 681b ldr r3, [r3, #0] - 8000bf0: 4a78 ldr r2, [pc, #480] @ (8000dd4 ) - 8000bf2: 6013 str r3, [r2, #0] + 8001284: 4b88 ldr r3, [pc, #544] @ (80014a8 ) + 8001286: 681b ldr r3, [r3, #0] + 8001288: 4a88 ldr r2, [pc, #544] @ (80014ac ) + 800128a: 6013 str r3, [r2, #0] ad5934_state = AD5934_WAIT_MUX; - 8000bf4: 4b73 ldr r3, [pc, #460] @ (8000dc4 ) - 8000bf6: 2206 movs r2, #6 - 8000bf8: 701a strb r2, [r3, #0] + 800128c: 4b83 ldr r3, [pc, #524] @ (800149c ) + 800128e: 2201 movs r2, #1 + 8001290: 701a strb r2, [r3, #0] break; - 8000bfa: e0df b.n 8000dbc + 8001292: e0ff b.n 8001494 case AD5934_WAIT_MUX: - if ((g_ms_counter - state_timer) >= AD5934_SYNC_MUX_SETTLING) // Wait until AD715 Mux switch stability - 8000bfc: 4b74 ldr r3, [pc, #464] @ (8000dd0 ) - 8000bfe: 681a ldr r2, [r3, #0] - 8000c00: 4b74 ldr r3, [pc, #464] @ (8000dd4 ) - 8000c02: 681b ldr r3, [r3, #0] - 8000c04: 1ad3 subs r3, r2, r3 - 8000c06: 2b04 cmp r3, #4 - 8000c08: f240 80d3 bls.w 8000db2 - { - sweep_count = 0; - 8000c0c: 4b72 ldr r3, [pc, #456] @ (8000dd8 ) - 8000c0e: 2200 movs r2, #0 - 8000c10: 701a strb r2, [r3, #0] - ad5934_state = AD5934_START_CONVERSION; - 8000c12: 4b6c ldr r3, [pc, #432] @ (8000dc4 ) - 8000c14: 2201 movs r2, #1 - 8000c16: 701a strb r2, [r3, #0] - } + //if ((g_ms_counter - state_timer) >= AD5934_SYNC_MUX_SETTLING) // Wait until AD715 Mux switch stability + //{ + HAL_Delay(15); + 8001294: 200f movs r0, #15 + 8001296: f001 fee7 bl 8003068 + ad5934_state = AD5934_START_CONVERSION; + 800129a: 4b80 ldr r3, [pc, #512] @ (800149c ) + 800129c: 2202 movs r2, #2 + 800129e: 701a strb r2, [r3, #0] + //} break; - 8000c18: e0cb b.n 8000db2 - + 80012a0: e0f8 b.n 8001494 case AD5934_START_CONVERSION: - state_timer = g_ms_counter; // Starts to count the Burst period for the sweeps - 8000c1a: 4b6d ldr r3, [pc, #436] @ (8000dd0 ) - 8000c1c: 681b ldr r3, [r3, #0] - 8000c1e: 4a6d ldr r2, [pc, #436] @ (8000dd4 ) - 8000c20: 6013 str r3, [r2, #0] - /* DECISÃO DE COMANDO: Novo canal vs Leituras sucessivas */ - if (is_new_channel) // Decision: Channel Switched or Next Sample in the Burst ? - 8000c22: 4b6a ldr r3, [pc, #424] @ (8000dcc ) - 8000c24: 781b ldrb r3, [r3, #0] - 8000c26: 2b00 cmp r3, #0 - 8000c28: d005 beq.n 8000c36 - { - AD5934_RestartSweep(); // Clean some AD5934 internal registers to Re-Start Sweep - 8000c2a: f7ff fe3d bl 80008a8 - is_new_channel = 0; // Resets the flag to read the next Sample Burst - 8000c2e: 4b67 ldr r3, [pc, #412] @ (8000dcc ) - 8000c30: 2200 movs r2, #0 - 8000c32: 701a strb r2, [r3, #0] - 8000c34: e001 b.n 8000c3a - } - else - { - AD5934_Repeat_Sweep(); // Get Sample and just repeat reading - 8000c36: f7ff fe4f bl 80008d8 - } + //state_timer = g_ms_counter; // Starts to count the Burst period for the sweeps + + /* DECISÃO DE COMANDO: Novo canal vs Leituras sucessivas */ + if (is_new_channel) // Decision: Channel Switched or Next Sample in the Burst ? + 80012a2: 4b80 ldr r3, [pc, #512] @ (80014a4 ) + 80012a4: 781b ldrb r3, [r3, #0] + 80012a6: 2b00 cmp r3, #0 + 80012a8: d005 beq.n 80012b6 + { + AD5934_RestartSweep(); // Clean some AD5934 internal registers to Re-Start Sweep + 80012aa: f7ff feb9 bl 8001020 + is_new_channel = 0; // Resets the flag to read the next Sample Burst + 80012ae: 4b7d ldr r3, [pc, #500] @ (80014a4 ) + 80012b0: 2200 movs r2, #0 + 80012b2: 701a strb r2, [r3, #0] + 80012b4: e001 b.n 80012ba + } + else + { + AD5934_Repeat_Sweep(); // Get Sample and just repeat reading + 80012b6: f7ff fecb bl 8001050 + } + + ad5934_state = AD5934_WAIT_CONVERSION; // Next State + 80012ba: 4b78 ldr r3, [pc, #480] @ (800149c ) + 80012bc: 2203 movs r2, #3 + 80012be: 701a strb r2, [r3, #0] - ad5934_state = AD5934_WAIT_CONVERSION; // Next State - 8000c3a: 4b62 ldr r3, [pc, #392] @ (8000dc4 ) - 8000c3c: 2202 movs r2, #2 - 8000c3e: 701a strb r2, [r3, #0] break; - 8000c40: e0bc b.n 8000dbc + 80012c0: e0e8 b.n 8001494 case AD5934_WAIT_CONVERSION: - status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); // Check if the current converion is ready in the AD5934 - 8000c42: 2101 movs r1, #1 - 8000c44: 208f movs r0, #143 @ 0x8f - 8000c46: f7ff fdc5 bl 80007d4 - 8000c4a: 4603 mov r3, r0 - 8000c4c: 71fb strb r3, [r7, #7] + uint8_t status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); // Check if the current converion is ready in the AD5934 + 80012c2: 2101 movs r1, #1 + 80012c4: 208f movs r0, #143 @ 0x8f + 80012c6: f7ff fe41 bl 8000f4c + 80012ca: 4603 mov r3, r0 + 80012cc: 73fb strb r3, [r7, #15] if ((status & AD5934_STATUS_DATA_VALID) != 0) - 8000c4e: 79fb ldrb r3, [r7, #7] - 8000c50: f003 0302 and.w r3, r3, #2 - 8000c54: 2b00 cmp r3, #0 - 8000c56: f000 80ae beq.w 8000db6 + 80012ce: 7bfb ldrb r3, [r7, #15] + 80012d0: f003 0302 and.w r3, r3, #2 + 80012d4: 2b00 cmp r3, #0 + 80012d6: f000 80dc beq.w 8001492 { - ad5934_state = AD5934_READ_DATA; - 8000c5a: 4b5a ldr r3, [pc, #360] @ (8000dc4 ) - 8000c5c: 2203 movs r2, #3 - 8000c5e: 701a strb r2, [r3, #0] + uint32_t magnitude_int = AD5934_Get_Real_Imag_Numbers(); + 80012da: f7ff ff75 bl 80011c8 + 80012de: 60b8 str r0, [r7, #8] + int16_t mag_real = (int16_t)(magnitude_int>>16); + 80012e0: 68bb ldr r3, [r7, #8] + 80012e2: 0c1b lsrs r3, r3, #16 + 80012e4: 80fb strh r3, [r7, #6] + int16_t mag_imag = (int16_t)(magnitude_int & 0x0000FFFF); + 80012e6: 68bb ldr r3, [r7, #8] + 80012e8: 80bb strh r3, [r7, #4] + float mag_float = sqrtf(((float)mag_real * (float)mag_real) + ((float)mag_imag * (float)mag_imag)); + 80012ea: f9b7 3006 ldrsh.w r3, [r7, #6] + 80012ee: 4618 mov r0, r3 + 80012f0: f7ff fb84 bl 80009fc <__aeabi_i2f> + 80012f4: 4604 mov r4, r0 + 80012f6: f9b7 3006 ldrsh.w r3, [r7, #6] + 80012fa: 4618 mov r0, r3 + 80012fc: f7ff fb7e bl 80009fc <__aeabi_i2f> + 8001300: 4603 mov r3, r0 + 8001302: 4619 mov r1, r3 + 8001304: 4620 mov r0, r4 + 8001306: f7ff fbcd bl 8000aa4 <__aeabi_fmul> + 800130a: 4603 mov r3, r0 + 800130c: 461d mov r5, r3 + 800130e: f9b7 3004 ldrsh.w r3, [r7, #4] + 8001312: 4618 mov r0, r3 + 8001314: f7ff fb72 bl 80009fc <__aeabi_i2f> + 8001318: 4604 mov r4, r0 + 800131a: f9b7 3004 ldrsh.w r3, [r7, #4] + 800131e: 4618 mov r0, r3 + 8001320: f7ff fb6c bl 80009fc <__aeabi_i2f> + 8001324: 4603 mov r3, r0 + 8001326: 4619 mov r1, r3 + 8001328: 4620 mov r0, r4 + 800132a: f7ff fbbb bl 8000aa4 <__aeabi_fmul> + 800132e: 4603 mov r3, r0 + 8001330: 4619 mov r1, r3 + 8001332: 4628 mov r0, r5 + 8001334: f7ff faae bl 8000894 <__addsf3> + 8001338: 4603 mov r3, r0 + 800133a: 4618 mov r0, r3 + 800133c: f005 fb8c bl 8006a58 + 8001340: 6038 str r0, [r7, #0] + + switch (current_mux_channel) + 8001342: 4b5b ldr r3, [pc, #364] @ (80014b0 ) + 8001344: 781b ldrb r3, [r3, #0] + 8001346: 2b02 cmp r3, #2 + 8001348: d01e beq.n 8001388 + 800134a: 2b02 cmp r3, #2 + 800134c: dc2a bgt.n 80013a4 + 800134e: 2b00 cmp r3, #0 + 8001350: d002 beq.n 8001358 + 8001352: 2b01 cmp r3, #1 + 8001354: d00e beq.n 8001374 + 8001356: e025 b.n 80013a4 + { + case AD5934_ID_RTD: + AD5934_RTD_NewSample(mag_float); + 8001358: 6838 ldr r0, [r7, #0] + 800135a: f000 fa19 bl 8001790 + rtd_now = mag_float; + 800135e: 6838 ldr r0, [r7, #0] + 8001360: f7ff fd7c bl 8000e5c <__aeabi_f2iz> + 8001364: 4603 mov r3, r0 + 8001366: b21a sxth r2, r3 + 8001368: 4b52 ldr r3, [pc, #328] @ (80014b4 ) + 800136a: 801a strh r2, [r3, #0] + rtd_now_i = mag_imag; + 800136c: 4a52 ldr r2, [pc, #328] @ (80014b8 ) + 800136e: 88bb ldrh r3, [r7, #4] + 8001370: 8013 strh r3, [r2, #0] + break; + 8001372: e017 b.n 80013a4 + + case AD5934_ID_EC: + AD5934_EC_NewSample(mag_float); + 8001374: 6838 ldr r0, [r7, #0] + 8001376: f000 fa19 bl 80017ac + ec_now = mag_real; + 800137a: 4a50 ldr r2, [pc, #320] @ (80014bc ) + 800137c: 88fb ldrh r3, [r7, #6] + 800137e: 8013 strh r3, [r2, #0] + ec_now_i = mag_imag; + 8001380: 4a4f ldr r2, [pc, #316] @ (80014c0 ) + 8001382: 88bb ldrh r3, [r7, #4] + 8001384: 8013 strh r3, [r2, #0] + break; + 8001386: e00d b.n 80013a4 + + case AD5934_ID_REF: + AD5934_Reference_NewSample(mag_float); + 8001388: 6838 ldr r0, [r7, #0] + 800138a: f000 fa1d bl 80017c8 + ref_now = mag_float; + 800138e: 6838 ldr r0, [r7, #0] + 8001390: f7ff fd64 bl 8000e5c <__aeabi_f2iz> + 8001394: 4603 mov r3, r0 + 8001396: b21a sxth r2, r3 + 8001398: 4b4a ldr r3, [pc, #296] @ (80014c4 ) + 800139a: 801a strh r2, [r3, #0] + ref_now_i = mag_imag; + 800139c: 4a4a ldr r2, [pc, #296] @ (80014c8 ) + 800139e: 88bb ldrh r3, [r7, #4] + 80013a0: 8013 strh r3, [r2, #0] + break; + 80013a2: bf00 nop + sweep_count++; + ad5934_state = AD5934_START_CONVERSION; + } + else + { + sweep_count = 0; + 80013a4: 4b49 ldr r3, [pc, #292] @ (80014cc ) + 80013a6: 2200 movs r2, #0 + 80013a8: 701a strb r2, [r3, #0] + ad5934_state = AD5934_SWITCH_MUX; + 80013aa: 4b3c ldr r3, [pc, #240] @ (800149c ) + 80013ac: 2206 movs r2, #6 + 80013ae: 701a strb r2, [r3, #0] + } } break; - 8000c60: e0a9 b.n 8000db6 + 80013b0: e06f b.n 8001492 - case AD5934_READ_DATA: - { - float magnitude = AD5934_GetMagnitude(); - 8000c62: f7ff fed1 bl 8000a08 - 8000c66: 6038 str r0, [r7, #0] - - switch (current_mux_channel) - 8000c68: 4b57 ldr r3, [pc, #348] @ (8000dc8 ) - 8000c6a: 781b ldrb r3, [r3, #0] - 8000c6c: 2b02 cmp r3, #2 - 8000c6e: d00e beq.n 8000c8e - 8000c70: 2b02 cmp r3, #2 - 8000c72: dc10 bgt.n 8000c96 - 8000c74: 2b00 cmp r3, #0 - 8000c76: d002 beq.n 8000c7e - 8000c78: 2b01 cmp r3, #1 - 8000c7a: d004 beq.n 8000c86 - 8000c7c: e00b b.n 8000c96 - { - case AD5934_ID_RTD: - AD5934_RTD_NewSample(magnitude); - 8000c7e: 6838 ldr r0, [r7, #0] - 8000c80: f000 fa12 bl 80010a8 - break; - 8000c84: e007 b.n 8000c96 - - case AD5934_ID_EC: - AD5934_EC_NewSample(magnitude); - 8000c86: 6838 ldr r0, [r7, #0] - 8000c88: f000 fa1c bl 80010c4 - break; - 8000c8c: e003 b.n 8000c96 - - case AD5934_ID_REF: - AD5934_Reference_NewSample(magnitude); - 8000c8e: 6838 ldr r0, [r7, #0] - 8000c90: f000 fa26 bl 80010e0 - break; - 8000c94: bf00 nop - } - - sweep_count++; - 8000c96: 4b50 ldr r3, [pc, #320] @ (8000dd8 ) - 8000c98: 781b ldrb r3, [r3, #0] - 8000c9a: 3301 adds r3, #1 - 8000c9c: b2da uxtb r2, r3 - 8000c9e: 4b4e ldr r3, [pc, #312] @ (8000dd8 ) - 8000ca0: 701a strb r2, [r3, #0] - - if (sweep_count >= AD5934_BURST_SIZE) // Check if number of samples for the burst is complete - 8000ca2: 4b4d ldr r3, [pc, #308] @ (8000dd8 ) - 8000ca4: 781b ldrb r3, [r3, #0] - 8000ca6: 2b04 cmp r3, #4 - 8000ca8: d903 bls.n 8000cb2 - { - ad5934_state = AD5934_SWITCH_MUX; // Next Re-Start Sweep - 8000caa: 4b46 ldr r3, [pc, #280] @ (8000dc4 ) - 8000cac: 2205 movs r2, #5 - 8000cae: 701a strb r2, [r3, #0] - else - { - ad5934_state = AD5934_WAIT_NEXT_SWEEP; // Next Repeat Sweep - } - } - break; - 8000cb0: e084 b.n 8000dbc - ad5934_state = AD5934_WAIT_NEXT_SWEEP; // Next Repeat Sweep - 8000cb2: 4b44 ldr r3, [pc, #272] @ (8000dc4 ) - 8000cb4: 2204 movs r2, #4 - 8000cb6: 701a strb r2, [r3, #0] - break; - 8000cb8: e080 b.n 8000dbc - - case AD5934_WAIT_NEXT_SWEEP: - if ((g_ms_counter - state_timer) >= AD5934_TIME_PER_SWEEP) - 8000cba: 4b45 ldr r3, [pc, #276] @ (8000dd0 ) - 8000cbc: 681a ldr r2, [r3, #0] - 8000cbe: 4b45 ldr r3, [pc, #276] @ (8000dd4 ) - 8000cc0: 681b ldr r3, [r3, #0] - 8000cc2: 1ad3 subs r3, r2, r3 - 8000cc4: 2b3b cmp r3, #59 @ 0x3b - 8000cc6: d978 bls.n 8000dba - { - ad5934_state = AD5934_START_CONVERSION; - 8000cc8: 4b3e ldr r3, [pc, #248] @ (8000dc4 ) - 8000cca: 2201 movs r2, #1 - 8000ccc: 701a strb r2, [r3, #0] - } - break; - 8000cce: e074 b.n 8000dba case AD5934_SWITCH_MUX: - AD5934_StopSweep(); // Put AD5934 in Standby - 8000cd0: f7ff fe0b bl 80008ea + AD5934_StopSweep(); // Put AD5934 in Standby + 80013b2: f7ff fe56 bl 8001062 current_mux_channel = (uint8_t)((current_mux_channel + 1) % 3); // Pointer to the next channel (Circular Buffer 0 to 2) - 8000cd4: 4b3c ldr r3, [pc, #240] @ (8000dc8 ) - 8000cd6: 781b ldrb r3, [r3, #0] - 8000cd8: 1c5a adds r2, r3, #1 - 8000cda: 4b40 ldr r3, [pc, #256] @ (8000ddc ) - 8000cdc: fb83 3102 smull r3, r1, r3, r2 - 8000ce0: 17d3 asrs r3, r2, #31 - 8000ce2: 1ac9 subs r1, r1, r3 - 8000ce4: 460b mov r3, r1 - 8000ce6: 005b lsls r3, r3, #1 - 8000ce8: 440b add r3, r1 - 8000cea: 1ad1 subs r1, r2, r3 - 8000cec: b2ca uxtb r2, r1 - 8000cee: 4b36 ldr r3, [pc, #216] @ (8000dc8 ) - 8000cf0: 701a strb r2, [r3, #0] + 80013b6: 4b3e ldr r3, [pc, #248] @ (80014b0 ) + 80013b8: 781b ldrb r3, [r3, #0] + 80013ba: 1c5a adds r2, r3, #1 + 80013bc: 4b44 ldr r3, [pc, #272] @ (80014d0 ) + 80013be: fb83 3102 smull r3, r1, r3, r2 + 80013c2: 17d3 asrs r3, r2, #31 + 80013c4: 1ac9 subs r1, r1, r3 + 80013c6: 460b mov r3, r1 + 80013c8: 005b lsls r3, r3, #1 + 80013ca: 440b add r3, r1 + 80013cc: 1ad1 subs r1, r2, r3 + 80013ce: b2ca uxtb r2, r1 + 80013d0: 4b37 ldr r3, [pc, #220] @ (80014b0 ) + 80013d2: 701a strb r2, [r3, #0] switch (current_mux_channel) - 8000cf2: 4b35 ldr r3, [pc, #212] @ (8000dc8 ) - 8000cf4: 781b ldrb r3, [r3, #0] - 8000cf6: 2b02 cmp r3, #2 - 8000cf8: d034 beq.n 8000d64 - 8000cfa: 2b02 cmp r3, #2 - 8000cfc: dc49 bgt.n 8000d92 - 8000cfe: 2b00 cmp r3, #0 - 8000d00: d002 beq.n 8000d08 - 8000d02: 2b01 cmp r3, #1 - 8000d04: d017 beq.n 8000d36 - 8000d06: e044 b.n 8000d92 + 80013d4: 4b36 ldr r3, [pc, #216] @ (80014b0 ) + 80013d6: 781b ldrb r3, [r3, #0] + 80013d8: 2b02 cmp r3, #2 + 80013da: d034 beq.n 8001446 + 80013dc: 2b02 cmp r3, #2 + 80013de: dc49 bgt.n 8001474 + 80013e0: 2b00 cmp r3, #0 + 80013e2: d002 beq.n 80013ea + 80013e4: 2b01 cmp r3, #1 + 80013e6: d017 beq.n 8001418 + 80013e8: e044 b.n 8001474 { case AD5934_ID_RTD: if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 8000d08: 2180 movs r1, #128 @ 0x80 - 8000d0a: 4835 ldr r0, [pc, #212] @ (8000de0 ) - 8000d0c: f002 fa7c bl 8003208 - 8000d10: 4603 mov r3, r0 - 8000d12: 2b01 cmp r3, #1 - 8000d14: d107 bne.n 8000d26 + 80013ea: 2180 movs r1, #128 @ 0x80 + 80013ec: 4839 ldr r0, [pc, #228] @ (80014d4 ) + 80013ee: f002 fbb5 bl 8003b5c + 80013f2: 4603 mov r3, r0 + 80013f4: 2b01 cmp r3, #1 + 80013f6: d107 bne.n 8001408 current_rtd_mux = current_hw_mux_connection = AD5934_CH_RTD_LOW_GAIN; //PT100 - 8000d16: 4b33 ldr r3, [pc, #204] @ (8000de4 ) - 8000d18: 2209 movs r2, #9 - 8000d1a: 701a strb r2, [r3, #0] - 8000d1c: 4b31 ldr r3, [pc, #196] @ (8000de4 ) - 8000d1e: 781a ldrb r2, [r3, #0] - 8000d20: 4b31 ldr r3, [pc, #196] @ (8000de8 ) - 8000d22: 701a strb r2, [r3, #0] + 80013f8: 4b29 ldr r3, [pc, #164] @ (80014a0 ) + 80013fa: 2209 movs r2, #9 + 80013fc: 701a strb r2, [r3, #0] + 80013fe: 4b28 ldr r3, [pc, #160] @ (80014a0 ) + 8001400: 781a ldrb r2, [r3, #0] + 8001402: 4b35 ldr r3, [pc, #212] @ (80014d8 ) + 8001404: 701a strb r2, [r3, #0] else current_rtd_mux = current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 break; - 8000d24: e035 b.n 8000d92 + 8001406: e035 b.n 8001474 current_rtd_mux = current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 - 8000d26: 4b2f ldr r3, [pc, #188] @ (8000de4 ) - 8000d28: 220a movs r2, #10 - 8000d2a: 701a strb r2, [r3, #0] - 8000d2c: 4b2d ldr r3, [pc, #180] @ (8000de4 ) - 8000d2e: 781a ldrb r2, [r3, #0] - 8000d30: 4b2d ldr r3, [pc, #180] @ (8000de8 ) - 8000d32: 701a strb r2, [r3, #0] + 8001408: 4b25 ldr r3, [pc, #148] @ (80014a0 ) + 800140a: 220a movs r2, #10 + 800140c: 701a strb r2, [r3, #0] + 800140e: 4b24 ldr r3, [pc, #144] @ (80014a0 ) + 8001410: 781a ldrb r2, [r3, #0] + 8001412: 4b31 ldr r3, [pc, #196] @ (80014d8 ) + 8001414: 701a strb r2, [r3, #0] break; - 8000d34: e02d b.n 8000d92 + 8001416: e02d b.n 8001474 case AD5934_ID_EC: if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) // Hardware Setup: Gain Selection (PA6) - 8000d36: 2140 movs r1, #64 @ 0x40 - 8000d38: 4829 ldr r0, [pc, #164] @ (8000de0 ) - 8000d3a: f002 fa65 bl 8003208 - 8000d3e: 4603 mov r3, r0 - 8000d40: 2b01 cmp r3, #1 - 8000d42: d107 bne.n 8000d54 + 8001418: 2140 movs r1, #64 @ 0x40 + 800141a: 482e ldr r0, [pc, #184] @ (80014d4 ) + 800141c: f002 fb9e bl 8003b5c + 8001420: 4603 mov r3, r0 + 8001422: 2b01 cmp r3, #1 + 8001424: d107 bne.n 8001436 current_ec_mux = current_hw_mux_connection = AD5934_CH_EC_HIGH_GAIN; - 8000d44: 4b27 ldr r3, [pc, #156] @ (8000de4 ) - 8000d46: 220e movs r2, #14 - 8000d48: 701a strb r2, [r3, #0] - 8000d4a: 4b26 ldr r3, [pc, #152] @ (8000de4 ) - 8000d4c: 781a ldrb r2, [r3, #0] - 8000d4e: 4b27 ldr r3, [pc, #156] @ (8000dec ) - 8000d50: 701a strb r2, [r3, #0] + 8001426: 4b1e ldr r3, [pc, #120] @ (80014a0 ) + 8001428: 220e movs r2, #14 + 800142a: 701a strb r2, [r3, #0] + 800142c: 4b1c ldr r3, [pc, #112] @ (80014a0 ) + 800142e: 781a ldrb r2, [r3, #0] + 8001430: 4b2a ldr r3, [pc, #168] @ (80014dc ) + 8001432: 701a strb r2, [r3, #0] else current_ec_mux = current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; break; - 8000d52: e01e b.n 8000d92 + 8001434: e01e b.n 8001474 current_ec_mux = current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; - 8000d54: 4b23 ldr r3, [pc, #140] @ (8000de4 ) - 8000d56: 220d movs r2, #13 - 8000d58: 701a strb r2, [r3, #0] - 8000d5a: 4b22 ldr r3, [pc, #136] @ (8000de4 ) - 8000d5c: 781a ldrb r2, [r3, #0] - 8000d5e: 4b23 ldr r3, [pc, #140] @ (8000dec ) - 8000d60: 701a strb r2, [r3, #0] + 8001436: 4b1a ldr r3, [pc, #104] @ (80014a0 ) + 8001438: 220d movs r2, #13 + 800143a: 701a strb r2, [r3, #0] + 800143c: 4b18 ldr r3, [pc, #96] @ (80014a0 ) + 800143e: 781a ldrb r2, [r3, #0] + 8001440: 4b26 ldr r3, [pc, #152] @ (80014dc ) + 8001442: 701a strb r2, [r3, #0] break; - 8000d62: e016 b.n 8000d92 + 8001444: e016 b.n 8001474 case AD5934_ID_REF: if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 8000d64: 2180 movs r1, #128 @ 0x80 - 8000d66: 481e ldr r0, [pc, #120] @ (8000de0 ) - 8000d68: f002 fa4e bl 8003208 - 8000d6c: 4603 mov r3, r0 - 8000d6e: 2b01 cmp r3, #1 - 8000d70: d107 bne.n 8000d82 + 8001446: 2180 movs r1, #128 @ 0x80 + 8001448: 4822 ldr r0, [pc, #136] @ (80014d4 ) + 800144a: f002 fb87 bl 8003b5c + 800144e: 4603 mov r3, r0 + 8001450: 2b01 cmp r3, #1 + 8001452: d107 bne.n 8001464 current_ref_mux = current_hw_mux_connection = AD5934_CH_REF100R_LOW_GAIN; // 100 Ohms Reference Resistor - 8000d72: 4b1c ldr r3, [pc, #112] @ (8000de4 ) - 8000d74: 2200 movs r2, #0 - 8000d76: 701a strb r2, [r3, #0] - 8000d78: 4b1a ldr r3, [pc, #104] @ (8000de4 ) - 8000d7a: 781a ldrb r2, [r3, #0] - 8000d7c: 4b1c ldr r3, [pc, #112] @ (8000df0 ) - 8000d7e: 701a strb r2, [r3, #0] + 8001454: 4b12 ldr r3, [pc, #72] @ (80014a0 ) + 8001456: 2200 movs r2, #0 + 8001458: 701a strb r2, [r3, #0] + 800145a: 4b11 ldr r3, [pc, #68] @ (80014a0 ) + 800145c: 781a ldrb r2, [r3, #0] + 800145e: 4b20 ldr r3, [pc, #128] @ (80014e0 ) + 8001460: 701a strb r2, [r3, #0] else current_ref_mux = current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor break; - 8000d80: e006 b.n 8000d90 + 8001462: e006 b.n 8001472 current_ref_mux = current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor - 8000d82: 4b18 ldr r3, [pc, #96] @ (8000de4 ) - 8000d84: 2204 movs r2, #4 - 8000d86: 701a strb r2, [r3, #0] - 8000d88: 4b16 ldr r3, [pc, #88] @ (8000de4 ) - 8000d8a: 781a ldrb r2, [r3, #0] - 8000d8c: 4b18 ldr r3, [pc, #96] @ (8000df0 ) - 8000d8e: 701a strb r2, [r3, #0] + 8001464: 4b0e ldr r3, [pc, #56] @ (80014a0 ) + 8001466: 2204 movs r2, #4 + 8001468: 701a strb r2, [r3, #0] + 800146a: 4b0d ldr r3, [pc, #52] @ (80014a0 ) + 800146c: 781a ldrb r2, [r3, #0] + 800146e: 4b1c ldr r3, [pc, #112] @ (80014e0 ) + 8001470: 701a strb r2, [r3, #0] break; - 8000d90: bf00 nop + 8001472: bf00 nop } ADG715_SetChannels(current_hw_mux_connection); // Change the analog mux - 8000d92: 4b14 ldr r3, [pc, #80] @ (8000de4 ) - 8000d94: 781b ldrb r3, [r3, #0] - 8000d96: 4618 mov r0, r3 - 8000d98: f000 f9d0 bl 800113c + 8001474: 4b0a ldr r3, [pc, #40] @ (80014a0 ) + 8001476: 781b ldrb r3, [r3, #0] + 8001478: 4618 mov r0, r3 + 800147a: f000 f9d3 bl 8001824 + HAL_Delay(12); + 800147e: 200c movs r0, #12 + 8001480: f001 fdf2 bl 8003068 is_new_channel = 1; // Channel Switched - 8000d9c: 4b0b ldr r3, [pc, #44] @ (8000dcc ) - 8000d9e: 2201 movs r2, #1 - 8000da0: 701a strb r2, [r3, #0] - state_timer = g_ms_counter; // Reload timer to wait for stability - 8000da2: 4b0b ldr r3, [pc, #44] @ (8000dd0 ) - 8000da4: 681b ldr r3, [r3, #0] - 8000da6: 4a0b ldr r2, [pc, #44] @ (8000dd4 ) - 8000da8: 6013 str r3, [r2, #0] - ad5934_state = AD5934_WAIT_MUX; // Next State - 8000daa: 4b06 ldr r3, [pc, #24] @ (8000dc4 ) - 8000dac: 2206 movs r2, #6 - 8000dae: 701a strb r2, [r3, #0] + 8001484: 4b07 ldr r3, [pc, #28] @ (80014a4 ) + 8001486: 2201 movs r2, #1 + 8001488: 701a strb r2, [r3, #0] + //state_timer = g_ms_counter; // Reload timer to wait for stability + //ad5934_state = AD5934_WAIT_MUX; // Next State + ad5934_state = AD5934_START_CONVERSION; + 800148a: 4b04 ldr r3, [pc, #16] @ (800149c ) + 800148c: 2202 movs r2, #2 + 800148e: 701a strb r2, [r3, #0] break; - 8000db0: e004 b.n 8000dbc + 8001490: e000 b.n 8001494 break; - 8000db2: bf00 nop - 8000db4: e002 b.n 8000dbc - break; - 8000db6: bf00 nop - 8000db8: e000 b.n 8000dbc - break; - 8000dba: bf00 nop + 8001492: bf00 nop } } - 8000dbc: bf00 nop - 8000dbe: 3708 adds r7, #8 - 8000dc0: 46bd mov sp, r7 - 8000dc2: bd80 pop {r7, pc} - 8000dc4: 2000007c .word 0x2000007c - 8000dc8: 20000090 .word 0x20000090 - 8000dcc: 20000003 .word 0x20000003 - 8000dd0: 20000080 .word 0x20000080 - 8000dd4: 20000154 .word 0x20000154 - 8000dd8: 20000092 .word 0x20000092 - 8000ddc: 55555556 .word 0x55555556 - 8000de0: 40010800 .word 0x40010800 - 8000de4: 20000000 .word 0x20000000 - 8000de8: 20000002 .word 0x20000002 - 8000dec: 20000001 .word 0x20000001 - 8000df0: 20000091 .word 0x20000091 + 8001494: bf00 nop + 8001496: 3710 adds r7, #16 + 8001498: 46bd mov sp, r7 + 800149a: bdb0 pop {r4, r5, r7, pc} + 800149c: 2000007c .word 0x2000007c + 80014a0: 20000091 .word 0x20000091 + 80014a4: 20000002 .word 0x20000002 + 80014a8: 20000084 .word 0x20000084 + 80014ac: 20000080 .word 0x20000080 + 80014b0: 20000090 .word 0x20000090 + 80014b4: 20000148 .word 0x20000148 + 80014b8: 2000014e .word 0x2000014e + 80014bc: 2000014c .word 0x2000014c + 80014c0: 20000152 .word 0x20000152 + 80014c4: 2000014a .word 0x2000014a + 80014c8: 20000150 .word 0x20000150 + 80014cc: 20000093 .word 0x20000093 + 80014d0: 55555556 .word 0x55555556 + 80014d4: 40010800 .word 0x40010800 + 80014d8: 20000001 .word 0x20000001 + 80014dc: 20000000 .word 0x20000000 + 80014e0: 20000092 .word 0x20000092 -08000df4 : +080014e4 : /** * Simple insertion sort - BURST_SIZE is small, so the cost is negligible * and it avoids depending on qsort/heap allocation. **/ void AD5934_Sort_Array(float *v, uint8_t n) { - 8000df4: b580 push {r7, lr} - 8000df6: b084 sub sp, #16 - 8000df8: af00 add r7, sp, #0 - 8000dfa: 6078 str r0, [r7, #4] - 8000dfc: 460b mov r3, r1 - 8000dfe: 70fb strb r3, [r7, #3] + 80014e4: b580 push {r7, lr} + 80014e6: b084 sub sp, #16 + 80014e8: af00 add r7, sp, #0 + 80014ea: 6078 str r0, [r7, #4] + 80014ec: 460b mov r3, r1 + 80014ee: 70fb strb r3, [r7, #3] for (uint8_t i = 1; i < n; i++) - 8000e00: 2301 movs r3, #1 - 8000e02: 73fb strb r3, [r7, #15] - 8000e04: e039 b.n 8000e7a + 80014f0: 2301 movs r3, #1 + 80014f2: 73fb strb r3, [r7, #15] + 80014f4: e039 b.n 800156a { float key = v[i]; - 8000e06: 7bfb ldrb r3, [r7, #15] - 8000e08: 009b lsls r3, r3, #2 - 8000e0a: 687a ldr r2, [r7, #4] - 8000e0c: 4413 add r3, r2 - 8000e0e: 681b ldr r3, [r3, #0] - 8000e10: 60bb str r3, [r7, #8] + 80014f6: 7bfb ldrb r3, [r7, #15] + 80014f8: 009b lsls r3, r3, #2 + 80014fa: 687a ldr r2, [r7, #4] + 80014fc: 4413 add r3, r2 + 80014fe: 681b ldr r3, [r3, #0] + 8001500: 60bb str r3, [r7, #8] int8_t j = (int8_t)i - 1; - 8000e12: 7bfb ldrb r3, [r7, #15] - 8000e14: 3b01 subs r3, #1 - 8000e16: b2db uxtb r3, r3 - 8000e18: 73bb strb r3, [r7, #14] + 8001502: 7bfb ldrb r3, [r7, #15] + 8001504: 3b01 subs r3, #1 + 8001506: b2db uxtb r3, r3 + 8001508: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 8000e1a: e012 b.n 8000e42 + 800150a: e012 b.n 8001532 { v[j + 1] = v[j]; - 8000e1c: f997 300e ldrsb.w r3, [r7, #14] - 8000e20: 009b lsls r3, r3, #2 - 8000e22: 687a ldr r2, [r7, #4] - 8000e24: 441a add r2, r3 - 8000e26: f997 300e ldrsb.w r3, [r7, #14] - 8000e2a: 3301 adds r3, #1 - 8000e2c: 009b lsls r3, r3, #2 - 8000e2e: 6879 ldr r1, [r7, #4] - 8000e30: 440b add r3, r1 - 8000e32: 6812 ldr r2, [r2, #0] - 8000e34: 601a str r2, [r3, #0] + 800150c: f997 300e ldrsb.w r3, [r7, #14] + 8001510: 009b lsls r3, r3, #2 + 8001512: 687a ldr r2, [r7, #4] + 8001514: 441a add r2, r3 + 8001516: f997 300e ldrsb.w r3, [r7, #14] + 800151a: 3301 adds r3, #1 + 800151c: 009b lsls r3, r3, #2 + 800151e: 6879 ldr r1, [r7, #4] + 8001520: 440b add r3, r1 + 8001522: 6812 ldr r2, [r2, #0] + 8001524: 601a str r2, [r3, #0] j--; - 8000e36: f997 300e ldrsb.w r3, [r7, #14] - 8000e3a: b2db uxtb r3, r3 - 8000e3c: 3b01 subs r3, #1 - 8000e3e: b2db uxtb r3, r3 - 8000e40: 73bb strb r3, [r7, #14] + 8001526: f997 300e ldrsb.w r3, [r7, #14] + 800152a: b2db uxtb r3, r3 + 800152c: 3b01 subs r3, #1 + 800152e: b2db uxtb r3, r3 + 8001530: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 8000e42: f997 300e ldrsb.w r3, [r7, #14] - 8000e46: 2b00 cmp r3, #0 - 8000e48: db0c blt.n 8000e64 - 8000e4a: f997 300e ldrsb.w r3, [r7, #14] - 8000e4e: 009b lsls r3, r3, #2 - 8000e50: 687a ldr r2, [r7, #4] - 8000e52: 4413 add r3, r2 - 8000e54: 681b ldr r3, [r3, #0] - 8000e56: 4619 mov r1, r3 - 8000e58: 68b8 ldr r0, [r7, #8] - 8000e5a: f7ff fc2b bl 80006b4 <__aeabi_fcmplt> - 8000e5e: 4603 mov r3, r0 - 8000e60: 2b00 cmp r3, #0 - 8000e62: d1db bne.n 8000e1c + 8001532: f997 300e ldrsb.w r3, [r7, #14] + 8001536: 2b00 cmp r3, #0 + 8001538: db0c blt.n 8001554 + 800153a: f997 300e ldrsb.w r3, [r7, #14] + 800153e: 009b lsls r3, r3, #2 + 8001540: 687a ldr r2, [r7, #4] + 8001542: 4413 add r3, r2 + 8001544: 681b ldr r3, [r3, #0] + 8001546: 4619 mov r1, r3 + 8001548: 68b8 ldr r0, [r7, #8] + 800154a: f7ff fc49 bl 8000de0 <__aeabi_fcmplt> + 800154e: 4603 mov r3, r0 + 8001550: 2b00 cmp r3, #0 + 8001552: d1db bne.n 800150c } v[j + 1] = key; - 8000e64: f997 300e ldrsb.w r3, [r7, #14] - 8000e68: 3301 adds r3, #1 - 8000e6a: 009b lsls r3, r3, #2 - 8000e6c: 687a ldr r2, [r7, #4] - 8000e6e: 4413 add r3, r2 - 8000e70: 68ba ldr r2, [r7, #8] - 8000e72: 601a str r2, [r3, #0] + 8001554: f997 300e ldrsb.w r3, [r7, #14] + 8001558: 3301 adds r3, #1 + 800155a: 009b lsls r3, r3, #2 + 800155c: 687a ldr r2, [r7, #4] + 800155e: 4413 add r3, r2 + 8001560: 68ba ldr r2, [r7, #8] + 8001562: 601a str r2, [r3, #0] for (uint8_t i = 1; i < n; i++) - 8000e74: 7bfb ldrb r3, [r7, #15] - 8000e76: 3301 adds r3, #1 - 8000e78: 73fb strb r3, [r7, #15] - 8000e7a: 7bfa ldrb r2, [r7, #15] - 8000e7c: 78fb ldrb r3, [r7, #3] - 8000e7e: 429a cmp r2, r3 - 8000e80: d3c1 bcc.n 8000e06 + 8001564: 7bfb ldrb r3, [r7, #15] + 8001566: 3301 adds r3, #1 + 8001568: 73fb strb r3, [r7, #15] + 800156a: 7bfa ldrb r2, [r7, #15] + 800156c: 78fb ldrb r3, [r7, #3] + 800156e: 429a cmp r2, r3 + 8001570: d3c1 bcc.n 80014f6 } } - 8000e82: bf00 nop - 8000e84: bf00 nop - 8000e86: 3710 adds r7, #16 - 8000e88: 46bd mov sp, r7 - 8000e8a: bd80 pop {r7, pc} + 8001572: bf00 nop + 8001574: bf00 nop + 8001576: 3710 adds r7, #16 + 8001578: 46bd mov sp, r7 + 800157a: bd80 pop {r7, pc} -08000e8c : +0800157c : * original order is not needed), discards TRIM_COUNT values from each * end, and averages the remainder. Sorting in place avoids a temporary * array and removes the need for memcpy()/string.h entirely. **/ float AD5934_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim) { - 8000e8c: b580 push {r7, lr} - 8000e8e: b086 sub sp, #24 - 8000e90: af00 add r7, sp, #0 - 8000e92: 6078 str r0, [r7, #4] - 8000e94: 460b mov r3, r1 - 8000e96: 70fb strb r3, [r7, #3] - 8000e98: 4613 mov r3, r2 - 8000e9a: 70bb strb r3, [r7, #2] + 800157c: b580 push {r7, lr} + 800157e: b086 sub sp, #24 + 8001580: af00 add r7, sp, #0 + 8001582: 6078 str r0, [r7, #4] + 8001584: 460b mov r3, r1 + 8001586: 70fb strb r3, [r7, #3] + 8001588: 4613 mov r3, r2 + 800158a: 70bb strb r3, [r7, #2] AD5934_Sort_Array(buffer, n); - 8000e9c: 78fb ldrb r3, [r7, #3] - 8000e9e: 4619 mov r1, r3 - 8000ea0: 6878 ldr r0, [r7, #4] - 8000ea2: f7ff ffa7 bl 8000df4 + 800158c: 78fb ldrb r3, [r7, #3] + 800158e: 4619 mov r1, r3 + 8001590: 6878 ldr r0, [r7, #4] + 8001592: f7ff ffa7 bl 80014e4 uint8_t start = trim; - 8000ea6: 78bb ldrb r3, [r7, #2] - 8000ea8: 75fb strb r3, [r7, #23] + 8001596: 78bb ldrb r3, [r7, #2] + 8001598: 75fb strb r3, [r7, #23] uint8_t end = n - trim; /* exclusive */ - 8000eaa: 78fa ldrb r2, [r7, #3] - 8000eac: 78bb ldrb r3, [r7, #2] - 8000eae: 1ad3 subs r3, r2, r3 - 8000eb0: 75bb strb r3, [r7, #22] + 800159a: 78fa ldrb r2, [r7, #3] + 800159c: 78bb ldrb r3, [r7, #2] + 800159e: 1ad3 subs r3, r2, r3 + 80015a0: 75bb strb r3, [r7, #22] if (end <= start) /* guard against a misconfigured trim value */ - 8000eb2: 7dba ldrb r2, [r7, #22] - 8000eb4: 7dfb ldrb r3, [r7, #23] - 8000eb6: 429a cmp r2, r3 - 8000eb8: d803 bhi.n 8000ec2 + 80015a2: 7dba ldrb r2, [r7, #22] + 80015a4: 7dfb ldrb r3, [r7, #23] + 80015a6: 429a cmp r2, r3 + 80015a8: d803 bhi.n 80015b2 { start = 0; - 8000eba: 2300 movs r3, #0 - 8000ebc: 75fb strb r3, [r7, #23] + 80015aa: 2300 movs r3, #0 + 80015ac: 75fb strb r3, [r7, #23] end = n; - 8000ebe: 78fb ldrb r3, [r7, #3] - 8000ec0: 75bb strb r3, [r7, #22] + 80015ae: 78fb ldrb r3, [r7, #3] + 80015b0: 75bb strb r3, [r7, #22] } float sum = 0.0f; - 8000ec2: f04f 0300 mov.w r3, #0 - 8000ec6: 613b str r3, [r7, #16] + 80015b2: f04f 0300 mov.w r3, #0 + 80015b6: 613b str r3, [r7, #16] uint8_t count = 0; - 8000ec8: 2300 movs r3, #0 - 8000eca: 73fb strb r3, [r7, #15] + 80015b8: 2300 movs r3, #0 + 80015ba: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 8000ecc: 7dfb ldrb r3, [r7, #23] - 8000ece: 73bb strb r3, [r7, #14] - 8000ed0: e010 b.n 8000ef4 + 80015bc: 7dfb ldrb r3, [r7, #23] + 80015be: 73bb strb r3, [r7, #14] + 80015c0: e010 b.n 80015e4 { sum += buffer[i]; - 8000ed2: 7bbb ldrb r3, [r7, #14] - 8000ed4: 009b lsls r3, r3, #2 - 8000ed6: 687a ldr r2, [r7, #4] - 8000ed8: 4413 add r3, r2 - 8000eda: 681b ldr r3, [r3, #0] - 8000edc: 4619 mov r1, r3 - 8000ede: 6938 ldr r0, [r7, #16] - 8000ee0: f7ff f942 bl 8000168 <__addsf3> - 8000ee4: 4603 mov r3, r0 - 8000ee6: 613b str r3, [r7, #16] + 80015c2: 7bbb ldrb r3, [r7, #14] + 80015c4: 009b lsls r3, r3, #2 + 80015c6: 687a ldr r2, [r7, #4] + 80015c8: 4413 add r3, r2 + 80015ca: 681b ldr r3, [r3, #0] + 80015cc: 4619 mov r1, r3 + 80015ce: 6938 ldr r0, [r7, #16] + 80015d0: f7ff f960 bl 8000894 <__addsf3> + 80015d4: 4603 mov r3, r0 + 80015d6: 613b str r3, [r7, #16] count++; - 8000ee8: 7bfb ldrb r3, [r7, #15] - 8000eea: 3301 adds r3, #1 - 8000eec: 73fb strb r3, [r7, #15] + 80015d8: 7bfb ldrb r3, [r7, #15] + 80015da: 3301 adds r3, #1 + 80015dc: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 8000eee: 7bbb ldrb r3, [r7, #14] - 8000ef0: 3301 adds r3, #1 - 8000ef2: 73bb strb r3, [r7, #14] - 8000ef4: 7bba ldrb r2, [r7, #14] - 8000ef6: 7dbb ldrb r3, [r7, #22] - 8000ef8: 429a cmp r2, r3 - 8000efa: d3ea bcc.n 8000ed2 + 80015de: 7bbb ldrb r3, [r7, #14] + 80015e0: 3301 adds r3, #1 + 80015e2: 73bb strb r3, [r7, #14] + 80015e4: 7bba ldrb r2, [r7, #14] + 80015e6: 7dbb ldrb r3, [r7, #22] + 80015e8: 429a cmp r2, r3 + 80015ea: d3ea bcc.n 80015c2 } return sum / (float)count; - 8000efc: 7bfb ldrb r3, [r7, #15] - 8000efe: 4618 mov r0, r3 - 8000f00: f7ff f9e2 bl 80002c8 <__aeabi_ui2f> - 8000f04: 4603 mov r3, r0 - 8000f06: 4619 mov r1, r3 - 8000f08: 6938 ldr r0, [r7, #16] - 8000f0a: f7ff fae9 bl 80004e0 <__aeabi_fdiv> - 8000f0e: 4603 mov r3, r0 + 80015ec: 7bfb ldrb r3, [r7, #15] + 80015ee: 4618 mov r0, r3 + 80015f0: f7ff fa00 bl 80009f4 <__aeabi_ui2f> + 80015f4: 4603 mov r3, r0 + 80015f6: 4619 mov r1, r3 + 80015f8: 6938 ldr r0, [r7, #16] + 80015fa: f7ff fb07 bl 8000c0c <__aeabi_fdiv> + 80015fe: 4603 mov r3, r0 } - 8000f10: 4618 mov r0, r3 - 8000f12: 3718 adds r7, #24 - 8000f14: 46bd mov sp, r7 - 8000f16: bd80 pop {r7, pc} + 8001600: 4618 mov r0, r3 + 8001602: 3718 adds r7, #24 + 8001604: 46bd mov sp, r7 + 8001606: bd80 pop {r7, pc} -08000f18 : +08001608 : /* * Simple average of the history buffer (stage-2 sliding window) */ float AD5934_History_Average(const float *hist, uint8_t n) { - 8000f18: b580 push {r7, lr} - 8000f1a: b084 sub sp, #16 - 8000f1c: af00 add r7, sp, #0 - 8000f1e: 6078 str r0, [r7, #4] - 8000f20: 460b mov r3, r1 - 8000f22: 70fb strb r3, [r7, #3] + 8001608: b580 push {r7, lr} + 800160a: b084 sub sp, #16 + 800160c: af00 add r7, sp, #0 + 800160e: 6078 str r0, [r7, #4] + 8001610: 460b mov r3, r1 + 8001612: 70fb strb r3, [r7, #3] float sum = 0.0f; - 8000f24: f04f 0300 mov.w r3, #0 - 8000f28: 60fb str r3, [r7, #12] + 8001614: f04f 0300 mov.w r3, #0 + 8001618: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 8000f2a: 2300 movs r3, #0 - 8000f2c: 72fb strb r3, [r7, #11] - 8000f2e: e00d b.n 8000f4c + 800161a: 2300 movs r3, #0 + 800161c: 72fb strb r3, [r7, #11] + 800161e: e00d b.n 800163c sum += hist[i]; - 8000f30: 7afb ldrb r3, [r7, #11] - 8000f32: 009b lsls r3, r3, #2 - 8000f34: 687a ldr r2, [r7, #4] - 8000f36: 4413 add r3, r2 - 8000f38: 681b ldr r3, [r3, #0] - 8000f3a: 4619 mov r1, r3 - 8000f3c: 68f8 ldr r0, [r7, #12] - 8000f3e: f7ff f913 bl 8000168 <__addsf3> - 8000f42: 4603 mov r3, r0 - 8000f44: 60fb str r3, [r7, #12] + 8001620: 7afb ldrb r3, [r7, #11] + 8001622: 009b lsls r3, r3, #2 + 8001624: 687a ldr r2, [r7, #4] + 8001626: 4413 add r3, r2 + 8001628: 681b ldr r3, [r3, #0] + 800162a: 4619 mov r1, r3 + 800162c: 68f8 ldr r0, [r7, #12] + 800162e: f7ff f931 bl 8000894 <__addsf3> + 8001632: 4603 mov r3, r0 + 8001634: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 8000f46: 7afb ldrb r3, [r7, #11] - 8000f48: 3301 adds r3, #1 - 8000f4a: 72fb strb r3, [r7, #11] - 8000f4c: 7afa ldrb r2, [r7, #11] - 8000f4e: 78fb ldrb r3, [r7, #3] - 8000f50: 429a cmp r2, r3 - 8000f52: d3ed bcc.n 8000f30 + 8001636: 7afb ldrb r3, [r7, #11] + 8001638: 3301 adds r3, #1 + 800163a: 72fb strb r3, [r7, #11] + 800163c: 7afa ldrb r2, [r7, #11] + 800163e: 78fb ldrb r3, [r7, #3] + 8001640: 429a cmp r2, r3 + 8001642: d3ed bcc.n 8001620 return sum / (float)n; - 8000f54: 78fb ldrb r3, [r7, #3] - 8000f56: 4618 mov r0, r3 - 8000f58: f7ff f9b6 bl 80002c8 <__aeabi_ui2f> - 8000f5c: 4603 mov r3, r0 - 8000f5e: 4619 mov r1, r3 - 8000f60: 68f8 ldr r0, [r7, #12] - 8000f62: f7ff fabd bl 80004e0 <__aeabi_fdiv> - 8000f66: 4603 mov r3, r0 + 8001644: 78fb ldrb r3, [r7, #3] + 8001646: 4618 mov r0, r3 + 8001648: f7ff f9d4 bl 80009f4 <__aeabi_ui2f> + 800164c: 4603 mov r3, r0 + 800164e: 4619 mov r1, r3 + 8001650: 68f8 ldr r0, [r7, #12] + 8001652: f7ff fadb bl 8000c0c <__aeabi_fdiv> + 8001656: 4603 mov r3, r0 } - 8000f68: 4618 mov r0, r3 - 8000f6a: 3710 adds r7, #16 - 8000f6c: 46bd mov sp, r7 - 8000f6e: bd80 pop {r7, pc} + 8001658: 4618 mov r0, r3 + 800165a: 3710 adds r7, #16 + 800165c: 46bd mov sp, r7 + 800165e: bd80 pop {r7, pc} -08000f70 : +08001660 : * Common processing core: applied identically to all 3 channels. * Receives the current raw reading and the channel's state (global * arrays/struct). **/ void AD5934_Process_Sample(AD5934_filter_t *ch, float raw) { - 8000f70: b590 push {r4, r7, lr} - 8000f72: b085 sub sp, #20 - 8000f74: af00 add r7, sp, #0 - 8000f76: 6078 str r0, [r7, #4] - 8000f78: 6039 str r1, [r7, #0] + 8001660: b590 push {r4, r7, lr} + 8001662: b085 sub sp, #20 + 8001664: af00 add r7, sp, #0 + 8001666: 6078 str r0, [r7, #4] + 8001668: 6039 str r1, [r7, #0] /* --- Stage 1: accumulate into the current burst --- */ ch->burst[ch->burst_index] = raw; - 8000f7a: 687b ldr r3, [r7, #4] - 8000f7c: 7d1b ldrb r3, [r3, #20] - 8000f7e: 4619 mov r1, r3 - 8000f80: 687b ldr r3, [r7, #4] - 8000f82: 683a ldr r2, [r7, #0] - 8000f84: f843 2021 str.w r2, [r3, r1, lsl #2] + 800166a: 687b ldr r3, [r7, #4] + 800166c: 791b ldrb r3, [r3, #4] + 800166e: 4619 mov r1, r3 + 8001670: 687b ldr r3, [r7, #4] + 8001672: 683a ldr r2, [r7, #0] + 8001674: f843 2021 str.w r2, [r3, r1, lsl #2] ch->burst_index++; - 8000f88: 687b ldr r3, [r7, #4] - 8000f8a: 7d1b ldrb r3, [r3, #20] - 8000f8c: 3301 adds r3, #1 - 8000f8e: b2da uxtb r2, r3 - 8000f90: 687b ldr r3, [r7, #4] - 8000f92: 751a strb r2, [r3, #20] + 8001678: 687b ldr r3, [r7, #4] + 800167a: 791b ldrb r3, [r3, #4] + 800167c: 3301 adds r3, #1 + 800167e: b2da uxtb r2, r3 + 8001680: 687b ldr r3, [r7, #4] + 8001682: 711a strb r2, [r3, #4] if (ch->burst_index < AD5934_BURST_SIZE) - 8000f94: 687b ldr r3, [r7, #4] - 8000f96: 7d1b ldrb r3, [r3, #20] - 8000f98: 2b04 cmp r3, #4 - 8000f9a: d97a bls.n 8001092 + 8001684: 687b ldr r3, [r7, #4] + 8001686: 791b ldrb r3, [r3, #4] + 8001688: 2b00 cmp r3, #0 + 800168a: d075 beq.n 8001778 return; /* still collecting the burst, nothing else to do */ /* Burst complete: compute the trimmed mean */ float burst_result = AD5934_Trimmed_Mean(ch->burst, AD5934_BURST_SIZE, AD5934_TRIM_COUNT); - 8000f9c: 687b ldr r3, [r7, #4] - 8000f9e: 2201 movs r2, #1 - 8000fa0: 2105 movs r1, #5 - 8000fa2: 4618 mov r0, r3 - 8000fa4: f7ff ff72 bl 8000e8c - 8000fa8: 60f8 str r0, [r7, #12] + 800168c: 687b ldr r3, [r7, #4] + 800168e: 2200 movs r2, #0 + 8001690: 2101 movs r1, #1 + 8001692: 4618 mov r0, r3 + 8001694: f7ff ff72 bl 800157c + 8001698: 60f8 str r0, [r7, #12] ch->burst_index = 0; /* reset for the next burst */ - 8000faa: 687b ldr r3, [r7, #4] - 8000fac: 2200 movs r2, #0 - 8000fae: 751a strb r2, [r3, #20] + 800169a: 687b ldr r3, [r7, #4] + 800169c: 2200 movs r2, #0 + 800169e: 711a strb r2, [r3, #4] /* --- Stage 2a: rolling history / sliding window --- */ ch->history[ch->history_index] = burst_result; - 8000fb0: 687b ldr r3, [r7, #4] - 8000fb2: f893 302c ldrb.w r3, [r3, #44] @ 0x2c - 8000fb6: 461a mov r2, r3 - 8000fb8: 687b ldr r3, [r7, #4] - 8000fba: 3206 adds r2, #6 - 8000fbc: 68f9 ldr r1, [r7, #12] - 8000fbe: f843 1022 str.w r1, [r3, r2, lsl #2] + 80016a0: 687b ldr r3, [r7, #4] + 80016a2: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 + 80016a6: 461a mov r2, r3 + 80016a8: 687b ldr r3, [r7, #4] + 80016aa: 3202 adds r2, #2 + 80016ac: 68f9 ldr r1, [r7, #12] + 80016ae: f843 1022 str.w r1, [r3, r2, lsl #2] ch->history_index = (uint8_t)((ch->history_index + 1) % AD5934_HISTORY_SIZE); - 8000fc2: 687b ldr r3, [r7, #4] - 8000fc4: f893 302c ldrb.w r3, [r3, #44] @ 0x2c - 8000fc8: 1c5a adds r2, r3, #1 - 8000fca: 4b34 ldr r3, [pc, #208] @ (800109c ) - 8000fcc: fb83 1302 smull r1, r3, r3, r2 - 8000fd0: 1059 asrs r1, r3, #1 - 8000fd2: 17d3 asrs r3, r2, #31 - 8000fd4: 1ac9 subs r1, r1, r3 - 8000fd6: 460b mov r3, r1 - 8000fd8: 009b lsls r3, r3, #2 - 8000fda: 440b add r3, r1 - 8000fdc: 1ad1 subs r1, r2, r3 - 8000fde: b2ca uxtb r2, r1 - 8000fe0: 687b ldr r3, [r7, #4] - 8000fe2: f883 202c strb.w r2, [r3, #44] @ 0x2c + 80016b2: 687b ldr r3, [r7, #4] + 80016b4: f893 3028 ldrb.w r3, [r3, #40] @ 0x28 + 80016b8: 3301 adds r3, #1 + 80016ba: 425a negs r2, r3 + 80016bc: f003 0307 and.w r3, r3, #7 + 80016c0: f002 0207 and.w r2, r2, #7 + 80016c4: bf58 it pl + 80016c6: 4253 negpl r3, r2 + 80016c8: b2da uxtb r2, r3 + 80016ca: 687b ldr r3, [r7, #4] + 80016cc: f883 2028 strb.w r2, [r3, #40] @ 0x28 if (ch->history_count < AD5934_HISTORY_SIZE) - 8000fe6: 687b ldr r3, [r7, #4] - 8000fe8: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 8000fec: 2b04 cmp r3, #4 - 8000fee: d807 bhi.n 8001000 + 80016d0: 687b ldr r3, [r7, #4] + 80016d2: f893 3029 ldrb.w r3, [r3, #41] @ 0x29 + 80016d6: 2b07 cmp r3, #7 + 80016d8: d807 bhi.n 80016ea ch->history_count++; - 8000ff0: 687b ldr r3, [r7, #4] - 8000ff2: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 8000ff6: 3301 adds r3, #1 - 8000ff8: b2da uxtb r2, r3 - 8000ffa: 687b ldr r3, [r7, #4] - 8000ffc: f883 202d strb.w r2, [r3, #45] @ 0x2d + 80016da: 687b ldr r3, [r7, #4] + 80016dc: f893 3029 ldrb.w r3, [r3, #41] @ 0x29 + 80016e0: 3301 adds r3, #1 + 80016e2: b2da uxtb r2, r3 + 80016e4: 687b ldr r3, [r7, #4] + 80016e6: f883 2029 strb.w r2, [r3, #41] @ 0x29 float window_average = AD5934_History_Average(ch->history, ch->history_count); - 8001000: 687b ldr r3, [r7, #4] - 8001002: f103 0218 add.w r2, r3, #24 - 8001006: 687b ldr r3, [r7, #4] - 8001008: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 800100c: 4619 mov r1, r3 - 800100e: 4610 mov r0, r2 - 8001010: f7ff ff82 bl 8000f18 - 8001014: 60b8 str r0, [r7, #8] + 80016ea: 687b ldr r3, [r7, #4] + 80016ec: f103 0208 add.w r2, r3, #8 + 80016f0: 687b ldr r3, [r7, #4] + 80016f2: f893 3029 ldrb.w r3, [r3, #41] @ 0x29 + 80016f6: 4619 mov r1, r3 + 80016f8: 4610 mov r0, r2 + 80016fa: f7ff ff85 bl 8001608 + 80016fe: 60b8 str r0, [r7, #8] /* --- Stage 2b: first-order IIR low-pass filter on the burst result --- */ if (!ch->iir_initialized) - 8001016: 687b ldr r3, [r7, #4] - 8001018: f893 3034 ldrb.w r3, [r3, #52] @ 0x34 - 800101c: 2b00 cmp r3, #0 - 800101e: d107 bne.n 8001030 + 8001700: 687b ldr r3, [r7, #4] + 8001702: f893 3030 ldrb.w r3, [r3, #48] @ 0x30 + 8001706: 2b00 cmp r3, #0 + 8001708: d107 bne.n 800171a { ch->iir_state = burst_result; - 8001020: 687b ldr r3, [r7, #4] - 8001022: 68fa ldr r2, [r7, #12] - 8001024: 631a str r2, [r3, #48] @ 0x30 + 800170a: 687b ldr r3, [r7, #4] + 800170c: 68fa ldr r2, [r7, #12] + 800170e: 62da str r2, [r3, #44] @ 0x2c ch->iir_initialized = 1; - 8001026: 687b ldr r3, [r7, #4] - 8001028: 2201 movs r2, #1 - 800102a: f883 2034 strb.w r2, [r3, #52] @ 0x34 - 800102e: e014 b.n 800105a + 8001710: 687b ldr r3, [r7, #4] + 8001712: 2201 movs r2, #1 + 8001714: f883 2030 strb.w r2, [r3, #48] @ 0x30 + 8001718: e014 b.n 8001744 } else { ch->iir_state = AD5934_IIR_ALPHA * burst_result + (1.0f - AD5934_IIR_ALPHA) * ch->iir_state; - 8001030: 491b ldr r1, [pc, #108] @ (80010a0 ) - 8001032: 68f8 ldr r0, [r7, #12] - 8001034: f7ff f9a0 bl 8000378 <__aeabi_fmul> - 8001038: 4603 mov r3, r0 - 800103a: 461c mov r4, r3 - 800103c: 687b ldr r3, [r7, #4] - 800103e: 6b1b ldr r3, [r3, #48] @ 0x30 - 8001040: 4918 ldr r1, [pc, #96] @ (80010a4 ) - 8001042: 4618 mov r0, r3 - 8001044: f7ff f998 bl 8000378 <__aeabi_fmul> - 8001048: 4603 mov r3, r0 - 800104a: 4619 mov r1, r3 - 800104c: 4620 mov r0, r4 - 800104e: f7ff f88b bl 8000168 <__addsf3> - 8001052: 4603 mov r3, r0 - 8001054: 461a mov r2, r3 - 8001056: 687b ldr r3, [r7, #4] - 8001058: 631a str r2, [r3, #48] @ 0x30 + 800171a: 4919 ldr r1, [pc, #100] @ (8001780 ) + 800171c: 68f8 ldr r0, [r7, #12] + 800171e: f7ff f9c1 bl 8000aa4 <__aeabi_fmul> + 8001722: 4603 mov r3, r0 + 8001724: 461c mov r4, r3 + 8001726: 687b ldr r3, [r7, #4] + 8001728: 6adb ldr r3, [r3, #44] @ 0x2c + 800172a: 4916 ldr r1, [pc, #88] @ (8001784 ) + 800172c: 4618 mov r0, r3 + 800172e: f7ff f9b9 bl 8000aa4 <__aeabi_fmul> + 8001732: 4603 mov r3, r0 + 8001734: 4619 mov r1, r3 + 8001736: 4620 mov r0, r4 + 8001738: f7ff f8ac bl 8000894 <__addsf3> + 800173c: 4603 mov r3, r0 + 800173e: 461a mov r2, r3 + 8001740: 687b ldr r3, [r7, #4] + 8001742: 62da str r2, [r3, #44] @ 0x2c } /* Final output: combines the IIR state (fast response to real drift) * with the window average (more stable, slower response). Adjust * the weighting per channel if needed. */ - ch->filtered_value = 0.5f * ch->iir_state + 0.5f * window_average; - 800105a: 687b ldr r3, [r7, #4] - 800105c: 6b1b ldr r3, [r3, #48] @ 0x30 - 800105e: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 - 8001062: 4618 mov r0, r3 - 8001064: f7ff f988 bl 8000378 <__aeabi_fmul> - 8001068: 4603 mov r3, r0 - 800106a: 461c mov r4, r3 - 800106c: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 - 8001070: 68b8 ldr r0, [r7, #8] - 8001072: f7ff f981 bl 8000378 <__aeabi_fmul> - 8001076: 4603 mov r3, r0 - 8001078: 4619 mov r1, r3 - 800107a: 4620 mov r0, r4 - 800107c: f7ff f874 bl 8000168 <__addsf3> - 8001080: 4603 mov r3, r0 - 8001082: 461a mov r2, r3 - 8001084: 687b ldr r3, [r7, #4] - 8001086: 639a str r2, [r3, #56] @ 0x38 + ch->filtered_value = 0.65f * ch->iir_state + 0.35f * window_average; + 8001744: 687b ldr r3, [r7, #4] + 8001746: 6adb ldr r3, [r3, #44] @ 0x2c + 8001748: 490f ldr r1, [pc, #60] @ (8001788 ) + 800174a: 4618 mov r0, r3 + 800174c: f7ff f9aa bl 8000aa4 <__aeabi_fmul> + 8001750: 4603 mov r3, r0 + 8001752: 461c mov r4, r3 + 8001754: 490d ldr r1, [pc, #52] @ (800178c ) + 8001756: 68b8 ldr r0, [r7, #8] + 8001758: f7ff f9a4 bl 8000aa4 <__aeabi_fmul> + 800175c: 4603 mov r3, r0 + 800175e: 4619 mov r1, r3 + 8001760: 4620 mov r0, r4 + 8001762: f7ff f897 bl 8000894 <__addsf3> + 8001766: 4603 mov r3, r0 + 8001768: 461a mov r2, r3 + 800176a: 687b ldr r3, [r7, #4] + 800176c: 635a str r2, [r3, #52] @ 0x34 + //ch->filtered_value = window_average; ch->value_valid = 1; - 8001088: 687b ldr r3, [r7, #4] - 800108a: 2201 movs r2, #1 - 800108c: f883 203c strb.w r2, [r3, #60] @ 0x3c - 8001090: e000 b.n 8001094 + 800176e: 687b ldr r3, [r7, #4] + 8001770: 2201 movs r2, #1 + 8001772: f883 2038 strb.w r2, [r3, #56] @ 0x38 + 8001776: e000 b.n 800177a return; /* still collecting the burst, nothing else to do */ - 8001092: bf00 nop + 8001778: bf00 nop } - 8001094: 3714 adds r7, #20 - 8001096: 46bd mov sp, r7 - 8001098: bd90 pop {r4, r7, pc} - 800109a: bf00 nop - 800109c: 66666667 .word 0x66666667 - 80010a0: 3f0ccccd .word 0x3f0ccccd - 80010a4: 3ee66666 .word 0x3ee66666 + 800177a: 3714 adds r7, #20 + 800177c: 46bd mov sp, r7 + 800177e: bd90 pop {r4, r7, pc} + 8001780: 3dcccccd .word 0x3dcccccd + 8001784: 3f666666 .word 0x3f666666 + 8001788: 3f266666 .word 0x3f266666 + 800178c: 3eb33333 .word 0x3eb33333 -080010a8 : +08001790 : /* ---------------------------------------------------------------------- */ /* Call this every time a sweep completes with the mux on the RTD * (PT100/PT1000) channel */ void AD5934_RTD_NewSample(float raw) { - 80010a8: b580 push {r7, lr} - 80010aa: b082 sub sp, #8 - 80010ac: af00 add r7, sp, #0 - 80010ae: 6078 str r0, [r7, #4] + 8001790: b580 push {r7, lr} + 8001792: b082 sub sp, #8 + 8001794: af00 add r7, sp, #0 + 8001796: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_rtd_filter, raw); - 80010b0: 6879 ldr r1, [r7, #4] - 80010b2: 4803 ldr r0, [pc, #12] @ (80010c0 ) - 80010b4: f7ff ff5c bl 8000f70 + 8001798: 6879 ldr r1, [r7, #4] + 800179a: 4803 ldr r0, [pc, #12] @ (80017a8 ) + 800179c: f7ff ff60 bl 8001660 } - 80010b8: bf00 nop - 80010ba: 3708 adds r7, #8 - 80010bc: 46bd mov sp, r7 - 80010be: bd80 pop {r7, pc} - 80010c0: 20000094 .word 0x20000094 + 80017a0: bf00 nop + 80017a2: 3708 adds r7, #8 + 80017a4: 46bd mov sp, r7 + 80017a6: bd80 pop {r7, pc} + 80017a8: 20000094 .word 0x20000094 + +080017ac : -080010c4 : /* Call this every time a sweep completes with the mux on the EC * (conductivity probe) channel */ void AD5934_EC_NewSample(float raw) { - 80010c4: b580 push {r7, lr} - 80010c6: b082 sub sp, #8 - 80010c8: af00 add r7, sp, #0 - 80010ca: 6078 str r0, [r7, #4] + 80017ac: b580 push {r7, lr} + 80017ae: b082 sub sp, #8 + 80017b0: af00 add r7, sp, #0 + 80017b2: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_ec_filter, raw); - 80010cc: 6879 ldr r1, [r7, #4] - 80010ce: 4803 ldr r0, [pc, #12] @ (80010dc ) - 80010d0: f7ff ff4e bl 8000f70 + 80017b4: 6879 ldr r1, [r7, #4] + 80017b6: 4803 ldr r0, [pc, #12] @ (80017c4 ) + 80017b8: f7ff ff52 bl 8001660 } - 80010d4: bf00 nop - 80010d6: 3708 adds r7, #8 - 80010d8: 46bd mov sp, r7 - 80010da: bd80 pop {r7, pc} - 80010dc: 200000d4 .word 0x200000d4 + 80017bc: bf00 nop + 80017be: 3708 adds r7, #8 + 80017c0: 46bd mov sp, r7 + 80017c2: bd80 pop {r7, pc} + 80017c4: 200000d0 .word 0x200000d0 + +080017c8 : -080010e0 : /* Call this every time a sweep completes with the mux on the on-board * precision reference resistor channel */ void AD5934_Reference_NewSample(float raw) { - 80010e0: b580 push {r7, lr} - 80010e2: b082 sub sp, #8 - 80010e4: af00 add r7, sp, #0 - 80010e6: 6078 str r0, [r7, #4] + 80017c8: b580 push {r7, lr} + 80017ca: b082 sub sp, #8 + 80017cc: af00 add r7, sp, #0 + 80017ce: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_ref_filter, raw); - 80010e8: 6879 ldr r1, [r7, #4] - 80010ea: 4803 ldr r0, [pc, #12] @ (80010f8 ) - 80010ec: f7ff ff40 bl 8000f70 + 80017d0: 6879 ldr r1, [r7, #4] + 80017d2: 4803 ldr r0, [pc, #12] @ (80017e0 ) + 80017d4: f7ff ff44 bl 8001660 } - 80010f0: bf00 nop - 80010f2: 3708 adds r7, #8 - 80010f4: 46bd mov sp, r7 - 80010f6: bd80 pop {r7, pc} - 80010f8: 20000114 .word 0x20000114 + 80017d8: bf00 nop + 80017da: 3708 adds r7, #8 + 80017dc: 46bd mov sp, r7 + 80017de: bd80 pop {r7, pc} + 80017e0: 2000010c .word 0x2000010c -080010fc : +080017e4 : * * @return None. *******************************************************************************/ void ADG715_SetRegisterValue(char value) { - 80010fc: b580 push {r7, lr} - 80010fe: b086 sub sp, #24 - 8001100: af02 add r7, sp, #8 - 8001102: 4603 mov r3, r0 - 8001104: 71fb strb r3, [r7, #7] + 80017e4: b580 push {r7, lr} + 80017e6: b086 sub sp, #24 + 80017e8: af02 add r7, sp, #8 + 80017ea: 4603 mov r3, r0 + 80017ec: 71fb strb r3, [r7, #7] uint8_t writeData[1] = {value}; - 8001106: 79fb ldrb r3, [r7, #7] - 8001108: 733b strb r3, [r7, #12] + 80017ee: 79fb ldrb r3, [r7, #7] + 80017f0: 733b strb r3, [r7, #12] HAL_StatusTypeDef status; status = HAL_I2C_Master_Transmit(&hi2c2, ADG715_I2C_ADDRESS, writeData, 1, 1); - 800110a: f107 020c add.w r2, r7, #12 - 800110e: 2301 movs r3, #1 - 8001110: 9300 str r3, [sp, #0] - 8001112: 2301 movs r3, #1 - 8001114: 2190 movs r1, #144 @ 0x90 - 8001116: 4804 ldr r0, [pc, #16] @ (8001128 ) - 8001118: f002 fa02 bl 8003520 - 800111c: 4603 mov r3, r0 - 800111e: 73fb strb r3, [r7, #15] + 80017f2: f107 020c add.w r2, r7, #12 + 80017f6: 2301 movs r3, #1 + 80017f8: 9300 str r3, [sp, #0] + 80017fa: 2301 movs r3, #1 + 80017fc: 2190 movs r1, #144 @ 0x90 + 80017fe: 4804 ldr r0, [pc, #16] @ (8001810 ) + 8001800: f002 fb38 bl 8003e74 + 8001804: 4603 mov r3, r0 + 8001806: 73fb strb r3, [r7, #15] return; - 8001120: bf00 nop + 8001808: bf00 nop } - 8001122: 3710 adds r7, #16 - 8001124: 46bd mov sp, r7 - 8001126: bd80 pop {r7, pc} - 8001128: 20000270 .word 0x20000270 + 800180a: 3710 adds r7, #16 + 800180c: 46bd mov sp, r7 + 800180e: bd80 pop {r7, pc} + 8001810: 2000026c .word 0x2000026c -0800112c : +08001814 : * * @return none. ******************************************************************************/ void ADG715_ResetChannels(void) { - 800112c: b580 push {r7, lr} - 800112e: af00 add r7, sp, #0 + 8001814: b580 push {r7, lr} + 8001816: af00 add r7, sp, #0 ADG715_SetRegisterValue(0); - 8001130: 2000 movs r0, #0 - 8001132: f7ff ffe3 bl 80010fc + 8001818: 2000 movs r0, #0 + 800181a: f7ff ffe3 bl 80017e4 } - 8001136: bf00 nop - 8001138: bd80 pop {r7, pc} + 800181e: bf00 nop + 8001820: bd80 pop {r7, pc} ... -0800113c : +08001824 : * @param: channel * * @return none. ******************************************************************************/ void ADG715_SetChannels(AD5934_Channel_t channel) { - 800113c: b580 push {r7, lr} - 800113e: b082 sub sp, #8 - 8001140: af00 add r7, sp, #0 - 8001142: 4603 mov r3, r0 - 8001144: 71fb strb r3, [r7, #7] + 8001824: b580 push {r7, lr} + 8001826: b082 sub sp, #8 + 8001828: af00 add r7, sp, #0 + 800182a: 4603 mov r3, r0 + 800182c: 71fb strb r3, [r7, #7] // Garante que o índice recebido não ultrapassa os limites do vetor if (channel >= AD5934_CH_MAX) - 8001146: 79fb ldrb r3, [r7, #7] - 8001148: 2b0e cmp r3, #14 - 800114a: d806 bhi.n 800115a + 800182e: 79fb ldrb r3, [r7, #7] + 8001830: 2b0e cmp r3, #14 + 8001832: d806 bhi.n 8001842 return; // Envia o byte combinado via I2C (Make-before-break nativo por barramento) ADG715_SetRegisterValue(ADG715_Channel_Map[channel]); - 800114c: 79fb ldrb r3, [r7, #7] - 800114e: 4a05 ldr r2, [pc, #20] @ (8001164 ) - 8001150: 5cd3 ldrb r3, [r2, r3] - 8001152: 4618 mov r0, r3 - 8001154: f7ff ffd2 bl 80010fc - 8001158: e000 b.n 800115c + 8001834: 79fb ldrb r3, [r7, #7] + 8001836: 4a05 ldr r2, [pc, #20] @ (800184c ) + 8001838: 5cd3 ldrb r3, [r2, r3] + 800183a: 4618 mov r0, r3 + 800183c: f7ff ffd2 bl 80017e4 + 8001840: e000 b.n 8001844 return; - 800115a: bf00 nop + 8001842: bf00 nop } - 800115c: 3708 adds r7, #8 - 800115e: 46bd mov sp, r7 - 8001160: bd80 pop {r7, pc} - 8001162: bf00 nop - 8001164: 0800623c .word 0x0800623c + 8001844: 3708 adds r7, #8 + 8001846: 46bd mov sp, r7 + 8001848: bd80 pop {r7, pc} + 800184a: bf00 nop + 800184c: 08006bd8 .word 0x08006bd8 -08001168 : +08001850 : ADC_HandleTypeDef hadc1; ADC_HandleTypeDef hadc2; /* ADC1 init function */ void MX_ADC1_Init(void) { - 8001168: b580 push {r7, lr} - 800116a: b084 sub sp, #16 - 800116c: af00 add r7, sp, #0 + 8001850: b580 push {r7, lr} + 8001852: b084 sub sp, #16 + 8001854: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 800116e: 1d3b adds r3, r7, #4 - 8001170: 2200 movs r2, #0 - 8001172: 601a str r2, [r3, #0] - 8001174: 605a str r2, [r3, #4] - 8001176: 609a str r2, [r3, #8] + 8001856: 1d3b adds r3, r7, #4 + 8001858: 2200 movs r2, #0 + 800185a: 601a str r2, [r3, #0] + 800185c: 605a str r2, [r3, #4] + 800185e: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; - 8001178: 4b18 ldr r3, [pc, #96] @ (80011dc ) - 800117a: 4a19 ldr r2, [pc, #100] @ (80011e0 ) - 800117c: 601a str r2, [r3, #0] + 8001860: 4b18 ldr r3, [pc, #96] @ (80018c4 ) + 8001862: 4a19 ldr r2, [pc, #100] @ (80018c8 ) + 8001864: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; - 800117e: 4b17 ldr r3, [pc, #92] @ (80011dc ) - 8001180: 2200 movs r2, #0 - 8001182: 609a str r2, [r3, #8] + 8001866: 4b17 ldr r3, [pc, #92] @ (80018c4 ) + 8001868: 2200 movs r2, #0 + 800186a: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = ENABLE; - 8001184: 4b15 ldr r3, [pc, #84] @ (80011dc ) - 8001186: 2201 movs r2, #1 - 8001188: 731a strb r2, [r3, #12] + 800186c: 4b15 ldr r3, [pc, #84] @ (80018c4 ) + 800186e: 2201 movs r2, #1 + 8001870: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; - 800118a: 4b14 ldr r3, [pc, #80] @ (80011dc ) - 800118c: 2200 movs r2, #0 - 800118e: 751a strb r2, [r3, #20] + 8001872: 4b14 ldr r3, [pc, #80] @ (80018c4 ) + 8001874: 2200 movs r2, #0 + 8001876: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 8001190: 4b12 ldr r3, [pc, #72] @ (80011dc ) - 8001192: f44f 2260 mov.w r2, #917504 @ 0xe0000 - 8001196: 61da str r2, [r3, #28] + 8001878: 4b12 ldr r3, [pc, #72] @ (80018c4 ) + 800187a: f44f 2260 mov.w r2, #917504 @ 0xe0000 + 800187e: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8001198: 4b10 ldr r3, [pc, #64] @ (80011dc ) - 800119a: 2200 movs r2, #0 - 800119c: 605a str r2, [r3, #4] + 8001880: 4b10 ldr r3, [pc, #64] @ (80018c4 ) + 8001882: 2200 movs r2, #0 + 8001884: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 1; - 800119e: 4b0f ldr r3, [pc, #60] @ (80011dc ) - 80011a0: 2201 movs r2, #1 - 80011a2: 611a str r2, [r3, #16] + 8001886: 4b0f ldr r3, [pc, #60] @ (80018c4 ) + 8001888: 2201 movs r2, #1 + 800188a: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) - 80011a4: 480d ldr r0, [pc, #52] @ (80011dc ) - 80011a6: f001 fad9 bl 800275c - 80011aa: 4603 mov r3, r0 - 80011ac: 2b00 cmp r3, #0 - 80011ae: d001 beq.n 80011b4 + 800188c: 480d ldr r0, [pc, #52] @ (80018c4 ) + 800188e: f001 fc0f bl 80030b0 + 8001892: 4603 mov r3, r0 + 8001894: 2b00 cmp r3, #0 + 8001896: d001 beq.n 800189c { Error_Handler(); - 80011b0: f000 ffe8 bl 8002184 + 8001898: f001 f8fa bl 8002a90 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_0; - 80011b4: 2300 movs r3, #0 - 80011b6: 607b str r3, [r7, #4] + 800189c: 2300 movs r3, #0 + 800189e: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; - 80011b8: 2301 movs r3, #1 - 80011ba: 60bb str r3, [r7, #8] + 80018a0: 2301 movs r3, #1 + 80018a2: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; - 80011bc: 2300 movs r3, #0 - 80011be: 60fb str r3, [r7, #12] + 80018a4: 2300 movs r3, #0 + 80018a6: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 80011c0: 1d3b adds r3, r7, #4 - 80011c2: 4619 mov r1, r3 - 80011c4: 4805 ldr r0, [pc, #20] @ (80011dc ) - 80011c6: f001 fba1 bl 800290c - 80011ca: 4603 mov r3, r0 - 80011cc: 2b00 cmp r3, #0 - 80011ce: d001 beq.n 80011d4 + 80018a8: 1d3b adds r3, r7, #4 + 80018aa: 4619 mov r1, r3 + 80018ac: 4805 ldr r0, [pc, #20] @ (80018c4 ) + 80018ae: f001 fcd7 bl 8003260 + 80018b2: 4603 mov r3, r0 + 80018b4: 2b00 cmp r3, #0 + 80018b6: d001 beq.n 80018bc { Error_Handler(); - 80011d0: f000 ffd8 bl 8002184 + 80018b8: f001 f8ea bl 8002a90 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } - 80011d4: bf00 nop - 80011d6: 3710 adds r7, #16 - 80011d8: 46bd mov sp, r7 - 80011da: bd80 pop {r7, pc} - 80011dc: 20000158 .word 0x20000158 - 80011e0: 40012400 .word 0x40012400 + 80018bc: bf00 nop + 80018be: 3710 adds r7, #16 + 80018c0: 46bd mov sp, r7 + 80018c2: bd80 pop {r7, pc} + 80018c4: 20000154 .word 0x20000154 + 80018c8: 40012400 .word 0x40012400 -080011e4 : +080018cc : /* ADC2 init function */ void MX_ADC2_Init(void) { - 80011e4: b580 push {r7, lr} - 80011e6: b084 sub sp, #16 - 80011e8: af00 add r7, sp, #0 + 80018cc: b580 push {r7, lr} + 80018ce: b084 sub sp, #16 + 80018d0: af00 add r7, sp, #0 /* USER CODE BEGIN ADC2_Init 0 */ /* USER CODE END ADC2_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 80011ea: 1d3b adds r3, r7, #4 - 80011ec: 2200 movs r2, #0 - 80011ee: 601a str r2, [r3, #0] - 80011f0: 605a str r2, [r3, #4] - 80011f2: 609a str r2, [r3, #8] + 80018d2: 1d3b adds r3, r7, #4 + 80018d4: 2200 movs r2, #0 + 80018d6: 601a str r2, [r3, #0] + 80018d8: 605a str r2, [r3, #4] + 80018da: 609a str r2, [r3, #8] /* USER CODE END ADC2_Init 1 */ /** Common config */ hadc2.Instance = ADC2; - 80011f4: 4b18 ldr r3, [pc, #96] @ (8001258 ) - 80011f6: 4a19 ldr r2, [pc, #100] @ (800125c ) - 80011f8: 601a str r2, [r3, #0] + 80018dc: 4b18 ldr r3, [pc, #96] @ (8001940 ) + 80018de: 4a19 ldr r2, [pc, #100] @ (8001944 ) + 80018e0: 601a str r2, [r3, #0] hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; - 80011fa: 4b17 ldr r3, [pc, #92] @ (8001258 ) - 80011fc: 2200 movs r2, #0 - 80011fe: 609a str r2, [r3, #8] + 80018e2: 4b17 ldr r3, [pc, #92] @ (8001940 ) + 80018e4: 2200 movs r2, #0 + 80018e6: 609a str r2, [r3, #8] hadc2.Init.ContinuousConvMode = ENABLE; - 8001200: 4b15 ldr r3, [pc, #84] @ (8001258 ) - 8001202: 2201 movs r2, #1 - 8001204: 731a strb r2, [r3, #12] + 80018e8: 4b15 ldr r3, [pc, #84] @ (8001940 ) + 80018ea: 2201 movs r2, #1 + 80018ec: 731a strb r2, [r3, #12] hadc2.Init.DiscontinuousConvMode = DISABLE; - 8001206: 4b14 ldr r3, [pc, #80] @ (8001258 ) - 8001208: 2200 movs r2, #0 - 800120a: 751a strb r2, [r3, #20] + 80018ee: 4b14 ldr r3, [pc, #80] @ (8001940 ) + 80018f0: 2200 movs r2, #0 + 80018f2: 751a strb r2, [r3, #20] hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 800120c: 4b12 ldr r3, [pc, #72] @ (8001258 ) - 800120e: f44f 2260 mov.w r2, #917504 @ 0xe0000 - 8001212: 61da str r2, [r3, #28] + 80018f4: 4b12 ldr r3, [pc, #72] @ (8001940 ) + 80018f6: f44f 2260 mov.w r2, #917504 @ 0xe0000 + 80018fa: 61da str r2, [r3, #28] hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8001214: 4b10 ldr r3, [pc, #64] @ (8001258 ) - 8001216: 2200 movs r2, #0 - 8001218: 605a str r2, [r3, #4] + 80018fc: 4b10 ldr r3, [pc, #64] @ (8001940 ) + 80018fe: 2200 movs r2, #0 + 8001900: 605a str r2, [r3, #4] hadc2.Init.NbrOfConversion = 1; - 800121a: 4b0f ldr r3, [pc, #60] @ (8001258 ) - 800121c: 2201 movs r2, #1 - 800121e: 611a str r2, [r3, #16] + 8001902: 4b0f ldr r3, [pc, #60] @ (8001940 ) + 8001904: 2201 movs r2, #1 + 8001906: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc2) != HAL_OK) - 8001220: 480d ldr r0, [pc, #52] @ (8001258 ) - 8001222: f001 fa9b bl 800275c - 8001226: 4603 mov r3, r0 - 8001228: 2b00 cmp r3, #0 - 800122a: d001 beq.n 8001230 + 8001908: 480d ldr r0, [pc, #52] @ (8001940 ) + 800190a: f001 fbd1 bl 80030b0 + 800190e: 4603 mov r3, r0 + 8001910: 2b00 cmp r3, #0 + 8001912: d001 beq.n 8001918 { Error_Handler(); - 800122c: f000 ffaa bl 8002184 + 8001914: f001 f8bc bl 8002a90 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_1; - 8001230: 2301 movs r3, #1 - 8001232: 607b str r3, [r7, #4] + 8001918: 2301 movs r3, #1 + 800191a: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; - 8001234: 2301 movs r3, #1 - 8001236: 60bb str r3, [r7, #8] + 800191c: 2301 movs r3, #1 + 800191e: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; - 8001238: 2300 movs r3, #0 - 800123a: 60fb str r3, [r7, #12] + 8001920: 2300 movs r3, #0 + 8001922: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) - 800123c: 1d3b adds r3, r7, #4 - 800123e: 4619 mov r1, r3 - 8001240: 4805 ldr r0, [pc, #20] @ (8001258 ) - 8001242: f001 fb63 bl 800290c - 8001246: 4603 mov r3, r0 - 8001248: 2b00 cmp r3, #0 - 800124a: d001 beq.n 8001250 + 8001924: 1d3b adds r3, r7, #4 + 8001926: 4619 mov r1, r3 + 8001928: 4805 ldr r0, [pc, #20] @ (8001940 ) + 800192a: f001 fc99 bl 8003260 + 800192e: 4603 mov r3, r0 + 8001930: 2b00 cmp r3, #0 + 8001932: d001 beq.n 8001938 { Error_Handler(); - 800124c: f000 ff9a bl 8002184 + 8001934: f001 f8ac bl 8002a90 } /* USER CODE BEGIN ADC2_Init 2 */ /* USER CODE END ADC2_Init 2 */ } - 8001250: bf00 nop - 8001252: 3710 adds r7, #16 - 8001254: 46bd mov sp, r7 - 8001256: bd80 pop {r7, pc} - 8001258: 20000188 .word 0x20000188 - 800125c: 40012800 .word 0x40012800 + 8001938: bf00 nop + 800193a: 3710 adds r7, #16 + 800193c: 46bd mov sp, r7 + 800193e: bd80 pop {r7, pc} + 8001940: 20000184 .word 0x20000184 + 8001944: 40012800 .word 0x40012800 -08001260 : +08001948 : void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { - 8001260: b580 push {r7, lr} - 8001262: b08a sub sp, #40 @ 0x28 - 8001264: af00 add r7, sp, #0 - 8001266: 6078 str r0, [r7, #4] + 8001948: b580 push {r7, lr} + 800194a: b08a sub sp, #40 @ 0x28 + 800194c: af00 add r7, sp, #0 + 800194e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001268: f107 0318 add.w r3, r7, #24 - 800126c: 2200 movs r2, #0 - 800126e: 601a str r2, [r3, #0] - 8001270: 605a str r2, [r3, #4] - 8001272: 609a str r2, [r3, #8] - 8001274: 60da str r2, [r3, #12] + 8001950: f107 0318 add.w r3, r7, #24 + 8001954: 2200 movs r2, #0 + 8001956: 601a str r2, [r3, #0] + 8001958: 605a str r2, [r3, #4] + 800195a: 609a str r2, [r3, #8] + 800195c: 60da str r2, [r3, #12] if(adcHandle->Instance==ADC1) - 8001276: 687b ldr r3, [r7, #4] - 8001278: 681b ldr r3, [r3, #0] - 800127a: 4a28 ldr r2, [pc, #160] @ (800131c ) - 800127c: 4293 cmp r3, r2 - 800127e: d122 bne.n 80012c6 + 800195e: 687b ldr r3, [r7, #4] + 8001960: 681b ldr r3, [r3, #0] + 8001962: 4a28 ldr r2, [pc, #160] @ (8001a04 ) + 8001964: 4293 cmp r3, r2 + 8001966: d122 bne.n 80019ae { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* ADC1 clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); - 8001280: 4b27 ldr r3, [pc, #156] @ (8001320 ) - 8001282: 699b ldr r3, [r3, #24] - 8001284: 4a26 ldr r2, [pc, #152] @ (8001320 ) - 8001286: f443 7300 orr.w r3, r3, #512 @ 0x200 - 800128a: 6193 str r3, [r2, #24] - 800128c: 4b24 ldr r3, [pc, #144] @ (8001320 ) - 800128e: 699b ldr r3, [r3, #24] - 8001290: f403 7300 and.w r3, r3, #512 @ 0x200 - 8001294: 617b str r3, [r7, #20] - 8001296: 697b ldr r3, [r7, #20] + 8001968: 4b27 ldr r3, [pc, #156] @ (8001a08 ) + 800196a: 699b ldr r3, [r3, #24] + 800196c: 4a26 ldr r2, [pc, #152] @ (8001a08 ) + 800196e: f443 7300 orr.w r3, r3, #512 @ 0x200 + 8001972: 6193 str r3, [r2, #24] + 8001974: 4b24 ldr r3, [pc, #144] @ (8001a08 ) + 8001976: 699b ldr r3, [r3, #24] + 8001978: f403 7300 and.w r3, r3, #512 @ 0x200 + 800197c: 617b str r3, [r7, #20] + 800197e: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001298: 4b21 ldr r3, [pc, #132] @ (8001320 ) - 800129a: 699b ldr r3, [r3, #24] - 800129c: 4a20 ldr r2, [pc, #128] @ (8001320 ) - 800129e: f043 0304 orr.w r3, r3, #4 - 80012a2: 6193 str r3, [r2, #24] - 80012a4: 4b1e ldr r3, [pc, #120] @ (8001320 ) - 80012a6: 699b ldr r3, [r3, #24] - 80012a8: f003 0304 and.w r3, r3, #4 - 80012ac: 613b str r3, [r7, #16] - 80012ae: 693b ldr r3, [r7, #16] + 8001980: 4b21 ldr r3, [pc, #132] @ (8001a08 ) + 8001982: 699b ldr r3, [r3, #24] + 8001984: 4a20 ldr r2, [pc, #128] @ (8001a08 ) + 8001986: f043 0304 orr.w r3, r3, #4 + 800198a: 6193 str r3, [r2, #24] + 800198c: 4b1e ldr r3, [pc, #120] @ (8001a08 ) + 800198e: 699b ldr r3, [r3, #24] + 8001990: f003 0304 and.w r3, r3, #4 + 8001994: 613b str r3, [r7, #16] + 8001996: 693b ldr r3, [r7, #16] /**ADC1 GPIO Configuration PA0-WKUP ------> ADC1_IN0 PA1 ------> ADC1_IN1 */ GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin; - 80012b0: 2303 movs r3, #3 - 80012b2: 61bb str r3, [r7, #24] + 8001998: 2303 movs r3, #3 + 800199a: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 80012b4: 2303 movs r3, #3 - 80012b6: 61fb str r3, [r7, #28] + 800199c: 2303 movs r3, #3 + 800199e: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80012b8: f107 0318 add.w r3, r7, #24 - 80012bc: 4619 mov r1, r3 - 80012be: 4819 ldr r0, [pc, #100] @ (8001324 ) - 80012c0: f001 fe1e bl 8002f00 + 80019a0: f107 0318 add.w r3, r7, #24 + 80019a4: 4619 mov r1, r3 + 80019a6: 4819 ldr r0, [pc, #100] @ (8001a0c ) + 80019a8: f001 ff54 bl 8003854 /* USER CODE BEGIN ADC2_MspInit 1 */ /* USER CODE END ADC2_MspInit 1 */ } } - 80012c4: e026 b.n 8001314 + 80019ac: e026 b.n 80019fc else if(adcHandle->Instance==ADC2) - 80012c6: 687b ldr r3, [r7, #4] - 80012c8: 681b ldr r3, [r3, #0] - 80012ca: 4a17 ldr r2, [pc, #92] @ (8001328 ) - 80012cc: 4293 cmp r3, r2 - 80012ce: d121 bne.n 8001314 + 80019ae: 687b ldr r3, [r7, #4] + 80019b0: 681b ldr r3, [r3, #0] + 80019b2: 4a17 ldr r2, [pc, #92] @ (8001a10 ) + 80019b4: 4293 cmp r3, r2 + 80019b6: d121 bne.n 80019fc __HAL_RCC_ADC2_CLK_ENABLE(); - 80012d0: 4b13 ldr r3, [pc, #76] @ (8001320 ) - 80012d2: 699b ldr r3, [r3, #24] - 80012d4: 4a12 ldr r2, [pc, #72] @ (8001320 ) - 80012d6: f443 6380 orr.w r3, r3, #1024 @ 0x400 - 80012da: 6193 str r3, [r2, #24] - 80012dc: 4b10 ldr r3, [pc, #64] @ (8001320 ) - 80012de: 699b ldr r3, [r3, #24] - 80012e0: f403 6380 and.w r3, r3, #1024 @ 0x400 - 80012e4: 60fb str r3, [r7, #12] - 80012e6: 68fb ldr r3, [r7, #12] + 80019b8: 4b13 ldr r3, [pc, #76] @ (8001a08 ) + 80019ba: 699b ldr r3, [r3, #24] + 80019bc: 4a12 ldr r2, [pc, #72] @ (8001a08 ) + 80019be: f443 6380 orr.w r3, r3, #1024 @ 0x400 + 80019c2: 6193 str r3, [r2, #24] + 80019c4: 4b10 ldr r3, [pc, #64] @ (8001a08 ) + 80019c6: 699b ldr r3, [r3, #24] + 80019c8: f403 6380 and.w r3, r3, #1024 @ 0x400 + 80019cc: 60fb str r3, [r7, #12] + 80019ce: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80012e8: 4b0d ldr r3, [pc, #52] @ (8001320 ) - 80012ea: 699b ldr r3, [r3, #24] - 80012ec: 4a0c ldr r2, [pc, #48] @ (8001320 ) - 80012ee: f043 0304 orr.w r3, r3, #4 - 80012f2: 6193 str r3, [r2, #24] - 80012f4: 4b0a ldr r3, [pc, #40] @ (8001320 ) - 80012f6: 699b ldr r3, [r3, #24] - 80012f8: f003 0304 and.w r3, r3, #4 - 80012fc: 60bb str r3, [r7, #8] - 80012fe: 68bb ldr r3, [r7, #8] + 80019d0: 4b0d ldr r3, [pc, #52] @ (8001a08 ) + 80019d2: 699b ldr r3, [r3, #24] + 80019d4: 4a0c ldr r2, [pc, #48] @ (8001a08 ) + 80019d6: f043 0304 orr.w r3, r3, #4 + 80019da: 6193 str r3, [r2, #24] + 80019dc: 4b0a ldr r3, [pc, #40] @ (8001a08 ) + 80019de: 699b ldr r3, [r3, #24] + 80019e0: f003 0304 and.w r3, r3, #4 + 80019e4: 60bb str r3, [r7, #8] + 80019e6: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin; - 8001300: 2303 movs r3, #3 - 8001302: 61bb str r3, [r7, #24] + 80019e8: 2303 movs r3, #3 + 80019ea: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8001304: 2303 movs r3, #3 - 8001306: 61fb str r3, [r7, #28] + 80019ec: 2303 movs r3, #3 + 80019ee: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001308: f107 0318 add.w r3, r7, #24 - 800130c: 4619 mov r1, r3 - 800130e: 4805 ldr r0, [pc, #20] @ (8001324 ) - 8001310: f001 fdf6 bl 8002f00 + 80019f0: f107 0318 add.w r3, r7, #24 + 80019f4: 4619 mov r1, r3 + 80019f6: 4805 ldr r0, [pc, #20] @ (8001a0c ) + 80019f8: f001 ff2c bl 8003854 } - 8001314: bf00 nop - 8001316: 3728 adds r7, #40 @ 0x28 - 8001318: 46bd mov sp, r7 - 800131a: bd80 pop {r7, pc} - 800131c: 40012400 .word 0x40012400 - 8001320: 40021000 .word 0x40021000 - 8001324: 40010800 .word 0x40010800 - 8001328: 40012800 .word 0x40012800 + 80019fc: bf00 nop + 80019fe: 3728 adds r7, #40 @ 0x28 + 8001a00: 46bd mov sp, r7 + 8001a02: bd80 pop {r7, pc} + 8001a04: 40012400 .word 0x40012400 + 8001a08: 40021000 .word 0x40021000 + 8001a0c: 40010800 .word 0x40010800 + 8001a10: 40012800 .word 0x40012800 -0800132c : +08001a14 : ADS1015_filter_t g_ph_filter = {0}; volatile ADS1015_State_t ads1015_state = ADS1015_IDLE; // Write the register static void writeRegister(ADS1015_I2C *i2c, uint8_t reg, uint16_t value) { - 800132c: b580 push {r7, lr} - 800132e: b086 sub sp, #24 - 8001330: af02 add r7, sp, #8 - 8001332: 6078 str r0, [r7, #4] - 8001334: 460b mov r3, r1 - 8001336: 70fb strb r3, [r7, #3] - 8001338: 4613 mov r3, r2 - 800133a: 803b strh r3, [r7, #0] + 8001a14: b580 push {r7, lr} + 8001a16: b086 sub sp, #24 + 8001a18: af02 add r7, sp, #8 + 8001a1a: 6078 str r0, [r7, #4] + 8001a1c: 460b mov r3, r1 + 8001a1e: 70fb strb r3, [r7, #3] + 8001a20: 4613 mov r3, r2 + 8001a22: 803b strh r3, [r7, #0] uint8_t pData[3] = { reg, (uint8_t) (value >> 8), (uint8_t) (value & 0xFF) }; - 800133c: 78fb ldrb r3, [r7, #3] - 800133e: 733b strb r3, [r7, #12] - 8001340: 883b ldrh r3, [r7, #0] - 8001342: 0a1b lsrs r3, r3, #8 - 8001344: b29b uxth r3, r3 - 8001346: b2db uxtb r3, r3 - 8001348: 737b strb r3, [r7, #13] - 800134a: 883b ldrh r3, [r7, #0] - 800134c: b2db uxtb r3, r3 - 800134e: 73bb strb r3, [r7, #14] + 8001a24: 78fb ldrb r3, [r7, #3] + 8001a26: 733b strb r3, [r7, #12] + 8001a28: 883b ldrh r3, [r7, #0] + 8001a2a: 0a1b lsrs r3, r3, #8 + 8001a2c: b29b uxth r3, r3 + 8001a2e: b2db uxtb r3, r3 + 8001a30: 737b strb r3, [r7, #13] + 8001a32: 883b ldrh r3, [r7, #0] + 8001a34: b2db uxtb r3, r3 + 8001a36: 73bb strb r3, [r7, #14] HAL_I2C_Master_Transmit(i2c->hi2c, i2c->m_i2cAddress, pData, 3, 10); - 8001350: 687b ldr r3, [r7, #4] - 8001352: 68d8 ldr r0, [r3, #12] - 8001354: 687b ldr r3, [r7, #4] - 8001356: 8819 ldrh r1, [r3, #0] - 8001358: f107 020c add.w r2, r7, #12 - 800135c: 230a movs r3, #10 - 800135e: 9300 str r3, [sp, #0] - 8001360: 2303 movs r3, #3 - 8001362: f002 f8dd bl 8003520 + 8001a38: 687b ldr r3, [r7, #4] + 8001a3a: 68d8 ldr r0, [r3, #12] + 8001a3c: 687b ldr r3, [r7, #4] + 8001a3e: 8819 ldrh r1, [r3, #0] + 8001a40: f107 020c add.w r2, r7, #12 + 8001a44: 230a movs r3, #10 + 8001a46: 9300 str r3, [sp, #0] + 8001a48: 2303 movs r3, #3 + 8001a4a: f002 fa13 bl 8003e74 } - 8001366: bf00 nop - 8001368: 3710 adds r7, #16 - 800136a: 46bd mov sp, r7 - 800136c: bd80 pop {r7, pc} + 8001a4e: bf00 nop + 8001a50: 3710 adds r7, #16 + 8001a52: 46bd mov sp, r7 + 8001a54: bd80 pop {r7, pc} -0800136e : +08001a56 : // Read the register static uint16_t readRegister(ADS1015_I2C *i2c, uint8_t reg) { - 800136e: b580 push {r7, lr} - 8001370: b086 sub sp, #24 - 8001372: af02 add r7, sp, #8 - 8001374: 6078 str r0, [r7, #4] - 8001376: 460b mov r3, r1 - 8001378: 70fb strb r3, [r7, #3] + 8001a56: b580 push {r7, lr} + 8001a58: b086 sub sp, #24 + 8001a5a: af02 add r7, sp, #8 + 8001a5c: 6078 str r0, [r7, #4] + 8001a5e: 460b mov r3, r1 + 8001a60: 70fb strb r3, [r7, #3] HAL_I2C_Master_Transmit(i2c->hi2c, i2c->m_i2cAddress, ®, 1, 10); - 800137a: 687b ldr r3, [r7, #4] - 800137c: 68d8 ldr r0, [r3, #12] - 800137e: 687b ldr r3, [r7, #4] - 8001380: 8819 ldrh r1, [r3, #0] - 8001382: 1cfa adds r2, r7, #3 - 8001384: 230a movs r3, #10 - 8001386: 9300 str r3, [sp, #0] - 8001388: 2301 movs r3, #1 - 800138a: f002 f8c9 bl 8003520 + 8001a62: 687b ldr r3, [r7, #4] + 8001a64: 68d8 ldr r0, [r3, #12] + 8001a66: 687b ldr r3, [r7, #4] + 8001a68: 8819 ldrh r1, [r3, #0] + 8001a6a: 1cfa adds r2, r7, #3 + 8001a6c: 230a movs r3, #10 + 8001a6e: 9300 str r3, [sp, #0] + 8001a70: 2301 movs r3, #1 + 8001a72: f002 f9ff bl 8003e74 uint8_t pData[2] = { 0, 0 }; - 800138e: 2300 movs r3, #0 - 8001390: 81bb strh r3, [r7, #12] + 8001a76: 2300 movs r3, #0 + 8001a78: 81bb strh r3, [r7, #12] HAL_I2C_Master_Receive(i2c->hi2c, i2c->m_i2cAddress, pData, 2, 10); - 8001392: 687b ldr r3, [r7, #4] - 8001394: 68d8 ldr r0, [r3, #12] - 8001396: 687b ldr r3, [r7, #4] - 8001398: 8819 ldrh r1, [r3, #0] - 800139a: f107 020c add.w r2, r7, #12 - 800139e: 230a movs r3, #10 - 80013a0: 9300 str r3, [sp, #0] - 80013a2: 2302 movs r3, #2 - 80013a4: f002 f9ba bl 800371c + 8001a7a: 687b ldr r3, [r7, #4] + 8001a7c: 68d8 ldr r0, [r3, #12] + 8001a7e: 687b ldr r3, [r7, #4] + 8001a80: 8819 ldrh r1, [r3, #0] + 8001a82: f107 020c add.w r2, r7, #12 + 8001a86: 230a movs r3, #10 + 8001a88: 9300 str r3, [sp, #0] + 8001a8a: 2302 movs r3, #2 + 8001a8c: f002 faf0 bl 8004070 return ((pData[0] << 8) | pData[1]); - 80013a8: 7b3b ldrb r3, [r7, #12] - 80013aa: b21b sxth r3, r3 - 80013ac: 021b lsls r3, r3, #8 - 80013ae: b21a sxth r2, r3 - 80013b0: 7b7b ldrb r3, [r7, #13] - 80013b2: b21b sxth r3, r3 - 80013b4: 4313 orrs r3, r2 - 80013b6: b21b sxth r3, r3 - 80013b8: b29b uxth r3, r3 + 8001a90: 7b3b ldrb r3, [r7, #12] + 8001a92: b21b sxth r3, r3 + 8001a94: 021b lsls r3, r3, #8 + 8001a96: b21a sxth r2, r3 + 8001a98: 7b7b ldrb r3, [r7, #13] + 8001a9a: b21b sxth r3, r3 + 8001a9c: 4313 orrs r3, r2 + 8001a9e: b21b sxth r3, r3 + 8001aa0: b29b uxth r3, r3 } - 80013ba: 4618 mov r0, r3 - 80013bc: 3710 adds r7, #16 - 80013be: 46bd mov sp, r7 - 80013c0: bd80 pop {r7, pc} + 8001aa2: 4618 mov r0, r3 + 8001aa4: 3710 adds r7, #16 + 8001aa6: 46bd mov sp, r7 + 8001aa8: bd80 pop {r7, pc} ... -080013c4 : +08001aac : // ADSsetGain(GAIN_EIGHT); // 8x gain +/- 0.512V 1 bit = 0.25mV 0.015625mV // ADSsetGain(GAIN_SIXTEEN); // 16x gain +/- 0.256V 1 bit = 0.125mV 0.0078125mV */ // Declare an ADS1015 structure void ADS1015_Init(void) { - 80013c4: b480 push {r7} - 80013c6: af00 add r7, sp, #0 + 8001aac: b480 push {r7} + 8001aae: af00 add r7, sp, #0 i2c_ads1015.hi2c = &hi2c1; - 80013c8: 4b09 ldr r3, [pc, #36] @ (80013f0 ) - 80013ca: 4a0a ldr r2, [pc, #40] @ (80013f4 ) - 80013cc: 60da str r2, [r3, #12] + 8001ab0: 4b09 ldr r3, [pc, #36] @ (8001ad8 ) + 8001ab2: 4a0a ldr r2, [pc, #40] @ (8001adc ) + 8001ab4: 60da str r2, [r3, #12] i2c_ads1015.m_i2cAddress = ADS1015_ADDR_GND; // It's Important to shift the address << 1 - 80013ce: 4b08 ldr r3, [pc, #32] @ (80013f0 ) - 80013d0: 2290 movs r2, #144 @ 0x90 - 80013d2: 801a strh r2, [r3, #0] + 8001ab6: 4b08 ldr r3, [pc, #32] @ (8001ad8 ) + 8001ab8: 2290 movs r2, #144 @ 0x90 + 8001aba: 801a strh r2, [r3, #0] i2c_ads1015.m_conversionDelay = ADS1015_CONVERSIONDELAY; - 80013d4: 4b06 ldr r3, [pc, #24] @ (80013f0 ) - 80013d6: 2204 movs r2, #4 - 80013d8: 605a str r2, [r3, #4] + 8001abc: 4b06 ldr r3, [pc, #24] @ (8001ad8 ) + 8001abe: 2204 movs r2, #4 + 8001ac0: 605a str r2, [r3, #4] i2c_ads1015.m_bitShift = 4; - 80013da: 4b05 ldr r3, [pc, #20] @ (80013f0 ) - 80013dc: 2204 movs r2, #4 - 80013de: 721a strb r2, [r3, #8] + 8001ac2: 4b05 ldr r3, [pc, #20] @ (8001ad8 ) + 8001ac4: 2204 movs r2, #4 + 8001ac6: 721a strb r2, [r3, #8] i2c_ads1015.m_gain = GAIN_FOUR; /* 4x gain +/- 1.024V 1 bit = 0.5mV 0.03125mV */ - 80013e0: 4b03 ldr r3, [pc, #12] @ (80013f0 ) - 80013e2: f44f 62c0 mov.w r2, #1536 @ 0x600 - 80013e6: 815a strh r2, [r3, #10] + 8001ac8: 4b03 ldr r3, [pc, #12] @ (8001ad8 ) + 8001aca: f44f 62c0 mov.w r2, #1536 @ 0x600 + 8001ace: 815a strh r2, [r3, #10] } - 80013e8: bf00 nop - 80013ea: 46bd mov sp, r7 - 80013ec: bc80 pop {r7} - 80013ee: 4770 bx lr - 80013f0: 200001b8 .word 0x200001b8 - 80013f4: 2000021c .word 0x2000021c + 8001ad0: bf00 nop + 8001ad2: 46bd mov sp, r7 + 8001ad4: bc80 pop {r7} + 8001ad6: 4770 bx lr + 8001ad8: 200001b4 .word 0x200001b4 + 8001adc: 20000218 .word 0x20000218 -080013f8 : +08001ae0 : * @param value Valor float entre FLOAT_MIN e FLOAT_MAX * * @return uint16_t Valor convertido na escala de UINT16_MIN a UINT16_MAX */ uint16_t ADS1015_Compress_To_IntScale(float value) { - 80013f8: b580 push {r7, lr} - 80013fa: b084 sub sp, #16 - 80013fc: af00 add r7, sp, #0 - 80013fe: 6078 str r0, [r7, #4] + 8001ae0: b580 push {r7, lr} + 8001ae2: b084 sub sp, #16 + 8001ae4: af00 add r7, sp, #0 + 8001ae6: 6078 str r0, [r7, #4] // Verifica limites do valor de entrada if (value < ADS1015_PH_FLOAT_SCALE_MIN) - 8001400: 491c ldr r1, [pc, #112] @ (8001474 ) - 8001402: 6878 ldr r0, [r7, #4] - 8001404: f7ff f956 bl 80006b4 <__aeabi_fcmplt> - 8001408: 4603 mov r3, r0 - 800140a: 2b00 cmp r3, #0 - 800140c: d001 beq.n 8001412 + 8001ae8: 491c ldr r1, [pc, #112] @ (8001b5c ) + 8001aea: 6878 ldr r0, [r7, #4] + 8001aec: f7ff f978 bl 8000de0 <__aeabi_fcmplt> + 8001af0: 4603 mov r3, r0 + 8001af2: 2b00 cmp r3, #0 + 8001af4: d001 beq.n 8001afa return ADS1015_PH_OUT_SCALE_MIN; - 800140e: 2300 movs r3, #0 - 8001410: e02c b.n 800146c + 8001af6: 2300 movs r3, #0 + 8001af8: e02c b.n 8001b54 else if (value > ADS1015_PH_FLOAT_SCALE_MAX) - 8001412: 4919 ldr r1, [pc, #100] @ (8001478 ) - 8001414: 6878 ldr r0, [r7, #4] - 8001416: f7ff f96b bl 80006f0 <__aeabi_fcmpgt> - 800141a: 4603 mov r3, r0 - 800141c: 2b00 cmp r3, #0 - 800141e: d002 beq.n 8001426 + 8001afa: 4919 ldr r1, [pc, #100] @ (8001b60 ) + 8001afc: 6878 ldr r0, [r7, #4] + 8001afe: f7ff f98d bl 8000e1c <__aeabi_fcmpgt> + 8001b02: 4603 mov r3, r0 + 8001b04: 2b00 cmp r3, #0 + 8001b06: d002 beq.n 8001b0e return ADS1015_PH_OUT_SCALE_MAX; - 8001420: f44f 5380 mov.w r3, #4096 @ 0x1000 - 8001424: e022 b.n 800146c + 8001b08: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8001b0c: e022 b.n 8001b54 // Converte o valor usando a fórmula: ((value - FLOAT_MIN) / (FLOAT_MAX - FLOAT_MIN)) * (UINT16_MAX - UINT16_MIN) + UINT16_MIN uint16_t result = (uint16_t)(((value - ADS1015_PH_FLOAT_SCALE_MIN) / (ADS1015_PH_FLOAT_SCALE_MAX - ADS1015_PH_FLOAT_SCALE_MIN)) * ((float)ADS1015_PH_OUT_SCALE_MAX - (float)ADS1015_PH_OUT_SCALE_MIN) + (float)ADS1015_PH_OUT_SCALE_MIN); - 8001426: 4913 ldr r1, [pc, #76] @ (8001474 ) - 8001428: 6878 ldr r0, [r7, #4] - 800142a: f7fe fe9b bl 8000164 <__aeabi_fsub> - 800142e: 4603 mov r3, r0 - 8001430: 4912 ldr r1, [pc, #72] @ (800147c ) - 8001432: 4618 mov r0, r3 - 8001434: f7ff f854 bl 80004e0 <__aeabi_fdiv> - 8001438: 4603 mov r3, r0 - 800143a: f04f 418b mov.w r1, #1166016512 @ 0x45800000 - 800143e: 4618 mov r0, r3 - 8001440: f7fe ff9a bl 8000378 <__aeabi_fmul> - 8001444: 4603 mov r3, r0 - 8001446: f04f 0100 mov.w r1, #0 - 800144a: 4618 mov r0, r3 - 800144c: f7fe fe8c bl 8000168 <__addsf3> - 8001450: 4603 mov r3, r0 - 8001452: 4618 mov r0, r3 - 8001454: f7ff f96c bl 8000730 <__aeabi_f2uiz> - 8001458: 4603 mov r3, r0 - 800145a: 81fb strh r3, [r7, #14] + 8001b0e: 4913 ldr r1, [pc, #76] @ (8001b5c ) + 8001b10: 6878 ldr r0, [r7, #4] + 8001b12: f7fe febd bl 8000890 <__aeabi_fsub> + 8001b16: 4603 mov r3, r0 + 8001b18: 4912 ldr r1, [pc, #72] @ (8001b64 ) + 8001b1a: 4618 mov r0, r3 + 8001b1c: f7ff f876 bl 8000c0c <__aeabi_fdiv> + 8001b20: 4603 mov r3, r0 + 8001b22: f04f 418b mov.w r1, #1166016512 @ 0x45800000 + 8001b26: 4618 mov r0, r3 + 8001b28: f7fe ffbc bl 8000aa4 <__aeabi_fmul> + 8001b2c: 4603 mov r3, r0 + 8001b2e: f04f 0100 mov.w r1, #0 + 8001b32: 4618 mov r0, r3 + 8001b34: f7fe feae bl 8000894 <__addsf3> + 8001b38: 4603 mov r3, r0 + 8001b3a: 4618 mov r0, r3 + 8001b3c: f7ff f9b4 bl 8000ea8 <__aeabi_f2uiz> + 8001b40: 4603 mov r3, r0 + 8001b42: 81fb strh r3, [r7, #14] // Garante que o resultado não exceda o limite superior if (result > ADS1015_PH_OUT_SCALE_MAX) - 800145c: 89fb ldrh r3, [r7, #14] - 800145e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8001462: d902 bls.n 800146a + 8001b44: 89fb ldrh r3, [r7, #14] + 8001b46: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8001b4a: d902 bls.n 8001b52 return (ADS1015_PH_OUT_SCALE_MAX); - 8001464: f44f 5380 mov.w r3, #4096 @ 0x1000 - 8001468: e000 b.n 800146c + 8001b4c: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8001b50: e000 b.n 8001b54 return result; - 800146a: 89fb ldrh r3, [r7, #14] + 8001b52: 89fb ldrh r3, [r7, #14] } - 800146c: 4618 mov r0, r3 - 800146e: 3710 adds r7, #16 - 8001470: 46bd mov sp, r7 - 8001472: bd80 pop {r7, pc} - 8001474: 447a0000 .word 0x447a0000 - 8001478: 453b8000 .word 0x453b8000 - 800147c: 44fa0000 .word 0x44fa0000 + 8001b54: 4618 mov r0, r3 + 8001b56: 3710 adds r7, #16 + 8001b58: 46bd mov sp, r7 + 8001b5a: bd80 pop {r7, pc} + 8001b5c: 447a0000 .word 0x447a0000 + 8001b60: 453b8000 .word 0x453b8000 + 8001b64: 44fa0000 .word 0x44fa0000 -08001480 : +08001b68 : void ADS1015_Process_System(void) { - 8001480: b580 push {r7, lr} - 8001482: b082 sub sp, #8 - 8001484: af00 add r7, sp, #0 + 8001b68: b580 push {r7, lr} + 8001b6a: b082 sub sp, #8 + 8001b6c: af00 add r7, sp, #0 static uint32_t state_timer = 0; static uint32_t sample_count = 0; uint16_t config_reg = 0; - 8001486: 2300 movs r3, #0 - 8001488: 80fb strh r3, [r7, #6] + 8001b6e: 2300 movs r3, #0 + 8001b70: 80fb strh r3, [r7, #6] switch (ads1015_state) - 800148a: 4b3d ldr r3, [pc, #244] @ (8001580 ) - 800148c: 781b ldrb r3, [r3, #0] - 800148e: b2db uxtb r3, r3 - 8001490: 2b04 cmp r3, #4 - 8001492: d870 bhi.n 8001576 - 8001494: a201 add r2, pc, #4 @ (adr r2, 800149c ) - 8001496: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 800149a: bf00 nop - 800149c: 080014b1 .word 0x080014b1 - 80014a0: 080014bf .word 0x080014bf - 80014a4: 080014db .word 0x080014db - 80014a8: 08001505 .word 0x08001505 - 80014ac: 0800155b .word 0x0800155b + 8001b72: 4b3d ldr r3, [pc, #244] @ (8001c68 ) + 8001b74: 781b ldrb r3, [r3, #0] + 8001b76: b2db uxtb r3, r3 + 8001b78: 2b04 cmp r3, #4 + 8001b7a: d870 bhi.n 8001c5e + 8001b7c: a201 add r2, pc, #4 @ (adr r2, 8001b84 ) + 8001b7e: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8001b82: bf00 nop + 8001b84: 08001b99 .word 0x08001b99 + 8001b88: 08001ba7 .word 0x08001ba7 + 8001b8c: 08001bc3 .word 0x08001bc3 + 8001b90: 08001bed .word 0x08001bed + 8001b94: 08001c43 .word 0x08001c43 { case ADS1015_IDLE: sample_count = 0; - 80014b0: 4b34 ldr r3, [pc, #208] @ (8001584 ) - 80014b2: 2200 movs r2, #0 - 80014b4: 601a str r2, [r3, #0] + 8001b98: 4b34 ldr r3, [pc, #208] @ (8001c6c ) + 8001b9a: 2200 movs r2, #0 + 8001b9c: 601a str r2, [r3, #0] ads1015_state = ADS1015_START_CONVERSION; - 80014b6: 4b32 ldr r3, [pc, #200] @ (8001580 ) - 80014b8: 2201 movs r2, #1 - 80014ba: 701a strb r2, [r3, #0] + 8001b9e: 4b32 ldr r3, [pc, #200] @ (8001c68 ) + 8001ba0: 2201 movs r2, #1 + 8001ba2: 701a strb r2, [r3, #0] break; - 80014bc: e05b b.n 8001576 + 8001ba4: e05b b.n 8001c5e case ADS1015_START_CONVERSION: state_timer = g_ms_counter; - 80014be: 4b32 ldr r3, [pc, #200] @ (8001588 ) - 80014c0: 681b ldr r3, [r3, #0] - 80014c2: 4a32 ldr r2, [pc, #200] @ (800158c ) - 80014c4: 6013 str r3, [r2, #0] + 8001ba6: 4b32 ldr r3, [pc, #200] @ (8001c70 ) + 8001ba8: 681b ldr r3, [r3, #0] + 8001baa: 4a32 ldr r2, [pc, #200] @ (8001c74 ) + 8001bac: 6013 str r3, [r2, #0] /* Escreve no Config Register (P[1:0]=01b) com OS=1 para * iniciar a conversão single-shot. O bit OS só tem efeito * quando o dispositivo está em power-down (seção 7.4.2.1) */ // Write config register to the ADC writeRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONFIG, ADS1015_CONFIG_START_SINGLE); - 80014c6: f248 7203 movw r2, #34563 @ 0x8703 - 80014ca: 2101 movs r1, #1 - 80014cc: 4830 ldr r0, [pc, #192] @ (8001590 ) - 80014ce: f7ff ff2d bl 800132c + 8001bae: f248 7203 movw r2, #34563 @ 0x8703 + 8001bb2: 2101 movs r1, #1 + 8001bb4: 4830 ldr r0, [pc, #192] @ (8001c78 ) + 8001bb6: f7ff ff2d bl 8001a14 ads1015_state = ADS1015_WAIT_CONVERSION; - 80014d2: 4b2b ldr r3, [pc, #172] @ (8001580 ) - 80014d4: 2202 movs r2, #2 - 80014d6: 701a strb r2, [r3, #0] + 8001bba: 4b2b ldr r3, [pc, #172] @ (8001c68 ) + 8001bbc: 2202 movs r2, #2 + 8001bbe: 701a strb r2, [r3, #0] break; - 80014d8: e04d b.n 8001576 + 8001bc0: e04d b.n 8001c5e * 0b = dispositivo ainda convertendo * 1b = conversão concluída, dado pronto no Conversion Register * (Tabela 8-4, descrição do bit OS) */ config_reg = readRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONFIG); - 80014da: 2101 movs r1, #1 - 80014dc: 482c ldr r0, [pc, #176] @ (8001590 ) - 80014de: f7ff ff46 bl 800136e - 80014e2: 4603 mov r3, r0 - 80014e4: 80fb strh r3, [r7, #6] + 8001bc2: 2101 movs r1, #1 + 8001bc4: 482c ldr r0, [pc, #176] @ (8001c78 ) + 8001bc6: f7ff ff46 bl 8001a56 + 8001bca: 4603 mov r3, r0 + 8001bcc: 80fb strh r3, [r7, #6] if (((config_reg & ADS1015_REG_CONFIG_OS_SINGLE) != 0) && (g_ms_counter - state_timer)>ADS1015_TIME_PER_SAMPLE) - 80014e6: f9b7 3006 ldrsh.w r3, [r7, #6] - 80014ea: 2b00 cmp r3, #0 - 80014ec: da40 bge.n 8001570 - 80014ee: 4b26 ldr r3, [pc, #152] @ (8001588 ) - 80014f0: 681a ldr r2, [r3, #0] - 80014f2: 4b26 ldr r3, [pc, #152] @ (800158c ) - 80014f4: 681b ldr r3, [r3, #0] - 80014f6: 1ad3 subs r3, r2, r3 - 80014f8: 2b09 cmp r3, #9 - 80014fa: d939 bls.n 8001570 + 8001bce: f9b7 3006 ldrsh.w r3, [r7, #6] + 8001bd2: 2b00 cmp r3, #0 + 8001bd4: da40 bge.n 8001c58 + 8001bd6: 4b26 ldr r3, [pc, #152] @ (8001c70 ) + 8001bd8: 681a ldr r2, [r3, #0] + 8001bda: 4b26 ldr r3, [pc, #152] @ (8001c74 ) + 8001bdc: 681b ldr r3, [r3, #0] + 8001bde: 1ad3 subs r3, r2, r3 + 8001be0: 2b09 cmp r3, #9 + 8001be2: d939 bls.n 8001c58 { ads1015_state = ADS1015_READ_DATA; - 80014fc: 4b20 ldr r3, [pc, #128] @ (8001580 ) - 80014fe: 2203 movs r2, #3 - 8001500: 701a strb r2, [r3, #0] + 8001be4: 4b20 ldr r3, [pc, #128] @ (8001c68 ) + 8001be6: 2203 movs r2, #3 + 8001be8: 701a strb r2, [r3, #0] } // (opcional) tratar timeout comparando g_ms_counter - state_timer // Datasheet: conversão single-cycle, tempo = 1/DR (ex: 1600SPS ≈ 625µs) break; - 8001502: e035 b.n 8001570 + 8001bea: e035 b.n 8001c58 case ADS1015_READ_DATA: { /* Muda o Address Pointer para o Conversion Register (P[1:0]=00b) * e lê os 16 bits. Dado é 12 bits em complemento de 2, * left-justified em D[15:4]; D[3:0] sempre lê 0h (Tabela 8-3) */ int16_t raw = (int16_t)readRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONVERT); - 8001504: 2100 movs r1, #0 - 8001506: 4822 ldr r0, [pc, #136] @ (8001590 ) - 8001508: f7ff ff31 bl 800136e - 800150c: 4603 mov r3, r0 - 800150e: 80bb strh r3, [r7, #4] + 8001bec: 2100 movs r1, #0 + 8001bee: 4822 ldr r0, [pc, #136] @ (8001c78 ) + 8001bf0: f7ff ff31 bl 8001a56 + 8001bf4: 4603 mov r3, r0 + 8001bf6: 80bb strh r3, [r7, #4] raw >>= 4; // remove os 4 bits reservados (D[3:0]), resultado = 12 bits signed - 8001510: f9b7 3004 ldrsh.w r3, [r7, #4] - 8001514: 111b asrs r3, r3, #4 - 8001516: 80bb strh r3, [r7, #4] + 8001bf8: f9b7 3004 ldrsh.w r3, [r7, #4] + 8001bfc: 111b asrs r3, r3, #4 + 8001bfe: 80bb strh r3, [r7, #4] float value = (float)(2048 - raw); // ((float)raw * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; // usa FSR configurado no PGA - 8001518: f9b7 3004 ldrsh.w r3, [r7, #4] - 800151c: f5c3 6300 rsb r3, r3, #2048 @ 0x800 - 8001520: 4618 mov r0, r3 - 8001522: f7fe fed5 bl 80002d0 <__aeabi_i2f> - 8001526: 4603 mov r3, r0 - 8001528: 603b str r3, [r7, #0] + 8001c00: f9b7 3004 ldrsh.w r3, [r7, #4] + 8001c04: f5c3 6300 rsb r3, r3, #2048 @ 0x800 + 8001c08: 4618 mov r0, r3 + 8001c0a: f7fe fef7 bl 80009fc <__aeabi_i2f> + 8001c0e: 4603 mov r3, r0 + 8001c10: 603b str r3, [r7, #0] ADS1015_pH_NewSample(value); - 800152a: 6838 ldr r0, [r7, #0] - 800152c: f000 f98c bl 8001848 + 8001c12: 6838 ldr r0, [r7, #0] + 8001c14: f000 f98c bl 8001f30 sample_count++; - 8001530: 4b14 ldr r3, [pc, #80] @ (8001584 ) - 8001532: 681b ldr r3, [r3, #0] - 8001534: 3301 adds r3, #1 - 8001536: 4a13 ldr r2, [pc, #76] @ (8001584 ) - 8001538: 6013 str r3, [r2, #0] + 8001c18: 4b14 ldr r3, [pc, #80] @ (8001c6c ) + 8001c1a: 681b ldr r3, [r3, #0] + 8001c1c: 3301 adds r3, #1 + 8001c1e: 4a13 ldr r2, [pc, #76] @ (8001c6c ) + 8001c20: 6013 str r3, [r2, #0] if (sample_count >= ADS1015_BURST_SIZE) - 800153a: 4b12 ldr r3, [pc, #72] @ (8001584 ) - 800153c: 681b ldr r3, [r3, #0] - 800153e: 2b04 cmp r3, #4 - 8001540: d903 bls.n 800154a + 8001c22: 4b12 ldr r3, [pc, #72] @ (8001c6c ) + 8001c24: 681b ldr r3, [r3, #0] + 8001c26: 2b04 cmp r3, #4 + 8001c28: d903 bls.n 8001c32 { ads1015_state = ADS1015_IDLE; - 8001542: 4b0f ldr r3, [pc, #60] @ (8001580 ) - 8001544: 2200 movs r2, #0 - 8001546: 701a strb r2, [r3, #0] + 8001c2a: 4b0f ldr r3, [pc, #60] @ (8001c68 ) + 8001c2c: 2200 movs r2, #0 + 8001c2e: 701a strb r2, [r3, #0] { state_timer = g_ms_counter; ads1015_state = ADS1015_WAIT_NEXT_SAMPLE; } } break; - 8001548: e015 b.n 8001576 + 8001c30: e015 b.n 8001c5e state_timer = g_ms_counter; - 800154a: 4b0f ldr r3, [pc, #60] @ (8001588 ) - 800154c: 681b ldr r3, [r3, #0] - 800154e: 4a0f ldr r2, [pc, #60] @ (800158c ) - 8001550: 6013 str r3, [r2, #0] + 8001c32: 4b0f ldr r3, [pc, #60] @ (8001c70 ) + 8001c34: 681b ldr r3, [r3, #0] + 8001c36: 4a0f ldr r2, [pc, #60] @ (8001c74 ) + 8001c38: 6013 str r3, [r2, #0] ads1015_state = ADS1015_WAIT_NEXT_SAMPLE; - 8001552: 4b0b ldr r3, [pc, #44] @ (8001580 ) - 8001554: 2204 movs r2, #4 - 8001556: 701a strb r2, [r3, #0] + 8001c3a: 4b0b ldr r3, [pc, #44] @ (8001c68 ) + 8001c3c: 2204 movs r2, #4 + 8001c3e: 701a strb r2, [r3, #0] break; - 8001558: e00d b.n 8001576 + 8001c40: e00d b.n 8001c5e case ADS1015_WAIT_NEXT_SAMPLE: if ((g_ms_counter - state_timer) >= ADS1015_TIME_PER_SAMPLE) - 800155a: 4b0b ldr r3, [pc, #44] @ (8001588 ) - 800155c: 681a ldr r2, [r3, #0] - 800155e: 4b0b ldr r3, [pc, #44] @ (800158c ) - 8001560: 681b ldr r3, [r3, #0] - 8001562: 1ad3 subs r3, r2, r3 - 8001564: 2b08 cmp r3, #8 - 8001566: d905 bls.n 8001574 + 8001c42: 4b0b ldr r3, [pc, #44] @ (8001c70 ) + 8001c44: 681a ldr r2, [r3, #0] + 8001c46: 4b0b ldr r3, [pc, #44] @ (8001c74 ) + 8001c48: 681b ldr r3, [r3, #0] + 8001c4a: 1ad3 subs r3, r2, r3 + 8001c4c: 2b08 cmp r3, #8 + 8001c4e: d905 bls.n 8001c5c { ads1015_state = ADS1015_START_CONVERSION; - 8001568: 4b05 ldr r3, [pc, #20] @ (8001580 ) - 800156a: 2201 movs r2, #1 - 800156c: 701a strb r2, [r3, #0] + 8001c50: 4b05 ldr r3, [pc, #20] @ (8001c68 ) + 8001c52: 2201 movs r2, #1 + 8001c54: 701a strb r2, [r3, #0] } break; - 800156e: e001 b.n 8001574 + 8001c56: e001 b.n 8001c5c break; - 8001570: bf00 nop - 8001572: e000 b.n 8001576 + 8001c58: bf00 nop + 8001c5a: e000 b.n 8001c5e break; - 8001574: bf00 nop + 8001c5c: bf00 nop } } - 8001576: bf00 nop - 8001578: 3708 adds r7, #8 - 800157a: 46bd mov sp, r7 - 800157c: bd80 pop {r7, pc} - 800157e: bf00 nop - 8001580: 20000208 .word 0x20000208 - 8001584: 2000020c .word 0x2000020c - 8001588: 20000080 .word 0x20000080 - 800158c: 20000210 .word 0x20000210 - 8001590: 200001b8 .word 0x200001b8 + 8001c5e: bf00 nop + 8001c60: 3708 adds r7, #8 + 8001c62: 46bd mov sp, r7 + 8001c64: bd80 pop {r7, pc} + 8001c66: bf00 nop + 8001c68: 20000204 .word 0x20000204 + 8001c6c: 20000208 .word 0x20000208 + 8001c70: 20000084 .word 0x20000084 + 8001c74: 2000020c .word 0x2000020c + 8001c78: 200001b4 .word 0x200001b4 -08001594 : +08001c7c : /** * Simple insertion sort - BURST_SIZE is small, so the cost is negligible * and it avoids depending on qsort/heap allocation. **/ void ADS1015_Sort_Array(float *v, uint8_t n) { - 8001594: b580 push {r7, lr} - 8001596: b084 sub sp, #16 - 8001598: af00 add r7, sp, #0 - 800159a: 6078 str r0, [r7, #4] - 800159c: 460b mov r3, r1 - 800159e: 70fb strb r3, [r7, #3] + 8001c7c: b580 push {r7, lr} + 8001c7e: b084 sub sp, #16 + 8001c80: af00 add r7, sp, #0 + 8001c82: 6078 str r0, [r7, #4] + 8001c84: 460b mov r3, r1 + 8001c86: 70fb strb r3, [r7, #3] for (uint8_t i = 1; i < n; i++) - 80015a0: 2301 movs r3, #1 - 80015a2: 73fb strb r3, [r7, #15] - 80015a4: e039 b.n 800161a + 8001c88: 2301 movs r3, #1 + 8001c8a: 73fb strb r3, [r7, #15] + 8001c8c: e039 b.n 8001d02 { float key = v[i]; - 80015a6: 7bfb ldrb r3, [r7, #15] - 80015a8: 009b lsls r3, r3, #2 - 80015aa: 687a ldr r2, [r7, #4] - 80015ac: 4413 add r3, r2 - 80015ae: 681b ldr r3, [r3, #0] - 80015b0: 60bb str r3, [r7, #8] + 8001c8e: 7bfb ldrb r3, [r7, #15] + 8001c90: 009b lsls r3, r3, #2 + 8001c92: 687a ldr r2, [r7, #4] + 8001c94: 4413 add r3, r2 + 8001c96: 681b ldr r3, [r3, #0] + 8001c98: 60bb str r3, [r7, #8] int8_t j = (int8_t)i - 1; - 80015b2: 7bfb ldrb r3, [r7, #15] - 80015b4: 3b01 subs r3, #1 - 80015b6: b2db uxtb r3, r3 - 80015b8: 73bb strb r3, [r7, #14] + 8001c9a: 7bfb ldrb r3, [r7, #15] + 8001c9c: 3b01 subs r3, #1 + 8001c9e: b2db uxtb r3, r3 + 8001ca0: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 80015ba: e012 b.n 80015e2 + 8001ca2: e012 b.n 8001cca { v[j + 1] = v[j]; - 80015bc: f997 300e ldrsb.w r3, [r7, #14] - 80015c0: 009b lsls r3, r3, #2 - 80015c2: 687a ldr r2, [r7, #4] - 80015c4: 441a add r2, r3 - 80015c6: f997 300e ldrsb.w r3, [r7, #14] - 80015ca: 3301 adds r3, #1 - 80015cc: 009b lsls r3, r3, #2 - 80015ce: 6879 ldr r1, [r7, #4] - 80015d0: 440b add r3, r1 - 80015d2: 6812 ldr r2, [r2, #0] - 80015d4: 601a str r2, [r3, #0] + 8001ca4: f997 300e ldrsb.w r3, [r7, #14] + 8001ca8: 009b lsls r3, r3, #2 + 8001caa: 687a ldr r2, [r7, #4] + 8001cac: 441a add r2, r3 + 8001cae: f997 300e ldrsb.w r3, [r7, #14] + 8001cb2: 3301 adds r3, #1 + 8001cb4: 009b lsls r3, r3, #2 + 8001cb6: 6879 ldr r1, [r7, #4] + 8001cb8: 440b add r3, r1 + 8001cba: 6812 ldr r2, [r2, #0] + 8001cbc: 601a str r2, [r3, #0] j--; - 80015d6: f997 300e ldrsb.w r3, [r7, #14] - 80015da: b2db uxtb r3, r3 - 80015dc: 3b01 subs r3, #1 - 80015de: b2db uxtb r3, r3 - 80015e0: 73bb strb r3, [r7, #14] + 8001cbe: f997 300e ldrsb.w r3, [r7, #14] + 8001cc2: b2db uxtb r3, r3 + 8001cc4: 3b01 subs r3, #1 + 8001cc6: b2db uxtb r3, r3 + 8001cc8: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 80015e2: f997 300e ldrsb.w r3, [r7, #14] - 80015e6: 2b00 cmp r3, #0 - 80015e8: db0c blt.n 8001604 - 80015ea: f997 300e ldrsb.w r3, [r7, #14] - 80015ee: 009b lsls r3, r3, #2 - 80015f0: 687a ldr r2, [r7, #4] - 80015f2: 4413 add r3, r2 - 80015f4: 681b ldr r3, [r3, #0] - 80015f6: 4619 mov r1, r3 - 80015f8: 68b8 ldr r0, [r7, #8] - 80015fa: f7ff f85b bl 80006b4 <__aeabi_fcmplt> - 80015fe: 4603 mov r3, r0 - 8001600: 2b00 cmp r3, #0 - 8001602: d1db bne.n 80015bc + 8001cca: f997 300e ldrsb.w r3, [r7, #14] + 8001cce: 2b00 cmp r3, #0 + 8001cd0: db0c blt.n 8001cec + 8001cd2: f997 300e ldrsb.w r3, [r7, #14] + 8001cd6: 009b lsls r3, r3, #2 + 8001cd8: 687a ldr r2, [r7, #4] + 8001cda: 4413 add r3, r2 + 8001cdc: 681b ldr r3, [r3, #0] + 8001cde: 4619 mov r1, r3 + 8001ce0: 68b8 ldr r0, [r7, #8] + 8001ce2: f7ff f87d bl 8000de0 <__aeabi_fcmplt> + 8001ce6: 4603 mov r3, r0 + 8001ce8: 2b00 cmp r3, #0 + 8001cea: d1db bne.n 8001ca4 } v[j + 1] = key; - 8001604: f997 300e ldrsb.w r3, [r7, #14] - 8001608: 3301 adds r3, #1 - 800160a: 009b lsls r3, r3, #2 - 800160c: 687a ldr r2, [r7, #4] - 800160e: 4413 add r3, r2 - 8001610: 68ba ldr r2, [r7, #8] - 8001612: 601a str r2, [r3, #0] + 8001cec: f997 300e ldrsb.w r3, [r7, #14] + 8001cf0: 3301 adds r3, #1 + 8001cf2: 009b lsls r3, r3, #2 + 8001cf4: 687a ldr r2, [r7, #4] + 8001cf6: 4413 add r3, r2 + 8001cf8: 68ba ldr r2, [r7, #8] + 8001cfa: 601a str r2, [r3, #0] for (uint8_t i = 1; i < n; i++) - 8001614: 7bfb ldrb r3, [r7, #15] - 8001616: 3301 adds r3, #1 - 8001618: 73fb strb r3, [r7, #15] - 800161a: 7bfa ldrb r2, [r7, #15] - 800161c: 78fb ldrb r3, [r7, #3] - 800161e: 429a cmp r2, r3 - 8001620: d3c1 bcc.n 80015a6 + 8001cfc: 7bfb ldrb r3, [r7, #15] + 8001cfe: 3301 adds r3, #1 + 8001d00: 73fb strb r3, [r7, #15] + 8001d02: 7bfa ldrb r2, [r7, #15] + 8001d04: 78fb ldrb r3, [r7, #3] + 8001d06: 429a cmp r2, r3 + 8001d08: d3c1 bcc.n 8001c8e } } - 8001622: bf00 nop - 8001624: bf00 nop - 8001626: 3710 adds r7, #16 - 8001628: 46bd mov sp, r7 - 800162a: bd80 pop {r7, pc} + 8001d0a: bf00 nop + 8001d0c: bf00 nop + 8001d0e: 3710 adds r7, #16 + 8001d10: 46bd mov sp, r7 + 8001d12: bd80 pop {r7, pc} -0800162c : +08001d14 : * original order is not needed), discards TRIM_COUNT values from each * end, and averages the remainder. Sorting in place avoids a temporary * array and removes the need for memcpy()/string.h entirely. **/ float ADS1015_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim) { - 800162c: b580 push {r7, lr} - 800162e: b086 sub sp, #24 - 8001630: af00 add r7, sp, #0 - 8001632: 6078 str r0, [r7, #4] - 8001634: 460b mov r3, r1 - 8001636: 70fb strb r3, [r7, #3] - 8001638: 4613 mov r3, r2 - 800163a: 70bb strb r3, [r7, #2] + 8001d14: b580 push {r7, lr} + 8001d16: b086 sub sp, #24 + 8001d18: af00 add r7, sp, #0 + 8001d1a: 6078 str r0, [r7, #4] + 8001d1c: 460b mov r3, r1 + 8001d1e: 70fb strb r3, [r7, #3] + 8001d20: 4613 mov r3, r2 + 8001d22: 70bb strb r3, [r7, #2] ADS1015_Sort_Array(buffer, n); - 800163c: 78fb ldrb r3, [r7, #3] - 800163e: 4619 mov r1, r3 - 8001640: 6878 ldr r0, [r7, #4] - 8001642: f7ff ffa7 bl 8001594 + 8001d24: 78fb ldrb r3, [r7, #3] + 8001d26: 4619 mov r1, r3 + 8001d28: 6878 ldr r0, [r7, #4] + 8001d2a: f7ff ffa7 bl 8001c7c uint8_t start = trim; - 8001646: 78bb ldrb r3, [r7, #2] - 8001648: 75fb strb r3, [r7, #23] + 8001d2e: 78bb ldrb r3, [r7, #2] + 8001d30: 75fb strb r3, [r7, #23] uint8_t end = n - trim; /* exclusive */ - 800164a: 78fa ldrb r2, [r7, #3] - 800164c: 78bb ldrb r3, [r7, #2] - 800164e: 1ad3 subs r3, r2, r3 - 8001650: 75bb strb r3, [r7, #22] + 8001d32: 78fa ldrb r2, [r7, #3] + 8001d34: 78bb ldrb r3, [r7, #2] + 8001d36: 1ad3 subs r3, r2, r3 + 8001d38: 75bb strb r3, [r7, #22] if (end <= start) /* guard against a misconfigured trim value */ - 8001652: 7dba ldrb r2, [r7, #22] - 8001654: 7dfb ldrb r3, [r7, #23] - 8001656: 429a cmp r2, r3 - 8001658: d803 bhi.n 8001662 + 8001d3a: 7dba ldrb r2, [r7, #22] + 8001d3c: 7dfb ldrb r3, [r7, #23] + 8001d3e: 429a cmp r2, r3 + 8001d40: d803 bhi.n 8001d4a { start = 0; - 800165a: 2300 movs r3, #0 - 800165c: 75fb strb r3, [r7, #23] + 8001d42: 2300 movs r3, #0 + 8001d44: 75fb strb r3, [r7, #23] end = n; - 800165e: 78fb ldrb r3, [r7, #3] - 8001660: 75bb strb r3, [r7, #22] + 8001d46: 78fb ldrb r3, [r7, #3] + 8001d48: 75bb strb r3, [r7, #22] } float sum = 0.0f; - 8001662: f04f 0300 mov.w r3, #0 - 8001666: 613b str r3, [r7, #16] + 8001d4a: f04f 0300 mov.w r3, #0 + 8001d4e: 613b str r3, [r7, #16] uint8_t count = 0; - 8001668: 2300 movs r3, #0 - 800166a: 73fb strb r3, [r7, #15] + 8001d50: 2300 movs r3, #0 + 8001d52: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 800166c: 7dfb ldrb r3, [r7, #23] - 800166e: 73bb strb r3, [r7, #14] - 8001670: e010 b.n 8001694 + 8001d54: 7dfb ldrb r3, [r7, #23] + 8001d56: 73bb strb r3, [r7, #14] + 8001d58: e010 b.n 8001d7c { sum += buffer[i]; - 8001672: 7bbb ldrb r3, [r7, #14] - 8001674: 009b lsls r3, r3, #2 - 8001676: 687a ldr r2, [r7, #4] - 8001678: 4413 add r3, r2 - 800167a: 681b ldr r3, [r3, #0] - 800167c: 4619 mov r1, r3 - 800167e: 6938 ldr r0, [r7, #16] - 8001680: f7fe fd72 bl 8000168 <__addsf3> - 8001684: 4603 mov r3, r0 - 8001686: 613b str r3, [r7, #16] + 8001d5a: 7bbb ldrb r3, [r7, #14] + 8001d5c: 009b lsls r3, r3, #2 + 8001d5e: 687a ldr r2, [r7, #4] + 8001d60: 4413 add r3, r2 + 8001d62: 681b ldr r3, [r3, #0] + 8001d64: 4619 mov r1, r3 + 8001d66: 6938 ldr r0, [r7, #16] + 8001d68: f7fe fd94 bl 8000894 <__addsf3> + 8001d6c: 4603 mov r3, r0 + 8001d6e: 613b str r3, [r7, #16] count++; - 8001688: 7bfb ldrb r3, [r7, #15] - 800168a: 3301 adds r3, #1 - 800168c: 73fb strb r3, [r7, #15] + 8001d70: 7bfb ldrb r3, [r7, #15] + 8001d72: 3301 adds r3, #1 + 8001d74: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 800168e: 7bbb ldrb r3, [r7, #14] - 8001690: 3301 adds r3, #1 - 8001692: 73bb strb r3, [r7, #14] - 8001694: 7bba ldrb r2, [r7, #14] - 8001696: 7dbb ldrb r3, [r7, #22] - 8001698: 429a cmp r2, r3 - 800169a: d3ea bcc.n 8001672 + 8001d76: 7bbb ldrb r3, [r7, #14] + 8001d78: 3301 adds r3, #1 + 8001d7a: 73bb strb r3, [r7, #14] + 8001d7c: 7bba ldrb r2, [r7, #14] + 8001d7e: 7dbb ldrb r3, [r7, #22] + 8001d80: 429a cmp r2, r3 + 8001d82: d3ea bcc.n 8001d5a } return sum / (float)count; - 800169c: 7bfb ldrb r3, [r7, #15] - 800169e: 4618 mov r0, r3 - 80016a0: f7fe fe12 bl 80002c8 <__aeabi_ui2f> - 80016a4: 4603 mov r3, r0 - 80016a6: 4619 mov r1, r3 - 80016a8: 6938 ldr r0, [r7, #16] - 80016aa: f7fe ff19 bl 80004e0 <__aeabi_fdiv> - 80016ae: 4603 mov r3, r0 + 8001d84: 7bfb ldrb r3, [r7, #15] + 8001d86: 4618 mov r0, r3 + 8001d88: f7fe fe34 bl 80009f4 <__aeabi_ui2f> + 8001d8c: 4603 mov r3, r0 + 8001d8e: 4619 mov r1, r3 + 8001d90: 6938 ldr r0, [r7, #16] + 8001d92: f7fe ff3b bl 8000c0c <__aeabi_fdiv> + 8001d96: 4603 mov r3, r0 } - 80016b0: 4618 mov r0, r3 - 80016b2: 3718 adds r7, #24 - 80016b4: 46bd mov sp, r7 - 80016b6: bd80 pop {r7, pc} + 8001d98: 4618 mov r0, r3 + 8001d9a: 3718 adds r7, #24 + 8001d9c: 46bd mov sp, r7 + 8001d9e: bd80 pop {r7, pc} -080016b8 : +08001da0 : /* * Simple average of the history buffer (stage-2 sliding window) */ float ADS1015_History_Average(const float *hist, uint8_t n) { - 80016b8: b580 push {r7, lr} - 80016ba: b084 sub sp, #16 - 80016bc: af00 add r7, sp, #0 - 80016be: 6078 str r0, [r7, #4] - 80016c0: 460b mov r3, r1 - 80016c2: 70fb strb r3, [r7, #3] + 8001da0: b580 push {r7, lr} + 8001da2: b084 sub sp, #16 + 8001da4: af00 add r7, sp, #0 + 8001da6: 6078 str r0, [r7, #4] + 8001da8: 460b mov r3, r1 + 8001daa: 70fb strb r3, [r7, #3] float sum = 0.0f; - 80016c4: f04f 0300 mov.w r3, #0 - 80016c8: 60fb str r3, [r7, #12] + 8001dac: f04f 0300 mov.w r3, #0 + 8001db0: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 80016ca: 2300 movs r3, #0 - 80016cc: 72fb strb r3, [r7, #11] - 80016ce: e00d b.n 80016ec + 8001db2: 2300 movs r3, #0 + 8001db4: 72fb strb r3, [r7, #11] + 8001db6: e00d b.n 8001dd4 sum += hist[i]; - 80016d0: 7afb ldrb r3, [r7, #11] - 80016d2: 009b lsls r3, r3, #2 - 80016d4: 687a ldr r2, [r7, #4] - 80016d6: 4413 add r3, r2 - 80016d8: 681b ldr r3, [r3, #0] - 80016da: 4619 mov r1, r3 - 80016dc: 68f8 ldr r0, [r7, #12] - 80016de: f7fe fd43 bl 8000168 <__addsf3> - 80016e2: 4603 mov r3, r0 - 80016e4: 60fb str r3, [r7, #12] + 8001db8: 7afb ldrb r3, [r7, #11] + 8001dba: 009b lsls r3, r3, #2 + 8001dbc: 687a ldr r2, [r7, #4] + 8001dbe: 4413 add r3, r2 + 8001dc0: 681b ldr r3, [r3, #0] + 8001dc2: 4619 mov r1, r3 + 8001dc4: 68f8 ldr r0, [r7, #12] + 8001dc6: f7fe fd65 bl 8000894 <__addsf3> + 8001dca: 4603 mov r3, r0 + 8001dcc: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 80016e6: 7afb ldrb r3, [r7, #11] - 80016e8: 3301 adds r3, #1 - 80016ea: 72fb strb r3, [r7, #11] - 80016ec: 7afa ldrb r2, [r7, #11] - 80016ee: 78fb ldrb r3, [r7, #3] - 80016f0: 429a cmp r2, r3 - 80016f2: d3ed bcc.n 80016d0 + 8001dce: 7afb ldrb r3, [r7, #11] + 8001dd0: 3301 adds r3, #1 + 8001dd2: 72fb strb r3, [r7, #11] + 8001dd4: 7afa ldrb r2, [r7, #11] + 8001dd6: 78fb ldrb r3, [r7, #3] + 8001dd8: 429a cmp r2, r3 + 8001dda: d3ed bcc.n 8001db8 return sum / (float)n; - 80016f4: 78fb ldrb r3, [r7, #3] - 80016f6: 4618 mov r0, r3 - 80016f8: f7fe fde6 bl 80002c8 <__aeabi_ui2f> - 80016fc: 4603 mov r3, r0 - 80016fe: 4619 mov r1, r3 - 8001700: 68f8 ldr r0, [r7, #12] - 8001702: f7fe feed bl 80004e0 <__aeabi_fdiv> - 8001706: 4603 mov r3, r0 + 8001ddc: 78fb ldrb r3, [r7, #3] + 8001dde: 4618 mov r0, r3 + 8001de0: f7fe fe08 bl 80009f4 <__aeabi_ui2f> + 8001de4: 4603 mov r3, r0 + 8001de6: 4619 mov r1, r3 + 8001de8: 68f8 ldr r0, [r7, #12] + 8001dea: f7fe ff0f bl 8000c0c <__aeabi_fdiv> + 8001dee: 4603 mov r3, r0 } - 8001708: 4618 mov r0, r3 - 800170a: 3710 adds r7, #16 - 800170c: 46bd mov sp, r7 - 800170e: bd80 pop {r7, pc} + 8001df0: 4618 mov r0, r3 + 8001df2: 3710 adds r7, #16 + 8001df4: 46bd mov sp, r7 + 8001df6: bd80 pop {r7, pc} -08001710 : +08001df8 : * Common processing core: applied identically to all 3 channels. * Receives the current raw reading and the channel's state (global * arrays/struct). **/ void ADS1015_Process_Sample(ADS1015_filter_t *ch, float raw) { - 8001710: b590 push {r4, r7, lr} - 8001712: b085 sub sp, #20 - 8001714: af00 add r7, sp, #0 - 8001716: 6078 str r0, [r7, #4] - 8001718: 6039 str r1, [r7, #0] + 8001df8: b590 push {r4, r7, lr} + 8001dfa: b085 sub sp, #20 + 8001dfc: af00 add r7, sp, #0 + 8001dfe: 6078 str r0, [r7, #4] + 8001e00: 6039 str r1, [r7, #0] /* --- Stage 1: accumulate into the current burst --- */ ch->burst[ch->burst_index] = raw; - 800171a: 687b ldr r3, [r7, #4] - 800171c: 7d1b ldrb r3, [r3, #20] - 800171e: 4619 mov r1, r3 - 8001720: 687b ldr r3, [r7, #4] - 8001722: 683a ldr r2, [r7, #0] - 8001724: f843 2021 str.w r2, [r3, r1, lsl #2] + 8001e02: 687b ldr r3, [r7, #4] + 8001e04: 7d1b ldrb r3, [r3, #20] + 8001e06: 4619 mov r1, r3 + 8001e08: 687b ldr r3, [r7, #4] + 8001e0a: 683a ldr r2, [r7, #0] + 8001e0c: f843 2021 str.w r2, [r3, r1, lsl #2] ch->burst_index++; - 8001728: 687b ldr r3, [r7, #4] - 800172a: 7d1b ldrb r3, [r3, #20] - 800172c: 3301 adds r3, #1 - 800172e: b2da uxtb r2, r3 - 8001730: 687b ldr r3, [r7, #4] - 8001732: 751a strb r2, [r3, #20] + 8001e10: 687b ldr r3, [r7, #4] + 8001e12: 7d1b ldrb r3, [r3, #20] + 8001e14: 3301 adds r3, #1 + 8001e16: b2da uxtb r2, r3 + 8001e18: 687b ldr r3, [r7, #4] + 8001e1a: 751a strb r2, [r3, #20] if (ch->burst_index < ADS1015_BURST_SIZE) - 8001734: 687b ldr r3, [r7, #4] - 8001736: 7d1b ldrb r3, [r3, #20] - 8001738: 2b04 cmp r3, #4 - 800173a: d97a bls.n 8001832 + 8001e1c: 687b ldr r3, [r7, #4] + 8001e1e: 7d1b ldrb r3, [r3, #20] + 8001e20: 2b04 cmp r3, #4 + 8001e22: d97a bls.n 8001f1a return; /* still collecting the burst, nothing else to do */ /* Burst complete: compute the trimmed mean */ float burst_result = ADS1015_Trimmed_Mean(ch->burst, ADS1015_BURST_SIZE, ADS1015_TRIM_COUNT); - 800173c: 687b ldr r3, [r7, #4] - 800173e: 2201 movs r2, #1 - 8001740: 2105 movs r1, #5 - 8001742: 4618 mov r0, r3 - 8001744: f7ff ff72 bl 800162c - 8001748: 60f8 str r0, [r7, #12] + 8001e24: 687b ldr r3, [r7, #4] + 8001e26: 2201 movs r2, #1 + 8001e28: 2105 movs r1, #5 + 8001e2a: 4618 mov r0, r3 + 8001e2c: f7ff ff72 bl 8001d14 + 8001e30: 60f8 str r0, [r7, #12] ch->burst_index = 0; /* reset for the next burst */ - 800174a: 687b ldr r3, [r7, #4] - 800174c: 2200 movs r2, #0 - 800174e: 751a strb r2, [r3, #20] + 8001e32: 687b ldr r3, [r7, #4] + 8001e34: 2200 movs r2, #0 + 8001e36: 751a strb r2, [r3, #20] /* --- Stage 2a: rolling history / sliding window --- */ ch->history[ch->history_index] = burst_result; - 8001750: 687b ldr r3, [r7, #4] - 8001752: f893 302c ldrb.w r3, [r3, #44] @ 0x2c - 8001756: 461a mov r2, r3 - 8001758: 687b ldr r3, [r7, #4] - 800175a: 3206 adds r2, #6 - 800175c: 68f9 ldr r1, [r7, #12] - 800175e: f843 1022 str.w r1, [r3, r2, lsl #2] + 8001e38: 687b ldr r3, [r7, #4] + 8001e3a: f893 302c ldrb.w r3, [r3, #44] @ 0x2c + 8001e3e: 461a mov r2, r3 + 8001e40: 687b ldr r3, [r7, #4] + 8001e42: 3206 adds r2, #6 + 8001e44: 68f9 ldr r1, [r7, #12] + 8001e46: f843 1022 str.w r1, [r3, r2, lsl #2] ch->history_index = (uint8_t)((ch->history_index + 1) % ADS1015_HISTORY_SIZE); - 8001762: 687b ldr r3, [r7, #4] - 8001764: f893 302c ldrb.w r3, [r3, #44] @ 0x2c - 8001768: 1c5a adds r2, r3, #1 - 800176a: 4b34 ldr r3, [pc, #208] @ (800183c ) - 800176c: fb83 1302 smull r1, r3, r3, r2 - 8001770: 1059 asrs r1, r3, #1 - 8001772: 17d3 asrs r3, r2, #31 - 8001774: 1ac9 subs r1, r1, r3 - 8001776: 460b mov r3, r1 - 8001778: 009b lsls r3, r3, #2 - 800177a: 440b add r3, r1 - 800177c: 1ad1 subs r1, r2, r3 - 800177e: b2ca uxtb r2, r1 - 8001780: 687b ldr r3, [r7, #4] - 8001782: f883 202c strb.w r2, [r3, #44] @ 0x2c + 8001e4a: 687b ldr r3, [r7, #4] + 8001e4c: f893 302c ldrb.w r3, [r3, #44] @ 0x2c + 8001e50: 1c5a adds r2, r3, #1 + 8001e52: 4b34 ldr r3, [pc, #208] @ (8001f24 ) + 8001e54: fb83 1302 smull r1, r3, r3, r2 + 8001e58: 1059 asrs r1, r3, #1 + 8001e5a: 17d3 asrs r3, r2, #31 + 8001e5c: 1ac9 subs r1, r1, r3 + 8001e5e: 460b mov r3, r1 + 8001e60: 009b lsls r3, r3, #2 + 8001e62: 440b add r3, r1 + 8001e64: 1ad1 subs r1, r2, r3 + 8001e66: b2ca uxtb r2, r1 + 8001e68: 687b ldr r3, [r7, #4] + 8001e6a: f883 202c strb.w r2, [r3, #44] @ 0x2c if (ch->history_count < ADS1015_HISTORY_SIZE) - 8001786: 687b ldr r3, [r7, #4] - 8001788: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 800178c: 2b04 cmp r3, #4 - 800178e: d807 bhi.n 80017a0 + 8001e6e: 687b ldr r3, [r7, #4] + 8001e70: f893 302d ldrb.w r3, [r3, #45] @ 0x2d + 8001e74: 2b04 cmp r3, #4 + 8001e76: d807 bhi.n 8001e88 ch->history_count++; - 8001790: 687b ldr r3, [r7, #4] - 8001792: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 8001796: 3301 adds r3, #1 - 8001798: b2da uxtb r2, r3 - 800179a: 687b ldr r3, [r7, #4] - 800179c: f883 202d strb.w r2, [r3, #45] @ 0x2d + 8001e78: 687b ldr r3, [r7, #4] + 8001e7a: f893 302d ldrb.w r3, [r3, #45] @ 0x2d + 8001e7e: 3301 adds r3, #1 + 8001e80: b2da uxtb r2, r3 + 8001e82: 687b ldr r3, [r7, #4] + 8001e84: f883 202d strb.w r2, [r3, #45] @ 0x2d float window_average = ADS1015_History_Average(ch->history, ch->history_count); - 80017a0: 687b ldr r3, [r7, #4] - 80017a2: f103 0218 add.w r2, r3, #24 - 80017a6: 687b ldr r3, [r7, #4] - 80017a8: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 80017ac: 4619 mov r1, r3 - 80017ae: 4610 mov r0, r2 - 80017b0: f7ff ff82 bl 80016b8 - 80017b4: 60b8 str r0, [r7, #8] + 8001e88: 687b ldr r3, [r7, #4] + 8001e8a: f103 0218 add.w r2, r3, #24 + 8001e8e: 687b ldr r3, [r7, #4] + 8001e90: f893 302d ldrb.w r3, [r3, #45] @ 0x2d + 8001e94: 4619 mov r1, r3 + 8001e96: 4610 mov r0, r2 + 8001e98: f7ff ff82 bl 8001da0 + 8001e9c: 60b8 str r0, [r7, #8] /* --- Stage 2b: first-order IIR low-pass filter on the burst result --- */ if (!ch->iir_initialized) - 80017b6: 687b ldr r3, [r7, #4] - 80017b8: f893 3034 ldrb.w r3, [r3, #52] @ 0x34 - 80017bc: 2b00 cmp r3, #0 - 80017be: d107 bne.n 80017d0 + 8001e9e: 687b ldr r3, [r7, #4] + 8001ea0: f893 3034 ldrb.w r3, [r3, #52] @ 0x34 + 8001ea4: 2b00 cmp r3, #0 + 8001ea6: d107 bne.n 8001eb8 { ch->iir_state = burst_result; - 80017c0: 687b ldr r3, [r7, #4] - 80017c2: 68fa ldr r2, [r7, #12] - 80017c4: 631a str r2, [r3, #48] @ 0x30 + 8001ea8: 687b ldr r3, [r7, #4] + 8001eaa: 68fa ldr r2, [r7, #12] + 8001eac: 631a str r2, [r3, #48] @ 0x30 ch->iir_initialized = 1; - 80017c6: 687b ldr r3, [r7, #4] - 80017c8: 2201 movs r2, #1 - 80017ca: f883 2034 strb.w r2, [r3, #52] @ 0x34 - 80017ce: e014 b.n 80017fa + 8001eae: 687b ldr r3, [r7, #4] + 8001eb0: 2201 movs r2, #1 + 8001eb2: f883 2034 strb.w r2, [r3, #52] @ 0x34 + 8001eb6: e014 b.n 8001ee2 } else { ch->iir_state = ADS1015_IIR_ALPHA * burst_result + (1.0f - ADS1015_IIR_ALPHA) * ch->iir_state; - 80017d0: 491b ldr r1, [pc, #108] @ (8001840 ) - 80017d2: 68f8 ldr r0, [r7, #12] - 80017d4: f7fe fdd0 bl 8000378 <__aeabi_fmul> - 80017d8: 4603 mov r3, r0 - 80017da: 461c mov r4, r3 - 80017dc: 687b ldr r3, [r7, #4] - 80017de: 6b1b ldr r3, [r3, #48] @ 0x30 - 80017e0: 4918 ldr r1, [pc, #96] @ (8001844 ) - 80017e2: 4618 mov r0, r3 - 80017e4: f7fe fdc8 bl 8000378 <__aeabi_fmul> - 80017e8: 4603 mov r3, r0 - 80017ea: 4619 mov r1, r3 - 80017ec: 4620 mov r0, r4 - 80017ee: f7fe fcbb bl 8000168 <__addsf3> - 80017f2: 4603 mov r3, r0 - 80017f4: 461a mov r2, r3 - 80017f6: 687b ldr r3, [r7, #4] - 80017f8: 631a str r2, [r3, #48] @ 0x30 + 8001eb8: 491b ldr r1, [pc, #108] @ (8001f28 ) + 8001eba: 68f8 ldr r0, [r7, #12] + 8001ebc: f7fe fdf2 bl 8000aa4 <__aeabi_fmul> + 8001ec0: 4603 mov r3, r0 + 8001ec2: 461c mov r4, r3 + 8001ec4: 687b ldr r3, [r7, #4] + 8001ec6: 6b1b ldr r3, [r3, #48] @ 0x30 + 8001ec8: 4918 ldr r1, [pc, #96] @ (8001f2c ) + 8001eca: 4618 mov r0, r3 + 8001ecc: f7fe fdea bl 8000aa4 <__aeabi_fmul> + 8001ed0: 4603 mov r3, r0 + 8001ed2: 4619 mov r1, r3 + 8001ed4: 4620 mov r0, r4 + 8001ed6: f7fe fcdd bl 8000894 <__addsf3> + 8001eda: 4603 mov r3, r0 + 8001edc: 461a mov r2, r3 + 8001ede: 687b ldr r3, [r7, #4] + 8001ee0: 631a str r2, [r3, #48] @ 0x30 } /* Final output: combines the IIR state (fast response to real drift) * with the window average (more stable, slower response). Adjust * the weighting per channel if needed. */ ch->filtered_value = 0.5f * ch->iir_state + 0.5f * window_average; - 80017fa: 687b ldr r3, [r7, #4] - 80017fc: 6b1b ldr r3, [r3, #48] @ 0x30 - 80017fe: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 - 8001802: 4618 mov r0, r3 - 8001804: f7fe fdb8 bl 8000378 <__aeabi_fmul> - 8001808: 4603 mov r3, r0 - 800180a: 461c mov r4, r3 - 800180c: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 - 8001810: 68b8 ldr r0, [r7, #8] - 8001812: f7fe fdb1 bl 8000378 <__aeabi_fmul> - 8001816: 4603 mov r3, r0 - 8001818: 4619 mov r1, r3 - 800181a: 4620 mov r0, r4 - 800181c: f7fe fca4 bl 8000168 <__addsf3> - 8001820: 4603 mov r3, r0 - 8001822: 461a mov r2, r3 - 8001824: 687b ldr r3, [r7, #4] - 8001826: 639a str r2, [r3, #56] @ 0x38 + 8001ee2: 687b ldr r3, [r7, #4] + 8001ee4: 6b1b ldr r3, [r3, #48] @ 0x30 + 8001ee6: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 + 8001eea: 4618 mov r0, r3 + 8001eec: f7fe fdda bl 8000aa4 <__aeabi_fmul> + 8001ef0: 4603 mov r3, r0 + 8001ef2: 461c mov r4, r3 + 8001ef4: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 + 8001ef8: 68b8 ldr r0, [r7, #8] + 8001efa: f7fe fdd3 bl 8000aa4 <__aeabi_fmul> + 8001efe: 4603 mov r3, r0 + 8001f00: 4619 mov r1, r3 + 8001f02: 4620 mov r0, r4 + 8001f04: f7fe fcc6 bl 8000894 <__addsf3> + 8001f08: 4603 mov r3, r0 + 8001f0a: 461a mov r2, r3 + 8001f0c: 687b ldr r3, [r7, #4] + 8001f0e: 639a str r2, [r3, #56] @ 0x38 ch->value_valid = 1; - 8001828: 687b ldr r3, [r7, #4] - 800182a: 2201 movs r2, #1 - 800182c: f883 203c strb.w r2, [r3, #60] @ 0x3c - 8001830: e000 b.n 8001834 + 8001f10: 687b ldr r3, [r7, #4] + 8001f12: 2201 movs r2, #1 + 8001f14: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8001f18: e000 b.n 8001f1c return; /* still collecting the burst, nothing else to do */ - 8001832: bf00 nop + 8001f1a: bf00 nop } - 8001834: 3714 adds r7, #20 - 8001836: 46bd mov sp, r7 - 8001838: bd90 pop {r4, r7, pc} - 800183a: bf00 nop - 800183c: 66666667 .word 0x66666667 - 8001840: 3f0ccccd .word 0x3f0ccccd - 8001844: 3ee66666 .word 0x3ee66666 + 8001f1c: 3714 adds r7, #20 + 8001f1e: 46bd mov sp, r7 + 8001f20: bd90 pop {r4, r7, pc} + 8001f22: bf00 nop + 8001f24: 66666667 .word 0x66666667 + 8001f28: 3f0ccccd .word 0x3f0ccccd + 8001f2c: 3ee66666 .word 0x3ee66666 -08001848 : +08001f30 : /* PUBLIC FUNCTIONS - ONE PER CHANNEL */ /* ---------------------------------------------------------------------- */ void ADS1015_pH_NewSample(float raw) { - 8001848: b580 push {r7, lr} - 800184a: b082 sub sp, #8 - 800184c: af00 add r7, sp, #0 - 800184e: 6078 str r0, [r7, #4] + 8001f30: b580 push {r7, lr} + 8001f32: b082 sub sp, #8 + 8001f34: af00 add r7, sp, #0 + 8001f36: 6078 str r0, [r7, #4] ADS1015_Process_Sample(&g_ph_filter, raw); - 8001850: 6879 ldr r1, [r7, #4] - 8001852: 4803 ldr r0, [pc, #12] @ (8001860 ) - 8001854: f7ff ff5c bl 8001710 + 8001f38: 6879 ldr r1, [r7, #4] + 8001f3a: 4803 ldr r0, [pc, #12] @ (8001f48 ) + 8001f3c: f7ff ff5c bl 8001df8 } - 8001858: bf00 nop - 800185a: 3708 adds r7, #8 - 800185c: 46bd mov sp, r7 - 800185e: bd80 pop {r7, pc} - 8001860: 200001c8 .word 0x200001c8 + 8001f40: bf00 nop + 8001f42: 3708 adds r7, #8 + 8001f44: 46bd mov sp, r7 + 8001f46: bd80 pop {r7, pc} + 8001f48: 200001c4 .word 0x200001c4 -08001864 : +08001f4c : * @brief Initializes the GPIO hardware and sets initial states. * @note This function replaces the handle-based init. * @retval None */ void digital_outputs_init(void) { - 8001864: b580 push {r7, lr} - 8001866: b086 sub sp, #24 - 8001868: af00 add r7, sp, #0 + 8001f4c: b580 push {r7, lr} + 8001f4e: b086 sub sp, #24 + 8001f50: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800186a: 1d3b adds r3, r7, #4 - 800186c: 2200 movs r2, #0 - 800186e: 601a str r2, [r3, #0] - 8001870: 605a str r2, [r3, #4] - 8001872: 609a str r2, [r3, #8] - 8001874: 60da str r2, [r3, #12] + 8001f52: 1d3b adds r3, r7, #4 + 8001f54: 2200 movs r2, #0 + 8001f56: 601a str r2, [r3, #0] + 8001f58: 605a str r2, [r3, #4] + 8001f5a: 609a str r2, [r3, #8] + 8001f5c: 60da str r2, [r3, #12] for (int i = 0; i < OUTPUT_PINS_COUNT; i++) { - 8001876: 2300 movs r3, #0 - 8001878: 617b str r3, [r7, #20] - 800187a: e029 b.n 80018d0 + 8001f5e: 2300 movs r3, #0 + 8001f60: 617b str r3, [r7, #20] + 8001f62: e029 b.n 8001fb8 GPIO_InitStruct.Pin = output_pins[i].pin; - 800187c: 4a18 ldr r2, [pc, #96] @ (80018e0 ) - 800187e: 697b ldr r3, [r7, #20] - 8001880: 00db lsls r3, r3, #3 - 8001882: 4413 add r3, r2 - 8001884: 889b ldrh r3, [r3, #4] - 8001886: 607b str r3, [r7, #4] + 8001f64: 4a18 ldr r2, [pc, #96] @ (8001fc8 ) + 8001f66: 697b ldr r3, [r7, #20] + 8001f68: 00db lsls r3, r3, #3 + 8001f6a: 4413 add r3, r2 + 8001f6c: 889b ldrh r3, [r3, #4] + 8001f6e: 607b str r3, [r7, #4] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; // Open-drain - 8001888: 2311 movs r3, #17 - 800188a: 60bb str r3, [r7, #8] + 8001f70: 2311 movs r3, #17 + 8001f72: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800188c: 2300 movs r3, #0 - 800188e: 60fb str r3, [r7, #12] + 8001f74: 2300 movs r3, #0 + 8001f76: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001890: 2302 movs r3, #2 - 8001892: 613b str r3, [r7, #16] + 8001f78: 2302 movs r3, #2 + 8001f7a: 613b str r3, [r7, #16] HAL_GPIO_Init(output_pins[i].port, &GPIO_InitStruct); - 8001894: 4a12 ldr r2, [pc, #72] @ (80018e0 ) - 8001896: 697b ldr r3, [r7, #20] - 8001898: f852 3033 ldr.w r3, [r2, r3, lsl #3] - 800189c: 1d3a adds r2, r7, #4 - 800189e: 4611 mov r1, r2 - 80018a0: 4618 mov r0, r3 - 80018a2: f001 fb2d bl 8002f00 + 8001f7c: 4a12 ldr r2, [pc, #72] @ (8001fc8 ) + 8001f7e: 697b ldr r3, [r7, #20] + 8001f80: f852 3033 ldr.w r3, [r2, r3, lsl #3] + 8001f84: 1d3a adds r2, r7, #4 + 8001f86: 4611 mov r1, r2 + 8001f88: 4618 mov r0, r3 + 8001f8a: f001 fc63 bl 8003854 // Force initial state to LOW (Reset) HAL_GPIO_WritePin(output_pins[i].port, output_pins[i].pin, GPIO_PIN_SET); - 80018a6: 4a0e ldr r2, [pc, #56] @ (80018e0 ) - 80018a8: 697b ldr r3, [r7, #20] - 80018aa: f852 0033 ldr.w r0, [r2, r3, lsl #3] - 80018ae: 4a0c ldr r2, [pc, #48] @ (80018e0 ) - 80018b0: 697b ldr r3, [r7, #20] - 80018b2: 00db lsls r3, r3, #3 - 80018b4: 4413 add r3, r2 - 80018b6: 889b ldrh r3, [r3, #4] - 80018b8: 2201 movs r2, #1 - 80018ba: 4619 mov r1, r3 - 80018bc: f001 fcbb bl 8003236 + 8001f8e: 4a0e ldr r2, [pc, #56] @ (8001fc8 ) + 8001f90: 697b ldr r3, [r7, #20] + 8001f92: f852 0033 ldr.w r0, [r2, r3, lsl #3] + 8001f96: 4a0c ldr r2, [pc, #48] @ (8001fc8 ) + 8001f98: 697b ldr r3, [r7, #20] + 8001f9a: 00db lsls r3, r3, #3 + 8001f9c: 4413 add r3, r2 + 8001f9e: 889b ldrh r3, [r3, #4] + 8001fa0: 2201 movs r2, #1 + 8001fa2: 4619 mov r1, r3 + 8001fa4: f001 fdf1 bl 8003b8a pin_states[i] = 0; - 80018c0: 4a08 ldr r2, [pc, #32] @ (80018e4 ) - 80018c2: 697b ldr r3, [r7, #20] - 80018c4: 4413 add r3, r2 - 80018c6: 2200 movs r2, #0 - 80018c8: 701a strb r2, [r3, #0] + 8001fa8: 4a08 ldr r2, [pc, #32] @ (8001fcc ) + 8001faa: 697b ldr r3, [r7, #20] + 8001fac: 4413 add r3, r2 + 8001fae: 2200 movs r2, #0 + 8001fb0: 701a strb r2, [r3, #0] for (int i = 0; i < OUTPUT_PINS_COUNT; i++) { - 80018ca: 697b ldr r3, [r7, #20] - 80018cc: 3301 adds r3, #1 - 80018ce: 617b str r3, [r7, #20] - 80018d0: 697b ldr r3, [r7, #20] - 80018d2: 2b07 cmp r3, #7 - 80018d4: ddd2 ble.n 800187c + 8001fb2: 697b ldr r3, [r7, #20] + 8001fb4: 3301 adds r3, #1 + 8001fb6: 617b str r3, [r7, #20] + 8001fb8: 697b ldr r3, [r7, #20] + 8001fba: 2b07 cmp r3, #7 + 8001fbc: ddd2 ble.n 8001f64 } } - 80018d6: bf00 nop - 80018d8: bf00 nop - 80018da: 3718 adds r7, #24 - 80018dc: 46bd mov sp, r7 - 80018de: bd80 pop {r7, pc} - 80018e0: 08006304 .word 0x08006304 - 80018e4: 20000214 .word 0x20000214 + 8001fbe: bf00 nop + 8001fc0: bf00 nop + 8001fc2: 3718 adds r7, #24 + 8001fc4: 46bd mov sp, r7 + 8001fc6: bd80 pop {r7, pc} + 8001fc8: 08006be8 .word 0x08006be8 + 8001fcc: 20000210 .word 0x20000210 -080018e8 : +08001fd0 : * @param pin Index of the pin (0 to OUTPUT_PINS_COUNT-1) * @param state Desired state (0 = LOW, 1 = HIGH) * @retval None */ void digital_outputs_set_state(digital_output_pin_t pin, uint8_t state) { - 80018e8: b580 push {r7, lr} - 80018ea: b084 sub sp, #16 - 80018ec: af00 add r7, sp, #0 - 80018ee: 4603 mov r3, r0 - 80018f0: 460a mov r2, r1 - 80018f2: 71fb strb r3, [r7, #7] - 80018f4: 4613 mov r3, r2 - 80018f6: 71bb strb r3, [r7, #6] + 8001fd0: b580 push {r7, lr} + 8001fd2: b084 sub sp, #16 + 8001fd4: af00 add r7, sp, #0 + 8001fd6: 4603 mov r3, r0 + 8001fd8: 460a mov r2, r1 + 8001fda: 71fb strb r3, [r7, #7] + 8001fdc: 4613 mov r3, r2 + 8001fde: 71bb strb r3, [r7, #6] if (pin >= OUTPUT_PINS_COUNT) { - 80018f8: 79fb ldrb r3, [r7, #7] - 80018fa: 2b07 cmp r3, #7 - 80018fc: d823 bhi.n 8001946 + 8001fe0: 79fb ldrb r3, [r7, #7] + 8001fe2: 2b07 cmp r3, #7 + 8001fe4: d823 bhi.n 800202e return; // Simple boundary protection } GPIO_TypeDef* port = output_pins[pin].port; - 80018fe: 79fb ldrb r3, [r7, #7] - 8001900: 4a13 ldr r2, [pc, #76] @ (8001950 ) - 8001902: f852 3033 ldr.w r3, [r2, r3, lsl #3] - 8001906: 60fb str r3, [r7, #12] + 8001fe6: 79fb ldrb r3, [r7, #7] + 8001fe8: 4a13 ldr r2, [pc, #76] @ (8002038 ) + 8001fea: f852 3033 ldr.w r3, [r2, r3, lsl #3] + 8001fee: 60fb str r3, [r7, #12] uint16_t pin_mask = output_pins[pin].pin; - 8001908: 79fb ldrb r3, [r7, #7] - 800190a: 4a11 ldr r2, [pc, #68] @ (8001950 ) - 800190c: 00db lsls r3, r3, #3 - 800190e: 4413 add r3, r2 - 8001910: 889b ldrh r3, [r3, #4] - 8001912: 817b strh r3, [r7, #10] + 8001ff0: 79fb ldrb r3, [r7, #7] + 8001ff2: 4a11 ldr r2, [pc, #68] @ (8002038 ) + 8001ff4: 00db lsls r3, r3, #3 + 8001ff6: 4413 add r3, r2 + 8001ff8: 889b ldrh r3, [r3, #4] + 8001ffa: 817b strh r3, [r7, #10] if (state) { - 8001914: 79bb ldrb r3, [r7, #6] - 8001916: 2b00 cmp r3, #0 - 8001918: d00a beq.n 8001930 + 8001ffc: 79bb ldrb r3, [r7, #6] + 8001ffe: 2b00 cmp r3, #0 + 8002000: d00a beq.n 8002018 HAL_GPIO_WritePin(port, pin_mask, GPIO_PIN_RESET); - 800191a: 897b ldrh r3, [r7, #10] - 800191c: 2200 movs r2, #0 - 800191e: 4619 mov r1, r3 - 8001920: 68f8 ldr r0, [r7, #12] - 8001922: f001 fc88 bl 8003236 + 8002002: 897b ldrh r3, [r7, #10] + 8002004: 2200 movs r2, #0 + 8002006: 4619 mov r1, r3 + 8002008: 68f8 ldr r0, [r7, #12] + 800200a: f001 fdbe bl 8003b8a pin_states[pin] = 1; - 8001926: 79fb ldrb r3, [r7, #7] - 8001928: 4a0a ldr r2, [pc, #40] @ (8001954 ) - 800192a: 2101 movs r1, #1 - 800192c: 54d1 strb r1, [r2, r3] - 800192e: e00b b.n 8001948 + 800200e: 79fb ldrb r3, [r7, #7] + 8002010: 4a0a ldr r2, [pc, #40] @ (800203c ) + 8002012: 2101 movs r1, #1 + 8002014: 54d1 strb r1, [r2, r3] + 8002016: e00b b.n 8002030 } else { HAL_GPIO_WritePin(port, pin_mask, GPIO_PIN_SET); - 8001930: 897b ldrh r3, [r7, #10] - 8001932: 2201 movs r2, #1 - 8001934: 4619 mov r1, r3 - 8001936: 68f8 ldr r0, [r7, #12] - 8001938: f001 fc7d bl 8003236 + 8002018: 897b ldrh r3, [r7, #10] + 800201a: 2201 movs r2, #1 + 800201c: 4619 mov r1, r3 + 800201e: 68f8 ldr r0, [r7, #12] + 8002020: f001 fdb3 bl 8003b8a pin_states[pin] = 0; - 800193c: 79fb ldrb r3, [r7, #7] - 800193e: 4a05 ldr r2, [pc, #20] @ (8001954 ) - 8001940: 2100 movs r1, #0 - 8001942: 54d1 strb r1, [r2, r3] - 8001944: e000 b.n 8001948 + 8002024: 79fb ldrb r3, [r7, #7] + 8002026: 4a05 ldr r2, [pc, #20] @ (800203c ) + 8002028: 2100 movs r1, #0 + 800202a: 54d1 strb r1, [r2, r3] + 800202c: e000 b.n 8002030 return; // Simple boundary protection - 8001946: bf00 nop + 800202e: bf00 nop } } - 8001948: 3710 adds r7, #16 - 800194a: 46bd mov sp, r7 - 800194c: bd80 pop {r7, pc} - 800194e: bf00 nop - 8001950: 08006304 .word 0x08006304 - 8001954: 20000214 .word 0x20000214 + 8002030: 3710 adds r7, #16 + 8002032: 46bd mov sp, r7 + 8002034: bd80 pop {r7, pc} + 8002036: bf00 nop + 8002038: 08006be8 .word 0x08006be8 + 800203c: 20000210 .word 0x20000210 -08001958 : +08002040 : * @brief Toggles the state of a specific output pin. * @param pin Index of the pin * @retval None */ void digital_outputs_toggle(digital_output_pin_t pin) { - 8001958: b580 push {r7, lr} - 800195a: b084 sub sp, #16 - 800195c: af00 add r7, sp, #0 - 800195e: 4603 mov r3, r0 - 8001960: 71fb strb r3, [r7, #7] + 8002040: b580 push {r7, lr} + 8002042: b084 sub sp, #16 + 8002044: af00 add r7, sp, #0 + 8002046: 4603 mov r3, r0 + 8002048: 71fb strb r3, [r7, #7] if (pin < OUTPUT_PINS_COUNT) { - 8001962: 79fb ldrb r3, [r7, #7] - 8001964: 2b07 cmp r3, #7 - 8001966: d80e bhi.n 8001986 + 800204a: 79fb ldrb r3, [r7, #7] + 800204c: 2b07 cmp r3, #7 + 800204e: d80e bhi.n 800206e // Simple toggle logic using the internal state array uint8_t new_state = !pin_states[pin]; - 8001968: 79fb ldrb r3, [r7, #7] - 800196a: 4a09 ldr r2, [pc, #36] @ (8001990 ) - 800196c: 5cd3 ldrb r3, [r2, r3] - 800196e: 2b00 cmp r3, #0 - 8001970: bf0c ite eq - 8001972: 2301 moveq r3, #1 - 8001974: 2300 movne r3, #0 - 8001976: b2db uxtb r3, r3 - 8001978: 73fb strb r3, [r7, #15] + 8002050: 79fb ldrb r3, [r7, #7] + 8002052: 4a09 ldr r2, [pc, #36] @ (8002078 ) + 8002054: 5cd3 ldrb r3, [r2, r3] + 8002056: 2b00 cmp r3, #0 + 8002058: bf0c ite eq + 800205a: 2301 moveq r3, #1 + 800205c: 2300 movne r3, #0 + 800205e: b2db uxtb r3, r3 + 8002060: 73fb strb r3, [r7, #15] digital_outputs_set_state(pin, new_state); - 800197a: 7bfa ldrb r2, [r7, #15] - 800197c: 79fb ldrb r3, [r7, #7] - 800197e: 4611 mov r1, r2 - 8001980: 4618 mov r0, r3 - 8001982: f7ff ffb1 bl 80018e8 + 8002062: 7bfa ldrb r2, [r7, #15] + 8002064: 79fb ldrb r3, [r7, #7] + 8002066: 4611 mov r1, r2 + 8002068: 4618 mov r0, r3 + 800206a: f7ff ffb1 bl 8001fd0 } } - 8001986: bf00 nop - 8001988: 3710 adds r7, #16 - 800198a: 46bd mov sp, r7 - 800198c: bd80 pop {r7, pc} - 800198e: bf00 nop - 8001990: 20000214 .word 0x20000214 + 800206e: bf00 nop + 8002070: 3710 adds r7, #16 + 8002072: 46bd mov sp, r7 + 8002074: bd80 pop {r7, pc} + 8002076: bf00 nop + 8002078: 20000210 .word 0x20000210 -08001994 : +0800207c : * EXTI * Free pins are configured automatically as Analog (this feature is enabled through * the Code Generation settings) */ void MX_GPIO_Init(void) { - 8001994: b580 push {r7, lr} - 8001996: b088 sub sp, #32 - 8001998: af00 add r7, sp, #0 + 800207c: b580 push {r7, lr} + 800207e: b088 sub sp, #32 + 8002080: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800199a: f107 0310 add.w r3, r7, #16 - 800199e: 2200 movs r2, #0 - 80019a0: 601a str r2, [r3, #0] - 80019a2: 605a str r2, [r3, #4] - 80019a4: 609a str r2, [r3, #8] - 80019a6: 60da str r2, [r3, #12] + 8002082: f107 0310 add.w r3, r7, #16 + 8002086: 2200 movs r2, #0 + 8002088: 601a str r2, [r3, #0] + 800208a: 605a str r2, [r3, #4] + 800208c: 609a str r2, [r3, #8] + 800208e: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); - 80019a8: 4b46 ldr r3, [pc, #280] @ (8001ac4 ) - 80019aa: 699b ldr r3, [r3, #24] - 80019ac: 4a45 ldr r2, [pc, #276] @ (8001ac4 ) - 80019ae: f043 0310 orr.w r3, r3, #16 - 80019b2: 6193 str r3, [r2, #24] - 80019b4: 4b43 ldr r3, [pc, #268] @ (8001ac4 ) - 80019b6: 699b ldr r3, [r3, #24] - 80019b8: f003 0310 and.w r3, r3, #16 - 80019bc: 60fb str r3, [r7, #12] - 80019be: 68fb ldr r3, [r7, #12] + 8002090: 4b46 ldr r3, [pc, #280] @ (80021ac ) + 8002092: 699b ldr r3, [r3, #24] + 8002094: 4a45 ldr r2, [pc, #276] @ (80021ac ) + 8002096: f043 0310 orr.w r3, r3, #16 + 800209a: 6193 str r3, [r2, #24] + 800209c: 4b43 ldr r3, [pc, #268] @ (80021ac ) + 800209e: 699b ldr r3, [r3, #24] + 80020a0: f003 0310 and.w r3, r3, #16 + 80020a4: 60fb str r3, [r7, #12] + 80020a6: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOD_CLK_ENABLE(); - 80019c0: 4b40 ldr r3, [pc, #256] @ (8001ac4 ) - 80019c2: 699b ldr r3, [r3, #24] - 80019c4: 4a3f ldr r2, [pc, #252] @ (8001ac4 ) - 80019c6: f043 0320 orr.w r3, r3, #32 - 80019ca: 6193 str r3, [r2, #24] - 80019cc: 4b3d ldr r3, [pc, #244] @ (8001ac4 ) - 80019ce: 699b ldr r3, [r3, #24] - 80019d0: f003 0320 and.w r3, r3, #32 - 80019d4: 60bb str r3, [r7, #8] - 80019d6: 68bb ldr r3, [r7, #8] + 80020a8: 4b40 ldr r3, [pc, #256] @ (80021ac ) + 80020aa: 699b ldr r3, [r3, #24] + 80020ac: 4a3f ldr r2, [pc, #252] @ (80021ac ) + 80020ae: f043 0320 orr.w r3, r3, #32 + 80020b2: 6193 str r3, [r2, #24] + 80020b4: 4b3d ldr r3, [pc, #244] @ (80021ac ) + 80020b6: 699b ldr r3, [r3, #24] + 80020b8: f003 0320 and.w r3, r3, #32 + 80020bc: 60bb str r3, [r7, #8] + 80020be: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80019d8: 4b3a ldr r3, [pc, #232] @ (8001ac4 ) - 80019da: 699b ldr r3, [r3, #24] - 80019dc: 4a39 ldr r2, [pc, #228] @ (8001ac4 ) - 80019de: f043 0304 orr.w r3, r3, #4 - 80019e2: 6193 str r3, [r2, #24] - 80019e4: 4b37 ldr r3, [pc, #220] @ (8001ac4 ) - 80019e6: 699b ldr r3, [r3, #24] - 80019e8: f003 0304 and.w r3, r3, #4 - 80019ec: 607b str r3, [r7, #4] - 80019ee: 687b ldr r3, [r7, #4] + 80020c0: 4b3a ldr r3, [pc, #232] @ (80021ac ) + 80020c2: 699b ldr r3, [r3, #24] + 80020c4: 4a39 ldr r2, [pc, #228] @ (80021ac ) + 80020c6: f043 0304 orr.w r3, r3, #4 + 80020ca: 6193 str r3, [r2, #24] + 80020cc: 4b37 ldr r3, [pc, #220] @ (80021ac ) + 80020ce: 699b ldr r3, [r3, #24] + 80020d0: f003 0304 and.w r3, r3, #4 + 80020d4: 607b str r3, [r7, #4] + 80020d6: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); - 80019f0: 4b34 ldr r3, [pc, #208] @ (8001ac4 ) - 80019f2: 699b ldr r3, [r3, #24] - 80019f4: 4a33 ldr r2, [pc, #204] @ (8001ac4 ) - 80019f6: f043 0308 orr.w r3, r3, #8 - 80019fa: 6193 str r3, [r2, #24] - 80019fc: 4b31 ldr r3, [pc, #196] @ (8001ac4 ) - 80019fe: 699b ldr r3, [r3, #24] - 8001a00: f003 0308 and.w r3, r3, #8 - 8001a04: 603b str r3, [r7, #0] - 8001a06: 683b ldr r3, [r7, #0] + 80020d8: 4b34 ldr r3, [pc, #208] @ (80021ac ) + 80020da: 699b ldr r3, [r3, #24] + 80020dc: 4a33 ldr r2, [pc, #204] @ (80021ac ) + 80020de: f043 0308 orr.w r3, r3, #8 + 80020e2: 6193 str r3, [r2, #24] + 80020e4: 4b31 ldr r3, [pc, #196] @ (80021ac ) + 80020e6: 699b ldr r3, [r3, #24] + 80020e8: f003 0308 and.w r3, r3, #8 + 80020ec: 603b str r3, [r7, #0] + 80020ee: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, DIGI_OUT5_Pin|DIGI_OUT6_Pin|DIGI_OUT7_Pin, GPIO_PIN_RESET); - 8001a08: 2200 movs r2, #0 - 8001a0a: f44f 4160 mov.w r1, #57344 @ 0xe000 - 8001a0e: 482e ldr r0, [pc, #184] @ (8001ac8 ) - 8001a10: f001 fc11 bl 8003236 + 80020f0: 2200 movs r2, #0 + 80020f2: f44f 4160 mov.w r1, #57344 @ 0xe000 + 80020f6: 482e ldr r0, [pc, #184] @ (80021b0 ) + 80020f8: f001 fd47 bl 8003b8a /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, DIGI_OUT0_Pin|DIGI_OUT1_Pin|DIGI_OUT2_Pin|LED_Red_Pin - 8001a14: 2200 movs r2, #0 - 8001a16: f240 3137 movw r1, #823 @ 0x337 - 8001a1a: 482c ldr r0, [pc, #176] @ (8001acc ) - 8001a1c: f001 fc0b bl 8003236 + 80020fc: 2200 movs r2, #0 + 80020fe: f240 3137 movw r1, #823 @ 0x337 + 8002102: 482c ldr r0, [pc, #176] @ (80021b4 ) + 8002104: f001 fd41 bl 8003b8a |LED_Green_Pin|DIGI_OUT3_Pin|DIGI_OUT4_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(TX_EN_RS485_GPIO_Port, TX_EN_RS485_Pin, GPIO_PIN_RESET); - 8001a20: 2200 movs r2, #0 - 8001a22: f44f 5180 mov.w r1, #4096 @ 0x1000 - 8001a26: 482a ldr r0, [pc, #168] @ (8001ad0 ) - 8001a28: f001 fc05 bl 8003236 + 8002108: 2200 movs r2, #0 + 800210a: f44f 5180 mov.w r1, #4096 @ 0x1000 + 800210e: 482a ldr r0, [pc, #168] @ (80021b8 ) + 8002110: f001 fd3b bl 8003b8a /*Configure GPIO pins : DIGI_OUT5_Pin DIGI_OUT6_Pin DIGI_OUT7_Pin */ GPIO_InitStruct.Pin = DIGI_OUT5_Pin|DIGI_OUT6_Pin|DIGI_OUT7_Pin; - 8001a2c: f44f 4360 mov.w r3, #57344 @ 0xe000 - 8001a30: 613b str r3, [r7, #16] + 8002114: f44f 4360 mov.w r3, #57344 @ 0xe000 + 8002118: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 8001a32: 2311 movs r3, #17 - 8001a34: 617b str r3, [r7, #20] + 800211a: 2311 movs r3, #17 + 800211c: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001a36: 2300 movs r3, #0 - 8001a38: 61bb str r3, [r7, #24] + 800211e: 2300 movs r3, #0 + 8002120: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001a3a: 2302 movs r3, #2 - 8001a3c: 61fb str r3, [r7, #28] + 8002122: 2302 movs r3, #2 + 8002124: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8001a3e: f107 0310 add.w r3, r7, #16 - 8001a42: 4619 mov r1, r3 - 8001a44: 4820 ldr r0, [pc, #128] @ (8001ac8 ) - 8001a46: f001 fa5b bl 8002f00 + 8002126: f107 0310 add.w r3, r7, #16 + 800212a: 4619 mov r1, r3 + 800212c: 4820 ldr r0, [pc, #128] @ (80021b0 ) + 800212e: f001 fb91 bl 8003854 /*Configure GPIO pins : RS485_Addr0_Pin RS485_Addr1_Pin RS485_Addr2_Pin RS485_Addr3_Pin SYS_CFG0_Pin SYS_CFG1_Pin PG_RS485_Pin PG_CE_Pin PG_PH_Pin */ GPIO_InitStruct.Pin = RS485_Addr0_Pin|RS485_Addr1_Pin|RS485_Addr2_Pin|RS485_Addr3_Pin - 8001a4a: f648 13fc movw r3, #35324 @ 0x89fc - 8001a4e: 613b str r3, [r7, #16] + 8002132: f648 13fc movw r3, #35324 @ 0x89fc + 8002136: 613b str r3, [r7, #16] |SYS_CFG0_Pin|SYS_CFG1_Pin|PG_RS485_Pin|PG_CE_Pin |PG_PH_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8001a50: 2300 movs r3, #0 - 8001a52: 617b str r3, [r7, #20] + 8002138: 2300 movs r3, #0 + 800213a: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8001a54: 2301 movs r3, #1 - 8001a56: 61bb str r3, [r7, #24] + 800213c: 2301 movs r3, #1 + 800213e: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001a58: f107 0310 add.w r3, r7, #16 - 8001a5c: 4619 mov r1, r3 - 8001a5e: 481c ldr r0, [pc, #112] @ (8001ad0 ) - 8001a60: f001 fa4e bl 8002f00 + 8002140: f107 0310 add.w r3, r7, #16 + 8002144: 4619 mov r1, r3 + 8002146: 481c ldr r0, [pc, #112] @ (80021b8 ) + 8002148: f001 fb84 bl 8003854 /*Configure GPIO pins : DIGI_OUT0_Pin DIGI_OUT1_Pin DIGI_OUT2_Pin LED_Red_Pin LED_Green_Pin DIGI_OUT3_Pin DIGI_OUT4_Pin */ GPIO_InitStruct.Pin = DIGI_OUT0_Pin|DIGI_OUT1_Pin|DIGI_OUT2_Pin|LED_Red_Pin - 8001a64: f240 3337 movw r3, #823 @ 0x337 - 8001a68: 613b str r3, [r7, #16] + 800214c: f240 3337 movw r3, #823 @ 0x337 + 8002150: 613b str r3, [r7, #16] |LED_Green_Pin|DIGI_OUT3_Pin|DIGI_OUT4_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 8001a6a: 2311 movs r3, #17 - 8001a6c: 617b str r3, [r7, #20] + 8002152: 2311 movs r3, #17 + 8002154: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001a6e: 2300 movs r3, #0 - 8001a70: 61bb str r3, [r7, #24] + 8002156: 2300 movs r3, #0 + 8002158: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001a72: 2302 movs r3, #2 - 8001a74: 61fb str r3, [r7, #28] + 800215a: 2302 movs r3, #2 + 800215c: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001a76: f107 0310 add.w r3, r7, #16 - 8001a7a: 4619 mov r1, r3 - 8001a7c: 4813 ldr r0, [pc, #76] @ (8001acc ) - 8001a7e: f001 fa3f bl 8002f00 + 800215e: f107 0310 add.w r3, r7, #16 + 8002162: 4619 mov r1, r3 + 8002164: 4813 ldr r0, [pc, #76] @ (80021b4 ) + 8002166: f001 fb75 bl 8003854 /*Configure GPIO pins : RS485_Addr4_Pin RS485_Addr5_Pin RS485_Addr6_Pin RS485_Addr7_Pin Calib_PH_Pin */ GPIO_InitStruct.Pin = RS485_Addr4_Pin|RS485_Addr5_Pin|RS485_Addr6_Pin|RS485_Addr7_Pin - 8001a82: f24f 0308 movw r3, #61448 @ 0xf008 - 8001a86: 613b str r3, [r7, #16] + 800216a: f24f 0308 movw r3, #61448 @ 0xf008 + 800216e: 613b str r3, [r7, #16] |Calib_PH_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8001a88: 2300 movs r3, #0 - 8001a8a: 617b str r3, [r7, #20] + 8002170: 2300 movs r3, #0 + 8002172: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8001a8c: 2301 movs r3, #1 - 8001a8e: 61bb str r3, [r7, #24] + 8002174: 2301 movs r3, #1 + 8002176: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001a90: f107 0310 add.w r3, r7, #16 - 8001a94: 4619 mov r1, r3 - 8001a96: 480d ldr r0, [pc, #52] @ (8001acc ) - 8001a98: f001 fa32 bl 8002f00 + 8002178: f107 0310 add.w r3, r7, #16 + 800217c: 4619 mov r1, r3 + 800217e: 480d ldr r0, [pc, #52] @ (80021b4 ) + 8002180: f001 fb68 bl 8003854 /*Configure GPIO pin : TX_EN_RS485_Pin */ GPIO_InitStruct.Pin = TX_EN_RS485_Pin; - 8001a9c: f44f 5380 mov.w r3, #4096 @ 0x1000 - 8001aa0: 613b str r3, [r7, #16] + 8002184: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8002188: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8001aa2: 2301 movs r3, #1 - 8001aa4: 617b str r3, [r7, #20] + 800218a: 2301 movs r3, #1 + 800218c: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001aa6: 2300 movs r3, #0 - 8001aa8: 61bb str r3, [r7, #24] + 800218e: 2300 movs r3, #0 + 8002190: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001aaa: 2302 movs r3, #2 - 8001aac: 61fb str r3, [r7, #28] + 8002192: 2302 movs r3, #2 + 8002194: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_EN_RS485_GPIO_Port, &GPIO_InitStruct); - 8001aae: f107 0310 add.w r3, r7, #16 - 8001ab2: 4619 mov r1, r3 - 8001ab4: 4806 ldr r0, [pc, #24] @ (8001ad0 ) - 8001ab6: f001 fa23 bl 8002f00 + 8002196: f107 0310 add.w r3, r7, #16 + 800219a: 4619 mov r1, r3 + 800219c: 4806 ldr r0, [pc, #24] @ (80021b8 ) + 800219e: f001 fb59 bl 8003854 } - 8001aba: bf00 nop - 8001abc: 3720 adds r7, #32 - 8001abe: 46bd mov sp, r7 - 8001ac0: bd80 pop {r7, pc} - 8001ac2: bf00 nop - 8001ac4: 40021000 .word 0x40021000 - 8001ac8: 40011000 .word 0x40011000 - 8001acc: 40010c00 .word 0x40010c00 - 8001ad0: 40010800 .word 0x40010800 + 80021a2: bf00 nop + 80021a4: 3720 adds r7, #32 + 80021a6: 46bd mov sp, r7 + 80021a8: bd80 pop {r7, pc} + 80021aa: bf00 nop + 80021ac: 40021000 .word 0x40021000 + 80021b0: 40011000 .word 0x40011000 + 80021b4: 40010c00 .word 0x40010c00 + 80021b8: 40010800 .word 0x40010800 -08001ad4 : +080021bc : I2C_HandleTypeDef hi2c1; I2C_HandleTypeDef hi2c2; /* I2C1 init function */ void MX_I2C1_Init(void) { - 8001ad4: b580 push {r7, lr} - 8001ad6: af00 add r7, sp, #0 + 80021bc: b580 push {r7, lr} + 80021be: af00 add r7, sp, #0 /* USER CODE END I2C1_Init 0 */ /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ hi2c1.Instance = I2C1; - 8001ad8: 4b12 ldr r3, [pc, #72] @ (8001b24 ) - 8001ada: 4a13 ldr r2, [pc, #76] @ (8001b28 ) - 8001adc: 601a str r2, [r3, #0] + 80021c0: 4b12 ldr r3, [pc, #72] @ (800220c ) + 80021c2: 4a13 ldr r2, [pc, #76] @ (8002210 ) + 80021c4: 601a str r2, [r3, #0] hi2c1.Init.ClockSpeed = 100000; - 8001ade: 4b11 ldr r3, [pc, #68] @ (8001b24 ) - 8001ae0: 4a12 ldr r2, [pc, #72] @ (8001b2c ) - 8001ae2: 605a str r2, [r3, #4] + 80021c6: 4b11 ldr r3, [pc, #68] @ (800220c ) + 80021c8: 4a12 ldr r2, [pc, #72] @ (8002214 ) + 80021ca: 605a str r2, [r3, #4] hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2; - 8001ae4: 4b0f ldr r3, [pc, #60] @ (8001b24 ) - 8001ae6: 2200 movs r2, #0 - 8001ae8: 609a str r2, [r3, #8] + 80021cc: 4b0f ldr r3, [pc, #60] @ (800220c ) + 80021ce: 2200 movs r2, #0 + 80021d0: 609a str r2, [r3, #8] hi2c1.Init.OwnAddress1 = 0; - 8001aea: 4b0e ldr r3, [pc, #56] @ (8001b24 ) - 8001aec: 2200 movs r2, #0 - 8001aee: 60da str r2, [r3, #12] + 80021d2: 4b0e ldr r3, [pc, #56] @ (800220c ) + 80021d4: 2200 movs r2, #0 + 80021d6: 60da str r2, [r3, #12] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 8001af0: 4b0c ldr r3, [pc, #48] @ (8001b24 ) - 8001af2: f44f 4280 mov.w r2, #16384 @ 0x4000 - 8001af6: 611a str r2, [r3, #16] + 80021d8: 4b0c ldr r3, [pc, #48] @ (800220c ) + 80021da: f44f 4280 mov.w r2, #16384 @ 0x4000 + 80021de: 611a str r2, [r3, #16] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 8001af8: 4b0a ldr r3, [pc, #40] @ (8001b24 ) - 8001afa: 2200 movs r2, #0 - 8001afc: 615a str r2, [r3, #20] + 80021e0: 4b0a ldr r3, [pc, #40] @ (800220c ) + 80021e2: 2200 movs r2, #0 + 80021e4: 615a str r2, [r3, #20] hi2c1.Init.OwnAddress2 = 0; - 8001afe: 4b09 ldr r3, [pc, #36] @ (8001b24 ) - 8001b00: 2200 movs r2, #0 - 8001b02: 619a str r2, [r3, #24] + 80021e6: 4b09 ldr r3, [pc, #36] @ (800220c ) + 80021e8: 2200 movs r2, #0 + 80021ea: 619a str r2, [r3, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 8001b04: 4b07 ldr r3, [pc, #28] @ (8001b24 ) - 8001b06: 2200 movs r2, #0 - 8001b08: 61da str r2, [r3, #28] + 80021ec: 4b07 ldr r3, [pc, #28] @ (800220c ) + 80021ee: 2200 movs r2, #0 + 80021f0: 61da str r2, [r3, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 8001b0a: 4b06 ldr r3, [pc, #24] @ (8001b24 ) - 8001b0c: 2200 movs r2, #0 - 8001b0e: 621a str r2, [r3, #32] + 80021f2: 4b06 ldr r3, [pc, #24] @ (800220c ) + 80021f4: 2200 movs r2, #0 + 80021f6: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) - 8001b10: 4804 ldr r0, [pc, #16] @ (8001b24 ) - 8001b12: f001 fbc1 bl 8003298 - 8001b16: 4603 mov r3, r0 - 8001b18: 2b00 cmp r3, #0 - 8001b1a: d001 beq.n 8001b20 + 80021f8: 4804 ldr r0, [pc, #16] @ (800220c ) + 80021fa: f001 fcf7 bl 8003bec + 80021fe: 4603 mov r3, r0 + 8002200: 2b00 cmp r3, #0 + 8002202: d001 beq.n 8002208 { Error_Handler(); - 8001b1c: f000 fb32 bl 8002184 + 8002204: f000 fc44 bl 8002a90 } /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } - 8001b20: bf00 nop - 8001b22: bd80 pop {r7, pc} - 8001b24: 2000021c .word 0x2000021c - 8001b28: 40005400 .word 0x40005400 - 8001b2c: 000186a0 .word 0x000186a0 + 8002208: bf00 nop + 800220a: bd80 pop {r7, pc} + 800220c: 20000218 .word 0x20000218 + 8002210: 40005400 .word 0x40005400 + 8002214: 000186a0 .word 0x000186a0 -08001b30 : +08002218 : /* I2C2 init function */ void MX_I2C2_Init(void) { - 8001b30: b580 push {r7, lr} - 8001b32: af00 add r7, sp, #0 + 8002218: b580 push {r7, lr} + 800221a: af00 add r7, sp, #0 /* USER CODE END I2C2_Init 0 */ /* USER CODE BEGIN I2C2_Init 1 */ /* USER CODE END I2C2_Init 1 */ hi2c2.Instance = I2C2; - 8001b34: 4b12 ldr r3, [pc, #72] @ (8001b80 ) - 8001b36: 4a13 ldr r2, [pc, #76] @ (8001b84 ) - 8001b38: 601a str r2, [r3, #0] + 800221c: 4b12 ldr r3, [pc, #72] @ (8002268 ) + 800221e: 4a13 ldr r2, [pc, #76] @ (800226c ) + 8002220: 601a str r2, [r3, #0] hi2c2.Init.ClockSpeed = 100000; - 8001b3a: 4b11 ldr r3, [pc, #68] @ (8001b80 ) - 8001b3c: 4a12 ldr r2, [pc, #72] @ (8001b88 ) - 8001b3e: 605a str r2, [r3, #4] + 8002222: 4b11 ldr r3, [pc, #68] @ (8002268 ) + 8002224: 4a12 ldr r2, [pc, #72] @ (8002270 ) + 8002226: 605a str r2, [r3, #4] hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; - 8001b40: 4b0f ldr r3, [pc, #60] @ (8001b80 ) - 8001b42: 2200 movs r2, #0 - 8001b44: 609a str r2, [r3, #8] + 8002228: 4b0f ldr r3, [pc, #60] @ (8002268 ) + 800222a: 2200 movs r2, #0 + 800222c: 609a str r2, [r3, #8] hi2c2.Init.OwnAddress1 = 0; - 8001b46: 4b0e ldr r3, [pc, #56] @ (8001b80 ) - 8001b48: 2200 movs r2, #0 - 8001b4a: 60da str r2, [r3, #12] + 800222e: 4b0e ldr r3, [pc, #56] @ (8002268 ) + 8002230: 2200 movs r2, #0 + 8002232: 60da str r2, [r3, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 8001b4c: 4b0c ldr r3, [pc, #48] @ (8001b80 ) - 8001b4e: f44f 4280 mov.w r2, #16384 @ 0x4000 - 8001b52: 611a str r2, [r3, #16] + 8002234: 4b0c ldr r3, [pc, #48] @ (8002268 ) + 8002236: f44f 4280 mov.w r2, #16384 @ 0x4000 + 800223a: 611a str r2, [r3, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 8001b54: 4b0a ldr r3, [pc, #40] @ (8001b80 ) - 8001b56: 2200 movs r2, #0 - 8001b58: 615a str r2, [r3, #20] + 800223c: 4b0a ldr r3, [pc, #40] @ (8002268 ) + 800223e: 2200 movs r2, #0 + 8002240: 615a str r2, [r3, #20] hi2c2.Init.OwnAddress2 = 0; - 8001b5a: 4b09 ldr r3, [pc, #36] @ (8001b80 ) - 8001b5c: 2200 movs r2, #0 - 8001b5e: 619a str r2, [r3, #24] + 8002242: 4b09 ldr r3, [pc, #36] @ (8002268 ) + 8002244: 2200 movs r2, #0 + 8002246: 619a str r2, [r3, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 8001b60: 4b07 ldr r3, [pc, #28] @ (8001b80 ) - 8001b62: 2200 movs r2, #0 - 8001b64: 61da str r2, [r3, #28] + 8002248: 4b07 ldr r3, [pc, #28] @ (8002268 ) + 800224a: 2200 movs r2, #0 + 800224c: 61da str r2, [r3, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 8001b66: 4b06 ldr r3, [pc, #24] @ (8001b80 ) - 8001b68: 2200 movs r2, #0 - 8001b6a: 621a str r2, [r3, #32] + 800224e: 4b06 ldr r3, [pc, #24] @ (8002268 ) + 8002250: 2200 movs r2, #0 + 8002252: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) - 8001b6c: 4804 ldr r0, [pc, #16] @ (8001b80 ) - 8001b6e: f001 fb93 bl 8003298 - 8001b72: 4603 mov r3, r0 - 8001b74: 2b00 cmp r3, #0 - 8001b76: d001 beq.n 8001b7c + 8002254: 4804 ldr r0, [pc, #16] @ (8002268 ) + 8002256: f001 fcc9 bl 8003bec + 800225a: 4603 mov r3, r0 + 800225c: 2b00 cmp r3, #0 + 800225e: d001 beq.n 8002264 { Error_Handler(); - 8001b78: f000 fb04 bl 8002184 + 8002260: f000 fc16 bl 8002a90 } /* USER CODE BEGIN I2C2_Init 2 */ /* USER CODE END I2C2_Init 2 */ } - 8001b7c: bf00 nop - 8001b7e: bd80 pop {r7, pc} - 8001b80: 20000270 .word 0x20000270 - 8001b84: 40005800 .word 0x40005800 - 8001b88: 000186a0 .word 0x000186a0 + 8002264: bf00 nop + 8002266: bd80 pop {r7, pc} + 8002268: 2000026c .word 0x2000026c + 800226c: 40005800 .word 0x40005800 + 8002270: 000186a0 .word 0x000186a0 -08001b8c : +08002274 : void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) { - 8001b8c: b580 push {r7, lr} - 8001b8e: b08a sub sp, #40 @ 0x28 - 8001b90: af00 add r7, sp, #0 - 8001b92: 6078 str r0, [r7, #4] + 8002274: b580 push {r7, lr} + 8002276: b08a sub sp, #40 @ 0x28 + 8002278: af00 add r7, sp, #0 + 800227a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001b94: f107 0318 add.w r3, r7, #24 - 8001b98: 2200 movs r2, #0 - 8001b9a: 601a str r2, [r3, #0] - 8001b9c: 605a str r2, [r3, #4] - 8001b9e: 609a str r2, [r3, #8] - 8001ba0: 60da str r2, [r3, #12] + 800227c: f107 0318 add.w r3, r7, #24 + 8002280: 2200 movs r2, #0 + 8002282: 601a str r2, [r3, #0] + 8002284: 605a str r2, [r3, #4] + 8002286: 609a str r2, [r3, #8] + 8002288: 60da str r2, [r3, #12] if(i2cHandle->Instance==I2C1) - 8001ba2: 687b ldr r3, [r7, #4] - 8001ba4: 681b ldr r3, [r3, #0] - 8001ba6: 4a2b ldr r2, [pc, #172] @ (8001c54 ) - 8001ba8: 4293 cmp r3, r2 - 8001baa: d124 bne.n 8001bf6 + 800228a: 687b ldr r3, [r7, #4] + 800228c: 681b ldr r3, [r3, #0] + 800228e: 4a2b ldr r2, [pc, #172] @ (800233c ) + 8002290: 4293 cmp r3, r2 + 8002292: d124 bne.n 80022de { /* USER CODE BEGIN I2C1_MspInit 0 */ /* USER CODE END I2C1_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); - 8001bac: 4b2a ldr r3, [pc, #168] @ (8001c58 ) - 8001bae: 699b ldr r3, [r3, #24] - 8001bb0: 4a29 ldr r2, [pc, #164] @ (8001c58 ) - 8001bb2: f043 0308 orr.w r3, r3, #8 - 8001bb6: 6193 str r3, [r2, #24] - 8001bb8: 4b27 ldr r3, [pc, #156] @ (8001c58 ) - 8001bba: 699b ldr r3, [r3, #24] - 8001bbc: f003 0308 and.w r3, r3, #8 - 8001bc0: 617b str r3, [r7, #20] - 8001bc2: 697b ldr r3, [r7, #20] + 8002294: 4b2a ldr r3, [pc, #168] @ (8002340 ) + 8002296: 699b ldr r3, [r3, #24] + 8002298: 4a29 ldr r2, [pc, #164] @ (8002340 ) + 800229a: f043 0308 orr.w r3, r3, #8 + 800229e: 6193 str r3, [r2, #24] + 80022a0: 4b27 ldr r3, [pc, #156] @ (8002340 ) + 80022a2: 699b ldr r3, [r3, #24] + 80022a4: f003 0308 and.w r3, r3, #8 + 80022a8: 617b str r3, [r7, #20] + 80022aa: 697b ldr r3, [r7, #20] /**I2C1 GPIO Configuration PB6 ------> I2C1_SCL PB7 ------> I2C1_SDA */ GPIO_InitStruct.Pin = I2C1_SCL_PH_Pin|I2C1_SDA_PH_Pin; - 8001bc4: 23c0 movs r3, #192 @ 0xc0 - 8001bc6: 61bb str r3, [r7, #24] + 80022ac: 23c0 movs r3, #192 @ 0xc0 + 80022ae: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 8001bc8: 2312 movs r3, #18 - 8001bca: 61fb str r3, [r7, #28] + 80022b0: 2312 movs r3, #18 + 80022b2: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001bcc: 2302 movs r3, #2 - 8001bce: 627b str r3, [r7, #36] @ 0x24 + 80022b4: 2302 movs r3, #2 + 80022b6: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001bd0: f107 0318 add.w r3, r7, #24 - 8001bd4: 4619 mov r1, r3 - 8001bd6: 4821 ldr r0, [pc, #132] @ (8001c5c ) - 8001bd8: f001 f992 bl 8002f00 + 80022b8: f107 0318 add.w r3, r7, #24 + 80022bc: 4619 mov r1, r3 + 80022be: 4821 ldr r0, [pc, #132] @ (8002344 ) + 80022c0: f001 fac8 bl 8003854 /* I2C1 clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); - 8001bdc: 4b1e ldr r3, [pc, #120] @ (8001c58 ) - 8001bde: 69db ldr r3, [r3, #28] - 8001be0: 4a1d ldr r2, [pc, #116] @ (8001c58 ) - 8001be2: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 - 8001be6: 61d3 str r3, [r2, #28] - 8001be8: 4b1b ldr r3, [pc, #108] @ (8001c58 ) - 8001bea: 69db ldr r3, [r3, #28] - 8001bec: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 8001bf0: 613b str r3, [r7, #16] - 8001bf2: 693b ldr r3, [r7, #16] + 80022c4: 4b1e ldr r3, [pc, #120] @ (8002340 ) + 80022c6: 69db ldr r3, [r3, #28] + 80022c8: 4a1d ldr r2, [pc, #116] @ (8002340 ) + 80022ca: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 + 80022ce: 61d3 str r3, [r2, #28] + 80022d0: 4b1b ldr r3, [pc, #108] @ (8002340 ) + 80022d2: 69db ldr r3, [r3, #28] + 80022d4: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 80022d8: 613b str r3, [r7, #16] + 80022da: 693b ldr r3, [r7, #16] __HAL_RCC_I2C2_CLK_ENABLE(); /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } - 8001bf4: e029 b.n 8001c4a + 80022dc: e029 b.n 8002332 else if(i2cHandle->Instance==I2C2) - 8001bf6: 687b ldr r3, [r7, #4] - 8001bf8: 681b ldr r3, [r3, #0] - 8001bfa: 4a19 ldr r2, [pc, #100] @ (8001c60 ) - 8001bfc: 4293 cmp r3, r2 - 8001bfe: d124 bne.n 8001c4a + 80022de: 687b ldr r3, [r7, #4] + 80022e0: 681b ldr r3, [r3, #0] + 80022e2: 4a19 ldr r2, [pc, #100] @ (8002348 ) + 80022e4: 4293 cmp r3, r2 + 80022e6: d124 bne.n 8002332 __HAL_RCC_GPIOB_CLK_ENABLE(); - 8001c00: 4b15 ldr r3, [pc, #84] @ (8001c58 ) - 8001c02: 699b ldr r3, [r3, #24] - 8001c04: 4a14 ldr r2, [pc, #80] @ (8001c58 ) - 8001c06: f043 0308 orr.w r3, r3, #8 - 8001c0a: 6193 str r3, [r2, #24] - 8001c0c: 4b12 ldr r3, [pc, #72] @ (8001c58 ) - 8001c0e: 699b ldr r3, [r3, #24] - 8001c10: f003 0308 and.w r3, r3, #8 - 8001c14: 60fb str r3, [r7, #12] - 8001c16: 68fb ldr r3, [r7, #12] + 80022e8: 4b15 ldr r3, [pc, #84] @ (8002340 ) + 80022ea: 699b ldr r3, [r3, #24] + 80022ec: 4a14 ldr r2, [pc, #80] @ (8002340 ) + 80022ee: f043 0308 orr.w r3, r3, #8 + 80022f2: 6193 str r3, [r2, #24] + 80022f4: 4b12 ldr r3, [pc, #72] @ (8002340 ) + 80022f6: 699b ldr r3, [r3, #24] + 80022f8: f003 0308 and.w r3, r3, #8 + 80022fc: 60fb str r3, [r7, #12] + 80022fe: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = I2C2_SCL_CE_Pin|I2C2_SDA_CE_Pin; - 8001c18: f44f 6340 mov.w r3, #3072 @ 0xc00 - 8001c1c: 61bb str r3, [r7, #24] + 8002300: f44f 6340 mov.w r3, #3072 @ 0xc00 + 8002304: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 8001c1e: 2312 movs r3, #18 - 8001c20: 61fb str r3, [r7, #28] + 8002306: 2312 movs r3, #18 + 8002308: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001c22: 2302 movs r3, #2 - 8001c24: 627b str r3, [r7, #36] @ 0x24 + 800230a: 2302 movs r3, #2 + 800230c: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001c26: f107 0318 add.w r3, r7, #24 - 8001c2a: 4619 mov r1, r3 - 8001c2c: 480b ldr r0, [pc, #44] @ (8001c5c ) - 8001c2e: f001 f967 bl 8002f00 + 800230e: f107 0318 add.w r3, r7, #24 + 8002312: 4619 mov r1, r3 + 8002314: 480b ldr r0, [pc, #44] @ (8002344 ) + 8002316: f001 fa9d bl 8003854 __HAL_RCC_I2C2_CLK_ENABLE(); - 8001c32: 4b09 ldr r3, [pc, #36] @ (8001c58 ) - 8001c34: 69db ldr r3, [r3, #28] - 8001c36: 4a08 ldr r2, [pc, #32] @ (8001c58 ) - 8001c38: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 - 8001c3c: 61d3 str r3, [r2, #28] - 8001c3e: 4b06 ldr r3, [pc, #24] @ (8001c58 ) - 8001c40: 69db ldr r3, [r3, #28] - 8001c42: f403 0380 and.w r3, r3, #4194304 @ 0x400000 - 8001c46: 60bb str r3, [r7, #8] - 8001c48: 68bb ldr r3, [r7, #8] + 800231a: 4b09 ldr r3, [pc, #36] @ (8002340 ) + 800231c: 69db ldr r3, [r3, #28] + 800231e: 4a08 ldr r2, [pc, #32] @ (8002340 ) + 8002320: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 + 8002324: 61d3 str r3, [r2, #28] + 8002326: 4b06 ldr r3, [pc, #24] @ (8002340 ) + 8002328: 69db ldr r3, [r3, #28] + 800232a: f403 0380 and.w r3, r3, #4194304 @ 0x400000 + 800232e: 60bb str r3, [r7, #8] + 8002330: 68bb ldr r3, [r7, #8] } - 8001c4a: bf00 nop - 8001c4c: 3728 adds r7, #40 @ 0x28 - 8001c4e: 46bd mov sp, r7 - 8001c50: bd80 pop {r7, pc} - 8001c52: bf00 nop - 8001c54: 40005400 .word 0x40005400 - 8001c58: 40021000 .word 0x40021000 - 8001c5c: 40010c00 .word 0x40010c00 - 8001c60: 40005800 .word 0x40005800 + 8002332: bf00 nop + 8002334: 3728 adds r7, #40 @ 0x28 + 8002336: 46bd mov sp, r7 + 8002338: bd80 pop {r7, pc} + 800233a: bf00 nop + 800233c: 40005400 .word 0x40005400 + 8002340: 40021000 .word 0x40021000 + 8002344: 40010c00 .word 0x40010c00 + 8002348: 40005800 .word 0x40005800 -08001c64
: +0800234c
: /** * @brief The application entry point. * @retval int */ int main(void) { - 8001c64: b580 push {r7, lr} - 8001c66: b08c sub sp, #48 @ 0x30 - 8001c68: af00 add r7, sp, #0 + 800234c: b5b0 push {r4, r5, r7, lr} + 800234e: b08e sub sp, #56 @ 0x38 + 8002350: af00 add r7, sp, #0 /* USER CODE BEGIN 1 */ uint8_t tempString[15] = {0}; - 8001c6a: f107 0308 add.w r3, r7, #8 - 8001c6e: 2200 movs r2, #0 - 8001c70: 601a str r2, [r3, #0] - 8001c72: 605a str r2, [r3, #4] - 8001c74: 609a str r2, [r3, #8] - 8001c76: f8c3 200b str.w r2, [r3, #11] + 8002352: f107 0308 add.w r3, r7, #8 + 8002356: 2200 movs r2, #0 + 8002358: 601a str r2, [r3, #0] + 800235a: 605a str r2, [r3, #4] + 800235c: 609a str r2, [r3, #8] + 800235e: f8c3 200b str.w r2, [r3, #11] uint8_t averages = 0; - 8001c7a: 2300 movs r3, #0 - 8001c7c: f887 302f strb.w r3, [r7, #47] @ 0x2f + 8002362: 2300 movs r3, #0 + 8002364: f887 3033 strb.w r3, [r7, #51] @ 0x33 uint8_t newline = '\n'; - 8001c80: 230a movs r3, #10 - 8001c82: 71fb strb r3, [r7, #7] + 8002368: 230a movs r3, #10 + 800236a: 71fb strb r3, [r7, #7] // Variables for timing uint32_t previous_millis_green = 0; - 8001c84: 2300 movs r3, #0 - 8001c86: 62bb str r3, [r7, #40] @ 0x28 + 800236c: 2300 movs r3, #0 + 800236e: 637b str r3, [r7, #52] @ 0x34 uint32_t previous_millis_red = 0; - 8001c88: 2300 movs r3, #0 - 8001c8a: 627b str r3, [r7, #36] @ 0x24 + 8002370: 2300 movs r3, #0 + 8002372: 62fb str r3, [r7, #44] @ 0x2c /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 8001c8c: f000 fd04 bl 8002698 + 8002374: f000 fe16 bl 8002fa4 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 8001c90: f000 f944 bl 8001f1c + 8002378: f000 f942 bl 8002600 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 8001c94: f7ff fe7e bl 8001994 + 800237c: f7ff fe7e bl 800207c MX_ADC1_Init(); - 8001c98: f7ff fa66 bl 8001168 + 8002380: f7ff fa66 bl 8001850 MX_ADC2_Init(); - 8001c9c: f7ff faa2 bl 80011e4 + 8002384: f7ff faa2 bl 80018cc MX_I2C1_Init(); - 8001ca0: f7ff ff18 bl 8001ad4 + 8002388: f7ff ff18 bl 80021bc MX_I2C2_Init(); - 8001ca4: f7ff ff44 bl 8001b30 + 800238c: f7ff ff44 bl 8002218 MX_USART1_UART_Init(); - 8001ca8: f000 fc52 bl 8002550 + 8002390: f000 fd64 bl 8002e5c MX_TIM3_Init(); - 8001cac: f000 fbdc bl 8002468 + 8002394: f000 fcee bl 8002d74 /* USER CODE BEGIN 2 */ HAL_TIM_Base_Start_IT(&htim3); - 8001cb0: 488b ldr r0, [pc, #556] @ (8001ee0 ) - 8001cb2: f003 f83d bl 8004d30 + 8002398: 488e ldr r0, [pc, #568] @ (80025d4 ) + 800239a: f003 f973 bl 8005684 + //AD5934_MovingAvg_Init (&g_rtd_filter); + //AD5934_MovingAvg_Init (&g_ref_filter); + //AD5934_MovingAvg_Init (&g_ec_filter); HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); // LED Green Off - 8001cb6: 2201 movs r2, #1 - 8001cb8: 2110 movs r1, #16 - 8001cba: 488a ldr r0, [pc, #552] @ (8001ee4 ) - 8001cbc: f001 fabb bl 8003236 + 800239e: 2201 movs r2, #1 + 80023a0: 2110 movs r1, #16 + 80023a2: 488d ldr r0, [pc, #564] @ (80025d8 ) + 80023a4: f001 fbf1 bl 8003b8a HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); // LED Red Off - 8001cc0: 2201 movs r2, #1 - 8001cc2: 2120 movs r1, #32 - 8001cc4: 4887 ldr r0, [pc, #540] @ (8001ee4 ) - 8001cc6: f001 fab6 bl 8003236 + 80023a8: 2201 movs r2, #1 + 80023aa: 2120 movs r1, #32 + 80023ac: 488a ldr r0, [pc, #552] @ (80025d8 ) + 80023ae: f001 fbec bl 8003b8a digital_outputs_init(); - 8001cca: f7ff fdcb bl 8001864 + 80023b2: f7ff fdcb bl 8001f4c rs485_init(); - 8001cce: f000 fa6b bl 80021a8 + 80023b6: f000 fb7d bl 8002ab4 + ADG715_ResetChannels(); + 80023ba: f7ff fa2b bl 8001814 ADS1015_Init(); // Initializes pH Measurement - 8001cd2: f7ff fb77 bl 80013c4 + 80023be: f7ff fb75 bl 8001aac AD5934_Init(); // Initializes CE and RTD Measurement - 8001cd6: f7fe fdc5 bl 8000864 - /* USER CODE END 2 */ - - /* Infinite loop */ - /* USER CODE BEGIN WHILE */ - - while(averages<15) - 8001cda: e02d b.n 8001d38 - { - AD5934_Process_System(); - 8001cdc: f7fe ff62 bl 8000ba4 - ADS1015_Process_System(); - 8001ce0: f7ff fbce bl 8001480 - - current_millis = g_ms_counter; - 8001ce4: 4b80 ldr r3, [pc, #512] @ (8001ee8 ) - 8001ce6: 681b ldr r3, [r3, #0] - 8001ce8: 623b str r3, [r7, #32] - - if((current_millis % 20) == 0) // Send data each 20ms - 8001cea: 6a39 ldr r1, [r7, #32] - 8001cec: 4b7f ldr r3, [pc, #508] @ (8001eec ) - 8001cee: fba3 2301 umull r2, r3, r3, r1 - 8001cf2: 091a lsrs r2, r3, #4 - 8001cf4: 4613 mov r3, r2 - 8001cf6: 009b lsls r3, r3, #2 - 8001cf8: 4413 add r3, r2 - 8001cfa: 009b lsls r3, r3, #2 - 8001cfc: 1aca subs r2, r1, r3 - 8001cfe: 2a00 cmp r2, #0 - 8001d00: d11a bne.n 8001d38 - { - if (g_ref_filter.value_valid) // Reference Resistor on Board: 100 Ohms or 1000 Ohms - 8001d02: 4b7b ldr r3, [pc, #492] @ (8001ef0 ) - 8001d04: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8001d08: 2b00 cmp r3, #0 - 8001d0a: d015 beq.n 8001d38 - { - reference_resistor = g_ref_filter.filtered_value; - 8001d0c: 4b78 ldr r3, [pc, #480] @ (8001ef0 ) - 8001d0e: 6b9b ldr r3, [r3, #56] @ 0x38 - 8001d10: 4a78 ldr r2, [pc, #480] @ (8001ef4 ) - 8001d12: 6013 str r3, [r2, #0] - uint16_t reference_final = AD5934_REF_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_ref_filter.filtered_value, current_ref_mux); - 8001d14: 4b76 ldr r3, [pc, #472] @ (8001ef0 ) - 8001d16: 6b9b ldr r3, [r3, #56] @ 0x38 - 8001d18: 4a77 ldr r2, [pc, #476] @ (8001ef8 ) - 8001d1a: 7812 ldrb r2, [r2, #0] - 8001d1c: 4611 mov r1, r2 - 8001d1e: 4618 mov r0, r3 - 8001d20: f7fe feb2 bl 8000a88 - 8001d24: 4603 mov r3, r0 - 8001d26: f5c3 637f rsb r3, r3, #4080 @ 0xff0 - 8001d2a: 330f adds r3, #15 - 8001d2c: 833b strh r3, [r7, #24] - + 80023c2: f7fe fe0b bl 8000fdc averages++; - 8001d2e: f897 302f ldrb.w r3, [r7, #47] @ 0x2f - 8001d32: 3301 adds r3, #1 - 8001d34: f887 302f strb.w r3, [r7, #47] @ 0x2f - while(averages<15) - 8001d38: f897 302f ldrb.w r3, [r7, #47] @ 0x2f - 8001d3c: 2b0e cmp r3, #14 - 8001d3e: d9cd bls.n 8001cdc } } } - +*/ digital_outputs_toggle(0); - 8001d40: 2000 movs r0, #0 - 8001d42: f7ff fe09 bl 8001958 + 80023c6: 2000 movs r0, #0 + 80023c8: f7ff fe3a bl 8002040 digital_outputs_toggle(1); - 8001d46: 2001 movs r0, #1 - 8001d48: f7ff fe06 bl 8001958 + 80023cc: 2001 movs r0, #1 + 80023ce: f7ff fe37 bl 8002040 digital_outputs_toggle(2); - 8001d4c: 2002 movs r0, #2 - 8001d4e: f7ff fe03 bl 8001958 + 80023d2: 2002 movs r0, #2 + 80023d4: f7ff fe34 bl 8002040 digital_outputs_toggle(3); - 8001d52: 2003 movs r0, #3 - 8001d54: f7ff fe00 bl 8001958 + 80023d8: 2003 movs r0, #3 + 80023da: f7ff fe31 bl 8002040 digital_outputs_toggle(4); - 8001d58: 2004 movs r0, #4 - 8001d5a: f7ff fdfd bl 8001958 + 80023de: 2004 movs r0, #4 + 80023e0: f7ff fe2e bl 8002040 digital_outputs_toggle(5); - 8001d5e: 2005 movs r0, #5 - 8001d60: f7ff fdfa bl 8001958 + 80023e4: 2005 movs r0, #5 + 80023e6: f7ff fe2b bl 8002040 digital_outputs_toggle(6); - 8001d64: 2006 movs r0, #6 - 8001d66: f7ff fdf7 bl 8001958 + 80023ea: 2006 movs r0, #6 + 80023ec: f7ff fe28 bl 8002040 digital_outputs_toggle(7); - 8001d6a: 2007 movs r0, #7 - 8001d6c: f7ff fdf4 bl 8001958 + 80023f0: 2007 movs r0, #7 + 80023f2: f7ff fe25 bl 8002040 while (1) { AD5934_Process_System(); - 8001d70: f7fe ff18 bl 8000ba4 + 80023f6: f7fe ff23 bl 8001240 ADS1015_Process_System(); - 8001d74: f7ff fb84 bl 8001480 + 80023fa: f7ff fbb5 bl 8001b68 current_millis = g_ms_counter; - 8001d78: 4b5b ldr r3, [pc, #364] @ (8001ee8 ) - 8001d7a: 681b ldr r3, [r3, #0] - 8001d7c: 623b str r3, [r7, #32] + 80023fe: 4b77 ldr r3, [pc, #476] @ (80025dc ) + 8002400: 681b ldr r3, [r3, #0] + 8002402: 62bb str r3, [r7, #40] @ 0x28 if((current_millis % 500) == 0) // Send data each 100ms - 8001d7e: 6a3a ldr r2, [r7, #32] - 8001d80: 4b5e ldr r3, [pc, #376] @ (8001efc ) - 8001d82: fba3 1302 umull r1, r3, r3, r2 - 8001d86: 095b lsrs r3, r3, #5 - 8001d88: f44f 71fa mov.w r1, #500 @ 0x1f4 - 8001d8c: fb01 f303 mul.w r3, r1, r3 - 8001d90: 1ad3 subs r3, r2, r3 - 8001d92: 2b00 cmp r3, #0 - 8001d94: f040 8095 bne.w 8001ec2 - //FloatToString(tempString, ref_final); + 8002404: 6aba ldr r2, [r7, #40] @ 0x28 + 8002406: 4b76 ldr r3, [pc, #472] @ (80025e0 ) + 8002408: fba3 1302 umull r1, r3, r3, r2 + 800240c: 095b lsrs r3, r3, #5 + 800240e: f44f 71fa mov.w r1, #500 @ 0x1f4 + 8002412: fb01 f303 mul.w r3, r1, r3 + 8002416: 1ad3 subs r3, r2, r3 + 8002418: 2b00 cmp r3, #0 + 800241a: f040 80cc bne.w 80025b6 + { + + //if (g_ref_filter.value_valid) // Reference Resistor on Board: 100 Ohms or 1000 Ohms + //{ + mag_reference = g_ref_filter.filtered_value; + 800241e: 4b71 ldr r3, [pc, #452] @ (80025e4 ) + 8002420: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002422: 627b str r3, [r7, #36] @ 0x24 + //reference_resistor = g_ref_filter.filtered_value; + //uint16_t reference_final = AD5934_REF_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_ref_filter.filtered_value, current_ref_mux); + + //intToStr(reference_final, tempString); + //ref_final = g_ref_filter.filtered_value; + FloatToString(tempString, mag_reference); + 8002424: 6a78 ldr r0, [r7, #36] @ 0x24 + 8002426: f7fe f927 bl 8000678 <__aeabi_f2d> + 800242a: 4602 mov r2, r0 + 800242c: 460b mov r3, r1 + 800242e: f107 0108 add.w r1, r7, #8 + 8002432: 4608 mov r0, r1 + 8002434: f000 f934 bl 80026a0 + //Convert2Hex(ref_now, tempString); + //intToStr(ref_now, tempString); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); + 8002438: f107 0308 add.w r3, r7, #8 + 800243c: 4618 mov r0, r3 + 800243e: f7fd fe85 bl 800014c + 8002442: 4603 mov r3, r0 + 8002444: b29a uxth r2, r3 + 8002446: f107 0308 add.w r3, r7, #8 + 800244a: 4611 mov r1, r2 + 800244c: 4618 mov r0, r3 + 800244e: f000 fb5d bl 8002b0c + //intToStr(ref_now_i, tempString); + //rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); rs485_send_broadcast(&newline, 1); + 8002452: 1dfb adds r3, r7, #7 + 8002454: 2101 movs r1, #1 + 8002456: 4618 mov r0, r3 + 8002458: f000 fb58 bl 8002b0c + //} + + //if (g_rtd_filter.value_valid) // PT100 or PT1000 in °C + //{ + //mag_rtd = (float)rtd_now; + mag_rtd = g_rtd_filter.filtered_value; + 800245c: 4b62 ldr r3, [pc, #392] @ (80025e8 ) + 800245e: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002460: 623b str r3, [r7, #32] + //mag_rtd = sqrtf((g_rtd_real_filter.average * g_rtd_real_filter.average)+(g_rtd_imag_filter.average * g_rtd_imag_filter.average)); + //mag_rtd = sqrtf(((float)rtd_now * (float)rtd_now) + ((float)rtd_now_i * (float)rtd_now_i)); + //temperature_RTD = AD5934_Calculate_Temperature(mag_reference, mag_rtd); + temperature_RTD = AD5934_Calculate_Temperature(mag_reference,mag_rtd);// AD5934_GetImpedance(mag_reference,mag_rtd);// + 8002462: 6a39 ldr r1, [r7, #32] + 8002464: 6a78 ldr r0, [r7, #36] @ 0x24 + 8002466: f7fe fe05 bl 8001074 + 800246a: 4603 mov r3, r0 + 800246c: 4a5f ldr r2, [pc, #380] @ (80025ec ) + 800246e: 6013 str r3, [r2, #0] + //uint16_t rtd_final = AD5934_RTD_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_rtd_filter.filtered_value, current_rtd_mux); + //uint16_t rtd_final = AD5934_Compress_To_IntScale(temperature_RTD, current_rtd_mux); + //intToStr(rtd_final, tempString); + //float rtd_final = g_rtd_filter.filtered_value; //g_rtd_filter.filtered_value; + FloatToString(tempString, temperature_RTD); + 8002470: 4b5e ldr r3, [pc, #376] @ (80025ec ) + 8002472: 681b ldr r3, [r3, #0] + 8002474: 4618 mov r0, r3 + 8002476: f7fe f8ff bl 8000678 <__aeabi_f2d> + 800247a: 4602 mov r2, r0 + 800247c: 460b mov r3, r1 + 800247e: f107 0108 add.w r1, r7, #8 + 8002482: 4608 mov r0, r1 + 8002484: f000 f90c bl 80026a0 + //Convert2Hex(rtd_now, tempString); + //intToStr(rtd_now, tempString); + rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); + 8002488: f107 0308 add.w r3, r7, #8 + 800248c: 4618 mov r0, r3 + 800248e: f7fd fe5d bl 800014c + 8002492: 4603 mov r3, r0 + 8002494: b29a uxth r2, r3 + 8002496: f107 0308 add.w r3, r7, #8 + 800249a: 4611 mov r1, r2 + 800249c: 4618 mov r0, r3 + 800249e: f000 fb35 bl 8002b0c + //Convert2Hex(rtd_now_i, tempString); + //intToStr(rtd_now_i, tempString); + //rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); + rs485_send_broadcast(&newline, 1); + 80024a2: 1dfb adds r3, r7, #7 + 80024a4: 2101 movs r1, #1 + 80024a6: 4618 mov r0, r3 + 80024a8: f000 fb30 bl 8002b0c }*/ - if (g_rtd_filter.value_valid) // PT100 or PT1000 in °C - 8001d98: 4b59 ldr r3, [pc, #356] @ (8001f00 ) - 8001d9a: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8001d9e: 2b00 cmp r3, #0 - 8001da0: d030 beq.n 8001e04 - { - temperature_RTD = AD5934_Calculate_Temperature(reference_resistor, g_rtd_filter.filtered_value); - 8001da2: 4b54 ldr r3, [pc, #336] @ (8001ef4 ) - 8001da4: 681b ldr r3, [r3, #0] - 8001da6: 4a56 ldr r2, [pc, #344] @ (8001f00 ) - 8001da8: 6b92 ldr r2, [r2, #56] @ 0x38 - 8001daa: 4611 mov r1, r2 - 8001dac: 4618 mov r0, r3 - 8001dae: f7fe fda5 bl 80008fc - 8001db2: 4603 mov r3, r0 - 8001db4: 4a53 ldr r2, [pc, #332] @ (8001f04 ) - 8001db6: 6013 str r3, [r2, #0] - uint16_t rtd_final = AD5934_RTD_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(temperature_RTD, current_rtd_mux); - 8001db8: 4b52 ldr r3, [pc, #328] @ (8001f04 ) - 8001dba: 681b ldr r3, [r3, #0] - 8001dbc: 4a52 ldr r2, [pc, #328] @ (8001f08 ) - 8001dbe: 7812 ldrb r2, [r2, #0] - 8001dc0: 4611 mov r1, r2 - 8001dc2: 4618 mov r0, r3 - 8001dc4: f7fe fe60 bl 8000a88 - 8001dc8: 4603 mov r3, r0 - 8001dca: f5c3 7348 rsb r3, r3, #800 @ 0x320 - 8001dce: 83fb strh r3, [r7, #30] + //if (g_ec_filter.value_valid) // EC + //{ + //mag_ec = sqrtf((g_ec_real_filter.filtered_value * g_ec_real_filter.filtered_value)+(g_ec_imag_filter.filtered_value * g_ec_imag_filter.filtered_value)); + mag_ec = sqrtf(((float)ec_now * (float)ec_now) + ((float)ec_now_i * (float)ec_now_i)); + 80024ac: 4b50 ldr r3, [pc, #320] @ (80025f0 ) + 80024ae: f9b3 3000 ldrsh.w r3, [r3] + 80024b2: 4618 mov r0, r3 + 80024b4: f7fe faa2 bl 80009fc <__aeabi_i2f> + 80024b8: 4604 mov r4, r0 + 80024ba: 4b4d ldr r3, [pc, #308] @ (80025f0 ) + 80024bc: f9b3 3000 ldrsh.w r3, [r3] + 80024c0: 4618 mov r0, r3 + 80024c2: f7fe fa9b bl 80009fc <__aeabi_i2f> + 80024c6: 4603 mov r3, r0 + 80024c8: 4619 mov r1, r3 + 80024ca: 4620 mov r0, r4 + 80024cc: f7fe faea bl 8000aa4 <__aeabi_fmul> + 80024d0: 4603 mov r3, r0 + 80024d2: 461d mov r5, r3 + 80024d4: 4b47 ldr r3, [pc, #284] @ (80025f4 ) + 80024d6: f9b3 3000 ldrsh.w r3, [r3] + 80024da: 4618 mov r0, r3 + 80024dc: f7fe fa8e bl 80009fc <__aeabi_i2f> + 80024e0: 4604 mov r4, r0 + 80024e2: 4b44 ldr r3, [pc, #272] @ (80025f4 ) + 80024e4: f9b3 3000 ldrsh.w r3, [r3] + 80024e8: 4618 mov r0, r3 + 80024ea: f7fe fa87 bl 80009fc <__aeabi_i2f> + 80024ee: 4603 mov r3, r0 + 80024f0: 4619 mov r1, r3 + 80024f2: 4620 mov r0, r4 + 80024f4: f7fe fad6 bl 8000aa4 <__aeabi_fmul> + 80024f8: 4603 mov r3, r0 + 80024fa: 4619 mov r1, r3 + 80024fc: 4628 mov r0, r5 + 80024fe: f7fe f9c9 bl 8000894 <__addsf3> + 8002502: 4603 mov r3, r0 + 8002504: 4618 mov r0, r3 + 8002506: f004 faa7 bl 8006a58 + 800250a: 61f8 str r0, [r7, #28] + thermal_compensaded_EC = AD5934_EC_Compensate_Magnitude_To_25C(mag_ec, temperature_RTD); + 800250c: 4b37 ldr r3, [pc, #220] @ (80025ec ) + 800250e: 681b ldr r3, [r3, #0] + 8002510: 4619 mov r1, r3 + 8002512: 69f8 ldr r0, [r7, #28] + 8002514: f7fe fe2a bl 800116c + 8002518: 4603 mov r3, r0 + 800251a: 4a37 ldr r2, [pc, #220] @ (80025f8 ) + 800251c: 6013 str r3, [r2, #0] + //uint16_t ec_final = AD5934_Compress_To_IntScale(thermal_compensaded_EC, current_ec_mux); - intToStr(rtd_final, tempString); - 8001dd0: f9b7 301e ldrsh.w r3, [r7, #30] - 8001dd4: f107 0208 add.w r2, r7, #8 - 8001dd8: 4611 mov r1, r2 - 8001dda: 4618 mov r0, r3 - 8001ddc: f000 f8ee bl 8001fbc - //float rtd_final = g_rtd_filter.filtered_value; - //FloatToString(tempString, rtd_final); - rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); - 8001de0: f107 0308 add.w r3, r7, #8 - 8001de4: 4618 mov r0, r3 - 8001de6: f7fe f9b1 bl 800014c - 8001dea: 4603 mov r3, r0 - 8001dec: b29a uxth r2, r3 - 8001dee: f107 0308 add.w r3, r7, #8 - 8001df2: 4611 mov r1, r2 - 8001df4: 4618 mov r0, r3 - 8001df6: f000 fa03 bl 8002200 - rs485_send_broadcast(&newline, 1); - 8001dfa: 1dfb adds r3, r7, #7 - 8001dfc: 2101 movs r1, #1 - 8001dfe: 4618 mov r0, r3 - 8001e00: f000 f9fe bl 8002200 - } - - if (g_ec_filter.value_valid) // EC - 8001e04: 4b41 ldr r3, [pc, #260] @ (8001f0c ) - 8001e06: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8001e0a: 2b00 cmp r3, #0 - 8001e0c: d02e beq.n 8001e6c - { - thermal_compensaded_EC = AD5934_EC_Compensate_Magnitude_To_25C(g_ec_filter.filtered_value, temperature_RTD); - 8001e0e: 4b3f ldr r3, [pc, #252] @ (8001f0c ) - 8001e10: 6b9b ldr r3, [r3, #56] @ 0x38 - 8001e12: 4a3c ldr r2, [pc, #240] @ (8001f04 ) - 8001e14: 6812 ldr r2, [r2, #0] - 8001e16: 4611 mov r1, r2 - 8001e18: 4618 mov r0, r3 - 8001e1a: f7fe fdc7 bl 80009ac - 8001e1e: 4603 mov r3, r0 - 8001e20: 4a3b ldr r2, [pc, #236] @ (8001f10 ) - 8001e22: 6013 str r3, [r2, #0] - uint16_t ec_final = AD5934_Compress_To_IntScale(thermal_compensaded_EC, current_ec_mux); - 8001e24: 4b3a ldr r3, [pc, #232] @ (8001f10 ) - 8001e26: 681b ldr r3, [r3, #0] - 8001e28: 4a3a ldr r2, [pc, #232] @ (8001f14 ) - 8001e2a: 7812 ldrb r2, [r2, #0] - 8001e2c: 4611 mov r1, r2 - 8001e2e: 4618 mov r0, r3 - 8001e30: f7fe fe2a bl 8000a88 - 8001e34: 4603 mov r3, r0 - 8001e36: 83bb strh r3, [r7, #28] - - intToStr(ec_final, tempString); - 8001e38: f9b7 301c ldrsh.w r3, [r7, #28] - 8001e3c: f107 0208 add.w r2, r7, #8 - 8001e40: 4611 mov r1, r2 - 8001e42: 4618 mov r0, r3 - 8001e44: f000 f8ba bl 8001fbc + //intToStr(ec_now, tempString); // float ec_final = g_ec_filter.filtered_value; - // FloatToString(tempString, ec_final); + FloatToString(tempString, mag_ec); + 800251e: 69f8 ldr r0, [r7, #28] + 8002520: f7fe f8aa bl 8000678 <__aeabi_f2d> + 8002524: 4602 mov r2, r0 + 8002526: 460b mov r3, r1 + 8002528: f107 0108 add.w r1, r7, #8 + 800252c: 4608 mov r0, r1 + 800252e: f000 f8b7 bl 80026a0 + //Convert2Hex((ec_now+0x80008000), tempString); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); - 8001e48: f107 0308 add.w r3, r7, #8 - 8001e4c: 4618 mov r0, r3 - 8001e4e: f7fe f97d bl 800014c - 8001e52: 4603 mov r3, r0 - 8001e54: b29a uxth r2, r3 - 8001e56: f107 0308 add.w r3, r7, #8 - 8001e5a: 4611 mov r1, r2 - 8001e5c: 4618 mov r0, r3 - 8001e5e: f000 f9cf bl 8002200 + 8002532: f107 0308 add.w r3, r7, #8 + 8002536: 4618 mov r0, r3 + 8002538: f7fd fe08 bl 800014c + 800253c: 4603 mov r3, r0 + 800253e: b29a uxth r2, r3 + 8002540: f107 0308 add.w r3, r7, #8 + 8002544: 4611 mov r1, r2 + 8002546: 4618 mov r0, r3 + 8002548: f000 fae0 bl 8002b0c + //intToStr(ec_now_i, tempString); + //rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); rs485_send_broadcast(&newline, 1); - 8001e62: 1dfb adds r3, r7, #7 - 8001e64: 2101 movs r1, #1 - 8001e66: 4618 mov r0, r3 - 8001e68: f000 f9ca bl 8002200 - } + 800254c: 1dfb adds r3, r7, #7 + 800254e: 2101 movs r1, #1 + 8002550: 4618 mov r0, r3 + 8002552: f000 fadb bl 8002b0c + //} if (g_ph_filter.value_valid) // pH - 8001e6c: 4b2a ldr r3, [pc, #168] @ (8001f18 ) - 8001e6e: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8001e72: 2b00 cmp r3, #0 - 8001e74: d020 beq.n 8001eb8 + 8002556: 4b29 ldr r3, [pc, #164] @ (80025fc ) + 8002558: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 800255c: 2b00 cmp r3, #0 + 800255e: d025 beq.n 80025ac { uint16_t ph_final = ADS1015_Compress_To_IntScale(g_ph_filter.filtered_value); - 8001e76: 4b28 ldr r3, [pc, #160] @ (8001f18 ) - 8001e78: 6b9b ldr r3, [r3, #56] @ 0x38 - 8001e7a: 4618 mov r0, r3 - 8001e7c: f7ff fabc bl 80013f8 - 8001e80: 4603 mov r3, r0 - 8001e82: 837b strh r3, [r7, #26] + 8002560: 4b26 ldr r3, [pc, #152] @ (80025fc ) + 8002562: 6b9b ldr r3, [r3, #56] @ 0x38 + 8002564: 4618 mov r0, r3 + 8002566: f7ff fabb bl 8001ae0 + 800256a: 4603 mov r3, r0 + 800256c: 837b strh r3, [r7, #26] intToStr(ph_final, tempString); - 8001e84: f9b7 301a ldrsh.w r3, [r7, #26] - 8001e88: f107 0208 add.w r2, r7, #8 - 8001e8c: 4611 mov r1, r2 - 8001e8e: 4618 mov r0, r3 - 8001e90: f000 f894 bl 8001fbc + 800256e: f9b7 301a ldrsh.w r3, [r7, #26] + 8002572: f107 0208 add.w r2, r7, #8 + 8002576: 4611 mov r1, r2 + 8002578: 4618 mov r0, r3 + 800257a: f000 f9a5 bl 80028c8 //float ph_final = g_ph_filter.filtered_value; //FloatToString(tempString, ph_final); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); - 8001e94: f107 0308 add.w r3, r7, #8 - 8001e98: 4618 mov r0, r3 - 8001e9a: f7fe f957 bl 800014c - 8001e9e: 4603 mov r3, r0 - 8001ea0: b29a uxth r2, r3 - 8001ea2: f107 0308 add.w r3, r7, #8 - 8001ea6: 4611 mov r1, r2 - 8001ea8: 4618 mov r0, r3 - 8001eaa: f000 f9a9 bl 8002200 + 800257e: f107 0308 add.w r3, r7, #8 + 8002582: 4618 mov r0, r3 + 8002584: f7fd fde2 bl 800014c + 8002588: 4603 mov r3, r0 + 800258a: b29a uxth r2, r3 + 800258c: f107 0308 add.w r3, r7, #8 + 8002590: 4611 mov r1, r2 + 8002592: 4618 mov r0, r3 + 8002594: f000 faba bl 8002b0c rs485_send_broadcast(&newline, 1); - 8001eae: 1dfb adds r3, r7, #7 - 8001eb0: 2101 movs r1, #1 - 8001eb2: 4618 mov r0, r3 - 8001eb4: f000 f9a4 bl 8002200 + 8002598: 1dfb adds r3, r7, #7 + 800259a: 2101 movs r1, #1 + 800259c: 4618 mov r0, r3 + 800259e: f000 fab5 bl 8002b0c + rs485_send_broadcast(&newline, 1); + 80025a2: 1dfb adds r3, r7, #7 + 80025a4: 2101 movs r1, #1 + 80025a6: 4618 mov r0, r3 + 80025a8: f000 fab0 bl 8002b0c } rs485_send_broadcast(&newline, 1); - 8001eb8: 1dfb adds r3, r7, #7 - 8001eba: 2101 movs r1, #1 - 8001ebc: 4618 mov r0, r3 - 8001ebe: f000 f99f bl 8002200 + 80025ac: 1dfb adds r3, r7, #7 + 80025ae: 2101 movs r1, #1 + 80025b0: 4618 mov r0, r3 + 80025b2: f000 faab bl 8002b0c } // Piscar LED verde em PB4 a cada 1 segundo if ((current_millis - previous_millis_green) >= 1000) - 8001ec2: 6a3a ldr r2, [r7, #32] - 8001ec4: 6abb ldr r3, [r7, #40] @ 0x28 - 8001ec6: 1ad3 subs r3, r2, r3 - 8001ec8: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 - 8001ecc: f4ff af50 bcc.w 8001d70 + 80025b6: 6aba ldr r2, [r7, #40] @ 0x28 + 80025b8: 6b7b ldr r3, [r7, #52] @ 0x34 + 80025ba: 1ad3 subs r3, r2, r3 + 80025bc: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 + 80025c0: f4ff af19 bcc.w 80023f6 { previous_millis_green = current_millis; - 8001ed0: 6a3b ldr r3, [r7, #32] - 8001ed2: 62bb str r3, [r7, #40] @ 0x28 + 80025c4: 6abb ldr r3, [r7, #40] @ 0x28 + 80025c6: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_4); - 8001ed4: 2110 movs r1, #16 - 8001ed6: 4803 ldr r0, [pc, #12] @ (8001ee4 ) - 8001ed8: f001 f9c5 bl 8003266 + 80025c8: 2110 movs r1, #16 + 80025ca: 4803 ldr r0, [pc, #12] @ (80025d8 ) + 80025cc: f001 faf5 bl 8003bba AD5934_Process_System(); - 8001edc: e748 b.n 8001d70 - 8001ede: bf00 nop - 8001ee0: 20000310 .word 0x20000310 - 8001ee4: 40010c00 .word 0x40010c00 - 8001ee8: 20000080 .word 0x20000080 - 8001eec: cccccccd .word 0xcccccccd - 8001ef0: 20000114 .word 0x20000114 - 8001ef4: 20000084 .word 0x20000084 - 8001ef8: 20000091 .word 0x20000091 - 8001efc: 10624dd3 .word 0x10624dd3 - 8001f00: 20000094 .word 0x20000094 - 8001f04: 20000088 .word 0x20000088 - 8001f08: 20000002 .word 0x20000002 - 8001f0c: 200000d4 .word 0x200000d4 - 8001f10: 2000008c .word 0x2000008c - 8001f14: 20000001 .word 0x20000001 - 8001f18: 200001c8 .word 0x200001c8 + 80025d0: e711 b.n 80023f6 + 80025d2: bf00 nop + 80025d4: 2000030c .word 0x2000030c + 80025d8: 40010c00 .word 0x40010c00 + 80025dc: 20000084 .word 0x20000084 + 80025e0: 10624dd3 .word 0x10624dd3 + 80025e4: 2000010c .word 0x2000010c + 80025e8: 20000094 .word 0x20000094 + 80025ec: 20000088 .word 0x20000088 + 80025f0: 2000014c .word 0x2000014c + 80025f4: 20000152 .word 0x20000152 + 80025f8: 2000008c .word 0x2000008c + 80025fc: 200001c4 .word 0x200001c4 -08001f1c : +08002600 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8001f1c: b580 push {r7, lr} - 8001f1e: b094 sub sp, #80 @ 0x50 - 8001f20: af00 add r7, sp, #0 + 8002600: b580 push {r7, lr} + 8002602: b094 sub sp, #80 @ 0x50 + 8002604: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 8001f22: f107 0328 add.w r3, r7, #40 @ 0x28 - 8001f26: 2228 movs r2, #40 @ 0x28 - 8001f28: 2100 movs r1, #0 - 8001f2a: 4618 mov r0, r3 - 8001f2c: f004 f8b8 bl 80060a0 + 8002606: f107 0328 add.w r3, r7, #40 @ 0x28 + 800260a: 2228 movs r2, #40 @ 0x28 + 800260c: 2100 movs r1, #0 + 800260e: 4618 mov r0, r3 + 8002610: f004 f9f0 bl 80069f4 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8001f30: f107 0314 add.w r3, r7, #20 - 8001f34: 2200 movs r2, #0 - 8001f36: 601a str r2, [r3, #0] - 8001f38: 605a str r2, [r3, #4] - 8001f3a: 609a str r2, [r3, #8] - 8001f3c: 60da str r2, [r3, #12] - 8001f3e: 611a str r2, [r3, #16] + 8002614: f107 0314 add.w r3, r7, #20 + 8002618: 2200 movs r2, #0 + 800261a: 601a str r2, [r3, #0] + 800261c: 605a str r2, [r3, #4] + 800261e: 609a str r2, [r3, #8] + 8002620: 60da str r2, [r3, #12] + 8002622: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 8001f40: 1d3b adds r3, r7, #4 - 8001f42: 2200 movs r2, #0 - 8001f44: 601a str r2, [r3, #0] - 8001f46: 605a str r2, [r3, #4] - 8001f48: 609a str r2, [r3, #8] - 8001f4a: 60da str r2, [r3, #12] + 8002624: 1d3b adds r3, r7, #4 + 8002626: 2200 movs r2, #0 + 8002628: 601a str r2, [r3, #0] + 800262a: 605a str r2, [r3, #4] + 800262c: 609a str r2, [r3, #8] + 800262e: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 8001f4c: 2301 movs r3, #1 - 8001f4e: 62bb str r3, [r7, #40] @ 0x28 + 8002630: 2301 movs r3, #1 + 8002632: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 8001f50: f44f 3380 mov.w r3, #65536 @ 0x10000 - 8001f54: 62fb str r3, [r7, #44] @ 0x2c + 8002634: f44f 3380 mov.w r3, #65536 @ 0x10000 + 8002638: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - 8001f56: 2300 movs r3, #0 - 8001f58: 647b str r3, [r7, #68] @ 0x44 + 800263a: 2300 movs r3, #0 + 800263c: 647b str r3, [r7, #68] @ 0x44 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8001f5a: f107 0328 add.w r3, r7, #40 @ 0x28 - 8001f5e: 4618 mov r0, r3 - 8001f60: f002 f9ce bl 8004300 - 8001f64: 4603 mov r3, r0 - 8001f66: 2b00 cmp r3, #0 - 8001f68: d001 beq.n 8001f6e + 800263e: f107 0328 add.w r3, r7, #40 @ 0x28 + 8002642: 4618 mov r0, r3 + 8002644: f002 fb06 bl 8004c54 + 8002648: 4603 mov r3, r0 + 800264a: 2b00 cmp r3, #0 + 800264c: d001 beq.n 8002652 { Error_Handler(); - 8001f6a: f000 f90b bl 8002184 + 800264e: f000 fa1f bl 8002a90 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8001f6e: 230f movs r3, #15 - 8001f70: 617b str r3, [r7, #20] + 8002652: 230f movs r3, #15 + 8002654: 617b str r3, [r7, #20] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; - 8001f72: 2301 movs r3, #1 - 8001f74: 61bb str r3, [r7, #24] + 8002656: 2301 movs r3, #1 + 8002658: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8001f76: 2300 movs r3, #0 - 8001f78: 61fb str r3, [r7, #28] + 800265a: 2300 movs r3, #0 + 800265c: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 8001f7a: 2300 movs r3, #0 - 8001f7c: 623b str r3, [r7, #32] + 800265e: 2300 movs r3, #0 + 8002660: 623b str r3, [r7, #32] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 8001f7e: 2300 movs r3, #0 - 8001f80: 627b str r3, [r7, #36] @ 0x24 + 8002662: 2300 movs r3, #0 + 8002664: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - 8001f82: f107 0314 add.w r3, r7, #20 - 8001f86: 2100 movs r1, #0 - 8001f88: 4618 mov r0, r3 - 8001f8a: f002 fc3b bl 8004804 - 8001f8e: 4603 mov r3, r0 - 8001f90: 2b00 cmp r3, #0 - 8001f92: d001 beq.n 8001f98 + 8002666: f107 0314 add.w r3, r7, #20 + 800266a: 2100 movs r1, #0 + 800266c: 4618 mov r0, r3 + 800266e: f002 fd73 bl 8005158 + 8002672: 4603 mov r3, r0 + 8002674: 2b00 cmp r3, #0 + 8002676: d001 beq.n 800267c { Error_Handler(); - 8001f94: f000 f8f6 bl 8002184 + 8002678: f000 fa0a bl 8002a90 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; - 8001f98: 2302 movs r3, #2 - 8001f9a: 607b str r3, [r7, #4] + 800267c: 2302 movs r3, #2 + 800267e: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV8; - 8001f9c: f44f 4340 mov.w r3, #49152 @ 0xc000 - 8001fa0: 60fb str r3, [r7, #12] + 8002680: f44f 4340 mov.w r3, #49152 @ 0xc000 + 8002684: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 8001fa2: 1d3b adds r3, r7, #4 - 8001fa4: 4618 mov r0, r3 - 8001fa6: f002 fdbd bl 8004b24 - 8001faa: 4603 mov r3, r0 - 8001fac: 2b00 cmp r3, #0 - 8001fae: d001 beq.n 8001fb4 + 8002686: 1d3b adds r3, r7, #4 + 8002688: 4618 mov r0, r3 + 800268a: f002 fef5 bl 8005478 + 800268e: 4603 mov r3, r0 + 8002690: 2b00 cmp r3, #0 + 8002692: d001 beq.n 8002698 { Error_Handler(); - 8001fb0: f000 f8e8 bl 8002184 + 8002694: f000 f9fc bl 8002a90 } } - 8001fb4: bf00 nop - 8001fb6: 3750 adds r7, #80 @ 0x50 - 8001fb8: 46bd mov sp, r7 - 8001fba: bd80 pop {r7, pc} + 8002698: bf00 nop + 800269a: 3750 adds r7, #80 @ 0x50 + 800269c: 46bd mov sp, r7 + 800269e: bd80 pop {r7, pc} -08001fbc : +080026a0 : + * @param val - value to be converted + * + * @return None. +*******************************************************************************/ +void FloatToString(uint8_t *buf, double val) +{ + 80026a0: b5b0 push {r4, r5, r7, lr} + 80026a2: b096 sub sp, #88 @ 0x58 + 80026a4: af00 add r7, sp, #0 + 80026a6: 60f8 str r0, [r7, #12] + 80026a8: e9c7 2300 strd r2, r3, [r7] + char temp[20]; // Buffer auxiliar para construção segura + int i = 0; + 80026ac: 2300 movs r3, #0 + 80026ae: 657b str r3, [r7, #84] @ 0x54 + + // 1. Tratar sinal negativo + if (val < 0) { + 80026b0: f04f 0200 mov.w r2, #0 + 80026b4: f04f 0300 mov.w r3, #0 + 80026b8: e9d7 0100 ldrd r0, r1, [r7] + 80026bc: f7fe f894 bl 80007e8 <__aeabi_dcmplt> + 80026c0: 4603 mov r3, r0 + 80026c2: 2b00 cmp r3, #0 + 80026c4: d00d beq.n 80026e2 + temp[i++] = '-'; + 80026c6: 6d7b ldr r3, [r7, #84] @ 0x54 + 80026c8: 1c5a adds r2, r3, #1 + 80026ca: 657a str r2, [r7, #84] @ 0x54 + 80026cc: 3358 adds r3, #88 @ 0x58 + 80026ce: 443b add r3, r7 + 80026d0: 222d movs r2, #45 @ 0x2d + 80026d2: f803 2c30 strb.w r2, [r3, #-48] + val = -val; + 80026d6: 683c ldr r4, [r7, #0] + 80026d8: 687b ldr r3, [r7, #4] + 80026da: f083 4500 eor.w r5, r3, #2147483648 @ 0x80000000 + 80026de: e9c7 4500 strd r4, r5, [r7] + } + + // 2. Separar parte inteira e fracionária + long intPart = (long)val; + 80026e2: e9d7 0100 ldrd r0, r1, [r7] + 80026e6: f7fe f8a7 bl 8000838 <__aeabi_d2iz> + 80026ea: 4603 mov r3, r0 + 80026ec: 653b str r3, [r7, #80] @ 0x50 + // Multiplicamos por 1000 para obter 3 casas decimais fixas + int fracPart = (int)((val - (double)intPart) * 1000.0 + 0.5); + 80026ee: 6d38 ldr r0, [r7, #80] @ 0x50 + 80026f0: f7fd ffb0 bl 8000654 <__aeabi_i2d> + 80026f4: 4602 mov r2, r0 + 80026f6: 460b mov r3, r1 + 80026f8: e9d7 0100 ldrd r0, r1, [r7] + 80026fc: f7fd fe5c bl 80003b8 <__aeabi_dsub> + 8002700: 4602 mov r2, r0 + 8002702: 460b mov r3, r1 + 8002704: 4610 mov r0, r2 + 8002706: 4619 mov r1, r3 + 8002708: f04f 0200 mov.w r2, #0 + 800270c: 4b6a ldr r3, [pc, #424] @ (80028b8 ) + 800270e: f7fd fd25 bl 800015c <__aeabi_dmul> + 8002712: 4602 mov r2, r0 + 8002714: 460b mov r3, r1 + 8002716: 4610 mov r0, r2 + 8002718: 4619 mov r1, r3 + 800271a: f04f 0200 mov.w r2, #0 + 800271e: 4b67 ldr r3, [pc, #412] @ (80028bc ) + 8002720: f7fd fe4c bl 80003bc <__adddf3> + 8002724: 4602 mov r2, r0 + 8002726: 460b mov r3, r1 + 8002728: 4610 mov r0, r2 + 800272a: 4619 mov r1, r3 + 800272c: f7fe f884 bl 8000838 <__aeabi_d2iz> + 8002730: 4603 mov r3, r0 + 8002732: 63fb str r3, [r7, #60] @ 0x3c + + // 3. Converter a parte inteira para o buffer temp + // Usamos um buffer temporário de inversão para não precisar de lógica complexa de ponteiro + char intRev[12]; + int j = 0; + 8002734: 2300 movs r3, #0 + 8002736: 64fb str r3, [r7, #76] @ 0x4c + + if (intPart == 0) { + 8002738: 6d3b ldr r3, [r7, #80] @ 0x50 + 800273a: 2b00 cmp r3, #0 + 800273c: d126 bne.n 800278c + intRev[j++] = '0'; + 800273e: 6cfb ldr r3, [r7, #76] @ 0x4c + 8002740: 1c5a adds r2, r3, #1 + 8002742: 64fa str r2, [r7, #76] @ 0x4c + 8002744: 3358 adds r3, #88 @ 0x58 + 8002746: 443b add r3, r7 + 8002748: 2230 movs r2, #48 @ 0x30 + 800274a: f803 2c3c strb.w r2, [r3, #-60] + 800274e: e020 b.n 8002792 + } else { + while (intPart > 0) { + intRev[j++] = (intPart % 10) + '0'; + 8002750: 6d3a ldr r2, [r7, #80] @ 0x50 + 8002752: 4b5b ldr r3, [pc, #364] @ (80028c0 ) + 8002754: fb83 1302 smull r1, r3, r3, r2 + 8002758: 1099 asrs r1, r3, #2 + 800275a: 17d3 asrs r3, r2, #31 + 800275c: 1ac9 subs r1, r1, r3 + 800275e: 460b mov r3, r1 + 8002760: 009b lsls r3, r3, #2 + 8002762: 440b add r3, r1 + 8002764: 005b lsls r3, r3, #1 + 8002766: 1ad1 subs r1, r2, r3 + 8002768: b2ca uxtb r2, r1 + 800276a: 6cfb ldr r3, [r7, #76] @ 0x4c + 800276c: 1c59 adds r1, r3, #1 + 800276e: 64f9 str r1, [r7, #76] @ 0x4c + 8002770: 3230 adds r2, #48 @ 0x30 + 8002772: b2d2 uxtb r2, r2 + 8002774: 3358 adds r3, #88 @ 0x58 + 8002776: 443b add r3, r7 + 8002778: f803 2c3c strb.w r2, [r3, #-60] + intPart /= 10; + 800277c: 6d3b ldr r3, [r7, #80] @ 0x50 + 800277e: 4a50 ldr r2, [pc, #320] @ (80028c0 ) + 8002780: fb82 1203 smull r1, r2, r2, r3 + 8002784: 1092 asrs r2, r2, #2 + 8002786: 17db asrs r3, r3, #31 + 8002788: 1ad3 subs r3, r2, r3 + 800278a: 653b str r3, [r7, #80] @ 0x50 + while (intPart > 0) { + 800278c: 6d3b ldr r3, [r7, #80] @ 0x50 + 800278e: 2b00 cmp r3, #0 + 8002790: dcde bgt.n 8002750 + } + } + + // Inverter a parte inteira de volta para o buffer principal + for (int k = j - 1; k >= 0; k--) { + 8002792: 6cfb ldr r3, [r7, #76] @ 0x4c + 8002794: 3b01 subs r3, #1 + 8002796: 64bb str r3, [r7, #72] @ 0x48 + 8002798: e00e b.n 80027b8 + temp[i++] = intRev[k]; + 800279a: 6d7b ldr r3, [r7, #84] @ 0x54 + 800279c: 1c5a adds r2, r3, #1 + 800279e: 657a str r2, [r7, #84] @ 0x54 + 80027a0: f107 011c add.w r1, r7, #28 + 80027a4: 6cba ldr r2, [r7, #72] @ 0x48 + 80027a6: 440a add r2, r1 + 80027a8: 7812 ldrb r2, [r2, #0] + 80027aa: 3358 adds r3, #88 @ 0x58 + 80027ac: 443b add r3, r7 + 80027ae: f803 2c30 strb.w r2, [r3, #-48] + for (int k = j - 1; k >= 0; k--) { + 80027b2: 6cbb ldr r3, [r7, #72] @ 0x48 + 80027b4: 3b01 subs r3, #1 + 80027b6: 64bb str r3, [r7, #72] @ 0x48 + 80027b8: 6cbb ldr r3, [r7, #72] @ 0x48 + 80027ba: 2b00 cmp r3, #0 + 80027bc: daed bge.n 800279a + } + + // 4. Adicionar o ponto decimal e a parte fracionária (sempre 3 casas) + temp[i++] = '.'; + 80027be: 6d7b ldr r3, [r7, #84] @ 0x54 + 80027c0: 1c5a adds r2, r3, #1 + 80027c2: 657a str r2, [r7, #84] @ 0x54 + 80027c4: 3358 adds r3, #88 @ 0x58 + 80027c6: 443b add r3, r7 + 80027c8: 222e movs r2, #46 @ 0x2e + 80027ca: f803 2c30 strb.w r2, [r3, #-48] + + // Garantir que a parte fracionária tenha sempre 3 dígitos (ex: .005 em vez de .5) + int fracBuffer[3]; + fracBuffer[2] = fracPart % 10; // Unidade + 80027ce: 6bf9 ldr r1, [r7, #60] @ 0x3c + 80027d0: 4b3b ldr r3, [pc, #236] @ (80028c0 ) + 80027d2: fb83 2301 smull r2, r3, r3, r1 + 80027d6: 109a asrs r2, r3, #2 + 80027d8: 17cb asrs r3, r1, #31 + 80027da: 1ad2 subs r2, r2, r3 + 80027dc: 4613 mov r3, r2 + 80027de: 009b lsls r3, r3, #2 + 80027e0: 4413 add r3, r2 + 80027e2: 005b lsls r3, r3, #1 + 80027e4: 1aca subs r2, r1, r3 + 80027e6: 61ba str r2, [r7, #24] + fracBuffer[1] = (fracPart / 10) % 10; // Dezena + 80027e8: 6bfb ldr r3, [r7, #60] @ 0x3c + 80027ea: 4a35 ldr r2, [pc, #212] @ (80028c0 ) + 80027ec: fb82 1203 smull r1, r2, r2, r3 + 80027f0: 1092 asrs r2, r2, #2 + 80027f2: 17db asrs r3, r3, #31 + 80027f4: 1ad1 subs r1, r2, r3 + 80027f6: 4b32 ldr r3, [pc, #200] @ (80028c0 ) + 80027f8: fb83 2301 smull r2, r3, r3, r1 + 80027fc: 109a asrs r2, r3, #2 + 80027fe: 17cb asrs r3, r1, #31 + 8002800: 1ad2 subs r2, r2, r3 + 8002802: 4613 mov r3, r2 + 8002804: 009b lsls r3, r3, #2 + 8002806: 4413 add r3, r2 + 8002808: 005b lsls r3, r3, #1 + 800280a: 1aca subs r2, r1, r3 + 800280c: 617a str r2, [r7, #20] + fracBuffer[0] = (fracPart / 100) % 10; // Centena + 800280e: 6bfb ldr r3, [r7, #60] @ 0x3c + 8002810: 4a2c ldr r2, [pc, #176] @ (80028c4 ) + 8002812: fb82 1203 smull r1, r2, r2, r3 + 8002816: 1152 asrs r2, r2, #5 + 8002818: 17db asrs r3, r3, #31 + 800281a: 1ad1 subs r1, r2, r3 + 800281c: 4b28 ldr r3, [pc, #160] @ (80028c0 ) + 800281e: fb83 2301 smull r2, r3, r3, r1 + 8002822: 109a asrs r2, r3, #2 + 8002824: 17cb asrs r3, r1, #31 + 8002826: 1ad2 subs r2, r2, r3 + 8002828: 4613 mov r3, r2 + 800282a: 009b lsls r3, r3, #2 + 800282c: 4413 add r3, r2 + 800282e: 005b lsls r3, r3, #1 + 8002830: 1aca subs r2, r1, r3 + 8002832: 613a str r2, [r7, #16] + + for (int k = 0; k <= 2; k++) { + 8002834: 2300 movs r3, #0 + 8002836: 647b str r3, [r7, #68] @ 0x44 + 8002838: e012 b.n 8002860 + temp[i++] = fracBuffer[k] + '0'; + 800283a: 6c7b ldr r3, [r7, #68] @ 0x44 + 800283c: 009b lsls r3, r3, #2 + 800283e: 3358 adds r3, #88 @ 0x58 + 8002840: 443b add r3, r7 + 8002842: f853 3c48 ldr.w r3, [r3, #-72] + 8002846: b2da uxtb r2, r3 + 8002848: 6d7b ldr r3, [r7, #84] @ 0x54 + 800284a: 1c59 adds r1, r3, #1 + 800284c: 6579 str r1, [r7, #84] @ 0x54 + 800284e: 3230 adds r2, #48 @ 0x30 + 8002850: b2d2 uxtb r2, r2 + 8002852: 3358 adds r3, #88 @ 0x58 + 8002854: 443b add r3, r7 + 8002856: f803 2c30 strb.w r2, [r3, #-48] + for (int k = 0; k <= 2; k++) { + 800285a: 6c7b ldr r3, [r7, #68] @ 0x44 + 800285c: 3301 adds r3, #1 + 800285e: 647b str r3, [r7, #68] @ 0x44 + 8002860: 6c7b ldr r3, [r7, #68] @ 0x44 + 8002862: 2b02 cmp r3, #2 + 8002864: dde9 ble.n 800283a + } + + // 5. Finalizar a string com o caractere nulo + temp[i] = '\0'; + 8002866: f107 0228 add.w r2, r7, #40 @ 0x28 + 800286a: 6d7b ldr r3, [r7, #84] @ 0x54 + 800286c: 4413 add r3, r2 + 800286e: 2200 movs r2, #0 + 8002870: 701a strb r2, [r3, #0] + + // 6. Copiar para o buffer de destino final (sem risco de lixo) + int destIdx = 0; + 8002872: 2300 movs r3, #0 + 8002874: 643b str r3, [r7, #64] @ 0x40 + while (temp[destIdx] != '\0' && destIdx < 15) { // Limite de segurança + 8002876: e00b b.n 8002890 + buf[destIdx] = temp[destIdx]; + 8002878: 6c3b ldr r3, [r7, #64] @ 0x40 + 800287a: 68fa ldr r2, [r7, #12] + 800287c: 4413 add r3, r2 + 800287e: f107 0128 add.w r1, r7, #40 @ 0x28 + 8002882: 6c3a ldr r2, [r7, #64] @ 0x40 + 8002884: 440a add r2, r1 + 8002886: 7812 ldrb r2, [r2, #0] + 8002888: 701a strb r2, [r3, #0] + destIdx++; + 800288a: 6c3b ldr r3, [r7, #64] @ 0x40 + 800288c: 3301 adds r3, #1 + 800288e: 643b str r3, [r7, #64] @ 0x40 + while (temp[destIdx] != '\0' && destIdx < 15) { // Limite de segurança + 8002890: f107 0228 add.w r2, r7, #40 @ 0x28 + 8002894: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002896: 4413 add r3, r2 + 8002898: 781b ldrb r3, [r3, #0] + 800289a: 2b00 cmp r3, #0 + 800289c: d002 beq.n 80028a4 + 800289e: 6c3b ldr r3, [r7, #64] @ 0x40 + 80028a0: 2b0e cmp r3, #14 + 80028a2: dde9 ble.n 8002878 + } + buf[destIdx] = '\0'; + 80028a4: 6c3b ldr r3, [r7, #64] @ 0x40 + 80028a6: 68fa ldr r2, [r7, #12] + 80028a8: 4413 add r3, r2 + 80028aa: 2200 movs r2, #0 + 80028ac: 701a strb r2, [r3, #0] } + 80028ae: bf00 nop + 80028b0: 3758 adds r7, #88 @ 0x58 + 80028b2: 46bd mov sp, r7 + 80028b4: bdb0 pop {r4, r5, r7, pc} + 80028b6: bf00 nop + 80028b8: 408f4000 .word 0x408f4000 + 80028bc: 3fe00000 .word 0x3fe00000 + 80028c0: 66666667 .word 0x66666667 + 80028c4: 51eb851f .word 0x51eb851f + +080028c8 : void intToStr(int16_t N, uint8_t *str) { - 8001fbc: b480 push {r7} - 8001fbe: b087 sub sp, #28 - 8001fc0: af00 add r7, sp, #0 - 8001fc2: 4603 mov r3, r0 - 8001fc4: 6039 str r1, [r7, #0] - 8001fc6: 80fb strh r3, [r7, #6] + 80028c8: b480 push {r7} + 80028ca: b087 sub sp, #28 + 80028cc: af00 add r7, sp, #0 + 80028ce: 4603 mov r3, r0 + 80028d0: 6039 str r1, [r7, #0] + 80028d2: 80fb strh r3, [r7, #6] int16_t i = 0; - 8001fc8: 2300 movs r3, #0 - 8001fca: 82fb strh r3, [r7, #22] + 80028d4: 2300 movs r3, #0 + 80028d6: 82fb strh r3, [r7, #22] int16_t sign = N; - 8001fcc: 88fb ldrh r3, [r7, #6] - 8001fce: 823b strh r3, [r7, #16] + 80028d8: 88fb ldrh r3, [r7, #6] + 80028da: 823b strh r3, [r7, #16] uint8_t max_len = 15; // Tamanho máximo do buffer - 8001fd0: 230f movs r3, #15 - 8001fd2: 73fb strb r3, [r7, #15] + 80028dc: 230f movs r3, #15 + 80028de: 73fb strb r3, [r7, #15] uint8_t width = 4; // mínimo 4 caracteres - 8001fd4: 2304 movs r3, #4 - 8001fd6: 757b strb r3, [r7, #21] + 80028e0: 2304 movs r3, #4 + 80028e2: 757b strb r3, [r7, #21] // Trata o caso do número zero isoladamente if (N == 0) - 8001fd8: f9b7 3006 ldrsh.w r3, [r7, #6] - 8001fdc: 2b00 cmp r3, #0 - 8001fde: d127 bne.n 8002030 + 80028e4: f9b7 3006 ldrsh.w r3, [r7, #6] + 80028e8: 2b00 cmp r3, #0 + 80028ea: d127 bne.n 800293c { // Preenche com zeros à esquerda até atingir a largura desejada while (width > 1 && i < (max_len - 1)) - 8001fe0: e00c b.n 8001ffc + 80028ec: e00c b.n 8002908 { str[i++] = '0'; - 8001fe2: f9b7 2016 ldrsh.w r2, [r7, #22] - 8001fe6: b293 uxth r3, r2 - 8001fe8: 3301 adds r3, #1 - 8001fea: b29b uxth r3, r3 - 8001fec: 82fb strh r3, [r7, #22] - 8001fee: 683b ldr r3, [r7, #0] - 8001ff0: 4413 add r3, r2 - 8001ff2: 2230 movs r2, #48 @ 0x30 - 8001ff4: 701a strb r2, [r3, #0] + 80028ee: f9b7 2016 ldrsh.w r2, [r7, #22] + 80028f2: b293 uxth r3, r2 + 80028f4: 3301 adds r3, #1 + 80028f6: b29b uxth r3, r3 + 80028f8: 82fb strh r3, [r7, #22] + 80028fa: 683b ldr r3, [r7, #0] + 80028fc: 4413 add r3, r2 + 80028fe: 2230 movs r2, #48 @ 0x30 + 8002900: 701a strb r2, [r3, #0] width--; - 8001ff6: 7d7b ldrb r3, [r7, #21] - 8001ff8: 3b01 subs r3, #1 - 8001ffa: 757b strb r3, [r7, #21] + 8002902: 7d7b ldrb r3, [r7, #21] + 8002904: 3b01 subs r3, #1 + 8002906: 757b strb r3, [r7, #21] while (width > 1 && i < (max_len - 1)) - 8001ffc: 7d7b ldrb r3, [r7, #21] - 8001ffe: 2b01 cmp r3, #1 - 8002000: d905 bls.n 800200e - 8002002: f9b7 2016 ldrsh.w r2, [r7, #22] - 8002006: 7bfb ldrb r3, [r7, #15] - 8002008: 3b01 subs r3, #1 - 800200a: 429a cmp r2, r3 - 800200c: dbe9 blt.n 8001fe2 + 8002908: 7d7b ldrb r3, [r7, #21] + 800290a: 2b01 cmp r3, #1 + 800290c: d905 bls.n 800291a + 800290e: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002912: 7bfb ldrb r3, [r7, #15] + 8002914: 3b01 subs r3, #1 + 8002916: 429a cmp r2, r3 + 8002918: dbe9 blt.n 80028ee } str[i++] = '0'; - 800200e: f9b7 2016 ldrsh.w r2, [r7, #22] - 8002012: b293 uxth r3, r2 - 8002014: 3301 adds r3, #1 - 8002016: b29b uxth r3, r3 - 8002018: 82fb strh r3, [r7, #22] - 800201a: 683b ldr r3, [r7, #0] - 800201c: 4413 add r3, r2 - 800201e: 2230 movs r2, #48 @ 0x30 - 8002020: 701a strb r2, [r3, #0] + 800291a: f9b7 2016 ldrsh.w r2, [r7, #22] + 800291e: b293 uxth r3, r2 + 8002920: 3301 adds r3, #1 + 8002922: b29b uxth r3, r3 + 8002924: 82fb strh r3, [r7, #22] + 8002926: 683b ldr r3, [r7, #0] + 8002928: 4413 add r3, r2 + 800292a: 2230 movs r2, #48 @ 0x30 + 800292c: 701a strb r2, [r3, #0] str[i] = '\0'; - 8002022: f9b7 3016 ldrsh.w r3, [r7, #22] - 8002026: 683a ldr r2, [r7, #0] - 8002028: 4413 add r3, r2 - 800202a: 2200 movs r2, #0 - 800202c: 701a strb r2, [r3, #0] + 800292e: f9b7 3016 ldrsh.w r3, [r7, #22] + 8002932: 683a ldr r2, [r7, #0] + 8002934: 4413 add r3, r2 + 8002936: 2200 movs r2, #0 + 8002938: 701a strb r2, [r3, #0] return; - 800202e: e08a b.n 8002146 + 800293a: e08a b.n 8002a52 } if (N < 0) - 8002030: f9b7 3006 ldrsh.w r3, [r7, #6] - 8002034: 2b00 cmp r3, #0 - 8002036: da2d bge.n 8002094 + 800293c: f9b7 3006 ldrsh.w r3, [r7, #6] + 8002940: 2b00 cmp r3, #0 + 8002942: da2d bge.n 80029a0 N = -N; - 8002038: 88fb ldrh r3, [r7, #6] - 800203a: 425b negs r3, r3 - 800203c: b29b uxth r3, r3 - 800203e: 80fb strh r3, [r7, #6] + 8002944: 88fb ldrh r3, [r7, #6] + 8002946: 425b negs r3, r3 + 8002948: b29b uxth r3, r3 + 800294a: 80fb strh r3, [r7, #6] // Extração dos dígitos while (N > 0) - 8002040: e028 b.n 8002094 + 800294c: e028 b.n 80029a0 { if (i >= (max_len - 1)) - 8002042: f9b7 2016 ldrsh.w r2, [r7, #22] - 8002046: 7bfb ldrb r3, [r7, #15] - 8002048: 3b01 subs r3, #1 - 800204a: 429a cmp r2, r3 - 800204c: da27 bge.n 800209e + 800294e: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002952: 7bfb ldrb r3, [r7, #15] + 8002954: 3b01 subs r3, #1 + 8002956: 429a cmp r2, r3 + 8002958: da27 bge.n 80029aa break; // Proteção de estouro str[i++] = (N % 10) + '0'; - 800204e: f9b7 2006 ldrsh.w r2, [r7, #6] - 8002052: 4b3f ldr r3, [pc, #252] @ (8002150 ) - 8002054: fb83 1302 smull r1, r3, r3, r2 - 8002058: 1099 asrs r1, r3, #2 - 800205a: 17d3 asrs r3, r2, #31 - 800205c: 1ac9 subs r1, r1, r3 - 800205e: 460b mov r3, r1 - 8002060: 009b lsls r3, r3, #2 - 8002062: 440b add r3, r1 - 8002064: 005b lsls r3, r3, #1 - 8002066: 1ad3 subs r3, r2, r3 - 8002068: b21b sxth r3, r3 - 800206a: b2da uxtb r2, r3 - 800206c: f9b7 1016 ldrsh.w r1, [r7, #22] - 8002070: b28b uxth r3, r1 - 8002072: 3301 adds r3, #1 - 8002074: b29b uxth r3, r3 - 8002076: 82fb strh r3, [r7, #22] - 8002078: 683b ldr r3, [r7, #0] - 800207a: 440b add r3, r1 - 800207c: 3230 adds r2, #48 @ 0x30 - 800207e: b2d2 uxtb r2, r2 - 8002080: 701a strb r2, [r3, #0] + 800295a: f9b7 2006 ldrsh.w r2, [r7, #6] + 800295e: 4b3f ldr r3, [pc, #252] @ (8002a5c ) + 8002960: fb83 1302 smull r1, r3, r3, r2 + 8002964: 1099 asrs r1, r3, #2 + 8002966: 17d3 asrs r3, r2, #31 + 8002968: 1ac9 subs r1, r1, r3 + 800296a: 460b mov r3, r1 + 800296c: 009b lsls r3, r3, #2 + 800296e: 440b add r3, r1 + 8002970: 005b lsls r3, r3, #1 + 8002972: 1ad3 subs r3, r2, r3 + 8002974: b21b sxth r3, r3 + 8002976: b2da uxtb r2, r3 + 8002978: f9b7 1016 ldrsh.w r1, [r7, #22] + 800297c: b28b uxth r3, r1 + 800297e: 3301 adds r3, #1 + 8002980: b29b uxth r3, r3 + 8002982: 82fb strh r3, [r7, #22] + 8002984: 683b ldr r3, [r7, #0] + 8002986: 440b add r3, r1 + 8002988: 3230 adds r2, #48 @ 0x30 + 800298a: b2d2 uxtb r2, r2 + 800298c: 701a strb r2, [r3, #0] N /= 10; - 8002082: f9b7 3006 ldrsh.w r3, [r7, #6] - 8002086: 4a32 ldr r2, [pc, #200] @ (8002150 ) - 8002088: fb82 1203 smull r1, r2, r2, r3 - 800208c: 1092 asrs r2, r2, #2 - 800208e: 17db asrs r3, r3, #31 - 8002090: 1ad3 subs r3, r2, r3 - 8002092: 80fb strh r3, [r7, #6] + 800298e: f9b7 3006 ldrsh.w r3, [r7, #6] + 8002992: 4a32 ldr r2, [pc, #200] @ (8002a5c ) + 8002994: fb82 1203 smull r1, r2, r2, r3 + 8002998: 1092 asrs r2, r2, #2 + 800299a: 17db asrs r3, r3, #31 + 800299c: 1ad3 subs r3, r2, r3 + 800299e: 80fb strh r3, [r7, #6] while (N > 0) - 8002094: f9b7 3006 ldrsh.w r3, [r7, #6] - 8002098: 2b00 cmp r3, #0 - 800209a: dcd2 bgt.n 8002042 - 800209c: e000 b.n 80020a0 + 80029a0: f9b7 3006 ldrsh.w r3, [r7, #6] + 80029a4: 2b00 cmp r3, #0 + 80029a6: dcd2 bgt.n 800294e + 80029a8: e000 b.n 80029ac break; // Proteção de estouro - 800209e: bf00 nop + 80029aa: bf00 nop } // Adiciona o sinal de menos se necessário if (sign < 0) - 80020a0: f9b7 3010 ldrsh.w r3, [r7, #16] - 80020a4: 2b00 cmp r3, #0 - 80020a6: da1a bge.n 80020de + 80029ac: f9b7 3010 ldrsh.w r3, [r7, #16] + 80029b0: 2b00 cmp r3, #0 + 80029b2: da1a bge.n 80029ea { if (i < (max_len - 1)) - 80020a8: f9b7 2016 ldrsh.w r2, [r7, #22] - 80020ac: 7bfb ldrb r3, [r7, #15] - 80020ae: 3b01 subs r3, #1 - 80020b0: 429a cmp r2, r3 - 80020b2: da14 bge.n 80020de + 80029b4: f9b7 2016 ldrsh.w r2, [r7, #22] + 80029b8: 7bfb ldrb r3, [r7, #15] + 80029ba: 3b01 subs r3, #1 + 80029bc: 429a cmp r2, r3 + 80029be: da14 bge.n 80029ea str[i++] = '-'; - 80020b4: f9b7 2016 ldrsh.w r2, [r7, #22] - 80020b8: b293 uxth r3, r2 - 80020ba: 3301 adds r3, #1 - 80020bc: b29b uxth r3, r3 - 80020be: 82fb strh r3, [r7, #22] - 80020c0: 683b ldr r3, [r7, #0] - 80020c2: 4413 add r3, r2 - 80020c4: 222d movs r2, #45 @ 0x2d - 80020c6: 701a strb r2, [r3, #0] + 80029c0: f9b7 2016 ldrsh.w r2, [r7, #22] + 80029c4: b293 uxth r3, r2 + 80029c6: 3301 adds r3, #1 + 80029c8: b29b uxth r3, r3 + 80029ca: 82fb strh r3, [r7, #22] + 80029cc: 683b ldr r3, [r7, #0] + 80029ce: 4413 add r3, r2 + 80029d0: 222d movs r2, #45 @ 0x2d + 80029d2: 701a strb r2, [r3, #0] } // Preenche com zeros à esquerda (considerando o espaço ocupado pelos dígitos e sinal) while (i < width && i < (max_len - 1)) - 80020c8: e009 b.n 80020de + 80029d4: e009 b.n 80029ea { str[i++] = '0'; - 80020ca: f9b7 2016 ldrsh.w r2, [r7, #22] - 80020ce: b293 uxth r3, r2 - 80020d0: 3301 adds r3, #1 - 80020d2: b29b uxth r3, r3 - 80020d4: 82fb strh r3, [r7, #22] - 80020d6: 683b ldr r3, [r7, #0] - 80020d8: 4413 add r3, r2 - 80020da: 2230 movs r2, #48 @ 0x30 - 80020dc: 701a strb r2, [r3, #0] + 80029d6: f9b7 2016 ldrsh.w r2, [r7, #22] + 80029da: b293 uxth r3, r2 + 80029dc: 3301 adds r3, #1 + 80029de: b29b uxth r3, r3 + 80029e0: 82fb strh r3, [r7, #22] + 80029e2: 683b ldr r3, [r7, #0] + 80029e4: 4413 add r3, r2 + 80029e6: 2230 movs r2, #48 @ 0x30 + 80029e8: 701a strb r2, [r3, #0] while (i < width && i < (max_len - 1)) - 80020de: f9b7 2016 ldrsh.w r2, [r7, #22] - 80020e2: 7d7b ldrb r3, [r7, #21] - 80020e4: 429a cmp r2, r3 - 80020e6: da05 bge.n 80020f4 - 80020e8: f9b7 2016 ldrsh.w r2, [r7, #22] - 80020ec: 7bfb ldrb r3, [r7, #15] - 80020ee: 3b01 subs r3, #1 - 80020f0: 429a cmp r2, r3 - 80020f2: dbea blt.n 80020ca + 80029ea: f9b7 2016 ldrsh.w r2, [r7, #22] + 80029ee: 7d7b ldrb r3, [r7, #21] + 80029f0: 429a cmp r2, r3 + 80029f2: da05 bge.n 8002a00 + 80029f4: f9b7 2016 ldrsh.w r2, [r7, #22] + 80029f8: 7bfb ldrb r3, [r7, #15] + 80029fa: 3b01 subs r3, #1 + 80029fc: 429a cmp r2, r3 + 80029fe: dbea blt.n 80029d6 } str[i] = '\0'; - 80020f4: f9b7 3016 ldrsh.w r3, [r7, #22] - 80020f8: 683a ldr r2, [r7, #0] - 80020fa: 4413 add r3, r2 - 80020fc: 2200 movs r2, #0 - 80020fe: 701a strb r2, [r3, #0] + 8002a00: f9b7 3016 ldrsh.w r3, [r7, #22] + 8002a04: 683a ldr r2, [r7, #0] + 8002a06: 4413 add r3, r2 + 8002a08: 2200 movs r2, #0 + 8002a0a: 701a strb r2, [r3, #0] // Inverte a string para colocar na ordem correta for (uint8_t j = 0, k = i - 1; j < k; j++, k--) - 8002100: 2300 movs r3, #0 - 8002102: 753b strb r3, [r7, #20] - 8002104: 8afb ldrh r3, [r7, #22] - 8002106: b2db uxtb r3, r3 - 8002108: 3b01 subs r3, #1 - 800210a: 74fb strb r3, [r7, #19] - 800210c: e017 b.n 800213e + 8002a0c: 2300 movs r3, #0 + 8002a0e: 753b strb r3, [r7, #20] + 8002a10: 8afb ldrh r3, [r7, #22] + 8002a12: b2db uxtb r3, r3 + 8002a14: 3b01 subs r3, #1 + 8002a16: 74fb strb r3, [r7, #19] + 8002a18: e017 b.n 8002a4a { uint8_t temp = str[j]; - 800210e: 7d3b ldrb r3, [r7, #20] - 8002110: 683a ldr r2, [r7, #0] - 8002112: 4413 add r3, r2 - 8002114: 781b ldrb r3, [r3, #0] - 8002116: 73bb strb r3, [r7, #14] + 8002a1a: 7d3b ldrb r3, [r7, #20] + 8002a1c: 683a ldr r2, [r7, #0] + 8002a1e: 4413 add r3, r2 + 8002a20: 781b ldrb r3, [r3, #0] + 8002a22: 73bb strb r3, [r7, #14] str[j] = str[k]; - 8002118: 7cfb ldrb r3, [r7, #19] - 800211a: 683a ldr r2, [r7, #0] - 800211c: 441a add r2, r3 - 800211e: 7d3b ldrb r3, [r7, #20] - 8002120: 6839 ldr r1, [r7, #0] - 8002122: 440b add r3, r1 - 8002124: 7812 ldrb r2, [r2, #0] - 8002126: 701a strb r2, [r3, #0] + 8002a24: 7cfb ldrb r3, [r7, #19] + 8002a26: 683a ldr r2, [r7, #0] + 8002a28: 441a add r2, r3 + 8002a2a: 7d3b ldrb r3, [r7, #20] + 8002a2c: 6839 ldr r1, [r7, #0] + 8002a2e: 440b add r3, r1 + 8002a30: 7812 ldrb r2, [r2, #0] + 8002a32: 701a strb r2, [r3, #0] str[k] = temp; - 8002128: 7cfb ldrb r3, [r7, #19] - 800212a: 683a ldr r2, [r7, #0] - 800212c: 4413 add r3, r2 - 800212e: 7bba ldrb r2, [r7, #14] - 8002130: 701a strb r2, [r3, #0] + 8002a34: 7cfb ldrb r3, [r7, #19] + 8002a36: 683a ldr r2, [r7, #0] + 8002a38: 4413 add r3, r2 + 8002a3a: 7bba ldrb r2, [r7, #14] + 8002a3c: 701a strb r2, [r3, #0] for (uint8_t j = 0, k = i - 1; j < k; j++, k--) - 8002132: 7d3b ldrb r3, [r7, #20] - 8002134: 3301 adds r3, #1 - 8002136: 753b strb r3, [r7, #20] - 8002138: 7cfb ldrb r3, [r7, #19] - 800213a: 3b01 subs r3, #1 - 800213c: 74fb strb r3, [r7, #19] - 800213e: 7d3a ldrb r2, [r7, #20] - 8002140: 7cfb ldrb r3, [r7, #19] - 8002142: 429a cmp r2, r3 - 8002144: d3e3 bcc.n 800210e + 8002a3e: 7d3b ldrb r3, [r7, #20] + 8002a40: 3301 adds r3, #1 + 8002a42: 753b strb r3, [r7, #20] + 8002a44: 7cfb ldrb r3, [r7, #19] + 8002a46: 3b01 subs r3, #1 + 8002a48: 74fb strb r3, [r7, #19] + 8002a4a: 7d3a ldrb r2, [r7, #20] + 8002a4c: 7cfb ldrb r3, [r7, #19] + 8002a4e: 429a cmp r2, r3 + 8002a50: d3e3 bcc.n 8002a1a } } - 8002146: 371c adds r7, #28 - 8002148: 46bd mov sp, r7 - 800214a: bc80 pop {r7} - 800214c: 4770 bx lr - 800214e: bf00 nop - 8002150: 66666667 .word 0x66666667 + 8002a52: 371c adds r7, #28 + 8002a54: 46bd mov sp, r7 + 8002a56: bc80 pop {r7} + 8002a58: 4770 bx lr + 8002a5a: bf00 nop + 8002a5c: 66666667 .word 0x66666667 + +08002a60 : +} -08002154 : /* TIM3 Timer Interrupt */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - 8002154: b480 push {r7} - 8002156: b083 sub sp, #12 - 8002158: af00 add r7, sp, #0 - 800215a: 6078 str r0, [r7, #4] + 8002a60: b480 push {r7} + 8002a62: b083 sub sp, #12 + 8002a64: af00 add r7, sp, #0 + 8002a66: 6078 str r0, [r7, #4] if (htim->Instance == TIM3) - 800215c: 687b ldr r3, [r7, #4] - 800215e: 681b ldr r3, [r3, #0] - 8002160: 4a06 ldr r2, [pc, #24] @ (800217c ) - 8002162: 4293 cmp r3, r2 - 8002164: d104 bne.n 8002170 + 8002a68: 687b ldr r3, [r7, #4] + 8002a6a: 681b ldr r3, [r3, #0] + 8002a6c: 4a06 ldr r2, [pc, #24] @ (8002a88 ) + 8002a6e: 4293 cmp r3, r2 + 8002a70: d104 bne.n 8002a7c { g_ms_counter++; /* Relógio global do sistema */ - 8002166: 4b06 ldr r3, [pc, #24] @ (8002180 ) - 8002168: 681b ldr r3, [r3, #0] - 800216a: 3301 adds r3, #1 - 800216c: 4a04 ldr r2, [pc, #16] @ (8002180 ) - 800216e: 6013 str r3, [r2, #0] + 8002a72: 4b06 ldr r3, [pc, #24] @ (8002a8c ) + 8002a74: 681b ldr r3, [r3, #0] + 8002a76: 3301 adds r3, #1 + 8002a78: 4a04 ldr r2, [pc, #16] @ (8002a8c ) + 8002a7a: 6013 str r3, [r2, #0] } } - 8002170: bf00 nop - 8002172: 370c adds r7, #12 - 8002174: 46bd mov sp, r7 - 8002176: bc80 pop {r7} - 8002178: 4770 bx lr - 800217a: bf00 nop - 800217c: 40000400 .word 0x40000400 - 8002180: 20000080 .word 0x20000080 + 8002a7c: bf00 nop + 8002a7e: 370c adds r7, #12 + 8002a80: 46bd mov sp, r7 + 8002a82: bc80 pop {r7} + 8002a84: 4770 bx lr + 8002a86: bf00 nop + 8002a88: 40000400 .word 0x40000400 + 8002a8c: 20000084 .word 0x20000084 -08002184 : +08002a90 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 8002184: b480 push {r7} - 8002186: af00 add r7, sp, #0 + 8002a90: b480 push {r7} + 8002a92: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 8002188: b672 cpsid i + 8002a94: b672 cpsid i } - 800218a: bf00 nop + 8002a96: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 800218c: bf00 nop - 800218e: e7fd b.n 800218c + 8002a98: bf00 nop + 8002a9a: e7fd b.n 8002a98 -08002190 : +08002a9c : * @rmtoll IDR IDy LL_GPIO_ReadInputPort * @param GPIOx GPIO Port * @retval Input data register value of port */ __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx) { - 8002190: b480 push {r7} - 8002192: b083 sub sp, #12 - 8002194: af00 add r7, sp, #0 - 8002196: 6078 str r0, [r7, #4] + 8002a9c: b480 push {r7} + 8002a9e: b083 sub sp, #12 + 8002aa0: af00 add r7, sp, #0 + 8002aa2: 6078 str r0, [r7, #4] return (READ_REG(GPIOx->IDR)); - 8002198: 687b ldr r3, [r7, #4] - 800219a: 689b ldr r3, [r3, #8] + 8002aa4: 687b ldr r3, [r7, #4] + 8002aa6: 689b ldr r3, [r3, #8] } - 800219c: 4618 mov r0, r3 - 800219e: 370c adds r7, #12 - 80021a0: 46bd mov sp, r7 - 80021a2: bc80 pop {r7} - 80021a4: 4770 bx lr + 8002aa8: 4618 mov r0, r3 + 8002aaa: 370c adds r7, #12 + 8002aac: 46bd mov sp, r7 + 8002aae: bc80 pop {r7} + 8002ab0: 4770 bx lr ... -080021a8 : +08002ab4 : /** * @brief Initializes the RS-485 driver. * @note This function configures GPIOs for address detection and USART1 for communication. */ void rs485_init(void) { - 80021a8: b580 push {r7, lr} - 80021aa: af00 add r7, sp, #0 + 8002ab4: b580 push {r7, lr} + 8002ab6: af00 add r7, sp, #0 /* Configure GPIOs for address detection */ rs485_configure_gpio_address(); - 80021ac: f000 f864 bl 8002278 + 8002ab8: f000 f864 bl 8002b84 /* Configure USART1 for RS-485 communication */ rs485_configure_usart1(); - 80021b0: f000 f8a8 bl 8002304 + 8002abc: f000 f8a8 bl 8002c10 /* Get the current device address from GPIOs */ device_address.full_address = rs485_get_address(); - 80021b4: f000 f808 bl 80021c8 - 80021b8: 4603 mov r3, r0 - 80021ba: 461a mov r2, r3 - 80021bc: 4b01 ldr r3, [pc, #4] @ (80021c4 ) - 80021be: 709a strb r2, [r3, #2] + 8002ac0: f000 f808 bl 8002ad4 + 8002ac4: 4603 mov r3, r0 + 8002ac6: 461a mov r2, r3 + 8002ac8: 4b01 ldr r3, [pc, #4] @ (8002ad0 ) + 8002aca: 709a strb r2, [r3, #2] } - 80021c0: bf00 nop - 80021c2: bd80 pop {r7, pc} - 80021c4: 200002c4 .word 0x200002c4 + 8002acc: bf00 nop + 8002ace: bd80 pop {r7, pc} + 8002ad0: 200002c0 .word 0x200002c0 -080021c8 : +08002ad4 : /** * @brief Gets the current device address from GPIOs. * @return The 8-bit device address. */ uint8_t rs485_get_address(void) { - 80021c8: b598 push {r3, r4, r7, lr} - 80021ca: af00 add r7, sp, #0 + 8002ad4: b598 push {r3, r4, r7, lr} + 8002ad6: af00 add r7, sp, #0 return ((uint8_t) ((((LL_GPIO_ReadInputPort(GPIOB) & RS485_ADDR_MASK_HIGH)>>RS485_ADDR_BIT_SET_HIGH) | (LL_GPIO_ReadInputPort(GPIOA) & RS485_ADDR_MASK_LOW)>>RS485_ADDR_BIT_SET_LOW))); - 80021cc: 480a ldr r0, [pc, #40] @ (80021f8 ) - 80021ce: f7ff ffdf bl 8002190 - 80021d2: 4603 mov r3, r0 - 80021d4: 0a1b lsrs r3, r3, #8 - 80021d6: b2db uxtb r3, r3 - 80021d8: f023 030f bic.w r3, r3, #15 - 80021dc: b2dc uxtb r4, r3 - 80021de: 4807 ldr r0, [pc, #28] @ (80021fc ) - 80021e0: f7ff ffd6 bl 8002190 - 80021e4: 4603 mov r3, r0 - 80021e6: 089b lsrs r3, r3, #2 - 80021e8: b2db uxtb r3, r3 - 80021ea: f003 030f and.w r3, r3, #15 - 80021ee: b2db uxtb r3, r3 - 80021f0: 4323 orrs r3, r4 - 80021f2: b2db uxtb r3, r3 + 8002ad8: 480a ldr r0, [pc, #40] @ (8002b04 ) + 8002ada: f7ff ffdf bl 8002a9c + 8002ade: 4603 mov r3, r0 + 8002ae0: 0a1b lsrs r3, r3, #8 + 8002ae2: b2db uxtb r3, r3 + 8002ae4: f023 030f bic.w r3, r3, #15 + 8002ae8: b2dc uxtb r4, r3 + 8002aea: 4807 ldr r0, [pc, #28] @ (8002b08 ) + 8002aec: f7ff ffd6 bl 8002a9c + 8002af0: 4603 mov r3, r0 + 8002af2: 089b lsrs r3, r3, #2 + 8002af4: b2db uxtb r3, r3 + 8002af6: f003 030f and.w r3, r3, #15 + 8002afa: b2db uxtb r3, r3 + 8002afc: 4323 orrs r3, r4 + 8002afe: b2db uxtb r3, r3 } - 80021f4: 4618 mov r0, r3 - 80021f6: bd98 pop {r3, r4, r7, pc} - 80021f8: 40010c00 .word 0x40010c00 - 80021fc: 40010800 .word 0x40010800 + 8002b00: 4618 mov r0, r3 + 8002b02: bd98 pop {r3, r4, r7, pc} + 8002b04: 40010c00 .word 0x40010c00 + 8002b08: 40010800 .word 0x40010800 -08002200 : +08002b0c : * @param data Pointer to the data buffer. * @param length Number of bytes to send. * @retval HAL_OK on success, otherwise error code. */ HAL_StatusTypeDef rs485_send_broadcast(uint8_t* data, uint16_t length) { - 8002200: b580 push {r7, lr} - 8002202: b084 sub sp, #16 - 8002204: af00 add r7, sp, #0 - 8002206: 6078 str r0, [r7, #4] - 8002208: 460b mov r3, r1 - 800220a: 807b strh r3, [r7, #2] + 8002b0c: b580 push {r7, lr} + 8002b0e: b084 sub sp, #16 + 8002b10: af00 add r7, sp, #0 + 8002b12: 6078 str r0, [r7, #4] + 8002b14: 460b mov r3, r1 + 8002b16: 807b strh r3, [r7, #2] /* Enable transmission mode */ rs485_enable_tx(); - 800220c: f000 f81c bl 8002248 + 8002b18: f000 f81c bl 8002b54 /* Send the broadcast address (0x00) first */ uint8_t broadcast_address = 0x00; - 8002210: 2300 movs r3, #0 - 8002212: 73bb strb r3, [r7, #14] + 8002b1c: 2300 movs r3, #0 + 8002b1e: 73bb strb r3, [r7, #14] HAL_UART_Transmit(&huart1, &broadcast_address, 1, HAL_MAX_DELAY); - 8002214: f107 010e add.w r1, r7, #14 - 8002218: f04f 33ff mov.w r3, #4294967295 - 800221c: 2201 movs r2, #1 - 800221e: 4809 ldr r0, [pc, #36] @ (8002244 ) - 8002220: f003 f978 bl 8005514 + 8002b20: f107 010e add.w r1, r7, #14 + 8002b24: f04f 33ff mov.w r3, #4294967295 + 8002b28: 2201 movs r2, #1 + 8002b2a: 4809 ldr r0, [pc, #36] @ (8002b50 ) + 8002b2c: f003 f99c bl 8005e68 /* Send the data */ HAL_StatusTypeDef status = HAL_UART_Transmit(&huart1, data, length, HAL_MAX_DELAY); - 8002224: 887a ldrh r2, [r7, #2] - 8002226: f04f 33ff mov.w r3, #4294967295 - 800222a: 6879 ldr r1, [r7, #4] - 800222c: 4805 ldr r0, [pc, #20] @ (8002244 ) - 800222e: f003 f971 bl 8005514 - 8002232: 4603 mov r3, r0 - 8002234: 73fb strb r3, [r7, #15] + 8002b30: 887a ldrh r2, [r7, #2] + 8002b32: f04f 33ff mov.w r3, #4294967295 + 8002b36: 6879 ldr r1, [r7, #4] + 8002b38: 4805 ldr r0, [pc, #20] @ (8002b50 ) + 8002b3a: f003 f995 bl 8005e68 + 8002b3e: 4603 mov r3, r0 + 8002b40: 73fb strb r3, [r7, #15] /* Disable transmission mode after sending */ rs485_disable_tx(); - 8002236: f000 f813 bl 8002260 + 8002b42: f000 f813 bl 8002b6c return status; - 800223a: 7bfb ldrb r3, [r7, #15] + 8002b46: 7bfb ldrb r3, [r7, #15] } - 800223c: 4618 mov r0, r3 - 800223e: 3710 adds r7, #16 - 8002240: 46bd mov sp, r7 - 8002242: bd80 pop {r7, pc} - 8002244: 200002c8 .word 0x200002c8 + 8002b48: 4618 mov r0, r3 + 8002b4a: 3710 adds r7, #16 + 8002b4c: 46bd mov sp, r7 + 8002b4e: bd80 pop {r7, pc} + 8002b50: 200002c4 .word 0x200002c4 -08002248 : +08002b54 : /** * @brief Enables transmission mode on RS-485 transceiver. */ void rs485_enable_tx(void) { - 8002248: b580 push {r7, lr} - 800224a: af00 add r7, sp, #0 + 8002b54: b580 push {r7, lr} + 8002b56: af00 add r7, sp, #0 /* Set TX EN pin high to enable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_SET); - 800224c: 2201 movs r2, #1 - 800224e: f44f 5180 mov.w r1, #4096 @ 0x1000 - 8002252: 4802 ldr r0, [pc, #8] @ (800225c ) - 8002254: f000 ffef bl 8003236 + 8002b58: 2201 movs r2, #1 + 8002b5a: f44f 5180 mov.w r1, #4096 @ 0x1000 + 8002b5e: 4802 ldr r0, [pc, #8] @ (8002b68 ) + 8002b60: f001 f813 bl 8003b8a } - 8002258: bf00 nop - 800225a: bd80 pop {r7, pc} - 800225c: 40010800 .word 0x40010800 + 8002b64: bf00 nop + 8002b66: bd80 pop {r7, pc} + 8002b68: 40010800 .word 0x40010800 -08002260 : +08002b6c : /** * @brief Disables transmission mode on RS-485 transceiver. */ void rs485_disable_tx(void) { - 8002260: b580 push {r7, lr} - 8002262: af00 add r7, sp, #0 + 8002b6c: b580 push {r7, lr} + 8002b6e: af00 add r7, sp, #0 /* Set TX EN pin low to disable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_RESET); - 8002264: 2200 movs r2, #0 - 8002266: f44f 5180 mov.w r1, #4096 @ 0x1000 - 800226a: 4802 ldr r0, [pc, #8] @ (8002274 ) - 800226c: f000 ffe3 bl 8003236 + 8002b70: 2200 movs r2, #0 + 8002b72: f44f 5180 mov.w r1, #4096 @ 0x1000 + 8002b76: 4802 ldr r0, [pc, #8] @ (8002b80 ) + 8002b78: f001 f807 bl 8003b8a } - 8002270: bf00 nop - 8002272: bd80 pop {r7, pc} - 8002274: 40010800 .word 0x40010800 + 8002b7c: bf00 nop + 8002b7e: bd80 pop {r7, pc} + 8002b80: 40010800 .word 0x40010800 -08002278 : +08002b84 : /** * @brief Configures GPIOs for address detection. */ static void rs485_configure_gpio_address(void) { - 8002278: b580 push {r7, lr} - 800227a: b086 sub sp, #24 - 800227c: af00 add r7, sp, #0 + 8002b84: b580 push {r7, lr} + 8002b86: b086 sub sp, #24 + 8002b88: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800227e: f107 0308 add.w r3, r7, #8 - 8002282: 2200 movs r2, #0 - 8002284: 601a str r2, [r3, #0] - 8002286: 605a str r2, [r3, #4] - 8002288: 609a str r2, [r3, #8] - 800228a: 60da str r2, [r3, #12] + 8002b8a: f107 0308 add.w r3, r7, #8 + 8002b8e: 2200 movs r2, #0 + 8002b90: 601a str r2, [r3, #0] + 8002b92: 605a str r2, [r3, #4] + 8002b94: 609a str r2, [r3, #8] + 8002b96: 60da str r2, [r3, #12] /* Enable clock for GPIOA and GPIOB */ __HAL_RCC_GPIOA_CLK_ENABLE(); - 800228c: 4b1a ldr r3, [pc, #104] @ (80022f8 ) - 800228e: 699b ldr r3, [r3, #24] - 8002290: 4a19 ldr r2, [pc, #100] @ (80022f8 ) - 8002292: f043 0304 orr.w r3, r3, #4 - 8002296: 6193 str r3, [r2, #24] - 8002298: 4b17 ldr r3, [pc, #92] @ (80022f8 ) - 800229a: 699b ldr r3, [r3, #24] - 800229c: f003 0304 and.w r3, r3, #4 - 80022a0: 607b str r3, [r7, #4] - 80022a2: 687b ldr r3, [r7, #4] + 8002b98: 4b1a ldr r3, [pc, #104] @ (8002c04 ) + 8002b9a: 699b ldr r3, [r3, #24] + 8002b9c: 4a19 ldr r2, [pc, #100] @ (8002c04 ) + 8002b9e: f043 0304 orr.w r3, r3, #4 + 8002ba2: 6193 str r3, [r2, #24] + 8002ba4: 4b17 ldr r3, [pc, #92] @ (8002c04 ) + 8002ba6: 699b ldr r3, [r3, #24] + 8002ba8: f003 0304 and.w r3, r3, #4 + 8002bac: 607b str r3, [r7, #4] + 8002bae: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); - 80022a4: 4b14 ldr r3, [pc, #80] @ (80022f8 ) - 80022a6: 699b ldr r3, [r3, #24] - 80022a8: 4a13 ldr r2, [pc, #76] @ (80022f8 ) - 80022aa: f043 0308 orr.w r3, r3, #8 - 80022ae: 6193 str r3, [r2, #24] - 80022b0: 4b11 ldr r3, [pc, #68] @ (80022f8 ) - 80022b2: 699b ldr r3, [r3, #24] - 80022b4: f003 0308 and.w r3, r3, #8 - 80022b8: 603b str r3, [r7, #0] - 80022ba: 683b ldr r3, [r7, #0] + 8002bb0: 4b14 ldr r3, [pc, #80] @ (8002c04 ) + 8002bb2: 699b ldr r3, [r3, #24] + 8002bb4: 4a13 ldr r2, [pc, #76] @ (8002c04 ) + 8002bb6: f043 0308 orr.w r3, r3, #8 + 8002bba: 6193 str r3, [r2, #24] + 8002bbc: 4b11 ldr r3, [pc, #68] @ (8002c04 ) + 8002bbe: 699b ldr r3, [r3, #24] + 8002bc0: f003 0308 and.w r3, r3, #8 + 8002bc4: 603b str r3, [r7, #0] + 8002bc6: 683b ldr r3, [r7, #0] /* Configure PA2-PA5 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; - 80022bc: 233c movs r3, #60 @ 0x3c - 80022be: 60bb str r3, [r7, #8] + 8002bc8: 233c movs r3, #60 @ 0x3c + 8002bca: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80022c0: 2300 movs r3, #0 - 80022c2: 60fb str r3, [r7, #12] + 8002bcc: 2300 movs r3, #0 + 8002bce: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; - 80022c4: 2301 movs r3, #1 - 80022c6: 613b str r3, [r7, #16] + 8002bd0: 2301 movs r3, #1 + 8002bd2: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80022c8: f107 0308 add.w r3, r7, #8 - 80022cc: 4619 mov r1, r3 - 80022ce: 480b ldr r0, [pc, #44] @ (80022fc ) - 80022d0: f000 fe16 bl 8002f00 + 8002bd4: f107 0308 add.w r3, r7, #8 + 8002bd8: 4619 mov r1, r3 + 8002bda: 480b ldr r0, [pc, #44] @ (8002c08 ) + 8002bdc: f000 fe3a bl 8003854 /* Configure PB12-PB15 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15; - 80022d4: f44f 4370 mov.w r3, #61440 @ 0xf000 - 80022d8: 60bb str r3, [r7, #8] + 8002be0: f44f 4370 mov.w r3, #61440 @ 0xf000 + 8002be4: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80022da: 2300 movs r3, #0 - 80022dc: 60fb str r3, [r7, #12] + 8002be6: 2300 movs r3, #0 + 8002be8: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; - 80022de: 2301 movs r3, #1 - 80022e0: 613b str r3, [r7, #16] + 8002bea: 2301 movs r3, #1 + 8002bec: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80022e2: f107 0308 add.w r3, r7, #8 - 80022e6: 4619 mov r1, r3 - 80022e8: 4805 ldr r0, [pc, #20] @ (8002300 ) - 80022ea: f000 fe09 bl 8002f00 + 8002bee: f107 0308 add.w r3, r7, #8 + 8002bf2: 4619 mov r1, r3 + 8002bf4: 4805 ldr r0, [pc, #20] @ (8002c0c ) + 8002bf6: f000 fe2d bl 8003854 } - 80022ee: bf00 nop - 80022f0: 3718 adds r7, #24 - 80022f2: 46bd mov sp, r7 - 80022f4: bd80 pop {r7, pc} - 80022f6: bf00 nop - 80022f8: 40021000 .word 0x40021000 - 80022fc: 40010800 .word 0x40010800 - 8002300: 40010c00 .word 0x40010c00 + 8002bfa: bf00 nop + 8002bfc: 3718 adds r7, #24 + 8002bfe: 46bd mov sp, r7 + 8002c00: bd80 pop {r7, pc} + 8002c02: bf00 nop + 8002c04: 40021000 .word 0x40021000 + 8002c08: 40010800 .word 0x40010800 + 8002c0c: 40010c00 .word 0x40010c00 -08002304 : +08002c10 : /** * @brief Configures USART1 for RS-485 communication. */ static void rs485_configure_usart1(void) { - 8002304: b580 push {r7, lr} - 8002306: b082 sub sp, #8 - 8002308: af00 add r7, sp, #0 + 8002c10: b580 push {r7, lr} + 8002c12: b082 sub sp, #8 + 8002c14: af00 add r7, sp, #0 /* Enable clock for USART1 */ __HAL_RCC_USART1_CLK_ENABLE(); - 800230a: 4b18 ldr r3, [pc, #96] @ (800236c ) - 800230c: 699b ldr r3, [r3, #24] - 800230e: 4a17 ldr r2, [pc, #92] @ (800236c ) - 8002310: f443 4380 orr.w r3, r3, #16384 @ 0x4000 - 8002314: 6193 str r3, [r2, #24] - 8002316: 4b15 ldr r3, [pc, #84] @ (800236c ) - 8002318: 699b ldr r3, [r3, #24] - 800231a: f403 4380 and.w r3, r3, #16384 @ 0x4000 - 800231e: 607b str r3, [r7, #4] - 8002320: 687b ldr r3, [r7, #4] + 8002c16: 4b18 ldr r3, [pc, #96] @ (8002c78 ) + 8002c18: 699b ldr r3, [r3, #24] + 8002c1a: 4a17 ldr r2, [pc, #92] @ (8002c78 ) + 8002c1c: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 8002c20: 6193 str r3, [r2, #24] + 8002c22: 4b15 ldr r3, [pc, #84] @ (8002c78 ) + 8002c24: 699b ldr r3, [r3, #24] + 8002c26: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 8002c2a: 607b str r3, [r7, #4] + 8002c2c: 687b ldr r3, [r7, #4] huart1.Instance = USART1; - 8002322: 4b13 ldr r3, [pc, #76] @ (8002370 ) - 8002324: 4a13 ldr r2, [pc, #76] @ (8002374 ) - 8002326: 601a str r2, [r3, #0] + 8002c2e: 4b13 ldr r3, [pc, #76] @ (8002c7c ) + 8002c30: 4a13 ldr r2, [pc, #76] @ (8002c80 ) + 8002c32: 601a str r2, [r3, #0] huart1.Init.BaudRate = 9600; /*!< Default baud rate for RS-485 */ - 8002328: 4b11 ldr r3, [pc, #68] @ (8002370 ) - 800232a: f44f 5216 mov.w r2, #9600 @ 0x2580 - 800232e: 605a str r2, [r3, #4] + 8002c34: 4b11 ldr r3, [pc, #68] @ (8002c7c ) + 8002c36: f44f 5216 mov.w r2, #9600 @ 0x2580 + 8002c3a: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8002330: 4b0f ldr r3, [pc, #60] @ (8002370 ) - 8002332: 2200 movs r2, #0 - 8002334: 609a str r2, [r3, #8] + 8002c3c: 4b0f ldr r3, [pc, #60] @ (8002c7c ) + 8002c3e: 2200 movs r2, #0 + 8002c40: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 8002336: 4b0e ldr r3, [pc, #56] @ (8002370 ) - 8002338: 2200 movs r2, #0 - 800233a: 60da str r2, [r3, #12] + 8002c42: 4b0e ldr r3, [pc, #56] @ (8002c7c ) + 8002c44: 2200 movs r2, #0 + 8002c46: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 800233c: 4b0c ldr r3, [pc, #48] @ (8002370 ) - 800233e: 2200 movs r2, #0 - 8002340: 611a str r2, [r3, #16] + 8002c48: 4b0c ldr r3, [pc, #48] @ (8002c7c ) + 8002c4a: 2200 movs r2, #0 + 8002c4c: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 8002342: 4b0b ldr r3, [pc, #44] @ (8002370 ) - 8002344: 220c movs r2, #12 - 8002346: 615a str r2, [r3, #20] + 8002c4e: 4b0b ldr r3, [pc, #44] @ (8002c7c ) + 8002c50: 220c movs r2, #12 + 8002c52: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; /*!< Use NONE as TX enable */ - 8002348: 4b09 ldr r3, [pc, #36] @ (8002370 ) - 800234a: 2200 movs r2, #0 - 800234c: 619a str r2, [r3, #24] + 8002c54: 4b09 ldr r3, [pc, #36] @ (8002c7c ) + 8002c56: 2200 movs r2, #0 + 8002c58: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 800234e: 4b08 ldr r3, [pc, #32] @ (8002370 ) - 8002350: 2200 movs r2, #0 - 8002352: 61da str r2, [r3, #28] + 8002c5a: 4b08 ldr r3, [pc, #32] @ (8002c7c ) + 8002c5c: 2200 movs r2, #0 + 8002c5e: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) - 8002354: 4806 ldr r0, [pc, #24] @ (8002370 ) - 8002356: f003 f88d bl 8005474 - 800235a: 4603 mov r3, r0 - 800235c: 2b00 cmp r3, #0 - 800235e: d001 beq.n 8002364 + 8002c60: 4806 ldr r0, [pc, #24] @ (8002c7c ) + 8002c62: f003 f8b1 bl 8005dc8 + 8002c66: 4603 mov r3, r0 + 8002c68: 2b00 cmp r3, #0 + 8002c6a: d001 beq.n 8002c70 { /* Initialization Error */ while(1); - 8002360: bf00 nop - 8002362: e7fd b.n 8002360 + 8002c6c: bf00 nop + 8002c6e: e7fd b.n 8002c6c } } - 8002364: bf00 nop - 8002366: 3708 adds r7, #8 - 8002368: 46bd mov sp, r7 - 800236a: bd80 pop {r7, pc} - 800236c: 40021000 .word 0x40021000 - 8002370: 200002c8 .word 0x200002c8 - 8002374: 40013800 .word 0x40013800 + 8002c70: bf00 nop + 8002c72: 3708 adds r7, #8 + 8002c74: 46bd mov sp, r7 + 8002c76: bd80 pop {r7, pc} + 8002c78: 40021000 .word 0x40021000 + 8002c7c: 200002c4 .word 0x200002c4 + 8002c80: 40013800 .word 0x40013800 -08002378 : +08002c84 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8002378: b480 push {r7} - 800237a: b085 sub sp, #20 - 800237c: af00 add r7, sp, #0 + 8002c84: b480 push {r7} + 8002c86: b085 sub sp, #20 + 8002c88: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); - 800237e: 4b15 ldr r3, [pc, #84] @ (80023d4 ) - 8002380: 699b ldr r3, [r3, #24] - 8002382: 4a14 ldr r2, [pc, #80] @ (80023d4 ) - 8002384: f043 0301 orr.w r3, r3, #1 - 8002388: 6193 str r3, [r2, #24] - 800238a: 4b12 ldr r3, [pc, #72] @ (80023d4 ) - 800238c: 699b ldr r3, [r3, #24] - 800238e: f003 0301 and.w r3, r3, #1 - 8002392: 60bb str r3, [r7, #8] - 8002394: 68bb ldr r3, [r7, #8] + 8002c8a: 4b15 ldr r3, [pc, #84] @ (8002ce0 ) + 8002c8c: 699b ldr r3, [r3, #24] + 8002c8e: 4a14 ldr r2, [pc, #80] @ (8002ce0 ) + 8002c90: f043 0301 orr.w r3, r3, #1 + 8002c94: 6193 str r3, [r2, #24] + 8002c96: 4b12 ldr r3, [pc, #72] @ (8002ce0 ) + 8002c98: 699b ldr r3, [r3, #24] + 8002c9a: f003 0301 and.w r3, r3, #1 + 8002c9e: 60bb str r3, [r7, #8] + 8002ca0: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); - 8002396: 4b0f ldr r3, [pc, #60] @ (80023d4 ) - 8002398: 69db ldr r3, [r3, #28] - 800239a: 4a0e ldr r2, [pc, #56] @ (80023d4 ) - 800239c: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 80023a0: 61d3 str r3, [r2, #28] - 80023a2: 4b0c ldr r3, [pc, #48] @ (80023d4 ) - 80023a4: 69db ldr r3, [r3, #28] - 80023a6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 80023aa: 607b str r3, [r7, #4] - 80023ac: 687b ldr r3, [r7, #4] + 8002ca2: 4b0f ldr r3, [pc, #60] @ (8002ce0 ) + 8002ca4: 69db ldr r3, [r3, #28] + 8002ca6: 4a0e ldr r2, [pc, #56] @ (8002ce0 ) + 8002ca8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8002cac: 61d3 str r3, [r2, #28] + 8002cae: 4b0c ldr r3, [pc, #48] @ (8002ce0 ) + 8002cb0: 69db ldr r3, [r3, #28] + 8002cb2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8002cb6: 607b str r3, [r7, #4] + 8002cb8: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); - 80023ae: 4b0a ldr r3, [pc, #40] @ (80023d8 ) - 80023b0: 685b ldr r3, [r3, #4] - 80023b2: 60fb str r3, [r7, #12] - 80023b4: 68fb ldr r3, [r7, #12] - 80023b6: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 - 80023ba: 60fb str r3, [r7, #12] - 80023bc: 68fb ldr r3, [r7, #12] - 80023be: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 - 80023c2: 60fb str r3, [r7, #12] - 80023c4: 4a04 ldr r2, [pc, #16] @ (80023d8 ) - 80023c6: 68fb ldr r3, [r7, #12] - 80023c8: 6053 str r3, [r2, #4] + 8002cba: 4b0a ldr r3, [pc, #40] @ (8002ce4 ) + 8002cbc: 685b ldr r3, [r3, #4] + 8002cbe: 60fb str r3, [r7, #12] + 8002cc0: 68fb ldr r3, [r7, #12] + 8002cc2: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 + 8002cc6: 60fb str r3, [r7, #12] + 8002cc8: 68fb ldr r3, [r7, #12] + 8002cca: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 + 8002cce: 60fb str r3, [r7, #12] + 8002cd0: 4a04 ldr r2, [pc, #16] @ (8002ce4 ) + 8002cd2: 68fb ldr r3, [r7, #12] + 8002cd4: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 80023ca: bf00 nop - 80023cc: 3714 adds r7, #20 - 80023ce: 46bd mov sp, r7 - 80023d0: bc80 pop {r7} - 80023d2: 4770 bx lr - 80023d4: 40021000 .word 0x40021000 - 80023d8: 40010000 .word 0x40010000 + 8002cd6: bf00 nop + 8002cd8: 3714 adds r7, #20 + 8002cda: 46bd mov sp, r7 + 8002cdc: bc80 pop {r7} + 8002cde: 4770 bx lr + 8002ce0: 40021000 .word 0x40021000 + 8002ce4: 40010000 .word 0x40010000 -080023dc : +08002ce8 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 80023dc: b480 push {r7} - 80023de: af00 add r7, sp, #0 + 8002ce8: b480 push {r7} + 8002cea: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 80023e0: bf00 nop - 80023e2: e7fd b.n 80023e0 + 8002cec: bf00 nop + 8002cee: e7fd b.n 8002cec -080023e4 : +08002cf0 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 80023e4: b480 push {r7} - 80023e6: af00 add r7, sp, #0 + 8002cf0: b480 push {r7} + 8002cf2: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 80023e8: bf00 nop - 80023ea: e7fd b.n 80023e8 + 8002cf4: bf00 nop + 8002cf6: e7fd b.n 8002cf4 -080023ec : +08002cf8 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 80023ec: b480 push {r7} - 80023ee: af00 add r7, sp, #0 + 8002cf8: b480 push {r7} + 8002cfa: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 80023f0: bf00 nop - 80023f2: e7fd b.n 80023f0 + 8002cfc: bf00 nop + 8002cfe: e7fd b.n 8002cfc -080023f4 : +08002d00 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { - 80023f4: b480 push {r7} - 80023f6: af00 add r7, sp, #0 + 8002d00: b480 push {r7} + 8002d02: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 80023f8: bf00 nop - 80023fa: e7fd b.n 80023f8 + 8002d04: bf00 nop + 8002d06: e7fd b.n 8002d04 -080023fc : +08002d08 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 80023fc: b480 push {r7} - 80023fe: af00 add r7, sp, #0 + 8002d08: b480 push {r7} + 8002d0a: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 8002400: bf00 nop - 8002402: e7fd b.n 8002400 + 8002d0c: bf00 nop + 8002d0e: e7fd b.n 8002d0c -08002404 : +08002d10 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8002404: b480 push {r7} - 8002406: af00 add r7, sp, #0 + 8002d10: b480 push {r7} + 8002d12: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 8002408: bf00 nop - 800240a: 46bd mov sp, r7 - 800240c: bc80 pop {r7} - 800240e: 4770 bx lr + 8002d14: bf00 nop + 8002d16: 46bd mov sp, r7 + 8002d18: bc80 pop {r7} + 8002d1a: 4770 bx lr -08002410 : +08002d1c : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 8002410: b480 push {r7} - 8002412: af00 add r7, sp, #0 + 8002d1c: b480 push {r7} + 8002d1e: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 8002414: bf00 nop - 8002416: 46bd mov sp, r7 - 8002418: bc80 pop {r7} - 800241a: 4770 bx lr + 8002d20: bf00 nop + 8002d22: 46bd mov sp, r7 + 8002d24: bc80 pop {r7} + 8002d26: 4770 bx lr -0800241c : +08002d28 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 800241c: b480 push {r7} - 800241e: af00 add r7, sp, #0 + 8002d28: b480 push {r7} + 8002d2a: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8002420: bf00 nop - 8002422: 46bd mov sp, r7 - 8002424: bc80 pop {r7} - 8002426: 4770 bx lr + 8002d2c: bf00 nop + 8002d2e: 46bd mov sp, r7 + 8002d30: bc80 pop {r7} + 8002d32: 4770 bx lr -08002428 : +08002d34 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8002428: b580 push {r7, lr} - 800242a: af00 add r7, sp, #0 + 8002d34: b580 push {r7, lr} + 8002d36: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 800242c: f000 f97a bl 8002724 + 8002d38: f000 f97a bl 8003030 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8002430: bf00 nop - 8002432: bd80 pop {r7, pc} + 8002d3c: bf00 nop + 8002d3e: bd80 pop {r7, pc} -08002434 : +08002d40 : /** * @brief This function handles TIM3 global interrupt. */ void TIM3_IRQHandler(void) { - 8002434: b580 push {r7, lr} - 8002436: af00 add r7, sp, #0 + 8002d40: b580 push {r7, lr} + 8002d42: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_IRQn 0 */ /* USER CODE END TIM3_IRQn 0 */ HAL_TIM_IRQHandler(&htim3); - 8002438: 4802 ldr r0, [pc, #8] @ (8002444 ) - 800243a: f002 fccb bl 8004dd4 + 8002d44: 4802 ldr r0, [pc, #8] @ (8002d50 ) + 8002d46: f002 fcef bl 8005728 /* USER CODE BEGIN TIM3_IRQn 1 */ /* USER CODE END TIM3_IRQn 1 */ } - 800243e: bf00 nop - 8002440: bd80 pop {r7, pc} - 8002442: bf00 nop - 8002444: 20000310 .word 0x20000310 + 8002d4a: bf00 nop + 8002d4c: bd80 pop {r7, pc} + 8002d4e: bf00 nop + 8002d50: 2000030c .word 0x2000030c -08002448 : +08002d54 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { - 8002448: b580 push {r7, lr} - 800244a: af00 add r7, sp, #0 + 8002d54: b580 push {r7, lr} + 8002d56: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); - 800244c: 4802 ldr r0, [pc, #8] @ (8002458 ) - 800244e: f003 f8ed bl 800562c + 8002d58: 4802 ldr r0, [pc, #8] @ (8002d64 ) + 8002d5a: f003 f911 bl 8005f80 /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } - 8002452: bf00 nop - 8002454: bd80 pop {r7, pc} - 8002456: bf00 nop - 8002458: 20000358 .word 0x20000358 + 8002d5e: bf00 nop + 8002d60: bd80 pop {r7, pc} + 8002d62: bf00 nop + 8002d64: 20000354 .word 0x20000354 -0800245c : +08002d68 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { - 800245c: b480 push {r7} - 800245e: af00 add r7, sp, #0 + 8002d68: b480 push {r7} + 8002d6a: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } - 8002460: bf00 nop - 8002462: 46bd mov sp, r7 - 8002464: bc80 pop {r7} - 8002466: 4770 bx lr + 8002d6c: bf00 nop + 8002d6e: 46bd mov sp, r7 + 8002d70: bc80 pop {r7} + 8002d72: 4770 bx lr -08002468 : +08002d74 : TIM_HandleTypeDef htim3; /* TIM3 init function */ void MX_TIM3_Init(void) { - 8002468: b580 push {r7, lr} - 800246a: b086 sub sp, #24 - 800246c: af00 add r7, sp, #0 + 8002d74: b580 push {r7, lr} + 8002d76: b086 sub sp, #24 + 8002d78: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_Init 0 */ /* USER CODE END TIM3_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 800246e: f107 0308 add.w r3, r7, #8 - 8002472: 2200 movs r2, #0 - 8002474: 601a str r2, [r3, #0] - 8002476: 605a str r2, [r3, #4] - 8002478: 609a str r2, [r3, #8] - 800247a: 60da str r2, [r3, #12] + 8002d7a: f107 0308 add.w r3, r7, #8 + 8002d7e: 2200 movs r2, #0 + 8002d80: 601a str r2, [r3, #0] + 8002d82: 605a str r2, [r3, #4] + 8002d84: 609a str r2, [r3, #8] + 8002d86: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; - 800247c: 463b mov r3, r7 - 800247e: 2200 movs r2, #0 - 8002480: 601a str r2, [r3, #0] - 8002482: 605a str r2, [r3, #4] + 8002d88: 463b mov r3, r7 + 8002d8a: 2200 movs r2, #0 + 8002d8c: 601a str r2, [r3, #0] + 8002d8e: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM3_Init 1 */ /* USER CODE END TIM3_Init 1 */ htim3.Instance = TIM3; - 8002484: 4b1d ldr r3, [pc, #116] @ (80024fc ) - 8002486: 4a1e ldr r2, [pc, #120] @ (8002500 ) - 8002488: 601a str r2, [r3, #0] + 8002d90: 4b1d ldr r3, [pc, #116] @ (8002e08 ) + 8002d92: 4a1e ldr r2, [pc, #120] @ (8002e0c ) + 8002d94: 601a str r2, [r3, #0] htim3.Init.Prescaler = 2; - 800248a: 4b1c ldr r3, [pc, #112] @ (80024fc ) - 800248c: 2202 movs r2, #2 - 800248e: 605a str r2, [r3, #4] + 8002d96: 4b1c ldr r3, [pc, #112] @ (8002e08 ) + 8002d98: 2202 movs r2, #2 + 8002d9a: 605a str r2, [r3, #4] htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - 8002490: 4b1a ldr r3, [pc, #104] @ (80024fc ) - 8002492: 2200 movs r2, #0 - 8002494: 609a str r2, [r3, #8] + 8002d9c: 4b1a ldr r3, [pc, #104] @ (8002e08 ) + 8002d9e: 2200 movs r2, #0 + 8002da0: 609a str r2, [r3, #8] htim3.Init.Period = 999; - 8002496: 4b19 ldr r3, [pc, #100] @ (80024fc ) - 8002498: f240 32e7 movw r2, #999 @ 0x3e7 - 800249c: 60da str r2, [r3, #12] + 8002da2: 4b19 ldr r3, [pc, #100] @ (8002e08 ) + 8002da4: f240 32e7 movw r2, #999 @ 0x3e7 + 8002da8: 60da str r2, [r3, #12] htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 800249e: 4b17 ldr r3, [pc, #92] @ (80024fc ) - 80024a0: 2200 movs r2, #0 - 80024a2: 611a str r2, [r3, #16] + 8002daa: 4b17 ldr r3, [pc, #92] @ (8002e08 ) + 8002dac: 2200 movs r2, #0 + 8002dae: 611a str r2, [r3, #16] htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 80024a4: 4b15 ldr r3, [pc, #84] @ (80024fc ) - 80024a6: 2280 movs r2, #128 @ 0x80 - 80024a8: 619a str r2, [r3, #24] + 8002db0: 4b15 ldr r3, [pc, #84] @ (8002e08 ) + 8002db2: 2280 movs r2, #128 @ 0x80 + 8002db4: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim3) != HAL_OK) - 80024aa: 4814 ldr r0, [pc, #80] @ (80024fc ) - 80024ac: f002 fbf0 bl 8004c90 - 80024b0: 4603 mov r3, r0 - 80024b2: 2b00 cmp r3, #0 - 80024b4: d001 beq.n 80024ba + 8002db6: 4814 ldr r0, [pc, #80] @ (8002e08 ) + 8002db8: f002 fc14 bl 80055e4 + 8002dbc: 4603 mov r3, r0 + 8002dbe: 2b00 cmp r3, #0 + 8002dc0: d001 beq.n 8002dc6 { Error_Handler(); - 80024b6: f7ff fe65 bl 8002184 + 8002dc2: f7ff fe65 bl 8002a90 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 80024ba: f44f 5380 mov.w r3, #4096 @ 0x1000 - 80024be: 60bb str r3, [r7, #8] + 8002dc6: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8002dca: 60bb str r3, [r7, #8] if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) - 80024c0: f107 0308 add.w r3, r7, #8 - 80024c4: 4619 mov r1, r3 - 80024c6: 480d ldr r0, [pc, #52] @ (80024fc ) - 80024c8: f002 fd74 bl 8004fb4 - 80024cc: 4603 mov r3, r0 - 80024ce: 2b00 cmp r3, #0 - 80024d0: d001 beq.n 80024d6 + 8002dcc: f107 0308 add.w r3, r7, #8 + 8002dd0: 4619 mov r1, r3 + 8002dd2: 480d ldr r0, [pc, #52] @ (8002e08 ) + 8002dd4: f002 fd98 bl 8005908 + 8002dd8: 4603 mov r3, r0 + 8002dda: 2b00 cmp r3, #0 + 8002ddc: d001 beq.n 8002de2 { Error_Handler(); - 80024d2: f7ff fe57 bl 8002184 + 8002dde: f7ff fe57 bl 8002a90 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 80024d6: 2300 movs r3, #0 - 80024d8: 603b str r3, [r7, #0] + 8002de2: 2300 movs r3, #0 + 8002de4: 603b str r3, [r7, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 80024da: 2300 movs r3, #0 - 80024dc: 607b str r3, [r7, #4] + 8002de6: 2300 movs r3, #0 + 8002de8: 607b str r3, [r7, #4] if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - 80024de: 463b mov r3, r7 - 80024e0: 4619 mov r1, r3 - 80024e2: 4806 ldr r0, [pc, #24] @ (80024fc ) - 80024e4: f002 ff56 bl 8005394 - 80024e8: 4603 mov r3, r0 - 80024ea: 2b00 cmp r3, #0 - 80024ec: d001 beq.n 80024f2 + 8002dea: 463b mov r3, r7 + 8002dec: 4619 mov r1, r3 + 8002dee: 4806 ldr r0, [pc, #24] @ (8002e08 ) + 8002df0: f002 ff7a bl 8005ce8 + 8002df4: 4603 mov r3, r0 + 8002df6: 2b00 cmp r3, #0 + 8002df8: d001 beq.n 8002dfe { Error_Handler(); - 80024ee: f7ff fe49 bl 8002184 + 8002dfa: f7ff fe49 bl 8002a90 } /* USER CODE BEGIN TIM3_Init 2 */ /* USER CODE END TIM3_Init 2 */ } - 80024f2: bf00 nop - 80024f4: 3718 adds r7, #24 - 80024f6: 46bd mov sp, r7 - 80024f8: bd80 pop {r7, pc} - 80024fa: bf00 nop - 80024fc: 20000310 .word 0x20000310 - 8002500: 40000400 .word 0x40000400 + 8002dfe: bf00 nop + 8002e00: 3718 adds r7, #24 + 8002e02: 46bd mov sp, r7 + 8002e04: bd80 pop {r7, pc} + 8002e06: bf00 nop + 8002e08: 2000030c .word 0x2000030c + 8002e0c: 40000400 .word 0x40000400 -08002504 : +08002e10 : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { - 8002504: b580 push {r7, lr} - 8002506: b084 sub sp, #16 - 8002508: af00 add r7, sp, #0 - 800250a: 6078 str r0, [r7, #4] + 8002e10: b580 push {r7, lr} + 8002e12: b084 sub sp, #16 + 8002e14: af00 add r7, sp, #0 + 8002e16: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM3) - 800250c: 687b ldr r3, [r7, #4] - 800250e: 681b ldr r3, [r3, #0] - 8002510: 4a0d ldr r2, [pc, #52] @ (8002548 ) - 8002512: 4293 cmp r3, r2 - 8002514: d113 bne.n 800253e + 8002e18: 687b ldr r3, [r7, #4] + 8002e1a: 681b ldr r3, [r3, #0] + 8002e1c: 4a0d ldr r2, [pc, #52] @ (8002e54 ) + 8002e1e: 4293 cmp r3, r2 + 8002e20: d113 bne.n 8002e4a { /* USER CODE BEGIN TIM3_MspInit 0 */ /* USER CODE END TIM3_MspInit 0 */ /* TIM3 clock enable */ __HAL_RCC_TIM3_CLK_ENABLE(); - 8002516: 4b0d ldr r3, [pc, #52] @ (800254c ) - 8002518: 69db ldr r3, [r3, #28] - 800251a: 4a0c ldr r2, [pc, #48] @ (800254c ) - 800251c: f043 0302 orr.w r3, r3, #2 - 8002520: 61d3 str r3, [r2, #28] - 8002522: 4b0a ldr r3, [pc, #40] @ (800254c ) - 8002524: 69db ldr r3, [r3, #28] - 8002526: f003 0302 and.w r3, r3, #2 - 800252a: 60fb str r3, [r7, #12] - 800252c: 68fb ldr r3, [r7, #12] + 8002e22: 4b0d ldr r3, [pc, #52] @ (8002e58 ) + 8002e24: 69db ldr r3, [r3, #28] + 8002e26: 4a0c ldr r2, [pc, #48] @ (8002e58 ) + 8002e28: f043 0302 orr.w r3, r3, #2 + 8002e2c: 61d3 str r3, [r2, #28] + 8002e2e: 4b0a ldr r3, [pc, #40] @ (8002e58 ) + 8002e30: 69db ldr r3, [r3, #28] + 8002e32: f003 0302 and.w r3, r3, #2 + 8002e36: 60fb str r3, [r7, #12] + 8002e38: 68fb ldr r3, [r7, #12] /* TIM3 interrupt Init */ HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0); - 800252e: 2200 movs r2, #0 - 8002530: 2100 movs r1, #0 - 8002532: 201d movs r0, #29 - 8002534: f000 fbfb bl 8002d2e + 8002e3a: 2200 movs r2, #0 + 8002e3c: 2100 movs r1, #0 + 8002e3e: 201d movs r0, #29 + 8002e40: f000 fc1f bl 8003682 HAL_NVIC_EnableIRQ(TIM3_IRQn); - 8002538: 201d movs r0, #29 - 800253a: f000 fc14 bl 8002d66 + 8002e44: 201d movs r0, #29 + 8002e46: f000 fc38 bl 80036ba /* USER CODE BEGIN TIM3_MspInit 1 */ /* USER CODE END TIM3_MspInit 1 */ } } - 800253e: bf00 nop - 8002540: 3710 adds r7, #16 - 8002542: 46bd mov sp, r7 - 8002544: bd80 pop {r7, pc} - 8002546: bf00 nop - 8002548: 40000400 .word 0x40000400 - 800254c: 40021000 .word 0x40021000 + 8002e4a: bf00 nop + 8002e4c: 3710 adds r7, #16 + 8002e4e: 46bd mov sp, r7 + 8002e50: bd80 pop {r7, pc} + 8002e52: bf00 nop + 8002e54: 40000400 .word 0x40000400 + 8002e58: 40021000 .word 0x40021000 -08002550 : +08002e5c : UART_HandleTypeDef huart1; /* USART1 init function */ void MX_USART1_UART_Init(void) { - 8002550: b580 push {r7, lr} - 8002552: af00 add r7, sp, #0 + 8002e5c: b580 push {r7, lr} + 8002e5e: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; - 8002554: 4b11 ldr r3, [pc, #68] @ (800259c ) - 8002556: 4a12 ldr r2, [pc, #72] @ (80025a0 ) - 8002558: 601a str r2, [r3, #0] + 8002e60: 4b11 ldr r3, [pc, #68] @ (8002ea8 ) + 8002e62: 4a12 ldr r2, [pc, #72] @ (8002eac ) + 8002e64: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; - 800255a: 4b10 ldr r3, [pc, #64] @ (800259c ) - 800255c: f44f 32e1 mov.w r2, #115200 @ 0x1c200 - 8002560: 605a str r2, [r3, #4] + 8002e66: 4b10 ldr r3, [pc, #64] @ (8002ea8 ) + 8002e68: f44f 32e1 mov.w r2, #115200 @ 0x1c200 + 8002e6c: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8002562: 4b0e ldr r3, [pc, #56] @ (800259c ) - 8002564: 2200 movs r2, #0 - 8002566: 609a str r2, [r3, #8] + 8002e6e: 4b0e ldr r3, [pc, #56] @ (8002ea8 ) + 8002e70: 2200 movs r2, #0 + 8002e72: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 8002568: 4b0c ldr r3, [pc, #48] @ (800259c ) - 800256a: 2200 movs r2, #0 - 800256c: 60da str r2, [r3, #12] + 8002e74: 4b0c ldr r3, [pc, #48] @ (8002ea8 ) + 8002e76: 2200 movs r2, #0 + 8002e78: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 800256e: 4b0b ldr r3, [pc, #44] @ (800259c ) - 8002570: 2200 movs r2, #0 - 8002572: 611a str r2, [r3, #16] + 8002e7a: 4b0b ldr r3, [pc, #44] @ (8002ea8 ) + 8002e7c: 2200 movs r2, #0 + 8002e7e: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 8002574: 4b09 ldr r3, [pc, #36] @ (800259c ) - 8002576: 220c movs r2, #12 - 8002578: 615a str r2, [r3, #20] + 8002e80: 4b09 ldr r3, [pc, #36] @ (8002ea8 ) + 8002e82: 220c movs r2, #12 + 8002e84: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 800257a: 4b08 ldr r3, [pc, #32] @ (800259c ) - 800257c: 2200 movs r2, #0 - 800257e: 619a str r2, [r3, #24] + 8002e86: 4b08 ldr r3, [pc, #32] @ (8002ea8 ) + 8002e88: 2200 movs r2, #0 + 8002e8a: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8002580: 4b06 ldr r3, [pc, #24] @ (800259c ) - 8002582: 2200 movs r2, #0 - 8002584: 61da str r2, [r3, #28] + 8002e8c: 4b06 ldr r3, [pc, #24] @ (8002ea8 ) + 8002e8e: 2200 movs r2, #0 + 8002e90: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) - 8002586: 4805 ldr r0, [pc, #20] @ (800259c ) - 8002588: f002 ff74 bl 8005474 - 800258c: 4603 mov r3, r0 - 800258e: 2b00 cmp r3, #0 - 8002590: d001 beq.n 8002596 + 8002e92: 4805 ldr r0, [pc, #20] @ (8002ea8 ) + 8002e94: f002 ff98 bl 8005dc8 + 8002e98: 4603 mov r3, r0 + 8002e9a: 2b00 cmp r3, #0 + 8002e9c: d001 beq.n 8002ea2 { Error_Handler(); - 8002592: f7ff fdf7 bl 8002184 + 8002e9e: f7ff fdf7 bl 8002a90 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } - 8002596: bf00 nop - 8002598: bd80 pop {r7, pc} - 800259a: bf00 nop - 800259c: 20000358 .word 0x20000358 - 80025a0: 40013800 .word 0x40013800 + 8002ea2: bf00 nop + 8002ea4: bd80 pop {r7, pc} + 8002ea6: bf00 nop + 8002ea8: 20000354 .word 0x20000354 + 8002eac: 40013800 .word 0x40013800 -080025a4 : +08002eb0 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { - 80025a4: b580 push {r7, lr} - 80025a6: b088 sub sp, #32 - 80025a8: af00 add r7, sp, #0 - 80025aa: 6078 str r0, [r7, #4] + 8002eb0: b580 push {r7, lr} + 8002eb2: b088 sub sp, #32 + 8002eb4: af00 add r7, sp, #0 + 8002eb6: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80025ac: f107 0310 add.w r3, r7, #16 - 80025b0: 2200 movs r2, #0 - 80025b2: 601a str r2, [r3, #0] - 80025b4: 605a str r2, [r3, #4] - 80025b6: 609a str r2, [r3, #8] - 80025b8: 60da str r2, [r3, #12] + 8002eb8: f107 0310 add.w r3, r7, #16 + 8002ebc: 2200 movs r2, #0 + 8002ebe: 601a str r2, [r3, #0] + 8002ec0: 605a str r2, [r3, #4] + 8002ec2: 609a str r2, [r3, #8] + 8002ec4: 60da str r2, [r3, #12] if(uartHandle->Instance==USART1) - 80025ba: 687b ldr r3, [r7, #4] - 80025bc: 681b ldr r3, [r3, #0] - 80025be: 4a20 ldr r2, [pc, #128] @ (8002640 ) - 80025c0: 4293 cmp r3, r2 - 80025c2: d139 bne.n 8002638 + 8002ec6: 687b ldr r3, [r7, #4] + 8002ec8: 681b ldr r3, [r3, #0] + 8002eca: 4a20 ldr r2, [pc, #128] @ (8002f4c ) + 8002ecc: 4293 cmp r3, r2 + 8002ece: d139 bne.n 8002f44 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* USART1 clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); - 80025c4: 4b1f ldr r3, [pc, #124] @ (8002644 ) - 80025c6: 699b ldr r3, [r3, #24] - 80025c8: 4a1e ldr r2, [pc, #120] @ (8002644 ) - 80025ca: f443 4380 orr.w r3, r3, #16384 @ 0x4000 - 80025ce: 6193 str r3, [r2, #24] - 80025d0: 4b1c ldr r3, [pc, #112] @ (8002644 ) - 80025d2: 699b ldr r3, [r3, #24] - 80025d4: f403 4380 and.w r3, r3, #16384 @ 0x4000 - 80025d8: 60fb str r3, [r7, #12] - 80025da: 68fb ldr r3, [r7, #12] + 8002ed0: 4b1f ldr r3, [pc, #124] @ (8002f50 ) + 8002ed2: 699b ldr r3, [r3, #24] + 8002ed4: 4a1e ldr r2, [pc, #120] @ (8002f50 ) + 8002ed6: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 8002eda: 6193 str r3, [r2, #24] + 8002edc: 4b1c ldr r3, [pc, #112] @ (8002f50 ) + 8002ede: 699b ldr r3, [r3, #24] + 8002ee0: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 8002ee4: 60fb str r3, [r7, #12] + 8002ee6: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80025dc: 4b19 ldr r3, [pc, #100] @ (8002644 ) - 80025de: 699b ldr r3, [r3, #24] - 80025e0: 4a18 ldr r2, [pc, #96] @ (8002644 ) - 80025e2: f043 0304 orr.w r3, r3, #4 - 80025e6: 6193 str r3, [r2, #24] - 80025e8: 4b16 ldr r3, [pc, #88] @ (8002644 ) - 80025ea: 699b ldr r3, [r3, #24] - 80025ec: f003 0304 and.w r3, r3, #4 - 80025f0: 60bb str r3, [r7, #8] - 80025f2: 68bb ldr r3, [r7, #8] + 8002ee8: 4b19 ldr r3, [pc, #100] @ (8002f50 ) + 8002eea: 699b ldr r3, [r3, #24] + 8002eec: 4a18 ldr r2, [pc, #96] @ (8002f50 ) + 8002eee: f043 0304 orr.w r3, r3, #4 + 8002ef2: 6193 str r3, [r2, #24] + 8002ef4: 4b16 ldr r3, [pc, #88] @ (8002f50 ) + 8002ef6: 699b ldr r3, [r3, #24] + 8002ef8: f003 0304 and.w r3, r3, #4 + 8002efc: 60bb str r3, [r7, #8] + 8002efe: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = TX_RS485_Pin; - 80025f4: f44f 7300 mov.w r3, #512 @ 0x200 - 80025f8: 613b str r3, [r7, #16] + 8002f00: f44f 7300 mov.w r3, #512 @ 0x200 + 8002f04: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80025fa: 2302 movs r3, #2 - 80025fc: 617b str r3, [r7, #20] + 8002f06: 2302 movs r3, #2 + 8002f08: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; - 80025fe: 2301 movs r3, #1 - 8002600: 61fb str r3, [r7, #28] + 8002f0a: 2301 movs r3, #1 + 8002f0c: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_RS485_GPIO_Port, &GPIO_InitStruct); - 8002602: f107 0310 add.w r3, r7, #16 - 8002606: 4619 mov r1, r3 - 8002608: 480f ldr r0, [pc, #60] @ (8002648 ) - 800260a: f000 fc79 bl 8002f00 + 8002f0e: f107 0310 add.w r3, r7, #16 + 8002f12: 4619 mov r1, r3 + 8002f14: 480f ldr r0, [pc, #60] @ (8002f54 ) + 8002f16: f000 fc9d bl 8003854 GPIO_InitStruct.Pin = RX_RS485_Pin; - 800260e: f44f 6380 mov.w r3, #1024 @ 0x400 - 8002612: 613b str r3, [r7, #16] + 8002f1a: f44f 6380 mov.w r3, #1024 @ 0x400 + 8002f1e: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002614: 2300 movs r3, #0 - 8002616: 617b str r3, [r7, #20] + 8002f20: 2300 movs r3, #0 + 8002f22: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002618: 2300 movs r3, #0 - 800261a: 61bb str r3, [r7, #24] + 8002f24: 2300 movs r3, #0 + 8002f26: 61bb str r3, [r7, #24] HAL_GPIO_Init(RX_RS485_GPIO_Port, &GPIO_InitStruct); - 800261c: f107 0310 add.w r3, r7, #16 - 8002620: 4619 mov r1, r3 - 8002622: 4809 ldr r0, [pc, #36] @ (8002648 ) - 8002624: f000 fc6c bl 8002f00 + 8002f28: f107 0310 add.w r3, r7, #16 + 8002f2c: 4619 mov r1, r3 + 8002f2e: 4809 ldr r0, [pc, #36] @ (8002f54 ) + 8002f30: f000 fc90 bl 8003854 /* USART1 interrupt Init */ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); - 8002628: 2200 movs r2, #0 - 800262a: 2100 movs r1, #0 - 800262c: 2025 movs r0, #37 @ 0x25 - 800262e: f000 fb7e bl 8002d2e + 8002f34: 2200 movs r2, #0 + 8002f36: 2100 movs r1, #0 + 8002f38: 2025 movs r0, #37 @ 0x25 + 8002f3a: f000 fba2 bl 8003682 HAL_NVIC_EnableIRQ(USART1_IRQn); - 8002632: 2025 movs r0, #37 @ 0x25 - 8002634: f000 fb97 bl 8002d66 + 8002f3e: 2025 movs r0, #37 @ 0x25 + 8002f40: f000 fbbb bl 80036ba /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } - 8002638: bf00 nop - 800263a: 3720 adds r7, #32 - 800263c: 46bd mov sp, r7 - 800263e: bd80 pop {r7, pc} - 8002640: 40013800 .word 0x40013800 - 8002644: 40021000 .word 0x40021000 - 8002648: 40010800 .word 0x40010800 + 8002f44: bf00 nop + 8002f46: 3720 adds r7, #32 + 8002f48: 46bd mov sp, r7 + 8002f4a: bd80 pop {r7, pc} + 8002f4c: 40013800 .word 0x40013800 + 8002f50: 40021000 .word 0x40021000 + 8002f54: 40010800 .word 0x40010800 -0800264c : +08002f58 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit - 800264c: f7ff ff06 bl 800245c + 8002f58: f7ff ff06 bl 8002d68 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8002650: 480b ldr r0, [pc, #44] @ (8002680 ) + 8002f5c: 480b ldr r0, [pc, #44] @ (8002f8c ) ldr r1, =_edata - 8002652: 490c ldr r1, [pc, #48] @ (8002684 ) + 8002f5e: 490c ldr r1, [pc, #48] @ (8002f90 ) ldr r2, =_sidata - 8002654: 4a0c ldr r2, [pc, #48] @ (8002688 ) + 8002f60: 4a0c ldr r2, [pc, #48] @ (8002f94 ) movs r3, #0 - 8002656: 2300 movs r3, #0 + 8002f62: 2300 movs r3, #0 b LoopCopyDataInit - 8002658: e002 b.n 8002660 + 8002f64: e002 b.n 8002f6c -0800265a : +08002f66 : CopyDataInit: ldr r4, [r2, r3] - 800265a: 58d4 ldr r4, [r2, r3] + 8002f66: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 800265c: 50c4 str r4, [r0, r3] + 8002f68: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 800265e: 3304 adds r3, #4 + 8002f6a: 3304 adds r3, #4 -08002660 : +08002f6c : LoopCopyDataInit: adds r4, r0, r3 - 8002660: 18c4 adds r4, r0, r3 + 8002f6c: 18c4 adds r4, r0, r3 cmp r4, r1 - 8002662: 428c cmp r4, r1 + 8002f6e: 428c cmp r4, r1 bcc CopyDataInit - 8002664: d3f9 bcc.n 800265a + 8002f70: d3f9 bcc.n 8002f66 /* Zero fill the bss segment. */ ldr r2, =_sbss - 8002666: 4a09 ldr r2, [pc, #36] @ (800268c ) + 8002f72: 4a09 ldr r2, [pc, #36] @ (8002f98 ) ldr r4, =_ebss - 8002668: 4c09 ldr r4, [pc, #36] @ (8002690 ) + 8002f74: 4c09 ldr r4, [pc, #36] @ (8002f9c ) movs r3, #0 - 800266a: 2300 movs r3, #0 + 8002f76: 2300 movs r3, #0 b LoopFillZerobss - 800266c: e001 b.n 8002672 + 8002f78: e001 b.n 8002f7e -0800266e : +08002f7a : FillZerobss: str r3, [r2] - 800266e: 6013 str r3, [r2, #0] + 8002f7a: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8002670: 3204 adds r2, #4 + 8002f7c: 3204 adds r2, #4 -08002672 : +08002f7e : LoopFillZerobss: cmp r2, r4 - 8002672: 42a2 cmp r2, r4 + 8002f7e: 42a2 cmp r2, r4 bcc FillZerobss - 8002674: d3fb bcc.n 800266e + 8002f80: d3fb bcc.n 8002f7a /* Call static constructors */ bl __libc_init_array - 8002676: f003 fd21 bl 80060bc <__libc_init_array> + 8002f82: f003 fd45 bl 8006a10 <__libc_init_array> /* Call the application's entry point.*/ bl main - 800267a: f7ff faf3 bl 8001c64
+ 8002f86: f7ff f9e1 bl 800234c
bx lr - 800267e: 4770 bx lr + 8002f8a: 4770 bx lr ldr r0, =_sdata - 8002680: 20000000 .word 0x20000000 + 8002f8c: 20000000 .word 0x20000000 ldr r1, =_edata - 8002684: 20000060 .word 0x20000060 + 8002f90: 20000060 .word 0x20000060 ldr r2, =_sidata - 8002688: 08006388 .word 0x08006388 + 8002f94: 08006c6c .word 0x08006c6c ldr r2, =_sbss - 800268c: 20000060 .word 0x20000060 + 8002f98: 20000060 .word 0x20000060 ldr r4, =_ebss - 8002690: 200004dc .word 0x200004dc + 8002f9c: 200004d8 .word 0x200004d8 -08002694 : +08002fa0 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8002694: e7fe b.n 8002694 + 8002fa0: e7fe b.n 8002fa0 ... -08002698 : +08002fa4 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8002698: b580 push {r7, lr} - 800269a: af00 add r7, sp, #0 + 8002fa4: b580 push {r7, lr} + 8002fa6: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 800269c: 4b08 ldr r3, [pc, #32] @ (80026c0 ) - 800269e: 681b ldr r3, [r3, #0] - 80026a0: 4a07 ldr r2, [pc, #28] @ (80026c0 ) - 80026a2: f043 0310 orr.w r3, r3, #16 - 80026a6: 6013 str r3, [r2, #0] + 8002fa8: 4b08 ldr r3, [pc, #32] @ (8002fcc ) + 8002faa: 681b ldr r3, [r3, #0] + 8002fac: 4a07 ldr r2, [pc, #28] @ (8002fcc ) + 8002fae: f043 0310 orr.w r3, r3, #16 + 8002fb2: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 80026a8: 2003 movs r0, #3 - 80026aa: f000 fb35 bl 8002d18 + 8002fb4: 2003 movs r0, #3 + 8002fb6: f000 fb59 bl 800366c /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); - 80026ae: 200f movs r0, #15 - 80026b0: f000 f808 bl 80026c4 + 8002fba: 200f movs r0, #15 + 8002fbc: f000 f808 bl 8002fd0 /* Init the low level hardware */ HAL_MspInit(); - 80026b4: f7ff fe60 bl 8002378 + 8002fc0: f7ff fe60 bl 8002c84 /* Return function status */ return HAL_OK; - 80026b8: 2300 movs r3, #0 + 8002fc4: 2300 movs r3, #0 } - 80026ba: 4618 mov r0, r3 - 80026bc: bd80 pop {r7, pc} - 80026be: bf00 nop - 80026c0: 40022000 .word 0x40022000 + 8002fc6: 4618 mov r0, r3 + 8002fc8: bd80 pop {r7, pc} + 8002fca: bf00 nop + 8002fcc: 40022000 .word 0x40022000 -080026c4 : +08002fd0 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 80026c4: b580 push {r7, lr} - 80026c6: b082 sub sp, #8 - 80026c8: af00 add r7, sp, #0 - 80026ca: 6078 str r0, [r7, #4] + 8002fd0: b580 push {r7, lr} + 8002fd2: b082 sub sp, #8 + 8002fd4: af00 add r7, sp, #0 + 8002fd6: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 80026cc: 4b12 ldr r3, [pc, #72] @ (8002718 ) - 80026ce: 681a ldr r2, [r3, #0] - 80026d0: 4b12 ldr r3, [pc, #72] @ (800271c ) - 80026d2: 781b ldrb r3, [r3, #0] - 80026d4: 4619 mov r1, r3 - 80026d6: f44f 737a mov.w r3, #1000 @ 0x3e8 - 80026da: fbb3 f3f1 udiv r3, r3, r1 - 80026de: fbb2 f3f3 udiv r3, r2, r3 - 80026e2: 4618 mov r0, r3 - 80026e4: f000 fb4d bl 8002d82 - 80026e8: 4603 mov r3, r0 - 80026ea: 2b00 cmp r3, #0 - 80026ec: d001 beq.n 80026f2 + 8002fd8: 4b12 ldr r3, [pc, #72] @ (8003024 ) + 8002fda: 681a ldr r2, [r3, #0] + 8002fdc: 4b12 ldr r3, [pc, #72] @ (8003028 ) + 8002fde: 781b ldrb r3, [r3, #0] + 8002fe0: 4619 mov r1, r3 + 8002fe2: f44f 737a mov.w r3, #1000 @ 0x3e8 + 8002fe6: fbb3 f3f1 udiv r3, r3, r1 + 8002fea: fbb2 f3f3 udiv r3, r2, r3 + 8002fee: 4618 mov r0, r3 + 8002ff0: f000 fb71 bl 80036d6 + 8002ff4: 4603 mov r3, r0 + 8002ff6: 2b00 cmp r3, #0 + 8002ff8: d001 beq.n 8002ffe { return HAL_ERROR; - 80026ee: 2301 movs r3, #1 - 80026f0: e00e b.n 8002710 + 8002ffa: 2301 movs r3, #1 + 8002ffc: e00e b.n 800301c } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 80026f2: 687b ldr r3, [r7, #4] - 80026f4: 2b0f cmp r3, #15 - 80026f6: d80a bhi.n 800270e + 8002ffe: 687b ldr r3, [r7, #4] + 8003000: 2b0f cmp r3, #15 + 8003002: d80a bhi.n 800301a { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 80026f8: 2200 movs r2, #0 - 80026fa: 6879 ldr r1, [r7, #4] - 80026fc: f04f 30ff mov.w r0, #4294967295 - 8002700: f000 fb15 bl 8002d2e + 8003004: 2200 movs r2, #0 + 8003006: 6879 ldr r1, [r7, #4] + 8003008: f04f 30ff mov.w r0, #4294967295 + 800300c: f000 fb39 bl 8003682 uwTickPrio = TickPriority; - 8002704: 4a06 ldr r2, [pc, #24] @ (8002720 ) - 8002706: 687b ldr r3, [r7, #4] - 8002708: 6013 str r3, [r2, #0] + 8003010: 4a06 ldr r2, [pc, #24] @ (800302c ) + 8003012: 687b ldr r3, [r7, #4] + 8003014: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 800270a: 2300 movs r3, #0 - 800270c: e000 b.n 8002710 + 8003016: 2300 movs r3, #0 + 8003018: e000 b.n 800301c return HAL_ERROR; - 800270e: 2301 movs r3, #1 + 800301a: 2301 movs r3, #1 } - 8002710: 4618 mov r0, r3 - 8002712: 3708 adds r7, #8 - 8002714: 46bd mov sp, r7 - 8002716: bd80 pop {r7, pc} - 8002718: 20000004 .word 0x20000004 - 800271c: 2000000c .word 0x2000000c - 8002720: 20000008 .word 0x20000008 + 800301c: 4618 mov r0, r3 + 800301e: 3708 adds r7, #8 + 8003020: 46bd mov sp, r7 + 8003022: bd80 pop {r7, pc} + 8003024: 20000004 .word 0x20000004 + 8003028: 2000000c .word 0x2000000c + 800302c: 20000008 .word 0x20000008 -08002724 : +08003030 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8002724: b480 push {r7} - 8002726: af00 add r7, sp, #0 + 8003030: b480 push {r7} + 8003032: af00 add r7, sp, #0 uwTick += uwTickFreq; - 8002728: 4b05 ldr r3, [pc, #20] @ (8002740 ) - 800272a: 781b ldrb r3, [r3, #0] - 800272c: 461a mov r2, r3 - 800272e: 4b05 ldr r3, [pc, #20] @ (8002744 ) - 8002730: 681b ldr r3, [r3, #0] - 8002732: 4413 add r3, r2 - 8002734: 4a03 ldr r2, [pc, #12] @ (8002744 ) - 8002736: 6013 str r3, [r2, #0] + 8003034: 4b05 ldr r3, [pc, #20] @ (800304c ) + 8003036: 781b ldrb r3, [r3, #0] + 8003038: 461a mov r2, r3 + 800303a: 4b05 ldr r3, [pc, #20] @ (8003050 ) + 800303c: 681b ldr r3, [r3, #0] + 800303e: 4413 add r3, r2 + 8003040: 4a03 ldr r2, [pc, #12] @ (8003050 ) + 8003042: 6013 str r3, [r2, #0] } - 8002738: bf00 nop - 800273a: 46bd mov sp, r7 - 800273c: bc80 pop {r7} - 800273e: 4770 bx lr - 8002740: 2000000c .word 0x2000000c - 8002744: 200003a0 .word 0x200003a0 + 8003044: bf00 nop + 8003046: 46bd mov sp, r7 + 8003048: bc80 pop {r7} + 800304a: 4770 bx lr + 800304c: 2000000c .word 0x2000000c + 8003050: 2000039c .word 0x2000039c -08002748 : +08003054 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8002748: b480 push {r7} - 800274a: af00 add r7, sp, #0 + 8003054: b480 push {r7} + 8003056: af00 add r7, sp, #0 return uwTick; - 800274c: 4b02 ldr r3, [pc, #8] @ (8002758 ) - 800274e: 681b ldr r3, [r3, #0] + 8003058: 4b02 ldr r3, [pc, #8] @ (8003064 ) + 800305a: 681b ldr r3, [r3, #0] } - 8002750: 4618 mov r0, r3 - 8002752: 46bd mov sp, r7 - 8002754: bc80 pop {r7} - 8002756: 4770 bx lr - 8002758: 200003a0 .word 0x200003a0 + 800305c: 4618 mov r0, r3 + 800305e: 46bd mov sp, r7 + 8003060: bc80 pop {r7} + 8003062: 4770 bx lr + 8003064: 2000039c .word 0x2000039c -0800275c : +08003068 : + * implementations in user file. + * @param Delay specifies the delay time length, in milliseconds. + * @retval None + */ +__weak void HAL_Delay(uint32_t Delay) +{ + 8003068: b580 push {r7, lr} + 800306a: b084 sub sp, #16 + 800306c: af00 add r7, sp, #0 + 800306e: 6078 str r0, [r7, #4] + uint32_t tickstart = HAL_GetTick(); + 8003070: f7ff fff0 bl 8003054 + 8003074: 60b8 str r0, [r7, #8] + uint32_t wait = Delay; + 8003076: 687b ldr r3, [r7, #4] + 8003078: 60fb str r3, [r7, #12] + + /* Add a freq to guarantee minimum wait */ + if (wait < HAL_MAX_DELAY) + 800307a: 68fb ldr r3, [r7, #12] + 800307c: f1b3 3fff cmp.w r3, #4294967295 + 8003080: d005 beq.n 800308e + { + wait += (uint32_t)(uwTickFreq); + 8003082: 4b0a ldr r3, [pc, #40] @ (80030ac ) + 8003084: 781b ldrb r3, [r3, #0] + 8003086: 461a mov r2, r3 + 8003088: 68fb ldr r3, [r7, #12] + 800308a: 4413 add r3, r2 + 800308c: 60fb str r3, [r7, #12] + } + + while ((HAL_GetTick() - tickstart) < wait) + 800308e: bf00 nop + 8003090: f7ff ffe0 bl 8003054 + 8003094: 4602 mov r2, r0 + 8003096: 68bb ldr r3, [r7, #8] + 8003098: 1ad3 subs r3, r2, r3 + 800309a: 68fa ldr r2, [r7, #12] + 800309c: 429a cmp r2, r3 + 800309e: d8f7 bhi.n 8003090 + { + } +} + 80030a0: bf00 nop + 80030a2: bf00 nop + 80030a4: 3710 adds r7, #16 + 80030a6: 46bd mov sp, r7 + 80030a8: bd80 pop {r7, pc} + 80030aa: bf00 nop + 80030ac: 2000000c .word 0x2000000c + +080030b0 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { - 800275c: b580 push {r7, lr} - 800275e: b086 sub sp, #24 - 8002760: af00 add r7, sp, #0 - 8002762: 6078 str r0, [r7, #4] + 80030b0: b580 push {r7, lr} + 80030b2: b086 sub sp, #24 + 80030b4: af00 add r7, sp, #0 + 80030b6: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8002764: 2300 movs r3, #0 - 8002766: 75fb strb r3, [r7, #23] + 80030b8: 2300 movs r3, #0 + 80030ba: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; - 8002768: 2300 movs r3, #0 - 800276a: 613b str r3, [r7, #16] + 80030bc: 2300 movs r3, #0 + 80030be: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; - 800276c: 2300 movs r3, #0 - 800276e: 60bb str r3, [r7, #8] + 80030c0: 2300 movs r3, #0 + 80030c2: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; - 8002770: 2300 movs r3, #0 - 8002772: 60fb str r3, [r7, #12] + 80030c4: 2300 movs r3, #0 + 80030c6: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) - 8002774: 687b ldr r3, [r7, #4] - 8002776: 2b00 cmp r3, #0 - 8002778: d101 bne.n 800277e + 80030c8: 687b ldr r3, [r7, #4] + 80030ca: 2b00 cmp r3, #0 + 80030cc: d101 bne.n 80030d2 { return HAL_ERROR; - 800277a: 2301 movs r3, #1 - 800277c: e0be b.n 80028fc + 80030ce: 2301 movs r3, #1 + 80030d0: e0be b.n 8003250 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) - 800277e: 687b ldr r3, [r7, #4] - 8002780: 689b ldr r3, [r3, #8] - 8002782: 2b00 cmp r3, #0 + 80030d2: 687b ldr r3, [r7, #4] + 80030d4: 689b ldr r3, [r3, #8] + 80030d6: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) - 8002784: 687b ldr r3, [r7, #4] - 8002786: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002788: 2b00 cmp r3, #0 - 800278a: d109 bne.n 80027a0 + 80030d8: 687b ldr r3, [r7, #4] + 80030da: 6a9b ldr r3, [r3, #40] @ 0x28 + 80030dc: 2b00 cmp r3, #0 + 80030de: d109 bne.n 80030f4 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); - 800278c: 687b ldr r3, [r7, #4] - 800278e: 2200 movs r2, #0 - 8002790: 62da str r2, [r3, #44] @ 0x2c + 80030e0: 687b ldr r3, [r7, #4] + 80030e2: 2200 movs r2, #0 + 80030e4: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; - 8002792: 687b ldr r3, [r7, #4] - 8002794: 2200 movs r2, #0 - 8002796: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 80030e6: 687b ldr r3, [r7, #4] + 80030e8: 2200 movs r2, #0 + 80030ea: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); - 800279a: 6878 ldr r0, [r7, #4] - 800279c: f7fe fd60 bl 8001260 + 80030ee: 6878 ldr r0, [r7, #4] + 80030f0: f7fe fc2a bl 8001948 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); - 80027a0: 6878 ldr r0, [r7, #4] - 80027a2: f000 f9ab bl 8002afc - 80027a6: 4603 mov r3, r0 - 80027a8: 75fb strb r3, [r7, #23] + 80030f4: 6878 ldr r0, [r7, #4] + 80030f6: f000 f9ab bl 8003450 + 80030fa: 4603 mov r3, r0 + 80030fc: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && - 80027aa: 687b ldr r3, [r7, #4] - 80027ac: 6a9b ldr r3, [r3, #40] @ 0x28 - 80027ae: f003 0310 and.w r3, r3, #16 - 80027b2: 2b00 cmp r3, #0 - 80027b4: f040 8099 bne.w 80028ea - 80027b8: 7dfb ldrb r3, [r7, #23] - 80027ba: 2b00 cmp r3, #0 - 80027bc: f040 8095 bne.w 80028ea + 80030fe: 687b ldr r3, [r7, #4] + 8003100: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003102: f003 0310 and.w r3, r3, #16 + 8003106: 2b00 cmp r3, #0 + 8003108: f040 8099 bne.w 800323e + 800310c: 7dfb ldrb r3, [r7, #23] + 800310e: 2b00 cmp r3, #0 + 8003110: f040 8095 bne.w 800323e (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 80027c0: 687b ldr r3, [r7, #4] - 80027c2: 6a9b ldr r3, [r3, #40] @ 0x28 - 80027c4: f423 5388 bic.w r3, r3, #4352 @ 0x1100 - 80027c8: f023 0302 bic.w r3, r3, #2 - 80027cc: f043 0202 orr.w r2, r3, #2 - 80027d0: 687b ldr r3, [r7, #4] - 80027d2: 629a str r2, [r3, #40] @ 0x28 + 8003114: 687b ldr r3, [r7, #4] + 8003116: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003118: f423 5388 bic.w r3, r3, #4352 @ 0x1100 + 800311c: f023 0302 bic.w r3, r3, #2 + 8003120: f043 0202 orr.w r2, r3, #2 + 8003124: 687b ldr r3, [r7, #4] + 8003126: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | - 80027d4: 687b ldr r3, [r7, #4] - 80027d6: 685a ldr r2, [r3, #4] + 8003128: 687b ldr r3, [r7, #4] + 800312a: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | - 80027d8: 687b ldr r3, [r7, #4] - 80027da: 69db ldr r3, [r3, #28] + 800312c: 687b ldr r3, [r7, #4] + 800312e: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | - 80027dc: 431a orrs r2, r3 + 8003130: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); - 80027de: 687b ldr r3, [r7, #4] - 80027e0: 7b1b ldrb r3, [r3, #12] - 80027e2: 005b lsls r3, r3, #1 + 8003132: 687b ldr r3, [r7, #4] + 8003134: 7b1b ldrb r3, [r3, #12] + 8003136: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | - 80027e4: 4313 orrs r3, r2 + 8003138: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | - 80027e6: 68ba ldr r2, [r7, #8] - 80027e8: 4313 orrs r3, r2 - 80027ea: 60bb str r3, [r7, #8] + 800313a: 68ba ldr r2, [r7, #8] + 800313c: 4313 orrs r3, r2 + 800313e: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); - 80027ec: 687b ldr r3, [r7, #4] - 80027ee: 689b ldr r3, [r3, #8] - 80027f0: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 80027f4: d003 beq.n 80027fe - 80027f6: 687b ldr r3, [r7, #4] - 80027f8: 689b ldr r3, [r3, #8] - 80027fa: 2b01 cmp r3, #1 - 80027fc: d102 bne.n 8002804 - 80027fe: f44f 7380 mov.w r3, #256 @ 0x100 - 8002802: e000 b.n 8002806 - 8002804: 2300 movs r3, #0 - 8002806: 693a ldr r2, [r7, #16] - 8002808: 4313 orrs r3, r2 - 800280a: 613b str r3, [r7, #16] + 8003140: 687b ldr r3, [r7, #4] + 8003142: 689b ldr r3, [r3, #8] + 8003144: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8003148: d003 beq.n 8003152 + 800314a: 687b ldr r3, [r7, #4] + 800314c: 689b ldr r3, [r3, #8] + 800314e: 2b01 cmp r3, #1 + 8003150: d102 bne.n 8003158 + 8003152: f44f 7380 mov.w r3, #256 @ 0x100 + 8003156: e000 b.n 800315a + 8003158: 2300 movs r3, #0 + 800315a: 693a ldr r2, [r7, #16] + 800315c: 4313 orrs r3, r2 + 800315e: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) - 800280c: 687b ldr r3, [r7, #4] - 800280e: 7d1b ldrb r3, [r3, #20] - 8002810: 2b01 cmp r3, #1 - 8002812: d119 bne.n 8002848 + 8003160: 687b ldr r3, [r7, #4] + 8003162: 7d1b ldrb r3, [r3, #20] + 8003164: 2b01 cmp r3, #1 + 8003166: d119 bne.n 800319c { if (hadc->Init.ContinuousConvMode == DISABLE) - 8002814: 687b ldr r3, [r7, #4] - 8002816: 7b1b ldrb r3, [r3, #12] - 8002818: 2b00 cmp r3, #0 - 800281a: d109 bne.n 8002830 + 8003168: 687b ldr r3, [r7, #4] + 800316a: 7b1b ldrb r3, [r3, #12] + 800316c: 2b00 cmp r3, #0 + 800316e: d109 bne.n 8003184 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | - 800281c: 687b ldr r3, [r7, #4] - 800281e: 699b ldr r3, [r3, #24] - 8002820: 3b01 subs r3, #1 - 8002822: 035a lsls r2, r3, #13 - 8002824: 693b ldr r3, [r7, #16] - 8002826: 4313 orrs r3, r2 - 8002828: f443 6300 orr.w r3, r3, #2048 @ 0x800 - 800282c: 613b str r3, [r7, #16] - 800282e: e00b b.n 8002848 + 8003170: 687b ldr r3, [r7, #4] + 8003172: 699b ldr r3, [r3, #24] + 8003174: 3b01 subs r3, #1 + 8003176: 035a lsls r2, r3, #13 + 8003178: 693b ldr r3, [r7, #16] + 800317a: 4313 orrs r3, r2 + 800317c: f443 6300 orr.w r3, r3, #2048 @ 0x800 + 8003180: 613b str r3, [r7, #16] + 8003182: e00b b.n 800319c { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8002830: 687b ldr r3, [r7, #4] - 8002832: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002834: f043 0220 orr.w r2, r3, #32 - 8002838: 687b ldr r3, [r7, #4] - 800283a: 629a str r2, [r3, #40] @ 0x28 + 8003184: 687b ldr r3, [r7, #4] + 8003186: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003188: f043 0220 orr.w r2, r3, #32 + 800318c: 687b ldr r3, [r7, #4] + 800318e: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 800283c: 687b ldr r3, [r7, #4] - 800283e: 6adb ldr r3, [r3, #44] @ 0x2c - 8002840: f043 0201 orr.w r2, r3, #1 - 8002844: 687b ldr r3, [r7, #4] - 8002846: 62da str r2, [r3, #44] @ 0x2c + 8003190: 687b ldr r3, [r7, #4] + 8003192: 6adb ldr r3, [r3, #44] @ 0x2c + 8003194: f043 0201 orr.w r2, r3, #1 + 8003198: 687b ldr r3, [r7, #4] + 800319a: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, - 8002848: 687b ldr r3, [r7, #4] - 800284a: 681b ldr r3, [r3, #0] - 800284c: 685b ldr r3, [r3, #4] - 800284e: f423 4169 bic.w r1, r3, #59648 @ 0xe900 - 8002852: 687b ldr r3, [r7, #4] - 8002854: 681b ldr r3, [r3, #0] - 8002856: 693a ldr r2, [r7, #16] - 8002858: 430a orrs r2, r1 - 800285a: 605a str r2, [r3, #4] + 800319c: 687b ldr r3, [r7, #4] + 800319e: 681b ldr r3, [r3, #0] + 80031a0: 685b ldr r3, [r3, #4] + 80031a2: f423 4169 bic.w r1, r3, #59648 @ 0xe900 + 80031a6: 687b ldr r3, [r7, #4] + 80031a8: 681b ldr r3, [r3, #0] + 80031aa: 693a ldr r2, [r7, #16] + 80031ac: 430a orrs r2, r1 + 80031ae: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, - 800285c: 687b ldr r3, [r7, #4] - 800285e: 681b ldr r3, [r3, #0] - 8002860: 689a ldr r2, [r3, #8] - 8002862: 4b28 ldr r3, [pc, #160] @ (8002904 ) - 8002864: 4013 ands r3, r2 - 8002866: 687a ldr r2, [r7, #4] - 8002868: 6812 ldr r2, [r2, #0] - 800286a: 68b9 ldr r1, [r7, #8] - 800286c: 430b orrs r3, r1 - 800286e: 6093 str r3, [r2, #8] + 80031b0: 687b ldr r3, [r7, #4] + 80031b2: 681b ldr r3, [r3, #0] + 80031b4: 689a ldr r2, [r3, #8] + 80031b6: 4b28 ldr r3, [pc, #160] @ (8003258 ) + 80031b8: 4013 ands r3, r2 + 80031ba: 687a ldr r2, [r7, #4] + 80031bc: 6812 ldr r2, [r2, #0] + 80031be: 68b9 ldr r1, [r7, #8] + 80031c0: 430b orrs r3, r1 + 80031c2: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) - 8002870: 687b ldr r3, [r7, #4] - 8002872: 689b ldr r3, [r3, #8] - 8002874: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8002878: d003 beq.n 8002882 - 800287a: 687b ldr r3, [r7, #4] - 800287c: 689b ldr r3, [r3, #8] - 800287e: 2b01 cmp r3, #1 - 8002880: d104 bne.n 800288c + 80031c4: 687b ldr r3, [r7, #4] + 80031c6: 689b ldr r3, [r3, #8] + 80031c8: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80031cc: d003 beq.n 80031d6 + 80031ce: 687b ldr r3, [r7, #4] + 80031d0: 689b ldr r3, [r3, #8] + 80031d2: 2b01 cmp r3, #1 + 80031d4: d104 bne.n 80031e0 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); - 8002882: 687b ldr r3, [r7, #4] - 8002884: 691b ldr r3, [r3, #16] - 8002886: 3b01 subs r3, #1 - 8002888: 051b lsls r3, r3, #20 - 800288a: 60fb str r3, [r7, #12] + 80031d6: 687b ldr r3, [r7, #4] + 80031d8: 691b ldr r3, [r3, #16] + 80031da: 3b01 subs r3, #1 + 80031dc: 051b lsls r3, r3, #20 + 80031de: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, - 800288c: 687b ldr r3, [r7, #4] - 800288e: 681b ldr r3, [r3, #0] - 8002890: 6adb ldr r3, [r3, #44] @ 0x2c - 8002892: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 - 8002896: 687b ldr r3, [r7, #4] - 8002898: 681b ldr r3, [r3, #0] - 800289a: 68fa ldr r2, [r7, #12] - 800289c: 430a orrs r2, r1 - 800289e: 62da str r2, [r3, #44] @ 0x2c + 80031e0: 687b ldr r3, [r7, #4] + 80031e2: 681b ldr r3, [r3, #0] + 80031e4: 6adb ldr r3, [r3, #44] @ 0x2c + 80031e6: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 + 80031ea: 687b ldr r3, [r7, #4] + 80031ec: 681b ldr r3, [r3, #0] + 80031ee: 68fa ldr r2, [r7, #12] + 80031f0: 430a orrs r2, r1 + 80031f2: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 80028a0: 687b ldr r3, [r7, #4] - 80028a2: 681b ldr r3, [r3, #0] - 80028a4: 689a ldr r2, [r3, #8] - 80028a6: 4b18 ldr r3, [pc, #96] @ (8002908 ) - 80028a8: 4013 ands r3, r2 - 80028aa: 68ba ldr r2, [r7, #8] - 80028ac: 429a cmp r2, r3 - 80028ae: d10b bne.n 80028c8 + 80031f4: 687b ldr r3, [r7, #4] + 80031f6: 681b ldr r3, [r3, #0] + 80031f8: 689a ldr r2, [r3, #8] + 80031fa: 4b18 ldr r3, [pc, #96] @ (800325c ) + 80031fc: 4013 ands r3, r2 + 80031fe: 68ba ldr r2, [r7, #8] + 8003200: 429a cmp r2, r3 + 8003202: d10b bne.n 800321c ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); - 80028b0: 687b ldr r3, [r7, #4] - 80028b2: 2200 movs r2, #0 - 80028b4: 62da str r2, [r3, #44] @ 0x2c + 8003204: 687b ldr r3, [r7, #4] + 8003206: 2200 movs r2, #0 + 8003208: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, - 80028b6: 687b ldr r3, [r7, #4] - 80028b8: 6a9b ldr r3, [r3, #40] @ 0x28 - 80028ba: f023 0303 bic.w r3, r3, #3 - 80028be: f043 0201 orr.w r2, r3, #1 - 80028c2: 687b ldr r3, [r7, #4] - 80028c4: 629a str r2, [r3, #40] @ 0x28 + 800320a: 687b ldr r3, [r7, #4] + 800320c: 6a9b ldr r3, [r3, #40] @ 0x28 + 800320e: f023 0303 bic.w r3, r3, #3 + 8003212: f043 0201 orr.w r2, r3, #1 + 8003216: 687b ldr r3, [r7, #4] + 8003218: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 80028c6: e018 b.n 80028fa + 800321a: e018 b.n 800324e HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, - 80028c8: 687b ldr r3, [r7, #4] - 80028ca: 6a9b ldr r3, [r3, #40] @ 0x28 - 80028cc: f023 0312 bic.w r3, r3, #18 - 80028d0: f043 0210 orr.w r2, r3, #16 - 80028d4: 687b ldr r3, [r7, #4] - 80028d6: 629a str r2, [r3, #40] @ 0x28 + 800321c: 687b ldr r3, [r7, #4] + 800321e: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003220: f023 0312 bic.w r3, r3, #18 + 8003224: f043 0210 orr.w r2, r3, #16 + 8003228: 687b ldr r3, [r7, #4] + 800322a: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80028d8: 687b ldr r3, [r7, #4] - 80028da: 6adb ldr r3, [r3, #44] @ 0x2c - 80028dc: f043 0201 orr.w r2, r3, #1 - 80028e0: 687b ldr r3, [r7, #4] - 80028e2: 62da str r2, [r3, #44] @ 0x2c + 800322c: 687b ldr r3, [r7, #4] + 800322e: 6adb ldr r3, [r3, #44] @ 0x2c + 8003230: f043 0201 orr.w r2, r3, #1 + 8003234: 687b ldr r3, [r7, #4] + 8003236: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; - 80028e4: 2301 movs r3, #1 - 80028e6: 75fb strb r3, [r7, #23] + 8003238: 2301 movs r3, #1 + 800323a: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 80028e8: e007 b.n 80028fa + 800323c: e007 b.n 800324e } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80028ea: 687b ldr r3, [r7, #4] - 80028ec: 6a9b ldr r3, [r3, #40] @ 0x28 - 80028ee: f043 0210 orr.w r2, r3, #16 - 80028f2: 687b ldr r3, [r7, #4] - 80028f4: 629a str r2, [r3, #40] @ 0x28 + 800323e: 687b ldr r3, [r7, #4] + 8003240: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003242: f043 0210 orr.w r2, r3, #16 + 8003246: 687b ldr r3, [r7, #4] + 8003248: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; - 80028f6: 2301 movs r3, #1 - 80028f8: 75fb strb r3, [r7, #23] + 800324a: 2301 movs r3, #1 + 800324c: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; - 80028fa: 7dfb ldrb r3, [r7, #23] + 800324e: 7dfb ldrb r3, [r7, #23] } - 80028fc: 4618 mov r0, r3 - 80028fe: 3718 adds r7, #24 - 8002900: 46bd mov sp, r7 - 8002902: bd80 pop {r7, pc} - 8002904: ffe1f7fd .word 0xffe1f7fd - 8002908: ff1f0efe .word 0xff1f0efe + 8003250: 4618 mov r0, r3 + 8003252: 3718 adds r7, #24 + 8003254: 46bd mov sp, r7 + 8003256: bd80 pop {r7, pc} + 8003258: ffe1f7fd .word 0xffe1f7fd + 800325c: ff1f0efe .word 0xff1f0efe -0800290c : +08003260 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { - 800290c: b480 push {r7} - 800290e: b085 sub sp, #20 - 8002910: af00 add r7, sp, #0 - 8002912: 6078 str r0, [r7, #4] - 8002914: 6039 str r1, [r7, #0] + 8003260: b480 push {r7} + 8003262: b085 sub sp, #20 + 8003264: af00 add r7, sp, #0 + 8003266: 6078 str r0, [r7, #4] + 8003268: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8002916: 2300 movs r3, #0 - 8002918: 73fb strb r3, [r7, #15] + 800326a: 2300 movs r3, #0 + 800326c: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; - 800291a: 2300 movs r3, #0 - 800291c: 60bb str r3, [r7, #8] + 800326e: 2300 movs r3, #0 + 8003270: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); - 800291e: 687b ldr r3, [r7, #4] - 8002920: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 - 8002924: 2b01 cmp r3, #1 - 8002926: d101 bne.n 800292c - 8002928: 2302 movs r3, #2 - 800292a: e0dc b.n 8002ae6 - 800292c: 687b ldr r3, [r7, #4] - 800292e: 2201 movs r2, #1 - 8002930: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 8003272: 687b ldr r3, [r7, #4] + 8003274: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 + 8003278: 2b01 cmp r3, #1 + 800327a: d101 bne.n 8003280 + 800327c: 2302 movs r3, #2 + 800327e: e0dc b.n 800343a + 8003280: 687b ldr r3, [r7, #4] + 8003282: 2201 movs r2, #1 + 8003284: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) - 8002934: 683b ldr r3, [r7, #0] - 8002936: 685b ldr r3, [r3, #4] - 8002938: 2b06 cmp r3, #6 - 800293a: d81c bhi.n 8002976 + 8003288: 683b ldr r3, [r7, #0] + 800328a: 685b ldr r3, [r3, #4] + 800328c: 2b06 cmp r3, #6 + 800328e: d81c bhi.n 80032ca { MODIFY_REG(hadc->Instance->SQR3 , - 800293c: 687b ldr r3, [r7, #4] - 800293e: 681b ldr r3, [r3, #0] - 8002940: 6b59 ldr r1, [r3, #52] @ 0x34 - 8002942: 683b ldr r3, [r7, #0] - 8002944: 685a ldr r2, [r3, #4] - 8002946: 4613 mov r3, r2 - 8002948: 009b lsls r3, r3, #2 - 800294a: 4413 add r3, r2 - 800294c: 3b05 subs r3, #5 - 800294e: 221f movs r2, #31 - 8002950: fa02 f303 lsl.w r3, r2, r3 - 8002954: 43db mvns r3, r3 - 8002956: 4019 ands r1, r3 - 8002958: 683b ldr r3, [r7, #0] - 800295a: 6818 ldr r0, [r3, #0] - 800295c: 683b ldr r3, [r7, #0] - 800295e: 685a ldr r2, [r3, #4] - 8002960: 4613 mov r3, r2 - 8002962: 009b lsls r3, r3, #2 - 8002964: 4413 add r3, r2 - 8002966: 3b05 subs r3, #5 - 8002968: fa00 f203 lsl.w r2, r0, r3 - 800296c: 687b ldr r3, [r7, #4] - 800296e: 681b ldr r3, [r3, #0] - 8002970: 430a orrs r2, r1 - 8002972: 635a str r2, [r3, #52] @ 0x34 - 8002974: e03c b.n 80029f0 + 8003290: 687b ldr r3, [r7, #4] + 8003292: 681b ldr r3, [r3, #0] + 8003294: 6b59 ldr r1, [r3, #52] @ 0x34 + 8003296: 683b ldr r3, [r7, #0] + 8003298: 685a ldr r2, [r3, #4] + 800329a: 4613 mov r3, r2 + 800329c: 009b lsls r3, r3, #2 + 800329e: 4413 add r3, r2 + 80032a0: 3b05 subs r3, #5 + 80032a2: 221f movs r2, #31 + 80032a4: fa02 f303 lsl.w r3, r2, r3 + 80032a8: 43db mvns r3, r3 + 80032aa: 4019 ands r1, r3 + 80032ac: 683b ldr r3, [r7, #0] + 80032ae: 6818 ldr r0, [r3, #0] + 80032b0: 683b ldr r3, [r7, #0] + 80032b2: 685a ldr r2, [r3, #4] + 80032b4: 4613 mov r3, r2 + 80032b6: 009b lsls r3, r3, #2 + 80032b8: 4413 add r3, r2 + 80032ba: 3b05 subs r3, #5 + 80032bc: fa00 f203 lsl.w r2, r0, r3 + 80032c0: 687b ldr r3, [r7, #4] + 80032c2: 681b ldr r3, [r3, #0] + 80032c4: 430a orrs r2, r1 + 80032c6: 635a str r2, [r3, #52] @ 0x34 + 80032c8: e03c b.n 8003344 ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) - 8002976: 683b ldr r3, [r7, #0] - 8002978: 685b ldr r3, [r3, #4] - 800297a: 2b0c cmp r3, #12 - 800297c: d81c bhi.n 80029b8 + 80032ca: 683b ldr r3, [r7, #0] + 80032cc: 685b ldr r3, [r3, #4] + 80032ce: 2b0c cmp r3, #12 + 80032d0: d81c bhi.n 800330c { MODIFY_REG(hadc->Instance->SQR2 , - 800297e: 687b ldr r3, [r7, #4] - 8002980: 681b ldr r3, [r3, #0] - 8002982: 6b19 ldr r1, [r3, #48] @ 0x30 - 8002984: 683b ldr r3, [r7, #0] - 8002986: 685a ldr r2, [r3, #4] - 8002988: 4613 mov r3, r2 - 800298a: 009b lsls r3, r3, #2 - 800298c: 4413 add r3, r2 - 800298e: 3b23 subs r3, #35 @ 0x23 - 8002990: 221f movs r2, #31 - 8002992: fa02 f303 lsl.w r3, r2, r3 - 8002996: 43db mvns r3, r3 - 8002998: 4019 ands r1, r3 - 800299a: 683b ldr r3, [r7, #0] - 800299c: 6818 ldr r0, [r3, #0] - 800299e: 683b ldr r3, [r7, #0] - 80029a0: 685a ldr r2, [r3, #4] - 80029a2: 4613 mov r3, r2 - 80029a4: 009b lsls r3, r3, #2 - 80029a6: 4413 add r3, r2 - 80029a8: 3b23 subs r3, #35 @ 0x23 - 80029aa: fa00 f203 lsl.w r2, r0, r3 - 80029ae: 687b ldr r3, [r7, #4] - 80029b0: 681b ldr r3, [r3, #0] - 80029b2: 430a orrs r2, r1 - 80029b4: 631a str r2, [r3, #48] @ 0x30 - 80029b6: e01b b.n 80029f0 + 80032d2: 687b ldr r3, [r7, #4] + 80032d4: 681b ldr r3, [r3, #0] + 80032d6: 6b19 ldr r1, [r3, #48] @ 0x30 + 80032d8: 683b ldr r3, [r7, #0] + 80032da: 685a ldr r2, [r3, #4] + 80032dc: 4613 mov r3, r2 + 80032de: 009b lsls r3, r3, #2 + 80032e0: 4413 add r3, r2 + 80032e2: 3b23 subs r3, #35 @ 0x23 + 80032e4: 221f movs r2, #31 + 80032e6: fa02 f303 lsl.w r3, r2, r3 + 80032ea: 43db mvns r3, r3 + 80032ec: 4019 ands r1, r3 + 80032ee: 683b ldr r3, [r7, #0] + 80032f0: 6818 ldr r0, [r3, #0] + 80032f2: 683b ldr r3, [r7, #0] + 80032f4: 685a ldr r2, [r3, #4] + 80032f6: 4613 mov r3, r2 + 80032f8: 009b lsls r3, r3, #2 + 80032fa: 4413 add r3, r2 + 80032fc: 3b23 subs r3, #35 @ 0x23 + 80032fe: fa00 f203 lsl.w r2, r0, r3 + 8003302: 687b ldr r3, [r7, #4] + 8003304: 681b ldr r3, [r3, #0] + 8003306: 430a orrs r2, r1 + 8003308: 631a str r2, [r3, #48] @ 0x30 + 800330a: e01b b.n 8003344 ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , - 80029b8: 687b ldr r3, [r7, #4] - 80029ba: 681b ldr r3, [r3, #0] - 80029bc: 6ad9 ldr r1, [r3, #44] @ 0x2c - 80029be: 683b ldr r3, [r7, #0] - 80029c0: 685a ldr r2, [r3, #4] - 80029c2: 4613 mov r3, r2 - 80029c4: 009b lsls r3, r3, #2 - 80029c6: 4413 add r3, r2 - 80029c8: 3b41 subs r3, #65 @ 0x41 - 80029ca: 221f movs r2, #31 - 80029cc: fa02 f303 lsl.w r3, r2, r3 - 80029d0: 43db mvns r3, r3 - 80029d2: 4019 ands r1, r3 - 80029d4: 683b ldr r3, [r7, #0] - 80029d6: 6818 ldr r0, [r3, #0] - 80029d8: 683b ldr r3, [r7, #0] - 80029da: 685a ldr r2, [r3, #4] - 80029dc: 4613 mov r3, r2 - 80029de: 009b lsls r3, r3, #2 - 80029e0: 4413 add r3, r2 - 80029e2: 3b41 subs r3, #65 @ 0x41 - 80029e4: fa00 f203 lsl.w r2, r0, r3 - 80029e8: 687b ldr r3, [r7, #4] - 80029ea: 681b ldr r3, [r3, #0] - 80029ec: 430a orrs r2, r1 - 80029ee: 62da str r2, [r3, #44] @ 0x2c + 800330c: 687b ldr r3, [r7, #4] + 800330e: 681b ldr r3, [r3, #0] + 8003310: 6ad9 ldr r1, [r3, #44] @ 0x2c + 8003312: 683b ldr r3, [r7, #0] + 8003314: 685a ldr r2, [r3, #4] + 8003316: 4613 mov r3, r2 + 8003318: 009b lsls r3, r3, #2 + 800331a: 4413 add r3, r2 + 800331c: 3b41 subs r3, #65 @ 0x41 + 800331e: 221f movs r2, #31 + 8003320: fa02 f303 lsl.w r3, r2, r3 + 8003324: 43db mvns r3, r3 + 8003326: 4019 ands r1, r3 + 8003328: 683b ldr r3, [r7, #0] + 800332a: 6818 ldr r0, [r3, #0] + 800332c: 683b ldr r3, [r7, #0] + 800332e: 685a ldr r2, [r3, #4] + 8003330: 4613 mov r3, r2 + 8003332: 009b lsls r3, r3, #2 + 8003334: 4413 add r3, r2 + 8003336: 3b41 subs r3, #65 @ 0x41 + 8003338: fa00 f203 lsl.w r2, r0, r3 + 800333c: 687b ldr r3, [r7, #4] + 800333e: 681b ldr r3, [r3, #0] + 8003340: 430a orrs r2, r1 + 8003342: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) - 80029f0: 683b ldr r3, [r7, #0] - 80029f2: 681b ldr r3, [r3, #0] - 80029f4: 2b09 cmp r3, #9 - 80029f6: d91c bls.n 8002a32 + 8003344: 683b ldr r3, [r7, #0] + 8003346: 681b ldr r3, [r3, #0] + 8003348: 2b09 cmp r3, #9 + 800334a: d91c bls.n 8003386 { MODIFY_REG(hadc->Instance->SMPR1 , - 80029f8: 687b ldr r3, [r7, #4] - 80029fa: 681b ldr r3, [r3, #0] - 80029fc: 68d9 ldr r1, [r3, #12] - 80029fe: 683b ldr r3, [r7, #0] - 8002a00: 681a ldr r2, [r3, #0] - 8002a02: 4613 mov r3, r2 - 8002a04: 005b lsls r3, r3, #1 - 8002a06: 4413 add r3, r2 - 8002a08: 3b1e subs r3, #30 - 8002a0a: 2207 movs r2, #7 - 8002a0c: fa02 f303 lsl.w r3, r2, r3 - 8002a10: 43db mvns r3, r3 - 8002a12: 4019 ands r1, r3 - 8002a14: 683b ldr r3, [r7, #0] - 8002a16: 6898 ldr r0, [r3, #8] - 8002a18: 683b ldr r3, [r7, #0] - 8002a1a: 681a ldr r2, [r3, #0] - 8002a1c: 4613 mov r3, r2 - 8002a1e: 005b lsls r3, r3, #1 - 8002a20: 4413 add r3, r2 - 8002a22: 3b1e subs r3, #30 - 8002a24: fa00 f203 lsl.w r2, r0, r3 - 8002a28: 687b ldr r3, [r7, #4] - 8002a2a: 681b ldr r3, [r3, #0] - 8002a2c: 430a orrs r2, r1 - 8002a2e: 60da str r2, [r3, #12] - 8002a30: e019 b.n 8002a66 + 800334c: 687b ldr r3, [r7, #4] + 800334e: 681b ldr r3, [r3, #0] + 8003350: 68d9 ldr r1, [r3, #12] + 8003352: 683b ldr r3, [r7, #0] + 8003354: 681a ldr r2, [r3, #0] + 8003356: 4613 mov r3, r2 + 8003358: 005b lsls r3, r3, #1 + 800335a: 4413 add r3, r2 + 800335c: 3b1e subs r3, #30 + 800335e: 2207 movs r2, #7 + 8003360: fa02 f303 lsl.w r3, r2, r3 + 8003364: 43db mvns r3, r3 + 8003366: 4019 ands r1, r3 + 8003368: 683b ldr r3, [r7, #0] + 800336a: 6898 ldr r0, [r3, #8] + 800336c: 683b ldr r3, [r7, #0] + 800336e: 681a ldr r2, [r3, #0] + 8003370: 4613 mov r3, r2 + 8003372: 005b lsls r3, r3, #1 + 8003374: 4413 add r3, r2 + 8003376: 3b1e subs r3, #30 + 8003378: fa00 f203 lsl.w r2, r0, r3 + 800337c: 687b ldr r3, [r7, #4] + 800337e: 681b ldr r3, [r3, #0] + 8003380: 430a orrs r2, r1 + 8003382: 60da str r2, [r3, #12] + 8003384: e019 b.n 80033ba ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , - 8002a32: 687b ldr r3, [r7, #4] - 8002a34: 681b ldr r3, [r3, #0] - 8002a36: 6919 ldr r1, [r3, #16] - 8002a38: 683b ldr r3, [r7, #0] - 8002a3a: 681a ldr r2, [r3, #0] - 8002a3c: 4613 mov r3, r2 - 8002a3e: 005b lsls r3, r3, #1 - 8002a40: 4413 add r3, r2 - 8002a42: 2207 movs r2, #7 - 8002a44: fa02 f303 lsl.w r3, r2, r3 - 8002a48: 43db mvns r3, r3 - 8002a4a: 4019 ands r1, r3 - 8002a4c: 683b ldr r3, [r7, #0] - 8002a4e: 6898 ldr r0, [r3, #8] - 8002a50: 683b ldr r3, [r7, #0] - 8002a52: 681a ldr r2, [r3, #0] - 8002a54: 4613 mov r3, r2 - 8002a56: 005b lsls r3, r3, #1 - 8002a58: 4413 add r3, r2 - 8002a5a: fa00 f203 lsl.w r2, r0, r3 - 8002a5e: 687b ldr r3, [r7, #4] - 8002a60: 681b ldr r3, [r3, #0] - 8002a62: 430a orrs r2, r1 - 8002a64: 611a str r2, [r3, #16] + 8003386: 687b ldr r3, [r7, #4] + 8003388: 681b ldr r3, [r3, #0] + 800338a: 6919 ldr r1, [r3, #16] + 800338c: 683b ldr r3, [r7, #0] + 800338e: 681a ldr r2, [r3, #0] + 8003390: 4613 mov r3, r2 + 8003392: 005b lsls r3, r3, #1 + 8003394: 4413 add r3, r2 + 8003396: 2207 movs r2, #7 + 8003398: fa02 f303 lsl.w r3, r2, r3 + 800339c: 43db mvns r3, r3 + 800339e: 4019 ands r1, r3 + 80033a0: 683b ldr r3, [r7, #0] + 80033a2: 6898 ldr r0, [r3, #8] + 80033a4: 683b ldr r3, [r7, #0] + 80033a6: 681a ldr r2, [r3, #0] + 80033a8: 4613 mov r3, r2 + 80033aa: 005b lsls r3, r3, #1 + 80033ac: 4413 add r3, r2 + 80033ae: fa00 f203 lsl.w r2, r0, r3 + 80033b2: 687b ldr r3, [r7, #4] + 80033b4: 681b ldr r3, [r3, #0] + 80033b6: 430a orrs r2, r1 + 80033b8: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 8002a66: 683b ldr r3, [r7, #0] - 8002a68: 681b ldr r3, [r3, #0] - 8002a6a: 2b10 cmp r3, #16 - 8002a6c: d003 beq.n 8002a76 + 80033ba: 683b ldr r3, [r7, #0] + 80033bc: 681b ldr r3, [r3, #0] + 80033be: 2b10 cmp r3, #16 + 80033c0: d003 beq.n 80033ca (sConfig->Channel == ADC_CHANNEL_VREFINT) ) - 8002a6e: 683b ldr r3, [r7, #0] - 8002a70: 681b ldr r3, [r3, #0] + 80033c2: 683b ldr r3, [r7, #0] + 80033c4: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 8002a72: 2b11 cmp r3, #17 - 8002a74: d132 bne.n 8002adc + 80033c6: 2b11 cmp r3, #17 + 80033c8: d132 bne.n 8003430 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) - 8002a76: 687b ldr r3, [r7, #4] - 8002a78: 681b ldr r3, [r3, #0] - 8002a7a: 4a1d ldr r2, [pc, #116] @ (8002af0 ) - 8002a7c: 4293 cmp r3, r2 - 8002a7e: d125 bne.n 8002acc + 80033ca: 687b ldr r3, [r7, #4] + 80033cc: 681b ldr r3, [r3, #0] + 80033ce: 4a1d ldr r2, [pc, #116] @ (8003444 ) + 80033d0: 4293 cmp r3, r2 + 80033d2: d125 bne.n 8003420 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) - 8002a80: 687b ldr r3, [r7, #4] - 8002a82: 681b ldr r3, [r3, #0] - 8002a84: 689b ldr r3, [r3, #8] - 8002a86: f403 0300 and.w r3, r3, #8388608 @ 0x800000 - 8002a8a: 2b00 cmp r3, #0 - 8002a8c: d126 bne.n 8002adc + 80033d4: 687b ldr r3, [r7, #4] + 80033d6: 681b ldr r3, [r3, #0] + 80033d8: 689b ldr r3, [r3, #8] + 80033da: f403 0300 and.w r3, r3, #8388608 @ 0x800000 + 80033de: 2b00 cmp r3, #0 + 80033e0: d126 bne.n 8003430 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); - 8002a8e: 687b ldr r3, [r7, #4] - 8002a90: 681b ldr r3, [r3, #0] - 8002a92: 689a ldr r2, [r3, #8] - 8002a94: 687b ldr r3, [r7, #4] - 8002a96: 681b ldr r3, [r3, #0] - 8002a98: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 - 8002a9c: 609a str r2, [r3, #8] + 80033e2: 687b ldr r3, [r7, #4] + 80033e4: 681b ldr r3, [r3, #0] + 80033e6: 689a ldr r2, [r3, #8] + 80033e8: 687b ldr r3, [r7, #4] + 80033ea: 681b ldr r3, [r3, #0] + 80033ec: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 + 80033f0: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) - 8002a9e: 683b ldr r3, [r7, #0] - 8002aa0: 681b ldr r3, [r3, #0] - 8002aa2: 2b10 cmp r3, #16 - 8002aa4: d11a bne.n 8002adc + 80033f2: 683b ldr r3, [r7, #0] + 80033f4: 681b ldr r3, [r3, #0] + 80033f6: 2b10 cmp r3, #16 + 80033f8: d11a bne.n 8003430 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); - 8002aa6: 4b13 ldr r3, [pc, #76] @ (8002af4 ) - 8002aa8: 681b ldr r3, [r3, #0] - 8002aaa: 4a13 ldr r2, [pc, #76] @ (8002af8 ) - 8002aac: fba2 2303 umull r2, r3, r2, r3 - 8002ab0: 0c9a lsrs r2, r3, #18 - 8002ab2: 4613 mov r3, r2 - 8002ab4: 009b lsls r3, r3, #2 - 8002ab6: 4413 add r3, r2 - 8002ab8: 005b lsls r3, r3, #1 - 8002aba: 60bb str r3, [r7, #8] + 80033fa: 4b13 ldr r3, [pc, #76] @ (8003448 ) + 80033fc: 681b ldr r3, [r3, #0] + 80033fe: 4a13 ldr r2, [pc, #76] @ (800344c ) + 8003400: fba2 2303 umull r2, r3, r2, r3 + 8003404: 0c9a lsrs r2, r3, #18 + 8003406: 4613 mov r3, r2 + 8003408: 009b lsls r3, r3, #2 + 800340a: 4413 add r3, r2 + 800340c: 005b lsls r3, r3, #1 + 800340e: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 8002abc: e002 b.n 8002ac4 + 8003410: e002 b.n 8003418 { wait_loop_index--; - 8002abe: 68bb ldr r3, [r7, #8] - 8002ac0: 3b01 subs r3, #1 - 8002ac2: 60bb str r3, [r7, #8] + 8003412: 68bb ldr r3, [r7, #8] + 8003414: 3b01 subs r3, #1 + 8003416: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 8002ac4: 68bb ldr r3, [r7, #8] - 8002ac6: 2b00 cmp r3, #0 - 8002ac8: d1f9 bne.n 8002abe - 8002aca: e007 b.n 8002adc + 8003418: 68bb ldr r3, [r7, #8] + 800341a: 2b00 cmp r3, #0 + 800341c: d1f9 bne.n 8003412 + 800341e: e007 b.n 8003430 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8002acc: 687b ldr r3, [r7, #4] - 8002ace: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002ad0: f043 0220 orr.w r2, r3, #32 - 8002ad4: 687b ldr r3, [r7, #4] - 8002ad6: 629a str r2, [r3, #40] @ 0x28 + 8003420: 687b ldr r3, [r7, #4] + 8003422: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003424: f043 0220 orr.w r2, r3, #32 + 8003428: 687b ldr r3, [r7, #4] + 800342a: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; - 8002ad8: 2301 movs r3, #1 - 8002ada: 73fb strb r3, [r7, #15] + 800342c: 2301 movs r3, #1 + 800342e: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); - 8002adc: 687b ldr r3, [r7, #4] - 8002ade: 2200 movs r2, #0 - 8002ae0: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 8003430: 687b ldr r3, [r7, #4] + 8003432: 2200 movs r2, #0 + 8003434: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; - 8002ae4: 7bfb ldrb r3, [r7, #15] + 8003438: 7bfb ldrb r3, [r7, #15] } - 8002ae6: 4618 mov r0, r3 - 8002ae8: 3714 adds r7, #20 - 8002aea: 46bd mov sp, r7 - 8002aec: bc80 pop {r7} - 8002aee: 4770 bx lr - 8002af0: 40012400 .word 0x40012400 - 8002af4: 20000004 .word 0x20000004 - 8002af8: 431bde83 .word 0x431bde83 + 800343a: 4618 mov r0, r3 + 800343c: 3714 adds r7, #20 + 800343e: 46bd mov sp, r7 + 8003440: bc80 pop {r7} + 8003442: 4770 bx lr + 8003444: 40012400 .word 0x40012400 + 8003448: 20000004 .word 0x20000004 + 800344c: 431bde83 .word 0x431bde83 -08002afc : +08003450 : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { - 8002afc: b580 push {r7, lr} - 8002afe: b084 sub sp, #16 - 8002b00: af00 add r7, sp, #0 - 8002b02: 6078 str r0, [r7, #4] + 8003450: b580 push {r7, lr} + 8003452: b084 sub sp, #16 + 8003454: af00 add r7, sp, #0 + 8003456: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; - 8002b04: 2300 movs r3, #0 - 8002b06: 60fb str r3, [r7, #12] + 8003458: 2300 movs r3, #0 + 800345a: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) - 8002b08: 687b ldr r3, [r7, #4] - 8002b0a: 681b ldr r3, [r3, #0] - 8002b0c: 689b ldr r3, [r3, #8] - 8002b0e: f003 0301 and.w r3, r3, #1 - 8002b12: 2b01 cmp r3, #1 - 8002b14: d12e bne.n 8002b74 + 800345c: 687b ldr r3, [r7, #4] + 800345e: 681b ldr r3, [r3, #0] + 8003460: 689b ldr r3, [r3, #8] + 8003462: f003 0301 and.w r3, r3, #1 + 8003466: 2b01 cmp r3, #1 + 8003468: d12e bne.n 80034c8 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); - 8002b16: 687b ldr r3, [r7, #4] - 8002b18: 681b ldr r3, [r3, #0] - 8002b1a: 689a ldr r2, [r3, #8] - 8002b1c: 687b ldr r3, [r7, #4] - 8002b1e: 681b ldr r3, [r3, #0] - 8002b20: f022 0201 bic.w r2, r2, #1 - 8002b24: 609a str r2, [r3, #8] + 800346a: 687b ldr r3, [r7, #4] + 800346c: 681b ldr r3, [r3, #0] + 800346e: 689a ldr r2, [r3, #8] + 8003470: 687b ldr r3, [r7, #4] + 8003472: 681b ldr r3, [r3, #0] + 8003474: f022 0201 bic.w r2, r2, #1 + 8003478: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); - 8002b26: f7ff fe0f bl 8002748 - 8002b2a: 60f8 str r0, [r7, #12] + 800347a: f7ff fdeb bl 8003054 + 800347e: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) - 8002b2c: e01b b.n 8002b66 + 8003480: e01b b.n 80034ba { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) - 8002b2e: f7ff fe0b bl 8002748 - 8002b32: 4602 mov r2, r0 - 8002b34: 68fb ldr r3, [r7, #12] - 8002b36: 1ad3 subs r3, r2, r3 - 8002b38: 2b02 cmp r3, #2 - 8002b3a: d914 bls.n 8002b66 + 8003482: f7ff fde7 bl 8003054 + 8003486: 4602 mov r2, r0 + 8003488: 68fb ldr r3, [r7, #12] + 800348a: 1ad3 subs r3, r2, r3 + 800348c: 2b02 cmp r3, #2 + 800348e: d914 bls.n 80034ba { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) - 8002b3c: 687b ldr r3, [r7, #4] - 8002b3e: 681b ldr r3, [r3, #0] - 8002b40: 689b ldr r3, [r3, #8] - 8002b42: f003 0301 and.w r3, r3, #1 - 8002b46: 2b01 cmp r3, #1 - 8002b48: d10d bne.n 8002b66 + 8003490: 687b ldr r3, [r7, #4] + 8003492: 681b ldr r3, [r3, #0] + 8003494: 689b ldr r3, [r3, #8] + 8003496: f003 0301 and.w r3, r3, #1 + 800349a: 2b01 cmp r3, #1 + 800349c: d10d bne.n 80034ba { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8002b4a: 687b ldr r3, [r7, #4] - 8002b4c: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002b4e: f043 0210 orr.w r2, r3, #16 - 8002b52: 687b ldr r3, [r7, #4] - 8002b54: 629a str r2, [r3, #40] @ 0x28 + 800349e: 687b ldr r3, [r7, #4] + 80034a0: 6a9b ldr r3, [r3, #40] @ 0x28 + 80034a2: f043 0210 orr.w r2, r3, #16 + 80034a6: 687b ldr r3, [r7, #4] + 80034a8: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8002b56: 687b ldr r3, [r7, #4] - 8002b58: 6adb ldr r3, [r3, #44] @ 0x2c - 8002b5a: f043 0201 orr.w r2, r3, #1 - 8002b5e: 687b ldr r3, [r7, #4] - 8002b60: 62da str r2, [r3, #44] @ 0x2c + 80034aa: 687b ldr r3, [r7, #4] + 80034ac: 6adb ldr r3, [r3, #44] @ 0x2c + 80034ae: f043 0201 orr.w r2, r3, #1 + 80034b2: 687b ldr r3, [r7, #4] + 80034b4: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; - 8002b62: 2301 movs r3, #1 - 8002b64: e007 b.n 8002b76 + 80034b6: 2301 movs r3, #1 + 80034b8: e007 b.n 80034ca while(ADC_IS_ENABLE(hadc) != RESET) - 8002b66: 687b ldr r3, [r7, #4] - 8002b68: 681b ldr r3, [r3, #0] - 8002b6a: 689b ldr r3, [r3, #8] - 8002b6c: f003 0301 and.w r3, r3, #1 - 8002b70: 2b01 cmp r3, #1 - 8002b72: d0dc beq.n 8002b2e + 80034ba: 687b ldr r3, [r7, #4] + 80034bc: 681b ldr r3, [r3, #0] + 80034be: 689b ldr r3, [r3, #8] + 80034c0: f003 0301 and.w r3, r3, #1 + 80034c4: 2b01 cmp r3, #1 + 80034c6: d0dc beq.n 8003482 } } } /* Return HAL status */ return HAL_OK; - 8002b74: 2300 movs r3, #0 + 80034c8: 2300 movs r3, #0 } - 8002b76: 4618 mov r0, r3 - 8002b78: 3710 adds r7, #16 - 8002b7a: 46bd mov sp, r7 - 8002b7c: bd80 pop {r7, pc} + 80034ca: 4618 mov r0, r3 + 80034cc: 3710 adds r7, #16 + 80034ce: 46bd mov sp, r7 + 80034d0: bd80 pop {r7, pc} ... -08002b80 <__NVIC_SetPriorityGrouping>: +080034d4 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8002b80: b480 push {r7} - 8002b82: b085 sub sp, #20 - 8002b84: af00 add r7, sp, #0 - 8002b86: 6078 str r0, [r7, #4] + 80034d4: b480 push {r7} + 80034d6: b085 sub sp, #20 + 80034d8: af00 add r7, sp, #0 + 80034da: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8002b88: 687b ldr r3, [r7, #4] - 8002b8a: f003 0307 and.w r3, r3, #7 - 8002b8e: 60fb str r3, [r7, #12] + 80034dc: 687b ldr r3, [r7, #4] + 80034de: f003 0307 and.w r3, r3, #7 + 80034e2: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 8002b90: 4b0c ldr r3, [pc, #48] @ (8002bc4 <__NVIC_SetPriorityGrouping+0x44>) - 8002b92: 68db ldr r3, [r3, #12] - 8002b94: 60bb str r3, [r7, #8] + 80034e4: 4b0c ldr r3, [pc, #48] @ (8003518 <__NVIC_SetPriorityGrouping+0x44>) + 80034e6: 68db ldr r3, [r3, #12] + 80034e8: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 8002b96: 68ba ldr r2, [r7, #8] - 8002b98: f64f 03ff movw r3, #63743 @ 0xf8ff - 8002b9c: 4013 ands r3, r2 - 8002b9e: 60bb str r3, [r7, #8] + 80034ea: 68ba ldr r2, [r7, #8] + 80034ec: f64f 03ff movw r3, #63743 @ 0xf8ff + 80034f0: 4013 ands r3, r2 + 80034f2: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 8002ba0: 68fb ldr r3, [r7, #12] - 8002ba2: 021a lsls r2, r3, #8 + 80034f4: 68fb ldr r3, [r7, #12] + 80034f6: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8002ba4: 68bb ldr r3, [r7, #8] - 8002ba6: 4313 orrs r3, r2 + 80034f8: 68bb ldr r3, [r7, #8] + 80034fa: 4313 orrs r3, r2 reg_value = (reg_value | - 8002ba8: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 - 8002bac: f443 3300 orr.w r3, r3, #131072 @ 0x20000 - 8002bb0: 60bb str r3, [r7, #8] + 80034fc: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 + 8003500: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 8003504: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 8002bb2: 4a04 ldr r2, [pc, #16] @ (8002bc4 <__NVIC_SetPriorityGrouping+0x44>) - 8002bb4: 68bb ldr r3, [r7, #8] - 8002bb6: 60d3 str r3, [r2, #12] + 8003506: 4a04 ldr r2, [pc, #16] @ (8003518 <__NVIC_SetPriorityGrouping+0x44>) + 8003508: 68bb ldr r3, [r7, #8] + 800350a: 60d3 str r3, [r2, #12] } - 8002bb8: bf00 nop - 8002bba: 3714 adds r7, #20 - 8002bbc: 46bd mov sp, r7 - 8002bbe: bc80 pop {r7} - 8002bc0: 4770 bx lr - 8002bc2: bf00 nop - 8002bc4: e000ed00 .word 0xe000ed00 + 800350c: bf00 nop + 800350e: 3714 adds r7, #20 + 8003510: 46bd mov sp, r7 + 8003512: bc80 pop {r7} + 8003514: 4770 bx lr + 8003516: bf00 nop + 8003518: e000ed00 .word 0xe000ed00 -08002bc8 <__NVIC_GetPriorityGrouping>: +0800351c <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 8002bc8: b480 push {r7} - 8002bca: af00 add r7, sp, #0 + 800351c: b480 push {r7} + 800351e: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8002bcc: 4b04 ldr r3, [pc, #16] @ (8002be0 <__NVIC_GetPriorityGrouping+0x18>) - 8002bce: 68db ldr r3, [r3, #12] - 8002bd0: 0a1b lsrs r3, r3, #8 - 8002bd2: f003 0307 and.w r3, r3, #7 + 8003520: 4b04 ldr r3, [pc, #16] @ (8003534 <__NVIC_GetPriorityGrouping+0x18>) + 8003522: 68db ldr r3, [r3, #12] + 8003524: 0a1b lsrs r3, r3, #8 + 8003526: f003 0307 and.w r3, r3, #7 } - 8002bd6: 4618 mov r0, r3 - 8002bd8: 46bd mov sp, r7 - 8002bda: bc80 pop {r7} - 8002bdc: 4770 bx lr - 8002bde: bf00 nop - 8002be0: e000ed00 .word 0xe000ed00 + 800352a: 4618 mov r0, r3 + 800352c: 46bd mov sp, r7 + 800352e: bc80 pop {r7} + 8003530: 4770 bx lr + 8003532: bf00 nop + 8003534: e000ed00 .word 0xe000ed00 -08002be4 <__NVIC_EnableIRQ>: +08003538 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { - 8002be4: b480 push {r7} - 8002be6: b083 sub sp, #12 - 8002be8: af00 add r7, sp, #0 - 8002bea: 4603 mov r3, r0 - 8002bec: 71fb strb r3, [r7, #7] + 8003538: b480 push {r7} + 800353a: b083 sub sp, #12 + 800353c: af00 add r7, sp, #0 + 800353e: 4603 mov r3, r0 + 8003540: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8002bee: f997 3007 ldrsb.w r3, [r7, #7] - 8002bf2: 2b00 cmp r3, #0 - 8002bf4: db0b blt.n 8002c0e <__NVIC_EnableIRQ+0x2a> + 8003542: f997 3007 ldrsb.w r3, [r7, #7] + 8003546: 2b00 cmp r3, #0 + 8003548: db0b blt.n 8003562 <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8002bf6: 79fb ldrb r3, [r7, #7] - 8002bf8: f003 021f and.w r2, r3, #31 - 8002bfc: 4906 ldr r1, [pc, #24] @ (8002c18 <__NVIC_EnableIRQ+0x34>) - 8002bfe: f997 3007 ldrsb.w r3, [r7, #7] - 8002c02: 095b lsrs r3, r3, #5 - 8002c04: 2001 movs r0, #1 - 8002c06: fa00 f202 lsl.w r2, r0, r2 - 8002c0a: f841 2023 str.w r2, [r1, r3, lsl #2] + 800354a: 79fb ldrb r3, [r7, #7] + 800354c: f003 021f and.w r2, r3, #31 + 8003550: 4906 ldr r1, [pc, #24] @ (800356c <__NVIC_EnableIRQ+0x34>) + 8003552: f997 3007 ldrsb.w r3, [r7, #7] + 8003556: 095b lsrs r3, r3, #5 + 8003558: 2001 movs r0, #1 + 800355a: fa00 f202 lsl.w r2, r0, r2 + 800355e: f841 2023 str.w r2, [r1, r3, lsl #2] } } - 8002c0e: bf00 nop - 8002c10: 370c adds r7, #12 - 8002c12: 46bd mov sp, r7 - 8002c14: bc80 pop {r7} - 8002c16: 4770 bx lr - 8002c18: e000e100 .word 0xe000e100 + 8003562: bf00 nop + 8003564: 370c adds r7, #12 + 8003566: 46bd mov sp, r7 + 8003568: bc80 pop {r7} + 800356a: 4770 bx lr + 800356c: e000e100 .word 0xe000e100 -08002c1c <__NVIC_SetPriority>: +08003570 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8002c1c: b480 push {r7} - 8002c1e: b083 sub sp, #12 - 8002c20: af00 add r7, sp, #0 - 8002c22: 4603 mov r3, r0 - 8002c24: 6039 str r1, [r7, #0] - 8002c26: 71fb strb r3, [r7, #7] + 8003570: b480 push {r7} + 8003572: b083 sub sp, #12 + 8003574: af00 add r7, sp, #0 + 8003576: 4603 mov r3, r0 + 8003578: 6039 str r1, [r7, #0] + 800357a: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8002c28: f997 3007 ldrsb.w r3, [r7, #7] - 8002c2c: 2b00 cmp r3, #0 - 8002c2e: db0a blt.n 8002c46 <__NVIC_SetPriority+0x2a> + 800357c: f997 3007 ldrsb.w r3, [r7, #7] + 8003580: 2b00 cmp r3, #0 + 8003582: db0a blt.n 800359a <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8002c30: 683b ldr r3, [r7, #0] - 8002c32: b2da uxtb r2, r3 - 8002c34: 490c ldr r1, [pc, #48] @ (8002c68 <__NVIC_SetPriority+0x4c>) - 8002c36: f997 3007 ldrsb.w r3, [r7, #7] - 8002c3a: 0112 lsls r2, r2, #4 - 8002c3c: b2d2 uxtb r2, r2 - 8002c3e: 440b add r3, r1 - 8002c40: f883 2300 strb.w r2, [r3, #768] @ 0x300 + 8003584: 683b ldr r3, [r7, #0] + 8003586: b2da uxtb r2, r3 + 8003588: 490c ldr r1, [pc, #48] @ (80035bc <__NVIC_SetPriority+0x4c>) + 800358a: f997 3007 ldrsb.w r3, [r7, #7] + 800358e: 0112 lsls r2, r2, #4 + 8003590: b2d2 uxtb r2, r2 + 8003592: 440b add r3, r1 + 8003594: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 8002c44: e00a b.n 8002c5c <__NVIC_SetPriority+0x40> + 8003598: e00a b.n 80035b0 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8002c46: 683b ldr r3, [r7, #0] - 8002c48: b2da uxtb r2, r3 - 8002c4a: 4908 ldr r1, [pc, #32] @ (8002c6c <__NVIC_SetPriority+0x50>) - 8002c4c: 79fb ldrb r3, [r7, #7] - 8002c4e: f003 030f and.w r3, r3, #15 - 8002c52: 3b04 subs r3, #4 - 8002c54: 0112 lsls r2, r2, #4 - 8002c56: b2d2 uxtb r2, r2 - 8002c58: 440b add r3, r1 - 8002c5a: 761a strb r2, [r3, #24] + 800359a: 683b ldr r3, [r7, #0] + 800359c: b2da uxtb r2, r3 + 800359e: 4908 ldr r1, [pc, #32] @ (80035c0 <__NVIC_SetPriority+0x50>) + 80035a0: 79fb ldrb r3, [r7, #7] + 80035a2: f003 030f and.w r3, r3, #15 + 80035a6: 3b04 subs r3, #4 + 80035a8: 0112 lsls r2, r2, #4 + 80035aa: b2d2 uxtb r2, r2 + 80035ac: 440b add r3, r1 + 80035ae: 761a strb r2, [r3, #24] } - 8002c5c: bf00 nop - 8002c5e: 370c adds r7, #12 - 8002c60: 46bd mov sp, r7 - 8002c62: bc80 pop {r7} - 8002c64: 4770 bx lr - 8002c66: bf00 nop - 8002c68: e000e100 .word 0xe000e100 - 8002c6c: e000ed00 .word 0xe000ed00 + 80035b0: bf00 nop + 80035b2: 370c adds r7, #12 + 80035b4: 46bd mov sp, r7 + 80035b6: bc80 pop {r7} + 80035b8: 4770 bx lr + 80035ba: bf00 nop + 80035bc: e000e100 .word 0xe000e100 + 80035c0: e000ed00 .word 0xe000ed00 -08002c70 : +080035c4 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 8002c70: b480 push {r7} - 8002c72: b089 sub sp, #36 @ 0x24 - 8002c74: af00 add r7, sp, #0 - 8002c76: 60f8 str r0, [r7, #12] - 8002c78: 60b9 str r1, [r7, #8] - 8002c7a: 607a str r2, [r7, #4] + 80035c4: b480 push {r7} + 80035c6: b089 sub sp, #36 @ 0x24 + 80035c8: af00 add r7, sp, #0 + 80035ca: 60f8 str r0, [r7, #12] + 80035cc: 60b9 str r1, [r7, #8] + 80035ce: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8002c7c: 68fb ldr r3, [r7, #12] - 8002c7e: f003 0307 and.w r3, r3, #7 - 8002c82: 61fb str r3, [r7, #28] + 80035d0: 68fb ldr r3, [r7, #12] + 80035d2: f003 0307 and.w r3, r3, #7 + 80035d6: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8002c84: 69fb ldr r3, [r7, #28] - 8002c86: f1c3 0307 rsb r3, r3, #7 - 8002c8a: 2b04 cmp r3, #4 - 8002c8c: bf28 it cs - 8002c8e: 2304 movcs r3, #4 - 8002c90: 61bb str r3, [r7, #24] + 80035d8: 69fb ldr r3, [r7, #28] + 80035da: f1c3 0307 rsb r3, r3, #7 + 80035de: 2b04 cmp r3, #4 + 80035e0: bf28 it cs + 80035e2: 2304 movcs r3, #4 + 80035e4: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 8002c92: 69fb ldr r3, [r7, #28] - 8002c94: 3304 adds r3, #4 - 8002c96: 2b06 cmp r3, #6 - 8002c98: d902 bls.n 8002ca0 - 8002c9a: 69fb ldr r3, [r7, #28] - 8002c9c: 3b03 subs r3, #3 - 8002c9e: e000 b.n 8002ca2 - 8002ca0: 2300 movs r3, #0 - 8002ca2: 617b str r3, [r7, #20] + 80035e6: 69fb ldr r3, [r7, #28] + 80035e8: 3304 adds r3, #4 + 80035ea: 2b06 cmp r3, #6 + 80035ec: d902 bls.n 80035f4 + 80035ee: 69fb ldr r3, [r7, #28] + 80035f0: 3b03 subs r3, #3 + 80035f2: e000 b.n 80035f6 + 80035f4: 2300 movs r3, #0 + 80035f6: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8002ca4: f04f 32ff mov.w r2, #4294967295 - 8002ca8: 69bb ldr r3, [r7, #24] - 8002caa: fa02 f303 lsl.w r3, r2, r3 - 8002cae: 43da mvns r2, r3 - 8002cb0: 68bb ldr r3, [r7, #8] - 8002cb2: 401a ands r2, r3 - 8002cb4: 697b ldr r3, [r7, #20] - 8002cb6: 409a lsls r2, r3 + 80035f8: f04f 32ff mov.w r2, #4294967295 + 80035fc: 69bb ldr r3, [r7, #24] + 80035fe: fa02 f303 lsl.w r3, r2, r3 + 8003602: 43da mvns r2, r3 + 8003604: 68bb ldr r3, [r7, #8] + 8003606: 401a ands r2, r3 + 8003608: 697b ldr r3, [r7, #20] + 800360a: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8002cb8: f04f 31ff mov.w r1, #4294967295 - 8002cbc: 697b ldr r3, [r7, #20] - 8002cbe: fa01 f303 lsl.w r3, r1, r3 - 8002cc2: 43d9 mvns r1, r3 - 8002cc4: 687b ldr r3, [r7, #4] - 8002cc6: 400b ands r3, r1 + 800360c: f04f 31ff mov.w r1, #4294967295 + 8003610: 697b ldr r3, [r7, #20] + 8003612: fa01 f303 lsl.w r3, r1, r3 + 8003616: 43d9 mvns r1, r3 + 8003618: 687b ldr r3, [r7, #4] + 800361a: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8002cc8: 4313 orrs r3, r2 + 800361c: 4313 orrs r3, r2 ); } - 8002cca: 4618 mov r0, r3 - 8002ccc: 3724 adds r7, #36 @ 0x24 - 8002cce: 46bd mov sp, r7 - 8002cd0: bc80 pop {r7} - 8002cd2: 4770 bx lr + 800361e: 4618 mov r0, r3 + 8003620: 3724 adds r7, #36 @ 0x24 + 8003622: 46bd mov sp, r7 + 8003624: bc80 pop {r7} + 8003626: 4770 bx lr -08002cd4 : +08003628 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8002cd4: b580 push {r7, lr} - 8002cd6: b082 sub sp, #8 - 8002cd8: af00 add r7, sp, #0 - 8002cda: 6078 str r0, [r7, #4] + 8003628: b580 push {r7, lr} + 800362a: b082 sub sp, #8 + 800362c: af00 add r7, sp, #0 + 800362e: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8002cdc: 687b ldr r3, [r7, #4] - 8002cde: 3b01 subs r3, #1 - 8002ce0: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 - 8002ce4: d301 bcc.n 8002cea + 8003630: 687b ldr r3, [r7, #4] + 8003632: 3b01 subs r3, #1 + 8003634: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 + 8003638: d301 bcc.n 800363e { return (1UL); /* Reload value impossible */ - 8002ce6: 2301 movs r3, #1 - 8002ce8: e00f b.n 8002d0a + 800363a: 2301 movs r3, #1 + 800363c: e00f b.n 800365e } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8002cea: 4a0a ldr r2, [pc, #40] @ (8002d14 ) - 8002cec: 687b ldr r3, [r7, #4] - 8002cee: 3b01 subs r3, #1 - 8002cf0: 6053 str r3, [r2, #4] + 800363e: 4a0a ldr r2, [pc, #40] @ (8003668 ) + 8003640: 687b ldr r3, [r7, #4] + 8003642: 3b01 subs r3, #1 + 8003644: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8002cf2: 210f movs r1, #15 - 8002cf4: f04f 30ff mov.w r0, #4294967295 - 8002cf8: f7ff ff90 bl 8002c1c <__NVIC_SetPriority> + 8003646: 210f movs r1, #15 + 8003648: f04f 30ff mov.w r0, #4294967295 + 800364c: f7ff ff90 bl 8003570 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8002cfc: 4b05 ldr r3, [pc, #20] @ (8002d14 ) - 8002cfe: 2200 movs r2, #0 - 8002d00: 609a str r2, [r3, #8] + 8003650: 4b05 ldr r3, [pc, #20] @ (8003668 ) + 8003652: 2200 movs r2, #0 + 8003654: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8002d02: 4b04 ldr r3, [pc, #16] @ (8002d14 ) - 8002d04: 2207 movs r2, #7 - 8002d06: 601a str r2, [r3, #0] + 8003656: 4b04 ldr r3, [pc, #16] @ (8003668 ) + 8003658: 2207 movs r2, #7 + 800365a: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8002d08: 2300 movs r3, #0 + 800365c: 2300 movs r3, #0 } - 8002d0a: 4618 mov r0, r3 - 8002d0c: 3708 adds r7, #8 - 8002d0e: 46bd mov sp, r7 - 8002d10: bd80 pop {r7, pc} - 8002d12: bf00 nop - 8002d14: e000e010 .word 0xe000e010 + 800365e: 4618 mov r0, r3 + 8003660: 3708 adds r7, #8 + 8003662: 46bd mov sp, r7 + 8003664: bd80 pop {r7, pc} + 8003666: bf00 nop + 8003668: e000e010 .word 0xe000e010 -08002d18 : +0800366c : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8002d18: b580 push {r7, lr} - 8002d1a: b082 sub sp, #8 - 8002d1c: af00 add r7, sp, #0 - 8002d1e: 6078 str r0, [r7, #4] + 800366c: b580 push {r7, lr} + 800366e: b082 sub sp, #8 + 8003670: af00 add r7, sp, #0 + 8003672: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 8002d20: 6878 ldr r0, [r7, #4] - 8002d22: f7ff ff2d bl 8002b80 <__NVIC_SetPriorityGrouping> + 8003674: 6878 ldr r0, [r7, #4] + 8003676: f7ff ff2d bl 80034d4 <__NVIC_SetPriorityGrouping> } - 8002d26: bf00 nop - 8002d28: 3708 adds r7, #8 - 8002d2a: 46bd mov sp, r7 - 8002d2c: bd80 pop {r7, pc} + 800367a: bf00 nop + 800367c: 3708 adds r7, #8 + 800367e: 46bd mov sp, r7 + 8003680: bd80 pop {r7, pc} -08002d2e : +08003682 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8002d2e: b580 push {r7, lr} - 8002d30: b086 sub sp, #24 - 8002d32: af00 add r7, sp, #0 - 8002d34: 4603 mov r3, r0 - 8002d36: 60b9 str r1, [r7, #8] - 8002d38: 607a str r2, [r7, #4] - 8002d3a: 73fb strb r3, [r7, #15] + 8003682: b580 push {r7, lr} + 8003684: b086 sub sp, #24 + 8003686: af00 add r7, sp, #0 + 8003688: 4603 mov r3, r0 + 800368a: 60b9 str r1, [r7, #8] + 800368c: 607a str r2, [r7, #4] + 800368e: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; - 8002d3c: 2300 movs r3, #0 - 8002d3e: 617b str r3, [r7, #20] + 8003690: 2300 movs r3, #0 + 8003692: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8002d40: f7ff ff42 bl 8002bc8 <__NVIC_GetPriorityGrouping> - 8002d44: 6178 str r0, [r7, #20] + 8003694: f7ff ff42 bl 800351c <__NVIC_GetPriorityGrouping> + 8003698: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 8002d46: 687a ldr r2, [r7, #4] - 8002d48: 68b9 ldr r1, [r7, #8] - 8002d4a: 6978 ldr r0, [r7, #20] - 8002d4c: f7ff ff90 bl 8002c70 - 8002d50: 4602 mov r2, r0 - 8002d52: f997 300f ldrsb.w r3, [r7, #15] - 8002d56: 4611 mov r1, r2 - 8002d58: 4618 mov r0, r3 - 8002d5a: f7ff ff5f bl 8002c1c <__NVIC_SetPriority> + 800369a: 687a ldr r2, [r7, #4] + 800369c: 68b9 ldr r1, [r7, #8] + 800369e: 6978 ldr r0, [r7, #20] + 80036a0: f7ff ff90 bl 80035c4 + 80036a4: 4602 mov r2, r0 + 80036a6: f997 300f ldrsb.w r3, [r7, #15] + 80036aa: 4611 mov r1, r2 + 80036ac: 4618 mov r0, r3 + 80036ae: f7ff ff5f bl 8003570 <__NVIC_SetPriority> } - 8002d5e: bf00 nop - 8002d60: 3718 adds r7, #24 - 8002d62: 46bd mov sp, r7 - 8002d64: bd80 pop {r7, pc} + 80036b2: bf00 nop + 80036b4: 3718 adds r7, #24 + 80036b6: 46bd mov sp, r7 + 80036b8: bd80 pop {r7, pc} -08002d66 : +080036ba : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 8002d66: b580 push {r7, lr} - 8002d68: b082 sub sp, #8 - 8002d6a: af00 add r7, sp, #0 - 8002d6c: 4603 mov r3, r0 - 8002d6e: 71fb strb r3, [r7, #7] + 80036ba: b580 push {r7, lr} + 80036bc: b082 sub sp, #8 + 80036be: af00 add r7, sp, #0 + 80036c0: 4603 mov r3, r0 + 80036c2: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 8002d70: f997 3007 ldrsb.w r3, [r7, #7] - 8002d74: 4618 mov r0, r3 - 8002d76: f7ff ff35 bl 8002be4 <__NVIC_EnableIRQ> + 80036c4: f997 3007 ldrsb.w r3, [r7, #7] + 80036c8: 4618 mov r0, r3 + 80036ca: f7ff ff35 bl 8003538 <__NVIC_EnableIRQ> } - 8002d7a: bf00 nop - 8002d7c: 3708 adds r7, #8 - 8002d7e: 46bd mov sp, r7 - 8002d80: bd80 pop {r7, pc} + 80036ce: bf00 nop + 80036d0: 3708 adds r7, #8 + 80036d2: 46bd mov sp, r7 + 80036d4: bd80 pop {r7, pc} -08002d82 : +080036d6 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8002d82: b580 push {r7, lr} - 8002d84: b082 sub sp, #8 - 8002d86: af00 add r7, sp, #0 - 8002d88: 6078 str r0, [r7, #4] + 80036d6: b580 push {r7, lr} + 80036d8: b082 sub sp, #8 + 80036da: af00 add r7, sp, #0 + 80036dc: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 8002d8a: 6878 ldr r0, [r7, #4] - 8002d8c: f7ff ffa2 bl 8002cd4 - 8002d90: 4603 mov r3, r0 + 80036de: 6878 ldr r0, [r7, #4] + 80036e0: f7ff ffa2 bl 8003628 + 80036e4: 4603 mov r3, r0 } - 8002d92: 4618 mov r0, r3 - 8002d94: 3708 adds r7, #8 - 8002d96: 46bd mov sp, r7 - 8002d98: bd80 pop {r7, pc} + 80036e6: 4618 mov r0, r3 + 80036e8: 3708 adds r7, #8 + 80036ea: 46bd mov sp, r7 + 80036ec: bd80 pop {r7, pc} -08002d9a : +080036ee : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { - 8002d9a: b480 push {r7} - 8002d9c: b085 sub sp, #20 - 8002d9e: af00 add r7, sp, #0 - 8002da0: 6078 str r0, [r7, #4] + 80036ee: b480 push {r7} + 80036f0: b085 sub sp, #20 + 80036f2: af00 add r7, sp, #0 + 80036f4: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8002da2: 2300 movs r3, #0 - 8002da4: 73fb strb r3, [r7, #15] + 80036f6: 2300 movs r3, #0 + 80036f8: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) - 8002da6: 687b ldr r3, [r7, #4] - 8002da8: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 - 8002dac: b2db uxtb r3, r3 - 8002dae: 2b02 cmp r3, #2 - 8002db0: d008 beq.n 8002dc4 + 80036fa: 687b ldr r3, [r7, #4] + 80036fc: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 + 8003700: b2db uxtb r3, r3 + 8003702: 2b02 cmp r3, #2 + 8003704: d008 beq.n 8003718 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8002db2: 687b ldr r3, [r7, #4] - 8002db4: 2204 movs r2, #4 - 8002db6: 639a str r2, [r3, #56] @ 0x38 + 8003706: 687b ldr r3, [r7, #4] + 8003708: 2204 movs r2, #4 + 800370a: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8002db8: 687b ldr r3, [r7, #4] - 8002dba: 2200 movs r2, #0 - 8002dbc: f883 2020 strb.w r2, [r3, #32] + 800370c: 687b ldr r3, [r7, #4] + 800370e: 2200 movs r2, #0 + 8003710: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; - 8002dc0: 2301 movs r3, #1 - 8002dc2: e020 b.n 8002e06 + 8003714: 2301 movs r3, #1 + 8003716: e020 b.n 800375a } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8002dc4: 687b ldr r3, [r7, #4] - 8002dc6: 681b ldr r3, [r3, #0] - 8002dc8: 681a ldr r2, [r3, #0] - 8002dca: 687b ldr r3, [r7, #4] - 8002dcc: 681b ldr r3, [r3, #0] - 8002dce: f022 020e bic.w r2, r2, #14 - 8002dd2: 601a str r2, [r3, #0] + 8003718: 687b ldr r3, [r7, #4] + 800371a: 681b ldr r3, [r3, #0] + 800371c: 681a ldr r2, [r3, #0] + 800371e: 687b ldr r3, [r7, #4] + 8003720: 681b ldr r3, [r3, #0] + 8003722: f022 020e bic.w r2, r2, #14 + 8003726: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 8002dd4: 687b ldr r3, [r7, #4] - 8002dd6: 681b ldr r3, [r3, #0] - 8002dd8: 681a ldr r2, [r3, #0] - 8002dda: 687b ldr r3, [r7, #4] - 8002ddc: 681b ldr r3, [r3, #0] - 8002dde: f022 0201 bic.w r2, r2, #1 - 8002de2: 601a str r2, [r3, #0] + 8003728: 687b ldr r3, [r7, #4] + 800372a: 681b ldr r3, [r3, #0] + 800372c: 681a ldr r2, [r3, #0] + 800372e: 687b ldr r3, [r7, #4] + 8003730: 681b ldr r3, [r3, #0] + 8003732: f022 0201 bic.w r2, r2, #1 + 8003736: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - 8002de4: 687b ldr r3, [r7, #4] - 8002de6: 6c1a ldr r2, [r3, #64] @ 0x40 - 8002de8: 687b ldr r3, [r7, #4] - 8002dea: 6bdb ldr r3, [r3, #60] @ 0x3c - 8002dec: 2101 movs r1, #1 - 8002dee: fa01 f202 lsl.w r2, r1, r2 - 8002df2: 605a str r2, [r3, #4] + 8003738: 687b ldr r3, [r7, #4] + 800373a: 6c1a ldr r2, [r3, #64] @ 0x40 + 800373c: 687b ldr r3, [r7, #4] + 800373e: 6bdb ldr r3, [r3, #60] @ 0x3c + 8003740: 2101 movs r1, #1 + 8003742: fa01 f202 lsl.w r2, r1, r2 + 8003746: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8002df4: 687b ldr r3, [r7, #4] - 8002df6: 2201 movs r2, #1 - 8002df8: f883 2021 strb.w r2, [r3, #33] @ 0x21 + 8003748: 687b ldr r3, [r7, #4] + 800374a: 2201 movs r2, #1 + 800374c: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8002dfc: 687b ldr r3, [r7, #4] - 8002dfe: 2200 movs r2, #0 - 8002e00: f883 2020 strb.w r2, [r3, #32] + 8003750: 687b ldr r3, [r7, #4] + 8003752: 2200 movs r2, #0 + 8003754: f883 2020 strb.w r2, [r3, #32] return status; - 8002e04: 7bfb ldrb r3, [r7, #15] + 8003758: 7bfb ldrb r3, [r7, #15] } - 8002e06: 4618 mov r0, r3 - 8002e08: 3714 adds r7, #20 - 8002e0a: 46bd mov sp, r7 - 8002e0c: bc80 pop {r7} - 8002e0e: 4770 bx lr + 800375a: 4618 mov r0, r3 + 800375c: 3714 adds r7, #20 + 800375e: 46bd mov sp, r7 + 8003760: bc80 pop {r7} + 8003762: 4770 bx lr -08002e10 : +08003764 : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { - 8002e10: b580 push {r7, lr} - 8002e12: b084 sub sp, #16 - 8002e14: af00 add r7, sp, #0 - 8002e16: 6078 str r0, [r7, #4] + 8003764: b580 push {r7, lr} + 8003766: b084 sub sp, #16 + 8003768: af00 add r7, sp, #0 + 800376a: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8002e18: 2300 movs r3, #0 - 8002e1a: 73fb strb r3, [r7, #15] + 800376c: 2300 movs r3, #0 + 800376e: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) - 8002e1c: 687b ldr r3, [r7, #4] - 8002e1e: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 - 8002e22: b2db uxtb r3, r3 - 8002e24: 2b02 cmp r3, #2 - 8002e26: d005 beq.n 8002e34 + 8003770: 687b ldr r3, [r7, #4] + 8003772: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 + 8003776: b2db uxtb r3, r3 + 8003778: 2b02 cmp r3, #2 + 800377a: d005 beq.n 8003788 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8002e28: 687b ldr r3, [r7, #4] - 8002e2a: 2204 movs r2, #4 - 8002e2c: 639a str r2, [r3, #56] @ 0x38 + 800377c: 687b ldr r3, [r7, #4] + 800377e: 2204 movs r2, #4 + 8003780: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; - 8002e2e: 2301 movs r3, #1 - 8002e30: 73fb strb r3, [r7, #15] - 8002e32: e051 b.n 8002ed8 + 8003782: 2301 movs r3, #1 + 8003784: 73fb strb r3, [r7, #15] + 8003786: e051 b.n 800382c } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8002e34: 687b ldr r3, [r7, #4] - 8002e36: 681b ldr r3, [r3, #0] - 8002e38: 681a ldr r2, [r3, #0] - 8002e3a: 687b ldr r3, [r7, #4] - 8002e3c: 681b ldr r3, [r3, #0] - 8002e3e: f022 020e bic.w r2, r2, #14 - 8002e42: 601a str r2, [r3, #0] + 8003788: 687b ldr r3, [r7, #4] + 800378a: 681b ldr r3, [r3, #0] + 800378c: 681a ldr r2, [r3, #0] + 800378e: 687b ldr r3, [r7, #4] + 8003790: 681b ldr r3, [r3, #0] + 8003792: f022 020e bic.w r2, r2, #14 + 8003796: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 8002e44: 687b ldr r3, [r7, #4] - 8002e46: 681b ldr r3, [r3, #0] - 8002e48: 681a ldr r2, [r3, #0] - 8002e4a: 687b ldr r3, [r7, #4] - 8002e4c: 681b ldr r3, [r3, #0] - 8002e4e: f022 0201 bic.w r2, r2, #1 - 8002e52: 601a str r2, [r3, #0] + 8003798: 687b ldr r3, [r7, #4] + 800379a: 681b ldr r3, [r3, #0] + 800379c: 681a ldr r2, [r3, #0] + 800379e: 687b ldr r3, [r7, #4] + 80037a0: 681b ldr r3, [r3, #0] + 80037a2: f022 0201 bic.w r2, r2, #1 + 80037a6: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); - 8002e54: 687b ldr r3, [r7, #4] - 8002e56: 681b ldr r3, [r3, #0] - 8002e58: 4a22 ldr r2, [pc, #136] @ (8002ee4 ) - 8002e5a: 4293 cmp r3, r2 - 8002e5c: d029 beq.n 8002eb2 - 8002e5e: 687b ldr r3, [r7, #4] - 8002e60: 681b ldr r3, [r3, #0] - 8002e62: 4a21 ldr r2, [pc, #132] @ (8002ee8 ) - 8002e64: 4293 cmp r3, r2 - 8002e66: d022 beq.n 8002eae - 8002e68: 687b ldr r3, [r7, #4] - 8002e6a: 681b ldr r3, [r3, #0] - 8002e6c: 4a1f ldr r2, [pc, #124] @ (8002eec ) - 8002e6e: 4293 cmp r3, r2 - 8002e70: d01a beq.n 8002ea8 - 8002e72: 687b ldr r3, [r7, #4] - 8002e74: 681b ldr r3, [r3, #0] - 8002e76: 4a1e ldr r2, [pc, #120] @ (8002ef0 ) - 8002e78: 4293 cmp r3, r2 - 8002e7a: d012 beq.n 8002ea2 - 8002e7c: 687b ldr r3, [r7, #4] - 8002e7e: 681b ldr r3, [r3, #0] - 8002e80: 4a1c ldr r2, [pc, #112] @ (8002ef4 ) - 8002e82: 4293 cmp r3, r2 - 8002e84: d00a beq.n 8002e9c - 8002e86: 687b ldr r3, [r7, #4] - 8002e88: 681b ldr r3, [r3, #0] - 8002e8a: 4a1b ldr r2, [pc, #108] @ (8002ef8 ) - 8002e8c: 4293 cmp r3, r2 - 8002e8e: d102 bne.n 8002e96 - 8002e90: f44f 1380 mov.w r3, #1048576 @ 0x100000 - 8002e94: e00e b.n 8002eb4 - 8002e96: f04f 7380 mov.w r3, #16777216 @ 0x1000000 - 8002e9a: e00b b.n 8002eb4 - 8002e9c: f44f 3380 mov.w r3, #65536 @ 0x10000 - 8002ea0: e008 b.n 8002eb4 - 8002ea2: f44f 5380 mov.w r3, #4096 @ 0x1000 - 8002ea6: e005 b.n 8002eb4 - 8002ea8: f44f 7380 mov.w r3, #256 @ 0x100 - 8002eac: e002 b.n 8002eb4 - 8002eae: 2310 movs r3, #16 - 8002eb0: e000 b.n 8002eb4 - 8002eb2: 2301 movs r3, #1 - 8002eb4: 4a11 ldr r2, [pc, #68] @ (8002efc ) - 8002eb6: 6053 str r3, [r2, #4] + 80037a8: 687b ldr r3, [r7, #4] + 80037aa: 681b ldr r3, [r3, #0] + 80037ac: 4a22 ldr r2, [pc, #136] @ (8003838 ) + 80037ae: 4293 cmp r3, r2 + 80037b0: d029 beq.n 8003806 + 80037b2: 687b ldr r3, [r7, #4] + 80037b4: 681b ldr r3, [r3, #0] + 80037b6: 4a21 ldr r2, [pc, #132] @ (800383c ) + 80037b8: 4293 cmp r3, r2 + 80037ba: d022 beq.n 8003802 + 80037bc: 687b ldr r3, [r7, #4] + 80037be: 681b ldr r3, [r3, #0] + 80037c0: 4a1f ldr r2, [pc, #124] @ (8003840 ) + 80037c2: 4293 cmp r3, r2 + 80037c4: d01a beq.n 80037fc + 80037c6: 687b ldr r3, [r7, #4] + 80037c8: 681b ldr r3, [r3, #0] + 80037ca: 4a1e ldr r2, [pc, #120] @ (8003844 ) + 80037cc: 4293 cmp r3, r2 + 80037ce: d012 beq.n 80037f6 + 80037d0: 687b ldr r3, [r7, #4] + 80037d2: 681b ldr r3, [r3, #0] + 80037d4: 4a1c ldr r2, [pc, #112] @ (8003848 ) + 80037d6: 4293 cmp r3, r2 + 80037d8: d00a beq.n 80037f0 + 80037da: 687b ldr r3, [r7, #4] + 80037dc: 681b ldr r3, [r3, #0] + 80037de: 4a1b ldr r2, [pc, #108] @ (800384c ) + 80037e0: 4293 cmp r3, r2 + 80037e2: d102 bne.n 80037ea + 80037e4: f44f 1380 mov.w r3, #1048576 @ 0x100000 + 80037e8: e00e b.n 8003808 + 80037ea: f04f 7380 mov.w r3, #16777216 @ 0x1000000 + 80037ee: e00b b.n 8003808 + 80037f0: f44f 3380 mov.w r3, #65536 @ 0x10000 + 80037f4: e008 b.n 8003808 + 80037f6: f44f 5380 mov.w r3, #4096 @ 0x1000 + 80037fa: e005 b.n 8003808 + 80037fc: f44f 7380 mov.w r3, #256 @ 0x100 + 8003800: e002 b.n 8003808 + 8003802: 2310 movs r3, #16 + 8003804: e000 b.n 8003808 + 8003806: 2301 movs r3, #1 + 8003808: 4a11 ldr r2, [pc, #68] @ (8003850 ) + 800380a: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8002eb8: 687b ldr r3, [r7, #4] - 8002eba: 2201 movs r2, #1 - 8002ebc: f883 2021 strb.w r2, [r3, #33] @ 0x21 + 800380c: 687b ldr r3, [r7, #4] + 800380e: 2201 movs r2, #1 + 8003810: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8002ec0: 687b ldr r3, [r7, #4] - 8002ec2: 2200 movs r2, #0 - 8002ec4: f883 2020 strb.w r2, [r3, #32] + 8003814: 687b ldr r3, [r7, #4] + 8003816: 2200 movs r2, #0 + 8003818: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) - 8002ec8: 687b ldr r3, [r7, #4] - 8002eca: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002ecc: 2b00 cmp r3, #0 - 8002ece: d003 beq.n 8002ed8 + 800381c: 687b ldr r3, [r7, #4] + 800381e: 6b5b ldr r3, [r3, #52] @ 0x34 + 8003820: 2b00 cmp r3, #0 + 8003822: d003 beq.n 800382c { hdma->XferAbortCallback(hdma); - 8002ed0: 687b ldr r3, [r7, #4] - 8002ed2: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002ed4: 6878 ldr r0, [r7, #4] - 8002ed6: 4798 blx r3 + 8003824: 687b ldr r3, [r7, #4] + 8003826: 6b5b ldr r3, [r3, #52] @ 0x34 + 8003828: 6878 ldr r0, [r7, #4] + 800382a: 4798 blx r3 } } return status; - 8002ed8: 7bfb ldrb r3, [r7, #15] + 800382c: 7bfb ldrb r3, [r7, #15] } - 8002eda: 4618 mov r0, r3 - 8002edc: 3710 adds r7, #16 - 8002ede: 46bd mov sp, r7 - 8002ee0: bd80 pop {r7, pc} - 8002ee2: bf00 nop - 8002ee4: 40020008 .word 0x40020008 - 8002ee8: 4002001c .word 0x4002001c - 8002eec: 40020030 .word 0x40020030 - 8002ef0: 40020044 .word 0x40020044 - 8002ef4: 40020058 .word 0x40020058 - 8002ef8: 4002006c .word 0x4002006c - 8002efc: 40020000 .word 0x40020000 + 800382e: 4618 mov r0, r3 + 8003830: 3710 adds r7, #16 + 8003832: 46bd mov sp, r7 + 8003834: bd80 pop {r7, pc} + 8003836: bf00 nop + 8003838: 40020008 .word 0x40020008 + 800383c: 4002001c .word 0x4002001c + 8003840: 40020030 .word 0x40020030 + 8003844: 40020044 .word 0x40020044 + 8003848: 40020058 .word 0x40020058 + 800384c: 4002006c .word 0x4002006c + 8003850: 40020000 .word 0x40020000 -08002f00 : +08003854 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8002f00: b480 push {r7} - 8002f02: b08b sub sp, #44 @ 0x2c - 8002f04: af00 add r7, sp, #0 - 8002f06: 6078 str r0, [r7, #4] - 8002f08: 6039 str r1, [r7, #0] + 8003854: b480 push {r7} + 8003856: b08b sub sp, #44 @ 0x2c + 8003858: af00 add r7, sp, #0 + 800385a: 6078 str r0, [r7, #4] + 800385c: 6039 str r1, [r7, #0] uint32_t position = 0x00u; - 8002f0a: 2300 movs r3, #0 - 8002f0c: 627b str r3, [r7, #36] @ 0x24 + 800385e: 2300 movs r3, #0 + 8003860: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; - 8002f0e: 2300 movs r3, #0 - 8002f10: 623b str r3, [r7, #32] + 8003862: 2300 movs r3, #0 + 8003864: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) - 8002f12: e169 b.n 80031e8 + 8003866: e169 b.n 8003b3c { /* Get the IO position */ ioposition = (0x01uL << position); - 8002f14: 2201 movs r2, #1 - 8002f16: 6a7b ldr r3, [r7, #36] @ 0x24 - 8002f18: fa02 f303 lsl.w r3, r2, r3 - 8002f1c: 61fb str r3, [r7, #28] + 8003868: 2201 movs r2, #1 + 800386a: 6a7b ldr r3, [r7, #36] @ 0x24 + 800386c: fa02 f303 lsl.w r3, r2, r3 + 8003870: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - 8002f1e: 683b ldr r3, [r7, #0] - 8002f20: 681b ldr r3, [r3, #0] - 8002f22: 69fa ldr r2, [r7, #28] - 8002f24: 4013 ands r3, r2 - 8002f26: 61bb str r3, [r7, #24] + 8003872: 683b ldr r3, [r7, #0] + 8003874: 681b ldr r3, [r3, #0] + 8003876: 69fa ldr r2, [r7, #28] + 8003878: 4013 ands r3, r2 + 800387a: 61bb str r3, [r7, #24] if (iocurrent == ioposition) - 8002f28: 69ba ldr r2, [r7, #24] - 8002f2a: 69fb ldr r3, [r7, #28] - 8002f2c: 429a cmp r2, r3 - 8002f2e: f040 8158 bne.w 80031e2 + 800387c: 69ba ldr r2, [r7, #24] + 800387e: 69fb ldr r3, [r7, #28] + 8003880: 429a cmp r2, r3 + 8003882: f040 8158 bne.w 8003b36 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) - 8002f32: 683b ldr r3, [r7, #0] - 8002f34: 685b ldr r3, [r3, #4] - 8002f36: 4a9a ldr r2, [pc, #616] @ (80031a0 ) - 8002f38: 4293 cmp r3, r2 - 8002f3a: d05e beq.n 8002ffa - 8002f3c: 4a98 ldr r2, [pc, #608] @ (80031a0 ) - 8002f3e: 4293 cmp r3, r2 - 8002f40: d875 bhi.n 800302e - 8002f42: 4a98 ldr r2, [pc, #608] @ (80031a4 ) - 8002f44: 4293 cmp r3, r2 - 8002f46: d058 beq.n 8002ffa - 8002f48: 4a96 ldr r2, [pc, #600] @ (80031a4 ) - 8002f4a: 4293 cmp r3, r2 - 8002f4c: d86f bhi.n 800302e - 8002f4e: 4a96 ldr r2, [pc, #600] @ (80031a8 ) - 8002f50: 4293 cmp r3, r2 - 8002f52: d052 beq.n 8002ffa - 8002f54: 4a94 ldr r2, [pc, #592] @ (80031a8 ) - 8002f56: 4293 cmp r3, r2 - 8002f58: d869 bhi.n 800302e - 8002f5a: 4a94 ldr r2, [pc, #592] @ (80031ac ) - 8002f5c: 4293 cmp r3, r2 - 8002f5e: d04c beq.n 8002ffa - 8002f60: 4a92 ldr r2, [pc, #584] @ (80031ac ) - 8002f62: 4293 cmp r3, r2 - 8002f64: d863 bhi.n 800302e - 8002f66: 4a92 ldr r2, [pc, #584] @ (80031b0 ) - 8002f68: 4293 cmp r3, r2 - 8002f6a: d046 beq.n 8002ffa - 8002f6c: 4a90 ldr r2, [pc, #576] @ (80031b0 ) - 8002f6e: 4293 cmp r3, r2 - 8002f70: d85d bhi.n 800302e - 8002f72: 2b12 cmp r3, #18 - 8002f74: d82a bhi.n 8002fcc - 8002f76: 2b12 cmp r3, #18 - 8002f78: d859 bhi.n 800302e - 8002f7a: a201 add r2, pc, #4 @ (adr r2, 8002f80 ) - 8002f7c: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8002f80: 08002ffb .word 0x08002ffb - 8002f84: 08002fd5 .word 0x08002fd5 - 8002f88: 08002fe7 .word 0x08002fe7 - 8002f8c: 08003029 .word 0x08003029 - 8002f90: 0800302f .word 0x0800302f - 8002f94: 0800302f .word 0x0800302f - 8002f98: 0800302f .word 0x0800302f - 8002f9c: 0800302f .word 0x0800302f - 8002fa0: 0800302f .word 0x0800302f - 8002fa4: 0800302f .word 0x0800302f - 8002fa8: 0800302f .word 0x0800302f - 8002fac: 0800302f .word 0x0800302f - 8002fb0: 0800302f .word 0x0800302f - 8002fb4: 0800302f .word 0x0800302f - 8002fb8: 0800302f .word 0x0800302f - 8002fbc: 0800302f .word 0x0800302f - 8002fc0: 0800302f .word 0x0800302f - 8002fc4: 08002fdd .word 0x08002fdd - 8002fc8: 08002ff1 .word 0x08002ff1 - 8002fcc: 4a79 ldr r2, [pc, #484] @ (80031b4 ) - 8002fce: 4293 cmp r3, r2 - 8002fd0: d013 beq.n 8002ffa + 8003886: 683b ldr r3, [r7, #0] + 8003888: 685b ldr r3, [r3, #4] + 800388a: 4a9a ldr r2, [pc, #616] @ (8003af4 ) + 800388c: 4293 cmp r3, r2 + 800388e: d05e beq.n 800394e + 8003890: 4a98 ldr r2, [pc, #608] @ (8003af4 ) + 8003892: 4293 cmp r3, r2 + 8003894: d875 bhi.n 8003982 + 8003896: 4a98 ldr r2, [pc, #608] @ (8003af8 ) + 8003898: 4293 cmp r3, r2 + 800389a: d058 beq.n 800394e + 800389c: 4a96 ldr r2, [pc, #600] @ (8003af8 ) + 800389e: 4293 cmp r3, r2 + 80038a0: d86f bhi.n 8003982 + 80038a2: 4a96 ldr r2, [pc, #600] @ (8003afc ) + 80038a4: 4293 cmp r3, r2 + 80038a6: d052 beq.n 800394e + 80038a8: 4a94 ldr r2, [pc, #592] @ (8003afc ) + 80038aa: 4293 cmp r3, r2 + 80038ac: d869 bhi.n 8003982 + 80038ae: 4a94 ldr r2, [pc, #592] @ (8003b00 ) + 80038b0: 4293 cmp r3, r2 + 80038b2: d04c beq.n 800394e + 80038b4: 4a92 ldr r2, [pc, #584] @ (8003b00 ) + 80038b6: 4293 cmp r3, r2 + 80038b8: d863 bhi.n 8003982 + 80038ba: 4a92 ldr r2, [pc, #584] @ (8003b04 ) + 80038bc: 4293 cmp r3, r2 + 80038be: d046 beq.n 800394e + 80038c0: 4a90 ldr r2, [pc, #576] @ (8003b04 ) + 80038c2: 4293 cmp r3, r2 + 80038c4: d85d bhi.n 8003982 + 80038c6: 2b12 cmp r3, #18 + 80038c8: d82a bhi.n 8003920 + 80038ca: 2b12 cmp r3, #18 + 80038cc: d859 bhi.n 8003982 + 80038ce: a201 add r2, pc, #4 @ (adr r2, 80038d4 ) + 80038d0: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80038d4: 0800394f .word 0x0800394f + 80038d8: 08003929 .word 0x08003929 + 80038dc: 0800393b .word 0x0800393b + 80038e0: 0800397d .word 0x0800397d + 80038e4: 08003983 .word 0x08003983 + 80038e8: 08003983 .word 0x08003983 + 80038ec: 08003983 .word 0x08003983 + 80038f0: 08003983 .word 0x08003983 + 80038f4: 08003983 .word 0x08003983 + 80038f8: 08003983 .word 0x08003983 + 80038fc: 08003983 .word 0x08003983 + 8003900: 08003983 .word 0x08003983 + 8003904: 08003983 .word 0x08003983 + 8003908: 08003983 .word 0x08003983 + 800390c: 08003983 .word 0x08003983 + 8003910: 08003983 .word 0x08003983 + 8003914: 08003983 .word 0x08003983 + 8003918: 08003931 .word 0x08003931 + 800391c: 08003945 .word 0x08003945 + 8003920: 4a79 ldr r2, [pc, #484] @ (8003b08 ) + 8003922: 4293 cmp r3, r2 + 8003924: d013 beq.n 800394e config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; - 8002fd2: e02c b.n 800302e + 8003926: e02c b.n 8003982 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; - 8002fd4: 683b ldr r3, [r7, #0] - 8002fd6: 68db ldr r3, [r3, #12] - 8002fd8: 623b str r3, [r7, #32] + 8003928: 683b ldr r3, [r7, #0] + 800392a: 68db ldr r3, [r3, #12] + 800392c: 623b str r3, [r7, #32] break; - 8002fda: e029 b.n 8003030 + 800392e: e029 b.n 8003984 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; - 8002fdc: 683b ldr r3, [r7, #0] - 8002fde: 68db ldr r3, [r3, #12] - 8002fe0: 3304 adds r3, #4 - 8002fe2: 623b str r3, [r7, #32] + 8003930: 683b ldr r3, [r7, #0] + 8003932: 68db ldr r3, [r3, #12] + 8003934: 3304 adds r3, #4 + 8003936: 623b str r3, [r7, #32] break; - 8002fe4: e024 b.n 8003030 + 8003938: e024 b.n 8003984 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; - 8002fe6: 683b ldr r3, [r7, #0] - 8002fe8: 68db ldr r3, [r3, #12] - 8002fea: 3308 adds r3, #8 - 8002fec: 623b str r3, [r7, #32] + 800393a: 683b ldr r3, [r7, #0] + 800393c: 68db ldr r3, [r3, #12] + 800393e: 3308 adds r3, #8 + 8003940: 623b str r3, [r7, #32] break; - 8002fee: e01f b.n 8003030 + 8003942: e01f b.n 8003984 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; - 8002ff0: 683b ldr r3, [r7, #0] - 8002ff2: 68db ldr r3, [r3, #12] - 8002ff4: 330c adds r3, #12 - 8002ff6: 623b str r3, [r7, #32] + 8003944: 683b ldr r3, [r7, #0] + 8003946: 68db ldr r3, [r3, #12] + 8003948: 330c adds r3, #12 + 800394a: 623b str r3, [r7, #32] break; - 8002ff8: e01a b.n 8003030 + 800394c: e01a b.n 8003984 if (GPIO_Init->Pull == GPIO_NOPULL) - 8002ffa: 683b ldr r3, [r7, #0] - 8002ffc: 689b ldr r3, [r3, #8] - 8002ffe: 2b00 cmp r3, #0 - 8003000: d102 bne.n 8003008 + 800394e: 683b ldr r3, [r7, #0] + 8003950: 689b ldr r3, [r3, #8] + 8003952: 2b00 cmp r3, #0 + 8003954: d102 bne.n 800395c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; - 8003002: 2304 movs r3, #4 - 8003004: 623b str r3, [r7, #32] + 8003956: 2304 movs r3, #4 + 8003958: 623b str r3, [r7, #32] break; - 8003006: e013 b.n 8003030 + 800395a: e013 b.n 8003984 else if (GPIO_Init->Pull == GPIO_PULLUP) - 8003008: 683b ldr r3, [r7, #0] - 800300a: 689b ldr r3, [r3, #8] - 800300c: 2b01 cmp r3, #1 - 800300e: d105 bne.n 800301c + 800395c: 683b ldr r3, [r7, #0] + 800395e: 689b ldr r3, [r3, #8] + 8003960: 2b01 cmp r3, #1 + 8003962: d105 bne.n 8003970 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 8003010: 2308 movs r3, #8 - 8003012: 623b str r3, [r7, #32] + 8003964: 2308 movs r3, #8 + 8003966: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; - 8003014: 687b ldr r3, [r7, #4] - 8003016: 69fa ldr r2, [r7, #28] - 8003018: 611a str r2, [r3, #16] + 8003968: 687b ldr r3, [r7, #4] + 800396a: 69fa ldr r2, [r7, #28] + 800396c: 611a str r2, [r3, #16] break; - 800301a: e009 b.n 8003030 + 800396e: e009 b.n 8003984 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 800301c: 2308 movs r3, #8 - 800301e: 623b str r3, [r7, #32] + 8003970: 2308 movs r3, #8 + 8003972: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; - 8003020: 687b ldr r3, [r7, #4] - 8003022: 69fa ldr r2, [r7, #28] - 8003024: 615a str r2, [r3, #20] + 8003974: 687b ldr r3, [r7, #4] + 8003976: 69fa ldr r2, [r7, #28] + 8003978: 615a str r2, [r3, #20] break; - 8003026: e003 b.n 8003030 + 800397a: e003 b.n 8003984 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; - 8003028: 2300 movs r3, #0 - 800302a: 623b str r3, [r7, #32] + 800397c: 2300 movs r3, #0 + 800397e: 623b str r3, [r7, #32] break; - 800302c: e000 b.n 8003030 + 8003980: e000 b.n 8003984 break; - 800302e: bf00 nop + 8003982: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; - 8003030: 69bb ldr r3, [r7, #24] - 8003032: 2bff cmp r3, #255 @ 0xff - 8003034: d801 bhi.n 800303a - 8003036: 687b ldr r3, [r7, #4] - 8003038: e001 b.n 800303e - 800303a: 687b ldr r3, [r7, #4] - 800303c: 3304 adds r3, #4 - 800303e: 617b str r3, [r7, #20] + 8003984: 69bb ldr r3, [r7, #24] + 8003986: 2bff cmp r3, #255 @ 0xff + 8003988: d801 bhi.n 800398e + 800398a: 687b ldr r3, [r7, #4] + 800398c: e001 b.n 8003992 + 800398e: 687b ldr r3, [r7, #4] + 8003990: 3304 adds r3, #4 + 8003992: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); - 8003040: 69bb ldr r3, [r7, #24] - 8003042: 2bff cmp r3, #255 @ 0xff - 8003044: d802 bhi.n 800304c - 8003046: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003048: 009b lsls r3, r3, #2 - 800304a: e002 b.n 8003052 - 800304c: 6a7b ldr r3, [r7, #36] @ 0x24 - 800304e: 3b08 subs r3, #8 - 8003050: 009b lsls r3, r3, #2 - 8003052: 613b str r3, [r7, #16] + 8003994: 69bb ldr r3, [r7, #24] + 8003996: 2bff cmp r3, #255 @ 0xff + 8003998: d802 bhi.n 80039a0 + 800399a: 6a7b ldr r3, [r7, #36] @ 0x24 + 800399c: 009b lsls r3, r3, #2 + 800399e: e002 b.n 80039a6 + 80039a0: 6a7b ldr r3, [r7, #36] @ 0x24 + 80039a2: 3b08 subs r3, #8 + 80039a4: 009b lsls r3, r3, #2 + 80039a6: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); - 8003054: 697b ldr r3, [r7, #20] - 8003056: 681a ldr r2, [r3, #0] - 8003058: 210f movs r1, #15 - 800305a: 693b ldr r3, [r7, #16] - 800305c: fa01 f303 lsl.w r3, r1, r3 - 8003060: 43db mvns r3, r3 - 8003062: 401a ands r2, r3 - 8003064: 6a39 ldr r1, [r7, #32] - 8003066: 693b ldr r3, [r7, #16] - 8003068: fa01 f303 lsl.w r3, r1, r3 - 800306c: 431a orrs r2, r3 - 800306e: 697b ldr r3, [r7, #20] - 8003070: 601a str r2, [r3, #0] + 80039a8: 697b ldr r3, [r7, #20] + 80039aa: 681a ldr r2, [r3, #0] + 80039ac: 210f movs r1, #15 + 80039ae: 693b ldr r3, [r7, #16] + 80039b0: fa01 f303 lsl.w r3, r1, r3 + 80039b4: 43db mvns r3, r3 + 80039b6: 401a ands r2, r3 + 80039b8: 6a39 ldr r1, [r7, #32] + 80039ba: 693b ldr r3, [r7, #16] + 80039bc: fa01 f303 lsl.w r3, r1, r3 + 80039c0: 431a orrs r2, r3 + 80039c2: 697b ldr r3, [r7, #20] + 80039c4: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 8003072: 683b ldr r3, [r7, #0] - 8003074: 685b ldr r3, [r3, #4] - 8003076: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 800307a: 2b00 cmp r3, #0 - 800307c: f000 80b1 beq.w 80031e2 + 80039c6: 683b ldr r3, [r7, #0] + 80039c8: 685b ldr r3, [r3, #4] + 80039ca: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80039ce: 2b00 cmp r3, #0 + 80039d0: f000 80b1 beq.w 8003b36 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); - 8003080: 4b4d ldr r3, [pc, #308] @ (80031b8 ) - 8003082: 699b ldr r3, [r3, #24] - 8003084: 4a4c ldr r2, [pc, #304] @ (80031b8 ) - 8003086: f043 0301 orr.w r3, r3, #1 - 800308a: 6193 str r3, [r2, #24] - 800308c: 4b4a ldr r3, [pc, #296] @ (80031b8 ) - 800308e: 699b ldr r3, [r3, #24] - 8003090: f003 0301 and.w r3, r3, #1 - 8003094: 60bb str r3, [r7, #8] - 8003096: 68bb ldr r3, [r7, #8] + 80039d4: 4b4d ldr r3, [pc, #308] @ (8003b0c ) + 80039d6: 699b ldr r3, [r3, #24] + 80039d8: 4a4c ldr r2, [pc, #304] @ (8003b0c ) + 80039da: f043 0301 orr.w r3, r3, #1 + 80039de: 6193 str r3, [r2, #24] + 80039e0: 4b4a ldr r3, [pc, #296] @ (8003b0c ) + 80039e2: 699b ldr r3, [r3, #24] + 80039e4: f003 0301 and.w r3, r3, #1 + 80039e8: 60bb str r3, [r7, #8] + 80039ea: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; - 8003098: 4a48 ldr r2, [pc, #288] @ (80031bc ) - 800309a: 6a7b ldr r3, [r7, #36] @ 0x24 - 800309c: 089b lsrs r3, r3, #2 - 800309e: 3302 adds r3, #2 - 80030a0: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 80030a4: 60fb str r3, [r7, #12] + 80039ec: 4a48 ldr r2, [pc, #288] @ (8003b10 ) + 80039ee: 6a7b ldr r3, [r7, #36] @ 0x24 + 80039f0: 089b lsrs r3, r3, #2 + 80039f2: 3302 adds r3, #2 + 80039f4: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 80039f8: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); - 80030a6: 6a7b ldr r3, [r7, #36] @ 0x24 - 80030a8: f003 0303 and.w r3, r3, #3 - 80030ac: 009b lsls r3, r3, #2 - 80030ae: 220f movs r2, #15 - 80030b0: fa02 f303 lsl.w r3, r2, r3 - 80030b4: 43db mvns r3, r3 - 80030b6: 68fa ldr r2, [r7, #12] - 80030b8: 4013 ands r3, r2 - 80030ba: 60fb str r3, [r7, #12] + 80039fa: 6a7b ldr r3, [r7, #36] @ 0x24 + 80039fc: f003 0303 and.w r3, r3, #3 + 8003a00: 009b lsls r3, r3, #2 + 8003a02: 220f movs r2, #15 + 8003a04: fa02 f303 lsl.w r3, r2, r3 + 8003a08: 43db mvns r3, r3 + 8003a0a: 68fa ldr r2, [r7, #12] + 8003a0c: 4013 ands r3, r2 + 8003a0e: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); - 80030bc: 687b ldr r3, [r7, #4] - 80030be: 4a40 ldr r2, [pc, #256] @ (80031c0 ) - 80030c0: 4293 cmp r3, r2 - 80030c2: d013 beq.n 80030ec - 80030c4: 687b ldr r3, [r7, #4] - 80030c6: 4a3f ldr r2, [pc, #252] @ (80031c4 ) - 80030c8: 4293 cmp r3, r2 - 80030ca: d00d beq.n 80030e8 - 80030cc: 687b ldr r3, [r7, #4] - 80030ce: 4a3e ldr r2, [pc, #248] @ (80031c8 ) - 80030d0: 4293 cmp r3, r2 - 80030d2: d007 beq.n 80030e4 - 80030d4: 687b ldr r3, [r7, #4] - 80030d6: 4a3d ldr r2, [pc, #244] @ (80031cc ) - 80030d8: 4293 cmp r3, r2 - 80030da: d101 bne.n 80030e0 - 80030dc: 2303 movs r3, #3 - 80030de: e006 b.n 80030ee - 80030e0: 2304 movs r3, #4 - 80030e2: e004 b.n 80030ee - 80030e4: 2302 movs r3, #2 - 80030e6: e002 b.n 80030ee - 80030e8: 2301 movs r3, #1 - 80030ea: e000 b.n 80030ee - 80030ec: 2300 movs r3, #0 - 80030ee: 6a7a ldr r2, [r7, #36] @ 0x24 - 80030f0: f002 0203 and.w r2, r2, #3 - 80030f4: 0092 lsls r2, r2, #2 - 80030f6: 4093 lsls r3, r2 - 80030f8: 68fa ldr r2, [r7, #12] - 80030fa: 4313 orrs r3, r2 - 80030fc: 60fb str r3, [r7, #12] + 8003a10: 687b ldr r3, [r7, #4] + 8003a12: 4a40 ldr r2, [pc, #256] @ (8003b14 ) + 8003a14: 4293 cmp r3, r2 + 8003a16: d013 beq.n 8003a40 + 8003a18: 687b ldr r3, [r7, #4] + 8003a1a: 4a3f ldr r2, [pc, #252] @ (8003b18 ) + 8003a1c: 4293 cmp r3, r2 + 8003a1e: d00d beq.n 8003a3c + 8003a20: 687b ldr r3, [r7, #4] + 8003a22: 4a3e ldr r2, [pc, #248] @ (8003b1c ) + 8003a24: 4293 cmp r3, r2 + 8003a26: d007 beq.n 8003a38 + 8003a28: 687b ldr r3, [r7, #4] + 8003a2a: 4a3d ldr r2, [pc, #244] @ (8003b20 ) + 8003a2c: 4293 cmp r3, r2 + 8003a2e: d101 bne.n 8003a34 + 8003a30: 2303 movs r3, #3 + 8003a32: e006 b.n 8003a42 + 8003a34: 2304 movs r3, #4 + 8003a36: e004 b.n 8003a42 + 8003a38: 2302 movs r3, #2 + 8003a3a: e002 b.n 8003a42 + 8003a3c: 2301 movs r3, #1 + 8003a3e: e000 b.n 8003a42 + 8003a40: 2300 movs r3, #0 + 8003a42: 6a7a ldr r2, [r7, #36] @ 0x24 + 8003a44: f002 0203 and.w r2, r2, #3 + 8003a48: 0092 lsls r2, r2, #2 + 8003a4a: 4093 lsls r3, r2 + 8003a4c: 68fa ldr r2, [r7, #12] + 8003a4e: 4313 orrs r3, r2 + 8003a50: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; - 80030fe: 492f ldr r1, [pc, #188] @ (80031bc ) - 8003100: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003102: 089b lsrs r3, r3, #2 - 8003104: 3302 adds r3, #2 - 8003106: 68fa ldr r2, [r7, #12] - 8003108: f841 2023 str.w r2, [r1, r3, lsl #2] + 8003a52: 492f ldr r1, [pc, #188] @ (8003b10 ) + 8003a54: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003a56: 089b lsrs r3, r3, #2 + 8003a58: 3302 adds r3, #2 + 8003a5a: 68fa ldr r2, [r7, #12] + 8003a5c: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 800310c: 683b ldr r3, [r7, #0] - 800310e: 685b ldr r3, [r3, #4] - 8003110: f403 1380 and.w r3, r3, #1048576 @ 0x100000 - 8003114: 2b00 cmp r3, #0 - 8003116: d006 beq.n 8003126 + 8003a60: 683b ldr r3, [r7, #0] + 8003a62: 685b ldr r3, [r3, #4] + 8003a64: f403 1380 and.w r3, r3, #1048576 @ 0x100000 + 8003a68: 2b00 cmp r3, #0 + 8003a6a: d006 beq.n 8003a7a { SET_BIT(EXTI->RTSR, iocurrent); - 8003118: 4b2d ldr r3, [pc, #180] @ (80031d0 ) - 800311a: 689a ldr r2, [r3, #8] - 800311c: 492c ldr r1, [pc, #176] @ (80031d0 ) - 800311e: 69bb ldr r3, [r7, #24] - 8003120: 4313 orrs r3, r2 - 8003122: 608b str r3, [r1, #8] - 8003124: e006 b.n 8003134 + 8003a6c: 4b2d ldr r3, [pc, #180] @ (8003b24 ) + 8003a6e: 689a ldr r2, [r3, #8] + 8003a70: 492c ldr r1, [pc, #176] @ (8003b24 ) + 8003a72: 69bb ldr r3, [r7, #24] + 8003a74: 4313 orrs r3, r2 + 8003a76: 608b str r3, [r1, #8] + 8003a78: e006 b.n 8003a88 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); - 8003126: 4b2a ldr r3, [pc, #168] @ (80031d0 ) - 8003128: 689a ldr r2, [r3, #8] - 800312a: 69bb ldr r3, [r7, #24] - 800312c: 43db mvns r3, r3 - 800312e: 4928 ldr r1, [pc, #160] @ (80031d0 ) - 8003130: 4013 ands r3, r2 - 8003132: 608b str r3, [r1, #8] + 8003a7a: 4b2a ldr r3, [pc, #168] @ (8003b24 ) + 8003a7c: 689a ldr r2, [r3, #8] + 8003a7e: 69bb ldr r3, [r7, #24] + 8003a80: 43db mvns r3, r3 + 8003a82: 4928 ldr r1, [pc, #160] @ (8003b24 ) + 8003a84: 4013 ands r3, r2 + 8003a86: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 8003134: 683b ldr r3, [r7, #0] - 8003136: 685b ldr r3, [r3, #4] - 8003138: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 800313c: 2b00 cmp r3, #0 - 800313e: d006 beq.n 800314e + 8003a88: 683b ldr r3, [r7, #0] + 8003a8a: 685b ldr r3, [r3, #4] + 8003a8c: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 8003a90: 2b00 cmp r3, #0 + 8003a92: d006 beq.n 8003aa2 { SET_BIT(EXTI->FTSR, iocurrent); - 8003140: 4b23 ldr r3, [pc, #140] @ (80031d0 ) - 8003142: 68da ldr r2, [r3, #12] - 8003144: 4922 ldr r1, [pc, #136] @ (80031d0 ) - 8003146: 69bb ldr r3, [r7, #24] - 8003148: 4313 orrs r3, r2 - 800314a: 60cb str r3, [r1, #12] - 800314c: e006 b.n 800315c + 8003a94: 4b23 ldr r3, [pc, #140] @ (8003b24 ) + 8003a96: 68da ldr r2, [r3, #12] + 8003a98: 4922 ldr r1, [pc, #136] @ (8003b24 ) + 8003a9a: 69bb ldr r3, [r7, #24] + 8003a9c: 4313 orrs r3, r2 + 8003a9e: 60cb str r3, [r1, #12] + 8003aa0: e006 b.n 8003ab0 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); - 800314e: 4b20 ldr r3, [pc, #128] @ (80031d0 ) - 8003150: 68da ldr r2, [r3, #12] - 8003152: 69bb ldr r3, [r7, #24] - 8003154: 43db mvns r3, r3 - 8003156: 491e ldr r1, [pc, #120] @ (80031d0 ) - 8003158: 4013 ands r3, r2 - 800315a: 60cb str r3, [r1, #12] + 8003aa2: 4b20 ldr r3, [pc, #128] @ (8003b24 ) + 8003aa4: 68da ldr r2, [r3, #12] + 8003aa6: 69bb ldr r3, [r7, #24] + 8003aa8: 43db mvns r3, r3 + 8003aaa: 491e ldr r1, [pc, #120] @ (8003b24 ) + 8003aac: 4013 ands r3, r2 + 8003aae: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 800315c: 683b ldr r3, [r7, #0] - 800315e: 685b ldr r3, [r3, #4] - 8003160: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8003164: 2b00 cmp r3, #0 - 8003166: d006 beq.n 8003176 + 8003ab0: 683b ldr r3, [r7, #0] + 8003ab2: 685b ldr r3, [r3, #4] + 8003ab4: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8003ab8: 2b00 cmp r3, #0 + 8003aba: d006 beq.n 8003aca { SET_BIT(EXTI->EMR, iocurrent); - 8003168: 4b19 ldr r3, [pc, #100] @ (80031d0 ) - 800316a: 685a ldr r2, [r3, #4] - 800316c: 4918 ldr r1, [pc, #96] @ (80031d0 ) - 800316e: 69bb ldr r3, [r7, #24] - 8003170: 4313 orrs r3, r2 - 8003172: 604b str r3, [r1, #4] - 8003174: e006 b.n 8003184 + 8003abc: 4b19 ldr r3, [pc, #100] @ (8003b24 ) + 8003abe: 685a ldr r2, [r3, #4] + 8003ac0: 4918 ldr r1, [pc, #96] @ (8003b24 ) + 8003ac2: 69bb ldr r3, [r7, #24] + 8003ac4: 4313 orrs r3, r2 + 8003ac6: 604b str r3, [r1, #4] + 8003ac8: e006 b.n 8003ad8 } else { CLEAR_BIT(EXTI->EMR, iocurrent); - 8003176: 4b16 ldr r3, [pc, #88] @ (80031d0 ) - 8003178: 685a ldr r2, [r3, #4] - 800317a: 69bb ldr r3, [r7, #24] - 800317c: 43db mvns r3, r3 - 800317e: 4914 ldr r1, [pc, #80] @ (80031d0 ) - 8003180: 4013 ands r3, r2 - 8003182: 604b str r3, [r1, #4] + 8003aca: 4b16 ldr r3, [pc, #88] @ (8003b24 ) + 8003acc: 685a ldr r2, [r3, #4] + 8003ace: 69bb ldr r3, [r7, #24] + 8003ad0: 43db mvns r3, r3 + 8003ad2: 4914 ldr r1, [pc, #80] @ (8003b24 ) + 8003ad4: 4013 ands r3, r2 + 8003ad6: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 8003184: 683b ldr r3, [r7, #0] - 8003186: 685b ldr r3, [r3, #4] - 8003188: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 800318c: 2b00 cmp r3, #0 - 800318e: d021 beq.n 80031d4 + 8003ad8: 683b ldr r3, [r7, #0] + 8003ada: 685b ldr r3, [r3, #4] + 8003adc: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8003ae0: 2b00 cmp r3, #0 + 8003ae2: d021 beq.n 8003b28 { SET_BIT(EXTI->IMR, iocurrent); - 8003190: 4b0f ldr r3, [pc, #60] @ (80031d0 ) - 8003192: 681a ldr r2, [r3, #0] - 8003194: 490e ldr r1, [pc, #56] @ (80031d0 ) - 8003196: 69bb ldr r3, [r7, #24] - 8003198: 4313 orrs r3, r2 - 800319a: 600b str r3, [r1, #0] - 800319c: e021 b.n 80031e2 - 800319e: bf00 nop - 80031a0: 10320000 .word 0x10320000 - 80031a4: 10310000 .word 0x10310000 - 80031a8: 10220000 .word 0x10220000 - 80031ac: 10210000 .word 0x10210000 - 80031b0: 10120000 .word 0x10120000 - 80031b4: 10110000 .word 0x10110000 - 80031b8: 40021000 .word 0x40021000 - 80031bc: 40010000 .word 0x40010000 - 80031c0: 40010800 .word 0x40010800 - 80031c4: 40010c00 .word 0x40010c00 - 80031c8: 40011000 .word 0x40011000 - 80031cc: 40011400 .word 0x40011400 - 80031d0: 40010400 .word 0x40010400 + 8003ae4: 4b0f ldr r3, [pc, #60] @ (8003b24 ) + 8003ae6: 681a ldr r2, [r3, #0] + 8003ae8: 490e ldr r1, [pc, #56] @ (8003b24 ) + 8003aea: 69bb ldr r3, [r7, #24] + 8003aec: 4313 orrs r3, r2 + 8003aee: 600b str r3, [r1, #0] + 8003af0: e021 b.n 8003b36 + 8003af2: bf00 nop + 8003af4: 10320000 .word 0x10320000 + 8003af8: 10310000 .word 0x10310000 + 8003afc: 10220000 .word 0x10220000 + 8003b00: 10210000 .word 0x10210000 + 8003b04: 10120000 .word 0x10120000 + 8003b08: 10110000 .word 0x10110000 + 8003b0c: 40021000 .word 0x40021000 + 8003b10: 40010000 .word 0x40010000 + 8003b14: 40010800 .word 0x40010800 + 8003b18: 40010c00 .word 0x40010c00 + 8003b1c: 40011000 .word 0x40011000 + 8003b20: 40011400 .word 0x40011400 + 8003b24: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); - 80031d4: 4b0b ldr r3, [pc, #44] @ (8003204 ) - 80031d6: 681a ldr r2, [r3, #0] - 80031d8: 69bb ldr r3, [r7, #24] - 80031da: 43db mvns r3, r3 - 80031dc: 4909 ldr r1, [pc, #36] @ (8003204 ) - 80031de: 4013 ands r3, r2 - 80031e0: 600b str r3, [r1, #0] + 8003b28: 4b0b ldr r3, [pc, #44] @ (8003b58 ) + 8003b2a: 681a ldr r2, [r3, #0] + 8003b2c: 69bb ldr r3, [r7, #24] + 8003b2e: 43db mvns r3, r3 + 8003b30: 4909 ldr r1, [pc, #36] @ (8003b58 ) + 8003b32: 4013 ands r3, r2 + 8003b34: 600b str r3, [r1, #0] } } } position++; - 80031e2: 6a7b ldr r3, [r7, #36] @ 0x24 - 80031e4: 3301 adds r3, #1 - 80031e6: 627b str r3, [r7, #36] @ 0x24 + 8003b36: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003b38: 3301 adds r3, #1 + 8003b3a: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) - 80031e8: 683b ldr r3, [r7, #0] - 80031ea: 681a ldr r2, [r3, #0] - 80031ec: 6a7b ldr r3, [r7, #36] @ 0x24 - 80031ee: fa22 f303 lsr.w r3, r2, r3 - 80031f2: 2b00 cmp r3, #0 - 80031f4: f47f ae8e bne.w 8002f14 + 8003b3c: 683b ldr r3, [r7, #0] + 8003b3e: 681a ldr r2, [r3, #0] + 8003b40: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003b42: fa22 f303 lsr.w r3, r2, r3 + 8003b46: 2b00 cmp r3, #0 + 8003b48: f47f ae8e bne.w 8003868 } } - 80031f8: bf00 nop - 80031fa: bf00 nop - 80031fc: 372c adds r7, #44 @ 0x2c - 80031fe: 46bd mov sp, r7 - 8003200: bc80 pop {r7} - 8003202: 4770 bx lr - 8003204: 40010400 .word 0x40010400 + 8003b4c: bf00 nop + 8003b4e: bf00 nop + 8003b50: 372c adds r7, #44 @ 0x2c + 8003b52: 46bd mov sp, r7 + 8003b54: bc80 pop {r7} + 8003b56: 4770 bx lr + 8003b58: 40010400 .word 0x40010400 -08003208 : +08003b5c : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 8003208: b480 push {r7} - 800320a: b085 sub sp, #20 - 800320c: af00 add r7, sp, #0 - 800320e: 6078 str r0, [r7, #4] - 8003210: 460b mov r3, r1 - 8003212: 807b strh r3, [r7, #2] + 8003b5c: b480 push {r7} + 8003b5e: b085 sub sp, #20 + 8003b60: af00 add r7, sp, #0 + 8003b62: 6078 str r0, [r7, #4] + 8003b64: 460b mov r3, r1 + 8003b66: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - 8003214: 687b ldr r3, [r7, #4] - 8003216: 689a ldr r2, [r3, #8] - 8003218: 887b ldrh r3, [r7, #2] - 800321a: 4013 ands r3, r2 - 800321c: 2b00 cmp r3, #0 - 800321e: d002 beq.n 8003226 + 8003b68: 687b ldr r3, [r7, #4] + 8003b6a: 689a ldr r2, [r3, #8] + 8003b6c: 887b ldrh r3, [r7, #2] + 8003b6e: 4013 ands r3, r2 + 8003b70: 2b00 cmp r3, #0 + 8003b72: d002 beq.n 8003b7a { bitstatus = GPIO_PIN_SET; - 8003220: 2301 movs r3, #1 - 8003222: 73fb strb r3, [r7, #15] - 8003224: e001 b.n 800322a + 8003b74: 2301 movs r3, #1 + 8003b76: 73fb strb r3, [r7, #15] + 8003b78: e001 b.n 8003b7e } else { bitstatus = GPIO_PIN_RESET; - 8003226: 2300 movs r3, #0 - 8003228: 73fb strb r3, [r7, #15] + 8003b7a: 2300 movs r3, #0 + 8003b7c: 73fb strb r3, [r7, #15] } return bitstatus; - 800322a: 7bfb ldrb r3, [r7, #15] + 8003b7e: 7bfb ldrb r3, [r7, #15] } - 800322c: 4618 mov r0, r3 - 800322e: 3714 adds r7, #20 - 8003230: 46bd mov sp, r7 - 8003232: bc80 pop {r7} - 8003234: 4770 bx lr + 8003b80: 4618 mov r0, r3 + 8003b82: 3714 adds r7, #20 + 8003b84: 46bd mov sp, r7 + 8003b86: bc80 pop {r7} + 8003b88: 4770 bx lr -08003236 : +08003b8a : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8003236: b480 push {r7} - 8003238: b083 sub sp, #12 - 800323a: af00 add r7, sp, #0 - 800323c: 6078 str r0, [r7, #4] - 800323e: 460b mov r3, r1 - 8003240: 807b strh r3, [r7, #2] - 8003242: 4613 mov r3, r2 - 8003244: 707b strb r3, [r7, #1] + 8003b8a: b480 push {r7} + 8003b8c: b083 sub sp, #12 + 8003b8e: af00 add r7, sp, #0 + 8003b90: 6078 str r0, [r7, #4] + 8003b92: 460b mov r3, r1 + 8003b94: 807b strh r3, [r7, #2] + 8003b96: 4613 mov r3, r2 + 8003b98: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 8003246: 787b ldrb r3, [r7, #1] - 8003248: 2b00 cmp r3, #0 - 800324a: d003 beq.n 8003254 + 8003b9a: 787b ldrb r3, [r7, #1] + 8003b9c: 2b00 cmp r3, #0 + 8003b9e: d003 beq.n 8003ba8 { GPIOx->BSRR = GPIO_Pin; - 800324c: 887a ldrh r2, [r7, #2] - 800324e: 687b ldr r3, [r7, #4] - 8003250: 611a str r2, [r3, #16] + 8003ba0: 887a ldrh r2, [r7, #2] + 8003ba2: 687b ldr r3, [r7, #4] + 8003ba4: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } - 8003252: e003 b.n 800325c + 8003ba6: e003 b.n 8003bb0 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; - 8003254: 887b ldrh r3, [r7, #2] - 8003256: 041a lsls r2, r3, #16 - 8003258: 687b ldr r3, [r7, #4] - 800325a: 611a str r2, [r3, #16] + 8003ba8: 887b ldrh r3, [r7, #2] + 8003baa: 041a lsls r2, r3, #16 + 8003bac: 687b ldr r3, [r7, #4] + 8003bae: 611a str r2, [r3, #16] } - 800325c: bf00 nop - 800325e: 370c adds r7, #12 - 8003260: 46bd mov sp, r7 - 8003262: bc80 pop {r7} - 8003264: 4770 bx lr + 8003bb0: bf00 nop + 8003bb2: 370c adds r7, #12 + 8003bb4: 46bd mov sp, r7 + 8003bb6: bc80 pop {r7} + 8003bb8: 4770 bx lr -08003266 : +08003bba : * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral * @param GPIO_Pin: Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 8003266: b480 push {r7} - 8003268: b085 sub sp, #20 - 800326a: af00 add r7, sp, #0 - 800326c: 6078 str r0, [r7, #4] - 800326e: 460b mov r3, r1 - 8003270: 807b strh r3, [r7, #2] + 8003bba: b480 push {r7} + 8003bbc: b085 sub sp, #20 + 8003bbe: af00 add r7, sp, #0 + 8003bc0: 6078 str r0, [r7, #4] + 8003bc2: 460b mov r3, r1 + 8003bc4: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; - 8003272: 687b ldr r3, [r7, #4] - 8003274: 68db ldr r3, [r3, #12] - 8003276: 60fb str r3, [r7, #12] + 8003bc6: 687b ldr r3, [r7, #4] + 8003bc8: 68db ldr r3, [r3, #12] + 8003bca: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); - 8003278: 887a ldrh r2, [r7, #2] - 800327a: 68fb ldr r3, [r7, #12] - 800327c: 4013 ands r3, r2 - 800327e: 041a lsls r2, r3, #16 - 8003280: 68fb ldr r3, [r7, #12] - 8003282: 43d9 mvns r1, r3 - 8003284: 887b ldrh r3, [r7, #2] - 8003286: 400b ands r3, r1 - 8003288: 431a orrs r2, r3 - 800328a: 687b ldr r3, [r7, #4] - 800328c: 611a str r2, [r3, #16] + 8003bcc: 887a ldrh r2, [r7, #2] + 8003bce: 68fb ldr r3, [r7, #12] + 8003bd0: 4013 ands r3, r2 + 8003bd2: 041a lsls r2, r3, #16 + 8003bd4: 68fb ldr r3, [r7, #12] + 8003bd6: 43d9 mvns r1, r3 + 8003bd8: 887b ldrh r3, [r7, #2] + 8003bda: 400b ands r3, r1 + 8003bdc: 431a orrs r2, r3 + 8003bde: 687b ldr r3, [r7, #4] + 8003be0: 611a str r2, [r3, #16] } - 800328e: bf00 nop - 8003290: 3714 adds r7, #20 - 8003292: 46bd mov sp, r7 - 8003294: bc80 pop {r7} - 8003296: 4770 bx lr + 8003be2: bf00 nop + 8003be4: 3714 adds r7, #20 + 8003be6: 46bd mov sp, r7 + 8003be8: bc80 pop {r7} + 8003bea: 4770 bx lr -08003298 : +08003bec : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { - 8003298: b580 push {r7, lr} - 800329a: b084 sub sp, #16 - 800329c: af00 add r7, sp, #0 - 800329e: 6078 str r0, [r7, #4] + 8003bec: b580 push {r7, lr} + 8003bee: b084 sub sp, #16 + 8003bf0: af00 add r7, sp, #0 + 8003bf2: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) - 80032a0: 687b ldr r3, [r7, #4] - 80032a2: 2b00 cmp r3, #0 - 80032a4: d101 bne.n 80032aa + 8003bf4: 687b ldr r3, [r7, #4] + 8003bf6: 2b00 cmp r3, #0 + 8003bf8: d101 bne.n 8003bfe { return HAL_ERROR; - 80032a6: 2301 movs r3, #1 - 80032a8: e12b b.n 8003502 + 8003bfa: 2301 movs r3, #1 + 8003bfc: e12b b.n 8003e56 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) - 80032aa: 687b ldr r3, [r7, #4] - 80032ac: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 80032b0: b2db uxtb r3, r3 - 80032b2: 2b00 cmp r3, #0 - 80032b4: d106 bne.n 80032c4 + 8003bfe: 687b ldr r3, [r7, #4] + 8003c00: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8003c04: b2db uxtb r3, r3 + 8003c06: 2b00 cmp r3, #0 + 8003c08: d106 bne.n 8003c18 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; - 80032b6: 687b ldr r3, [r7, #4] - 80032b8: 2200 movs r2, #0 - 80032ba: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003c0a: 687b ldr r3, [r7, #4] + 8003c0c: 2200 movs r2, #0 + 8003c0e: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); - 80032be: 6878 ldr r0, [r7, #4] - 80032c0: f7fe fc64 bl 8001b8c + 8003c12: 6878 ldr r0, [r7, #4] + 8003c14: f7fe fb2e bl 8002274 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; - 80032c4: 687b ldr r3, [r7, #4] - 80032c6: 2224 movs r2, #36 @ 0x24 - 80032c8: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003c18: 687b ldr r3, [r7, #4] + 8003c1a: 2224 movs r2, #36 @ 0x24 + 8003c1c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 80032cc: 687b ldr r3, [r7, #4] - 80032ce: 681b ldr r3, [r3, #0] - 80032d0: 681a ldr r2, [r3, #0] - 80032d2: 687b ldr r3, [r7, #4] - 80032d4: 681b ldr r3, [r3, #0] - 80032d6: f022 0201 bic.w r2, r2, #1 - 80032da: 601a str r2, [r3, #0] + 8003c20: 687b ldr r3, [r7, #4] + 8003c22: 681b ldr r3, [r3, #0] + 8003c24: 681a ldr r2, [r3, #0] + 8003c26: 687b ldr r3, [r7, #4] + 8003c28: 681b ldr r3, [r3, #0] + 8003c2a: f022 0201 bic.w r2, r2, #1 + 8003c2e: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; - 80032dc: 687b ldr r3, [r7, #4] - 80032de: 681b ldr r3, [r3, #0] - 80032e0: 681a ldr r2, [r3, #0] - 80032e2: 687b ldr r3, [r7, #4] - 80032e4: 681b ldr r3, [r3, #0] - 80032e6: f442 4200 orr.w r2, r2, #32768 @ 0x8000 - 80032ea: 601a str r2, [r3, #0] + 8003c30: 687b ldr r3, [r7, #4] + 8003c32: 681b ldr r3, [r3, #0] + 8003c34: 681a ldr r2, [r3, #0] + 8003c36: 687b ldr r3, [r7, #4] + 8003c38: 681b ldr r3, [r3, #0] + 8003c3a: f442 4200 orr.w r2, r2, #32768 @ 0x8000 + 8003c3e: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; - 80032ec: 687b ldr r3, [r7, #4] - 80032ee: 681b ldr r3, [r3, #0] - 80032f0: 681a ldr r2, [r3, #0] - 80032f2: 687b ldr r3, [r7, #4] - 80032f4: 681b ldr r3, [r3, #0] - 80032f6: f422 4200 bic.w r2, r2, #32768 @ 0x8000 - 80032fa: 601a str r2, [r3, #0] + 8003c40: 687b ldr r3, [r7, #4] + 8003c42: 681b ldr r3, [r3, #0] + 8003c44: 681a ldr r2, [r3, #0] + 8003c46: 687b ldr r3, [r7, #4] + 8003c48: 681b ldr r3, [r3, #0] + 8003c4a: f422 4200 bic.w r2, r2, #32768 @ 0x8000 + 8003c4e: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); - 80032fc: f001 fbcc bl 8004a98 - 8003300: 60f8 str r0, [r7, #12] + 8003c50: f001 fbcc bl 80053ec + 8003c54: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) - 8003302: 687b ldr r3, [r7, #4] - 8003304: 685b ldr r3, [r3, #4] - 8003306: 4a81 ldr r2, [pc, #516] @ (800350c ) - 8003308: 4293 cmp r3, r2 - 800330a: d807 bhi.n 800331c - 800330c: 68fb ldr r3, [r7, #12] - 800330e: 4a80 ldr r2, [pc, #512] @ (8003510 ) - 8003310: 4293 cmp r3, r2 - 8003312: bf94 ite ls - 8003314: 2301 movls r3, #1 - 8003316: 2300 movhi r3, #0 - 8003318: b2db uxtb r3, r3 - 800331a: e006 b.n 800332a - 800331c: 68fb ldr r3, [r7, #12] - 800331e: 4a7d ldr r2, [pc, #500] @ (8003514 ) - 8003320: 4293 cmp r3, r2 - 8003322: bf94 ite ls - 8003324: 2301 movls r3, #1 - 8003326: 2300 movhi r3, #0 - 8003328: b2db uxtb r3, r3 - 800332a: 2b00 cmp r3, #0 - 800332c: d001 beq.n 8003332 + 8003c56: 687b ldr r3, [r7, #4] + 8003c58: 685b ldr r3, [r3, #4] + 8003c5a: 4a81 ldr r2, [pc, #516] @ (8003e60 ) + 8003c5c: 4293 cmp r3, r2 + 8003c5e: d807 bhi.n 8003c70 + 8003c60: 68fb ldr r3, [r7, #12] + 8003c62: 4a80 ldr r2, [pc, #512] @ (8003e64 ) + 8003c64: 4293 cmp r3, r2 + 8003c66: bf94 ite ls + 8003c68: 2301 movls r3, #1 + 8003c6a: 2300 movhi r3, #0 + 8003c6c: b2db uxtb r3, r3 + 8003c6e: e006 b.n 8003c7e + 8003c70: 68fb ldr r3, [r7, #12] + 8003c72: 4a7d ldr r2, [pc, #500] @ (8003e68 ) + 8003c74: 4293 cmp r3, r2 + 8003c76: bf94 ite ls + 8003c78: 2301 movls r3, #1 + 8003c7a: 2300 movhi r3, #0 + 8003c7c: b2db uxtb r3, r3 + 8003c7e: 2b00 cmp r3, #0 + 8003c80: d001 beq.n 8003c86 { return HAL_ERROR; - 800332e: 2301 movs r3, #1 - 8003330: e0e7 b.n 8003502 + 8003c82: 2301 movs r3, #1 + 8003c84: e0e7 b.n 8003e56 } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); - 8003332: 68fb ldr r3, [r7, #12] - 8003334: 4a78 ldr r2, [pc, #480] @ (8003518 ) - 8003336: fba2 2303 umull r2, r3, r2, r3 - 800333a: 0c9b lsrs r3, r3, #18 - 800333c: 60bb str r3, [r7, #8] + 8003c86: 68fb ldr r3, [r7, #12] + 8003c88: 4a78 ldr r2, [pc, #480] @ (8003e6c ) + 8003c8a: fba2 2303 umull r2, r3, r2, r3 + 8003c8e: 0c9b lsrs r3, r3, #18 + 8003c90: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); - 800333e: 687b ldr r3, [r7, #4] - 8003340: 681b ldr r3, [r3, #0] - 8003342: 685b ldr r3, [r3, #4] - 8003344: f023 013f bic.w r1, r3, #63 @ 0x3f - 8003348: 687b ldr r3, [r7, #4] - 800334a: 681b ldr r3, [r3, #0] - 800334c: 68ba ldr r2, [r7, #8] - 800334e: 430a orrs r2, r1 - 8003350: 605a str r2, [r3, #4] + 8003c92: 687b ldr r3, [r7, #4] + 8003c94: 681b ldr r3, [r3, #0] + 8003c96: 685b ldr r3, [r3, #4] + 8003c98: f023 013f bic.w r1, r3, #63 @ 0x3f + 8003c9c: 687b ldr r3, [r7, #4] + 8003c9e: 681b ldr r3, [r3, #0] + 8003ca0: 68ba ldr r2, [r7, #8] + 8003ca2: 430a orrs r2, r1 + 8003ca4: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); - 8003352: 687b ldr r3, [r7, #4] - 8003354: 681b ldr r3, [r3, #0] - 8003356: 6a1b ldr r3, [r3, #32] - 8003358: f023 013f bic.w r1, r3, #63 @ 0x3f - 800335c: 687b ldr r3, [r7, #4] - 800335e: 685b ldr r3, [r3, #4] - 8003360: 4a6a ldr r2, [pc, #424] @ (800350c ) - 8003362: 4293 cmp r3, r2 - 8003364: d802 bhi.n 800336c - 8003366: 68bb ldr r3, [r7, #8] - 8003368: 3301 adds r3, #1 - 800336a: e009 b.n 8003380 - 800336c: 68bb ldr r3, [r7, #8] - 800336e: f44f 7296 mov.w r2, #300 @ 0x12c - 8003372: fb02 f303 mul.w r3, r2, r3 - 8003376: 4a69 ldr r2, [pc, #420] @ (800351c ) - 8003378: fba2 2303 umull r2, r3, r2, r3 - 800337c: 099b lsrs r3, r3, #6 - 800337e: 3301 adds r3, #1 - 8003380: 687a ldr r2, [r7, #4] - 8003382: 6812 ldr r2, [r2, #0] - 8003384: 430b orrs r3, r1 - 8003386: 6213 str r3, [r2, #32] + 8003ca6: 687b ldr r3, [r7, #4] + 8003ca8: 681b ldr r3, [r3, #0] + 8003caa: 6a1b ldr r3, [r3, #32] + 8003cac: f023 013f bic.w r1, r3, #63 @ 0x3f + 8003cb0: 687b ldr r3, [r7, #4] + 8003cb2: 685b ldr r3, [r3, #4] + 8003cb4: 4a6a ldr r2, [pc, #424] @ (8003e60 ) + 8003cb6: 4293 cmp r3, r2 + 8003cb8: d802 bhi.n 8003cc0 + 8003cba: 68bb ldr r3, [r7, #8] + 8003cbc: 3301 adds r3, #1 + 8003cbe: e009 b.n 8003cd4 + 8003cc0: 68bb ldr r3, [r7, #8] + 8003cc2: f44f 7296 mov.w r2, #300 @ 0x12c + 8003cc6: fb02 f303 mul.w r3, r2, r3 + 8003cca: 4a69 ldr r2, [pc, #420] @ (8003e70 ) + 8003ccc: fba2 2303 umull r2, r3, r2, r3 + 8003cd0: 099b lsrs r3, r3, #6 + 8003cd2: 3301 adds r3, #1 + 8003cd4: 687a ldr r2, [r7, #4] + 8003cd6: 6812 ldr r2, [r2, #0] + 8003cd8: 430b orrs r3, r1 + 8003cda: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); - 8003388: 687b ldr r3, [r7, #4] - 800338a: 681b ldr r3, [r3, #0] - 800338c: 69db ldr r3, [r3, #28] - 800338e: f423 424f bic.w r2, r3, #52992 @ 0xcf00 - 8003392: f022 02ff bic.w r2, r2, #255 @ 0xff - 8003396: 687b ldr r3, [r7, #4] - 8003398: 685b ldr r3, [r3, #4] - 800339a: 495c ldr r1, [pc, #368] @ (800350c ) - 800339c: 428b cmp r3, r1 - 800339e: d819 bhi.n 80033d4 - 80033a0: 68fb ldr r3, [r7, #12] - 80033a2: 1e59 subs r1, r3, #1 - 80033a4: 687b ldr r3, [r7, #4] - 80033a6: 685b ldr r3, [r3, #4] - 80033a8: 005b lsls r3, r3, #1 - 80033aa: fbb1 f3f3 udiv r3, r1, r3 - 80033ae: 1c59 adds r1, r3, #1 - 80033b0: f640 73fc movw r3, #4092 @ 0xffc - 80033b4: 400b ands r3, r1 - 80033b6: 2b00 cmp r3, #0 - 80033b8: d00a beq.n 80033d0 - 80033ba: 68fb ldr r3, [r7, #12] - 80033bc: 1e59 subs r1, r3, #1 - 80033be: 687b ldr r3, [r7, #4] - 80033c0: 685b ldr r3, [r3, #4] - 80033c2: 005b lsls r3, r3, #1 - 80033c4: fbb1 f3f3 udiv r3, r1, r3 - 80033c8: 3301 adds r3, #1 - 80033ca: f3c3 030b ubfx r3, r3, #0, #12 - 80033ce: e051 b.n 8003474 - 80033d0: 2304 movs r3, #4 - 80033d2: e04f b.n 8003474 - 80033d4: 687b ldr r3, [r7, #4] - 80033d6: 689b ldr r3, [r3, #8] - 80033d8: 2b00 cmp r3, #0 - 80033da: d111 bne.n 8003400 - 80033dc: 68fb ldr r3, [r7, #12] - 80033de: 1e58 subs r0, r3, #1 - 80033e0: 687b ldr r3, [r7, #4] - 80033e2: 6859 ldr r1, [r3, #4] - 80033e4: 460b mov r3, r1 - 80033e6: 005b lsls r3, r3, #1 - 80033e8: 440b add r3, r1 - 80033ea: fbb0 f3f3 udiv r3, r0, r3 - 80033ee: 3301 adds r3, #1 - 80033f0: f3c3 030b ubfx r3, r3, #0, #12 - 80033f4: 2b00 cmp r3, #0 - 80033f6: bf0c ite eq - 80033f8: 2301 moveq r3, #1 - 80033fa: 2300 movne r3, #0 - 80033fc: b2db uxtb r3, r3 - 80033fe: e012 b.n 8003426 - 8003400: 68fb ldr r3, [r7, #12] - 8003402: 1e58 subs r0, r3, #1 - 8003404: 687b ldr r3, [r7, #4] - 8003406: 6859 ldr r1, [r3, #4] - 8003408: 460b mov r3, r1 - 800340a: 009b lsls r3, r3, #2 - 800340c: 440b add r3, r1 - 800340e: 0099 lsls r1, r3, #2 - 8003410: 440b add r3, r1 - 8003412: fbb0 f3f3 udiv r3, r0, r3 - 8003416: 3301 adds r3, #1 - 8003418: f3c3 030b ubfx r3, r3, #0, #12 - 800341c: 2b00 cmp r3, #0 - 800341e: bf0c ite eq - 8003420: 2301 moveq r3, #1 - 8003422: 2300 movne r3, #0 - 8003424: b2db uxtb r3, r3 - 8003426: 2b00 cmp r3, #0 - 8003428: d001 beq.n 800342e - 800342a: 2301 movs r3, #1 - 800342c: e022 b.n 8003474 - 800342e: 687b ldr r3, [r7, #4] - 8003430: 689b ldr r3, [r3, #8] - 8003432: 2b00 cmp r3, #0 - 8003434: d10e bne.n 8003454 - 8003436: 68fb ldr r3, [r7, #12] - 8003438: 1e58 subs r0, r3, #1 - 800343a: 687b ldr r3, [r7, #4] - 800343c: 6859 ldr r1, [r3, #4] - 800343e: 460b mov r3, r1 - 8003440: 005b lsls r3, r3, #1 - 8003442: 440b add r3, r1 - 8003444: fbb0 f3f3 udiv r3, r0, r3 - 8003448: 3301 adds r3, #1 - 800344a: f3c3 030b ubfx r3, r3, #0, #12 - 800344e: f443 4300 orr.w r3, r3, #32768 @ 0x8000 - 8003452: e00f b.n 8003474 - 8003454: 68fb ldr r3, [r7, #12] - 8003456: 1e58 subs r0, r3, #1 - 8003458: 687b ldr r3, [r7, #4] - 800345a: 6859 ldr r1, [r3, #4] - 800345c: 460b mov r3, r1 - 800345e: 009b lsls r3, r3, #2 - 8003460: 440b add r3, r1 - 8003462: 0099 lsls r1, r3, #2 - 8003464: 440b add r3, r1 - 8003466: fbb0 f3f3 udiv r3, r0, r3 - 800346a: 3301 adds r3, #1 - 800346c: f3c3 030b ubfx r3, r3, #0, #12 - 8003470: f443 4340 orr.w r3, r3, #49152 @ 0xc000 - 8003474: 6879 ldr r1, [r7, #4] - 8003476: 6809 ldr r1, [r1, #0] - 8003478: 4313 orrs r3, r2 - 800347a: 61cb str r3, [r1, #28] + 8003cdc: 687b ldr r3, [r7, #4] + 8003cde: 681b ldr r3, [r3, #0] + 8003ce0: 69db ldr r3, [r3, #28] + 8003ce2: f423 424f bic.w r2, r3, #52992 @ 0xcf00 + 8003ce6: f022 02ff bic.w r2, r2, #255 @ 0xff + 8003cea: 687b ldr r3, [r7, #4] + 8003cec: 685b ldr r3, [r3, #4] + 8003cee: 495c ldr r1, [pc, #368] @ (8003e60 ) + 8003cf0: 428b cmp r3, r1 + 8003cf2: d819 bhi.n 8003d28 + 8003cf4: 68fb ldr r3, [r7, #12] + 8003cf6: 1e59 subs r1, r3, #1 + 8003cf8: 687b ldr r3, [r7, #4] + 8003cfa: 685b ldr r3, [r3, #4] + 8003cfc: 005b lsls r3, r3, #1 + 8003cfe: fbb1 f3f3 udiv r3, r1, r3 + 8003d02: 1c59 adds r1, r3, #1 + 8003d04: f640 73fc movw r3, #4092 @ 0xffc + 8003d08: 400b ands r3, r1 + 8003d0a: 2b00 cmp r3, #0 + 8003d0c: d00a beq.n 8003d24 + 8003d0e: 68fb ldr r3, [r7, #12] + 8003d10: 1e59 subs r1, r3, #1 + 8003d12: 687b ldr r3, [r7, #4] + 8003d14: 685b ldr r3, [r3, #4] + 8003d16: 005b lsls r3, r3, #1 + 8003d18: fbb1 f3f3 udiv r3, r1, r3 + 8003d1c: 3301 adds r3, #1 + 8003d1e: f3c3 030b ubfx r3, r3, #0, #12 + 8003d22: e051 b.n 8003dc8 + 8003d24: 2304 movs r3, #4 + 8003d26: e04f b.n 8003dc8 + 8003d28: 687b ldr r3, [r7, #4] + 8003d2a: 689b ldr r3, [r3, #8] + 8003d2c: 2b00 cmp r3, #0 + 8003d2e: d111 bne.n 8003d54 + 8003d30: 68fb ldr r3, [r7, #12] + 8003d32: 1e58 subs r0, r3, #1 + 8003d34: 687b ldr r3, [r7, #4] + 8003d36: 6859 ldr r1, [r3, #4] + 8003d38: 460b mov r3, r1 + 8003d3a: 005b lsls r3, r3, #1 + 8003d3c: 440b add r3, r1 + 8003d3e: fbb0 f3f3 udiv r3, r0, r3 + 8003d42: 3301 adds r3, #1 + 8003d44: f3c3 030b ubfx r3, r3, #0, #12 + 8003d48: 2b00 cmp r3, #0 + 8003d4a: bf0c ite eq + 8003d4c: 2301 moveq r3, #1 + 8003d4e: 2300 movne r3, #0 + 8003d50: b2db uxtb r3, r3 + 8003d52: e012 b.n 8003d7a + 8003d54: 68fb ldr r3, [r7, #12] + 8003d56: 1e58 subs r0, r3, #1 + 8003d58: 687b ldr r3, [r7, #4] + 8003d5a: 6859 ldr r1, [r3, #4] + 8003d5c: 460b mov r3, r1 + 8003d5e: 009b lsls r3, r3, #2 + 8003d60: 440b add r3, r1 + 8003d62: 0099 lsls r1, r3, #2 + 8003d64: 440b add r3, r1 + 8003d66: fbb0 f3f3 udiv r3, r0, r3 + 8003d6a: 3301 adds r3, #1 + 8003d6c: f3c3 030b ubfx r3, r3, #0, #12 + 8003d70: 2b00 cmp r3, #0 + 8003d72: bf0c ite eq + 8003d74: 2301 moveq r3, #1 + 8003d76: 2300 movne r3, #0 + 8003d78: b2db uxtb r3, r3 + 8003d7a: 2b00 cmp r3, #0 + 8003d7c: d001 beq.n 8003d82 + 8003d7e: 2301 movs r3, #1 + 8003d80: e022 b.n 8003dc8 + 8003d82: 687b ldr r3, [r7, #4] + 8003d84: 689b ldr r3, [r3, #8] + 8003d86: 2b00 cmp r3, #0 + 8003d88: d10e bne.n 8003da8 + 8003d8a: 68fb ldr r3, [r7, #12] + 8003d8c: 1e58 subs r0, r3, #1 + 8003d8e: 687b ldr r3, [r7, #4] + 8003d90: 6859 ldr r1, [r3, #4] + 8003d92: 460b mov r3, r1 + 8003d94: 005b lsls r3, r3, #1 + 8003d96: 440b add r3, r1 + 8003d98: fbb0 f3f3 udiv r3, r0, r3 + 8003d9c: 3301 adds r3, #1 + 8003d9e: f3c3 030b ubfx r3, r3, #0, #12 + 8003da2: f443 4300 orr.w r3, r3, #32768 @ 0x8000 + 8003da6: e00f b.n 8003dc8 + 8003da8: 68fb ldr r3, [r7, #12] + 8003daa: 1e58 subs r0, r3, #1 + 8003dac: 687b ldr r3, [r7, #4] + 8003dae: 6859 ldr r1, [r3, #4] + 8003db0: 460b mov r3, r1 + 8003db2: 009b lsls r3, r3, #2 + 8003db4: 440b add r3, r1 + 8003db6: 0099 lsls r1, r3, #2 + 8003db8: 440b add r3, r1 + 8003dba: fbb0 f3f3 udiv r3, r0, r3 + 8003dbe: 3301 adds r3, #1 + 8003dc0: f3c3 030b ubfx r3, r3, #0, #12 + 8003dc4: f443 4340 orr.w r3, r3, #49152 @ 0xc000 + 8003dc8: 6879 ldr r1, [r7, #4] + 8003dca: 6809 ldr r1, [r1, #0] + 8003dcc: 4313 orrs r3, r2 + 8003dce: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); - 800347c: 687b ldr r3, [r7, #4] - 800347e: 681b ldr r3, [r3, #0] - 8003480: 681b ldr r3, [r3, #0] - 8003482: f023 01c0 bic.w r1, r3, #192 @ 0xc0 - 8003486: 687b ldr r3, [r7, #4] - 8003488: 69da ldr r2, [r3, #28] - 800348a: 687b ldr r3, [r7, #4] - 800348c: 6a1b ldr r3, [r3, #32] - 800348e: 431a orrs r2, r3 - 8003490: 687b ldr r3, [r7, #4] - 8003492: 681b ldr r3, [r3, #0] - 8003494: 430a orrs r2, r1 - 8003496: 601a str r2, [r3, #0] + 8003dd0: 687b ldr r3, [r7, #4] + 8003dd2: 681b ldr r3, [r3, #0] + 8003dd4: 681b ldr r3, [r3, #0] + 8003dd6: f023 01c0 bic.w r1, r3, #192 @ 0xc0 + 8003dda: 687b ldr r3, [r7, #4] + 8003ddc: 69da ldr r2, [r3, #28] + 8003dde: 687b ldr r3, [r7, #4] + 8003de0: 6a1b ldr r3, [r3, #32] + 8003de2: 431a orrs r2, r3 + 8003de4: 687b ldr r3, [r7, #4] + 8003de6: 681b ldr r3, [r3, #0] + 8003de8: 430a orrs r2, r1 + 8003dea: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); - 8003498: 687b ldr r3, [r7, #4] - 800349a: 681b ldr r3, [r3, #0] - 800349c: 689b ldr r3, [r3, #8] - 800349e: f423 4303 bic.w r3, r3, #33536 @ 0x8300 - 80034a2: f023 03ff bic.w r3, r3, #255 @ 0xff - 80034a6: 687a ldr r2, [r7, #4] - 80034a8: 6911 ldr r1, [r2, #16] - 80034aa: 687a ldr r2, [r7, #4] - 80034ac: 68d2 ldr r2, [r2, #12] - 80034ae: 4311 orrs r1, r2 - 80034b0: 687a ldr r2, [r7, #4] - 80034b2: 6812 ldr r2, [r2, #0] - 80034b4: 430b orrs r3, r1 - 80034b6: 6093 str r3, [r2, #8] + 8003dec: 687b ldr r3, [r7, #4] + 8003dee: 681b ldr r3, [r3, #0] + 8003df0: 689b ldr r3, [r3, #8] + 8003df2: f423 4303 bic.w r3, r3, #33536 @ 0x8300 + 8003df6: f023 03ff bic.w r3, r3, #255 @ 0xff + 8003dfa: 687a ldr r2, [r7, #4] + 8003dfc: 6911 ldr r1, [r2, #16] + 8003dfe: 687a ldr r2, [r7, #4] + 8003e00: 68d2 ldr r2, [r2, #12] + 8003e02: 4311 orrs r1, r2 + 8003e04: 687a ldr r2, [r7, #4] + 8003e06: 6812 ldr r2, [r2, #0] + 8003e08: 430b orrs r3, r1 + 8003e0a: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); - 80034b8: 687b ldr r3, [r7, #4] - 80034ba: 681b ldr r3, [r3, #0] - 80034bc: 68db ldr r3, [r3, #12] - 80034be: f023 01ff bic.w r1, r3, #255 @ 0xff - 80034c2: 687b ldr r3, [r7, #4] - 80034c4: 695a ldr r2, [r3, #20] - 80034c6: 687b ldr r3, [r7, #4] - 80034c8: 699b ldr r3, [r3, #24] - 80034ca: 431a orrs r2, r3 - 80034cc: 687b ldr r3, [r7, #4] - 80034ce: 681b ldr r3, [r3, #0] - 80034d0: 430a orrs r2, r1 - 80034d2: 60da str r2, [r3, #12] + 8003e0c: 687b ldr r3, [r7, #4] + 8003e0e: 681b ldr r3, [r3, #0] + 8003e10: 68db ldr r3, [r3, #12] + 8003e12: f023 01ff bic.w r1, r3, #255 @ 0xff + 8003e16: 687b ldr r3, [r7, #4] + 8003e18: 695a ldr r2, [r3, #20] + 8003e1a: 687b ldr r3, [r7, #4] + 8003e1c: 699b ldr r3, [r3, #24] + 8003e1e: 431a orrs r2, r3 + 8003e20: 687b ldr r3, [r7, #4] + 8003e22: 681b ldr r3, [r3, #0] + 8003e24: 430a orrs r2, r1 + 8003e26: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 80034d4: 687b ldr r3, [r7, #4] - 80034d6: 681b ldr r3, [r3, #0] - 80034d8: 681a ldr r2, [r3, #0] - 80034da: 687b ldr r3, [r7, #4] - 80034dc: 681b ldr r3, [r3, #0] - 80034de: f042 0201 orr.w r2, r2, #1 - 80034e2: 601a str r2, [r3, #0] + 8003e28: 687b ldr r3, [r7, #4] + 8003e2a: 681b ldr r3, [r3, #0] + 8003e2c: 681a ldr r2, [r3, #0] + 8003e2e: 687b ldr r3, [r7, #4] + 8003e30: 681b ldr r3, [r3, #0] + 8003e32: f042 0201 orr.w r2, r2, #1 + 8003e36: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 80034e4: 687b ldr r3, [r7, #4] - 80034e6: 2200 movs r2, #0 - 80034e8: 641a str r2, [r3, #64] @ 0x40 + 8003e38: 687b ldr r3, [r7, #4] + 8003e3a: 2200 movs r2, #0 + 8003e3c: 641a str r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_READY; - 80034ea: 687b ldr r3, [r7, #4] - 80034ec: 2220 movs r2, #32 - 80034ee: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003e3e: 687b ldr r3, [r7, #4] + 8003e40: 2220 movs r2, #32 + 8003e42: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->PreviousState = I2C_STATE_NONE; - 80034f2: 687b ldr r3, [r7, #4] - 80034f4: 2200 movs r2, #0 - 80034f6: 631a str r2, [r3, #48] @ 0x30 + 8003e46: 687b ldr r3, [r7, #4] + 8003e48: 2200 movs r2, #0 + 8003e4a: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; - 80034f8: 687b ldr r3, [r7, #4] - 80034fa: 2200 movs r2, #0 - 80034fc: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003e4c: 687b ldr r3, [r7, #4] + 8003e4e: 2200 movs r2, #0 + 8003e50: f883 203e strb.w r2, [r3, #62] @ 0x3e return HAL_OK; - 8003500: 2300 movs r3, #0 + 8003e54: 2300 movs r3, #0 } - 8003502: 4618 mov r0, r3 - 8003504: 3710 adds r7, #16 - 8003506: 46bd mov sp, r7 - 8003508: bd80 pop {r7, pc} - 800350a: bf00 nop - 800350c: 000186a0 .word 0x000186a0 - 8003510: 001e847f .word 0x001e847f - 8003514: 003d08ff .word 0x003d08ff - 8003518: 431bde83 .word 0x431bde83 - 800351c: 10624dd3 .word 0x10624dd3 + 8003e56: 4618 mov r0, r3 + 8003e58: 3710 adds r7, #16 + 8003e5a: 46bd mov sp, r7 + 8003e5c: bd80 pop {r7, pc} + 8003e5e: bf00 nop + 8003e60: 000186a0 .word 0x000186a0 + 8003e64: 001e847f .word 0x001e847f + 8003e68: 003d08ff .word 0x003d08ff + 8003e6c: 431bde83 .word 0x431bde83 + 8003e70: 10624dd3 .word 0x10624dd3 -08003520 : +08003e74 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8003520: b580 push {r7, lr} - 8003522: b088 sub sp, #32 - 8003524: af02 add r7, sp, #8 - 8003526: 60f8 str r0, [r7, #12] - 8003528: 607a str r2, [r7, #4] - 800352a: 461a mov r2, r3 - 800352c: 460b mov r3, r1 - 800352e: 817b strh r3, [r7, #10] - 8003530: 4613 mov r3, r2 - 8003532: 813b strh r3, [r7, #8] + 8003e74: b580 push {r7, lr} + 8003e76: b088 sub sp, #32 + 8003e78: af02 add r7, sp, #8 + 8003e7a: 60f8 str r0, [r7, #12] + 8003e7c: 607a str r2, [r7, #4] + 8003e7e: 461a mov r2, r3 + 8003e80: 460b mov r3, r1 + 8003e82: 817b strh r3, [r7, #10] + 8003e84: 4613 mov r3, r2 + 8003e86: 813b strh r3, [r7, #8] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); - 8003534: f7ff f908 bl 8002748 - 8003538: 6178 str r0, [r7, #20] + 8003e88: f7ff f8e4 bl 8003054 + 8003e8c: 6178 str r0, [r7, #20] if (hi2c->State == HAL_I2C_STATE_READY) - 800353a: 68fb ldr r3, [r7, #12] - 800353c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8003540: b2db uxtb r3, r3 - 8003542: 2b20 cmp r3, #32 - 8003544: f040 80e0 bne.w 8003708 + 8003e8e: 68fb ldr r3, [r7, #12] + 8003e90: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8003e94: b2db uxtb r3, r3 + 8003e96: 2b20 cmp r3, #32 + 8003e98: f040 80e0 bne.w 800405c { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) - 8003548: 697b ldr r3, [r7, #20] - 800354a: 9300 str r3, [sp, #0] - 800354c: 2319 movs r3, #25 - 800354e: 2201 movs r2, #1 - 8003550: 4970 ldr r1, [pc, #448] @ (8003714 ) - 8003552: 68f8 ldr r0, [r7, #12] - 8003554: f000 fc9e bl 8003e94 - 8003558: 4603 mov r3, r0 - 800355a: 2b00 cmp r3, #0 - 800355c: d001 beq.n 8003562 + 8003e9c: 697b ldr r3, [r7, #20] + 8003e9e: 9300 str r3, [sp, #0] + 8003ea0: 2319 movs r3, #25 + 8003ea2: 2201 movs r2, #1 + 8003ea4: 4970 ldr r1, [pc, #448] @ (8004068 ) + 8003ea6: 68f8 ldr r0, [r7, #12] + 8003ea8: f000 fc9e bl 80047e8 + 8003eac: 4603 mov r3, r0 + 8003eae: 2b00 cmp r3, #0 + 8003eb0: d001 beq.n 8003eb6 { return HAL_BUSY; - 800355e: 2302 movs r3, #2 - 8003560: e0d3 b.n 800370a + 8003eb2: 2302 movs r3, #2 + 8003eb4: e0d3 b.n 800405e } /* Process Locked */ __HAL_LOCK(hi2c); - 8003562: 68fb ldr r3, [r7, #12] - 8003564: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8003568: 2b01 cmp r3, #1 - 800356a: d101 bne.n 8003570 - 800356c: 2302 movs r3, #2 - 800356e: e0cc b.n 800370a - 8003570: 68fb ldr r3, [r7, #12] - 8003572: 2201 movs r2, #1 - 8003574: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003eb6: 68fb ldr r3, [r7, #12] + 8003eb8: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8003ebc: 2b01 cmp r3, #1 + 8003ebe: d101 bne.n 8003ec4 + 8003ec0: 2302 movs r3, #2 + 8003ec2: e0cc b.n 800405e + 8003ec4: 68fb ldr r3, [r7, #12] + 8003ec6: 2201 movs r2, #1 + 8003ec8: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) - 8003578: 68fb ldr r3, [r7, #12] - 800357a: 681b ldr r3, [r3, #0] - 800357c: 681b ldr r3, [r3, #0] - 800357e: f003 0301 and.w r3, r3, #1 - 8003582: 2b01 cmp r3, #1 - 8003584: d007 beq.n 8003596 + 8003ecc: 68fb ldr r3, [r7, #12] + 8003ece: 681b ldr r3, [r3, #0] + 8003ed0: 681b ldr r3, [r3, #0] + 8003ed2: f003 0301 and.w r3, r3, #1 + 8003ed6: 2b01 cmp r3, #1 + 8003ed8: d007 beq.n 8003eea { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 8003586: 68fb ldr r3, [r7, #12] - 8003588: 681b ldr r3, [r3, #0] - 800358a: 681a ldr r2, [r3, #0] - 800358c: 68fb ldr r3, [r7, #12] - 800358e: 681b ldr r3, [r3, #0] - 8003590: f042 0201 orr.w r2, r2, #1 - 8003594: 601a str r2, [r3, #0] + 8003eda: 68fb ldr r3, [r7, #12] + 8003edc: 681b ldr r3, [r3, #0] + 8003ede: 681a ldr r2, [r3, #0] + 8003ee0: 68fb ldr r3, [r7, #12] + 8003ee2: 681b ldr r3, [r3, #0] + 8003ee4: f042 0201 orr.w r2, r2, #1 + 8003ee8: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 8003596: 68fb ldr r3, [r7, #12] - 8003598: 681b ldr r3, [r3, #0] - 800359a: 681a ldr r2, [r3, #0] - 800359c: 68fb ldr r3, [r7, #12] - 800359e: 681b ldr r3, [r3, #0] - 80035a0: f422 6200 bic.w r2, r2, #2048 @ 0x800 - 80035a4: 601a str r2, [r3, #0] + 8003eea: 68fb ldr r3, [r7, #12] + 8003eec: 681b ldr r3, [r3, #0] + 8003eee: 681a ldr r2, [r3, #0] + 8003ef0: 68fb ldr r3, [r7, #12] + 8003ef2: 681b ldr r3, [r3, #0] + 8003ef4: f422 6200 bic.w r2, r2, #2048 @ 0x800 + 8003ef8: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; - 80035a6: 68fb ldr r3, [r7, #12] - 80035a8: 2221 movs r2, #33 @ 0x21 - 80035aa: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003efa: 68fb ldr r3, [r7, #12] + 8003efc: 2221 movs r2, #33 @ 0x21 + 8003efe: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_MASTER; - 80035ae: 68fb ldr r3, [r7, #12] - 80035b0: 2210 movs r2, #16 - 80035b2: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003f02: 68fb ldr r3, [r7, #12] + 8003f04: 2210 movs r2, #16 + 8003f06: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 80035b6: 68fb ldr r3, [r7, #12] - 80035b8: 2200 movs r2, #0 - 80035ba: 641a str r2, [r3, #64] @ 0x40 + 8003f0a: 68fb ldr r3, [r7, #12] + 8003f0c: 2200 movs r2, #0 + 8003f0e: 641a str r2, [r3, #64] @ 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; - 80035bc: 68fb ldr r3, [r7, #12] - 80035be: 687a ldr r2, [r7, #4] - 80035c0: 625a str r2, [r3, #36] @ 0x24 + 8003f10: 68fb ldr r3, [r7, #12] + 8003f12: 687a ldr r2, [r7, #4] + 8003f14: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; - 80035c2: 68fb ldr r3, [r7, #12] - 80035c4: 893a ldrh r2, [r7, #8] - 80035c6: 855a strh r2, [r3, #42] @ 0x2a + 8003f16: 68fb ldr r3, [r7, #12] + 8003f18: 893a ldrh r2, [r7, #8] + 8003f1a: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize = hi2c->XferCount; - 80035c8: 68fb ldr r3, [r7, #12] - 80035ca: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80035cc: b29a uxth r2, r3 - 80035ce: 68fb ldr r3, [r7, #12] - 80035d0: 851a strh r2, [r3, #40] @ 0x28 + 8003f1c: 68fb ldr r3, [r7, #12] + 8003f1e: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003f20: b29a uxth r2, r3 + 8003f22: 68fb ldr r3, [r7, #12] + 8003f24: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 80035d2: 68fb ldr r3, [r7, #12] - 80035d4: 4a50 ldr r2, [pc, #320] @ (8003718 ) - 80035d6: 62da str r2, [r3, #44] @ 0x2c + 8003f26: 68fb ldr r3, [r7, #12] + 8003f28: 4a50 ldr r2, [pc, #320] @ (800406c ) + 8003f2a: 62da str r2, [r3, #44] @ 0x2c /* Send Slave Address */ if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) - 80035d8: 8979 ldrh r1, [r7, #10] - 80035da: 697b ldr r3, [r7, #20] - 80035dc: 6a3a ldr r2, [r7, #32] - 80035de: 68f8 ldr r0, [r7, #12] - 80035e0: f000 fb08 bl 8003bf4 - 80035e4: 4603 mov r3, r0 - 80035e6: 2b00 cmp r3, #0 - 80035e8: d001 beq.n 80035ee + 8003f2c: 8979 ldrh r1, [r7, #10] + 8003f2e: 697b ldr r3, [r7, #20] + 8003f30: 6a3a ldr r2, [r7, #32] + 8003f32: 68f8 ldr r0, [r7, #12] + 8003f34: f000 fb08 bl 8004548 + 8003f38: 4603 mov r3, r0 + 8003f3a: 2b00 cmp r3, #0 + 8003f3c: d001 beq.n 8003f42 { return HAL_ERROR; - 80035ea: 2301 movs r3, #1 - 80035ec: e08d b.n 800370a + 8003f3e: 2301 movs r3, #1 + 8003f40: e08d b.n 800405e } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80035ee: 2300 movs r3, #0 - 80035f0: 613b str r3, [r7, #16] - 80035f2: 68fb ldr r3, [r7, #12] - 80035f4: 681b ldr r3, [r3, #0] - 80035f6: 695b ldr r3, [r3, #20] - 80035f8: 613b str r3, [r7, #16] - 80035fa: 68fb ldr r3, [r7, #12] - 80035fc: 681b ldr r3, [r3, #0] - 80035fe: 699b ldr r3, [r3, #24] - 8003600: 613b str r3, [r7, #16] - 8003602: 693b ldr r3, [r7, #16] + 8003f42: 2300 movs r3, #0 + 8003f44: 613b str r3, [r7, #16] + 8003f46: 68fb ldr r3, [r7, #12] + 8003f48: 681b ldr r3, [r3, #0] + 8003f4a: 695b ldr r3, [r3, #20] + 8003f4c: 613b str r3, [r7, #16] + 8003f4e: 68fb ldr r3, [r7, #12] + 8003f50: 681b ldr r3, [r3, #0] + 8003f52: 699b ldr r3, [r3, #24] + 8003f54: 613b str r3, [r7, #16] + 8003f56: 693b ldr r3, [r7, #16] while (hi2c->XferSize > 0U) - 8003604: e066 b.n 80036d4 + 8003f58: e066 b.n 8004028 { /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8003606: 697a ldr r2, [r7, #20] - 8003608: 6a39 ldr r1, [r7, #32] - 800360a: 68f8 ldr r0, [r7, #12] - 800360c: f000 fd5c bl 80040c8 - 8003610: 4603 mov r3, r0 - 8003612: 2b00 cmp r3, #0 - 8003614: d00d beq.n 8003632 + 8003f5a: 697a ldr r2, [r7, #20] + 8003f5c: 6a39 ldr r1, [r7, #32] + 8003f5e: 68f8 ldr r0, [r7, #12] + 8003f60: f000 fd5c bl 8004a1c + 8003f64: 4603 mov r3, r0 + 8003f66: 2b00 cmp r3, #0 + 8003f68: d00d beq.n 8003f86 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 8003616: 68fb ldr r3, [r7, #12] - 8003618: 6c1b ldr r3, [r3, #64] @ 0x40 - 800361a: 2b04 cmp r3, #4 - 800361c: d107 bne.n 800362e + 8003f6a: 68fb ldr r3, [r7, #12] + 8003f6c: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003f6e: 2b04 cmp r3, #4 + 8003f70: d107 bne.n 8003f82 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 800361e: 68fb ldr r3, [r7, #12] - 8003620: 681b ldr r3, [r3, #0] - 8003622: 681a ldr r2, [r3, #0] - 8003624: 68fb ldr r3, [r7, #12] - 8003626: 681b ldr r3, [r3, #0] - 8003628: f442 7200 orr.w r2, r2, #512 @ 0x200 - 800362c: 601a str r2, [r3, #0] + 8003f72: 68fb ldr r3, [r7, #12] + 8003f74: 681b ldr r3, [r3, #0] + 8003f76: 681a ldr r2, [r3, #0] + 8003f78: 68fb ldr r3, [r7, #12] + 8003f7a: 681b ldr r3, [r3, #0] + 8003f7c: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003f80: 601a str r2, [r3, #0] } return HAL_ERROR; - 800362e: 2301 movs r3, #1 - 8003630: e06b b.n 800370a + 8003f82: 2301 movs r3, #1 + 8003f84: e06b b.n 800405e } /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; - 8003632: 68fb ldr r3, [r7, #12] - 8003634: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003636: 781a ldrb r2, [r3, #0] - 8003638: 68fb ldr r3, [r7, #12] - 800363a: 681b ldr r3, [r3, #0] - 800363c: 611a str r2, [r3, #16] + 8003f86: 68fb ldr r3, [r7, #12] + 8003f88: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003f8a: 781a ldrb r2, [r3, #0] + 8003f8c: 68fb ldr r3, [r7, #12] + 8003f8e: 681b ldr r3, [r3, #0] + 8003f90: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 800363e: 68fb ldr r3, [r7, #12] - 8003640: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003642: 1c5a adds r2, r3, #1 - 8003644: 68fb ldr r3, [r7, #12] - 8003646: 625a str r2, [r3, #36] @ 0x24 + 8003f92: 68fb ldr r3, [r7, #12] + 8003f94: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003f96: 1c5a adds r2, r3, #1 + 8003f98: 68fb ldr r3, [r7, #12] + 8003f9a: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; - 8003648: 68fb ldr r3, [r7, #12] - 800364a: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800364c: b29b uxth r3, r3 - 800364e: 3b01 subs r3, #1 - 8003650: b29a uxth r2, r3 - 8003652: 68fb ldr r3, [r7, #12] - 8003654: 855a strh r2, [r3, #42] @ 0x2a + 8003f9c: 68fb ldr r3, [r7, #12] + 8003f9e: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003fa0: b29b uxth r3, r3 + 8003fa2: 3b01 subs r3, #1 + 8003fa4: b29a uxth r2, r3 + 8003fa6: 68fb ldr r3, [r7, #12] + 8003fa8: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; - 8003656: 68fb ldr r3, [r7, #12] - 8003658: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800365a: 3b01 subs r3, #1 - 800365c: b29a uxth r2, r3 - 800365e: 68fb ldr r3, [r7, #12] - 8003660: 851a strh r2, [r3, #40] @ 0x28 + 8003faa: 68fb ldr r3, [r7, #12] + 8003fac: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003fae: 3b01 subs r3, #1 + 8003fb0: b29a uxth r2, r3 + 8003fb2: 68fb ldr r3, [r7, #12] + 8003fb4: 851a strh r2, [r3, #40] @ 0x28 if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) - 8003662: 68fb ldr r3, [r7, #12] - 8003664: 681b ldr r3, [r3, #0] - 8003666: 695b ldr r3, [r3, #20] - 8003668: f003 0304 and.w r3, r3, #4 - 800366c: 2b04 cmp r3, #4 - 800366e: d11b bne.n 80036a8 - 8003670: 68fb ldr r3, [r7, #12] - 8003672: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003674: 2b00 cmp r3, #0 - 8003676: d017 beq.n 80036a8 + 8003fb6: 68fb ldr r3, [r7, #12] + 8003fb8: 681b ldr r3, [r3, #0] + 8003fba: 695b ldr r3, [r3, #20] + 8003fbc: f003 0304 and.w r3, r3, #4 + 8003fc0: 2b04 cmp r3, #4 + 8003fc2: d11b bne.n 8003ffc + 8003fc4: 68fb ldr r3, [r7, #12] + 8003fc6: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003fc8: 2b00 cmp r3, #0 + 8003fca: d017 beq.n 8003ffc { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; - 8003678: 68fb ldr r3, [r7, #12] - 800367a: 6a5b ldr r3, [r3, #36] @ 0x24 - 800367c: 781a ldrb r2, [r3, #0] - 800367e: 68fb ldr r3, [r7, #12] - 8003680: 681b ldr r3, [r3, #0] - 8003682: 611a str r2, [r3, #16] + 8003fcc: 68fb ldr r3, [r7, #12] + 8003fce: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003fd0: 781a ldrb r2, [r3, #0] + 8003fd2: 68fb ldr r3, [r7, #12] + 8003fd4: 681b ldr r3, [r3, #0] + 8003fd6: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003684: 68fb ldr r3, [r7, #12] - 8003686: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003688: 1c5a adds r2, r3, #1 - 800368a: 68fb ldr r3, [r7, #12] - 800368c: 625a str r2, [r3, #36] @ 0x24 + 8003fd8: 68fb ldr r3, [r7, #12] + 8003fda: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003fdc: 1c5a adds r2, r3, #1 + 8003fde: 68fb ldr r3, [r7, #12] + 8003fe0: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; - 800368e: 68fb ldr r3, [r7, #12] - 8003690: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003692: b29b uxth r3, r3 - 8003694: 3b01 subs r3, #1 - 8003696: b29a uxth r2, r3 - 8003698: 68fb ldr r3, [r7, #12] - 800369a: 855a strh r2, [r3, #42] @ 0x2a + 8003fe2: 68fb ldr r3, [r7, #12] + 8003fe4: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003fe6: b29b uxth r3, r3 + 8003fe8: 3b01 subs r3, #1 + 8003fea: b29a uxth r2, r3 + 8003fec: 68fb ldr r3, [r7, #12] + 8003fee: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; - 800369c: 68fb ldr r3, [r7, #12] - 800369e: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80036a0: 3b01 subs r3, #1 - 80036a2: b29a uxth r2, r3 - 80036a4: 68fb ldr r3, [r7, #12] - 80036a6: 851a strh r2, [r3, #40] @ 0x28 + 8003ff0: 68fb ldr r3, [r7, #12] + 8003ff2: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003ff4: 3b01 subs r3, #1 + 8003ff6: b29a uxth r2, r3 + 8003ff8: 68fb ldr r3, [r7, #12] + 8003ffa: 851a strh r2, [r3, #40] @ 0x28 } /* Wait until BTF flag is set */ if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 80036a8: 697a ldr r2, [r7, #20] - 80036aa: 6a39 ldr r1, [r7, #32] - 80036ac: 68f8 ldr r0, [r7, #12] - 80036ae: f000 fd53 bl 8004158 - 80036b2: 4603 mov r3, r0 - 80036b4: 2b00 cmp r3, #0 - 80036b6: d00d beq.n 80036d4 + 8003ffc: 697a ldr r2, [r7, #20] + 8003ffe: 6a39 ldr r1, [r7, #32] + 8004000: 68f8 ldr r0, [r7, #12] + 8004002: f000 fd53 bl 8004aac + 8004006: 4603 mov r3, r0 + 8004008: 2b00 cmp r3, #0 + 800400a: d00d beq.n 8004028 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 80036b8: 68fb ldr r3, [r7, #12] - 80036ba: 6c1b ldr r3, [r3, #64] @ 0x40 - 80036bc: 2b04 cmp r3, #4 - 80036be: d107 bne.n 80036d0 + 800400c: 68fb ldr r3, [r7, #12] + 800400e: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004010: 2b04 cmp r3, #4 + 8004012: d107 bne.n 8004024 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 80036c0: 68fb ldr r3, [r7, #12] - 80036c2: 681b ldr r3, [r3, #0] - 80036c4: 681a ldr r2, [r3, #0] - 80036c6: 68fb ldr r3, [r7, #12] - 80036c8: 681b ldr r3, [r3, #0] - 80036ca: f442 7200 orr.w r2, r2, #512 @ 0x200 - 80036ce: 601a str r2, [r3, #0] + 8004014: 68fb ldr r3, [r7, #12] + 8004016: 681b ldr r3, [r3, #0] + 8004018: 681a ldr r2, [r3, #0] + 800401a: 68fb ldr r3, [r7, #12] + 800401c: 681b ldr r3, [r3, #0] + 800401e: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8004022: 601a str r2, [r3, #0] } return HAL_ERROR; - 80036d0: 2301 movs r3, #1 - 80036d2: e01a b.n 800370a + 8004024: 2301 movs r3, #1 + 8004026: e01a b.n 800405e while (hi2c->XferSize > 0U) - 80036d4: 68fb ldr r3, [r7, #12] - 80036d6: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80036d8: 2b00 cmp r3, #0 - 80036da: d194 bne.n 8003606 + 8004028: 68fb ldr r3, [r7, #12] + 800402a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800402c: 2b00 cmp r3, #0 + 800402e: d194 bne.n 8003f5a } } /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 80036dc: 68fb ldr r3, [r7, #12] - 80036de: 681b ldr r3, [r3, #0] - 80036e0: 681a ldr r2, [r3, #0] - 80036e2: 68fb ldr r3, [r7, #12] - 80036e4: 681b ldr r3, [r3, #0] - 80036e6: f442 7200 orr.w r2, r2, #512 @ 0x200 - 80036ea: 601a str r2, [r3, #0] + 8004030: 68fb ldr r3, [r7, #12] + 8004032: 681b ldr r3, [r3, #0] + 8004034: 681a ldr r2, [r3, #0] + 8004036: 68fb ldr r3, [r7, #12] + 8004038: 681b ldr r3, [r3, #0] + 800403a: f442 7200 orr.w r2, r2, #512 @ 0x200 + 800403e: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; - 80036ec: 68fb ldr r3, [r7, #12] - 80036ee: 2220 movs r2, #32 - 80036f0: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004040: 68fb ldr r3, [r7, #12] + 8004042: 2220 movs r2, #32 + 8004044: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80036f4: 68fb ldr r3, [r7, #12] - 80036f6: 2200 movs r2, #0 - 80036f8: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004048: 68fb ldr r3, [r7, #12] + 800404a: 2200 movs r2, #0 + 800404c: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80036fc: 68fb ldr r3, [r7, #12] - 80036fe: 2200 movs r2, #0 - 8003700: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004050: 68fb ldr r3, [r7, #12] + 8004052: 2200 movs r2, #0 + 8004054: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 8003704: 2300 movs r3, #0 - 8003706: e000 b.n 800370a + 8004058: 2300 movs r3, #0 + 800405a: e000 b.n 800405e } else { return HAL_BUSY; - 8003708: 2302 movs r3, #2 + 800405c: 2302 movs r3, #2 } } - 800370a: 4618 mov r0, r3 - 800370c: 3718 adds r7, #24 - 800370e: 46bd mov sp, r7 - 8003710: bd80 pop {r7, pc} - 8003712: bf00 nop - 8003714: 00100002 .word 0x00100002 - 8003718: ffff0000 .word 0xffff0000 + 800405e: 4618 mov r0, r3 + 8004060: 3718 adds r7, #24 + 8004062: 46bd mov sp, r7 + 8004064: bd80 pop {r7, pc} + 8004066: bf00 nop + 8004068: 00100002 .word 0x00100002 + 800406c: ffff0000 .word 0xffff0000 -0800371c : +08004070 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 800371c: b580 push {r7, lr} - 800371e: b08c sub sp, #48 @ 0x30 - 8003720: af02 add r7, sp, #8 - 8003722: 60f8 str r0, [r7, #12] - 8003724: 607a str r2, [r7, #4] - 8003726: 461a mov r2, r3 - 8003728: 460b mov r3, r1 - 800372a: 817b strh r3, [r7, #10] - 800372c: 4613 mov r3, r2 - 800372e: 813b strh r3, [r7, #8] + 8004070: b580 push {r7, lr} + 8004072: b08c sub sp, #48 @ 0x30 + 8004074: af02 add r7, sp, #8 + 8004076: 60f8 str r0, [r7, #12] + 8004078: 607a str r2, [r7, #4] + 800407a: 461a mov r2, r3 + 800407c: 460b mov r3, r1 + 800407e: 817b strh r3, [r7, #10] + 8004080: 4613 mov r3, r2 + 8004082: 813b strh r3, [r7, #8] __IO uint32_t count = 0U; - 8003730: 2300 movs r3, #0 - 8003732: 623b str r3, [r7, #32] + 8004084: 2300 movs r3, #0 + 8004086: 623b str r3, [r7, #32] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); - 8003734: f7ff f808 bl 8002748 - 8003738: 6278 str r0, [r7, #36] @ 0x24 + 8004088: f7fe ffe4 bl 8003054 + 800408c: 6278 str r0, [r7, #36] @ 0x24 if (hi2c->State == HAL_I2C_STATE_READY) - 800373a: 68fb ldr r3, [r7, #12] - 800373c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8003740: b2db uxtb r3, r3 - 8003742: 2b20 cmp r3, #32 - 8003744: f040 824b bne.w 8003bde + 800408e: 68fb ldr r3, [r7, #12] + 8004090: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8004094: b2db uxtb r3, r3 + 8004096: 2b20 cmp r3, #32 + 8004098: f040 824b bne.w 8004532 { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) - 8003748: 6a7b ldr r3, [r7, #36] @ 0x24 - 800374a: 9300 str r3, [sp, #0] - 800374c: 2319 movs r3, #25 - 800374e: 2201 movs r2, #1 - 8003750: 497f ldr r1, [pc, #508] @ (8003950 ) - 8003752: 68f8 ldr r0, [r7, #12] - 8003754: f000 fb9e bl 8003e94 - 8003758: 4603 mov r3, r0 - 800375a: 2b00 cmp r3, #0 - 800375c: d001 beq.n 8003762 + 800409c: 6a7b ldr r3, [r7, #36] @ 0x24 + 800409e: 9300 str r3, [sp, #0] + 80040a0: 2319 movs r3, #25 + 80040a2: 2201 movs r2, #1 + 80040a4: 497f ldr r1, [pc, #508] @ (80042a4 ) + 80040a6: 68f8 ldr r0, [r7, #12] + 80040a8: f000 fb9e bl 80047e8 + 80040ac: 4603 mov r3, r0 + 80040ae: 2b00 cmp r3, #0 + 80040b0: d001 beq.n 80040b6 { return HAL_BUSY; - 800375e: 2302 movs r3, #2 - 8003760: e23e b.n 8003be0 + 80040b2: 2302 movs r3, #2 + 80040b4: e23e b.n 8004534 } /* Process Locked */ __HAL_LOCK(hi2c); - 8003762: 68fb ldr r3, [r7, #12] - 8003764: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8003768: 2b01 cmp r3, #1 - 800376a: d101 bne.n 8003770 - 800376c: 2302 movs r3, #2 - 800376e: e237 b.n 8003be0 - 8003770: 68fb ldr r3, [r7, #12] - 8003772: 2201 movs r2, #1 - 8003774: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80040b6: 68fb ldr r3, [r7, #12] + 80040b8: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 80040bc: 2b01 cmp r3, #1 + 80040be: d101 bne.n 80040c4 + 80040c0: 2302 movs r3, #2 + 80040c2: e237 b.n 8004534 + 80040c4: 68fb ldr r3, [r7, #12] + 80040c6: 2201 movs r2, #1 + 80040c8: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) - 8003778: 68fb ldr r3, [r7, #12] - 800377a: 681b ldr r3, [r3, #0] - 800377c: 681b ldr r3, [r3, #0] - 800377e: f003 0301 and.w r3, r3, #1 - 8003782: 2b01 cmp r3, #1 - 8003784: d007 beq.n 8003796 + 80040cc: 68fb ldr r3, [r7, #12] + 80040ce: 681b ldr r3, [r3, #0] + 80040d0: 681b ldr r3, [r3, #0] + 80040d2: f003 0301 and.w r3, r3, #1 + 80040d6: 2b01 cmp r3, #1 + 80040d8: d007 beq.n 80040ea { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 8003786: 68fb ldr r3, [r7, #12] - 8003788: 681b ldr r3, [r3, #0] - 800378a: 681a ldr r2, [r3, #0] - 800378c: 68fb ldr r3, [r7, #12] - 800378e: 681b ldr r3, [r3, #0] - 8003790: f042 0201 orr.w r2, r2, #1 - 8003794: 601a str r2, [r3, #0] + 80040da: 68fb ldr r3, [r7, #12] + 80040dc: 681b ldr r3, [r3, #0] + 80040de: 681a ldr r2, [r3, #0] + 80040e0: 68fb ldr r3, [r7, #12] + 80040e2: 681b ldr r3, [r3, #0] + 80040e4: f042 0201 orr.w r2, r2, #1 + 80040e8: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 8003796: 68fb ldr r3, [r7, #12] - 8003798: 681b ldr r3, [r3, #0] - 800379a: 681a ldr r2, [r3, #0] - 800379c: 68fb ldr r3, [r7, #12] - 800379e: 681b ldr r3, [r3, #0] - 80037a0: f422 6200 bic.w r2, r2, #2048 @ 0x800 - 80037a4: 601a str r2, [r3, #0] + 80040ea: 68fb ldr r3, [r7, #12] + 80040ec: 681b ldr r3, [r3, #0] + 80040ee: 681a ldr r2, [r3, #0] + 80040f0: 68fb ldr r3, [r7, #12] + 80040f2: 681b ldr r3, [r3, #0] + 80040f4: f422 6200 bic.w r2, r2, #2048 @ 0x800 + 80040f8: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; - 80037a6: 68fb ldr r3, [r7, #12] - 80037a8: 2222 movs r2, #34 @ 0x22 - 80037aa: f883 203d strb.w r2, [r3, #61] @ 0x3d + 80040fa: 68fb ldr r3, [r7, #12] + 80040fc: 2222 movs r2, #34 @ 0x22 + 80040fe: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_MASTER; - 80037ae: 68fb ldr r3, [r7, #12] - 80037b0: 2210 movs r2, #16 - 80037b2: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004102: 68fb ldr r3, [r7, #12] + 8004104: 2210 movs r2, #16 + 8004106: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 80037b6: 68fb ldr r3, [r7, #12] - 80037b8: 2200 movs r2, #0 - 80037ba: 641a str r2, [r3, #64] @ 0x40 + 800410a: 68fb ldr r3, [r7, #12] + 800410c: 2200 movs r2, #0 + 800410e: 641a str r2, [r3, #64] @ 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; - 80037bc: 68fb ldr r3, [r7, #12] - 80037be: 687a ldr r2, [r7, #4] - 80037c0: 625a str r2, [r3, #36] @ 0x24 + 8004110: 68fb ldr r3, [r7, #12] + 8004112: 687a ldr r2, [r7, #4] + 8004114: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; - 80037c2: 68fb ldr r3, [r7, #12] - 80037c4: 893a ldrh r2, [r7, #8] - 80037c6: 855a strh r2, [r3, #42] @ 0x2a + 8004116: 68fb ldr r3, [r7, #12] + 8004118: 893a ldrh r2, [r7, #8] + 800411a: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize = hi2c->XferCount; - 80037c8: 68fb ldr r3, [r7, #12] - 80037ca: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80037cc: b29a uxth r2, r3 - 80037ce: 68fb ldr r3, [r7, #12] - 80037d0: 851a strh r2, [r3, #40] @ 0x28 + 800411c: 68fb ldr r3, [r7, #12] + 800411e: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004120: b29a uxth r2, r3 + 8004122: 68fb ldr r3, [r7, #12] + 8004124: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 80037d2: 68fb ldr r3, [r7, #12] - 80037d4: 4a5f ldr r2, [pc, #380] @ (8003954 ) - 80037d6: 62da str r2, [r3, #44] @ 0x2c + 8004126: 68fb ldr r3, [r7, #12] + 8004128: 4a5f ldr r2, [pc, #380] @ (80042a8 ) + 800412a: 62da str r2, [r3, #44] @ 0x2c /* Send Slave Address */ if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) - 80037d8: 8979 ldrh r1, [r7, #10] - 80037da: 6a7b ldr r3, [r7, #36] @ 0x24 - 80037dc: 6b3a ldr r2, [r7, #48] @ 0x30 - 80037de: 68f8 ldr r0, [r7, #12] - 80037e0: f000 fa8a bl 8003cf8 - 80037e4: 4603 mov r3, r0 - 80037e6: 2b00 cmp r3, #0 - 80037e8: d001 beq.n 80037ee + 800412c: 8979 ldrh r1, [r7, #10] + 800412e: 6a7b ldr r3, [r7, #36] @ 0x24 + 8004130: 6b3a ldr r2, [r7, #48] @ 0x30 + 8004132: 68f8 ldr r0, [r7, #12] + 8004134: f000 fa8a bl 800464c + 8004138: 4603 mov r3, r0 + 800413a: 2b00 cmp r3, #0 + 800413c: d001 beq.n 8004142 { return HAL_ERROR; - 80037ea: 2301 movs r3, #1 - 80037ec: e1f8 b.n 8003be0 + 800413e: 2301 movs r3, #1 + 8004140: e1f8 b.n 8004534 } if (hi2c->XferSize == 0U) - 80037ee: 68fb ldr r3, [r7, #12] - 80037f0: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80037f2: 2b00 cmp r3, #0 - 80037f4: d113 bne.n 800381e + 8004142: 68fb ldr r3, [r7, #12] + 8004144: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004146: 2b00 cmp r3, #0 + 8004148: d113 bne.n 8004172 { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80037f6: 2300 movs r3, #0 - 80037f8: 61fb str r3, [r7, #28] - 80037fa: 68fb ldr r3, [r7, #12] - 80037fc: 681b ldr r3, [r3, #0] - 80037fe: 695b ldr r3, [r3, #20] - 8003800: 61fb str r3, [r7, #28] - 8003802: 68fb ldr r3, [r7, #12] - 8003804: 681b ldr r3, [r3, #0] - 8003806: 699b ldr r3, [r3, #24] - 8003808: 61fb str r3, [r7, #28] - 800380a: 69fb ldr r3, [r7, #28] + 800414a: 2300 movs r3, #0 + 800414c: 61fb str r3, [r7, #28] + 800414e: 68fb ldr r3, [r7, #12] + 8004150: 681b ldr r3, [r3, #0] + 8004152: 695b ldr r3, [r3, #20] + 8004154: 61fb str r3, [r7, #28] + 8004156: 68fb ldr r3, [r7, #12] + 8004158: 681b ldr r3, [r3, #0] + 800415a: 699b ldr r3, [r3, #24] + 800415c: 61fb str r3, [r7, #28] + 800415e: 69fb ldr r3, [r7, #28] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 800380c: 68fb ldr r3, [r7, #12] - 800380e: 681b ldr r3, [r3, #0] - 8003810: 681a ldr r2, [r3, #0] - 8003812: 68fb ldr r3, [r7, #12] - 8003814: 681b ldr r3, [r3, #0] - 8003816: f442 7200 orr.w r2, r2, #512 @ 0x200 - 800381a: 601a str r2, [r3, #0] - 800381c: e1cc b.n 8003bb8 + 8004160: 68fb ldr r3, [r7, #12] + 8004162: 681b ldr r3, [r3, #0] + 8004164: 681a ldr r2, [r3, #0] + 8004166: 68fb ldr r3, [r7, #12] + 8004168: 681b ldr r3, [r3, #0] + 800416a: f442 7200 orr.w r2, r2, #512 @ 0x200 + 800416e: 601a str r2, [r3, #0] + 8004170: e1cc b.n 800450c } else if (hi2c->XferSize == 1U) - 800381e: 68fb ldr r3, [r7, #12] - 8003820: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003822: 2b01 cmp r3, #1 - 8003824: d11e bne.n 8003864 + 8004172: 68fb ldr r3, [r7, #12] + 8004174: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004176: 2b01 cmp r3, #1 + 8004178: d11e bne.n 80041b8 { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003826: 68fb ldr r3, [r7, #12] - 8003828: 681b ldr r3, [r3, #0] - 800382a: 681a ldr r2, [r3, #0] - 800382c: 68fb ldr r3, [r7, #12] - 800382e: 681b ldr r3, [r3, #0] - 8003830: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 8003834: 601a str r2, [r3, #0] + 800417a: 68fb ldr r3, [r7, #12] + 800417c: 681b ldr r3, [r3, #0] + 800417e: 681a ldr r2, [r3, #0] + 8004180: 68fb ldr r3, [r7, #12] + 8004182: 681b ldr r3, [r3, #0] + 8004184: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8004188: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 8003836: b672 cpsid i + 800418a: b672 cpsid i } - 8003838: bf00 nop + 800418c: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 800383a: 2300 movs r3, #0 - 800383c: 61bb str r3, [r7, #24] - 800383e: 68fb ldr r3, [r7, #12] - 8003840: 681b ldr r3, [r3, #0] - 8003842: 695b ldr r3, [r3, #20] - 8003844: 61bb str r3, [r7, #24] - 8003846: 68fb ldr r3, [r7, #12] - 8003848: 681b ldr r3, [r3, #0] - 800384a: 699b ldr r3, [r3, #24] - 800384c: 61bb str r3, [r7, #24] - 800384e: 69bb ldr r3, [r7, #24] + 800418e: 2300 movs r3, #0 + 8004190: 61bb str r3, [r7, #24] + 8004192: 68fb ldr r3, [r7, #12] + 8004194: 681b ldr r3, [r3, #0] + 8004196: 695b ldr r3, [r3, #20] + 8004198: 61bb str r3, [r7, #24] + 800419a: 68fb ldr r3, [r7, #12] + 800419c: 681b ldr r3, [r3, #0] + 800419e: 699b ldr r3, [r3, #24] + 80041a0: 61bb str r3, [r7, #24] + 80041a2: 69bb ldr r3, [r7, #24] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003850: 68fb ldr r3, [r7, #12] - 8003852: 681b ldr r3, [r3, #0] - 8003854: 681a ldr r2, [r3, #0] - 8003856: 68fb ldr r3, [r7, #12] - 8003858: 681b ldr r3, [r3, #0] - 800385a: f442 7200 orr.w r2, r2, #512 @ 0x200 - 800385e: 601a str r2, [r3, #0] + 80041a4: 68fb ldr r3, [r7, #12] + 80041a6: 681b ldr r3, [r3, #0] + 80041a8: 681a ldr r2, [r3, #0] + 80041aa: 68fb ldr r3, [r7, #12] + 80041ac: 681b ldr r3, [r3, #0] + 80041ae: f442 7200 orr.w r2, r2, #512 @ 0x200 + 80041b2: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); - 8003860: b662 cpsie i + 80041b4: b662 cpsie i } - 8003862: e035 b.n 80038d0 + 80041b6: e035 b.n 8004224 /* Re-enable IRQs */ __enable_irq(); } else if (hi2c->XferSize == 2U) - 8003864: 68fb ldr r3, [r7, #12] - 8003866: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003868: 2b02 cmp r3, #2 - 800386a: d11e bne.n 80038aa + 80041b8: 68fb ldr r3, [r7, #12] + 80041ba: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80041bc: 2b02 cmp r3, #2 + 80041be: d11e bne.n 80041fe { /* Enable Pos */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 800386c: 68fb ldr r3, [r7, #12] - 800386e: 681b ldr r3, [r3, #0] - 8003870: 681a ldr r2, [r3, #0] - 8003872: 68fb ldr r3, [r7, #12] - 8003874: 681b ldr r3, [r3, #0] - 8003876: f442 6200 orr.w r2, r2, #2048 @ 0x800 - 800387a: 601a str r2, [r3, #0] + 80041c0: 68fb ldr r3, [r7, #12] + 80041c2: 681b ldr r3, [r3, #0] + 80041c4: 681a ldr r2, [r3, #0] + 80041c6: 68fb ldr r3, [r7, #12] + 80041c8: 681b ldr r3, [r3, #0] + 80041ca: f442 6200 orr.w r2, r2, #2048 @ 0x800 + 80041ce: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 800387c: b672 cpsid i + 80041d0: b672 cpsid i } - 800387e: bf00 nop + 80041d2: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8003880: 2300 movs r3, #0 - 8003882: 617b str r3, [r7, #20] - 8003884: 68fb ldr r3, [r7, #12] - 8003886: 681b ldr r3, [r3, #0] - 8003888: 695b ldr r3, [r3, #20] - 800388a: 617b str r3, [r7, #20] - 800388c: 68fb ldr r3, [r7, #12] - 800388e: 681b ldr r3, [r3, #0] - 8003890: 699b ldr r3, [r3, #24] - 8003892: 617b str r3, [r7, #20] - 8003894: 697b ldr r3, [r7, #20] + 80041d4: 2300 movs r3, #0 + 80041d6: 617b str r3, [r7, #20] + 80041d8: 68fb ldr r3, [r7, #12] + 80041da: 681b ldr r3, [r3, #0] + 80041dc: 695b ldr r3, [r3, #20] + 80041de: 617b str r3, [r7, #20] + 80041e0: 68fb ldr r3, [r7, #12] + 80041e2: 681b ldr r3, [r3, #0] + 80041e4: 699b ldr r3, [r3, #24] + 80041e6: 617b str r3, [r7, #20] + 80041e8: 697b ldr r3, [r7, #20] /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003896: 68fb ldr r3, [r7, #12] - 8003898: 681b ldr r3, [r3, #0] - 800389a: 681a ldr r2, [r3, #0] - 800389c: 68fb ldr r3, [r7, #12] - 800389e: 681b ldr r3, [r3, #0] - 80038a0: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 80038a4: 601a str r2, [r3, #0] + 80041ea: 68fb ldr r3, [r7, #12] + 80041ec: 681b ldr r3, [r3, #0] + 80041ee: 681a ldr r2, [r3, #0] + 80041f0: 68fb ldr r3, [r7, #12] + 80041f2: 681b ldr r3, [r3, #0] + 80041f4: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 80041f8: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); - 80038a6: b662 cpsie i + 80041fa: b662 cpsie i } - 80038a8: e012 b.n 80038d0 + 80041fc: e012 b.n 8004224 __enable_irq(); } else { /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 80038aa: 68fb ldr r3, [r7, #12] - 80038ac: 681b ldr r3, [r3, #0] - 80038ae: 681a ldr r2, [r3, #0] - 80038b0: 68fb ldr r3, [r7, #12] - 80038b2: 681b ldr r3, [r3, #0] - 80038b4: f442 6280 orr.w r2, r2, #1024 @ 0x400 - 80038b8: 601a str r2, [r3, #0] + 80041fe: 68fb ldr r3, [r7, #12] + 8004200: 681b ldr r3, [r3, #0] + 8004202: 681a ldr r2, [r3, #0] + 8004204: 68fb ldr r3, [r7, #12] + 8004206: 681b ldr r3, [r3, #0] + 8004208: f442 6280 orr.w r2, r2, #1024 @ 0x400 + 800420c: 601a str r2, [r3, #0] /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80038ba: 2300 movs r3, #0 - 80038bc: 613b str r3, [r7, #16] - 80038be: 68fb ldr r3, [r7, #12] - 80038c0: 681b ldr r3, [r3, #0] - 80038c2: 695b ldr r3, [r3, #20] - 80038c4: 613b str r3, [r7, #16] - 80038c6: 68fb ldr r3, [r7, #12] - 80038c8: 681b ldr r3, [r3, #0] - 80038ca: 699b ldr r3, [r3, #24] - 80038cc: 613b str r3, [r7, #16] - 80038ce: 693b ldr r3, [r7, #16] + 800420e: 2300 movs r3, #0 + 8004210: 613b str r3, [r7, #16] + 8004212: 68fb ldr r3, [r7, #12] + 8004214: 681b ldr r3, [r3, #0] + 8004216: 695b ldr r3, [r3, #20] + 8004218: 613b str r3, [r7, #16] + 800421a: 68fb ldr r3, [r7, #12] + 800421c: 681b ldr r3, [r3, #0] + 800421e: 699b ldr r3, [r3, #24] + 8004220: 613b str r3, [r7, #16] + 8004222: 693b ldr r3, [r7, #16] } while (hi2c->XferSize > 0U) - 80038d0: e172 b.n 8003bb8 + 8004224: e172 b.n 800450c { if (hi2c->XferSize <= 3U) - 80038d2: 68fb ldr r3, [r7, #12] - 80038d4: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80038d6: 2b03 cmp r3, #3 - 80038d8: f200 811f bhi.w 8003b1a + 8004226: 68fb ldr r3, [r7, #12] + 8004228: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800422a: 2b03 cmp r3, #3 + 800422c: f200 811f bhi.w 800446e { /* One byte */ if (hi2c->XferSize == 1U) - 80038dc: 68fb ldr r3, [r7, #12] - 80038de: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80038e0: 2b01 cmp r3, #1 - 80038e2: d123 bne.n 800392c + 8004230: 68fb ldr r3, [r7, #12] + 8004232: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004234: 2b01 cmp r3, #1 + 8004236: d123 bne.n 8004280 { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 80038e4: 6a7a ldr r2, [r7, #36] @ 0x24 - 80038e6: 6b39 ldr r1, [r7, #48] @ 0x30 - 80038e8: 68f8 ldr r0, [r7, #12] - 80038ea: f000 fc7d bl 80041e8 - 80038ee: 4603 mov r3, r0 - 80038f0: 2b00 cmp r3, #0 - 80038f2: d001 beq.n 80038f8 + 8004238: 6a7a ldr r2, [r7, #36] @ 0x24 + 800423a: 6b39 ldr r1, [r7, #48] @ 0x30 + 800423c: 68f8 ldr r0, [r7, #12] + 800423e: f000 fc7d bl 8004b3c + 8004242: 4603 mov r3, r0 + 8004244: 2b00 cmp r3, #0 + 8004246: d001 beq.n 800424c { return HAL_ERROR; - 80038f4: 2301 movs r3, #1 - 80038f6: e173 b.n 8003be0 + 8004248: 2301 movs r3, #1 + 800424a: e173 b.n 8004534 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 80038f8: 68fb ldr r3, [r7, #12] - 80038fa: 681b ldr r3, [r3, #0] - 80038fc: 691a ldr r2, [r3, #16] - 80038fe: 68fb ldr r3, [r7, #12] - 8003900: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003902: b2d2 uxtb r2, r2 - 8003904: 701a strb r2, [r3, #0] + 800424c: 68fb ldr r3, [r7, #12] + 800424e: 681b ldr r3, [r3, #0] + 8004250: 691a ldr r2, [r3, #16] + 8004252: 68fb ldr r3, [r7, #12] + 8004254: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004256: b2d2 uxtb r2, r2 + 8004258: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003906: 68fb ldr r3, [r7, #12] - 8003908: 6a5b ldr r3, [r3, #36] @ 0x24 - 800390a: 1c5a adds r2, r3, #1 - 800390c: 68fb ldr r3, [r7, #12] - 800390e: 625a str r2, [r3, #36] @ 0x24 + 800425a: 68fb ldr r3, [r7, #12] + 800425c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800425e: 1c5a adds r2, r3, #1 + 8004260: 68fb ldr r3, [r7, #12] + 8004262: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003910: 68fb ldr r3, [r7, #12] - 8003912: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003914: 3b01 subs r3, #1 - 8003916: b29a uxth r2, r3 - 8003918: 68fb ldr r3, [r7, #12] - 800391a: 851a strh r2, [r3, #40] @ 0x28 + 8004264: 68fb ldr r3, [r7, #12] + 8004266: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004268: 3b01 subs r3, #1 + 800426a: b29a uxth r2, r3 + 800426c: 68fb ldr r3, [r7, #12] + 800426e: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 800391c: 68fb ldr r3, [r7, #12] - 800391e: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003920: b29b uxth r3, r3 - 8003922: 3b01 subs r3, #1 - 8003924: b29a uxth r2, r3 - 8003926: 68fb ldr r3, [r7, #12] - 8003928: 855a strh r2, [r3, #42] @ 0x2a - 800392a: e145 b.n 8003bb8 + 8004270: 68fb ldr r3, [r7, #12] + 8004272: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004274: b29b uxth r3, r3 + 8004276: 3b01 subs r3, #1 + 8004278: b29a uxth r2, r3 + 800427a: 68fb ldr r3, [r7, #12] + 800427c: 855a strh r2, [r3, #42] @ 0x2a + 800427e: e145 b.n 800450c } /* Two bytes */ else if (hi2c->XferSize == 2U) - 800392c: 68fb ldr r3, [r7, #12] - 800392e: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003930: 2b02 cmp r3, #2 - 8003932: d152 bne.n 80039da + 8004280: 68fb ldr r3, [r7, #12] + 8004282: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004284: 2b02 cmp r3, #2 + 8004286: d152 bne.n 800432e { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) - 8003934: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003936: 9300 str r3, [sp, #0] - 8003938: 6b3b ldr r3, [r7, #48] @ 0x30 - 800393a: 2200 movs r2, #0 - 800393c: 4906 ldr r1, [pc, #24] @ (8003958 ) - 800393e: 68f8 ldr r0, [r7, #12] - 8003940: f000 faa8 bl 8003e94 - 8003944: 4603 mov r3, r0 - 8003946: 2b00 cmp r3, #0 - 8003948: d008 beq.n 800395c + 8004288: 6a7b ldr r3, [r7, #36] @ 0x24 + 800428a: 9300 str r3, [sp, #0] + 800428c: 6b3b ldr r3, [r7, #48] @ 0x30 + 800428e: 2200 movs r2, #0 + 8004290: 4906 ldr r1, [pc, #24] @ (80042ac ) + 8004292: 68f8 ldr r0, [r7, #12] + 8004294: f000 faa8 bl 80047e8 + 8004298: 4603 mov r3, r0 + 800429a: 2b00 cmp r3, #0 + 800429c: d008 beq.n 80042b0 { return HAL_ERROR; - 800394a: 2301 movs r3, #1 - 800394c: e148 b.n 8003be0 - 800394e: bf00 nop - 8003950: 00100002 .word 0x00100002 - 8003954: ffff0000 .word 0xffff0000 - 8003958: 00010004 .word 0x00010004 + 800429e: 2301 movs r3, #1 + 80042a0: e148 b.n 8004534 + 80042a2: bf00 nop + 80042a4: 00100002 .word 0x00100002 + 80042a8: ffff0000 .word 0xffff0000 + 80042ac: 00010004 .word 0x00010004 __ASM volatile ("cpsid i" : : : "memory"); - 800395c: b672 cpsid i + 80042b0: b672 cpsid i } - 800395e: bf00 nop + 80042b2: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003960: 68fb ldr r3, [r7, #12] - 8003962: 681b ldr r3, [r3, #0] - 8003964: 681a ldr r2, [r3, #0] - 8003966: 68fb ldr r3, [r7, #12] - 8003968: 681b ldr r3, [r3, #0] - 800396a: f442 7200 orr.w r2, r2, #512 @ 0x200 - 800396e: 601a str r2, [r3, #0] + 80042b4: 68fb ldr r3, [r7, #12] + 80042b6: 681b ldr r3, [r3, #0] + 80042b8: 681a ldr r2, [r3, #0] + 80042ba: 68fb ldr r3, [r7, #12] + 80042bc: 681b ldr r3, [r3, #0] + 80042be: f442 7200 orr.w r2, r2, #512 @ 0x200 + 80042c2: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003970: 68fb ldr r3, [r7, #12] - 8003972: 681b ldr r3, [r3, #0] - 8003974: 691a ldr r2, [r3, #16] - 8003976: 68fb ldr r3, [r7, #12] - 8003978: 6a5b ldr r3, [r3, #36] @ 0x24 - 800397a: b2d2 uxtb r2, r2 - 800397c: 701a strb r2, [r3, #0] + 80042c4: 68fb ldr r3, [r7, #12] + 80042c6: 681b ldr r3, [r3, #0] + 80042c8: 691a ldr r2, [r3, #16] + 80042ca: 68fb ldr r3, [r7, #12] + 80042cc: 6a5b ldr r3, [r3, #36] @ 0x24 + 80042ce: b2d2 uxtb r2, r2 + 80042d0: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 800397e: 68fb ldr r3, [r7, #12] - 8003980: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003982: 1c5a adds r2, r3, #1 - 8003984: 68fb ldr r3, [r7, #12] - 8003986: 625a str r2, [r3, #36] @ 0x24 + 80042d2: 68fb ldr r3, [r7, #12] + 80042d4: 6a5b ldr r3, [r3, #36] @ 0x24 + 80042d6: 1c5a adds r2, r3, #1 + 80042d8: 68fb ldr r3, [r7, #12] + 80042da: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003988: 68fb ldr r3, [r7, #12] - 800398a: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800398c: 3b01 subs r3, #1 - 800398e: b29a uxth r2, r3 - 8003990: 68fb ldr r3, [r7, #12] - 8003992: 851a strh r2, [r3, #40] @ 0x28 + 80042dc: 68fb ldr r3, [r7, #12] + 80042de: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80042e0: 3b01 subs r3, #1 + 80042e2: b29a uxth r2, r3 + 80042e4: 68fb ldr r3, [r7, #12] + 80042e6: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003994: 68fb ldr r3, [r7, #12] - 8003996: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003998: b29b uxth r3, r3 - 800399a: 3b01 subs r3, #1 - 800399c: b29a uxth r2, r3 - 800399e: 68fb ldr r3, [r7, #12] - 80039a0: 855a strh r2, [r3, #42] @ 0x2a + 80042e8: 68fb ldr r3, [r7, #12] + 80042ea: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80042ec: b29b uxth r3, r3 + 80042ee: 3b01 subs r3, #1 + 80042f0: b29a uxth r2, r3 + 80042f2: 68fb ldr r3, [r7, #12] + 80042f4: 855a strh r2, [r3, #42] @ 0x2a __ASM volatile ("cpsie i" : : : "memory"); - 80039a2: b662 cpsie i + 80042f6: b662 cpsie i } - 80039a4: bf00 nop + 80042f8: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 80039a6: 68fb ldr r3, [r7, #12] - 80039a8: 681b ldr r3, [r3, #0] - 80039aa: 691a ldr r2, [r3, #16] - 80039ac: 68fb ldr r3, [r7, #12] - 80039ae: 6a5b ldr r3, [r3, #36] @ 0x24 - 80039b0: b2d2 uxtb r2, r2 - 80039b2: 701a strb r2, [r3, #0] + 80042fa: 68fb ldr r3, [r7, #12] + 80042fc: 681b ldr r3, [r3, #0] + 80042fe: 691a ldr r2, [r3, #16] + 8004300: 68fb ldr r3, [r7, #12] + 8004302: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004304: b2d2 uxtb r2, r2 + 8004306: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80039b4: 68fb ldr r3, [r7, #12] - 80039b6: 6a5b ldr r3, [r3, #36] @ 0x24 - 80039b8: 1c5a adds r2, r3, #1 - 80039ba: 68fb ldr r3, [r7, #12] - 80039bc: 625a str r2, [r3, #36] @ 0x24 + 8004308: 68fb ldr r3, [r7, #12] + 800430a: 6a5b ldr r3, [r3, #36] @ 0x24 + 800430c: 1c5a adds r2, r3, #1 + 800430e: 68fb ldr r3, [r7, #12] + 8004310: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 80039be: 68fb ldr r3, [r7, #12] - 80039c0: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80039c2: 3b01 subs r3, #1 - 80039c4: b29a uxth r2, r3 - 80039c6: 68fb ldr r3, [r7, #12] - 80039c8: 851a strh r2, [r3, #40] @ 0x28 + 8004312: 68fb ldr r3, [r7, #12] + 8004314: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004316: 3b01 subs r3, #1 + 8004318: b29a uxth r2, r3 + 800431a: 68fb ldr r3, [r7, #12] + 800431c: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 80039ca: 68fb ldr r3, [r7, #12] - 80039cc: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80039ce: b29b uxth r3, r3 - 80039d0: 3b01 subs r3, #1 - 80039d2: b29a uxth r2, r3 - 80039d4: 68fb ldr r3, [r7, #12] - 80039d6: 855a strh r2, [r3, #42] @ 0x2a - 80039d8: e0ee b.n 8003bb8 + 800431e: 68fb ldr r3, [r7, #12] + 8004320: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004322: b29b uxth r3, r3 + 8004324: 3b01 subs r3, #1 + 8004326: b29a uxth r2, r3 + 8004328: 68fb ldr r3, [r7, #12] + 800432a: 855a strh r2, [r3, #42] @ 0x2a + 800432c: e0ee b.n 800450c } /* 3 Last bytes */ else { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) - 80039da: 6a7b ldr r3, [r7, #36] @ 0x24 - 80039dc: 9300 str r3, [sp, #0] - 80039de: 6b3b ldr r3, [r7, #48] @ 0x30 - 80039e0: 2200 movs r2, #0 - 80039e2: 4981 ldr r1, [pc, #516] @ (8003be8 ) - 80039e4: 68f8 ldr r0, [r7, #12] - 80039e6: f000 fa55 bl 8003e94 - 80039ea: 4603 mov r3, r0 - 80039ec: 2b00 cmp r3, #0 - 80039ee: d001 beq.n 80039f4 + 800432e: 6a7b ldr r3, [r7, #36] @ 0x24 + 8004330: 9300 str r3, [sp, #0] + 8004332: 6b3b ldr r3, [r7, #48] @ 0x30 + 8004334: 2200 movs r2, #0 + 8004336: 4981 ldr r1, [pc, #516] @ (800453c ) + 8004338: 68f8 ldr r0, [r7, #12] + 800433a: f000 fa55 bl 80047e8 + 800433e: 4603 mov r3, r0 + 8004340: 2b00 cmp r3, #0 + 8004342: d001 beq.n 8004348 { return HAL_ERROR; - 80039f0: 2301 movs r3, #1 - 80039f2: e0f5 b.n 8003be0 + 8004344: 2301 movs r3, #1 + 8004346: e0f5 b.n 8004534 } /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 80039f4: 68fb ldr r3, [r7, #12] - 80039f6: 681b ldr r3, [r3, #0] - 80039f8: 681a ldr r2, [r3, #0] - 80039fa: 68fb ldr r3, [r7, #12] - 80039fc: 681b ldr r3, [r3, #0] - 80039fe: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 8003a02: 601a str r2, [r3, #0] + 8004348: 68fb ldr r3, [r7, #12] + 800434a: 681b ldr r3, [r3, #0] + 800434c: 681a ldr r2, [r3, #0] + 800434e: 68fb ldr r3, [r7, #12] + 8004350: 681b ldr r3, [r3, #0] + 8004352: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8004356: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 8003a04: b672 cpsid i + 8004358: b672 cpsid i } - 8003a06: bf00 nop + 800435a: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003a08: 68fb ldr r3, [r7, #12] - 8003a0a: 681b ldr r3, [r3, #0] - 8003a0c: 691a ldr r2, [r3, #16] - 8003a0e: 68fb ldr r3, [r7, #12] - 8003a10: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003a12: b2d2 uxtb r2, r2 - 8003a14: 701a strb r2, [r3, #0] + 800435c: 68fb ldr r3, [r7, #12] + 800435e: 681b ldr r3, [r3, #0] + 8004360: 691a ldr r2, [r3, #16] + 8004362: 68fb ldr r3, [r7, #12] + 8004364: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004366: b2d2 uxtb r2, r2 + 8004368: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003a16: 68fb ldr r3, [r7, #12] - 8003a18: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003a1a: 1c5a adds r2, r3, #1 - 8003a1c: 68fb ldr r3, [r7, #12] - 8003a1e: 625a str r2, [r3, #36] @ 0x24 + 800436a: 68fb ldr r3, [r7, #12] + 800436c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800436e: 1c5a adds r2, r3, #1 + 8004370: 68fb ldr r3, [r7, #12] + 8004372: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003a20: 68fb ldr r3, [r7, #12] - 8003a22: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003a24: 3b01 subs r3, #1 - 8003a26: b29a uxth r2, r3 - 8003a28: 68fb ldr r3, [r7, #12] - 8003a2a: 851a strh r2, [r3, #40] @ 0x28 + 8004374: 68fb ldr r3, [r7, #12] + 8004376: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004378: 3b01 subs r3, #1 + 800437a: b29a uxth r2, r3 + 800437c: 68fb ldr r3, [r7, #12] + 800437e: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003a2c: 68fb ldr r3, [r7, #12] - 8003a2e: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003a30: b29b uxth r3, r3 - 8003a32: 3b01 subs r3, #1 - 8003a34: b29a uxth r2, r3 - 8003a36: 68fb ldr r3, [r7, #12] - 8003a38: 855a strh r2, [r3, #42] @ 0x2a + 8004380: 68fb ldr r3, [r7, #12] + 8004382: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004384: b29b uxth r3, r3 + 8004386: 3b01 subs r3, #1 + 8004388: b29a uxth r2, r3 + 800438a: 68fb ldr r3, [r7, #12] + 800438c: 855a strh r2, [r3, #42] @ 0x2a /* Wait until BTF flag is set */ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U); - 8003a3a: 4b6c ldr r3, [pc, #432] @ (8003bec ) - 8003a3c: 681b ldr r3, [r3, #0] - 8003a3e: 08db lsrs r3, r3, #3 - 8003a40: 4a6b ldr r2, [pc, #428] @ (8003bf0 ) - 8003a42: fba2 2303 umull r2, r3, r2, r3 - 8003a46: 0a1a lsrs r2, r3, #8 - 8003a48: 4613 mov r3, r2 - 8003a4a: 009b lsls r3, r3, #2 - 8003a4c: 4413 add r3, r2 - 8003a4e: 00da lsls r2, r3, #3 - 8003a50: 1ad3 subs r3, r2, r3 - 8003a52: 623b str r3, [r7, #32] + 800438e: 4b6c ldr r3, [pc, #432] @ (8004540 ) + 8004390: 681b ldr r3, [r3, #0] + 8004392: 08db lsrs r3, r3, #3 + 8004394: 4a6b ldr r2, [pc, #428] @ (8004544 ) + 8004396: fba2 2303 umull r2, r3, r2, r3 + 800439a: 0a1a lsrs r2, r3, #8 + 800439c: 4613 mov r3, r2 + 800439e: 009b lsls r3, r3, #2 + 80043a0: 4413 add r3, r2 + 80043a2: 00da lsls r2, r3, #3 + 80043a4: 1ad3 subs r3, r2, r3 + 80043a6: 623b str r3, [r7, #32] do { count--; - 8003a54: 6a3b ldr r3, [r7, #32] - 8003a56: 3b01 subs r3, #1 - 8003a58: 623b str r3, [r7, #32] + 80043a8: 6a3b ldr r3, [r7, #32] + 80043aa: 3b01 subs r3, #1 + 80043ac: 623b str r3, [r7, #32] if (count == 0U) - 8003a5a: 6a3b ldr r3, [r7, #32] - 8003a5c: 2b00 cmp r3, #0 - 8003a5e: d118 bne.n 8003a92 + 80043ae: 6a3b ldr r3, [r7, #32] + 80043b0: 2b00 cmp r3, #0 + 80043b2: d118 bne.n 80043e6 { hi2c->PreviousState = I2C_STATE_NONE; - 8003a60: 68fb ldr r3, [r7, #12] - 8003a62: 2200 movs r2, #0 - 8003a64: 631a str r2, [r3, #48] @ 0x30 + 80043b4: 68fb ldr r3, [r7, #12] + 80043b6: 2200 movs r2, #0 + 80043b8: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8003a66: 68fb ldr r3, [r7, #12] - 8003a68: 2220 movs r2, #32 - 8003a6a: f883 203d strb.w r2, [r3, #61] @ 0x3d + 80043ba: 68fb ldr r3, [r7, #12] + 80043bc: 2220 movs r2, #32 + 80043be: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003a6e: 68fb ldr r3, [r7, #12] - 8003a70: 2200 movs r2, #0 - 8003a72: f883 203e strb.w r2, [r3, #62] @ 0x3e + 80043c2: 68fb ldr r3, [r7, #12] + 80043c4: 2200 movs r2, #0 + 80043c6: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8003a76: 68fb ldr r3, [r7, #12] - 8003a78: 6c1b ldr r3, [r3, #64] @ 0x40 - 8003a7a: f043 0220 orr.w r2, r3, #32 - 8003a7e: 68fb ldr r3, [r7, #12] - 8003a80: 641a str r2, [r3, #64] @ 0x40 + 80043ca: 68fb ldr r3, [r7, #12] + 80043cc: 6c1b ldr r3, [r3, #64] @ 0x40 + 80043ce: f043 0220 orr.w r2, r3, #32 + 80043d2: 68fb ldr r3, [r7, #12] + 80043d4: 641a str r2, [r3, #64] @ 0x40 __ASM volatile ("cpsie i" : : : "memory"); - 8003a82: b662 cpsie i + 80043d6: b662 cpsie i } - 8003a84: bf00 nop + 80043d8: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003a86: 68fb ldr r3, [r7, #12] - 8003a88: 2200 movs r2, #0 - 8003a8a: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80043da: 68fb ldr r3, [r7, #12] + 80043dc: 2200 movs r2, #0 + 80043de: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8003a8e: 2301 movs r3, #1 - 8003a90: e0a6 b.n 8003be0 + 80043e2: 2301 movs r3, #1 + 80043e4: e0a6 b.n 8004534 } } while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET); - 8003a92: 68fb ldr r3, [r7, #12] - 8003a94: 681b ldr r3, [r3, #0] - 8003a96: 695b ldr r3, [r3, #20] - 8003a98: f003 0304 and.w r3, r3, #4 - 8003a9c: 2b04 cmp r3, #4 - 8003a9e: d1d9 bne.n 8003a54 + 80043e6: 68fb ldr r3, [r7, #12] + 80043e8: 681b ldr r3, [r3, #0] + 80043ea: 695b ldr r3, [r3, #20] + 80043ec: f003 0304 and.w r3, r3, #4 + 80043f0: 2b04 cmp r3, #4 + 80043f2: d1d9 bne.n 80043a8 /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003aa0: 68fb ldr r3, [r7, #12] - 8003aa2: 681b ldr r3, [r3, #0] - 8003aa4: 681a ldr r2, [r3, #0] - 8003aa6: 68fb ldr r3, [r7, #12] - 8003aa8: 681b ldr r3, [r3, #0] - 8003aaa: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8003aae: 601a str r2, [r3, #0] + 80043f4: 68fb ldr r3, [r7, #12] + 80043f6: 681b ldr r3, [r3, #0] + 80043f8: 681a ldr r2, [r3, #0] + 80043fa: 68fb ldr r3, [r7, #12] + 80043fc: 681b ldr r3, [r3, #0] + 80043fe: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8004402: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003ab0: 68fb ldr r3, [r7, #12] - 8003ab2: 681b ldr r3, [r3, #0] - 8003ab4: 691a ldr r2, [r3, #16] - 8003ab6: 68fb ldr r3, [r7, #12] - 8003ab8: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003aba: b2d2 uxtb r2, r2 - 8003abc: 701a strb r2, [r3, #0] + 8004404: 68fb ldr r3, [r7, #12] + 8004406: 681b ldr r3, [r3, #0] + 8004408: 691a ldr r2, [r3, #16] + 800440a: 68fb ldr r3, [r7, #12] + 800440c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800440e: b2d2 uxtb r2, r2 + 8004410: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003abe: 68fb ldr r3, [r7, #12] - 8003ac0: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003ac2: 1c5a adds r2, r3, #1 - 8003ac4: 68fb ldr r3, [r7, #12] - 8003ac6: 625a str r2, [r3, #36] @ 0x24 + 8004412: 68fb ldr r3, [r7, #12] + 8004414: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004416: 1c5a adds r2, r3, #1 + 8004418: 68fb ldr r3, [r7, #12] + 800441a: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003ac8: 68fb ldr r3, [r7, #12] - 8003aca: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003acc: 3b01 subs r3, #1 - 8003ace: b29a uxth r2, r3 - 8003ad0: 68fb ldr r3, [r7, #12] - 8003ad2: 851a strh r2, [r3, #40] @ 0x28 + 800441c: 68fb ldr r3, [r7, #12] + 800441e: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004420: 3b01 subs r3, #1 + 8004422: b29a uxth r2, r3 + 8004424: 68fb ldr r3, [r7, #12] + 8004426: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003ad4: 68fb ldr r3, [r7, #12] - 8003ad6: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003ad8: b29b uxth r3, r3 - 8003ada: 3b01 subs r3, #1 - 8003adc: b29a uxth r2, r3 - 8003ade: 68fb ldr r3, [r7, #12] - 8003ae0: 855a strh r2, [r3, #42] @ 0x2a + 8004428: 68fb ldr r3, [r7, #12] + 800442a: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800442c: b29b uxth r3, r3 + 800442e: 3b01 subs r3, #1 + 8004430: b29a uxth r2, r3 + 8004432: 68fb ldr r3, [r7, #12] + 8004434: 855a strh r2, [r3, #42] @ 0x2a __ASM volatile ("cpsie i" : : : "memory"); - 8003ae2: b662 cpsie i + 8004436: b662 cpsie i } - 8003ae4: bf00 nop + 8004438: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003ae6: 68fb ldr r3, [r7, #12] - 8003ae8: 681b ldr r3, [r3, #0] - 8003aea: 691a ldr r2, [r3, #16] - 8003aec: 68fb ldr r3, [r7, #12] - 8003aee: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003af0: b2d2 uxtb r2, r2 - 8003af2: 701a strb r2, [r3, #0] + 800443a: 68fb ldr r3, [r7, #12] + 800443c: 681b ldr r3, [r3, #0] + 800443e: 691a ldr r2, [r3, #16] + 8004440: 68fb ldr r3, [r7, #12] + 8004442: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004444: b2d2 uxtb r2, r2 + 8004446: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003af4: 68fb ldr r3, [r7, #12] - 8003af6: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003af8: 1c5a adds r2, r3, #1 - 8003afa: 68fb ldr r3, [r7, #12] - 8003afc: 625a str r2, [r3, #36] @ 0x24 + 8004448: 68fb ldr r3, [r7, #12] + 800444a: 6a5b ldr r3, [r3, #36] @ 0x24 + 800444c: 1c5a adds r2, r3, #1 + 800444e: 68fb ldr r3, [r7, #12] + 8004450: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003afe: 68fb ldr r3, [r7, #12] - 8003b00: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003b02: 3b01 subs r3, #1 - 8003b04: b29a uxth r2, r3 - 8003b06: 68fb ldr r3, [r7, #12] - 8003b08: 851a strh r2, [r3, #40] @ 0x28 + 8004452: 68fb ldr r3, [r7, #12] + 8004454: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004456: 3b01 subs r3, #1 + 8004458: b29a uxth r2, r3 + 800445a: 68fb ldr r3, [r7, #12] + 800445c: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003b0a: 68fb ldr r3, [r7, #12] - 8003b0c: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003b0e: b29b uxth r3, r3 - 8003b10: 3b01 subs r3, #1 - 8003b12: b29a uxth r2, r3 - 8003b14: 68fb ldr r3, [r7, #12] - 8003b16: 855a strh r2, [r3, #42] @ 0x2a - 8003b18: e04e b.n 8003bb8 + 800445e: 68fb ldr r3, [r7, #12] + 8004460: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004462: b29b uxth r3, r3 + 8004464: 3b01 subs r3, #1 + 8004466: b29a uxth r2, r3 + 8004468: 68fb ldr r3, [r7, #12] + 800446a: 855a strh r2, [r3, #42] @ 0x2a + 800446c: e04e b.n 800450c } } else { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8003b1a: 6a7a ldr r2, [r7, #36] @ 0x24 - 8003b1c: 6b39 ldr r1, [r7, #48] @ 0x30 - 8003b1e: 68f8 ldr r0, [r7, #12] - 8003b20: f000 fb62 bl 80041e8 - 8003b24: 4603 mov r3, r0 - 8003b26: 2b00 cmp r3, #0 - 8003b28: d001 beq.n 8003b2e + 800446e: 6a7a ldr r2, [r7, #36] @ 0x24 + 8004470: 6b39 ldr r1, [r7, #48] @ 0x30 + 8004472: 68f8 ldr r0, [r7, #12] + 8004474: f000 fb62 bl 8004b3c + 8004478: 4603 mov r3, r0 + 800447a: 2b00 cmp r3, #0 + 800447c: d001 beq.n 8004482 { return HAL_ERROR; - 8003b2a: 2301 movs r3, #1 - 8003b2c: e058 b.n 8003be0 + 800447e: 2301 movs r3, #1 + 8004480: e058 b.n 8004534 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003b2e: 68fb ldr r3, [r7, #12] - 8003b30: 681b ldr r3, [r3, #0] - 8003b32: 691a ldr r2, [r3, #16] - 8003b34: 68fb ldr r3, [r7, #12] - 8003b36: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003b38: b2d2 uxtb r2, r2 - 8003b3a: 701a strb r2, [r3, #0] + 8004482: 68fb ldr r3, [r7, #12] + 8004484: 681b ldr r3, [r3, #0] + 8004486: 691a ldr r2, [r3, #16] + 8004488: 68fb ldr r3, [r7, #12] + 800448a: 6a5b ldr r3, [r3, #36] @ 0x24 + 800448c: b2d2 uxtb r2, r2 + 800448e: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003b3c: 68fb ldr r3, [r7, #12] - 8003b3e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003b40: 1c5a adds r2, r3, #1 - 8003b42: 68fb ldr r3, [r7, #12] - 8003b44: 625a str r2, [r3, #36] @ 0x24 + 8004490: 68fb ldr r3, [r7, #12] + 8004492: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004494: 1c5a adds r2, r3, #1 + 8004496: 68fb ldr r3, [r7, #12] + 8004498: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003b46: 68fb ldr r3, [r7, #12] - 8003b48: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003b4a: 3b01 subs r3, #1 - 8003b4c: b29a uxth r2, r3 - 8003b4e: 68fb ldr r3, [r7, #12] - 8003b50: 851a strh r2, [r3, #40] @ 0x28 + 800449a: 68fb ldr r3, [r7, #12] + 800449c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800449e: 3b01 subs r3, #1 + 80044a0: b29a uxth r2, r3 + 80044a2: 68fb ldr r3, [r7, #12] + 80044a4: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003b52: 68fb ldr r3, [r7, #12] - 8003b54: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003b56: b29b uxth r3, r3 - 8003b58: 3b01 subs r3, #1 - 8003b5a: b29a uxth r2, r3 - 8003b5c: 68fb ldr r3, [r7, #12] - 8003b5e: 855a strh r2, [r3, #42] @ 0x2a + 80044a6: 68fb ldr r3, [r7, #12] + 80044a8: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80044aa: b29b uxth r3, r3 + 80044ac: 3b01 subs r3, #1 + 80044ae: b29a uxth r2, r3 + 80044b0: 68fb ldr r3, [r7, #12] + 80044b2: 855a strh r2, [r3, #42] @ 0x2a if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) - 8003b60: 68fb ldr r3, [r7, #12] - 8003b62: 681b ldr r3, [r3, #0] - 8003b64: 695b ldr r3, [r3, #20] - 8003b66: f003 0304 and.w r3, r3, #4 - 8003b6a: 2b04 cmp r3, #4 - 8003b6c: d124 bne.n 8003bb8 + 80044b4: 68fb ldr r3, [r7, #12] + 80044b6: 681b ldr r3, [r3, #0] + 80044b8: 695b ldr r3, [r3, #20] + 80044ba: f003 0304 and.w r3, r3, #4 + 80044be: 2b04 cmp r3, #4 + 80044c0: d124 bne.n 800450c { if (hi2c->XferSize == 3U) - 8003b6e: 68fb ldr r3, [r7, #12] - 8003b70: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003b72: 2b03 cmp r3, #3 - 8003b74: d107 bne.n 8003b86 + 80044c2: 68fb ldr r3, [r7, #12] + 80044c4: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80044c6: 2b03 cmp r3, #3 + 80044c8: d107 bne.n 80044da { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003b76: 68fb ldr r3, [r7, #12] - 8003b78: 681b ldr r3, [r3, #0] - 8003b7a: 681a ldr r2, [r3, #0] - 8003b7c: 68fb ldr r3, [r7, #12] - 8003b7e: 681b ldr r3, [r3, #0] - 8003b80: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 8003b84: 601a str r2, [r3, #0] + 80044ca: 68fb ldr r3, [r7, #12] + 80044cc: 681b ldr r3, [r3, #0] + 80044ce: 681a ldr r2, [r3, #0] + 80044d0: 68fb ldr r3, [r7, #12] + 80044d2: 681b ldr r3, [r3, #0] + 80044d4: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 80044d8: 601a str r2, [r3, #0] } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003b86: 68fb ldr r3, [r7, #12] - 8003b88: 681b ldr r3, [r3, #0] - 8003b8a: 691a ldr r2, [r3, #16] - 8003b8c: 68fb ldr r3, [r7, #12] - 8003b8e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003b90: b2d2 uxtb r2, r2 - 8003b92: 701a strb r2, [r3, #0] + 80044da: 68fb ldr r3, [r7, #12] + 80044dc: 681b ldr r3, [r3, #0] + 80044de: 691a ldr r2, [r3, #16] + 80044e0: 68fb ldr r3, [r7, #12] + 80044e2: 6a5b ldr r3, [r3, #36] @ 0x24 + 80044e4: b2d2 uxtb r2, r2 + 80044e6: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003b94: 68fb ldr r3, [r7, #12] - 8003b96: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003b98: 1c5a adds r2, r3, #1 - 8003b9a: 68fb ldr r3, [r7, #12] - 8003b9c: 625a str r2, [r3, #36] @ 0x24 + 80044e8: 68fb ldr r3, [r7, #12] + 80044ea: 6a5b ldr r3, [r3, #36] @ 0x24 + 80044ec: 1c5a adds r2, r3, #1 + 80044ee: 68fb ldr r3, [r7, #12] + 80044f0: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003b9e: 68fb ldr r3, [r7, #12] - 8003ba0: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003ba2: 3b01 subs r3, #1 - 8003ba4: b29a uxth r2, r3 - 8003ba6: 68fb ldr r3, [r7, #12] - 8003ba8: 851a strh r2, [r3, #40] @ 0x28 + 80044f2: 68fb ldr r3, [r7, #12] + 80044f4: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80044f6: 3b01 subs r3, #1 + 80044f8: b29a uxth r2, r3 + 80044fa: 68fb ldr r3, [r7, #12] + 80044fc: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003baa: 68fb ldr r3, [r7, #12] - 8003bac: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003bae: b29b uxth r3, r3 - 8003bb0: 3b01 subs r3, #1 - 8003bb2: b29a uxth r2, r3 - 8003bb4: 68fb ldr r3, [r7, #12] - 8003bb6: 855a strh r2, [r3, #42] @ 0x2a + 80044fe: 68fb ldr r3, [r7, #12] + 8004500: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004502: b29b uxth r3, r3 + 8004504: 3b01 subs r3, #1 + 8004506: b29a uxth r2, r3 + 8004508: 68fb ldr r3, [r7, #12] + 800450a: 855a strh r2, [r3, #42] @ 0x2a while (hi2c->XferSize > 0U) - 8003bb8: 68fb ldr r3, [r7, #12] - 8003bba: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003bbc: 2b00 cmp r3, #0 - 8003bbe: f47f ae88 bne.w 80038d2 + 800450c: 68fb ldr r3, [r7, #12] + 800450e: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004510: 2b00 cmp r3, #0 + 8004512: f47f ae88 bne.w 8004226 } } } hi2c->State = HAL_I2C_STATE_READY; - 8003bc2: 68fb ldr r3, [r7, #12] - 8003bc4: 2220 movs r2, #32 - 8003bc6: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004516: 68fb ldr r3, [r7, #12] + 8004518: 2220 movs r2, #32 + 800451a: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003bca: 68fb ldr r3, [r7, #12] - 8003bcc: 2200 movs r2, #0 - 8003bce: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800451e: 68fb ldr r3, [r7, #12] + 8004520: 2200 movs r2, #0 + 8004522: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003bd2: 68fb ldr r3, [r7, #12] - 8003bd4: 2200 movs r2, #0 - 8003bd6: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004526: 68fb ldr r3, [r7, #12] + 8004528: 2200 movs r2, #0 + 800452a: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 8003bda: 2300 movs r3, #0 - 8003bdc: e000 b.n 8003be0 + 800452e: 2300 movs r3, #0 + 8004530: e000 b.n 8004534 } else { return HAL_BUSY; - 8003bde: 2302 movs r3, #2 + 8004532: 2302 movs r3, #2 } } - 8003be0: 4618 mov r0, r3 - 8003be2: 3728 adds r7, #40 @ 0x28 - 8003be4: 46bd mov sp, r7 - 8003be6: bd80 pop {r7, pc} - 8003be8: 00010004 .word 0x00010004 - 8003bec: 20000004 .word 0x20000004 - 8003bf0: 14f8b589 .word 0x14f8b589 + 8004534: 4618 mov r0, r3 + 8004536: 3728 adds r7, #40 @ 0x28 + 8004538: 46bd mov sp, r7 + 800453a: bd80 pop {r7, pc} + 800453c: 00010004 .word 0x00010004 + 8004540: 20000004 .word 0x20000004 + 8004544: 14f8b589 .word 0x14f8b589 -08003bf4 : +08004548 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) { - 8003bf4: b580 push {r7, lr} - 8003bf6: b088 sub sp, #32 - 8003bf8: af02 add r7, sp, #8 - 8003bfa: 60f8 str r0, [r7, #12] - 8003bfc: 607a str r2, [r7, #4] - 8003bfe: 603b str r3, [r7, #0] - 8003c00: 460b mov r3, r1 - 8003c02: 817b strh r3, [r7, #10] + 8004548: b580 push {r7, lr} + 800454a: b088 sub sp, #32 + 800454c: af02 add r7, sp, #8 + 800454e: 60f8 str r0, [r7, #12] + 8004550: 607a str r2, [r7, #4] + 8004552: 603b str r3, [r7, #0] + 8004554: 460b mov r3, r1 + 8004556: 817b strh r3, [r7, #10] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; - 8003c04: 68fb ldr r3, [r7, #12] - 8003c06: 6adb ldr r3, [r3, #44] @ 0x2c - 8003c08: 617b str r3, [r7, #20] + 8004558: 68fb ldr r3, [r7, #12] + 800455a: 6adb ldr r3, [r3, #44] @ 0x2c + 800455c: 617b str r3, [r7, #20] /* Generate Start condition if first transfer */ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) - 8003c0a: 697b ldr r3, [r7, #20] - 8003c0c: 2b08 cmp r3, #8 - 8003c0e: d006 beq.n 8003c1e - 8003c10: 697b ldr r3, [r7, #20] - 8003c12: 2b01 cmp r3, #1 - 8003c14: d003 beq.n 8003c1e - 8003c16: 697b ldr r3, [r7, #20] - 8003c18: f513 3f80 cmn.w r3, #65536 @ 0x10000 - 8003c1c: d108 bne.n 8003c30 + 800455e: 697b ldr r3, [r7, #20] + 8004560: 2b08 cmp r3, #8 + 8004562: d006 beq.n 8004572 + 8004564: 697b ldr r3, [r7, #20] + 8004566: 2b01 cmp r3, #1 + 8004568: d003 beq.n 8004572 + 800456a: 697b ldr r3, [r7, #20] + 800456c: f513 3f80 cmn.w r3, #65536 @ 0x10000 + 8004570: d108 bne.n 8004584 { /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003c1e: 68fb ldr r3, [r7, #12] - 8003c20: 681b ldr r3, [r3, #0] - 8003c22: 681a ldr r2, [r3, #0] - 8003c24: 68fb ldr r3, [r7, #12] - 8003c26: 681b ldr r3, [r3, #0] - 8003c28: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003c2c: 601a str r2, [r3, #0] - 8003c2e: e00b b.n 8003c48 + 8004572: 68fb ldr r3, [r7, #12] + 8004574: 681b ldr r3, [r3, #0] + 8004576: 681a ldr r2, [r3, #0] + 8004578: 68fb ldr r3, [r7, #12] + 800457a: 681b ldr r3, [r3, #0] + 800457c: f442 7280 orr.w r2, r2, #256 @ 0x100 + 8004580: 601a str r2, [r3, #0] + 8004582: e00b b.n 800459c } else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) - 8003c30: 68fb ldr r3, [r7, #12] - 8003c32: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003c34: 2b12 cmp r3, #18 - 8003c36: d107 bne.n 8003c48 + 8004584: 68fb ldr r3, [r7, #12] + 8004586: 6b1b ldr r3, [r3, #48] @ 0x30 + 8004588: 2b12 cmp r3, #18 + 800458a: d107 bne.n 800459c { /* Generate ReStart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003c38: 68fb ldr r3, [r7, #12] - 8003c3a: 681b ldr r3, [r3, #0] - 8003c3c: 681a ldr r2, [r3, #0] - 8003c3e: 68fb ldr r3, [r7, #12] - 8003c40: 681b ldr r3, [r3, #0] - 8003c42: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003c46: 601a str r2, [r3, #0] + 800458c: 68fb ldr r3, [r7, #12] + 800458e: 681b ldr r3, [r3, #0] + 8004590: 681a ldr r2, [r3, #0] + 8004592: 68fb ldr r3, [r7, #12] + 8004594: 681b ldr r3, [r3, #0] + 8004596: f442 7280 orr.w r2, r2, #256 @ 0x100 + 800459a: 601a str r2, [r3, #0] { /* Do nothing */ } /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8003c48: 683b ldr r3, [r7, #0] - 8003c4a: 9300 str r3, [sp, #0] - 8003c4c: 687b ldr r3, [r7, #4] - 8003c4e: 2200 movs r2, #0 - 8003c50: f04f 1101 mov.w r1, #65537 @ 0x10001 - 8003c54: 68f8 ldr r0, [r7, #12] - 8003c56: f000 f91d bl 8003e94 - 8003c5a: 4603 mov r3, r0 - 8003c5c: 2b00 cmp r3, #0 - 8003c5e: d00d beq.n 8003c7c + 800459c: 683b ldr r3, [r7, #0] + 800459e: 9300 str r3, [sp, #0] + 80045a0: 687b ldr r3, [r7, #4] + 80045a2: 2200 movs r2, #0 + 80045a4: f04f 1101 mov.w r1, #65537 @ 0x10001 + 80045a8: 68f8 ldr r0, [r7, #12] + 80045aa: f000 f91d bl 80047e8 + 80045ae: 4603 mov r3, r0 + 80045b0: 2b00 cmp r3, #0 + 80045b2: d00d beq.n 80045d0 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 8003c60: 68fb ldr r3, [r7, #12] - 8003c62: 681b ldr r3, [r3, #0] - 8003c64: 681b ldr r3, [r3, #0] - 8003c66: f403 7380 and.w r3, r3, #256 @ 0x100 - 8003c6a: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8003c6e: d103 bne.n 8003c78 + 80045b4: 68fb ldr r3, [r7, #12] + 80045b6: 681b ldr r3, [r3, #0] + 80045b8: 681b ldr r3, [r3, #0] + 80045ba: f403 7380 and.w r3, r3, #256 @ 0x100 + 80045be: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80045c2: d103 bne.n 80045cc { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 8003c70: 68fb ldr r3, [r7, #12] - 8003c72: f44f 7200 mov.w r2, #512 @ 0x200 - 8003c76: 641a str r2, [r3, #64] @ 0x40 + 80045c4: 68fb ldr r3, [r7, #12] + 80045c6: f44f 7200 mov.w r2, #512 @ 0x200 + 80045ca: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 8003c78: 2303 movs r3, #3 - 8003c7a: e035 b.n 8003ce8 + 80045cc: 2303 movs r3, #3 + 80045ce: e035 b.n 800463c } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 8003c7c: 68fb ldr r3, [r7, #12] - 8003c7e: 691b ldr r3, [r3, #16] - 8003c80: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 - 8003c84: d108 bne.n 8003c98 + 80045d0: 68fb ldr r3, [r7, #12] + 80045d2: 691b ldr r3, [r3, #16] + 80045d4: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 + 80045d8: d108 bne.n 80045ec { /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); - 8003c86: 897b ldrh r3, [r7, #10] - 8003c88: b2db uxtb r3, r3 - 8003c8a: 461a mov r2, r3 - 8003c8c: 68fb ldr r3, [r7, #12] - 8003c8e: 681b ldr r3, [r3, #0] - 8003c90: f002 02fe and.w r2, r2, #254 @ 0xfe - 8003c94: 611a str r2, [r3, #16] - 8003c96: e01b b.n 8003cd0 + 80045da: 897b ldrh r3, [r7, #10] + 80045dc: b2db uxtb r3, r3 + 80045de: 461a mov r2, r3 + 80045e0: 68fb ldr r3, [r7, #12] + 80045e2: 681b ldr r3, [r3, #0] + 80045e4: f002 02fe and.w r2, r2, #254 @ 0xfe + 80045e8: 611a str r2, [r3, #16] + 80045ea: e01b b.n 8004624 } else { /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); - 8003c98: 897b ldrh r3, [r7, #10] - 8003c9a: 11db asrs r3, r3, #7 - 8003c9c: b2db uxtb r3, r3 - 8003c9e: f003 0306 and.w r3, r3, #6 - 8003ca2: b2db uxtb r3, r3 - 8003ca4: f063 030f orn r3, r3, #15 - 8003ca8: b2da uxtb r2, r3 - 8003caa: 68fb ldr r3, [r7, #12] - 8003cac: 681b ldr r3, [r3, #0] - 8003cae: 611a str r2, [r3, #16] + 80045ec: 897b ldrh r3, [r7, #10] + 80045ee: 11db asrs r3, r3, #7 + 80045f0: b2db uxtb r3, r3 + 80045f2: f003 0306 and.w r3, r3, #6 + 80045f6: b2db uxtb r3, r3 + 80045f8: f063 030f orn r3, r3, #15 + 80045fc: b2da uxtb r2, r3 + 80045fe: 68fb ldr r3, [r7, #12] + 8004600: 681b ldr r3, [r3, #0] + 8004602: 611a str r2, [r3, #16] /* Wait until ADD10 flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) - 8003cb0: 683b ldr r3, [r7, #0] - 8003cb2: 687a ldr r2, [r7, #4] - 8003cb4: 490e ldr r1, [pc, #56] @ (8003cf0 ) - 8003cb6: 68f8 ldr r0, [r7, #12] - 8003cb8: f000 f966 bl 8003f88 - 8003cbc: 4603 mov r3, r0 - 8003cbe: 2b00 cmp r3, #0 - 8003cc0: d001 beq.n 8003cc6 + 8004604: 683b ldr r3, [r7, #0] + 8004606: 687a ldr r2, [r7, #4] + 8004608: 490e ldr r1, [pc, #56] @ (8004644 ) + 800460a: 68f8 ldr r0, [r7, #12] + 800460c: f000 f966 bl 80048dc + 8004610: 4603 mov r3, r0 + 8004612: 2b00 cmp r3, #0 + 8004614: d001 beq.n 800461a { return HAL_ERROR; - 8003cc2: 2301 movs r3, #1 - 8003cc4: e010 b.n 8003ce8 + 8004616: 2301 movs r3, #1 + 8004618: e010 b.n 800463c } /* Send slave address */ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); - 8003cc6: 897b ldrh r3, [r7, #10] - 8003cc8: b2da uxtb r2, r3 - 8003cca: 68fb ldr r3, [r7, #12] - 8003ccc: 681b ldr r3, [r3, #0] - 8003cce: 611a str r2, [r3, #16] + 800461a: 897b ldrh r3, [r7, #10] + 800461c: b2da uxtb r2, r3 + 800461e: 68fb ldr r3, [r7, #12] + 8004620: 681b ldr r3, [r3, #0] + 8004622: 611a str r2, [r3, #16] } /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 8003cd0: 683b ldr r3, [r7, #0] - 8003cd2: 687a ldr r2, [r7, #4] - 8003cd4: 4907 ldr r1, [pc, #28] @ (8003cf4 ) - 8003cd6: 68f8 ldr r0, [r7, #12] - 8003cd8: f000 f956 bl 8003f88 - 8003cdc: 4603 mov r3, r0 - 8003cde: 2b00 cmp r3, #0 - 8003ce0: d001 beq.n 8003ce6 + 8004624: 683b ldr r3, [r7, #0] + 8004626: 687a ldr r2, [r7, #4] + 8004628: 4907 ldr r1, [pc, #28] @ (8004648 ) + 800462a: 68f8 ldr r0, [r7, #12] + 800462c: f000 f956 bl 80048dc + 8004630: 4603 mov r3, r0 + 8004632: 2b00 cmp r3, #0 + 8004634: d001 beq.n 800463a { return HAL_ERROR; - 8003ce2: 2301 movs r3, #1 - 8003ce4: e000 b.n 8003ce8 + 8004636: 2301 movs r3, #1 + 8004638: e000 b.n 800463c } return HAL_OK; - 8003ce6: 2300 movs r3, #0 + 800463a: 2300 movs r3, #0 } - 8003ce8: 4618 mov r0, r3 - 8003cea: 3718 adds r7, #24 - 8003cec: 46bd mov sp, r7 - 8003cee: bd80 pop {r7, pc} - 8003cf0: 00010008 .word 0x00010008 - 8003cf4: 00010002 .word 0x00010002 + 800463c: 4618 mov r0, r3 + 800463e: 3718 adds r7, #24 + 8004640: 46bd mov sp, r7 + 8004642: bd80 pop {r7, pc} + 8004644: 00010008 .word 0x00010008 + 8004648: 00010002 .word 0x00010002 -08003cf8 : +0800464c : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) { - 8003cf8: b580 push {r7, lr} - 8003cfa: b088 sub sp, #32 - 8003cfc: af02 add r7, sp, #8 - 8003cfe: 60f8 str r0, [r7, #12] - 8003d00: 607a str r2, [r7, #4] - 8003d02: 603b str r3, [r7, #0] - 8003d04: 460b mov r3, r1 - 8003d06: 817b strh r3, [r7, #10] + 800464c: b580 push {r7, lr} + 800464e: b088 sub sp, #32 + 8004650: af02 add r7, sp, #8 + 8004652: 60f8 str r0, [r7, #12] + 8004654: 607a str r2, [r7, #4] + 8004656: 603b str r3, [r7, #0] + 8004658: 460b mov r3, r1 + 800465a: 817b strh r3, [r7, #10] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; - 8003d08: 68fb ldr r3, [r7, #12] - 8003d0a: 6adb ldr r3, [r3, #44] @ 0x2c - 8003d0c: 617b str r3, [r7, #20] + 800465c: 68fb ldr r3, [r7, #12] + 800465e: 6adb ldr r3, [r3, #44] @ 0x2c + 8004660: 617b str r3, [r7, #20] /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003d0e: 68fb ldr r3, [r7, #12] - 8003d10: 681b ldr r3, [r3, #0] - 8003d12: 681a ldr r2, [r3, #0] - 8003d14: 68fb ldr r3, [r7, #12] - 8003d16: 681b ldr r3, [r3, #0] - 8003d18: f442 6280 orr.w r2, r2, #1024 @ 0x400 - 8003d1c: 601a str r2, [r3, #0] + 8004662: 68fb ldr r3, [r7, #12] + 8004664: 681b ldr r3, [r3, #0] + 8004666: 681a ldr r2, [r3, #0] + 8004668: 68fb ldr r3, [r7, #12] + 800466a: 681b ldr r3, [r3, #0] + 800466c: f442 6280 orr.w r2, r2, #1024 @ 0x400 + 8004670: 601a str r2, [r3, #0] /* Generate Start condition if first transfer */ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) - 8003d1e: 697b ldr r3, [r7, #20] - 8003d20: 2b08 cmp r3, #8 - 8003d22: d006 beq.n 8003d32 - 8003d24: 697b ldr r3, [r7, #20] - 8003d26: 2b01 cmp r3, #1 - 8003d28: d003 beq.n 8003d32 - 8003d2a: 697b ldr r3, [r7, #20] - 8003d2c: f513 3f80 cmn.w r3, #65536 @ 0x10000 - 8003d30: d108 bne.n 8003d44 + 8004672: 697b ldr r3, [r7, #20] + 8004674: 2b08 cmp r3, #8 + 8004676: d006 beq.n 8004686 + 8004678: 697b ldr r3, [r7, #20] + 800467a: 2b01 cmp r3, #1 + 800467c: d003 beq.n 8004686 + 800467e: 697b ldr r3, [r7, #20] + 8004680: f513 3f80 cmn.w r3, #65536 @ 0x10000 + 8004684: d108 bne.n 8004698 { /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003d32: 68fb ldr r3, [r7, #12] - 8003d34: 681b ldr r3, [r3, #0] - 8003d36: 681a ldr r2, [r3, #0] - 8003d38: 68fb ldr r3, [r7, #12] - 8003d3a: 681b ldr r3, [r3, #0] - 8003d3c: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003d40: 601a str r2, [r3, #0] - 8003d42: e00b b.n 8003d5c + 8004686: 68fb ldr r3, [r7, #12] + 8004688: 681b ldr r3, [r3, #0] + 800468a: 681a ldr r2, [r3, #0] + 800468c: 68fb ldr r3, [r7, #12] + 800468e: 681b ldr r3, [r3, #0] + 8004690: f442 7280 orr.w r2, r2, #256 @ 0x100 + 8004694: 601a str r2, [r3, #0] + 8004696: e00b b.n 80046b0 } else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) - 8003d44: 68fb ldr r3, [r7, #12] - 8003d46: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003d48: 2b11 cmp r3, #17 - 8003d4a: d107 bne.n 8003d5c + 8004698: 68fb ldr r3, [r7, #12] + 800469a: 6b1b ldr r3, [r3, #48] @ 0x30 + 800469c: 2b11 cmp r3, #17 + 800469e: d107 bne.n 80046b0 { /* Generate ReStart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003d4c: 68fb ldr r3, [r7, #12] - 8003d4e: 681b ldr r3, [r3, #0] - 8003d50: 681a ldr r2, [r3, #0] - 8003d52: 68fb ldr r3, [r7, #12] - 8003d54: 681b ldr r3, [r3, #0] - 8003d56: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003d5a: 601a str r2, [r3, #0] + 80046a0: 68fb ldr r3, [r7, #12] + 80046a2: 681b ldr r3, [r3, #0] + 80046a4: 681a ldr r2, [r3, #0] + 80046a6: 68fb ldr r3, [r7, #12] + 80046a8: 681b ldr r3, [r3, #0] + 80046aa: f442 7280 orr.w r2, r2, #256 @ 0x100 + 80046ae: 601a str r2, [r3, #0] { /* Do nothing */ } /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8003d5c: 683b ldr r3, [r7, #0] - 8003d5e: 9300 str r3, [sp, #0] - 8003d60: 687b ldr r3, [r7, #4] - 8003d62: 2200 movs r2, #0 - 8003d64: f04f 1101 mov.w r1, #65537 @ 0x10001 - 8003d68: 68f8 ldr r0, [r7, #12] - 8003d6a: f000 f893 bl 8003e94 - 8003d6e: 4603 mov r3, r0 - 8003d70: 2b00 cmp r3, #0 - 8003d72: d00d beq.n 8003d90 + 80046b0: 683b ldr r3, [r7, #0] + 80046b2: 9300 str r3, [sp, #0] + 80046b4: 687b ldr r3, [r7, #4] + 80046b6: 2200 movs r2, #0 + 80046b8: f04f 1101 mov.w r1, #65537 @ 0x10001 + 80046bc: 68f8 ldr r0, [r7, #12] + 80046be: f000 f893 bl 80047e8 + 80046c2: 4603 mov r3, r0 + 80046c4: 2b00 cmp r3, #0 + 80046c6: d00d beq.n 80046e4 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 8003d74: 68fb ldr r3, [r7, #12] - 8003d76: 681b ldr r3, [r3, #0] - 8003d78: 681b ldr r3, [r3, #0] - 8003d7a: f403 7380 and.w r3, r3, #256 @ 0x100 - 8003d7e: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8003d82: d103 bne.n 8003d8c + 80046c8: 68fb ldr r3, [r7, #12] + 80046ca: 681b ldr r3, [r3, #0] + 80046cc: 681b ldr r3, [r3, #0] + 80046ce: f403 7380 and.w r3, r3, #256 @ 0x100 + 80046d2: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80046d6: d103 bne.n 80046e0 { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 8003d84: 68fb ldr r3, [r7, #12] - 8003d86: f44f 7200 mov.w r2, #512 @ 0x200 - 8003d8a: 641a str r2, [r3, #64] @ 0x40 + 80046d8: 68fb ldr r3, [r7, #12] + 80046da: f44f 7200 mov.w r2, #512 @ 0x200 + 80046de: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 8003d8c: 2303 movs r3, #3 - 8003d8e: e079 b.n 8003e84 + 80046e0: 2303 movs r3, #3 + 80046e2: e079 b.n 80047d8 } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 8003d90: 68fb ldr r3, [r7, #12] - 8003d92: 691b ldr r3, [r3, #16] - 8003d94: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 - 8003d98: d108 bne.n 8003dac + 80046e4: 68fb ldr r3, [r7, #12] + 80046e6: 691b ldr r3, [r3, #16] + 80046e8: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 + 80046ec: d108 bne.n 8004700 { /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); - 8003d9a: 897b ldrh r3, [r7, #10] - 8003d9c: b2db uxtb r3, r3 - 8003d9e: f043 0301 orr.w r3, r3, #1 - 8003da2: b2da uxtb r2, r3 - 8003da4: 68fb ldr r3, [r7, #12] - 8003da6: 681b ldr r3, [r3, #0] - 8003da8: 611a str r2, [r3, #16] - 8003daa: e05f b.n 8003e6c + 80046ee: 897b ldrh r3, [r7, #10] + 80046f0: b2db uxtb r3, r3 + 80046f2: f043 0301 orr.w r3, r3, #1 + 80046f6: b2da uxtb r2, r3 + 80046f8: 68fb ldr r3, [r7, #12] + 80046fa: 681b ldr r3, [r3, #0] + 80046fc: 611a str r2, [r3, #16] + 80046fe: e05f b.n 80047c0 } else { /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); - 8003dac: 897b ldrh r3, [r7, #10] - 8003dae: 11db asrs r3, r3, #7 - 8003db0: b2db uxtb r3, r3 - 8003db2: f003 0306 and.w r3, r3, #6 - 8003db6: b2db uxtb r3, r3 - 8003db8: f063 030f orn r3, r3, #15 - 8003dbc: b2da uxtb r2, r3 - 8003dbe: 68fb ldr r3, [r7, #12] - 8003dc0: 681b ldr r3, [r3, #0] - 8003dc2: 611a str r2, [r3, #16] + 8004700: 897b ldrh r3, [r7, #10] + 8004702: 11db asrs r3, r3, #7 + 8004704: b2db uxtb r3, r3 + 8004706: f003 0306 and.w r3, r3, #6 + 800470a: b2db uxtb r3, r3 + 800470c: f063 030f orn r3, r3, #15 + 8004710: b2da uxtb r2, r3 + 8004712: 68fb ldr r3, [r7, #12] + 8004714: 681b ldr r3, [r3, #0] + 8004716: 611a str r2, [r3, #16] /* Wait until ADD10 flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) - 8003dc4: 683b ldr r3, [r7, #0] - 8003dc6: 687a ldr r2, [r7, #4] - 8003dc8: 4930 ldr r1, [pc, #192] @ (8003e8c ) - 8003dca: 68f8 ldr r0, [r7, #12] - 8003dcc: f000 f8dc bl 8003f88 - 8003dd0: 4603 mov r3, r0 - 8003dd2: 2b00 cmp r3, #0 - 8003dd4: d001 beq.n 8003dda + 8004718: 683b ldr r3, [r7, #0] + 800471a: 687a ldr r2, [r7, #4] + 800471c: 4930 ldr r1, [pc, #192] @ (80047e0 ) + 800471e: 68f8 ldr r0, [r7, #12] + 8004720: f000 f8dc bl 80048dc + 8004724: 4603 mov r3, r0 + 8004726: 2b00 cmp r3, #0 + 8004728: d001 beq.n 800472e { return HAL_ERROR; - 8003dd6: 2301 movs r3, #1 - 8003dd8: e054 b.n 8003e84 + 800472a: 2301 movs r3, #1 + 800472c: e054 b.n 80047d8 } /* Send slave address */ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); - 8003dda: 897b ldrh r3, [r7, #10] - 8003ddc: b2da uxtb r2, r3 - 8003dde: 68fb ldr r3, [r7, #12] - 8003de0: 681b ldr r3, [r3, #0] - 8003de2: 611a str r2, [r3, #16] + 800472e: 897b ldrh r3, [r7, #10] + 8004730: b2da uxtb r2, r3 + 8004732: 68fb ldr r3, [r7, #12] + 8004734: 681b ldr r3, [r3, #0] + 8004736: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 8003de4: 683b ldr r3, [r7, #0] - 8003de6: 687a ldr r2, [r7, #4] - 8003de8: 4929 ldr r1, [pc, #164] @ (8003e90 ) - 8003dea: 68f8 ldr r0, [r7, #12] - 8003dec: f000 f8cc bl 8003f88 - 8003df0: 4603 mov r3, r0 - 8003df2: 2b00 cmp r3, #0 - 8003df4: d001 beq.n 8003dfa + 8004738: 683b ldr r3, [r7, #0] + 800473a: 687a ldr r2, [r7, #4] + 800473c: 4929 ldr r1, [pc, #164] @ (80047e4 ) + 800473e: 68f8 ldr r0, [r7, #12] + 8004740: f000 f8cc bl 80048dc + 8004744: 4603 mov r3, r0 + 8004746: 2b00 cmp r3, #0 + 8004748: d001 beq.n 800474e { return HAL_ERROR; - 8003df6: 2301 movs r3, #1 - 8003df8: e044 b.n 8003e84 + 800474a: 2301 movs r3, #1 + 800474c: e044 b.n 80047d8 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8003dfa: 2300 movs r3, #0 - 8003dfc: 613b str r3, [r7, #16] - 8003dfe: 68fb ldr r3, [r7, #12] - 8003e00: 681b ldr r3, [r3, #0] - 8003e02: 695b ldr r3, [r3, #20] - 8003e04: 613b str r3, [r7, #16] - 8003e06: 68fb ldr r3, [r7, #12] - 8003e08: 681b ldr r3, [r3, #0] - 8003e0a: 699b ldr r3, [r3, #24] - 8003e0c: 613b str r3, [r7, #16] - 8003e0e: 693b ldr r3, [r7, #16] + 800474e: 2300 movs r3, #0 + 8004750: 613b str r3, [r7, #16] + 8004752: 68fb ldr r3, [r7, #12] + 8004754: 681b ldr r3, [r3, #0] + 8004756: 695b ldr r3, [r3, #20] + 8004758: 613b str r3, [r7, #16] + 800475a: 68fb ldr r3, [r7, #12] + 800475c: 681b ldr r3, [r3, #0] + 800475e: 699b ldr r3, [r3, #24] + 8004760: 613b str r3, [r7, #16] + 8004762: 693b ldr r3, [r7, #16] /* Generate Restart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003e10: 68fb ldr r3, [r7, #12] - 8003e12: 681b ldr r3, [r3, #0] - 8003e14: 681a ldr r2, [r3, #0] - 8003e16: 68fb ldr r3, [r7, #12] - 8003e18: 681b ldr r3, [r3, #0] - 8003e1a: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003e1e: 601a str r2, [r3, #0] + 8004764: 68fb ldr r3, [r7, #12] + 8004766: 681b ldr r3, [r3, #0] + 8004768: 681a ldr r2, [r3, #0] + 800476a: 68fb ldr r3, [r7, #12] + 800476c: 681b ldr r3, [r3, #0] + 800476e: f442 7280 orr.w r2, r2, #256 @ 0x100 + 8004772: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8003e20: 683b ldr r3, [r7, #0] - 8003e22: 9300 str r3, [sp, #0] - 8003e24: 687b ldr r3, [r7, #4] - 8003e26: 2200 movs r2, #0 - 8003e28: f04f 1101 mov.w r1, #65537 @ 0x10001 - 8003e2c: 68f8 ldr r0, [r7, #12] - 8003e2e: f000 f831 bl 8003e94 - 8003e32: 4603 mov r3, r0 - 8003e34: 2b00 cmp r3, #0 - 8003e36: d00d beq.n 8003e54 + 8004774: 683b ldr r3, [r7, #0] + 8004776: 9300 str r3, [sp, #0] + 8004778: 687b ldr r3, [r7, #4] + 800477a: 2200 movs r2, #0 + 800477c: f04f 1101 mov.w r1, #65537 @ 0x10001 + 8004780: 68f8 ldr r0, [r7, #12] + 8004782: f000 f831 bl 80047e8 + 8004786: 4603 mov r3, r0 + 8004788: 2b00 cmp r3, #0 + 800478a: d00d beq.n 80047a8 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 8003e38: 68fb ldr r3, [r7, #12] - 8003e3a: 681b ldr r3, [r3, #0] - 8003e3c: 681b ldr r3, [r3, #0] - 8003e3e: f403 7380 and.w r3, r3, #256 @ 0x100 - 8003e42: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8003e46: d103 bne.n 8003e50 + 800478c: 68fb ldr r3, [r7, #12] + 800478e: 681b ldr r3, [r3, #0] + 8004790: 681b ldr r3, [r3, #0] + 8004792: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004796: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 800479a: d103 bne.n 80047a4 { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 8003e48: 68fb ldr r3, [r7, #12] - 8003e4a: f44f 7200 mov.w r2, #512 @ 0x200 - 8003e4e: 641a str r2, [r3, #64] @ 0x40 + 800479c: 68fb ldr r3, [r7, #12] + 800479e: f44f 7200 mov.w r2, #512 @ 0x200 + 80047a2: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 8003e50: 2303 movs r3, #3 - 8003e52: e017 b.n 8003e84 + 80047a4: 2303 movs r3, #3 + 80047a6: e017 b.n 80047d8 } /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress); - 8003e54: 897b ldrh r3, [r7, #10] - 8003e56: 11db asrs r3, r3, #7 - 8003e58: b2db uxtb r3, r3 - 8003e5a: f003 0306 and.w r3, r3, #6 - 8003e5e: b2db uxtb r3, r3 - 8003e60: f063 030e orn r3, r3, #14 - 8003e64: b2da uxtb r2, r3 - 8003e66: 68fb ldr r3, [r7, #12] - 8003e68: 681b ldr r3, [r3, #0] - 8003e6a: 611a str r2, [r3, #16] + 80047a8: 897b ldrh r3, [r7, #10] + 80047aa: 11db asrs r3, r3, #7 + 80047ac: b2db uxtb r3, r3 + 80047ae: f003 0306 and.w r3, r3, #6 + 80047b2: b2db uxtb r3, r3 + 80047b4: f063 030e orn r3, r3, #14 + 80047b8: b2da uxtb r2, r3 + 80047ba: 68fb ldr r3, [r7, #12] + 80047bc: 681b ldr r3, [r3, #0] + 80047be: 611a str r2, [r3, #16] } /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 8003e6c: 683b ldr r3, [r7, #0] - 8003e6e: 687a ldr r2, [r7, #4] - 8003e70: 4907 ldr r1, [pc, #28] @ (8003e90 ) - 8003e72: 68f8 ldr r0, [r7, #12] - 8003e74: f000 f888 bl 8003f88 - 8003e78: 4603 mov r3, r0 - 8003e7a: 2b00 cmp r3, #0 - 8003e7c: d001 beq.n 8003e82 + 80047c0: 683b ldr r3, [r7, #0] + 80047c2: 687a ldr r2, [r7, #4] + 80047c4: 4907 ldr r1, [pc, #28] @ (80047e4 ) + 80047c6: 68f8 ldr r0, [r7, #12] + 80047c8: f000 f888 bl 80048dc + 80047cc: 4603 mov r3, r0 + 80047ce: 2b00 cmp r3, #0 + 80047d0: d001 beq.n 80047d6 { return HAL_ERROR; - 8003e7e: 2301 movs r3, #1 - 8003e80: e000 b.n 8003e84 + 80047d2: 2301 movs r3, #1 + 80047d4: e000 b.n 80047d8 } return HAL_OK; - 8003e82: 2300 movs r3, #0 + 80047d6: 2300 movs r3, #0 } - 8003e84: 4618 mov r0, r3 - 8003e86: 3718 adds r7, #24 - 8003e88: 46bd mov sp, r7 - 8003e8a: bd80 pop {r7, pc} - 8003e8c: 00010008 .word 0x00010008 - 8003e90: 00010002 .word 0x00010002 + 80047d8: 4618 mov r0, r3 + 80047da: 3718 adds r7, #24 + 80047dc: 46bd mov sp, r7 + 80047de: bd80 pop {r7, pc} + 80047e0: 00010008 .word 0x00010008 + 80047e4: 00010002 .word 0x00010002 -08003e94 : +080047e8 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { - 8003e94: b580 push {r7, lr} - 8003e96: b084 sub sp, #16 - 8003e98: af00 add r7, sp, #0 - 8003e9a: 60f8 str r0, [r7, #12] - 8003e9c: 60b9 str r1, [r7, #8] - 8003e9e: 603b str r3, [r7, #0] - 8003ea0: 4613 mov r3, r2 - 8003ea2: 71fb strb r3, [r7, #7] + 80047e8: b580 push {r7, lr} + 80047ea: b084 sub sp, #16 + 80047ec: af00 add r7, sp, #0 + 80047ee: 60f8 str r0, [r7, #12] + 80047f0: 60b9 str r1, [r7, #8] + 80047f2: 603b str r3, [r7, #0] + 80047f4: 4613 mov r3, r2 + 80047f6: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - 8003ea4: e048 b.n 8003f38 + 80047f8: e048 b.n 800488c { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8003ea6: 683b ldr r3, [r7, #0] - 8003ea8: f1b3 3fff cmp.w r3, #4294967295 - 8003eac: d044 beq.n 8003f38 + 80047fa: 683b ldr r3, [r7, #0] + 80047fc: f1b3 3fff cmp.w r3, #4294967295 + 8004800: d044 beq.n 800488c { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8003eae: f7fe fc4b bl 8002748 - 8003eb2: 4602 mov r2, r0 - 8003eb4: 69bb ldr r3, [r7, #24] - 8003eb6: 1ad3 subs r3, r2, r3 - 8003eb8: 683a ldr r2, [r7, #0] - 8003eba: 429a cmp r2, r3 - 8003ebc: d302 bcc.n 8003ec4 - 8003ebe: 683b ldr r3, [r7, #0] - 8003ec0: 2b00 cmp r3, #0 - 8003ec2: d139 bne.n 8003f38 + 8004802: f7fe fc27 bl 8003054 + 8004806: 4602 mov r2, r0 + 8004808: 69bb ldr r3, [r7, #24] + 800480a: 1ad3 subs r3, r2, r3 + 800480c: 683a ldr r2, [r7, #0] + 800480e: 429a cmp r2, r3 + 8004810: d302 bcc.n 8004818 + 8004812: 683b ldr r3, [r7, #0] + 8004814: 2b00 cmp r3, #0 + 8004816: d139 bne.n 800488c { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) - 8003ec4: 68bb ldr r3, [r7, #8] - 8003ec6: 0c1b lsrs r3, r3, #16 - 8003ec8: b2db uxtb r3, r3 - 8003eca: 2b01 cmp r3, #1 - 8003ecc: d10d bne.n 8003eea - 8003ece: 68fb ldr r3, [r7, #12] - 8003ed0: 681b ldr r3, [r3, #0] - 8003ed2: 695b ldr r3, [r3, #20] - 8003ed4: 43da mvns r2, r3 - 8003ed6: 68bb ldr r3, [r7, #8] - 8003ed8: 4013 ands r3, r2 - 8003eda: b29b uxth r3, r3 - 8003edc: 2b00 cmp r3, #0 - 8003ede: bf0c ite eq - 8003ee0: 2301 moveq r3, #1 - 8003ee2: 2300 movne r3, #0 - 8003ee4: b2db uxtb r3, r3 - 8003ee6: 461a mov r2, r3 - 8003ee8: e00c b.n 8003f04 - 8003eea: 68fb ldr r3, [r7, #12] - 8003eec: 681b ldr r3, [r3, #0] - 8003eee: 699b ldr r3, [r3, #24] - 8003ef0: 43da mvns r2, r3 - 8003ef2: 68bb ldr r3, [r7, #8] - 8003ef4: 4013 ands r3, r2 - 8003ef6: b29b uxth r3, r3 - 8003ef8: 2b00 cmp r3, #0 - 8003efa: bf0c ite eq - 8003efc: 2301 moveq r3, #1 - 8003efe: 2300 movne r3, #0 - 8003f00: b2db uxtb r3, r3 - 8003f02: 461a mov r2, r3 - 8003f04: 79fb ldrb r3, [r7, #7] - 8003f06: 429a cmp r2, r3 - 8003f08: d116 bne.n 8003f38 + 8004818: 68bb ldr r3, [r7, #8] + 800481a: 0c1b lsrs r3, r3, #16 + 800481c: b2db uxtb r3, r3 + 800481e: 2b01 cmp r3, #1 + 8004820: d10d bne.n 800483e + 8004822: 68fb ldr r3, [r7, #12] + 8004824: 681b ldr r3, [r3, #0] + 8004826: 695b ldr r3, [r3, #20] + 8004828: 43da mvns r2, r3 + 800482a: 68bb ldr r3, [r7, #8] + 800482c: 4013 ands r3, r2 + 800482e: b29b uxth r3, r3 + 8004830: 2b00 cmp r3, #0 + 8004832: bf0c ite eq + 8004834: 2301 moveq r3, #1 + 8004836: 2300 movne r3, #0 + 8004838: b2db uxtb r3, r3 + 800483a: 461a mov r2, r3 + 800483c: e00c b.n 8004858 + 800483e: 68fb ldr r3, [r7, #12] + 8004840: 681b ldr r3, [r3, #0] + 8004842: 699b ldr r3, [r3, #24] + 8004844: 43da mvns r2, r3 + 8004846: 68bb ldr r3, [r7, #8] + 8004848: 4013 ands r3, r2 + 800484a: b29b uxth r3, r3 + 800484c: 2b00 cmp r3, #0 + 800484e: bf0c ite eq + 8004850: 2301 moveq r3, #1 + 8004852: 2300 movne r3, #0 + 8004854: b2db uxtb r3, r3 + 8004856: 461a mov r2, r3 + 8004858: 79fb ldrb r3, [r7, #7] + 800485a: 429a cmp r2, r3 + 800485c: d116 bne.n 800488c { hi2c->PreviousState = I2C_STATE_NONE; - 8003f0a: 68fb ldr r3, [r7, #12] - 8003f0c: 2200 movs r2, #0 - 8003f0e: 631a str r2, [r3, #48] @ 0x30 + 800485e: 68fb ldr r3, [r7, #12] + 8004860: 2200 movs r2, #0 + 8004862: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8003f10: 68fb ldr r3, [r7, #12] - 8003f12: 2220 movs r2, #32 - 8003f14: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004864: 68fb ldr r3, [r7, #12] + 8004866: 2220 movs r2, #32 + 8004868: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003f18: 68fb ldr r3, [r7, #12] - 8003f1a: 2200 movs r2, #0 - 8003f1c: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800486c: 68fb ldr r3, [r7, #12] + 800486e: 2200 movs r2, #0 + 8004870: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8003f20: 68fb ldr r3, [r7, #12] - 8003f22: 6c1b ldr r3, [r3, #64] @ 0x40 - 8003f24: f043 0220 orr.w r2, r3, #32 - 8003f28: 68fb ldr r3, [r7, #12] - 8003f2a: 641a str r2, [r3, #64] @ 0x40 + 8004874: 68fb ldr r3, [r7, #12] + 8004876: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004878: f043 0220 orr.w r2, r3, #32 + 800487c: 68fb ldr r3, [r7, #12] + 800487e: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003f2c: 68fb ldr r3, [r7, #12] - 8003f2e: 2200 movs r2, #0 - 8003f30: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004880: 68fb ldr r3, [r7, #12] + 8004882: 2200 movs r2, #0 + 8004884: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8003f34: 2301 movs r3, #1 - 8003f36: e023 b.n 8003f80 + 8004888: 2301 movs r3, #1 + 800488a: e023 b.n 80048d4 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - 8003f38: 68bb ldr r3, [r7, #8] - 8003f3a: 0c1b lsrs r3, r3, #16 - 8003f3c: b2db uxtb r3, r3 - 8003f3e: 2b01 cmp r3, #1 - 8003f40: d10d bne.n 8003f5e - 8003f42: 68fb ldr r3, [r7, #12] - 8003f44: 681b ldr r3, [r3, #0] - 8003f46: 695b ldr r3, [r3, #20] - 8003f48: 43da mvns r2, r3 - 8003f4a: 68bb ldr r3, [r7, #8] - 8003f4c: 4013 ands r3, r2 - 8003f4e: b29b uxth r3, r3 - 8003f50: 2b00 cmp r3, #0 - 8003f52: bf0c ite eq - 8003f54: 2301 moveq r3, #1 - 8003f56: 2300 movne r3, #0 - 8003f58: b2db uxtb r3, r3 - 8003f5a: 461a mov r2, r3 - 8003f5c: e00c b.n 8003f78 - 8003f5e: 68fb ldr r3, [r7, #12] - 8003f60: 681b ldr r3, [r3, #0] - 8003f62: 699b ldr r3, [r3, #24] - 8003f64: 43da mvns r2, r3 - 8003f66: 68bb ldr r3, [r7, #8] - 8003f68: 4013 ands r3, r2 - 8003f6a: b29b uxth r3, r3 - 8003f6c: 2b00 cmp r3, #0 - 8003f6e: bf0c ite eq - 8003f70: 2301 moveq r3, #1 - 8003f72: 2300 movne r3, #0 - 8003f74: b2db uxtb r3, r3 - 8003f76: 461a mov r2, r3 - 8003f78: 79fb ldrb r3, [r7, #7] - 8003f7a: 429a cmp r2, r3 - 8003f7c: d093 beq.n 8003ea6 + 800488c: 68bb ldr r3, [r7, #8] + 800488e: 0c1b lsrs r3, r3, #16 + 8004890: b2db uxtb r3, r3 + 8004892: 2b01 cmp r3, #1 + 8004894: d10d bne.n 80048b2 + 8004896: 68fb ldr r3, [r7, #12] + 8004898: 681b ldr r3, [r3, #0] + 800489a: 695b ldr r3, [r3, #20] + 800489c: 43da mvns r2, r3 + 800489e: 68bb ldr r3, [r7, #8] + 80048a0: 4013 ands r3, r2 + 80048a2: b29b uxth r3, r3 + 80048a4: 2b00 cmp r3, #0 + 80048a6: bf0c ite eq + 80048a8: 2301 moveq r3, #1 + 80048aa: 2300 movne r3, #0 + 80048ac: b2db uxtb r3, r3 + 80048ae: 461a mov r2, r3 + 80048b0: e00c b.n 80048cc + 80048b2: 68fb ldr r3, [r7, #12] + 80048b4: 681b ldr r3, [r3, #0] + 80048b6: 699b ldr r3, [r3, #24] + 80048b8: 43da mvns r2, r3 + 80048ba: 68bb ldr r3, [r7, #8] + 80048bc: 4013 ands r3, r2 + 80048be: b29b uxth r3, r3 + 80048c0: 2b00 cmp r3, #0 + 80048c2: bf0c ite eq + 80048c4: 2301 moveq r3, #1 + 80048c6: 2300 movne r3, #0 + 80048c8: b2db uxtb r3, r3 + 80048ca: 461a mov r2, r3 + 80048cc: 79fb ldrb r3, [r7, #7] + 80048ce: 429a cmp r2, r3 + 80048d0: d093 beq.n 80047fa } } } } return HAL_OK; - 8003f7e: 2300 movs r3, #0 + 80048d2: 2300 movs r3, #0 } - 8003f80: 4618 mov r0, r3 - 8003f82: 3710 adds r7, #16 - 8003f84: 46bd mov sp, r7 - 8003f86: bd80 pop {r7, pc} + 80048d4: 4618 mov r0, r3 + 80048d6: 3710 adds r7, #16 + 80048d8: 46bd mov sp, r7 + 80048da: bd80 pop {r7, pc} -08003f88 : +080048dc : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart) { - 8003f88: b580 push {r7, lr} - 8003f8a: b084 sub sp, #16 - 8003f8c: af00 add r7, sp, #0 - 8003f8e: 60f8 str r0, [r7, #12] - 8003f90: 60b9 str r1, [r7, #8] - 8003f92: 607a str r2, [r7, #4] - 8003f94: 603b str r3, [r7, #0] + 80048dc: b580 push {r7, lr} + 80048de: b084 sub sp, #16 + 80048e0: af00 add r7, sp, #0 + 80048e2: 60f8 str r0, [r7, #12] + 80048e4: 60b9 str r1, [r7, #8] + 80048e6: 607a str r2, [r7, #4] + 80048e8: 603b str r3, [r7, #0] while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) - 8003f96: e071 b.n 800407c + 80048ea: e071 b.n 80049d0 { if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 8003f98: 68fb ldr r3, [r7, #12] - 8003f9a: 681b ldr r3, [r3, #0] - 8003f9c: 695b ldr r3, [r3, #20] - 8003f9e: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8003fa2: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 8003fa6: d123 bne.n 8003ff0 + 80048ec: 68fb ldr r3, [r7, #12] + 80048ee: 681b ldr r3, [r3, #0] + 80048f0: 695b ldr r3, [r3, #20] + 80048f2: f403 6380 and.w r3, r3, #1024 @ 0x400 + 80048f6: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 80048fa: d123 bne.n 8004944 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003fa8: 68fb ldr r3, [r7, #12] - 8003faa: 681b ldr r3, [r3, #0] - 8003fac: 681a ldr r2, [r3, #0] - 8003fae: 68fb ldr r3, [r7, #12] - 8003fb0: 681b ldr r3, [r3, #0] - 8003fb2: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8003fb6: 601a str r2, [r3, #0] + 80048fc: 68fb ldr r3, [r7, #12] + 80048fe: 681b ldr r3, [r3, #0] + 8004900: 681a ldr r2, [r3, #0] + 8004902: 68fb ldr r3, [r7, #12] + 8004904: 681b ldr r3, [r3, #0] + 8004906: f442 7200 orr.w r2, r2, #512 @ 0x200 + 800490a: 601a str r2, [r3, #0] /* Clear AF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8003fb8: 68fb ldr r3, [r7, #12] - 8003fba: 681b ldr r3, [r3, #0] - 8003fbc: f46f 6280 mvn.w r2, #1024 @ 0x400 - 8003fc0: 615a str r2, [r3, #20] + 800490c: 68fb ldr r3, [r7, #12] + 800490e: 681b ldr r3, [r3, #0] + 8004910: f46f 6280 mvn.w r2, #1024 @ 0x400 + 8004914: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 8003fc2: 68fb ldr r3, [r7, #12] - 8003fc4: 2200 movs r2, #0 - 8003fc6: 631a str r2, [r3, #48] @ 0x30 + 8004916: 68fb ldr r3, [r7, #12] + 8004918: 2200 movs r2, #0 + 800491a: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8003fc8: 68fb ldr r3, [r7, #12] - 8003fca: 2220 movs r2, #32 - 8003fcc: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800491c: 68fb ldr r3, [r7, #12] + 800491e: 2220 movs r2, #32 + 8004920: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003fd0: 68fb ldr r3, [r7, #12] - 8003fd2: 2200 movs r2, #0 - 8003fd4: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004924: 68fb ldr r3, [r7, #12] + 8004926: 2200 movs r2, #0 + 8004928: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8003fd8: 68fb ldr r3, [r7, #12] - 8003fda: 6c1b ldr r3, [r3, #64] @ 0x40 - 8003fdc: f043 0204 orr.w r2, r3, #4 - 8003fe0: 68fb ldr r3, [r7, #12] - 8003fe2: 641a str r2, [r3, #64] @ 0x40 + 800492c: 68fb ldr r3, [r7, #12] + 800492e: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004930: f043 0204 orr.w r2, r3, #4 + 8004934: 68fb ldr r3, [r7, #12] + 8004936: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003fe4: 68fb ldr r3, [r7, #12] - 8003fe6: 2200 movs r2, #0 - 8003fe8: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004938: 68fb ldr r3, [r7, #12] + 800493a: 2200 movs r2, #0 + 800493c: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8003fec: 2301 movs r3, #1 - 8003fee: e067 b.n 80040c0 + 8004940: 2301 movs r3, #1 + 8004942: e067 b.n 8004a14 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8003ff0: 687b ldr r3, [r7, #4] - 8003ff2: f1b3 3fff cmp.w r3, #4294967295 - 8003ff6: d041 beq.n 800407c + 8004944: 687b ldr r3, [r7, #4] + 8004946: f1b3 3fff cmp.w r3, #4294967295 + 800494a: d041 beq.n 80049d0 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8003ff8: f7fe fba6 bl 8002748 - 8003ffc: 4602 mov r2, r0 - 8003ffe: 683b ldr r3, [r7, #0] - 8004000: 1ad3 subs r3, r2, r3 - 8004002: 687a ldr r2, [r7, #4] - 8004004: 429a cmp r2, r3 - 8004006: d302 bcc.n 800400e - 8004008: 687b ldr r3, [r7, #4] - 800400a: 2b00 cmp r3, #0 - 800400c: d136 bne.n 800407c + 800494c: f7fe fb82 bl 8003054 + 8004950: 4602 mov r2, r0 + 8004952: 683b ldr r3, [r7, #0] + 8004954: 1ad3 subs r3, r2, r3 + 8004956: 687a ldr r2, [r7, #4] + 8004958: 429a cmp r2, r3 + 800495a: d302 bcc.n 8004962 + 800495c: 687b ldr r3, [r7, #4] + 800495e: 2b00 cmp r3, #0 + 8004960: d136 bne.n 80049d0 { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)) - 800400e: 68bb ldr r3, [r7, #8] - 8004010: 0c1b lsrs r3, r3, #16 - 8004012: b2db uxtb r3, r3 - 8004014: 2b01 cmp r3, #1 - 8004016: d10c bne.n 8004032 - 8004018: 68fb ldr r3, [r7, #12] - 800401a: 681b ldr r3, [r3, #0] - 800401c: 695b ldr r3, [r3, #20] - 800401e: 43da mvns r2, r3 - 8004020: 68bb ldr r3, [r7, #8] - 8004022: 4013 ands r3, r2 - 8004024: b29b uxth r3, r3 - 8004026: 2b00 cmp r3, #0 - 8004028: bf14 ite ne - 800402a: 2301 movne r3, #1 - 800402c: 2300 moveq r3, #0 - 800402e: b2db uxtb r3, r3 - 8004030: e00b b.n 800404a - 8004032: 68fb ldr r3, [r7, #12] - 8004034: 681b ldr r3, [r3, #0] - 8004036: 699b ldr r3, [r3, #24] - 8004038: 43da mvns r2, r3 - 800403a: 68bb ldr r3, [r7, #8] - 800403c: 4013 ands r3, r2 - 800403e: b29b uxth r3, r3 - 8004040: 2b00 cmp r3, #0 - 8004042: bf14 ite ne - 8004044: 2301 movne r3, #1 - 8004046: 2300 moveq r3, #0 - 8004048: b2db uxtb r3, r3 - 800404a: 2b00 cmp r3, #0 - 800404c: d016 beq.n 800407c + 8004962: 68bb ldr r3, [r7, #8] + 8004964: 0c1b lsrs r3, r3, #16 + 8004966: b2db uxtb r3, r3 + 8004968: 2b01 cmp r3, #1 + 800496a: d10c bne.n 8004986 + 800496c: 68fb ldr r3, [r7, #12] + 800496e: 681b ldr r3, [r3, #0] + 8004970: 695b ldr r3, [r3, #20] + 8004972: 43da mvns r2, r3 + 8004974: 68bb ldr r3, [r7, #8] + 8004976: 4013 ands r3, r2 + 8004978: b29b uxth r3, r3 + 800497a: 2b00 cmp r3, #0 + 800497c: bf14 ite ne + 800497e: 2301 movne r3, #1 + 8004980: 2300 moveq r3, #0 + 8004982: b2db uxtb r3, r3 + 8004984: e00b b.n 800499e + 8004986: 68fb ldr r3, [r7, #12] + 8004988: 681b ldr r3, [r3, #0] + 800498a: 699b ldr r3, [r3, #24] + 800498c: 43da mvns r2, r3 + 800498e: 68bb ldr r3, [r7, #8] + 8004990: 4013 ands r3, r2 + 8004992: b29b uxth r3, r3 + 8004994: 2b00 cmp r3, #0 + 8004996: bf14 ite ne + 8004998: 2301 movne r3, #1 + 800499a: 2300 moveq r3, #0 + 800499c: b2db uxtb r3, r3 + 800499e: 2b00 cmp r3, #0 + 80049a0: d016 beq.n 80049d0 { hi2c->PreviousState = I2C_STATE_NONE; - 800404e: 68fb ldr r3, [r7, #12] - 8004050: 2200 movs r2, #0 - 8004052: 631a str r2, [r3, #48] @ 0x30 + 80049a2: 68fb ldr r3, [r7, #12] + 80049a4: 2200 movs r2, #0 + 80049a6: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004054: 68fb ldr r3, [r7, #12] - 8004056: 2220 movs r2, #32 - 8004058: f883 203d strb.w r2, [r3, #61] @ 0x3d + 80049a8: 68fb ldr r3, [r7, #12] + 80049aa: 2220 movs r2, #32 + 80049ac: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 800405c: 68fb ldr r3, [r7, #12] - 800405e: 2200 movs r2, #0 - 8004060: f883 203e strb.w r2, [r3, #62] @ 0x3e + 80049b0: 68fb ldr r3, [r7, #12] + 80049b2: 2200 movs r2, #0 + 80049b4: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8004064: 68fb ldr r3, [r7, #12] - 8004066: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004068: f043 0220 orr.w r2, r3, #32 - 800406c: 68fb ldr r3, [r7, #12] - 800406e: 641a str r2, [r3, #64] @ 0x40 + 80049b8: 68fb ldr r3, [r7, #12] + 80049ba: 6c1b ldr r3, [r3, #64] @ 0x40 + 80049bc: f043 0220 orr.w r2, r3, #32 + 80049c0: 68fb ldr r3, [r7, #12] + 80049c2: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004070: 68fb ldr r3, [r7, #12] - 8004072: 2200 movs r2, #0 - 8004074: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80049c4: 68fb ldr r3, [r7, #12] + 80049c6: 2200 movs r2, #0 + 80049c8: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004078: 2301 movs r3, #1 - 800407a: e021 b.n 80040c0 + 80049cc: 2301 movs r3, #1 + 80049ce: e021 b.n 8004a14 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) - 800407c: 68bb ldr r3, [r7, #8] - 800407e: 0c1b lsrs r3, r3, #16 - 8004080: b2db uxtb r3, r3 - 8004082: 2b01 cmp r3, #1 - 8004084: d10c bne.n 80040a0 - 8004086: 68fb ldr r3, [r7, #12] - 8004088: 681b ldr r3, [r3, #0] - 800408a: 695b ldr r3, [r3, #20] - 800408c: 43da mvns r2, r3 - 800408e: 68bb ldr r3, [r7, #8] - 8004090: 4013 ands r3, r2 - 8004092: b29b uxth r3, r3 - 8004094: 2b00 cmp r3, #0 - 8004096: bf14 ite ne - 8004098: 2301 movne r3, #1 - 800409a: 2300 moveq r3, #0 - 800409c: b2db uxtb r3, r3 - 800409e: e00b b.n 80040b8 - 80040a0: 68fb ldr r3, [r7, #12] - 80040a2: 681b ldr r3, [r3, #0] - 80040a4: 699b ldr r3, [r3, #24] - 80040a6: 43da mvns r2, r3 - 80040a8: 68bb ldr r3, [r7, #8] - 80040aa: 4013 ands r3, r2 - 80040ac: b29b uxth r3, r3 - 80040ae: 2b00 cmp r3, #0 - 80040b0: bf14 ite ne - 80040b2: 2301 movne r3, #1 - 80040b4: 2300 moveq r3, #0 - 80040b6: b2db uxtb r3, r3 - 80040b8: 2b00 cmp r3, #0 - 80040ba: f47f af6d bne.w 8003f98 + 80049d0: 68bb ldr r3, [r7, #8] + 80049d2: 0c1b lsrs r3, r3, #16 + 80049d4: b2db uxtb r3, r3 + 80049d6: 2b01 cmp r3, #1 + 80049d8: d10c bne.n 80049f4 + 80049da: 68fb ldr r3, [r7, #12] + 80049dc: 681b ldr r3, [r3, #0] + 80049de: 695b ldr r3, [r3, #20] + 80049e0: 43da mvns r2, r3 + 80049e2: 68bb ldr r3, [r7, #8] + 80049e4: 4013 ands r3, r2 + 80049e6: b29b uxth r3, r3 + 80049e8: 2b00 cmp r3, #0 + 80049ea: bf14 ite ne + 80049ec: 2301 movne r3, #1 + 80049ee: 2300 moveq r3, #0 + 80049f0: b2db uxtb r3, r3 + 80049f2: e00b b.n 8004a0c + 80049f4: 68fb ldr r3, [r7, #12] + 80049f6: 681b ldr r3, [r3, #0] + 80049f8: 699b ldr r3, [r3, #24] + 80049fa: 43da mvns r2, r3 + 80049fc: 68bb ldr r3, [r7, #8] + 80049fe: 4013 ands r3, r2 + 8004a00: b29b uxth r3, r3 + 8004a02: 2b00 cmp r3, #0 + 8004a04: bf14 ite ne + 8004a06: 2301 movne r3, #1 + 8004a08: 2300 moveq r3, #0 + 8004a0a: b2db uxtb r3, r3 + 8004a0c: 2b00 cmp r3, #0 + 8004a0e: f47f af6d bne.w 80048ec } } } } return HAL_OK; - 80040be: 2300 movs r3, #0 + 8004a12: 2300 movs r3, #0 } - 80040c0: 4618 mov r0, r3 - 80040c2: 3710 adds r7, #16 - 80040c4: 46bd mov sp, r7 - 80040c6: bd80 pop {r7, pc} + 8004a14: 4618 mov r0, r3 + 8004a16: 3710 adds r7, #16 + 8004a18: 46bd mov sp, r7 + 8004a1a: bd80 pop {r7, pc} -080040c8 : +08004a1c : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 80040c8: b580 push {r7, lr} - 80040ca: b084 sub sp, #16 - 80040cc: af00 add r7, sp, #0 - 80040ce: 60f8 str r0, [r7, #12] - 80040d0: 60b9 str r1, [r7, #8] - 80040d2: 607a str r2, [r7, #4] + 8004a1c: b580 push {r7, lr} + 8004a1e: b084 sub sp, #16 + 8004a20: af00 add r7, sp, #0 + 8004a22: 60f8 str r0, [r7, #12] + 8004a24: 60b9 str r1, [r7, #8] + 8004a26: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 80040d4: e034 b.n 8004140 + 8004a28: e034 b.n 8004a94 { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) - 80040d6: 68f8 ldr r0, [r7, #12] - 80040d8: f000 f8e3 bl 80042a2 - 80040dc: 4603 mov r3, r0 - 80040de: 2b00 cmp r3, #0 - 80040e0: d001 beq.n 80040e6 + 8004a2a: 68f8 ldr r0, [r7, #12] + 8004a2c: f000 f8e3 bl 8004bf6 + 8004a30: 4603 mov r3, r0 + 8004a32: 2b00 cmp r3, #0 + 8004a34: d001 beq.n 8004a3a { return HAL_ERROR; - 80040e2: 2301 movs r3, #1 - 80040e4: e034 b.n 8004150 + 8004a36: 2301 movs r3, #1 + 8004a38: e034 b.n 8004aa4 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 80040e6: 68bb ldr r3, [r7, #8] - 80040e8: f1b3 3fff cmp.w r3, #4294967295 - 80040ec: d028 beq.n 8004140 + 8004a3a: 68bb ldr r3, [r7, #8] + 8004a3c: f1b3 3fff cmp.w r3, #4294967295 + 8004a40: d028 beq.n 8004a94 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 80040ee: f7fe fb2b bl 8002748 - 80040f2: 4602 mov r2, r0 - 80040f4: 687b ldr r3, [r7, #4] - 80040f6: 1ad3 subs r3, r2, r3 - 80040f8: 68ba ldr r2, [r7, #8] - 80040fa: 429a cmp r2, r3 - 80040fc: d302 bcc.n 8004104 - 80040fe: 68bb ldr r3, [r7, #8] - 8004100: 2b00 cmp r3, #0 - 8004102: d11d bne.n 8004140 + 8004a42: f7fe fb07 bl 8003054 + 8004a46: 4602 mov r2, r0 + 8004a48: 687b ldr r3, [r7, #4] + 8004a4a: 1ad3 subs r3, r2, r3 + 8004a4c: 68ba ldr r2, [r7, #8] + 8004a4e: 429a cmp r2, r3 + 8004a50: d302 bcc.n 8004a58 + 8004a52: 68bb ldr r3, [r7, #8] + 8004a54: 2b00 cmp r3, #0 + 8004a56: d11d bne.n 8004a94 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)) - 8004104: 68fb ldr r3, [r7, #12] - 8004106: 681b ldr r3, [r3, #0] - 8004108: 695b ldr r3, [r3, #20] - 800410a: f003 0380 and.w r3, r3, #128 @ 0x80 - 800410e: 2b80 cmp r3, #128 @ 0x80 - 8004110: d016 beq.n 8004140 + 8004a58: 68fb ldr r3, [r7, #12] + 8004a5a: 681b ldr r3, [r3, #0] + 8004a5c: 695b ldr r3, [r3, #20] + 8004a5e: f003 0380 and.w r3, r3, #128 @ 0x80 + 8004a62: 2b80 cmp r3, #128 @ 0x80 + 8004a64: d016 beq.n 8004a94 { hi2c->PreviousState = I2C_STATE_NONE; - 8004112: 68fb ldr r3, [r7, #12] - 8004114: 2200 movs r2, #0 - 8004116: 631a str r2, [r3, #48] @ 0x30 + 8004a66: 68fb ldr r3, [r7, #12] + 8004a68: 2200 movs r2, #0 + 8004a6a: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004118: 68fb ldr r3, [r7, #12] - 800411a: 2220 movs r2, #32 - 800411c: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004a6c: 68fb ldr r3, [r7, #12] + 8004a6e: 2220 movs r2, #32 + 8004a70: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004120: 68fb ldr r3, [r7, #12] - 8004122: 2200 movs r2, #0 - 8004124: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004a74: 68fb ldr r3, [r7, #12] + 8004a76: 2200 movs r2, #0 + 8004a78: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8004128: 68fb ldr r3, [r7, #12] - 800412a: 6c1b ldr r3, [r3, #64] @ 0x40 - 800412c: f043 0220 orr.w r2, r3, #32 - 8004130: 68fb ldr r3, [r7, #12] - 8004132: 641a str r2, [r3, #64] @ 0x40 + 8004a7c: 68fb ldr r3, [r7, #12] + 8004a7e: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004a80: f043 0220 orr.w r2, r3, #32 + 8004a84: 68fb ldr r3, [r7, #12] + 8004a86: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004134: 68fb ldr r3, [r7, #12] - 8004136: 2200 movs r2, #0 - 8004138: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004a88: 68fb ldr r3, [r7, #12] + 8004a8a: 2200 movs r2, #0 + 8004a8c: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 800413c: 2301 movs r3, #1 - 800413e: e007 b.n 8004150 + 8004a90: 2301 movs r3, #1 + 8004a92: e007 b.n 8004aa4 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 8004140: 68fb ldr r3, [r7, #12] - 8004142: 681b ldr r3, [r3, #0] - 8004144: 695b ldr r3, [r3, #20] - 8004146: f003 0380 and.w r3, r3, #128 @ 0x80 - 800414a: 2b80 cmp r3, #128 @ 0x80 - 800414c: d1c3 bne.n 80040d6 + 8004a94: 68fb ldr r3, [r7, #12] + 8004a96: 681b ldr r3, [r3, #0] + 8004a98: 695b ldr r3, [r3, #20] + 8004a9a: f003 0380 and.w r3, r3, #128 @ 0x80 + 8004a9e: 2b80 cmp r3, #128 @ 0x80 + 8004aa0: d1c3 bne.n 8004a2a } } } } return HAL_OK; - 800414e: 2300 movs r3, #0 + 8004aa2: 2300 movs r3, #0 } - 8004150: 4618 mov r0, r3 - 8004152: 3710 adds r7, #16 - 8004154: 46bd mov sp, r7 - 8004156: bd80 pop {r7, pc} + 8004aa4: 4618 mov r0, r3 + 8004aa6: 3710 adds r7, #16 + 8004aa8: 46bd mov sp, r7 + 8004aaa: bd80 pop {r7, pc} -08004158 : +08004aac : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 8004158: b580 push {r7, lr} - 800415a: b084 sub sp, #16 - 800415c: af00 add r7, sp, #0 - 800415e: 60f8 str r0, [r7, #12] - 8004160: 60b9 str r1, [r7, #8] - 8004162: 607a str r2, [r7, #4] + 8004aac: b580 push {r7, lr} + 8004aae: b084 sub sp, #16 + 8004ab0: af00 add r7, sp, #0 + 8004ab2: 60f8 str r0, [r7, #12] + 8004ab4: 60b9 str r1, [r7, #8] + 8004ab6: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) - 8004164: e034 b.n 80041d0 + 8004ab8: e034 b.n 8004b24 { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) - 8004166: 68f8 ldr r0, [r7, #12] - 8004168: f000 f89b bl 80042a2 - 800416c: 4603 mov r3, r0 - 800416e: 2b00 cmp r3, #0 - 8004170: d001 beq.n 8004176 + 8004aba: 68f8 ldr r0, [r7, #12] + 8004abc: f000 f89b bl 8004bf6 + 8004ac0: 4603 mov r3, r0 + 8004ac2: 2b00 cmp r3, #0 + 8004ac4: d001 beq.n 8004aca { return HAL_ERROR; - 8004172: 2301 movs r3, #1 - 8004174: e034 b.n 80041e0 + 8004ac6: 2301 movs r3, #1 + 8004ac8: e034 b.n 8004b34 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8004176: 68bb ldr r3, [r7, #8] - 8004178: f1b3 3fff cmp.w r3, #4294967295 - 800417c: d028 beq.n 80041d0 + 8004aca: 68bb ldr r3, [r7, #8] + 8004acc: f1b3 3fff cmp.w r3, #4294967295 + 8004ad0: d028 beq.n 8004b24 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 800417e: f7fe fae3 bl 8002748 - 8004182: 4602 mov r2, r0 - 8004184: 687b ldr r3, [r7, #4] - 8004186: 1ad3 subs r3, r2, r3 - 8004188: 68ba ldr r2, [r7, #8] - 800418a: 429a cmp r2, r3 - 800418c: d302 bcc.n 8004194 - 800418e: 68bb ldr r3, [r7, #8] - 8004190: 2b00 cmp r3, #0 - 8004192: d11d bne.n 80041d0 + 8004ad2: f7fe fabf bl 8003054 + 8004ad6: 4602 mov r2, r0 + 8004ad8: 687b ldr r3, [r7, #4] + 8004ada: 1ad3 subs r3, r2, r3 + 8004adc: 68ba ldr r2, [r7, #8] + 8004ade: 429a cmp r2, r3 + 8004ae0: d302 bcc.n 8004ae8 + 8004ae2: 68bb ldr r3, [r7, #8] + 8004ae4: 2b00 cmp r3, #0 + 8004ae6: d11d bne.n 8004b24 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)) - 8004194: 68fb ldr r3, [r7, #12] - 8004196: 681b ldr r3, [r3, #0] - 8004198: 695b ldr r3, [r3, #20] - 800419a: f003 0304 and.w r3, r3, #4 - 800419e: 2b04 cmp r3, #4 - 80041a0: d016 beq.n 80041d0 + 8004ae8: 68fb ldr r3, [r7, #12] + 8004aea: 681b ldr r3, [r3, #0] + 8004aec: 695b ldr r3, [r3, #20] + 8004aee: f003 0304 and.w r3, r3, #4 + 8004af2: 2b04 cmp r3, #4 + 8004af4: d016 beq.n 8004b24 { hi2c->PreviousState = I2C_STATE_NONE; - 80041a2: 68fb ldr r3, [r7, #12] - 80041a4: 2200 movs r2, #0 - 80041a6: 631a str r2, [r3, #48] @ 0x30 + 8004af6: 68fb ldr r3, [r7, #12] + 8004af8: 2200 movs r2, #0 + 8004afa: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 80041a8: 68fb ldr r3, [r7, #12] - 80041aa: 2220 movs r2, #32 - 80041ac: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004afc: 68fb ldr r3, [r7, #12] + 8004afe: 2220 movs r2, #32 + 8004b00: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80041b0: 68fb ldr r3, [r7, #12] - 80041b2: 2200 movs r2, #0 - 80041b4: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004b04: 68fb ldr r3, [r7, #12] + 8004b06: 2200 movs r2, #0 + 8004b08: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 80041b8: 68fb ldr r3, [r7, #12] - 80041ba: 6c1b ldr r3, [r3, #64] @ 0x40 - 80041bc: f043 0220 orr.w r2, r3, #32 - 80041c0: 68fb ldr r3, [r7, #12] - 80041c2: 641a str r2, [r3, #64] @ 0x40 + 8004b0c: 68fb ldr r3, [r7, #12] + 8004b0e: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004b10: f043 0220 orr.w r2, r3, #32 + 8004b14: 68fb ldr r3, [r7, #12] + 8004b16: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80041c4: 68fb ldr r3, [r7, #12] - 80041c6: 2200 movs r2, #0 - 80041c8: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004b18: 68fb ldr r3, [r7, #12] + 8004b1a: 2200 movs r2, #0 + 8004b1c: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 80041cc: 2301 movs r3, #1 - 80041ce: e007 b.n 80041e0 + 8004b20: 2301 movs r3, #1 + 8004b22: e007 b.n 8004b34 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) - 80041d0: 68fb ldr r3, [r7, #12] - 80041d2: 681b ldr r3, [r3, #0] - 80041d4: 695b ldr r3, [r3, #20] - 80041d6: f003 0304 and.w r3, r3, #4 - 80041da: 2b04 cmp r3, #4 - 80041dc: d1c3 bne.n 8004166 + 8004b24: 68fb ldr r3, [r7, #12] + 8004b26: 681b ldr r3, [r3, #0] + 8004b28: 695b ldr r3, [r3, #20] + 8004b2a: f003 0304 and.w r3, r3, #4 + 8004b2e: 2b04 cmp r3, #4 + 8004b30: d1c3 bne.n 8004aba } } } } return HAL_OK; - 80041de: 2300 movs r3, #0 + 8004b32: 2300 movs r3, #0 } - 80041e0: 4618 mov r0, r3 - 80041e2: 3710 adds r7, #16 - 80041e4: 46bd mov sp, r7 - 80041e6: bd80 pop {r7, pc} + 8004b34: 4618 mov r0, r3 + 8004b36: 3710 adds r7, #16 + 8004b38: 46bd mov sp, r7 + 8004b3a: bd80 pop {r7, pc} -080041e8 : +08004b3c : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 80041e8: b580 push {r7, lr} - 80041ea: b084 sub sp, #16 - 80041ec: af00 add r7, sp, #0 - 80041ee: 60f8 str r0, [r7, #12] - 80041f0: 60b9 str r1, [r7, #8] - 80041f2: 607a str r2, [r7, #4] + 8004b3c: b580 push {r7, lr} + 8004b3e: b084 sub sp, #16 + 8004b40: af00 add r7, sp, #0 + 8004b42: 60f8 str r0, [r7, #12] + 8004b44: 60b9 str r1, [r7, #8] + 8004b46: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - 80041f4: e049 b.n 800428a + 8004b48: e049 b.n 8004bde { /* Check if a STOPF is detected */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) - 80041f6: 68fb ldr r3, [r7, #12] - 80041f8: 681b ldr r3, [r3, #0] - 80041fa: 695b ldr r3, [r3, #20] - 80041fc: f003 0310 and.w r3, r3, #16 - 8004200: 2b10 cmp r3, #16 - 8004202: d119 bne.n 8004238 + 8004b4a: 68fb ldr r3, [r7, #12] + 8004b4c: 681b ldr r3, [r3, #0] + 8004b4e: 695b ldr r3, [r3, #20] + 8004b50: f003 0310 and.w r3, r3, #16 + 8004b54: 2b10 cmp r3, #16 + 8004b56: d119 bne.n 8004b8c { /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 8004204: 68fb ldr r3, [r7, #12] - 8004206: 681b ldr r3, [r3, #0] - 8004208: f06f 0210 mvn.w r2, #16 - 800420c: 615a str r2, [r3, #20] + 8004b58: 68fb ldr r3, [r7, #12] + 8004b5a: 681b ldr r3, [r3, #0] + 8004b5c: f06f 0210 mvn.w r2, #16 + 8004b60: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 800420e: 68fb ldr r3, [r7, #12] - 8004210: 2200 movs r2, #0 - 8004212: 631a str r2, [r3, #48] @ 0x30 + 8004b62: 68fb ldr r3, [r7, #12] + 8004b64: 2200 movs r2, #0 + 8004b66: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004214: 68fb ldr r3, [r7, #12] - 8004216: 2220 movs r2, #32 - 8004218: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004b68: 68fb ldr r3, [r7, #12] + 8004b6a: 2220 movs r2, #32 + 8004b6c: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 800421c: 68fb ldr r3, [r7, #12] - 800421e: 2200 movs r2, #0 - 8004220: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004b70: 68fb ldr r3, [r7, #12] + 8004b72: 2200 movs r2, #0 + 8004b74: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_NONE; - 8004224: 68fb ldr r3, [r7, #12] - 8004226: 6c1a ldr r2, [r3, #64] @ 0x40 - 8004228: 68fb ldr r3, [r7, #12] - 800422a: 641a str r2, [r3, #64] @ 0x40 + 8004b78: 68fb ldr r3, [r7, #12] + 8004b7a: 6c1a ldr r2, [r3, #64] @ 0x40 + 8004b7c: 68fb ldr r3, [r7, #12] + 8004b7e: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 800422c: 68fb ldr r3, [r7, #12] - 800422e: 2200 movs r2, #0 - 8004230: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004b80: 68fb ldr r3, [r7, #12] + 8004b82: 2200 movs r2, #0 + 8004b84: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004234: 2301 movs r3, #1 - 8004236: e030 b.n 800429a + 8004b88: 2301 movs r3, #1 + 8004b8a: e030 b.n 8004bee } /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8004238: f7fe fa86 bl 8002748 - 800423c: 4602 mov r2, r0 - 800423e: 687b ldr r3, [r7, #4] - 8004240: 1ad3 subs r3, r2, r3 - 8004242: 68ba ldr r2, [r7, #8] - 8004244: 429a cmp r2, r3 - 8004246: d302 bcc.n 800424e - 8004248: 68bb ldr r3, [r7, #8] - 800424a: 2b00 cmp r3, #0 - 800424c: d11d bne.n 800428a + 8004b8c: f7fe fa62 bl 8003054 + 8004b90: 4602 mov r2, r0 + 8004b92: 687b ldr r3, [r7, #4] + 8004b94: 1ad3 subs r3, r2, r3 + 8004b96: 68ba ldr r2, [r7, #8] + 8004b98: 429a cmp r2, r3 + 8004b9a: d302 bcc.n 8004ba2 + 8004b9c: 68bb ldr r3, [r7, #8] + 8004b9e: 2b00 cmp r3, #0 + 8004ba0: d11d bne.n 8004bde { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) - 800424e: 68fb ldr r3, [r7, #12] - 8004250: 681b ldr r3, [r3, #0] - 8004252: 695b ldr r3, [r3, #20] - 8004254: f003 0340 and.w r3, r3, #64 @ 0x40 - 8004258: 2b40 cmp r3, #64 @ 0x40 - 800425a: d016 beq.n 800428a + 8004ba2: 68fb ldr r3, [r7, #12] + 8004ba4: 681b ldr r3, [r3, #0] + 8004ba6: 695b ldr r3, [r3, #20] + 8004ba8: f003 0340 and.w r3, r3, #64 @ 0x40 + 8004bac: 2b40 cmp r3, #64 @ 0x40 + 8004bae: d016 beq.n 8004bde { hi2c->PreviousState = I2C_STATE_NONE; - 800425c: 68fb ldr r3, [r7, #12] - 800425e: 2200 movs r2, #0 - 8004260: 631a str r2, [r3, #48] @ 0x30 + 8004bb0: 68fb ldr r3, [r7, #12] + 8004bb2: 2200 movs r2, #0 + 8004bb4: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004262: 68fb ldr r3, [r7, #12] - 8004264: 2220 movs r2, #32 - 8004266: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004bb6: 68fb ldr r3, [r7, #12] + 8004bb8: 2220 movs r2, #32 + 8004bba: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 800426a: 68fb ldr r3, [r7, #12] - 800426c: 2200 movs r2, #0 - 800426e: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004bbe: 68fb ldr r3, [r7, #12] + 8004bc0: 2200 movs r2, #0 + 8004bc2: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8004272: 68fb ldr r3, [r7, #12] - 8004274: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004276: f043 0220 orr.w r2, r3, #32 - 800427a: 68fb ldr r3, [r7, #12] - 800427c: 641a str r2, [r3, #64] @ 0x40 + 8004bc6: 68fb ldr r3, [r7, #12] + 8004bc8: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004bca: f043 0220 orr.w r2, r3, #32 + 8004bce: 68fb ldr r3, [r7, #12] + 8004bd0: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 800427e: 68fb ldr r3, [r7, #12] - 8004280: 2200 movs r2, #0 - 8004282: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004bd2: 68fb ldr r3, [r7, #12] + 8004bd4: 2200 movs r2, #0 + 8004bd6: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004286: 2301 movs r3, #1 - 8004288: e007 b.n 800429a + 8004bda: 2301 movs r3, #1 + 8004bdc: e007 b.n 8004bee while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - 800428a: 68fb ldr r3, [r7, #12] - 800428c: 681b ldr r3, [r3, #0] - 800428e: 695b ldr r3, [r3, #20] - 8004290: f003 0340 and.w r3, r3, #64 @ 0x40 - 8004294: 2b40 cmp r3, #64 @ 0x40 - 8004296: d1ae bne.n 80041f6 + 8004bde: 68fb ldr r3, [r7, #12] + 8004be0: 681b ldr r3, [r3, #0] + 8004be2: 695b ldr r3, [r3, #20] + 8004be4: f003 0340 and.w r3, r3, #64 @ 0x40 + 8004be8: 2b40 cmp r3, #64 @ 0x40 + 8004bea: d1ae bne.n 8004b4a } } } return HAL_OK; - 8004298: 2300 movs r3, #0 + 8004bec: 2300 movs r3, #0 } - 800429a: 4618 mov r0, r3 - 800429c: 3710 adds r7, #16 - 800429e: 46bd mov sp, r7 - 80042a0: bd80 pop {r7, pc} + 8004bee: 4618 mov r0, r3 + 8004bf0: 3710 adds r7, #16 + 8004bf2: 46bd mov sp, r7 + 8004bf4: bd80 pop {r7, pc} -080042a2 : +08004bf6 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { - 80042a2: b480 push {r7} - 80042a4: b083 sub sp, #12 - 80042a6: af00 add r7, sp, #0 - 80042a8: 6078 str r0, [r7, #4] + 8004bf6: b480 push {r7} + 8004bf8: b083 sub sp, #12 + 8004bfa: af00 add r7, sp, #0 + 8004bfc: 6078 str r0, [r7, #4] if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 80042aa: 687b ldr r3, [r7, #4] - 80042ac: 681b ldr r3, [r3, #0] - 80042ae: 695b ldr r3, [r3, #20] - 80042b0: f403 6380 and.w r3, r3, #1024 @ 0x400 - 80042b4: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 80042b8: d11b bne.n 80042f2 + 8004bfe: 687b ldr r3, [r7, #4] + 8004c00: 681b ldr r3, [r3, #0] + 8004c02: 695b ldr r3, [r3, #20] + 8004c04: f403 6380 and.w r3, r3, #1024 @ 0x400 + 8004c08: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 8004c0c: d11b bne.n 8004c46 { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 80042ba: 687b ldr r3, [r7, #4] - 80042bc: 681b ldr r3, [r3, #0] - 80042be: f46f 6280 mvn.w r2, #1024 @ 0x400 - 80042c2: 615a str r2, [r3, #20] + 8004c0e: 687b ldr r3, [r7, #4] + 8004c10: 681b ldr r3, [r3, #0] + 8004c12: f46f 6280 mvn.w r2, #1024 @ 0x400 + 8004c16: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 80042c4: 687b ldr r3, [r7, #4] - 80042c6: 2200 movs r2, #0 - 80042c8: 631a str r2, [r3, #48] @ 0x30 + 8004c18: 687b ldr r3, [r7, #4] + 8004c1a: 2200 movs r2, #0 + 8004c1c: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 80042ca: 687b ldr r3, [r7, #4] - 80042cc: 2220 movs r2, #32 - 80042ce: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004c1e: 687b ldr r3, [r7, #4] + 8004c20: 2220 movs r2, #32 + 8004c22: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80042d2: 687b ldr r3, [r7, #4] - 80042d4: 2200 movs r2, #0 - 80042d6: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004c26: 687b ldr r3, [r7, #4] + 8004c28: 2200 movs r2, #0 + 8004c2a: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 80042da: 687b ldr r3, [r7, #4] - 80042dc: 6c1b ldr r3, [r3, #64] @ 0x40 - 80042de: f043 0204 orr.w r2, r3, #4 - 80042e2: 687b ldr r3, [r7, #4] - 80042e4: 641a str r2, [r3, #64] @ 0x40 + 8004c2e: 687b ldr r3, [r7, #4] + 8004c30: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004c32: f043 0204 orr.w r2, r3, #4 + 8004c36: 687b ldr r3, [r7, #4] + 8004c38: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80042e6: 687b ldr r3, [r7, #4] - 80042e8: 2200 movs r2, #0 - 80042ea: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004c3a: 687b ldr r3, [r7, #4] + 8004c3c: 2200 movs r2, #0 + 8004c3e: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 80042ee: 2301 movs r3, #1 - 80042f0: e000 b.n 80042f4 + 8004c42: 2301 movs r3, #1 + 8004c44: e000 b.n 8004c48 } return HAL_OK; - 80042f2: 2300 movs r3, #0 + 8004c46: 2300 movs r3, #0 } - 80042f4: 4618 mov r0, r3 - 80042f6: 370c adds r7, #12 - 80042f8: 46bd mov sp, r7 - 80042fa: bc80 pop {r7} - 80042fc: 4770 bx lr + 8004c48: 4618 mov r0, r3 + 8004c4a: 370c adds r7, #12 + 8004c4c: 46bd mov sp, r7 + 8004c4e: bc80 pop {r7} + 8004c50: 4770 bx lr ... -08004300 : +08004c54 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8004300: b580 push {r7, lr} - 8004302: b086 sub sp, #24 - 8004304: af00 add r7, sp, #0 - 8004306: 6078 str r0, [r7, #4] + 8004c54: b580 push {r7, lr} + 8004c56: b086 sub sp, #24 + 8004c58: af00 add r7, sp, #0 + 8004c5a: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) - 8004308: 687b ldr r3, [r7, #4] - 800430a: 2b00 cmp r3, #0 - 800430c: d101 bne.n 8004312 + 8004c5c: 687b ldr r3, [r7, #4] + 8004c5e: 2b00 cmp r3, #0 + 8004c60: d101 bne.n 8004c66 { return HAL_ERROR; - 800430e: 2301 movs r3, #1 - 8004310: e272 b.n 80047f8 + 8004c62: 2301 movs r3, #1 + 8004c64: e272 b.n 800514c /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8004312: 687b ldr r3, [r7, #4] - 8004314: 681b ldr r3, [r3, #0] - 8004316: f003 0301 and.w r3, r3, #1 - 800431a: 2b00 cmp r3, #0 - 800431c: f000 8087 beq.w 800442e + 8004c66: 687b ldr r3, [r7, #4] + 8004c68: 681b ldr r3, [r3, #0] + 8004c6a: f003 0301 and.w r3, r3, #1 + 8004c6e: 2b00 cmp r3, #0 + 8004c70: f000 8087 beq.w 8004d82 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 8004320: 4b92 ldr r3, [pc, #584] @ (800456c ) - 8004322: 685b ldr r3, [r3, #4] - 8004324: f003 030c and.w r3, r3, #12 - 8004328: 2b04 cmp r3, #4 - 800432a: d00c beq.n 8004346 + 8004c74: 4b92 ldr r3, [pc, #584] @ (8004ec0 ) + 8004c76: 685b ldr r3, [r3, #4] + 8004c78: f003 030c and.w r3, r3, #12 + 8004c7c: 2b04 cmp r3, #4 + 8004c7e: d00c beq.n 8004c9a || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - 800432c: 4b8f ldr r3, [pc, #572] @ (800456c ) - 800432e: 685b ldr r3, [r3, #4] - 8004330: f003 030c and.w r3, r3, #12 - 8004334: 2b08 cmp r3, #8 - 8004336: d112 bne.n 800435e - 8004338: 4b8c ldr r3, [pc, #560] @ (800456c ) - 800433a: 685b ldr r3, [r3, #4] - 800433c: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8004340: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8004344: d10b bne.n 800435e + 8004c80: 4b8f ldr r3, [pc, #572] @ (8004ec0 ) + 8004c82: 685b ldr r3, [r3, #4] + 8004c84: f003 030c and.w r3, r3, #12 + 8004c88: 2b08 cmp r3, #8 + 8004c8a: d112 bne.n 8004cb2 + 8004c8c: 4b8c ldr r3, [pc, #560] @ (8004ec0 ) + 8004c8e: 685b ldr r3, [r3, #4] + 8004c90: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8004c94: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8004c98: d10b bne.n 8004cb2 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8004346: 4b89 ldr r3, [pc, #548] @ (800456c ) - 8004348: 681b ldr r3, [r3, #0] - 800434a: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 800434e: 2b00 cmp r3, #0 - 8004350: d06c beq.n 800442c - 8004352: 687b ldr r3, [r7, #4] - 8004354: 685b ldr r3, [r3, #4] - 8004356: 2b00 cmp r3, #0 - 8004358: d168 bne.n 800442c + 8004c9a: 4b89 ldr r3, [pc, #548] @ (8004ec0 ) + 8004c9c: 681b ldr r3, [r3, #0] + 8004c9e: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004ca2: 2b00 cmp r3, #0 + 8004ca4: d06c beq.n 8004d80 + 8004ca6: 687b ldr r3, [r7, #4] + 8004ca8: 685b ldr r3, [r3, #4] + 8004caa: 2b00 cmp r3, #0 + 8004cac: d168 bne.n 8004d80 { return HAL_ERROR; - 800435a: 2301 movs r3, #1 - 800435c: e24c b.n 80047f8 + 8004cae: 2301 movs r3, #1 + 8004cb0: e24c b.n 800514c } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 800435e: 687b ldr r3, [r7, #4] - 8004360: 685b ldr r3, [r3, #4] - 8004362: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8004366: d106 bne.n 8004376 - 8004368: 4b80 ldr r3, [pc, #512] @ (800456c ) - 800436a: 681b ldr r3, [r3, #0] - 800436c: 4a7f ldr r2, [pc, #508] @ (800456c ) - 800436e: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 8004372: 6013 str r3, [r2, #0] - 8004374: e02e b.n 80043d4 - 8004376: 687b ldr r3, [r7, #4] - 8004378: 685b ldr r3, [r3, #4] - 800437a: 2b00 cmp r3, #0 - 800437c: d10c bne.n 8004398 - 800437e: 4b7b ldr r3, [pc, #492] @ (800456c ) - 8004380: 681b ldr r3, [r3, #0] - 8004382: 4a7a ldr r2, [pc, #488] @ (800456c ) - 8004384: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 8004388: 6013 str r3, [r2, #0] - 800438a: 4b78 ldr r3, [pc, #480] @ (800456c ) - 800438c: 681b ldr r3, [r3, #0] - 800438e: 4a77 ldr r2, [pc, #476] @ (800456c ) - 8004390: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 8004394: 6013 str r3, [r2, #0] - 8004396: e01d b.n 80043d4 - 8004398: 687b ldr r3, [r7, #4] - 800439a: 685b ldr r3, [r3, #4] - 800439c: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 - 80043a0: d10c bne.n 80043bc - 80043a2: 4b72 ldr r3, [pc, #456] @ (800456c ) - 80043a4: 681b ldr r3, [r3, #0] - 80043a6: 4a71 ldr r2, [pc, #452] @ (800456c ) - 80043a8: f443 2380 orr.w r3, r3, #262144 @ 0x40000 - 80043ac: 6013 str r3, [r2, #0] - 80043ae: 4b6f ldr r3, [pc, #444] @ (800456c ) - 80043b0: 681b ldr r3, [r3, #0] - 80043b2: 4a6e ldr r2, [pc, #440] @ (800456c ) - 80043b4: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 80043b8: 6013 str r3, [r2, #0] - 80043ba: e00b b.n 80043d4 - 80043bc: 4b6b ldr r3, [pc, #428] @ (800456c ) - 80043be: 681b ldr r3, [r3, #0] - 80043c0: 4a6a ldr r2, [pc, #424] @ (800456c ) - 80043c2: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 80043c6: 6013 str r3, [r2, #0] - 80043c8: 4b68 ldr r3, [pc, #416] @ (800456c ) - 80043ca: 681b ldr r3, [r3, #0] - 80043cc: 4a67 ldr r2, [pc, #412] @ (800456c ) - 80043ce: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 80043d2: 6013 str r3, [r2, #0] + 8004cb2: 687b ldr r3, [r7, #4] + 8004cb4: 685b ldr r3, [r3, #4] + 8004cb6: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8004cba: d106 bne.n 8004cca + 8004cbc: 4b80 ldr r3, [pc, #512] @ (8004ec0 ) + 8004cbe: 681b ldr r3, [r3, #0] + 8004cc0: 4a7f ldr r2, [pc, #508] @ (8004ec0 ) + 8004cc2: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8004cc6: 6013 str r3, [r2, #0] + 8004cc8: e02e b.n 8004d28 + 8004cca: 687b ldr r3, [r7, #4] + 8004ccc: 685b ldr r3, [r3, #4] + 8004cce: 2b00 cmp r3, #0 + 8004cd0: d10c bne.n 8004cec + 8004cd2: 4b7b ldr r3, [pc, #492] @ (8004ec0 ) + 8004cd4: 681b ldr r3, [r3, #0] + 8004cd6: 4a7a ldr r2, [pc, #488] @ (8004ec0 ) + 8004cd8: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 8004cdc: 6013 str r3, [r2, #0] + 8004cde: 4b78 ldr r3, [pc, #480] @ (8004ec0 ) + 8004ce0: 681b ldr r3, [r3, #0] + 8004ce2: 4a77 ldr r2, [pc, #476] @ (8004ec0 ) + 8004ce4: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 8004ce8: 6013 str r3, [r2, #0] + 8004cea: e01d b.n 8004d28 + 8004cec: 687b ldr r3, [r7, #4] + 8004cee: 685b ldr r3, [r3, #4] + 8004cf0: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 + 8004cf4: d10c bne.n 8004d10 + 8004cf6: 4b72 ldr r3, [pc, #456] @ (8004ec0 ) + 8004cf8: 681b ldr r3, [r3, #0] + 8004cfa: 4a71 ldr r2, [pc, #452] @ (8004ec0 ) + 8004cfc: f443 2380 orr.w r3, r3, #262144 @ 0x40000 + 8004d00: 6013 str r3, [r2, #0] + 8004d02: 4b6f ldr r3, [pc, #444] @ (8004ec0 ) + 8004d04: 681b ldr r3, [r3, #0] + 8004d06: 4a6e ldr r2, [pc, #440] @ (8004ec0 ) + 8004d08: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8004d0c: 6013 str r3, [r2, #0] + 8004d0e: e00b b.n 8004d28 + 8004d10: 4b6b ldr r3, [pc, #428] @ (8004ec0 ) + 8004d12: 681b ldr r3, [r3, #0] + 8004d14: 4a6a ldr r2, [pc, #424] @ (8004ec0 ) + 8004d16: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 8004d1a: 6013 str r3, [r2, #0] + 8004d1c: 4b68 ldr r3, [pc, #416] @ (8004ec0 ) + 8004d1e: 681b ldr r3, [r3, #0] + 8004d20: 4a67 ldr r2, [pc, #412] @ (8004ec0 ) + 8004d22: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 8004d26: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 80043d4: 687b ldr r3, [r7, #4] - 80043d6: 685b ldr r3, [r3, #4] - 80043d8: 2b00 cmp r3, #0 - 80043da: d013 beq.n 8004404 + 8004d28: 687b ldr r3, [r7, #4] + 8004d2a: 685b ldr r3, [r3, #4] + 8004d2c: 2b00 cmp r3, #0 + 8004d2e: d013 beq.n 8004d58 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80043dc: f7fe f9b4 bl 8002748 - 80043e0: 6138 str r0, [r7, #16] + 8004d30: f7fe f990 bl 8003054 + 8004d34: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 80043e2: e008 b.n 80043f6 + 8004d36: e008 b.n 8004d4a { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 80043e4: f7fe f9b0 bl 8002748 - 80043e8: 4602 mov r2, r0 - 80043ea: 693b ldr r3, [r7, #16] - 80043ec: 1ad3 subs r3, r2, r3 - 80043ee: 2b64 cmp r3, #100 @ 0x64 - 80043f0: d901 bls.n 80043f6 + 8004d38: f7fe f98c bl 8003054 + 8004d3c: 4602 mov r2, r0 + 8004d3e: 693b ldr r3, [r7, #16] + 8004d40: 1ad3 subs r3, r2, r3 + 8004d42: 2b64 cmp r3, #100 @ 0x64 + 8004d44: d901 bls.n 8004d4a { return HAL_TIMEOUT; - 80043f2: 2303 movs r3, #3 - 80043f4: e200 b.n 80047f8 + 8004d46: 2303 movs r3, #3 + 8004d48: e200 b.n 800514c while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 80043f6: 4b5d ldr r3, [pc, #372] @ (800456c ) - 80043f8: 681b ldr r3, [r3, #0] - 80043fa: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 80043fe: 2b00 cmp r3, #0 - 8004400: d0f0 beq.n 80043e4 - 8004402: e014 b.n 800442e + 8004d4a: 4b5d ldr r3, [pc, #372] @ (8004ec0 ) + 8004d4c: 681b ldr r3, [r3, #0] + 8004d4e: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004d52: 2b00 cmp r3, #0 + 8004d54: d0f0 beq.n 8004d38 + 8004d56: e014 b.n 8004d82 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004404: f7fe f9a0 bl 8002748 - 8004408: 6138 str r0, [r7, #16] + 8004d58: f7fe f97c bl 8003054 + 8004d5c: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 800440a: e008 b.n 800441e + 8004d5e: e008 b.n 8004d72 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 800440c: f7fe f99c bl 8002748 - 8004410: 4602 mov r2, r0 - 8004412: 693b ldr r3, [r7, #16] - 8004414: 1ad3 subs r3, r2, r3 - 8004416: 2b64 cmp r3, #100 @ 0x64 - 8004418: d901 bls.n 800441e + 8004d60: f7fe f978 bl 8003054 + 8004d64: 4602 mov r2, r0 + 8004d66: 693b ldr r3, [r7, #16] + 8004d68: 1ad3 subs r3, r2, r3 + 8004d6a: 2b64 cmp r3, #100 @ 0x64 + 8004d6c: d901 bls.n 8004d72 { return HAL_TIMEOUT; - 800441a: 2303 movs r3, #3 - 800441c: e1ec b.n 80047f8 + 8004d6e: 2303 movs r3, #3 + 8004d70: e1ec b.n 800514c while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 800441e: 4b53 ldr r3, [pc, #332] @ (800456c ) - 8004420: 681b ldr r3, [r3, #0] - 8004422: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8004426: 2b00 cmp r3, #0 - 8004428: d1f0 bne.n 800440c - 800442a: e000 b.n 800442e + 8004d72: 4b53 ldr r3, [pc, #332] @ (8004ec0 ) + 8004d74: 681b ldr r3, [r3, #0] + 8004d76: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004d7a: 2b00 cmp r3, #0 + 8004d7c: d1f0 bne.n 8004d60 + 8004d7e: e000 b.n 8004d82 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 800442c: bf00 nop + 8004d80: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 800442e: 687b ldr r3, [r7, #4] - 8004430: 681b ldr r3, [r3, #0] - 8004432: f003 0302 and.w r3, r3, #2 - 8004436: 2b00 cmp r3, #0 - 8004438: d063 beq.n 8004502 + 8004d82: 687b ldr r3, [r7, #4] + 8004d84: 681b ldr r3, [r3, #0] + 8004d86: f003 0302 and.w r3, r3, #2 + 8004d8a: 2b00 cmp r3, #0 + 8004d8c: d063 beq.n 8004e56 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 800443a: 4b4c ldr r3, [pc, #304] @ (800456c ) - 800443c: 685b ldr r3, [r3, #4] - 800443e: f003 030c and.w r3, r3, #12 - 8004442: 2b00 cmp r3, #0 - 8004444: d00b beq.n 800445e + 8004d8e: 4b4c ldr r3, [pc, #304] @ (8004ec0 ) + 8004d90: 685b ldr r3, [r3, #4] + 8004d92: f003 030c and.w r3, r3, #12 + 8004d96: 2b00 cmp r3, #0 + 8004d98: d00b beq.n 8004db2 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) - 8004446: 4b49 ldr r3, [pc, #292] @ (800456c ) - 8004448: 685b ldr r3, [r3, #4] - 800444a: f003 030c and.w r3, r3, #12 - 800444e: 2b08 cmp r3, #8 - 8004450: d11c bne.n 800448c - 8004452: 4b46 ldr r3, [pc, #280] @ (800456c ) - 8004454: 685b ldr r3, [r3, #4] - 8004456: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 800445a: 2b00 cmp r3, #0 - 800445c: d116 bne.n 800448c + 8004d9a: 4b49 ldr r3, [pc, #292] @ (8004ec0 ) + 8004d9c: 685b ldr r3, [r3, #4] + 8004d9e: f003 030c and.w r3, r3, #12 + 8004da2: 2b08 cmp r3, #8 + 8004da4: d11c bne.n 8004de0 + 8004da6: 4b46 ldr r3, [pc, #280] @ (8004ec0 ) + 8004da8: 685b ldr r3, [r3, #4] + 8004daa: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8004dae: 2b00 cmp r3, #0 + 8004db0: d116 bne.n 8004de0 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 800445e: 4b43 ldr r3, [pc, #268] @ (800456c ) - 8004460: 681b ldr r3, [r3, #0] - 8004462: f003 0302 and.w r3, r3, #2 - 8004466: 2b00 cmp r3, #0 - 8004468: d005 beq.n 8004476 - 800446a: 687b ldr r3, [r7, #4] - 800446c: 691b ldr r3, [r3, #16] - 800446e: 2b01 cmp r3, #1 - 8004470: d001 beq.n 8004476 + 8004db2: 4b43 ldr r3, [pc, #268] @ (8004ec0 ) + 8004db4: 681b ldr r3, [r3, #0] + 8004db6: f003 0302 and.w r3, r3, #2 + 8004dba: 2b00 cmp r3, #0 + 8004dbc: d005 beq.n 8004dca + 8004dbe: 687b ldr r3, [r7, #4] + 8004dc0: 691b ldr r3, [r3, #16] + 8004dc2: 2b01 cmp r3, #1 + 8004dc4: d001 beq.n 8004dca { return HAL_ERROR; - 8004472: 2301 movs r3, #1 - 8004474: e1c0 b.n 80047f8 + 8004dc6: 2301 movs r3, #1 + 8004dc8: e1c0 b.n 800514c } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8004476: 4b3d ldr r3, [pc, #244] @ (800456c ) - 8004478: 681b ldr r3, [r3, #0] - 800447a: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 800447e: 687b ldr r3, [r7, #4] - 8004480: 695b ldr r3, [r3, #20] - 8004482: 00db lsls r3, r3, #3 - 8004484: 4939 ldr r1, [pc, #228] @ (800456c ) - 8004486: 4313 orrs r3, r2 - 8004488: 600b str r3, [r1, #0] + 8004dca: 4b3d ldr r3, [pc, #244] @ (8004ec0 ) + 8004dcc: 681b ldr r3, [r3, #0] + 8004dce: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 8004dd2: 687b ldr r3, [r7, #4] + 8004dd4: 695b ldr r3, [r3, #20] + 8004dd6: 00db lsls r3, r3, #3 + 8004dd8: 4939 ldr r1, [pc, #228] @ (8004ec0 ) + 8004dda: 4313 orrs r3, r2 + 8004ddc: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 800448a: e03a b.n 8004502 + 8004dde: e03a b.n 8004e56 } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 800448c: 687b ldr r3, [r7, #4] - 800448e: 691b ldr r3, [r3, #16] - 8004490: 2b00 cmp r3, #0 - 8004492: d020 beq.n 80044d6 + 8004de0: 687b ldr r3, [r7, #4] + 8004de2: 691b ldr r3, [r3, #16] + 8004de4: 2b00 cmp r3, #0 + 8004de6: d020 beq.n 8004e2a { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 8004494: 4b36 ldr r3, [pc, #216] @ (8004570 ) - 8004496: 2201 movs r2, #1 - 8004498: 601a str r2, [r3, #0] + 8004de8: 4b36 ldr r3, [pc, #216] @ (8004ec4 ) + 8004dea: 2201 movs r2, #1 + 8004dec: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800449a: f7fe f955 bl 8002748 - 800449e: 6138 str r0, [r7, #16] + 8004dee: f7fe f931 bl 8003054 + 8004df2: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80044a0: e008 b.n 80044b4 + 8004df4: e008 b.n 8004e08 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 80044a2: f7fe f951 bl 8002748 - 80044a6: 4602 mov r2, r0 - 80044a8: 693b ldr r3, [r7, #16] - 80044aa: 1ad3 subs r3, r2, r3 - 80044ac: 2b02 cmp r3, #2 - 80044ae: d901 bls.n 80044b4 + 8004df6: f7fe f92d bl 8003054 + 8004dfa: 4602 mov r2, r0 + 8004dfc: 693b ldr r3, [r7, #16] + 8004dfe: 1ad3 subs r3, r2, r3 + 8004e00: 2b02 cmp r3, #2 + 8004e02: d901 bls.n 8004e08 { return HAL_TIMEOUT; - 80044b0: 2303 movs r3, #3 - 80044b2: e1a1 b.n 80047f8 + 8004e04: 2303 movs r3, #3 + 8004e06: e1a1 b.n 800514c while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80044b4: 4b2d ldr r3, [pc, #180] @ (800456c ) - 80044b6: 681b ldr r3, [r3, #0] - 80044b8: f003 0302 and.w r3, r3, #2 - 80044bc: 2b00 cmp r3, #0 - 80044be: d0f0 beq.n 80044a2 + 8004e08: 4b2d ldr r3, [pc, #180] @ (8004ec0 ) + 8004e0a: 681b ldr r3, [r3, #0] + 8004e0c: f003 0302 and.w r3, r3, #2 + 8004e10: 2b00 cmp r3, #0 + 8004e12: d0f0 beq.n 8004df6 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80044c0: 4b2a ldr r3, [pc, #168] @ (800456c ) - 80044c2: 681b ldr r3, [r3, #0] - 80044c4: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 80044c8: 687b ldr r3, [r7, #4] - 80044ca: 695b ldr r3, [r3, #20] - 80044cc: 00db lsls r3, r3, #3 - 80044ce: 4927 ldr r1, [pc, #156] @ (800456c ) - 80044d0: 4313 orrs r3, r2 - 80044d2: 600b str r3, [r1, #0] - 80044d4: e015 b.n 8004502 + 8004e14: 4b2a ldr r3, [pc, #168] @ (8004ec0 ) + 8004e16: 681b ldr r3, [r3, #0] + 8004e18: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 8004e1c: 687b ldr r3, [r7, #4] + 8004e1e: 695b ldr r3, [r3, #20] + 8004e20: 00db lsls r3, r3, #3 + 8004e22: 4927 ldr r1, [pc, #156] @ (8004ec0 ) + 8004e24: 4313 orrs r3, r2 + 8004e26: 600b str r3, [r1, #0] + 8004e28: e015 b.n 8004e56 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 80044d6: 4b26 ldr r3, [pc, #152] @ (8004570 ) - 80044d8: 2200 movs r2, #0 - 80044da: 601a str r2, [r3, #0] + 8004e2a: 4b26 ldr r3, [pc, #152] @ (8004ec4 ) + 8004e2c: 2200 movs r2, #0 + 8004e2e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80044dc: f7fe f934 bl 8002748 - 80044e0: 6138 str r0, [r7, #16] + 8004e30: f7fe f910 bl 8003054 + 8004e34: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80044e2: e008 b.n 80044f6 + 8004e36: e008 b.n 8004e4a { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 80044e4: f7fe f930 bl 8002748 - 80044e8: 4602 mov r2, r0 - 80044ea: 693b ldr r3, [r7, #16] - 80044ec: 1ad3 subs r3, r2, r3 - 80044ee: 2b02 cmp r3, #2 - 80044f0: d901 bls.n 80044f6 + 8004e38: f7fe f90c bl 8003054 + 8004e3c: 4602 mov r2, r0 + 8004e3e: 693b ldr r3, [r7, #16] + 8004e40: 1ad3 subs r3, r2, r3 + 8004e42: 2b02 cmp r3, #2 + 8004e44: d901 bls.n 8004e4a { return HAL_TIMEOUT; - 80044f2: 2303 movs r3, #3 - 80044f4: e180 b.n 80047f8 + 8004e46: 2303 movs r3, #3 + 8004e48: e180 b.n 800514c while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80044f6: 4b1d ldr r3, [pc, #116] @ (800456c ) - 80044f8: 681b ldr r3, [r3, #0] - 80044fa: f003 0302 and.w r3, r3, #2 - 80044fe: 2b00 cmp r3, #0 - 8004500: d1f0 bne.n 80044e4 + 8004e4a: 4b1d ldr r3, [pc, #116] @ (8004ec0 ) + 8004e4c: 681b ldr r3, [r3, #0] + 8004e4e: f003 0302 and.w r3, r3, #2 + 8004e52: 2b00 cmp r3, #0 + 8004e54: d1f0 bne.n 8004e38 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8004502: 687b ldr r3, [r7, #4] - 8004504: 681b ldr r3, [r3, #0] - 8004506: f003 0308 and.w r3, r3, #8 - 800450a: 2b00 cmp r3, #0 - 800450c: d03a beq.n 8004584 + 8004e56: 687b ldr r3, [r7, #4] + 8004e58: 681b ldr r3, [r3, #0] + 8004e5a: f003 0308 and.w r3, r3, #8 + 8004e5e: 2b00 cmp r3, #0 + 8004e60: d03a beq.n 8004ed8 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 800450e: 687b ldr r3, [r7, #4] - 8004510: 699b ldr r3, [r3, #24] - 8004512: 2b00 cmp r3, #0 - 8004514: d019 beq.n 800454a + 8004e62: 687b ldr r3, [r7, #4] + 8004e64: 699b ldr r3, [r3, #24] + 8004e66: 2b00 cmp r3, #0 + 8004e68: d019 beq.n 8004e9e { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 8004516: 4b17 ldr r3, [pc, #92] @ (8004574 ) - 8004518: 2201 movs r2, #1 - 800451a: 601a str r2, [r3, #0] + 8004e6a: 4b17 ldr r3, [pc, #92] @ (8004ec8 ) + 8004e6c: 2201 movs r2, #1 + 8004e6e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800451c: f7fe f914 bl 8002748 - 8004520: 6138 str r0, [r7, #16] + 8004e70: f7fe f8f0 bl 8003054 + 8004e74: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8004522: e008 b.n 8004536 + 8004e76: e008 b.n 8004e8a { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 8004524: f7fe f910 bl 8002748 - 8004528: 4602 mov r2, r0 - 800452a: 693b ldr r3, [r7, #16] - 800452c: 1ad3 subs r3, r2, r3 - 800452e: 2b02 cmp r3, #2 - 8004530: d901 bls.n 8004536 + 8004e78: f7fe f8ec bl 8003054 + 8004e7c: 4602 mov r2, r0 + 8004e7e: 693b ldr r3, [r7, #16] + 8004e80: 1ad3 subs r3, r2, r3 + 8004e82: 2b02 cmp r3, #2 + 8004e84: d901 bls.n 8004e8a { return HAL_TIMEOUT; - 8004532: 2303 movs r3, #3 - 8004534: e160 b.n 80047f8 + 8004e86: 2303 movs r3, #3 + 8004e88: e160 b.n 800514c while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8004536: 4b0d ldr r3, [pc, #52] @ (800456c ) - 8004538: 6a5b ldr r3, [r3, #36] @ 0x24 - 800453a: f003 0302 and.w r3, r3, #2 - 800453e: 2b00 cmp r3, #0 - 8004540: d0f0 beq.n 8004524 + 8004e8a: 4b0d ldr r3, [pc, #52] @ (8004ec0 ) + 8004e8c: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004e8e: f003 0302 and.w r3, r3, #2 + 8004e92: 2b00 cmp r3, #0 + 8004e94: d0f0 beq.n 8004e78 } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); - 8004542: 2001 movs r0, #1 - 8004544: f000 fad0 bl 8004ae8 - 8004548: e01c b.n 8004584 + 8004e96: 2001 movs r0, #1 + 8004e98: f000 fad0 bl 800543c + 8004e9c: e01c b.n 8004ed8 } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 800454a: 4b0a ldr r3, [pc, #40] @ (8004574 ) - 800454c: 2200 movs r2, #0 - 800454e: 601a str r2, [r3, #0] + 8004e9e: 4b0a ldr r3, [pc, #40] @ (8004ec8 ) + 8004ea0: 2200 movs r2, #0 + 8004ea2: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004550: f7fe f8fa bl 8002748 - 8004554: 6138 str r0, [r7, #16] + 8004ea4: f7fe f8d6 bl 8003054 + 8004ea8: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8004556: e00f b.n 8004578 + 8004eaa: e00f b.n 8004ecc { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 8004558: f7fe f8f6 bl 8002748 - 800455c: 4602 mov r2, r0 - 800455e: 693b ldr r3, [r7, #16] - 8004560: 1ad3 subs r3, r2, r3 - 8004562: 2b02 cmp r3, #2 - 8004564: d908 bls.n 8004578 + 8004eac: f7fe f8d2 bl 8003054 + 8004eb0: 4602 mov r2, r0 + 8004eb2: 693b ldr r3, [r7, #16] + 8004eb4: 1ad3 subs r3, r2, r3 + 8004eb6: 2b02 cmp r3, #2 + 8004eb8: d908 bls.n 8004ecc { return HAL_TIMEOUT; - 8004566: 2303 movs r3, #3 - 8004568: e146 b.n 80047f8 - 800456a: bf00 nop - 800456c: 40021000 .word 0x40021000 - 8004570: 42420000 .word 0x42420000 - 8004574: 42420480 .word 0x42420480 + 8004eba: 2303 movs r3, #3 + 8004ebc: e146 b.n 800514c + 8004ebe: bf00 nop + 8004ec0: 40021000 .word 0x40021000 + 8004ec4: 42420000 .word 0x42420000 + 8004ec8: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8004578: 4b92 ldr r3, [pc, #584] @ (80047c4 ) - 800457a: 6a5b ldr r3, [r3, #36] @ 0x24 - 800457c: f003 0302 and.w r3, r3, #2 - 8004580: 2b00 cmp r3, #0 - 8004582: d1e9 bne.n 8004558 + 8004ecc: 4b92 ldr r3, [pc, #584] @ (8005118 ) + 8004ece: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004ed0: f003 0302 and.w r3, r3, #2 + 8004ed4: 2b00 cmp r3, #0 + 8004ed6: d1e9 bne.n 8004eac } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 8004584: 687b ldr r3, [r7, #4] - 8004586: 681b ldr r3, [r3, #0] - 8004588: f003 0304 and.w r3, r3, #4 - 800458c: 2b00 cmp r3, #0 - 800458e: f000 80a6 beq.w 80046de + 8004ed8: 687b ldr r3, [r7, #4] + 8004eda: 681b ldr r3, [r3, #0] + 8004edc: f003 0304 and.w r3, r3, #4 + 8004ee0: 2b00 cmp r3, #0 + 8004ee2: f000 80a6 beq.w 8005032 { FlagStatus pwrclkchanged = RESET; - 8004592: 2300 movs r3, #0 - 8004594: 75fb strb r3, [r7, #23] + 8004ee6: 2300 movs r3, #0 + 8004ee8: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8004596: 4b8b ldr r3, [pc, #556] @ (80047c4 ) - 8004598: 69db ldr r3, [r3, #28] - 800459a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 800459e: 2b00 cmp r3, #0 - 80045a0: d10d bne.n 80045be + 8004eea: 4b8b ldr r3, [pc, #556] @ (8005118 ) + 8004eec: 69db ldr r3, [r3, #28] + 8004eee: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8004ef2: 2b00 cmp r3, #0 + 8004ef4: d10d bne.n 8004f12 { __HAL_RCC_PWR_CLK_ENABLE(); - 80045a2: 4b88 ldr r3, [pc, #544] @ (80047c4 ) - 80045a4: 69db ldr r3, [r3, #28] - 80045a6: 4a87 ldr r2, [pc, #540] @ (80047c4 ) - 80045a8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 80045ac: 61d3 str r3, [r2, #28] - 80045ae: 4b85 ldr r3, [pc, #532] @ (80047c4 ) - 80045b0: 69db ldr r3, [r3, #28] - 80045b2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 80045b6: 60bb str r3, [r7, #8] - 80045b8: 68bb ldr r3, [r7, #8] + 8004ef6: 4b88 ldr r3, [pc, #544] @ (8005118 ) + 8004ef8: 69db ldr r3, [r3, #28] + 8004efa: 4a87 ldr r2, [pc, #540] @ (8005118 ) + 8004efc: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8004f00: 61d3 str r3, [r2, #28] + 8004f02: 4b85 ldr r3, [pc, #532] @ (8005118 ) + 8004f04: 69db ldr r3, [r3, #28] + 8004f06: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8004f0a: 60bb str r3, [r7, #8] + 8004f0c: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 80045ba: 2301 movs r3, #1 - 80045bc: 75fb strb r3, [r7, #23] + 8004f0e: 2301 movs r3, #1 + 8004f10: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80045be: 4b82 ldr r3, [pc, #520] @ (80047c8 ) - 80045c0: 681b ldr r3, [r3, #0] - 80045c2: f403 7380 and.w r3, r3, #256 @ 0x100 - 80045c6: 2b00 cmp r3, #0 - 80045c8: d118 bne.n 80045fc + 8004f12: 4b82 ldr r3, [pc, #520] @ (800511c ) + 8004f14: 681b ldr r3, [r3, #0] + 8004f16: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004f1a: 2b00 cmp r3, #0 + 8004f1c: d118 bne.n 8004f50 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 80045ca: 4b7f ldr r3, [pc, #508] @ (80047c8 ) - 80045cc: 681b ldr r3, [r3, #0] - 80045ce: 4a7e ldr r2, [pc, #504] @ (80047c8 ) - 80045d0: f443 7380 orr.w r3, r3, #256 @ 0x100 - 80045d4: 6013 str r3, [r2, #0] + 8004f1e: 4b7f ldr r3, [pc, #508] @ (800511c ) + 8004f20: 681b ldr r3, [r3, #0] + 8004f22: 4a7e ldr r2, [pc, #504] @ (800511c ) + 8004f24: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8004f28: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 80045d6: f7fe f8b7 bl 8002748 - 80045da: 6138 str r0, [r7, #16] + 8004f2a: f7fe f893 bl 8003054 + 8004f2e: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80045dc: e008 b.n 80045f0 + 8004f30: e008 b.n 8004f44 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 80045de: f7fe f8b3 bl 8002748 - 80045e2: 4602 mov r2, r0 - 80045e4: 693b ldr r3, [r7, #16] - 80045e6: 1ad3 subs r3, r2, r3 - 80045e8: 2b64 cmp r3, #100 @ 0x64 - 80045ea: d901 bls.n 80045f0 + 8004f32: f7fe f88f bl 8003054 + 8004f36: 4602 mov r2, r0 + 8004f38: 693b ldr r3, [r7, #16] + 8004f3a: 1ad3 subs r3, r2, r3 + 8004f3c: 2b64 cmp r3, #100 @ 0x64 + 8004f3e: d901 bls.n 8004f44 { return HAL_TIMEOUT; - 80045ec: 2303 movs r3, #3 - 80045ee: e103 b.n 80047f8 + 8004f40: 2303 movs r3, #3 + 8004f42: e103 b.n 800514c while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80045f0: 4b75 ldr r3, [pc, #468] @ (80047c8 ) - 80045f2: 681b ldr r3, [r3, #0] - 80045f4: f403 7380 and.w r3, r3, #256 @ 0x100 - 80045f8: 2b00 cmp r3, #0 - 80045fa: d0f0 beq.n 80045de + 8004f44: 4b75 ldr r3, [pc, #468] @ (800511c ) + 8004f46: 681b ldr r3, [r3, #0] + 8004f48: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004f4c: 2b00 cmp r3, #0 + 8004f4e: d0f0 beq.n 8004f32 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 80045fc: 687b ldr r3, [r7, #4] - 80045fe: 68db ldr r3, [r3, #12] - 8004600: 2b01 cmp r3, #1 - 8004602: d106 bne.n 8004612 - 8004604: 4b6f ldr r3, [pc, #444] @ (80047c4 ) - 8004606: 6a1b ldr r3, [r3, #32] - 8004608: 4a6e ldr r2, [pc, #440] @ (80047c4 ) - 800460a: f043 0301 orr.w r3, r3, #1 - 800460e: 6213 str r3, [r2, #32] - 8004610: e02d b.n 800466e - 8004612: 687b ldr r3, [r7, #4] - 8004614: 68db ldr r3, [r3, #12] - 8004616: 2b00 cmp r3, #0 - 8004618: d10c bne.n 8004634 - 800461a: 4b6a ldr r3, [pc, #424] @ (80047c4 ) - 800461c: 6a1b ldr r3, [r3, #32] - 800461e: 4a69 ldr r2, [pc, #420] @ (80047c4 ) - 8004620: f023 0301 bic.w r3, r3, #1 - 8004624: 6213 str r3, [r2, #32] - 8004626: 4b67 ldr r3, [pc, #412] @ (80047c4 ) - 8004628: 6a1b ldr r3, [r3, #32] - 800462a: 4a66 ldr r2, [pc, #408] @ (80047c4 ) - 800462c: f023 0304 bic.w r3, r3, #4 - 8004630: 6213 str r3, [r2, #32] - 8004632: e01c b.n 800466e - 8004634: 687b ldr r3, [r7, #4] - 8004636: 68db ldr r3, [r3, #12] - 8004638: 2b05 cmp r3, #5 - 800463a: d10c bne.n 8004656 - 800463c: 4b61 ldr r3, [pc, #388] @ (80047c4 ) - 800463e: 6a1b ldr r3, [r3, #32] - 8004640: 4a60 ldr r2, [pc, #384] @ (80047c4 ) - 8004642: f043 0304 orr.w r3, r3, #4 - 8004646: 6213 str r3, [r2, #32] - 8004648: 4b5e ldr r3, [pc, #376] @ (80047c4 ) - 800464a: 6a1b ldr r3, [r3, #32] - 800464c: 4a5d ldr r2, [pc, #372] @ (80047c4 ) - 800464e: f043 0301 orr.w r3, r3, #1 - 8004652: 6213 str r3, [r2, #32] - 8004654: e00b b.n 800466e - 8004656: 4b5b ldr r3, [pc, #364] @ (80047c4 ) - 8004658: 6a1b ldr r3, [r3, #32] - 800465a: 4a5a ldr r2, [pc, #360] @ (80047c4 ) - 800465c: f023 0301 bic.w r3, r3, #1 - 8004660: 6213 str r3, [r2, #32] - 8004662: 4b58 ldr r3, [pc, #352] @ (80047c4 ) - 8004664: 6a1b ldr r3, [r3, #32] - 8004666: 4a57 ldr r2, [pc, #348] @ (80047c4 ) - 8004668: f023 0304 bic.w r3, r3, #4 - 800466c: 6213 str r3, [r2, #32] + 8004f50: 687b ldr r3, [r7, #4] + 8004f52: 68db ldr r3, [r3, #12] + 8004f54: 2b01 cmp r3, #1 + 8004f56: d106 bne.n 8004f66 + 8004f58: 4b6f ldr r3, [pc, #444] @ (8005118 ) + 8004f5a: 6a1b ldr r3, [r3, #32] + 8004f5c: 4a6e ldr r2, [pc, #440] @ (8005118 ) + 8004f5e: f043 0301 orr.w r3, r3, #1 + 8004f62: 6213 str r3, [r2, #32] + 8004f64: e02d b.n 8004fc2 + 8004f66: 687b ldr r3, [r7, #4] + 8004f68: 68db ldr r3, [r3, #12] + 8004f6a: 2b00 cmp r3, #0 + 8004f6c: d10c bne.n 8004f88 + 8004f6e: 4b6a ldr r3, [pc, #424] @ (8005118 ) + 8004f70: 6a1b ldr r3, [r3, #32] + 8004f72: 4a69 ldr r2, [pc, #420] @ (8005118 ) + 8004f74: f023 0301 bic.w r3, r3, #1 + 8004f78: 6213 str r3, [r2, #32] + 8004f7a: 4b67 ldr r3, [pc, #412] @ (8005118 ) + 8004f7c: 6a1b ldr r3, [r3, #32] + 8004f7e: 4a66 ldr r2, [pc, #408] @ (8005118 ) + 8004f80: f023 0304 bic.w r3, r3, #4 + 8004f84: 6213 str r3, [r2, #32] + 8004f86: e01c b.n 8004fc2 + 8004f88: 687b ldr r3, [r7, #4] + 8004f8a: 68db ldr r3, [r3, #12] + 8004f8c: 2b05 cmp r3, #5 + 8004f8e: d10c bne.n 8004faa + 8004f90: 4b61 ldr r3, [pc, #388] @ (8005118 ) + 8004f92: 6a1b ldr r3, [r3, #32] + 8004f94: 4a60 ldr r2, [pc, #384] @ (8005118 ) + 8004f96: f043 0304 orr.w r3, r3, #4 + 8004f9a: 6213 str r3, [r2, #32] + 8004f9c: 4b5e ldr r3, [pc, #376] @ (8005118 ) + 8004f9e: 6a1b ldr r3, [r3, #32] + 8004fa0: 4a5d ldr r2, [pc, #372] @ (8005118 ) + 8004fa2: f043 0301 orr.w r3, r3, #1 + 8004fa6: 6213 str r3, [r2, #32] + 8004fa8: e00b b.n 8004fc2 + 8004faa: 4b5b ldr r3, [pc, #364] @ (8005118 ) + 8004fac: 6a1b ldr r3, [r3, #32] + 8004fae: 4a5a ldr r2, [pc, #360] @ (8005118 ) + 8004fb0: f023 0301 bic.w r3, r3, #1 + 8004fb4: 6213 str r3, [r2, #32] + 8004fb6: 4b58 ldr r3, [pc, #352] @ (8005118 ) + 8004fb8: 6a1b ldr r3, [r3, #32] + 8004fba: 4a57 ldr r2, [pc, #348] @ (8005118 ) + 8004fbc: f023 0304 bic.w r3, r3, #4 + 8004fc0: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 800466e: 687b ldr r3, [r7, #4] - 8004670: 68db ldr r3, [r3, #12] - 8004672: 2b00 cmp r3, #0 - 8004674: d015 beq.n 80046a2 + 8004fc2: 687b ldr r3, [r7, #4] + 8004fc4: 68db ldr r3, [r3, #12] + 8004fc6: 2b00 cmp r3, #0 + 8004fc8: d015 beq.n 8004ff6 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004676: f7fe f867 bl 8002748 - 800467a: 6138 str r0, [r7, #16] + 8004fca: f7fe f843 bl 8003054 + 8004fce: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 800467c: e00a b.n 8004694 + 8004fd0: e00a b.n 8004fe8 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 800467e: f7fe f863 bl 8002748 - 8004682: 4602 mov r2, r0 - 8004684: 693b ldr r3, [r7, #16] - 8004686: 1ad3 subs r3, r2, r3 - 8004688: f241 3288 movw r2, #5000 @ 0x1388 - 800468c: 4293 cmp r3, r2 - 800468e: d901 bls.n 8004694 + 8004fd2: f7fe f83f bl 8003054 + 8004fd6: 4602 mov r2, r0 + 8004fd8: 693b ldr r3, [r7, #16] + 8004fda: 1ad3 subs r3, r2, r3 + 8004fdc: f241 3288 movw r2, #5000 @ 0x1388 + 8004fe0: 4293 cmp r3, r2 + 8004fe2: d901 bls.n 8004fe8 { return HAL_TIMEOUT; - 8004690: 2303 movs r3, #3 - 8004692: e0b1 b.n 80047f8 + 8004fe4: 2303 movs r3, #3 + 8004fe6: e0b1 b.n 800514c while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8004694: 4b4b ldr r3, [pc, #300] @ (80047c4 ) - 8004696: 6a1b ldr r3, [r3, #32] - 8004698: f003 0302 and.w r3, r3, #2 - 800469c: 2b00 cmp r3, #0 - 800469e: d0ee beq.n 800467e - 80046a0: e014 b.n 80046cc + 8004fe8: 4b4b ldr r3, [pc, #300] @ (8005118 ) + 8004fea: 6a1b ldr r3, [r3, #32] + 8004fec: f003 0302 and.w r3, r3, #2 + 8004ff0: 2b00 cmp r3, #0 + 8004ff2: d0ee beq.n 8004fd2 + 8004ff4: e014 b.n 8005020 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80046a2: f7fe f851 bl 8002748 - 80046a6: 6138 str r0, [r7, #16] + 8004ff6: f7fe f82d bl 8003054 + 8004ffa: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 80046a8: e00a b.n 80046c0 + 8004ffc: e00a b.n 8005014 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 80046aa: f7fe f84d bl 8002748 - 80046ae: 4602 mov r2, r0 - 80046b0: 693b ldr r3, [r7, #16] - 80046b2: 1ad3 subs r3, r2, r3 - 80046b4: f241 3288 movw r2, #5000 @ 0x1388 - 80046b8: 4293 cmp r3, r2 - 80046ba: d901 bls.n 80046c0 + 8004ffe: f7fe f829 bl 8003054 + 8005002: 4602 mov r2, r0 + 8005004: 693b ldr r3, [r7, #16] + 8005006: 1ad3 subs r3, r2, r3 + 8005008: f241 3288 movw r2, #5000 @ 0x1388 + 800500c: 4293 cmp r3, r2 + 800500e: d901 bls.n 8005014 { return HAL_TIMEOUT; - 80046bc: 2303 movs r3, #3 - 80046be: e09b b.n 80047f8 + 8005010: 2303 movs r3, #3 + 8005012: e09b b.n 800514c while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 80046c0: 4b40 ldr r3, [pc, #256] @ (80047c4 ) - 80046c2: 6a1b ldr r3, [r3, #32] - 80046c4: f003 0302 and.w r3, r3, #2 - 80046c8: 2b00 cmp r3, #0 - 80046ca: d1ee bne.n 80046aa + 8005014: 4b40 ldr r3, [pc, #256] @ (8005118 ) + 8005016: 6a1b ldr r3, [r3, #32] + 8005018: f003 0302 and.w r3, r3, #2 + 800501c: 2b00 cmp r3, #0 + 800501e: d1ee bne.n 8004ffe } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) - 80046cc: 7dfb ldrb r3, [r7, #23] - 80046ce: 2b01 cmp r3, #1 - 80046d0: d105 bne.n 80046de + 8005020: 7dfb ldrb r3, [r7, #23] + 8005022: 2b01 cmp r3, #1 + 8005024: d105 bne.n 8005032 { __HAL_RCC_PWR_CLK_DISABLE(); - 80046d2: 4b3c ldr r3, [pc, #240] @ (80047c4 ) - 80046d4: 69db ldr r3, [r3, #28] - 80046d6: 4a3b ldr r2, [pc, #236] @ (80047c4 ) - 80046d8: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 80046dc: 61d3 str r3, [r2, #28] + 8005026: 4b3c ldr r3, [pc, #240] @ (8005118 ) + 8005028: 69db ldr r3, [r3, #28] + 800502a: 4a3b ldr r2, [pc, #236] @ (8005118 ) + 800502c: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 8005030: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 80046de: 687b ldr r3, [r7, #4] - 80046e0: 69db ldr r3, [r3, #28] - 80046e2: 2b00 cmp r3, #0 - 80046e4: f000 8087 beq.w 80047f6 + 8005032: 687b ldr r3, [r7, #4] + 8005034: 69db ldr r3, [r3, #28] + 8005036: 2b00 cmp r3, #0 + 8005038: f000 8087 beq.w 800514a { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 80046e8: 4b36 ldr r3, [pc, #216] @ (80047c4 ) - 80046ea: 685b ldr r3, [r3, #4] - 80046ec: f003 030c and.w r3, r3, #12 - 80046f0: 2b08 cmp r3, #8 - 80046f2: d061 beq.n 80047b8 + 800503c: 4b36 ldr r3, [pc, #216] @ (8005118 ) + 800503e: 685b ldr r3, [r3, #4] + 8005040: f003 030c and.w r3, r3, #12 + 8005044: 2b08 cmp r3, #8 + 8005046: d061 beq.n 800510c { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 80046f4: 687b ldr r3, [r7, #4] - 80046f6: 69db ldr r3, [r3, #28] - 80046f8: 2b02 cmp r3, #2 - 80046fa: d146 bne.n 800478a + 8005048: 687b ldr r3, [r7, #4] + 800504a: 69db ldr r3, [r3, #28] + 800504c: 2b02 cmp r3, #2 + 800504e: d146 bne.n 80050de /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 80046fc: 4b33 ldr r3, [pc, #204] @ (80047cc ) - 80046fe: 2200 movs r2, #0 - 8004700: 601a str r2, [r3, #0] + 8005050: 4b33 ldr r3, [pc, #204] @ (8005120 ) + 8005052: 2200 movs r2, #0 + 8005054: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004702: f7fe f821 bl 8002748 - 8004706: 6138 str r0, [r7, #16] + 8005056: f7fd fffd bl 8003054 + 800505a: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8004708: e008 b.n 800471c + 800505c: e008 b.n 8005070 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 800470a: f7fe f81d bl 8002748 - 800470e: 4602 mov r2, r0 - 8004710: 693b ldr r3, [r7, #16] - 8004712: 1ad3 subs r3, r2, r3 - 8004714: 2b02 cmp r3, #2 - 8004716: d901 bls.n 800471c + 800505e: f7fd fff9 bl 8003054 + 8005062: 4602 mov r2, r0 + 8005064: 693b ldr r3, [r7, #16] + 8005066: 1ad3 subs r3, r2, r3 + 8005068: 2b02 cmp r3, #2 + 800506a: d901 bls.n 8005070 { return HAL_TIMEOUT; - 8004718: 2303 movs r3, #3 - 800471a: e06d b.n 80047f8 + 800506c: 2303 movs r3, #3 + 800506e: e06d b.n 800514c while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 800471c: 4b29 ldr r3, [pc, #164] @ (80047c4 ) - 800471e: 681b ldr r3, [r3, #0] - 8004720: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8004724: 2b00 cmp r3, #0 - 8004726: d1f0 bne.n 800470a + 8005070: 4b29 ldr r3, [pc, #164] @ (8005118 ) + 8005072: 681b ldr r3, [r3, #0] + 8005074: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8005078: 2b00 cmp r3, #0 + 800507a: d1f0 bne.n 800505e } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) - 8004728: 687b ldr r3, [r7, #4] - 800472a: 6a1b ldr r3, [r3, #32] - 800472c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8004730: d108 bne.n 8004744 + 800507c: 687b ldr r3, [r7, #4] + 800507e: 6a1b ldr r3, [r3, #32] + 8005080: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8005084: d108 bne.n 8005098 /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); - 8004732: 4b24 ldr r3, [pc, #144] @ (80047c4 ) - 8004734: 685b ldr r3, [r3, #4] - 8004736: f423 3200 bic.w r2, r3, #131072 @ 0x20000 - 800473a: 687b ldr r3, [r7, #4] - 800473c: 689b ldr r3, [r3, #8] - 800473e: 4921 ldr r1, [pc, #132] @ (80047c4 ) - 8004740: 4313 orrs r3, r2 - 8004742: 604b str r3, [r1, #4] + 8005086: 4b24 ldr r3, [pc, #144] @ (8005118 ) + 8005088: 685b ldr r3, [r3, #4] + 800508a: f423 3200 bic.w r2, r3, #131072 @ 0x20000 + 800508e: 687b ldr r3, [r7, #4] + 8005090: 689b ldr r3, [r3, #8] + 8005092: 4921 ldr r1, [pc, #132] @ (8005118 ) + 8005094: 4313 orrs r3, r2 + 8005096: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 8004744: 4b1f ldr r3, [pc, #124] @ (80047c4 ) - 8004746: 685b ldr r3, [r3, #4] - 8004748: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 - 800474c: 687b ldr r3, [r7, #4] - 800474e: 6a19 ldr r1, [r3, #32] - 8004750: 687b ldr r3, [r7, #4] - 8004752: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004754: 430b orrs r3, r1 - 8004756: 491b ldr r1, [pc, #108] @ (80047c4 ) - 8004758: 4313 orrs r3, r2 - 800475a: 604b str r3, [r1, #4] + 8005098: 4b1f ldr r3, [pc, #124] @ (8005118 ) + 800509a: 685b ldr r3, [r3, #4] + 800509c: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 + 80050a0: 687b ldr r3, [r7, #4] + 80050a2: 6a19 ldr r1, [r3, #32] + 80050a4: 687b ldr r3, [r7, #4] + 80050a6: 6a5b ldr r3, [r3, #36] @ 0x24 + 80050a8: 430b orrs r3, r1 + 80050aa: 491b ldr r1, [pc, #108] @ (8005118 ) + 80050ac: 4313 orrs r3, r2 + 80050ae: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 800475c: 4b1b ldr r3, [pc, #108] @ (80047cc ) - 800475e: 2201 movs r2, #1 - 8004760: 601a str r2, [r3, #0] + 80050b0: 4b1b ldr r3, [pc, #108] @ (8005120 ) + 80050b2: 2201 movs r2, #1 + 80050b4: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004762: f7fd fff1 bl 8002748 - 8004766: 6138 str r0, [r7, #16] + 80050b6: f7fd ffcd bl 8003054 + 80050ba: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8004768: e008 b.n 800477c + 80050bc: e008 b.n 80050d0 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 800476a: f7fd ffed bl 8002748 - 800476e: 4602 mov r2, r0 - 8004770: 693b ldr r3, [r7, #16] - 8004772: 1ad3 subs r3, r2, r3 - 8004774: 2b02 cmp r3, #2 - 8004776: d901 bls.n 800477c + 80050be: f7fd ffc9 bl 8003054 + 80050c2: 4602 mov r2, r0 + 80050c4: 693b ldr r3, [r7, #16] + 80050c6: 1ad3 subs r3, r2, r3 + 80050c8: 2b02 cmp r3, #2 + 80050ca: d901 bls.n 80050d0 { return HAL_TIMEOUT; - 8004778: 2303 movs r3, #3 - 800477a: e03d b.n 80047f8 + 80050cc: 2303 movs r3, #3 + 80050ce: e03d b.n 800514c while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 800477c: 4b11 ldr r3, [pc, #68] @ (80047c4 ) - 800477e: 681b ldr r3, [r3, #0] - 8004780: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8004784: 2b00 cmp r3, #0 - 8004786: d0f0 beq.n 800476a - 8004788: e035 b.n 80047f6 + 80050d0: 4b11 ldr r3, [pc, #68] @ (8005118 ) + 80050d2: 681b ldr r3, [r3, #0] + 80050d4: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 80050d8: 2b00 cmp r3, #0 + 80050da: d0f0 beq.n 80050be + 80050dc: e035 b.n 800514a } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 800478a: 4b10 ldr r3, [pc, #64] @ (80047cc ) - 800478c: 2200 movs r2, #0 - 800478e: 601a str r2, [r3, #0] + 80050de: 4b10 ldr r3, [pc, #64] @ (8005120 ) + 80050e0: 2200 movs r2, #0 + 80050e2: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004790: f7fd ffda bl 8002748 - 8004794: 6138 str r0, [r7, #16] + 80050e4: f7fd ffb6 bl 8003054 + 80050e8: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8004796: e008 b.n 80047aa + 80050ea: e008 b.n 80050fe { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8004798: f7fd ffd6 bl 8002748 - 800479c: 4602 mov r2, r0 - 800479e: 693b ldr r3, [r7, #16] - 80047a0: 1ad3 subs r3, r2, r3 - 80047a2: 2b02 cmp r3, #2 - 80047a4: d901 bls.n 80047aa + 80050ec: f7fd ffb2 bl 8003054 + 80050f0: 4602 mov r2, r0 + 80050f2: 693b ldr r3, [r7, #16] + 80050f4: 1ad3 subs r3, r2, r3 + 80050f6: 2b02 cmp r3, #2 + 80050f8: d901 bls.n 80050fe { return HAL_TIMEOUT; - 80047a6: 2303 movs r3, #3 - 80047a8: e026 b.n 80047f8 + 80050fa: 2303 movs r3, #3 + 80050fc: e026 b.n 800514c while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80047aa: 4b06 ldr r3, [pc, #24] @ (80047c4 ) - 80047ac: 681b ldr r3, [r3, #0] - 80047ae: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 80047b2: 2b00 cmp r3, #0 - 80047b4: d1f0 bne.n 8004798 - 80047b6: e01e b.n 80047f6 + 80050fe: 4b06 ldr r3, [pc, #24] @ (8005118 ) + 8005100: 681b ldr r3, [r3, #0] + 8005102: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8005106: 2b00 cmp r3, #0 + 8005108: d1f0 bne.n 80050ec + 800510a: e01e b.n 800514a } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 80047b8: 687b ldr r3, [r7, #4] - 80047ba: 69db ldr r3, [r3, #28] - 80047bc: 2b01 cmp r3, #1 - 80047be: d107 bne.n 80047d0 + 800510c: 687b ldr r3, [r7, #4] + 800510e: 69db ldr r3, [r3, #28] + 8005110: 2b01 cmp r3, #1 + 8005112: d107 bne.n 8005124 { return HAL_ERROR; - 80047c0: 2301 movs r3, #1 - 80047c2: e019 b.n 80047f8 - 80047c4: 40021000 .word 0x40021000 - 80047c8: 40007000 .word 0x40007000 - 80047cc: 42420060 .word 0x42420060 + 8005114: 2301 movs r3, #1 + 8005116: e019 b.n 800514c + 8005118: 40021000 .word 0x40021000 + 800511c: 40007000 .word 0x40007000 + 8005120: 42420060 .word 0x42420060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 80047d0: 4b0b ldr r3, [pc, #44] @ (8004800 ) - 80047d2: 685b ldr r3, [r3, #4] - 80047d4: 60fb str r3, [r7, #12] + 8005124: 4b0b ldr r3, [pc, #44] @ (8005154 ) + 8005126: 685b ldr r3, [r3, #4] + 8005128: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80047d6: 68fb ldr r3, [r7, #12] - 80047d8: f403 3280 and.w r2, r3, #65536 @ 0x10000 - 80047dc: 687b ldr r3, [r7, #4] - 80047de: 6a1b ldr r3, [r3, #32] - 80047e0: 429a cmp r2, r3 - 80047e2: d106 bne.n 80047f2 + 800512a: 68fb ldr r3, [r7, #12] + 800512c: f403 3280 and.w r2, r3, #65536 @ 0x10000 + 8005130: 687b ldr r3, [r7, #4] + 8005132: 6a1b ldr r3, [r3, #32] + 8005134: 429a cmp r2, r3 + 8005136: d106 bne.n 8005146 (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) - 80047e4: 68fb ldr r3, [r7, #12] - 80047e6: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 - 80047ea: 687b ldr r3, [r7, #4] - 80047ec: 6a5b ldr r3, [r3, #36] @ 0x24 + 8005138: 68fb ldr r3, [r7, #12] + 800513a: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 + 800513e: 687b ldr r3, [r7, #4] + 8005140: 6a5b ldr r3, [r3, #36] @ 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80047ee: 429a cmp r2, r3 - 80047f0: d001 beq.n 80047f6 + 8005142: 429a cmp r2, r3 + 8005144: d001 beq.n 800514a { return HAL_ERROR; - 80047f2: 2301 movs r3, #1 - 80047f4: e000 b.n 80047f8 + 8005146: 2301 movs r3, #1 + 8005148: e000 b.n 800514c } } } } return HAL_OK; - 80047f6: 2300 movs r3, #0 + 800514a: 2300 movs r3, #0 } - 80047f8: 4618 mov r0, r3 - 80047fa: 3718 adds r7, #24 - 80047fc: 46bd mov sp, r7 - 80047fe: bd80 pop {r7, pc} - 8004800: 40021000 .word 0x40021000 + 800514c: 4618 mov r0, r3 + 800514e: 3718 adds r7, #24 + 8005150: 46bd mov sp, r7 + 8005152: bd80 pop {r7, pc} + 8005154: 40021000 .word 0x40021000 -08004804 : +08005158 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8004804: b580 push {r7, lr} - 8004806: b084 sub sp, #16 - 8004808: af00 add r7, sp, #0 - 800480a: 6078 str r0, [r7, #4] - 800480c: 6039 str r1, [r7, #0] + 8005158: b580 push {r7, lr} + 800515a: b084 sub sp, #16 + 800515c: af00 add r7, sp, #0 + 800515e: 6078 str r0, [r7, #4] + 8005160: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) - 800480e: 687b ldr r3, [r7, #4] - 8004810: 2b00 cmp r3, #0 - 8004812: d101 bne.n 8004818 + 8005162: 687b ldr r3, [r7, #4] + 8005164: 2b00 cmp r3, #0 + 8005166: d101 bne.n 800516c { return HAL_ERROR; - 8004814: 2301 movs r3, #1 - 8004816: e0d0 b.n 80049ba + 8005168: 2301 movs r3, #1 + 800516a: e0d0 b.n 800530e must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) - 8004818: 4b6a ldr r3, [pc, #424] @ (80049c4 ) - 800481a: 681b ldr r3, [r3, #0] - 800481c: f003 0307 and.w r3, r3, #7 - 8004820: 683a ldr r2, [r7, #0] - 8004822: 429a cmp r2, r3 - 8004824: d910 bls.n 8004848 + 800516c: 4b6a ldr r3, [pc, #424] @ (8005318 ) + 800516e: 681b ldr r3, [r3, #0] + 8005170: f003 0307 and.w r3, r3, #7 + 8005174: 683a ldr r2, [r7, #0] + 8005176: 429a cmp r2, r3 + 8005178: d910 bls.n 800519c { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8004826: 4b67 ldr r3, [pc, #412] @ (80049c4 ) - 8004828: 681b ldr r3, [r3, #0] - 800482a: f023 0207 bic.w r2, r3, #7 - 800482e: 4965 ldr r1, [pc, #404] @ (80049c4 ) - 8004830: 683b ldr r3, [r7, #0] - 8004832: 4313 orrs r3, r2 - 8004834: 600b str r3, [r1, #0] + 800517a: 4b67 ldr r3, [pc, #412] @ (8005318 ) + 800517c: 681b ldr r3, [r3, #0] + 800517e: f023 0207 bic.w r2, r3, #7 + 8005182: 4965 ldr r1, [pc, #404] @ (8005318 ) + 8005184: 683b ldr r3, [r7, #0] + 8005186: 4313 orrs r3, r2 + 8005188: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 8004836: 4b63 ldr r3, [pc, #396] @ (80049c4 ) - 8004838: 681b ldr r3, [r3, #0] - 800483a: f003 0307 and.w r3, r3, #7 - 800483e: 683a ldr r2, [r7, #0] - 8004840: 429a cmp r2, r3 - 8004842: d001 beq.n 8004848 + 800518a: 4b63 ldr r3, [pc, #396] @ (8005318 ) + 800518c: 681b ldr r3, [r3, #0] + 800518e: f003 0307 and.w r3, r3, #7 + 8005192: 683a ldr r2, [r7, #0] + 8005194: 429a cmp r2, r3 + 8005196: d001 beq.n 800519c { return HAL_ERROR; - 8004844: 2301 movs r3, #1 - 8004846: e0b8 b.n 80049ba + 8005198: 2301 movs r3, #1 + 800519a: e0b8 b.n 800530e } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8004848: 687b ldr r3, [r7, #4] - 800484a: 681b ldr r3, [r3, #0] - 800484c: f003 0302 and.w r3, r3, #2 - 8004850: 2b00 cmp r3, #0 - 8004852: d020 beq.n 8004896 + 800519c: 687b ldr r3, [r7, #4] + 800519e: 681b ldr r3, [r3, #0] + 80051a0: f003 0302 and.w r3, r3, #2 + 80051a4: 2b00 cmp r3, #0 + 80051a6: d020 beq.n 80051ea { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8004854: 687b ldr r3, [r7, #4] - 8004856: 681b ldr r3, [r3, #0] - 8004858: f003 0304 and.w r3, r3, #4 - 800485c: 2b00 cmp r3, #0 - 800485e: d005 beq.n 800486c + 80051a8: 687b ldr r3, [r7, #4] + 80051aa: 681b ldr r3, [r3, #0] + 80051ac: f003 0304 and.w r3, r3, #4 + 80051b0: 2b00 cmp r3, #0 + 80051b2: d005 beq.n 80051c0 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); - 8004860: 4b59 ldr r3, [pc, #356] @ (80049c8 ) - 8004862: 685b ldr r3, [r3, #4] - 8004864: 4a58 ldr r2, [pc, #352] @ (80049c8 ) - 8004866: f443 63e0 orr.w r3, r3, #1792 @ 0x700 - 800486a: 6053 str r3, [r2, #4] + 80051b4: 4b59 ldr r3, [pc, #356] @ (800531c ) + 80051b6: 685b ldr r3, [r3, #4] + 80051b8: 4a58 ldr r2, [pc, #352] @ (800531c ) + 80051ba: f443 63e0 orr.w r3, r3, #1792 @ 0x700 + 80051be: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 800486c: 687b ldr r3, [r7, #4] - 800486e: 681b ldr r3, [r3, #0] - 8004870: f003 0308 and.w r3, r3, #8 - 8004874: 2b00 cmp r3, #0 - 8004876: d005 beq.n 8004884 + 80051c0: 687b ldr r3, [r7, #4] + 80051c2: 681b ldr r3, [r3, #0] + 80051c4: f003 0308 and.w r3, r3, #8 + 80051c8: 2b00 cmp r3, #0 + 80051ca: d005 beq.n 80051d8 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); - 8004878: 4b53 ldr r3, [pc, #332] @ (80049c8 ) - 800487a: 685b ldr r3, [r3, #4] - 800487c: 4a52 ldr r2, [pc, #328] @ (80049c8 ) - 800487e: f443 5360 orr.w r3, r3, #14336 @ 0x3800 - 8004882: 6053 str r3, [r2, #4] + 80051cc: 4b53 ldr r3, [pc, #332] @ (800531c ) + 80051ce: 685b ldr r3, [r3, #4] + 80051d0: 4a52 ldr r2, [pc, #328] @ (800531c ) + 80051d2: f443 5360 orr.w r3, r3, #14336 @ 0x3800 + 80051d6: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8004884: 4b50 ldr r3, [pc, #320] @ (80049c8 ) - 8004886: 685b ldr r3, [r3, #4] - 8004888: f023 02f0 bic.w r2, r3, #240 @ 0xf0 - 800488c: 687b ldr r3, [r7, #4] - 800488e: 689b ldr r3, [r3, #8] - 8004890: 494d ldr r1, [pc, #308] @ (80049c8 ) - 8004892: 4313 orrs r3, r2 - 8004894: 604b str r3, [r1, #4] + 80051d8: 4b50 ldr r3, [pc, #320] @ (800531c ) + 80051da: 685b ldr r3, [r3, #4] + 80051dc: f023 02f0 bic.w r2, r3, #240 @ 0xf0 + 80051e0: 687b ldr r3, [r7, #4] + 80051e2: 689b ldr r3, [r3, #8] + 80051e4: 494d ldr r1, [pc, #308] @ (800531c ) + 80051e6: 4313 orrs r3, r2 + 80051e8: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8004896: 687b ldr r3, [r7, #4] - 8004898: 681b ldr r3, [r3, #0] - 800489a: f003 0301 and.w r3, r3, #1 - 800489e: 2b00 cmp r3, #0 - 80048a0: d040 beq.n 8004924 + 80051ea: 687b ldr r3, [r7, #4] + 80051ec: 681b ldr r3, [r3, #0] + 80051ee: f003 0301 and.w r3, r3, #1 + 80051f2: 2b00 cmp r3, #0 + 80051f4: d040 beq.n 8005278 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 80048a2: 687b ldr r3, [r7, #4] - 80048a4: 685b ldr r3, [r3, #4] - 80048a6: 2b01 cmp r3, #1 - 80048a8: d107 bne.n 80048ba + 80051f6: 687b ldr r3, [r7, #4] + 80051f8: 685b ldr r3, [r3, #4] + 80051fa: 2b01 cmp r3, #1 + 80051fc: d107 bne.n 800520e { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 80048aa: 4b47 ldr r3, [pc, #284] @ (80049c8 ) - 80048ac: 681b ldr r3, [r3, #0] - 80048ae: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 80048b2: 2b00 cmp r3, #0 - 80048b4: d115 bne.n 80048e2 + 80051fe: 4b47 ldr r3, [pc, #284] @ (800531c ) + 8005200: 681b ldr r3, [r3, #0] + 8005202: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8005206: 2b00 cmp r3, #0 + 8005208: d115 bne.n 8005236 { return HAL_ERROR; - 80048b6: 2301 movs r3, #1 - 80048b8: e07f b.n 80049ba + 800520a: 2301 movs r3, #1 + 800520c: e07f b.n 800530e } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 80048ba: 687b ldr r3, [r7, #4] - 80048bc: 685b ldr r3, [r3, #4] - 80048be: 2b02 cmp r3, #2 - 80048c0: d107 bne.n 80048d2 + 800520e: 687b ldr r3, [r7, #4] + 8005210: 685b ldr r3, [r3, #4] + 8005212: 2b02 cmp r3, #2 + 8005214: d107 bne.n 8005226 { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 80048c2: 4b41 ldr r3, [pc, #260] @ (80049c8 ) - 80048c4: 681b ldr r3, [r3, #0] - 80048c6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 80048ca: 2b00 cmp r3, #0 - 80048cc: d109 bne.n 80048e2 + 8005216: 4b41 ldr r3, [pc, #260] @ (800531c ) + 8005218: 681b ldr r3, [r3, #0] + 800521a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 800521e: 2b00 cmp r3, #0 + 8005220: d109 bne.n 8005236 { return HAL_ERROR; - 80048ce: 2301 movs r3, #1 - 80048d0: e073 b.n 80049ba + 8005222: 2301 movs r3, #1 + 8005224: e073 b.n 800530e } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80048d2: 4b3d ldr r3, [pc, #244] @ (80049c8 ) - 80048d4: 681b ldr r3, [r3, #0] - 80048d6: f003 0302 and.w r3, r3, #2 - 80048da: 2b00 cmp r3, #0 - 80048dc: d101 bne.n 80048e2 + 8005226: 4b3d ldr r3, [pc, #244] @ (800531c ) + 8005228: 681b ldr r3, [r3, #0] + 800522a: f003 0302 and.w r3, r3, #2 + 800522e: 2b00 cmp r3, #0 + 8005230: d101 bne.n 8005236 { return HAL_ERROR; - 80048de: 2301 movs r3, #1 - 80048e0: e06b b.n 80049ba + 8005232: 2301 movs r3, #1 + 8005234: e06b b.n 800530e } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 80048e2: 4b39 ldr r3, [pc, #228] @ (80049c8 ) - 80048e4: 685b ldr r3, [r3, #4] - 80048e6: f023 0203 bic.w r2, r3, #3 - 80048ea: 687b ldr r3, [r7, #4] - 80048ec: 685b ldr r3, [r3, #4] - 80048ee: 4936 ldr r1, [pc, #216] @ (80049c8 ) - 80048f0: 4313 orrs r3, r2 - 80048f2: 604b str r3, [r1, #4] + 8005236: 4b39 ldr r3, [pc, #228] @ (800531c ) + 8005238: 685b ldr r3, [r3, #4] + 800523a: f023 0203 bic.w r2, r3, #3 + 800523e: 687b ldr r3, [r7, #4] + 8005240: 685b ldr r3, [r3, #4] + 8005242: 4936 ldr r1, [pc, #216] @ (800531c ) + 8005244: 4313 orrs r3, r2 + 8005246: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80048f4: f7fd ff28 bl 8002748 - 80048f8: 60f8 str r0, [r7, #12] + 8005248: f7fd ff04 bl 8003054 + 800524c: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80048fa: e00a b.n 8004912 + 800524e: e00a b.n 8005266 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 80048fc: f7fd ff24 bl 8002748 - 8004900: 4602 mov r2, r0 - 8004902: 68fb ldr r3, [r7, #12] - 8004904: 1ad3 subs r3, r2, r3 - 8004906: f241 3288 movw r2, #5000 @ 0x1388 - 800490a: 4293 cmp r3, r2 - 800490c: d901 bls.n 8004912 + 8005250: f7fd ff00 bl 8003054 + 8005254: 4602 mov r2, r0 + 8005256: 68fb ldr r3, [r7, #12] + 8005258: 1ad3 subs r3, r2, r3 + 800525a: f241 3288 movw r2, #5000 @ 0x1388 + 800525e: 4293 cmp r3, r2 + 8005260: d901 bls.n 8005266 { return HAL_TIMEOUT; - 800490e: 2303 movs r3, #3 - 8004910: e053 b.n 80049ba + 8005262: 2303 movs r3, #3 + 8005264: e053 b.n 800530e while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8004912: 4b2d ldr r3, [pc, #180] @ (80049c8 ) - 8004914: 685b ldr r3, [r3, #4] - 8004916: f003 020c and.w r2, r3, #12 - 800491a: 687b ldr r3, [r7, #4] - 800491c: 685b ldr r3, [r3, #4] - 800491e: 009b lsls r3, r3, #2 - 8004920: 429a cmp r2, r3 - 8004922: d1eb bne.n 80048fc + 8005266: 4b2d ldr r3, [pc, #180] @ (800531c ) + 8005268: 685b ldr r3, [r3, #4] + 800526a: f003 020c and.w r2, r3, #12 + 800526e: 687b ldr r3, [r7, #4] + 8005270: 685b ldr r3, [r3, #4] + 8005272: 009b lsls r3, r3, #2 + 8005274: 429a cmp r2, r3 + 8005276: d1eb bne.n 8005250 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) - 8004924: 4b27 ldr r3, [pc, #156] @ (80049c4 ) - 8004926: 681b ldr r3, [r3, #0] - 8004928: f003 0307 and.w r3, r3, #7 - 800492c: 683a ldr r2, [r7, #0] - 800492e: 429a cmp r2, r3 - 8004930: d210 bcs.n 8004954 + 8005278: 4b27 ldr r3, [pc, #156] @ (8005318 ) + 800527a: 681b ldr r3, [r3, #0] + 800527c: f003 0307 and.w r3, r3, #7 + 8005280: 683a ldr r2, [r7, #0] + 8005282: 429a cmp r2, r3 + 8005284: d210 bcs.n 80052a8 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8004932: 4b24 ldr r3, [pc, #144] @ (80049c4 ) - 8004934: 681b ldr r3, [r3, #0] - 8004936: f023 0207 bic.w r2, r3, #7 - 800493a: 4922 ldr r1, [pc, #136] @ (80049c4 ) - 800493c: 683b ldr r3, [r7, #0] - 800493e: 4313 orrs r3, r2 - 8004940: 600b str r3, [r1, #0] + 8005286: 4b24 ldr r3, [pc, #144] @ (8005318 ) + 8005288: 681b ldr r3, [r3, #0] + 800528a: f023 0207 bic.w r2, r3, #7 + 800528e: 4922 ldr r1, [pc, #136] @ (8005318 ) + 8005290: 683b ldr r3, [r7, #0] + 8005292: 4313 orrs r3, r2 + 8005294: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 8004942: 4b20 ldr r3, [pc, #128] @ (80049c4 ) - 8004944: 681b ldr r3, [r3, #0] - 8004946: f003 0307 and.w r3, r3, #7 - 800494a: 683a ldr r2, [r7, #0] - 800494c: 429a cmp r2, r3 - 800494e: d001 beq.n 8004954 + 8005296: 4b20 ldr r3, [pc, #128] @ (8005318 ) + 8005298: 681b ldr r3, [r3, #0] + 800529a: f003 0307 and.w r3, r3, #7 + 800529e: 683a ldr r2, [r7, #0] + 80052a0: 429a cmp r2, r3 + 80052a2: d001 beq.n 80052a8 { return HAL_ERROR; - 8004950: 2301 movs r3, #1 - 8004952: e032 b.n 80049ba + 80052a4: 2301 movs r3, #1 + 80052a6: e032 b.n 800530e } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8004954: 687b ldr r3, [r7, #4] - 8004956: 681b ldr r3, [r3, #0] - 8004958: f003 0304 and.w r3, r3, #4 - 800495c: 2b00 cmp r3, #0 - 800495e: d008 beq.n 8004972 + 80052a8: 687b ldr r3, [r7, #4] + 80052aa: 681b ldr r3, [r3, #0] + 80052ac: f003 0304 and.w r3, r3, #4 + 80052b0: 2b00 cmp r3, #0 + 80052b2: d008 beq.n 80052c6 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8004960: 4b19 ldr r3, [pc, #100] @ (80049c8 ) - 8004962: 685b ldr r3, [r3, #4] - 8004964: f423 62e0 bic.w r2, r3, #1792 @ 0x700 - 8004968: 687b ldr r3, [r7, #4] - 800496a: 68db ldr r3, [r3, #12] - 800496c: 4916 ldr r1, [pc, #88] @ (80049c8 ) - 800496e: 4313 orrs r3, r2 - 8004970: 604b str r3, [r1, #4] + 80052b4: 4b19 ldr r3, [pc, #100] @ (800531c ) + 80052b6: 685b ldr r3, [r3, #4] + 80052b8: f423 62e0 bic.w r2, r3, #1792 @ 0x700 + 80052bc: 687b ldr r3, [r7, #4] + 80052be: 68db ldr r3, [r3, #12] + 80052c0: 4916 ldr r1, [pc, #88] @ (800531c ) + 80052c2: 4313 orrs r3, r2 + 80052c4: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8004972: 687b ldr r3, [r7, #4] - 8004974: 681b ldr r3, [r3, #0] - 8004976: f003 0308 and.w r3, r3, #8 - 800497a: 2b00 cmp r3, #0 - 800497c: d009 beq.n 8004992 + 80052c6: 687b ldr r3, [r7, #4] + 80052c8: 681b ldr r3, [r3, #0] + 80052ca: f003 0308 and.w r3, r3, #8 + 80052ce: 2b00 cmp r3, #0 + 80052d0: d009 beq.n 80052e6 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); - 800497e: 4b12 ldr r3, [pc, #72] @ (80049c8 ) - 8004980: 685b ldr r3, [r3, #4] - 8004982: f423 5260 bic.w r2, r3, #14336 @ 0x3800 - 8004986: 687b ldr r3, [r7, #4] - 8004988: 691b ldr r3, [r3, #16] - 800498a: 00db lsls r3, r3, #3 - 800498c: 490e ldr r1, [pc, #56] @ (80049c8 ) - 800498e: 4313 orrs r3, r2 - 8004990: 604b str r3, [r1, #4] + 80052d2: 4b12 ldr r3, [pc, #72] @ (800531c ) + 80052d4: 685b ldr r3, [r3, #4] + 80052d6: f423 5260 bic.w r2, r3, #14336 @ 0x3800 + 80052da: 687b ldr r3, [r7, #4] + 80052dc: 691b ldr r3, [r3, #16] + 80052de: 00db lsls r3, r3, #3 + 80052e0: 490e ldr r1, [pc, #56] @ (800531c ) + 80052e2: 4313 orrs r3, r2 + 80052e4: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; - 8004992: f000 f821 bl 80049d8 - 8004996: 4602 mov r2, r0 - 8004998: 4b0b ldr r3, [pc, #44] @ (80049c8 ) - 800499a: 685b ldr r3, [r3, #4] - 800499c: 091b lsrs r3, r3, #4 - 800499e: f003 030f and.w r3, r3, #15 - 80049a2: 490a ldr r1, [pc, #40] @ (80049cc ) - 80049a4: 5ccb ldrb r3, [r1, r3] - 80049a6: fa22 f303 lsr.w r3, r2, r3 - 80049aa: 4a09 ldr r2, [pc, #36] @ (80049d0 ) - 80049ac: 6013 str r3, [r2, #0] + 80052e6: f000 f821 bl 800532c + 80052ea: 4602 mov r2, r0 + 80052ec: 4b0b ldr r3, [pc, #44] @ (800531c ) + 80052ee: 685b ldr r3, [r3, #4] + 80052f0: 091b lsrs r3, r3, #4 + 80052f2: f003 030f and.w r3, r3, #15 + 80052f6: 490a ldr r1, [pc, #40] @ (8005320 ) + 80052f8: 5ccb ldrb r3, [r1, r3] + 80052fa: fa22 f303 lsr.w r3, r2, r3 + 80052fe: 4a09 ldr r2, [pc, #36] @ (8005324 ) + 8005300: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); - 80049ae: 4b09 ldr r3, [pc, #36] @ (80049d4 ) - 80049b0: 681b ldr r3, [r3, #0] - 80049b2: 4618 mov r0, r3 - 80049b4: f7fd fe86 bl 80026c4 + 8005302: 4b09 ldr r3, [pc, #36] @ (8005328 ) + 8005304: 681b ldr r3, [r3, #0] + 8005306: 4618 mov r0, r3 + 8005308: f7fd fe62 bl 8002fd0 return HAL_OK; - 80049b8: 2300 movs r3, #0 + 800530c: 2300 movs r3, #0 } - 80049ba: 4618 mov r0, r3 - 80049bc: 3710 adds r7, #16 - 80049be: 46bd mov sp, r7 - 80049c0: bd80 pop {r7, pc} - 80049c2: bf00 nop - 80049c4: 40022000 .word 0x40022000 - 80049c8: 40021000 .word 0x40021000 - 80049cc: 08006344 .word 0x08006344 - 80049d0: 20000004 .word 0x20000004 - 80049d4: 20000008 .word 0x20000008 + 800530e: 4618 mov r0, r3 + 8005310: 3710 adds r7, #16 + 8005312: 46bd mov sp, r7 + 8005314: bd80 pop {r7, pc} + 8005316: bf00 nop + 8005318: 40022000 .word 0x40022000 + 800531c: 40021000 .word 0x40021000 + 8005320: 08006c28 .word 0x08006c28 + 8005324: 20000004 .word 0x20000004 + 8005328: 20000008 .word 0x20000008 -080049d8 : +0800532c : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 80049d8: b480 push {r7} - 80049da: b087 sub sp, #28 - 80049dc: af00 add r7, sp, #0 + 800532c: b480 push {r7} + 800532e: b087 sub sp, #28 + 8005330: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; - 80049de: 2300 movs r3, #0 - 80049e0: 60fb str r3, [r7, #12] - 80049e2: 2300 movs r3, #0 - 80049e4: 60bb str r3, [r7, #8] - 80049e6: 2300 movs r3, #0 - 80049e8: 617b str r3, [r7, #20] - 80049ea: 2300 movs r3, #0 - 80049ec: 607b str r3, [r7, #4] + 8005332: 2300 movs r3, #0 + 8005334: 60fb str r3, [r7, #12] + 8005336: 2300 movs r3, #0 + 8005338: 60bb str r3, [r7, #8] + 800533a: 2300 movs r3, #0 + 800533c: 617b str r3, [r7, #20] + 800533e: 2300 movs r3, #0 + 8005340: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; - 80049ee: 2300 movs r3, #0 - 80049f0: 613b str r3, [r7, #16] + 8005342: 2300 movs r3, #0 + 8005344: 613b str r3, [r7, #16] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; - 80049f2: 4b1e ldr r3, [pc, #120] @ (8004a6c ) - 80049f4: 685b ldr r3, [r3, #4] - 80049f6: 60fb str r3, [r7, #12] + 8005346: 4b1e ldr r3, [pc, #120] @ (80053c0 ) + 8005348: 685b ldr r3, [r3, #4] + 800534a: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 80049f8: 68fb ldr r3, [r7, #12] - 80049fa: f003 030c and.w r3, r3, #12 - 80049fe: 2b04 cmp r3, #4 - 8004a00: d002 beq.n 8004a08 - 8004a02: 2b08 cmp r3, #8 - 8004a04: d003 beq.n 8004a0e - 8004a06: e027 b.n 8004a58 + 800534c: 68fb ldr r3, [r7, #12] + 800534e: f003 030c and.w r3, r3, #12 + 8005352: 2b04 cmp r3, #4 + 8005354: d002 beq.n 800535c + 8005356: 2b08 cmp r3, #8 + 8005358: d003 beq.n 8005362 + 800535a: e027 b.n 80053ac { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 8004a08: 4b19 ldr r3, [pc, #100] @ (8004a70 ) - 8004a0a: 613b str r3, [r7, #16] + 800535c: 4b19 ldr r3, [pc, #100] @ (80053c4 ) + 800535e: 613b str r3, [r7, #16] break; - 8004a0c: e027 b.n 8004a5e + 8005360: e027 b.n 80053b2 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; - 8004a0e: 68fb ldr r3, [r7, #12] - 8004a10: 0c9b lsrs r3, r3, #18 - 8004a12: f003 030f and.w r3, r3, #15 - 8004a16: 4a17 ldr r2, [pc, #92] @ (8004a74 ) - 8004a18: 5cd3 ldrb r3, [r2, r3] - 8004a1a: 607b str r3, [r7, #4] + 8005362: 68fb ldr r3, [r7, #12] + 8005364: 0c9b lsrs r3, r3, #18 + 8005366: f003 030f and.w r3, r3, #15 + 800536a: 4a17 ldr r2, [pc, #92] @ (80053c8 ) + 800536c: 5cd3 ldrb r3, [r2, r3] + 800536e: 607b str r3, [r7, #4] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) - 8004a1c: 68fb ldr r3, [r7, #12] - 8004a1e: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8004a22: 2b00 cmp r3, #0 - 8004a24: d010 beq.n 8004a48 + 8005370: 68fb ldr r3, [r7, #12] + 8005372: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8005376: 2b00 cmp r3, #0 + 8005378: d010 beq.n 800539c { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; - 8004a26: 4b11 ldr r3, [pc, #68] @ (8004a6c ) - 8004a28: 685b ldr r3, [r3, #4] - 8004a2a: 0c5b lsrs r3, r3, #17 - 8004a2c: f003 0301 and.w r3, r3, #1 - 8004a30: 4a11 ldr r2, [pc, #68] @ (8004a78 ) - 8004a32: 5cd3 ldrb r3, [r2, r3] - 8004a34: 60bb str r3, [r7, #8] + 800537a: 4b11 ldr r3, [pc, #68] @ (80053c0 ) + 800537c: 685b ldr r3, [r3, #4] + 800537e: 0c5b lsrs r3, r3, #17 + 8005380: f003 0301 and.w r3, r3, #1 + 8005384: 4a11 ldr r2, [pc, #68] @ (80053cc ) + 8005386: 5cd3 ldrb r3, [r2, r3] + 8005388: 60bb str r3, [r7, #8] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); - 8004a36: 687b ldr r3, [r7, #4] - 8004a38: 4a0d ldr r2, [pc, #52] @ (8004a70 ) - 8004a3a: fb03 f202 mul.w r2, r3, r2 - 8004a3e: 68bb ldr r3, [r7, #8] - 8004a40: fbb2 f3f3 udiv r3, r2, r3 - 8004a44: 617b str r3, [r7, #20] - 8004a46: e004 b.n 8004a52 + 800538a: 687b ldr r3, [r7, #4] + 800538c: 4a0d ldr r2, [pc, #52] @ (80053c4 ) + 800538e: fb03 f202 mul.w r2, r3, r2 + 8005392: 68bb ldr r3, [r7, #8] + 8005394: fbb2 f3f3 udiv r3, r2, r3 + 8005398: 617b str r3, [r7, #20] + 800539a: e004 b.n 80053a6 #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); - 8004a48: 687b ldr r3, [r7, #4] - 8004a4a: 4a0c ldr r2, [pc, #48] @ (8004a7c ) - 8004a4c: fb02 f303 mul.w r3, r2, r3 - 8004a50: 617b str r3, [r7, #20] + 800539c: 687b ldr r3, [r7, #4] + 800539e: 4a0c ldr r2, [pc, #48] @ (80053d0 ) + 80053a0: fb02 f303 mul.w r3, r2, r3 + 80053a4: 617b str r3, [r7, #20] } sysclockfreq = pllclk; - 8004a52: 697b ldr r3, [r7, #20] - 8004a54: 613b str r3, [r7, #16] + 80053a6: 697b ldr r3, [r7, #20] + 80053a8: 613b str r3, [r7, #16] break; - 8004a56: e002 b.n 8004a5e + 80053aa: e002 b.n 80053b2 } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; - 8004a58: 4b09 ldr r3, [pc, #36] @ (8004a80 ) - 8004a5a: 613b str r3, [r7, #16] + 80053ac: 4b09 ldr r3, [pc, #36] @ (80053d4 ) + 80053ae: 613b str r3, [r7, #16] break; - 8004a5c: bf00 nop + 80053b0: bf00 nop } } return sysclockfreq; - 8004a5e: 693b ldr r3, [r7, #16] + 80053b2: 693b ldr r3, [r7, #16] } - 8004a60: 4618 mov r0, r3 - 8004a62: 371c adds r7, #28 - 8004a64: 46bd mov sp, r7 - 8004a66: bc80 pop {r7} - 8004a68: 4770 bx lr - 8004a6a: bf00 nop - 8004a6c: 40021000 .word 0x40021000 - 8004a70: 00b71b00 .word 0x00b71b00 - 8004a74: 0800635c .word 0x0800635c - 8004a78: 0800636c .word 0x0800636c - 8004a7c: 003d0900 .word 0x003d0900 - 8004a80: 007a1200 .word 0x007a1200 + 80053b4: 4618 mov r0, r3 + 80053b6: 371c adds r7, #28 + 80053b8: 46bd mov sp, r7 + 80053ba: bc80 pop {r7} + 80053bc: 4770 bx lr + 80053be: bf00 nop + 80053c0: 40021000 .word 0x40021000 + 80053c4: 00b71b00 .word 0x00b71b00 + 80053c8: 08006c40 .word 0x08006c40 + 80053cc: 08006c50 .word 0x08006c50 + 80053d0: 003d0900 .word 0x003d0900 + 80053d4: 007a1200 .word 0x007a1200 -08004a84 : +080053d8 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 8004a84: b480 push {r7} - 8004a86: af00 add r7, sp, #0 + 80053d8: b480 push {r7} + 80053da: af00 add r7, sp, #0 return SystemCoreClock; - 8004a88: 4b02 ldr r3, [pc, #8] @ (8004a94 ) - 8004a8a: 681b ldr r3, [r3, #0] + 80053dc: 4b02 ldr r3, [pc, #8] @ (80053e8 ) + 80053de: 681b ldr r3, [r3, #0] } - 8004a8c: 4618 mov r0, r3 - 8004a8e: 46bd mov sp, r7 - 8004a90: bc80 pop {r7} - 8004a92: 4770 bx lr - 8004a94: 20000004 .word 0x20000004 + 80053e0: 4618 mov r0, r3 + 80053e2: 46bd mov sp, r7 + 80053e4: bc80 pop {r7} + 80053e6: 4770 bx lr + 80053e8: 20000004 .word 0x20000004 -08004a98 : +080053ec : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 8004a98: b580 push {r7, lr} - 8004a9a: af00 add r7, sp, #0 + 80053ec: b580 push {r7, lr} + 80053ee: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); - 8004a9c: f7ff fff2 bl 8004a84 - 8004aa0: 4602 mov r2, r0 - 8004aa2: 4b05 ldr r3, [pc, #20] @ (8004ab8 ) - 8004aa4: 685b ldr r3, [r3, #4] - 8004aa6: 0a1b lsrs r3, r3, #8 - 8004aa8: f003 0307 and.w r3, r3, #7 - 8004aac: 4903 ldr r1, [pc, #12] @ (8004abc ) - 8004aae: 5ccb ldrb r3, [r1, r3] - 8004ab0: fa22 f303 lsr.w r3, r2, r3 + 80053f0: f7ff fff2 bl 80053d8 + 80053f4: 4602 mov r2, r0 + 80053f6: 4b05 ldr r3, [pc, #20] @ (800540c ) + 80053f8: 685b ldr r3, [r3, #4] + 80053fa: 0a1b lsrs r3, r3, #8 + 80053fc: f003 0307 and.w r3, r3, #7 + 8005400: 4903 ldr r1, [pc, #12] @ (8005410 ) + 8005402: 5ccb ldrb r3, [r1, r3] + 8005404: fa22 f303 lsr.w r3, r2, r3 } - 8004ab4: 4618 mov r0, r3 - 8004ab6: bd80 pop {r7, pc} - 8004ab8: 40021000 .word 0x40021000 - 8004abc: 08006354 .word 0x08006354 + 8005408: 4618 mov r0, r3 + 800540a: bd80 pop {r7, pc} + 800540c: 40021000 .word 0x40021000 + 8005410: 08006c38 .word 0x08006c38 -08004ac0 : +08005414 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 8004ac0: b580 push {r7, lr} - 8004ac2: af00 add r7, sp, #0 + 8005414: b580 push {r7, lr} + 8005416: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); - 8004ac4: f7ff ffde bl 8004a84 - 8004ac8: 4602 mov r2, r0 - 8004aca: 4b05 ldr r3, [pc, #20] @ (8004ae0 ) - 8004acc: 685b ldr r3, [r3, #4] - 8004ace: 0adb lsrs r3, r3, #11 - 8004ad0: f003 0307 and.w r3, r3, #7 - 8004ad4: 4903 ldr r1, [pc, #12] @ (8004ae4 ) - 8004ad6: 5ccb ldrb r3, [r1, r3] - 8004ad8: fa22 f303 lsr.w r3, r2, r3 + 8005418: f7ff ffde bl 80053d8 + 800541c: 4602 mov r2, r0 + 800541e: 4b05 ldr r3, [pc, #20] @ (8005434 ) + 8005420: 685b ldr r3, [r3, #4] + 8005422: 0adb lsrs r3, r3, #11 + 8005424: f003 0307 and.w r3, r3, #7 + 8005428: 4903 ldr r1, [pc, #12] @ (8005438 ) + 800542a: 5ccb ldrb r3, [r1, r3] + 800542c: fa22 f303 lsr.w r3, r2, r3 } - 8004adc: 4618 mov r0, r3 - 8004ade: bd80 pop {r7, pc} - 8004ae0: 40021000 .word 0x40021000 - 8004ae4: 08006354 .word 0x08006354 + 8005430: 4618 mov r0, r3 + 8005432: bd80 pop {r7, pc} + 8005434: 40021000 .word 0x40021000 + 8005438: 08006c38 .word 0x08006c38 -08004ae8 : +0800543c : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { - 8004ae8: b480 push {r7} - 8004aea: b085 sub sp, #20 - 8004aec: af00 add r7, sp, #0 - 8004aee: 6078 str r0, [r7, #4] + 800543c: b480 push {r7} + 800543e: b085 sub sp, #20 + 8005440: af00 add r7, sp, #0 + 8005442: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); - 8004af0: 4b0a ldr r3, [pc, #40] @ (8004b1c ) - 8004af2: 681b ldr r3, [r3, #0] - 8004af4: 4a0a ldr r2, [pc, #40] @ (8004b20 ) - 8004af6: fba2 2303 umull r2, r3, r2, r3 - 8004afa: 0a5b lsrs r3, r3, #9 - 8004afc: 687a ldr r2, [r7, #4] - 8004afe: fb02 f303 mul.w r3, r2, r3 - 8004b02: 60fb str r3, [r7, #12] + 8005444: 4b0a ldr r3, [pc, #40] @ (8005470 ) + 8005446: 681b ldr r3, [r3, #0] + 8005448: 4a0a ldr r2, [pc, #40] @ (8005474 ) + 800544a: fba2 2303 umull r2, r3, r2, r3 + 800544e: 0a5b lsrs r3, r3, #9 + 8005450: 687a ldr r2, [r7, #4] + 8005452: fb02 f303 mul.w r3, r2, r3 + 8005456: 60fb str r3, [r7, #12] do { __NOP(); - 8004b04: bf00 nop + 8005458: bf00 nop } while (Delay --); - 8004b06: 68fb ldr r3, [r7, #12] - 8004b08: 1e5a subs r2, r3, #1 - 8004b0a: 60fa str r2, [r7, #12] - 8004b0c: 2b00 cmp r3, #0 - 8004b0e: d1f9 bne.n 8004b04 + 800545a: 68fb ldr r3, [r7, #12] + 800545c: 1e5a subs r2, r3, #1 + 800545e: 60fa str r2, [r7, #12] + 8005460: 2b00 cmp r3, #0 + 8005462: d1f9 bne.n 8005458 } - 8004b10: bf00 nop - 8004b12: bf00 nop - 8004b14: 3714 adds r7, #20 - 8004b16: 46bd mov sp, r7 - 8004b18: bc80 pop {r7} - 8004b1a: 4770 bx lr - 8004b1c: 20000004 .word 0x20000004 - 8004b20: 10624dd3 .word 0x10624dd3 + 8005464: bf00 nop + 8005466: bf00 nop + 8005468: 3714 adds r7, #20 + 800546a: 46bd mov sp, r7 + 800546c: bc80 pop {r7} + 800546e: 4770 bx lr + 8005470: 20000004 .word 0x20000004 + 8005474: 10624dd3 .word 0x10624dd3 -08004b24 : +08005478 : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 8004b24: b580 push {r7, lr} - 8004b26: b086 sub sp, #24 - 8004b28: af00 add r7, sp, #0 - 8004b2a: 6078 str r0, [r7, #4] + 8005478: b580 push {r7, lr} + 800547a: b086 sub sp, #24 + 800547c: af00 add r7, sp, #0 + 800547e: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; - 8004b2c: 2300 movs r3, #0 - 8004b2e: 613b str r3, [r7, #16] - 8004b30: 2300 movs r3, #0 - 8004b32: 60fb str r3, [r7, #12] + 8005480: 2300 movs r3, #0 + 8005482: 613b str r3, [r7, #16] + 8005484: 2300 movs r3, #0 + 8005486: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) - 8004b34: 687b ldr r3, [r7, #4] - 8004b36: 681b ldr r3, [r3, #0] - 8004b38: f003 0301 and.w r3, r3, #1 - 8004b3c: 2b00 cmp r3, #0 - 8004b3e: d07d beq.n 8004c3c + 8005488: 687b ldr r3, [r7, #4] + 800548a: 681b ldr r3, [r3, #0] + 800548c: f003 0301 and.w r3, r3, #1 + 8005490: 2b00 cmp r3, #0 + 8005492: d07d beq.n 8005590 { FlagStatus pwrclkchanged = RESET; - 8004b40: 2300 movs r3, #0 - 8004b42: 75fb strb r3, [r7, #23] + 8005494: 2300 movs r3, #0 + 8005496: 75fb strb r3, [r7, #23] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8004b44: 4b4f ldr r3, [pc, #316] @ (8004c84 ) - 8004b46: 69db ldr r3, [r3, #28] - 8004b48: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8004b4c: 2b00 cmp r3, #0 - 8004b4e: d10d bne.n 8004b6c + 8005498: 4b4f ldr r3, [pc, #316] @ (80055d8 ) + 800549a: 69db ldr r3, [r3, #28] + 800549c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80054a0: 2b00 cmp r3, #0 + 80054a2: d10d bne.n 80054c0 { __HAL_RCC_PWR_CLK_ENABLE(); - 8004b50: 4b4c ldr r3, [pc, #304] @ (8004c84 ) - 8004b52: 69db ldr r3, [r3, #28] - 8004b54: 4a4b ldr r2, [pc, #300] @ (8004c84 ) - 8004b56: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8004b5a: 61d3 str r3, [r2, #28] - 8004b5c: 4b49 ldr r3, [pc, #292] @ (8004c84 ) - 8004b5e: 69db ldr r3, [r3, #28] - 8004b60: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8004b64: 60bb str r3, [r7, #8] - 8004b66: 68bb ldr r3, [r7, #8] + 80054a4: 4b4c ldr r3, [pc, #304] @ (80055d8 ) + 80054a6: 69db ldr r3, [r3, #28] + 80054a8: 4a4b ldr r2, [pc, #300] @ (80055d8 ) + 80054aa: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 80054ae: 61d3 str r3, [r2, #28] + 80054b0: 4b49 ldr r3, [pc, #292] @ (80055d8 ) + 80054b2: 69db ldr r3, [r3, #28] + 80054b4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80054b8: 60bb str r3, [r7, #8] + 80054ba: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 8004b68: 2301 movs r3, #1 - 8004b6a: 75fb strb r3, [r7, #23] + 80054bc: 2301 movs r3, #1 + 80054be: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004b6c: 4b46 ldr r3, [pc, #280] @ (8004c88 ) - 8004b6e: 681b ldr r3, [r3, #0] - 8004b70: f403 7380 and.w r3, r3, #256 @ 0x100 - 8004b74: 2b00 cmp r3, #0 - 8004b76: d118 bne.n 8004baa + 80054c0: 4b46 ldr r3, [pc, #280] @ (80055dc ) + 80054c2: 681b ldr r3, [r3, #0] + 80054c4: f403 7380 and.w r3, r3, #256 @ 0x100 + 80054c8: 2b00 cmp r3, #0 + 80054ca: d118 bne.n 80054fe { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 8004b78: 4b43 ldr r3, [pc, #268] @ (8004c88 ) - 8004b7a: 681b ldr r3, [r3, #0] - 8004b7c: 4a42 ldr r2, [pc, #264] @ (8004c88 ) - 8004b7e: f443 7380 orr.w r3, r3, #256 @ 0x100 - 8004b82: 6013 str r3, [r2, #0] + 80054cc: 4b43 ldr r3, [pc, #268] @ (80055dc ) + 80054ce: 681b ldr r3, [r3, #0] + 80054d0: 4a42 ldr r2, [pc, #264] @ (80055dc ) + 80054d2: f443 7380 orr.w r3, r3, #256 @ 0x100 + 80054d6: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8004b84: f7fd fde0 bl 8002748 - 8004b88: 6138 str r0, [r7, #16] + 80054d8: f7fd fdbc bl 8003054 + 80054dc: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004b8a: e008 b.n 8004b9e + 80054de: e008 b.n 80054f2 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8004b8c: f7fd fddc bl 8002748 - 8004b90: 4602 mov r2, r0 - 8004b92: 693b ldr r3, [r7, #16] - 8004b94: 1ad3 subs r3, r2, r3 - 8004b96: 2b64 cmp r3, #100 @ 0x64 - 8004b98: d901 bls.n 8004b9e + 80054e0: f7fd fdb8 bl 8003054 + 80054e4: 4602 mov r2, r0 + 80054e6: 693b ldr r3, [r7, #16] + 80054e8: 1ad3 subs r3, r2, r3 + 80054ea: 2b64 cmp r3, #100 @ 0x64 + 80054ec: d901 bls.n 80054f2 { return HAL_TIMEOUT; - 8004b9a: 2303 movs r3, #3 - 8004b9c: e06d b.n 8004c7a + 80054ee: 2303 movs r3, #3 + 80054f0: e06d b.n 80055ce while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004b9e: 4b3a ldr r3, [pc, #232] @ (8004c88 ) - 8004ba0: 681b ldr r3, [r3, #0] - 8004ba2: f403 7380 and.w r3, r3, #256 @ 0x100 - 8004ba6: 2b00 cmp r3, #0 - 8004ba8: d0f0 beq.n 8004b8c + 80054f2: 4b3a ldr r3, [pc, #232] @ (80055dc ) + 80054f4: 681b ldr r3, [r3, #0] + 80054f6: f403 7380 and.w r3, r3, #256 @ 0x100 + 80054fa: 2b00 cmp r3, #0 + 80054fc: d0f0 beq.n 80054e0 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); - 8004baa: 4b36 ldr r3, [pc, #216] @ (8004c84 ) - 8004bac: 6a1b ldr r3, [r3, #32] - 8004bae: f403 7340 and.w r3, r3, #768 @ 0x300 - 8004bb2: 60fb str r3, [r7, #12] + 80054fe: 4b36 ldr r3, [pc, #216] @ (80055d8 ) + 8005500: 6a1b ldr r3, [r3, #32] + 8005502: f403 7340 and.w r3, r3, #768 @ 0x300 + 8005506: 60fb str r3, [r7, #12] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) - 8004bb4: 68fb ldr r3, [r7, #12] - 8004bb6: 2b00 cmp r3, #0 - 8004bb8: d02e beq.n 8004c18 - 8004bba: 687b ldr r3, [r7, #4] - 8004bbc: 685b ldr r3, [r3, #4] - 8004bbe: f403 7340 and.w r3, r3, #768 @ 0x300 - 8004bc2: 68fa ldr r2, [r7, #12] - 8004bc4: 429a cmp r2, r3 - 8004bc6: d027 beq.n 8004c18 + 8005508: 68fb ldr r3, [r7, #12] + 800550a: 2b00 cmp r3, #0 + 800550c: d02e beq.n 800556c + 800550e: 687b ldr r3, [r7, #4] + 8005510: 685b ldr r3, [r3, #4] + 8005512: f403 7340 and.w r3, r3, #768 @ 0x300 + 8005516: 68fa ldr r2, [r7, #12] + 8005518: 429a cmp r2, r3 + 800551a: d027 beq.n 800556c { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); - 8004bc8: 4b2e ldr r3, [pc, #184] @ (8004c84 ) - 8004bca: 6a1b ldr r3, [r3, #32] - 8004bcc: f423 7340 bic.w r3, r3, #768 @ 0x300 - 8004bd0: 60fb str r3, [r7, #12] + 800551c: 4b2e ldr r3, [pc, #184] @ (80055d8 ) + 800551e: 6a1b ldr r3, [r3, #32] + 8005520: f423 7340 bic.w r3, r3, #768 @ 0x300 + 8005524: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); - 8004bd2: 4b2e ldr r3, [pc, #184] @ (8004c8c ) - 8004bd4: 2201 movs r2, #1 - 8004bd6: 601a str r2, [r3, #0] + 8005526: 4b2e ldr r3, [pc, #184] @ (80055e0 ) + 8005528: 2201 movs r2, #1 + 800552a: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); - 8004bd8: 4b2c ldr r3, [pc, #176] @ (8004c8c ) - 8004bda: 2200 movs r2, #0 - 8004bdc: 601a str r2, [r3, #0] + 800552c: 4b2c ldr r3, [pc, #176] @ (80055e0 ) + 800552e: 2200 movs r2, #0 + 8005530: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; - 8004bde: 4a29 ldr r2, [pc, #164] @ (8004c84 ) - 8004be0: 68fb ldr r3, [r7, #12] - 8004be2: 6213 str r3, [r2, #32] + 8005532: 4a29 ldr r2, [pc, #164] @ (80055d8 ) + 8005534: 68fb ldr r3, [r7, #12] + 8005536: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) - 8004be4: 68fb ldr r3, [r7, #12] - 8004be6: f003 0301 and.w r3, r3, #1 - 8004bea: 2b00 cmp r3, #0 - 8004bec: d014 beq.n 8004c18 + 8005538: 68fb ldr r3, [r7, #12] + 800553a: f003 0301 and.w r3, r3, #1 + 800553e: 2b00 cmp r3, #0 + 8005540: d014 beq.n 800556c { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004bee: f7fd fdab bl 8002748 - 8004bf2: 6138 str r0, [r7, #16] + 8005542: f7fd fd87 bl 8003054 + 8005546: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8004bf4: e00a b.n 8004c0c + 8005548: e00a b.n 8005560 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8004bf6: f7fd fda7 bl 8002748 - 8004bfa: 4602 mov r2, r0 - 8004bfc: 693b ldr r3, [r7, #16] - 8004bfe: 1ad3 subs r3, r2, r3 - 8004c00: f241 3288 movw r2, #5000 @ 0x1388 - 8004c04: 4293 cmp r3, r2 - 8004c06: d901 bls.n 8004c0c + 800554a: f7fd fd83 bl 8003054 + 800554e: 4602 mov r2, r0 + 8005550: 693b ldr r3, [r7, #16] + 8005552: 1ad3 subs r3, r2, r3 + 8005554: f241 3288 movw r2, #5000 @ 0x1388 + 8005558: 4293 cmp r3, r2 + 800555a: d901 bls.n 8005560 { return HAL_TIMEOUT; - 8004c08: 2303 movs r3, #3 - 8004c0a: e036 b.n 8004c7a + 800555c: 2303 movs r3, #3 + 800555e: e036 b.n 80055ce while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8004c0c: 4b1d ldr r3, [pc, #116] @ (8004c84 ) - 8004c0e: 6a1b ldr r3, [r3, #32] - 8004c10: f003 0302 and.w r3, r3, #2 - 8004c14: 2b00 cmp r3, #0 - 8004c16: d0ee beq.n 8004bf6 + 8005560: 4b1d ldr r3, [pc, #116] @ (80055d8 ) + 8005562: 6a1b ldr r3, [r3, #32] + 8005564: f003 0302 and.w r3, r3, #2 + 8005568: 2b00 cmp r3, #0 + 800556a: d0ee beq.n 800554a } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 8004c18: 4b1a ldr r3, [pc, #104] @ (8004c84 ) - 8004c1a: 6a1b ldr r3, [r3, #32] - 8004c1c: f423 7240 bic.w r2, r3, #768 @ 0x300 - 8004c20: 687b ldr r3, [r7, #4] - 8004c22: 685b ldr r3, [r3, #4] - 8004c24: 4917 ldr r1, [pc, #92] @ (8004c84 ) - 8004c26: 4313 orrs r3, r2 - 8004c28: 620b str r3, [r1, #32] + 800556c: 4b1a ldr r3, [pc, #104] @ (80055d8 ) + 800556e: 6a1b ldr r3, [r3, #32] + 8005570: f423 7240 bic.w r2, r3, #768 @ 0x300 + 8005574: 687b ldr r3, [r7, #4] + 8005576: 685b ldr r3, [r3, #4] + 8005578: 4917 ldr r1, [pc, #92] @ (80055d8 ) + 800557a: 4313 orrs r3, r2 + 800557c: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) - 8004c2a: 7dfb ldrb r3, [r7, #23] - 8004c2c: 2b01 cmp r3, #1 - 8004c2e: d105 bne.n 8004c3c + 800557e: 7dfb ldrb r3, [r7, #23] + 8005580: 2b01 cmp r3, #1 + 8005582: d105 bne.n 8005590 { __HAL_RCC_PWR_CLK_DISABLE(); - 8004c30: 4b14 ldr r3, [pc, #80] @ (8004c84 ) - 8004c32: 69db ldr r3, [r3, #28] - 8004c34: 4a13 ldr r2, [pc, #76] @ (8004c84 ) - 8004c36: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 8004c3a: 61d3 str r3, [r2, #28] + 8005584: 4b14 ldr r3, [pc, #80] @ (80055d8 ) + 8005586: 69db ldr r3, [r3, #28] + 8005588: 4a13 ldr r2, [pc, #76] @ (80055d8 ) + 800558a: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 800558e: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - 8004c3c: 687b ldr r3, [r7, #4] - 8004c3e: 681b ldr r3, [r3, #0] - 8004c40: f003 0302 and.w r3, r3, #2 - 8004c44: 2b00 cmp r3, #0 - 8004c46: d008 beq.n 8004c5a + 8005590: 687b ldr r3, [r7, #4] + 8005592: 681b ldr r3, [r3, #0] + 8005594: f003 0302 and.w r3, r3, #2 + 8005598: 2b00 cmp r3, #0 + 800559a: d008 beq.n 80055ae { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - 8004c48: 4b0e ldr r3, [pc, #56] @ (8004c84 ) - 8004c4a: 685b ldr r3, [r3, #4] - 8004c4c: f423 4240 bic.w r2, r3, #49152 @ 0xc000 - 8004c50: 687b ldr r3, [r7, #4] - 8004c52: 689b ldr r3, [r3, #8] - 8004c54: 490b ldr r1, [pc, #44] @ (8004c84 ) - 8004c56: 4313 orrs r3, r2 - 8004c58: 604b str r3, [r1, #4] + 800559c: 4b0e ldr r3, [pc, #56] @ (80055d8 ) + 800559e: 685b ldr r3, [r3, #4] + 80055a0: f423 4240 bic.w r2, r3, #49152 @ 0xc000 + 80055a4: 687b ldr r3, [r7, #4] + 80055a6: 689b ldr r3, [r3, #8] + 80055a8: 490b ldr r1, [pc, #44] @ (80055d8 ) + 80055aa: 4313 orrs r3, r2 + 80055ac: 604b str r3, [r1, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) - 8004c5a: 687b ldr r3, [r7, #4] - 8004c5c: 681b ldr r3, [r3, #0] - 8004c5e: f003 0310 and.w r3, r3, #16 - 8004c62: 2b00 cmp r3, #0 - 8004c64: d008 beq.n 8004c78 + 80055ae: 687b ldr r3, [r7, #4] + 80055b0: 681b ldr r3, [r3, #0] + 80055b2: f003 0310 and.w r3, r3, #16 + 80055b6: 2b00 cmp r3, #0 + 80055b8: d008 beq.n 80055cc { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); - 8004c66: 4b07 ldr r3, [pc, #28] @ (8004c84 ) - 8004c68: 685b ldr r3, [r3, #4] - 8004c6a: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 - 8004c6e: 687b ldr r3, [r7, #4] - 8004c70: 68db ldr r3, [r3, #12] - 8004c72: 4904 ldr r1, [pc, #16] @ (8004c84 ) - 8004c74: 4313 orrs r3, r2 - 8004c76: 604b str r3, [r1, #4] + 80055ba: 4b07 ldr r3, [pc, #28] @ (80055d8 ) + 80055bc: 685b ldr r3, [r3, #4] + 80055be: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 + 80055c2: 687b ldr r3, [r7, #4] + 80055c4: 68db ldr r3, [r3, #12] + 80055c6: 4904 ldr r1, [pc, #16] @ (80055d8 ) + 80055c8: 4313 orrs r3, r2 + 80055ca: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; - 8004c78: 2300 movs r3, #0 + 80055cc: 2300 movs r3, #0 } - 8004c7a: 4618 mov r0, r3 - 8004c7c: 3718 adds r7, #24 - 8004c7e: 46bd mov sp, r7 - 8004c80: bd80 pop {r7, pc} - 8004c82: bf00 nop - 8004c84: 40021000 .word 0x40021000 - 8004c88: 40007000 .word 0x40007000 - 8004c8c: 42420440 .word 0x42420440 + 80055ce: 4618 mov r0, r3 + 80055d0: 3718 adds r7, #24 + 80055d2: 46bd mov sp, r7 + 80055d4: bd80 pop {r7, pc} + 80055d6: bf00 nop + 80055d8: 40021000 .word 0x40021000 + 80055dc: 40007000 .word 0x40007000 + 80055e0: 42420440 .word 0x42420440 -08004c90 : +080055e4 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { - 8004c90: b580 push {r7, lr} - 8004c92: b082 sub sp, #8 - 8004c94: af00 add r7, sp, #0 - 8004c96: 6078 str r0, [r7, #4] + 80055e4: b580 push {r7, lr} + 80055e6: b082 sub sp, #8 + 80055e8: af00 add r7, sp, #0 + 80055ea: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) - 8004c98: 687b ldr r3, [r7, #4] - 8004c9a: 2b00 cmp r3, #0 - 8004c9c: d101 bne.n 8004ca2 + 80055ec: 687b ldr r3, [r7, #4] + 80055ee: 2b00 cmp r3, #0 + 80055f0: d101 bne.n 80055f6 { return HAL_ERROR; - 8004c9e: 2301 movs r3, #1 - 8004ca0: e041 b.n 8004d26 + 80055f2: 2301 movs r3, #1 + 80055f4: e041 b.n 800567a assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) - 8004ca2: 687b ldr r3, [r7, #4] - 8004ca4: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8004ca8: b2db uxtb r3, r3 - 8004caa: 2b00 cmp r3, #0 - 8004cac: d106 bne.n 8004cbc + 80055f6: 687b ldr r3, [r7, #4] + 80055f8: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 80055fc: b2db uxtb r3, r3 + 80055fe: 2b00 cmp r3, #0 + 8005600: d106 bne.n 8005610 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; - 8004cae: 687b ldr r3, [r7, #4] - 8004cb0: 2200 movs r2, #0 - 8004cb2: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8005602: 687b ldr r3, [r7, #4] + 8005604: 2200 movs r2, #0 + 8005606: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); - 8004cb6: 6878 ldr r0, [r7, #4] - 8004cb8: f7fd fc24 bl 8002504 + 800560a: 6878 ldr r0, [r7, #4] + 800560c: f7fd fc00 bl 8002e10 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8004cbc: 687b ldr r3, [r7, #4] - 8004cbe: 2202 movs r2, #2 - 8004cc0: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005610: 687b ldr r3, [r7, #4] + 8005612: 2202 movs r2, #2 + 8005614: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8004cc4: 687b ldr r3, [r7, #4] - 8004cc6: 681a ldr r2, [r3, #0] - 8004cc8: 687b ldr r3, [r7, #4] - 8004cca: 3304 adds r3, #4 - 8004ccc: 4619 mov r1, r3 - 8004cce: 4610 mov r0, r2 - 8004cd0: f000 fa5c bl 800518c + 8005618: 687b ldr r3, [r7, #4] + 800561a: 681a ldr r2, [r3, #0] + 800561c: 687b ldr r3, [r7, #4] + 800561e: 3304 adds r3, #4 + 8005620: 4619 mov r1, r3 + 8005622: 4610 mov r0, r2 + 8005624: f000 fa5c bl 8005ae0 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8004cd4: 687b ldr r3, [r7, #4] - 8004cd6: 2201 movs r2, #1 - 8004cd8: f883 2046 strb.w r2, [r3, #70] @ 0x46 + 8005628: 687b ldr r3, [r7, #4] + 800562a: 2201 movs r2, #1 + 800562c: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8004cdc: 687b ldr r3, [r7, #4] - 8004cde: 2201 movs r2, #1 - 8004ce0: f883 203e strb.w r2, [r3, #62] @ 0x3e - 8004ce4: 687b ldr r3, [r7, #4] - 8004ce6: 2201 movs r2, #1 - 8004ce8: f883 203f strb.w r2, [r3, #63] @ 0x3f - 8004cec: 687b ldr r3, [r7, #4] - 8004cee: 2201 movs r2, #1 - 8004cf0: f883 2040 strb.w r2, [r3, #64] @ 0x40 - 8004cf4: 687b ldr r3, [r7, #4] - 8004cf6: 2201 movs r2, #1 - 8004cf8: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005630: 687b ldr r3, [r7, #4] + 8005632: 2201 movs r2, #1 + 8005634: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8005638: 687b ldr r3, [r7, #4] + 800563a: 2201 movs r2, #1 + 800563c: f883 203f strb.w r2, [r3, #63] @ 0x3f + 8005640: 687b ldr r3, [r7, #4] + 8005642: 2201 movs r2, #1 + 8005644: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 8005648: 687b ldr r3, [r7, #4] + 800564a: 2201 movs r2, #1 + 800564c: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8004cfc: 687b ldr r3, [r7, #4] - 8004cfe: 2201 movs r2, #1 - 8004d00: f883 2042 strb.w r2, [r3, #66] @ 0x42 - 8004d04: 687b ldr r3, [r7, #4] - 8004d06: 2201 movs r2, #1 - 8004d08: f883 2043 strb.w r2, [r3, #67] @ 0x43 - 8004d0c: 687b ldr r3, [r7, #4] - 8004d0e: 2201 movs r2, #1 - 8004d10: f883 2044 strb.w r2, [r3, #68] @ 0x44 - 8004d14: 687b ldr r3, [r7, #4] - 8004d16: 2201 movs r2, #1 - 8004d18: f883 2045 strb.w r2, [r3, #69] @ 0x45 + 8005650: 687b ldr r3, [r7, #4] + 8005652: 2201 movs r2, #1 + 8005654: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005658: 687b ldr r3, [r7, #4] + 800565a: 2201 movs r2, #1 + 800565c: f883 2043 strb.w r2, [r3, #67] @ 0x43 + 8005660: 687b ldr r3, [r7, #4] + 8005662: 2201 movs r2, #1 + 8005664: f883 2044 strb.w r2, [r3, #68] @ 0x44 + 8005668: 687b ldr r3, [r7, #4] + 800566a: 2201 movs r2, #1 + 800566c: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; - 8004d1c: 687b ldr r3, [r7, #4] - 8004d1e: 2201 movs r2, #1 - 8004d20: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005670: 687b ldr r3, [r7, #4] + 8005672: 2201 movs r2, #1 + 8005674: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; - 8004d24: 2300 movs r3, #0 + 8005678: 2300 movs r3, #0 } - 8004d26: 4618 mov r0, r3 - 8004d28: 3708 adds r7, #8 - 8004d2a: 46bd mov sp, r7 - 8004d2c: bd80 pop {r7, pc} + 800567a: 4618 mov r0, r3 + 800567c: 3708 adds r7, #8 + 800567e: 46bd mov sp, r7 + 8005680: bd80 pop {r7, pc} ... -08004d30 : +08005684 : * @brief Starts the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) { - 8004d30: b480 push {r7} - 8004d32: b085 sub sp, #20 - 8004d34: af00 add r7, sp, #0 - 8004d36: 6078 str r0, [r7, #4] + 8005684: b480 push {r7} + 8005686: b085 sub sp, #20 + 8005688: af00 add r7, sp, #0 + 800568a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Check the TIM state */ if (htim->State != HAL_TIM_STATE_READY) - 8004d38: 687b ldr r3, [r7, #4] - 8004d3a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8004d3e: b2db uxtb r3, r3 - 8004d40: 2b01 cmp r3, #1 - 8004d42: d001 beq.n 8004d48 + 800568c: 687b ldr r3, [r7, #4] + 800568e: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8005692: b2db uxtb r3, r3 + 8005694: 2b01 cmp r3, #1 + 8005696: d001 beq.n 800569c { return HAL_ERROR; - 8004d44: 2301 movs r3, #1 - 8004d46: e03a b.n 8004dbe + 8005698: 2301 movs r3, #1 + 800569a: e03a b.n 8005712 } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8004d48: 687b ldr r3, [r7, #4] - 8004d4a: 2202 movs r2, #2 - 8004d4c: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800569c: 687b ldr r3, [r7, #4] + 800569e: 2202 movs r2, #2 + 80056a0: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - 8004d50: 687b ldr r3, [r7, #4] - 8004d52: 681b ldr r3, [r3, #0] - 8004d54: 68da ldr r2, [r3, #12] - 8004d56: 687b ldr r3, [r7, #4] - 8004d58: 681b ldr r3, [r3, #0] - 8004d5a: f042 0201 orr.w r2, r2, #1 - 8004d5e: 60da str r2, [r3, #12] + 80056a4: 687b ldr r3, [r7, #4] + 80056a6: 681b ldr r3, [r3, #0] + 80056a8: 68da ldr r2, [r3, #12] + 80056aa: 687b ldr r3, [r7, #4] + 80056ac: 681b ldr r3, [r3, #0] + 80056ae: f042 0201 orr.w r2, r2, #1 + 80056b2: 60da str r2, [r3, #12] /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8004d60: 687b ldr r3, [r7, #4] - 8004d62: 681b ldr r3, [r3, #0] - 8004d64: 4a18 ldr r2, [pc, #96] @ (8004dc8 ) - 8004d66: 4293 cmp r3, r2 - 8004d68: d00e beq.n 8004d88 - 8004d6a: 687b ldr r3, [r7, #4] - 8004d6c: 681b ldr r3, [r3, #0] - 8004d6e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 8004d72: d009 beq.n 8004d88 - 8004d74: 687b ldr r3, [r7, #4] - 8004d76: 681b ldr r3, [r3, #0] - 8004d78: 4a14 ldr r2, [pc, #80] @ (8004dcc ) - 8004d7a: 4293 cmp r3, r2 - 8004d7c: d004 beq.n 8004d88 - 8004d7e: 687b ldr r3, [r7, #4] - 8004d80: 681b ldr r3, [r3, #0] - 8004d82: 4a13 ldr r2, [pc, #76] @ (8004dd0 ) - 8004d84: 4293 cmp r3, r2 - 8004d86: d111 bne.n 8004dac + 80056b4: 687b ldr r3, [r7, #4] + 80056b6: 681b ldr r3, [r3, #0] + 80056b8: 4a18 ldr r2, [pc, #96] @ (800571c ) + 80056ba: 4293 cmp r3, r2 + 80056bc: d00e beq.n 80056dc + 80056be: 687b ldr r3, [r7, #4] + 80056c0: 681b ldr r3, [r3, #0] + 80056c2: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 80056c6: d009 beq.n 80056dc + 80056c8: 687b ldr r3, [r7, #4] + 80056ca: 681b ldr r3, [r3, #0] + 80056cc: 4a14 ldr r2, [pc, #80] @ (8005720 ) + 80056ce: 4293 cmp r3, r2 + 80056d0: d004 beq.n 80056dc + 80056d2: 687b ldr r3, [r7, #4] + 80056d4: 681b ldr r3, [r3, #0] + 80056d6: 4a13 ldr r2, [pc, #76] @ (8005724 ) + 80056d8: 4293 cmp r3, r2 + 80056da: d111 bne.n 8005700 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8004d88: 687b ldr r3, [r7, #4] - 8004d8a: 681b ldr r3, [r3, #0] - 8004d8c: 689b ldr r3, [r3, #8] - 8004d8e: f003 0307 and.w r3, r3, #7 - 8004d92: 60fb str r3, [r7, #12] + 80056dc: 687b ldr r3, [r7, #4] + 80056de: 681b ldr r3, [r3, #0] + 80056e0: 689b ldr r3, [r3, #8] + 80056e2: f003 0307 and.w r3, r3, #7 + 80056e6: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8004d94: 68fb ldr r3, [r7, #12] - 8004d96: 2b06 cmp r3, #6 - 8004d98: d010 beq.n 8004dbc + 80056e8: 68fb ldr r3, [r7, #12] + 80056ea: 2b06 cmp r3, #6 + 80056ec: d010 beq.n 8005710 { __HAL_TIM_ENABLE(htim); - 8004d9a: 687b ldr r3, [r7, #4] - 8004d9c: 681b ldr r3, [r3, #0] - 8004d9e: 681a ldr r2, [r3, #0] - 8004da0: 687b ldr r3, [r7, #4] - 8004da2: 681b ldr r3, [r3, #0] - 8004da4: f042 0201 orr.w r2, r2, #1 - 8004da8: 601a str r2, [r3, #0] + 80056ee: 687b ldr r3, [r7, #4] + 80056f0: 681b ldr r3, [r3, #0] + 80056f2: 681a ldr r2, [r3, #0] + 80056f4: 687b ldr r3, [r7, #4] + 80056f6: 681b ldr r3, [r3, #0] + 80056f8: f042 0201 orr.w r2, r2, #1 + 80056fc: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8004daa: e007 b.n 8004dbc + 80056fe: e007 b.n 8005710 } } else { __HAL_TIM_ENABLE(htim); - 8004dac: 687b ldr r3, [r7, #4] - 8004dae: 681b ldr r3, [r3, #0] - 8004db0: 681a ldr r2, [r3, #0] - 8004db2: 687b ldr r3, [r7, #4] - 8004db4: 681b ldr r3, [r3, #0] - 8004db6: f042 0201 orr.w r2, r2, #1 - 8004dba: 601a str r2, [r3, #0] + 8005700: 687b ldr r3, [r7, #4] + 8005702: 681b ldr r3, [r3, #0] + 8005704: 681a ldr r2, [r3, #0] + 8005706: 687b ldr r3, [r7, #4] + 8005708: 681b ldr r3, [r3, #0] + 800570a: f042 0201 orr.w r2, r2, #1 + 800570e: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; - 8004dbc: 2300 movs r3, #0 + 8005710: 2300 movs r3, #0 } - 8004dbe: 4618 mov r0, r3 - 8004dc0: 3714 adds r7, #20 - 8004dc2: 46bd mov sp, r7 - 8004dc4: bc80 pop {r7} - 8004dc6: 4770 bx lr - 8004dc8: 40012c00 .word 0x40012c00 - 8004dcc: 40000400 .word 0x40000400 - 8004dd0: 40000800 .word 0x40000800 + 8005712: 4618 mov r0, r3 + 8005714: 3714 adds r7, #20 + 8005716: 46bd mov sp, r7 + 8005718: bc80 pop {r7} + 800571a: 4770 bx lr + 800571c: 40012c00 .word 0x40012c00 + 8005720: 40000400 .word 0x40000400 + 8005724: 40000800 .word 0x40000800 -08004dd4 : +08005728 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { - 8004dd4: b580 push {r7, lr} - 8004dd6: b084 sub sp, #16 - 8004dd8: af00 add r7, sp, #0 - 8004dda: 6078 str r0, [r7, #4] + 8005728: b580 push {r7, lr} + 800572a: b084 sub sp, #16 + 800572c: af00 add r7, sp, #0 + 800572e: 6078 str r0, [r7, #4] uint32_t itsource = htim->Instance->DIER; - 8004ddc: 687b ldr r3, [r7, #4] - 8004dde: 681b ldr r3, [r3, #0] - 8004de0: 68db ldr r3, [r3, #12] - 8004de2: 60fb str r3, [r7, #12] + 8005730: 687b ldr r3, [r7, #4] + 8005732: 681b ldr r3, [r3, #0] + 8005734: 68db ldr r3, [r3, #12] + 8005736: 60fb str r3, [r7, #12] uint32_t itflag = htim->Instance->SR; - 8004de4: 687b ldr r3, [r7, #4] - 8004de6: 681b ldr r3, [r3, #0] - 8004de8: 691b ldr r3, [r3, #16] - 8004dea: 60bb str r3, [r7, #8] + 8005738: 687b ldr r3, [r7, #4] + 800573a: 681b ldr r3, [r3, #0] + 800573c: 691b ldr r3, [r3, #16] + 800573e: 60bb str r3, [r7, #8] /* Capture compare 1 event */ if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) - 8004dec: 68bb ldr r3, [r7, #8] - 8004dee: f003 0302 and.w r3, r3, #2 - 8004df2: 2b00 cmp r3, #0 - 8004df4: d020 beq.n 8004e38 + 8005740: 68bb ldr r3, [r7, #8] + 8005742: f003 0302 and.w r3, r3, #2 + 8005746: 2b00 cmp r3, #0 + 8005748: d020 beq.n 800578c { if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) - 8004df6: 68fb ldr r3, [r7, #12] - 8004df8: f003 0302 and.w r3, r3, #2 - 8004dfc: 2b00 cmp r3, #0 - 8004dfe: d01b beq.n 8004e38 + 800574a: 68fb ldr r3, [r7, #12] + 800574c: f003 0302 and.w r3, r3, #2 + 8005750: 2b00 cmp r3, #0 + 8005752: d01b beq.n 800578c { { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); - 8004e00: 687b ldr r3, [r7, #4] - 8004e02: 681b ldr r3, [r3, #0] - 8004e04: f06f 0202 mvn.w r2, #2 - 8004e08: 611a str r2, [r3, #16] + 8005754: 687b ldr r3, [r7, #4] + 8005756: 681b ldr r3, [r3, #0] + 8005758: f06f 0202 mvn.w r2, #2 + 800575c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 8004e0a: 687b ldr r3, [r7, #4] - 8004e0c: 2201 movs r2, #1 - 8004e0e: 771a strb r2, [r3, #28] + 800575e: 687b ldr r3, [r7, #4] + 8005760: 2201 movs r2, #1 + 8005762: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 8004e10: 687b ldr r3, [r7, #4] - 8004e12: 681b ldr r3, [r3, #0] - 8004e14: 699b ldr r3, [r3, #24] - 8004e16: f003 0303 and.w r3, r3, #3 - 8004e1a: 2b00 cmp r3, #0 - 8004e1c: d003 beq.n 8004e26 + 8005764: 687b ldr r3, [r7, #4] + 8005766: 681b ldr r3, [r3, #0] + 8005768: 699b ldr r3, [r3, #24] + 800576a: f003 0303 and.w r3, r3, #3 + 800576e: 2b00 cmp r3, #0 + 8005770: d003 beq.n 800577a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8004e1e: 6878 ldr r0, [r7, #4] - 8004e20: f000 f998 bl 8005154 - 8004e24: e005 b.n 8004e32 + 8005772: 6878 ldr r0, [r7, #4] + 8005774: f000 f998 bl 8005aa8 + 8005778: e005 b.n 8005786 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8004e26: 6878 ldr r0, [r7, #4] - 8004e28: f000 f98b bl 8005142 + 800577a: 6878 ldr r0, [r7, #4] + 800577c: f000 f98b bl 8005a96 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004e2c: 6878 ldr r0, [r7, #4] - 8004e2e: f000 f99a bl 8005166 + 8005780: 6878 ldr r0, [r7, #4] + 8005782: f000 f99a bl 8005aba #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004e32: 687b ldr r3, [r7, #4] - 8004e34: 2200 movs r2, #0 - 8004e36: 771a strb r2, [r3, #28] + 8005786: 687b ldr r3, [r7, #4] + 8005788: 2200 movs r2, #0 + 800578a: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) - 8004e38: 68bb ldr r3, [r7, #8] - 8004e3a: f003 0304 and.w r3, r3, #4 - 8004e3e: 2b00 cmp r3, #0 - 8004e40: d020 beq.n 8004e84 + 800578c: 68bb ldr r3, [r7, #8] + 800578e: f003 0304 and.w r3, r3, #4 + 8005792: 2b00 cmp r3, #0 + 8005794: d020 beq.n 80057d8 { if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) - 8004e42: 68fb ldr r3, [r7, #12] - 8004e44: f003 0304 and.w r3, r3, #4 - 8004e48: 2b00 cmp r3, #0 - 8004e4a: d01b beq.n 8004e84 + 8005796: 68fb ldr r3, [r7, #12] + 8005798: f003 0304 and.w r3, r3, #4 + 800579c: 2b00 cmp r3, #0 + 800579e: d01b beq.n 80057d8 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); - 8004e4c: 687b ldr r3, [r7, #4] - 8004e4e: 681b ldr r3, [r3, #0] - 8004e50: f06f 0204 mvn.w r2, #4 - 8004e54: 611a str r2, [r3, #16] + 80057a0: 687b ldr r3, [r7, #4] + 80057a2: 681b ldr r3, [r3, #0] + 80057a4: f06f 0204 mvn.w r2, #4 + 80057a8: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 8004e56: 687b ldr r3, [r7, #4] - 8004e58: 2202 movs r2, #2 - 8004e5a: 771a strb r2, [r3, #28] + 80057aa: 687b ldr r3, [r7, #4] + 80057ac: 2202 movs r2, #2 + 80057ae: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 8004e5c: 687b ldr r3, [r7, #4] - 8004e5e: 681b ldr r3, [r3, #0] - 8004e60: 699b ldr r3, [r3, #24] - 8004e62: f403 7340 and.w r3, r3, #768 @ 0x300 - 8004e66: 2b00 cmp r3, #0 - 8004e68: d003 beq.n 8004e72 + 80057b0: 687b ldr r3, [r7, #4] + 80057b2: 681b ldr r3, [r3, #0] + 80057b4: 699b ldr r3, [r3, #24] + 80057b6: f403 7340 and.w r3, r3, #768 @ 0x300 + 80057ba: 2b00 cmp r3, #0 + 80057bc: d003 beq.n 80057c6 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8004e6a: 6878 ldr r0, [r7, #4] - 8004e6c: f000 f972 bl 8005154 - 8004e70: e005 b.n 8004e7e + 80057be: 6878 ldr r0, [r7, #4] + 80057c0: f000 f972 bl 8005aa8 + 80057c4: e005 b.n 80057d2 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8004e72: 6878 ldr r0, [r7, #4] - 8004e74: f000 f965 bl 8005142 + 80057c6: 6878 ldr r0, [r7, #4] + 80057c8: f000 f965 bl 8005a96 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004e78: 6878 ldr r0, [r7, #4] - 8004e7a: f000 f974 bl 8005166 + 80057cc: 6878 ldr r0, [r7, #4] + 80057ce: f000 f974 bl 8005aba #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004e7e: 687b ldr r3, [r7, #4] - 8004e80: 2200 movs r2, #0 - 8004e82: 771a strb r2, [r3, #28] + 80057d2: 687b ldr r3, [r7, #4] + 80057d4: 2200 movs r2, #0 + 80057d6: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) - 8004e84: 68bb ldr r3, [r7, #8] - 8004e86: f003 0308 and.w r3, r3, #8 - 8004e8a: 2b00 cmp r3, #0 - 8004e8c: d020 beq.n 8004ed0 + 80057d8: 68bb ldr r3, [r7, #8] + 80057da: f003 0308 and.w r3, r3, #8 + 80057de: 2b00 cmp r3, #0 + 80057e0: d020 beq.n 8005824 { if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) - 8004e8e: 68fb ldr r3, [r7, #12] - 8004e90: f003 0308 and.w r3, r3, #8 - 8004e94: 2b00 cmp r3, #0 - 8004e96: d01b beq.n 8004ed0 + 80057e2: 68fb ldr r3, [r7, #12] + 80057e4: f003 0308 and.w r3, r3, #8 + 80057e8: 2b00 cmp r3, #0 + 80057ea: d01b beq.n 8005824 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); - 8004e98: 687b ldr r3, [r7, #4] - 8004e9a: 681b ldr r3, [r3, #0] - 8004e9c: f06f 0208 mvn.w r2, #8 - 8004ea0: 611a str r2, [r3, #16] + 80057ec: 687b ldr r3, [r7, #4] + 80057ee: 681b ldr r3, [r3, #0] + 80057f0: f06f 0208 mvn.w r2, #8 + 80057f4: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 8004ea2: 687b ldr r3, [r7, #4] - 8004ea4: 2204 movs r2, #4 - 8004ea6: 771a strb r2, [r3, #28] + 80057f6: 687b ldr r3, [r7, #4] + 80057f8: 2204 movs r2, #4 + 80057fa: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 8004ea8: 687b ldr r3, [r7, #4] - 8004eaa: 681b ldr r3, [r3, #0] - 8004eac: 69db ldr r3, [r3, #28] - 8004eae: f003 0303 and.w r3, r3, #3 - 8004eb2: 2b00 cmp r3, #0 - 8004eb4: d003 beq.n 8004ebe + 80057fc: 687b ldr r3, [r7, #4] + 80057fe: 681b ldr r3, [r3, #0] + 8005800: 69db ldr r3, [r3, #28] + 8005802: f003 0303 and.w r3, r3, #3 + 8005806: 2b00 cmp r3, #0 + 8005808: d003 beq.n 8005812 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8004eb6: 6878 ldr r0, [r7, #4] - 8004eb8: f000 f94c bl 8005154 - 8004ebc: e005 b.n 8004eca + 800580a: 6878 ldr r0, [r7, #4] + 800580c: f000 f94c bl 8005aa8 + 8005810: e005 b.n 800581e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8004ebe: 6878 ldr r0, [r7, #4] - 8004ec0: f000 f93f bl 8005142 + 8005812: 6878 ldr r0, [r7, #4] + 8005814: f000 f93f bl 8005a96 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004ec4: 6878 ldr r0, [r7, #4] - 8004ec6: f000 f94e bl 8005166 + 8005818: 6878 ldr r0, [r7, #4] + 800581a: f000 f94e bl 8005aba #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004eca: 687b ldr r3, [r7, #4] - 8004ecc: 2200 movs r2, #0 - 8004ece: 771a strb r2, [r3, #28] + 800581e: 687b ldr r3, [r7, #4] + 8005820: 2200 movs r2, #0 + 8005822: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) - 8004ed0: 68bb ldr r3, [r7, #8] - 8004ed2: f003 0310 and.w r3, r3, #16 - 8004ed6: 2b00 cmp r3, #0 - 8004ed8: d020 beq.n 8004f1c + 8005824: 68bb ldr r3, [r7, #8] + 8005826: f003 0310 and.w r3, r3, #16 + 800582a: 2b00 cmp r3, #0 + 800582c: d020 beq.n 8005870 { if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) - 8004eda: 68fb ldr r3, [r7, #12] - 8004edc: f003 0310 and.w r3, r3, #16 - 8004ee0: 2b00 cmp r3, #0 - 8004ee2: d01b beq.n 8004f1c + 800582e: 68fb ldr r3, [r7, #12] + 8005830: f003 0310 and.w r3, r3, #16 + 8005834: 2b00 cmp r3, #0 + 8005836: d01b beq.n 8005870 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); - 8004ee4: 687b ldr r3, [r7, #4] - 8004ee6: 681b ldr r3, [r3, #0] - 8004ee8: f06f 0210 mvn.w r2, #16 - 8004eec: 611a str r2, [r3, #16] + 8005838: 687b ldr r3, [r7, #4] + 800583a: 681b ldr r3, [r3, #0] + 800583c: f06f 0210 mvn.w r2, #16 + 8005840: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 8004eee: 687b ldr r3, [r7, #4] - 8004ef0: 2208 movs r2, #8 - 8004ef2: 771a strb r2, [r3, #28] + 8005842: 687b ldr r3, [r7, #4] + 8005844: 2208 movs r2, #8 + 8005846: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8004ef4: 687b ldr r3, [r7, #4] - 8004ef6: 681b ldr r3, [r3, #0] - 8004ef8: 69db ldr r3, [r3, #28] - 8004efa: f403 7340 and.w r3, r3, #768 @ 0x300 - 8004efe: 2b00 cmp r3, #0 - 8004f00: d003 beq.n 8004f0a + 8005848: 687b ldr r3, [r7, #4] + 800584a: 681b ldr r3, [r3, #0] + 800584c: 69db ldr r3, [r3, #28] + 800584e: f403 7340 and.w r3, r3, #768 @ 0x300 + 8005852: 2b00 cmp r3, #0 + 8005854: d003 beq.n 800585e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8004f02: 6878 ldr r0, [r7, #4] - 8004f04: f000 f926 bl 8005154 - 8004f08: e005 b.n 8004f16 + 8005856: 6878 ldr r0, [r7, #4] + 8005858: f000 f926 bl 8005aa8 + 800585c: e005 b.n 800586a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8004f0a: 6878 ldr r0, [r7, #4] - 8004f0c: f000 f919 bl 8005142 + 800585e: 6878 ldr r0, [r7, #4] + 8005860: f000 f919 bl 8005a96 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004f10: 6878 ldr r0, [r7, #4] - 8004f12: f000 f928 bl 8005166 + 8005864: 6878 ldr r0, [r7, #4] + 8005866: f000 f928 bl 8005aba #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004f16: 687b ldr r3, [r7, #4] - 8004f18: 2200 movs r2, #0 - 8004f1a: 771a strb r2, [r3, #28] + 800586a: 687b ldr r3, [r7, #4] + 800586c: 2200 movs r2, #0 + 800586e: 771a strb r2, [r3, #28] } } /* TIM Update event */ if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) - 8004f1c: 68bb ldr r3, [r7, #8] - 8004f1e: f003 0301 and.w r3, r3, #1 - 8004f22: 2b00 cmp r3, #0 - 8004f24: d00c beq.n 8004f40 + 8005870: 68bb ldr r3, [r7, #8] + 8005872: f003 0301 and.w r3, r3, #1 + 8005876: 2b00 cmp r3, #0 + 8005878: d00c beq.n 8005894 { if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) - 8004f26: 68fb ldr r3, [r7, #12] - 8004f28: f003 0301 and.w r3, r3, #1 - 8004f2c: 2b00 cmp r3, #0 - 8004f2e: d007 beq.n 8004f40 + 800587a: 68fb ldr r3, [r7, #12] + 800587c: f003 0301 and.w r3, r3, #1 + 8005880: 2b00 cmp r3, #0 + 8005882: d007 beq.n 8005894 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); - 8004f30: 687b ldr r3, [r7, #4] - 8004f32: 681b ldr r3, [r3, #0] - 8004f34: f06f 0201 mvn.w r2, #1 - 8004f38: 611a str r2, [r3, #16] + 8005884: 687b ldr r3, [r7, #4] + 8005886: 681b ldr r3, [r3, #0] + 8005888: f06f 0201 mvn.w r2, #1 + 800588c: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); - 8004f3a: 6878 ldr r0, [r7, #4] - 8004f3c: f7fd f90a bl 8002154 + 800588e: 6878 ldr r0, [r7, #4] + 8005890: f7fd f8e6 bl 8002a60 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) - 8004f40: 68bb ldr r3, [r7, #8] - 8004f42: f003 0380 and.w r3, r3, #128 @ 0x80 - 8004f46: 2b00 cmp r3, #0 - 8004f48: d00c beq.n 8004f64 + 8005894: 68bb ldr r3, [r7, #8] + 8005896: f003 0380 and.w r3, r3, #128 @ 0x80 + 800589a: 2b00 cmp r3, #0 + 800589c: d00c beq.n 80058b8 { if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) - 8004f4a: 68fb ldr r3, [r7, #12] - 8004f4c: f003 0380 and.w r3, r3, #128 @ 0x80 - 8004f50: 2b00 cmp r3, #0 - 8004f52: d007 beq.n 8004f64 + 800589e: 68fb ldr r3, [r7, #12] + 80058a0: f003 0380 and.w r3, r3, #128 @ 0x80 + 80058a4: 2b00 cmp r3, #0 + 80058a6: d007 beq.n 80058b8 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK); - 8004f54: 687b ldr r3, [r7, #4] - 8004f56: 681b ldr r3, [r3, #0] - 8004f58: f06f 0280 mvn.w r2, #128 @ 0x80 - 8004f5c: 611a str r2, [r3, #16] + 80058a8: 687b ldr r3, [r7, #4] + 80058aa: 681b ldr r3, [r3, #0] + 80058ac: f06f 0280 mvn.w r2, #128 @ 0x80 + 80058b0: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); - 8004f5e: 6878 ldr r0, [r7, #4] - 8004f60: f000 fa7f bl 8005462 + 80058b2: 6878 ldr r0, [r7, #4] + 80058b4: f000 fa7f bl 8005db6 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) - 8004f64: 68bb ldr r3, [r7, #8] - 8004f66: f003 0340 and.w r3, r3, #64 @ 0x40 - 8004f6a: 2b00 cmp r3, #0 - 8004f6c: d00c beq.n 8004f88 + 80058b8: 68bb ldr r3, [r7, #8] + 80058ba: f003 0340 and.w r3, r3, #64 @ 0x40 + 80058be: 2b00 cmp r3, #0 + 80058c0: d00c beq.n 80058dc { if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) - 8004f6e: 68fb ldr r3, [r7, #12] - 8004f70: f003 0340 and.w r3, r3, #64 @ 0x40 - 8004f74: 2b00 cmp r3, #0 - 8004f76: d007 beq.n 8004f88 + 80058c2: 68fb ldr r3, [r7, #12] + 80058c4: f003 0340 and.w r3, r3, #64 @ 0x40 + 80058c8: 2b00 cmp r3, #0 + 80058ca: d007 beq.n 80058dc { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); - 8004f78: 687b ldr r3, [r7, #4] - 8004f7a: 681b ldr r3, [r3, #0] - 8004f7c: f06f 0240 mvn.w r2, #64 @ 0x40 - 8004f80: 611a str r2, [r3, #16] + 80058cc: 687b ldr r3, [r7, #4] + 80058ce: 681b ldr r3, [r3, #0] + 80058d0: f06f 0240 mvn.w r2, #64 @ 0x40 + 80058d4: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); - 8004f82: 6878 ldr r0, [r7, #4] - 8004f84: f000 f8f8 bl 8005178 + 80058d6: 6878 ldr r0, [r7, #4] + 80058d8: f000 f8f8 bl 8005acc #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM)) - 8004f88: 68bb ldr r3, [r7, #8] - 8004f8a: f003 0320 and.w r3, r3, #32 - 8004f8e: 2b00 cmp r3, #0 - 8004f90: d00c beq.n 8004fac + 80058dc: 68bb ldr r3, [r7, #8] + 80058de: f003 0320 and.w r3, r3, #32 + 80058e2: 2b00 cmp r3, #0 + 80058e4: d00c beq.n 8005900 { if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM)) - 8004f92: 68fb ldr r3, [r7, #12] - 8004f94: f003 0320 and.w r3, r3, #32 - 8004f98: 2b00 cmp r3, #0 - 8004f9a: d007 beq.n 8004fac + 80058e6: 68fb ldr r3, [r7, #12] + 80058e8: f003 0320 and.w r3, r3, #32 + 80058ec: 2b00 cmp r3, #0 + 80058ee: d007 beq.n 8005900 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); - 8004f9c: 687b ldr r3, [r7, #4] - 8004f9e: 681b ldr r3, [r3, #0] - 8004fa0: f06f 0220 mvn.w r2, #32 - 8004fa4: 611a str r2, [r3, #16] + 80058f0: 687b ldr r3, [r7, #4] + 80058f2: 681b ldr r3, [r3, #0] + 80058f4: f06f 0220 mvn.w r2, #32 + 80058f8: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); - 8004fa6: 6878 ldr r0, [r7, #4] - 8004fa8: f000 fa52 bl 8005450 + 80058fa: 6878 ldr r0, [r7, #4] + 80058fc: f000 fa52 bl 8005da4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } - 8004fac: bf00 nop - 8004fae: 3710 adds r7, #16 - 8004fb0: 46bd mov sp, r7 - 8004fb2: bd80 pop {r7, pc} + 8005900: bf00 nop + 8005902: 3710 adds r7, #16 + 8005904: 46bd mov sp, r7 + 8005906: bd80 pop {r7, pc} -08004fb4 : +08005908 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { - 8004fb4: b580 push {r7, lr} - 8004fb6: b084 sub sp, #16 - 8004fb8: af00 add r7, sp, #0 - 8004fba: 6078 str r0, [r7, #4] - 8004fbc: 6039 str r1, [r7, #0] + 8005908: b580 push {r7, lr} + 800590a: b084 sub sp, #16 + 800590c: af00 add r7, sp, #0 + 800590e: 6078 str r0, [r7, #4] + 8005910: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; - 8004fbe: 2300 movs r3, #0 - 8004fc0: 73fb strb r3, [r7, #15] + 8005912: 2300 movs r3, #0 + 8005914: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); - 8004fc2: 687b ldr r3, [r7, #4] - 8004fc4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8004fc8: 2b01 cmp r3, #1 - 8004fca: d101 bne.n 8004fd0 - 8004fcc: 2302 movs r3, #2 - 8004fce: e0b4 b.n 800513a - 8004fd0: 687b ldr r3, [r7, #4] - 8004fd2: 2201 movs r2, #1 - 8004fd4: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8005916: 687b ldr r3, [r7, #4] + 8005918: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 800591c: 2b01 cmp r3, #1 + 800591e: d101 bne.n 8005924 + 8005920: 2302 movs r3, #2 + 8005922: e0b4 b.n 8005a8e + 8005924: 687b ldr r3, [r7, #4] + 8005926: 2201 movs r2, #1 + 8005928: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; - 8004fd8: 687b ldr r3, [r7, #4] - 8004fda: 2202 movs r2, #2 - 8004fdc: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800592c: 687b ldr r3, [r7, #4] + 800592e: 2202 movs r2, #2 + 8005930: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; - 8004fe0: 687b ldr r3, [r7, #4] - 8004fe2: 681b ldr r3, [r3, #0] - 8004fe4: 689b ldr r3, [r3, #8] - 8004fe6: 60bb str r3, [r7, #8] + 8005934: 687b ldr r3, [r7, #4] + 8005936: 681b ldr r3, [r3, #0] + 8005938: 689b ldr r3, [r3, #8] + 800593a: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - 8004fe8: 68bb ldr r3, [r7, #8] - 8004fea: f023 0377 bic.w r3, r3, #119 @ 0x77 - 8004fee: 60bb str r3, [r7, #8] + 800593c: 68bb ldr r3, [r7, #8] + 800593e: f023 0377 bic.w r3, r3, #119 @ 0x77 + 8005942: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8004ff0: 68bb ldr r3, [r7, #8] - 8004ff2: f423 437f bic.w r3, r3, #65280 @ 0xff00 - 8004ff6: 60bb str r3, [r7, #8] + 8005944: 68bb ldr r3, [r7, #8] + 8005946: f423 437f bic.w r3, r3, #65280 @ 0xff00 + 800594a: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; - 8004ff8: 687b ldr r3, [r7, #4] - 8004ffa: 681b ldr r3, [r3, #0] - 8004ffc: 68ba ldr r2, [r7, #8] - 8004ffe: 609a str r2, [r3, #8] + 800594c: 687b ldr r3, [r7, #4] + 800594e: 681b ldr r3, [r3, #0] + 8005950: 68ba ldr r2, [r7, #8] + 8005952: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) - 8005000: 683b ldr r3, [r7, #0] - 8005002: 681b ldr r3, [r3, #0] - 8005004: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 - 8005008: d03e beq.n 8005088 - 800500a: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 - 800500e: f200 8087 bhi.w 8005120 - 8005012: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8005016: f000 8086 beq.w 8005126 - 800501a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 800501e: d87f bhi.n 8005120 - 8005020: 2b70 cmp r3, #112 @ 0x70 - 8005022: d01a beq.n 800505a - 8005024: 2b70 cmp r3, #112 @ 0x70 - 8005026: d87b bhi.n 8005120 - 8005028: 2b60 cmp r3, #96 @ 0x60 - 800502a: d050 beq.n 80050ce - 800502c: 2b60 cmp r3, #96 @ 0x60 - 800502e: d877 bhi.n 8005120 - 8005030: 2b50 cmp r3, #80 @ 0x50 - 8005032: d03c beq.n 80050ae - 8005034: 2b50 cmp r3, #80 @ 0x50 - 8005036: d873 bhi.n 8005120 - 8005038: 2b40 cmp r3, #64 @ 0x40 - 800503a: d058 beq.n 80050ee - 800503c: 2b40 cmp r3, #64 @ 0x40 - 800503e: d86f bhi.n 8005120 - 8005040: 2b30 cmp r3, #48 @ 0x30 - 8005042: d064 beq.n 800510e - 8005044: 2b30 cmp r3, #48 @ 0x30 - 8005046: d86b bhi.n 8005120 - 8005048: 2b20 cmp r3, #32 - 800504a: d060 beq.n 800510e - 800504c: 2b20 cmp r3, #32 - 800504e: d867 bhi.n 8005120 - 8005050: 2b00 cmp r3, #0 - 8005052: d05c beq.n 800510e - 8005054: 2b10 cmp r3, #16 - 8005056: d05a beq.n 800510e - 8005058: e062 b.n 8005120 + 8005954: 683b ldr r3, [r7, #0] + 8005956: 681b ldr r3, [r3, #0] + 8005958: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 + 800595c: d03e beq.n 80059dc + 800595e: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 + 8005962: f200 8087 bhi.w 8005a74 + 8005966: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 800596a: f000 8086 beq.w 8005a7a + 800596e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8005972: d87f bhi.n 8005a74 + 8005974: 2b70 cmp r3, #112 @ 0x70 + 8005976: d01a beq.n 80059ae + 8005978: 2b70 cmp r3, #112 @ 0x70 + 800597a: d87b bhi.n 8005a74 + 800597c: 2b60 cmp r3, #96 @ 0x60 + 800597e: d050 beq.n 8005a22 + 8005980: 2b60 cmp r3, #96 @ 0x60 + 8005982: d877 bhi.n 8005a74 + 8005984: 2b50 cmp r3, #80 @ 0x50 + 8005986: d03c beq.n 8005a02 + 8005988: 2b50 cmp r3, #80 @ 0x50 + 800598a: d873 bhi.n 8005a74 + 800598c: 2b40 cmp r3, #64 @ 0x40 + 800598e: d058 beq.n 8005a42 + 8005990: 2b40 cmp r3, #64 @ 0x40 + 8005992: d86f bhi.n 8005a74 + 8005994: 2b30 cmp r3, #48 @ 0x30 + 8005996: d064 beq.n 8005a62 + 8005998: 2b30 cmp r3, #48 @ 0x30 + 800599a: d86b bhi.n 8005a74 + 800599c: 2b20 cmp r3, #32 + 800599e: d060 beq.n 8005a62 + 80059a0: 2b20 cmp r3, #32 + 80059a2: d867 bhi.n 8005a74 + 80059a4: 2b00 cmp r3, #0 + 80059a6: d05c beq.n 8005a62 + 80059a8: 2b10 cmp r3, #16 + 80059aa: d05a beq.n 8005a62 + 80059ac: e062 b.n 8005a74 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 800505a: 687b ldr r3, [r7, #4] - 800505c: 6818 ldr r0, [r3, #0] + 80059ae: 687b ldr r3, [r7, #4] + 80059b0: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, - 800505e: 683b ldr r3, [r7, #0] - 8005060: 6899 ldr r1, [r3, #8] + 80059b2: 683b ldr r3, [r7, #0] + 80059b4: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, - 8005062: 683b ldr r3, [r7, #0] - 8005064: 685a ldr r2, [r3, #4] + 80059b6: 683b ldr r3, [r7, #0] + 80059b8: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); - 8005066: 683b ldr r3, [r7, #0] - 8005068: 68db ldr r3, [r3, #12] + 80059ba: 683b ldr r3, [r7, #0] + 80059bc: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, - 800506a: f000 f974 bl 8005356 + 80059be: f000 f974 bl 8005caa /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; - 800506e: 687b ldr r3, [r7, #4] - 8005070: 681b ldr r3, [r3, #0] - 8005072: 689b ldr r3, [r3, #8] - 8005074: 60bb str r3, [r7, #8] + 80059c2: 687b ldr r3, [r7, #4] + 80059c4: 681b ldr r3, [r3, #0] + 80059c6: 689b ldr r3, [r3, #8] + 80059c8: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 8005076: 68bb ldr r3, [r7, #8] - 8005078: f043 0377 orr.w r3, r3, #119 @ 0x77 - 800507c: 60bb str r3, [r7, #8] + 80059ca: 68bb ldr r3, [r7, #8] + 80059cc: f043 0377 orr.w r3, r3, #119 @ 0x77 + 80059d0: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 800507e: 687b ldr r3, [r7, #4] - 8005080: 681b ldr r3, [r3, #0] - 8005082: 68ba ldr r2, [r7, #8] - 8005084: 609a str r2, [r3, #8] + 80059d2: 687b ldr r3, [r7, #4] + 80059d4: 681b ldr r3, [r3, #0] + 80059d6: 68ba ldr r2, [r7, #8] + 80059d8: 609a str r2, [r3, #8] break; - 8005086: e04f b.n 8005128 + 80059da: e04f b.n 8005a7c assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 8005088: 687b ldr r3, [r7, #4] - 800508a: 6818 ldr r0, [r3, #0] + 80059dc: 687b ldr r3, [r7, #4] + 80059de: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, - 800508c: 683b ldr r3, [r7, #0] - 800508e: 6899 ldr r1, [r3, #8] + 80059e0: 683b ldr r3, [r7, #0] + 80059e2: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, - 8005090: 683b ldr r3, [r7, #0] - 8005092: 685a ldr r2, [r3, #4] + 80059e4: 683b ldr r3, [r7, #0] + 80059e6: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); - 8005094: 683b ldr r3, [r7, #0] - 8005096: 68db ldr r3, [r3, #12] + 80059e8: 683b ldr r3, [r7, #0] + 80059ea: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, - 8005098: f000 f95d bl 8005356 + 80059ec: f000 f95d bl 8005caa /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; - 800509c: 687b ldr r3, [r7, #4] - 800509e: 681b ldr r3, [r3, #0] - 80050a0: 689a ldr r2, [r3, #8] - 80050a2: 687b ldr r3, [r7, #4] - 80050a4: 681b ldr r3, [r3, #0] - 80050a6: f442 4280 orr.w r2, r2, #16384 @ 0x4000 - 80050aa: 609a str r2, [r3, #8] + 80059f0: 687b ldr r3, [r7, #4] + 80059f2: 681b ldr r3, [r3, #0] + 80059f4: 689a ldr r2, [r3, #8] + 80059f6: 687b ldr r3, [r7, #4] + 80059f8: 681b ldr r3, [r3, #0] + 80059fa: f442 4280 orr.w r2, r2, #16384 @ 0x4000 + 80059fe: 609a str r2, [r3, #8] break; - 80050ac: e03c b.n 8005128 + 8005a00: e03c b.n 8005a7c /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 80050ae: 687b ldr r3, [r7, #4] - 80050b0: 6818 ldr r0, [r3, #0] + 8005a02: 687b ldr r3, [r7, #4] + 8005a04: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 80050b2: 683b ldr r3, [r7, #0] - 80050b4: 6859 ldr r1, [r3, #4] + 8005a06: 683b ldr r3, [r7, #0] + 8005a08: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 80050b6: 683b ldr r3, [r7, #0] - 80050b8: 68db ldr r3, [r3, #12] + 8005a0a: 683b ldr r3, [r7, #0] + 8005a0c: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, - 80050ba: 461a mov r2, r3 - 80050bc: f000 f8d4 bl 8005268 + 8005a0e: 461a mov r2, r3 + 8005a10: f000 f8d4 bl 8005bbc TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - 80050c0: 687b ldr r3, [r7, #4] - 80050c2: 681b ldr r3, [r3, #0] - 80050c4: 2150 movs r1, #80 @ 0x50 - 80050c6: 4618 mov r0, r3 - 80050c8: f000 f92b bl 8005322 + 8005a14: 687b ldr r3, [r7, #4] + 8005a16: 681b ldr r3, [r3, #0] + 8005a18: 2150 movs r1, #80 @ 0x50 + 8005a1a: 4618 mov r0, r3 + 8005a1c: f000 f92b bl 8005c76 break; - 80050cc: e02c b.n 8005128 + 8005a20: e02c b.n 8005a7c /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, - 80050ce: 687b ldr r3, [r7, #4] - 80050d0: 6818 ldr r0, [r3, #0] + 8005a22: 687b ldr r3, [r7, #4] + 8005a24: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 80050d2: 683b ldr r3, [r7, #0] - 80050d4: 6859 ldr r1, [r3, #4] + 8005a26: 683b ldr r3, [r7, #0] + 8005a28: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 80050d6: 683b ldr r3, [r7, #0] - 80050d8: 68db ldr r3, [r3, #12] + 8005a2a: 683b ldr r3, [r7, #0] + 8005a2c: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, - 80050da: 461a mov r2, r3 - 80050dc: f000 f8f2 bl 80052c4 + 8005a2e: 461a mov r2, r3 + 8005a30: f000 f8f2 bl 8005c18 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - 80050e0: 687b ldr r3, [r7, #4] - 80050e2: 681b ldr r3, [r3, #0] - 80050e4: 2160 movs r1, #96 @ 0x60 - 80050e6: 4618 mov r0, r3 - 80050e8: f000 f91b bl 8005322 + 8005a34: 687b ldr r3, [r7, #4] + 8005a36: 681b ldr r3, [r3, #0] + 8005a38: 2160 movs r1, #96 @ 0x60 + 8005a3a: 4618 mov r0, r3 + 8005a3c: f000 f91b bl 8005c76 break; - 80050ec: e01c b.n 8005128 + 8005a40: e01c b.n 8005a7c /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 80050ee: 687b ldr r3, [r7, #4] - 80050f0: 6818 ldr r0, [r3, #0] + 8005a42: 687b ldr r3, [r7, #4] + 8005a44: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 80050f2: 683b ldr r3, [r7, #0] - 80050f4: 6859 ldr r1, [r3, #4] + 8005a46: 683b ldr r3, [r7, #0] + 8005a48: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 80050f6: 683b ldr r3, [r7, #0] - 80050f8: 68db ldr r3, [r3, #12] + 8005a4a: 683b ldr r3, [r7, #0] + 8005a4c: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, - 80050fa: 461a mov r2, r3 - 80050fc: f000 f8b4 bl 8005268 + 8005a4e: 461a mov r2, r3 + 8005a50: f000 f8b4 bl 8005bbc TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - 8005100: 687b ldr r3, [r7, #4] - 8005102: 681b ldr r3, [r3, #0] - 8005104: 2140 movs r1, #64 @ 0x40 - 8005106: 4618 mov r0, r3 - 8005108: f000 f90b bl 8005322 + 8005a54: 687b ldr r3, [r7, #4] + 8005a56: 681b ldr r3, [r3, #0] + 8005a58: 2140 movs r1, #64 @ 0x40 + 8005a5a: 4618 mov r0, r3 + 8005a5c: f000 f90b bl 8005c76 break; - 800510c: e00c b.n 8005128 + 8005a60: e00c b.n 8005a7c case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - 800510e: 687b ldr r3, [r7, #4] - 8005110: 681a ldr r2, [r3, #0] - 8005112: 683b ldr r3, [r7, #0] - 8005114: 681b ldr r3, [r3, #0] - 8005116: 4619 mov r1, r3 - 8005118: 4610 mov r0, r2 - 800511a: f000 f902 bl 8005322 + 8005a62: 687b ldr r3, [r7, #4] + 8005a64: 681a ldr r2, [r3, #0] + 8005a66: 683b ldr r3, [r7, #0] + 8005a68: 681b ldr r3, [r3, #0] + 8005a6a: 4619 mov r1, r3 + 8005a6c: 4610 mov r0, r2 + 8005a6e: f000 f902 bl 8005c76 break; - 800511e: e003 b.n 8005128 + 8005a72: e003 b.n 8005a7c } default: status = HAL_ERROR; - 8005120: 2301 movs r3, #1 - 8005122: 73fb strb r3, [r7, #15] + 8005a74: 2301 movs r3, #1 + 8005a76: 73fb strb r3, [r7, #15] break; - 8005124: e000 b.n 8005128 + 8005a78: e000 b.n 8005a7c break; - 8005126: bf00 nop + 8005a7a: bf00 nop } htim->State = HAL_TIM_STATE_READY; - 8005128: 687b ldr r3, [r7, #4] - 800512a: 2201 movs r2, #1 - 800512c: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005a7c: 687b ldr r3, [r7, #4] + 8005a7e: 2201 movs r2, #1 + 8005a80: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); - 8005130: 687b ldr r3, [r7, #4] - 8005132: 2200 movs r2, #0 - 8005134: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8005a84: 687b ldr r3, [r7, #4] + 8005a86: 2200 movs r2, #0 + 8005a88: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; - 8005138: 7bfb ldrb r3, [r7, #15] + 8005a8c: 7bfb ldrb r3, [r7, #15] } - 800513a: 4618 mov r0, r3 - 800513c: 3710 adds r7, #16 - 800513e: 46bd mov sp, r7 - 8005140: bd80 pop {r7, pc} + 8005a8e: 4618 mov r0, r3 + 8005a90: 3710 adds r7, #16 + 8005a92: 46bd mov sp, r7 + 8005a94: bd80 pop {r7, pc} -08005142 : +08005a96 : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { - 8005142: b480 push {r7} - 8005144: b083 sub sp, #12 - 8005146: af00 add r7, sp, #0 - 8005148: 6078 str r0, [r7, #4] + 8005a96: b480 push {r7} + 8005a98: b083 sub sp, #12 + 8005a9a: af00 add r7, sp, #0 + 8005a9c: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } - 800514a: bf00 nop - 800514c: 370c adds r7, #12 - 800514e: 46bd mov sp, r7 - 8005150: bc80 pop {r7} - 8005152: 4770 bx lr + 8005a9e: bf00 nop + 8005aa0: 370c adds r7, #12 + 8005aa2: 46bd mov sp, r7 + 8005aa4: bc80 pop {r7} + 8005aa6: 4770 bx lr -08005154 : +08005aa8 : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { - 8005154: b480 push {r7} - 8005156: b083 sub sp, #12 - 8005158: af00 add r7, sp, #0 - 800515a: 6078 str r0, [r7, #4] + 8005aa8: b480 push {r7} + 8005aaa: b083 sub sp, #12 + 8005aac: af00 add r7, sp, #0 + 8005aae: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } - 800515c: bf00 nop - 800515e: 370c adds r7, #12 - 8005160: 46bd mov sp, r7 - 8005162: bc80 pop {r7} - 8005164: 4770 bx lr + 8005ab0: bf00 nop + 8005ab2: 370c adds r7, #12 + 8005ab4: 46bd mov sp, r7 + 8005ab6: bc80 pop {r7} + 8005ab8: 4770 bx lr -08005166 : +08005aba : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { - 8005166: b480 push {r7} - 8005168: b083 sub sp, #12 - 800516a: af00 add r7, sp, #0 - 800516c: 6078 str r0, [r7, #4] + 8005aba: b480 push {r7} + 8005abc: b083 sub sp, #12 + 8005abe: af00 add r7, sp, #0 + 8005ac0: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } - 800516e: bf00 nop - 8005170: 370c adds r7, #12 - 8005172: 46bd mov sp, r7 - 8005174: bc80 pop {r7} - 8005176: 4770 bx lr + 8005ac2: bf00 nop + 8005ac4: 370c adds r7, #12 + 8005ac6: 46bd mov sp, r7 + 8005ac8: bc80 pop {r7} + 8005aca: 4770 bx lr -08005178 : +08005acc : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { - 8005178: b480 push {r7} - 800517a: b083 sub sp, #12 - 800517c: af00 add r7, sp, #0 - 800517e: 6078 str r0, [r7, #4] + 8005acc: b480 push {r7} + 8005ace: b083 sub sp, #12 + 8005ad0: af00 add r7, sp, #0 + 8005ad2: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } - 8005180: bf00 nop - 8005182: 370c adds r7, #12 - 8005184: 46bd mov sp, r7 - 8005186: bc80 pop {r7} - 8005188: 4770 bx lr + 8005ad4: bf00 nop + 8005ad6: 370c adds r7, #12 + 8005ad8: 46bd mov sp, r7 + 8005ada: bc80 pop {r7} + 8005adc: 4770 bx lr ... -0800518c : +08005ae0 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { - 800518c: b480 push {r7} - 800518e: b085 sub sp, #20 - 8005190: af00 add r7, sp, #0 - 8005192: 6078 str r0, [r7, #4] - 8005194: 6039 str r1, [r7, #0] + 8005ae0: b480 push {r7} + 8005ae2: b085 sub sp, #20 + 8005ae4: af00 add r7, sp, #0 + 8005ae6: 6078 str r0, [r7, #4] + 8005ae8: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; - 8005196: 687b ldr r3, [r7, #4] - 8005198: 681b ldr r3, [r3, #0] - 800519a: 60fb str r3, [r7, #12] + 8005aea: 687b ldr r3, [r7, #4] + 8005aec: 681b ldr r3, [r3, #0] + 8005aee: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 800519c: 687b ldr r3, [r7, #4] - 800519e: 4a2f ldr r2, [pc, #188] @ (800525c ) - 80051a0: 4293 cmp r3, r2 - 80051a2: d00b beq.n 80051bc - 80051a4: 687b ldr r3, [r7, #4] - 80051a6: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 80051aa: d007 beq.n 80051bc - 80051ac: 687b ldr r3, [r7, #4] - 80051ae: 4a2c ldr r2, [pc, #176] @ (8005260 ) - 80051b0: 4293 cmp r3, r2 - 80051b2: d003 beq.n 80051bc - 80051b4: 687b ldr r3, [r7, #4] - 80051b6: 4a2b ldr r2, [pc, #172] @ (8005264 ) - 80051b8: 4293 cmp r3, r2 - 80051ba: d108 bne.n 80051ce + 8005af0: 687b ldr r3, [r7, #4] + 8005af2: 4a2f ldr r2, [pc, #188] @ (8005bb0 ) + 8005af4: 4293 cmp r3, r2 + 8005af6: d00b beq.n 8005b10 + 8005af8: 687b ldr r3, [r7, #4] + 8005afa: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005afe: d007 beq.n 8005b10 + 8005b00: 687b ldr r3, [r7, #4] + 8005b02: 4a2c ldr r2, [pc, #176] @ (8005bb4 ) + 8005b04: 4293 cmp r3, r2 + 8005b06: d003 beq.n 8005b10 + 8005b08: 687b ldr r3, [r7, #4] + 8005b0a: 4a2b ldr r2, [pc, #172] @ (8005bb8 ) + 8005b0c: 4293 cmp r3, r2 + 8005b0e: d108 bne.n 8005b22 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 80051bc: 68fb ldr r3, [r7, #12] - 80051be: f023 0370 bic.w r3, r3, #112 @ 0x70 - 80051c2: 60fb str r3, [r7, #12] + 8005b10: 68fb ldr r3, [r7, #12] + 8005b12: f023 0370 bic.w r3, r3, #112 @ 0x70 + 8005b16: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; - 80051c4: 683b ldr r3, [r7, #0] - 80051c6: 685b ldr r3, [r3, #4] - 80051c8: 68fa ldr r2, [r7, #12] - 80051ca: 4313 orrs r3, r2 - 80051cc: 60fb str r3, [r7, #12] + 8005b18: 683b ldr r3, [r7, #0] + 8005b1a: 685b ldr r3, [r3, #4] + 8005b1c: 68fa ldr r2, [r7, #12] + 8005b1e: 4313 orrs r3, r2 + 8005b20: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 80051ce: 687b ldr r3, [r7, #4] - 80051d0: 4a22 ldr r2, [pc, #136] @ (800525c ) - 80051d2: 4293 cmp r3, r2 - 80051d4: d00b beq.n 80051ee - 80051d6: 687b ldr r3, [r7, #4] - 80051d8: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 80051dc: d007 beq.n 80051ee - 80051de: 687b ldr r3, [r7, #4] - 80051e0: 4a1f ldr r2, [pc, #124] @ (8005260 ) - 80051e2: 4293 cmp r3, r2 - 80051e4: d003 beq.n 80051ee - 80051e6: 687b ldr r3, [r7, #4] - 80051e8: 4a1e ldr r2, [pc, #120] @ (8005264 ) - 80051ea: 4293 cmp r3, r2 - 80051ec: d108 bne.n 8005200 + 8005b22: 687b ldr r3, [r7, #4] + 8005b24: 4a22 ldr r2, [pc, #136] @ (8005bb0 ) + 8005b26: 4293 cmp r3, r2 + 8005b28: d00b beq.n 8005b42 + 8005b2a: 687b ldr r3, [r7, #4] + 8005b2c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005b30: d007 beq.n 8005b42 + 8005b32: 687b ldr r3, [r7, #4] + 8005b34: 4a1f ldr r2, [pc, #124] @ (8005bb4 ) + 8005b36: 4293 cmp r3, r2 + 8005b38: d003 beq.n 8005b42 + 8005b3a: 687b ldr r3, [r7, #4] + 8005b3c: 4a1e ldr r2, [pc, #120] @ (8005bb8 ) + 8005b3e: 4293 cmp r3, r2 + 8005b40: d108 bne.n 8005b54 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; - 80051ee: 68fb ldr r3, [r7, #12] - 80051f0: f423 7340 bic.w r3, r3, #768 @ 0x300 - 80051f4: 60fb str r3, [r7, #12] + 8005b42: 68fb ldr r3, [r7, #12] + 8005b44: f423 7340 bic.w r3, r3, #768 @ 0x300 + 8005b48: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; - 80051f6: 683b ldr r3, [r7, #0] - 80051f8: 68db ldr r3, [r3, #12] - 80051fa: 68fa ldr r2, [r7, #12] - 80051fc: 4313 orrs r3, r2 - 80051fe: 60fb str r3, [r7, #12] + 8005b4a: 683b ldr r3, [r7, #0] + 8005b4c: 68db ldr r3, [r3, #12] + 8005b4e: 68fa ldr r2, [r7, #12] + 8005b50: 4313 orrs r3, r2 + 8005b52: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 8005200: 68fb ldr r3, [r7, #12] - 8005202: f023 0280 bic.w r2, r3, #128 @ 0x80 - 8005206: 683b ldr r3, [r7, #0] - 8005208: 695b ldr r3, [r3, #20] - 800520a: 4313 orrs r3, r2 - 800520c: 60fb str r3, [r7, #12] + 8005b54: 68fb ldr r3, [r7, #12] + 8005b56: f023 0280 bic.w r2, r3, #128 @ 0x80 + 8005b5a: 683b ldr r3, [r7, #0] + 8005b5c: 695b ldr r3, [r3, #20] + 8005b5e: 4313 orrs r3, r2 + 8005b60: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; - 800520e: 687b ldr r3, [r7, #4] - 8005210: 68fa ldr r2, [r7, #12] - 8005212: 601a str r2, [r3, #0] + 8005b62: 687b ldr r3, [r7, #4] + 8005b64: 68fa ldr r2, [r7, #12] + 8005b66: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; - 8005214: 683b ldr r3, [r7, #0] - 8005216: 689a ldr r2, [r3, #8] - 8005218: 687b ldr r3, [r7, #4] - 800521a: 62da str r2, [r3, #44] @ 0x2c + 8005b68: 683b ldr r3, [r7, #0] + 8005b6a: 689a ldr r2, [r3, #8] + 8005b6c: 687b ldr r3, [r7, #4] + 8005b6e: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; - 800521c: 683b ldr r3, [r7, #0] - 800521e: 681a ldr r2, [r3, #0] - 8005220: 687b ldr r3, [r7, #4] - 8005222: 629a str r2, [r3, #40] @ 0x28 + 8005b70: 683b ldr r3, [r7, #0] + 8005b72: 681a ldr r2, [r3, #0] + 8005b74: 687b ldr r3, [r7, #4] + 8005b76: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 8005224: 687b ldr r3, [r7, #4] - 8005226: 4a0d ldr r2, [pc, #52] @ (800525c ) - 8005228: 4293 cmp r3, r2 - 800522a: d103 bne.n 8005234 + 8005b78: 687b ldr r3, [r7, #4] + 8005b7a: 4a0d ldr r2, [pc, #52] @ (8005bb0 ) + 8005b7c: 4293 cmp r3, r2 + 8005b7e: d103 bne.n 8005b88 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; - 800522c: 683b ldr r3, [r7, #0] - 800522e: 691a ldr r2, [r3, #16] - 8005230: 687b ldr r3, [r7, #4] - 8005232: 631a str r2, [r3, #48] @ 0x30 + 8005b80: 683b ldr r3, [r7, #0] + 8005b82: 691a ldr r2, [r3, #16] + 8005b84: 687b ldr r3, [r7, #4] + 8005b86: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - 8005234: 687b ldr r3, [r7, #4] - 8005236: 2201 movs r2, #1 - 8005238: 615a str r2, [r3, #20] + 8005b88: 687b ldr r3, [r7, #4] + 8005b8a: 2201 movs r2, #1 + 8005b8c: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) - 800523a: 687b ldr r3, [r7, #4] - 800523c: 691b ldr r3, [r3, #16] - 800523e: f003 0301 and.w r3, r3, #1 - 8005242: 2b00 cmp r3, #0 - 8005244: d005 beq.n 8005252 + 8005b8e: 687b ldr r3, [r7, #4] + 8005b90: 691b ldr r3, [r3, #16] + 8005b92: f003 0301 and.w r3, r3, #1 + 8005b96: 2b00 cmp r3, #0 + 8005b98: d005 beq.n 8005ba6 { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); - 8005246: 687b ldr r3, [r7, #4] - 8005248: 691b ldr r3, [r3, #16] - 800524a: f023 0201 bic.w r2, r3, #1 - 800524e: 687b ldr r3, [r7, #4] - 8005250: 611a str r2, [r3, #16] + 8005b9a: 687b ldr r3, [r7, #4] + 8005b9c: 691b ldr r3, [r3, #16] + 8005b9e: f023 0201 bic.w r2, r3, #1 + 8005ba2: 687b ldr r3, [r7, #4] + 8005ba4: 611a str r2, [r3, #16] } } - 8005252: bf00 nop - 8005254: 3714 adds r7, #20 - 8005256: 46bd mov sp, r7 - 8005258: bc80 pop {r7} - 800525a: 4770 bx lr - 800525c: 40012c00 .word 0x40012c00 - 8005260: 40000400 .word 0x40000400 - 8005264: 40000800 .word 0x40000800 + 8005ba6: bf00 nop + 8005ba8: 3714 adds r7, #20 + 8005baa: 46bd mov sp, r7 + 8005bac: bc80 pop {r7} + 8005bae: 4770 bx lr + 8005bb0: 40012c00 .word 0x40012c00 + 8005bb4: 40000400 .word 0x40000400 + 8005bb8: 40000800 .word 0x40000800 -08005268 : +08005bbc : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 8005268: b480 push {r7} - 800526a: b087 sub sp, #28 - 800526c: af00 add r7, sp, #0 - 800526e: 60f8 str r0, [r7, #12] - 8005270: 60b9 str r1, [r7, #8] - 8005272: 607a str r2, [r7, #4] + 8005bbc: b480 push {r7} + 8005bbe: b087 sub sp, #28 + 8005bc0: af00 add r7, sp, #0 + 8005bc2: 60f8 str r0, [r7, #12] + 8005bc4: 60b9 str r1, [r7, #8] + 8005bc6: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; - 8005274: 68fb ldr r3, [r7, #12] - 8005276: 6a1b ldr r3, [r3, #32] - 8005278: 617b str r3, [r7, #20] + 8005bc8: 68fb ldr r3, [r7, #12] + 8005bca: 6a1b ldr r3, [r3, #32] + 8005bcc: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; - 800527a: 68fb ldr r3, [r7, #12] - 800527c: 6a1b ldr r3, [r3, #32] - 800527e: f023 0201 bic.w r2, r3, #1 - 8005282: 68fb ldr r3, [r7, #12] - 8005284: 621a str r2, [r3, #32] + 8005bce: 68fb ldr r3, [r7, #12] + 8005bd0: 6a1b ldr r3, [r3, #32] + 8005bd2: f023 0201 bic.w r2, r3, #1 + 8005bd6: 68fb ldr r3, [r7, #12] + 8005bd8: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 8005286: 68fb ldr r3, [r7, #12] - 8005288: 699b ldr r3, [r3, #24] - 800528a: 613b str r3, [r7, #16] + 8005bda: 68fb ldr r3, [r7, #12] + 8005bdc: 699b ldr r3, [r3, #24] + 8005bde: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; - 800528c: 693b ldr r3, [r7, #16] - 800528e: f023 03f0 bic.w r3, r3, #240 @ 0xf0 - 8005292: 613b str r3, [r7, #16] + 8005be0: 693b ldr r3, [r7, #16] + 8005be2: f023 03f0 bic.w r3, r3, #240 @ 0xf0 + 8005be6: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); - 8005294: 687b ldr r3, [r7, #4] - 8005296: 011b lsls r3, r3, #4 - 8005298: 693a ldr r2, [r7, #16] - 800529a: 4313 orrs r3, r2 - 800529c: 613b str r3, [r7, #16] + 8005be8: 687b ldr r3, [r7, #4] + 8005bea: 011b lsls r3, r3, #4 + 8005bec: 693a ldr r2, [r7, #16] + 8005bee: 4313 orrs r3, r2 + 8005bf0: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 800529e: 697b ldr r3, [r7, #20] - 80052a0: f023 030a bic.w r3, r3, #10 - 80052a4: 617b str r3, [r7, #20] + 8005bf2: 697b ldr r3, [r7, #20] + 8005bf4: f023 030a bic.w r3, r3, #10 + 8005bf8: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; - 80052a6: 697a ldr r2, [r7, #20] - 80052a8: 68bb ldr r3, [r7, #8] - 80052aa: 4313 orrs r3, r2 - 80052ac: 617b str r3, [r7, #20] + 8005bfa: 697a ldr r2, [r7, #20] + 8005bfc: 68bb ldr r3, [r7, #8] + 8005bfe: 4313 orrs r3, r2 + 8005c00: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; - 80052ae: 68fb ldr r3, [r7, #12] - 80052b0: 693a ldr r2, [r7, #16] - 80052b2: 619a str r2, [r3, #24] + 8005c02: 68fb ldr r3, [r7, #12] + 8005c04: 693a ldr r2, [r7, #16] + 8005c06: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 80052b4: 68fb ldr r3, [r7, #12] - 80052b6: 697a ldr r2, [r7, #20] - 80052b8: 621a str r2, [r3, #32] + 8005c08: 68fb ldr r3, [r7, #12] + 8005c0a: 697a ldr r2, [r7, #20] + 8005c0c: 621a str r2, [r3, #32] } - 80052ba: bf00 nop - 80052bc: 371c adds r7, #28 - 80052be: 46bd mov sp, r7 - 80052c0: bc80 pop {r7} - 80052c2: 4770 bx lr + 8005c0e: bf00 nop + 8005c10: 371c adds r7, #28 + 8005c12: 46bd mov sp, r7 + 8005c14: bc80 pop {r7} + 8005c16: 4770 bx lr -080052c4 : +08005c18 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 80052c4: b480 push {r7} - 80052c6: b087 sub sp, #28 - 80052c8: af00 add r7, sp, #0 - 80052ca: 60f8 str r0, [r7, #12] - 80052cc: 60b9 str r1, [r7, #8] - 80052ce: 607a str r2, [r7, #4] + 8005c18: b480 push {r7} + 8005c1a: b087 sub sp, #28 + 8005c1c: af00 add r7, sp, #0 + 8005c1e: 60f8 str r0, [r7, #12] + 8005c20: 60b9 str r1, [r7, #8] + 8005c22: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; - 80052d0: 68fb ldr r3, [r7, #12] - 80052d2: 6a1b ldr r3, [r3, #32] - 80052d4: 617b str r3, [r7, #20] + 8005c24: 68fb ldr r3, [r7, #12] + 8005c26: 6a1b ldr r3, [r3, #32] + 8005c28: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; - 80052d6: 68fb ldr r3, [r7, #12] - 80052d8: 6a1b ldr r3, [r3, #32] - 80052da: f023 0210 bic.w r2, r3, #16 - 80052de: 68fb ldr r3, [r7, #12] - 80052e0: 621a str r2, [r3, #32] + 8005c2a: 68fb ldr r3, [r7, #12] + 8005c2c: 6a1b ldr r3, [r3, #32] + 8005c2e: f023 0210 bic.w r2, r3, #16 + 8005c32: 68fb ldr r3, [r7, #12] + 8005c34: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 80052e2: 68fb ldr r3, [r7, #12] - 80052e4: 699b ldr r3, [r3, #24] - 80052e6: 613b str r3, [r7, #16] + 8005c36: 68fb ldr r3, [r7, #12] + 8005c38: 699b ldr r3, [r3, #24] + 8005c3a: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; - 80052e8: 693b ldr r3, [r7, #16] - 80052ea: f423 4370 bic.w r3, r3, #61440 @ 0xf000 - 80052ee: 613b str r3, [r7, #16] + 8005c3c: 693b ldr r3, [r7, #16] + 8005c3e: f423 4370 bic.w r3, r3, #61440 @ 0xf000 + 8005c42: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); - 80052f0: 687b ldr r3, [r7, #4] - 80052f2: 031b lsls r3, r3, #12 - 80052f4: 693a ldr r2, [r7, #16] - 80052f6: 4313 orrs r3, r2 - 80052f8: 613b str r3, [r7, #16] + 8005c44: 687b ldr r3, [r7, #4] + 8005c46: 031b lsls r3, r3, #12 + 8005c48: 693a ldr r2, [r7, #16] + 8005c4a: 4313 orrs r3, r2 + 8005c4c: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 80052fa: 697b ldr r3, [r7, #20] - 80052fc: f023 03a0 bic.w r3, r3, #160 @ 0xa0 - 8005300: 617b str r3, [r7, #20] + 8005c4e: 697b ldr r3, [r7, #20] + 8005c50: f023 03a0 bic.w r3, r3, #160 @ 0xa0 + 8005c54: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); - 8005302: 68bb ldr r3, [r7, #8] - 8005304: 011b lsls r3, r3, #4 - 8005306: 697a ldr r2, [r7, #20] - 8005308: 4313 orrs r3, r2 - 800530a: 617b str r3, [r7, #20] + 8005c56: 68bb ldr r3, [r7, #8] + 8005c58: 011b lsls r3, r3, #4 + 8005c5a: 697a ldr r2, [r7, #20] + 8005c5c: 4313 orrs r3, r2 + 8005c5e: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; - 800530c: 68fb ldr r3, [r7, #12] - 800530e: 693a ldr r2, [r7, #16] - 8005310: 619a str r2, [r3, #24] + 8005c60: 68fb ldr r3, [r7, #12] + 8005c62: 693a ldr r2, [r7, #16] + 8005c64: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 8005312: 68fb ldr r3, [r7, #12] - 8005314: 697a ldr r2, [r7, #20] - 8005316: 621a str r2, [r3, #32] + 8005c66: 68fb ldr r3, [r7, #12] + 8005c68: 697a ldr r2, [r7, #20] + 8005c6a: 621a str r2, [r3, #32] } - 8005318: bf00 nop - 800531a: 371c adds r7, #28 - 800531c: 46bd mov sp, r7 - 800531e: bc80 pop {r7} - 8005320: 4770 bx lr + 8005c6c: bf00 nop + 8005c6e: 371c adds r7, #28 + 8005c70: 46bd mov sp, r7 + 8005c72: bc80 pop {r7} + 8005c74: 4770 bx lr -08005322 : +08005c76 : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { - 8005322: b480 push {r7} - 8005324: b085 sub sp, #20 - 8005326: af00 add r7, sp, #0 - 8005328: 6078 str r0, [r7, #4] - 800532a: 6039 str r1, [r7, #0] + 8005c76: b480 push {r7} + 8005c78: b085 sub sp, #20 + 8005c7a: af00 add r7, sp, #0 + 8005c7c: 6078 str r0, [r7, #4] + 8005c7e: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; - 800532c: 687b ldr r3, [r7, #4] - 800532e: 689b ldr r3, [r3, #8] - 8005330: 60fb str r3, [r7, #12] + 8005c80: 687b ldr r3, [r7, #4] + 8005c82: 689b ldr r3, [r3, #8] + 8005c84: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; - 8005332: 68fb ldr r3, [r7, #12] - 8005334: f023 0370 bic.w r3, r3, #112 @ 0x70 - 8005338: 60fb str r3, [r7, #12] + 8005c86: 68fb ldr r3, [r7, #12] + 8005c88: f023 0370 bic.w r3, r3, #112 @ 0x70 + 8005c8c: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 800533a: 683a ldr r2, [r7, #0] - 800533c: 68fb ldr r3, [r7, #12] - 800533e: 4313 orrs r3, r2 - 8005340: f043 0307 orr.w r3, r3, #7 - 8005344: 60fb str r3, [r7, #12] + 8005c8e: 683a ldr r2, [r7, #0] + 8005c90: 68fb ldr r3, [r7, #12] + 8005c92: 4313 orrs r3, r2 + 8005c94: f043 0307 orr.w r3, r3, #7 + 8005c98: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 8005346: 687b ldr r3, [r7, #4] - 8005348: 68fa ldr r2, [r7, #12] - 800534a: 609a str r2, [r3, #8] + 8005c9a: 687b ldr r3, [r7, #4] + 8005c9c: 68fa ldr r2, [r7, #12] + 8005c9e: 609a str r2, [r3, #8] } - 800534c: bf00 nop - 800534e: 3714 adds r7, #20 - 8005350: 46bd mov sp, r7 - 8005352: bc80 pop {r7} - 8005354: 4770 bx lr + 8005ca0: bf00 nop + 8005ca2: 3714 adds r7, #20 + 8005ca4: 46bd mov sp, r7 + 8005ca6: bc80 pop {r7} + 8005ca8: 4770 bx lr -08005356 : +08005caa : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { - 8005356: b480 push {r7} - 8005358: b087 sub sp, #28 - 800535a: af00 add r7, sp, #0 - 800535c: 60f8 str r0, [r7, #12] - 800535e: 60b9 str r1, [r7, #8] - 8005360: 607a str r2, [r7, #4] - 8005362: 603b str r3, [r7, #0] + 8005caa: b480 push {r7} + 8005cac: b087 sub sp, #28 + 8005cae: af00 add r7, sp, #0 + 8005cb0: 60f8 str r0, [r7, #12] + 8005cb2: 60b9 str r1, [r7, #8] + 8005cb4: 607a str r2, [r7, #4] + 8005cb6: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; - 8005364: 68fb ldr r3, [r7, #12] - 8005366: 689b ldr r3, [r3, #8] - 8005368: 617b str r3, [r7, #20] + 8005cb8: 68fb ldr r3, [r7, #12] + 8005cba: 689b ldr r3, [r3, #8] + 8005cbc: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 800536a: 697b ldr r3, [r7, #20] - 800536c: f423 437f bic.w r3, r3, #65280 @ 0xff00 - 8005370: 617b str r3, [r7, #20] + 8005cbe: 697b ldr r3, [r7, #20] + 8005cc0: f423 437f bic.w r3, r3, #65280 @ 0xff00 + 8005cc4: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 8005372: 683b ldr r3, [r7, #0] - 8005374: 021a lsls r2, r3, #8 - 8005376: 687b ldr r3, [r7, #4] - 8005378: 431a orrs r2, r3 - 800537a: 68bb ldr r3, [r7, #8] - 800537c: 4313 orrs r3, r2 - 800537e: 697a ldr r2, [r7, #20] - 8005380: 4313 orrs r3, r2 - 8005382: 617b str r3, [r7, #20] + 8005cc6: 683b ldr r3, [r7, #0] + 8005cc8: 021a lsls r2, r3, #8 + 8005cca: 687b ldr r3, [r7, #4] + 8005ccc: 431a orrs r2, r3 + 8005cce: 68bb ldr r3, [r7, #8] + 8005cd0: 4313 orrs r3, r2 + 8005cd2: 697a ldr r2, [r7, #20] + 8005cd4: 4313 orrs r3, r2 + 8005cd6: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 8005384: 68fb ldr r3, [r7, #12] - 8005386: 697a ldr r2, [r7, #20] - 8005388: 609a str r2, [r3, #8] + 8005cd8: 68fb ldr r3, [r7, #12] + 8005cda: 697a ldr r2, [r7, #20] + 8005cdc: 609a str r2, [r3, #8] } - 800538a: bf00 nop - 800538c: 371c adds r7, #28 - 800538e: 46bd mov sp, r7 - 8005390: bc80 pop {r7} - 8005392: 4770 bx lr + 8005cde: bf00 nop + 8005ce0: 371c adds r7, #28 + 8005ce2: 46bd mov sp, r7 + 8005ce4: bc80 pop {r7} + 8005ce6: 4770 bx lr -08005394 : +08005ce8 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { - 8005394: b480 push {r7} - 8005396: b085 sub sp, #20 - 8005398: af00 add r7, sp, #0 - 800539a: 6078 str r0, [r7, #4] - 800539c: 6039 str r1, [r7, #0] + 8005ce8: b480 push {r7} + 8005cea: b085 sub sp, #20 + 8005cec: af00 add r7, sp, #0 + 8005cee: 6078 str r0, [r7, #4] + 8005cf0: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); - 800539e: 687b ldr r3, [r7, #4] - 80053a0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 80053a4: 2b01 cmp r3, #1 - 80053a6: d101 bne.n 80053ac - 80053a8: 2302 movs r3, #2 - 80053aa: e046 b.n 800543a - 80053ac: 687b ldr r3, [r7, #4] - 80053ae: 2201 movs r2, #1 - 80053b0: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8005cf2: 687b ldr r3, [r7, #4] + 8005cf4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8005cf8: 2b01 cmp r3, #1 + 8005cfa: d101 bne.n 8005d00 + 8005cfc: 2302 movs r3, #2 + 8005cfe: e046 b.n 8005d8e + 8005d00: 687b ldr r3, [r7, #4] + 8005d02: 2201 movs r2, #1 + 8005d04: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; - 80053b4: 687b ldr r3, [r7, #4] - 80053b6: 2202 movs r2, #2 - 80053b8: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005d08: 687b ldr r3, [r7, #4] + 8005d0a: 2202 movs r2, #2 + 8005d0c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; - 80053bc: 687b ldr r3, [r7, #4] - 80053be: 681b ldr r3, [r3, #0] - 80053c0: 685b ldr r3, [r3, #4] - 80053c2: 60fb str r3, [r7, #12] + 8005d10: 687b ldr r3, [r7, #4] + 8005d12: 681b ldr r3, [r3, #0] + 8005d14: 685b ldr r3, [r3, #4] + 8005d16: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; - 80053c4: 687b ldr r3, [r7, #4] - 80053c6: 681b ldr r3, [r3, #0] - 80053c8: 689b ldr r3, [r3, #8] - 80053ca: 60bb str r3, [r7, #8] + 8005d18: 687b ldr r3, [r7, #4] + 8005d1a: 681b ldr r3, [r3, #0] + 8005d1c: 689b ldr r3, [r3, #8] + 8005d1e: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; - 80053cc: 68fb ldr r3, [r7, #12] - 80053ce: f023 0370 bic.w r3, r3, #112 @ 0x70 - 80053d2: 60fb str r3, [r7, #12] + 8005d20: 68fb ldr r3, [r7, #12] + 8005d22: f023 0370 bic.w r3, r3, #112 @ 0x70 + 8005d26: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 80053d4: 683b ldr r3, [r7, #0] - 80053d6: 681b ldr r3, [r3, #0] - 80053d8: 68fa ldr r2, [r7, #12] - 80053da: 4313 orrs r3, r2 - 80053dc: 60fb str r3, [r7, #12] + 8005d28: 683b ldr r3, [r7, #0] + 8005d2a: 681b ldr r3, [r3, #0] + 8005d2c: 68fa ldr r2, [r7, #12] + 8005d2e: 4313 orrs r3, r2 + 8005d30: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; - 80053de: 687b ldr r3, [r7, #4] - 80053e0: 681b ldr r3, [r3, #0] - 80053e2: 68fa ldr r2, [r7, #12] - 80053e4: 605a str r2, [r3, #4] + 8005d32: 687b ldr r3, [r7, #4] + 8005d34: 681b ldr r3, [r3, #0] + 8005d36: 68fa ldr r2, [r7, #12] + 8005d38: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 80053e6: 687b ldr r3, [r7, #4] - 80053e8: 681b ldr r3, [r3, #0] - 80053ea: 4a16 ldr r2, [pc, #88] @ (8005444 ) - 80053ec: 4293 cmp r3, r2 - 80053ee: d00e beq.n 800540e - 80053f0: 687b ldr r3, [r7, #4] - 80053f2: 681b ldr r3, [r3, #0] - 80053f4: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 80053f8: d009 beq.n 800540e - 80053fa: 687b ldr r3, [r7, #4] - 80053fc: 681b ldr r3, [r3, #0] - 80053fe: 4a12 ldr r2, [pc, #72] @ (8005448 ) - 8005400: 4293 cmp r3, r2 - 8005402: d004 beq.n 800540e - 8005404: 687b ldr r3, [r7, #4] - 8005406: 681b ldr r3, [r3, #0] - 8005408: 4a10 ldr r2, [pc, #64] @ (800544c ) - 800540a: 4293 cmp r3, r2 - 800540c: d10c bne.n 8005428 + 8005d3a: 687b ldr r3, [r7, #4] + 8005d3c: 681b ldr r3, [r3, #0] + 8005d3e: 4a16 ldr r2, [pc, #88] @ (8005d98 ) + 8005d40: 4293 cmp r3, r2 + 8005d42: d00e beq.n 8005d62 + 8005d44: 687b ldr r3, [r7, #4] + 8005d46: 681b ldr r3, [r3, #0] + 8005d48: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005d4c: d009 beq.n 8005d62 + 8005d4e: 687b ldr r3, [r7, #4] + 8005d50: 681b ldr r3, [r3, #0] + 8005d52: 4a12 ldr r2, [pc, #72] @ (8005d9c ) + 8005d54: 4293 cmp r3, r2 + 8005d56: d004 beq.n 8005d62 + 8005d58: 687b ldr r3, [r7, #4] + 8005d5a: 681b ldr r3, [r3, #0] + 8005d5c: 4a10 ldr r2, [pc, #64] @ (8005da0 ) + 8005d5e: 4293 cmp r3, r2 + 8005d60: d10c bne.n 8005d7c { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; - 800540e: 68bb ldr r3, [r7, #8] - 8005410: f023 0380 bic.w r3, r3, #128 @ 0x80 - 8005414: 60bb str r3, [r7, #8] + 8005d62: 68bb ldr r3, [r7, #8] + 8005d64: f023 0380 bic.w r3, r3, #128 @ 0x80 + 8005d68: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; - 8005416: 683b ldr r3, [r7, #0] - 8005418: 685b ldr r3, [r3, #4] - 800541a: 68ba ldr r2, [r7, #8] - 800541c: 4313 orrs r3, r2 - 800541e: 60bb str r3, [r7, #8] + 8005d6a: 683b ldr r3, [r7, #0] + 8005d6c: 685b ldr r3, [r3, #4] + 8005d6e: 68ba ldr r2, [r7, #8] + 8005d70: 4313 orrs r3, r2 + 8005d72: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 8005420: 687b ldr r3, [r7, #4] - 8005422: 681b ldr r3, [r3, #0] - 8005424: 68ba ldr r2, [r7, #8] - 8005426: 609a str r2, [r3, #8] + 8005d74: 687b ldr r3, [r7, #4] + 8005d76: 681b ldr r3, [r3, #0] + 8005d78: 68ba ldr r2, [r7, #8] + 8005d7a: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; - 8005428: 687b ldr r3, [r7, #4] - 800542a: 2201 movs r2, #1 - 800542c: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005d7c: 687b ldr r3, [r7, #4] + 8005d7e: 2201 movs r2, #1 + 8005d80: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); - 8005430: 687b ldr r3, [r7, #4] - 8005432: 2200 movs r2, #0 - 8005434: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8005d84: 687b ldr r3, [r7, #4] + 8005d86: 2200 movs r2, #0 + 8005d88: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 8005438: 2300 movs r3, #0 + 8005d8c: 2300 movs r3, #0 } - 800543a: 4618 mov r0, r3 - 800543c: 3714 adds r7, #20 - 800543e: 46bd mov sp, r7 - 8005440: bc80 pop {r7} - 8005442: 4770 bx lr - 8005444: 40012c00 .word 0x40012c00 - 8005448: 40000400 .word 0x40000400 - 800544c: 40000800 .word 0x40000800 + 8005d8e: 4618 mov r0, r3 + 8005d90: 3714 adds r7, #20 + 8005d92: 46bd mov sp, r7 + 8005d94: bc80 pop {r7} + 8005d96: 4770 bx lr + 8005d98: 40012c00 .word 0x40012c00 + 8005d9c: 40000400 .word 0x40000400 + 8005da0: 40000800 .word 0x40000800 -08005450 : +08005da4 : * @brief Commutation callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { - 8005450: b480 push {r7} - 8005452: b083 sub sp, #12 - 8005454: af00 add r7, sp, #0 - 8005456: 6078 str r0, [r7, #4] + 8005da4: b480 push {r7} + 8005da6: b083 sub sp, #12 + 8005da8: af00 add r7, sp, #0 + 8005daa: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } - 8005458: bf00 nop - 800545a: 370c adds r7, #12 - 800545c: 46bd mov sp, r7 - 800545e: bc80 pop {r7} - 8005460: 4770 bx lr + 8005dac: bf00 nop + 8005dae: 370c adds r7, #12 + 8005db0: 46bd mov sp, r7 + 8005db2: bc80 pop {r7} + 8005db4: 4770 bx lr -08005462 : +08005db6 : * @brief Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { - 8005462: b480 push {r7} - 8005464: b083 sub sp, #12 - 8005466: af00 add r7, sp, #0 - 8005468: 6078 str r0, [r7, #4] + 8005db6: b480 push {r7} + 8005db8: b083 sub sp, #12 + 8005dba: af00 add r7, sp, #0 + 8005dbc: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } - 800546a: bf00 nop - 800546c: 370c adds r7, #12 - 800546e: 46bd mov sp, r7 - 8005470: bc80 pop {r7} - 8005472: 4770 bx lr + 8005dbe: bf00 nop + 8005dc0: 370c adds r7, #12 + 8005dc2: 46bd mov sp, r7 + 8005dc4: bc80 pop {r7} + 8005dc6: 4770 bx lr -08005474 : +08005dc8 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8005474: b580 push {r7, lr} - 8005476: b082 sub sp, #8 - 8005478: af00 add r7, sp, #0 - 800547a: 6078 str r0, [r7, #4] + 8005dc8: b580 push {r7, lr} + 8005dca: b082 sub sp, #8 + 8005dcc: af00 add r7, sp, #0 + 8005dce: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 800547c: 687b ldr r3, [r7, #4] - 800547e: 2b00 cmp r3, #0 - 8005480: d101 bne.n 8005486 + 8005dd0: 687b ldr r3, [r7, #4] + 8005dd2: 2b00 cmp r3, #0 + 8005dd4: d101 bne.n 8005dda { return HAL_ERROR; - 8005482: 2301 movs r3, #1 - 8005484: e042 b.n 800550c + 8005dd6: 2301 movs r3, #1 + 8005dd8: e042 b.n 8005e60 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) - 8005486: 687b ldr r3, [r7, #4] - 8005488: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 800548c: b2db uxtb r3, r3 - 800548e: 2b00 cmp r3, #0 - 8005490: d106 bne.n 80054a0 + 8005dda: 687b ldr r3, [r7, #4] + 8005ddc: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 8005de0: b2db uxtb r3, r3 + 8005de2: 2b00 cmp r3, #0 + 8005de4: d106 bne.n 8005df4 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 8005492: 687b ldr r3, [r7, #4] - 8005494: 2200 movs r2, #0 - 8005496: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 8005de6: 687b ldr r3, [r7, #4] + 8005de8: 2200 movs r2, #0 + 8005dea: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 800549a: 6878 ldr r0, [r7, #4] - 800549c: f7fd f882 bl 80025a4 + 8005dee: 6878 ldr r0, [r7, #4] + 8005df0: f7fd f85e bl 8002eb0 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 80054a0: 687b ldr r3, [r7, #4] - 80054a2: 2224 movs r2, #36 @ 0x24 - 80054a4: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005df4: 687b ldr r3, [r7, #4] + 8005df6: 2224 movs r2, #36 @ 0x24 + 8005df8: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); - 80054a8: 687b ldr r3, [r7, #4] - 80054aa: 681b ldr r3, [r3, #0] - 80054ac: 68da ldr r2, [r3, #12] - 80054ae: 687b ldr r3, [r7, #4] - 80054b0: 681b ldr r3, [r3, #0] - 80054b2: f422 5200 bic.w r2, r2, #8192 @ 0x2000 - 80054b6: 60da str r2, [r3, #12] + 8005dfc: 687b ldr r3, [r7, #4] + 8005dfe: 681b ldr r3, [r3, #0] + 8005e00: 68da ldr r2, [r3, #12] + 8005e02: 687b ldr r3, [r7, #4] + 8005e04: 681b ldr r3, [r3, #0] + 8005e06: f422 5200 bic.w r2, r2, #8192 @ 0x2000 + 8005e0a: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); - 80054b8: 6878 ldr r0, [r7, #4] - 80054ba: f000 fd63 bl 8005f84 + 8005e0c: 6878 ldr r0, [r7, #4] + 8005e0e: f000 fd63 bl 80068d8 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 80054be: 687b ldr r3, [r7, #4] - 80054c0: 681b ldr r3, [r3, #0] - 80054c2: 691a ldr r2, [r3, #16] - 80054c4: 687b ldr r3, [r7, #4] - 80054c6: 681b ldr r3, [r3, #0] - 80054c8: f422 4290 bic.w r2, r2, #18432 @ 0x4800 - 80054cc: 611a str r2, [r3, #16] + 8005e12: 687b ldr r3, [r7, #4] + 8005e14: 681b ldr r3, [r3, #0] + 8005e16: 691a ldr r2, [r3, #16] + 8005e18: 687b ldr r3, [r7, #4] + 8005e1a: 681b ldr r3, [r3, #0] + 8005e1c: f422 4290 bic.w r2, r2, #18432 @ 0x4800 + 8005e20: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 80054ce: 687b ldr r3, [r7, #4] - 80054d0: 681b ldr r3, [r3, #0] - 80054d2: 695a ldr r2, [r3, #20] - 80054d4: 687b ldr r3, [r7, #4] - 80054d6: 681b ldr r3, [r3, #0] - 80054d8: f022 022a bic.w r2, r2, #42 @ 0x2a - 80054dc: 615a str r2, [r3, #20] + 8005e22: 687b ldr r3, [r7, #4] + 8005e24: 681b ldr r3, [r3, #0] + 8005e26: 695a ldr r2, [r3, #20] + 8005e28: 687b ldr r3, [r7, #4] + 8005e2a: 681b ldr r3, [r3, #0] + 8005e2c: f022 022a bic.w r2, r2, #42 @ 0x2a + 8005e30: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); - 80054de: 687b ldr r3, [r7, #4] - 80054e0: 681b ldr r3, [r3, #0] - 80054e2: 68da ldr r2, [r3, #12] - 80054e4: 687b ldr r3, [r7, #4] - 80054e6: 681b ldr r3, [r3, #0] - 80054e8: f442 5200 orr.w r2, r2, #8192 @ 0x2000 - 80054ec: 60da str r2, [r3, #12] + 8005e32: 687b ldr r3, [r7, #4] + 8005e34: 681b ldr r3, [r3, #0] + 8005e36: 68da ldr r2, [r3, #12] + 8005e38: 687b ldr r3, [r7, #4] + 8005e3a: 681b ldr r3, [r3, #0] + 8005e3c: f442 5200 orr.w r2, r2, #8192 @ 0x2000 + 8005e40: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 80054ee: 687b ldr r3, [r7, #4] - 80054f0: 2200 movs r2, #0 - 80054f2: 645a str r2, [r3, #68] @ 0x44 + 8005e42: 687b ldr r3, [r7, #4] + 8005e44: 2200 movs r2, #0 + 8005e46: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; - 80054f4: 687b ldr r3, [r7, #4] - 80054f6: 2220 movs r2, #32 - 80054f8: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005e48: 687b ldr r3, [r7, #4] + 8005e4a: 2220 movs r2, #32 + 8005e4c: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; - 80054fc: 687b ldr r3, [r7, #4] - 80054fe: 2220 movs r2, #32 - 8005500: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005e50: 687b ldr r3, [r7, #4] + 8005e52: 2220 movs r2, #32 + 8005e54: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; - 8005504: 687b ldr r3, [r7, #4] - 8005506: 2200 movs r2, #0 - 8005508: 635a str r2, [r3, #52] @ 0x34 + 8005e58: 687b ldr r3, [r7, #4] + 8005e5a: 2200 movs r2, #0 + 8005e5c: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; - 800550a: 2300 movs r3, #0 + 8005e5e: 2300 movs r3, #0 } - 800550c: 4618 mov r0, r3 - 800550e: 3708 adds r7, #8 - 8005510: 46bd mov sp, r7 - 8005512: bd80 pop {r7, pc} + 8005e60: 4618 mov r0, r3 + 8005e62: 3708 adds r7, #8 + 8005e64: 46bd mov sp, r7 + 8005e66: bd80 pop {r7, pc} -08005514 : +08005e68 : * @param Size Amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8005514: b580 push {r7, lr} - 8005516: b08a sub sp, #40 @ 0x28 - 8005518: af02 add r7, sp, #8 - 800551a: 60f8 str r0, [r7, #12] - 800551c: 60b9 str r1, [r7, #8] - 800551e: 603b str r3, [r7, #0] - 8005520: 4613 mov r3, r2 - 8005522: 80fb strh r3, [r7, #6] + 8005e68: b580 push {r7, lr} + 8005e6a: b08a sub sp, #40 @ 0x28 + 8005e6c: af02 add r7, sp, #8 + 8005e6e: 60f8 str r0, [r7, #12] + 8005e70: 60b9 str r1, [r7, #8] + 8005e72: 603b str r3, [r7, #0] + 8005e74: 4613 mov r3, r2 + 8005e76: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart = 0U; - 8005524: 2300 movs r3, #0 - 8005526: 617b str r3, [r7, #20] + 8005e78: 2300 movs r3, #0 + 8005e7a: 617b str r3, [r7, #20] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8005528: 68fb ldr r3, [r7, #12] - 800552a: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 800552e: b2db uxtb r3, r3 - 8005530: 2b20 cmp r3, #32 - 8005532: d175 bne.n 8005620 + 8005e7c: 68fb ldr r3, [r7, #12] + 8005e7e: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 8005e82: b2db uxtb r3, r3 + 8005e84: 2b20 cmp r3, #32 + 8005e86: d175 bne.n 8005f74 { if ((pData == NULL) || (Size == 0U)) - 8005534: 68bb ldr r3, [r7, #8] - 8005536: 2b00 cmp r3, #0 - 8005538: d002 beq.n 8005540 - 800553a: 88fb ldrh r3, [r7, #6] - 800553c: 2b00 cmp r3, #0 - 800553e: d101 bne.n 8005544 + 8005e88: 68bb ldr r3, [r7, #8] + 8005e8a: 2b00 cmp r3, #0 + 8005e8c: d002 beq.n 8005e94 + 8005e8e: 88fb ldrh r3, [r7, #6] + 8005e90: 2b00 cmp r3, #0 + 8005e92: d101 bne.n 8005e98 { return HAL_ERROR; - 8005540: 2301 movs r3, #1 - 8005542: e06e b.n 8005622 + 8005e94: 2301 movs r3, #1 + 8005e96: e06e b.n 8005f76 } huart->ErrorCode = HAL_UART_ERROR_NONE; - 8005544: 68fb ldr r3, [r7, #12] - 8005546: 2200 movs r2, #0 - 8005548: 645a str r2, [r3, #68] @ 0x44 + 8005e98: 68fb ldr r3, [r7, #12] + 8005e9a: 2200 movs r2, #0 + 8005e9c: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; - 800554a: 68fb ldr r3, [r7, #12] - 800554c: 2221 movs r2, #33 @ 0x21 - 800554e: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005e9e: 68fb ldr r3, [r7, #12] + 8005ea0: 2221 movs r2, #33 @ 0x21 + 8005ea2: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 8005552: f7fd f8f9 bl 8002748 - 8005556: 6178 str r0, [r7, #20] + 8005ea6: f7fd f8d5 bl 8003054 + 8005eaa: 6178 str r0, [r7, #20] huart->TxXferSize = Size; - 8005558: 68fb ldr r3, [r7, #12] - 800555a: 88fa ldrh r2, [r7, #6] - 800555c: 849a strh r2, [r3, #36] @ 0x24 + 8005eac: 68fb ldr r3, [r7, #12] + 8005eae: 88fa ldrh r2, [r7, #6] + 8005eb0: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; - 800555e: 68fb ldr r3, [r7, #12] - 8005560: 88fa ldrh r2, [r7, #6] - 8005562: 84da strh r2, [r3, #38] @ 0x26 + 8005eb2: 68fb ldr r3, [r7, #12] + 8005eb4: 88fa ldrh r2, [r7, #6] + 8005eb6: 84da strh r2, [r3, #38] @ 0x26 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005564: 68fb ldr r3, [r7, #12] - 8005566: 689b ldr r3, [r3, #8] - 8005568: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 800556c: d108 bne.n 8005580 - 800556e: 68fb ldr r3, [r7, #12] - 8005570: 691b ldr r3, [r3, #16] - 8005572: 2b00 cmp r3, #0 - 8005574: d104 bne.n 8005580 + 8005eb8: 68fb ldr r3, [r7, #12] + 8005eba: 689b ldr r3, [r3, #8] + 8005ebc: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8005ec0: d108 bne.n 8005ed4 + 8005ec2: 68fb ldr r3, [r7, #12] + 8005ec4: 691b ldr r3, [r3, #16] + 8005ec6: 2b00 cmp r3, #0 + 8005ec8: d104 bne.n 8005ed4 { pdata8bits = NULL; - 8005576: 2300 movs r3, #0 - 8005578: 61fb str r3, [r7, #28] + 8005eca: 2300 movs r3, #0 + 8005ecc: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; - 800557a: 68bb ldr r3, [r7, #8] - 800557c: 61bb str r3, [r7, #24] - 800557e: e003 b.n 8005588 + 8005ece: 68bb ldr r3, [r7, #8] + 8005ed0: 61bb str r3, [r7, #24] + 8005ed2: e003 b.n 8005edc } else { pdata8bits = pData; - 8005580: 68bb ldr r3, [r7, #8] - 8005582: 61fb str r3, [r7, #28] + 8005ed4: 68bb ldr r3, [r7, #8] + 8005ed6: 61fb str r3, [r7, #28] pdata16bits = NULL; - 8005584: 2300 movs r3, #0 - 8005586: 61bb str r3, [r7, #24] + 8005ed8: 2300 movs r3, #0 + 8005eda: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) - 8005588: e02e b.n 80055e8 + 8005edc: e02e b.n 8005f3c { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 800558a: 683b ldr r3, [r7, #0] - 800558c: 9300 str r3, [sp, #0] - 800558e: 697b ldr r3, [r7, #20] - 8005590: 2200 movs r2, #0 - 8005592: 2180 movs r1, #128 @ 0x80 - 8005594: 68f8 ldr r0, [r7, #12] - 8005596: f000 fb01 bl 8005b9c - 800559a: 4603 mov r3, r0 - 800559c: 2b00 cmp r3, #0 - 800559e: d005 beq.n 80055ac + 8005ede: 683b ldr r3, [r7, #0] + 8005ee0: 9300 str r3, [sp, #0] + 8005ee2: 697b ldr r3, [r7, #20] + 8005ee4: 2200 movs r2, #0 + 8005ee6: 2180 movs r1, #128 @ 0x80 + 8005ee8: 68f8 ldr r0, [r7, #12] + 8005eea: f000 fb01 bl 80064f0 + 8005eee: 4603 mov r3, r0 + 8005ef0: 2b00 cmp r3, #0 + 8005ef2: d005 beq.n 8005f00 { huart->gState = HAL_UART_STATE_READY; - 80055a0: 68fb ldr r3, [r7, #12] - 80055a2: 2220 movs r2, #32 - 80055a4: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005ef4: 68fb ldr r3, [r7, #12] + 8005ef6: 2220 movs r2, #32 + 8005ef8: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; - 80055a8: 2303 movs r3, #3 - 80055aa: e03a b.n 8005622 + 8005efc: 2303 movs r3, #3 + 8005efe: e03a b.n 8005f76 } if (pdata8bits == NULL) - 80055ac: 69fb ldr r3, [r7, #28] - 80055ae: 2b00 cmp r3, #0 - 80055b0: d10b bne.n 80055ca + 8005f00: 69fb ldr r3, [r7, #28] + 8005f02: 2b00 cmp r3, #0 + 8005f04: d10b bne.n 8005f1e { huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); - 80055b2: 69bb ldr r3, [r7, #24] - 80055b4: 881b ldrh r3, [r3, #0] - 80055b6: 461a mov r2, r3 - 80055b8: 68fb ldr r3, [r7, #12] - 80055ba: 681b ldr r3, [r3, #0] - 80055bc: f3c2 0208 ubfx r2, r2, #0, #9 - 80055c0: 605a str r2, [r3, #4] + 8005f06: 69bb ldr r3, [r7, #24] + 8005f08: 881b ldrh r3, [r3, #0] + 8005f0a: 461a mov r2, r3 + 8005f0c: 68fb ldr r3, [r7, #12] + 8005f0e: 681b ldr r3, [r3, #0] + 8005f10: f3c2 0208 ubfx r2, r2, #0, #9 + 8005f14: 605a str r2, [r3, #4] pdata16bits++; - 80055c2: 69bb ldr r3, [r7, #24] - 80055c4: 3302 adds r3, #2 - 80055c6: 61bb str r3, [r7, #24] - 80055c8: e007 b.n 80055da + 8005f16: 69bb ldr r3, [r7, #24] + 8005f18: 3302 adds r3, #2 + 8005f1a: 61bb str r3, [r7, #24] + 8005f1c: e007 b.n 8005f2e } else { huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); - 80055ca: 69fb ldr r3, [r7, #28] - 80055cc: 781a ldrb r2, [r3, #0] - 80055ce: 68fb ldr r3, [r7, #12] - 80055d0: 681b ldr r3, [r3, #0] - 80055d2: 605a str r2, [r3, #4] + 8005f1e: 69fb ldr r3, [r7, #28] + 8005f20: 781a ldrb r2, [r3, #0] + 8005f22: 68fb ldr r3, [r7, #12] + 8005f24: 681b ldr r3, [r3, #0] + 8005f26: 605a str r2, [r3, #4] pdata8bits++; - 80055d4: 69fb ldr r3, [r7, #28] - 80055d6: 3301 adds r3, #1 - 80055d8: 61fb str r3, [r7, #28] + 8005f28: 69fb ldr r3, [r7, #28] + 8005f2a: 3301 adds r3, #1 + 8005f2c: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 80055da: 68fb ldr r3, [r7, #12] - 80055dc: 8cdb ldrh r3, [r3, #38] @ 0x26 - 80055de: b29b uxth r3, r3 - 80055e0: 3b01 subs r3, #1 - 80055e2: b29a uxth r2, r3 - 80055e4: 68fb ldr r3, [r7, #12] - 80055e6: 84da strh r2, [r3, #38] @ 0x26 + 8005f2e: 68fb ldr r3, [r7, #12] + 8005f30: 8cdb ldrh r3, [r3, #38] @ 0x26 + 8005f32: b29b uxth r3, r3 + 8005f34: 3b01 subs r3, #1 + 8005f36: b29a uxth r2, r3 + 8005f38: 68fb ldr r3, [r7, #12] + 8005f3a: 84da strh r2, [r3, #38] @ 0x26 while (huart->TxXferCount > 0U) - 80055e8: 68fb ldr r3, [r7, #12] - 80055ea: 8cdb ldrh r3, [r3, #38] @ 0x26 - 80055ec: b29b uxth r3, r3 - 80055ee: 2b00 cmp r3, #0 - 80055f0: d1cb bne.n 800558a + 8005f3c: 68fb ldr r3, [r7, #12] + 8005f3e: 8cdb ldrh r3, [r3, #38] @ 0x26 + 8005f40: b29b uxth r3, r3 + 8005f42: 2b00 cmp r3, #0 + 8005f44: d1cb bne.n 8005ede } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 80055f2: 683b ldr r3, [r7, #0] - 80055f4: 9300 str r3, [sp, #0] - 80055f6: 697b ldr r3, [r7, #20] - 80055f8: 2200 movs r2, #0 - 80055fa: 2140 movs r1, #64 @ 0x40 - 80055fc: 68f8 ldr r0, [r7, #12] - 80055fe: f000 facd bl 8005b9c - 8005602: 4603 mov r3, r0 - 8005604: 2b00 cmp r3, #0 - 8005606: d005 beq.n 8005614 + 8005f46: 683b ldr r3, [r7, #0] + 8005f48: 9300 str r3, [sp, #0] + 8005f4a: 697b ldr r3, [r7, #20] + 8005f4c: 2200 movs r2, #0 + 8005f4e: 2140 movs r1, #64 @ 0x40 + 8005f50: 68f8 ldr r0, [r7, #12] + 8005f52: f000 facd bl 80064f0 + 8005f56: 4603 mov r3, r0 + 8005f58: 2b00 cmp r3, #0 + 8005f5a: d005 beq.n 8005f68 { huart->gState = HAL_UART_STATE_READY; - 8005608: 68fb ldr r3, [r7, #12] - 800560a: 2220 movs r2, #32 - 800560c: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005f5c: 68fb ldr r3, [r7, #12] + 8005f5e: 2220 movs r2, #32 + 8005f60: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; - 8005610: 2303 movs r3, #3 - 8005612: e006 b.n 8005622 + 8005f64: 2303 movs r3, #3 + 8005f66: e006 b.n 8005f76 } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8005614: 68fb ldr r3, [r7, #12] - 8005616: 2220 movs r2, #32 - 8005618: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005f68: 68fb ldr r3, [r7, #12] + 8005f6a: 2220 movs r2, #32 + 8005f6c: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_OK; - 800561c: 2300 movs r3, #0 - 800561e: e000 b.n 8005622 + 8005f70: 2300 movs r3, #0 + 8005f72: e000 b.n 8005f76 } else { return HAL_BUSY; - 8005620: 2302 movs r3, #2 + 8005f74: 2302 movs r3, #2 } } - 8005622: 4618 mov r0, r3 - 8005624: 3720 adds r7, #32 - 8005626: 46bd mov sp, r7 - 8005628: bd80 pop {r7, pc} + 8005f76: 4618 mov r0, r3 + 8005f78: 3720 adds r7, #32 + 8005f7a: 46bd mov sp, r7 + 8005f7c: bd80 pop {r7, pc} ... -0800562c : +08005f80 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - 800562c: b580 push {r7, lr} - 800562e: b0ba sub sp, #232 @ 0xe8 - 8005630: af00 add r7, sp, #0 - 8005632: 6078 str r0, [r7, #4] + 8005f80: b580 push {r7, lr} + 8005f82: b0ba sub sp, #232 @ 0xe8 + 8005f84: af00 add r7, sp, #0 + 8005f86: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->SR); - 8005634: 687b ldr r3, [r7, #4] - 8005636: 681b ldr r3, [r3, #0] - 8005638: 681b ldr r3, [r3, #0] - 800563a: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 + 8005f88: 687b ldr r3, [r7, #4] + 8005f8a: 681b ldr r3, [r3, #0] + 8005f8c: 681b ldr r3, [r3, #0] + 8005f8e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); - 800563e: 687b ldr r3, [r7, #4] - 8005640: 681b ldr r3, [r3, #0] - 8005642: 68db ldr r3, [r3, #12] - 8005644: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 + 8005f92: 687b ldr r3, [r7, #4] + 8005f94: 681b ldr r3, [r3, #0] + 8005f96: 68db ldr r3, [r3, #12] + 8005f98: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8005648: 687b ldr r3, [r7, #4] - 800564a: 681b ldr r3, [r3, #0] - 800564c: 695b ldr r3, [r3, #20] - 800564e: f8c7 30dc str.w r3, [r7, #220] @ 0xdc + 8005f9c: 687b ldr r3, [r7, #4] + 8005f9e: 681b ldr r3, [r3, #0] + 8005fa0: 695b ldr r3, [r3, #20] + 8005fa2: f8c7 30dc str.w r3, [r7, #220] @ 0xdc uint32_t errorflags = 0x00U; - 8005652: 2300 movs r3, #0 - 8005654: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 + 8005fa6: 2300 movs r3, #0 + 8005fa8: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 uint32_t dmarequest = 0x00U; - 8005658: 2300 movs r3, #0 - 800565a: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 + 8005fac: 2300 movs r3, #0 + 8005fae: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); - 800565e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005662: f003 030f and.w r3, r3, #15 - 8005666: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 + 8005fb2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005fb6: f003 030f and.w r3, r3, #15 + 8005fba: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 if (errorflags == RESET) - 800566a: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 - 800566e: 2b00 cmp r3, #0 - 8005670: d10f bne.n 8005692 + 8005fbe: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 + 8005fc2: 2b00 cmp r3, #0 + 8005fc4: d10f bne.n 8005fe6 { /* UART in mode Receiver -------------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 8005672: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005676: f003 0320 and.w r3, r3, #32 - 800567a: 2b00 cmp r3, #0 - 800567c: d009 beq.n 8005692 - 800567e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005682: f003 0320 and.w r3, r3, #32 - 8005686: 2b00 cmp r3, #0 - 8005688: d003 beq.n 8005692 + 8005fc6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005fca: f003 0320 and.w r3, r3, #32 + 8005fce: 2b00 cmp r3, #0 + 8005fd0: d009 beq.n 8005fe6 + 8005fd2: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005fd6: f003 0320 and.w r3, r3, #32 + 8005fda: 2b00 cmp r3, #0 + 8005fdc: d003 beq.n 8005fe6 { UART_Receive_IT(huart); - 800568a: 6878 ldr r0, [r7, #4] - 800568c: f000 fbbc bl 8005e08 + 8005fde: 6878 ldr r0, [r7, #4] + 8005fe0: f000 fbbc bl 800675c return; - 8005690: e25b b.n 8005b4a + 8005fe4: e25b b.n 800649e } } /* If some errors occur */ if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) - 8005692: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 - 8005696: 2b00 cmp r3, #0 - 8005698: f000 80de beq.w 8005858 - 800569c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 80056a0: f003 0301 and.w r3, r3, #1 - 80056a4: 2b00 cmp r3, #0 - 80056a6: d106 bne.n 80056b6 + 8005fe6: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 + 8005fea: 2b00 cmp r3, #0 + 8005fec: f000 80de beq.w 80061ac + 8005ff0: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8005ff4: f003 0301 and.w r3, r3, #1 + 8005ff8: 2b00 cmp r3, #0 + 8005ffa: d106 bne.n 800600a || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) - 80056a8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 80056ac: f403 7390 and.w r3, r3, #288 @ 0x120 - 80056b0: 2b00 cmp r3, #0 - 80056b2: f000 80d1 beq.w 8005858 + 8005ffc: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8006000: f403 7390 and.w r3, r3, #288 @ 0x120 + 8006004: 2b00 cmp r3, #0 + 8006006: f000 80d1 beq.w 80061ac { /* UART parity error interrupt occurred ----------------------------------*/ if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) - 80056b6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 80056ba: f003 0301 and.w r3, r3, #1 - 80056be: 2b00 cmp r3, #0 - 80056c0: d00b beq.n 80056da - 80056c2: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 80056c6: f403 7380 and.w r3, r3, #256 @ 0x100 - 80056ca: 2b00 cmp r3, #0 - 80056cc: d005 beq.n 80056da + 800600a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 800600e: f003 0301 and.w r3, r3, #1 + 8006012: 2b00 cmp r3, #0 + 8006014: d00b beq.n 800602e + 8006016: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 800601a: f403 7380 and.w r3, r3, #256 @ 0x100 + 800601e: 2b00 cmp r3, #0 + 8006020: d005 beq.n 800602e { huart->ErrorCode |= HAL_UART_ERROR_PE; - 80056ce: 687b ldr r3, [r7, #4] - 80056d0: 6c5b ldr r3, [r3, #68] @ 0x44 - 80056d2: f043 0201 orr.w r2, r3, #1 - 80056d6: 687b ldr r3, [r7, #4] - 80056d8: 645a str r2, [r3, #68] @ 0x44 + 8006022: 687b ldr r3, [r7, #4] + 8006024: 6c5b ldr r3, [r3, #68] @ 0x44 + 8006026: f043 0201 orr.w r2, r3, #1 + 800602a: 687b ldr r3, [r7, #4] + 800602c: 645a str r2, [r3, #68] @ 0x44 } /* UART noise error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 80056da: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 80056de: f003 0304 and.w r3, r3, #4 - 80056e2: 2b00 cmp r3, #0 - 80056e4: d00b beq.n 80056fe - 80056e6: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 80056ea: f003 0301 and.w r3, r3, #1 - 80056ee: 2b00 cmp r3, #0 - 80056f0: d005 beq.n 80056fe + 800602e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8006032: f003 0304 and.w r3, r3, #4 + 8006036: 2b00 cmp r3, #0 + 8006038: d00b beq.n 8006052 + 800603a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 800603e: f003 0301 and.w r3, r3, #1 + 8006042: 2b00 cmp r3, #0 + 8006044: d005 beq.n 8006052 { huart->ErrorCode |= HAL_UART_ERROR_NE; - 80056f2: 687b ldr r3, [r7, #4] - 80056f4: 6c5b ldr r3, [r3, #68] @ 0x44 - 80056f6: f043 0202 orr.w r2, r3, #2 - 80056fa: 687b ldr r3, [r7, #4] - 80056fc: 645a str r2, [r3, #68] @ 0x44 + 8006046: 687b ldr r3, [r7, #4] + 8006048: 6c5b ldr r3, [r3, #68] @ 0x44 + 800604a: f043 0202 orr.w r2, r3, #2 + 800604e: 687b ldr r3, [r7, #4] + 8006050: 645a str r2, [r3, #68] @ 0x44 } /* UART frame error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 80056fe: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005702: f003 0302 and.w r3, r3, #2 - 8005706: 2b00 cmp r3, #0 - 8005708: d00b beq.n 8005722 - 800570a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 800570e: f003 0301 and.w r3, r3, #1 - 8005712: 2b00 cmp r3, #0 - 8005714: d005 beq.n 8005722 + 8006052: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8006056: f003 0302 and.w r3, r3, #2 + 800605a: 2b00 cmp r3, #0 + 800605c: d00b beq.n 8006076 + 800605e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8006062: f003 0301 and.w r3, r3, #1 + 8006066: 2b00 cmp r3, #0 + 8006068: d005 beq.n 8006076 { huart->ErrorCode |= HAL_UART_ERROR_FE; - 8005716: 687b ldr r3, [r7, #4] - 8005718: 6c5b ldr r3, [r3, #68] @ 0x44 - 800571a: f043 0204 orr.w r2, r3, #4 - 800571e: 687b ldr r3, [r7, #4] - 8005720: 645a str r2, [r3, #68] @ 0x44 + 800606a: 687b ldr r3, [r7, #4] + 800606c: 6c5b ldr r3, [r3, #68] @ 0x44 + 800606e: f043 0204 orr.w r2, r3, #4 + 8006072: 687b ldr r3, [r7, #4] + 8006074: 645a str r2, [r3, #68] @ 0x44 } /* UART Over-Run interrupt occurred --------------------------------------*/ if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) - 8005722: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005726: f003 0308 and.w r3, r3, #8 - 800572a: 2b00 cmp r3, #0 - 800572c: d011 beq.n 8005752 - 800572e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005732: f003 0320 and.w r3, r3, #32 - 8005736: 2b00 cmp r3, #0 - 8005738: d105 bne.n 8005746 + 8006076: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 800607a: f003 0308 and.w r3, r3, #8 + 800607e: 2b00 cmp r3, #0 + 8006080: d011 beq.n 80060a6 + 8006082: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8006086: f003 0320 and.w r3, r3, #32 + 800608a: 2b00 cmp r3, #0 + 800608c: d105 bne.n 800609a || ((cr3its & USART_CR3_EIE) != RESET))) - 800573a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 800573e: f003 0301 and.w r3, r3, #1 - 8005742: 2b00 cmp r3, #0 - 8005744: d005 beq.n 8005752 + 800608e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8006092: f003 0301 and.w r3, r3, #1 + 8006096: 2b00 cmp r3, #0 + 8006098: d005 beq.n 80060a6 { huart->ErrorCode |= HAL_UART_ERROR_ORE; - 8005746: 687b ldr r3, [r7, #4] - 8005748: 6c5b ldr r3, [r3, #68] @ 0x44 - 800574a: f043 0208 orr.w r2, r3, #8 - 800574e: 687b ldr r3, [r7, #4] - 8005750: 645a str r2, [r3, #68] @ 0x44 + 800609a: 687b ldr r3, [r7, #4] + 800609c: 6c5b ldr r3, [r3, #68] @ 0x44 + 800609e: f043 0208 orr.w r2, r3, #8 + 80060a2: 687b ldr r3, [r7, #4] + 80060a4: 645a str r2, [r3, #68] @ 0x44 } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8005752: 687b ldr r3, [r7, #4] - 8005754: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005756: 2b00 cmp r3, #0 - 8005758: f000 81f2 beq.w 8005b40 + 80060a6: 687b ldr r3, [r7, #4] + 80060a8: 6c5b ldr r3, [r3, #68] @ 0x44 + 80060aa: 2b00 cmp r3, #0 + 80060ac: f000 81f2 beq.w 8006494 { /* UART in mode Receiver -----------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 800575c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005760: f003 0320 and.w r3, r3, #32 - 8005764: 2b00 cmp r3, #0 - 8005766: d008 beq.n 800577a - 8005768: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 800576c: f003 0320 and.w r3, r3, #32 - 8005770: 2b00 cmp r3, #0 - 8005772: d002 beq.n 800577a + 80060b0: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80060b4: f003 0320 and.w r3, r3, #32 + 80060b8: 2b00 cmp r3, #0 + 80060ba: d008 beq.n 80060ce + 80060bc: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80060c0: f003 0320 and.w r3, r3, #32 + 80060c4: 2b00 cmp r3, #0 + 80060c6: d002 beq.n 80060ce { UART_Receive_IT(huart); - 8005774: 6878 ldr r0, [r7, #4] - 8005776: f000 fb47 bl 8005e08 + 80060c8: 6878 ldr r0, [r7, #4] + 80060ca: f000 fb47 bl 800675c } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - 800577a: 687b ldr r3, [r7, #4] - 800577c: 681b ldr r3, [r3, #0] - 800577e: 695b ldr r3, [r3, #20] - 8005780: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005784: 2b00 cmp r3, #0 - 8005786: bf14 ite ne - 8005788: 2301 movne r3, #1 - 800578a: 2300 moveq r3, #0 - 800578c: b2db uxtb r3, r3 - 800578e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 + 80060ce: 687b ldr r3, [r7, #4] + 80060d0: 681b ldr r3, [r3, #0] + 80060d2: 695b ldr r3, [r3, #20] + 80060d4: f003 0340 and.w r3, r3, #64 @ 0x40 + 80060d8: 2b00 cmp r3, #0 + 80060da: bf14 ite ne + 80060dc: 2301 movne r3, #1 + 80060de: 2300 moveq r3, #0 + 80060e0: b2db uxtb r3, r3 + 80060e2: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) - 8005792: 687b ldr r3, [r7, #4] - 8005794: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005796: f003 0308 and.w r3, r3, #8 - 800579a: 2b00 cmp r3, #0 - 800579c: d103 bne.n 80057a6 - 800579e: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 - 80057a2: 2b00 cmp r3, #0 - 80057a4: d04f beq.n 8005846 + 80060e6: 687b ldr r3, [r7, #4] + 80060e8: 6c5b ldr r3, [r3, #68] @ 0x44 + 80060ea: f003 0308 and.w r3, r3, #8 + 80060ee: 2b00 cmp r3, #0 + 80060f0: d103 bne.n 80060fa + 80060f2: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 + 80060f6: 2b00 cmp r3, #0 + 80060f8: d04f beq.n 800619a { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); - 80057a6: 6878 ldr r0, [r7, #4] - 80057a8: f000 fa51 bl 8005c4e + 80060fa: 6878 ldr r0, [r7, #4] + 80060fc: f000 fa51 bl 80065a2 /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 80057ac: 687b ldr r3, [r7, #4] - 80057ae: 681b ldr r3, [r3, #0] - 80057b0: 695b ldr r3, [r3, #20] - 80057b2: f003 0340 and.w r3, r3, #64 @ 0x40 - 80057b6: 2b00 cmp r3, #0 - 80057b8: d041 beq.n 800583e + 8006100: 687b ldr r3, [r7, #4] + 8006102: 681b ldr r3, [r3, #0] + 8006104: 695b ldr r3, [r3, #20] + 8006106: f003 0340 and.w r3, r3, #64 @ 0x40 + 800610a: 2b00 cmp r3, #0 + 800610c: d041 beq.n 8006192 { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 80057ba: 687b ldr r3, [r7, #4] - 80057bc: 681b ldr r3, [r3, #0] - 80057be: 3314 adds r3, #20 - 80057c0: f8c7 309c str.w r3, [r7, #156] @ 0x9c + 800610e: 687b ldr r3, [r7, #4] + 8006110: 681b ldr r3, [r3, #0] + 8006112: 3314 adds r3, #20 + 8006114: f8c7 309c str.w r3, [r7, #156] @ 0x9c */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80057c4: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c - 80057c8: e853 3f00 ldrex r3, [r3] - 80057cc: f8c7 3098 str.w r3, [r7, #152] @ 0x98 + 8006118: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c + 800611c: e853 3f00 ldrex r3, [r3] + 8006120: f8c7 3098 str.w r3, [r7, #152] @ 0x98 return(result); - 80057d0: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 - 80057d4: f023 0340 bic.w r3, r3, #64 @ 0x40 - 80057d8: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 - 80057dc: 687b ldr r3, [r7, #4] - 80057de: 681b ldr r3, [r3, #0] - 80057e0: 3314 adds r3, #20 - 80057e2: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 - 80057e6: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 - 80057ea: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 + 8006124: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 + 8006128: f023 0340 bic.w r3, r3, #64 @ 0x40 + 800612c: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 + 8006130: 687b ldr r3, [r7, #4] + 8006132: 681b ldr r3, [r3, #0] + 8006134: 3314 adds r3, #20 + 8006136: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 + 800613a: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 + 800613e: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80057ee: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 - 80057f2: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 - 80057f6: e841 2300 strex r3, r2, [r1] - 80057fa: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 + 8006142: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 + 8006146: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 + 800614a: e841 2300 strex r3, r2, [r1] + 800614e: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 return(result); - 80057fe: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 - 8005802: 2b00 cmp r3, #0 - 8005804: d1d9 bne.n 80057ba + 8006152: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 + 8006156: 2b00 cmp r3, #0 + 8006158: d1d9 bne.n 800610e /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) - 8005806: 687b ldr r3, [r7, #4] - 8005808: 6bdb ldr r3, [r3, #60] @ 0x3c - 800580a: 2b00 cmp r3, #0 - 800580c: d013 beq.n 8005836 + 800615a: 687b ldr r3, [r7, #4] + 800615c: 6bdb ldr r3, [r3, #60] @ 0x3c + 800615e: 2b00 cmp r3, #0 + 8006160: d013 beq.n 800618a { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 800580e: 687b ldr r3, [r7, #4] - 8005810: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005812: 4a7e ldr r2, [pc, #504] @ (8005a0c ) - 8005814: 635a str r2, [r3, #52] @ 0x34 + 8006162: 687b ldr r3, [r7, #4] + 8006164: 6bdb ldr r3, [r3, #60] @ 0x3c + 8006166: 4a7e ldr r2, [pc, #504] @ (8006360 ) + 8006168: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 8005816: 687b ldr r3, [r7, #4] - 8005818: 6bdb ldr r3, [r3, #60] @ 0x3c - 800581a: 4618 mov r0, r3 - 800581c: f7fd faf8 bl 8002e10 - 8005820: 4603 mov r3, r0 - 8005822: 2b00 cmp r3, #0 - 8005824: d016 beq.n 8005854 + 800616a: 687b ldr r3, [r7, #4] + 800616c: 6bdb ldr r3, [r3, #60] @ 0x3c + 800616e: 4618 mov r0, r3 + 8006170: f7fd faf8 bl 8003764 + 8006174: 4603 mov r3, r0 + 8006176: 2b00 cmp r3, #0 + 8006178: d016 beq.n 80061a8 { /* Call Directly XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); - 8005826: 687b ldr r3, [r7, #4] - 8005828: 6bdb ldr r3, [r3, #60] @ 0x3c - 800582a: 6b5b ldr r3, [r3, #52] @ 0x34 - 800582c: 687a ldr r2, [r7, #4] - 800582e: 6bd2 ldr r2, [r2, #60] @ 0x3c - 8005830: 4610 mov r0, r2 - 8005832: 4798 blx r3 + 800617a: 687b ldr r3, [r7, #4] + 800617c: 6bdb ldr r3, [r3, #60] @ 0x3c + 800617e: 6b5b ldr r3, [r3, #52] @ 0x34 + 8006180: 687a ldr r2, [r7, #4] + 8006182: 6bd2 ldr r2, [r2, #60] @ 0x3c + 8006184: 4610 mov r0, r2 + 8006186: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005834: e00e b.n 8005854 + 8006188: e00e b.n 80061a8 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005836: 6878 ldr r0, [r7, #4] - 8005838: f000 f99c bl 8005b74 + 800618a: 6878 ldr r0, [r7, #4] + 800618c: f000 f99c bl 80064c8 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 800583c: e00a b.n 8005854 + 8006190: e00a b.n 80061a8 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 800583e: 6878 ldr r0, [r7, #4] - 8005840: f000 f998 bl 8005b74 + 8006192: 6878 ldr r0, [r7, #4] + 8006194: f000 f998 bl 80064c8 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005844: e006 b.n 8005854 + 8006198: e006 b.n 80061a8 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005846: 6878 ldr r0, [r7, #4] - 8005848: f000 f994 bl 8005b74 + 800619a: 6878 ldr r0, [r7, #4] + 800619c: f000 f994 bl 80064c8 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 800584c: 687b ldr r3, [r7, #4] - 800584e: 2200 movs r2, #0 - 8005850: 645a str r2, [r3, #68] @ 0x44 + 80061a0: 687b ldr r3, [r7, #4] + 80061a2: 2200 movs r2, #0 + 80061a4: 645a str r2, [r3, #68] @ 0x44 } } return; - 8005852: e175 b.n 8005b40 + 80061a6: e175 b.n 8006494 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005854: bf00 nop + 80061a8: bf00 nop return; - 8005856: e173 b.n 8005b40 + 80061aa: e173 b.n 8006494 } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8005858: 687b ldr r3, [r7, #4] - 800585a: 6b1b ldr r3, [r3, #48] @ 0x30 - 800585c: 2b01 cmp r3, #1 - 800585e: f040 814f bne.w 8005b00 + 80061ac: 687b ldr r3, [r7, #4] + 80061ae: 6b1b ldr r3, [r3, #48] @ 0x30 + 80061b0: 2b01 cmp r3, #1 + 80061b2: f040 814f bne.w 8006454 && ((isrflags & USART_SR_IDLE) != 0U) - 8005862: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005866: f003 0310 and.w r3, r3, #16 - 800586a: 2b00 cmp r3, #0 - 800586c: f000 8148 beq.w 8005b00 + 80061b6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80061ba: f003 0310 and.w r3, r3, #16 + 80061be: 2b00 cmp r3, #0 + 80061c0: f000 8148 beq.w 8006454 && ((cr1its & USART_SR_IDLE) != 0U)) - 8005870: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005874: f003 0310 and.w r3, r3, #16 - 8005878: 2b00 cmp r3, #0 - 800587a: f000 8141 beq.w 8005b00 + 80061c4: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80061c8: f003 0310 and.w r3, r3, #16 + 80061cc: 2b00 cmp r3, #0 + 80061ce: f000 8141 beq.w 8006454 { __HAL_UART_CLEAR_IDLEFLAG(huart); - 800587e: 2300 movs r3, #0 - 8005880: 60bb str r3, [r7, #8] - 8005882: 687b ldr r3, [r7, #4] - 8005884: 681b ldr r3, [r3, #0] - 8005886: 681b ldr r3, [r3, #0] - 8005888: 60bb str r3, [r7, #8] - 800588a: 687b ldr r3, [r7, #4] - 800588c: 681b ldr r3, [r3, #0] - 800588e: 685b ldr r3, [r3, #4] - 8005890: 60bb str r3, [r7, #8] - 8005892: 68bb ldr r3, [r7, #8] + 80061d2: 2300 movs r3, #0 + 80061d4: 60bb str r3, [r7, #8] + 80061d6: 687b ldr r3, [r7, #4] + 80061d8: 681b ldr r3, [r3, #0] + 80061da: 681b ldr r3, [r3, #0] + 80061dc: 60bb str r3, [r7, #8] + 80061de: 687b ldr r3, [r7, #4] + 80061e0: 681b ldr r3, [r3, #0] + 80061e2: 685b ldr r3, [r3, #4] + 80061e4: 60bb str r3, [r7, #8] + 80061e6: 68bb ldr r3, [r7, #8] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005894: 687b ldr r3, [r7, #4] - 8005896: 681b ldr r3, [r3, #0] - 8005898: 695b ldr r3, [r3, #20] - 800589a: f003 0340 and.w r3, r3, #64 @ 0x40 - 800589e: 2b00 cmp r3, #0 - 80058a0: f000 80b6 beq.w 8005a10 + 80061e8: 687b ldr r3, [r7, #4] + 80061ea: 681b ldr r3, [r3, #0] + 80061ec: 695b ldr r3, [r3, #20] + 80061ee: f003 0340 and.w r3, r3, #64 @ 0x40 + 80061f2: 2b00 cmp r3, #0 + 80061f4: f000 80b6 beq.w 8006364 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 80058a4: 687b ldr r3, [r7, #4] - 80058a6: 6bdb ldr r3, [r3, #60] @ 0x3c - 80058a8: 681b ldr r3, [r3, #0] - 80058aa: 685b ldr r3, [r3, #4] - 80058ac: f8a7 30be strh.w r3, [r7, #190] @ 0xbe + 80061f8: 687b ldr r3, [r7, #4] + 80061fa: 6bdb ldr r3, [r3, #60] @ 0x3c + 80061fc: 681b ldr r3, [r3, #0] + 80061fe: 685b ldr r3, [r3, #4] + 8006200: f8a7 30be strh.w r3, [r7, #190] @ 0xbe if ((nb_remaining_rx_data > 0U) - 80058b0: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe - 80058b4: 2b00 cmp r3, #0 - 80058b6: f000 8145 beq.w 8005b44 + 8006204: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe + 8006208: 2b00 cmp r3, #0 + 800620a: f000 8145 beq.w 8006498 && (nb_remaining_rx_data < huart->RxXferSize)) - 80058ba: 687b ldr r3, [r7, #4] - 80058bc: 8d9b ldrh r3, [r3, #44] @ 0x2c - 80058be: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe - 80058c2: 429a cmp r2, r3 - 80058c4: f080 813e bcs.w 8005b44 + 800620e: 687b ldr r3, [r7, #4] + 8006210: 8d9b ldrh r3, [r3, #44] @ 0x2c + 8006212: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe + 8006216: 429a cmp r2, r3 + 8006218: f080 813e bcs.w 8006498 { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; - 80058c8: 687b ldr r3, [r7, #4] - 80058ca: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe - 80058ce: 85da strh r2, [r3, #46] @ 0x2e + 800621c: 687b ldr r3, [r7, #4] + 800621e: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe + 8006222: 85da strh r2, [r3, #46] @ 0x2e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) - 80058d0: 687b ldr r3, [r7, #4] - 80058d2: 6bdb ldr r3, [r3, #60] @ 0x3c - 80058d4: 699b ldr r3, [r3, #24] - 80058d6: 2b20 cmp r3, #32 - 80058d8: f000 8088 beq.w 80059ec + 8006224: 687b ldr r3, [r7, #4] + 8006226: 6bdb ldr r3, [r3, #60] @ 0x3c + 8006228: 699b ldr r3, [r3, #24] + 800622a: 2b20 cmp r3, #32 + 800622c: f000 8088 beq.w 8006340 { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 80058dc: 687b ldr r3, [r7, #4] - 80058de: 681b ldr r3, [r3, #0] - 80058e0: 330c adds r3, #12 - 80058e2: f8c7 3088 str.w r3, [r7, #136] @ 0x88 + 8006230: 687b ldr r3, [r7, #4] + 8006232: 681b ldr r3, [r3, #0] + 8006234: 330c adds r3, #12 + 8006236: f8c7 3088 str.w r3, [r7, #136] @ 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80058e6: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 - 80058ea: e853 3f00 ldrex r3, [r3] - 80058ee: f8c7 3084 str.w r3, [r7, #132] @ 0x84 + 800623a: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 + 800623e: e853 3f00 ldrex r3, [r3] + 8006242: f8c7 3084 str.w r3, [r7, #132] @ 0x84 return(result); - 80058f2: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 - 80058f6: f423 7380 bic.w r3, r3, #256 @ 0x100 - 80058fa: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 - 80058fe: 687b ldr r3, [r7, #4] - 8005900: 681b ldr r3, [r3, #0] - 8005902: 330c adds r3, #12 - 8005904: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 - 8005908: f8c7 2094 str.w r2, [r7, #148] @ 0x94 - 800590c: f8c7 3090 str.w r3, [r7, #144] @ 0x90 + 8006246: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 + 800624a: f423 7380 bic.w r3, r3, #256 @ 0x100 + 800624e: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 + 8006252: 687b ldr r3, [r7, #4] + 8006254: 681b ldr r3, [r3, #0] + 8006256: 330c adds r3, #12 + 8006258: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 + 800625c: f8c7 2094 str.w r2, [r7, #148] @ 0x94 + 8006260: f8c7 3090 str.w r3, [r7, #144] @ 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005910: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 - 8005914: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 - 8005918: e841 2300 strex r3, r2, [r1] - 800591c: f8c7 308c str.w r3, [r7, #140] @ 0x8c + 8006264: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 + 8006268: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 + 800626c: e841 2300 strex r3, r2, [r1] + 8006270: f8c7 308c str.w r3, [r7, #140] @ 0x8c return(result); - 8005920: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c - 8005924: 2b00 cmp r3, #0 - 8005926: d1d9 bne.n 80058dc + 8006274: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c + 8006278: 2b00 cmp r3, #0 + 800627a: d1d9 bne.n 8006230 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005928: 687b ldr r3, [r7, #4] - 800592a: 681b ldr r3, [r3, #0] - 800592c: 3314 adds r3, #20 - 800592e: 677b str r3, [r7, #116] @ 0x74 + 800627c: 687b ldr r3, [r7, #4] + 800627e: 681b ldr r3, [r3, #0] + 8006280: 3314 adds r3, #20 + 8006282: 677b str r3, [r7, #116] @ 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005930: 6f7b ldr r3, [r7, #116] @ 0x74 - 8005932: e853 3f00 ldrex r3, [r3] - 8005936: 673b str r3, [r7, #112] @ 0x70 + 8006284: 6f7b ldr r3, [r7, #116] @ 0x74 + 8006286: e853 3f00 ldrex r3, [r3] + 800628a: 673b str r3, [r7, #112] @ 0x70 return(result); - 8005938: 6f3b ldr r3, [r7, #112] @ 0x70 - 800593a: f023 0301 bic.w r3, r3, #1 - 800593e: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 - 8005942: 687b ldr r3, [r7, #4] - 8005944: 681b ldr r3, [r3, #0] - 8005946: 3314 adds r3, #20 - 8005948: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 - 800594c: f8c7 2080 str.w r2, [r7, #128] @ 0x80 - 8005950: 67fb str r3, [r7, #124] @ 0x7c + 800628c: 6f3b ldr r3, [r7, #112] @ 0x70 + 800628e: f023 0301 bic.w r3, r3, #1 + 8006292: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 + 8006296: 687b ldr r3, [r7, #4] + 8006298: 681b ldr r3, [r3, #0] + 800629a: 3314 adds r3, #20 + 800629c: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 + 80062a0: f8c7 2080 str.w r2, [r7, #128] @ 0x80 + 80062a4: 67fb str r3, [r7, #124] @ 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005952: 6ff9 ldr r1, [r7, #124] @ 0x7c - 8005954: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 - 8005958: e841 2300 strex r3, r2, [r1] - 800595c: 67bb str r3, [r7, #120] @ 0x78 + 80062a6: 6ff9 ldr r1, [r7, #124] @ 0x7c + 80062a8: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 + 80062ac: e841 2300 strex r3, r2, [r1] + 80062b0: 67bb str r3, [r7, #120] @ 0x78 return(result); - 800595e: 6fbb ldr r3, [r7, #120] @ 0x78 - 8005960: 2b00 cmp r3, #0 - 8005962: d1e1 bne.n 8005928 + 80062b2: 6fbb ldr r3, [r7, #120] @ 0x78 + 80062b4: 2b00 cmp r3, #0 + 80062b6: d1e1 bne.n 800627c /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8005964: 687b ldr r3, [r7, #4] - 8005966: 681b ldr r3, [r3, #0] - 8005968: 3314 adds r3, #20 - 800596a: 663b str r3, [r7, #96] @ 0x60 + 80062b8: 687b ldr r3, [r7, #4] + 80062ba: 681b ldr r3, [r3, #0] + 80062bc: 3314 adds r3, #20 + 80062be: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 800596c: 6e3b ldr r3, [r7, #96] @ 0x60 - 800596e: e853 3f00 ldrex r3, [r3] - 8005972: 65fb str r3, [r7, #92] @ 0x5c + 80062c0: 6e3b ldr r3, [r7, #96] @ 0x60 + 80062c2: e853 3f00 ldrex r3, [r3] + 80062c6: 65fb str r3, [r7, #92] @ 0x5c return(result); - 8005974: 6dfb ldr r3, [r7, #92] @ 0x5c - 8005976: f023 0340 bic.w r3, r3, #64 @ 0x40 - 800597a: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 - 800597e: 687b ldr r3, [r7, #4] - 8005980: 681b ldr r3, [r3, #0] - 8005982: 3314 adds r3, #20 - 8005984: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 - 8005988: 66fa str r2, [r7, #108] @ 0x6c - 800598a: 66bb str r3, [r7, #104] @ 0x68 + 80062c8: 6dfb ldr r3, [r7, #92] @ 0x5c + 80062ca: f023 0340 bic.w r3, r3, #64 @ 0x40 + 80062ce: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 + 80062d2: 687b ldr r3, [r7, #4] + 80062d4: 681b ldr r3, [r3, #0] + 80062d6: 3314 adds r3, #20 + 80062d8: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 + 80062dc: 66fa str r2, [r7, #108] @ 0x6c + 80062de: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800598c: 6eb9 ldr r1, [r7, #104] @ 0x68 - 800598e: 6efa ldr r2, [r7, #108] @ 0x6c - 8005990: e841 2300 strex r3, r2, [r1] - 8005994: 667b str r3, [r7, #100] @ 0x64 + 80062e0: 6eb9 ldr r1, [r7, #104] @ 0x68 + 80062e2: 6efa ldr r2, [r7, #108] @ 0x6c + 80062e4: e841 2300 strex r3, r2, [r1] + 80062e8: 667b str r3, [r7, #100] @ 0x64 return(result); - 8005996: 6e7b ldr r3, [r7, #100] @ 0x64 - 8005998: 2b00 cmp r3, #0 - 800599a: d1e3 bne.n 8005964 + 80062ea: 6e7b ldr r3, [r7, #100] @ 0x64 + 80062ec: 2b00 cmp r3, #0 + 80062ee: d1e3 bne.n 80062b8 /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 800599c: 687b ldr r3, [r7, #4] - 800599e: 2220 movs r2, #32 - 80059a0: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 80062f0: 687b ldr r3, [r7, #4] + 80062f2: 2220 movs r2, #32 + 80062f4: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 80059a4: 687b ldr r3, [r7, #4] - 80059a6: 2200 movs r2, #0 - 80059a8: 631a str r2, [r3, #48] @ 0x30 + 80062f8: 687b ldr r3, [r7, #4] + 80062fa: 2200 movs r2, #0 + 80062fc: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 80059aa: 687b ldr r3, [r7, #4] - 80059ac: 681b ldr r3, [r3, #0] - 80059ae: 330c adds r3, #12 - 80059b0: 64fb str r3, [r7, #76] @ 0x4c + 80062fe: 687b ldr r3, [r7, #4] + 8006300: 681b ldr r3, [r3, #0] + 8006302: 330c adds r3, #12 + 8006304: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80059b2: 6cfb ldr r3, [r7, #76] @ 0x4c - 80059b4: e853 3f00 ldrex r3, [r3] - 80059b8: 64bb str r3, [r7, #72] @ 0x48 + 8006306: 6cfb ldr r3, [r7, #76] @ 0x4c + 8006308: e853 3f00 ldrex r3, [r3] + 800630c: 64bb str r3, [r7, #72] @ 0x48 return(result); - 80059ba: 6cbb ldr r3, [r7, #72] @ 0x48 - 80059bc: f023 0310 bic.w r3, r3, #16 - 80059c0: f8c7 30ac str.w r3, [r7, #172] @ 0xac - 80059c4: 687b ldr r3, [r7, #4] - 80059c6: 681b ldr r3, [r3, #0] - 80059c8: 330c adds r3, #12 - 80059ca: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac - 80059ce: 65ba str r2, [r7, #88] @ 0x58 - 80059d0: 657b str r3, [r7, #84] @ 0x54 + 800630e: 6cbb ldr r3, [r7, #72] @ 0x48 + 8006310: f023 0310 bic.w r3, r3, #16 + 8006314: f8c7 30ac str.w r3, [r7, #172] @ 0xac + 8006318: 687b ldr r3, [r7, #4] + 800631a: 681b ldr r3, [r3, #0] + 800631c: 330c adds r3, #12 + 800631e: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac + 8006322: 65ba str r2, [r7, #88] @ 0x58 + 8006324: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80059d2: 6d79 ldr r1, [r7, #84] @ 0x54 - 80059d4: 6dba ldr r2, [r7, #88] @ 0x58 - 80059d6: e841 2300 strex r3, r2, [r1] - 80059da: 653b str r3, [r7, #80] @ 0x50 + 8006326: 6d79 ldr r1, [r7, #84] @ 0x54 + 8006328: 6dba ldr r2, [r7, #88] @ 0x58 + 800632a: e841 2300 strex r3, r2, [r1] + 800632e: 653b str r3, [r7, #80] @ 0x50 return(result); - 80059dc: 6d3b ldr r3, [r7, #80] @ 0x50 - 80059de: 2b00 cmp r3, #0 - 80059e0: d1e3 bne.n 80059aa + 8006330: 6d3b ldr r3, [r7, #80] @ 0x50 + 8006332: 2b00 cmp r3, #0 + 8006334: d1e3 bne.n 80062fe /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); - 80059e2: 687b ldr r3, [r7, #4] - 80059e4: 6bdb ldr r3, [r3, #60] @ 0x3c - 80059e6: 4618 mov r0, r3 - 80059e8: f7fd f9d7 bl 8002d9a + 8006336: 687b ldr r3, [r7, #4] + 8006338: 6bdb ldr r3, [r3, #60] @ 0x3c + 800633a: 4618 mov r0, r3 + 800633c: f7fd f9d7 bl 80036ee } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 80059ec: 687b ldr r3, [r7, #4] - 80059ee: 2202 movs r2, #2 - 80059f0: 635a str r2, [r3, #52] @ 0x34 + 8006340: 687b ldr r3, [r7, #4] + 8006342: 2202 movs r2, #2 + 8006344: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 80059f2: 687b ldr r3, [r7, #4] - 80059f4: 8d9a ldrh r2, [r3, #44] @ 0x2c - 80059f6: 687b ldr r3, [r7, #4] - 80059f8: 8ddb ldrh r3, [r3, #46] @ 0x2e - 80059fa: b29b uxth r3, r3 - 80059fc: 1ad3 subs r3, r2, r3 - 80059fe: b29b uxth r3, r3 - 8005a00: 4619 mov r1, r3 - 8005a02: 6878 ldr r0, [r7, #4] - 8005a04: f000 f8bf bl 8005b86 + 8006346: 687b ldr r3, [r7, #4] + 8006348: 8d9a ldrh r2, [r3, #44] @ 0x2c + 800634a: 687b ldr r3, [r7, #4] + 800634c: 8ddb ldrh r3, [r3, #46] @ 0x2e + 800634e: b29b uxth r3, r3 + 8006350: 1ad3 subs r3, r2, r3 + 8006352: b29b uxth r3, r3 + 8006354: 4619 mov r1, r3 + 8006356: 6878 ldr r0, [r7, #4] + 8006358: f000 f8bf bl 80064da #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; - 8005a08: e09c b.n 8005b44 - 8005a0a: bf00 nop - 8005a0c: 08005d13 .word 0x08005d13 + 800635c: e09c b.n 8006498 + 800635e: bf00 nop + 8006360: 08006667 .word 0x08006667 else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 8005a10: 687b ldr r3, [r7, #4] - 8005a12: 8d9a ldrh r2, [r3, #44] @ 0x2c - 8005a14: 687b ldr r3, [r7, #4] - 8005a16: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8005a18: b29b uxth r3, r3 - 8005a1a: 1ad3 subs r3, r2, r3 - 8005a1c: f8a7 30ce strh.w r3, [r7, #206] @ 0xce + 8006364: 687b ldr r3, [r7, #4] + 8006366: 8d9a ldrh r2, [r3, #44] @ 0x2c + 8006368: 687b ldr r3, [r7, #4] + 800636a: 8ddb ldrh r3, [r3, #46] @ 0x2e + 800636c: b29b uxth r3, r3 + 800636e: 1ad3 subs r3, r2, r3 + 8006370: f8a7 30ce strh.w r3, [r7, #206] @ 0xce if ((huart->RxXferCount > 0U) - 8005a20: 687b ldr r3, [r7, #4] - 8005a22: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8005a24: b29b uxth r3, r3 - 8005a26: 2b00 cmp r3, #0 - 8005a28: f000 808e beq.w 8005b48 + 8006374: 687b ldr r3, [r7, #4] + 8006376: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8006378: b29b uxth r3, r3 + 800637a: 2b00 cmp r3, #0 + 800637c: f000 808e beq.w 800649c && (nb_rx_data > 0U)) - 8005a2c: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce - 8005a30: 2b00 cmp r3, #0 - 8005a32: f000 8089 beq.w 8005b48 + 8006380: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce + 8006384: 2b00 cmp r3, #0 + 8006386: f000 8089 beq.w 800649c { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8005a36: 687b ldr r3, [r7, #4] - 8005a38: 681b ldr r3, [r3, #0] - 8005a3a: 330c adds r3, #12 - 8005a3c: 63bb str r3, [r7, #56] @ 0x38 + 800638a: 687b ldr r3, [r7, #4] + 800638c: 681b ldr r3, [r3, #0] + 800638e: 330c adds r3, #12 + 8006390: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005a3e: 6bbb ldr r3, [r7, #56] @ 0x38 - 8005a40: e853 3f00 ldrex r3, [r3] - 8005a44: 637b str r3, [r7, #52] @ 0x34 + 8006392: 6bbb ldr r3, [r7, #56] @ 0x38 + 8006394: e853 3f00 ldrex r3, [r3] + 8006398: 637b str r3, [r7, #52] @ 0x34 return(result); - 8005a46: 6b7b ldr r3, [r7, #52] @ 0x34 - 8005a48: f423 7390 bic.w r3, r3, #288 @ 0x120 - 8005a4c: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 - 8005a50: 687b ldr r3, [r7, #4] - 8005a52: 681b ldr r3, [r3, #0] - 8005a54: 330c adds r3, #12 - 8005a56: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 - 8005a5a: 647a str r2, [r7, #68] @ 0x44 - 8005a5c: 643b str r3, [r7, #64] @ 0x40 + 800639a: 6b7b ldr r3, [r7, #52] @ 0x34 + 800639c: f423 7390 bic.w r3, r3, #288 @ 0x120 + 80063a0: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 + 80063a4: 687b ldr r3, [r7, #4] + 80063a6: 681b ldr r3, [r3, #0] + 80063a8: 330c adds r3, #12 + 80063aa: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 + 80063ae: 647a str r2, [r7, #68] @ 0x44 + 80063b0: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005a5e: 6c39 ldr r1, [r7, #64] @ 0x40 - 8005a60: 6c7a ldr r2, [r7, #68] @ 0x44 - 8005a62: e841 2300 strex r3, r2, [r1] - 8005a66: 63fb str r3, [r7, #60] @ 0x3c + 80063b2: 6c39 ldr r1, [r7, #64] @ 0x40 + 80063b4: 6c7a ldr r2, [r7, #68] @ 0x44 + 80063b6: e841 2300 strex r3, r2, [r1] + 80063ba: 63fb str r3, [r7, #60] @ 0x3c return(result); - 8005a68: 6bfb ldr r3, [r7, #60] @ 0x3c - 8005a6a: 2b00 cmp r3, #0 - 8005a6c: d1e3 bne.n 8005a36 + 80063bc: 6bfb ldr r3, [r7, #60] @ 0x3c + 80063be: 2b00 cmp r3, #0 + 80063c0: d1e3 bne.n 800638a /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005a6e: 687b ldr r3, [r7, #4] - 8005a70: 681b ldr r3, [r3, #0] - 8005a72: 3314 adds r3, #20 - 8005a74: 627b str r3, [r7, #36] @ 0x24 + 80063c2: 687b ldr r3, [r7, #4] + 80063c4: 681b ldr r3, [r3, #0] + 80063c6: 3314 adds r3, #20 + 80063c8: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005a76: 6a7b ldr r3, [r7, #36] @ 0x24 - 8005a78: e853 3f00 ldrex r3, [r3] - 8005a7c: 623b str r3, [r7, #32] + 80063ca: 6a7b ldr r3, [r7, #36] @ 0x24 + 80063cc: e853 3f00 ldrex r3, [r3] + 80063d0: 623b str r3, [r7, #32] return(result); - 8005a7e: 6a3b ldr r3, [r7, #32] - 8005a80: f023 0301 bic.w r3, r3, #1 - 8005a84: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 - 8005a88: 687b ldr r3, [r7, #4] - 8005a8a: 681b ldr r3, [r3, #0] - 8005a8c: 3314 adds r3, #20 - 8005a8e: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 - 8005a92: 633a str r2, [r7, #48] @ 0x30 - 8005a94: 62fb str r3, [r7, #44] @ 0x2c + 80063d2: 6a3b ldr r3, [r7, #32] + 80063d4: f023 0301 bic.w r3, r3, #1 + 80063d8: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 + 80063dc: 687b ldr r3, [r7, #4] + 80063de: 681b ldr r3, [r3, #0] + 80063e0: 3314 adds r3, #20 + 80063e2: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 + 80063e6: 633a str r2, [r7, #48] @ 0x30 + 80063e8: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005a96: 6af9 ldr r1, [r7, #44] @ 0x2c - 8005a98: 6b3a ldr r2, [r7, #48] @ 0x30 - 8005a9a: e841 2300 strex r3, r2, [r1] - 8005a9e: 62bb str r3, [r7, #40] @ 0x28 + 80063ea: 6af9 ldr r1, [r7, #44] @ 0x2c + 80063ec: 6b3a ldr r2, [r7, #48] @ 0x30 + 80063ee: e841 2300 strex r3, r2, [r1] + 80063f2: 62bb str r3, [r7, #40] @ 0x28 return(result); - 8005aa0: 6abb ldr r3, [r7, #40] @ 0x28 - 8005aa2: 2b00 cmp r3, #0 - 8005aa4: d1e3 bne.n 8005a6e + 80063f4: 6abb ldr r3, [r7, #40] @ 0x28 + 80063f6: 2b00 cmp r3, #0 + 80063f8: d1e3 bne.n 80063c2 /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8005aa6: 687b ldr r3, [r7, #4] - 8005aa8: 2220 movs r2, #32 - 8005aaa: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 80063fa: 687b ldr r3, [r7, #4] + 80063fc: 2220 movs r2, #32 + 80063fe: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005aae: 687b ldr r3, [r7, #4] - 8005ab0: 2200 movs r2, #0 - 8005ab2: 631a str r2, [r3, #48] @ 0x30 + 8006402: 687b ldr r3, [r7, #4] + 8006404: 2200 movs r2, #0 + 8006406: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005ab4: 687b ldr r3, [r7, #4] - 8005ab6: 681b ldr r3, [r3, #0] - 8005ab8: 330c adds r3, #12 - 8005aba: 613b str r3, [r7, #16] + 8006408: 687b ldr r3, [r7, #4] + 800640a: 681b ldr r3, [r3, #0] + 800640c: 330c adds r3, #12 + 800640e: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005abc: 693b ldr r3, [r7, #16] - 8005abe: e853 3f00 ldrex r3, [r3] - 8005ac2: 60fb str r3, [r7, #12] + 8006410: 693b ldr r3, [r7, #16] + 8006412: e853 3f00 ldrex r3, [r3] + 8006416: 60fb str r3, [r7, #12] return(result); - 8005ac4: 68fb ldr r3, [r7, #12] - 8005ac6: f023 0310 bic.w r3, r3, #16 - 8005aca: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 - 8005ace: 687b ldr r3, [r7, #4] - 8005ad0: 681b ldr r3, [r3, #0] - 8005ad2: 330c adds r3, #12 - 8005ad4: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 - 8005ad8: 61fa str r2, [r7, #28] - 8005ada: 61bb str r3, [r7, #24] + 8006418: 68fb ldr r3, [r7, #12] + 800641a: f023 0310 bic.w r3, r3, #16 + 800641e: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 + 8006422: 687b ldr r3, [r7, #4] + 8006424: 681b ldr r3, [r3, #0] + 8006426: 330c adds r3, #12 + 8006428: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 + 800642c: 61fa str r2, [r7, #28] + 800642e: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005adc: 69b9 ldr r1, [r7, #24] - 8005ade: 69fa ldr r2, [r7, #28] - 8005ae0: e841 2300 strex r3, r2, [r1] - 8005ae4: 617b str r3, [r7, #20] + 8006430: 69b9 ldr r1, [r7, #24] + 8006432: 69fa ldr r2, [r7, #28] + 8006434: e841 2300 strex r3, r2, [r1] + 8006438: 617b str r3, [r7, #20] return(result); - 8005ae6: 697b ldr r3, [r7, #20] - 8005ae8: 2b00 cmp r3, #0 - 8005aea: d1e3 bne.n 8005ab4 + 800643a: 697b ldr r3, [r7, #20] + 800643c: 2b00 cmp r3, #0 + 800643e: d1e3 bne.n 8006408 /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 8005aec: 687b ldr r3, [r7, #4] - 8005aee: 2202 movs r2, #2 - 8005af0: 635a str r2, [r3, #52] @ 0x34 + 8006440: 687b ldr r3, [r7, #4] + 8006442: 2202 movs r2, #2 + 8006444: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); - 8005af2: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce - 8005af6: 4619 mov r1, r3 - 8005af8: 6878 ldr r0, [r7, #4] - 8005afa: f000 f844 bl 8005b86 + 8006446: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce + 800644a: 4619 mov r1, r3 + 800644c: 6878 ldr r0, [r7, #4] + 800644e: f000 f844 bl 80064da #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; - 8005afe: e023 b.n 8005b48 + 8006452: e023 b.n 800649c } } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) - 8005b00: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005b04: f003 0380 and.w r3, r3, #128 @ 0x80 - 8005b08: 2b00 cmp r3, #0 - 8005b0a: d009 beq.n 8005b20 - 8005b0c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005b10: f003 0380 and.w r3, r3, #128 @ 0x80 - 8005b14: 2b00 cmp r3, #0 - 8005b16: d003 beq.n 8005b20 + 8006454: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8006458: f003 0380 and.w r3, r3, #128 @ 0x80 + 800645c: 2b00 cmp r3, #0 + 800645e: d009 beq.n 8006474 + 8006460: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8006464: f003 0380 and.w r3, r3, #128 @ 0x80 + 8006468: 2b00 cmp r3, #0 + 800646a: d003 beq.n 8006474 { UART_Transmit_IT(huart); - 8005b18: 6878 ldr r0, [r7, #4] - 8005b1a: f000 f90e bl 8005d3a + 800646c: 6878 ldr r0, [r7, #4] + 800646e: f000 f90e bl 800668e return; - 8005b1e: e014 b.n 8005b4a + 8006472: e014 b.n 800649e } /* UART in mode Transmitter end --------------------------------------------*/ if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) - 8005b20: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005b24: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005b28: 2b00 cmp r3, #0 - 8005b2a: d00e beq.n 8005b4a - 8005b2c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005b30: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005b34: 2b00 cmp r3, #0 - 8005b36: d008 beq.n 8005b4a + 8006474: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8006478: f003 0340 and.w r3, r3, #64 @ 0x40 + 800647c: 2b00 cmp r3, #0 + 800647e: d00e beq.n 800649e + 8006480: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8006484: f003 0340 and.w r3, r3, #64 @ 0x40 + 8006488: 2b00 cmp r3, #0 + 800648a: d008 beq.n 800649e { UART_EndTransmit_IT(huart); - 8005b38: 6878 ldr r0, [r7, #4] - 8005b3a: f000 f94d bl 8005dd8 + 800648c: 6878 ldr r0, [r7, #4] + 800648e: f000 f94d bl 800672c return; - 8005b3e: e004 b.n 8005b4a + 8006492: e004 b.n 800649e return; - 8005b40: bf00 nop - 8005b42: e002 b.n 8005b4a + 8006494: bf00 nop + 8006496: e002 b.n 800649e return; - 8005b44: bf00 nop - 8005b46: e000 b.n 8005b4a + 8006498: bf00 nop + 800649a: e000 b.n 800649e return; - 8005b48: bf00 nop + 800649c: bf00 nop } } - 8005b4a: 37e8 adds r7, #232 @ 0xe8 - 8005b4c: 46bd mov sp, r7 - 8005b4e: bd80 pop {r7, pc} + 800649e: 37e8 adds r7, #232 @ 0xe8 + 80064a0: 46bd mov sp, r7 + 80064a2: bd80 pop {r7, pc} -08005b50 : +080064a4 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { - 8005b50: b480 push {r7} - 8005b52: b083 sub sp, #12 - 8005b54: af00 add r7, sp, #0 - 8005b56: 6078 str r0, [r7, #4] + 80064a4: b480 push {r7} + 80064a6: b083 sub sp, #12 + 80064a8: af00 add r7, sp, #0 + 80064aa: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_TxCpltCallback could be implemented in the user file */ } - 8005b58: bf00 nop - 8005b5a: 370c adds r7, #12 - 8005b5c: 46bd mov sp, r7 - 8005b5e: bc80 pop {r7} - 8005b60: 4770 bx lr + 80064ac: bf00 nop + 80064ae: 370c adds r7, #12 + 80064b0: 46bd mov sp, r7 + 80064b2: bc80 pop {r7} + 80064b4: 4770 bx lr -08005b62 : +080064b6 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { - 8005b62: b480 push {r7} - 8005b64: b083 sub sp, #12 - 8005b66: af00 add r7, sp, #0 - 8005b68: 6078 str r0, [r7, #4] + 80064b6: b480 push {r7} + 80064b8: b083 sub sp, #12 + 80064ba: af00 add r7, sp, #0 + 80064bc: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxCpltCallback could be implemented in the user file */ } - 8005b6a: bf00 nop - 8005b6c: 370c adds r7, #12 - 8005b6e: 46bd mov sp, r7 - 8005b70: bc80 pop {r7} - 8005b72: 4770 bx lr + 80064be: bf00 nop + 80064c0: 370c adds r7, #12 + 80064c2: 46bd mov sp, r7 + 80064c4: bc80 pop {r7} + 80064c6: 4770 bx lr -08005b74 : +080064c8 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { - 8005b74: b480 push {r7} - 8005b76: b083 sub sp, #12 - 8005b78: af00 add r7, sp, #0 - 8005b7a: 6078 str r0, [r7, #4] + 80064c8: b480 push {r7} + 80064ca: b083 sub sp, #12 + 80064cc: af00 add r7, sp, #0 + 80064ce: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback could be implemented in the user file */ } - 8005b7c: bf00 nop - 8005b7e: 370c adds r7, #12 - 8005b80: 46bd mov sp, r7 - 8005b82: bc80 pop {r7} - 8005b84: 4770 bx lr + 80064d0: bf00 nop + 80064d2: 370c adds r7, #12 + 80064d4: 46bd mov sp, r7 + 80064d6: bc80 pop {r7} + 80064d8: 4770 bx lr -08005b86 : +080064da : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { - 8005b86: b480 push {r7} - 8005b88: b083 sub sp, #12 - 8005b8a: af00 add r7, sp, #0 - 8005b8c: 6078 str r0, [r7, #4] - 8005b8e: 460b mov r3, r1 - 8005b90: 807b strh r3, [r7, #2] + 80064da: b480 push {r7} + 80064dc: b083 sub sp, #12 + 80064de: af00 add r7, sp, #0 + 80064e0: 6078 str r0, [r7, #4] + 80064e2: 460b mov r3, r1 + 80064e4: 807b strh r3, [r7, #2] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } - 8005b92: bf00 nop - 8005b94: 370c adds r7, #12 - 8005b96: 46bd mov sp, r7 - 8005b98: bc80 pop {r7} - 8005b9a: 4770 bx lr + 80064e6: bf00 nop + 80064e8: 370c adds r7, #12 + 80064ea: 46bd mov sp, r7 + 80064ec: bc80 pop {r7} + 80064ee: 4770 bx lr -08005b9c : +080064f0 : * @param Timeout Timeout duration * @retval HAL status */ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 8005b9c: b580 push {r7, lr} - 8005b9e: b086 sub sp, #24 - 8005ba0: af00 add r7, sp, #0 - 8005ba2: 60f8 str r0, [r7, #12] - 8005ba4: 60b9 str r1, [r7, #8] - 8005ba6: 603b str r3, [r7, #0] - 8005ba8: 4613 mov r3, r2 - 8005baa: 71fb strb r3, [r7, #7] + 80064f0: b580 push {r7, lr} + 80064f2: b086 sub sp, #24 + 80064f4: af00 add r7, sp, #0 + 80064f6: 60f8 str r0, [r7, #12] + 80064f8: 60b9 str r1, [r7, #8] + 80064fa: 603b str r3, [r7, #0] + 80064fc: 4613 mov r3, r2 + 80064fe: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8005bac: e03b b.n 8005c26 + 8006500: e03b b.n 800657a { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8005bae: 6a3b ldr r3, [r7, #32] - 8005bb0: f1b3 3fff cmp.w r3, #4294967295 - 8005bb4: d037 beq.n 8005c26 + 8006502: 6a3b ldr r3, [r7, #32] + 8006504: f1b3 3fff cmp.w r3, #4294967295 + 8006508: d037 beq.n 800657a { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8005bb6: f7fc fdc7 bl 8002748 - 8005bba: 4602 mov r2, r0 - 8005bbc: 683b ldr r3, [r7, #0] - 8005bbe: 1ad3 subs r3, r2, r3 - 8005bc0: 6a3a ldr r2, [r7, #32] - 8005bc2: 429a cmp r2, r3 - 8005bc4: d302 bcc.n 8005bcc - 8005bc6: 6a3b ldr r3, [r7, #32] - 8005bc8: 2b00 cmp r3, #0 - 8005bca: d101 bne.n 8005bd0 + 800650a: f7fc fda3 bl 8003054 + 800650e: 4602 mov r2, r0 + 8006510: 683b ldr r3, [r7, #0] + 8006512: 1ad3 subs r3, r2, r3 + 8006514: 6a3a ldr r2, [r7, #32] + 8006516: 429a cmp r2, r3 + 8006518: d302 bcc.n 8006520 + 800651a: 6a3b ldr r3, [r7, #32] + 800651c: 2b00 cmp r3, #0 + 800651e: d101 bne.n 8006524 { return HAL_TIMEOUT; - 8005bcc: 2303 movs r3, #3 - 8005bce: e03a b.n 8005c46 + 8006520: 2303 movs r3, #3 + 8006522: e03a b.n 800659a } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) - 8005bd0: 68fb ldr r3, [r7, #12] - 8005bd2: 681b ldr r3, [r3, #0] - 8005bd4: 68db ldr r3, [r3, #12] - 8005bd6: f003 0304 and.w r3, r3, #4 - 8005bda: 2b00 cmp r3, #0 - 8005bdc: d023 beq.n 8005c26 - 8005bde: 68bb ldr r3, [r7, #8] - 8005be0: 2b80 cmp r3, #128 @ 0x80 - 8005be2: d020 beq.n 8005c26 - 8005be4: 68bb ldr r3, [r7, #8] - 8005be6: 2b40 cmp r3, #64 @ 0x40 - 8005be8: d01d beq.n 8005c26 + 8006524: 68fb ldr r3, [r7, #12] + 8006526: 681b ldr r3, [r3, #0] + 8006528: 68db ldr r3, [r3, #12] + 800652a: f003 0304 and.w r3, r3, #4 + 800652e: 2b00 cmp r3, #0 + 8006530: d023 beq.n 800657a + 8006532: 68bb ldr r3, [r7, #8] + 8006534: 2b80 cmp r3, #128 @ 0x80 + 8006536: d020 beq.n 800657a + 8006538: 68bb ldr r3, [r7, #8] + 800653a: 2b40 cmp r3, #64 @ 0x40 + 800653c: d01d beq.n 800657a { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) - 8005bea: 68fb ldr r3, [r7, #12] - 8005bec: 681b ldr r3, [r3, #0] - 8005bee: 681b ldr r3, [r3, #0] - 8005bf0: f003 0308 and.w r3, r3, #8 - 8005bf4: 2b08 cmp r3, #8 - 8005bf6: d116 bne.n 8005c26 + 800653e: 68fb ldr r3, [r7, #12] + 8006540: 681b ldr r3, [r3, #0] + 8006542: 681b ldr r3, [r3, #0] + 8006544: f003 0308 and.w r3, r3, #8 + 8006548: 2b08 cmp r3, #8 + 800654a: d116 bne.n 800657a { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_OREFLAG(huart); - 8005bf8: 2300 movs r3, #0 - 8005bfa: 617b str r3, [r7, #20] - 8005bfc: 68fb ldr r3, [r7, #12] - 8005bfe: 681b ldr r3, [r3, #0] - 8005c00: 681b ldr r3, [r3, #0] - 8005c02: 617b str r3, [r7, #20] - 8005c04: 68fb ldr r3, [r7, #12] - 8005c06: 681b ldr r3, [r3, #0] - 8005c08: 685b ldr r3, [r3, #4] - 8005c0a: 617b str r3, [r7, #20] - 8005c0c: 697b ldr r3, [r7, #20] + 800654c: 2300 movs r3, #0 + 800654e: 617b str r3, [r7, #20] + 8006550: 68fb ldr r3, [r7, #12] + 8006552: 681b ldr r3, [r3, #0] + 8006554: 681b ldr r3, [r3, #0] + 8006556: 617b str r3, [r7, #20] + 8006558: 68fb ldr r3, [r7, #12] + 800655a: 681b ldr r3, [r3, #0] + 800655c: 685b ldr r3, [r3, #4] + 800655e: 617b str r3, [r7, #20] + 8006560: 697b ldr r3, [r7, #20] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); - 8005c0e: 68f8 ldr r0, [r7, #12] - 8005c10: f000 f81d bl 8005c4e + 8006562: 68f8 ldr r0, [r7, #12] + 8006564: f000 f81d bl 80065a2 huart->ErrorCode = HAL_UART_ERROR_ORE; - 8005c14: 68fb ldr r3, [r7, #12] - 8005c16: 2208 movs r2, #8 - 8005c18: 645a str r2, [r3, #68] @ 0x44 + 8006568: 68fb ldr r3, [r7, #12] + 800656a: 2208 movs r2, #8 + 800656c: 645a str r2, [r3, #68] @ 0x44 /* Process Unlocked */ __HAL_UNLOCK(huart); - 8005c1a: 68fb ldr r3, [r7, #12] - 8005c1c: 2200 movs r2, #0 - 8005c1e: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 800656e: 68fb ldr r3, [r7, #12] + 8006570: 2200 movs r2, #0 + 8006572: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; - 8005c22: 2301 movs r3, #1 - 8005c24: e00f b.n 8005c46 + 8006576: 2301 movs r3, #1 + 8006578: e00f b.n 800659a while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8005c26: 68fb ldr r3, [r7, #12] - 8005c28: 681b ldr r3, [r3, #0] - 8005c2a: 681a ldr r2, [r3, #0] - 8005c2c: 68bb ldr r3, [r7, #8] - 8005c2e: 4013 ands r3, r2 - 8005c30: 68ba ldr r2, [r7, #8] - 8005c32: 429a cmp r2, r3 - 8005c34: bf0c ite eq - 8005c36: 2301 moveq r3, #1 - 8005c38: 2300 movne r3, #0 - 8005c3a: b2db uxtb r3, r3 - 8005c3c: 461a mov r2, r3 - 8005c3e: 79fb ldrb r3, [r7, #7] - 8005c40: 429a cmp r2, r3 - 8005c42: d0b4 beq.n 8005bae + 800657a: 68fb ldr r3, [r7, #12] + 800657c: 681b ldr r3, [r3, #0] + 800657e: 681a ldr r2, [r3, #0] + 8006580: 68bb ldr r3, [r7, #8] + 8006582: 4013 ands r3, r2 + 8006584: 68ba ldr r2, [r7, #8] + 8006586: 429a cmp r2, r3 + 8006588: bf0c ite eq + 800658a: 2301 moveq r3, #1 + 800658c: 2300 movne r3, #0 + 800658e: b2db uxtb r3, r3 + 8006590: 461a mov r2, r3 + 8006592: 79fb ldrb r3, [r7, #7] + 8006594: 429a cmp r2, r3 + 8006596: d0b4 beq.n 8006502 } } } } return HAL_OK; - 8005c44: 2300 movs r3, #0 + 8006598: 2300 movs r3, #0 } - 8005c46: 4618 mov r0, r3 - 8005c48: 3718 adds r7, #24 - 8005c4a: 46bd mov sp, r7 - 8005c4c: bd80 pop {r7, pc} + 800659a: 4618 mov r0, r3 + 800659c: 3718 adds r7, #24 + 800659e: 46bd mov sp, r7 + 80065a0: bd80 pop {r7, pc} -08005c4e : +080065a2 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 8005c4e: b480 push {r7} - 8005c50: b095 sub sp, #84 @ 0x54 - 8005c52: af00 add r7, sp, #0 - 8005c54: 6078 str r0, [r7, #4] + 80065a2: b480 push {r7} + 80065a4: b095 sub sp, #84 @ 0x54 + 80065a6: af00 add r7, sp, #0 + 80065a8: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8005c56: 687b ldr r3, [r7, #4] - 8005c58: 681b ldr r3, [r3, #0] - 8005c5a: 330c adds r3, #12 - 8005c5c: 637b str r3, [r7, #52] @ 0x34 + 80065aa: 687b ldr r3, [r7, #4] + 80065ac: 681b ldr r3, [r3, #0] + 80065ae: 330c adds r3, #12 + 80065b0: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005c5e: 6b7b ldr r3, [r7, #52] @ 0x34 - 8005c60: e853 3f00 ldrex r3, [r3] - 8005c64: 633b str r3, [r7, #48] @ 0x30 + 80065b2: 6b7b ldr r3, [r7, #52] @ 0x34 + 80065b4: e853 3f00 ldrex r3, [r3] + 80065b8: 633b str r3, [r7, #48] @ 0x30 return(result); - 8005c66: 6b3b ldr r3, [r7, #48] @ 0x30 - 8005c68: f423 7390 bic.w r3, r3, #288 @ 0x120 - 8005c6c: 64fb str r3, [r7, #76] @ 0x4c - 8005c6e: 687b ldr r3, [r7, #4] - 8005c70: 681b ldr r3, [r3, #0] - 8005c72: 330c adds r3, #12 - 8005c74: 6cfa ldr r2, [r7, #76] @ 0x4c - 8005c76: 643a str r2, [r7, #64] @ 0x40 - 8005c78: 63fb str r3, [r7, #60] @ 0x3c + 80065ba: 6b3b ldr r3, [r7, #48] @ 0x30 + 80065bc: f423 7390 bic.w r3, r3, #288 @ 0x120 + 80065c0: 64fb str r3, [r7, #76] @ 0x4c + 80065c2: 687b ldr r3, [r7, #4] + 80065c4: 681b ldr r3, [r3, #0] + 80065c6: 330c adds r3, #12 + 80065c8: 6cfa ldr r2, [r7, #76] @ 0x4c + 80065ca: 643a str r2, [r7, #64] @ 0x40 + 80065cc: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005c7a: 6bf9 ldr r1, [r7, #60] @ 0x3c - 8005c7c: 6c3a ldr r2, [r7, #64] @ 0x40 - 8005c7e: e841 2300 strex r3, r2, [r1] - 8005c82: 63bb str r3, [r7, #56] @ 0x38 + 80065ce: 6bf9 ldr r1, [r7, #60] @ 0x3c + 80065d0: 6c3a ldr r2, [r7, #64] @ 0x40 + 80065d2: e841 2300 strex r3, r2, [r1] + 80065d6: 63bb str r3, [r7, #56] @ 0x38 return(result); - 8005c84: 6bbb ldr r3, [r7, #56] @ 0x38 - 8005c86: 2b00 cmp r3, #0 - 8005c88: d1e5 bne.n 8005c56 + 80065d8: 6bbb ldr r3, [r7, #56] @ 0x38 + 80065da: 2b00 cmp r3, #0 + 80065dc: d1e5 bne.n 80065aa ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005c8a: 687b ldr r3, [r7, #4] - 8005c8c: 681b ldr r3, [r3, #0] - 8005c8e: 3314 adds r3, #20 - 8005c90: 623b str r3, [r7, #32] + 80065de: 687b ldr r3, [r7, #4] + 80065e0: 681b ldr r3, [r3, #0] + 80065e2: 3314 adds r3, #20 + 80065e4: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005c92: 6a3b ldr r3, [r7, #32] - 8005c94: e853 3f00 ldrex r3, [r3] - 8005c98: 61fb str r3, [r7, #28] + 80065e6: 6a3b ldr r3, [r7, #32] + 80065e8: e853 3f00 ldrex r3, [r3] + 80065ec: 61fb str r3, [r7, #28] return(result); - 8005c9a: 69fb ldr r3, [r7, #28] - 8005c9c: f023 0301 bic.w r3, r3, #1 - 8005ca0: 64bb str r3, [r7, #72] @ 0x48 - 8005ca2: 687b ldr r3, [r7, #4] - 8005ca4: 681b ldr r3, [r3, #0] - 8005ca6: 3314 adds r3, #20 - 8005ca8: 6cba ldr r2, [r7, #72] @ 0x48 - 8005caa: 62fa str r2, [r7, #44] @ 0x2c - 8005cac: 62bb str r3, [r7, #40] @ 0x28 + 80065ee: 69fb ldr r3, [r7, #28] + 80065f0: f023 0301 bic.w r3, r3, #1 + 80065f4: 64bb str r3, [r7, #72] @ 0x48 + 80065f6: 687b ldr r3, [r7, #4] + 80065f8: 681b ldr r3, [r3, #0] + 80065fa: 3314 adds r3, #20 + 80065fc: 6cba ldr r2, [r7, #72] @ 0x48 + 80065fe: 62fa str r2, [r7, #44] @ 0x2c + 8006600: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005cae: 6ab9 ldr r1, [r7, #40] @ 0x28 - 8005cb0: 6afa ldr r2, [r7, #44] @ 0x2c - 8005cb2: e841 2300 strex r3, r2, [r1] - 8005cb6: 627b str r3, [r7, #36] @ 0x24 + 8006602: 6ab9 ldr r1, [r7, #40] @ 0x28 + 8006604: 6afa ldr r2, [r7, #44] @ 0x2c + 8006606: e841 2300 strex r3, r2, [r1] + 800660a: 627b str r3, [r7, #36] @ 0x24 return(result); - 8005cb8: 6a7b ldr r3, [r7, #36] @ 0x24 - 8005cba: 2b00 cmp r3, #0 - 8005cbc: d1e5 bne.n 8005c8a + 800660c: 6a7b ldr r3, [r7, #36] @ 0x24 + 800660e: 2b00 cmp r3, #0 + 8006610: d1e5 bne.n 80065de /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8005cbe: 687b ldr r3, [r7, #4] - 8005cc0: 6b1b ldr r3, [r3, #48] @ 0x30 - 8005cc2: 2b01 cmp r3, #1 - 8005cc4: d119 bne.n 8005cfa + 8006612: 687b ldr r3, [r7, #4] + 8006614: 6b1b ldr r3, [r3, #48] @ 0x30 + 8006616: 2b01 cmp r3, #1 + 8006618: d119 bne.n 800664e { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005cc6: 687b ldr r3, [r7, #4] - 8005cc8: 681b ldr r3, [r3, #0] - 8005cca: 330c adds r3, #12 - 8005ccc: 60fb str r3, [r7, #12] + 800661a: 687b ldr r3, [r7, #4] + 800661c: 681b ldr r3, [r3, #0] + 800661e: 330c adds r3, #12 + 8006620: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005cce: 68fb ldr r3, [r7, #12] - 8005cd0: e853 3f00 ldrex r3, [r3] - 8005cd4: 60bb str r3, [r7, #8] + 8006622: 68fb ldr r3, [r7, #12] + 8006624: e853 3f00 ldrex r3, [r3] + 8006628: 60bb str r3, [r7, #8] return(result); - 8005cd6: 68bb ldr r3, [r7, #8] - 8005cd8: f023 0310 bic.w r3, r3, #16 - 8005cdc: 647b str r3, [r7, #68] @ 0x44 - 8005cde: 687b ldr r3, [r7, #4] - 8005ce0: 681b ldr r3, [r3, #0] - 8005ce2: 330c adds r3, #12 - 8005ce4: 6c7a ldr r2, [r7, #68] @ 0x44 - 8005ce6: 61ba str r2, [r7, #24] - 8005ce8: 617b str r3, [r7, #20] + 800662a: 68bb ldr r3, [r7, #8] + 800662c: f023 0310 bic.w r3, r3, #16 + 8006630: 647b str r3, [r7, #68] @ 0x44 + 8006632: 687b ldr r3, [r7, #4] + 8006634: 681b ldr r3, [r3, #0] + 8006636: 330c adds r3, #12 + 8006638: 6c7a ldr r2, [r7, #68] @ 0x44 + 800663a: 61ba str r2, [r7, #24] + 800663c: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005cea: 6979 ldr r1, [r7, #20] - 8005cec: 69ba ldr r2, [r7, #24] - 8005cee: e841 2300 strex r3, r2, [r1] - 8005cf2: 613b str r3, [r7, #16] + 800663e: 6979 ldr r1, [r7, #20] + 8006640: 69ba ldr r2, [r7, #24] + 8006642: e841 2300 strex r3, r2, [r1] + 8006646: 613b str r3, [r7, #16] return(result); - 8005cf4: 693b ldr r3, [r7, #16] - 8005cf6: 2b00 cmp r3, #0 - 8005cf8: d1e5 bne.n 8005cc6 + 8006648: 693b ldr r3, [r7, #16] + 800664a: 2b00 cmp r3, #0 + 800664c: d1e5 bne.n 800661a } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8005cfa: 687b ldr r3, [r7, #4] - 8005cfc: 2220 movs r2, #32 - 8005cfe: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 800664e: 687b ldr r3, [r7, #4] + 8006650: 2220 movs r2, #32 + 8006652: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005d02: 687b ldr r3, [r7, #4] - 8005d04: 2200 movs r2, #0 - 8005d06: 631a str r2, [r3, #48] @ 0x30 + 8006656: 687b ldr r3, [r7, #4] + 8006658: 2200 movs r2, #0 + 800665a: 631a str r2, [r3, #48] @ 0x30 } - 8005d08: bf00 nop - 8005d0a: 3754 adds r7, #84 @ 0x54 - 8005d0c: 46bd mov sp, r7 - 8005d0e: bc80 pop {r7} - 8005d10: 4770 bx lr + 800665c: bf00 nop + 800665e: 3754 adds r7, #84 @ 0x54 + 8006660: 46bd mov sp, r7 + 8006662: bc80 pop {r7} + 8006664: 4770 bx lr -08005d12 : +08006666 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - 8005d12: b580 push {r7, lr} - 8005d14: b084 sub sp, #16 - 8005d16: af00 add r7, sp, #0 - 8005d18: 6078 str r0, [r7, #4] + 8006666: b580 push {r7, lr} + 8006668: b084 sub sp, #16 + 800666a: af00 add r7, sp, #0 + 800666c: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 8005d1a: 687b ldr r3, [r7, #4] - 8005d1c: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005d1e: 60fb str r3, [r7, #12] + 800666e: 687b ldr r3, [r7, #4] + 8006670: 6a5b ldr r3, [r3, #36] @ 0x24 + 8006672: 60fb str r3, [r7, #12] huart->RxXferCount = 0x00U; - 8005d20: 68fb ldr r3, [r7, #12] - 8005d22: 2200 movs r2, #0 - 8005d24: 85da strh r2, [r3, #46] @ 0x2e + 8006674: 68fb ldr r3, [r7, #12] + 8006676: 2200 movs r2, #0 + 8006678: 85da strh r2, [r3, #46] @ 0x2e huart->TxXferCount = 0x00U; - 8005d26: 68fb ldr r3, [r7, #12] - 8005d28: 2200 movs r2, #0 - 8005d2a: 84da strh r2, [r3, #38] @ 0x26 + 800667a: 68fb ldr r3, [r7, #12] + 800667c: 2200 movs r2, #0 + 800667e: 84da strh r2, [r3, #38] @ 0x26 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005d2c: 68f8 ldr r0, [r7, #12] - 8005d2e: f7ff ff21 bl 8005b74 + 8006680: 68f8 ldr r0, [r7, #12] + 8006682: f7ff ff21 bl 80064c8 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8005d32: bf00 nop - 8005d34: 3710 adds r7, #16 - 8005d36: 46bd mov sp, r7 - 8005d38: bd80 pop {r7, pc} + 8006686: bf00 nop + 8006688: 3710 adds r7, #16 + 800668a: 46bd mov sp, r7 + 800668c: bd80 pop {r7, pc} -08005d3a : +0800668e : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) { - 8005d3a: b480 push {r7} - 8005d3c: b085 sub sp, #20 - 8005d3e: af00 add r7, sp, #0 - 8005d40: 6078 str r0, [r7, #4] + 800668e: b480 push {r7} + 8006690: b085 sub sp, #20 + 8006692: af00 add r7, sp, #0 + 8006694: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) - 8005d42: 687b ldr r3, [r7, #4] - 8005d44: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 8005d48: b2db uxtb r3, r3 - 8005d4a: 2b21 cmp r3, #33 @ 0x21 - 8005d4c: d13e bne.n 8005dcc + 8006696: 687b ldr r3, [r7, #4] + 8006698: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 800669c: b2db uxtb r3, r3 + 800669e: 2b21 cmp r3, #33 @ 0x21 + 80066a0: d13e bne.n 8006720 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005d4e: 687b ldr r3, [r7, #4] - 8005d50: 689b ldr r3, [r3, #8] - 8005d52: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8005d56: d114 bne.n 8005d82 - 8005d58: 687b ldr r3, [r7, #4] - 8005d5a: 691b ldr r3, [r3, #16] - 8005d5c: 2b00 cmp r3, #0 - 8005d5e: d110 bne.n 8005d82 + 80066a2: 687b ldr r3, [r7, #4] + 80066a4: 689b ldr r3, [r3, #8] + 80066a6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 80066aa: d114 bne.n 80066d6 + 80066ac: 687b ldr r3, [r7, #4] + 80066ae: 691b ldr r3, [r3, #16] + 80066b0: 2b00 cmp r3, #0 + 80066b2: d110 bne.n 80066d6 { tmp = (const uint16_t *) huart->pTxBuffPtr; - 8005d60: 687b ldr r3, [r7, #4] - 8005d62: 6a1b ldr r3, [r3, #32] - 8005d64: 60fb str r3, [r7, #12] + 80066b4: 687b ldr r3, [r7, #4] + 80066b6: 6a1b ldr r3, [r3, #32] + 80066b8: 60fb str r3, [r7, #12] huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); - 8005d66: 68fb ldr r3, [r7, #12] - 8005d68: 881b ldrh r3, [r3, #0] - 8005d6a: 461a mov r2, r3 - 8005d6c: 687b ldr r3, [r7, #4] - 8005d6e: 681b ldr r3, [r3, #0] - 8005d70: f3c2 0208 ubfx r2, r2, #0, #9 - 8005d74: 605a str r2, [r3, #4] + 80066ba: 68fb ldr r3, [r7, #12] + 80066bc: 881b ldrh r3, [r3, #0] + 80066be: 461a mov r2, r3 + 80066c0: 687b ldr r3, [r7, #4] + 80066c2: 681b ldr r3, [r3, #0] + 80066c4: f3c2 0208 ubfx r2, r2, #0, #9 + 80066c8: 605a str r2, [r3, #4] huart->pTxBuffPtr += 2U; - 8005d76: 687b ldr r3, [r7, #4] - 8005d78: 6a1b ldr r3, [r3, #32] - 8005d7a: 1c9a adds r2, r3, #2 - 8005d7c: 687b ldr r3, [r7, #4] - 8005d7e: 621a str r2, [r3, #32] - 8005d80: e008 b.n 8005d94 + 80066ca: 687b ldr r3, [r7, #4] + 80066cc: 6a1b ldr r3, [r3, #32] + 80066ce: 1c9a adds r2, r3, #2 + 80066d0: 687b ldr r3, [r7, #4] + 80066d2: 621a str r2, [r3, #32] + 80066d4: e008 b.n 80066e8 } else { huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); - 8005d82: 687b ldr r3, [r7, #4] - 8005d84: 6a1b ldr r3, [r3, #32] - 8005d86: 1c59 adds r1, r3, #1 - 8005d88: 687a ldr r2, [r7, #4] - 8005d8a: 6211 str r1, [r2, #32] - 8005d8c: 781a ldrb r2, [r3, #0] - 8005d8e: 687b ldr r3, [r7, #4] - 8005d90: 681b ldr r3, [r3, #0] - 8005d92: 605a str r2, [r3, #4] + 80066d6: 687b ldr r3, [r7, #4] + 80066d8: 6a1b ldr r3, [r3, #32] + 80066da: 1c59 adds r1, r3, #1 + 80066dc: 687a ldr r2, [r7, #4] + 80066de: 6211 str r1, [r2, #32] + 80066e0: 781a ldrb r2, [r3, #0] + 80066e2: 687b ldr r3, [r7, #4] + 80066e4: 681b ldr r3, [r3, #0] + 80066e6: 605a str r2, [r3, #4] } if (--huart->TxXferCount == 0U) - 8005d94: 687b ldr r3, [r7, #4] - 8005d96: 8cdb ldrh r3, [r3, #38] @ 0x26 - 8005d98: b29b uxth r3, r3 - 8005d9a: 3b01 subs r3, #1 - 8005d9c: b29b uxth r3, r3 - 8005d9e: 687a ldr r2, [r7, #4] - 8005da0: 4619 mov r1, r3 - 8005da2: 84d1 strh r1, [r2, #38] @ 0x26 - 8005da4: 2b00 cmp r3, #0 - 8005da6: d10f bne.n 8005dc8 + 80066e8: 687b ldr r3, [r7, #4] + 80066ea: 8cdb ldrh r3, [r3, #38] @ 0x26 + 80066ec: b29b uxth r3, r3 + 80066ee: 3b01 subs r3, #1 + 80066f0: b29b uxth r3, r3 + 80066f2: 687a ldr r2, [r7, #4] + 80066f4: 4619 mov r1, r3 + 80066f6: 84d1 strh r1, [r2, #38] @ 0x26 + 80066f8: 2b00 cmp r3, #0 + 80066fa: d10f bne.n 800671c { /* Disable the UART Transmit Data Register Empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); - 8005da8: 687b ldr r3, [r7, #4] - 8005daa: 681b ldr r3, [r3, #0] - 8005dac: 68da ldr r2, [r3, #12] - 8005dae: 687b ldr r3, [r7, #4] - 8005db0: 681b ldr r3, [r3, #0] - 8005db2: f022 0280 bic.w r2, r2, #128 @ 0x80 - 8005db6: 60da str r2, [r3, #12] + 80066fc: 687b ldr r3, [r7, #4] + 80066fe: 681b ldr r3, [r3, #0] + 8006700: 68da ldr r2, [r3, #12] + 8006702: 687b ldr r3, [r7, #4] + 8006704: 681b ldr r3, [r3, #0] + 8006706: f022 0280 bic.w r2, r2, #128 @ 0x80 + 800670a: 60da str r2, [r3, #12] /* Enable the UART Transmit Complete Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TC); - 8005db8: 687b ldr r3, [r7, #4] - 8005dba: 681b ldr r3, [r3, #0] - 8005dbc: 68da ldr r2, [r3, #12] - 8005dbe: 687b ldr r3, [r7, #4] - 8005dc0: 681b ldr r3, [r3, #0] - 8005dc2: f042 0240 orr.w r2, r2, #64 @ 0x40 - 8005dc6: 60da str r2, [r3, #12] + 800670c: 687b ldr r3, [r7, #4] + 800670e: 681b ldr r3, [r3, #0] + 8006710: 68da ldr r2, [r3, #12] + 8006712: 687b ldr r3, [r7, #4] + 8006714: 681b ldr r3, [r3, #0] + 8006716: f042 0240 orr.w r2, r2, #64 @ 0x40 + 800671a: 60da str r2, [r3, #12] } return HAL_OK; - 8005dc8: 2300 movs r3, #0 - 8005dca: e000 b.n 8005dce + 800671c: 2300 movs r3, #0 + 800671e: e000 b.n 8006722 } else { return HAL_BUSY; - 8005dcc: 2302 movs r3, #2 + 8006720: 2302 movs r3, #2 } } - 8005dce: 4618 mov r0, r3 - 8005dd0: 3714 adds r7, #20 - 8005dd2: 46bd mov sp, r7 - 8005dd4: bc80 pop {r7} - 8005dd6: 4770 bx lr + 8006722: 4618 mov r0, r3 + 8006724: 3714 adds r7, #20 + 8006726: 46bd mov sp, r7 + 8006728: bc80 pop {r7} + 800672a: 4770 bx lr -08005dd8 : +0800672c : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) { - 8005dd8: b580 push {r7, lr} - 8005dda: b082 sub sp, #8 - 8005ddc: af00 add r7, sp, #0 - 8005dde: 6078 str r0, [r7, #4] + 800672c: b580 push {r7, lr} + 800672e: b082 sub sp, #8 + 8006730: af00 add r7, sp, #0 + 8006732: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TC); - 8005de0: 687b ldr r3, [r7, #4] - 8005de2: 681b ldr r3, [r3, #0] - 8005de4: 68da ldr r2, [r3, #12] - 8005de6: 687b ldr r3, [r7, #4] - 8005de8: 681b ldr r3, [r3, #0] - 8005dea: f022 0240 bic.w r2, r2, #64 @ 0x40 - 8005dee: 60da str r2, [r3, #12] + 8006734: 687b ldr r3, [r7, #4] + 8006736: 681b ldr r3, [r3, #0] + 8006738: 68da ldr r2, [r3, #12] + 800673a: 687b ldr r3, [r7, #4] + 800673c: 681b ldr r3, [r3, #0] + 800673e: f022 0240 bic.w r2, r2, #64 @ 0x40 + 8006742: 60da str r2, [r3, #12] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8005df0: 687b ldr r3, [r7, #4] - 8005df2: 2220 movs r2, #32 - 8005df4: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8006744: 687b ldr r3, [r7, #4] + 8006746: 2220 movs r2, #32 + 8006748: f883 2041 strb.w r2, [r3, #65] @ 0x41 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); - 8005df8: 6878 ldr r0, [r7, #4] - 8005dfa: f7ff fea9 bl 8005b50 + 800674c: 6878 ldr r0, [r7, #4] + 800674e: f7ff fea9 bl 80064a4 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return HAL_OK; - 8005dfe: 2300 movs r3, #0 + 8006752: 2300 movs r3, #0 } - 8005e00: 4618 mov r0, r3 - 8005e02: 3708 adds r7, #8 - 8005e04: 46bd mov sp, r7 - 8005e06: bd80 pop {r7, pc} + 8006754: 4618 mov r0, r3 + 8006756: 3708 adds r7, #8 + 8006758: 46bd mov sp, r7 + 800675a: bd80 pop {r7, pc} -08005e08 : +0800675c : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { - 8005e08: b580 push {r7, lr} - 8005e0a: b08c sub sp, #48 @ 0x30 - 8005e0c: af00 add r7, sp, #0 - 8005e0e: 6078 str r0, [r7, #4] + 800675c: b580 push {r7, lr} + 800675e: b08c sub sp, #48 @ 0x30 + 8006760: af00 add r7, sp, #0 + 8006762: 6078 str r0, [r7, #4] uint8_t *pdata8bits; uint16_t *pdata16bits; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8005e10: 687b ldr r3, [r7, #4] - 8005e12: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 - 8005e16: b2db uxtb r3, r3 - 8005e18: 2b22 cmp r3, #34 @ 0x22 - 8005e1a: f040 80ae bne.w 8005f7a + 8006764: 687b ldr r3, [r7, #4] + 8006766: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 + 800676a: b2db uxtb r3, r3 + 800676c: 2b22 cmp r3, #34 @ 0x22 + 800676e: f040 80ae bne.w 80068ce { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005e1e: 687b ldr r3, [r7, #4] - 8005e20: 689b ldr r3, [r3, #8] - 8005e22: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8005e26: d117 bne.n 8005e58 - 8005e28: 687b ldr r3, [r7, #4] - 8005e2a: 691b ldr r3, [r3, #16] - 8005e2c: 2b00 cmp r3, #0 - 8005e2e: d113 bne.n 8005e58 + 8006772: 687b ldr r3, [r7, #4] + 8006774: 689b ldr r3, [r3, #8] + 8006776: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 800677a: d117 bne.n 80067ac + 800677c: 687b ldr r3, [r7, #4] + 800677e: 691b ldr r3, [r3, #16] + 8006780: 2b00 cmp r3, #0 + 8006782: d113 bne.n 80067ac { pdata8bits = NULL; - 8005e30: 2300 movs r3, #0 - 8005e32: 62fb str r3, [r7, #44] @ 0x2c + 8006784: 2300 movs r3, #0 + 8006786: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = (uint16_t *) huart->pRxBuffPtr; - 8005e34: 687b ldr r3, [r7, #4] - 8005e36: 6a9b ldr r3, [r3, #40] @ 0x28 - 8005e38: 62bb str r3, [r7, #40] @ 0x28 + 8006788: 687b ldr r3, [r7, #4] + 800678a: 6a9b ldr r3, [r3, #40] @ 0x28 + 800678c: 62bb str r3, [r7, #40] @ 0x28 *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); - 8005e3a: 687b ldr r3, [r7, #4] - 8005e3c: 681b ldr r3, [r3, #0] - 8005e3e: 685b ldr r3, [r3, #4] - 8005e40: b29b uxth r3, r3 - 8005e42: f3c3 0308 ubfx r3, r3, #0, #9 - 8005e46: b29a uxth r2, r3 - 8005e48: 6abb ldr r3, [r7, #40] @ 0x28 - 8005e4a: 801a strh r2, [r3, #0] + 800678e: 687b ldr r3, [r7, #4] + 8006790: 681b ldr r3, [r3, #0] + 8006792: 685b ldr r3, [r3, #4] + 8006794: b29b uxth r3, r3 + 8006796: f3c3 0308 ubfx r3, r3, #0, #9 + 800679a: b29a uxth r2, r3 + 800679c: 6abb ldr r3, [r7, #40] @ 0x28 + 800679e: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; - 8005e4c: 687b ldr r3, [r7, #4] - 8005e4e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8005e50: 1c9a adds r2, r3, #2 - 8005e52: 687b ldr r3, [r7, #4] - 8005e54: 629a str r2, [r3, #40] @ 0x28 - 8005e56: e026 b.n 8005ea6 + 80067a0: 687b ldr r3, [r7, #4] + 80067a2: 6a9b ldr r3, [r3, #40] @ 0x28 + 80067a4: 1c9a adds r2, r3, #2 + 80067a6: 687b ldr r3, [r7, #4] + 80067a8: 629a str r2, [r3, #40] @ 0x28 + 80067aa: e026 b.n 80067fa } else { pdata8bits = (uint8_t *) huart->pRxBuffPtr; - 8005e58: 687b ldr r3, [r7, #4] - 8005e5a: 6a9b ldr r3, [r3, #40] @ 0x28 - 8005e5c: 62fb str r3, [r7, #44] @ 0x2c + 80067ac: 687b ldr r3, [r7, #4] + 80067ae: 6a9b ldr r3, [r3, #40] @ 0x28 + 80067b0: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = NULL; - 8005e5e: 2300 movs r3, #0 - 8005e60: 62bb str r3, [r7, #40] @ 0x28 + 80067b2: 2300 movs r3, #0 + 80067b4: 62bb str r3, [r7, #40] @ 0x28 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) - 8005e62: 687b ldr r3, [r7, #4] - 8005e64: 689b ldr r3, [r3, #8] - 8005e66: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8005e6a: d007 beq.n 8005e7c - 8005e6c: 687b ldr r3, [r7, #4] - 8005e6e: 689b ldr r3, [r3, #8] - 8005e70: 2b00 cmp r3, #0 - 8005e72: d10a bne.n 8005e8a - 8005e74: 687b ldr r3, [r7, #4] - 8005e76: 691b ldr r3, [r3, #16] - 8005e78: 2b00 cmp r3, #0 - 8005e7a: d106 bne.n 8005e8a + 80067b6: 687b ldr r3, [r7, #4] + 80067b8: 689b ldr r3, [r3, #8] + 80067ba: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 80067be: d007 beq.n 80067d0 + 80067c0: 687b ldr r3, [r7, #4] + 80067c2: 689b ldr r3, [r3, #8] + 80067c4: 2b00 cmp r3, #0 + 80067c6: d10a bne.n 80067de + 80067c8: 687b ldr r3, [r7, #4] + 80067ca: 691b ldr r3, [r3, #16] + 80067cc: 2b00 cmp r3, #0 + 80067ce: d106 bne.n 80067de { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); - 8005e7c: 687b ldr r3, [r7, #4] - 8005e7e: 681b ldr r3, [r3, #0] - 8005e80: 685b ldr r3, [r3, #4] - 8005e82: b2da uxtb r2, r3 - 8005e84: 6afb ldr r3, [r7, #44] @ 0x2c - 8005e86: 701a strb r2, [r3, #0] - 8005e88: e008 b.n 8005e9c + 80067d0: 687b ldr r3, [r7, #4] + 80067d2: 681b ldr r3, [r3, #0] + 80067d4: 685b ldr r3, [r3, #4] + 80067d6: b2da uxtb r2, r3 + 80067d8: 6afb ldr r3, [r7, #44] @ 0x2c + 80067da: 701a strb r2, [r3, #0] + 80067dc: e008 b.n 80067f0 } else { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); - 8005e8a: 687b ldr r3, [r7, #4] - 8005e8c: 681b ldr r3, [r3, #0] - 8005e8e: 685b ldr r3, [r3, #4] - 8005e90: b2db uxtb r3, r3 - 8005e92: f003 037f and.w r3, r3, #127 @ 0x7f - 8005e96: b2da uxtb r2, r3 - 8005e98: 6afb ldr r3, [r7, #44] @ 0x2c - 8005e9a: 701a strb r2, [r3, #0] + 80067de: 687b ldr r3, [r7, #4] + 80067e0: 681b ldr r3, [r3, #0] + 80067e2: 685b ldr r3, [r3, #4] + 80067e4: b2db uxtb r3, r3 + 80067e6: f003 037f and.w r3, r3, #127 @ 0x7f + 80067ea: b2da uxtb r2, r3 + 80067ec: 6afb ldr r3, [r7, #44] @ 0x2c + 80067ee: 701a strb r2, [r3, #0] } huart->pRxBuffPtr += 1U; - 8005e9c: 687b ldr r3, [r7, #4] - 8005e9e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8005ea0: 1c5a adds r2, r3, #1 - 8005ea2: 687b ldr r3, [r7, #4] - 8005ea4: 629a str r2, [r3, #40] @ 0x28 + 80067f0: 687b ldr r3, [r7, #4] + 80067f2: 6a9b ldr r3, [r3, #40] @ 0x28 + 80067f4: 1c5a adds r2, r3, #1 + 80067f6: 687b ldr r3, [r7, #4] + 80067f8: 629a str r2, [r3, #40] @ 0x28 } if (--huart->RxXferCount == 0U) - 8005ea6: 687b ldr r3, [r7, #4] - 8005ea8: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8005eaa: b29b uxth r3, r3 - 8005eac: 3b01 subs r3, #1 - 8005eae: b29b uxth r3, r3 - 8005eb0: 687a ldr r2, [r7, #4] - 8005eb2: 4619 mov r1, r3 - 8005eb4: 85d1 strh r1, [r2, #46] @ 0x2e - 8005eb6: 2b00 cmp r3, #0 - 8005eb8: d15d bne.n 8005f76 + 80067fa: 687b ldr r3, [r7, #4] + 80067fc: 8ddb ldrh r3, [r3, #46] @ 0x2e + 80067fe: b29b uxth r3, r3 + 8006800: 3b01 subs r3, #1 + 8006802: b29b uxth r3, r3 + 8006804: 687a ldr r2, [r7, #4] + 8006806: 4619 mov r1, r3 + 8006808: 85d1 strh r1, [r2, #46] @ 0x2e + 800680a: 2b00 cmp r3, #0 + 800680c: d15d bne.n 80068ca { /* Disable the UART Data Register not empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); - 8005eba: 687b ldr r3, [r7, #4] - 8005ebc: 681b ldr r3, [r3, #0] - 8005ebe: 68da ldr r2, [r3, #12] - 8005ec0: 687b ldr r3, [r7, #4] - 8005ec2: 681b ldr r3, [r3, #0] - 8005ec4: f022 0220 bic.w r2, r2, #32 - 8005ec8: 60da str r2, [r3, #12] + 800680e: 687b ldr r3, [r7, #4] + 8006810: 681b ldr r3, [r3, #0] + 8006812: 68da ldr r2, [r3, #12] + 8006814: 687b ldr r3, [r7, #4] + 8006816: 681b ldr r3, [r3, #0] + 8006818: f022 0220 bic.w r2, r2, #32 + 800681c: 60da str r2, [r3, #12] /* Disable the UART Parity Error Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_PE); - 8005eca: 687b ldr r3, [r7, #4] - 8005ecc: 681b ldr r3, [r3, #0] - 8005ece: 68da ldr r2, [r3, #12] - 8005ed0: 687b ldr r3, [r7, #4] - 8005ed2: 681b ldr r3, [r3, #0] - 8005ed4: f422 7280 bic.w r2, r2, #256 @ 0x100 - 8005ed8: 60da str r2, [r3, #12] + 800681e: 687b ldr r3, [r7, #4] + 8006820: 681b ldr r3, [r3, #0] + 8006822: 68da ldr r2, [r3, #12] + 8006824: 687b ldr r3, [r7, #4] + 8006826: 681b ldr r3, [r3, #0] + 8006828: f422 7280 bic.w r2, r2, #256 @ 0x100 + 800682c: 60da str r2, [r3, #12] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); - 8005eda: 687b ldr r3, [r7, #4] - 8005edc: 681b ldr r3, [r3, #0] - 8005ede: 695a ldr r2, [r3, #20] - 8005ee0: 687b ldr r3, [r7, #4] - 8005ee2: 681b ldr r3, [r3, #0] - 8005ee4: f022 0201 bic.w r2, r2, #1 - 8005ee8: 615a str r2, [r3, #20] + 800682e: 687b ldr r3, [r7, #4] + 8006830: 681b ldr r3, [r3, #0] + 8006832: 695a ldr r2, [r3, #20] + 8006834: 687b ldr r3, [r7, #4] + 8006836: 681b ldr r3, [r3, #0] + 8006838: f022 0201 bic.w r2, r2, #1 + 800683c: 615a str r2, [r3, #20] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8005eea: 687b ldr r3, [r7, #4] - 8005eec: 2220 movs r2, #32 - 8005eee: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 800683e: 687b ldr r3, [r7, #4] + 8006840: 2220 movs r2, #32 + 8006842: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Initialize type of RxEvent to Transfer Complete */ huart->RxEventType = HAL_UART_RXEVENT_TC; - 8005ef2: 687b ldr r3, [r7, #4] - 8005ef4: 2200 movs r2, #0 - 8005ef6: 635a str r2, [r3, #52] @ 0x34 + 8006846: 687b ldr r3, [r7, #4] + 8006848: 2200 movs r2, #0 + 800684a: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8005ef8: 687b ldr r3, [r7, #4] - 8005efa: 6b1b ldr r3, [r3, #48] @ 0x30 - 8005efc: 2b01 cmp r3, #1 - 8005efe: d135 bne.n 8005f6c + 800684c: 687b ldr r3, [r7, #4] + 800684e: 6b1b ldr r3, [r3, #48] @ 0x30 + 8006850: 2b01 cmp r3, #1 + 8006852: d135 bne.n 80068c0 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005f00: 687b ldr r3, [r7, #4] - 8005f02: 2200 movs r2, #0 - 8005f04: 631a str r2, [r3, #48] @ 0x30 + 8006854: 687b ldr r3, [r7, #4] + 8006856: 2200 movs r2, #0 + 8006858: 631a str r2, [r3, #48] @ 0x30 /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005f06: 687b ldr r3, [r7, #4] - 8005f08: 681b ldr r3, [r3, #0] - 8005f0a: 330c adds r3, #12 - 8005f0c: 617b str r3, [r7, #20] + 800685a: 687b ldr r3, [r7, #4] + 800685c: 681b ldr r3, [r3, #0] + 800685e: 330c adds r3, #12 + 8006860: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005f0e: 697b ldr r3, [r7, #20] - 8005f10: e853 3f00 ldrex r3, [r3] - 8005f14: 613b str r3, [r7, #16] + 8006862: 697b ldr r3, [r7, #20] + 8006864: e853 3f00 ldrex r3, [r3] + 8006868: 613b str r3, [r7, #16] return(result); - 8005f16: 693b ldr r3, [r7, #16] - 8005f18: f023 0310 bic.w r3, r3, #16 - 8005f1c: 627b str r3, [r7, #36] @ 0x24 - 8005f1e: 687b ldr r3, [r7, #4] - 8005f20: 681b ldr r3, [r3, #0] - 8005f22: 330c adds r3, #12 - 8005f24: 6a7a ldr r2, [r7, #36] @ 0x24 - 8005f26: 623a str r2, [r7, #32] - 8005f28: 61fb str r3, [r7, #28] + 800686a: 693b ldr r3, [r7, #16] + 800686c: f023 0310 bic.w r3, r3, #16 + 8006870: 627b str r3, [r7, #36] @ 0x24 + 8006872: 687b ldr r3, [r7, #4] + 8006874: 681b ldr r3, [r3, #0] + 8006876: 330c adds r3, #12 + 8006878: 6a7a ldr r2, [r7, #36] @ 0x24 + 800687a: 623a str r2, [r7, #32] + 800687c: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005f2a: 69f9 ldr r1, [r7, #28] - 8005f2c: 6a3a ldr r2, [r7, #32] - 8005f2e: e841 2300 strex r3, r2, [r1] - 8005f32: 61bb str r3, [r7, #24] + 800687e: 69f9 ldr r1, [r7, #28] + 8006880: 6a3a ldr r2, [r7, #32] + 8006882: e841 2300 strex r3, r2, [r1] + 8006886: 61bb str r3, [r7, #24] return(result); - 8005f34: 69bb ldr r3, [r7, #24] - 8005f36: 2b00 cmp r3, #0 - 8005f38: d1e5 bne.n 8005f06 + 8006888: 69bb ldr r3, [r7, #24] + 800688a: 2b00 cmp r3, #0 + 800688c: d1e5 bne.n 800685a /* Check if IDLE flag is set */ if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) - 8005f3a: 687b ldr r3, [r7, #4] - 8005f3c: 681b ldr r3, [r3, #0] - 8005f3e: 681b ldr r3, [r3, #0] - 8005f40: f003 0310 and.w r3, r3, #16 - 8005f44: 2b10 cmp r3, #16 - 8005f46: d10a bne.n 8005f5e + 800688e: 687b ldr r3, [r7, #4] + 8006890: 681b ldr r3, [r3, #0] + 8006892: 681b ldr r3, [r3, #0] + 8006894: f003 0310 and.w r3, r3, #16 + 8006898: 2b10 cmp r3, #16 + 800689a: d10a bne.n 80068b2 { /* Clear IDLE flag in ISR */ __HAL_UART_CLEAR_IDLEFLAG(huart); - 8005f48: 2300 movs r3, #0 - 8005f4a: 60fb str r3, [r7, #12] - 8005f4c: 687b ldr r3, [r7, #4] - 8005f4e: 681b ldr r3, [r3, #0] - 8005f50: 681b ldr r3, [r3, #0] - 8005f52: 60fb str r3, [r7, #12] - 8005f54: 687b ldr r3, [r7, #4] - 8005f56: 681b ldr r3, [r3, #0] - 8005f58: 685b ldr r3, [r3, #4] - 8005f5a: 60fb str r3, [r7, #12] - 8005f5c: 68fb ldr r3, [r7, #12] + 800689c: 2300 movs r3, #0 + 800689e: 60fb str r3, [r7, #12] + 80068a0: 687b ldr r3, [r7, #4] + 80068a2: 681b ldr r3, [r3, #0] + 80068a4: 681b ldr r3, [r3, #0] + 80068a6: 60fb str r3, [r7, #12] + 80068a8: 687b ldr r3, [r7, #4] + 80068aa: 681b ldr r3, [r3, #0] + 80068ac: 685b ldr r3, [r3, #4] + 80068ae: 60fb str r3, [r7, #12] + 80068b0: 68fb ldr r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8005f5e: 687b ldr r3, [r7, #4] - 8005f60: 8d9b ldrh r3, [r3, #44] @ 0x2c - 8005f62: 4619 mov r1, r3 - 8005f64: 6878 ldr r0, [r7, #4] - 8005f66: f7ff fe0e bl 8005b86 - 8005f6a: e002 b.n 8005f72 + 80068b2: 687b ldr r3, [r7, #4] + 80068b4: 8d9b ldrh r3, [r3, #44] @ 0x2c + 80068b6: 4619 mov r1, r3 + 80068b8: 6878 ldr r0, [r7, #4] + 80068ba: f7ff fe0e bl 80064da + 80068be: e002 b.n 80068c6 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); - 8005f6c: 6878 ldr r0, [r7, #4] - 8005f6e: f7ff fdf8 bl 8005b62 + 80068c0: 6878 ldr r0, [r7, #4] + 80068c2: f7ff fdf8 bl 80064b6 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; - 8005f72: 2300 movs r3, #0 - 8005f74: e002 b.n 8005f7c + 80068c6: 2300 movs r3, #0 + 80068c8: e002 b.n 80068d0 } return HAL_OK; - 8005f76: 2300 movs r3, #0 - 8005f78: e000 b.n 8005f7c + 80068ca: 2300 movs r3, #0 + 80068cc: e000 b.n 80068d0 } else { return HAL_BUSY; - 8005f7a: 2302 movs r3, #2 + 80068ce: 2302 movs r3, #2 } } - 8005f7c: 4618 mov r0, r3 - 8005f7e: 3730 adds r7, #48 @ 0x30 - 8005f80: 46bd mov sp, r7 - 8005f82: bd80 pop {r7, pc} + 80068d0: 4618 mov r0, r3 + 80068d2: 3730 adds r7, #48 @ 0x30 + 80068d4: 46bd mov sp, r7 + 80068d6: bd80 pop {r7, pc} -08005f84 : +080068d8 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { - 8005f84: b580 push {r7, lr} - 8005f86: b084 sub sp, #16 - 8005f88: af00 add r7, sp, #0 - 8005f8a: 6078 str r0, [r7, #4] + 80068d8: b580 push {r7, lr} + 80068da: b084 sub sp, #16 + 80068dc: af00 add r7, sp, #0 + 80068de: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8005f8c: 687b ldr r3, [r7, #4] - 8005f8e: 681b ldr r3, [r3, #0] - 8005f90: 691b ldr r3, [r3, #16] - 8005f92: f423 5140 bic.w r1, r3, #12288 @ 0x3000 - 8005f96: 687b ldr r3, [r7, #4] - 8005f98: 68da ldr r2, [r3, #12] - 8005f9a: 687b ldr r3, [r7, #4] - 8005f9c: 681b ldr r3, [r3, #0] - 8005f9e: 430a orrs r2, r1 - 8005fa0: 611a str r2, [r3, #16] + 80068e0: 687b ldr r3, [r7, #4] + 80068e2: 681b ldr r3, [r3, #0] + 80068e4: 691b ldr r3, [r3, #16] + 80068e6: f423 5140 bic.w r1, r3, #12288 @ 0x3000 + 80068ea: 687b ldr r3, [r7, #4] + 80068ec: 68da ldr r2, [r3, #12] + 80068ee: 687b ldr r3, [r7, #4] + 80068f0: 681b ldr r3, [r3, #0] + 80068f2: 430a orrs r2, r1 + 80068f4: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; - 8005fa2: 687b ldr r3, [r7, #4] - 8005fa4: 689a ldr r2, [r3, #8] - 8005fa6: 687b ldr r3, [r7, #4] - 8005fa8: 691b ldr r3, [r3, #16] - 8005faa: 431a orrs r2, r3 - 8005fac: 687b ldr r3, [r7, #4] - 8005fae: 695b ldr r3, [r3, #20] - 8005fb0: 4313 orrs r3, r2 - 8005fb2: 60bb str r3, [r7, #8] + 80068f6: 687b ldr r3, [r7, #4] + 80068f8: 689a ldr r2, [r3, #8] + 80068fa: 687b ldr r3, [r7, #4] + 80068fc: 691b ldr r3, [r3, #16] + 80068fe: 431a orrs r2, r3 + 8006900: 687b ldr r3, [r7, #4] + 8006902: 695b ldr r3, [r3, #20] + 8006904: 4313 orrs r3, r2 + 8006906: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, - 8005fb4: 687b ldr r3, [r7, #4] - 8005fb6: 681b ldr r3, [r3, #0] - 8005fb8: 68db ldr r3, [r3, #12] - 8005fba: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 - 8005fbe: f023 030c bic.w r3, r3, #12 - 8005fc2: 687a ldr r2, [r7, #4] - 8005fc4: 6812 ldr r2, [r2, #0] - 8005fc6: 68b9 ldr r1, [r7, #8] - 8005fc8: 430b orrs r3, r1 - 8005fca: 60d3 str r3, [r2, #12] + 8006908: 687b ldr r3, [r7, #4] + 800690a: 681b ldr r3, [r3, #0] + 800690c: 68db ldr r3, [r3, #12] + 800690e: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 + 8006912: f023 030c bic.w r3, r3, #12 + 8006916: 687a ldr r2, [r7, #4] + 8006918: 6812 ldr r2, [r2, #0] + 800691a: 68b9 ldr r1, [r7, #8] + 800691c: 430b orrs r3, r1 + 800691e: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); - 8005fcc: 687b ldr r3, [r7, #4] - 8005fce: 681b ldr r3, [r3, #0] - 8005fd0: 695b ldr r3, [r3, #20] - 8005fd2: f423 7140 bic.w r1, r3, #768 @ 0x300 - 8005fd6: 687b ldr r3, [r7, #4] - 8005fd8: 699a ldr r2, [r3, #24] - 8005fda: 687b ldr r3, [r7, #4] - 8005fdc: 681b ldr r3, [r3, #0] - 8005fde: 430a orrs r2, r1 - 8005fe0: 615a str r2, [r3, #20] + 8006920: 687b ldr r3, [r7, #4] + 8006922: 681b ldr r3, [r3, #0] + 8006924: 695b ldr r3, [r3, #20] + 8006926: f423 7140 bic.w r1, r3, #768 @ 0x300 + 800692a: 687b ldr r3, [r7, #4] + 800692c: 699a ldr r2, [r3, #24] + 800692e: 687b ldr r3, [r7, #4] + 8006930: 681b ldr r3, [r3, #0] + 8006932: 430a orrs r2, r1 + 8006934: 615a str r2, [r3, #20] if(huart->Instance == USART1) - 8005fe2: 687b ldr r3, [r7, #4] - 8005fe4: 681b ldr r3, [r3, #0] - 8005fe6: 4a2c ldr r2, [pc, #176] @ (8006098 ) - 8005fe8: 4293 cmp r3, r2 - 8005fea: d103 bne.n 8005ff4 + 8006936: 687b ldr r3, [r7, #4] + 8006938: 681b ldr r3, [r3, #0] + 800693a: 4a2c ldr r2, [pc, #176] @ (80069ec ) + 800693c: 4293 cmp r3, r2 + 800693e: d103 bne.n 8006948 { pclk = HAL_RCC_GetPCLK2Freq(); - 8005fec: f7fe fd68 bl 8004ac0 - 8005ff0: 60f8 str r0, [r7, #12] - 8005ff2: e002 b.n 8005ffa + 8006940: f7fe fd68 bl 8005414 + 8006944: 60f8 str r0, [r7, #12] + 8006946: e002 b.n 800694e } else { pclk = HAL_RCC_GetPCLK1Freq(); - 8005ff4: f7fe fd50 bl 8004a98 - 8005ff8: 60f8 str r0, [r7, #12] + 8006948: f7fe fd50 bl 80053ec + 800694c: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); - 8005ffa: 68fa ldr r2, [r7, #12] - 8005ffc: 4613 mov r3, r2 - 8005ffe: 009b lsls r3, r3, #2 - 8006000: 4413 add r3, r2 - 8006002: 009a lsls r2, r3, #2 - 8006004: 441a add r2, r3 - 8006006: 687b ldr r3, [r7, #4] - 8006008: 685b ldr r3, [r3, #4] - 800600a: 009b lsls r3, r3, #2 - 800600c: fbb2 f3f3 udiv r3, r2, r3 - 8006010: 4a22 ldr r2, [pc, #136] @ (800609c ) - 8006012: fba2 2303 umull r2, r3, r2, r3 - 8006016: 095b lsrs r3, r3, #5 - 8006018: 0119 lsls r1, r3, #4 - 800601a: 68fa ldr r2, [r7, #12] - 800601c: 4613 mov r3, r2 - 800601e: 009b lsls r3, r3, #2 - 8006020: 4413 add r3, r2 - 8006022: 009a lsls r2, r3, #2 - 8006024: 441a add r2, r3 - 8006026: 687b ldr r3, [r7, #4] - 8006028: 685b ldr r3, [r3, #4] - 800602a: 009b lsls r3, r3, #2 - 800602c: fbb2 f2f3 udiv r2, r2, r3 - 8006030: 4b1a ldr r3, [pc, #104] @ (800609c ) - 8006032: fba3 0302 umull r0, r3, r3, r2 - 8006036: 095b lsrs r3, r3, #5 - 8006038: 2064 movs r0, #100 @ 0x64 - 800603a: fb00 f303 mul.w r3, r0, r3 - 800603e: 1ad3 subs r3, r2, r3 - 8006040: 011b lsls r3, r3, #4 - 8006042: 3332 adds r3, #50 @ 0x32 - 8006044: 4a15 ldr r2, [pc, #84] @ (800609c ) - 8006046: fba2 2303 umull r2, r3, r2, r3 - 800604a: 095b lsrs r3, r3, #5 - 800604c: f003 03f0 and.w r3, r3, #240 @ 0xf0 - 8006050: 4419 add r1, r3 - 8006052: 68fa ldr r2, [r7, #12] - 8006054: 4613 mov r3, r2 - 8006056: 009b lsls r3, r3, #2 - 8006058: 4413 add r3, r2 - 800605a: 009a lsls r2, r3, #2 - 800605c: 441a add r2, r3 - 800605e: 687b ldr r3, [r7, #4] - 8006060: 685b ldr r3, [r3, #4] - 8006062: 009b lsls r3, r3, #2 - 8006064: fbb2 f2f3 udiv r2, r2, r3 - 8006068: 4b0c ldr r3, [pc, #48] @ (800609c ) - 800606a: fba3 0302 umull r0, r3, r3, r2 - 800606e: 095b lsrs r3, r3, #5 - 8006070: 2064 movs r0, #100 @ 0x64 - 8006072: fb00 f303 mul.w r3, r0, r3 - 8006076: 1ad3 subs r3, r2, r3 - 8006078: 011b lsls r3, r3, #4 - 800607a: 3332 adds r3, #50 @ 0x32 - 800607c: 4a07 ldr r2, [pc, #28] @ (800609c ) - 800607e: fba2 2303 umull r2, r3, r2, r3 - 8006082: 095b lsrs r3, r3, #5 - 8006084: f003 020f and.w r2, r3, #15 - 8006088: 687b ldr r3, [r7, #4] - 800608a: 681b ldr r3, [r3, #0] - 800608c: 440a add r2, r1 - 800608e: 609a str r2, [r3, #8] + 800694e: 68fa ldr r2, [r7, #12] + 8006950: 4613 mov r3, r2 + 8006952: 009b lsls r3, r3, #2 + 8006954: 4413 add r3, r2 + 8006956: 009a lsls r2, r3, #2 + 8006958: 441a add r2, r3 + 800695a: 687b ldr r3, [r7, #4] + 800695c: 685b ldr r3, [r3, #4] + 800695e: 009b lsls r3, r3, #2 + 8006960: fbb2 f3f3 udiv r3, r2, r3 + 8006964: 4a22 ldr r2, [pc, #136] @ (80069f0 ) + 8006966: fba2 2303 umull r2, r3, r2, r3 + 800696a: 095b lsrs r3, r3, #5 + 800696c: 0119 lsls r1, r3, #4 + 800696e: 68fa ldr r2, [r7, #12] + 8006970: 4613 mov r3, r2 + 8006972: 009b lsls r3, r3, #2 + 8006974: 4413 add r3, r2 + 8006976: 009a lsls r2, r3, #2 + 8006978: 441a add r2, r3 + 800697a: 687b ldr r3, [r7, #4] + 800697c: 685b ldr r3, [r3, #4] + 800697e: 009b lsls r3, r3, #2 + 8006980: fbb2 f2f3 udiv r2, r2, r3 + 8006984: 4b1a ldr r3, [pc, #104] @ (80069f0 ) + 8006986: fba3 0302 umull r0, r3, r3, r2 + 800698a: 095b lsrs r3, r3, #5 + 800698c: 2064 movs r0, #100 @ 0x64 + 800698e: fb00 f303 mul.w r3, r0, r3 + 8006992: 1ad3 subs r3, r2, r3 + 8006994: 011b lsls r3, r3, #4 + 8006996: 3332 adds r3, #50 @ 0x32 + 8006998: 4a15 ldr r2, [pc, #84] @ (80069f0 ) + 800699a: fba2 2303 umull r2, r3, r2, r3 + 800699e: 095b lsrs r3, r3, #5 + 80069a0: f003 03f0 and.w r3, r3, #240 @ 0xf0 + 80069a4: 4419 add r1, r3 + 80069a6: 68fa ldr r2, [r7, #12] + 80069a8: 4613 mov r3, r2 + 80069aa: 009b lsls r3, r3, #2 + 80069ac: 4413 add r3, r2 + 80069ae: 009a lsls r2, r3, #2 + 80069b0: 441a add r2, r3 + 80069b2: 687b ldr r3, [r7, #4] + 80069b4: 685b ldr r3, [r3, #4] + 80069b6: 009b lsls r3, r3, #2 + 80069b8: fbb2 f2f3 udiv r2, r2, r3 + 80069bc: 4b0c ldr r3, [pc, #48] @ (80069f0 ) + 80069be: fba3 0302 umull r0, r3, r3, r2 + 80069c2: 095b lsrs r3, r3, #5 + 80069c4: 2064 movs r0, #100 @ 0x64 + 80069c6: fb00 f303 mul.w r3, r0, r3 + 80069ca: 1ad3 subs r3, r2, r3 + 80069cc: 011b lsls r3, r3, #4 + 80069ce: 3332 adds r3, #50 @ 0x32 + 80069d0: 4a07 ldr r2, [pc, #28] @ (80069f0 ) + 80069d2: fba2 2303 umull r2, r3, r2, r3 + 80069d6: 095b lsrs r3, r3, #5 + 80069d8: f003 020f and.w r2, r3, #15 + 80069dc: 687b ldr r3, [r7, #4] + 80069de: 681b ldr r3, [r3, #0] + 80069e0: 440a add r2, r1 + 80069e2: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } - 8006090: bf00 nop - 8006092: 3710 adds r7, #16 - 8006094: 46bd mov sp, r7 - 8006096: bd80 pop {r7, pc} - 8006098: 40013800 .word 0x40013800 - 800609c: 51eb851f .word 0x51eb851f + 80069e4: bf00 nop + 80069e6: 3710 adds r7, #16 + 80069e8: 46bd mov sp, r7 + 80069ea: bd80 pop {r7, pc} + 80069ec: 40013800 .word 0x40013800 + 80069f0: 51eb851f .word 0x51eb851f -080060a0 : - 80060a0: 4603 mov r3, r0 - 80060a2: 4402 add r2, r0 - 80060a4: 4293 cmp r3, r2 - 80060a6: d100 bne.n 80060aa - 80060a8: 4770 bx lr - 80060aa: f803 1b01 strb.w r1, [r3], #1 - 80060ae: e7f9 b.n 80060a4 +080069f4 : + 80069f4: 4603 mov r3, r0 + 80069f6: 4402 add r2, r0 + 80069f8: 4293 cmp r3, r2 + 80069fa: d100 bne.n 80069fe + 80069fc: 4770 bx lr + 80069fe: f803 1b01 strb.w r1, [r3], #1 + 8006a02: e7f9 b.n 80069f8 -080060b0 <__errno>: - 80060b0: 4b01 ldr r3, [pc, #4] @ (80060b8 <__errno+0x8>) - 80060b2: 6818 ldr r0, [r3, #0] - 80060b4: 4770 bx lr - 80060b6: bf00 nop - 80060b8: 20000010 .word 0x20000010 +08006a04 <__errno>: + 8006a04: 4b01 ldr r3, [pc, #4] @ (8006a0c <__errno+0x8>) + 8006a06: 6818 ldr r0, [r3, #0] + 8006a08: 4770 bx lr + 8006a0a: bf00 nop + 8006a0c: 20000010 .word 0x20000010 -080060bc <__libc_init_array>: - 80060bc: b570 push {r4, r5, r6, lr} - 80060be: 2600 movs r6, #0 - 80060c0: 4d0c ldr r5, [pc, #48] @ (80060f4 <__libc_init_array+0x38>) - 80060c2: 4b0d ldr r3, [pc, #52] @ (80060f8 <__libc_init_array+0x3c>) - 80060c4: 1b5b subs r3, r3, r5 - 80060c6: 109c asrs r4, r3, #2 - 80060c8: 42a6 cmp r6, r4 - 80060ca: d109 bne.n 80060e0 <__libc_init_array+0x24> - 80060cc: 2600 movs r6, #0 - 80060ce: f000 f8a9 bl 8006224 <_init> - 80060d2: 4d0a ldr r5, [pc, #40] @ (80060fc <__libc_init_array+0x40>) - 80060d4: 4b0a ldr r3, [pc, #40] @ (8006100 <__libc_init_array+0x44>) - 80060d6: 1b5b subs r3, r3, r5 - 80060d8: 109c asrs r4, r3, #2 - 80060da: 42a6 cmp r6, r4 - 80060dc: d105 bne.n 80060ea <__libc_init_array+0x2e> - 80060de: bd70 pop {r4, r5, r6, pc} - 80060e0: f855 3b04 ldr.w r3, [r5], #4 - 80060e4: 4798 blx r3 - 80060e6: 3601 adds r6, #1 - 80060e8: e7ee b.n 80060c8 <__libc_init_array+0xc> - 80060ea: f855 3b04 ldr.w r3, [r5], #4 - 80060ee: 4798 blx r3 - 80060f0: 3601 adds r6, #1 - 80060f2: e7f2 b.n 80060da <__libc_init_array+0x1e> - 80060f4: 08006380 .word 0x08006380 - 80060f8: 08006380 .word 0x08006380 - 80060fc: 08006380 .word 0x08006380 - 8006100: 08006384 .word 0x08006384 +08006a10 <__libc_init_array>: + 8006a10: b570 push {r4, r5, r6, lr} + 8006a12: 2600 movs r6, #0 + 8006a14: 4d0c ldr r5, [pc, #48] @ (8006a48 <__libc_init_array+0x38>) + 8006a16: 4b0d ldr r3, [pc, #52] @ (8006a4c <__libc_init_array+0x3c>) + 8006a18: 1b5b subs r3, r3, r5 + 8006a1a: 109c asrs r4, r3, #2 + 8006a1c: 42a6 cmp r6, r4 + 8006a1e: d109 bne.n 8006a34 <__libc_init_array+0x24> + 8006a20: 2600 movs r6, #0 + 8006a22: f000 f8cd bl 8006bc0 <_init> + 8006a26: 4d0a ldr r5, [pc, #40] @ (8006a50 <__libc_init_array+0x40>) + 8006a28: 4b0a ldr r3, [pc, #40] @ (8006a54 <__libc_init_array+0x44>) + 8006a2a: 1b5b subs r3, r3, r5 + 8006a2c: 109c asrs r4, r3, #2 + 8006a2e: 42a6 cmp r6, r4 + 8006a30: d105 bne.n 8006a3e <__libc_init_array+0x2e> + 8006a32: bd70 pop {r4, r5, r6, pc} + 8006a34: f855 3b04 ldr.w r3, [r5], #4 + 8006a38: 4798 blx r3 + 8006a3a: 3601 adds r6, #1 + 8006a3c: e7ee b.n 8006a1c <__libc_init_array+0xc> + 8006a3e: f855 3b04 ldr.w r3, [r5], #4 + 8006a42: 4798 blx r3 + 8006a44: 3601 adds r6, #1 + 8006a46: e7f2 b.n 8006a2e <__libc_init_array+0x1e> + 8006a48: 08006c64 .word 0x08006c64 + 8006a4c: 08006c64 .word 0x08006c64 + 8006a50: 08006c64 .word 0x08006c64 + 8006a54: 08006c68 .word 0x08006c68 -08006104 : - 8006104: b538 push {r3, r4, r5, lr} - 8006106: 4604 mov r4, r0 - 8006108: f000 f81a bl 8006140 <__ieee754_sqrtf> - 800610c: 4621 mov r1, r4 - 800610e: 4605 mov r5, r0 - 8006110: 4620 mov r0, r4 - 8006112: f7fa faf7 bl 8000704 <__aeabi_fcmpun> - 8006116: b920 cbnz r0, 8006122 - 8006118: 4620 mov r0, r4 - 800611a: 2100 movs r1, #0 - 800611c: f7fa faca bl 80006b4 <__aeabi_fcmplt> - 8006120: b908 cbnz r0, 8006126 - 8006122: 4628 mov r0, r5 - 8006124: bd38 pop {r3, r4, r5, pc} - 8006126: f7ff ffc3 bl 80060b0 <__errno> - 800612a: 2221 movs r2, #33 @ 0x21 - 800612c: 4603 mov r3, r0 - 800612e: 2100 movs r1, #0 - 8006130: 601a str r2, [r3, #0] - 8006132: 4608 mov r0, r1 - 8006134: f7fa f9d4 bl 80004e0 <__aeabi_fdiv> - 8006138: 4605 mov r5, r0 - 800613a: 4628 mov r0, r5 - 800613c: bd38 pop {r3, r4, r5, pc} - 800613e: bf00 nop +08006a58 : + 8006a58: b538 push {r3, r4, r5, lr} + 8006a5a: 4604 mov r4, r0 + 8006a5c: f000 f81a bl 8006a94 <__ieee754_sqrtf> + 8006a60: 4621 mov r1, r4 + 8006a62: 4605 mov r5, r0 + 8006a64: 4620 mov r0, r4 + 8006a66: f7fa f9e3 bl 8000e30 <__aeabi_fcmpun> + 8006a6a: b920 cbnz r0, 8006a76 + 8006a6c: 4620 mov r0, r4 + 8006a6e: 2100 movs r1, #0 + 8006a70: f7fa f9b6 bl 8000de0 <__aeabi_fcmplt> + 8006a74: b908 cbnz r0, 8006a7a + 8006a76: 4628 mov r0, r5 + 8006a78: bd38 pop {r3, r4, r5, pc} + 8006a7a: f7ff ffc3 bl 8006a04 <__errno> + 8006a7e: 2221 movs r2, #33 @ 0x21 + 8006a80: 4603 mov r3, r0 + 8006a82: 2100 movs r1, #0 + 8006a84: 601a str r2, [r3, #0] + 8006a86: 4608 mov r0, r1 + 8006a88: f7fa f8c0 bl 8000c0c <__aeabi_fdiv> + 8006a8c: 4605 mov r5, r0 + 8006a8e: 4628 mov r0, r5 + 8006a90: bd38 pop {r3, r4, r5, pc} + 8006a92: bf00 nop -08006140 <__ieee754_sqrtf>: - 8006140: f020 4200 bic.w r2, r0, #2147483648 @ 0x80000000 - 8006144: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000 - 8006148: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 800614c: 4604 mov r4, r0 - 800614e: d24f bcs.n 80061f0 <__ieee754_sqrtf+0xb0> - 8006150: 2a00 cmp r2, #0 - 8006152: d04b beq.n 80061ec <__ieee754_sqrtf+0xac> - 8006154: 2800 cmp r0, #0 - 8006156: 4603 mov r3, r0 - 8006158: db54 blt.n 8006204 <__ieee754_sqrtf+0xc4> - 800615a: f010 42ff ands.w r2, r0, #2139095040 @ 0x7f800000 - 800615e: d14f bne.n 8006200 <__ieee754_sqrtf+0xc0> - 8006160: 005b lsls r3, r3, #1 - 8006162: 0218 lsls r0, r3, #8 - 8006164: 4611 mov r1, r2 - 8006166: f102 0201 add.w r2, r2, #1 - 800616a: d5f9 bpl.n 8006160 <__ieee754_sqrtf+0x20> - 800616c: 4249 negs r1, r1 - 800616e: 2400 movs r4, #0 - 8006170: f3c3 0216 ubfx r2, r3, #0, #23 - 8006174: f1a1 057f sub.w r5, r1, #127 @ 0x7f - 8006178: 07cb lsls r3, r1, #31 - 800617a: f04f 0e19 mov.w lr, #25 - 800617e: f04f 7c80 mov.w ip, #16777216 @ 0x1000000 - 8006182: 4621 mov r1, r4 - 8006184: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 - 8006188: bf58 it pl - 800618a: 0052 lslpl r2, r2, #1 - 800618c: 106d asrs r5, r5, #1 - 800618e: 0052 lsls r2, r2, #1 - 8006190: eb01 030c add.w r3, r1, ip - 8006194: 4293 cmp r3, r2 - 8006196: bfcf iteee gt - 8006198: 4613 movgt r3, r2 - 800619a: eb03 010c addle.w r1, r3, ip - 800619e: 4464 addle r4, ip - 80061a0: 1ad3 suble r3, r2, r3 - 80061a2: f1be 0e01 subs.w lr, lr, #1 - 80061a6: ea4f 0243 mov.w r2, r3, lsl #1 - 80061aa: ea4f 0c5c mov.w ip, ip, lsr #1 - 80061ae: d1ef bne.n 8006190 <__ieee754_sqrtf+0x50> - 80061b0: b1bb cbz r3, 80061e2 <__ieee754_sqrtf+0xa2> - 80061b2: 4e1a ldr r6, [pc, #104] @ (800621c <__ieee754_sqrtf+0xdc>) - 80061b4: 4f1a ldr r7, [pc, #104] @ (8006220 <__ieee754_sqrtf+0xe0>) - 80061b6: 6830 ldr r0, [r6, #0] - 80061b8: 6839 ldr r1, [r7, #0] - 80061ba: f7f9 ffd3 bl 8000164 <__aeabi_fsub> - 80061be: f8d6 8000 ldr.w r8, [r6] - 80061c2: 4601 mov r1, r0 - 80061c4: 4640 mov r0, r8 - 80061c6: f7fa fa7f bl 80006c8 <__aeabi_fcmple> - 80061ca: b150 cbz r0, 80061e2 <__ieee754_sqrtf+0xa2> - 80061cc: 6830 ldr r0, [r6, #0] - 80061ce: 6839 ldr r1, [r7, #0] - 80061d0: f7f9 ffca bl 8000168 <__addsf3> - 80061d4: 6836 ldr r6, [r6, #0] - 80061d6: 4601 mov r1, r0 - 80061d8: 4630 mov r0, r6 - 80061da: f7fa fa6b bl 80006b4 <__aeabi_fcmplt> - 80061de: b1c8 cbz r0, 8006214 <__ieee754_sqrtf+0xd4> - 80061e0: 3402 adds r4, #2 - 80061e2: 1060 asrs r0, r4, #1 - 80061e4: f100 507c add.w r0, r0, #1056964608 @ 0x3f000000 - 80061e8: eb00 50c5 add.w r0, r0, r5, lsl #23 - 80061ec: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 80061f0: 4601 mov r1, r0 - 80061f2: f7fa f8c1 bl 8000378 <__aeabi_fmul> - 80061f6: 4621 mov r1, r4 - 80061f8: f7f9 ffb6 bl 8000168 <__addsf3> - 80061fc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8006200: 15c1 asrs r1, r0, #23 - 8006202: e7b4 b.n 800616e <__ieee754_sqrtf+0x2e> - 8006204: 4601 mov r1, r0 - 8006206: f7f9 ffad bl 8000164 <__aeabi_fsub> - 800620a: 4601 mov r1, r0 - 800620c: f7fa f968 bl 80004e0 <__aeabi_fdiv> - 8006210: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8006214: 3401 adds r4, #1 - 8006216: f024 0401 bic.w r4, r4, #1 - 800621a: e7e2 b.n 80061e2 <__ieee754_sqrtf+0xa2> - 800621c: 08006374 .word 0x08006374 - 8006220: 08006370 .word 0x08006370 +08006a94 <__ieee754_sqrtf>: + 8006a94: f020 4200 bic.w r2, r0, #2147483648 @ 0x80000000 + 8006a98: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000 + 8006a9c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8006aa0: 4604 mov r4, r0 + 8006aa2: d24f bcs.n 8006b44 <__ieee754_sqrtf+0xb0> + 8006aa4: 2a00 cmp r2, #0 + 8006aa6: d04b beq.n 8006b40 <__ieee754_sqrtf+0xac> + 8006aa8: 2800 cmp r0, #0 + 8006aaa: 4603 mov r3, r0 + 8006aac: db54 blt.n 8006b58 <__ieee754_sqrtf+0xc4> + 8006aae: f010 42ff ands.w r2, r0, #2139095040 @ 0x7f800000 + 8006ab2: d14f bne.n 8006b54 <__ieee754_sqrtf+0xc0> + 8006ab4: 005b lsls r3, r3, #1 + 8006ab6: 0218 lsls r0, r3, #8 + 8006ab8: 4611 mov r1, r2 + 8006aba: f102 0201 add.w r2, r2, #1 + 8006abe: d5f9 bpl.n 8006ab4 <__ieee754_sqrtf+0x20> + 8006ac0: 4249 negs r1, r1 + 8006ac2: 2400 movs r4, #0 + 8006ac4: f3c3 0216 ubfx r2, r3, #0, #23 + 8006ac8: f1a1 057f sub.w r5, r1, #127 @ 0x7f + 8006acc: 07cb lsls r3, r1, #31 + 8006ace: f04f 0e19 mov.w lr, #25 + 8006ad2: f04f 7c80 mov.w ip, #16777216 @ 0x1000000 + 8006ad6: 4621 mov r1, r4 + 8006ad8: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 + 8006adc: bf58 it pl + 8006ade: 0052 lslpl r2, r2, #1 + 8006ae0: 106d asrs r5, r5, #1 + 8006ae2: 0052 lsls r2, r2, #1 + 8006ae4: eb01 030c add.w r3, r1, ip + 8006ae8: 4293 cmp r3, r2 + 8006aea: bfcf iteee gt + 8006aec: 4613 movgt r3, r2 + 8006aee: eb03 010c addle.w r1, r3, ip + 8006af2: 4464 addle r4, ip + 8006af4: 1ad3 suble r3, r2, r3 + 8006af6: f1be 0e01 subs.w lr, lr, #1 + 8006afa: ea4f 0243 mov.w r2, r3, lsl #1 + 8006afe: ea4f 0c5c mov.w ip, ip, lsr #1 + 8006b02: d1ef bne.n 8006ae4 <__ieee754_sqrtf+0x50> + 8006b04: b1bb cbz r3, 8006b36 <__ieee754_sqrtf+0xa2> + 8006b06: 4e1a ldr r6, [pc, #104] @ (8006b70 <__ieee754_sqrtf+0xdc>) + 8006b08: 4f1a ldr r7, [pc, #104] @ (8006b74 <__ieee754_sqrtf+0xe0>) + 8006b0a: 6830 ldr r0, [r6, #0] + 8006b0c: 6839 ldr r1, [r7, #0] + 8006b0e: f7f9 febf bl 8000890 <__aeabi_fsub> + 8006b12: f8d6 8000 ldr.w r8, [r6] + 8006b16: 4601 mov r1, r0 + 8006b18: 4640 mov r0, r8 + 8006b1a: f7fa f96b bl 8000df4 <__aeabi_fcmple> + 8006b1e: b150 cbz r0, 8006b36 <__ieee754_sqrtf+0xa2> + 8006b20: 6830 ldr r0, [r6, #0] + 8006b22: 6839 ldr r1, [r7, #0] + 8006b24: f7f9 feb6 bl 8000894 <__addsf3> + 8006b28: 6836 ldr r6, [r6, #0] + 8006b2a: 4601 mov r1, r0 + 8006b2c: 4630 mov r0, r6 + 8006b2e: f7fa f957 bl 8000de0 <__aeabi_fcmplt> + 8006b32: b1c8 cbz r0, 8006b68 <__ieee754_sqrtf+0xd4> + 8006b34: 3402 adds r4, #2 + 8006b36: 1060 asrs r0, r4, #1 + 8006b38: f100 507c add.w r0, r0, #1056964608 @ 0x3f000000 + 8006b3c: eb00 50c5 add.w r0, r0, r5, lsl #23 + 8006b40: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006b44: 4601 mov r1, r0 + 8006b46: f7f9 ffad bl 8000aa4 <__aeabi_fmul> + 8006b4a: 4621 mov r1, r4 + 8006b4c: f7f9 fea2 bl 8000894 <__addsf3> + 8006b50: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006b54: 15c1 asrs r1, r0, #23 + 8006b56: e7b4 b.n 8006ac2 <__ieee754_sqrtf+0x2e> + 8006b58: 4601 mov r1, r0 + 8006b5a: f7f9 fe99 bl 8000890 <__aeabi_fsub> + 8006b5e: 4601 mov r1, r0 + 8006b60: f7fa f854 bl 8000c0c <__aeabi_fdiv> + 8006b64: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006b68: 3401 adds r4, #1 + 8006b6a: f024 0401 bic.w r4, r4, #1 + 8006b6e: e7e2 b.n 8006b36 <__ieee754_sqrtf+0xa2> + 8006b70: 08006c58 .word 0x08006c58 + 8006b74: 08006c54 .word 0x08006c54 -08006224 <_init>: - 8006224: b5f8 push {r3, r4, r5, r6, r7, lr} - 8006226: bf00 nop - 8006228: bcf8 pop {r3, r4, r5, r6, r7} - 800622a: bc08 pop {r3} - 800622c: 469e mov lr, r3 - 800622e: 4770 bx lr +08006b78 : + 8006b78: b508 push {r3, lr} + 8006b7a: f3c0 53c7 ubfx r3, r0, #23, #8 + 8006b7e: 3b7f subs r3, #127 @ 0x7f + 8006b80: 2b16 cmp r3, #22 + 8006b82: 4601 mov r1, r0 + 8006b84: dc0e bgt.n 8006ba4 + 8006b86: 2b00 cmp r3, #0 + 8006b88: 4602 mov r2, r0 + 8006b8a: db10 blt.n 8006bae + 8006b8c: 480b ldr r0, [pc, #44] @ (8006bbc ) + 8006b8e: 4118 asrs r0, r3 + 8006b90: 4201 tst r1, r0 + 8006b92: d005 beq.n 8006ba0 + 8006b94: f44f 0180 mov.w r1, #4194304 @ 0x400000 + 8006b98: 4119 asrs r1, r3 + 8006b9a: 4411 add r1, r2 + 8006b9c: ea21 0100 bic.w r1, r1, r0 + 8006ba0: 4608 mov r0, r1 + 8006ba2: bd08 pop {r3, pc} + 8006ba4: 2b80 cmp r3, #128 @ 0x80 + 8006ba6: d1fb bne.n 8006ba0 + 8006ba8: f7f9 fe74 bl 8000894 <__addsf3> + 8006bac: bd08 pop {r3, pc} + 8006bae: 3301 adds r3, #1 + 8006bb0: f000 4100 and.w r1, r0, #2147483648 @ 0x80000000 + 8006bb4: d1f4 bne.n 8006ba0 + 8006bb6: f041 517e orr.w r1, r1, #1065353216 @ 0x3f800000 + 8006bba: e7f1 b.n 8006ba0 + 8006bbc: 007fffff .word 0x007fffff -08006230 <_fini>: - 8006230: b5f8 push {r3, r4, r5, r6, r7, lr} - 8006232: bf00 nop - 8006234: bcf8 pop {r3, r4, r5, r6, r7} - 8006236: bc08 pop {r3} - 8006238: 469e mov lr, r3 - 800623a: 4770 bx lr +08006bc0 <_init>: + 8006bc0: b5f8 push {r3, r4, r5, r6, r7, lr} + 8006bc2: bf00 nop + 8006bc4: bcf8 pop {r3, r4, r5, r6, r7} + 8006bc6: bc08 pop {r3} + 8006bc8: 469e mov lr, r3 + 8006bca: 4770 bx lr + +08006bcc <_fini>: + 8006bcc: b5f8 push {r3, r4, r5, r6, r7, lr} + 8006bce: bf00 nop + 8006bd0: bcf8 pop {r3, r4, r5, r6, r7} + 8006bd2: bc08 pop {r3} + 8006bd4: 469e mov lr, r3 + 8006bd6: 4770 bx lr diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.map b/Fertirrega_v6/Debug/Fertirrega_v6.map index 8559a7f..32347cc 100644 --- a/Fertirrega_v6/Debug/Fertirrega_v6.map +++ b/Fertirrega_v6/Debug/Fertirrega_v6.map @@ -66,6 +66,8 @@ C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externalt ./Core/Src/ad5934_driver.o (__aeabi_fcmplt) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-wf_sqrt.o) (__aeabi_fcmpun) +C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) + ./Core/Src/ad5934_driver.o (__aeabi_f2iz) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o) ./Core/Src/ad5934_driver.o (__aeabi_f2uiz) @@ -145,15 +147,35 @@ Discarded input sections .text 0x00000000 0x0 ./Core/Src/ad5934_driver.o .data 0x00000000 0x0 ./Core/Src/ad5934_driver.o .bss 0x00000000 0x0 ./Core/Src/ad5934_driver.o + .rodata.AD5934_Scale_Float_Min + 0x00000000 0x3c ./Core/Src/ad5934_driver.o + .rodata.AD5934_Scale_Float_Max + 0x00000000 0x3c ./Core/Src/ad5934_driver.o + .rodata.AD5934_Scale_Out_Min + 0x00000000 0x1e ./Core/Src/ad5934_driver.o + .rodata.AD5934_Scale_Out_Max + 0x00000000 0x1e ./Core/Src/ad5934_driver.o + .bss.reference_resistor + 0x00000000 0x4 ./Core/Src/ad5934_driver.o + .text.AD5934_ReadRegister + 0x00000000 0x90 ./Core/Src/ad5934_driver.o .rodata 0x00000000 0x60 ./Core/Src/ad5934_driver.o .text.AD5934_EC_Calibrate_Temperature 0x00000000 0x144 ./Core/Src/ad5934_driver.o - .text.AD5934_Round_Float_Precision - 0x00000000 0x5c ./Core/Src/ad5934_driver.o + .text.AD5934_GetMagnitude + 0x00000000 0x80 ./Core/Src/ad5934_driver.o + .text.AD5934_GetImpedance + 0x00000000 0x70 ./Core/Src/ad5934_driver.o + .text.AD5934_Compress_To_IntScale + 0x00000000 0x11c ./Core/Src/ad5934_driver.o .text.AD5934_Linear_Correction 0x00000000 0x34 ./Core/Src/ad5934_driver.o .text.AD5934_Calibrate 0x00000000 0x78 ./Core/Src/ad5934_driver.o + .text.AD5934_MovingAvg_Init + 0x00000000 0x50 ./Core/Src/ad5934_driver.o + .text.AD5934_MovingAvg_Process + 0x00000000 0x78 ./Core/Src/ad5934_driver.o .group 0x00000000 0xc ./Core/Src/adc.o .group 0x00000000 0xc ./Core/Src/adc.o .group 0x00000000 0xc ./Core/Src/adc.o @@ -948,8 +970,9 @@ Discarded input sections 0x00000000 0x1e ./Core/Src/main.o .rodata.AD5934_Scale_Out_Max 0x00000000 0x1e ./Core/Src/main.o - .text.FloatToString - 0x00000000 0x228 ./Core/Src/main.o + .rodata 0x00000000 0x11 ./Core/Src/main.o + .text.Convert2Hex + 0x00000000 0x64 ./Core/Src/main.o .debug_macro 0x00000000 0xacc ./Core/Src/main.o .debug_macro 0x00000000 0x227 ./Core/Src/main.o .debug_macro 0x00000000 0x2e ./Core/Src/main.o @@ -1012,7 +1035,7 @@ Discarded input sections .debug_macro 0x00000000 0x16 ./Core/Src/main.o .debug_macro 0x00000000 0x16 ./Core/Src/main.o .debug_macro 0x00000000 0x29 ./Core/Src/main.o - .debug_macro 0x00000000 0x2b2 ./Core/Src/main.o + .debug_macro 0x00000000 0x2ff ./Core/Src/main.o .group 0x00000000 0xc ./Core/Src/rs485_driver.o .group 0x00000000 0xc ./Core/Src/rs485_driver.o .group 0x00000000 0xc ./Core/Src/rs485_driver.o @@ -1778,8 +1801,6 @@ Discarded input sections 0x00000000 0x50 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .text.HAL_GetTickFreq 0x00000000 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .text.HAL_Delay - 0x00000000 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .text.HAL_SuspendTick 0x00000000 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .text.HAL_ResumeTick @@ -4254,40 +4275,20 @@ Discarded input sections .text 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) - .text.roundf 0x00000000 0x48 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) - .debug_frame 0x00000000 0x28 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) - .ARM.attributes - 0x00000000 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) - .text 0x00000000 0x254 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) - .debug_frame 0x00000000 0x30 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) - .ARM.attributes - 0x00000000 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) .text 0x00000000 0x168 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_mulsf3.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_mulsf3.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_mulsf3.o) .debug_frame 0x00000000 0x24 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_mulsf3.o) .ARM.attributes 0x00000000 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_mulsf3.o) - .text 0x00000000 0x378 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o) - .debug_frame 0x00000000 0xac C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o) - .ARM.attributes - 0x00000000 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o) - .text 0x00000000 0x110 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o) - .debug_frame 0x00000000 0xc4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o) - .ARM.attributes - 0x00000000 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o) - .text 0x00000000 0x50 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o) - .debug_frame 0x00000000 0x24 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o) - .ARM.attributes - 0x00000000 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o) @@ -4296,6 +4297,8 @@ Discarded input sections .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) + .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) + .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o) .text 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtend.o @@ -4387,639 +4390,677 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte 0x08000000 g_pfnVectors 0x0800010c . = ALIGN (0x4) -.text 0x0800010c 0x6130 +.text 0x0800010c 0x6acc 0x0800010c . = ALIGN (0x4) *(.text) .text 0x0800010c 0x40 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o .text 0x0800014c 0x10 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) 0x0800014c strlen - .text 0x0800015c 0x21c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o) - 0x0800015c __aeabi_frsub - 0x08000164 __subsf3 - 0x08000164 __aeabi_fsub - 0x08000168 __aeabi_fadd - 0x08000168 __addsf3 - 0x080002c8 __aeabi_ui2f - 0x080002c8 __floatunsisf - 0x080002d0 __aeabi_i2f - 0x080002d0 __floatsisf - 0x080002ec __aeabi_ul2f - 0x080002ec __floatundisf - 0x080002fc __aeabi_l2f - 0x080002fc __floatdisf - .text 0x08000378 0x2a0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o) - 0x08000378 __mulsf3 - 0x08000378 __aeabi_fmul - 0x080004e0 __aeabi_fdiv - 0x080004e0 __divsf3 - .text 0x08000618 0xec C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o) - 0x08000618 __gesf2 - 0x08000618 __gtsf2 - 0x08000620 __lesf2 - 0x08000620 __ltsf2 - 0x08000628 __nesf2 - 0x08000628 __eqsf2 - 0x08000628 __cmpsf2 - 0x08000688 __aeabi_cfrcmple - 0x08000690 __aeabi_cfcmpeq - 0x08000690 __aeabi_cfcmple - 0x080006a0 __aeabi_fcmpeq - 0x080006b4 __aeabi_fcmplt - 0x080006c8 __aeabi_fcmple - 0x080006dc __aeabi_fcmpge - 0x080006f0 __aeabi_fcmpgt - .text 0x08000704 0x2c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) - 0x08000704 __unordsf2 - 0x08000704 __aeabi_fcmpun - .text 0x08000730 0x40 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o) - 0x08000730 __fixunssfsi - 0x08000730 __aeabi_f2uiz + .text 0x0800015c 0x254 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) + 0x0800015c __muldf3 + 0x0800015c __aeabi_dmul + .text 0x080003b0 0x378 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o) + 0x080003b0 __aeabi_drsub + 0x080003b8 __aeabi_dsub + 0x080003b8 __subdf3 + 0x080003bc __aeabi_dadd + 0x080003bc __adddf3 + 0x08000634 __floatunsidf + 0x08000634 __aeabi_ui2d + 0x08000654 __floatsidf + 0x08000654 __aeabi_i2d + 0x08000678 __aeabi_f2d + 0x08000678 __extendsfdf2 + 0x080006bc __floatundidf + 0x080006bc __aeabi_ul2d + 0x080006cc __floatdidf + 0x080006cc __aeabi_l2d + .text 0x08000728 0x110 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o) + 0x08000728 __gtdf2 + 0x08000728 __gedf2 + 0x08000730 __ltdf2 + 0x08000730 __ledf2 + 0x08000738 __nedf2 + 0x08000738 __eqdf2 + 0x08000738 __cmpdf2 + 0x080007b4 __aeabi_cdrcmple + 0x080007c4 __aeabi_cdcmpeq + 0x080007c4 __aeabi_cdcmple + 0x080007d4 __aeabi_dcmpeq + 0x080007e8 __aeabi_dcmplt + 0x080007fc __aeabi_dcmple + 0x08000810 __aeabi_dcmpge + 0x08000824 __aeabi_dcmpgt + .text 0x08000838 0x50 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o) + 0x08000838 __aeabi_d2iz + 0x08000838 __fixdfsi + .text 0x08000888 0x21c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o) + 0x08000888 __aeabi_frsub + 0x08000890 __subsf3 + 0x08000890 __aeabi_fsub + 0x08000894 __aeabi_fadd + 0x08000894 __addsf3 + 0x080009f4 __aeabi_ui2f + 0x080009f4 __floatunsisf + 0x080009fc __aeabi_i2f + 0x080009fc __floatsisf + 0x08000a18 __aeabi_ul2f + 0x08000a18 __floatundisf + 0x08000a28 __aeabi_l2f + 0x08000a28 __floatdisf + .text 0x08000aa4 0x2a0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o) + 0x08000aa4 __mulsf3 + 0x08000aa4 __aeabi_fmul + 0x08000c0c __aeabi_fdiv + 0x08000c0c __divsf3 + .text 0x08000d44 0xec C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o) + 0x08000d44 __gesf2 + 0x08000d44 __gtsf2 + 0x08000d4c __lesf2 + 0x08000d4c __ltsf2 + 0x08000d54 __nesf2 + 0x08000d54 __eqsf2 + 0x08000d54 __cmpsf2 + 0x08000db4 __aeabi_cfrcmple + 0x08000dbc __aeabi_cfcmpeq + 0x08000dbc __aeabi_cfcmple + 0x08000dcc __aeabi_fcmpeq + 0x08000de0 __aeabi_fcmplt + 0x08000df4 __aeabi_fcmple + 0x08000e08 __aeabi_fcmpge + 0x08000e1c __aeabi_fcmpgt + .text 0x08000e30 0x2c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) + 0x08000e30 __unordsf2 + 0x08000e30 __aeabi_fcmpun + .text 0x08000e5c 0x4c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) + 0x08000e5c __aeabi_f2iz + 0x08000e5c __fixsfsi + .text 0x08000ea8 0x40 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o) + 0x08000ea8 __fixunssfsi + 0x08000ea8 __aeabi_f2uiz *(.text*) .text.AD5934_SetRegisterValue - 0x08000770 0x64 ./Core/Src/ad5934_driver.o - 0x08000770 AD5934_SetRegisterValue + 0x08000ee8 0x64 ./Core/Src/ad5934_driver.o + 0x08000ee8 AD5934_SetRegisterValue .text.AD5934_GetRegisterValue - 0x080007d4 0x90 ./Core/Src/ad5934_driver.o - 0x080007d4 AD5934_GetRegisterValue + 0x08000f4c 0x90 ./Core/Src/ad5934_driver.o + 0x08000f4c AD5934_GetRegisterValue .text.AD5934_Init - 0x08000864 0x44 ./Core/Src/ad5934_driver.o - 0x08000864 AD5934_Init + 0x08000fdc 0x44 ./Core/Src/ad5934_driver.o + 0x08000fdc AD5934_Init .text.AD5934_RestartSweep - 0x080008a8 0x30 ./Core/Src/ad5934_driver.o - 0x080008a8 AD5934_RestartSweep + 0x08001020 0x30 ./Core/Src/ad5934_driver.o + 0x08001020 AD5934_RestartSweep .text.AD5934_Repeat_Sweep - 0x080008d8 0x12 ./Core/Src/ad5934_driver.o - 0x080008d8 AD5934_Repeat_Sweep + 0x08001050 0x12 ./Core/Src/ad5934_driver.o + 0x08001050 AD5934_Repeat_Sweep .text.AD5934_StopSweep - 0x080008ea 0x12 ./Core/Src/ad5934_driver.o - 0x080008ea AD5934_StopSweep + 0x08001062 0x12 ./Core/Src/ad5934_driver.o + 0x08001062 AD5934_StopSweep .text.AD5934_Calculate_Temperature - 0x080008fc 0xb0 ./Core/Src/ad5934_driver.o - 0x080008fc AD5934_Calculate_Temperature + 0x08001074 0xf8 ./Core/Src/ad5934_driver.o + 0x08001074 AD5934_Calculate_Temperature .text.AD5934_EC_Compensate_Magnitude_To_25C - 0x080009ac 0x5c ./Core/Src/ad5934_driver.o - 0x080009ac AD5934_EC_Compensate_Magnitude_To_25C - .text.AD5934_GetMagnitude - 0x08000a08 0x80 ./Core/Src/ad5934_driver.o - 0x08000a08 AD5934_GetMagnitude - .text.AD5934_Compress_To_IntScale - 0x08000a88 0x11c ./Core/Src/ad5934_driver.o - 0x08000a88 AD5934_Compress_To_IntScale + 0x0800116c 0x5c ./Core/Src/ad5934_driver.o + 0x0800116c AD5934_EC_Compensate_Magnitude_To_25C + .text.AD5934_Get_Real_Imag_Numbers + 0x080011c8 0x1a ./Core/Src/ad5934_driver.o + 0x080011c8 AD5934_Get_Real_Imag_Numbers + *fill* 0x080011e2 0x2 + .text.AD5934_Round_Float_Precision + 0x080011e4 0x5c ./Core/Src/ad5934_driver.o + 0x080011e4 AD5934_Round_Float_Precision .text.AD5934_Process_System - 0x08000ba4 0x250 ./Core/Src/ad5934_driver.o - 0x08000ba4 AD5934_Process_System + 0x08001240 0x2a4 ./Core/Src/ad5934_driver.o + 0x08001240 AD5934_Process_System .text.AD5934_Sort_Array - 0x08000df4 0x98 ./Core/Src/ad5934_driver.o - 0x08000df4 AD5934_Sort_Array + 0x080014e4 0x98 ./Core/Src/ad5934_driver.o + 0x080014e4 AD5934_Sort_Array .text.AD5934_Trimmed_Mean - 0x08000e8c 0x8c ./Core/Src/ad5934_driver.o - 0x08000e8c AD5934_Trimmed_Mean + 0x0800157c 0x8c ./Core/Src/ad5934_driver.o + 0x0800157c AD5934_Trimmed_Mean .text.AD5934_History_Average - 0x08000f18 0x58 ./Core/Src/ad5934_driver.o - 0x08000f18 AD5934_History_Average + 0x08001608 0x58 ./Core/Src/ad5934_driver.o + 0x08001608 AD5934_History_Average .text.AD5934_Process_Sample - 0x08000f70 0x138 ./Core/Src/ad5934_driver.o - 0x08000f70 AD5934_Process_Sample + 0x08001660 0x130 ./Core/Src/ad5934_driver.o + 0x08001660 AD5934_Process_Sample .text.AD5934_RTD_NewSample - 0x080010a8 0x1c ./Core/Src/ad5934_driver.o - 0x080010a8 AD5934_RTD_NewSample + 0x08001790 0x1c ./Core/Src/ad5934_driver.o + 0x08001790 AD5934_RTD_NewSample .text.AD5934_EC_NewSample - 0x080010c4 0x1c ./Core/Src/ad5934_driver.o - 0x080010c4 AD5934_EC_NewSample + 0x080017ac 0x1c ./Core/Src/ad5934_driver.o + 0x080017ac AD5934_EC_NewSample .text.AD5934_Reference_NewSample - 0x080010e0 0x1c ./Core/Src/ad5934_driver.o - 0x080010e0 AD5934_Reference_NewSample + 0x080017c8 0x1c ./Core/Src/ad5934_driver.o + 0x080017c8 AD5934_Reference_NewSample .text.ADG715_SetRegisterValue - 0x080010fc 0x30 ./Core/Src/ad5934_driver.o - 0x080010fc ADG715_SetRegisterValue + 0x080017e4 0x30 ./Core/Src/ad5934_driver.o + 0x080017e4 ADG715_SetRegisterValue .text.ADG715_ResetChannels - 0x0800112c 0xe ./Core/Src/ad5934_driver.o - 0x0800112c ADG715_ResetChannels - *fill* 0x0800113a 0x2 + 0x08001814 0xe ./Core/Src/ad5934_driver.o + 0x08001814 ADG715_ResetChannels + *fill* 0x08001822 0x2 .text.ADG715_SetChannels - 0x0800113c 0x2c ./Core/Src/ad5934_driver.o - 0x0800113c ADG715_SetChannels + 0x08001824 0x2c ./Core/Src/ad5934_driver.o + 0x08001824 ADG715_SetChannels .text.MX_ADC1_Init - 0x08001168 0x7c ./Core/Src/adc.o - 0x08001168 MX_ADC1_Init + 0x08001850 0x7c ./Core/Src/adc.o + 0x08001850 MX_ADC1_Init .text.MX_ADC2_Init - 0x080011e4 0x7c ./Core/Src/adc.o - 0x080011e4 MX_ADC2_Init + 0x080018cc 0x7c ./Core/Src/adc.o + 0x080018cc MX_ADC2_Init .text.HAL_ADC_MspInit - 0x08001260 0xcc ./Core/Src/adc.o - 0x08001260 HAL_ADC_MspInit + 0x08001948 0xcc ./Core/Src/adc.o + 0x08001948 HAL_ADC_MspInit .text.writeRegister - 0x0800132c 0x42 ./Core/Src/ads1015_driver.o + 0x08001a14 0x42 ./Core/Src/ads1015_driver.o .text.readRegister - 0x0800136e 0x54 ./Core/Src/ads1015_driver.o - *fill* 0x080013c2 0x2 + 0x08001a56 0x54 ./Core/Src/ads1015_driver.o + *fill* 0x08001aaa 0x2 .text.ADS1015_Init - 0x080013c4 0x34 ./Core/Src/ads1015_driver.o - 0x080013c4 ADS1015_Init + 0x08001aac 0x34 ./Core/Src/ads1015_driver.o + 0x08001aac ADS1015_Init .text.ADS1015_Compress_To_IntScale - 0x080013f8 0x88 ./Core/Src/ads1015_driver.o - 0x080013f8 ADS1015_Compress_To_IntScale + 0x08001ae0 0x88 ./Core/Src/ads1015_driver.o + 0x08001ae0 ADS1015_Compress_To_IntScale .text.ADS1015_Process_System - 0x08001480 0x114 ./Core/Src/ads1015_driver.o - 0x08001480 ADS1015_Process_System + 0x08001b68 0x114 ./Core/Src/ads1015_driver.o + 0x08001b68 ADS1015_Process_System .text.ADS1015_Sort_Array - 0x08001594 0x98 ./Core/Src/ads1015_driver.o - 0x08001594 ADS1015_Sort_Array + 0x08001c7c 0x98 ./Core/Src/ads1015_driver.o + 0x08001c7c ADS1015_Sort_Array .text.ADS1015_Trimmed_Mean - 0x0800162c 0x8c ./Core/Src/ads1015_driver.o - 0x0800162c ADS1015_Trimmed_Mean + 0x08001d14 0x8c ./Core/Src/ads1015_driver.o + 0x08001d14 ADS1015_Trimmed_Mean .text.ADS1015_History_Average - 0x080016b8 0x58 ./Core/Src/ads1015_driver.o - 0x080016b8 ADS1015_History_Average + 0x08001da0 0x58 ./Core/Src/ads1015_driver.o + 0x08001da0 ADS1015_History_Average .text.ADS1015_Process_Sample - 0x08001710 0x138 ./Core/Src/ads1015_driver.o - 0x08001710 ADS1015_Process_Sample + 0x08001df8 0x138 ./Core/Src/ads1015_driver.o + 0x08001df8 ADS1015_Process_Sample .text.ADS1015_pH_NewSample - 0x08001848 0x1c ./Core/Src/ads1015_driver.o - 0x08001848 ADS1015_pH_NewSample + 0x08001f30 0x1c ./Core/Src/ads1015_driver.o + 0x08001f30 ADS1015_pH_NewSample .text.digital_outputs_init - 0x08001864 0x84 ./Core/Src/digital_outputs_driver.o - 0x08001864 digital_outputs_init + 0x08001f4c 0x84 ./Core/Src/digital_outputs_driver.o + 0x08001f4c digital_outputs_init .text.digital_outputs_set_state - 0x080018e8 0x70 ./Core/Src/digital_outputs_driver.o - 0x080018e8 digital_outputs_set_state + 0x08001fd0 0x70 ./Core/Src/digital_outputs_driver.o + 0x08001fd0 digital_outputs_set_state .text.digital_outputs_toggle - 0x08001958 0x3c ./Core/Src/digital_outputs_driver.o - 0x08001958 digital_outputs_toggle + 0x08002040 0x3c ./Core/Src/digital_outputs_driver.o + 0x08002040 digital_outputs_toggle .text.MX_GPIO_Init - 0x08001994 0x140 ./Core/Src/gpio.o - 0x08001994 MX_GPIO_Init + 0x0800207c 0x140 ./Core/Src/gpio.o + 0x0800207c MX_GPIO_Init .text.MX_I2C1_Init - 0x08001ad4 0x5c ./Core/Src/i2c.o - 0x08001ad4 MX_I2C1_Init + 0x080021bc 0x5c ./Core/Src/i2c.o + 0x080021bc MX_I2C1_Init .text.MX_I2C2_Init - 0x08001b30 0x5c ./Core/Src/i2c.o - 0x08001b30 MX_I2C2_Init + 0x08002218 0x5c ./Core/Src/i2c.o + 0x08002218 MX_I2C2_Init .text.HAL_I2C_MspInit - 0x08001b8c 0xd8 ./Core/Src/i2c.o - 0x08001b8c HAL_I2C_MspInit - .text.main 0x08001c64 0x2b8 ./Core/Src/main.o - 0x08001c64 main + 0x08002274 0xd8 ./Core/Src/i2c.o + 0x08002274 HAL_I2C_MspInit + .text.main 0x0800234c 0x2b4 ./Core/Src/main.o + 0x0800234c main .text.SystemClock_Config - 0x08001f1c 0xa0 ./Core/Src/main.o - 0x08001f1c SystemClock_Config + 0x08002600 0xa0 ./Core/Src/main.o + 0x08002600 SystemClock_Config + .text.FloatToString + 0x080026a0 0x228 ./Core/Src/main.o + 0x080026a0 FloatToString .text.intToStr - 0x08001fbc 0x198 ./Core/Src/main.o - 0x08001fbc intToStr + 0x080028c8 0x198 ./Core/Src/main.o + 0x080028c8 intToStr .text.HAL_TIM_PeriodElapsedCallback - 0x08002154 0x30 ./Core/Src/main.o - 0x08002154 HAL_TIM_PeriodElapsedCallback + 0x08002a60 0x30 ./Core/Src/main.o + 0x08002a60 HAL_TIM_PeriodElapsedCallback .text.Error_Handler - 0x08002184 0xc ./Core/Src/main.o - 0x08002184 Error_Handler + 0x08002a90 0xc ./Core/Src/main.o + 0x08002a90 Error_Handler .text.LL_GPIO_ReadInputPort - 0x08002190 0x16 ./Core/Src/rs485_driver.o - *fill* 0x080021a6 0x2 + 0x08002a9c 0x16 ./Core/Src/rs485_driver.o + *fill* 0x08002ab2 0x2 .text.rs485_init - 0x080021a8 0x20 ./Core/Src/rs485_driver.o - 0x080021a8 rs485_init + 0x08002ab4 0x20 ./Core/Src/rs485_driver.o + 0x08002ab4 rs485_init .text.rs485_get_address - 0x080021c8 0x38 ./Core/Src/rs485_driver.o - 0x080021c8 rs485_get_address + 0x08002ad4 0x38 ./Core/Src/rs485_driver.o + 0x08002ad4 rs485_get_address .text.rs485_send_broadcast - 0x08002200 0x48 ./Core/Src/rs485_driver.o - 0x08002200 rs485_send_broadcast + 0x08002b0c 0x48 ./Core/Src/rs485_driver.o + 0x08002b0c rs485_send_broadcast .text.rs485_enable_tx - 0x08002248 0x18 ./Core/Src/rs485_driver.o - 0x08002248 rs485_enable_tx + 0x08002b54 0x18 ./Core/Src/rs485_driver.o + 0x08002b54 rs485_enable_tx .text.rs485_disable_tx - 0x08002260 0x18 ./Core/Src/rs485_driver.o - 0x08002260 rs485_disable_tx + 0x08002b6c 0x18 ./Core/Src/rs485_driver.o + 0x08002b6c rs485_disable_tx .text.rs485_configure_gpio_address - 0x08002278 0x8c ./Core/Src/rs485_driver.o + 0x08002b84 0x8c ./Core/Src/rs485_driver.o .text.rs485_configure_usart1 - 0x08002304 0x74 ./Core/Src/rs485_driver.o + 0x08002c10 0x74 ./Core/Src/rs485_driver.o .text.HAL_MspInit - 0x08002378 0x64 ./Core/Src/stm32f1xx_hal_msp.o - 0x08002378 HAL_MspInit + 0x08002c84 0x64 ./Core/Src/stm32f1xx_hal_msp.o + 0x08002c84 HAL_MspInit .text.NMI_Handler - 0x080023dc 0x8 ./Core/Src/stm32f1xx_it.o - 0x080023dc NMI_Handler + 0x08002ce8 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002ce8 NMI_Handler .text.HardFault_Handler - 0x080023e4 0x8 ./Core/Src/stm32f1xx_it.o - 0x080023e4 HardFault_Handler + 0x08002cf0 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002cf0 HardFault_Handler .text.MemManage_Handler - 0x080023ec 0x8 ./Core/Src/stm32f1xx_it.o - 0x080023ec MemManage_Handler + 0x08002cf8 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002cf8 MemManage_Handler .text.BusFault_Handler - 0x080023f4 0x8 ./Core/Src/stm32f1xx_it.o - 0x080023f4 BusFault_Handler + 0x08002d00 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002d00 BusFault_Handler .text.UsageFault_Handler - 0x080023fc 0x8 ./Core/Src/stm32f1xx_it.o - 0x080023fc UsageFault_Handler + 0x08002d08 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002d08 UsageFault_Handler .text.SVC_Handler - 0x08002404 0xc ./Core/Src/stm32f1xx_it.o - 0x08002404 SVC_Handler + 0x08002d10 0xc ./Core/Src/stm32f1xx_it.o + 0x08002d10 SVC_Handler .text.DebugMon_Handler - 0x08002410 0xc ./Core/Src/stm32f1xx_it.o - 0x08002410 DebugMon_Handler + 0x08002d1c 0xc ./Core/Src/stm32f1xx_it.o + 0x08002d1c DebugMon_Handler .text.PendSV_Handler - 0x0800241c 0xc ./Core/Src/stm32f1xx_it.o - 0x0800241c PendSV_Handler + 0x08002d28 0xc ./Core/Src/stm32f1xx_it.o + 0x08002d28 PendSV_Handler .text.SysTick_Handler - 0x08002428 0xc ./Core/Src/stm32f1xx_it.o - 0x08002428 SysTick_Handler + 0x08002d34 0xc ./Core/Src/stm32f1xx_it.o + 0x08002d34 SysTick_Handler .text.TIM3_IRQHandler - 0x08002434 0x14 ./Core/Src/stm32f1xx_it.o - 0x08002434 TIM3_IRQHandler + 0x08002d40 0x14 ./Core/Src/stm32f1xx_it.o + 0x08002d40 TIM3_IRQHandler .text.USART1_IRQHandler - 0x08002448 0x14 ./Core/Src/stm32f1xx_it.o - 0x08002448 USART1_IRQHandler + 0x08002d54 0x14 ./Core/Src/stm32f1xx_it.o + 0x08002d54 USART1_IRQHandler .text.SystemInit - 0x0800245c 0xc ./Core/Src/system_stm32f1xx.o - 0x0800245c SystemInit + 0x08002d68 0xc ./Core/Src/system_stm32f1xx.o + 0x08002d68 SystemInit .text.MX_TIM3_Init - 0x08002468 0x9c ./Core/Src/tim.o - 0x08002468 MX_TIM3_Init + 0x08002d74 0x9c ./Core/Src/tim.o + 0x08002d74 MX_TIM3_Init .text.HAL_TIM_Base_MspInit - 0x08002504 0x4c ./Core/Src/tim.o - 0x08002504 HAL_TIM_Base_MspInit + 0x08002e10 0x4c ./Core/Src/tim.o + 0x08002e10 HAL_TIM_Base_MspInit .text.MX_USART1_UART_Init - 0x08002550 0x54 ./Core/Src/usart.o - 0x08002550 MX_USART1_UART_Init + 0x08002e5c 0x54 ./Core/Src/usart.o + 0x08002e5c MX_USART1_UART_Init .text.HAL_UART_MspInit - 0x080025a4 0xa8 ./Core/Src/usart.o - 0x080025a4 HAL_UART_MspInit + 0x08002eb0 0xa8 ./Core/Src/usart.o + 0x08002eb0 HAL_UART_MspInit .text.Reset_Handler - 0x0800264c 0x48 ./Core/Startup/startup_stm32f103c8tx.o - 0x0800264c Reset_Handler + 0x08002f58 0x48 ./Core/Startup/startup_stm32f103c8tx.o + 0x08002f58 Reset_Handler .text.Default_Handler - 0x08002694 0x2 ./Core/Startup/startup_stm32f103c8tx.o - 0x08002694 RTC_Alarm_IRQHandler - 0x08002694 EXTI2_IRQHandler - 0x08002694 TIM1_CC_IRQHandler - 0x08002694 PVD_IRQHandler - 0x08002694 EXTI3_IRQHandler - 0x08002694 EXTI0_IRQHandler - 0x08002694 I2C2_EV_IRQHandler - 0x08002694 ADC1_2_IRQHandler - 0x08002694 SPI1_IRQHandler - 0x08002694 TAMPER_IRQHandler - 0x08002694 DMA1_Channel4_IRQHandler - 0x08002694 USART3_IRQHandler - 0x08002694 RTC_IRQHandler - 0x08002694 DMA1_Channel7_IRQHandler - 0x08002694 CAN1_RX1_IRQHandler - 0x08002694 TIM4_IRQHandler - 0x08002694 I2C1_EV_IRQHandler - 0x08002694 DMA1_Channel6_IRQHandler - 0x08002694 RCC_IRQHandler - 0x08002694 TIM1_TRG_COM_IRQHandler - 0x08002694 DMA1_Channel1_IRQHandler - 0x08002694 Default_Handler - 0x08002694 EXTI15_10_IRQHandler - 0x08002694 EXTI9_5_IRQHandler - 0x08002694 SPI2_IRQHandler - 0x08002694 DMA1_Channel5_IRQHandler - 0x08002694 EXTI4_IRQHandler - 0x08002694 USB_LP_CAN1_RX0_IRQHandler - 0x08002694 USB_HP_CAN1_TX_IRQHandler - 0x08002694 DMA1_Channel3_IRQHandler - 0x08002694 TIM1_UP_IRQHandler - 0x08002694 WWDG_IRQHandler - 0x08002694 TIM2_IRQHandler - 0x08002694 TIM1_BRK_IRQHandler - 0x08002694 EXTI1_IRQHandler - 0x08002694 USART2_IRQHandler - 0x08002694 I2C2_ER_IRQHandler - 0x08002694 DMA1_Channel2_IRQHandler - 0x08002694 CAN1_SCE_IRQHandler - 0x08002694 FLASH_IRQHandler - 0x08002694 I2C1_ER_IRQHandler - 0x08002694 USBWakeUp_IRQHandler - *fill* 0x08002696 0x2 + 0x08002fa0 0x2 ./Core/Startup/startup_stm32f103c8tx.o + 0x08002fa0 RTC_Alarm_IRQHandler + 0x08002fa0 EXTI2_IRQHandler + 0x08002fa0 TIM1_CC_IRQHandler + 0x08002fa0 PVD_IRQHandler + 0x08002fa0 EXTI3_IRQHandler + 0x08002fa0 EXTI0_IRQHandler + 0x08002fa0 I2C2_EV_IRQHandler + 0x08002fa0 ADC1_2_IRQHandler + 0x08002fa0 SPI1_IRQHandler + 0x08002fa0 TAMPER_IRQHandler + 0x08002fa0 DMA1_Channel4_IRQHandler + 0x08002fa0 USART3_IRQHandler + 0x08002fa0 RTC_IRQHandler + 0x08002fa0 DMA1_Channel7_IRQHandler + 0x08002fa0 CAN1_RX1_IRQHandler + 0x08002fa0 TIM4_IRQHandler + 0x08002fa0 I2C1_EV_IRQHandler + 0x08002fa0 DMA1_Channel6_IRQHandler + 0x08002fa0 RCC_IRQHandler + 0x08002fa0 TIM1_TRG_COM_IRQHandler + 0x08002fa0 DMA1_Channel1_IRQHandler + 0x08002fa0 Default_Handler + 0x08002fa0 EXTI15_10_IRQHandler + 0x08002fa0 EXTI9_5_IRQHandler + 0x08002fa0 SPI2_IRQHandler + 0x08002fa0 DMA1_Channel5_IRQHandler + 0x08002fa0 EXTI4_IRQHandler + 0x08002fa0 USB_LP_CAN1_RX0_IRQHandler + 0x08002fa0 USB_HP_CAN1_TX_IRQHandler + 0x08002fa0 DMA1_Channel3_IRQHandler + 0x08002fa0 TIM1_UP_IRQHandler + 0x08002fa0 WWDG_IRQHandler + 0x08002fa0 TIM2_IRQHandler + 0x08002fa0 TIM1_BRK_IRQHandler + 0x08002fa0 EXTI1_IRQHandler + 0x08002fa0 USART2_IRQHandler + 0x08002fa0 I2C2_ER_IRQHandler + 0x08002fa0 DMA1_Channel2_IRQHandler + 0x08002fa0 CAN1_SCE_IRQHandler + 0x08002fa0 FLASH_IRQHandler + 0x08002fa0 I2C1_ER_IRQHandler + 0x08002fa0 USBWakeUp_IRQHandler + *fill* 0x08002fa2 0x2 .text.HAL_Init - 0x08002698 0x2c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08002698 HAL_Init + 0x08002fa4 0x2c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002fa4 HAL_Init .text.HAL_InitTick - 0x080026c4 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x080026c4 HAL_InitTick + 0x08002fd0 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002fd0 HAL_InitTick .text.HAL_IncTick - 0x08002724 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08002724 HAL_IncTick + 0x08003030 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08003030 HAL_IncTick .text.HAL_GetTick - 0x08002748 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08002748 HAL_GetTick + 0x08003054 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08003054 HAL_GetTick + .text.HAL_Delay + 0x08003068 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08003068 HAL_Delay .text.HAL_ADC_Init - 0x0800275c 0x1b0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x0800275c HAL_ADC_Init + 0x080030b0 0x1b0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x080030b0 HAL_ADC_Init .text.HAL_ADC_ConfigChannel - 0x0800290c 0x1f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x0800290c HAL_ADC_ConfigChannel + 0x08003260 0x1f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x08003260 HAL_ADC_ConfigChannel .text.ADC_ConversionStop_Disable - 0x08002afc 0x82 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x08002afc ADC_ConversionStop_Disable - *fill* 0x08002b7e 0x2 + 0x08003450 0x82 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x08003450 ADC_ConversionStop_Disable + *fill* 0x080034d2 0x2 .text.__NVIC_SetPriorityGrouping - 0x08002b80 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080034d4 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_GetPriorityGrouping - 0x08002bc8 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x0800351c 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_EnableIRQ - 0x08002be4 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003538 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_SetPriority - 0x08002c1c 0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003570 0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.NVIC_EncodePriority - 0x08002c70 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080035c4 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.SysTick_Config - 0x08002cd4 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003628 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.HAL_NVIC_SetPriorityGrouping - 0x08002d18 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08002d18 HAL_NVIC_SetPriorityGrouping + 0x0800366c 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x0800366c HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x08002d2e 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08002d2e HAL_NVIC_SetPriority + 0x08003682 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003682 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08002d66 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08002d66 HAL_NVIC_EnableIRQ + 0x080036ba 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080036ba HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08002d82 0x18 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08002d82 HAL_SYSTICK_Config + 0x080036d6 0x18 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080036d6 HAL_SYSTICK_Config .text.HAL_DMA_Abort - 0x08002d9a 0x76 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x08002d9a HAL_DMA_Abort + 0x080036ee 0x76 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x080036ee HAL_DMA_Abort .text.HAL_DMA_Abort_IT - 0x08002e10 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x08002e10 HAL_DMA_Abort_IT + 0x08003764 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x08003764 HAL_DMA_Abort_IT .text.HAL_GPIO_Init - 0x08002f00 0x308 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08002f00 HAL_GPIO_Init + 0x08003854 0x308 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003854 HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x08003208 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08003208 HAL_GPIO_ReadPin + 0x08003b5c 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003b5c HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x08003236 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08003236 HAL_GPIO_WritePin + 0x08003b8a 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003b8a HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x08003266 0x32 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08003266 HAL_GPIO_TogglePin + 0x08003bba 0x32 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003bba HAL_GPIO_TogglePin .text.HAL_I2C_Init - 0x08003298 0x288 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x08003298 HAL_I2C_Init + 0x08003bec 0x288 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08003bec HAL_I2C_Init .text.HAL_I2C_Master_Transmit - 0x08003520 0x1fc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x08003520 HAL_I2C_Master_Transmit + 0x08003e74 0x1fc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08003e74 HAL_I2C_Master_Transmit .text.HAL_I2C_Master_Receive - 0x0800371c 0x4d8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x0800371c HAL_I2C_Master_Receive + 0x08004070 0x4d8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004070 HAL_I2C_Master_Receive .text.I2C_MasterRequestWrite - 0x08003bf4 0x104 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004548 0x104 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_MasterRequestRead - 0x08003cf8 0x19c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x0800464c 0x19c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnFlagUntilTimeout - 0x08003e94 0xf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x080047e8 0xf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnMasterAddressFlagUntilTimeout - 0x08003f88 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x080048dc 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnTXEFlagUntilTimeout - 0x080040c8 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004a1c 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnBTFFlagUntilTimeout - 0x08004158 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004aac 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnRXNEFlagUntilTimeout - 0x080041e8 0xba ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004b3c 0xba ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_IsAcknowledgeFailed - 0x080042a2 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - *fill* 0x080042fe 0x2 + 0x08004bf6 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + *fill* 0x08004c52 0x2 .text.HAL_RCC_OscConfig - 0x08004300 0x504 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004300 HAL_RCC_OscConfig + 0x08004c54 0x504 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08004c54 HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x08004804 0x1d4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004804 HAL_RCC_ClockConfig + 0x08005158 0x1d4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005158 HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x080049d8 0xac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x080049d8 HAL_RCC_GetSysClockFreq + 0x0800532c 0xac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x0800532c HAL_RCC_GetSysClockFreq .text.HAL_RCC_GetHCLKFreq - 0x08004a84 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004a84 HAL_RCC_GetHCLKFreq + 0x080053d8 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x080053d8 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x08004a98 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004a98 HAL_RCC_GetPCLK1Freq + 0x080053ec 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x080053ec HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x08004ac0 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004ac0 HAL_RCC_GetPCLK2Freq + 0x08005414 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005414 HAL_RCC_GetPCLK2Freq .text.RCC_Delay - 0x08004ae8 0x3c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x0800543c 0x3c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .text.HAL_RCCEx_PeriphCLKConfig - 0x08004b24 0x16c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - 0x08004b24 HAL_RCCEx_PeriphCLKConfig + 0x08005478 0x16c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + 0x08005478 HAL_RCCEx_PeriphCLKConfig .text.HAL_TIM_Base_Init - 0x08004c90 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004c90 HAL_TIM_Base_Init - *fill* 0x08004d2e 0x2 + 0x080055e4 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x080055e4 HAL_TIM_Base_Init + *fill* 0x08005682 0x2 .text.HAL_TIM_Base_Start_IT - 0x08004d30 0xa4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004d30 HAL_TIM_Base_Start_IT + 0x08005684 0xa4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005684 HAL_TIM_Base_Start_IT .text.HAL_TIM_IRQHandler - 0x08004dd4 0x1e0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004dd4 HAL_TIM_IRQHandler + 0x08005728 0x1e0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005728 HAL_TIM_IRQHandler .text.HAL_TIM_ConfigClockSource - 0x08004fb4 0x18e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004fb4 HAL_TIM_ConfigClockSource + 0x08005908 0x18e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005908 HAL_TIM_ConfigClockSource .text.HAL_TIM_OC_DelayElapsedCallback - 0x08005142 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08005142 HAL_TIM_OC_DelayElapsedCallback + 0x08005a96 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005a96 HAL_TIM_OC_DelayElapsedCallback .text.HAL_TIM_IC_CaptureCallback - 0x08005154 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08005154 HAL_TIM_IC_CaptureCallback + 0x08005aa8 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005aa8 HAL_TIM_IC_CaptureCallback .text.HAL_TIM_PWM_PulseFinishedCallback - 0x08005166 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08005166 HAL_TIM_PWM_PulseFinishedCallback + 0x08005aba 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005aba HAL_TIM_PWM_PulseFinishedCallback .text.HAL_TIM_TriggerCallback - 0x08005178 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08005178 HAL_TIM_TriggerCallback - *fill* 0x0800518a 0x2 + 0x08005acc 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005acc HAL_TIM_TriggerCallback + *fill* 0x08005ade 0x2 .text.TIM_Base_SetConfig - 0x0800518c 0xdc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x0800518c TIM_Base_SetConfig + 0x08005ae0 0xdc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005ae0 TIM_Base_SetConfig .text.TIM_TI1_ConfigInputStage - 0x08005268 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005bbc 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .text.TIM_TI2_ConfigInputStage - 0x080052c4 0x5e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005c18 0x5e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .text.TIM_ITRx_SetConfig - 0x08005322 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005c76 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .text.TIM_ETR_SetConfig - 0x08005356 0x3e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08005356 TIM_ETR_SetConfig + 0x08005caa 0x3e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005caa TIM_ETR_SetConfig .text.HAL_TIMEx_MasterConfigSynchronization - 0x08005394 0xbc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - 0x08005394 HAL_TIMEx_MasterConfigSynchronization + 0x08005ce8 0xbc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x08005ce8 HAL_TIMEx_MasterConfigSynchronization .text.HAL_TIMEx_CommutCallback - 0x08005450 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - 0x08005450 HAL_TIMEx_CommutCallback + 0x08005da4 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x08005da4 HAL_TIMEx_CommutCallback .text.HAL_TIMEx_BreakCallback - 0x08005462 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - 0x08005462 HAL_TIMEx_BreakCallback + 0x08005db6 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x08005db6 HAL_TIMEx_BreakCallback .text.HAL_UART_Init - 0x08005474 0xa0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x08005474 HAL_UART_Init + 0x08005dc8 0xa0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005dc8 HAL_UART_Init .text.HAL_UART_Transmit - 0x08005514 0x116 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x08005514 HAL_UART_Transmit - *fill* 0x0800562a 0x2 + 0x08005e68 0x116 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005e68 HAL_UART_Transmit + *fill* 0x08005f7e 0x2 .text.HAL_UART_IRQHandler - 0x0800562c 0x524 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x0800562c HAL_UART_IRQHandler + 0x08005f80 0x524 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005f80 HAL_UART_IRQHandler .text.HAL_UART_TxCpltCallback - 0x08005b50 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x08005b50 HAL_UART_TxCpltCallback + 0x080064a4 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x080064a4 HAL_UART_TxCpltCallback .text.HAL_UART_RxCpltCallback - 0x08005b62 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x08005b62 HAL_UART_RxCpltCallback + 0x080064b6 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x080064b6 HAL_UART_RxCpltCallback .text.HAL_UART_ErrorCallback - 0x08005b74 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x08005b74 HAL_UART_ErrorCallback + 0x080064c8 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x080064c8 HAL_UART_ErrorCallback .text.HAL_UARTEx_RxEventCallback - 0x08005b86 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x08005b86 HAL_UARTEx_RxEventCallback + 0x080064da 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x080064da HAL_UARTEx_RxEventCallback .text.UART_WaitOnFlagUntilTimeout - 0x08005b9c 0xb2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x080064f0 0xb2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text.UART_EndRxTransfer - 0x08005c4e 0xc4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x080065a2 0xc4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text.UART_DMAAbortOnError - 0x08005d12 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08006666 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text.UART_Transmit_IT - 0x08005d3a 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x0800668e 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text.UART_EndTransmit_IT - 0x08005dd8 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x0800672c 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text.UART_Receive_IT - 0x08005e08 0x17c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x0800675c 0x17c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text.UART_SetConfig - 0x08005f84 0x11c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - .text.memset 0x080060a0 0x10 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memset.o) - 0x080060a0 memset - .text.__errno 0x080060b0 0xc C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-errno.o) - 0x080060b0 __errno + 0x080068d8 0x11c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + .text.memset 0x080069f4 0x10 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memset.o) + 0x080069f4 memset + .text.__errno 0x08006a04 0xc C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-errno.o) + 0x08006a04 __errno .text.__libc_init_array - 0x080060bc 0x48 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-init.o) - 0x080060bc __libc_init_array - .text.sqrtf 0x08006104 0x3c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-wf_sqrt.o) - 0x08006104 sqrtf + 0x08006a10 0x48 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-init.o) + 0x08006a10 __libc_init_array + .text.sqrtf 0x08006a58 0x3c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-wf_sqrt.o) + 0x08006a58 sqrtf .text.__ieee754_sqrtf - 0x08006140 0xe4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) - 0x08006140 __ieee754_sqrtf + 0x08006a94 0xe4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) + 0x08006a94 __ieee754_sqrtf + .text.roundf 0x08006b78 0x48 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) + 0x08006b78 roundf *(.glue_7) - .glue_7 0x08006224 0x0 linker stubs + .glue_7 0x08006bc0 0x0 linker stubs *(.glue_7t) - .glue_7t 0x08006224 0x0 linker stubs + .glue_7t 0x08006bc0 0x0 linker stubs *(.eh_frame) - .eh_frame 0x08006224 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + .eh_frame 0x08006bc0 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o *(.init) - .init 0x08006224 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crti.o - 0x08006224 _init - .init 0x08006228 0x8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtn.o + .init 0x08006bc0 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crti.o + 0x08006bc0 _init + .init 0x08006bc4 0x8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtn.o *(.fini) - .fini 0x08006230 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crti.o - 0x08006230 _fini - .fini 0x08006234 0x8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtn.o - 0x0800623c . = ALIGN (0x4) - 0x0800623c _etext = . + .fini 0x08006bcc 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crti.o + 0x08006bcc _fini + .fini 0x08006bd0 0x8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtn.o + 0x08006bd8 . = ALIGN (0x4) + 0x08006bd8 _etext = . -.vfp11_veneer 0x0800623c 0x0 - .vfp11_veneer 0x0800623c 0x0 linker stubs +.vfp11_veneer 0x08006bd8 0x0 + .vfp11_veneer 0x08006bd8 0x0 linker stubs -.v4_bx 0x0800623c 0x0 - .v4_bx 0x0800623c 0x0 linker stubs +.v4_bx 0x08006bd8 0x0 + .v4_bx 0x08006bd8 0x0 linker stubs -.iplt 0x0800623c 0x0 - .iplt 0x0800623c 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o +.iplt 0x08006bd8 0x0 + .iplt 0x08006bd8 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o -.rodata 0x0800623c 0x13c - 0x0800623c . = ALIGN (0x4) +.rodata 0x08006bd8 0x84 + 0x08006bd8 . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.ADG715_Channel_Map - 0x0800623c 0xf ./Core/Src/ad5934_driver.o - *fill* 0x0800624b 0x1 - .rodata.AD5934_Scale_Float_Min - 0x0800624c 0x3c ./Core/Src/ad5934_driver.o - .rodata.AD5934_Scale_Float_Max - 0x08006288 0x3c ./Core/Src/ad5934_driver.o - .rodata.AD5934_Scale_Out_Min - 0x080062c4 0x1e ./Core/Src/ad5934_driver.o - *fill* 0x080062e2 0x2 - .rodata.AD5934_Scale_Out_Max - 0x080062e4 0x1e ./Core/Src/ad5934_driver.o - *fill* 0x08006302 0x2 + 0x08006bd8 0xf ./Core/Src/ad5934_driver.o + *fill* 0x08006be7 0x1 .rodata.output_pins - 0x08006304 0x40 ./Core/Src/digital_outputs_driver.o + 0x08006be8 0x40 ./Core/Src/digital_outputs_driver.o .rodata.AHBPrescTable - 0x08006344 0x10 ./Core/Src/system_stm32f1xx.o - 0x08006344 AHBPrescTable + 0x08006c28 0x10 ./Core/Src/system_stm32f1xx.o + 0x08006c28 AHBPrescTable .rodata.APBPrescTable - 0x08006354 0x8 ./Core/Src/system_stm32f1xx.o - 0x08006354 APBPrescTable + 0x08006c38 0x8 ./Core/Src/system_stm32f1xx.o + 0x08006c38 APBPrescTable .rodata.aPLLMULFactorTable.1 - 0x0800635c 0x10 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08006c40 0x10 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .rodata.aPredivFactorTable.0 - 0x0800636c 0x2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - *fill* 0x0800636e 0x2 - .rodata.tiny 0x08006370 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) - .rodata.one 0x08006374 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) - 0x08006378 . = ALIGN (0x4) + 0x08006c50 0x2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + *fill* 0x08006c52 0x2 + .rodata.tiny 0x08006c54 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) + .rodata.one 0x08006c58 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) + 0x08006c5c . = ALIGN (0x4) -.ARM.extab 0x08006378 0x0 - 0x08006378 . = ALIGN (0x4) +.ARM.extab 0x08006c5c 0x0 + 0x08006c5c . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x08006378 . = ALIGN (0x4) + 0x08006c5c . = ALIGN (0x4) -.ARM 0x08006378 0x8 - 0x08006378 . = ALIGN (0x4) - 0x08006378 __exidx_start = . +.ARM 0x08006c5c 0x8 + 0x08006c5c . = ALIGN (0x4) + 0x08006c5c __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x08006378 0x8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) - 0x08006380 __exidx_end = . - 0x08006380 . = ALIGN (0x4) + .ARM.exidx 0x08006c5c 0x8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) + 0x08006c64 __exidx_end = . + 0x08006c64 . = ALIGN (0x4) -.preinit_array 0x08006380 0x0 - 0x08006380 . = ALIGN (0x4) - 0x08006380 PROVIDE (__preinit_array_start = .) +.preinit_array 0x08006c64 0x0 + 0x08006c64 . = ALIGN (0x4) + 0x08006c64 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x08006380 PROVIDE (__preinit_array_end = .) - 0x08006380 . = ALIGN (0x4) + 0x08006c64 PROVIDE (__preinit_array_end = .) + 0x08006c64 . = ALIGN (0x4) -.init_array 0x08006380 0x4 - 0x08006380 . = ALIGN (0x4) - 0x08006380 PROVIDE (__init_array_start = .) +.init_array 0x08006c64 0x4 + 0x08006c64 . = ALIGN (0x4) + 0x08006c64 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x08006380 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o - 0x08006384 PROVIDE (__init_array_end = .) - 0x08006384 . = ALIGN (0x4) + .init_array 0x08006c64 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + 0x08006c68 PROVIDE (__init_array_end = .) + 0x08006c68 . = ALIGN (0x4) -.fini_array 0x08006384 0x4 - 0x08006384 . = ALIGN (0x4) +.fini_array 0x08006c68 0x4 + 0x08006c68 . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x08006384 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + .fini_array 0x08006c68 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x08006388 . = ALIGN (0x4) - 0x08006388 _sidata = LOADADDR (.data) + 0x08006c6c . = ALIGN (0x4) + 0x08006c6c _sidata = LOADADDR (.data) -.rel.dyn 0x08006388 0x0 - .rel.iplt 0x08006388 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o +.rel.dyn 0x08006c6c 0x0 + .rel.iplt 0x08006c6c 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o -.data 0x20000000 0x60 load address 0x08006388 +.data 0x20000000 0x60 load address 0x08006c6c 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) *(.data*) - .data.current_hw_mux_connection - 0x20000000 0x1 ./Core/Src/ad5934_driver.o - 0x20000000 current_hw_mux_connection .data.current_ec_mux - 0x20000001 0x1 ./Core/Src/ad5934_driver.o - 0x20000001 current_ec_mux + 0x20000000 0x1 ./Core/Src/ad5934_driver.o + 0x20000000 current_ec_mux .data.current_rtd_mux - 0x20000002 0x1 ./Core/Src/ad5934_driver.o - 0x20000002 current_rtd_mux + 0x20000001 0x1 ./Core/Src/ad5934_driver.o + 0x20000001 current_rtd_mux .data.is_new_channel - 0x20000003 0x1 ./Core/Src/ad5934_driver.o - 0x20000003 is_new_channel + 0x20000002 0x1 ./Core/Src/ad5934_driver.o + 0x20000002 is_new_channel + *fill* 0x20000003 0x1 .data.SystemCoreClock 0x20000004 0x4 ./Core/Src/system_stm32f1xx.o 0x20000004 SystemCoreClock @@ -5041,11 +5082,11 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte 0x20000060 . = ALIGN (0x4) 0x20000060 _edata = . -.igot.plt 0x20000060 0x0 load address 0x080063e8 +.igot.plt 0x20000060 0x0 load address 0x08006ccc .igot.plt 0x20000060 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o 0x20000060 . = ALIGN (0x4) -.bss 0x20000060 0x47c load address 0x080063e8 +.bss 0x20000060 0x478 load address 0x08006ccc 0x20000060 _sbss = . 0x20000060 __bss_start__ = _sbss *(.bss) @@ -5055,12 +5096,12 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte 0x2000007c 0x1 ./Core/Src/ad5934_driver.o 0x2000007c ad5934_state *fill* 0x2000007d 0x3 - .bss.g_ms_counter + .bss.state_timer 0x20000080 0x4 ./Core/Src/ad5934_driver.o - 0x20000080 g_ms_counter - .bss.reference_resistor + 0x20000080 state_timer + .bss.g_ms_counter 0x20000084 0x4 ./Core/Src/ad5934_driver.o - 0x20000084 reference_resistor + 0x20000084 g_ms_counter .bss.temperature_RTD 0x20000088 0x4 ./Core/Src/ad5934_driver.o 0x20000088 temperature_RTD @@ -5070,76 +5111,89 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .bss.current_mux_channel 0x20000090 0x1 ./Core/Src/ad5934_driver.o 0x20000090 current_mux_channel - .bss.current_ref_mux + .bss.current_hw_mux_connection 0x20000091 0x1 ./Core/Src/ad5934_driver.o - 0x20000091 current_ref_mux - .bss.sweep_count + 0x20000091 current_hw_mux_connection + .bss.current_ref_mux 0x20000092 0x1 ./Core/Src/ad5934_driver.o - 0x20000092 sweep_count - *fill* 0x20000093 0x1 + 0x20000092 current_ref_mux + .bss.sweep_count + 0x20000093 0x1 ./Core/Src/ad5934_driver.o + 0x20000093 sweep_count .bss.g_rtd_filter - 0x20000094 0x40 ./Core/Src/ad5934_driver.o + 0x20000094 0x3c ./Core/Src/ad5934_driver.o 0x20000094 g_rtd_filter .bss.g_ec_filter - 0x200000d4 0x40 ./Core/Src/ad5934_driver.o - 0x200000d4 g_ec_filter + 0x200000d0 0x3c ./Core/Src/ad5934_driver.o + 0x200000d0 g_ec_filter .bss.g_ref_filter - 0x20000114 0x40 ./Core/Src/ad5934_driver.o - 0x20000114 g_ref_filter - .bss.state_timer.0 - 0x20000154 0x4 ./Core/Src/ad5934_driver.o - .bss.hadc1 0x20000158 0x30 ./Core/Src/adc.o - 0x20000158 hadc1 - .bss.hadc2 0x20000188 0x30 ./Core/Src/adc.o - 0x20000188 hadc2 + 0x2000010c 0x3c ./Core/Src/ad5934_driver.o + 0x2000010c g_ref_filter + .bss.rtd_now 0x20000148 0x2 ./Core/Src/ad5934_driver.o + 0x20000148 rtd_now + .bss.ref_now 0x2000014a 0x2 ./Core/Src/ad5934_driver.o + 0x2000014a ref_now + .bss.ec_now 0x2000014c 0x2 ./Core/Src/ad5934_driver.o + 0x2000014c ec_now + .bss.rtd_now_i + 0x2000014e 0x2 ./Core/Src/ad5934_driver.o + 0x2000014e rtd_now_i + .bss.ref_now_i + 0x20000150 0x2 ./Core/Src/ad5934_driver.o + 0x20000150 ref_now_i + .bss.ec_now_i 0x20000152 0x2 ./Core/Src/ad5934_driver.o + 0x20000152 ec_now_i + .bss.hadc1 0x20000154 0x30 ./Core/Src/adc.o + 0x20000154 hadc1 + .bss.hadc2 0x20000184 0x30 ./Core/Src/adc.o + 0x20000184 hadc2 .bss.i2c_ads1015 - 0x200001b8 0x10 ./Core/Src/ads1015_driver.o - 0x200001b8 i2c_ads1015 + 0x200001b4 0x10 ./Core/Src/ads1015_driver.o + 0x200001b4 i2c_ads1015 .bss.g_ph_filter - 0x200001c8 0x40 ./Core/Src/ads1015_driver.o - 0x200001c8 g_ph_filter + 0x200001c4 0x40 ./Core/Src/ads1015_driver.o + 0x200001c4 g_ph_filter .bss.ads1015_state - 0x20000208 0x1 ./Core/Src/ads1015_driver.o - 0x20000208 ads1015_state - *fill* 0x20000209 0x3 + 0x20000204 0x1 ./Core/Src/ads1015_driver.o + 0x20000204 ads1015_state + *fill* 0x20000205 0x3 .bss.sample_count.1 - 0x2000020c 0x4 ./Core/Src/ads1015_driver.o + 0x20000208 0x4 ./Core/Src/ads1015_driver.o .bss.state_timer.0 - 0x20000210 0x4 ./Core/Src/ads1015_driver.o + 0x2000020c 0x4 ./Core/Src/ads1015_driver.o .bss.pin_states - 0x20000214 0x8 ./Core/Src/digital_outputs_driver.o - .bss.hi2c1 0x2000021c 0x54 ./Core/Src/i2c.o - 0x2000021c hi2c1 - .bss.hi2c2 0x20000270 0x54 ./Core/Src/i2c.o - 0x20000270 hi2c2 + 0x20000210 0x8 ./Core/Src/digital_outputs_driver.o + .bss.hi2c1 0x20000218 0x54 ./Core/Src/i2c.o + 0x20000218 hi2c1 + .bss.hi2c2 0x2000026c 0x54 ./Core/Src/i2c.o + 0x2000026c hi2c2 .bss.device_address - 0x200002c4 0x3 ./Core/Src/rs485_driver.o - *fill* 0x200002c7 0x1 - .bss.huart1 0x200002c8 0x48 ./Core/Src/rs485_driver.o - .bss.htim3 0x20000310 0x48 ./Core/Src/tim.o - 0x20000310 htim3 - .bss.huart1 0x20000358 0x48 ./Core/Src/usart.o - 0x20000358 huart1 - .bss.uwTick 0x200003a0 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x200003a0 uwTick - .bss.__sf 0x200003a4 0x138 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) - 0x200003a4 __sf + 0x200002c0 0x3 ./Core/Src/rs485_driver.o + *fill* 0x200002c3 0x1 + .bss.huart1 0x200002c4 0x48 ./Core/Src/rs485_driver.o + .bss.htim3 0x2000030c 0x48 ./Core/Src/tim.o + 0x2000030c htim3 + .bss.huart1 0x20000354 0x48 ./Core/Src/usart.o + 0x20000354 huart1 + .bss.uwTick 0x2000039c 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x2000039c uwTick + .bss.__sf 0x200003a0 0x138 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) + 0x200003a0 __sf *(COMMON) - 0x200004dc . = ALIGN (0x4) - 0x200004dc _ebss = . - 0x200004dc __bss_end__ = _ebss + 0x200004d8 . = ALIGN (0x4) + 0x200004d8 _ebss = . + 0x200004d8 __bss_end__ = _ebss ._user_heap_stack - 0x200004dc 0x604 load address 0x080063e8 - 0x200004e0 . = ALIGN (0x8) - *fill* 0x200004dc 0x4 + 0x200004d8 0x600 load address 0x08006ccc + 0x200004d8 . = ALIGN (0x8) [!provide] PROVIDE (end = .) - 0x200004e0 PROVIDE (_end = .) - 0x200006e0 . = (. + _Min_Heap_Size) - *fill* 0x200004e0 0x200 - 0x20000ae0 . = (. + _Min_Stack_Size) - *fill* 0x200006e0 0x400 - 0x20000ae0 . = ALIGN (0x8) + 0x200004d8 PROVIDE (_end = .) + 0x200006d8 . = (. + _Min_Heap_Size) + *fill* 0x200004d8 0x200 + 0x20000ad8 . = (. + _Min_Stack_Size) + *fill* 0x200006d8 0x400 + 0x20000ad8 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -5220,183 +5274,195 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .ARM.attributes 0x000005c8 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) .ARM.attributes - 0x000005f5 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o) + 0x000005f5 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) .ARM.attributes - 0x00000612 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o) + 0x00000622 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) .ARM.attributes - 0x0000062f 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o) + 0x0000063f 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o) .ARM.attributes - 0x0000064c 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) + 0x0000065c 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o) .ARM.attributes - 0x00000669 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o) + 0x00000679 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o) .ARM.attributes - 0x00000686 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtn.o + 0x00000696 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o) + .ARM.attributes + 0x000006b3 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o) + .ARM.attributes + 0x000006d0 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o) + .ARM.attributes + 0x000006ed 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) + .ARM.attributes + 0x0000070a 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) + .ARM.attributes + 0x00000727 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o) + .ARM.attributes + 0x00000744 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtn.o OUTPUT(Fertirrega_v6.elf elf32-littlearm) LOAD linker stubs LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc.a LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a -.debug_info 0x00000000 0x1386b - .debug_info 0x00000000 0x12cf ./Core/Src/ad5934_driver.o - .debug_info 0x000012cf 0x825 ./Core/Src/adc.o - .debug_info 0x00001af4 0xb4a ./Core/Src/ads1015_driver.o - .debug_info 0x0000263e 0x3c2 ./Core/Src/digital_outputs_driver.o - .debug_info 0x00002a00 0x396 ./Core/Src/gpio.o - .debug_info 0x00002d96 0x83b ./Core/Src/i2c.o - .debug_info 0x000035d1 0x10a1 ./Core/Src/main.o - .debug_info 0x00004672 0x993 ./Core/Src/rs485_driver.o - .debug_info 0x00005005 0x1f1 ./Core/Src/stm32f1xx_hal_msp.o - .debug_info 0x000051f6 0x94c ./Core/Src/stm32f1xx_it.o - .debug_info 0x00005b42 0x222 ./Core/Src/system_stm32f1xx.o - .debug_info 0x00005d64 0x9bb ./Core/Src/tim.o - .debug_info 0x0000671f 0x92a ./Core/Src/usart.o - .debug_info 0x00007049 0x30 ./Core/Startup/startup_stm32f103c8tx.o - .debug_info 0x00007079 0x704 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_info 0x0000777d 0xc50 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_info 0x000083cd 0xa87 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_info 0x00008e54 0x6d2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_info 0x00009526 0x5ab ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_info 0x00009ad1 0x2524 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_info 0x0000bff5 0x7d5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_info 0x0000c7ca 0x3c0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_info 0x0000cb8a 0x2959 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_info 0x0000f4e3 0x149b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_info 0x0001097e 0x2eed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o +.debug_info 0x00000000 0x13c73 + .debug_info 0x00000000 0x166b ./Core/Src/ad5934_driver.o + .debug_info 0x0000166b 0x825 ./Core/Src/adc.o + .debug_info 0x00001e90 0xb4a ./Core/Src/ads1015_driver.o + .debug_info 0x000029da 0x3c2 ./Core/Src/digital_outputs_driver.o + .debug_info 0x00002d9c 0x396 ./Core/Src/gpio.o + .debug_info 0x00003132 0x83b ./Core/Src/i2c.o + .debug_info 0x0000396d 0x110d ./Core/Src/main.o + .debug_info 0x00004a7a 0x993 ./Core/Src/rs485_driver.o + .debug_info 0x0000540d 0x1f1 ./Core/Src/stm32f1xx_hal_msp.o + .debug_info 0x000055fe 0x94c ./Core/Src/stm32f1xx_it.o + .debug_info 0x00005f4a 0x222 ./Core/Src/system_stm32f1xx.o + .debug_info 0x0000616c 0x9bb ./Core/Src/tim.o + .debug_info 0x00006b27 0x92a ./Core/Src/usart.o + .debug_info 0x00007451 0x30 ./Core/Startup/startup_stm32f103c8tx.o + .debug_info 0x00007481 0x704 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_info 0x00007b85 0xc50 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_info 0x000087d5 0xa87 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_info 0x0000925c 0x6d2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_info 0x0000992e 0x5ab ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_info 0x00009ed9 0x2524 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_info 0x0000c3fd 0x7d5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_info 0x0000cbd2 0x3c0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_info 0x0000cf92 0x2959 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_info 0x0000f8eb 0x149b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_info 0x00010d86 0x2eed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_abbrev 0x00000000 0x32e2 - .debug_abbrev 0x00000000 0x2ca ./Core/Src/ad5934_driver.o - .debug_abbrev 0x000002ca 0x1e5 ./Core/Src/adc.o - .debug_abbrev 0x000004af 0x26c ./Core/Src/ads1015_driver.o - .debug_abbrev 0x0000071b 0x1ba ./Core/Src/digital_outputs_driver.o - .debug_abbrev 0x000008d5 0x1a1 ./Core/Src/gpio.o - .debug_abbrev 0x00000a76 0x1e4 ./Core/Src/i2c.o - .debug_abbrev 0x00000c5a 0x2c5 ./Core/Src/main.o - .debug_abbrev 0x00000f1f 0x215 ./Core/Src/rs485_driver.o - .debug_abbrev 0x00001134 0xdb ./Core/Src/stm32f1xx_hal_msp.o - .debug_abbrev 0x0000120f 0x19b ./Core/Src/stm32f1xx_it.o - .debug_abbrev 0x000013aa 0x13f ./Core/Src/system_stm32f1xx.o - .debug_abbrev 0x000014e9 0x20e ./Core/Src/tim.o - .debug_abbrev 0x000016f7 0x205 ./Core/Src/usart.o - .debug_abbrev 0x000018fc 0x24 ./Core/Startup/startup_stm32f103c8tx.o - .debug_abbrev 0x00001920 0x201 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_abbrev 0x00001b21 0x225 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_abbrev 0x00001d46 0x2f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_abbrev 0x0000203e 0x20b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_abbrev 0x00002249 0x1ca ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_abbrev 0x00002413 0x2a3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_abbrev 0x000026b6 0x2b3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_abbrev 0x00002969 0x188 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_abbrev 0x00002af1 0x277 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_abbrev 0x00002d68 0x282 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_abbrev 0x00002fea 0x2f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o +.debug_abbrev 0x00000000 0x3323 + .debug_abbrev 0x00000000 0x2fb ./Core/Src/ad5934_driver.o + .debug_abbrev 0x000002fb 0x1e5 ./Core/Src/adc.o + .debug_abbrev 0x000004e0 0x26c ./Core/Src/ads1015_driver.o + .debug_abbrev 0x0000074c 0x1ba ./Core/Src/digital_outputs_driver.o + .debug_abbrev 0x00000906 0x1a1 ./Core/Src/gpio.o + .debug_abbrev 0x00000aa7 0x1e4 ./Core/Src/i2c.o + .debug_abbrev 0x00000c8b 0x2d5 ./Core/Src/main.o + .debug_abbrev 0x00000f60 0x215 ./Core/Src/rs485_driver.o + .debug_abbrev 0x00001175 0xdb ./Core/Src/stm32f1xx_hal_msp.o + .debug_abbrev 0x00001250 0x19b ./Core/Src/stm32f1xx_it.o + .debug_abbrev 0x000013eb 0x13f ./Core/Src/system_stm32f1xx.o + .debug_abbrev 0x0000152a 0x20e ./Core/Src/tim.o + .debug_abbrev 0x00001738 0x205 ./Core/Src/usart.o + .debug_abbrev 0x0000193d 0x24 ./Core/Startup/startup_stm32f103c8tx.o + .debug_abbrev 0x00001961 0x201 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_abbrev 0x00001b62 0x225 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_abbrev 0x00001d87 0x2f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_abbrev 0x0000207f 0x20b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_abbrev 0x0000228a 0x1ca ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_abbrev 0x00002454 0x2a3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_abbrev 0x000026f7 0x2b3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_abbrev 0x000029aa 0x188 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_abbrev 0x00002b32 0x277 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_abbrev 0x00002da9 0x282 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_abbrev 0x0000302b 0x2f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_aranges 0x00000000 0x1260 +.debug_aranges 0x00000000 0x1290 .debug_aranges - 0x00000000 0xe0 ./Core/Src/ad5934_driver.o + 0x00000000 0x108 ./Core/Src/ad5934_driver.o .debug_aranges - 0x000000e0 0x38 ./Core/Src/adc.o + 0x00000108 0x38 ./Core/Src/adc.o .debug_aranges - 0x00000118 0x68 ./Core/Src/ads1015_driver.o + 0x00000140 0x68 ./Core/Src/ads1015_driver.o .debug_aranges - 0x00000180 0x40 ./Core/Src/digital_outputs_driver.o + 0x000001a8 0x40 ./Core/Src/digital_outputs_driver.o .debug_aranges - 0x000001c0 0x28 ./Core/Src/gpio.o + 0x000001e8 0x28 ./Core/Src/gpio.o .debug_aranges - 0x000001e8 0x38 ./Core/Src/i2c.o + 0x00000210 0x38 ./Core/Src/i2c.o .debug_aranges - 0x00000220 0x48 ./Core/Src/main.o + 0x00000248 0x50 ./Core/Src/main.o .debug_aranges - 0x00000268 0x68 ./Core/Src/rs485_driver.o + 0x00000298 0x68 ./Core/Src/rs485_driver.o .debug_aranges - 0x000002d0 0x20 ./Core/Src/stm32f1xx_hal_msp.o + 0x00000300 0x20 ./Core/Src/stm32f1xx_hal_msp.o .debug_aranges - 0x000002f0 0x70 ./Core/Src/stm32f1xx_it.o + 0x00000320 0x70 ./Core/Src/stm32f1xx_it.o .debug_aranges - 0x00000360 0x28 ./Core/Src/system_stm32f1xx.o + 0x00000390 0x28 ./Core/Src/system_stm32f1xx.o .debug_aranges - 0x00000388 0x30 ./Core/Src/tim.o + 0x000003b8 0x30 ./Core/Src/tim.o .debug_aranges - 0x000003b8 0x30 ./Core/Src/usart.o + 0x000003e8 0x30 ./Core/Src/usart.o .debug_aranges - 0x000003e8 0x28 ./Core/Startup/startup_stm32f103c8tx.o + 0x00000418 0x28 ./Core/Startup/startup_stm32f103c8tx.o .debug_aranges - 0x00000410 0xe0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x00000440 0xe0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_aranges - 0x000004f0 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x00000520 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_aranges - 0x000005e0 0x100 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x00000610 0x100 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_aranges - 0x000006e0 0x80 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x00000710 0x80 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_aranges - 0x00000760 0x58 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x00000790 0x58 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_aranges - 0x000007b8 0x2a8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x000007e8 0x2a8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_aranges - 0x00000a60 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x00000a90 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_aranges - 0x00000af0 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + 0x00000b20 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_aranges - 0x00000b20 0x3d0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x00000b50 0x3d0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .debug_aranges - 0x00000ef0 0x168 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x00000f20 0x168 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o .debug_aranges - 0x00001058 0x208 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x00001088 0x208 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_rnglists - 0x00000000 0xe79 + 0x00000000 0xe92 .debug_rnglists - 0x00000000 0xb8 ./Core/Src/ad5934_driver.o + 0x00000000 0xcb ./Core/Src/ad5934_driver.o .debug_rnglists - 0x000000b8 0x26 ./Core/Src/adc.o + 0x000000cb 0x26 ./Core/Src/adc.o .debug_rnglists - 0x000000de 0x5a ./Core/Src/ads1015_driver.o + 0x000000f1 0x5a ./Core/Src/ads1015_driver.o .debug_rnglists - 0x00000138 0x2c ./Core/Src/digital_outputs_driver.o + 0x0000014b 0x2c ./Core/Src/digital_outputs_driver.o .debug_rnglists - 0x00000164 0x1a ./Core/Src/gpio.o + 0x00000177 0x1a ./Core/Src/gpio.o .debug_rnglists - 0x0000017e 0x26 ./Core/Src/i2c.o + 0x00000191 0x26 ./Core/Src/i2c.o .debug_rnglists - 0x000001a4 0x35 ./Core/Src/main.o + 0x000001b7 0x3b ./Core/Src/main.o .debug_rnglists - 0x000001d9 0x4a ./Core/Src/rs485_driver.o + 0x000001f2 0x4a ./Core/Src/rs485_driver.o .debug_rnglists - 0x00000223 0x13 ./Core/Src/stm32f1xx_hal_msp.o + 0x0000023c 0x13 ./Core/Src/stm32f1xx_hal_msp.o .debug_rnglists - 0x00000236 0x4f ./Core/Src/stm32f1xx_it.o + 0x0000024f 0x4f ./Core/Src/stm32f1xx_it.o .debug_rnglists - 0x00000285 0x1a ./Core/Src/system_stm32f1xx.o + 0x0000029e 0x1a ./Core/Src/system_stm32f1xx.o .debug_rnglists - 0x0000029f 0x20 ./Core/Src/tim.o + 0x000002b8 0x20 ./Core/Src/tim.o .debug_rnglists - 0x000002bf 0x20 ./Core/Src/usart.o + 0x000002d8 0x20 ./Core/Src/usart.o .debug_rnglists - 0x000002df 0x19 ./Core/Startup/startup_stm32f103c8tx.o + 0x000002f8 0x19 ./Core/Startup/startup_stm32f103c8tx.o .debug_rnglists - 0x000002f8 0xa3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x00000311 0xa3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_rnglists - 0x0000039b 0xbc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x000003b4 0xbc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_rnglists - 0x00000457 0xbb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x00000470 0xbb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_rnglists - 0x00000512 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x0000052b 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_rnglists - 0x00000576 0x3f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x0000058f 0x3f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_rnglists - 0x000005b5 0x23c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x000005ce 0x23c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_rnglists - 0x000007f1 0x6c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x0000080a 0x6c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_rnglists - 0x0000085d 0x21 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + 0x00000876 0x21 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_rnglists - 0x0000087e 0x31a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x00000897 0x31a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .debug_rnglists - 0x00000b98 0x125 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x00000bb1 0x125 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o .debug_rnglists - 0x00000cbd 0x1bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x00000cd6 0x1bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_macro 0x00000000 0x1a53e +.debug_macro 0x00000000 0x1a58b .debug_macro 0x00000000 0x2b8 ./Core/Src/ad5934_driver.o .debug_macro 0x000002b8 0xacc ./Core/Src/ad5934_driver.o .debug_macro 0x00000d84 0x227 ./Core/Src/ad5934_driver.o @@ -5456,95 +5522,95 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .debug_macro 0x00016e63 0x3c ./Core/Src/ad5934_driver.o .debug_macro 0x00016e9f 0x16 ./Core/Src/ad5934_driver.o .debug_macro 0x00016eb5 0x29 ./Core/Src/ad5934_driver.o - .debug_macro 0x00016ede 0x2b2 ./Core/Src/ad5934_driver.o - .debug_macro 0x00017190 0x1da ./Core/Src/adc.o - .debug_macro 0x0001736a 0x1c8 ./Core/Src/adc.o - .debug_macro 0x00017532 0x2c9 ./Core/Src/ads1015_driver.o - .debug_macro 0x000177fb 0x56 ./Core/Src/ads1015_driver.o - .debug_macro 0x00017851 0x10 ./Core/Src/ads1015_driver.o - .debug_macro 0x00017861 0x16 ./Core/Src/ads1015_driver.o - .debug_macro 0x00017877 0x20 ./Core/Src/ads1015_driver.o - .debug_macro 0x00017897 0x1d5 ./Core/Src/ads1015_driver.o - .debug_macro 0x00017a6c 0x1de ./Core/Src/digital_outputs_driver.o - .debug_macro 0x00017c4a 0x1df ./Core/Src/gpio.o - .debug_macro 0x00017e29 0x16 ./Core/Src/gpio.o - .debug_macro 0x00017e3f 0x1da ./Core/Src/i2c.o - .debug_macro 0x00018019 0x367 ./Core/Src/main.o - .debug_macro 0x00018380 0x1c ./Core/Src/main.o - .debug_macro 0x0001839c 0x229 ./Core/Src/main.o - .debug_macro 0x000185c5 0x28 ./Core/Src/main.o - .debug_macro 0x000185ed 0x1d9 ./Core/Src/rs485_driver.o - .debug_macro 0x000187c6 0x1d0 ./Core/Src/stm32f1xx_hal_msp.o - .debug_macro 0x00018996 0x1da ./Core/Src/stm32f1xx_it.o - .debug_macro 0x00018b70 0x1c1 ./Core/Src/system_stm32f1xx.o - .debug_macro 0x00018d31 0x1da ./Core/Src/tim.o - .debug_macro 0x00018f0b 0x1da ./Core/Src/usart.o - .debug_macro 0x000190e5 0x1e5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_macro 0x000192ca 0x1de ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_macro 0x000194a8 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_macro 0x00019669 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_macro 0x0001982a 0x22c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_macro 0x00019a56 0x20f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_macro 0x00019c65 0x1d3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_macro 0x00019e38 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_macro 0x00019ff9 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_macro 0x0001a1bb 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x0001a37c 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + .debug_macro 0x00016ede 0x2ff ./Core/Src/ad5934_driver.o + .debug_macro 0x000171dd 0x1da ./Core/Src/adc.o + .debug_macro 0x000173b7 0x1c8 ./Core/Src/adc.o + .debug_macro 0x0001757f 0x2c9 ./Core/Src/ads1015_driver.o + .debug_macro 0x00017848 0x56 ./Core/Src/ads1015_driver.o + .debug_macro 0x0001789e 0x10 ./Core/Src/ads1015_driver.o + .debug_macro 0x000178ae 0x16 ./Core/Src/ads1015_driver.o + .debug_macro 0x000178c4 0x20 ./Core/Src/ads1015_driver.o + .debug_macro 0x000178e4 0x1d5 ./Core/Src/ads1015_driver.o + .debug_macro 0x00017ab9 0x1de ./Core/Src/digital_outputs_driver.o + .debug_macro 0x00017c97 0x1df ./Core/Src/gpio.o + .debug_macro 0x00017e76 0x16 ./Core/Src/gpio.o + .debug_macro 0x00017e8c 0x1da ./Core/Src/i2c.o + .debug_macro 0x00018066 0x367 ./Core/Src/main.o + .debug_macro 0x000183cd 0x1c ./Core/Src/main.o + .debug_macro 0x000183e9 0x229 ./Core/Src/main.o + .debug_macro 0x00018612 0x28 ./Core/Src/main.o + .debug_macro 0x0001863a 0x1d9 ./Core/Src/rs485_driver.o + .debug_macro 0x00018813 0x1d0 ./Core/Src/stm32f1xx_hal_msp.o + .debug_macro 0x000189e3 0x1da ./Core/Src/stm32f1xx_it.o + .debug_macro 0x00018bbd 0x1c1 ./Core/Src/system_stm32f1xx.o + .debug_macro 0x00018d7e 0x1da ./Core/Src/tim.o + .debug_macro 0x00018f58 0x1da ./Core/Src/usart.o + .debug_macro 0x00019132 0x1e5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_macro 0x00019317 0x1de ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_macro 0x000194f5 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_macro 0x000196b6 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_macro 0x00019877 0x22c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_macro 0x00019aa3 0x20f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_macro 0x00019cb2 0x1d3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_macro 0x00019e85 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_macro 0x0001a046 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_macro 0x0001a208 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x0001a3c9 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_line 0x00000000 0x17c61 - .debug_line 0x00000000 0xee0 ./Core/Src/ad5934_driver.o - .debug_line 0x00000ee0 0x83b ./Core/Src/adc.o - .debug_line 0x0000171b 0xb86 ./Core/Src/ads1015_driver.o - .debug_line 0x000022a1 0x850 ./Core/Src/digital_outputs_driver.o - .debug_line 0x00002af1 0x79d ./Core/Src/gpio.o - .debug_line 0x0000328e 0x820 ./Core/Src/i2c.o - .debug_line 0x00003aae 0xcc3 ./Core/Src/main.o - .debug_line 0x00004771 0x8cd ./Core/Src/rs485_driver.o - .debug_line 0x0000503e 0x749 ./Core/Src/stm32f1xx_hal_msp.o - .debug_line 0x00005787 0x827 ./Core/Src/stm32f1xx_it.o - .debug_line 0x00005fae 0x7c7 ./Core/Src/system_stm32f1xx.o - .debug_line 0x00006775 0x7c2 ./Core/Src/tim.o - .debug_line 0x00006f37 0x7bf ./Core/Src/usart.o - .debug_line 0x000076f6 0x78 ./Core/Startup/startup_stm32f103c8tx.o - .debug_line 0x0000776e 0x9fb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_line 0x00008169 0x101d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_line 0x00009186 0xbc2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_line 0x00009d48 0xe02 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_line 0x0000ab4a 0xa52 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_line 0x0000b59c 0x3bf5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_line 0x0000f191 0xeb1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_line 0x00010042 0x963 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_line 0x000109a5 0x34ec ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_line 0x00013e91 0x18bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_line 0x0001574d 0x2514 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o +.debug_line 0x00000000 0x17dbe + .debug_line 0x00000000 0x101d ./Core/Src/ad5934_driver.o + .debug_line 0x0000101d 0x83b ./Core/Src/adc.o + .debug_line 0x00001858 0xb86 ./Core/Src/ads1015_driver.o + .debug_line 0x000023de 0x850 ./Core/Src/digital_outputs_driver.o + .debug_line 0x00002c2e 0x79d ./Core/Src/gpio.o + .debug_line 0x000033cb 0x820 ./Core/Src/i2c.o + .debug_line 0x00003beb 0xce3 ./Core/Src/main.o + .debug_line 0x000048ce 0x8cd ./Core/Src/rs485_driver.o + .debug_line 0x0000519b 0x749 ./Core/Src/stm32f1xx_hal_msp.o + .debug_line 0x000058e4 0x827 ./Core/Src/stm32f1xx_it.o + .debug_line 0x0000610b 0x7c7 ./Core/Src/system_stm32f1xx.o + .debug_line 0x000068d2 0x7c2 ./Core/Src/tim.o + .debug_line 0x00007094 0x7bf ./Core/Src/usart.o + .debug_line 0x00007853 0x78 ./Core/Startup/startup_stm32f103c8tx.o + .debug_line 0x000078cb 0x9fb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_line 0x000082c6 0x101d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_line 0x000092e3 0xbc2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_line 0x00009ea5 0xe02 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_line 0x0000aca7 0xa52 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_line 0x0000b6f9 0x3bf5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_line 0x0000f2ee 0xeb1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_line 0x0001019f 0x963 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_line 0x00010b02 0x34ec ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_line 0x00013fee 0x18bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_line 0x000158aa 0x2514 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_str 0x00000000 0x95803 - .debug_str 0x00000000 0x95803 ./Core/Src/ad5934_driver.o - 0x8f448 (size before relaxing) - .debug_str 0x00095803 0x8a614 ./Core/Src/adc.o - .debug_str 0x00095803 0x8eea8 ./Core/Src/ads1015_driver.o - .debug_str 0x00095803 0x8a38b ./Core/Src/digital_outputs_driver.o - .debug_str 0x00095803 0x8a31d ./Core/Src/gpio.o - .debug_str 0x00095803 0x8a729 ./Core/Src/i2c.o - .debug_str 0x00095803 0x91155 ./Core/Src/main.o - .debug_str 0x00095803 0x8b0b6 ./Core/Src/rs485_driver.o - .debug_str 0x00095803 0x8a1e4 ./Core/Src/stm32f1xx_hal_msp.o - .debug_str 0x00095803 0x8a93a ./Core/Src/stm32f1xx_it.o - .debug_str 0x00095803 0x89a79 ./Core/Src/system_stm32f1xx.o - .debug_str 0x00095803 0x8ab05 ./Core/Src/tim.o - .debug_str 0x00095803 0x8a9bf ./Core/Src/usart.o - .debug_str 0x00095803 0x6e ./Core/Startup/startup_stm32f103c8tx.o - .debug_str 0x00095803 0x8a1ac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_str 0x00095803 0x8a15d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_str 0x00095803 0x8a0f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_str 0x00095803 0x89e22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_str 0x00095803 0x89dff ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_str 0x00095803 0x8ab40 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_str 0x00095803 0x89ea8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_str 0x00095803 0x89bf8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_str 0x00095803 0x8aeaa ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_str 0x00095803 0x8a6b6 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_str 0x00095803 0x8a519 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o +.debug_str 0x00000000 0x95ab0 + .debug_str 0x00000000 0x95ab0 ./Core/Src/ad5934_driver.o + 0x8f705 (size before relaxing) + .debug_str 0x00095ab0 0x8a614 ./Core/Src/adc.o + .debug_str 0x00095ab0 0x8eea8 ./Core/Src/ads1015_driver.o + .debug_str 0x00095ab0 0x8a38b ./Core/Src/digital_outputs_driver.o + .debug_str 0x00095ab0 0x8a31d ./Core/Src/gpio.o + .debug_str 0x00095ab0 0x8a729 ./Core/Src/i2c.o + .debug_str 0x00095ab0 0x912b4 ./Core/Src/main.o + .debug_str 0x00095ab0 0x8b0b6 ./Core/Src/rs485_driver.o + .debug_str 0x00095ab0 0x8a1e4 ./Core/Src/stm32f1xx_hal_msp.o + .debug_str 0x00095ab0 0x8a93a ./Core/Src/stm32f1xx_it.o + .debug_str 0x00095ab0 0x89a79 ./Core/Src/system_stm32f1xx.o + .debug_str 0x00095ab0 0x8ab05 ./Core/Src/tim.o + .debug_str 0x00095ab0 0x8a9bf ./Core/Src/usart.o + .debug_str 0x00095ab0 0x6e ./Core/Startup/startup_stm32f103c8tx.o + .debug_str 0x00095ab0 0x8a1ac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_str 0x00095ab0 0x8a15d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_str 0x00095ab0 0x8a0f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_str 0x00095ab0 0x89e22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_str 0x00095ab0 0x89dff ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_str 0x00095ab0 0x8ab40 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_str 0x00095ab0 0x89ea8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_str 0x00095ab0 0x89bf8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_str 0x00095ab0 0x8aeaa ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_str 0x00095ab0 0x8a6b6 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_str 0x00095ab0 0x8a519 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .comment 0x00000000 0x43 .comment 0x00000000 0x43 ./Core/Src/ad5934_driver.o @@ -5573,43 +5639,49 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_frame 0x00000000 0x4be4 - .debug_frame 0x00000000 0x38c ./Core/Src/ad5934_driver.o - .debug_frame 0x0000038c 0xa0 ./Core/Src/adc.o - .debug_frame 0x0000042c 0x174 ./Core/Src/ads1015_driver.o - .debug_frame 0x000005a0 0xc4 ./Core/Src/digital_outputs_driver.o - .debug_frame 0x00000664 0x58 ./Core/Src/gpio.o - .debug_frame 0x000006bc 0x90 ./Core/Src/i2c.o - .debug_frame 0x0000074c 0xe0 ./Core/Src/main.o - .debug_frame 0x0000082c 0x15c ./Core/Src/rs485_driver.o - .debug_frame 0x00000988 0x34 ./Core/Src/stm32f1xx_hal_msp.o - .debug_frame 0x000009bc 0x130 ./Core/Src/stm32f1xx_it.o - .debug_frame 0x00000aec 0x50 ./Core/Src/system_stm32f1xx.o - .debug_frame 0x00000b3c 0x7c ./Core/Src/tim.o - .debug_frame 0x00000bb8 0x74 ./Core/Src/usart.o - .debug_frame 0x00000c2c 0x2e4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_frame 0x00000f10 0x3e0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_frame 0x000012f0 0x3f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_frame 0x000016e0 0x1e8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_frame 0x000018c8 0x130 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_frame 0x000019f8 0xbf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_frame 0x000025ec 0x1f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_frame 0x000027e4 0x7c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_frame 0x00002860 0x10e8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_frame 0x00003948 0x600 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_frame 0x00003f48 0x8dc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - .debug_frame 0x00004824 0x144 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) - .debug_frame 0x00004968 0x20 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memset.o) - .debug_frame 0x00004988 0x20 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-errno.o) - .debug_frame 0x000049a8 0x2c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-init.o) - .debug_frame 0x000049d4 0x20 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) - .debug_frame 0x000049f4 0x2c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-wf_sqrt.o) - .debug_frame 0x00004a20 0x30 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) - .debug_frame 0x00004a50 0x4c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o) - .debug_frame 0x00004a9c 0x38 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o) - .debug_frame 0x00004ad4 0xc8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o) - .debug_frame 0x00004b9c 0x24 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) - .debug_frame 0x00004bc0 0x24 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o) +.debug_frame 0x00000000 0x4ee0 + .debug_frame 0x00000000 0x448 ./Core/Src/ad5934_driver.o + .debug_frame 0x00000448 0xa0 ./Core/Src/adc.o + .debug_frame 0x000004e8 0x174 ./Core/Src/ads1015_driver.o + .debug_frame 0x0000065c 0xc4 ./Core/Src/digital_outputs_driver.o + .debug_frame 0x00000720 0x58 ./Core/Src/gpio.o + .debug_frame 0x00000778 0x90 ./Core/Src/i2c.o + .debug_frame 0x00000808 0x110 ./Core/Src/main.o + .debug_frame 0x00000918 0x15c ./Core/Src/rs485_driver.o + .debug_frame 0x00000a74 0x34 ./Core/Src/stm32f1xx_hal_msp.o + .debug_frame 0x00000aa8 0x130 ./Core/Src/stm32f1xx_it.o + .debug_frame 0x00000bd8 0x50 ./Core/Src/system_stm32f1xx.o + .debug_frame 0x00000c28 0x7c ./Core/Src/tim.o + .debug_frame 0x00000ca4 0x74 ./Core/Src/usart.o + .debug_frame 0x00000d18 0x2e4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_frame 0x00000ffc 0x3e0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_frame 0x000013dc 0x3f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_frame 0x000017cc 0x1e8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_frame 0x000019b4 0x130 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_frame 0x00001ae4 0xbf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_frame 0x000026d8 0x1f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_frame 0x000028d0 0x7c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_frame 0x0000294c 0x10e8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_frame 0x00003a34 0x600 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_frame 0x00004034 0x8dc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + .debug_frame 0x00004910 0x144 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) + .debug_frame 0x00004a54 0x20 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memset.o) + .debug_frame 0x00004a74 0x20 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-errno.o) + .debug_frame 0x00004a94 0x2c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-init.o) + .debug_frame 0x00004ac0 0x20 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) + .debug_frame 0x00004ae0 0x2c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-wf_sqrt.o) + .debug_frame 0x00004b0c 0x30 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) + .debug_frame 0x00004b3c 0x28 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) + .debug_frame 0x00004b64 0x30 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) + .debug_frame 0x00004b94 0xac C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o) + .debug_frame 0x00004c40 0xc4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o) + .debug_frame 0x00004d04 0x24 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o) + .debug_frame 0x00004d28 0x4c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o) + .debug_frame 0x00004d74 0x38 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o) + .debug_frame 0x00004dac 0xc8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o) + .debug_frame 0x00004e74 0x24 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) + .debug_frame 0x00004e98 0x24 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) + .debug_frame 0x00004ebc 0x24 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o) .debug_line_str 0x00000000 0x52