diff --git a/Fertirrega_v6/.mxproject b/Fertirrega_v6/.mxproject index dd7b9cd..c5b50cc 100644 --- a/Fertirrega_v6/.mxproject +++ b/Fertirrega_v6/.mxproject @@ -1,36 +1,32 @@ [PreviousLibFiles] -LibFiles=Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_bus.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_system.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_utils.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_uart.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_usart.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_bus.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_system.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_utils.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_tim.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_tim_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_uart.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_usart.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f103xb.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\system_stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\system_stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; +LibFiles=Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_bus.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_system.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_utils.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_uart.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_usart.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_adc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_adc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_def.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_rcc_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_bus.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_rcc.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_system.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_utils.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_gpio.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_dma.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_cortex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_pwr.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_exti.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_i2c.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_uart.h;Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_ll_usart.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f103xb.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\system_stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Include\system_stm32f1xx.h;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSI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[PreviousUsedCubeIDEFiles] -SourceFiles=Core\Src\main.c;Core\Src\gpio.c;Core\Src\adc.c;Core\Src\dma.c;Core\Src\i2c.c;Core\Src\tim.c;Core\Src\usart.c;Core\Src\stm32f1xx_it.c;Core\Src\stm32f1xx_hal_msp.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;;; +SourceFiles=Core\Src\main.c;Core\Src\gpio.c;Core\Src\adc.c;Core\Src\i2c.c;Core\Src\usart.c;Core\Src\stm32f1xx_it.c;Core\Src\stm32f1xx_hal_msp.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_adc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_i2c.c;Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c;Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;Core\Src\system_stm32f1xx.c;;; HeaderPath=Drivers\STM32F1xx_HAL_Driver\Inc;Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32F1xx\Include;Drivers\CMSIS\Include;Core\Inc; CDefines=USE_HAL_DRIVER;STM32F103xB;USE_HAL_DRIVER;USE_HAL_DRIVER; [PreviousGenFiles] AdvancedFolderStructure=true -HeaderFileListSize=9 +HeaderFileListSize=7 HeaderFiles#0=..\Core\Inc\gpio.h HeaderFiles#1=..\Core\Inc\adc.h -HeaderFiles#2=..\Core\Inc\dma.h -HeaderFiles#3=..\Core\Inc\i2c.h -HeaderFiles#4=..\Core\Inc\tim.h -HeaderFiles#5=..\Core\Inc\usart.h -HeaderFiles#6=..\Core\Inc\stm32f1xx_it.h -HeaderFiles#7=..\Core\Inc\stm32f1xx_hal_conf.h -HeaderFiles#8=..\Core\Inc\main.h +HeaderFiles#2=..\Core\Inc\i2c.h +HeaderFiles#3=..\Core\Inc\usart.h +HeaderFiles#4=..\Core\Inc\stm32f1xx_it.h +HeaderFiles#5=..\Core\Inc\stm32f1xx_hal_conf.h +HeaderFiles#6=..\Core\Inc\main.h HeaderFolderListSize=1 HeaderPath#0=..\Core\Inc HeaderFiles=; -SourceFileListSize=9 +SourceFileListSize=7 SourceFiles#0=..\Core\Src\gpio.c SourceFiles#1=..\Core\Src\adc.c -SourceFiles#2=..\Core\Src\dma.c -SourceFiles#3=..\Core\Src\i2c.c -SourceFiles#4=..\Core\Src\tim.c -SourceFiles#5=..\Core\Src\usart.c -SourceFiles#6=..\Core\Src\stm32f1xx_it.c -SourceFiles#7=..\Core\Src\stm32f1xx_hal_msp.c -SourceFiles#8=..\Core\Src\main.c +SourceFiles#2=..\Core\Src\i2c.c +SourceFiles#3=..\Core\Src\usart.c +SourceFiles#4=..\Core\Src\stm32f1xx_it.c +SourceFiles#5=..\Core\Src\stm32f1xx_hal_msp.c +SourceFiles#6=..\Core\Src\main.c SourceFolderListSize=1 SourcePath#0=..\Core\Src SourceFiles=; diff --git a/Fertirrega_v6/Core/Inc/ad5934_driver.h b/Fertirrega_v6/Core/Inc/ad5934_driver.h index 9428805..3eba673 100644 --- a/Fertirrega_v6/Core/Inc/ad5934_driver.h +++ b/Fertirrega_v6/Core/Inc/ad5934_driver.h @@ -213,7 +213,7 @@ void AD5934_RestartSweep(void); float AD5934_GetTemperature(void); -float AD5934_GetImpedance(void); +float AD5934_GetImpedance(float temperature_dut); void AD5934_Wait_For_Data_Valid(void); @@ -221,6 +221,8 @@ float AD5934_Round_Float_Precision(float value, uint8_t number_of_decimals); float AD5934_Linear_Correction(float raw_value); +float AD5934_Get_Target_Conductivity(float temp); + void ADG715_SetRegisterValue(char value); void ADG715_SetChannels(uint8_t ch1, uint8_t ch2); diff --git a/Fertirrega_v6/Core/Inc/ads1015_driver.h b/Fertirrega_v6/Core/Inc/ads1015_driver.h index fa7c083..1968b2f 100644 --- a/Fertirrega_v6/Core/Inc/ads1015_driver.h +++ b/Fertirrega_v6/Core/Inc/ads1015_driver.h @@ -126,10 +126,17 @@ extern "C" { #define ADS1015_KELVIN_OFFSET 273.15f // Constante de conversão Kelvin #define ADS1015_ADC_MAX 4095.0f #define ADS1015_ADC_VREF 3.3f +#define PH_DELTA_CALIB 3.0f // Difference between pH 7 and pH 4 used in calibration #define ADS1015_PH_AVERAGES 8 +#define ADS1015_TEMPERATURE_ROW 0 +#define ADS1015_PH_4_BUFFER_ROW 1 +#define ADS1015_PH_7_BUFFER_ROW 2 +#define ADS1015_INTERPOLATION_ROWS 3 +#define ADS1015_PH_TEMP_INTER_POINTS 12 /*=========================================================================*/ + /** Gain settings */ typedef enum { GAIN_TWOTHIRDS = ADS1015_REG_CONFIG_PGA_6_144V, @@ -141,6 +148,11 @@ typedef enum { } adsGain_t; + +extern float ph_averages[ADS1015_PH_AVERAGES]; + + + typedef struct { uint16_t m_i2cAddress; ///< the I2C address uint32_t m_conversionDelay; ///< conversion delay @@ -149,8 +161,6 @@ typedef struct { I2C_HandleTypeDef* hi2c; // Handle for I2C }ADS1015_I2C; -extern float ph_averages[ADS1015_PH_AVERAGES]; - extern ADS1015_I2C i2c; void ADS1015(ADS1015_I2C* i2c, I2C_HandleTypeDef* hi2c, uint8_t i2cAddress); @@ -162,6 +172,8 @@ int16_t ADSgetLastConversionResults(); void ADSsetGain(ADS1015_I2C* i2c, adsGain_t gain); adsGain_t ADSgetGain(ADS1015_I2C* i2c); float ADSCalculate_ph_Volts(void); -float ADSCalculate_ph_Compensated(int16_t adc_raw, float temp_dut); +float ADSCalculate_ph_Compensated(float temp_dut); +float ADSCalculate_ph_Uncompensated(void); +float ADSinterpolate_ph(float temp_dut, uint8_t row_index); #endif /* INC_ADS1015_DRIVER_H_ */ diff --git a/Fertirrega_v6/Core/Inc/flash_manager.h b/Fertirrega_v6/Core/Inc/flash_manager.h index 9fb76b9..13ee412 100644 --- a/Fertirrega_v6/Core/Inc/flash_manager.h +++ b/Fertirrega_v6/Core/Inc/flash_manager.h @@ -19,7 +19,6 @@ /* Endereço da página (Ex: última página do F103C8) */ #define FLASH_PAGE_ADDR ((uint32_t)0x0800FC00) -#define FLASH_PAGE_SIZE 1024 /** * @brief Estrutura de 1KB alinhada e preenchida. @@ -27,13 +26,15 @@ */ typedef struct __attribute__((packed, aligned(4))) { - uint32_t magic_number; // 4 bytes (Validação) - float ph4_value; // 4 bytes - float ph7_value; // 4 bytes - float ec1413_value; // 4 bytes - float ec12880_value; // 4 bytes - float temperature_value;// 4 bytes - uint8_t reserved[1000]; // Preenchimento para completar 1024 bytes (1KB) + uint32_t magic_number; // 4 bytes (Validação) + float ph4_volts; // 4 bytes + float ph7_volts; // 4 bytes + float ec1413_mag; // 4 bytes + float ec0_mag; // 4 bytes + float temperature_value; // 4 bytes + uint8_t PT100_PT1000_switch; // 1 byte + uint8_t EC10mS_EC5mS_switch; // 1 byte + uint8_t reserved[998]; // Preenchimento para completar 1024 bytes (1KB) } FlashPage_t; extern FlashPage_t flash_data; diff --git a/Fertirrega_v6/Core/Inc/main.h b/Fertirrega_v6/Core/Inc/main.h index af211c0..b6a7c4a 100644 --- a/Fertirrega_v6/Core/Inc/main.h +++ b/Fertirrega_v6/Core/Inc/main.h @@ -111,7 +111,6 @@ void Error_Handler(void); #define PG_PH_GPIO_Port GPIOA #define Calib_PH_Pin GPIO_PIN_3 #define Calib_PH_GPIO_Port GPIOB -#define Calib_PH_EXTI_IRQn EXTI3_IRQn #define LED_Red_Pin GPIO_PIN_4 #define LED_Red_GPIO_Port GPIOB #define LED_Green_Pin GPIO_PIN_5 diff --git a/Fertirrega_v6/Core/Inc/stm32f1xx_hal_conf.h b/Fertirrega_v6/Core/Inc/stm32f1xx_hal_conf.h index e745e9c..33379ab 100644 --- a/Fertirrega_v6/Core/Inc/stm32f1xx_hal_conf.h +++ b/Fertirrega_v6/Core/Inc/stm32f1xx_hal_conf.h @@ -42,7 +42,7 @@ /*#define HAL_CORTEX_MODULE_ENABLED */ /*#define HAL_CRC_MODULE_ENABLED */ /*#define HAL_DAC_MODULE_ENABLED */ -#define HAL_DMA_MODULE_ENABLED +/*#define HAL_DMA_MODULE_ENABLED */ /*#define HAL_ETH_MODULE_ENABLED */ /*#define HAL_FLASH_MODULE_ENABLED */ #define HAL_GPIO_MODULE_ENABLED @@ -64,7 +64,7 @@ /*#define HAL_SMARTCARD_MODULE_ENABLED */ /*#define HAL_SPI_MODULE_ENABLED */ /*#define HAL_SRAM_MODULE_ENABLED */ -#define HAL_TIM_MODULE_ENABLED +/*#define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED /*#define HAL_USART_MODULE_ENABLED */ /*#define HAL_WWDG_MODULE_ENABLED */ diff --git a/Fertirrega_v6/Core/Inc/stm32f1xx_it.h b/Fertirrega_v6/Core/Inc/stm32f1xx_it.h index 5170559..a3a5953 100644 --- a/Fertirrega_v6/Core/Inc/stm32f1xx_it.h +++ b/Fertirrega_v6/Core/Inc/stm32f1xx_it.h @@ -55,8 +55,6 @@ void SVC_Handler(void); void DebugMon_Handler(void); void PendSV_Handler(void); void SysTick_Handler(void); -void EXTI3_IRQHandler(void); -void DMA1_Channel1_IRQHandler(void); void USART1_IRQHandler(void); /* USER CODE BEGIN EFP */ diff --git a/Fertirrega_v6/Core/Src/ad5934_driver.c b/Fertirrega_v6/Core/Src/ad5934_driver.c index 7e591a9..2894fe1 100644 --- a/Fertirrega_v6/Core/Src/ad5934_driver.c +++ b/Fertirrega_v6/Core/Src/ad5934_driver.c @@ -170,6 +170,9 @@ void AD5934_RestartSweep(void) // Initialize starting frequency, Start frequency sweep, standby AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, ((AD5934_CONTROL_FUNCTION(AD5934_INIT_START_FREQ)) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X5)), 1); + // Disable Internal Reset State + AD5934_SetRegisterValue(AD5934_CONTROL_REG_LB, AD5934_CONTROL_FUNCTION(AD5934_RESERVED), 1); + // Configure Range Output, PGA gain andPlace AD5934 in sweep AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_START_FREQ_SWEEP) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X5)), 1); @@ -207,6 +210,7 @@ uint32_t AD5934_Sweep(void) } + /****************************************************************************** * @brief Calculate Temperature. * @@ -324,68 +328,76 @@ float AD5934_GetTemperature(void) } -/****************************************************************************** -* @brief Calculate impedance. -* -* @param none. -* -* @return impedance. -******************************************************************************/ -float AD5934_GetImpedance(void) +/** + * @brief Calculates impedance and converts it to conductivity using a 2-point + * temperature-compensated model. + * + * @param temperature_dut The current temperature of the DUT (Device Under Test). + * @return float Calculated conductivity in uS/cm. + */ +float AD5934_GetImpedance(float temperature_dut) { - uint8_t i, ec_gain; - uint32_t sample_dut; - int32_t dut_sum[2]; - float real_number, imag_number, mag_dut, slope; + uint8_t i, ec_gain; + uint32_t sample_dut; + int32_t dut_sum[2] = {0, 0}; + float real_avg, imag_avg, mag_dut, slope, target_cond; + /* 1. Hardware Setup: Gain Selection (PA6) */ + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) + ec_gain = AD5934_CH_EC_HIGH_GAIN; + else + ec_gain = AD5934_CH_EC_MID_GAIN; - /* STEP 2: Set the Amplification related to the maximum set value */ + if((ec_gain != flash_data.EC10mS_EC5mS_switch) && (main_state != STATE_SETUP_CALIBRATION)) + return -1.0f; // Fatal error because the gain used in calibration is different - if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) // PA6 has internal pull-up and the Switch connects to GND - ec_gain = AD5934_CH_EC_HIGH_GAIN; // Switch OFF = 5 mS/cm, HIGH GAIN, - else - ec_gain = AD5934_CH_EC_MID_GAIN; // Switch ON = 10 mS/cm, MID GAIN, + ADG715_Update(ec_gain); + HAL_Delay(2); - ADG715_Update(ec_gain); - HAL_Delay(2); + /* 2. Data Acquisition */ + sample_dut = AD5934_Sweep(); - sample_dut = AD5934_Sweep(); // Get PT100/PT1000 Values from ADC + // Shift buffer for moving average + for (i = (AD5934_EC_AVERAGES - 1); i > 0; i--) + { + ec_dut_samples[i][0] = ec_dut_samples[i-1][0]; + ec_dut_samples[i][1] = ec_dut_samples[i-1][1]; + } - for (i = (AD5934_EC_AVERAGES-1); i > 0; i--) + // Deconstruct 32-bit sample into Real and Imaginary components + ec_dut_samples[0][0] = (float)(int16_t)(sample_dut & 0xFFFF); + ec_dut_samples[0][1] = (float)(int16_t)((sample_dut >> 16) & 0xFFFF); + + /* 3. Compute Averages */ + for (i = 0; i < AD5934_EC_AVERAGES; i++) + { + dut_sum[0] += (int32_t)ec_dut_samples[i][0]; + dut_sum[1] += (int32_t)ec_dut_samples[i][1]; + } + + real_avg = (float)dut_sum[0] / (float)AD5934_EC_AVERAGES; + imag_avg = (float)dut_sum[1] / (float)AD5934_EC_AVERAGES; + + /* 4. Magnitude Calculation */ + mag_dut = sqrtf((real_avg * real_avg) + (imag_avg * imag_avg)); + + /* 5. Calibration Logic Implementation */ + + // Mode: CALIBRATION SETUP (User is defining the reference magnitude) + if(main_state == STATE_SETUP_CALIBRATION) + { + return mag_dut; + } + // Mode: MEASUREMENT (Applying temperature compensation) + else if(flash_data.ec0_mag != flash_data.ec1413_mag) { - ec_dut_samples[i][0] = ec_dut_samples[i-1][0]; //real - ec_dut_samples[i][1] = ec_dut_samples[i-1][1]; //imag + slope = (AD5934_GAIN_FACTOR_1413US/(flash_data.ec1413_mag-flash_data.ec0_mag)); + + return(AD5934_GAIN_FACTOR_1413US + (mag_dut - flash_data.ec1413_mag) * slope); } + else + return 0.0f; // Calibration error fallback - // Read real and imaginary data - ec_dut_samples[0][0] = (int16_t)(sample_dut & 0x0000FFFF); //real - ec_dut_samples[0][1] = (int16_t)((sample_dut & 0xFFFF0000)>>16); //imag - - for (i = 0, dut_sum[0]=0, dut_sum[1]=0; i < AD5934_EC_AVERAGES; i++) - { - dut_sum[0] += (int32_t)ec_dut_samples[i][0]; //real - dut_sum[1] += (int32_t)ec_dut_samples[i][1]; //imag - } - - real_number = ((float)dut_sum[0])/((float)AD5934_EC_AVERAGES); - imag_number = ((float)dut_sum[1])/((float)AD5934_EC_AVERAGES); - - // Calculate unknown magnitude - mag_dut = sqrtf((real_number * real_number) + (imag_number * imag_number)); - - - // Calculate gain factor for the unknown magnitude - - if(main_state == STATE_SETUP_CALIBRATION) - return(mag_dut); - else if(flash_data.ec12880_value != flash_data.ec1413_value) - { - slope = ((AD5934_GAIN_FACTOR_12880US - AD5934_GAIN_FACTOR_1413US)/(flash_data.ec12880_value - flash_data.ec1413_value)); - - return(AD5934_GAIN_FACTOR_1413US + (mag_dut - flash_data.ec1413_value) * slope); - } - else - return 0.0f; } @@ -462,6 +474,46 @@ float AD5934_Linear_Correction(float raw_value) return (raw_value * slope) + offset; } + +/** + * @brief Internal helper to interpolate conductivity from the temperature matrix. + * @param temp The current temperature in Celsius. + * @return Interpolated conductivity value in uS/cm. + */ +float AD5934_Get_Target_Conductivity(float temp) +{ + /* Matrix: Row 0 = Temperature (ºC), Row 1 = Conductivity (uS/cm) */ + const float matrix[2][12] = { + {5, 10, 15, 18, 20, 22, 25, 30, 35, 40, 45, 50}, + {893, 1018, 1149, 1225, 1278, 1329, 1413, 1552, 1691, 1843, 1988, 2145} + }; + + // Boundary Check: Lower + if (temp <= matrix[0][0]) + temp = 5; + + // Boundary Check: Upper + if (temp >= matrix[0][11]) + temp = 50; + + // Linear Interpolation logic + for (int i = 0; i < 11; i++) + { + if (temp >= matrix[0][i] && temp <= matrix[0][i+1]) + { + float t0 = matrix[0][i]; + float t1 = matrix[0][i+1]; + float c0 = matrix[1][i]; + float c1 = matrix[1][i+1]; + + // Formula: y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0)) + return c0 + (temp - t0) * ((c1 - c0) / (t1 - t0)); + } + } + return (matrix[1][6]); // Mid point Fallback +} + + /***************************************************************************** * ADG715 ***************************************************************************** diff --git a/Fertirrega_v6/Core/Src/adc.c b/Fertirrega_v6/Core/Src/adc.c index 1c0673f..7e5612a 100644 --- a/Fertirrega_v6/Core/Src/adc.c +++ b/Fertirrega_v6/Core/Src/adc.c @@ -26,7 +26,6 @@ ADC_HandleTypeDef hadc1; ADC_HandleTypeDef hadc2; -DMA_HandleTypeDef hdma_adc1; /* ADC1 init function */ void MX_ADC1_Init(void) @@ -45,12 +44,12 @@ void MX_ADC1_Init(void) /** Common config */ hadc1.Instance = ADC1; - hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - hadc1.Init.ContinuousConvMode = DISABLE; + hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; + hadc1.Init.ContinuousConvMode = ENABLE; hadc1.Init.DiscontinuousConvMode = DISABLE; - hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T3_TRGO; + hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - hadc1.Init.NbrOfConversion = 2; + hadc1.Init.NbrOfConversion = 1; if (HAL_ADC_Init(&hadc1) != HAL_OK) { Error_Handler(); @@ -58,18 +57,9 @@ void MX_ADC1_Init(void) /** Configure Regular Channel */ - sConfig.Channel = ADC_CHANNEL_VREFINT; + sConfig.Channel = ADC_CHANNEL_0; sConfig.Rank = ADC_REGULAR_RANK_1; - sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; - if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - { - Error_Handler(); - } - - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_TEMPSENSOR; - sConfig.Rank = ADC_REGULAR_RANK_2; + sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) { Error_Handler(); @@ -97,7 +87,7 @@ void MX_ADC2_Init(void) */ hadc2.Instance = ADC2; hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; - hadc2.Init.ContinuousConvMode = DISABLE; + hadc2.Init.ContinuousConvMode = ENABLE; hadc2.Init.DiscontinuousConvMode = DISABLE; hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; @@ -143,23 +133,6 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - /* ADC1 DMA Init */ - /* ADC1 Init */ - hdma_adc1.Instance = DMA1_Channel1; - hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; - hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; - hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; - hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; - hdma_adc1.Init.Mode = DMA_CIRCULAR; - hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; - if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1); - /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ @@ -204,8 +177,6 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle) */ HAL_GPIO_DeInit(GPIOA, AIN1_Pin|AIN2_Pin); - /* ADC1 DMA DeInit */ - HAL_DMA_DeInit(adcHandle->DMA_Handle); /* USER CODE BEGIN ADC1_MspDeInit 1 */ /* USER CODE END ADC1_MspDeInit 1 */ diff --git a/Fertirrega_v6/Core/Src/ads1015_driver.c b/Fertirrega_v6/Core/Src/ads1015_driver.c index 3e92a0d..b0ad989 100644 --- a/Fertirrega_v6/Core/Src/ads1015_driver.c +++ b/Fertirrega_v6/Core/Src/ads1015_driver.c @@ -290,6 +290,9 @@ float ADSCalculate_ph_Volts(void) } + + + /** * @brief Calcula o valor de pH compensado pela temperatura. * @@ -298,23 +301,21 @@ float ADSCalculate_ph_Volts(void) * * @return float Valor de pH calculado (0.0 a 14.0). */ -float ADSCalculate_ph_Compensated(int16_t adc_raw, float temp_dut) +float ADSCalculate_ph_Compensated(float temp_dut) { - - // 1. Converter leitura bruta do ADC para tensão real (Volts) - float v_measured = ((float)adc_raw * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; + float v_measured = ((float)(2048 - ADSreadADC_Differential_0_1(&i2c)) * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; // 2. Calcular o Slope original (medido na temperatura da calibração) // Delta pH é fixo em 3.0 (de pH 7 para pH 4) - float delta_v_calib = flash_data.ph7_value - flash_data.ph4_value; + float delta_v_calib = flash_data.ph7_volts - flash_data.ph4_volts; if (delta_v_calib == 0.0f) { return 0.0f; // Proteção contra erro de calibração/divisão por zero } - float slope_at_calib = 3.0f / delta_v_calib; + float slope_at_calib = PH_DELTA_CALIB / delta_v_calib; // 3. Calcular o Fator de Correção Térmica (Equação de Nernst) float temp_k_now = temp_dut + ADS1015_KELVIN_OFFSET; @@ -328,7 +329,7 @@ float ADSCalculate_ph_Compensated(int16_t adc_raw, float temp_dut) * O Slope ajustado para a temperatura atual é: slope_at_calib / thermal_factor * Fórmula: pH = pH_ref + (V_medido - V_ref_7) * Slope_ajustado */ - float ph_result = 7.0f + ((v_measured - flash_data.ph7_value) * (slope_at_calib / thermal_factor)); + float ph_result = 7.0f + ((v_measured - flash_data.ph7_volts) * (slope_at_calib / thermal_factor)); // 5. Clamping (Garantir limites físicos) if (ph_result < 0.0f) ph_result = 0.0f; @@ -336,3 +337,95 @@ float ADSCalculate_ph_Compensated(int16_t adc_raw, float temp_dut) return ph_result; } + +/** + * @brief Calculates the pH value without temperature compensation. + * + * This version ignores the current temperature (temp_dut) and assumes + * the electrode slope remains constant as calibrated. + * + * @param temp_dut Unused in this non-compensated version. + * @return float Calculated pH value [0.0, 14.0]. Returns 0.0 if calibration error detected. + */ +float ADSCalculate_ph_Uncompensated(void) +{ + /* + * 1. Convert raw ADC reading to actual voltage (Volts). + * Note: The subtraction of 2048 assumes a differential configuration + * where the midpoint is at the mid-scale of the ADS1015. + */ + float v_measured = ((float)(2048 - ADSreadADC_Differential_0_1(&i2c)) * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; + + /* + * 2. Calculate the original Slope (measured during calibration). + * PH_DELTA_CALIB is a constant representing the pH difference between + * calibration points (e.g., |7.0 - 4.0| = 3.0). + */ + float delta_v_calib = flash_data.ph7_volts - flash_data.ph4_volts; + + /* Safety check: Prevent division by zero if calibration data is invalid */ + if (delta_v_calib == 0.0f) + { + return 0.0f; + } + + /* Slope = Delta pH / Delta Voltage */ + float slope_at_calib = PH_DELTA_CALIB / delta_v_calib; + + /* + * 3. Final pH Calculation (Non-compensated) + * Formula: pH = pH_ref + (V_measured - V_ref_7) * Slope + * Where pH_ref is 7.0. + */ + float ph_result = 7.0f + ((v_measured - flash_data.ph7_volts) * slope_at_calib); + + /* 4. Clamping (Ensure physical limits of the pH scale) */ + if (ph_result < 0.0f) + { + ph_result = 0.0f; + } + else if (ph_result > 14.0f) + { + ph_result = 14.0f; + } + + return ph_result; +} + +/** + * @brief Performs linear interpolation for a given temperature within the LUT. + * + * @param temp_target The target temperature to interpolate for. + * @param row_index Index of the buffer row (1 for pH4, 2 for pH7). + * @return float Interpolated value from the matrix. + */ +float ADSinterpolate_ph(float temp_target, uint8_t row_index) +{ + + /* Matrix with {Temperature, Ph 4 Buffer, Ph 7 Buffer} */ + const float lut_matrix_buffer_ph[ADS1015_INTERPOLATION_ROWS][ADS1015_PH_TEMP_INTER_POINTS] = { + {0.0f, 5.0f, 10.0f, 15.0f, 20.0f, 25.0f, 30.0f, 35.0f, 40.0f, 45.0f, 50.0f, 55.0f}, // Temperature + {4.01f, 4.00f, 4.00f, 4.00f, 4.00f, 4.01f, 4.01f, 4.02f, 4.03f, 4.05f, 4.06f, 4.10f}, // Buffer ph 4 + {7.12f, 7.07f, 7.05f, 7.03f, 7.01f, 7.00f, 6.98f, 6.97f, 6.96f, 6.96f, 6.96f, 6.96f},}; // Buffer ph 7 + uint8_t i = 0; + + /* Boundary Check: Clamp to first or last index if out of range */ + if (temp_target <= lut_matrix_buffer_ph[0][0]) return lut_matrix_buffer_ph[row_index][0]; + if (temp_target >= lut_matrix_buffer_ph[0][ADS1015_PH_TEMP_INTER_POINTS-1]) return lut_matrix_buffer_ph[row_index][ADS1015_PH_TEMP_INTER_POINTS-1]; + + /* Find interpolation interval */ + while (i < (ADS1015_PH_TEMP_INTER_POINTS-1) && lut_matrix_buffer_ph[0][i+1] < temp_target) + { + i++; + } + + float x0 = lut_matrix_buffer_ph[0][i]; + float x1 = lut_matrix_buffer_ph[0][i+1]; + float y0 = lut_matrix_buffer_ph[row_index][i]; + float y1 = lut_matrix_buffer_ph[row_index][i+1]; + + /* Linear Interpolation: y = y0 + (x - x0) * ((y1 - y_0) / (x1 - x0)) */ + return y0 + (temp_target - x0) * ((y1 - y0) / (x1 - x0)); +} + + diff --git a/Fertirrega_v6/Core/Src/gpio.c b/Fertirrega_v6/Core/Src/gpio.c index 77dc378..358d001 100644 --- a/Fertirrega_v6/Core/Src/gpio.c +++ b/Fertirrega_v6/Core/Src/gpio.c @@ -96,8 +96,10 @@ void MX_GPIO_Init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - /*Configure GPIO pins : RS485_Addr4_Pin RS485_Addr5_Pin RS485_Addr6_Pin RS485_Addr7_Pin */ - GPIO_InitStruct.Pin = RS485_Addr4_Pin|RS485_Addr5_Pin|RS485_Addr6_Pin|RS485_Addr7_Pin; + /*Configure GPIO pins : RS485_Addr4_Pin RS485_Addr5_Pin RS485_Addr6_Pin RS485_Addr7_Pin + Calib_PH_Pin */ + GPIO_InitStruct.Pin = RS485_Addr4_Pin|RS485_Addr5_Pin|RS485_Addr6_Pin|RS485_Addr7_Pin + |Calib_PH_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_PULLUP; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); @@ -109,16 +111,6 @@ void MX_GPIO_Init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(TX_EN_RS485_GPIO_Port, &GPIO_InitStruct); - /*Configure GPIO pin : Calib_PH_Pin */ - GPIO_InitStruct.Pin = Calib_PH_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING; - GPIO_InitStruct.Pull = GPIO_PULLUP; - HAL_GPIO_Init(Calib_PH_GPIO_Port, &GPIO_InitStruct); - - /* EXTI interrupt init*/ - HAL_NVIC_SetPriority(EXTI3_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(EXTI3_IRQn); - } /* USER CODE BEGIN 2 */ @@ -130,9 +122,12 @@ void MX_GPIO_Init(void) * @param GPIO_Pin: Specifies the pins connected to the EXTI line. * @retval None */ + + void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { - if ((GPIO_Pin == Calib_PH_Pin) && (main_state == STATE_RUNNING_OK)) + /* External Interrupt + if ((GPIO_Pin == Calib_PH_Pin) && (main_state == STATE_RUNNING_OK)) { uint32_t current_time = HAL_GetTick(); GPIO_PinState pin_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_3); @@ -148,14 +143,14 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { if(pin_state == GPIO_PIN_RESET) { - /* --- LOGIC FOR FALLING EDGE HERE --- */ + // --- LOGIC FOR FALLING EDGE HERE --- //HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); //HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_RESET); edge_state = FALLING_EDGE; } else { - /* --- LOGIC FOR RISING EDGE HERE --- */ + // --- LOGIC FOR RISING EDGE HERE --- //HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_RESET); //HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); edge_state = RISING_EDGE; @@ -166,6 +161,7 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) } } } + */ } diff --git a/Fertirrega_v6/Core/Src/main.c b/Fertirrega_v6/Core/Src/main.c index f9f884d..693ed52 100644 --- a/Fertirrega_v6/Core/Src/main.c +++ b/Fertirrega_v6/Core/Src/main.c @@ -19,9 +19,7 @@ /* Includes ------------------------------------------------------------------*/ #include "main.h" #include "adc.h" -#include "dma.h" #include "i2c.h" -#include "tim.h" #include "usart.h" #include "gpio.h" @@ -73,7 +71,6 @@ uint8_t doubleSpace[]={'_','_'}; uint8_t newline_ph[]={'_','p','H','\n','\0'}; uint8_t newline_admi[]={'_','u','S','\n','\0'}; uint8_t newline_temp[]={' ','°','C','\n','\0'}; -uint8_t newline_real[]={'_','°','C','\n','\0'}; uint8_t newline_imag[]={'_','O','h','m','\n','\0'}; uint8_t newline_485[]={'_','a','d','\n','\0'}; uint8_t minus[]={'-',' '}; @@ -154,23 +151,22 @@ int main(void) /* Initialize all configured peripherals */ MX_GPIO_Init(); - MX_DMA_Init(); MX_ADC1_Init(); MX_ADC2_Init(); MX_I2C1_Init(); MX_I2C2_Init(); MX_USART1_UART_Init(); - MX_TIM3_Init(); /* USER CODE BEGIN 2 */ Flash_Load_Page(&flash_data); //TempSensor_Init(&hadc1); - +/* HAL_TIM_Base_Start(&htim3); HAL_ADCEx_Calibration_Start(&hadc1); - HAL_ADC_Start_DMA(&hadc1, (uint32_t*)AD_RES, 2); // Start ADC Conversion + HAL_ADC_Start_DMA(&hadc1, (uint32_t*)AD_RES, 2); // Internal Temperature conversion +*/ digital_outputs_init(); @@ -190,18 +186,28 @@ int main(void) /* Infinite loop */ /* USER CODE BEGIN WHILE */ - if(HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_3) == GPIO_PIN_RESET) + if(HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_3) == GPIO_PIN_RESET) // When PB3 (with internal pull up) in the Prog Header is set to GND { + main_state = STATE_SETUP_CALIBRATION; HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_RESET); // Red LED On - for(i=0;i<32;i++) + for(i=0;i<32;i++) // Loop to get stability and get averages { - flash_data.temperature_value = temperature_RTD; - flash_data.ph4_value = ADSCalculate_ph_Volts(); - flash_data.ec1413_value = AD5934_GetImpedance(); + flash_data.ph4_volts = ADSCalculate_ph_Volts(); + flash_data.temperature_value = AD5934_GetTemperature(); // Air Temperature is not stored, just used to calculate impedance + flash_data.ec0_mag = AD5934_GetImpedance(flash_data.temperature_value); // Dry Probe + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) + flash_data.EC10mS_EC5mS_switch = AD5934_CH_EC_HIGH_GAIN; // 5mS/cm option + else + flash_data.EC10mS_EC5mS_switch = AD5934_CH_EC_MID_GAIN; //10ms/cm option + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) + flash_data.PT100_PT1000_switch = AD5934_CH_RTD_LOW_GAIN; //PT100 option + else + flash_data.PT100_PT1000_switch = AD5934_CH_RTD_MID_GAIN; //PT1000 option + } @@ -211,11 +217,12 @@ int main(void) HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_RESET); // Green LED On HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); - for(i=0;i<32;i++) + for(i=0;i<32;i++) // Loop to get stability and get averages { - flash_data.ph7_value = ADSCalculate_ph_Volts(); - flash_data.ec12880_value = AD5934_GetImpedance(); - Flash_Save_Page(&flash_data); + flash_data.temperature_value = AD5934_GetTemperature(); // Liquid Temperature is stored + flash_data.ph7_volts = ADSCalculate_ph_Volts(); + flash_data.ec1413_mag = AD5934_GetImpedance(flash_data.temperature_value); // Get the impedance of the reference liquid + Flash_Save_Page(&flash_data); // Store Calibration parameters in Flash } HAL_Delay(500); @@ -227,169 +234,100 @@ int main(void) } while (1) { + + + + + current_millis = HAL_GetTick(); + + + // Piscar LED verde em PB5 a cada 0,5 segundos + if ((current_millis - previous_millis_green) >= 500) + { + previous_millis_green = current_millis; + HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_5); + + // Check if state changed and send via RS485 + uint8_t current_green_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_5); + if (current_green_state != previous_green_state) + { + previous_green_state = current_green_state; + uint8_t led_data[2] = {0x01, current_green_state}; // Command 0x01 for green LED + + } + + temperature_RTD = AD5934_GetTemperature(); + FloatToString(tempString, temperature_RTD); + status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); + status1 = rs485_send_broadcast(newline_temp, strlen((char*)newline_temp)); + + admittance_EC = AD5934_GetImpedance(temperature_RTD); + FloatToString(tempString, admittance_EC); + status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); + status1 = rs485_send_broadcast(newline_admi, strlen((char*)newline_admi)); + + } + + // Piscar LED vermelho em PB4 a cada 1 segundo + if ((current_millis - previous_millis_red) >= 1000) + { + previous_millis_red = current_millis; + HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_4); + + // Check if state changed and send via RS485 + uint8_t current_red_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_4); + if (current_red_state != previous_red_state) + { + previous_red_state = current_red_state; + uint8_t led_data[2] = {0x02, current_red_state}; // Command 0x02 for red LED + + } + + + ph_compensated = ADSCalculate_ph_Uncompensated(); + FloatToString(tempString, ph_compensated); + status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); + status1 = rs485_send_broadcast(newline_ph, strlen((char*)newline_ph)); + + + } + + + /* + if(UpdateEvent) // Internal Temperature + { + + for (i = (STM32_TEMPERATURE_AVERAGES-1); i > 0; i--) + Temp_Samples[i] = Temp_Samples[i-1]; + + + // Read real and imaginary data + if(AD_RES[0]>0.0f) + V_Ref = (float)((V_REF_INT * 4095.0)/AD_RES[0]); + else + V_Ref = 0.0f; + V_Sense = (float)(AD_RES[1] * V_Ref) / 4095.0; + Temp_Samples[0] = (((V_AT_25C - V_Sense) * 1000.0) /AVG_SLOPE) + 25.0; + + for (i = 0, Temp_Sum=0; i < STM32_TEMPERATURE_AVERAGES; i++) + Temp_Sum += Temp_Samples[i]; + + Temperature = Temp_Sum/((float)STM32_TEMPERATURE_AVERAGES); + + UpdateEvent = 0; + } + */ + + } + + /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ - current_millis = HAL_GetTick(); - // Piscar LED verde em PB5 a cada 0,5 segundos - if ((current_millis - previous_millis_green) >= 500) - { - previous_millis_green = current_millis; - - /*HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_5); - - // Check if state changed and send via RS485 - uint8_t current_green_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_5); - if (current_green_state != previous_green_state) - { - previous_green_state = current_green_state; - uint8_t led_data[2] = {0x01, current_green_state}; // Command 0x01 for green LED - - }*/ - - FloatToString(tempString, Temperature); - status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); - status1 = rs485_send_broadcast(newline_temp, strlen((char*)newline_temp)); - - - temperature_RTD = AD5934_GetTemperature(); - FloatToString(tempString, temperature_RTD); - status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); - status1 = rs485_send_broadcast(newline_real, strlen((char*)newline_real)); - - - - ph_compensated = ADSCalculate_ph_Compensated((2048 - ADSreadADC_Differential_0_1(&i2c)),flash_data.temperature_value); - FloatToString(tempString, ph_compensated); - status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); - status1 = rs485_send_broadcast(newline_ph, strlen((char*)newline_ph)); - - - admittance_EC = AD5934_GetImpedance(); - FloatToString(tempString, admittance_EC); - status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); - status1 = rs485_send_broadcast(newline_admi, strlen((char*)newline_admi)); - - } - else if(UpdateEvent) - { - - for (i = (STM32_TEMPERATURE_AVERAGES-1); i > 0; i--) - Temp_Samples[i] = Temp_Samples[i-1]; - - - // Read real and imaginary data - if(AD_RES[0]>0.0f) - V_Ref = (float)((V_REF_INT * 4095.0)/AD_RES[0]); - else - V_Ref = 0.0f; - V_Sense = (float)(AD_RES[1] * V_Ref) / 4095.0; - Temp_Samples[0] = (((V_AT_25C - V_Sense) * 1000.0) /AVG_SLOPE) + 25.0; - - for (i = 0, Temp_Sum=0; i < STM32_TEMPERATURE_AVERAGES; i++) - Temp_Sum += Temp_Samples[i]; - - Temperature = Temp_Sum/((float)STM32_TEMPERATURE_AVERAGES); - - UpdateEvent = 0; - } - - - - - // Piscar LED vermelho em PB4 a cada 1 segundo - /* if ((current_millis - previous_millis_red) >= 700) - { - previous_millis_red = current_millis; - HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_4); - - // Check if state changed and send via RS485 - uint8_t current_red_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_4); - if (current_red_state != previous_red_state) - { - previous_red_state = current_red_state; - uint8_t led_data[2] = {0x02, current_red_state}; // Command 0x02 for red LED - - } - - // Check if state changed and send via RS485 - rs485_address = rs485_get_address(); - - intToStr(rs485_address, rs485_text); - - // Send broadcast message - status0 = rs485_send_broadcast(rs485_text, strlen((char*)rs485_text)); - status1 = rs485_send_broadcast(newline_485, strlen((char*)newline_485)); - status1 = rs485_send_broadcast(newline, strlen((char*)newline)); - - - // Set channels in the Analog Switch - - - //tempByte = ad5934_sample_BL.bytes[0]; - //ad5934_sample_BL.bytes[0] = ad5934_sample_BL.bytes[1]; - //ad5934_sample_BL.bytes[1] = tempByte; - //tempByte = ad5934_sample_BL.bytes[2]; - //ad5934_sample_BL.bytes[2] = ad5934_sample_BL.bytes[3]; - //ad5934_sample_BL.bytes[3] = tempByte; - //ad5934_sample_IL.number = ad5934_sample_BL.number; - - - // ad5934_sample_IL.number = AD5934_Sweep(); - // intToStr((ad5934_sample_IL.ints[0]), real_text); - // status0 = rs485_send_broadcast(real_text, strlen((char*)real_text)); - // status1 = rs485_send_broadcast(newline_real, strlen((char*)newline_real)); - // intToStr((ad5934_sample_IL.ints[1]), imag_text); - //status0 = rs485_send_broadcast(imag_text, strlen((char*)imag_text)); - //status1 = rs485_send_broadcast(newline_imag, strlen((char*)newline_imag)); - - - - - //AD5934_GetImpedance(CH_EC); - //FloatToString(tempString, ad5934_impedances_average[0]); - //status0 = rs485_send_broadcast(tempString, strlen((char*)tempString)); - //status1 = rs485_send_broadcast(newline_imag, strlen((char*)newline_imag)); - - - //impedance_EC = AD5934_CalculateImpedance(); - //FloatToString(tempString, impedance_EC); - //status0 = rs485_send_broadcast(tempString, strlen((char*)tempString)); - //status1 = rs485_send_broadcast(newline_imag, strlen((char*)newline_imag)); - - - - // Read ADC value - int16_t adc_value = 2048 - ADSreadADC_Differential_0_1(&i2c); - intToStr(adc_value, adc_text); - - // - status0 = rs485_send_broadcast(adc_text, strlen((char*)adc_text)); - status1 = rs485_send_broadcast(newline_ph, strlen((char*)newline_ph)); - status1 = rs485_send_broadcast(newline, strlen((char*)newline)); - - - }*/ - - - // Read ADC value - // int16_t adc_value = 2048 - ADSreadADC_Differential_0_1(&i2c); - // intToStr(adc_value, adc_text); - - // - // status0 = rs485_send_broadcast(adc_text, strlen((char*)adc_text)); - // status1 = rs485_send_broadcast(newline_ph, strlen((char*)newline_ph)); - // status1 = rs485_send_broadcast(newline, strlen((char*)newline)); - - - - - - } /* USER CODE END 3 */ } @@ -547,11 +485,12 @@ void intToStr(int N, char *str) { } } - +/* void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) { - UpdateEvent = 1; + UpdateEvent = 1; // Internal TEmperature } +*/ /* USER CODE END 4 */ diff --git a/Fertirrega_v6/Core/Src/stm32f1xx_it.c b/Fertirrega_v6/Core/Src/stm32f1xx_it.c index 81ff9d6..f9bdda4 100644 --- a/Fertirrega_v6/Core/Src/stm32f1xx_it.c +++ b/Fertirrega_v6/Core/Src/stm32f1xx_it.c @@ -55,7 +55,6 @@ /* USER CODE END 0 */ /* External variables --------------------------------------------------------*/ -extern DMA_HandleTypeDef hdma_adc1; extern UART_HandleTypeDef huart1; /* USER CODE BEGIN EV */ @@ -199,34 +198,6 @@ void SysTick_Handler(void) /* please refer to the startup file (startup_stm32f1xx.s). */ /******************************************************************************/ -/** - * @brief This function handles EXTI line3 interrupt. - */ -void EXTI3_IRQHandler(void) -{ - /* USER CODE BEGIN EXTI3_IRQn 0 */ - - /* USER CODE END EXTI3_IRQn 0 */ - HAL_GPIO_EXTI_IRQHandler(Calib_PH_Pin); - /* USER CODE BEGIN EXTI3_IRQn 1 */ - - /* USER CODE END EXTI3_IRQn 1 */ -} - -/** - * @brief This function handles DMA1 channel1 global interrupt. - */ -void DMA1_Channel1_IRQHandler(void) -{ - /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ - - /* USER CODE END DMA1_Channel1_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_adc1); - /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ - - /* USER CODE END DMA1_Channel1_IRQn 1 */ -} - /** * @brief This function handles USART1 global interrupt. */ diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo index 9c96e62..0abd329 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo @@ -3,13 +3,14 @@ ../Core/Src/ad5934_driver.c:100:10:AD5934_ReadRegister 3 ../Core/Src/ad5934_driver.c:137:6:AD5934_Init 1 ../Core/Src/ad5934_driver.c:165:6:AD5934_RestartSweep 1 -../Core/Src/ad5934_driver.c:192:10:AD5934_Sweep 1 -../Core/Src/ad5934_driver.c:217:7:AD5934_GetTemperature 11 -../Core/Src/ad5934_driver.c:334:7:AD5934_GetImpedance 6 -../Core/Src/ad5934_driver.c:395:6:AD5934_Wait_For_Data_Valid 3 -../Core/Src/ad5934_driver.c:430:7:AD5934_Round_Float_Precision 2 -../Core/Src/ad5934_driver.c:455:7:AD5934_Linear_Correction 1 -../Core/Src/ad5934_driver.c:477:6:ADG715_SetRegisterValue 1 -../Core/Src/ad5934_driver.c:487:6:ADG715_SetChannels 1 -../Core/Src/ad5934_driver.c:492:6:ADG715_ResetChannels 1 -../Core/Src/ad5934_driver.c:504:6:ADG715_Update 16 +../Core/Src/ad5934_driver.c:195:10:AD5934_Sweep 1 +../Core/Src/ad5934_driver.c:221:7:AD5934_GetTemperature 11 +../Core/Src/ad5934_driver.c:338:7:AD5934_GetImpedance 8 +../Core/Src/ad5934_driver.c:407:6:AD5934_Wait_For_Data_Valid 3 +../Core/Src/ad5934_driver.c:442:7:AD5934_Round_Float_Precision 2 +../Core/Src/ad5934_driver.c:467:7:AD5934_Linear_Correction 1 +../Core/Src/ad5934_driver.c:483:7:AD5934_Get_Target_Conductivity 6 +../Core/Src/ad5934_driver.c:529:6:ADG715_SetRegisterValue 1 +../Core/Src/ad5934_driver.c:539:6:ADG715_SetChannels 1 +../Core/Src/ad5934_driver.c:544:6:ADG715_ResetChannels 1 +../Core/Src/ad5934_driver.c:556:6:ADG715_Update 16 diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.d b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.d index ead93b8..cf777a6 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.d +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.d @@ -25,8 +25,6 @@ Core/Src/ad5934_driver.o: ../Core/Src/ad5934_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \ ../Core/Inc/flash_manager.h ../Core/Inc/main.h ../Core/Inc/ad5934_driver.h: @@ -55,8 +53,6 @@ Core/Src/ad5934_driver.o: ../Core/Src/ad5934_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: ../Core/Inc/flash_manager.h: ../Core/Inc/main.h: diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o index 2270f05..3896191 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o and b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su index d82fc0b..b67c579 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su @@ -3,13 +3,14 @@ ../Core/Src/ad5934_driver.c:100:10:AD5934_ReadRegister 48 static ../Core/Src/ad5934_driver.c:137:6:AD5934_Init 8 static ../Core/Src/ad5934_driver.c:165:6:AD5934_RestartSweep 8 static -../Core/Src/ad5934_driver.c:192:10:AD5934_Sweep 16 static -../Core/Src/ad5934_driver.c:217:7:AD5934_GetTemperature 88 static -../Core/Src/ad5934_driver.c:334:7:AD5934_GetImpedance 48 static -../Core/Src/ad5934_driver.c:395:6:AD5934_Wait_For_Data_Valid 24 static -../Core/Src/ad5934_driver.c:430:7:AD5934_Round_Float_Precision 24 static -../Core/Src/ad5934_driver.c:455:7:AD5934_Linear_Correction 24 static -../Core/Src/ad5934_driver.c:477:6:ADG715_SetRegisterValue 32 static -../Core/Src/ad5934_driver.c:487:6:ADG715_SetChannels 16 static -../Core/Src/ad5934_driver.c:492:6:ADG715_ResetChannels 8 static -../Core/Src/ad5934_driver.c:504:6:ADG715_Update 16 static +../Core/Src/ad5934_driver.c:195:10:AD5934_Sweep 16 static +../Core/Src/ad5934_driver.c:221:7:AD5934_GetTemperature 88 static +../Core/Src/ad5934_driver.c:338:7:AD5934_GetImpedance 56 static +../Core/Src/ad5934_driver.c:407:6:AD5934_Wait_For_Data_Valid 24 static +../Core/Src/ad5934_driver.c:442:7:AD5934_Round_Float_Precision 24 static +../Core/Src/ad5934_driver.c:467:7:AD5934_Linear_Correction 24 static +../Core/Src/ad5934_driver.c:483:7:AD5934_Get_Target_Conductivity 144 static +../Core/Src/ad5934_driver.c:529:6:ADG715_SetRegisterValue 32 static +../Core/Src/ad5934_driver.c:539:6:ADG715_SetChannels 16 static +../Core/Src/ad5934_driver.c:544:6:ADG715_ResetChannels 8 static +../Core/Src/ad5934_driver.c:556:6:ADG715_Update 16 static diff --git a/Fertirrega_v6/Debug/Core/Src/adc.cyclo b/Fertirrega_v6/Debug/Core/Src/adc.cyclo index dc33b58..86f400c 100644 --- a/Fertirrega_v6/Debug/Core/Src/adc.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/adc.cyclo @@ -1,4 +1,4 @@ -../Core/Src/adc.c:32:6:MX_ADC1_Init 4 -../Core/Src/adc.c:83:6:MX_ADC2_Init 3 -../Core/Src/adc.c:125:6:HAL_ADC_MspInit 4 -../Core/Src/adc.c:190:6:HAL_ADC_MspDeInit 3 +../Core/Src/adc.c:31:6:MX_ADC1_Init 3 +../Core/Src/adc.c:73:6:MX_ADC2_Init 3 +../Core/Src/adc.c:115:6:HAL_ADC_MspInit 3 +../Core/Src/adc.c:163:6:HAL_ADC_MspDeInit 3 diff --git a/Fertirrega_v6/Debug/Core/Src/adc.d b/Fertirrega_v6/Debug/Core/Src/adc.d index 9c14eca..b806d53 100644 --- a/Fertirrega_v6/Debug/Core/Src/adc.d +++ b/Fertirrega_v6/Debug/Core/Src/adc.d @@ -24,8 +24,6 @@ Core/Src/adc.o: ../Core/Src/adc.c ../Core/Inc/adc.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/adc.h: ../Core/Inc/main.h: @@ -54,6 +52,4 @@ Core/Src/adc.o: ../Core/Src/adc.c ../Core/Inc/adc.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/adc.o b/Fertirrega_v6/Debug/Core/Src/adc.o index a90ac5a..d45a01d 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/adc.o and b/Fertirrega_v6/Debug/Core/Src/adc.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/adc.su b/Fertirrega_v6/Debug/Core/Src/adc.su index 7af9722..ba3d047 100644 --- a/Fertirrega_v6/Debug/Core/Src/adc.su +++ b/Fertirrega_v6/Debug/Core/Src/adc.su @@ -1,4 +1,4 @@ -../Core/Src/adc.c:32:6:MX_ADC1_Init 24 static -../Core/Src/adc.c:83:6:MX_ADC2_Init 24 static -../Core/Src/adc.c:125:6:HAL_ADC_MspInit 48 static -../Core/Src/adc.c:190:6:HAL_ADC_MspDeInit 16 static +../Core/Src/adc.c:31:6:MX_ADC1_Init 24 static +../Core/Src/adc.c:73:6:MX_ADC2_Init 24 static +../Core/Src/adc.c:115:6:HAL_ADC_MspInit 48 static +../Core/Src/adc.c:163:6:HAL_ADC_MspDeInit 16 static diff --git a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.cyclo b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.cyclo index d3dd754..794a0ab 100644 --- a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.cyclo @@ -10,4 +10,6 @@ ../Core/Src/ads1015_driver.c:213:6:ADSstartComparator_SingleEnded 5 ../Core/Src/ads1015_driver.c:255:9:ADSgetLastConversionResults 3 ../Core/Src/ads1015_driver.c:274:7:ADSCalculate_ph_Volts 3 -../Core/Src/ads1015_driver.c:301:7:ADSCalculate_ph_Compensated 4 +../Core/Src/ads1015_driver.c:304:7:ADSCalculate_ph_Compensated 4 +../Core/Src/ads1015_driver.c:350:7:ADSCalculate_ph_Uncompensated 4 +../Core/Src/ads1015_driver.c:402:7:ADSinterpolate_ph 5 diff --git a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.d b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.d index a1eda2d..a353b18 100644 --- a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.d +++ b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.d @@ -25,8 +25,6 @@ Core/Src/ads1015_driver.o: ../Core/Src/ads1015_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \ ../Core/Inc/flash_manager.h ../Core/Inc/ads1015_driver.h: @@ -56,7 +54,5 @@ Core/Src/ads1015_driver.o: ../Core/Src/ads1015_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: ../Core/Inc/flash_manager.h: diff --git a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o index 72d16ea..5c986fd 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o and b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.su b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.su index 6d56dc7..d677ed1 100644 --- a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.su +++ b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.su @@ -10,4 +10,6 @@ ../Core/Src/ads1015_driver.c:213:6:ADSstartComparator_SingleEnded 24 static ../Core/Src/ads1015_driver.c:255:9:ADSgetLastConversionResults 24 static ../Core/Src/ads1015_driver.c:274:7:ADSCalculate_ph_Volts 16 static -../Core/Src/ads1015_driver.c:301:7:ADSCalculate_ph_Compensated 56 static +../Core/Src/ads1015_driver.c:304:7:ADSCalculate_ph_Compensated 56 static +../Core/Src/ads1015_driver.c:350:7:ADSCalculate_ph_Uncompensated 24 static +../Core/Src/ads1015_driver.c:402:7:ADSinterpolate_ph 192 static diff --git a/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.d b/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.d index cd3a92c..509fe81 100644 --- a/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.d +++ b/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.d @@ -25,8 +25,6 @@ Core/Src/analog_loop_driver.o: ../Core/Src/analog_loop_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/analog_loop_driver.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: @@ -54,6 +52,4 @@ Core/Src/analog_loop_driver.o: ../Core/Src/analog_loop_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.o b/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.o index 3b92821..aac2451 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.o and b/Fertirrega_v6/Debug/Core/Src/analog_loop_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.d b/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.d index 0a14171..5cf2c04 100644 --- a/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.d +++ b/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.d @@ -25,8 +25,6 @@ Core/Src/digital_outputs_driver.o: ../Core/Src/digital_outputs_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/digital_outputs_driver.h: ../Core/Inc/main.h: @@ -55,6 +53,4 @@ Core/Src/digital_outputs_driver.o: ../Core/Src/digital_outputs_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.o b/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.o index afec9aa..7c0ec9e 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.o and b/Fertirrega_v6/Debug/Core/Src/digital_outputs_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/flash_manager.d b/Fertirrega_v6/Debug/Core/Src/flash_manager.d index 4954169..46cfc5a 100644 --- a/Fertirrega_v6/Debug/Core/Src/flash_manager.d +++ b/Fertirrega_v6/Debug/Core/Src/flash_manager.d @@ -25,8 +25,6 @@ Core/Src/flash_manager.o: ../Core/Src/flash_manager.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/flash_manager.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: @@ -54,6 +52,4 @@ Core/Src/flash_manager.o: ../Core/Src/flash_manager.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/flash_manager.o b/Fertirrega_v6/Debug/Core/Src/flash_manager.o index 8a13eb6..622adfe 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/flash_manager.o and b/Fertirrega_v6/Debug/Core/Src/flash_manager.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/gpio.cyclo b/Fertirrega_v6/Debug/Core/Src/gpio.cyclo index b137c57..5413304 100644 --- a/Fertirrega_v6/Debug/Core/Src/gpio.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/gpio.cyclo @@ -1,2 +1,2 @@ ../Core/Src/gpio.c:52:6:MX_GPIO_Init 1 -../Core/Src/gpio.c:133:6:HAL_GPIO_EXTI_Callback 8 +../Core/Src/gpio.c:127:6:HAL_GPIO_EXTI_Callback 1 diff --git a/Fertirrega_v6/Debug/Core/Src/gpio.d b/Fertirrega_v6/Debug/Core/Src/gpio.d index 9fa10f8..20d43e5 100644 --- a/Fertirrega_v6/Debug/Core/Src/gpio.d +++ b/Fertirrega_v6/Debug/Core/Src/gpio.d @@ -24,8 +24,6 @@ Core/Src/gpio.o: ../Core/Src/gpio.c ../Core/Inc/gpio.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/gpio.h: ../Core/Inc/main.h: @@ -54,6 +52,4 @@ Core/Src/gpio.o: ../Core/Src/gpio.c ../Core/Inc/gpio.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/gpio.o b/Fertirrega_v6/Debug/Core/Src/gpio.o index 933dd52..edec53d 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/gpio.o and b/Fertirrega_v6/Debug/Core/Src/gpio.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/gpio.su b/Fertirrega_v6/Debug/Core/Src/gpio.su index b33e591..b03f1f2 100644 --- a/Fertirrega_v6/Debug/Core/Src/gpio.su +++ b/Fertirrega_v6/Debug/Core/Src/gpio.su @@ -1,2 +1,2 @@ ../Core/Src/gpio.c:52:6:MX_GPIO_Init 40 static -../Core/Src/gpio.c:133:6:HAL_GPIO_EXTI_Callback 24 static +../Core/Src/gpio.c:127:6:HAL_GPIO_EXTI_Callback 16 static diff --git a/Fertirrega_v6/Debug/Core/Src/i2c.d b/Fertirrega_v6/Debug/Core/Src/i2c.d index 7d7127c..949fc8b 100644 --- a/Fertirrega_v6/Debug/Core/Src/i2c.d +++ b/Fertirrega_v6/Debug/Core/Src/i2c.d @@ -24,8 +24,6 @@ Core/Src/i2c.o: ../Core/Src/i2c.c ../Core/Inc/i2c.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/i2c.h: ../Core/Inc/main.h: @@ -54,6 +52,4 @@ Core/Src/i2c.o: ../Core/Src/i2c.c ../Core/Inc/i2c.h ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/i2c.o b/Fertirrega_v6/Debug/Core/Src/i2c.o index 7759925..b30da5a 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/i2c.o and b/Fertirrega_v6/Debug/Core/Src/i2c.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/main.cyclo b/Fertirrega_v6/Debug/Core/Src/main.cyclo index 214fbb0..49230b8 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/main.cyclo @@ -1,6 +1,5 @@ -../Core/Src/main.c:111:5:main 10 -../Core/Src/main.c:400:6:SystemClock_Config 4 -../Core/Src/main.c:455:6:FloatToString 8 -../Core/Src/main.c:517:6:intToStr 5 -../Core/Src/main.c:555:6:HAL_ADC_ConvCpltCallback 1 -../Core/Src/main.c:566:6:Error_Handler 1 +../Core/Src/main.c:108:5:main 11 +../Core/Src/main.c:338:6:SystemClock_Config 4 +../Core/Src/main.c:389:6:FloatToString 8 +../Core/Src/main.c:451:6:intToStr 5 +../Core/Src/main.c:501:6:Error_Handler 1 diff --git a/Fertirrega_v6/Debug/Core/Src/main.d b/Fertirrega_v6/Debug/Core/Src/main.d index c6b3df6..fb8896e 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.d +++ b/Fertirrega_v6/Debug/Core/Src/main.d @@ -24,14 +24,11 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \ - ../Core/Inc/adc.h ../Core/Inc/main.h ../Core/Inc/dma.h ../Core/Inc/i2c.h \ - ../Core/Inc/tim.h ../Core/Inc/usart.h ../Core/Inc/gpio.h \ - ../Core/Inc/ads1015_driver.h ../Core/Inc/flash_manager.h \ - ../Core/Inc/digital_outputs_driver.h ../Core/Inc/ad5934_driver.h \ - ../Core/Inc/rs485_driver.h \ + ../Core/Inc/adc.h ../Core/Inc/main.h ../Core/Inc/i2c.h \ + ../Core/Inc/usart.h ../Core/Inc/gpio.h ../Core/Inc/ads1015_driver.h \ + ../Core/Inc/flash_manager.h ../Core/Inc/digital_outputs_driver.h \ + ../Core/Inc/ad5934_driver.h ../Core/Inc/rs485_driver.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h \ ../Core/Inc/flash_manager.h ../Core/Inc/main.h: @@ -60,14 +57,10 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: ../Core/Inc/adc.h: ../Core/Inc/main.h: -../Core/Inc/dma.h: ../Core/Inc/i2c.h: -../Core/Inc/tim.h: ../Core/Inc/usart.h: ../Core/Inc/gpio.h: ../Core/Inc/ads1015_driver.h: diff --git a/Fertirrega_v6/Debug/Core/Src/main.o b/Fertirrega_v6/Debug/Core/Src/main.o index 3be848f..2542932 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/main.o and b/Fertirrega_v6/Debug/Core/Src/main.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/main.su b/Fertirrega_v6/Debug/Core/Src/main.su index b74fde1..1aa96c8 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.su +++ b/Fertirrega_v6/Debug/Core/Src/main.su @@ -1,6 +1,5 @@ -../Core/Src/main.c:111:5:main 56 static -../Core/Src/main.c:400:6:SystemClock_Config 88 static -../Core/Src/main.c:455:6:FloatToString 104 static -../Core/Src/main.c:517:6:intToStr 40 static -../Core/Src/main.c:555:6:HAL_ADC_ConvCpltCallback 16 static -../Core/Src/main.c:566:6:Error_Handler 4 static,ignoring_inline_asm +../Core/Src/main.c:108:5:main 72 static +../Core/Src/main.c:338:6:SystemClock_Config 88 static +../Core/Src/main.c:389:6:FloatToString 104 static +../Core/Src/main.c:451:6:intToStr 40 static +../Core/Src/main.c:501:6:Error_Handler 4 static,ignoring_inline_asm diff --git a/Fertirrega_v6/Debug/Core/Src/rs485_driver.d b/Fertirrega_v6/Debug/Core/Src/rs485_driver.d index 2293930..ade9ed2 100644 --- a/Fertirrega_v6/Debug/Core/Src/rs485_driver.d +++ b/Fertirrega_v6/Debug/Core/Src/rs485_driver.d @@ -25,8 +25,6 @@ Core/Src/rs485_driver.o: ../Core/Src/rs485_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h ../Core/Inc/rs485_driver.h: @@ -55,7 +53,5 @@ Core/Src/rs485_driver.o: ../Core/Src/rs485_driver.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h: diff --git a/Fertirrega_v6/Debug/Core/Src/rs485_driver.o b/Fertirrega_v6/Debug/Core/Src/rs485_driver.o index 709bfd2..730f958 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/rs485_driver.o and b/Fertirrega_v6/Debug/Core/Src/rs485_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.d b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.d index 1880f45..c188687 100644 --- a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.d +++ b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.d @@ -24,8 +24,6 @@ Core/Src/stm32f1xx_hal_msp.o: ../Core/Src/stm32f1xx_hal_msp.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/main.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: @@ -53,6 +51,4 @@ Core/Src/stm32f1xx_hal_msp.o: ../Core/Src/stm32f1xx_hal_msp.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.o b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.o index bb4cf1b..95042ed 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.o and b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_hal_msp.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.cyclo b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.cyclo index fc1b485..3d8e27a 100644 --- a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.cyclo @@ -1,12 +1,10 @@ -../Core/Src/stm32f1xx_it.c:70:6:NMI_Handler 1 -../Core/Src/stm32f1xx_it.c:85:6:HardFault_Handler 1 -../Core/Src/stm32f1xx_it.c:100:6:MemManage_Handler 1 -../Core/Src/stm32f1xx_it.c:115:6:BusFault_Handler 1 -../Core/Src/stm32f1xx_it.c:130:6:UsageFault_Handler 1 -../Core/Src/stm32f1xx_it.c:145:6:SVC_Handler 1 -../Core/Src/stm32f1xx_it.c:158:6:DebugMon_Handler 1 -../Core/Src/stm32f1xx_it.c:171:6:PendSV_Handler 1 -../Core/Src/stm32f1xx_it.c:184:6:SysTick_Handler 1 -../Core/Src/stm32f1xx_it.c:205:6:EXTI3_IRQHandler 1 -../Core/Src/stm32f1xx_it.c:219:6:DMA1_Channel1_IRQHandler 1 -../Core/Src/stm32f1xx_it.c:233:6:USART1_IRQHandler 1 +../Core/Src/stm32f1xx_it.c:69:6:NMI_Handler 1 +../Core/Src/stm32f1xx_it.c:84:6:HardFault_Handler 1 +../Core/Src/stm32f1xx_it.c:99:6:MemManage_Handler 1 +../Core/Src/stm32f1xx_it.c:114:6:BusFault_Handler 1 +../Core/Src/stm32f1xx_it.c:129:6:UsageFault_Handler 1 +../Core/Src/stm32f1xx_it.c:144:6:SVC_Handler 1 +../Core/Src/stm32f1xx_it.c:157:6:DebugMon_Handler 1 +../Core/Src/stm32f1xx_it.c:170:6:PendSV_Handler 1 +../Core/Src/stm32f1xx_it.c:183:6:SysTick_Handler 1 +../Core/Src/stm32f1xx_it.c:204:6:USART1_IRQHandler 1 diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.d b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.d index 025ab30..e7d4e3b 100644 --- a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.d +++ b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.d @@ -24,8 +24,6 @@ Core/Src/stm32f1xx_it.o: ../Core/Src/stm32f1xx_it.c ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h \ ../Core/Inc/stm32f1xx_it.h ../Core/Inc/main.h: @@ -54,7 +52,5 @@ Core/Src/stm32f1xx_it.o: ../Core/Src/stm32f1xx_it.c ../Core/Inc/main.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: ../Core/Inc/stm32f1xx_it.h: diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.o b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.o index f1a70c5..f130a30 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.o and b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.su b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.su index 5b7b256..fc2a3b9 100644 --- a/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.su +++ b/Fertirrega_v6/Debug/Core/Src/stm32f1xx_it.su @@ -1,12 +1,10 @@ -../Core/Src/stm32f1xx_it.c:70:6:NMI_Handler 4 static -../Core/Src/stm32f1xx_it.c:85:6:HardFault_Handler 4 static -../Core/Src/stm32f1xx_it.c:100:6:MemManage_Handler 4 static -../Core/Src/stm32f1xx_it.c:115:6:BusFault_Handler 4 static -../Core/Src/stm32f1xx_it.c:130:6:UsageFault_Handler 4 static -../Core/Src/stm32f1xx_it.c:145:6:SVC_Handler 4 static -../Core/Src/stm32f1xx_it.c:158:6:DebugMon_Handler 4 static -../Core/Src/stm32f1xx_it.c:171:6:PendSV_Handler 4 static -../Core/Src/stm32f1xx_it.c:184:6:SysTick_Handler 8 static -../Core/Src/stm32f1xx_it.c:205:6:EXTI3_IRQHandler 8 static -../Core/Src/stm32f1xx_it.c:219:6:DMA1_Channel1_IRQHandler 8 static -../Core/Src/stm32f1xx_it.c:233:6:USART1_IRQHandler 8 static +../Core/Src/stm32f1xx_it.c:69:6:NMI_Handler 4 static +../Core/Src/stm32f1xx_it.c:84:6:HardFault_Handler 4 static +../Core/Src/stm32f1xx_it.c:99:6:MemManage_Handler 4 static +../Core/Src/stm32f1xx_it.c:114:6:BusFault_Handler 4 static +../Core/Src/stm32f1xx_it.c:129:6:UsageFault_Handler 4 static +../Core/Src/stm32f1xx_it.c:144:6:SVC_Handler 4 static +../Core/Src/stm32f1xx_it.c:157:6:DebugMon_Handler 4 static +../Core/Src/stm32f1xx_it.c:170:6:PendSV_Handler 4 static +../Core/Src/stm32f1xx_it.c:183:6:SysTick_Handler 8 static +../Core/Src/stm32f1xx_it.c:204:6:USART1_IRQHandler 8 static diff --git a/Fertirrega_v6/Debug/Core/Src/subdir.mk b/Fertirrega_v6/Debug/Core/Src/subdir.mk index 107e122..0ebb4a7 100644 --- a/Fertirrega_v6/Debug/Core/Src/subdir.mk +++ b/Fertirrega_v6/Debug/Core/Src/subdir.mk @@ -10,7 +10,6 @@ C_SRCS += \ ../Core/Src/ads1015_driver.c \ ../Core/Src/analog_loop_driver.c \ ../Core/Src/digital_outputs_driver.c \ -../Core/Src/dma.c \ ../Core/Src/flash_manager.c \ ../Core/Src/gpio.c \ ../Core/Src/i2c.c \ @@ -21,7 +20,6 @@ C_SRCS += \ ../Core/Src/syscalls.c \ ../Core/Src/sysmem.c \ ../Core/Src/system_stm32f1xx.c \ -../Core/Src/tim.c \ ../Core/Src/usart.c OBJS += \ @@ -30,7 +28,6 @@ OBJS += \ ./Core/Src/ads1015_driver.o \ ./Core/Src/analog_loop_driver.o \ ./Core/Src/digital_outputs_driver.o \ -./Core/Src/dma.o \ ./Core/Src/flash_manager.o \ ./Core/Src/gpio.o \ ./Core/Src/i2c.o \ @@ -41,7 +38,6 @@ OBJS += \ ./Core/Src/syscalls.o \ ./Core/Src/sysmem.o \ ./Core/Src/system_stm32f1xx.o \ -./Core/Src/tim.o \ ./Core/Src/usart.o C_DEPS += \ @@ -50,7 +46,6 @@ C_DEPS += \ ./Core/Src/ads1015_driver.d \ ./Core/Src/analog_loop_driver.d \ ./Core/Src/digital_outputs_driver.d \ -./Core/Src/dma.d \ ./Core/Src/flash_manager.d \ ./Core/Src/gpio.d \ ./Core/Src/i2c.d \ @@ -61,7 +56,6 @@ C_DEPS += \ ./Core/Src/syscalls.d \ ./Core/Src/sysmem.d \ ./Core/Src/system_stm32f1xx.d \ -./Core/Src/tim.d \ ./Core/Src/usart.d @@ -72,7 +66,7 @@ Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk clean: clean-Core-2f-Src clean-Core-2f-Src: - -$(RM) ./Core/Src/ad5934_driver.cyclo ./Core/Src/ad5934_driver.d ./Core/Src/ad5934_driver.o ./Core/Src/ad5934_driver.su ./Core/Src/adc.cyclo ./Core/Src/adc.d ./Core/Src/adc.o ./Core/Src/adc.su ./Core/Src/ads1015_driver.cyclo ./Core/Src/ads1015_driver.d ./Core/Src/ads1015_driver.o ./Core/Src/ads1015_driver.su ./Core/Src/analog_loop_driver.cyclo ./Core/Src/analog_loop_driver.d ./Core/Src/analog_loop_driver.o ./Core/Src/analog_loop_driver.su ./Core/Src/digital_outputs_driver.cyclo ./Core/Src/digital_outputs_driver.d ./Core/Src/digital_outputs_driver.o ./Core/Src/digital_outputs_driver.su ./Core/Src/dma.cyclo ./Core/Src/dma.d ./Core/Src/dma.o ./Core/Src/dma.su ./Core/Src/flash_manager.cyclo ./Core/Src/flash_manager.d ./Core/Src/flash_manager.o ./Core/Src/flash_manager.su ./Core/Src/gpio.cyclo ./Core/Src/gpio.d ./Core/Src/gpio.o ./Core/Src/gpio.su ./Core/Src/i2c.cyclo ./Core/Src/i2c.d ./Core/Src/i2c.o ./Core/Src/i2c.su ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/rs485_driver.cyclo ./Core/Src/rs485_driver.d ./Core/Src/rs485_driver.o ./Core/Src/rs485_driver.su ./Core/Src/stm32f1xx_hal_msp.cyclo ./Core/Src/stm32f1xx_hal_msp.d ./Core/Src/stm32f1xx_hal_msp.o ./Core/Src/stm32f1xx_hal_msp.su ./Core/Src/stm32f1xx_it.cyclo ./Core/Src/stm32f1xx_it.d ./Core/Src/stm32f1xx_it.o ./Core/Src/stm32f1xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f1xx.cyclo ./Core/Src/system_stm32f1xx.d ./Core/Src/system_stm32f1xx.o ./Core/Src/system_stm32f1xx.su ./Core/Src/tim.cyclo ./Core/Src/tim.d ./Core/Src/tim.o ./Core/Src/tim.su ./Core/Src/usart.cyclo ./Core/Src/usart.d ./Core/Src/usart.o ./Core/Src/usart.su + -$(RM) ./Core/Src/ad5934_driver.cyclo ./Core/Src/ad5934_driver.d ./Core/Src/ad5934_driver.o ./Core/Src/ad5934_driver.su ./Core/Src/adc.cyclo ./Core/Src/adc.d ./Core/Src/adc.o ./Core/Src/adc.su ./Core/Src/ads1015_driver.cyclo ./Core/Src/ads1015_driver.d ./Core/Src/ads1015_driver.o ./Core/Src/ads1015_driver.su ./Core/Src/analog_loop_driver.cyclo ./Core/Src/analog_loop_driver.d ./Core/Src/analog_loop_driver.o ./Core/Src/analog_loop_driver.su ./Core/Src/digital_outputs_driver.cyclo ./Core/Src/digital_outputs_driver.d ./Core/Src/digital_outputs_driver.o ./Core/Src/digital_outputs_driver.su ./Core/Src/flash_manager.cyclo ./Core/Src/flash_manager.d ./Core/Src/flash_manager.o ./Core/Src/flash_manager.su ./Core/Src/gpio.cyclo ./Core/Src/gpio.d ./Core/Src/gpio.o ./Core/Src/gpio.su ./Core/Src/i2c.cyclo ./Core/Src/i2c.d ./Core/Src/i2c.o ./Core/Src/i2c.su ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/rs485_driver.cyclo ./Core/Src/rs485_driver.d ./Core/Src/rs485_driver.o ./Core/Src/rs485_driver.su ./Core/Src/stm32f1xx_hal_msp.cyclo ./Core/Src/stm32f1xx_hal_msp.d ./Core/Src/stm32f1xx_hal_msp.o ./Core/Src/stm32f1xx_hal_msp.su ./Core/Src/stm32f1xx_it.cyclo ./Core/Src/stm32f1xx_it.d ./Core/Src/stm32f1xx_it.o ./Core/Src/stm32f1xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f1xx.cyclo ./Core/Src/system_stm32f1xx.d ./Core/Src/system_stm32f1xx.o ./Core/Src/system_stm32f1xx.su ./Core/Src/usart.cyclo ./Core/Src/usart.d ./Core/Src/usart.o ./Core/Src/usart.su .PHONY: clean-Core-2f-Src diff --git a/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.d b/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.d index 55fea71..7122ee9 100644 --- a/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.d +++ b/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.d @@ -24,8 +24,6 @@ Core/Src/system_stm32f1xx.o: ../Core/Src/system_stm32f1xx.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h: ../Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h: @@ -52,6 +50,4 @@ Core/Src/system_stm32f1xx.o: ../Core/Src/system_stm32f1xx.c \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.o b/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.o index bd6a4f4..7b57512 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.o and b/Fertirrega_v6/Debug/Core/Src/system_stm32f1xx.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/usart.d b/Fertirrega_v6/Debug/Core/Src/usart.d index 0634dec..1eded02 100644 --- a/Fertirrega_v6/Debug/Core/Src/usart.d +++ b/Fertirrega_v6/Debug/Core/Src/usart.d @@ -24,8 +24,6 @@ Core/Src/usart.o: ../Core/Src/usart.c ../Core/Inc/usart.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Core/Inc/usart.h: ../Core/Inc/main.h: @@ -54,6 +52,4 @@ Core/Src/usart.o: ../Core/Src/usart.c ../Core/Inc/usart.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Core/Src/usart.o b/Fertirrega_v6/Debug/Core/Src/usart.o index 19ef41d..a1f864c 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/usart.o and b/Fertirrega_v6/Debug/Core/Src/usart.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d index e2af949..40df42e 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o index 17a8c1e..3e8e575 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d index 4ec10ed..7afef2c 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o index 984931e..c3824dc 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d index 0598434..dd47056 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o index aff4237..27d7969 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d index af1bfc2..c3cc888 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o index 5a122d7..3ff547b 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d index ee268e7..c5a1679 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o index 81d96ce..b30d90f 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d index 8f8489e..1680ca8 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o index e5f678b..d4636a4 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d index 302e289..c1445b4 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o index 430aae6..cebd1c6 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d index 53fc879..664d9a0 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o index 15a8aa4..33e7656 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d index d03bd45..78d4ced 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o index 1c3338c..ea04d0d 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d index 6322251..9687a4c 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o index 2fed438..0a7fc52 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d index 11d0215..29581c9 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o index 2dbb40a..b9d6ead 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d index 0f68693..5bd36cd 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o index 46dc1bb..0d449b8 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d index b040f87..f5a74be 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o index f1d32d6..6853e69 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d index cd21565..8a1f798 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o index 2351580..38a6683 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d index 146fba3..4e2c2df 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d @@ -25,8 +25,6 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -53,6 +51,4 @@ Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o: \ ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h: -../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h: diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o index 1ddb398..8f8ab7c 100644 Binary files a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o and b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o differ diff --git a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk index 990cf88..b2d0f1e 100644 --- a/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk +++ b/Fertirrega_v6/Debug/Drivers/STM32F1xx_HAL_Driver/Src/subdir.mk @@ -19,8 +19,6 @@ C_SRCS += \ ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c \ ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c \ ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c \ -../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c \ ../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c OBJS += \ @@ -38,8 +36,6 @@ OBJS += \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o C_DEPS += \ @@ -57,8 +53,6 @@ C_DEPS += \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d \ -./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d \ ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d @@ -69,7 +63,7 @@ Drivers/STM32F1xx_HAL_Driver/Src/%.o Drivers/STM32F1xx_HAL_Driver/Src/%.su Drive clean: clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src: - -$(RM) ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.su + -$(RM) ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.su ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.cyclo ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.su .PHONY: clean-Drivers-2f-STM32F1xx_HAL_Driver-2f-Src diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.elf b/Fertirrega_v6/Debug/Fertirrega_v6.elf index b2d051b..71f3ed5 100644 Binary files a/Fertirrega_v6/Debug/Fertirrega_v6.elf and b/Fertirrega_v6/Debug/Fertirrega_v6.elf differ diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.list b/Fertirrega_v6/Debug/Fertirrega_v6.list index dc6e7b1..d80a12c 100644 --- a/Fertirrega_v6/Debug/Fertirrega_v6.list +++ b/Fertirrega_v6/Debug/Fertirrega_v6.list @@ -5,19597 +5,15959 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 0000010c 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00007910 08000110 08000110 00001110 2**3 + 1 .text 0000631c 0800010c 0800010c 0000110c 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000088 08007a20 08007a20 00008a20 2**2 + 2 .rodata 00000074 08006428 08006428 00007428 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08007aa8 08007aa8 00009080 2**0 + 3 .ARM.extab 00000000 0800649c 0800649c 00008074 2**0 CONTENTS, READONLY - 4 .ARM 00000008 08007aa8 08007aa8 00008aa8 2**2 + 4 .ARM 00000008 0800649c 0800649c 0000749c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 08007ab0 08007ab0 00009080 2**0 + 5 .preinit_array 00000000 080064a4 080064a4 00008074 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08007ab0 08007ab0 00008ab0 2**2 + 6 .init_array 00000004 080064a4 080064a4 000074a4 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 7 .fini_array 00000004 08007ab4 08007ab4 00008ab4 2**2 + 7 .fini_array 00000004 080064a8 080064a8 000074a8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 8 .data 00000080 20000000 08007ab8 00009000 2**2 + 8 .data 00000074 20000000 080064ac 00008000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00000890 20000080 08007b38 00009080 2**3 + 9 .bss 000007d0 20000078 08006520 00008078 2**3 ALLOC - 10 ._user_heap_stack 00000600 20000910 08007b38 00009910 2**0 + 10 ._user_heap_stack 00000600 20000848 08006520 00008848 2**0 ALLOC - 11 .ARM.attributes 00000029 00000000 00000000 00009080 2**0 + 11 .ARM.attributes 00000029 00000000 00000000 00008074 2**0 CONTENTS, READONLY - 12 .debug_info 000153e7 00000000 00000000 000090a9 2**0 + 12 .debug_info 0000fafc 00000000 00000000 0000809d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 00003e1d 00000000 00000000 0001e490 2**0 + 13 .debug_abbrev 00003352 00000000 00000000 00017b99 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 00001418 00000000 00000000 000222b0 2**3 + 14 .debug_aranges 00000e10 00000000 00000000 0001aef0 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_rnglists 00000fb2 00000000 00000000 000236c8 2**0 + 15 .debug_rnglists 00000ad0 00000000 00000000 0001bd00 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 0001ae5b 00000000 00000000 0002467a 2**0 + 16 .debug_macro 00019a5e 00000000 00000000 0001c7d0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 0001b209 00000000 00000000 0003f4d5 2**0 + 17 .debug_line 000143c6 00000000 00000000 0003622e 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 0009592c 00000000 00000000 0005a6de 2**0 + 18 .debug_str 0008d3f3 00000000 00000000 0004a5f4 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000043 00000000 00000000 000f000a 2**0 + 19 .comment 00000043 00000000 00000000 000d79e7 2**0 CONTENTS, READONLY - 20 .debug_frame 00005410 00000000 00000000 000f0050 2**2 + 20 .debug_frame 00003a60 00000000 00000000 000d7a2c 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 21 .debug_line_str 00000052 00000000 00000000 000f5460 2**0 + 21 .debug_line_str 00000052 00000000 00000000 000db48c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: -08000110 <__do_global_dtors_aux>: - 8000110: b510 push {r4, lr} - 8000112: 4c05 ldr r4, [pc, #20] @ (8000128 <__do_global_dtors_aux+0x18>) - 8000114: 7823 ldrb r3, [r4, #0] - 8000116: b933 cbnz r3, 8000126 <__do_global_dtors_aux+0x16> - 8000118: 4b04 ldr r3, [pc, #16] @ (800012c <__do_global_dtors_aux+0x1c>) - 800011a: b113 cbz r3, 8000122 <__do_global_dtors_aux+0x12> - 800011c: 4804 ldr r0, [pc, #16] @ (8000130 <__do_global_dtors_aux+0x20>) - 800011e: f3af 8000 nop.w - 8000122: 2301 movs r3, #1 - 8000124: 7023 strb r3, [r4, #0] - 8000126: bd10 pop {r4, pc} - 8000128: 20000080 .word 0x20000080 - 800012c: 00000000 .word 0x00000000 - 8000130: 08007a08 .word 0x08007a08 +0800010c <__do_global_dtors_aux>: + 800010c: b510 push {r4, lr} + 800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>) + 8000110: 7823 ldrb r3, [r4, #0] + 8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16> + 8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>) + 8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12> + 8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>) + 800011a: f3af 8000 nop.w + 800011e: 2301 movs r3, #1 + 8000120: 7023 strb r3, [r4, #0] + 8000122: bd10 pop {r4, pc} + 8000124: 20000078 .word 0x20000078 + 8000128: 00000000 .word 0x00000000 + 800012c: 08006410 .word 0x08006410 -08000134 : - 8000134: b508 push {r3, lr} - 8000136: 4b03 ldr r3, [pc, #12] @ (8000144 ) - 8000138: b11b cbz r3, 8000142 - 800013a: 4903 ldr r1, [pc, #12] @ (8000148 ) - 800013c: 4803 ldr r0, [pc, #12] @ (800014c ) - 800013e: f3af 8000 nop.w - 8000142: bd08 pop {r3, pc} - 8000144: 00000000 .word 0x00000000 - 8000148: 20000084 .word 0x20000084 - 800014c: 08007a08 .word 0x08007a08 +08000130 : + 8000130: b508 push {r3, lr} + 8000132: 4b03 ldr r3, [pc, #12] @ (8000140 ) + 8000134: b11b cbz r3, 800013e + 8000136: 4903 ldr r1, [pc, #12] @ (8000144 ) + 8000138: 4803 ldr r0, [pc, #12] @ (8000148 ) + 800013a: f3af 8000 nop.w + 800013e: bd08 pop {r3, pc} + 8000140: 00000000 .word 0x00000000 + 8000144: 2000007c .word 0x2000007c + 8000148: 08006410 .word 0x08006410 -08000150 : - 8000150: 4603 mov r3, r0 - 8000152: f813 2b01 ldrb.w r2, [r3], #1 - 8000156: 2a00 cmp r2, #0 - 8000158: d1fb bne.n 8000152 - 800015a: 1a18 subs r0, r3, r0 - 800015c: 3801 subs r0, #1 - 800015e: 4770 bx lr +0800014c : + 800014c: 4603 mov r3, r0 + 800014e: f813 2b01 ldrb.w r2, [r3], #1 + 8000152: 2a00 cmp r2, #0 + 8000154: d1fb bne.n 800014e + 8000156: 1a18 subs r0, r3, r0 + 8000158: 3801 subs r0, #1 + 800015a: 4770 bx lr -08000160 <__aeabi_drsub>: - 8000160: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 - 8000164: e002 b.n 800016c <__adddf3> - 8000166: bf00 nop +0800015c <__aeabi_dmul>: + 800015c: b570 push {r4, r5, r6, lr} + 800015e: f04f 0cff mov.w ip, #255 @ 0xff + 8000162: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 + 8000166: ea1c 5411 ands.w r4, ip, r1, lsr #20 + 800016a: bf1d ittte ne + 800016c: ea1c 5513 andsne.w r5, ip, r3, lsr #20 + 8000170: ea94 0f0c teqne r4, ip + 8000174: ea95 0f0c teqne r5, ip + 8000178: f000 f8de bleq 8000338 <__aeabi_dmul+0x1dc> + 800017c: 442c add r4, r5 + 800017e: ea81 0603 eor.w r6, r1, r3 + 8000182: ea21 514c bic.w r1, r1, ip, lsl #21 + 8000186: ea23 534c bic.w r3, r3, ip, lsl #21 + 800018a: ea50 3501 orrs.w r5, r0, r1, lsl #12 + 800018e: bf18 it ne + 8000190: ea52 3503 orrsne.w r5, r2, r3, lsl #12 + 8000194: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 + 8000198: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 + 800019c: d038 beq.n 8000210 <__aeabi_dmul+0xb4> + 800019e: fba0 ce02 umull ip, lr, r0, r2 + 80001a2: f04f 0500 mov.w r5, #0 + 80001a6: fbe1 e502 umlal lr, r5, r1, r2 + 80001aa: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 + 80001ae: fbe0 e503 umlal lr, r5, r0, r3 + 80001b2: f04f 0600 mov.w r6, #0 + 80001b6: fbe1 5603 umlal r5, r6, r1, r3 + 80001ba: f09c 0f00 teq ip, #0 + 80001be: bf18 it ne + 80001c0: f04e 0e01 orrne.w lr, lr, #1 + 80001c4: f1a4 04ff sub.w r4, r4, #255 @ 0xff + 80001c8: f5b6 7f00 cmp.w r6, #512 @ 0x200 + 80001cc: f564 7440 sbc.w r4, r4, #768 @ 0x300 + 80001d0: d204 bcs.n 80001dc <__aeabi_dmul+0x80> + 80001d2: ea5f 0e4e movs.w lr, lr, lsl #1 + 80001d6: 416d adcs r5, r5 + 80001d8: eb46 0606 adc.w r6, r6, r6 + 80001dc: ea42 21c6 orr.w r1, r2, r6, lsl #11 + 80001e0: ea41 5155 orr.w r1, r1, r5, lsr #21 + 80001e4: ea4f 20c5 mov.w r0, r5, lsl #11 + 80001e8: ea40 505e orr.w r0, r0, lr, lsr #21 + 80001ec: ea4f 2ece mov.w lr, lr, lsl #11 + 80001f0: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd + 80001f4: bf88 it hi + 80001f6: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 + 80001fa: d81e bhi.n 800023a <__aeabi_dmul+0xde> + 80001fc: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 + 8000200: bf08 it eq + 8000202: ea5f 0e50 movseq.w lr, r0, lsr #1 + 8000206: f150 0000 adcs.w r0, r0, #0 + 800020a: eb41 5104 adc.w r1, r1, r4, lsl #20 + 800020e: bd70 pop {r4, r5, r6, pc} + 8000210: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 + 8000214: ea46 0101 orr.w r1, r6, r1 + 8000218: ea40 0002 orr.w r0, r0, r2 + 800021c: ea81 0103 eor.w r1, r1, r3 + 8000220: ebb4 045c subs.w r4, r4, ip, lsr #1 + 8000224: bfc2 ittt gt + 8000226: ebd4 050c rsbsgt r5, r4, ip + 800022a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 + 800022e: bd70 popgt {r4, r5, r6, pc} + 8000230: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 + 8000234: f04f 0e00 mov.w lr, #0 + 8000238: 3c01 subs r4, #1 + 800023a: f300 80ab bgt.w 8000394 <__aeabi_dmul+0x238> + 800023e: f114 0f36 cmn.w r4, #54 @ 0x36 + 8000242: bfde ittt le + 8000244: 2000 movle r0, #0 + 8000246: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 + 800024a: bd70 pople {r4, r5, r6, pc} + 800024c: f1c4 0400 rsb r4, r4, #0 + 8000250: 3c20 subs r4, #32 + 8000252: da35 bge.n 80002c0 <__aeabi_dmul+0x164> + 8000254: 340c adds r4, #12 + 8000256: dc1b bgt.n 8000290 <__aeabi_dmul+0x134> + 8000258: f104 0414 add.w r4, r4, #20 + 800025c: f1c4 0520 rsb r5, r4, #32 + 8000260: fa00 f305 lsl.w r3, r0, r5 + 8000264: fa20 f004 lsr.w r0, r0, r4 + 8000268: fa01 f205 lsl.w r2, r1, r5 + 800026c: ea40 0002 orr.w r0, r0, r2 + 8000270: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 + 8000274: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 + 8000278: eb10 70d3 adds.w r0, r0, r3, lsr #31 + 800027c: fa21 f604 lsr.w r6, r1, r4 + 8000280: eb42 0106 adc.w r1, r2, r6 + 8000284: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 8000288: bf08 it eq + 800028a: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 800028e: bd70 pop {r4, r5, r6, pc} + 8000290: f1c4 040c rsb r4, r4, #12 + 8000294: f1c4 0520 rsb r5, r4, #32 + 8000298: fa00 f304 lsl.w r3, r0, r4 + 800029c: fa20 f005 lsr.w r0, r0, r5 + 80002a0: fa01 f204 lsl.w r2, r1, r4 + 80002a4: ea40 0002 orr.w r0, r0, r2 + 80002a8: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 80002ac: eb10 70d3 adds.w r0, r0, r3, lsr #31 + 80002b0: f141 0100 adc.w r1, r1, #0 + 80002b4: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 80002b8: bf08 it eq + 80002ba: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 80002be: bd70 pop {r4, r5, r6, pc} + 80002c0: f1c4 0520 rsb r5, r4, #32 + 80002c4: fa00 f205 lsl.w r2, r0, r5 + 80002c8: ea4e 0e02 orr.w lr, lr, r2 + 80002cc: fa20 f304 lsr.w r3, r0, r4 + 80002d0: fa01 f205 lsl.w r2, r1, r5 + 80002d4: ea43 0302 orr.w r3, r3, r2 + 80002d8: fa21 f004 lsr.w r0, r1, r4 + 80002dc: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 80002e0: fa21 f204 lsr.w r2, r1, r4 + 80002e4: ea20 0002 bic.w r0, r0, r2 + 80002e8: eb00 70d3 add.w r0, r0, r3, lsr #31 + 80002ec: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 80002f0: bf08 it eq + 80002f2: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 80002f6: bd70 pop {r4, r5, r6, pc} + 80002f8: f094 0f00 teq r4, #0 + 80002fc: d10f bne.n 800031e <__aeabi_dmul+0x1c2> + 80002fe: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 + 8000302: 0040 lsls r0, r0, #1 + 8000304: eb41 0101 adc.w r1, r1, r1 + 8000308: f411 1f80 tst.w r1, #1048576 @ 0x100000 + 800030c: bf08 it eq + 800030e: 3c01 subeq r4, #1 + 8000310: d0f7 beq.n 8000302 <__aeabi_dmul+0x1a6> + 8000312: ea41 0106 orr.w r1, r1, r6 + 8000316: f095 0f00 teq r5, #0 + 800031a: bf18 it ne + 800031c: 4770 bxne lr + 800031e: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 + 8000322: 0052 lsls r2, r2, #1 + 8000324: eb43 0303 adc.w r3, r3, r3 + 8000328: f413 1f80 tst.w r3, #1048576 @ 0x100000 + 800032c: bf08 it eq + 800032e: 3d01 subeq r5, #1 + 8000330: d0f7 beq.n 8000322 <__aeabi_dmul+0x1c6> + 8000332: ea43 0306 orr.w r3, r3, r6 + 8000336: 4770 bx lr + 8000338: ea94 0f0c teq r4, ip + 800033c: ea0c 5513 and.w r5, ip, r3, lsr #20 + 8000340: bf18 it ne + 8000342: ea95 0f0c teqne r5, ip + 8000346: d00c beq.n 8000362 <__aeabi_dmul+0x206> + 8000348: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 800034c: bf18 it ne + 800034e: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 8000352: d1d1 bne.n 80002f8 <__aeabi_dmul+0x19c> + 8000354: ea81 0103 eor.w r1, r1, r3 + 8000358: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 800035c: f04f 0000 mov.w r0, #0 + 8000360: bd70 pop {r4, r5, r6, pc} + 8000362: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 8000366: bf06 itte eq + 8000368: 4610 moveq r0, r2 + 800036a: 4619 moveq r1, r3 + 800036c: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 8000370: d019 beq.n 80003a6 <__aeabi_dmul+0x24a> + 8000372: ea94 0f0c teq r4, ip + 8000376: d102 bne.n 800037e <__aeabi_dmul+0x222> + 8000378: ea50 3601 orrs.w r6, r0, r1, lsl #12 + 800037c: d113 bne.n 80003a6 <__aeabi_dmul+0x24a> + 800037e: ea95 0f0c teq r5, ip + 8000382: d105 bne.n 8000390 <__aeabi_dmul+0x234> + 8000384: ea52 3603 orrs.w r6, r2, r3, lsl #12 + 8000388: bf1c itt ne + 800038a: 4610 movne r0, r2 + 800038c: 4619 movne r1, r3 + 800038e: d10a bne.n 80003a6 <__aeabi_dmul+0x24a> + 8000390: ea81 0103 eor.w r1, r1, r3 + 8000394: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 8000398: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 + 800039c: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 + 80003a0: f04f 0000 mov.w r0, #0 + 80003a4: bd70 pop {r4, r5, r6, pc} + 80003a6: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 + 80003aa: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 + 80003ae: bd70 pop {r4, r5, r6, pc} -08000168 <__aeabi_dsub>: - 8000168: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 +080003b0 <__aeabi_drsub>: + 80003b0: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 + 80003b4: e002 b.n 80003bc <__adddf3> + 80003b6: bf00 nop -0800016c <__adddf3>: - 800016c: b530 push {r4, r5, lr} - 800016e: ea4f 0441 mov.w r4, r1, lsl #1 - 8000172: ea4f 0543 mov.w r5, r3, lsl #1 - 8000176: ea94 0f05 teq r4, r5 - 800017a: bf08 it eq - 800017c: ea90 0f02 teqeq r0, r2 - 8000180: bf1f itttt ne - 8000182: ea54 0c00 orrsne.w ip, r4, r0 - 8000186: ea55 0c02 orrsne.w ip, r5, r2 - 800018a: ea7f 5c64 mvnsne.w ip, r4, asr #21 - 800018e: ea7f 5c65 mvnsne.w ip, r5, asr #21 - 8000192: f000 80e2 beq.w 800035a <__adddf3+0x1ee> - 8000196: ea4f 5454 mov.w r4, r4, lsr #21 - 800019a: ebd4 5555 rsbs r5, r4, r5, lsr #21 - 800019e: bfb8 it lt - 80001a0: 426d neglt r5, r5 - 80001a2: dd0c ble.n 80001be <__adddf3+0x52> - 80001a4: 442c add r4, r5 - 80001a6: ea80 0202 eor.w r2, r0, r2 - 80001aa: ea81 0303 eor.w r3, r1, r3 - 80001ae: ea82 0000 eor.w r0, r2, r0 - 80001b2: ea83 0101 eor.w r1, r3, r1 - 80001b6: ea80 0202 eor.w r2, r0, r2 - 80001ba: ea81 0303 eor.w r3, r1, r3 - 80001be: 2d36 cmp r5, #54 @ 0x36 - 80001c0: bf88 it hi - 80001c2: bd30 pophi {r4, r5, pc} - 80001c4: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 - 80001c8: ea4f 3101 mov.w r1, r1, lsl #12 - 80001cc: f44f 1c80 mov.w ip, #1048576 @ 0x100000 - 80001d0: ea4c 3111 orr.w r1, ip, r1, lsr #12 - 80001d4: d002 beq.n 80001dc <__adddf3+0x70> - 80001d6: 4240 negs r0, r0 - 80001d8: eb61 0141 sbc.w r1, r1, r1, lsl #1 - 80001dc: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 - 80001e0: ea4f 3303 mov.w r3, r3, lsl #12 - 80001e4: ea4c 3313 orr.w r3, ip, r3, lsr #12 - 80001e8: d002 beq.n 80001f0 <__adddf3+0x84> - 80001ea: 4252 negs r2, r2 - 80001ec: eb63 0343 sbc.w r3, r3, r3, lsl #1 - 80001f0: ea94 0f05 teq r4, r5 - 80001f4: f000 80a7 beq.w 8000346 <__adddf3+0x1da> - 80001f8: f1a4 0401 sub.w r4, r4, #1 - 80001fc: f1d5 0e20 rsbs lr, r5, #32 - 8000200: db0d blt.n 800021e <__adddf3+0xb2> - 8000202: fa02 fc0e lsl.w ip, r2, lr - 8000206: fa22 f205 lsr.w r2, r2, r5 - 800020a: 1880 adds r0, r0, r2 - 800020c: f141 0100 adc.w r1, r1, #0 - 8000210: fa03 f20e lsl.w r2, r3, lr - 8000214: 1880 adds r0, r0, r2 - 8000216: fa43 f305 asr.w r3, r3, r5 - 800021a: 4159 adcs r1, r3 - 800021c: e00e b.n 800023c <__adddf3+0xd0> - 800021e: f1a5 0520 sub.w r5, r5, #32 - 8000222: f10e 0e20 add.w lr, lr, #32 - 8000226: 2a01 cmp r2, #1 - 8000228: fa03 fc0e lsl.w ip, r3, lr - 800022c: bf28 it cs - 800022e: f04c 0c02 orrcs.w ip, ip, #2 - 8000232: fa43 f305 asr.w r3, r3, r5 - 8000236: 18c0 adds r0, r0, r3 - 8000238: eb51 71e3 adcs.w r1, r1, r3, asr #31 - 800023c: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 - 8000240: d507 bpl.n 8000252 <__adddf3+0xe6> - 8000242: f04f 0e00 mov.w lr, #0 - 8000246: f1dc 0c00 rsbs ip, ip, #0 - 800024a: eb7e 0000 sbcs.w r0, lr, r0 - 800024e: eb6e 0101 sbc.w r1, lr, r1 - 8000252: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 - 8000256: d31b bcc.n 8000290 <__adddf3+0x124> - 8000258: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 - 800025c: d30c bcc.n 8000278 <__adddf3+0x10c> - 800025e: 0849 lsrs r1, r1, #1 - 8000260: ea5f 0030 movs.w r0, r0, rrx - 8000264: ea4f 0c3c mov.w ip, ip, rrx - 8000268: f104 0401 add.w r4, r4, #1 - 800026c: ea4f 5244 mov.w r2, r4, lsl #21 - 8000270: f512 0f80 cmn.w r2, #4194304 @ 0x400000 - 8000274: f080 809a bcs.w 80003ac <__adddf3+0x240> - 8000278: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 - 800027c: bf08 it eq - 800027e: ea5f 0c50 movseq.w ip, r0, lsr #1 - 8000282: f150 0000 adcs.w r0, r0, #0 - 8000286: eb41 5104 adc.w r1, r1, r4, lsl #20 - 800028a: ea41 0105 orr.w r1, r1, r5 - 800028e: bd30 pop {r4, r5, pc} - 8000290: ea5f 0c4c movs.w ip, ip, lsl #1 - 8000294: 4140 adcs r0, r0 - 8000296: eb41 0101 adc.w r1, r1, r1 - 800029a: 3c01 subs r4, #1 - 800029c: bf28 it cs - 800029e: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 - 80002a2: d2e9 bcs.n 8000278 <__adddf3+0x10c> - 80002a4: f091 0f00 teq r1, #0 - 80002a8: bf04 itt eq - 80002aa: 4601 moveq r1, r0 - 80002ac: 2000 moveq r0, #0 - 80002ae: fab1 f381 clz r3, r1 - 80002b2: bf08 it eq - 80002b4: 3320 addeq r3, #32 - 80002b6: f1a3 030b sub.w r3, r3, #11 - 80002ba: f1b3 0220 subs.w r2, r3, #32 - 80002be: da0c bge.n 80002da <__adddf3+0x16e> - 80002c0: 320c adds r2, #12 - 80002c2: dd08 ble.n 80002d6 <__adddf3+0x16a> - 80002c4: f102 0c14 add.w ip, r2, #20 - 80002c8: f1c2 020c rsb r2, r2, #12 - 80002cc: fa01 f00c lsl.w r0, r1, ip - 80002d0: fa21 f102 lsr.w r1, r1, r2 - 80002d4: e00c b.n 80002f0 <__adddf3+0x184> - 80002d6: f102 0214 add.w r2, r2, #20 - 80002da: bfd8 it le - 80002dc: f1c2 0c20 rsble ip, r2, #32 - 80002e0: fa01 f102 lsl.w r1, r1, r2 - 80002e4: fa20 fc0c lsr.w ip, r0, ip - 80002e8: bfdc itt le - 80002ea: ea41 010c orrle.w r1, r1, ip - 80002ee: 4090 lslle r0, r2 - 80002f0: 1ae4 subs r4, r4, r3 - 80002f2: bfa2 ittt ge - 80002f4: eb01 5104 addge.w r1, r1, r4, lsl #20 - 80002f8: 4329 orrge r1, r5 - 80002fa: bd30 popge {r4, r5, pc} - 80002fc: ea6f 0404 mvn.w r4, r4 - 8000300: 3c1f subs r4, #31 - 8000302: da1c bge.n 800033e <__adddf3+0x1d2> - 8000304: 340c adds r4, #12 - 8000306: dc0e bgt.n 8000326 <__adddf3+0x1ba> - 8000308: f104 0414 add.w r4, r4, #20 - 800030c: f1c4 0220 rsb r2, r4, #32 - 8000310: fa20 f004 lsr.w r0, r0, r4 - 8000314: fa01 f302 lsl.w r3, r1, r2 - 8000318: ea40 0003 orr.w r0, r0, r3 - 800031c: fa21 f304 lsr.w r3, r1, r4 - 8000320: ea45 0103 orr.w r1, r5, r3 - 8000324: bd30 pop {r4, r5, pc} - 8000326: f1c4 040c rsb r4, r4, #12 - 800032a: f1c4 0220 rsb r2, r4, #32 - 800032e: fa20 f002 lsr.w r0, r0, r2 - 8000332: fa01 f304 lsl.w r3, r1, r4 - 8000336: ea40 0003 orr.w r0, r0, r3 - 800033a: 4629 mov r1, r5 - 800033c: bd30 pop {r4, r5, pc} - 800033e: fa21 f004 lsr.w r0, r1, r4 - 8000342: 4629 mov r1, r5 - 8000344: bd30 pop {r4, r5, pc} - 8000346: f094 0f00 teq r4, #0 - 800034a: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 - 800034e: bf06 itte eq - 8000350: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 - 8000354: 3401 addeq r4, #1 - 8000356: 3d01 subne r5, #1 - 8000358: e74e b.n 80001f8 <__adddf3+0x8c> - 800035a: ea7f 5c64 mvns.w ip, r4, asr #21 - 800035e: bf18 it ne - 8000360: ea7f 5c65 mvnsne.w ip, r5, asr #21 - 8000364: d029 beq.n 80003ba <__adddf3+0x24e> - 8000366: ea94 0f05 teq r4, r5 - 800036a: bf08 it eq - 800036c: ea90 0f02 teqeq r0, r2 - 8000370: d005 beq.n 800037e <__adddf3+0x212> - 8000372: ea54 0c00 orrs.w ip, r4, r0 - 8000376: bf04 itt eq - 8000378: 4619 moveq r1, r3 - 800037a: 4610 moveq r0, r2 - 800037c: bd30 pop {r4, r5, pc} - 800037e: ea91 0f03 teq r1, r3 - 8000382: bf1e ittt ne - 8000384: 2100 movne r1, #0 - 8000386: 2000 movne r0, #0 - 8000388: bd30 popne {r4, r5, pc} - 800038a: ea5f 5c54 movs.w ip, r4, lsr #21 - 800038e: d105 bne.n 800039c <__adddf3+0x230> - 8000390: 0040 lsls r0, r0, #1 - 8000392: 4149 adcs r1, r1 - 8000394: bf28 it cs - 8000396: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 - 800039a: bd30 pop {r4, r5, pc} - 800039c: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 - 80003a0: bf3c itt cc - 80003a2: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 - 80003a6: bd30 popcc {r4, r5, pc} - 80003a8: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 - 80003ac: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 - 80003b0: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 - 80003b4: f04f 0000 mov.w r0, #0 - 80003b8: bd30 pop {r4, r5, pc} - 80003ba: ea7f 5c64 mvns.w ip, r4, asr #21 - 80003be: bf1a itte ne - 80003c0: 4619 movne r1, r3 - 80003c2: 4610 movne r0, r2 - 80003c4: ea7f 5c65 mvnseq.w ip, r5, asr #21 - 80003c8: bf1c itt ne - 80003ca: 460b movne r3, r1 - 80003cc: 4602 movne r2, r0 - 80003ce: ea50 3401 orrs.w r4, r0, r1, lsl #12 - 80003d2: bf06 itte eq - 80003d4: ea52 3503 orrseq.w r5, r2, r3, lsl #12 - 80003d8: ea91 0f03 teqeq r1, r3 - 80003dc: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 - 80003e0: bd30 pop {r4, r5, pc} - 80003e2: bf00 nop +080003b8 <__aeabi_dsub>: + 80003b8: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 -080003e4 <__aeabi_ui2d>: - 80003e4: f090 0f00 teq r0, #0 - 80003e8: bf04 itt eq - 80003ea: 2100 moveq r1, #0 - 80003ec: 4770 bxeq lr - 80003ee: b530 push {r4, r5, lr} - 80003f0: f44f 6480 mov.w r4, #1024 @ 0x400 - 80003f4: f104 0432 add.w r4, r4, #50 @ 0x32 - 80003f8: f04f 0500 mov.w r5, #0 - 80003fc: f04f 0100 mov.w r1, #0 - 8000400: e750 b.n 80002a4 <__adddf3+0x138> - 8000402: bf00 nop +080003bc <__adddf3>: + 80003bc: b530 push {r4, r5, lr} + 80003be: ea4f 0441 mov.w r4, r1, lsl #1 + 80003c2: ea4f 0543 mov.w r5, r3, lsl #1 + 80003c6: ea94 0f05 teq r4, r5 + 80003ca: bf08 it eq + 80003cc: ea90 0f02 teqeq r0, r2 + 80003d0: bf1f itttt ne + 80003d2: ea54 0c00 orrsne.w ip, r4, r0 + 80003d6: ea55 0c02 orrsne.w ip, r5, r2 + 80003da: ea7f 5c64 mvnsne.w ip, r4, asr #21 + 80003de: ea7f 5c65 mvnsne.w ip, r5, asr #21 + 80003e2: f000 80e2 beq.w 80005aa <__adddf3+0x1ee> + 80003e6: ea4f 5454 mov.w r4, r4, lsr #21 + 80003ea: ebd4 5555 rsbs r5, r4, r5, lsr #21 + 80003ee: bfb8 it lt + 80003f0: 426d neglt r5, r5 + 80003f2: dd0c ble.n 800040e <__adddf3+0x52> + 80003f4: 442c add r4, r5 + 80003f6: ea80 0202 eor.w r2, r0, r2 + 80003fa: ea81 0303 eor.w r3, r1, r3 + 80003fe: ea82 0000 eor.w r0, r2, r0 + 8000402: ea83 0101 eor.w r1, r3, r1 + 8000406: ea80 0202 eor.w r2, r0, r2 + 800040a: ea81 0303 eor.w r3, r1, r3 + 800040e: 2d36 cmp r5, #54 @ 0x36 + 8000410: bf88 it hi + 8000412: bd30 pophi {r4, r5, pc} + 8000414: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 + 8000418: ea4f 3101 mov.w r1, r1, lsl #12 + 800041c: f44f 1c80 mov.w ip, #1048576 @ 0x100000 + 8000420: ea4c 3111 orr.w r1, ip, r1, lsr #12 + 8000424: d002 beq.n 800042c <__adddf3+0x70> + 8000426: 4240 negs r0, r0 + 8000428: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 800042c: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 + 8000430: ea4f 3303 mov.w r3, r3, lsl #12 + 8000434: ea4c 3313 orr.w r3, ip, r3, lsr #12 + 8000438: d002 beq.n 8000440 <__adddf3+0x84> + 800043a: 4252 negs r2, r2 + 800043c: eb63 0343 sbc.w r3, r3, r3, lsl #1 + 8000440: ea94 0f05 teq r4, r5 + 8000444: f000 80a7 beq.w 8000596 <__adddf3+0x1da> + 8000448: f1a4 0401 sub.w r4, r4, #1 + 800044c: f1d5 0e20 rsbs lr, r5, #32 + 8000450: db0d blt.n 800046e <__adddf3+0xb2> + 8000452: fa02 fc0e lsl.w ip, r2, lr + 8000456: fa22 f205 lsr.w r2, r2, r5 + 800045a: 1880 adds r0, r0, r2 + 800045c: f141 0100 adc.w r1, r1, #0 + 8000460: fa03 f20e lsl.w r2, r3, lr + 8000464: 1880 adds r0, r0, r2 + 8000466: fa43 f305 asr.w r3, r3, r5 + 800046a: 4159 adcs r1, r3 + 800046c: e00e b.n 800048c <__adddf3+0xd0> + 800046e: f1a5 0520 sub.w r5, r5, #32 + 8000472: f10e 0e20 add.w lr, lr, #32 + 8000476: 2a01 cmp r2, #1 + 8000478: fa03 fc0e lsl.w ip, r3, lr + 800047c: bf28 it cs + 800047e: f04c 0c02 orrcs.w ip, ip, #2 + 8000482: fa43 f305 asr.w r3, r3, r5 + 8000486: 18c0 adds r0, r0, r3 + 8000488: eb51 71e3 adcs.w r1, r1, r3, asr #31 + 800048c: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 + 8000490: d507 bpl.n 80004a2 <__adddf3+0xe6> + 8000492: f04f 0e00 mov.w lr, #0 + 8000496: f1dc 0c00 rsbs ip, ip, #0 + 800049a: eb7e 0000 sbcs.w r0, lr, r0 + 800049e: eb6e 0101 sbc.w r1, lr, r1 + 80004a2: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 + 80004a6: d31b bcc.n 80004e0 <__adddf3+0x124> + 80004a8: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 + 80004ac: d30c bcc.n 80004c8 <__adddf3+0x10c> + 80004ae: 0849 lsrs r1, r1, #1 + 80004b0: ea5f 0030 movs.w r0, r0, rrx + 80004b4: ea4f 0c3c mov.w ip, ip, rrx + 80004b8: f104 0401 add.w r4, r4, #1 + 80004bc: ea4f 5244 mov.w r2, r4, lsl #21 + 80004c0: f512 0f80 cmn.w r2, #4194304 @ 0x400000 + 80004c4: f080 809a bcs.w 80005fc <__adddf3+0x240> + 80004c8: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 + 80004cc: bf08 it eq + 80004ce: ea5f 0c50 movseq.w ip, r0, lsr #1 + 80004d2: f150 0000 adcs.w r0, r0, #0 + 80004d6: eb41 5104 adc.w r1, r1, r4, lsl #20 + 80004da: ea41 0105 orr.w r1, r1, r5 + 80004de: bd30 pop {r4, r5, pc} + 80004e0: ea5f 0c4c movs.w ip, ip, lsl #1 + 80004e4: 4140 adcs r0, r0 + 80004e6: eb41 0101 adc.w r1, r1, r1 + 80004ea: 3c01 subs r4, #1 + 80004ec: bf28 it cs + 80004ee: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 + 80004f2: d2e9 bcs.n 80004c8 <__adddf3+0x10c> + 80004f4: f091 0f00 teq r1, #0 + 80004f8: bf04 itt eq + 80004fa: 4601 moveq r1, r0 + 80004fc: 2000 moveq r0, #0 + 80004fe: fab1 f381 clz r3, r1 + 8000502: bf08 it eq + 8000504: 3320 addeq r3, #32 + 8000506: f1a3 030b sub.w r3, r3, #11 + 800050a: f1b3 0220 subs.w r2, r3, #32 + 800050e: da0c bge.n 800052a <__adddf3+0x16e> + 8000510: 320c adds r2, #12 + 8000512: dd08 ble.n 8000526 <__adddf3+0x16a> + 8000514: f102 0c14 add.w ip, r2, #20 + 8000518: f1c2 020c rsb r2, r2, #12 + 800051c: fa01 f00c lsl.w r0, r1, ip + 8000520: fa21 f102 lsr.w r1, r1, r2 + 8000524: e00c b.n 8000540 <__adddf3+0x184> + 8000526: f102 0214 add.w r2, r2, #20 + 800052a: bfd8 it le + 800052c: f1c2 0c20 rsble ip, r2, #32 + 8000530: fa01 f102 lsl.w r1, r1, r2 + 8000534: fa20 fc0c lsr.w ip, r0, ip + 8000538: bfdc itt le + 800053a: ea41 010c orrle.w r1, r1, ip + 800053e: 4090 lslle r0, r2 + 8000540: 1ae4 subs r4, r4, r3 + 8000542: bfa2 ittt ge + 8000544: eb01 5104 addge.w r1, r1, r4, lsl #20 + 8000548: 4329 orrge r1, r5 + 800054a: bd30 popge {r4, r5, pc} + 800054c: ea6f 0404 mvn.w r4, r4 + 8000550: 3c1f subs r4, #31 + 8000552: da1c bge.n 800058e <__adddf3+0x1d2> + 8000554: 340c adds r4, #12 + 8000556: dc0e bgt.n 8000576 <__adddf3+0x1ba> + 8000558: f104 0414 add.w r4, r4, #20 + 800055c: f1c4 0220 rsb r2, r4, #32 + 8000560: fa20 f004 lsr.w r0, r0, r4 + 8000564: fa01 f302 lsl.w r3, r1, r2 + 8000568: ea40 0003 orr.w r0, r0, r3 + 800056c: fa21 f304 lsr.w r3, r1, r4 + 8000570: ea45 0103 orr.w r1, r5, r3 + 8000574: bd30 pop {r4, r5, pc} + 8000576: f1c4 040c rsb r4, r4, #12 + 800057a: f1c4 0220 rsb r2, r4, #32 + 800057e: fa20 f002 lsr.w r0, r0, r2 + 8000582: fa01 f304 lsl.w r3, r1, r4 + 8000586: ea40 0003 orr.w r0, r0, r3 + 800058a: 4629 mov r1, r5 + 800058c: bd30 pop {r4, r5, pc} + 800058e: fa21 f004 lsr.w r0, r1, r4 + 8000592: 4629 mov r1, r5 + 8000594: bd30 pop {r4, r5, pc} + 8000596: f094 0f00 teq r4, #0 + 800059a: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 + 800059e: bf06 itte eq + 80005a0: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 + 80005a4: 3401 addeq r4, #1 + 80005a6: 3d01 subne r5, #1 + 80005a8: e74e b.n 8000448 <__adddf3+0x8c> + 80005aa: ea7f 5c64 mvns.w ip, r4, asr #21 + 80005ae: bf18 it ne + 80005b0: ea7f 5c65 mvnsne.w ip, r5, asr #21 + 80005b4: d029 beq.n 800060a <__adddf3+0x24e> + 80005b6: ea94 0f05 teq r4, r5 + 80005ba: bf08 it eq + 80005bc: ea90 0f02 teqeq r0, r2 + 80005c0: d005 beq.n 80005ce <__adddf3+0x212> + 80005c2: ea54 0c00 orrs.w ip, r4, r0 + 80005c6: bf04 itt eq + 80005c8: 4619 moveq r1, r3 + 80005ca: 4610 moveq r0, r2 + 80005cc: bd30 pop {r4, r5, pc} + 80005ce: ea91 0f03 teq r1, r3 + 80005d2: bf1e ittt ne + 80005d4: 2100 movne r1, #0 + 80005d6: 2000 movne r0, #0 + 80005d8: bd30 popne {r4, r5, pc} + 80005da: ea5f 5c54 movs.w ip, r4, lsr #21 + 80005de: d105 bne.n 80005ec <__adddf3+0x230> + 80005e0: 0040 lsls r0, r0, #1 + 80005e2: 4149 adcs r1, r1 + 80005e4: bf28 it cs + 80005e6: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 + 80005ea: bd30 pop {r4, r5, pc} + 80005ec: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 + 80005f0: bf3c itt cc + 80005f2: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 + 80005f6: bd30 popcc {r4, r5, pc} + 80005f8: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 + 80005fc: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 + 8000600: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 + 8000604: f04f 0000 mov.w r0, #0 + 8000608: bd30 pop {r4, r5, pc} + 800060a: ea7f 5c64 mvns.w ip, r4, asr #21 + 800060e: bf1a itte ne + 8000610: 4619 movne r1, r3 + 8000612: 4610 movne r0, r2 + 8000614: ea7f 5c65 mvnseq.w ip, r5, asr #21 + 8000618: bf1c itt ne + 800061a: 460b movne r3, r1 + 800061c: 4602 movne r2, r0 + 800061e: ea50 3401 orrs.w r4, r0, r1, lsl #12 + 8000622: bf06 itte eq + 8000624: ea52 3503 orrseq.w r5, r2, r3, lsl #12 + 8000628: ea91 0f03 teqeq r1, r3 + 800062c: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 + 8000630: bd30 pop {r4, r5, pc} + 8000632: bf00 nop -08000404 <__aeabi_i2d>: - 8000404: f090 0f00 teq r0, #0 - 8000408: bf04 itt eq - 800040a: 2100 moveq r1, #0 - 800040c: 4770 bxeq lr - 800040e: b530 push {r4, r5, lr} - 8000410: f44f 6480 mov.w r4, #1024 @ 0x400 - 8000414: f104 0432 add.w r4, r4, #50 @ 0x32 - 8000418: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 - 800041c: bf48 it mi - 800041e: 4240 negmi r0, r0 - 8000420: f04f 0100 mov.w r1, #0 - 8000424: e73e b.n 80002a4 <__adddf3+0x138> - 8000426: bf00 nop +08000634 <__aeabi_ui2d>: + 8000634: f090 0f00 teq r0, #0 + 8000638: bf04 itt eq + 800063a: 2100 moveq r1, #0 + 800063c: 4770 bxeq lr + 800063e: b530 push {r4, r5, lr} + 8000640: f44f 6480 mov.w r4, #1024 @ 0x400 + 8000644: f104 0432 add.w r4, r4, #50 @ 0x32 + 8000648: f04f 0500 mov.w r5, #0 + 800064c: f04f 0100 mov.w r1, #0 + 8000650: e750 b.n 80004f4 <__adddf3+0x138> + 8000652: bf00 nop -08000428 <__aeabi_f2d>: - 8000428: 0042 lsls r2, r0, #1 - 800042a: ea4f 01e2 mov.w r1, r2, asr #3 - 800042e: ea4f 0131 mov.w r1, r1, rrx - 8000432: ea4f 7002 mov.w r0, r2, lsl #28 - 8000436: bf1f itttt ne - 8000438: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 - 800043c: f093 4f7f teqne r3, #4278190080 @ 0xff000000 - 8000440: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 - 8000444: 4770 bxne lr - 8000446: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 - 800044a: bf08 it eq - 800044c: 4770 bxeq lr - 800044e: f093 4f7f teq r3, #4278190080 @ 0xff000000 - 8000452: bf04 itt eq - 8000454: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 - 8000458: 4770 bxeq lr - 800045a: b530 push {r4, r5, lr} - 800045c: f44f 7460 mov.w r4, #896 @ 0x380 - 8000460: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 - 8000464: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 - 8000468: e71c b.n 80002a4 <__adddf3+0x138> - 800046a: bf00 nop +08000654 <__aeabi_i2d>: + 8000654: f090 0f00 teq r0, #0 + 8000658: bf04 itt eq + 800065a: 2100 moveq r1, #0 + 800065c: 4770 bxeq lr + 800065e: b530 push {r4, r5, lr} + 8000660: f44f 6480 mov.w r4, #1024 @ 0x400 + 8000664: f104 0432 add.w r4, r4, #50 @ 0x32 + 8000668: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 + 800066c: bf48 it mi + 800066e: 4240 negmi r0, r0 + 8000670: f04f 0100 mov.w r1, #0 + 8000674: e73e b.n 80004f4 <__adddf3+0x138> + 8000676: bf00 nop -0800046c <__aeabi_ul2d>: - 800046c: ea50 0201 orrs.w r2, r0, r1 - 8000470: bf08 it eq - 8000472: 4770 bxeq lr - 8000474: b530 push {r4, r5, lr} - 8000476: f04f 0500 mov.w r5, #0 - 800047a: e00a b.n 8000492 <__aeabi_l2d+0x16> +08000678 <__aeabi_f2d>: + 8000678: 0042 lsls r2, r0, #1 + 800067a: ea4f 01e2 mov.w r1, r2, asr #3 + 800067e: ea4f 0131 mov.w r1, r1, rrx + 8000682: ea4f 7002 mov.w r0, r2, lsl #28 + 8000686: bf1f itttt ne + 8000688: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 + 800068c: f093 4f7f teqne r3, #4278190080 @ 0xff000000 + 8000690: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 + 8000694: 4770 bxne lr + 8000696: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 + 800069a: bf08 it eq + 800069c: 4770 bxeq lr + 800069e: f093 4f7f teq r3, #4278190080 @ 0xff000000 + 80006a2: bf04 itt eq + 80006a4: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 + 80006a8: 4770 bxeq lr + 80006aa: b530 push {r4, r5, lr} + 80006ac: f44f 7460 mov.w r4, #896 @ 0x380 + 80006b0: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 + 80006b4: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 + 80006b8: e71c b.n 80004f4 <__adddf3+0x138> + 80006ba: bf00 nop -0800047c <__aeabi_l2d>: - 800047c: ea50 0201 orrs.w r2, r0, r1 - 8000480: bf08 it eq - 8000482: 4770 bxeq lr - 8000484: b530 push {r4, r5, lr} - 8000486: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 - 800048a: d502 bpl.n 8000492 <__aeabi_l2d+0x16> - 800048c: 4240 negs r0, r0 - 800048e: eb61 0141 sbc.w r1, r1, r1, lsl #1 - 8000492: f44f 6480 mov.w r4, #1024 @ 0x400 - 8000496: f104 0432 add.w r4, r4, #50 @ 0x32 - 800049a: ea5f 5c91 movs.w ip, r1, lsr #22 - 800049e: f43f aed8 beq.w 8000252 <__adddf3+0xe6> - 80004a2: f04f 0203 mov.w r2, #3 - 80004a6: ea5f 0cdc movs.w ip, ip, lsr #3 - 80004aa: bf18 it ne - 80004ac: 3203 addne r2, #3 - 80004ae: ea5f 0cdc movs.w ip, ip, lsr #3 - 80004b2: bf18 it ne - 80004b4: 3203 addne r2, #3 - 80004b6: eb02 02dc add.w r2, r2, ip, lsr #3 - 80004ba: f1c2 0320 rsb r3, r2, #32 - 80004be: fa00 fc03 lsl.w ip, r0, r3 - 80004c2: fa20 f002 lsr.w r0, r0, r2 - 80004c6: fa01 fe03 lsl.w lr, r1, r3 - 80004ca: ea40 000e orr.w r0, r0, lr - 80004ce: fa21 f102 lsr.w r1, r1, r2 - 80004d2: 4414 add r4, r2 - 80004d4: e6bd b.n 8000252 <__adddf3+0xe6> - 80004d6: bf00 nop +080006bc <__aeabi_ul2d>: + 80006bc: ea50 0201 orrs.w r2, r0, r1 + 80006c0: bf08 it eq + 80006c2: 4770 bxeq lr + 80006c4: b530 push {r4, r5, lr} + 80006c6: f04f 0500 mov.w r5, #0 + 80006ca: e00a b.n 80006e2 <__aeabi_l2d+0x16> -080004d8 <__aeabi_dmul>: - 80004d8: b570 push {r4, r5, r6, lr} - 80004da: f04f 0cff mov.w ip, #255 @ 0xff - 80004de: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 - 80004e2: ea1c 5411 ands.w r4, ip, r1, lsr #20 - 80004e6: bf1d ittte ne - 80004e8: ea1c 5513 andsne.w r5, ip, r3, lsr #20 - 80004ec: ea94 0f0c teqne r4, ip - 80004f0: ea95 0f0c teqne r5, ip - 80004f4: f000 f8de bleq 80006b4 <__aeabi_dmul+0x1dc> - 80004f8: 442c add r4, r5 - 80004fa: ea81 0603 eor.w r6, r1, r3 - 80004fe: ea21 514c bic.w r1, r1, ip, lsl #21 - 8000502: ea23 534c bic.w r3, r3, ip, lsl #21 - 8000506: ea50 3501 orrs.w r5, r0, r1, lsl #12 - 800050a: bf18 it ne - 800050c: ea52 3503 orrsne.w r5, r2, r3, lsl #12 - 8000510: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 - 8000514: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 - 8000518: d038 beq.n 800058c <__aeabi_dmul+0xb4> - 800051a: fba0 ce02 umull ip, lr, r0, r2 - 800051e: f04f 0500 mov.w r5, #0 - 8000522: fbe1 e502 umlal lr, r5, r1, r2 - 8000526: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 - 800052a: fbe0 e503 umlal lr, r5, r0, r3 - 800052e: f04f 0600 mov.w r6, #0 - 8000532: fbe1 5603 umlal r5, r6, r1, r3 - 8000536: f09c 0f00 teq ip, #0 - 800053a: bf18 it ne - 800053c: f04e 0e01 orrne.w lr, lr, #1 - 8000540: f1a4 04ff sub.w r4, r4, #255 @ 0xff - 8000544: f5b6 7f00 cmp.w r6, #512 @ 0x200 - 8000548: f564 7440 sbc.w r4, r4, #768 @ 0x300 - 800054c: d204 bcs.n 8000558 <__aeabi_dmul+0x80> - 800054e: ea5f 0e4e movs.w lr, lr, lsl #1 - 8000552: 416d adcs r5, r5 - 8000554: eb46 0606 adc.w r6, r6, r6 - 8000558: ea42 21c6 orr.w r1, r2, r6, lsl #11 - 800055c: ea41 5155 orr.w r1, r1, r5, lsr #21 - 8000560: ea4f 20c5 mov.w r0, r5, lsl #11 - 8000564: ea40 505e orr.w r0, r0, lr, lsr #21 - 8000568: ea4f 2ece mov.w lr, lr, lsl #11 - 800056c: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd - 8000570: bf88 it hi - 8000572: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 - 8000576: d81e bhi.n 80005b6 <__aeabi_dmul+0xde> - 8000578: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 - 800057c: bf08 it eq - 800057e: ea5f 0e50 movseq.w lr, r0, lsr #1 - 8000582: f150 0000 adcs.w r0, r0, #0 - 8000586: eb41 5104 adc.w r1, r1, r4, lsl #20 - 800058a: bd70 pop {r4, r5, r6, pc} - 800058c: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 - 8000590: ea46 0101 orr.w r1, r6, r1 - 8000594: ea40 0002 orr.w r0, r0, r2 - 8000598: ea81 0103 eor.w r1, r1, r3 - 800059c: ebb4 045c subs.w r4, r4, ip, lsr #1 - 80005a0: bfc2 ittt gt - 80005a2: ebd4 050c rsbsgt r5, r4, ip - 80005a6: ea41 5104 orrgt.w r1, r1, r4, lsl #20 - 80005aa: bd70 popgt {r4, r5, r6, pc} - 80005ac: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 - 80005b0: f04f 0e00 mov.w lr, #0 - 80005b4: 3c01 subs r4, #1 - 80005b6: f300 80ab bgt.w 8000710 <__aeabi_dmul+0x238> - 80005ba: f114 0f36 cmn.w r4, #54 @ 0x36 - 80005be: bfde ittt le - 80005c0: 2000 movle r0, #0 - 80005c2: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 - 80005c6: bd70 pople {r4, r5, r6, pc} - 80005c8: f1c4 0400 rsb r4, r4, #0 - 80005cc: 3c20 subs r4, #32 - 80005ce: da35 bge.n 800063c <__aeabi_dmul+0x164> - 80005d0: 340c adds r4, #12 - 80005d2: dc1b bgt.n 800060c <__aeabi_dmul+0x134> - 80005d4: f104 0414 add.w r4, r4, #20 - 80005d8: f1c4 0520 rsb r5, r4, #32 - 80005dc: fa00 f305 lsl.w r3, r0, r5 - 80005e0: fa20 f004 lsr.w r0, r0, r4 - 80005e4: fa01 f205 lsl.w r2, r1, r5 - 80005e8: ea40 0002 orr.w r0, r0, r2 - 80005ec: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 - 80005f0: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 - 80005f4: eb10 70d3 adds.w r0, r0, r3, lsr #31 - 80005f8: fa21 f604 lsr.w r6, r1, r4 - 80005fc: eb42 0106 adc.w r1, r2, r6 - 8000600: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 - 8000604: bf08 it eq - 8000606: ea20 70d3 biceq.w r0, r0, r3, lsr #31 - 800060a: bd70 pop {r4, r5, r6, pc} - 800060c: f1c4 040c rsb r4, r4, #12 - 8000610: f1c4 0520 rsb r5, r4, #32 - 8000614: fa00 f304 lsl.w r3, r0, r4 - 8000618: fa20 f005 lsr.w r0, r0, r5 - 800061c: fa01 f204 lsl.w r2, r1, r4 - 8000620: ea40 0002 orr.w r0, r0, r2 - 8000624: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 - 8000628: eb10 70d3 adds.w r0, r0, r3, lsr #31 - 800062c: f141 0100 adc.w r1, r1, #0 - 8000630: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 - 8000634: bf08 it eq - 8000636: ea20 70d3 biceq.w r0, r0, r3, lsr #31 - 800063a: bd70 pop {r4, r5, r6, pc} - 800063c: f1c4 0520 rsb r5, r4, #32 - 8000640: fa00 f205 lsl.w r2, r0, r5 - 8000644: ea4e 0e02 orr.w lr, lr, r2 - 8000648: fa20 f304 lsr.w r3, r0, r4 - 800064c: fa01 f205 lsl.w r2, r1, r5 - 8000650: ea43 0302 orr.w r3, r3, r2 - 8000654: fa21 f004 lsr.w r0, r1, r4 - 8000658: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 - 800065c: fa21 f204 lsr.w r2, r1, r4 - 8000660: ea20 0002 bic.w r0, r0, r2 - 8000664: eb00 70d3 add.w r0, r0, r3, lsr #31 - 8000668: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 - 800066c: bf08 it eq - 800066e: ea20 70d3 biceq.w r0, r0, r3, lsr #31 - 8000672: bd70 pop {r4, r5, r6, pc} - 8000674: f094 0f00 teq r4, #0 - 8000678: d10f bne.n 800069a <__aeabi_dmul+0x1c2> - 800067a: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 - 800067e: 0040 lsls r0, r0, #1 - 8000680: eb41 0101 adc.w r1, r1, r1 - 8000684: f411 1f80 tst.w r1, #1048576 @ 0x100000 - 8000688: bf08 it eq - 800068a: 3c01 subeq r4, #1 - 800068c: d0f7 beq.n 800067e <__aeabi_dmul+0x1a6> - 800068e: ea41 0106 orr.w r1, r1, r6 - 8000692: f095 0f00 teq r5, #0 - 8000696: bf18 it ne - 8000698: 4770 bxne lr - 800069a: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 - 800069e: 0052 lsls r2, r2, #1 - 80006a0: eb43 0303 adc.w r3, r3, r3 - 80006a4: f413 1f80 tst.w r3, #1048576 @ 0x100000 - 80006a8: bf08 it eq - 80006aa: 3d01 subeq r5, #1 - 80006ac: d0f7 beq.n 800069e <__aeabi_dmul+0x1c6> - 80006ae: ea43 0306 orr.w r3, r3, r6 - 80006b2: 4770 bx lr - 80006b4: ea94 0f0c teq r4, ip - 80006b8: ea0c 5513 and.w r5, ip, r3, lsr #20 - 80006bc: bf18 it ne - 80006be: ea95 0f0c teqne r5, ip - 80006c2: d00c beq.n 80006de <__aeabi_dmul+0x206> - 80006c4: ea50 0641 orrs.w r6, r0, r1, lsl #1 - 80006c8: bf18 it ne - 80006ca: ea52 0643 orrsne.w r6, r2, r3, lsl #1 - 80006ce: d1d1 bne.n 8000674 <__aeabi_dmul+0x19c> - 80006d0: ea81 0103 eor.w r1, r1, r3 - 80006d4: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 - 80006d8: f04f 0000 mov.w r0, #0 - 80006dc: bd70 pop {r4, r5, r6, pc} - 80006de: ea50 0641 orrs.w r6, r0, r1, lsl #1 - 80006e2: bf06 itte eq - 80006e4: 4610 moveq r0, r2 - 80006e6: 4619 moveq r1, r3 - 80006e8: ea52 0643 orrsne.w r6, r2, r3, lsl #1 - 80006ec: d019 beq.n 8000722 <__aeabi_dmul+0x24a> - 80006ee: ea94 0f0c teq r4, ip - 80006f2: d102 bne.n 80006fa <__aeabi_dmul+0x222> - 80006f4: ea50 3601 orrs.w r6, r0, r1, lsl #12 - 80006f8: d113 bne.n 8000722 <__aeabi_dmul+0x24a> - 80006fa: ea95 0f0c teq r5, ip - 80006fe: d105 bne.n 800070c <__aeabi_dmul+0x234> - 8000700: ea52 3603 orrs.w r6, r2, r3, lsl #12 - 8000704: bf1c itt ne - 8000706: 4610 movne r0, r2 - 8000708: 4619 movne r1, r3 - 800070a: d10a bne.n 8000722 <__aeabi_dmul+0x24a> - 800070c: ea81 0103 eor.w r1, r1, r3 - 8000710: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 - 8000714: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 - 8000718: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 - 800071c: f04f 0000 mov.w r0, #0 - 8000720: bd70 pop {r4, r5, r6, pc} - 8000722: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 - 8000726: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 - 800072a: bd70 pop {r4, r5, r6, pc} +080006cc <__aeabi_l2d>: + 80006cc: ea50 0201 orrs.w r2, r0, r1 + 80006d0: bf08 it eq + 80006d2: 4770 bxeq lr + 80006d4: b530 push {r4, r5, lr} + 80006d6: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 + 80006da: d502 bpl.n 80006e2 <__aeabi_l2d+0x16> + 80006dc: 4240 negs r0, r0 + 80006de: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 80006e2: f44f 6480 mov.w r4, #1024 @ 0x400 + 80006e6: f104 0432 add.w r4, r4, #50 @ 0x32 + 80006ea: ea5f 5c91 movs.w ip, r1, lsr #22 + 80006ee: f43f aed8 beq.w 80004a2 <__adddf3+0xe6> + 80006f2: f04f 0203 mov.w r2, #3 + 80006f6: ea5f 0cdc movs.w ip, ip, lsr #3 + 80006fa: bf18 it ne + 80006fc: 3203 addne r2, #3 + 80006fe: ea5f 0cdc movs.w ip, ip, lsr #3 + 8000702: bf18 it ne + 8000704: 3203 addne r2, #3 + 8000706: eb02 02dc add.w r2, r2, ip, lsr #3 + 800070a: f1c2 0320 rsb r3, r2, #32 + 800070e: fa00 fc03 lsl.w ip, r0, r3 + 8000712: fa20 f002 lsr.w r0, r0, r2 + 8000716: fa01 fe03 lsl.w lr, r1, r3 + 800071a: ea40 000e orr.w r0, r0, lr + 800071e: fa21 f102 lsr.w r1, r1, r2 + 8000722: 4414 add r4, r2 + 8000724: e6bd b.n 80004a2 <__adddf3+0xe6> + 8000726: bf00 nop -0800072c <__aeabi_ddiv>: - 800072c: b570 push {r4, r5, r6, lr} - 800072e: f04f 0cff mov.w ip, #255 @ 0xff - 8000732: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 - 8000736: ea1c 5411 ands.w r4, ip, r1, lsr #20 - 800073a: bf1d ittte ne - 800073c: ea1c 5513 andsne.w r5, ip, r3, lsr #20 - 8000740: ea94 0f0c teqne r4, ip - 8000744: ea95 0f0c teqne r5, ip - 8000748: f000 f8a7 bleq 800089a <__aeabi_ddiv+0x16e> - 800074c: eba4 0405 sub.w r4, r4, r5 - 8000750: ea81 0e03 eor.w lr, r1, r3 - 8000754: ea52 3503 orrs.w r5, r2, r3, lsl #12 - 8000758: ea4f 3101 mov.w r1, r1, lsl #12 - 800075c: f000 8088 beq.w 8000870 <__aeabi_ddiv+0x144> - 8000760: ea4f 3303 mov.w r3, r3, lsl #12 - 8000764: f04f 5580 mov.w r5, #268435456 @ 0x10000000 - 8000768: ea45 1313 orr.w r3, r5, r3, lsr #4 - 800076c: ea43 6312 orr.w r3, r3, r2, lsr #24 - 8000770: ea4f 2202 mov.w r2, r2, lsl #8 - 8000774: ea45 1511 orr.w r5, r5, r1, lsr #4 - 8000778: ea45 6510 orr.w r5, r5, r0, lsr #24 - 800077c: ea4f 2600 mov.w r6, r0, lsl #8 - 8000780: f00e 4100 and.w r1, lr, #2147483648 @ 0x80000000 - 8000784: 429d cmp r5, r3 - 8000786: bf08 it eq - 8000788: 4296 cmpeq r6, r2 - 800078a: f144 04fd adc.w r4, r4, #253 @ 0xfd - 800078e: f504 7440 add.w r4, r4, #768 @ 0x300 - 8000792: d202 bcs.n 800079a <__aeabi_ddiv+0x6e> - 8000794: 085b lsrs r3, r3, #1 - 8000796: ea4f 0232 mov.w r2, r2, rrx - 800079a: 1ab6 subs r6, r6, r2 - 800079c: eb65 0503 sbc.w r5, r5, r3 - 80007a0: 085b lsrs r3, r3, #1 - 80007a2: ea4f 0232 mov.w r2, r2, rrx - 80007a6: f44f 1080 mov.w r0, #1048576 @ 0x100000 - 80007aa: f44f 2c00 mov.w ip, #524288 @ 0x80000 - 80007ae: ebb6 0e02 subs.w lr, r6, r2 - 80007b2: eb75 0e03 sbcs.w lr, r5, r3 - 80007b6: bf22 ittt cs - 80007b8: 1ab6 subcs r6, r6, r2 - 80007ba: 4675 movcs r5, lr - 80007bc: ea40 000c orrcs.w r0, r0, ip - 80007c0: 085b lsrs r3, r3, #1 - 80007c2: ea4f 0232 mov.w r2, r2, rrx - 80007c6: ebb6 0e02 subs.w lr, r6, r2 - 80007ca: eb75 0e03 sbcs.w lr, r5, r3 - 80007ce: bf22 ittt cs - 80007d0: 1ab6 subcs r6, r6, r2 - 80007d2: 4675 movcs r5, lr - 80007d4: ea40 005c orrcs.w r0, r0, ip, lsr #1 - 80007d8: 085b lsrs r3, r3, #1 - 80007da: ea4f 0232 mov.w r2, r2, rrx - 80007de: ebb6 0e02 subs.w lr, r6, r2 - 80007e2: eb75 0e03 sbcs.w lr, r5, r3 - 80007e6: bf22 ittt cs - 80007e8: 1ab6 subcs r6, r6, r2 - 80007ea: 4675 movcs r5, lr - 80007ec: ea40 009c orrcs.w r0, r0, ip, lsr #2 - 80007f0: 085b lsrs r3, r3, #1 - 80007f2: ea4f 0232 mov.w r2, r2, rrx - 80007f6: ebb6 0e02 subs.w lr, r6, r2 - 80007fa: eb75 0e03 sbcs.w lr, r5, r3 - 80007fe: bf22 ittt cs - 8000800: 1ab6 subcs r6, r6, r2 - 8000802: 4675 movcs r5, lr - 8000804: ea40 00dc orrcs.w r0, r0, ip, lsr #3 - 8000808: ea55 0e06 orrs.w lr, r5, r6 - 800080c: d018 beq.n 8000840 <__aeabi_ddiv+0x114> - 800080e: ea4f 1505 mov.w r5, r5, lsl #4 - 8000812: ea45 7516 orr.w r5, r5, r6, lsr #28 - 8000816: ea4f 1606 mov.w r6, r6, lsl #4 - 800081a: ea4f 03c3 mov.w r3, r3, lsl #3 - 800081e: ea43 7352 orr.w r3, r3, r2, lsr #29 - 8000822: ea4f 02c2 mov.w r2, r2, lsl #3 - 8000826: ea5f 1c1c movs.w ip, ip, lsr #4 - 800082a: d1c0 bne.n 80007ae <__aeabi_ddiv+0x82> - 800082c: f411 1f80 tst.w r1, #1048576 @ 0x100000 - 8000830: d10b bne.n 800084a <__aeabi_ddiv+0x11e> - 8000832: ea41 0100 orr.w r1, r1, r0 - 8000836: f04f 0000 mov.w r0, #0 - 800083a: f04f 4c00 mov.w ip, #2147483648 @ 0x80000000 - 800083e: e7b6 b.n 80007ae <__aeabi_ddiv+0x82> - 8000840: f411 1f80 tst.w r1, #1048576 @ 0x100000 - 8000844: bf04 itt eq - 8000846: 4301 orreq r1, r0 - 8000848: 2000 moveq r0, #0 - 800084a: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd - 800084e: bf88 it hi - 8000850: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 - 8000854: f63f aeaf bhi.w 80005b6 <__aeabi_dmul+0xde> - 8000858: ebb5 0c03 subs.w ip, r5, r3 - 800085c: bf04 itt eq - 800085e: ebb6 0c02 subseq.w ip, r6, r2 - 8000862: ea5f 0c50 movseq.w ip, r0, lsr #1 - 8000866: f150 0000 adcs.w r0, r0, #0 - 800086a: eb41 5104 adc.w r1, r1, r4, lsl #20 - 800086e: bd70 pop {r4, r5, r6, pc} - 8000870: f00e 4e00 and.w lr, lr, #2147483648 @ 0x80000000 - 8000874: ea4e 3111 orr.w r1, lr, r1, lsr #12 - 8000878: eb14 045c adds.w r4, r4, ip, lsr #1 - 800087c: bfc2 ittt gt - 800087e: ebd4 050c rsbsgt r5, r4, ip - 8000882: ea41 5104 orrgt.w r1, r1, r4, lsl #20 - 8000886: bd70 popgt {r4, r5, r6, pc} - 8000888: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 - 800088c: f04f 0e00 mov.w lr, #0 - 8000890: 3c01 subs r4, #1 - 8000892: e690 b.n 80005b6 <__aeabi_dmul+0xde> - 8000894: ea45 0e06 orr.w lr, r5, r6 - 8000898: e68d b.n 80005b6 <__aeabi_dmul+0xde> - 800089a: ea0c 5513 and.w r5, ip, r3, lsr #20 - 800089e: ea94 0f0c teq r4, ip - 80008a2: bf08 it eq - 80008a4: ea95 0f0c teqeq r5, ip - 80008a8: f43f af3b beq.w 8000722 <__aeabi_dmul+0x24a> - 80008ac: ea94 0f0c teq r4, ip - 80008b0: d10a bne.n 80008c8 <__aeabi_ddiv+0x19c> - 80008b2: ea50 3401 orrs.w r4, r0, r1, lsl #12 - 80008b6: f47f af34 bne.w 8000722 <__aeabi_dmul+0x24a> - 80008ba: ea95 0f0c teq r5, ip - 80008be: f47f af25 bne.w 800070c <__aeabi_dmul+0x234> - 80008c2: 4610 mov r0, r2 - 80008c4: 4619 mov r1, r3 - 80008c6: e72c b.n 8000722 <__aeabi_dmul+0x24a> - 80008c8: ea95 0f0c teq r5, ip - 80008cc: d106 bne.n 80008dc <__aeabi_ddiv+0x1b0> - 80008ce: ea52 3503 orrs.w r5, r2, r3, lsl #12 - 80008d2: f43f aefd beq.w 80006d0 <__aeabi_dmul+0x1f8> - 80008d6: 4610 mov r0, r2 - 80008d8: 4619 mov r1, r3 - 80008da: e722 b.n 8000722 <__aeabi_dmul+0x24a> - 80008dc: ea50 0641 orrs.w r6, r0, r1, lsl #1 - 80008e0: bf18 it ne - 80008e2: ea52 0643 orrsne.w r6, r2, r3, lsl #1 - 80008e6: f47f aec5 bne.w 8000674 <__aeabi_dmul+0x19c> - 80008ea: ea50 0441 orrs.w r4, r0, r1, lsl #1 - 80008ee: f47f af0d bne.w 800070c <__aeabi_dmul+0x234> - 80008f2: ea52 0543 orrs.w r5, r2, r3, lsl #1 - 80008f6: f47f aeeb bne.w 80006d0 <__aeabi_dmul+0x1f8> - 80008fa: e712 b.n 8000722 <__aeabi_dmul+0x24a> +08000728 <__gedf2>: + 8000728: f04f 3cff mov.w ip, #4294967295 + 800072c: e006 b.n 800073c <__cmpdf2+0x4> + 800072e: bf00 nop -080008fc <__gedf2>: - 80008fc: f04f 3cff mov.w ip, #4294967295 - 8000900: e006 b.n 8000910 <__cmpdf2+0x4> - 8000902: bf00 nop +08000730 <__ledf2>: + 8000730: f04f 0c01 mov.w ip, #1 + 8000734: e002 b.n 800073c <__cmpdf2+0x4> + 8000736: bf00 nop -08000904 <__ledf2>: - 8000904: f04f 0c01 mov.w ip, #1 - 8000908: e002 b.n 8000910 <__cmpdf2+0x4> - 800090a: bf00 nop +08000738 <__cmpdf2>: + 8000738: f04f 0c01 mov.w ip, #1 + 800073c: f84d cd04 str.w ip, [sp, #-4]! + 8000740: ea4f 0c41 mov.w ip, r1, lsl #1 + 8000744: ea7f 5c6c mvns.w ip, ip, asr #21 + 8000748: ea4f 0c43 mov.w ip, r3, lsl #1 + 800074c: bf18 it ne + 800074e: ea7f 5c6c mvnsne.w ip, ip, asr #21 + 8000752: d01b beq.n 800078c <__cmpdf2+0x54> + 8000754: b001 add sp, #4 + 8000756: ea50 0c41 orrs.w ip, r0, r1, lsl #1 + 800075a: bf0c ite eq + 800075c: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 + 8000760: ea91 0f03 teqne r1, r3 + 8000764: bf02 ittt eq + 8000766: ea90 0f02 teqeq r0, r2 + 800076a: 2000 moveq r0, #0 + 800076c: 4770 bxeq lr + 800076e: f110 0f00 cmn.w r0, #0 + 8000772: ea91 0f03 teq r1, r3 + 8000776: bf58 it pl + 8000778: 4299 cmppl r1, r3 + 800077a: bf08 it eq + 800077c: 4290 cmpeq r0, r2 + 800077e: bf2c ite cs + 8000780: 17d8 asrcs r0, r3, #31 + 8000782: ea6f 70e3 mvncc.w r0, r3, asr #31 + 8000786: f040 0001 orr.w r0, r0, #1 + 800078a: 4770 bx lr + 800078c: ea4f 0c41 mov.w ip, r1, lsl #1 + 8000790: ea7f 5c6c mvns.w ip, ip, asr #21 + 8000794: d102 bne.n 800079c <__cmpdf2+0x64> + 8000796: ea50 3c01 orrs.w ip, r0, r1, lsl #12 + 800079a: d107 bne.n 80007ac <__cmpdf2+0x74> + 800079c: ea4f 0c43 mov.w ip, r3, lsl #1 + 80007a0: ea7f 5c6c mvns.w ip, ip, asr #21 + 80007a4: d1d6 bne.n 8000754 <__cmpdf2+0x1c> + 80007a6: ea52 3c03 orrs.w ip, r2, r3, lsl #12 + 80007aa: d0d3 beq.n 8000754 <__cmpdf2+0x1c> + 80007ac: f85d 0b04 ldr.w r0, [sp], #4 + 80007b0: 4770 bx lr + 80007b2: bf00 nop -0800090c <__cmpdf2>: - 800090c: f04f 0c01 mov.w ip, #1 - 8000910: f84d cd04 str.w ip, [sp, #-4]! - 8000914: ea4f 0c41 mov.w ip, r1, lsl #1 - 8000918: ea7f 5c6c mvns.w ip, ip, asr #21 - 800091c: ea4f 0c43 mov.w ip, r3, lsl #1 - 8000920: bf18 it ne - 8000922: ea7f 5c6c mvnsne.w ip, ip, asr #21 - 8000926: d01b beq.n 8000960 <__cmpdf2+0x54> - 8000928: b001 add sp, #4 - 800092a: ea50 0c41 orrs.w ip, r0, r1, lsl #1 - 800092e: bf0c ite eq - 8000930: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 - 8000934: ea91 0f03 teqne r1, r3 - 8000938: bf02 ittt eq - 800093a: ea90 0f02 teqeq r0, r2 - 800093e: 2000 moveq r0, #0 - 8000940: 4770 bxeq lr - 8000942: f110 0f00 cmn.w r0, #0 - 8000946: ea91 0f03 teq r1, r3 - 800094a: bf58 it pl - 800094c: 4299 cmppl r1, r3 - 800094e: bf08 it eq - 8000950: 4290 cmpeq r0, r2 - 8000952: bf2c ite cs - 8000954: 17d8 asrcs r0, r3, #31 - 8000956: ea6f 70e3 mvncc.w r0, r3, asr #31 - 800095a: f040 0001 orr.w r0, r0, #1 - 800095e: 4770 bx lr - 8000960: ea4f 0c41 mov.w ip, r1, lsl #1 - 8000964: ea7f 5c6c mvns.w ip, ip, asr #21 - 8000968: d102 bne.n 8000970 <__cmpdf2+0x64> - 800096a: ea50 3c01 orrs.w ip, r0, r1, lsl #12 - 800096e: d107 bne.n 8000980 <__cmpdf2+0x74> - 8000970: ea4f 0c43 mov.w ip, r3, lsl #1 - 8000974: ea7f 5c6c mvns.w ip, ip, asr #21 - 8000978: d1d6 bne.n 8000928 <__cmpdf2+0x1c> - 800097a: ea52 3c03 orrs.w ip, r2, r3, lsl #12 - 800097e: d0d3 beq.n 8000928 <__cmpdf2+0x1c> - 8000980: f85d 0b04 ldr.w r0, [sp], #4 - 8000984: 4770 bx lr - 8000986: bf00 nop +080007b4 <__aeabi_cdrcmple>: + 80007b4: 4684 mov ip, r0 + 80007b6: 4610 mov r0, r2 + 80007b8: 4662 mov r2, ip + 80007ba: 468c mov ip, r1 + 80007bc: 4619 mov r1, r3 + 80007be: 4663 mov r3, ip + 80007c0: e000 b.n 80007c4 <__aeabi_cdcmpeq> + 80007c2: bf00 nop -08000988 <__aeabi_cdrcmple>: - 8000988: 4684 mov ip, r0 - 800098a: 4610 mov r0, r2 - 800098c: 4662 mov r2, ip - 800098e: 468c mov ip, r1 - 8000990: 4619 mov r1, r3 - 8000992: 4663 mov r3, ip - 8000994: e000 b.n 8000998 <__aeabi_cdcmpeq> - 8000996: bf00 nop +080007c4 <__aeabi_cdcmpeq>: + 80007c4: b501 push {r0, lr} + 80007c6: f7ff ffb7 bl 8000738 <__cmpdf2> + 80007ca: 2800 cmp r0, #0 + 80007cc: bf48 it mi + 80007ce: f110 0f00 cmnmi.w r0, #0 + 80007d2: bd01 pop {r0, pc} -08000998 <__aeabi_cdcmpeq>: - 8000998: b501 push {r0, lr} - 800099a: f7ff ffb7 bl 800090c <__cmpdf2> - 800099e: 2800 cmp r0, #0 - 80009a0: bf48 it mi - 80009a2: f110 0f00 cmnmi.w r0, #0 - 80009a6: bd01 pop {r0, pc} +080007d4 <__aeabi_dcmpeq>: + 80007d4: f84d ed08 str.w lr, [sp, #-8]! + 80007d8: f7ff fff4 bl 80007c4 <__aeabi_cdcmpeq> + 80007dc: bf0c ite eq + 80007de: 2001 moveq r0, #1 + 80007e0: 2000 movne r0, #0 + 80007e2: f85d fb08 ldr.w pc, [sp], #8 + 80007e6: bf00 nop -080009a8 <__aeabi_dcmpeq>: - 80009a8: f84d ed08 str.w lr, [sp, #-8]! - 80009ac: f7ff fff4 bl 8000998 <__aeabi_cdcmpeq> - 80009b0: bf0c ite eq - 80009b2: 2001 moveq r0, #1 - 80009b4: 2000 movne r0, #0 - 80009b6: f85d fb08 ldr.w pc, [sp], #8 - 80009ba: bf00 nop +080007e8 <__aeabi_dcmplt>: + 80007e8: f84d ed08 str.w lr, [sp, #-8]! + 80007ec: f7ff ffea bl 80007c4 <__aeabi_cdcmpeq> + 80007f0: bf34 ite cc + 80007f2: 2001 movcc r0, #1 + 80007f4: 2000 movcs r0, #0 + 80007f6: f85d fb08 ldr.w pc, [sp], #8 + 80007fa: bf00 nop -080009bc <__aeabi_dcmplt>: - 80009bc: f84d ed08 str.w lr, [sp, #-8]! - 80009c0: f7ff ffea bl 8000998 <__aeabi_cdcmpeq> - 80009c4: bf34 ite cc - 80009c6: 2001 movcc r0, #1 - 80009c8: 2000 movcs r0, #0 - 80009ca: f85d fb08 ldr.w pc, [sp], #8 - 80009ce: bf00 nop +080007fc <__aeabi_dcmple>: + 80007fc: f84d ed08 str.w lr, [sp, #-8]! + 8000800: f7ff ffe0 bl 80007c4 <__aeabi_cdcmpeq> + 8000804: bf94 ite ls + 8000806: 2001 movls r0, #1 + 8000808: 2000 movhi r0, #0 + 800080a: f85d fb08 ldr.w pc, [sp], #8 + 800080e: bf00 nop -080009d0 <__aeabi_dcmple>: - 80009d0: f84d ed08 str.w lr, [sp, #-8]! - 80009d4: f7ff ffe0 bl 8000998 <__aeabi_cdcmpeq> - 80009d8: bf94 ite ls - 80009da: 2001 movls r0, #1 - 80009dc: 2000 movhi r0, #0 - 80009de: f85d fb08 ldr.w pc, [sp], #8 - 80009e2: bf00 nop +08000810 <__aeabi_dcmpge>: + 8000810: f84d ed08 str.w lr, [sp, #-8]! + 8000814: f7ff ffce bl 80007b4 <__aeabi_cdrcmple> + 8000818: bf94 ite ls + 800081a: 2001 movls r0, #1 + 800081c: 2000 movhi r0, #0 + 800081e: f85d fb08 ldr.w pc, [sp], #8 + 8000822: bf00 nop -080009e4 <__aeabi_dcmpge>: - 80009e4: f84d ed08 str.w lr, [sp, #-8]! - 80009e8: f7ff ffce bl 8000988 <__aeabi_cdrcmple> - 80009ec: bf94 ite ls - 80009ee: 2001 movls r0, #1 - 80009f0: 2000 movhi r0, #0 - 80009f2: f85d fb08 ldr.w pc, [sp], #8 - 80009f6: bf00 nop +08000824 <__aeabi_dcmpgt>: + 8000824: f84d ed08 str.w lr, [sp, #-8]! + 8000828: f7ff ffc4 bl 80007b4 <__aeabi_cdrcmple> + 800082c: bf34 ite cc + 800082e: 2001 movcc r0, #1 + 8000830: 2000 movcs r0, #0 + 8000832: f85d fb08 ldr.w pc, [sp], #8 + 8000836: bf00 nop -080009f8 <__aeabi_dcmpgt>: - 80009f8: f84d ed08 str.w lr, [sp, #-8]! - 80009fc: f7ff ffc4 bl 8000988 <__aeabi_cdrcmple> - 8000a00: bf34 ite cc - 8000a02: 2001 movcc r0, #1 - 8000a04: 2000 movcs r0, #0 - 8000a06: f85d fb08 ldr.w pc, [sp], #8 - 8000a0a: bf00 nop +08000838 <__aeabi_d2iz>: + 8000838: ea4f 0241 mov.w r2, r1, lsl #1 + 800083c: f512 1200 adds.w r2, r2, #2097152 @ 0x200000 + 8000840: d215 bcs.n 800086e <__aeabi_d2iz+0x36> + 8000842: d511 bpl.n 8000868 <__aeabi_d2iz+0x30> + 8000844: f46f 7378 mvn.w r3, #992 @ 0x3e0 + 8000848: ebb3 5262 subs.w r2, r3, r2, asr #21 + 800084c: d912 bls.n 8000874 <__aeabi_d2iz+0x3c> + 800084e: ea4f 23c1 mov.w r3, r1, lsl #11 + 8000852: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 + 8000856: ea43 5350 orr.w r3, r3, r0, lsr #21 + 800085a: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 + 800085e: fa23 f002 lsr.w r0, r3, r2 + 8000862: bf18 it ne + 8000864: 4240 negne r0, r0 + 8000866: 4770 bx lr + 8000868: f04f 0000 mov.w r0, #0 + 800086c: 4770 bx lr + 800086e: ea50 3001 orrs.w r0, r0, r1, lsl #12 + 8000872: d105 bne.n 8000880 <__aeabi_d2iz+0x48> + 8000874: f011 4000 ands.w r0, r1, #2147483648 @ 0x80000000 + 8000878: bf08 it eq + 800087a: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 + 800087e: 4770 bx lr + 8000880: f04f 0000 mov.w r0, #0 + 8000884: 4770 bx lr + 8000886: bf00 nop -08000a0c <__aeabi_d2iz>: - 8000a0c: ea4f 0241 mov.w r2, r1, lsl #1 - 8000a10: f512 1200 adds.w r2, r2, #2097152 @ 0x200000 - 8000a14: d215 bcs.n 8000a42 <__aeabi_d2iz+0x36> - 8000a16: d511 bpl.n 8000a3c <__aeabi_d2iz+0x30> - 8000a18: f46f 7378 mvn.w r3, #992 @ 0x3e0 - 8000a1c: ebb3 5262 subs.w r2, r3, r2, asr #21 - 8000a20: d912 bls.n 8000a48 <__aeabi_d2iz+0x3c> - 8000a22: ea4f 23c1 mov.w r3, r1, lsl #11 - 8000a26: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 - 8000a2a: ea43 5350 orr.w r3, r3, r0, lsr #21 - 8000a2e: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 - 8000a32: fa23 f002 lsr.w r0, r3, r2 - 8000a36: bf18 it ne - 8000a38: 4240 negne r0, r0 - 8000a3a: 4770 bx lr - 8000a3c: f04f 0000 mov.w r0, #0 - 8000a40: 4770 bx lr - 8000a42: ea50 3001 orrs.w r0, r0, r1, lsl #12 - 8000a46: d105 bne.n 8000a54 <__aeabi_d2iz+0x48> - 8000a48: f011 4000 ands.w r0, r1, #2147483648 @ 0x80000000 +08000888 <__aeabi_frsub>: + 8000888: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 + 800088c: e002 b.n 8000894 <__addsf3> + 800088e: bf00 nop + +08000890 <__aeabi_fsub>: + 8000890: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 + +08000894 <__addsf3>: + 8000894: 0042 lsls r2, r0, #1 + 8000896: bf1f itttt ne + 8000898: ea5f 0341 movsne.w r3, r1, lsl #1 + 800089c: ea92 0f03 teqne r2, r3 + 80008a0: ea7f 6c22 mvnsne.w ip, r2, asr #24 + 80008a4: ea7f 6c23 mvnsne.w ip, r3, asr #24 + 80008a8: d06a beq.n 8000980 <__addsf3+0xec> + 80008aa: ea4f 6212 mov.w r2, r2, lsr #24 + 80008ae: ebd2 6313 rsbs r3, r2, r3, lsr #24 + 80008b2: bfc1 itttt gt + 80008b4: 18d2 addgt r2, r2, r3 + 80008b6: 4041 eorgt r1, r0 + 80008b8: 4048 eorgt r0, r1 + 80008ba: 4041 eorgt r1, r0 + 80008bc: bfb8 it lt + 80008be: 425b neglt r3, r3 + 80008c0: 2b19 cmp r3, #25 + 80008c2: bf88 it hi + 80008c4: 4770 bxhi lr + 80008c6: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 + 80008ca: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 80008ce: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 + 80008d2: bf18 it ne + 80008d4: 4240 negne r0, r0 + 80008d6: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 + 80008da: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 + 80008de: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 + 80008e2: bf18 it ne + 80008e4: 4249 negne r1, r1 + 80008e6: ea92 0f03 teq r2, r3 + 80008ea: d03f beq.n 800096c <__addsf3+0xd8> + 80008ec: f1a2 0201 sub.w r2, r2, #1 + 80008f0: fa41 fc03 asr.w ip, r1, r3 + 80008f4: eb10 000c adds.w r0, r0, ip + 80008f8: f1c3 0320 rsb r3, r3, #32 + 80008fc: fa01 f103 lsl.w r1, r1, r3 + 8000900: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 + 8000904: d502 bpl.n 800090c <__addsf3+0x78> + 8000906: 4249 negs r1, r1 + 8000908: eb60 0040 sbc.w r0, r0, r0, lsl #1 + 800090c: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 + 8000910: d313 bcc.n 800093a <__addsf3+0xa6> + 8000912: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 + 8000916: d306 bcc.n 8000926 <__addsf3+0x92> + 8000918: 0840 lsrs r0, r0, #1 + 800091a: ea4f 0131 mov.w r1, r1, rrx + 800091e: f102 0201 add.w r2, r2, #1 + 8000922: 2afe cmp r2, #254 @ 0xfe + 8000924: d251 bcs.n 80009ca <__addsf3+0x136> + 8000926: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 + 800092a: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 800092e: bf08 it eq + 8000930: f020 0001 biceq.w r0, r0, #1 + 8000934: ea40 0003 orr.w r0, r0, r3 + 8000938: 4770 bx lr + 800093a: 0049 lsls r1, r1, #1 + 800093c: eb40 0000 adc.w r0, r0, r0 + 8000940: 3a01 subs r2, #1 + 8000942: bf28 it cs + 8000944: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 + 8000948: d2ed bcs.n 8000926 <__addsf3+0x92> + 800094a: fab0 fc80 clz ip, r0 + 800094e: f1ac 0c08 sub.w ip, ip, #8 + 8000952: ebb2 020c subs.w r2, r2, ip + 8000956: fa00 f00c lsl.w r0, r0, ip + 800095a: bfaa itet ge + 800095c: eb00 50c2 addge.w r0, r0, r2, lsl #23 + 8000960: 4252 neglt r2, r2 + 8000962: 4318 orrge r0, r3 + 8000964: bfbc itt lt + 8000966: 40d0 lsrlt r0, r2 + 8000968: 4318 orrlt r0, r3 + 800096a: 4770 bx lr + 800096c: f092 0f00 teq r2, #0 + 8000970: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 + 8000974: bf06 itte eq + 8000976: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 + 800097a: 3201 addeq r2, #1 + 800097c: 3b01 subne r3, #1 + 800097e: e7b5 b.n 80008ec <__addsf3+0x58> + 8000980: ea4f 0341 mov.w r3, r1, lsl #1 + 8000984: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000988: bf18 it ne + 800098a: ea7f 6c23 mvnsne.w ip, r3, asr #24 + 800098e: d021 beq.n 80009d4 <__addsf3+0x140> + 8000990: ea92 0f03 teq r2, r3 + 8000994: d004 beq.n 80009a0 <__addsf3+0x10c> + 8000996: f092 0f00 teq r2, #0 + 800099a: bf08 it eq + 800099c: 4608 moveq r0, r1 + 800099e: 4770 bx lr + 80009a0: ea90 0f01 teq r0, r1 + 80009a4: bf1c itt ne + 80009a6: 2000 movne r0, #0 + 80009a8: 4770 bxne lr + 80009aa: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 + 80009ae: d104 bne.n 80009ba <__addsf3+0x126> + 80009b0: 0040 lsls r0, r0, #1 + 80009b2: bf28 it cs + 80009b4: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 + 80009b8: 4770 bx lr + 80009ba: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 + 80009be: bf3c itt cc + 80009c0: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 + 80009c4: 4770 bxcc lr + 80009c6: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 + 80009ca: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 + 80009ce: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 80009d2: 4770 bx lr + 80009d4: ea7f 6222 mvns.w r2, r2, asr #24 + 80009d8: bf16 itet ne + 80009da: 4608 movne r0, r1 + 80009dc: ea7f 6323 mvnseq.w r3, r3, asr #24 + 80009e0: 4601 movne r1, r0 + 80009e2: 0242 lsls r2, r0, #9 + 80009e4: bf06 itte eq + 80009e6: ea5f 2341 movseq.w r3, r1, lsl #9 + 80009ea: ea90 0f01 teqeq r0, r1 + 80009ee: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 + 80009f2: 4770 bx lr + +080009f4 <__aeabi_ui2f>: + 80009f4: f04f 0300 mov.w r3, #0 + 80009f8: e004 b.n 8000a04 <__aeabi_i2f+0x8> + 80009fa: bf00 nop + +080009fc <__aeabi_i2f>: + 80009fc: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 + 8000a00: bf48 it mi + 8000a02: 4240 negmi r0, r0 + 8000a04: ea5f 0c00 movs.w ip, r0 + 8000a08: bf08 it eq + 8000a0a: 4770 bxeq lr + 8000a0c: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 + 8000a10: 4601 mov r1, r0 + 8000a12: f04f 0000 mov.w r0, #0 + 8000a16: e01c b.n 8000a52 <__aeabi_l2f+0x2a> + +08000a18 <__aeabi_ul2f>: + 8000a18: ea50 0201 orrs.w r2, r0, r1 + 8000a1c: bf08 it eq + 8000a1e: 4770 bxeq lr + 8000a20: f04f 0300 mov.w r3, #0 + 8000a24: e00a b.n 8000a3c <__aeabi_l2f+0x14> + 8000a26: bf00 nop + +08000a28 <__aeabi_l2f>: + 8000a28: ea50 0201 orrs.w r2, r0, r1 + 8000a2c: bf08 it eq + 8000a2e: 4770 bxeq lr + 8000a30: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 + 8000a34: d502 bpl.n 8000a3c <__aeabi_l2f+0x14> + 8000a36: 4240 negs r0, r0 + 8000a38: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 8000a3c: ea5f 0c01 movs.w ip, r1 + 8000a40: bf02 ittt eq + 8000a42: 4684 moveq ip, r0 + 8000a44: 4601 moveq r1, r0 + 8000a46: 2000 moveq r0, #0 + 8000a48: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 8000a4c: bf08 it eq - 8000a4e: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 - 8000a52: 4770 bx lr - 8000a54: f04f 0000 mov.w r0, #0 - 8000a58: 4770 bx lr - 8000a5a: bf00 nop + 8000a4e: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 + 8000a52: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 + 8000a56: fabc f28c clz r2, ip + 8000a5a: 3a08 subs r2, #8 + 8000a5c: eba3 53c2 sub.w r3, r3, r2, lsl #23 + 8000a60: db10 blt.n 8000a84 <__aeabi_l2f+0x5c> + 8000a62: fa01 fc02 lsl.w ip, r1, r2 + 8000a66: 4463 add r3, ip + 8000a68: fa00 fc02 lsl.w ip, r0, r2 + 8000a6c: f1c2 0220 rsb r2, r2, #32 + 8000a70: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 + 8000a74: fa20 f202 lsr.w r2, r0, r2 + 8000a78: eb43 0002 adc.w r0, r3, r2 + 8000a7c: bf08 it eq + 8000a7e: f020 0001 biceq.w r0, r0, #1 + 8000a82: 4770 bx lr + 8000a84: f102 0220 add.w r2, r2, #32 + 8000a88: fa01 fc02 lsl.w ip, r1, r2 + 8000a8c: f1c2 0220 rsb r2, r2, #32 + 8000a90: ea50 004c orrs.w r0, r0, ip, lsl #1 + 8000a94: fa21 f202 lsr.w r2, r1, r2 + 8000a98: eb43 0002 adc.w r0, r3, r2 + 8000a9c: bf08 it eq + 8000a9e: ea20 70dc biceq.w r0, r0, ip, lsr #31 + 8000aa2: 4770 bx lr -08000a5c <__aeabi_d2f>: - 8000a5c: ea4f 0241 mov.w r2, r1, lsl #1 - 8000a60: f1b2 43e0 subs.w r3, r2, #1879048192 @ 0x70000000 - 8000a64: bf24 itt cs - 8000a66: f5b3 1c00 subscs.w ip, r3, #2097152 @ 0x200000 - 8000a6a: f1dc 5cfe rsbscs ip, ip, #532676608 @ 0x1fc00000 - 8000a6e: d90d bls.n 8000a8c <__aeabi_d2f+0x30> - 8000a70: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 - 8000a74: ea4f 02c0 mov.w r2, r0, lsl #3 - 8000a78: ea4c 7050 orr.w r0, ip, r0, lsr #29 - 8000a7c: f1b2 4f00 cmp.w r2, #2147483648 @ 0x80000000 - 8000a80: eb40 0083 adc.w r0, r0, r3, lsl #2 - 8000a84: bf08 it eq - 8000a86: f020 0001 biceq.w r0, r0, #1 - 8000a8a: 4770 bx lr - 8000a8c: f011 4f80 tst.w r1, #1073741824 @ 0x40000000 - 8000a90: d121 bne.n 8000ad6 <__aeabi_d2f+0x7a> - 8000a92: f113 7238 adds.w r2, r3, #48234496 @ 0x2e00000 - 8000a96: bfbc itt lt - 8000a98: f001 4000 andlt.w r0, r1, #2147483648 @ 0x80000000 - 8000a9c: 4770 bxlt lr - 8000a9e: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 - 8000aa2: ea4f 5252 mov.w r2, r2, lsr #21 - 8000aa6: f1c2 0218 rsb r2, r2, #24 - 8000aaa: f1c2 0c20 rsb ip, r2, #32 - 8000aae: fa10 f30c lsls.w r3, r0, ip - 8000ab2: fa20 f002 lsr.w r0, r0, r2 - 8000ab6: bf18 it ne - 8000ab8: f040 0001 orrne.w r0, r0, #1 - 8000abc: ea4f 23c1 mov.w r3, r1, lsl #11 - 8000ac0: ea4f 23d3 mov.w r3, r3, lsr #11 - 8000ac4: fa03 fc0c lsl.w ip, r3, ip - 8000ac8: ea40 000c orr.w r0, r0, ip - 8000acc: fa23 f302 lsr.w r3, r3, r2 - 8000ad0: ea4f 0343 mov.w r3, r3, lsl #1 - 8000ad4: e7cc b.n 8000a70 <__aeabi_d2f+0x14> - 8000ad6: ea7f 5362 mvns.w r3, r2, asr #21 - 8000ada: d107 bne.n 8000aec <__aeabi_d2f+0x90> - 8000adc: ea50 3301 orrs.w r3, r0, r1, lsl #12 - 8000ae0: bf1e ittt ne - 8000ae2: f04f 40fe movne.w r0, #2130706432 @ 0x7f000000 - 8000ae6: f440 0040 orrne.w r0, r0, #12582912 @ 0xc00000 - 8000aea: 4770 bxne lr - 8000aec: f001 4000 and.w r0, r1, #2147483648 @ 0x80000000 - 8000af0: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 - 8000af4: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 8000af8: 4770 bx lr - 8000afa: bf00 nop +08000aa4 <__aeabi_fmul>: + 8000aa4: f04f 0cff mov.w ip, #255 @ 0xff + 8000aa8: ea1c 52d0 ands.w r2, ip, r0, lsr #23 + 8000aac: bf1e ittt ne + 8000aae: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 + 8000ab2: ea92 0f0c teqne r2, ip + 8000ab6: ea93 0f0c teqne r3, ip + 8000aba: d06f beq.n 8000b9c <__aeabi_fmul+0xf8> + 8000abc: 441a add r2, r3 + 8000abe: ea80 0c01 eor.w ip, r0, r1 + 8000ac2: 0240 lsls r0, r0, #9 + 8000ac4: bf18 it ne + 8000ac6: ea5f 2141 movsne.w r1, r1, lsl #9 + 8000aca: d01e beq.n 8000b0a <__aeabi_fmul+0x66> + 8000acc: f04f 6300 mov.w r3, #134217728 @ 0x8000000 + 8000ad0: ea43 1050 orr.w r0, r3, r0, lsr #5 + 8000ad4: ea43 1151 orr.w r1, r3, r1, lsr #5 + 8000ad8: fba0 3101 umull r3, r1, r0, r1 + 8000adc: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 + 8000ae0: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 + 8000ae4: bf3e ittt cc + 8000ae6: 0049 lslcc r1, r1, #1 + 8000ae8: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 + 8000aec: 005b lslcc r3, r3, #1 + 8000aee: ea40 0001 orr.w r0, r0, r1 + 8000af2: f162 027f sbc.w r2, r2, #127 @ 0x7f + 8000af6: 2afd cmp r2, #253 @ 0xfd + 8000af8: d81d bhi.n 8000b36 <__aeabi_fmul+0x92> + 8000afa: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 + 8000afe: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 8000b02: bf08 it eq + 8000b04: f020 0001 biceq.w r0, r0, #1 + 8000b08: 4770 bx lr + 8000b0a: f090 0f00 teq r0, #0 + 8000b0e: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 + 8000b12: bf08 it eq + 8000b14: 0249 lsleq r1, r1, #9 + 8000b16: ea4c 2050 orr.w r0, ip, r0, lsr #9 + 8000b1a: ea40 2051 orr.w r0, r0, r1, lsr #9 + 8000b1e: 3a7f subs r2, #127 @ 0x7f + 8000b20: bfc2 ittt gt + 8000b22: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff + 8000b26: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 + 8000b2a: 4770 bxgt lr + 8000b2c: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000b30: f04f 0300 mov.w r3, #0 + 8000b34: 3a01 subs r2, #1 + 8000b36: dc5d bgt.n 8000bf4 <__aeabi_fmul+0x150> + 8000b38: f112 0f19 cmn.w r2, #25 + 8000b3c: bfdc itt le + 8000b3e: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 + 8000b42: 4770 bxle lr + 8000b44: f1c2 0200 rsb r2, r2, #0 + 8000b48: 0041 lsls r1, r0, #1 + 8000b4a: fa21 f102 lsr.w r1, r1, r2 + 8000b4e: f1c2 0220 rsb r2, r2, #32 + 8000b52: fa00 fc02 lsl.w ip, r0, r2 + 8000b56: ea5f 0031 movs.w r0, r1, rrx + 8000b5a: f140 0000 adc.w r0, r0, #0 + 8000b5e: ea53 034c orrs.w r3, r3, ip, lsl #1 + 8000b62: bf08 it eq + 8000b64: ea20 70dc biceq.w r0, r0, ip, lsr #31 + 8000b68: 4770 bx lr + 8000b6a: f092 0f00 teq r2, #0 + 8000b6e: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 + 8000b72: bf02 ittt eq + 8000b74: 0040 lsleq r0, r0, #1 + 8000b76: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 + 8000b7a: 3a01 subeq r2, #1 + 8000b7c: d0f9 beq.n 8000b72 <__aeabi_fmul+0xce> + 8000b7e: ea40 000c orr.w r0, r0, ip + 8000b82: f093 0f00 teq r3, #0 + 8000b86: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 + 8000b8a: bf02 ittt eq + 8000b8c: 0049 lsleq r1, r1, #1 + 8000b8e: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 + 8000b92: 3b01 subeq r3, #1 + 8000b94: d0f9 beq.n 8000b8a <__aeabi_fmul+0xe6> + 8000b96: ea41 010c orr.w r1, r1, ip + 8000b9a: e78f b.n 8000abc <__aeabi_fmul+0x18> + 8000b9c: ea0c 53d1 and.w r3, ip, r1, lsr #23 + 8000ba0: ea92 0f0c teq r2, ip + 8000ba4: bf18 it ne + 8000ba6: ea93 0f0c teqne r3, ip + 8000baa: d00a beq.n 8000bc2 <__aeabi_fmul+0x11e> + 8000bac: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 + 8000bb0: bf18 it ne + 8000bb2: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 + 8000bb6: d1d8 bne.n 8000b6a <__aeabi_fmul+0xc6> + 8000bb8: ea80 0001 eor.w r0, r0, r1 + 8000bbc: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 + 8000bc0: 4770 bx lr + 8000bc2: f090 0f00 teq r0, #0 + 8000bc6: bf17 itett ne + 8000bc8: f090 4f00 teqne r0, #2147483648 @ 0x80000000 + 8000bcc: 4608 moveq r0, r1 + 8000bce: f091 0f00 teqne r1, #0 + 8000bd2: f091 4f00 teqne r1, #2147483648 @ 0x80000000 + 8000bd6: d014 beq.n 8000c02 <__aeabi_fmul+0x15e> + 8000bd8: ea92 0f0c teq r2, ip + 8000bdc: d101 bne.n 8000be2 <__aeabi_fmul+0x13e> + 8000bde: 0242 lsls r2, r0, #9 + 8000be0: d10f bne.n 8000c02 <__aeabi_fmul+0x15e> + 8000be2: ea93 0f0c teq r3, ip + 8000be6: d103 bne.n 8000bf0 <__aeabi_fmul+0x14c> + 8000be8: 024b lsls r3, r1, #9 + 8000bea: bf18 it ne + 8000bec: 4608 movne r0, r1 + 8000bee: d108 bne.n 8000c02 <__aeabi_fmul+0x15e> + 8000bf0: ea80 0001 eor.w r0, r0, r1 + 8000bf4: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 + 8000bf8: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 + 8000bfc: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000c00: 4770 bx lr + 8000c02: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 + 8000c06: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 + 8000c0a: 4770 bx lr -08000afc <__aeabi_frsub>: - 8000afc: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 - 8000b00: e002 b.n 8000b08 <__addsf3> - 8000b02: bf00 nop +08000c0c <__aeabi_fdiv>: + 8000c0c: f04f 0cff mov.w ip, #255 @ 0xff + 8000c10: ea1c 52d0 ands.w r2, ip, r0, lsr #23 + 8000c14: bf1e ittt ne + 8000c16: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 + 8000c1a: ea92 0f0c teqne r2, ip + 8000c1e: ea93 0f0c teqne r3, ip + 8000c22: d069 beq.n 8000cf8 <__aeabi_fdiv+0xec> + 8000c24: eba2 0203 sub.w r2, r2, r3 + 8000c28: ea80 0c01 eor.w ip, r0, r1 + 8000c2c: 0249 lsls r1, r1, #9 + 8000c2e: ea4f 2040 mov.w r0, r0, lsl #9 + 8000c32: d037 beq.n 8000ca4 <__aeabi_fdiv+0x98> + 8000c34: f04f 5380 mov.w r3, #268435456 @ 0x10000000 + 8000c38: ea43 1111 orr.w r1, r3, r1, lsr #4 + 8000c3c: ea43 1310 orr.w r3, r3, r0, lsr #4 + 8000c40: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 + 8000c44: 428b cmp r3, r1 + 8000c46: bf38 it cc + 8000c48: 005b lslcc r3, r3, #1 + 8000c4a: f142 027d adc.w r2, r2, #125 @ 0x7d + 8000c4e: f44f 0c00 mov.w ip, #8388608 @ 0x800000 + 8000c52: 428b cmp r3, r1 + 8000c54: bf24 itt cs + 8000c56: 1a5b subcs r3, r3, r1 + 8000c58: ea40 000c orrcs.w r0, r0, ip + 8000c5c: ebb3 0f51 cmp.w r3, r1, lsr #1 + 8000c60: bf24 itt cs + 8000c62: eba3 0351 subcs.w r3, r3, r1, lsr #1 + 8000c66: ea40 005c orrcs.w r0, r0, ip, lsr #1 + 8000c6a: ebb3 0f91 cmp.w r3, r1, lsr #2 + 8000c6e: bf24 itt cs + 8000c70: eba3 0391 subcs.w r3, r3, r1, lsr #2 + 8000c74: ea40 009c orrcs.w r0, r0, ip, lsr #2 + 8000c78: ebb3 0fd1 cmp.w r3, r1, lsr #3 + 8000c7c: bf24 itt cs + 8000c7e: eba3 03d1 subcs.w r3, r3, r1, lsr #3 + 8000c82: ea40 00dc orrcs.w r0, r0, ip, lsr #3 + 8000c86: 011b lsls r3, r3, #4 + 8000c88: bf18 it ne + 8000c8a: ea5f 1c1c movsne.w ip, ip, lsr #4 + 8000c8e: d1e0 bne.n 8000c52 <__aeabi_fdiv+0x46> + 8000c90: 2afd cmp r2, #253 @ 0xfd + 8000c92: f63f af50 bhi.w 8000b36 <__aeabi_fmul+0x92> + 8000c96: 428b cmp r3, r1 + 8000c98: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 8000c9c: bf08 it eq + 8000c9e: f020 0001 biceq.w r0, r0, #1 + 8000ca2: 4770 bx lr + 8000ca4: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 + 8000ca8: ea4c 2050 orr.w r0, ip, r0, lsr #9 + 8000cac: 327f adds r2, #127 @ 0x7f + 8000cae: bfc2 ittt gt + 8000cb0: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff + 8000cb4: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 + 8000cb8: 4770 bxgt lr + 8000cba: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000cbe: f04f 0300 mov.w r3, #0 + 8000cc2: 3a01 subs r2, #1 + 8000cc4: e737 b.n 8000b36 <__aeabi_fmul+0x92> + 8000cc6: f092 0f00 teq r2, #0 + 8000cca: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 + 8000cce: bf02 ittt eq + 8000cd0: 0040 lsleq r0, r0, #1 + 8000cd2: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 + 8000cd6: 3a01 subeq r2, #1 + 8000cd8: d0f9 beq.n 8000cce <__aeabi_fdiv+0xc2> + 8000cda: ea40 000c orr.w r0, r0, ip + 8000cde: f093 0f00 teq r3, #0 + 8000ce2: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 + 8000ce6: bf02 ittt eq + 8000ce8: 0049 lsleq r1, r1, #1 + 8000cea: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 + 8000cee: 3b01 subeq r3, #1 + 8000cf0: d0f9 beq.n 8000ce6 <__aeabi_fdiv+0xda> + 8000cf2: ea41 010c orr.w r1, r1, ip + 8000cf6: e795 b.n 8000c24 <__aeabi_fdiv+0x18> + 8000cf8: ea0c 53d1 and.w r3, ip, r1, lsr #23 + 8000cfc: ea92 0f0c teq r2, ip + 8000d00: d108 bne.n 8000d14 <__aeabi_fdiv+0x108> + 8000d02: 0242 lsls r2, r0, #9 + 8000d04: f47f af7d bne.w 8000c02 <__aeabi_fmul+0x15e> + 8000d08: ea93 0f0c teq r3, ip + 8000d0c: f47f af70 bne.w 8000bf0 <__aeabi_fmul+0x14c> + 8000d10: 4608 mov r0, r1 + 8000d12: e776 b.n 8000c02 <__aeabi_fmul+0x15e> + 8000d14: ea93 0f0c teq r3, ip + 8000d18: d104 bne.n 8000d24 <__aeabi_fdiv+0x118> + 8000d1a: 024b lsls r3, r1, #9 + 8000d1c: f43f af4c beq.w 8000bb8 <__aeabi_fmul+0x114> + 8000d20: 4608 mov r0, r1 + 8000d22: e76e b.n 8000c02 <__aeabi_fmul+0x15e> + 8000d24: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 + 8000d28: bf18 it ne + 8000d2a: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 + 8000d2e: d1ca bne.n 8000cc6 <__aeabi_fdiv+0xba> + 8000d30: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 + 8000d34: f47f af5c bne.w 8000bf0 <__aeabi_fmul+0x14c> + 8000d38: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 + 8000d3c: f47f af3c bne.w 8000bb8 <__aeabi_fmul+0x114> + 8000d40: e75f b.n 8000c02 <__aeabi_fmul+0x15e> + 8000d42: bf00 nop -08000b04 <__aeabi_fsub>: - 8000b04: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 +08000d44 <__gesf2>: + 8000d44: f04f 3cff mov.w ip, #4294967295 + 8000d48: e006 b.n 8000d58 <__cmpsf2+0x4> + 8000d4a: bf00 nop -08000b08 <__addsf3>: - 8000b08: 0042 lsls r2, r0, #1 - 8000b0a: bf1f itttt ne - 8000b0c: ea5f 0341 movsne.w r3, r1, lsl #1 - 8000b10: ea92 0f03 teqne r2, r3 - 8000b14: ea7f 6c22 mvnsne.w ip, r2, asr #24 - 8000b18: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 8000b1c: d06a beq.n 8000bf4 <__addsf3+0xec> - 8000b1e: ea4f 6212 mov.w r2, r2, lsr #24 - 8000b22: ebd2 6313 rsbs r3, r2, r3, lsr #24 - 8000b26: bfc1 itttt gt - 8000b28: 18d2 addgt r2, r2, r3 - 8000b2a: 4041 eorgt r1, r0 - 8000b2c: 4048 eorgt r0, r1 - 8000b2e: 4041 eorgt r1, r0 - 8000b30: bfb8 it lt - 8000b32: 425b neglt r3, r3 - 8000b34: 2b19 cmp r3, #25 - 8000b36: bf88 it hi - 8000b38: 4770 bxhi lr - 8000b3a: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 - 8000b3e: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 8000b42: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 - 8000b46: bf18 it ne - 8000b48: 4240 negne r0, r0 - 8000b4a: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 - 8000b4e: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 - 8000b52: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 - 8000b56: bf18 it ne - 8000b58: 4249 negne r1, r1 - 8000b5a: ea92 0f03 teq r2, r3 - 8000b5e: d03f beq.n 8000be0 <__addsf3+0xd8> - 8000b60: f1a2 0201 sub.w r2, r2, #1 - 8000b64: fa41 fc03 asr.w ip, r1, r3 - 8000b68: eb10 000c adds.w r0, r0, ip - 8000b6c: f1c3 0320 rsb r3, r3, #32 - 8000b70: fa01 f103 lsl.w r1, r1, r3 - 8000b74: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 - 8000b78: d502 bpl.n 8000b80 <__addsf3+0x78> - 8000b7a: 4249 negs r1, r1 - 8000b7c: eb60 0040 sbc.w r0, r0, r0, lsl #1 - 8000b80: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 - 8000b84: d313 bcc.n 8000bae <__addsf3+0xa6> - 8000b86: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 - 8000b8a: d306 bcc.n 8000b9a <__addsf3+0x92> - 8000b8c: 0840 lsrs r0, r0, #1 - 8000b8e: ea4f 0131 mov.w r1, r1, rrx - 8000b92: f102 0201 add.w r2, r2, #1 - 8000b96: 2afe cmp r2, #254 @ 0xfe - 8000b98: d251 bcs.n 8000c3e <__addsf3+0x136> - 8000b9a: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 - 8000b9e: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 8000ba2: bf08 it eq - 8000ba4: f020 0001 biceq.w r0, r0, #1 - 8000ba8: ea40 0003 orr.w r0, r0, r3 - 8000bac: 4770 bx lr - 8000bae: 0049 lsls r1, r1, #1 - 8000bb0: eb40 0000 adc.w r0, r0, r0 - 8000bb4: 3a01 subs r2, #1 - 8000bb6: bf28 it cs - 8000bb8: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 - 8000bbc: d2ed bcs.n 8000b9a <__addsf3+0x92> - 8000bbe: fab0 fc80 clz ip, r0 - 8000bc2: f1ac 0c08 sub.w ip, ip, #8 - 8000bc6: ebb2 020c subs.w r2, r2, ip - 8000bca: fa00 f00c lsl.w r0, r0, ip - 8000bce: bfaa itet ge - 8000bd0: eb00 50c2 addge.w r0, r0, r2, lsl #23 - 8000bd4: 4252 neglt r2, r2 - 8000bd6: 4318 orrge r0, r3 - 8000bd8: bfbc itt lt - 8000bda: 40d0 lsrlt r0, r2 - 8000bdc: 4318 orrlt r0, r3 - 8000bde: 4770 bx lr - 8000be0: f092 0f00 teq r2, #0 - 8000be4: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 - 8000be8: bf06 itte eq - 8000bea: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 - 8000bee: 3201 addeq r2, #1 - 8000bf0: 3b01 subne r3, #1 - 8000bf2: e7b5 b.n 8000b60 <__addsf3+0x58> - 8000bf4: ea4f 0341 mov.w r3, r1, lsl #1 - 8000bf8: ea7f 6c22 mvns.w ip, r2, asr #24 - 8000bfc: bf18 it ne - 8000bfe: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 8000c02: d021 beq.n 8000c48 <__addsf3+0x140> - 8000c04: ea92 0f03 teq r2, r3 - 8000c08: d004 beq.n 8000c14 <__addsf3+0x10c> - 8000c0a: f092 0f00 teq r2, #0 - 8000c0e: bf08 it eq - 8000c10: 4608 moveq r0, r1 - 8000c12: 4770 bx lr - 8000c14: ea90 0f01 teq r0, r1 - 8000c18: bf1c itt ne - 8000c1a: 2000 movne r0, #0 - 8000c1c: 4770 bxne lr - 8000c1e: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 - 8000c22: d104 bne.n 8000c2e <__addsf3+0x126> - 8000c24: 0040 lsls r0, r0, #1 - 8000c26: bf28 it cs - 8000c28: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 - 8000c2c: 4770 bx lr - 8000c2e: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 - 8000c32: bf3c itt cc - 8000c34: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 - 8000c38: 4770 bxcc lr - 8000c3a: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 - 8000c3e: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 - 8000c42: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 8000c46: 4770 bx lr - 8000c48: ea7f 6222 mvns.w r2, r2, asr #24 - 8000c4c: bf16 itet ne - 8000c4e: 4608 movne r0, r1 - 8000c50: ea7f 6323 mvnseq.w r3, r3, asr #24 - 8000c54: 4601 movne r1, r0 - 8000c56: 0242 lsls r2, r0, #9 - 8000c58: bf06 itte eq - 8000c5a: ea5f 2341 movseq.w r3, r1, lsl #9 - 8000c5e: ea90 0f01 teqeq r0, r1 - 8000c62: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 - 8000c66: 4770 bx lr +08000d4c <__lesf2>: + 8000d4c: f04f 0c01 mov.w ip, #1 + 8000d50: e002 b.n 8000d58 <__cmpsf2+0x4> + 8000d52: bf00 nop -08000c68 <__aeabi_ui2f>: - 8000c68: f04f 0300 mov.w r3, #0 - 8000c6c: e004 b.n 8000c78 <__aeabi_i2f+0x8> - 8000c6e: bf00 nop +08000d54 <__cmpsf2>: + 8000d54: f04f 0c01 mov.w ip, #1 + 8000d58: f84d cd04 str.w ip, [sp, #-4]! + 8000d5c: ea4f 0240 mov.w r2, r0, lsl #1 + 8000d60: ea4f 0341 mov.w r3, r1, lsl #1 + 8000d64: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000d68: bf18 it ne + 8000d6a: ea7f 6c23 mvnsne.w ip, r3, asr #24 + 8000d6e: d011 beq.n 8000d94 <__cmpsf2+0x40> + 8000d70: b001 add sp, #4 + 8000d72: ea52 0c53 orrs.w ip, r2, r3, lsr #1 + 8000d76: bf18 it ne + 8000d78: ea90 0f01 teqne r0, r1 + 8000d7c: bf58 it pl + 8000d7e: ebb2 0003 subspl.w r0, r2, r3 + 8000d82: bf88 it hi + 8000d84: 17c8 asrhi r0, r1, #31 + 8000d86: bf38 it cc + 8000d88: ea6f 70e1 mvncc.w r0, r1, asr #31 + 8000d8c: bf18 it ne + 8000d8e: f040 0001 orrne.w r0, r0, #1 + 8000d92: 4770 bx lr + 8000d94: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000d98: d102 bne.n 8000da0 <__cmpsf2+0x4c> + 8000d9a: ea5f 2c40 movs.w ip, r0, lsl #9 + 8000d9e: d105 bne.n 8000dac <__cmpsf2+0x58> + 8000da0: ea7f 6c23 mvns.w ip, r3, asr #24 + 8000da4: d1e4 bne.n 8000d70 <__cmpsf2+0x1c> + 8000da6: ea5f 2c41 movs.w ip, r1, lsl #9 + 8000daa: d0e1 beq.n 8000d70 <__cmpsf2+0x1c> + 8000dac: f85d 0b04 ldr.w r0, [sp], #4 + 8000db0: 4770 bx lr + 8000db2: bf00 nop -08000c70 <__aeabi_i2f>: - 8000c70: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 - 8000c74: bf48 it mi - 8000c76: 4240 negmi r0, r0 - 8000c78: ea5f 0c00 movs.w ip, r0 - 8000c7c: bf08 it eq - 8000c7e: 4770 bxeq lr - 8000c80: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 - 8000c84: 4601 mov r1, r0 - 8000c86: f04f 0000 mov.w r0, #0 - 8000c8a: e01c b.n 8000cc6 <__aeabi_l2f+0x2a> +08000db4 <__aeabi_cfrcmple>: + 8000db4: 4684 mov ip, r0 + 8000db6: 4608 mov r0, r1 + 8000db8: 4661 mov r1, ip + 8000dba: e7ff b.n 8000dbc <__aeabi_cfcmpeq> -08000c8c <__aeabi_ul2f>: - 8000c8c: ea50 0201 orrs.w r2, r0, r1 - 8000c90: bf08 it eq - 8000c92: 4770 bxeq lr - 8000c94: f04f 0300 mov.w r3, #0 - 8000c98: e00a b.n 8000cb0 <__aeabi_l2f+0x14> - 8000c9a: bf00 nop +08000dbc <__aeabi_cfcmpeq>: + 8000dbc: b50f push {r0, r1, r2, r3, lr} + 8000dbe: f7ff ffc9 bl 8000d54 <__cmpsf2> + 8000dc2: 2800 cmp r0, #0 + 8000dc4: bf48 it mi + 8000dc6: f110 0f00 cmnmi.w r0, #0 + 8000dca: bd0f pop {r0, r1, r2, r3, pc} -08000c9c <__aeabi_l2f>: - 8000c9c: ea50 0201 orrs.w r2, r0, r1 - 8000ca0: bf08 it eq - 8000ca2: 4770 bxeq lr - 8000ca4: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 - 8000ca8: d502 bpl.n 8000cb0 <__aeabi_l2f+0x14> - 8000caa: 4240 negs r0, r0 - 8000cac: eb61 0141 sbc.w r1, r1, r1, lsl #1 - 8000cb0: ea5f 0c01 movs.w ip, r1 - 8000cb4: bf02 ittt eq - 8000cb6: 4684 moveq ip, r0 - 8000cb8: 4601 moveq r1, r0 - 8000cba: 2000 moveq r0, #0 - 8000cbc: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 - 8000cc0: bf08 it eq - 8000cc2: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 - 8000cc6: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 - 8000cca: fabc f28c clz r2, ip - 8000cce: 3a08 subs r2, #8 - 8000cd0: eba3 53c2 sub.w r3, r3, r2, lsl #23 - 8000cd4: db10 blt.n 8000cf8 <__aeabi_l2f+0x5c> - 8000cd6: fa01 fc02 lsl.w ip, r1, r2 - 8000cda: 4463 add r3, ip - 8000cdc: fa00 fc02 lsl.w ip, r0, r2 - 8000ce0: f1c2 0220 rsb r2, r2, #32 - 8000ce4: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 - 8000ce8: fa20 f202 lsr.w r2, r0, r2 - 8000cec: eb43 0002 adc.w r0, r3, r2 - 8000cf0: bf08 it eq - 8000cf2: f020 0001 biceq.w r0, r0, #1 - 8000cf6: 4770 bx lr - 8000cf8: f102 0220 add.w r2, r2, #32 - 8000cfc: fa01 fc02 lsl.w ip, r1, r2 - 8000d00: f1c2 0220 rsb r2, r2, #32 - 8000d04: ea50 004c orrs.w r0, r0, ip, lsl #1 - 8000d08: fa21 f202 lsr.w r2, r1, r2 - 8000d0c: eb43 0002 adc.w r0, r3, r2 - 8000d10: bf08 it eq - 8000d12: ea20 70dc biceq.w r0, r0, ip, lsr #31 - 8000d16: 4770 bx lr +08000dcc <__aeabi_fcmpeq>: + 8000dcc: f84d ed08 str.w lr, [sp, #-8]! + 8000dd0: f7ff fff4 bl 8000dbc <__aeabi_cfcmpeq> + 8000dd4: bf0c ite eq + 8000dd6: 2001 moveq r0, #1 + 8000dd8: 2000 movne r0, #0 + 8000dda: f85d fb08 ldr.w pc, [sp], #8 + 8000dde: bf00 nop -08000d18 <__aeabi_fmul>: - 8000d18: f04f 0cff mov.w ip, #255 @ 0xff - 8000d1c: ea1c 52d0 ands.w r2, ip, r0, lsr #23 - 8000d20: bf1e ittt ne - 8000d22: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 - 8000d26: ea92 0f0c teqne r2, ip - 8000d2a: ea93 0f0c teqne r3, ip - 8000d2e: d06f beq.n 8000e10 <__aeabi_fmul+0xf8> - 8000d30: 441a add r2, r3 - 8000d32: ea80 0c01 eor.w ip, r0, r1 - 8000d36: 0240 lsls r0, r0, #9 - 8000d38: bf18 it ne - 8000d3a: ea5f 2141 movsne.w r1, r1, lsl #9 - 8000d3e: d01e beq.n 8000d7e <__aeabi_fmul+0x66> - 8000d40: f04f 6300 mov.w r3, #134217728 @ 0x8000000 - 8000d44: ea43 1050 orr.w r0, r3, r0, lsr #5 - 8000d48: ea43 1151 orr.w r1, r3, r1, lsr #5 - 8000d4c: fba0 3101 umull r3, r1, r0, r1 - 8000d50: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 - 8000d54: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 - 8000d58: bf3e ittt cc - 8000d5a: 0049 lslcc r1, r1, #1 - 8000d5c: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 - 8000d60: 005b lslcc r3, r3, #1 - 8000d62: ea40 0001 orr.w r0, r0, r1 - 8000d66: f162 027f sbc.w r2, r2, #127 @ 0x7f - 8000d6a: 2afd cmp r2, #253 @ 0xfd - 8000d6c: d81d bhi.n 8000daa <__aeabi_fmul+0x92> - 8000d6e: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 - 8000d72: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 8000d76: bf08 it eq - 8000d78: f020 0001 biceq.w r0, r0, #1 - 8000d7c: 4770 bx lr - 8000d7e: f090 0f00 teq r0, #0 - 8000d82: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 - 8000d86: bf08 it eq - 8000d88: 0249 lsleq r1, r1, #9 - 8000d8a: ea4c 2050 orr.w r0, ip, r0, lsr #9 - 8000d8e: ea40 2051 orr.w r0, r0, r1, lsr #9 - 8000d92: 3a7f subs r2, #127 @ 0x7f - 8000d94: bfc2 ittt gt - 8000d96: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff - 8000d9a: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 - 8000d9e: 4770 bxgt lr - 8000da0: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 8000da4: f04f 0300 mov.w r3, #0 - 8000da8: 3a01 subs r2, #1 - 8000daa: dc5d bgt.n 8000e68 <__aeabi_fmul+0x150> - 8000dac: f112 0f19 cmn.w r2, #25 - 8000db0: bfdc itt le - 8000db2: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 - 8000db6: 4770 bxle lr - 8000db8: f1c2 0200 rsb r2, r2, #0 - 8000dbc: 0041 lsls r1, r0, #1 - 8000dbe: fa21 f102 lsr.w r1, r1, r2 - 8000dc2: f1c2 0220 rsb r2, r2, #32 - 8000dc6: fa00 fc02 lsl.w ip, r0, r2 - 8000dca: ea5f 0031 movs.w r0, r1, rrx - 8000dce: f140 0000 adc.w r0, r0, #0 - 8000dd2: ea53 034c orrs.w r3, r3, ip, lsl #1 - 8000dd6: bf08 it eq - 8000dd8: ea20 70dc biceq.w r0, r0, ip, lsr #31 - 8000ddc: 4770 bx lr - 8000dde: f092 0f00 teq r2, #0 - 8000de2: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 - 8000de6: bf02 ittt eq - 8000de8: 0040 lsleq r0, r0, #1 - 8000dea: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 - 8000dee: 3a01 subeq r2, #1 - 8000df0: d0f9 beq.n 8000de6 <__aeabi_fmul+0xce> - 8000df2: ea40 000c orr.w r0, r0, ip - 8000df6: f093 0f00 teq r3, #0 - 8000dfa: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 - 8000dfe: bf02 ittt eq - 8000e00: 0049 lsleq r1, r1, #1 - 8000e02: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 - 8000e06: 3b01 subeq r3, #1 - 8000e08: d0f9 beq.n 8000dfe <__aeabi_fmul+0xe6> - 8000e0a: ea41 010c orr.w r1, r1, ip - 8000e0e: e78f b.n 8000d30 <__aeabi_fmul+0x18> - 8000e10: ea0c 53d1 and.w r3, ip, r1, lsr #23 - 8000e14: ea92 0f0c teq r2, ip - 8000e18: bf18 it ne - 8000e1a: ea93 0f0c teqne r3, ip - 8000e1e: d00a beq.n 8000e36 <__aeabi_fmul+0x11e> - 8000e20: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 - 8000e24: bf18 it ne - 8000e26: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 - 8000e2a: d1d8 bne.n 8000dde <__aeabi_fmul+0xc6> - 8000e2c: ea80 0001 eor.w r0, r0, r1 - 8000e30: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 - 8000e34: 4770 bx lr - 8000e36: f090 0f00 teq r0, #0 - 8000e3a: bf17 itett ne - 8000e3c: f090 4f00 teqne r0, #2147483648 @ 0x80000000 - 8000e40: 4608 moveq r0, r1 - 8000e42: f091 0f00 teqne r1, #0 - 8000e46: f091 4f00 teqne r1, #2147483648 @ 0x80000000 - 8000e4a: d014 beq.n 8000e76 <__aeabi_fmul+0x15e> - 8000e4c: ea92 0f0c teq r2, ip - 8000e50: d101 bne.n 8000e56 <__aeabi_fmul+0x13e> - 8000e52: 0242 lsls r2, r0, #9 - 8000e54: d10f bne.n 8000e76 <__aeabi_fmul+0x15e> - 8000e56: ea93 0f0c teq r3, ip - 8000e5a: d103 bne.n 8000e64 <__aeabi_fmul+0x14c> - 8000e5c: 024b lsls r3, r1, #9 - 8000e5e: bf18 it ne - 8000e60: 4608 movne r0, r1 - 8000e62: d108 bne.n 8000e76 <__aeabi_fmul+0x15e> - 8000e64: ea80 0001 eor.w r0, r0, r1 - 8000e68: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 - 8000e6c: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 - 8000e70: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 8000e74: 4770 bx lr - 8000e76: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 - 8000e7a: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 - 8000e7e: 4770 bx lr +08000de0 <__aeabi_fcmplt>: + 8000de0: f84d ed08 str.w lr, [sp, #-8]! + 8000de4: f7ff ffea bl 8000dbc <__aeabi_cfcmpeq> + 8000de8: bf34 ite cc + 8000dea: 2001 movcc r0, #1 + 8000dec: 2000 movcs r0, #0 + 8000dee: f85d fb08 ldr.w pc, [sp], #8 + 8000df2: bf00 nop -08000e80 <__aeabi_fdiv>: - 8000e80: f04f 0cff mov.w ip, #255 @ 0xff - 8000e84: ea1c 52d0 ands.w r2, ip, r0, lsr #23 - 8000e88: bf1e ittt ne - 8000e8a: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 - 8000e8e: ea92 0f0c teqne r2, ip - 8000e92: ea93 0f0c teqne r3, ip - 8000e96: d069 beq.n 8000f6c <__aeabi_fdiv+0xec> - 8000e98: eba2 0203 sub.w r2, r2, r3 - 8000e9c: ea80 0c01 eor.w ip, r0, r1 - 8000ea0: 0249 lsls r1, r1, #9 - 8000ea2: ea4f 2040 mov.w r0, r0, lsl #9 - 8000ea6: d037 beq.n 8000f18 <__aeabi_fdiv+0x98> - 8000ea8: f04f 5380 mov.w r3, #268435456 @ 0x10000000 - 8000eac: ea43 1111 orr.w r1, r3, r1, lsr #4 - 8000eb0: ea43 1310 orr.w r3, r3, r0, lsr #4 - 8000eb4: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 - 8000eb8: 428b cmp r3, r1 - 8000eba: bf38 it cc - 8000ebc: 005b lslcc r3, r3, #1 - 8000ebe: f142 027d adc.w r2, r2, #125 @ 0x7d - 8000ec2: f44f 0c00 mov.w ip, #8388608 @ 0x800000 - 8000ec6: 428b cmp r3, r1 - 8000ec8: bf24 itt cs - 8000eca: 1a5b subcs r3, r3, r1 - 8000ecc: ea40 000c orrcs.w r0, r0, ip - 8000ed0: ebb3 0f51 cmp.w r3, r1, lsr #1 - 8000ed4: bf24 itt cs - 8000ed6: eba3 0351 subcs.w r3, r3, r1, lsr #1 - 8000eda: ea40 005c orrcs.w r0, r0, ip, lsr #1 - 8000ede: ebb3 0f91 cmp.w r3, r1, lsr #2 - 8000ee2: bf24 itt cs - 8000ee4: eba3 0391 subcs.w r3, r3, r1, lsr #2 - 8000ee8: ea40 009c orrcs.w r0, r0, ip, lsr #2 - 8000eec: ebb3 0fd1 cmp.w r3, r1, lsr #3 - 8000ef0: bf24 itt cs - 8000ef2: eba3 03d1 subcs.w r3, r3, r1, lsr #3 - 8000ef6: ea40 00dc orrcs.w r0, r0, ip, lsr #3 - 8000efa: 011b lsls r3, r3, #4 - 8000efc: bf18 it ne - 8000efe: ea5f 1c1c movsne.w ip, ip, lsr #4 - 8000f02: d1e0 bne.n 8000ec6 <__aeabi_fdiv+0x46> - 8000f04: 2afd cmp r2, #253 @ 0xfd - 8000f06: f63f af50 bhi.w 8000daa <__aeabi_fmul+0x92> - 8000f0a: 428b cmp r3, r1 - 8000f0c: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 8000f10: bf08 it eq - 8000f12: f020 0001 biceq.w r0, r0, #1 - 8000f16: 4770 bx lr - 8000f18: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 - 8000f1c: ea4c 2050 orr.w r0, ip, r0, lsr #9 - 8000f20: 327f adds r2, #127 @ 0x7f - 8000f22: bfc2 ittt gt - 8000f24: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff - 8000f28: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 - 8000f2c: 4770 bxgt lr - 8000f2e: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 8000f32: f04f 0300 mov.w r3, #0 - 8000f36: 3a01 subs r2, #1 - 8000f38: e737 b.n 8000daa <__aeabi_fmul+0x92> - 8000f3a: f092 0f00 teq r2, #0 - 8000f3e: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 - 8000f42: bf02 ittt eq - 8000f44: 0040 lsleq r0, r0, #1 - 8000f46: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 - 8000f4a: 3a01 subeq r2, #1 - 8000f4c: d0f9 beq.n 8000f42 <__aeabi_fdiv+0xc2> - 8000f4e: ea40 000c orr.w r0, r0, ip - 8000f52: f093 0f00 teq r3, #0 - 8000f56: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 - 8000f5a: bf02 ittt eq - 8000f5c: 0049 lsleq r1, r1, #1 - 8000f5e: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 - 8000f62: 3b01 subeq r3, #1 - 8000f64: d0f9 beq.n 8000f5a <__aeabi_fdiv+0xda> - 8000f66: ea41 010c orr.w r1, r1, ip - 8000f6a: e795 b.n 8000e98 <__aeabi_fdiv+0x18> - 8000f6c: ea0c 53d1 and.w r3, ip, r1, lsr #23 - 8000f70: ea92 0f0c teq r2, ip - 8000f74: d108 bne.n 8000f88 <__aeabi_fdiv+0x108> - 8000f76: 0242 lsls r2, r0, #9 - 8000f78: f47f af7d bne.w 8000e76 <__aeabi_fmul+0x15e> - 8000f7c: ea93 0f0c teq r3, ip - 8000f80: f47f af70 bne.w 8000e64 <__aeabi_fmul+0x14c> - 8000f84: 4608 mov r0, r1 - 8000f86: e776 b.n 8000e76 <__aeabi_fmul+0x15e> - 8000f88: ea93 0f0c teq r3, ip - 8000f8c: d104 bne.n 8000f98 <__aeabi_fdiv+0x118> - 8000f8e: 024b lsls r3, r1, #9 - 8000f90: f43f af4c beq.w 8000e2c <__aeabi_fmul+0x114> - 8000f94: 4608 mov r0, r1 - 8000f96: e76e b.n 8000e76 <__aeabi_fmul+0x15e> - 8000f98: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 - 8000f9c: bf18 it ne - 8000f9e: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 - 8000fa2: d1ca bne.n 8000f3a <__aeabi_fdiv+0xba> - 8000fa4: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 - 8000fa8: f47f af5c bne.w 8000e64 <__aeabi_fmul+0x14c> - 8000fac: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 - 8000fb0: f47f af3c bne.w 8000e2c <__aeabi_fmul+0x114> - 8000fb4: e75f b.n 8000e76 <__aeabi_fmul+0x15e> - 8000fb6: bf00 nop +08000df4 <__aeabi_fcmple>: + 8000df4: f84d ed08 str.w lr, [sp, #-8]! + 8000df8: f7ff ffe0 bl 8000dbc <__aeabi_cfcmpeq> + 8000dfc: bf94 ite ls + 8000dfe: 2001 movls r0, #1 + 8000e00: 2000 movhi r0, #0 + 8000e02: f85d fb08 ldr.w pc, [sp], #8 + 8000e06: bf00 nop -08000fb8 <__gesf2>: - 8000fb8: f04f 3cff mov.w ip, #4294967295 - 8000fbc: e006 b.n 8000fcc <__cmpsf2+0x4> - 8000fbe: bf00 nop +08000e08 <__aeabi_fcmpge>: + 8000e08: f84d ed08 str.w lr, [sp, #-8]! + 8000e0c: f7ff ffd2 bl 8000db4 <__aeabi_cfrcmple> + 8000e10: bf94 ite ls + 8000e12: 2001 movls r0, #1 + 8000e14: 2000 movhi r0, #0 + 8000e16: f85d fb08 ldr.w pc, [sp], #8 + 8000e1a: bf00 nop -08000fc0 <__lesf2>: - 8000fc0: f04f 0c01 mov.w ip, #1 - 8000fc4: e002 b.n 8000fcc <__cmpsf2+0x4> - 8000fc6: bf00 nop +08000e1c <__aeabi_fcmpgt>: + 8000e1c: f84d ed08 str.w lr, [sp, #-8]! + 8000e20: f7ff ffc8 bl 8000db4 <__aeabi_cfrcmple> + 8000e24: bf34 ite cc + 8000e26: 2001 movcc r0, #1 + 8000e28: 2000 movcs r0, #0 + 8000e2a: f85d fb08 ldr.w pc, [sp], #8 + 8000e2e: bf00 nop -08000fc8 <__cmpsf2>: - 8000fc8: f04f 0c01 mov.w ip, #1 - 8000fcc: f84d cd04 str.w ip, [sp, #-4]! - 8000fd0: ea4f 0240 mov.w r2, r0, lsl #1 - 8000fd4: ea4f 0341 mov.w r3, r1, lsl #1 - 8000fd8: ea7f 6c22 mvns.w ip, r2, asr #24 - 8000fdc: bf18 it ne - 8000fde: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 8000fe2: d011 beq.n 8001008 <__cmpsf2+0x40> - 8000fe4: b001 add sp, #4 - 8000fe6: ea52 0c53 orrs.w ip, r2, r3, lsr #1 - 8000fea: bf18 it ne - 8000fec: ea90 0f01 teqne r0, r1 - 8000ff0: bf58 it pl - 8000ff2: ebb2 0003 subspl.w r0, r2, r3 - 8000ff6: bf88 it hi - 8000ff8: 17c8 asrhi r0, r1, #31 - 8000ffa: bf38 it cc - 8000ffc: ea6f 70e1 mvncc.w r0, r1, asr #31 - 8001000: bf18 it ne - 8001002: f040 0001 orrne.w r0, r0, #1 - 8001006: 4770 bx lr - 8001008: ea7f 6c22 mvns.w ip, r2, asr #24 - 800100c: d102 bne.n 8001014 <__cmpsf2+0x4c> - 800100e: ea5f 2c40 movs.w ip, r0, lsl #9 - 8001012: d105 bne.n 8001020 <__cmpsf2+0x58> - 8001014: ea7f 6c23 mvns.w ip, r3, asr #24 - 8001018: d1e4 bne.n 8000fe4 <__cmpsf2+0x1c> - 800101a: ea5f 2c41 movs.w ip, r1, lsl #9 - 800101e: d0e1 beq.n 8000fe4 <__cmpsf2+0x1c> - 8001020: f85d 0b04 ldr.w r0, [sp], #4 - 8001024: 4770 bx lr - 8001026: bf00 nop +08000e30 <__aeabi_fcmpun>: + 8000e30: ea4f 0240 mov.w r2, r0, lsl #1 + 8000e34: ea4f 0341 mov.w r3, r1, lsl #1 + 8000e38: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000e3c: d102 bne.n 8000e44 <__aeabi_fcmpun+0x14> + 8000e3e: ea5f 2c40 movs.w ip, r0, lsl #9 + 8000e42: d108 bne.n 8000e56 <__aeabi_fcmpun+0x26> + 8000e44: ea7f 6c23 mvns.w ip, r3, asr #24 + 8000e48: d102 bne.n 8000e50 <__aeabi_fcmpun+0x20> + 8000e4a: ea5f 2c41 movs.w ip, r1, lsl #9 + 8000e4e: d102 bne.n 8000e56 <__aeabi_fcmpun+0x26> + 8000e50: f04f 0000 mov.w r0, #0 + 8000e54: 4770 bx lr + 8000e56: f04f 0001 mov.w r0, #1 + 8000e5a: 4770 bx lr -08001028 <__aeabi_cfrcmple>: - 8001028: 4684 mov ip, r0 - 800102a: 4608 mov r0, r1 - 800102c: 4661 mov r1, ip - 800102e: e7ff b.n 8001030 <__aeabi_cfcmpeq> +08000e5c <__aeabi_f2iz>: + 8000e5c: ea4f 0240 mov.w r2, r0, lsl #1 + 8000e60: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 + 8000e64: d30f bcc.n 8000e86 <__aeabi_f2iz+0x2a> + 8000e66: f04f 039e mov.w r3, #158 @ 0x9e + 8000e6a: ebb3 6212 subs.w r2, r3, r2, lsr #24 + 8000e6e: d90d bls.n 8000e8c <__aeabi_f2iz+0x30> + 8000e70: ea4f 2300 mov.w r3, r0, lsl #8 + 8000e74: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 + 8000e78: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 + 8000e7c: fa23 f002 lsr.w r0, r3, r2 + 8000e80: bf18 it ne + 8000e82: 4240 negne r0, r0 + 8000e84: 4770 bx lr + 8000e86: f04f 0000 mov.w r0, #0 + 8000e8a: 4770 bx lr + 8000e8c: f112 0f61 cmn.w r2, #97 @ 0x61 + 8000e90: d101 bne.n 8000e96 <__aeabi_f2iz+0x3a> + 8000e92: 0242 lsls r2, r0, #9 + 8000e94: d105 bne.n 8000ea2 <__aeabi_f2iz+0x46> + 8000e96: f010 4000 ands.w r0, r0, #2147483648 @ 0x80000000 + 8000e9a: bf08 it eq + 8000e9c: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 + 8000ea0: 4770 bx lr + 8000ea2: f04f 0000 mov.w r0, #0 + 8000ea6: 4770 bx lr -08001030 <__aeabi_cfcmpeq>: - 8001030: b50f push {r0, r1, r2, r3, lr} - 8001032: f7ff ffc9 bl 8000fc8 <__cmpsf2> - 8001036: 2800 cmp r0, #0 - 8001038: bf48 it mi - 800103a: f110 0f00 cmnmi.w r0, #0 - 800103e: bd0f pop {r0, r1, r2, r3, pc} - -08001040 <__aeabi_fcmpeq>: - 8001040: f84d ed08 str.w lr, [sp, #-8]! - 8001044: f7ff fff4 bl 8001030 <__aeabi_cfcmpeq> - 8001048: bf0c ite eq - 800104a: 2001 moveq r0, #1 - 800104c: 2000 movne r0, #0 - 800104e: f85d fb08 ldr.w pc, [sp], #8 - 8001052: bf00 nop - -08001054 <__aeabi_fcmplt>: - 8001054: f84d ed08 str.w lr, [sp, #-8]! - 8001058: f7ff ffea bl 8001030 <__aeabi_cfcmpeq> - 800105c: bf34 ite cc - 800105e: 2001 movcc r0, #1 - 8001060: 2000 movcs r0, #0 - 8001062: f85d fb08 ldr.w pc, [sp], #8 - 8001066: bf00 nop - -08001068 <__aeabi_fcmple>: - 8001068: f84d ed08 str.w lr, [sp, #-8]! - 800106c: f7ff ffe0 bl 8001030 <__aeabi_cfcmpeq> - 8001070: bf94 ite ls - 8001072: 2001 movls r0, #1 - 8001074: 2000 movhi r0, #0 - 8001076: f85d fb08 ldr.w pc, [sp], #8 - 800107a: bf00 nop - -0800107c <__aeabi_fcmpge>: - 800107c: f84d ed08 str.w lr, [sp, #-8]! - 8001080: f7ff ffd2 bl 8001028 <__aeabi_cfrcmple> - 8001084: bf94 ite ls - 8001086: 2001 movls r0, #1 - 8001088: 2000 movhi r0, #0 - 800108a: f85d fb08 ldr.w pc, [sp], #8 - 800108e: bf00 nop - -08001090 <__aeabi_fcmpgt>: - 8001090: f84d ed08 str.w lr, [sp, #-8]! - 8001094: f7ff ffc8 bl 8001028 <__aeabi_cfrcmple> - 8001098: bf34 ite cc - 800109a: 2001 movcc r0, #1 - 800109c: 2000 movcs r0, #0 - 800109e: f85d fb08 ldr.w pc, [sp], #8 - 80010a2: bf00 nop - -080010a4 <__aeabi_fcmpun>: - 80010a4: ea4f 0240 mov.w r2, r0, lsl #1 - 80010a8: ea4f 0341 mov.w r3, r1, lsl #1 - 80010ac: ea7f 6c22 mvns.w ip, r2, asr #24 - 80010b0: d102 bne.n 80010b8 <__aeabi_fcmpun+0x14> - 80010b2: ea5f 2c40 movs.w ip, r0, lsl #9 - 80010b6: d108 bne.n 80010ca <__aeabi_fcmpun+0x26> - 80010b8: ea7f 6c23 mvns.w ip, r3, asr #24 - 80010bc: d102 bne.n 80010c4 <__aeabi_fcmpun+0x20> - 80010be: ea5f 2c41 movs.w ip, r1, lsl #9 - 80010c2: d102 bne.n 80010ca <__aeabi_fcmpun+0x26> - 80010c4: f04f 0000 mov.w r0, #0 - 80010c8: 4770 bx lr - 80010ca: f04f 0001 mov.w r0, #1 - 80010ce: 4770 bx lr - -080010d0 <__aeabi_f2iz>: - 80010d0: ea4f 0240 mov.w r2, r0, lsl #1 - 80010d4: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 - 80010d8: d30f bcc.n 80010fa <__aeabi_f2iz+0x2a> - 80010da: f04f 039e mov.w r3, #158 @ 0x9e - 80010de: ebb3 6212 subs.w r2, r3, r2, lsr #24 - 80010e2: d90d bls.n 8001100 <__aeabi_f2iz+0x30> - 80010e4: ea4f 2300 mov.w r3, r0, lsl #8 - 80010e8: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 - 80010ec: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 - 80010f0: fa23 f002 lsr.w r0, r3, r2 - 80010f4: bf18 it ne - 80010f6: 4240 negne r0, r0 - 80010f8: 4770 bx lr - 80010fa: f04f 0000 mov.w r0, #0 - 80010fe: 4770 bx lr - 8001100: f112 0f61 cmn.w r2, #97 @ 0x61 - 8001104: d101 bne.n 800110a <__aeabi_f2iz+0x3a> - 8001106: 0242 lsls r2, r0, #9 - 8001108: d105 bne.n 8001116 <__aeabi_f2iz+0x46> - 800110a: f010 4000 ands.w r0, r0, #2147483648 @ 0x80000000 - 800110e: bf08 it eq - 8001110: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 - 8001114: 4770 bx lr - 8001116: f04f 0000 mov.w r0, #0 - 800111a: 4770 bx lr - -0800111c : +08000ea8 : * @param numberOfBytes - Number of bytes to be written in the register * * @return None. ******************************************************************************/ void AD5934_SetRegisterValue(uint8_t registerAddress, uint32_t registerValue, uint8_t numberOfBytes) { - 800111c: b580 push {r7, lr} - 800111e: b086 sub sp, #24 - 8001120: af02 add r7, sp, #8 - 8001122: 4603 mov r3, r0 - 8001124: 6039 str r1, [r7, #0] - 8001126: 71fb strb r3, [r7, #7] - 8001128: 4613 mov r3, r2 - 800112a: 71bb strb r3, [r7, #6] + 8000ea8: b580 push {r7, lr} + 8000eaa: b086 sub sp, #24 + 8000eac: af02 add r7, sp, #8 + 8000eae: 4603 mov r3, r0 + 8000eb0: 6039 str r1, [r7, #0] + 8000eb2: 71fb strb r3, [r7, #7] + 8000eb4: 4613 mov r3, r2 + 8000eb6: 71bb strb r3, [r7, #6] uint8_t writeData[2] = {0, 0}; - 800112c: 2300 movs r3, #0 - 800112e: 81bb strh r3, [r7, #12] + 8000eb8: 2300 movs r3, #0 + 8000eba: 81bb strh r3, [r7, #12] HAL_StatusTypeDef status; union Bytes2Long AD5934_reg; AD5934_reg.number = registerValue; - 8001130: 683b ldr r3, [r7, #0] - 8001132: 60bb str r3, [r7, #8] + 8000ebc: 683b ldr r3, [r7, #0] + 8000ebe: 60bb str r3, [r7, #8] for (uint8_t i = 0; i < numberOfBytes; i++) - 8001134: 2300 movs r3, #0 - 8001136: 73fb strb r3, [r7, #15] - 8001138: e018 b.n 800116c + 8000ec0: 2300 movs r3, #0 + 8000ec2: 73fb strb r3, [r7, #15] + 8000ec4: e018 b.n 8000ef8 { writeData[0] = registerAddress - i; - 800113a: 79fa ldrb r2, [r7, #7] - 800113c: 7bfb ldrb r3, [r7, #15] - 800113e: 1ad3 subs r3, r2, r3 - 8001140: b2db uxtb r3, r3 - 8001142: 733b strb r3, [r7, #12] + 8000ec6: 79fa ldrb r2, [r7, #7] + 8000ec8: 7bfb ldrb r3, [r7, #15] + 8000eca: 1ad3 subs r3, r2, r3 + 8000ecc: b2db uxtb r3, r3 + 8000ece: 733b strb r3, [r7, #12] writeData[1] = AD5934_reg.bytes[i]; - 8001144: 7bfb ldrb r3, [r7, #15] - 8001146: 3310 adds r3, #16 - 8001148: 443b add r3, r7 - 800114a: f813 3c08 ldrb.w r3, [r3, #-8] - 800114e: 737b strb r3, [r7, #13] + 8000ed0: 7bfb ldrb r3, [r7, #15] + 8000ed2: 3310 adds r3, #16 + 8000ed4: 443b add r3, r7 + 8000ed6: f813 3c08 ldrb.w r3, [r3, #-8] + 8000eda: 737b strb r3, [r7, #13] status = HAL_I2C_Master_Transmit(&hi2c2, AD5934_I2C_ADDRESS, writeData, 2, 5); - 8001150: f107 020c add.w r2, r7, #12 - 8001154: 2305 movs r3, #5 - 8001156: 9300 str r3, [sp, #0] - 8001158: 2302 movs r3, #2 - 800115a: 211a movs r1, #26 - 800115c: 4807 ldr r0, [pc, #28] @ (800117c ) - 800115e: f003 fe17 bl 8004d90 - 8001162: 4603 mov r3, r0 - 8001164: 73bb strb r3, [r7, #14] + 8000edc: f107 020c add.w r2, r7, #12 + 8000ee0: 2305 movs r3, #5 + 8000ee2: 9300 str r3, [sp, #0] + 8000ee4: 2302 movs r3, #2 + 8000ee6: 211a movs r1, #26 + 8000ee8: 4807 ldr r0, [pc, #28] @ (8000f08 ) + 8000eea: f002 ffcf bl 8003e8c + 8000eee: 4603 mov r3, r0 + 8000ef0: 73bb strb r3, [r7, #14] for (uint8_t i = 0; i < numberOfBytes; i++) - 8001166: 7bfb ldrb r3, [r7, #15] - 8001168: 3301 adds r3, #1 - 800116a: 73fb strb r3, [r7, #15] - 800116c: 7bfa ldrb r2, [r7, #15] - 800116e: 79bb ldrb r3, [r7, #6] - 8001170: 429a cmp r2, r3 - 8001172: d3e2 bcc.n 800113a + 8000ef2: 7bfb ldrb r3, [r7, #15] + 8000ef4: 3301 adds r3, #1 + 8000ef6: 73fb strb r3, [r7, #15] + 8000ef8: 7bfa ldrb r2, [r7, #15] + 8000efa: 79bb ldrb r3, [r7, #6] + 8000efc: 429a cmp r2, r3 + 8000efe: d3e2 bcc.n 8000ec6 } return; - 8001174: bf00 nop + 8000f00: bf00 nop } - 8001176: 3710 adds r7, #16 - 8001178: 46bd mov sp, r7 - 800117a: bd80 pop {r7, pc} - 800117c: 20000654 .word 0x20000654 + 8000f02: 3710 adds r7, #16 + 8000f04: 46bd mov sp, r7 + 8000f06: bd80 pop {r7, pc} + 8000f08: 20000600 .word 0x20000600 -08001180 : +08000f0c : * @param numberOfBytes - Number of bytes to be read from the register. * * @return Register value. ******************************************************************************/ uint32_t AD5934_GetRegisterValue(uint8_t registerAddress, uint8_t numberOfBytes) { - 8001180: b580 push {r7, lr} - 8001182: b088 sub sp, #32 - 8001184: af02 add r7, sp, #8 - 8001186: 4603 mov r3, r0 - 8001188: 460a mov r2, r1 - 800118a: 71fb strb r3, [r7, #7] - 800118c: 4613 mov r3, r2 - 800118e: 71bb strb r3, [r7, #6] + 8000f0c: b580 push {r7, lr} + 8000f0e: b088 sub sp, #32 + 8000f10: af02 add r7, sp, #8 + 8000f12: 4603 mov r3, r0 + 8000f14: 460a mov r2, r1 + 8000f16: 71fb strb r3, [r7, #7] + 8000f18: 4613 mov r3, r2 + 8000f1a: 71bb strb r3, [r7, #6] uint8_t readData[1] = {0}; - 8001190: 2300 movs r3, #0 - 8001192: 753b strb r3, [r7, #20] + 8000f1c: 2300 movs r3, #0 + 8000f1e: 753b strb r3, [r7, #20] uint8_t writeData[2]; //= {AD5934_ADDR_POINTER, registerAddress}; union Bytes2Long AD5934_reg; HAL_StatusTypeDef status; if(numberOfBytes > 4) - 8001194: 79bb ldrb r3, [r7, #6] - 8001196: 2b04 cmp r3, #4 - 8001198: d902 bls.n 80011a0 + 8000f20: 79bb ldrb r3, [r7, #6] + 8000f22: 2b04 cmp r3, #4 + 8000f24: d902 bls.n 8000f2c return 0xFFFFFFFF; //Overflow - 800119a: f04f 33ff mov.w r3, #4294967295 - 800119e: e031 b.n 8001204 + 8000f26: f04f 33ff mov.w r3, #4294967295 + 8000f2a: e031 b.n 8000f90 AD5934_reg.number = 0; - 80011a0: 2300 movs r3, #0 - 80011a2: 60fb str r3, [r7, #12] + 8000f2c: 2300 movs r3, #0 + 8000f2e: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < numberOfBytes; i++) - 80011a4: 2300 movs r3, #0 - 80011a6: 75fb strb r3, [r7, #23] - 80011a8: e027 b.n 80011fa + 8000f30: 2300 movs r3, #0 + 8000f32: 75fb strb r3, [r7, #23] + 8000f34: e027 b.n 8000f86 { writeData[0] = AD5934_ADDR_POINTER; - 80011aa: 23b0 movs r3, #176 @ 0xb0 - 80011ac: 743b strb r3, [r7, #16] + 8000f36: 23b0 movs r3, #176 @ 0xb0 + 8000f38: 743b strb r3, [r7, #16] writeData[1] = registerAddress - i; - 80011ae: 79fa ldrb r2, [r7, #7] - 80011b0: 7dfb ldrb r3, [r7, #23] - 80011b2: 1ad3 subs r3, r2, r3 - 80011b4: b2db uxtb r3, r3 - 80011b6: 747b strb r3, [r7, #17] + 8000f3a: 79fa ldrb r2, [r7, #7] + 8000f3c: 7dfb ldrb r3, [r7, #23] + 8000f3e: 1ad3 subs r3, r2, r3 + 8000f40: b2db uxtb r3, r3 + 8000f42: 747b strb r3, [r7, #17] status = HAL_I2C_Master_Transmit(&hi2c2, AD5934_I2C_ADDRESS, writeData, 2, 5); - 80011b8: f107 0210 add.w r2, r7, #16 - 80011bc: 2305 movs r3, #5 - 80011be: 9300 str r3, [sp, #0] - 80011c0: 2302 movs r3, #2 - 80011c2: 211a movs r1, #26 - 80011c4: 4811 ldr r0, [pc, #68] @ (800120c ) - 80011c6: f003 fde3 bl 8004d90 - 80011ca: 4603 mov r3, r0 - 80011cc: 75bb strb r3, [r7, #22] + 8000f44: f107 0210 add.w r2, r7, #16 + 8000f48: 2305 movs r3, #5 + 8000f4a: 9300 str r3, [sp, #0] + 8000f4c: 2302 movs r3, #2 + 8000f4e: 211a movs r1, #26 + 8000f50: 4811 ldr r0, [pc, #68] @ (8000f98 ) + 8000f52: f002 ff9b bl 8003e8c + 8000f56: 4603 mov r3, r0 + 8000f58: 75bb strb r3, [r7, #22] //HAL_Delay(1); readData[0] = 0; - 80011ce: 2300 movs r3, #0 - 80011d0: 753b strb r3, [r7, #20] + 8000f5a: 2300 movs r3, #0 + 8000f5c: 753b strb r3, [r7, #20] status = HAL_I2C_Master_Receive(&hi2c2, AD5934_I2C_ADDRESS, readData, 1, 5); - 80011d2: f107 0214 add.w r2, r7, #20 - 80011d6: 2305 movs r3, #5 - 80011d8: 9300 str r3, [sp, #0] - 80011da: 2301 movs r3, #1 - 80011dc: 211a movs r1, #26 - 80011de: 480b ldr r0, [pc, #44] @ (800120c ) - 80011e0: f003 fed4 bl 8004f8c - 80011e4: 4603 mov r3, r0 - 80011e6: 75bb strb r3, [r7, #22] + 8000f5e: f107 0214 add.w r2, r7, #20 + 8000f62: 2305 movs r3, #5 + 8000f64: 9300 str r3, [sp, #0] + 8000f66: 2301 movs r3, #1 + 8000f68: 211a movs r1, #26 + 8000f6a: 480b ldr r0, [pc, #44] @ (8000f98 ) + 8000f6c: f003 f88c bl 8004088 + 8000f70: 4603 mov r3, r0 + 8000f72: 75bb strb r3, [r7, #22] AD5934_reg.bytes[i]=readData[0]; - 80011e8: 7dfb ldrb r3, [r7, #23] - 80011ea: 7d3a ldrb r2, [r7, #20] - 80011ec: 3318 adds r3, #24 - 80011ee: 443b add r3, r7 - 80011f0: f803 2c0c strb.w r2, [r3, #-12] + 8000f74: 7dfb ldrb r3, [r7, #23] + 8000f76: 7d3a ldrb r2, [r7, #20] + 8000f78: 3318 adds r3, #24 + 8000f7a: 443b add r3, r7 + 8000f7c: f803 2c0c strb.w r2, [r3, #-12] for (uint8_t i = 0; i < numberOfBytes; i++) - 80011f4: 7dfb ldrb r3, [r7, #23] - 80011f6: 3301 adds r3, #1 - 80011f8: 75fb strb r3, [r7, #23] - 80011fa: 7dfa ldrb r2, [r7, #23] - 80011fc: 79bb ldrb r3, [r7, #6] - 80011fe: 429a cmp r2, r3 - 8001200: d3d3 bcc.n 80011aa + 8000f80: 7dfb ldrb r3, [r7, #23] + 8000f82: 3301 adds r3, #1 + 8000f84: 75fb strb r3, [r7, #23] + 8000f86: 7dfa ldrb r2, [r7, #23] + 8000f88: 79bb ldrb r3, [r7, #6] + 8000f8a: 429a cmp r2, r3 + 8000f8c: d3d3 bcc.n 8000f36 /* AD5934_value.byte[0] = (uint16_t)(AD5934_reg.number & 0x0000FFFF) + 2048; AD5934_value.ints[1] = (uint16_t)((AD5934_reg.number & 0xFFFF0000)>>16) + 2048; */ return AD5934_reg.number; - 8001202: 68fb ldr r3, [r7, #12] + 8000f8e: 68fb ldr r3, [r7, #12] } - 8001204: 4618 mov r0, r3 - 8001206: 3718 adds r7, #24 - 8001208: 46bd mov sp, r7 - 800120a: bd80 pop {r7, pc} - 800120c: 20000654 .word 0x20000654 + 8000f90: 4618 mov r0, r3 + 8000f92: 3718 adds r7, #24 + 8000f94: 46bd mov sp, r7 + 8000f96: bd80 pop {r7, pc} + 8000f98: 20000600 .word 0x20000600 -08001210 : +08000f9c : * @param None. * * @return None. ******************************************************************************/ void AD5934_Init(void) { - 8001210: b580 push {r7, lr} - 8001212: af00 add r7, sp, #0 + 8000f9c: b580 push {r7, lr} + 8000f9e: af00 add r7, sp, #0 /************ Config Sweep******************/ // Place AD5934 in reset AD5934_SetRegisterValue(AD5934_CONTROL_REG_LB, (AD5934_CONTROL_FUNCTION(AD5934_RESET)), 1); - 8001214: 2201 movs r2, #1 - 8001216: f44f 7180 mov.w r1, #256 @ 0x100 - 800121a: 2081 movs r0, #129 @ 0x81 - 800121c: f7ff ff7e bl 800111c + 8000fa0: 2201 movs r2, #1 + 8000fa2: f44f 7180 mov.w r1, #256 @ 0x100 + 8000fa6: 2081 movs r0, #129 @ 0x81 + 8000fa8: f7ff ff7e bl 8000ea8 // Configure starting frequency AD5934_SetRegisterValue(AD5934_START_FREQ_REG_LB, AD5934_FREQ_1K590HZ, 3); - 8001220: 2203 movs r2, #3 - 8001222: 490a ldr r1, [pc, #40] @ (800124c ) - 8001224: 2084 movs r0, #132 @ 0x84 - 8001226: f7ff ff79 bl 800111c + 8000fac: 2203 movs r2, #3 + 8000fae: 490a ldr r1, [pc, #40] @ (8000fd8 ) + 8000fb0: 2084 movs r0, #132 @ 0x84 + 8000fb2: f7ff ff79 bl 8000ea8 // Configure frequency increment step AD5934_SetRegisterValue(AD5934_FREQ_INCR_REG_LB, AD5934_FREQ_0HZ, 3); - 800122a: 2203 movs r2, #3 - 800122c: 2100 movs r1, #0 - 800122e: 2087 movs r0, #135 @ 0x87 - 8001230: f7ff ff74 bl 800111c + 8000fb6: 2203 movs r2, #3 + 8000fb8: 2100 movs r1, #0 + 8000fba: 2087 movs r0, #135 @ 0x87 + 8000fbc: f7ff ff74 bl 8000ea8 // Configure number of steps AD5934_SetRegisterValue(AD5934_NR_INCR_REG_LB, AD5934_STEP_FREQ_0, 2); - 8001234: 2202 movs r2, #2 - 8001236: 2100 movs r1, #0 - 8001238: 2089 movs r0, #137 @ 0x89 - 800123a: f7ff ff6f bl 800111c + 8000fc0: 2202 movs r2, #2 + 8000fc2: 2100 movs r1, #0 + 8000fc4: 2089 movs r0, #137 @ 0x89 + 8000fc6: f7ff ff6f bl 8000ea8 // Set 128 Settling Time AD5934_SetRegisterValue(AD5934_NR_SETTLE_REG_LB, AD5934_SETTLING_TIME_0S01, 2); - 800123e: 2202 movs r2, #2 - 8001240: 210c movs r1, #12 - 8001242: 208b movs r0, #139 @ 0x8b - 8001244: f7ff ff6a bl 800111c + 8000fca: 2202 movs r2, #2 + 8000fcc: 210c movs r1, #12 + 8000fce: 208b movs r0, #139 @ 0x8b + 8000fd0: f7ff ff6a bl 8000ea8 } - 8001248: bf00 nop - 800124a: bd80 pop {r7, pc} - 800124c: 003419e3 .word 0x003419e3 + 8000fd4: bf00 nop + 8000fd6: bd80 pop {r7, pc} + 8000fd8: 003419e3 .word 0x003419e3 -08001250 : +08000fdc : * @param None. * * @return None. ******************************************************************************/ void AD5934_RestartSweep(void) { - 8001250: b580 push {r7, lr} - 8001252: af00 add r7, sp, #0 + 8000fdc: b580 push {r7, lr} + 8000fde: af00 add r7, sp, #0 // Place AD5934 in standby AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_STANDBY) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X5)), 1); - 8001254: 2201 movs r2, #1 - 8001256: 21b4 movs r1, #180 @ 0xb4 - 8001258: 2080 movs r0, #128 @ 0x80 - 800125a: f7ff ff5f bl 800111c + 8000fe0: 2201 movs r2, #1 + 8000fe2: 21b4 movs r1, #180 @ 0xb4 + 8000fe4: 2080 movs r0, #128 @ 0x80 + 8000fe6: f7ff ff5f bl 8000ea8 // Initialize starting frequency, Start frequency sweep, standby AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, ((AD5934_CONTROL_FUNCTION(AD5934_INIT_START_FREQ)) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X5)), 1); - 800125e: 2201 movs r2, #1 - 8001260: 2114 movs r1, #20 - 8001262: 2080 movs r0, #128 @ 0x80 - 8001264: f7ff ff5a bl 800111c + 8000fea: 2201 movs r2, #1 + 8000fec: 2114 movs r1, #20 + 8000fee: 2080 movs r0, #128 @ 0x80 + 8000ff0: f7ff ff5a bl 8000ea8 + + // Disable Internal Reset State + AD5934_SetRegisterValue(AD5934_CONTROL_REG_LB, AD5934_CONTROL_FUNCTION(AD5934_RESERVED), 1); + 8000ff4: 2201 movs r2, #1 + 8000ff6: 2180 movs r1, #128 @ 0x80 + 8000ff8: 2081 movs r0, #129 @ 0x81 + 8000ffa: f7ff ff55 bl 8000ea8 // Configure Range Output, PGA gain andPlace AD5934 in sweep AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_START_FREQ_SWEEP) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X5)), 1); - 8001268: 2201 movs r2, #1 - 800126a: 2124 movs r1, #36 @ 0x24 - 800126c: 2080 movs r0, #128 @ 0x80 - 800126e: f7ff ff55 bl 800111c + 8000ffe: 2201 movs r2, #1 + 8001000: 2124 movs r1, #36 @ 0x24 + 8001002: 2080 movs r0, #128 @ 0x80 + 8001004: f7ff ff50 bl 8000ea8 // Wait for data to be valid AD5934_Wait_For_Data_Valid(); - 8001272: f000 faef bl 8001854 + 8001008: f000 fb1e bl 8001648 // Power Down AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_POWER_DOWN) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X5)), 1); - 8001276: 2201 movs r2, #1 - 8001278: 21a4 movs r1, #164 @ 0xa4 - 800127a: 2080 movs r0, #128 @ 0x80 - 800127c: f7ff ff4e bl 800111c + 800100c: 2201 movs r2, #1 + 800100e: 21a4 movs r1, #164 @ 0xa4 + 8001010: 2080 movs r0, #128 @ 0x80 + 8001012: f7ff ff49 bl 8000ea8 } - 8001280: bf00 nop - 8001282: bd80 pop {r7, pc} + 8001016: bf00 nop + 8001018: bd80 pop {r7, pc} -08001284 : +0800101a : * @param: channel = AD5934_CH_REF_100R, AD5934_CH_REF_1K, AD5934_CH_REF_10K, AD5934_CH_PT100, AD5934_CH_PT1000 or AD5934_CH_EC * * @return Real(int16) and Imaginary(int16) numbers into a int32. ******************************************************************************/ uint32_t AD5934_Sweep(void) { - 8001284: b580 push {r7, lr} - 8001286: b082 sub sp, #8 - 8001288: af00 add r7, sp, #0 + 800101a: b580 push {r7, lr} + 800101c: b082 sub sp, #8 + 800101e: af00 add r7, sp, #0 int16_t real_value, imag_value; uint32_t value=0; - 800128a: 2300 movs r3, #0 - 800128c: 607b str r3, [r7, #4] + 8001020: 2300 movs r3, #0 + 8001022: 607b str r3, [r7, #4] // Restart Sweeping AD5934_RestartSweep(); - 800128e: f7ff ffdf bl 8001250 + 8001024: f7ff ffda bl 8000fdc real_value = ((AD5934_GetRegisterValue(AD5934_REAL_REG_LB,2))); - 8001292: 2102 movs r1, #2 - 8001294: 2095 movs r0, #149 @ 0x95 - 8001296: f7ff ff73 bl 8001180 - 800129a: 4603 mov r3, r0 - 800129c: 807b strh r3, [r7, #2] + 8001028: 2102 movs r1, #2 + 800102a: 2095 movs r0, #149 @ 0x95 + 800102c: f7ff ff6e bl 8000f0c + 8001030: 4603 mov r3, r0 + 8001032: 807b strh r3, [r7, #2] imag_value = ((AD5934_GetRegisterValue(AD5934_IMG_REG_LB,2))); - 800129e: 2102 movs r1, #2 - 80012a0: 2097 movs r0, #151 @ 0x97 - 80012a2: f7ff ff6d bl 8001180 - 80012a6: 4603 mov r3, r0 - 80012a8: 803b strh r3, [r7, #0] + 8001034: 2102 movs r1, #2 + 8001036: 2097 movs r0, #151 @ 0x97 + 8001038: f7ff ff68 bl 8000f0c + 800103c: 4603 mov r3, r0 + 800103e: 803b strh r3, [r7, #0] // Get Real (16-bit) and Imaginary (16-bit) values into an unsigned 32-bit value = ((((uint16_t)(imag_value))<<16) | ((uint16_t)(real_value))); - 80012aa: 883b ldrh r3, [r7, #0] - 80012ac: 041b lsls r3, r3, #16 - 80012ae: 887a ldrh r2, [r7, #2] - 80012b0: 4313 orrs r3, r2 - 80012b2: 607b str r3, [r7, #4] + 8001040: 883b ldrh r3, [r7, #0] + 8001042: 041b lsls r3, r3, #16 + 8001044: 887a ldrh r2, [r7, #2] + 8001046: 4313 orrs r3, r2 + 8001048: 607b str r3, [r7, #4] return value; - 80012b4: 687b ldr r3, [r7, #4] + 800104a: 687b ldr r3, [r7, #4] } - 80012b6: 4618 mov r0, r3 - 80012b8: 3708 adds r7, #8 - 80012ba: 46bd mov sp, r7 - 80012bc: bd80 pop {r7, pc} - ... + 800104c: 4618 mov r0, r3 + 800104e: 3708 adds r7, #8 + 8001050: 46bd mov sp, r7 + 8001052: bd80 pop {r7, pc} -080012c0 : +08001054 : * @param channel - AD5934_CH_PT100 or AD5934_CH_PT1000. * * @return impedance. ******************************************************************************/ float AD5934_GetTemperature(void) { - 80012c0: b590 push {r4, r7, lr} - 80012c2: b093 sub sp, #76 @ 0x4c - 80012c4: af00 add r7, sp, #0 + 8001054: b590 push {r4, r7, lr} + 8001056: b093 sub sp, #76 @ 0x4c + 8001058: af00 add r7, sp, #0 uint8_t i, ch_dut, ch_ref; uint32_t sample; int32_t ref_sum[2], dut_sum[2]; float real_ref,imag_ref, real_dut, imag_dut, ratio, discriminant, mag_dut, mag_ref, ratio_mag, impedance_dut, temperature_sum, gain_factor; if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 80012c6: 2180 movs r1, #128 @ 0x80 - 80012c8: 48ab ldr r0, [pc, #684] @ (8001578 ) - 80012ca: f003 fbd5 bl 8004a78 - 80012ce: 4603 mov r3, r0 - 80012d0: 2b01 cmp r3, #1 - 80012d2: d108 bne.n 80012e6 + 800105a: 2180 movs r1, #128 @ 0x80 + 800105c: 48ab ldr r0, [pc, #684] @ (800130c ) + 800105e: f002 fd89 bl 8003b74 + 8001062: 4603 mov r3, r0 + 8001064: 2b01 cmp r3, #1 + 8001066: d108 bne.n 800107a { ch_ref = AD5934_CH_REF100R_LOW_GAIN; - 80012d4: 2309 movs r3, #9 - 80012d6: f887 3045 strb.w r3, [r7, #69] @ 0x45 + 8001068: 2309 movs r3, #9 + 800106a: f887 3045 strb.w r3, [r7, #69] @ 0x45 ch_dut = AD5934_CH_RTD_LOW_GAIN; //PT100 - 80012da: 2341 movs r3, #65 @ 0x41 - 80012dc: f887 3046 strb.w r3, [r7, #70] @ 0x46 + 800106e: 2341 movs r3, #65 @ 0x41 + 8001070: f887 3046 strb.w r3, [r7, #70] @ 0x46 gain_factor = 100.0f; - 80012e0: 4ba6 ldr r3, [pc, #664] @ (800157c ) - 80012e2: 63bb str r3, [r7, #56] @ 0x38 - 80012e4: e007 b.n 80012f6 + 8001074: 4ba6 ldr r3, [pc, #664] @ (8001310 ) + 8001076: 63bb str r3, [r7, #56] @ 0x38 + 8001078: e007 b.n 800108a } else { ch_ref = AD5934_CH_REF1K_MID_GAIN; - 80012e6: 2312 movs r3, #18 - 80012e8: f887 3045 strb.w r3, [r7, #69] @ 0x45 + 800107a: 2312 movs r3, #18 + 800107c: f887 3045 strb.w r3, [r7, #69] @ 0x45 ch_dut = AD5934_CH_RTD_MID_GAIN; //PT1000 - 80012ec: 2342 movs r3, #66 @ 0x42 - 80012ee: f887 3046 strb.w r3, [r7, #70] @ 0x46 + 8001080: 2342 movs r3, #66 @ 0x42 + 8001082: f887 3046 strb.w r3, [r7, #70] @ 0x46 gain_factor = 1000.0f; - 80012f2: 4ba3 ldr r3, [pc, #652] @ (8001580 ) - 80012f4: 63bb str r3, [r7, #56] @ 0x38 + 8001086: 4ba3 ldr r3, [pc, #652] @ (8001314 ) + 8001088: 63bb str r3, [r7, #56] @ 0x38 } ADG715_Update(ch_ref); // Set the Reference Resistor on board in the Analog Mux - 80012f6: f897 3045 ldrb.w r3, [r7, #69] @ 0x45 - 80012fa: 4618 mov r0, r3 - 80012fc: f000 fb4a bl 8001994 + 800108a: f897 3045 ldrb.w r3, [r7, #69] @ 0x45 + 800108e: 4618 mov r0, r3 + 8001090: f000 fb7a bl 8001788 HAL_Delay(2); //Wait a little - 8001300: 2002 movs r0, #2 - 8001302: f001 fff1 bl 80032e8 + 8001094: 2002 movs r0, #2 + 8001096: f001 fdf3 bl 8002c80 sample = AD5934_Sweep(); // Get Reference Resistor Values from ADC - 8001306: f7ff ffbd bl 8001284 - 800130a: 6378 str r0, [r7, #52] @ 0x34 + 800109a: f7ff ffbe bl 800101a + 800109e: 6378 str r0, [r7, #52] @ 0x34 // Move values in the vectors for (i = (AD5934_TEMP_AVERAGES-1); i > 0; i--) - 800130c: 2307 movs r3, #7 - 800130e: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 8001312: e01e b.n 8001352 + 80010a0: 2307 movs r3, #7 + 80010a2: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 80010a6: e01e b.n 80010e6 { temperature_ref_samples[i][0] = temperature_ref_samples[i-1][0]; //real - 8001314: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 8001318: 1e5a subs r2, r3, #1 - 800131a: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 800131e: 4999 ldr r1, [pc, #612] @ (8001584 ) - 8001320: f931 1022 ldrsh.w r1, [r1, r2, lsl #2] - 8001324: 4a97 ldr r2, [pc, #604] @ (8001584 ) - 8001326: f822 1023 strh.w r1, [r2, r3, lsl #2] + 80010a8: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80010ac: 1e5a subs r2, r3, #1 + 80010ae: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80010b2: 4999 ldr r1, [pc, #612] @ (8001318 ) + 80010b4: f931 1022 ldrsh.w r1, [r1, r2, lsl #2] + 80010b8: 4a97 ldr r2, [pc, #604] @ (8001318 ) + 80010ba: f822 1023 strh.w r1, [r2, r3, lsl #2] temperature_ref_samples[i][1] = temperature_ref_samples[i-1][1]; //imag - 800132a: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 800132e: 3b01 subs r3, #1 - 8001330: f897 2047 ldrb.w r2, [r7, #71] @ 0x47 - 8001334: 4993 ldr r1, [pc, #588] @ (8001584 ) - 8001336: 009b lsls r3, r3, #2 - 8001338: 440b add r3, r1 - 800133a: f9b3 0002 ldrsh.w r0, [r3, #2] - 800133e: 4991 ldr r1, [pc, #580] @ (8001584 ) - 8001340: 0093 lsls r3, r2, #2 - 8001342: 440b add r3, r1 - 8001344: 4602 mov r2, r0 - 8001346: 805a strh r2, [r3, #2] + 80010be: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80010c2: 3b01 subs r3, #1 + 80010c4: f897 2047 ldrb.w r2, [r7, #71] @ 0x47 + 80010c8: 4993 ldr r1, [pc, #588] @ (8001318 ) + 80010ca: 009b lsls r3, r3, #2 + 80010cc: 440b add r3, r1 + 80010ce: f9b3 0002 ldrsh.w r0, [r3, #2] + 80010d2: 4991 ldr r1, [pc, #580] @ (8001318 ) + 80010d4: 0093 lsls r3, r2, #2 + 80010d6: 440b add r3, r1 + 80010d8: 4602 mov r2, r0 + 80010da: 805a strh r2, [r3, #2] for (i = (AD5934_TEMP_AVERAGES-1); i > 0; i--) - 8001348: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 800134c: 3b01 subs r3, #1 - 800134e: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 8001352: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 8001356: 2b00 cmp r3, #0 - 8001358: d1dc bne.n 8001314 + 80010dc: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80010e0: 3b01 subs r3, #1 + 80010e2: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 80010e6: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80010ea: 2b00 cmp r3, #0 + 80010ec: d1dc bne.n 80010a8 } // Read real and imaginary data temperature_ref_samples[0][0] = (int16_t)(sample & 0x0000FFFF); //real - 800135a: 6b7b ldr r3, [r7, #52] @ 0x34 - 800135c: b21a sxth r2, r3 - 800135e: 4b89 ldr r3, [pc, #548] @ (8001584 ) - 8001360: 801a strh r2, [r3, #0] + 80010ee: 6b7b ldr r3, [r7, #52] @ 0x34 + 80010f0: b21a sxth r2, r3 + 80010f2: 4b89 ldr r3, [pc, #548] @ (8001318 ) + 80010f4: 801a strh r2, [r3, #0] //temperature_ref_samples[0][1] = 0xFFFF-(((sample & 0xFFFF0000)>>16)); //imag temperature_ref_samples[0][1] = (int16_t)((sample & 0xFFFF0000)>>16); //imag - 8001362: 6b7b ldr r3, [r7, #52] @ 0x34 - 8001364: 0c1b lsrs r3, r3, #16 - 8001366: b21a sxth r2, r3 - 8001368: 4b86 ldr r3, [pc, #536] @ (8001584 ) - 800136a: 805a strh r2, [r3, #2] + 80010f6: 6b7b ldr r3, [r7, #52] @ 0x34 + 80010f8: 0c1b lsrs r3, r3, #16 + 80010fa: b21a sxth r2, r3 + 80010fc: 4b86 ldr r3, [pc, #536] @ (8001318 ) + 80010fe: 805a strh r2, [r3, #2] // Sum values in the vectors for (i = 0, ref_sum[0]=0, ref_sum[1]=0; i < AD5934_TEMP_AVERAGES; i++) - 800136c: 2300 movs r3, #0 - 800136e: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 8001372: 2300 movs r3, #0 - 8001374: 60bb str r3, [r7, #8] - 8001376: 2300 movs r3, #0 - 8001378: 60fb str r3, [r7, #12] - 800137a: e016 b.n 80013aa + 8001100: 2300 movs r3, #0 + 8001102: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 8001106: 2300 movs r3, #0 + 8001108: 60bb str r3, [r7, #8] + 800110a: 2300 movs r3, #0 + 800110c: 60fb str r3, [r7, #12] + 800110e: e016 b.n 800113e { ref_sum[0] += (int32_t)temperature_ref_samples[i][0]; //real - 800137c: 68bb ldr r3, [r7, #8] - 800137e: f897 2047 ldrb.w r2, [r7, #71] @ 0x47 - 8001382: 4980 ldr r1, [pc, #512] @ (8001584 ) - 8001384: f931 2022 ldrsh.w r2, [r1, r2, lsl #2] - 8001388: 4413 add r3, r2 - 800138a: 60bb str r3, [r7, #8] + 8001110: 68bb ldr r3, [r7, #8] + 8001112: f897 2047 ldrb.w r2, [r7, #71] @ 0x47 + 8001116: 4980 ldr r1, [pc, #512] @ (8001318 ) + 8001118: f931 2022 ldrsh.w r2, [r1, r2, lsl #2] + 800111c: 4413 add r3, r2 + 800111e: 60bb str r3, [r7, #8] ref_sum[1] += (int32_t)temperature_ref_samples[i][1]; //imag - 800138c: 68fa ldr r2, [r7, #12] - 800138e: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 8001392: 497c ldr r1, [pc, #496] @ (8001584 ) - 8001394: 009b lsls r3, r3, #2 - 8001396: 440b add r3, r1 - 8001398: f9b3 3002 ldrsh.w r3, [r3, #2] - 800139c: 4413 add r3, r2 - 800139e: 60fb str r3, [r7, #12] + 8001120: 68fa ldr r2, [r7, #12] + 8001122: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 8001126: 497c ldr r1, [pc, #496] @ (8001318 ) + 8001128: 009b lsls r3, r3, #2 + 800112a: 440b add r3, r1 + 800112c: f9b3 3002 ldrsh.w r3, [r3, #2] + 8001130: 4413 add r3, r2 + 8001132: 60fb str r3, [r7, #12] for (i = 0, ref_sum[0]=0, ref_sum[1]=0; i < AD5934_TEMP_AVERAGES; i++) - 80013a0: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 80013a4: 3301 adds r3, #1 - 80013a6: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 80013aa: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 80013ae: 2b07 cmp r3, #7 - 80013b0: d9e4 bls.n 800137c + 8001134: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 8001138: 3301 adds r3, #1 + 800113a: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 800113e: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 8001142: 2b07 cmp r3, #7 + 8001144: d9e4 bls.n 8001110 } real_ref = ((float)ref_sum[0])/((float)AD5934_TEMP_AVERAGES); - 80013b2: 68bb ldr r3, [r7, #8] - 80013b4: 4618 mov r0, r3 - 80013b6: f7ff fc5b bl 8000c70 <__aeabi_i2f> - 80013ba: 4603 mov r3, r0 - 80013bc: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 - 80013c0: 4618 mov r0, r3 - 80013c2: f7ff fd5d bl 8000e80 <__aeabi_fdiv> - 80013c6: 4603 mov r3, r0 - 80013c8: 633b str r3, [r7, #48] @ 0x30 + 8001146: 68bb ldr r3, [r7, #8] + 8001148: 4618 mov r0, r3 + 800114a: f7ff fc57 bl 80009fc <__aeabi_i2f> + 800114e: 4603 mov r3, r0 + 8001150: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 + 8001154: 4618 mov r0, r3 + 8001156: f7ff fd59 bl 8000c0c <__aeabi_fdiv> + 800115a: 4603 mov r3, r0 + 800115c: 633b str r3, [r7, #48] @ 0x30 imag_ref = ((float)ref_sum[1])/((float)AD5934_TEMP_AVERAGES); - 80013ca: 68fb ldr r3, [r7, #12] - 80013cc: 4618 mov r0, r3 - 80013ce: f7ff fc4f bl 8000c70 <__aeabi_i2f> - 80013d2: 4603 mov r3, r0 - 80013d4: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 - 80013d8: 4618 mov r0, r3 - 80013da: f7ff fd51 bl 8000e80 <__aeabi_fdiv> - 80013de: 4603 mov r3, r0 - 80013e0: 62fb str r3, [r7, #44] @ 0x2c + 800115e: 68fb ldr r3, [r7, #12] + 8001160: 4618 mov r0, r3 + 8001162: f7ff fc4b bl 80009fc <__aeabi_i2f> + 8001166: 4603 mov r3, r0 + 8001168: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 + 800116c: 4618 mov r0, r3 + 800116e: f7ff fd4d bl 8000c0c <__aeabi_fdiv> + 8001172: 4603 mov r3, r0 + 8001174: 62fb str r3, [r7, #44] @ 0x2c // Calculate gain factor impedance mag_ref = sqrtf((real_ref * real_ref) + (imag_ref * imag_ref)); - 80013e2: 6b39 ldr r1, [r7, #48] @ 0x30 - 80013e4: 6b38 ldr r0, [r7, #48] @ 0x30 - 80013e6: f7ff fc97 bl 8000d18 <__aeabi_fmul> - 80013ea: 4603 mov r3, r0 - 80013ec: 461c mov r4, r3 - 80013ee: 6af9 ldr r1, [r7, #44] @ 0x2c - 80013f0: 6af8 ldr r0, [r7, #44] @ 0x2c - 80013f2: f7ff fc91 bl 8000d18 <__aeabi_fmul> - 80013f6: 4603 mov r3, r0 - 80013f8: 4619 mov r1, r3 - 80013fa: 4620 mov r0, r4 - 80013fc: f7ff fb84 bl 8000b08 <__addsf3> - 8001400: 4603 mov r3, r0 - 8001402: 4618 mov r0, r3 - 8001404: f006 fa4c bl 80078a0 - 8001408: 62b8 str r0, [r7, #40] @ 0x28 + 8001176: 6b39 ldr r1, [r7, #48] @ 0x30 + 8001178: 6b38 ldr r0, [r7, #48] @ 0x30 + 800117a: f7ff fc93 bl 8000aa4 <__aeabi_fmul> + 800117e: 4603 mov r3, r0 + 8001180: 461c mov r4, r3 + 8001182: 6af9 ldr r1, [r7, #44] @ 0x2c + 8001184: 6af8 ldr r0, [r7, #44] @ 0x2c + 8001186: f7ff fc8d bl 8000aa4 <__aeabi_fmul> + 800118a: 4603 mov r3, r0 + 800118c: 4619 mov r1, r3 + 800118e: 4620 mov r0, r4 + 8001190: f7ff fb80 bl 8000894 <__addsf3> + 8001194: 4603 mov r3, r0 + 8001196: 4618 mov r0, r3 + 8001198: f005 f886 bl 80062a8 + 800119c: 62b8 str r0, [r7, #40] @ 0x28 ADG715_Update(ch_dut); - 800140a: f897 3046 ldrb.w r3, [r7, #70] @ 0x46 - 800140e: 4618 mov r0, r3 - 8001410: f000 fac0 bl 8001994 + 800119e: f897 3046 ldrb.w r3, [r7, #70] @ 0x46 + 80011a2: 4618 mov r0, r3 + 80011a4: f000 faf0 bl 8001788 HAL_Delay(2); - 8001414: 2002 movs r0, #2 - 8001416: f001 ff67 bl 80032e8 + 80011a8: 2002 movs r0, #2 + 80011aa: f001 fd69 bl 8002c80 sample = AD5934_Sweep(); // Get PT100/PT1000 Values from ADC - 800141a: f7ff ff33 bl 8001284 - 800141e: 6378 str r0, [r7, #52] @ 0x34 + 80011ae: f7ff ff34 bl 800101a + 80011b2: 6378 str r0, [r7, #52] @ 0x34 for (i = (AD5934_TEMP_AVERAGES-1); i > 0; i--) - 8001420: 2307 movs r3, #7 - 8001422: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 8001426: e01e b.n 8001466 + 80011b4: 2307 movs r3, #7 + 80011b6: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 80011ba: e01e b.n 80011fa { temperature_dut_samples[i][0] = temperature_dut_samples[i-1][0]; //real - 8001428: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 800142c: 1e5a subs r2, r3, #1 - 800142e: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 8001432: 4955 ldr r1, [pc, #340] @ (8001588 ) - 8001434: f931 1022 ldrsh.w r1, [r1, r2, lsl #2] - 8001438: 4a53 ldr r2, [pc, #332] @ (8001588 ) - 800143a: f822 1023 strh.w r1, [r2, r3, lsl #2] + 80011bc: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80011c0: 1e5a subs r2, r3, #1 + 80011c2: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80011c6: 4955 ldr r1, [pc, #340] @ (800131c ) + 80011c8: f931 1022 ldrsh.w r1, [r1, r2, lsl #2] + 80011cc: 4a53 ldr r2, [pc, #332] @ (800131c ) + 80011ce: f822 1023 strh.w r1, [r2, r3, lsl #2] temperature_dut_samples[i][1] = temperature_dut_samples[i-1][1]; //imag - 800143e: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 8001442: 3b01 subs r3, #1 - 8001444: f897 2047 ldrb.w r2, [r7, #71] @ 0x47 - 8001448: 494f ldr r1, [pc, #316] @ (8001588 ) - 800144a: 009b lsls r3, r3, #2 - 800144c: 440b add r3, r1 - 800144e: f9b3 0002 ldrsh.w r0, [r3, #2] - 8001452: 494d ldr r1, [pc, #308] @ (8001588 ) - 8001454: 0093 lsls r3, r2, #2 - 8001456: 440b add r3, r1 - 8001458: 4602 mov r2, r0 - 800145a: 805a strh r2, [r3, #2] + 80011d2: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80011d6: 3b01 subs r3, #1 + 80011d8: f897 2047 ldrb.w r2, [r7, #71] @ 0x47 + 80011dc: 494f ldr r1, [pc, #316] @ (800131c ) + 80011de: 009b lsls r3, r3, #2 + 80011e0: 440b add r3, r1 + 80011e2: f9b3 0002 ldrsh.w r0, [r3, #2] + 80011e6: 494d ldr r1, [pc, #308] @ (800131c ) + 80011e8: 0093 lsls r3, r2, #2 + 80011ea: 440b add r3, r1 + 80011ec: 4602 mov r2, r0 + 80011ee: 805a strh r2, [r3, #2] for (i = (AD5934_TEMP_AVERAGES-1); i > 0; i--) - 800145c: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 8001460: 3b01 subs r3, #1 - 8001462: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 8001466: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 800146a: 2b00 cmp r3, #0 - 800146c: d1dc bne.n 8001428 + 80011f0: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80011f4: 3b01 subs r3, #1 + 80011f6: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 80011fa: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80011fe: 2b00 cmp r3, #0 + 8001200: d1dc bne.n 80011bc } // Read real and imaginary data temperature_dut_samples[0][0] = (int16_t)(sample & 0x0000FFFF); //real - 800146e: 6b7b ldr r3, [r7, #52] @ 0x34 - 8001470: b21a sxth r2, r3 - 8001472: 4b45 ldr r3, [pc, #276] @ (8001588 ) - 8001474: 801a strh r2, [r3, #0] + 8001202: 6b7b ldr r3, [r7, #52] @ 0x34 + 8001204: b21a sxth r2, r3 + 8001206: 4b45 ldr r3, [pc, #276] @ (800131c ) + 8001208: 801a strh r2, [r3, #0] //temperature_dut_samples[0][1] = 0xFFFF-(((sample & 0xFFFF0000)>>16)); //imag temperature_dut_samples[0][1] = (int16_t)((sample & 0xFFFF0000)>>16); //imag - 8001476: 6b7b ldr r3, [r7, #52] @ 0x34 - 8001478: 0c1b lsrs r3, r3, #16 - 800147a: b21a sxth r2, r3 - 800147c: 4b42 ldr r3, [pc, #264] @ (8001588 ) - 800147e: 805a strh r2, [r3, #2] + 800120a: 6b7b ldr r3, [r7, #52] @ 0x34 + 800120c: 0c1b lsrs r3, r3, #16 + 800120e: b21a sxth r2, r3 + 8001210: 4b42 ldr r3, [pc, #264] @ (800131c ) + 8001212: 805a strh r2, [r3, #2] for (i = 0, dut_sum[0]=0, dut_sum[1]=0; i < AD5934_TEMP_AVERAGES; i++) - 8001480: 2300 movs r3, #0 - 8001482: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 8001486: 2300 movs r3, #0 - 8001488: 603b str r3, [r7, #0] - 800148a: 2300 movs r3, #0 - 800148c: 607b str r3, [r7, #4] - 800148e: e016 b.n 80014be + 8001214: 2300 movs r3, #0 + 8001216: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 800121a: 2300 movs r3, #0 + 800121c: 603b str r3, [r7, #0] + 800121e: 2300 movs r3, #0 + 8001220: 607b str r3, [r7, #4] + 8001222: e016 b.n 8001252 { dut_sum[0] += (int32_t)temperature_dut_samples[i][0]; //real - 8001490: 683b ldr r3, [r7, #0] - 8001492: f897 2047 ldrb.w r2, [r7, #71] @ 0x47 - 8001496: 493c ldr r1, [pc, #240] @ (8001588 ) - 8001498: f931 2022 ldrsh.w r2, [r1, r2, lsl #2] - 800149c: 4413 add r3, r2 - 800149e: 603b str r3, [r7, #0] + 8001224: 683b ldr r3, [r7, #0] + 8001226: f897 2047 ldrb.w r2, [r7, #71] @ 0x47 + 800122a: 493c ldr r1, [pc, #240] @ (800131c ) + 800122c: f931 2022 ldrsh.w r2, [r1, r2, lsl #2] + 8001230: 4413 add r3, r2 + 8001232: 603b str r3, [r7, #0] dut_sum[1] += (int32_t)temperature_dut_samples[i][1]; //imag - 80014a0: 687a ldr r2, [r7, #4] - 80014a2: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 80014a6: 4938 ldr r1, [pc, #224] @ (8001588 ) - 80014a8: 009b lsls r3, r3, #2 - 80014aa: 440b add r3, r1 - 80014ac: f9b3 3002 ldrsh.w r3, [r3, #2] - 80014b0: 4413 add r3, r2 - 80014b2: 607b str r3, [r7, #4] + 8001234: 687a ldr r2, [r7, #4] + 8001236: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 800123a: 4938 ldr r1, [pc, #224] @ (800131c ) + 800123c: 009b lsls r3, r3, #2 + 800123e: 440b add r3, r1 + 8001240: f9b3 3002 ldrsh.w r3, [r3, #2] + 8001244: 4413 add r3, r2 + 8001246: 607b str r3, [r7, #4] for (i = 0, dut_sum[0]=0, dut_sum[1]=0; i < AD5934_TEMP_AVERAGES; i++) - 80014b4: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 80014b8: 3301 adds r3, #1 - 80014ba: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 80014be: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 80014c2: 2b07 cmp r3, #7 - 80014c4: d9e4 bls.n 8001490 + 8001248: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 800124c: 3301 adds r3, #1 + 800124e: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 8001252: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 8001256: 2b07 cmp r3, #7 + 8001258: d9e4 bls.n 8001224 } real_dut = ((float)dut_sum[0])/((float)AD5934_TEMP_AVERAGES); - 80014c6: 683b ldr r3, [r7, #0] - 80014c8: 4618 mov r0, r3 - 80014ca: f7ff fbd1 bl 8000c70 <__aeabi_i2f> - 80014ce: 4603 mov r3, r0 - 80014d0: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 - 80014d4: 4618 mov r0, r3 - 80014d6: f7ff fcd3 bl 8000e80 <__aeabi_fdiv> - 80014da: 4603 mov r3, r0 - 80014dc: 627b str r3, [r7, #36] @ 0x24 + 800125a: 683b ldr r3, [r7, #0] + 800125c: 4618 mov r0, r3 + 800125e: f7ff fbcd bl 80009fc <__aeabi_i2f> + 8001262: 4603 mov r3, r0 + 8001264: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 + 8001268: 4618 mov r0, r3 + 800126a: f7ff fccf bl 8000c0c <__aeabi_fdiv> + 800126e: 4603 mov r3, r0 + 8001270: 627b str r3, [r7, #36] @ 0x24 imag_dut = ((float)dut_sum[1])/((float)AD5934_TEMP_AVERAGES); - 80014de: 687b ldr r3, [r7, #4] - 80014e0: 4618 mov r0, r3 - 80014e2: f7ff fbc5 bl 8000c70 <__aeabi_i2f> - 80014e6: 4603 mov r3, r0 - 80014e8: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 - 80014ec: 4618 mov r0, r3 - 80014ee: f7ff fcc7 bl 8000e80 <__aeabi_fdiv> - 80014f2: 4603 mov r3, r0 - 80014f4: 623b str r3, [r7, #32] + 8001272: 687b ldr r3, [r7, #4] + 8001274: 4618 mov r0, r3 + 8001276: f7ff fbc1 bl 80009fc <__aeabi_i2f> + 800127a: 4603 mov r3, r0 + 800127c: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 + 8001280: 4618 mov r0, r3 + 8001282: f7ff fcc3 bl 8000c0c <__aeabi_fdiv> + 8001286: 4603 mov r3, r0 + 8001288: 623b str r3, [r7, #32] // Calculate magnitude mag_dut = sqrtf((real_dut * real_dut) + (imag_dut * imag_dut)); - 80014f6: 6a79 ldr r1, [r7, #36] @ 0x24 - 80014f8: 6a78 ldr r0, [r7, #36] @ 0x24 - 80014fa: f7ff fc0d bl 8000d18 <__aeabi_fmul> - 80014fe: 4603 mov r3, r0 - 8001500: 461c mov r4, r3 - 8001502: 6a39 ldr r1, [r7, #32] - 8001504: 6a38 ldr r0, [r7, #32] - 8001506: f7ff fc07 bl 8000d18 <__aeabi_fmul> - 800150a: 4603 mov r3, r0 - 800150c: 4619 mov r1, r3 - 800150e: 4620 mov r0, r4 - 8001510: f7ff fafa bl 8000b08 <__addsf3> - 8001514: 4603 mov r3, r0 - 8001516: 4618 mov r0, r3 - 8001518: f006 f9c2 bl 80078a0 - 800151c: 61f8 str r0, [r7, #28] + 800128a: 6a79 ldr r1, [r7, #36] @ 0x24 + 800128c: 6a78 ldr r0, [r7, #36] @ 0x24 + 800128e: f7ff fc09 bl 8000aa4 <__aeabi_fmul> + 8001292: 4603 mov r3, r0 + 8001294: 461c mov r4, r3 + 8001296: 6a39 ldr r1, [r7, #32] + 8001298: 6a38 ldr r0, [r7, #32] + 800129a: f7ff fc03 bl 8000aa4 <__aeabi_fmul> + 800129e: 4603 mov r3, r0 + 80012a0: 4619 mov r1, r3 + 80012a2: 4620 mov r0, r4 + 80012a4: f7ff faf6 bl 8000894 <__addsf3> + 80012a8: 4603 mov r3, r0 + 80012aa: 4618 mov r0, r3 + 80012ac: f004 fffc bl 80062a8 + 80012b0: 61f8 str r0, [r7, #28] for (i = (AD5934_TEMP_AVERAGES-1); i > 0; i--) - 800151e: 2307 movs r3, #7 - 8001520: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 8001524: e00f b.n 8001546 + 80012b2: 2307 movs r3, #7 + 80012b4: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 80012b8: e00f b.n 80012da temperature_display[i] = temperature_display[i-1]; - 8001526: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 800152a: 1e5a subs r2, r3, #1 - 800152c: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 8001530: 4916 ldr r1, [pc, #88] @ (800158c ) - 8001532: f851 2022 ldr.w r2, [r1, r2, lsl #2] - 8001536: 4915 ldr r1, [pc, #84] @ (800158c ) - 8001538: f841 2023 str.w r2, [r1, r3, lsl #2] + 80012ba: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80012be: 1e5a subs r2, r3, #1 + 80012c0: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80012c4: 4916 ldr r1, [pc, #88] @ (8001320 ) + 80012c6: f851 2022 ldr.w r2, [r1, r2, lsl #2] + 80012ca: 4915 ldr r1, [pc, #84] @ (8001320 ) + 80012cc: f841 2023 str.w r2, [r1, r3, lsl #2] for (i = (AD5934_TEMP_AVERAGES-1); i > 0; i--) - 800153c: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 8001540: 3b01 subs r3, #1 - 8001542: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 8001546: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 800154a: 2b00 cmp r3, #0 - 800154c: d1eb bne.n 8001526 + 80012d0: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80012d4: 3b01 subs r3, #1 + 80012d6: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 80012da: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80012de: 2b00 cmp r3, #0 + 80012e0: d1eb bne.n 80012ba ratio_mag = mag_ref / mag_dut; - 800154e: 69f9 ldr r1, [r7, #28] - 8001550: 6ab8 ldr r0, [r7, #40] @ 0x28 - 8001552: f7ff fc95 bl 8000e80 <__aeabi_fdiv> - 8001556: 4603 mov r3, r0 - 8001558: 61bb str r3, [r7, #24] + 80012e2: 69f9 ldr r1, [r7, #28] + 80012e4: 6ab8 ldr r0, [r7, #40] @ 0x28 + 80012e6: f7ff fc91 bl 8000c0c <__aeabi_fdiv> + 80012ea: 4603 mov r3, r0 + 80012ec: 61bb str r3, [r7, #24] if(ch_ref==AD5934_CH_REF100R_LOW_GAIN) // only for PT100 - 800155a: f897 3045 ldrb.w r3, [r7, #69] @ 0x45 - 800155e: 2b09 cmp r3, #9 - 8001560: d116 bne.n 8001590 + 80012ee: f897 3045 ldrb.w r3, [r7, #69] @ 0x45 + 80012f2: 2b09 cmp r3, #9 + 80012f4: d116 bne.n 8001324 impedance_dut = AD5934_Linear_Correction(gain_factor * ratio_mag); - 8001562: 69b9 ldr r1, [r7, #24] - 8001564: 6bb8 ldr r0, [r7, #56] @ 0x38 - 8001566: f7ff fbd7 bl 8000d18 <__aeabi_fmul> - 800156a: 4603 mov r3, r0 - 800156c: 4618 mov r0, r3 - 800156e: f000 f9c5 bl 80018fc - 8001572: 6438 str r0, [r7, #64] @ 0x40 - 8001574: e012 b.n 800159c - 8001576: bf00 nop - 8001578: 40010800 .word 0x40010800 - 800157c: 42c80000 .word 0x42c80000 - 8001580: 447a0000 .word 0x447a0000 - 8001584: 200000bc .word 0x200000bc - 8001588: 2000009c .word 0x2000009c - 800158c: 200000dc .word 0x200000dc + 80012f6: 69b9 ldr r1, [r7, #24] + 80012f8: 6bb8 ldr r0, [r7, #56] @ 0x38 + 80012fa: f7ff fbd3 bl 8000aa4 <__aeabi_fmul> + 80012fe: 4603 mov r3, r0 + 8001300: 4618 mov r0, r3 + 8001302: f000 f9f5 bl 80016f0 + 8001306: 6438 str r0, [r7, #64] @ 0x40 + 8001308: e012 b.n 8001330 + 800130a: bf00 nop + 800130c: 40010800 .word 0x40010800 + 8001310: 42c80000 .word 0x42c80000 + 8001314: 447a0000 .word 0x447a0000 + 8001318: 200000b4 .word 0x200000b4 + 800131c: 20000094 .word 0x20000094 + 8001320: 200000d4 .word 0x200000d4 else impedance_dut = gain_factor * ratio_mag; - 8001590: 69b9 ldr r1, [r7, #24] - 8001592: 6bb8 ldr r0, [r7, #56] @ 0x38 - 8001594: f7ff fbc0 bl 8000d18 <__aeabi_fmul> - 8001598: 4603 mov r3, r0 - 800159a: 643b str r3, [r7, #64] @ 0x40 + 8001324: 69b9 ldr r1, [r7, #24] + 8001326: 6bb8 ldr r0, [r7, #56] @ 0x38 + 8001328: f7ff fbbc bl 8000aa4 <__aeabi_fmul> + 800132c: 4603 mov r3, r0 + 800132e: 643b str r3, [r7, #64] @ 0x40 // Calculate impedance ratio with the Reference Resistor ratio = impedance_dut / gain_factor; - 800159c: 6bb9 ldr r1, [r7, #56] @ 0x38 - 800159e: 6c38 ldr r0, [r7, #64] @ 0x40 - 80015a0: f7ff fc6e bl 8000e80 <__aeabi_fdiv> - 80015a4: 4603 mov r3, r0 - 80015a6: 617b str r3, [r7, #20] + 8001330: 6bb9 ldr r1, [r7, #56] @ 0x38 + 8001332: 6c38 ldr r0, [r7, #64] @ 0x40 + 8001334: f7ff fc6a bl 8000c0c <__aeabi_fdiv> + 8001338: 4603 mov r3, r0 + 800133a: 617b str r3, [r7, #20] // Calculate impedance discriminant with the ratio discriminant = (AD5934_RTD_A*AD5934_RTD_A)-(4.0f * AD5934_RTD_B * (1.0f - ratio)); - 80015a8: 6979 ldr r1, [r7, #20] - 80015aa: f04f 507e mov.w r0, #1065353216 @ 0x3f800000 - 80015ae: f7ff faa9 bl 8000b04 <__aeabi_fsub> - 80015b2: 4603 mov r3, r0 - 80015b4: 493a ldr r1, [pc, #232] @ (80016a0 ) - 80015b6: 4618 mov r0, r3 - 80015b8: f7ff fbae bl 8000d18 <__aeabi_fmul> - 80015bc: 4603 mov r3, r0 - 80015be: 4939 ldr r1, [pc, #228] @ (80016a4 ) - 80015c0: 4618 mov r0, r3 - 80015c2: f7ff faa1 bl 8000b08 <__addsf3> - 80015c6: 4603 mov r3, r0 - 80015c8: 613b str r3, [r7, #16] + 800133c: 6979 ldr r1, [r7, #20] + 800133e: f04f 507e mov.w r0, #1065353216 @ 0x3f800000 + 8001342: f7ff faa5 bl 8000890 <__aeabi_fsub> + 8001346: 4603 mov r3, r0 + 8001348: 493a ldr r1, [pc, #232] @ (8001434 ) + 800134a: 4618 mov r0, r3 + 800134c: f7ff fbaa bl 8000aa4 <__aeabi_fmul> + 8001350: 4603 mov r3, r0 + 8001352: 4939 ldr r1, [pc, #228] @ (8001438 ) + 8001354: 4618 mov r0, r3 + 8001356: f7ff fa9d bl 8000894 <__addsf3> + 800135a: 4603 mov r3, r0 + 800135c: 613b str r3, [r7, #16] // Calculate new temperature with the discriminant temperature_display[0] = (-AD5934_RTD_A + sqrtf(discriminant))/(2.0f * AD5934_RTD_B); - 80015ca: 6938 ldr r0, [r7, #16] - 80015cc: f006 f968 bl 80078a0 - 80015d0: 4603 mov r3, r0 - 80015d2: 4935 ldr r1, [pc, #212] @ (80016a8 ) - 80015d4: 4618 mov r0, r3 - 80015d6: f7ff fa95 bl 8000b04 <__aeabi_fsub> - 80015da: 4603 mov r3, r0 - 80015dc: 4933 ldr r1, [pc, #204] @ (80016ac ) - 80015de: 4618 mov r0, r3 - 80015e0: f7ff fc4e bl 8000e80 <__aeabi_fdiv> - 80015e4: 4603 mov r3, r0 - 80015e6: 461a mov r2, r3 - 80015e8: 4b31 ldr r3, [pc, #196] @ (80016b0 ) - 80015ea: 601a str r2, [r3, #0] + 800135e: 6938 ldr r0, [r7, #16] + 8001360: f004 ffa2 bl 80062a8 + 8001364: 4603 mov r3, r0 + 8001366: 4935 ldr r1, [pc, #212] @ (800143c ) + 8001368: 4618 mov r0, r3 + 800136a: f7ff fa91 bl 8000890 <__aeabi_fsub> + 800136e: 4603 mov r3, r0 + 8001370: 4933 ldr r1, [pc, #204] @ (8001440 ) + 8001372: 4618 mov r0, r3 + 8001374: f7ff fc4a bl 8000c0c <__aeabi_fdiv> + 8001378: 4603 mov r3, r0 + 800137a: 461a mov r2, r3 + 800137c: 4b31 ldr r3, [pc, #196] @ (8001444 ) + 800137e: 601a str r2, [r3, #0] // Sum of all temperatures for (i = 0, temperature_sum=0.0f; i < AD5934_TEMP_AVERAGES; i++) - 80015ec: 2300 movs r3, #0 - 80015ee: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 80015f2: f04f 0300 mov.w r3, #0 - 80015f6: 63fb str r3, [r7, #60] @ 0x3c - 80015f8: e00f b.n 800161a + 8001380: 2300 movs r3, #0 + 8001382: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 8001386: f04f 0300 mov.w r3, #0 + 800138a: 63fb str r3, [r7, #60] @ 0x3c + 800138c: e00f b.n 80013ae temperature_sum += temperature_display[i]; - 80015fa: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 80015fe: 4a2c ldr r2, [pc, #176] @ (80016b0 ) - 8001600: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8001604: 4619 mov r1, r3 - 8001606: 6bf8 ldr r0, [r7, #60] @ 0x3c - 8001608: f7ff fa7e bl 8000b08 <__addsf3> - 800160c: 4603 mov r3, r0 - 800160e: 63fb str r3, [r7, #60] @ 0x3c + 800138e: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 8001392: 4a2c ldr r2, [pc, #176] @ (8001444 ) + 8001394: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8001398: 4619 mov r1, r3 + 800139a: 6bf8 ldr r0, [r7, #60] @ 0x3c + 800139c: f7ff fa7a bl 8000894 <__addsf3> + 80013a0: 4603 mov r3, r0 + 80013a2: 63fb str r3, [r7, #60] @ 0x3c for (i = 0, temperature_sum=0.0f; i < AD5934_TEMP_AVERAGES; i++) - 8001610: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 8001614: 3301 adds r3, #1 - 8001616: f887 3047 strb.w r3, [r7, #71] @ 0x47 - 800161a: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 - 800161e: 2b07 cmp r3, #7 - 8001620: d9eb bls.n 80015fa + 80013a4: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80013a8: 3301 adds r3, #1 + 80013aa: f887 3047 strb.w r3, [r7, #71] @ 0x47 + 80013ae: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 80013b2: 2b07 cmp r3, #7 + 80013b4: d9eb bls.n 800138e // Is the temperature stable? if(temperature_display[0]>0.0f && (abs(temperature_display[0]-temperature_display[AD5934_TEMP_AVERAGES-1])/temperature_display[0])<0.1f) - 8001622: 4b23 ldr r3, [pc, #140] @ (80016b0 ) - 8001624: 681b ldr r3, [r3, #0] - 8001626: f04f 0100 mov.w r1, #0 - 800162a: 4618 mov r0, r3 - 800162c: f7ff fd30 bl 8001090 <__aeabi_fcmpgt> - 8001630: 4603 mov r3, r0 - 8001632: 2b00 cmp r3, #0 - 8001634: d02d beq.n 8001692 - 8001636: 4b1e ldr r3, [pc, #120] @ (80016b0 ) - 8001638: 681b ldr r3, [r3, #0] - 800163a: 4a1d ldr r2, [pc, #116] @ (80016b0 ) - 800163c: 69d2 ldr r2, [r2, #28] - 800163e: 4611 mov r1, r2 - 8001640: 4618 mov r0, r3 - 8001642: f7ff fa5f bl 8000b04 <__aeabi_fsub> - 8001646: 4603 mov r3, r0 - 8001648: 4618 mov r0, r3 - 800164a: f7ff fd41 bl 80010d0 <__aeabi_f2iz> - 800164e: 4603 mov r3, r0 - 8001650: 2b00 cmp r3, #0 - 8001652: bfb8 it lt - 8001654: 425b neglt r3, r3 - 8001656: 4618 mov r0, r3 - 8001658: f7ff fb0a bl 8000c70 <__aeabi_i2f> - 800165c: 4602 mov r2, r0 - 800165e: 4b14 ldr r3, [pc, #80] @ (80016b0 ) - 8001660: 681b ldr r3, [r3, #0] - 8001662: 4619 mov r1, r3 - 8001664: 4610 mov r0, r2 - 8001666: f7ff fc0b bl 8000e80 <__aeabi_fdiv> - 800166a: 4603 mov r3, r0 - 800166c: 4911 ldr r1, [pc, #68] @ (80016b4 ) - 800166e: 4618 mov r0, r3 - 8001670: f7ff fcf0 bl 8001054 <__aeabi_fcmplt> - 8001674: 4603 mov r3, r0 - 8001676: 2b00 cmp r3, #0 - 8001678: d00b beq.n 8001692 + 80013b6: 4b23 ldr r3, [pc, #140] @ (8001444 ) + 80013b8: 681b ldr r3, [r3, #0] + 80013ba: f04f 0100 mov.w r1, #0 + 80013be: 4618 mov r0, r3 + 80013c0: f7ff fd2c bl 8000e1c <__aeabi_fcmpgt> + 80013c4: 4603 mov r3, r0 + 80013c6: 2b00 cmp r3, #0 + 80013c8: d02d beq.n 8001426 + 80013ca: 4b1e ldr r3, [pc, #120] @ (8001444 ) + 80013cc: 681b ldr r3, [r3, #0] + 80013ce: 4a1d ldr r2, [pc, #116] @ (8001444 ) + 80013d0: 69d2 ldr r2, [r2, #28] + 80013d2: 4611 mov r1, r2 + 80013d4: 4618 mov r0, r3 + 80013d6: f7ff fa5b bl 8000890 <__aeabi_fsub> + 80013da: 4603 mov r3, r0 + 80013dc: 4618 mov r0, r3 + 80013de: f7ff fd3d bl 8000e5c <__aeabi_f2iz> + 80013e2: 4603 mov r3, r0 + 80013e4: 2b00 cmp r3, #0 + 80013e6: bfb8 it lt + 80013e8: 425b neglt r3, r3 + 80013ea: 4618 mov r0, r3 + 80013ec: f7ff fb06 bl 80009fc <__aeabi_i2f> + 80013f0: 4602 mov r2, r0 + 80013f2: 4b14 ldr r3, [pc, #80] @ (8001444 ) + 80013f4: 681b ldr r3, [r3, #0] + 80013f6: 4619 mov r1, r3 + 80013f8: 4610 mov r0, r2 + 80013fa: f7ff fc07 bl 8000c0c <__aeabi_fdiv> + 80013fe: 4603 mov r3, r0 + 8001400: 4911 ldr r1, [pc, #68] @ (8001448 ) + 8001402: 4618 mov r0, r3 + 8001404: f7ff fcec bl 8000de0 <__aeabi_fcmplt> + 8001408: 4603 mov r3, r0 + 800140a: 2b00 cmp r3, #0 + 800140c: d00b beq.n 8001426 return(AD5934_Round_Float_Precision(temperature_sum/((float)AD5934_TEMP_AVERAGES),1)); // Sum / number of averages - 800167a: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 - 800167e: 6bf8 ldr r0, [r7, #60] @ 0x3c - 8001680: f7ff fbfe bl 8000e80 <__aeabi_fdiv> - 8001684: 4603 mov r3, r0 - 8001686: 2101 movs r1, #1 - 8001688: 4618 mov r0, r3 - 800168a: f000 f909 bl 80018a0 - 800168e: 4603 mov r3, r0 - 8001690: e001 b.n 8001696 + 800140e: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 + 8001412: 6bf8 ldr r0, [r7, #60] @ 0x3c + 8001414: f7ff fbfa bl 8000c0c <__aeabi_fdiv> + 8001418: 4603 mov r3, r0 + 800141a: 2101 movs r1, #1 + 800141c: 4618 mov r0, r3 + 800141e: f000 f939 bl 8001694 + 8001422: 4603 mov r3, r0 + 8001424: e001 b.n 800142a else return 0.0f; //instable values return always 0 - 8001692: f04f 0300 mov.w r3, #0 + 8001426: f04f 0300 mov.w r3, #0 } - 8001696: 4618 mov r0, r3 - 8001698: 374c adds r7, #76 @ 0x4c - 800169a: 46bd mov sp, r7 - 800169c: bd90 pop {r4, r7, pc} - 800169e: bf00 nop - 80016a0: 361b057f .word 0x361b057f - 80016a4: 37802266 .word 0x37802266 - 80016a8: 3b801132 .word 0x3b801132 - 80016ac: b59b057f .word 0xb59b057f - 80016b0: 200000dc .word 0x200000dc - 80016b4: 3dcccccd .word 0x3dcccccd + 800142a: 4618 mov r0, r3 + 800142c: 374c adds r7, #76 @ 0x4c + 800142e: 46bd mov sp, r7 + 8001430: bd90 pop {r4, r7, pc} + 8001432: bf00 nop + 8001434: 361b057f .word 0x361b057f + 8001438: 37802266 .word 0x37802266 + 800143c: 3b801132 .word 0x3b801132 + 8001440: b59b057f .word 0xb59b057f + 8001444: 200000d4 .word 0x200000d4 + 8001448: 3dcccccd .word 0x3dcccccd -080016b8 : -* @param none. -* -* @return impedance. -******************************************************************************/ -float AD5934_GetImpedance(void) +0800144c : + * + * @param temperature_dut The current temperature of the DUT (Device Under Test). + * @return float Calculated conductivity in uS/cm. + */ +float AD5934_GetImpedance(float temperature_dut) { - 80016b8: b590 push {r4, r7, lr} - 80016ba: b089 sub sp, #36 @ 0x24 - 80016bc: af00 add r7, sp, #0 - float real_number, imag_number, mag_dut, slope; + 800144c: b590 push {r4, r7, lr} + 800144e: b08b sub sp, #44 @ 0x2c + 8001450: af00 add r7, sp, #0 + 8001452: 6078 str r0, [r7, #4] + uint8_t i, ec_gain; + uint32_t sample_dut; + int32_t dut_sum[2] = {0, 0}; + 8001454: 2300 movs r3, #0 + 8001456: 60bb str r3, [r7, #8] + 8001458: 2300 movs r3, #0 + 800145a: 60fb str r3, [r7, #12] + float real_avg, imag_avg, mag_dut, slope, target_cond; + /* 1. Hardware Setup: Gain Selection (PA6) */ + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) + 800145c: 2140 movs r1, #64 @ 0x40 + 800145e: 4874 ldr r0, [pc, #464] @ (8001630 ) + 8001460: f002 fb88 bl 8003b74 + 8001464: 4603 mov r3, r0 + 8001466: 2b01 cmp r3, #1 + 8001468: d103 bne.n 8001472 + ec_gain = AD5934_CH_EC_HIGH_GAIN; + 800146a: 2384 movs r3, #132 @ 0x84 + 800146c: f887 3026 strb.w r3, [r7, #38] @ 0x26 + 8001470: e002 b.n 8001478 + else + ec_gain = AD5934_CH_EC_MID_GAIN; + 8001472: 2382 movs r3, #130 @ 0x82 + 8001474: f887 3026 strb.w r3, [r7, #38] @ 0x26 - /* STEP 2: Set the Amplification related to the maximum set value */ + if((ec_gain != flash_data.EC10mS_EC5mS_switch) && (main_state != STATE_SETUP_CALIBRATION)) + 8001478: 4b6e ldr r3, [pc, #440] @ (8001634 ) + 800147a: 7e5b ldrb r3, [r3, #25] + 800147c: f897 2026 ldrb.w r2, [r7, #38] @ 0x26 + 8001480: 429a cmp r2, r3 + 8001482: d005 beq.n 8001490 + 8001484: 4b6c ldr r3, [pc, #432] @ (8001638 ) + 8001486: 781b ldrb r3, [r3, #0] + 8001488: 2b01 cmp r3, #1 + 800148a: d001 beq.n 8001490 + return -1.0f; // Fatal error because the gain used in calibration is different + 800148c: 4b6b ldr r3, [pc, #428] @ (800163c ) + 800148e: e0cb b.n 8001628 - if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) // PA6 has internal pull-up and the Switch connects to GND - 80016be: 2140 movs r1, #64 @ 0x40 - 80016c0: 485e ldr r0, [pc, #376] @ (800183c ) - 80016c2: f003 f9d9 bl 8004a78 - 80016c6: 4603 mov r3, r0 - 80016c8: 2b01 cmp r3, #1 - 80016ca: d102 bne.n 80016d2 - ec_gain = AD5934_CH_EC_HIGH_GAIN; // Switch OFF = 5 mS/cm, HIGH GAIN, - 80016cc: 2384 movs r3, #132 @ 0x84 - 80016ce: 77bb strb r3, [r7, #30] - 80016d0: e001 b.n 80016d6 - else - ec_gain = AD5934_CH_EC_MID_GAIN; // Switch ON = 10 mS/cm, MID GAIN, - 80016d2: 2382 movs r3, #130 @ 0x82 - 80016d4: 77bb strb r3, [r7, #30] + ADG715_Update(ec_gain); + 8001490: f897 3026 ldrb.w r3, [r7, #38] @ 0x26 + 8001494: 4618 mov r0, r3 + 8001496: f000 f977 bl 8001788 + HAL_Delay(2); + 800149a: 2002 movs r0, #2 + 800149c: f001 fbf0 bl 8002c80 - ADG715_Update(ec_gain); - 80016d6: 7fbb ldrb r3, [r7, #30] - 80016d8: 4618 mov r0, r3 - 80016da: f000 f95b bl 8001994 - HAL_Delay(2); - 80016de: 2002 movs r0, #2 - 80016e0: f001 fe02 bl 80032e8 + /* 2. Data Acquisition */ + sample_dut = AD5934_Sweep(); + 80014a0: f7ff fdbb bl 800101a + 80014a4: 6238 str r0, [r7, #32] - sample_dut = AD5934_Sweep(); // Get PT100/PT1000 Values from ADC - 80016e4: f7ff fdce bl 8001284 - 80016e8: 61b8 str r0, [r7, #24] + // Shift buffer for moving average + for (i = (AD5934_EC_AVERAGES - 1); i > 0; i--) + 80014a6: 2307 movs r3, #7 + 80014a8: f887 3027 strb.w r3, [r7, #39] @ 0x27 + 80014ac: e01e b.n 80014ec + { + ec_dut_samples[i][0] = ec_dut_samples[i-1][0]; + 80014ae: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 + 80014b2: 1e5a subs r2, r3, #1 + 80014b4: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 + 80014b8: 4961 ldr r1, [pc, #388] @ (8001640 ) + 80014ba: f931 1022 ldrsh.w r1, [r1, r2, lsl #2] + 80014be: 4a60 ldr r2, [pc, #384] @ (8001640 ) + 80014c0: f822 1023 strh.w r1, [r2, r3, lsl #2] + ec_dut_samples[i][1] = ec_dut_samples[i-1][1]; + 80014c4: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 + 80014c8: 3b01 subs r3, #1 + 80014ca: f897 2027 ldrb.w r2, [r7, #39] @ 0x27 + 80014ce: 495c ldr r1, [pc, #368] @ (8001640 ) + 80014d0: 009b lsls r3, r3, #2 + 80014d2: 440b add r3, r1 + 80014d4: f9b3 0002 ldrsh.w r0, [r3, #2] + 80014d8: 4959 ldr r1, [pc, #356] @ (8001640 ) + 80014da: 0093 lsls r3, r2, #2 + 80014dc: 440b add r3, r1 + 80014de: 4602 mov r2, r0 + 80014e0: 805a strh r2, [r3, #2] + for (i = (AD5934_EC_AVERAGES - 1); i > 0; i--) + 80014e2: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 + 80014e6: 3b01 subs r3, #1 + 80014e8: f887 3027 strb.w r3, [r7, #39] @ 0x27 + 80014ec: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 + 80014f0: 2b00 cmp r3, #0 + 80014f2: d1dc bne.n 80014ae + } - for (i = (AD5934_EC_AVERAGES-1); i > 0; i--) - 80016ea: 2307 movs r3, #7 - 80016ec: 77fb strb r3, [r7, #31] - 80016ee: e018 b.n 8001722 + // Deconstruct 32-bit sample into Real and Imaginary components + ec_dut_samples[0][0] = (float)(int16_t)(sample_dut & 0xFFFF); + 80014f4: 6a3b ldr r3, [r7, #32] + 80014f6: b21b sxth r3, r3 + 80014f8: 4618 mov r0, r3 + 80014fa: f7ff fa7f bl 80009fc <__aeabi_i2f> + 80014fe: 4603 mov r3, r0 + 8001500: 4618 mov r0, r3 + 8001502: f7ff fcab bl 8000e5c <__aeabi_f2iz> + 8001506: 4603 mov r3, r0 + 8001508: b21a sxth r2, r3 + 800150a: 4b4d ldr r3, [pc, #308] @ (8001640 ) + 800150c: 801a strh r2, [r3, #0] + ec_dut_samples[0][1] = (float)(int16_t)((sample_dut >> 16) & 0xFFFF); + 800150e: 6a3b ldr r3, [r7, #32] + 8001510: 0c1b lsrs r3, r3, #16 + 8001512: b21b sxth r3, r3 + 8001514: 4618 mov r0, r3 + 8001516: f7ff fa71 bl 80009fc <__aeabi_i2f> + 800151a: 4603 mov r3, r0 + 800151c: 4618 mov r0, r3 + 800151e: f7ff fc9d bl 8000e5c <__aeabi_f2iz> + 8001522: 4603 mov r3, r0 + 8001524: b21a sxth r2, r3 + 8001526: 4b46 ldr r3, [pc, #280] @ (8001640 ) + 8001528: 805a strh r2, [r3, #2] + + /* 3. Compute Averages */ + for (i = 0; i < AD5934_EC_AVERAGES; i++) + 800152a: 2300 movs r3, #0 + 800152c: f887 3027 strb.w r3, [r7, #39] @ 0x27 + 8001530: e016 b.n 8001560 + { + dut_sum[0] += (int32_t)ec_dut_samples[i][0]; + 8001532: 68bb ldr r3, [r7, #8] + 8001534: f897 2027 ldrb.w r2, [r7, #39] @ 0x27 + 8001538: 4941 ldr r1, [pc, #260] @ (8001640 ) + 800153a: f931 2022 ldrsh.w r2, [r1, r2, lsl #2] + 800153e: 4413 add r3, r2 + 8001540: 60bb str r3, [r7, #8] + dut_sum[1] += (int32_t)ec_dut_samples[i][1]; + 8001542: 68fa ldr r2, [r7, #12] + 8001544: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 + 8001548: 493d ldr r1, [pc, #244] @ (8001640 ) + 800154a: 009b lsls r3, r3, #2 + 800154c: 440b add r3, r1 + 800154e: f9b3 3002 ldrsh.w r3, [r3, #2] + 8001552: 4413 add r3, r2 + 8001554: 60fb str r3, [r7, #12] + for (i = 0; i < AD5934_EC_AVERAGES; i++) + 8001556: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 + 800155a: 3301 adds r3, #1 + 800155c: f887 3027 strb.w r3, [r7, #39] @ 0x27 + 8001560: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 + 8001564: 2b07 cmp r3, #7 + 8001566: d9e4 bls.n 8001532 + } + + real_avg = (float)dut_sum[0] / (float)AD5934_EC_AVERAGES; + 8001568: 68bb ldr r3, [r7, #8] + 800156a: 4618 mov r0, r3 + 800156c: f7ff fa46 bl 80009fc <__aeabi_i2f> + 8001570: 4603 mov r3, r0 + 8001572: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 + 8001576: 4618 mov r0, r3 + 8001578: f7ff fb48 bl 8000c0c <__aeabi_fdiv> + 800157c: 4603 mov r3, r0 + 800157e: 61fb str r3, [r7, #28] + imag_avg = (float)dut_sum[1] / (float)AD5934_EC_AVERAGES; + 8001580: 68fb ldr r3, [r7, #12] + 8001582: 4618 mov r0, r3 + 8001584: f7ff fa3a bl 80009fc <__aeabi_i2f> + 8001588: 4603 mov r3, r0 + 800158a: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 + 800158e: 4618 mov r0, r3 + 8001590: f7ff fb3c bl 8000c0c <__aeabi_fdiv> + 8001594: 4603 mov r3, r0 + 8001596: 61bb str r3, [r7, #24] + + /* 4. Magnitude Calculation */ + mag_dut = sqrtf((real_avg * real_avg) + (imag_avg * imag_avg)); + 8001598: 69f9 ldr r1, [r7, #28] + 800159a: 69f8 ldr r0, [r7, #28] + 800159c: f7ff fa82 bl 8000aa4 <__aeabi_fmul> + 80015a0: 4603 mov r3, r0 + 80015a2: 461c mov r4, r3 + 80015a4: 69b9 ldr r1, [r7, #24] + 80015a6: 69b8 ldr r0, [r7, #24] + 80015a8: f7ff fa7c bl 8000aa4 <__aeabi_fmul> + 80015ac: 4603 mov r3, r0 + 80015ae: 4619 mov r1, r3 + 80015b0: 4620 mov r0, r4 + 80015b2: f7ff f96f bl 8000894 <__addsf3> + 80015b6: 4603 mov r3, r0 + 80015b8: 4618 mov r0, r3 + 80015ba: f004 fe75 bl 80062a8 + 80015be: 6178 str r0, [r7, #20] + + /* 5. Calibration Logic Implementation */ + + // Mode: CALIBRATION SETUP (User is defining the reference magnitude) + if(main_state == STATE_SETUP_CALIBRATION) + 80015c0: 4b1d ldr r3, [pc, #116] @ (8001638 ) + 80015c2: 781b ldrb r3, [r3, #0] + 80015c4: 2b01 cmp r3, #1 + 80015c6: d101 bne.n 80015cc + { + return mag_dut; + 80015c8: 697b ldr r3, [r7, #20] + 80015ca: e02d b.n 8001628 + } + // Mode: MEASUREMENT (Applying temperature compensation) + else if(flash_data.ec0_mag != flash_data.ec1413_mag) + 80015cc: 4b19 ldr r3, [pc, #100] @ (8001634 ) + 80015ce: 691b ldr r3, [r3, #16] + 80015d0: 4a18 ldr r2, [pc, #96] @ (8001634 ) + 80015d2: 68d2 ldr r2, [r2, #12] + 80015d4: 4611 mov r1, r2 + 80015d6: 4618 mov r0, r3 + 80015d8: f7ff fbf8 bl 8000dcc <__aeabi_fcmpeq> + 80015dc: 4603 mov r3, r0 + 80015de: 2b00 cmp r3, #0 + 80015e0: d120 bne.n 8001624 { - ec_dut_samples[i][0] = ec_dut_samples[i-1][0]; //real - 80016f0: 7ffb ldrb r3, [r7, #31] - 80016f2: 1e5a subs r2, r3, #1 - 80016f4: 7ffb ldrb r3, [r7, #31] - 80016f6: 4952 ldr r1, [pc, #328] @ (8001840 ) - 80016f8: f931 1022 ldrsh.w r1, [r1, r2, lsl #2] - 80016fc: 4a50 ldr r2, [pc, #320] @ (8001840 ) - 80016fe: f822 1023 strh.w r1, [r2, r3, lsl #2] - ec_dut_samples[i][1] = ec_dut_samples[i-1][1]; //imag - 8001702: 7ffb ldrb r3, [r7, #31] - 8001704: 3b01 subs r3, #1 - 8001706: 7ffa ldrb r2, [r7, #31] - 8001708: 494d ldr r1, [pc, #308] @ (8001840 ) - 800170a: 009b lsls r3, r3, #2 - 800170c: 440b add r3, r1 - 800170e: f9b3 0002 ldrsh.w r0, [r3, #2] - 8001712: 494b ldr r1, [pc, #300] @ (8001840 ) - 8001714: 0093 lsls r3, r2, #2 - 8001716: 440b add r3, r1 - 8001718: 4602 mov r2, r0 - 800171a: 805a strh r2, [r3, #2] - for (i = (AD5934_EC_AVERAGES-1); i > 0; i--) - 800171c: 7ffb ldrb r3, [r7, #31] - 800171e: 3b01 subs r3, #1 - 8001720: 77fb strb r3, [r7, #31] - 8001722: 7ffb ldrb r3, [r7, #31] - 8001724: 2b00 cmp r3, #0 - 8001726: d1e3 bne.n 80016f0 + slope = (AD5934_GAIN_FACTOR_1413US/(flash_data.ec1413_mag-flash_data.ec0_mag)); + 80015e2: 4b14 ldr r3, [pc, #80] @ (8001634 ) + 80015e4: 68db ldr r3, [r3, #12] + 80015e6: 4a13 ldr r2, [pc, #76] @ (8001634 ) + 80015e8: 6912 ldr r2, [r2, #16] + 80015ea: 4611 mov r1, r2 + 80015ec: 4618 mov r0, r3 + 80015ee: f7ff f94f bl 8000890 <__aeabi_fsub> + 80015f2: 4603 mov r3, r0 + 80015f4: 4619 mov r1, r3 + 80015f6: 4813 ldr r0, [pc, #76] @ (8001644 ) + 80015f8: f7ff fb08 bl 8000c0c <__aeabi_fdiv> + 80015fc: 4603 mov r3, r0 + 80015fe: 613b str r3, [r7, #16] + + return(AD5934_GAIN_FACTOR_1413US + (mag_dut - flash_data.ec1413_mag) * slope); + 8001600: 4b0c ldr r3, [pc, #48] @ (8001634 ) + 8001602: 68db ldr r3, [r3, #12] + 8001604: 4619 mov r1, r3 + 8001606: 6978 ldr r0, [r7, #20] + 8001608: f7ff f942 bl 8000890 <__aeabi_fsub> + 800160c: 4603 mov r3, r0 + 800160e: 6939 ldr r1, [r7, #16] + 8001610: 4618 mov r0, r3 + 8001612: f7ff fa47 bl 8000aa4 <__aeabi_fmul> + 8001616: 4603 mov r3, r0 + 8001618: 490a ldr r1, [pc, #40] @ (8001644 ) + 800161a: 4618 mov r0, r3 + 800161c: f7ff f93a bl 8000894 <__addsf3> + 8001620: 4603 mov r3, r0 + 8001622: e001 b.n 8001628 } + else + return 0.0f; // Calibration error fallback + 8001624: f04f 0300 mov.w r3, #0 - // Read real and imaginary data - ec_dut_samples[0][0] = (int16_t)(sample_dut & 0x0000FFFF); //real - 8001728: 69bb ldr r3, [r7, #24] - 800172a: b21a sxth r2, r3 - 800172c: 4b44 ldr r3, [pc, #272] @ (8001840 ) - 800172e: 801a strh r2, [r3, #0] - ec_dut_samples[0][1] = (int16_t)((sample_dut & 0xFFFF0000)>>16); //imag - 8001730: 69bb ldr r3, [r7, #24] - 8001732: 0c1b lsrs r3, r3, #16 - 8001734: b21a sxth r2, r3 - 8001736: 4b42 ldr r3, [pc, #264] @ (8001840 ) - 8001738: 805a strh r2, [r3, #2] - - for (i = 0, dut_sum[0]=0, dut_sum[1]=0; i < AD5934_EC_AVERAGES; i++) - 800173a: 2300 movs r3, #0 - 800173c: 77fb strb r3, [r7, #31] - 800173e: 2300 movs r3, #0 - 8001740: 603b str r3, [r7, #0] - 8001742: 2300 movs r3, #0 - 8001744: 607b str r3, [r7, #4] - 8001746: e012 b.n 800176e - { - dut_sum[0] += (int32_t)ec_dut_samples[i][0]; //real - 8001748: 683b ldr r3, [r7, #0] - 800174a: 7ffa ldrb r2, [r7, #31] - 800174c: 493c ldr r1, [pc, #240] @ (8001840 ) - 800174e: f931 2022 ldrsh.w r2, [r1, r2, lsl #2] - 8001752: 4413 add r3, r2 - 8001754: 603b str r3, [r7, #0] - dut_sum[1] += (int32_t)ec_dut_samples[i][1]; //imag - 8001756: 687a ldr r2, [r7, #4] - 8001758: 7ffb ldrb r3, [r7, #31] - 800175a: 4939 ldr r1, [pc, #228] @ (8001840 ) - 800175c: 009b lsls r3, r3, #2 - 800175e: 440b add r3, r1 - 8001760: f9b3 3002 ldrsh.w r3, [r3, #2] - 8001764: 4413 add r3, r2 - 8001766: 607b str r3, [r7, #4] - for (i = 0, dut_sum[0]=0, dut_sum[1]=0; i < AD5934_EC_AVERAGES; i++) - 8001768: 7ffb ldrb r3, [r7, #31] - 800176a: 3301 adds r3, #1 - 800176c: 77fb strb r3, [r7, #31] - 800176e: 7ffb ldrb r3, [r7, #31] - 8001770: 2b07 cmp r3, #7 - 8001772: d9e9 bls.n 8001748 - } - - real_number = ((float)dut_sum[0])/((float)AD5934_EC_AVERAGES); - 8001774: 683b ldr r3, [r7, #0] - 8001776: 4618 mov r0, r3 - 8001778: f7ff fa7a bl 8000c70 <__aeabi_i2f> - 800177c: 4603 mov r3, r0 - 800177e: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 - 8001782: 4618 mov r0, r3 - 8001784: f7ff fb7c bl 8000e80 <__aeabi_fdiv> - 8001788: 4603 mov r3, r0 - 800178a: 617b str r3, [r7, #20] - imag_number = ((float)dut_sum[1])/((float)AD5934_EC_AVERAGES); - 800178c: 687b ldr r3, [r7, #4] - 800178e: 4618 mov r0, r3 - 8001790: f7ff fa6e bl 8000c70 <__aeabi_i2f> - 8001794: 4603 mov r3, r0 - 8001796: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 - 800179a: 4618 mov r0, r3 - 800179c: f7ff fb70 bl 8000e80 <__aeabi_fdiv> - 80017a0: 4603 mov r3, r0 - 80017a2: 613b str r3, [r7, #16] - - // Calculate unknown magnitude - mag_dut = sqrtf((real_number * real_number) + (imag_number * imag_number)); - 80017a4: 6979 ldr r1, [r7, #20] - 80017a6: 6978 ldr r0, [r7, #20] - 80017a8: f7ff fab6 bl 8000d18 <__aeabi_fmul> - 80017ac: 4603 mov r3, r0 - 80017ae: 461c mov r4, r3 - 80017b0: 6939 ldr r1, [r7, #16] - 80017b2: 6938 ldr r0, [r7, #16] - 80017b4: f7ff fab0 bl 8000d18 <__aeabi_fmul> - 80017b8: 4603 mov r3, r0 - 80017ba: 4619 mov r1, r3 - 80017bc: 4620 mov r0, r4 - 80017be: f7ff f9a3 bl 8000b08 <__addsf3> - 80017c2: 4603 mov r3, r0 - 80017c4: 4618 mov r0, r3 - 80017c6: f006 f86b bl 80078a0 - 80017ca: 60f8 str r0, [r7, #12] - - - // Calculate gain factor for the unknown magnitude - - if(main_state == STATE_SETUP_CALIBRATION) - 80017cc: 4b1d ldr r3, [pc, #116] @ (8001844 ) - 80017ce: 781b ldrb r3, [r3, #0] - 80017d0: 2b01 cmp r3, #1 - 80017d2: d101 bne.n 80017d8 - return(mag_dut); - 80017d4: 68fb ldr r3, [r7, #12] - 80017d6: e02d b.n 8001834 - else if(flash_data.ec12880_value != flash_data.ec1413_value) - 80017d8: 4b1b ldr r3, [pc, #108] @ (8001848 ) - 80017da: 691b ldr r3, [r3, #16] - 80017dc: 4a1a ldr r2, [pc, #104] @ (8001848 ) - 80017de: 68d2 ldr r2, [r2, #12] - 80017e0: 4611 mov r1, r2 - 80017e2: 4618 mov r0, r3 - 80017e4: f7ff fc2c bl 8001040 <__aeabi_fcmpeq> - 80017e8: 4603 mov r3, r0 - 80017ea: 2b00 cmp r3, #0 - 80017ec: d120 bne.n 8001830 - { - slope = ((AD5934_GAIN_FACTOR_12880US - AD5934_GAIN_FACTOR_1413US)/(flash_data.ec12880_value - flash_data.ec1413_value)); - 80017ee: 4b16 ldr r3, [pc, #88] @ (8001848 ) - 80017f0: 691b ldr r3, [r3, #16] - 80017f2: 4a15 ldr r2, [pc, #84] @ (8001848 ) - 80017f4: 68d2 ldr r2, [r2, #12] - 80017f6: 4611 mov r1, r2 - 80017f8: 4618 mov r0, r3 - 80017fa: f7ff f983 bl 8000b04 <__aeabi_fsub> - 80017fe: 4603 mov r3, r0 - 8001800: 4619 mov r1, r3 - 8001802: 4812 ldr r0, [pc, #72] @ (800184c ) - 8001804: f7ff fb3c bl 8000e80 <__aeabi_fdiv> - 8001808: 4603 mov r3, r0 - 800180a: 60bb str r3, [r7, #8] - - return(AD5934_GAIN_FACTOR_1413US + (mag_dut - flash_data.ec1413_value) * slope); - 800180c: 4b0e ldr r3, [pc, #56] @ (8001848 ) - 800180e: 68db ldr r3, [r3, #12] - 8001810: 4619 mov r1, r3 - 8001812: 68f8 ldr r0, [r7, #12] - 8001814: f7ff f976 bl 8000b04 <__aeabi_fsub> - 8001818: 4603 mov r3, r0 - 800181a: 68b9 ldr r1, [r7, #8] - 800181c: 4618 mov r0, r3 - 800181e: f7ff fa7b bl 8000d18 <__aeabi_fmul> - 8001822: 4603 mov r3, r0 - 8001824: 490a ldr r1, [pc, #40] @ (8001850 ) - 8001826: 4618 mov r0, r3 - 8001828: f7ff f96e bl 8000b08 <__addsf3> - 800182c: 4603 mov r3, r0 - 800182e: e001 b.n 8001834 - } - else - return 0.0f; - 8001830: f04f 0300 mov.w r3, #0 } - 8001834: 4618 mov r0, r3 - 8001836: 3724 adds r7, #36 @ 0x24 - 8001838: 46bd mov sp, r7 - 800183a: bd90 pop {r4, r7, pc} - 800183c: 40010800 .word 0x40010800 - 8001840: 200000fc .word 0x200000fc - 8001844: 200006a8 .word 0x200006a8 - 8001848: 200001f8 .word 0x200001f8 - 800184c: 46332c00 .word 0x46332c00 - 8001850: 44b0a000 .word 0x44b0a000 + 8001628: 4618 mov r0, r3 + 800162a: 372c adds r7, #44 @ 0x2c + 800162c: 46bd mov sp, r7 + 800162e: bd90 pop {r4, r7, pc} + 8001630: 40010800 .word 0x40010800 + 8001634: 200001ac .word 0x200001ac + 8001638: 20000654 .word 0x20000654 + 800163c: bf800000 .word 0xbf800000 + 8001640: 200000f4 .word 0x200000f4 + 8001644: 44b0a000 .word 0x44b0a000 -08001854 : +08001648 : /** * @brief Monitora o status com TIMEOUT para evitar travamento do sistema. */ void AD5934_Wait_For_Data_Valid(void) { - 8001854: b580 push {r7, lr} - 8001856: b084 sub sp, #16 - 8001858: af00 add r7, sp, #0 + 8001648: b580 push {r7, lr} + 800164a: b084 sub sp, #16 + 800164c: af00 add r7, sp, #0 uint32_t timeout_counter = 0; - 800185a: 2300 movs r3, #0 - 800185c: 60fb str r3, [r7, #12] + 800164e: 2300 movs r3, #0 + 8001650: 60fb str r3, [r7, #12] const uint32_t MAX_TIMEOUT = 10000; // Limite de tentativas - 800185e: f242 7310 movw r3, #10000 @ 0x2710 - 8001862: 60bb str r3, [r7, #8] + 8001652: f242 7310 movw r3, #10000 @ 0x2710 + 8001656: 60bb str r3, [r7, #8] uint8_t status; while (1) { status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); - 8001864: 2101 movs r1, #1 - 8001866: 208f movs r0, #143 @ 0x8f - 8001868: f7ff fc8a bl 8001180 - 800186c: 4603 mov r3, r0 - 800186e: 71fb strb r3, [r7, #7] + 8001658: 2101 movs r1, #1 + 800165a: 208f movs r0, #143 @ 0x8f + 800165c: f7ff fc56 bl 8000f0c + 8001660: 4603 mov r3, r0 + 8001662: 71fb strb r3, [r7, #7] if ((status & AD5934_STATUS_DATA_VALID) != 0) - 8001870: 79fb ldrb r3, [r7, #7] - 8001872: f003 0302 and.w r3, r3, #2 - 8001876: 2b00 cmp r3, #0 - 8001878: d10a bne.n 8001890 + 8001664: 79fb ldrb r3, [r7, #7] + 8001666: f003 0302 and.w r3, r3, #2 + 800166a: 2b00 cmp r3, #0 + 800166c: d10a bne.n 8001684 { break; // Sucesso! } timeout_counter++; - 800187a: 68fb ldr r3, [r7, #12] - 800187c: 3301 adds r3, #1 - 800187e: 60fb str r3, [r7, #12] + 800166e: 68fb ldr r3, [r7, #12] + 8001670: 3301 adds r3, #1 + 8001672: 60fb str r3, [r7, #12] if (timeout_counter >= MAX_TIMEOUT) - 8001880: 68fa ldr r2, [r7, #12] - 8001882: 68bb ldr r3, [r7, #8] - 8001884: 429a cmp r2, r3 - 8001886: d205 bcs.n 8001894 + 8001674: 68fa ldr r2, [r7, #12] + 8001676: 68bb ldr r3, [r7, #8] + 8001678: 429a cmp r2, r3 + 800167a: d205 bcs.n 8001688 { // TRATAMENTO DE ERRO: O sistema não travou, mas o chip falhou. break; } HAL_Delay(1); // Pequeno delay para não sobrecarregar o barramento I2C - 8001888: 2001 movs r0, #1 - 800188a: f001 fd2d bl 80032e8 + 800167c: 2001 movs r0, #1 + 800167e: f001 faff bl 8002c80 status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); - 800188e: e7e9 b.n 8001864 + 8001682: e7e9 b.n 8001658 break; // Sucesso! - 8001890: bf00 nop - 8001892: e000 b.n 8001896 + 8001684: bf00 nop + 8001686: e000 b.n 800168a break; - 8001894: bf00 nop + 8001688: bf00 nop } } - 8001896: bf00 nop - 8001898: 3710 adds r7, #16 - 800189a: 46bd mov sp, r7 - 800189c: bd80 pop {r7, pc} + 800168a: bf00 nop + 800168c: 3710 adds r7, #16 + 800168e: 46bd mov sp, r7 + 8001690: bd80 pop {r7, pc} ... -080018a0 : +08001694 : * @param valor O valor float original. * @param casas_decimais Quantidade de casas que devem permanecer após a vírgula. * @return float O valor com as casas decimais excedentes removidas. */ float AD5934_Round_Float_Precision(float value, uint8_t number_of_decimals) { - 80018a0: b580 push {r7, lr} - 80018a2: b084 sub sp, #16 - 80018a4: af00 add r7, sp, #0 - 80018a6: 6078 str r0, [r7, #4] - 80018a8: 460b mov r3, r1 - 80018aa: 70fb strb r3, [r7, #3] + 8001694: b580 push {r7, lr} + 8001696: b084 sub sp, #16 + 8001698: af00 add r7, sp, #0 + 800169a: 6078 str r0, [r7, #4] + 800169c: 460b mov r3, r1 + 800169e: 70fb strb r3, [r7, #3] float multiply = 1.0f; - 80018ac: f04f 537e mov.w r3, #1065353216 @ 0x3f800000 - 80018b0: 60fb str r3, [r7, #12] + 80016a0: f04f 537e mov.w r3, #1065353216 @ 0x3f800000 + 80016a4: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < number_of_decimals; i++) - 80018b2: 2300 movs r3, #0 - 80018b4: 72fb strb r3, [r7, #11] - 80018b6: e008 b.n 80018ca + 80016a6: 2300 movs r3, #0 + 80016a8: 72fb strb r3, [r7, #11] + 80016aa: e008 b.n 80016be multiply *= 10.0f; - 80018b8: 490f ldr r1, [pc, #60] @ (80018f8 ) - 80018ba: 68f8 ldr r0, [r7, #12] - 80018bc: f7ff fa2c bl 8000d18 <__aeabi_fmul> - 80018c0: 4603 mov r3, r0 - 80018c2: 60fb str r3, [r7, #12] + 80016ac: 490f ldr r1, [pc, #60] @ (80016ec ) + 80016ae: 68f8 ldr r0, [r7, #12] + 80016b0: f7ff f9f8 bl 8000aa4 <__aeabi_fmul> + 80016b4: 4603 mov r3, r0 + 80016b6: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < number_of_decimals; i++) - 80018c4: 7afb ldrb r3, [r7, #11] - 80018c6: 3301 adds r3, #1 - 80018c8: 72fb strb r3, [r7, #11] - 80018ca: 7afa ldrb r2, [r7, #11] - 80018cc: 78fb ldrb r3, [r7, #3] - 80018ce: 429a cmp r2, r3 - 80018d0: d3f2 bcc.n 80018b8 + 80016b8: 7afb ldrb r3, [r7, #11] + 80016ba: 3301 adds r3, #1 + 80016bc: 72fb strb r3, [r7, #11] + 80016be: 7afa ldrb r2, [r7, #11] + 80016c0: 78fb ldrb r3, [r7, #3] + 80016c2: 429a cmp r2, r3 + 80016c4: d3f2 bcc.n 80016ac return roundf(value * multiply) / multiply; - 80018d2: 68f9 ldr r1, [r7, #12] - 80018d4: 6878 ldr r0, [r7, #4] - 80018d6: f7ff fa1f bl 8000d18 <__aeabi_fmul> - 80018da: 4603 mov r3, r0 - 80018dc: 4618 mov r0, r3 - 80018de: f006 f86f bl 80079c0 - 80018e2: 4603 mov r3, r0 - 80018e4: 68f9 ldr r1, [r7, #12] - 80018e6: 4618 mov r0, r3 - 80018e8: f7ff faca bl 8000e80 <__aeabi_fdiv> - 80018ec: 4603 mov r3, r0 + 80016c6: 68f9 ldr r1, [r7, #12] + 80016c8: 6878 ldr r0, [r7, #4] + 80016ca: f7ff f9eb bl 8000aa4 <__aeabi_fmul> + 80016ce: 4603 mov r3, r0 + 80016d0: 4618 mov r0, r3 + 80016d2: f004 fe79 bl 80063c8 + 80016d6: 4603 mov r3, r0 + 80016d8: 68f9 ldr r1, [r7, #12] + 80016da: 4618 mov r0, r3 + 80016dc: f7ff fa96 bl 8000c0c <__aeabi_fdiv> + 80016e0: 4603 mov r3, r0 } - 80018ee: 4618 mov r0, r3 - 80018f0: 3710 adds r7, #16 - 80018f2: 46bd mov sp, r7 - 80018f4: bd80 pop {r7, pc} - 80018f6: bf00 nop - 80018f8: 41200000 .word 0x41200000 + 80016e2: 4618 mov r0, r3 + 80016e4: 3710 adds r7, #16 + 80016e6: 46bd mov sp, r7 + 80016e8: bd80 pop {r7, pc} + 80016ea: bf00 nop + 80016ec: 41200000 .word 0x41200000 -080018fc : +080016f0 : * * @param input_val The raw float value from sensor/ADC. * @return float The transformed value following the requested trend. */ float AD5934_Linear_Correction(float raw_value) { - 80018fc: b580 push {r7, lr} - 80018fe: b084 sub sp, #16 - 8001900: af00 add r7, sp, #0 - 8001902: 6078 str r0, [r7, #4] + 80016f0: b580 push {r7, lr} + 80016f2: b084 sub sp, #16 + 80016f4: af00 add r7, sp, #0 + 80016f6: 6078 str r0, [r7, #4] /* Pre-calculated constants from regression analysis */ const float slope = 1.02281f; - 8001904: 4b08 ldr r3, [pc, #32] @ (8001928 ) - 8001906: 60fb str r3, [r7, #12] + 80016f8: 4b08 ldr r3, [pc, #32] @ (800171c ) + 80016fa: 60fb str r3, [r7, #12] const float offset = (-2.1409f); - 8001908: 4b08 ldr r3, [pc, #32] @ (800192c ) - 800190a: 60bb str r3, [r7, #8] + 80016fc: 4b08 ldr r3, [pc, #32] @ (8001720 ) + 80016fe: 60bb str r3, [r7, #8] /* Single FPU instruction (if FPU available) or optimized software float mul/add */ return (raw_value * slope) + offset; - 800190c: 68f9 ldr r1, [r7, #12] - 800190e: 6878 ldr r0, [r7, #4] - 8001910: f7ff fa02 bl 8000d18 <__aeabi_fmul> - 8001914: 4603 mov r3, r0 - 8001916: 68b9 ldr r1, [r7, #8] - 8001918: 4618 mov r0, r3 - 800191a: f7ff f8f5 bl 8000b08 <__addsf3> - 800191e: 4603 mov r3, r0 + 8001700: 68f9 ldr r1, [r7, #12] + 8001702: 6878 ldr r0, [r7, #4] + 8001704: f7ff f9ce bl 8000aa4 <__aeabi_fmul> + 8001708: 4603 mov r3, r0 + 800170a: 68b9 ldr r1, [r7, #8] + 800170c: 4618 mov r0, r3 + 800170e: f7ff f8c1 bl 8000894 <__addsf3> + 8001712: 4603 mov r3, r0 } - 8001920: 4618 mov r0, r3 - 8001922: 3710 adds r7, #16 - 8001924: 46bd mov sp, r7 - 8001926: bd80 pop {r7, pc} - 8001928: 3f82eb70 .word 0x3f82eb70 - 800192c: c0090481 .word 0xc0090481 + 8001714: 4618 mov r0, r3 + 8001716: 3710 adds r7, #16 + 8001718: 46bd mov sp, r7 + 800171a: bd80 pop {r7, pc} + 800171c: 3f82eb70 .word 0x3f82eb70 + 8001720: c0090481 .word 0xc0090481 -08001930 : +08001724 : * * @return None. *******************************************************************************/ void ADG715_SetRegisterValue(char value) { - 8001930: b580 push {r7, lr} - 8001932: b086 sub sp, #24 - 8001934: af02 add r7, sp, #8 - 8001936: 4603 mov r3, r0 - 8001938: 71fb strb r3, [r7, #7] + 8001724: b580 push {r7, lr} + 8001726: b086 sub sp, #24 + 8001728: af02 add r7, sp, #8 + 800172a: 4603 mov r3, r0 + 800172c: 71fb strb r3, [r7, #7] uint8_t writeData[1] = {value}; - 800193a: 79fb ldrb r3, [r7, #7] - 800193c: 733b strb r3, [r7, #12] + 800172e: 79fb ldrb r3, [r7, #7] + 8001730: 733b strb r3, [r7, #12] HAL_StatusTypeDef status; status = HAL_I2C_Master_Transmit(&hi2c2, ADG715_I2C_ADDRESS, writeData, 1, 1); - 800193e: f107 020c add.w r2, r7, #12 - 8001942: 2301 movs r3, #1 - 8001944: 9300 str r3, [sp, #0] - 8001946: 2301 movs r3, #1 - 8001948: 2190 movs r1, #144 @ 0x90 - 800194a: 4804 ldr r0, [pc, #16] @ (800195c ) - 800194c: f003 fa20 bl 8004d90 - 8001950: 4603 mov r3, r0 - 8001952: 73fb strb r3, [r7, #15] + 8001732: f107 020c add.w r2, r7, #12 + 8001736: 2301 movs r3, #1 + 8001738: 9300 str r3, [sp, #0] + 800173a: 2301 movs r3, #1 + 800173c: 2190 movs r1, #144 @ 0x90 + 800173e: 4804 ldr r0, [pc, #16] @ (8001750 ) + 8001740: f002 fba4 bl 8003e8c + 8001744: 4603 mov r3, r0 + 8001746: 73fb strb r3, [r7, #15] return; - 8001954: bf00 nop + 8001748: bf00 nop } - 8001956: 3710 adds r7, #16 - 8001958: 46bd mov sp, r7 - 800195a: bd80 pop {r7, pc} - 800195c: 20000654 .word 0x20000654 + 800174a: 3710 adds r7, #16 + 800174c: 46bd mov sp, r7 + 800174e: bd80 pop {r7, pc} + 8001750: 20000600 .word 0x20000600 -08001960 : +08001754 : void ADG715_SetChannels(uint8_t ch1, uint8_t ch2) { - 8001960: b580 push {r7, lr} - 8001962: b082 sub sp, #8 - 8001964: af00 add r7, sp, #0 - 8001966: 4603 mov r3, r0 - 8001968: 460a mov r2, r1 - 800196a: 71fb strb r3, [r7, #7] - 800196c: 4613 mov r3, r2 - 800196e: 71bb strb r3, [r7, #6] + 8001754: b580 push {r7, lr} + 8001756: b082 sub sp, #8 + 8001758: af00 add r7, sp, #0 + 800175a: 4603 mov r3, r0 + 800175c: 460a mov r2, r1 + 800175e: 71fb strb r3, [r7, #7] + 8001760: 4613 mov r3, r2 + 8001762: 71bb strb r3, [r7, #6] ADG715_SetRegisterValue(ch1+ch2); - 8001970: 79fa ldrb r2, [r7, #7] - 8001972: 79bb ldrb r3, [r7, #6] - 8001974: 4413 add r3, r2 - 8001976: b2db uxtb r3, r3 - 8001978: 4618 mov r0, r3 - 800197a: f7ff ffd9 bl 8001930 + 8001764: 79fa ldrb r2, [r7, #7] + 8001766: 79bb ldrb r3, [r7, #6] + 8001768: 4413 add r3, r2 + 800176a: b2db uxtb r3, r3 + 800176c: 4618 mov r0, r3 + 800176e: f7ff ffd9 bl 8001724 } - 800197e: bf00 nop - 8001980: 3708 adds r7, #8 - 8001982: 46bd mov sp, r7 - 8001984: bd80 pop {r7, pc} + 8001772: bf00 nop + 8001774: 3708 adds r7, #8 + 8001776: 46bd mov sp, r7 + 8001778: bd80 pop {r7, pc} -08001986 : +0800177a : void ADG715_ResetChannels(void) { - 8001986: b580 push {r7, lr} - 8001988: af00 add r7, sp, #0 + 800177a: b580 push {r7, lr} + 800177c: af00 add r7, sp, #0 ADG715_SetRegisterValue(0); - 800198a: 2000 movs r0, #0 - 800198c: f7ff ffd0 bl 8001930 + 800177e: 2000 movs r0, #0 + 8001780: f7ff ffd0 bl 8001724 } - 8001990: bf00 nop - 8001992: bd80 pop {r7, pc} + 8001784: bf00 nop + 8001786: bd80 pop {r7, pc} -08001994 : +08001788 : * @param: channel = AD5934_CH_REF_100R, AD5934_CH_REF_1K, AD5934_CH_REF_10K, AD5934_CH_PT100, AD5934_CH_PT1000 or AD5934_CH_EC * * @return none. ******************************************************************************/ void ADG715_Update(uint8_t channel) { - 8001994: b580 push {r7, lr} - 8001996: b082 sub sp, #8 - 8001998: af00 add r7, sp, #0 - 800199a: 4603 mov r3, r0 - 800199c: 71fb strb r3, [r7, #7] + 8001788: b580 push {r7, lr} + 800178a: b082 sub sp, #8 + 800178c: af00 add r7, sp, #0 + 800178e: 4603 mov r3, r0 + 8001790: 71fb strb r3, [r7, #7] HAL_StatusTypeDef status; // Disconnect all Analog Switches ADG715_ResetChannels(); - 800199e: f7ff fff2 bl 8001986 + 8001792: f7ff fff2 bl 800177a // Set the pair of connections if(channel == AD5934_CH_REF100R_LOW_GAIN) - 80019a2: 79fb ldrb r3, [r7, #7] - 80019a4: 2b09 cmp r3, #9 - 80019a6: d104 bne.n 80019b2 + 8001796: 79fb ldrb r3, [r7, #7] + 8001798: 2b09 cmp r3, #9 + 800179a: d104 bne.n 80017a6 { ADG715_SetChannels(ADG715_SW1, ADG715_SW4); // Rf = 150R, Ch = Ref_100R - 80019a8: 2108 movs r1, #8 - 80019aa: 2001 movs r0, #1 - 80019ac: f7ff ffd8 bl 8001960 + 800179c: 2108 movs r1, #8 + 800179e: 2001 movs r0, #1 + 80017a0: f7ff ffd8 bl 8001754 else if(channel == AD5934_CH_EC_HIGH_GAIN) { ADG715_SetChannels(ADG715_SW3, ADG715_SW8); // Rf = 6k2, Ch = EC } } - 80019b0: e06e b.n 8001a90 + 80017a4: e06e b.n 8001884 else if(channel == AD5934_CH_REF100R_MID_GAIN) - 80019b2: 79fb ldrb r3, [r7, #7] - 80019b4: 2b0a cmp r3, #10 - 80019b6: d104 bne.n 80019c2 + 80017a6: 79fb ldrb r3, [r7, #7] + 80017a8: 2b0a cmp r3, #10 + 80017aa: d104 bne.n 80017b6 ADG715_SetChannels(ADG715_SW2, ADG715_SW4); // Rf = 1k5, Ch = Ref_100R - 80019b8: 2108 movs r1, #8 - 80019ba: 2002 movs r0, #2 - 80019bc: f7ff ffd0 bl 8001960 + 80017ac: 2108 movs r1, #8 + 80017ae: 2002 movs r0, #2 + 80017b0: f7ff ffd0 bl 8001754 } - 80019c0: e066 b.n 8001a90 + 80017b4: e066 b.n 8001884 else if(channel == AD5934_CH_REF100R_HIGH_GAIN) - 80019c2: 79fb ldrb r3, [r7, #7] - 80019c4: 2b0c cmp r3, #12 - 80019c6: d104 bne.n 80019d2 + 80017b6: 79fb ldrb r3, [r7, #7] + 80017b8: 2b0c cmp r3, #12 + 80017ba: d104 bne.n 80017c6 ADG715_SetChannels(ADG715_SW3, ADG715_SW4); // Rf = 6k2, Ch = Ref_100R - 80019c8: 2108 movs r1, #8 - 80019ca: 2004 movs r0, #4 - 80019cc: f7ff ffc8 bl 8001960 + 80017bc: 2108 movs r1, #8 + 80017be: 2004 movs r0, #4 + 80017c0: f7ff ffc8 bl 8001754 } - 80019d0: e05e b.n 8001a90 + 80017c4: e05e b.n 8001884 else if(channel == AD5934_CH_REF1K_LOW_GAIN) - 80019d2: 79fb ldrb r3, [r7, #7] - 80019d4: 2b11 cmp r3, #17 - 80019d6: d104 bne.n 80019e2 + 80017c6: 79fb ldrb r3, [r7, #7] + 80017c8: 2b11 cmp r3, #17 + 80017ca: d104 bne.n 80017d6 ADG715_SetChannels(ADG715_SW1, ADG715_SW5); // Rf = 150R, Ch = Ref_1k - 80019d8: 2110 movs r1, #16 - 80019da: 2001 movs r0, #1 - 80019dc: f7ff ffc0 bl 8001960 + 80017cc: 2110 movs r1, #16 + 80017ce: 2001 movs r0, #1 + 80017d0: f7ff ffc0 bl 8001754 } - 80019e0: e056 b.n 8001a90 + 80017d4: e056 b.n 8001884 else if(channel == AD5934_CH_REF1K_MID_GAIN) - 80019e2: 79fb ldrb r3, [r7, #7] - 80019e4: 2b12 cmp r3, #18 - 80019e6: d104 bne.n 80019f2 + 80017d6: 79fb ldrb r3, [r7, #7] + 80017d8: 2b12 cmp r3, #18 + 80017da: d104 bne.n 80017e6 ADG715_SetChannels(ADG715_SW2, ADG715_SW5); // Rf = 1k5, Ch = Ref_1k - 80019e8: 2110 movs r1, #16 - 80019ea: 2002 movs r0, #2 - 80019ec: f7ff ffb8 bl 8001960 + 80017dc: 2110 movs r1, #16 + 80017de: 2002 movs r0, #2 + 80017e0: f7ff ffb8 bl 8001754 } - 80019f0: e04e b.n 8001a90 + 80017e4: e04e b.n 8001884 else if(channel == AD5934_CH_REF1K_HIGH_GAIN) - 80019f2: 79fb ldrb r3, [r7, #7] - 80019f4: 2b14 cmp r3, #20 - 80019f6: d104 bne.n 8001a02 + 80017e6: 79fb ldrb r3, [r7, #7] + 80017e8: 2b14 cmp r3, #20 + 80017ea: d104 bne.n 80017f6 ADG715_SetChannels(ADG715_SW3, ADG715_SW5); // Rf = 6k2, Ch = Ref_1k - 80019f8: 2110 movs r1, #16 - 80019fa: 2004 movs r0, #4 - 80019fc: f7ff ffb0 bl 8001960 + 80017ec: 2110 movs r1, #16 + 80017ee: 2004 movs r0, #4 + 80017f0: f7ff ffb0 bl 8001754 } - 8001a00: e046 b.n 8001a90 + 80017f4: e046 b.n 8001884 else if(channel == AD5934_CH_REF10K_LOW_GAIN) - 8001a02: 79fb ldrb r3, [r7, #7] - 8001a04: 2b21 cmp r3, #33 @ 0x21 - 8001a06: d104 bne.n 8001a12 + 80017f6: 79fb ldrb r3, [r7, #7] + 80017f8: 2b21 cmp r3, #33 @ 0x21 + 80017fa: d104 bne.n 8001806 ADG715_SetChannels(ADG715_SW1, ADG715_SW6); // Rf = 150R, Ch = Ref_10k - 8001a08: 2120 movs r1, #32 - 8001a0a: 2001 movs r0, #1 - 8001a0c: f7ff ffa8 bl 8001960 + 80017fc: 2120 movs r1, #32 + 80017fe: 2001 movs r0, #1 + 8001800: f7ff ffa8 bl 8001754 } - 8001a10: e03e b.n 8001a90 + 8001804: e03e b.n 8001884 else if(channel == AD5934_CH_REF10K_MID_GAIN) - 8001a12: 79fb ldrb r3, [r7, #7] - 8001a14: 2b22 cmp r3, #34 @ 0x22 - 8001a16: d104 bne.n 8001a22 + 8001806: 79fb ldrb r3, [r7, #7] + 8001808: 2b22 cmp r3, #34 @ 0x22 + 800180a: d104 bne.n 8001816 ADG715_SetChannels(ADG715_SW2, ADG715_SW6); // Rf = 1k5, Ch = Ref_10k - 8001a18: 2120 movs r1, #32 - 8001a1a: 2002 movs r0, #2 - 8001a1c: f7ff ffa0 bl 8001960 + 800180c: 2120 movs r1, #32 + 800180e: 2002 movs r0, #2 + 8001810: f7ff ffa0 bl 8001754 } - 8001a20: e036 b.n 8001a90 + 8001814: e036 b.n 8001884 else if(channel == AD5934_CH_REF10K_HIGH_GAIN) - 8001a22: 79fb ldrb r3, [r7, #7] - 8001a24: 2b24 cmp r3, #36 @ 0x24 - 8001a26: d104 bne.n 8001a32 + 8001816: 79fb ldrb r3, [r7, #7] + 8001818: 2b24 cmp r3, #36 @ 0x24 + 800181a: d104 bne.n 8001826 ADG715_SetChannels(ADG715_SW3, ADG715_SW6); // Rf = 6k2, Ch = Ref_10k - 8001a28: 2120 movs r1, #32 - 8001a2a: 2004 movs r0, #4 - 8001a2c: f7ff ff98 bl 8001960 + 800181c: 2120 movs r1, #32 + 800181e: 2004 movs r0, #4 + 8001820: f7ff ff98 bl 8001754 } - 8001a30: e02e b.n 8001a90 + 8001824: e02e b.n 8001884 else if(channel == AD5934_CH_RTD_LOW_GAIN) - 8001a32: 79fb ldrb r3, [r7, #7] - 8001a34: 2b41 cmp r3, #65 @ 0x41 - 8001a36: d104 bne.n 8001a42 + 8001826: 79fb ldrb r3, [r7, #7] + 8001828: 2b41 cmp r3, #65 @ 0x41 + 800182a: d104 bne.n 8001836 ADG715_SetChannels(ADG715_SW1, ADG715_SW7); // Rf = 150R, Ch = RTD - 8001a38: 2140 movs r1, #64 @ 0x40 - 8001a3a: 2001 movs r0, #1 - 8001a3c: f7ff ff90 bl 8001960 + 800182c: 2140 movs r1, #64 @ 0x40 + 800182e: 2001 movs r0, #1 + 8001830: f7ff ff90 bl 8001754 } - 8001a40: e026 b.n 8001a90 + 8001834: e026 b.n 8001884 else if(channel == AD5934_CH_RTD_MID_GAIN) - 8001a42: 79fb ldrb r3, [r7, #7] - 8001a44: 2b42 cmp r3, #66 @ 0x42 - 8001a46: d104 bne.n 8001a52 + 8001836: 79fb ldrb r3, [r7, #7] + 8001838: 2b42 cmp r3, #66 @ 0x42 + 800183a: d104 bne.n 8001846 ADG715_SetChannels(ADG715_SW2, ADG715_SW7); // Rf = 1k5, Ch = RTD - 8001a48: 2140 movs r1, #64 @ 0x40 - 8001a4a: 2002 movs r0, #2 - 8001a4c: f7ff ff88 bl 8001960 + 800183c: 2140 movs r1, #64 @ 0x40 + 800183e: 2002 movs r0, #2 + 8001840: f7ff ff88 bl 8001754 } - 8001a50: e01e b.n 8001a90 + 8001844: e01e b.n 8001884 else if(channel == AD5934_CH_RTD_HIGH_GAIN) - 8001a52: 79fb ldrb r3, [r7, #7] - 8001a54: 2b44 cmp r3, #68 @ 0x44 - 8001a56: d104 bne.n 8001a62 + 8001846: 79fb ldrb r3, [r7, #7] + 8001848: 2b44 cmp r3, #68 @ 0x44 + 800184a: d104 bne.n 8001856 ADG715_SetChannels(ADG715_SW3, ADG715_SW7); // Rf = 6k2, Ch = RTD - 8001a58: 2140 movs r1, #64 @ 0x40 - 8001a5a: 2004 movs r0, #4 - 8001a5c: f7ff ff80 bl 8001960 + 800184c: 2140 movs r1, #64 @ 0x40 + 800184e: 2004 movs r0, #4 + 8001850: f7ff ff80 bl 8001754 } - 8001a60: e016 b.n 8001a90 + 8001854: e016 b.n 8001884 else if(channel == AD5934_CH_EC_LOW_GAIN) - 8001a62: 79fb ldrb r3, [r7, #7] - 8001a64: 2b81 cmp r3, #129 @ 0x81 - 8001a66: d104 bne.n 8001a72 + 8001856: 79fb ldrb r3, [r7, #7] + 8001858: 2b81 cmp r3, #129 @ 0x81 + 800185a: d104 bne.n 8001866 ADG715_SetChannels(ADG715_SW1, ADG715_SW8); // Rf = 150R, Ch = EC - 8001a68: 2180 movs r1, #128 @ 0x80 - 8001a6a: 2001 movs r0, #1 - 8001a6c: f7ff ff78 bl 8001960 + 800185c: 2180 movs r1, #128 @ 0x80 + 800185e: 2001 movs r0, #1 + 8001860: f7ff ff78 bl 8001754 } - 8001a70: e00e b.n 8001a90 + 8001864: e00e b.n 8001884 else if(channel == AD5934_CH_EC_MID_GAIN) - 8001a72: 79fb ldrb r3, [r7, #7] - 8001a74: 2b82 cmp r3, #130 @ 0x82 - 8001a76: d104 bne.n 8001a82 + 8001866: 79fb ldrb r3, [r7, #7] + 8001868: 2b82 cmp r3, #130 @ 0x82 + 800186a: d104 bne.n 8001876 ADG715_SetChannels(ADG715_SW2, ADG715_SW8); // Rf = 1k5, Ch = EC - 8001a78: 2180 movs r1, #128 @ 0x80 - 8001a7a: 2002 movs r0, #2 - 8001a7c: f7ff ff70 bl 8001960 + 800186c: 2180 movs r1, #128 @ 0x80 + 800186e: 2002 movs r0, #2 + 8001870: f7ff ff70 bl 8001754 } - 8001a80: e006 b.n 8001a90 + 8001874: e006 b.n 8001884 else if(channel == AD5934_CH_EC_HIGH_GAIN) - 8001a82: 79fb ldrb r3, [r7, #7] - 8001a84: 2b84 cmp r3, #132 @ 0x84 - 8001a86: d103 bne.n 8001a90 + 8001876: 79fb ldrb r3, [r7, #7] + 8001878: 2b84 cmp r3, #132 @ 0x84 + 800187a: d103 bne.n 8001884 ADG715_SetChannels(ADG715_SW3, ADG715_SW8); // Rf = 6k2, Ch = EC - 8001a88: 2180 movs r1, #128 @ 0x80 - 8001a8a: 2004 movs r0, #4 - 8001a8c: f7ff ff68 bl 8001960 + 800187c: 2180 movs r1, #128 @ 0x80 + 800187e: 2004 movs r0, #4 + 8001880: f7ff ff68 bl 8001754 } - 8001a90: bf00 nop - 8001a92: 3708 adds r7, #8 - 8001a94: 46bd mov sp, r7 - 8001a96: bd80 pop {r7, pc} + 8001884: bf00 nop + 8001886: 3708 adds r7, #8 + 8001888: 46bd mov sp, r7 + 800188a: bd80 pop {r7, pc} -08001a98 : +0800188c : +ADC_HandleTypeDef hadc1; ADC_HandleTypeDef hadc2; -DMA_HandleTypeDef hdma_adc1; /* ADC1 init function */ void MX_ADC1_Init(void) { - 8001a98: b580 push {r7, lr} - 8001a9a: b084 sub sp, #16 - 8001a9c: af00 add r7, sp, #0 + 800188c: b580 push {r7, lr} + 800188e: b084 sub sp, #16 + 8001890: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 8001a9e: 1d3b adds r3, r7, #4 - 8001aa0: 2200 movs r2, #0 - 8001aa2: 601a str r2, [r3, #0] - 8001aa4: 605a str r2, [r3, #4] - 8001aa6: 609a str r2, [r3, #8] + 8001892: 1d3b adds r3, r7, #4 + 8001894: 2200 movs r2, #0 + 8001896: 601a str r2, [r3, #0] + 8001898: 605a str r2, [r3, #4] + 800189a: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; - 8001aa8: 4b20 ldr r3, [pc, #128] @ (8001b2c ) - 8001aaa: 4a21 ldr r2, [pc, #132] @ (8001b30 ) - 8001aac: 601a str r2, [r3, #0] - hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 8001aae: 4b1f ldr r3, [pc, #124] @ (8001b2c ) - 8001ab0: f44f 7280 mov.w r2, #256 @ 0x100 - 8001ab4: 609a str r2, [r3, #8] - hadc1.Init.ContinuousConvMode = DISABLE; - 8001ab6: 4b1d ldr r3, [pc, #116] @ (8001b2c ) - 8001ab8: 2200 movs r2, #0 - 8001aba: 731a strb r2, [r3, #12] + 800189c: 4b18 ldr r3, [pc, #96] @ (8001900 ) + 800189e: 4a19 ldr r2, [pc, #100] @ (8001904 ) + 80018a0: 601a str r2, [r3, #0] + hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; + 80018a2: 4b17 ldr r3, [pc, #92] @ (8001900 ) + 80018a4: 2200 movs r2, #0 + 80018a6: 609a str r2, [r3, #8] + hadc1.Init.ContinuousConvMode = ENABLE; + 80018a8: 4b15 ldr r3, [pc, #84] @ (8001900 ) + 80018aa: 2201 movs r2, #1 + 80018ac: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; - 8001abc: 4b1b ldr r3, [pc, #108] @ (8001b2c ) - 8001abe: 2200 movs r2, #0 - 8001ac0: 751a strb r2, [r3, #20] - hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T3_TRGO; - 8001ac2: 4b1a ldr r3, [pc, #104] @ (8001b2c ) - 8001ac4: f44f 2200 mov.w r2, #524288 @ 0x80000 - 8001ac8: 61da str r2, [r3, #28] + 80018ae: 4b14 ldr r3, [pc, #80] @ (8001900 ) + 80018b0: 2200 movs r2, #0 + 80018b2: 751a strb r2, [r3, #20] + hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 80018b4: 4b12 ldr r3, [pc, #72] @ (8001900 ) + 80018b6: f44f 2260 mov.w r2, #917504 @ 0xe0000 + 80018ba: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8001aca: 4b18 ldr r3, [pc, #96] @ (8001b2c ) - 8001acc: 2200 movs r2, #0 - 8001ace: 605a str r2, [r3, #4] - hadc1.Init.NbrOfConversion = 2; - 8001ad0: 4b16 ldr r3, [pc, #88] @ (8001b2c ) - 8001ad2: 2202 movs r2, #2 - 8001ad4: 611a str r2, [r3, #16] + 80018bc: 4b10 ldr r3, [pc, #64] @ (8001900 ) + 80018be: 2200 movs r2, #0 + 80018c0: 605a str r2, [r3, #4] + hadc1.Init.NbrOfConversion = 1; + 80018c2: 4b0f ldr r3, [pc, #60] @ (8001900 ) + 80018c4: 2201 movs r2, #1 + 80018c6: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) - 8001ad6: 4815 ldr r0, [pc, #84] @ (8001b2c ) - 8001ad8: f001 fc2a bl 8003330 - 8001adc: 4603 mov r3, r0 - 8001ade: 2b00 cmp r3, #0 - 8001ae0: d001 beq.n 8001ae6 + 80018c8: 480d ldr r0, [pc, #52] @ (8001900 ) + 80018ca: f001 f9fd bl 8002cc8 + 80018ce: 4603 mov r3, r0 + 80018d0: 2b00 cmp r3, #0 + 80018d2: d001 beq.n 80018d8 { Error_Handler(); - 8001ae2: f001 f915 bl 8002d10 + 80018d4: f000 ff66 bl 80027a4 } /** Configure Regular Channel */ - sConfig.Channel = ADC_CHANNEL_VREFINT; - 8001ae6: 2311 movs r3, #17 - 8001ae8: 607b str r3, [r7, #4] + sConfig.Channel = ADC_CHANNEL_0; + 80018d8: 2300 movs r3, #0 + 80018da: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; - 8001aea: 2301 movs r3, #1 - 8001aec: 60bb str r3, [r7, #8] - sConfig.SamplingTime = ADC_SAMPLETIME_239CYCLES_5; - 8001aee: 2307 movs r3, #7 - 8001af0: 60fb str r3, [r7, #12] + 80018dc: 2301 movs r3, #1 + 80018de: 60bb str r3, [r7, #8] + sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; + 80018e0: 2300 movs r3, #0 + 80018e2: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 8001af2: 1d3b adds r3, r7, #4 - 8001af4: 4619 mov r1, r3 - 8001af6: 480d ldr r0, [pc, #52] @ (8001b2c ) - 8001af8: f001 fde2 bl 80036c0 - 8001afc: 4603 mov r3, r0 - 8001afe: 2b00 cmp r3, #0 - 8001b00: d001 beq.n 8001b06 + 80018e4: 1d3b adds r3, r7, #4 + 80018e6: 4619 mov r1, r3 + 80018e8: 4805 ldr r0, [pc, #20] @ (8001900 ) + 80018ea: f001 fac5 bl 8002e78 + 80018ee: 4603 mov r3, r0 + 80018f0: 2b00 cmp r3, #0 + 80018f2: d001 beq.n 80018f8 { Error_Handler(); - 8001b02: f001 f905 bl 8002d10 - } - - /** Configure Regular Channel - */ - sConfig.Channel = ADC_CHANNEL_TEMPSENSOR; - 8001b06: 2310 movs r3, #16 - 8001b08: 607b str r3, [r7, #4] - sConfig.Rank = ADC_REGULAR_RANK_2; - 8001b0a: 2302 movs r3, #2 - 8001b0c: 60bb str r3, [r7, #8] - if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 8001b0e: 1d3b adds r3, r7, #4 - 8001b10: 4619 mov r1, r3 - 8001b12: 4806 ldr r0, [pc, #24] @ (8001b2c ) - 8001b14: f001 fdd4 bl 80036c0 - 8001b18: 4603 mov r3, r0 - 8001b1a: 2b00 cmp r3, #0 - 8001b1c: d001 beq.n 8001b22 - { - Error_Handler(); - 8001b1e: f001 f8f7 bl 8002d10 + 80018f4: f000 ff56 bl 80027a4 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } - 8001b22: bf00 nop - 8001b24: 3710 adds r7, #16 - 8001b26: 46bd mov sp, r7 - 8001b28: bd80 pop {r7, pc} - 8001b2a: bf00 nop - 8001b2c: 2000011c .word 0x2000011c - 8001b30: 40012400 .word 0x40012400 + 80018f8: bf00 nop + 80018fa: 3710 adds r7, #16 + 80018fc: 46bd mov sp, r7 + 80018fe: bd80 pop {r7, pc} + 8001900: 20000114 .word 0x20000114 + 8001904: 40012400 .word 0x40012400 -08001b34 : +08001908 : /* ADC2 init function */ void MX_ADC2_Init(void) { - 8001b34: b580 push {r7, lr} - 8001b36: b084 sub sp, #16 - 8001b38: af00 add r7, sp, #0 + 8001908: b580 push {r7, lr} + 800190a: b084 sub sp, #16 + 800190c: af00 add r7, sp, #0 /* USER CODE BEGIN ADC2_Init 0 */ /* USER CODE END ADC2_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 8001b3a: 1d3b adds r3, r7, #4 - 8001b3c: 2200 movs r2, #0 - 8001b3e: 601a str r2, [r3, #0] - 8001b40: 605a str r2, [r3, #4] - 8001b42: 609a str r2, [r3, #8] + 800190e: 1d3b adds r3, r7, #4 + 8001910: 2200 movs r2, #0 + 8001912: 601a str r2, [r3, #0] + 8001914: 605a str r2, [r3, #4] + 8001916: 609a str r2, [r3, #8] /* USER CODE END ADC2_Init 1 */ /** Common config */ hadc2.Instance = ADC2; - 8001b44: 4b18 ldr r3, [pc, #96] @ (8001ba8 ) - 8001b46: 4a19 ldr r2, [pc, #100] @ (8001bac ) - 8001b48: 601a str r2, [r3, #0] + 8001918: 4b18 ldr r3, [pc, #96] @ (800197c ) + 800191a: 4a19 ldr r2, [pc, #100] @ (8001980 ) + 800191c: 601a str r2, [r3, #0] hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; - 8001b4a: 4b17 ldr r3, [pc, #92] @ (8001ba8 ) - 8001b4c: 2200 movs r2, #0 - 8001b4e: 609a str r2, [r3, #8] - hadc2.Init.ContinuousConvMode = DISABLE; - 8001b50: 4b15 ldr r3, [pc, #84] @ (8001ba8 ) - 8001b52: 2200 movs r2, #0 - 8001b54: 731a strb r2, [r3, #12] + 800191e: 4b17 ldr r3, [pc, #92] @ (800197c ) + 8001920: 2200 movs r2, #0 + 8001922: 609a str r2, [r3, #8] + hadc2.Init.ContinuousConvMode = ENABLE; + 8001924: 4b15 ldr r3, [pc, #84] @ (800197c ) + 8001926: 2201 movs r2, #1 + 8001928: 731a strb r2, [r3, #12] hadc2.Init.DiscontinuousConvMode = DISABLE; - 8001b56: 4b14 ldr r3, [pc, #80] @ (8001ba8 ) - 8001b58: 2200 movs r2, #0 - 8001b5a: 751a strb r2, [r3, #20] + 800192a: 4b14 ldr r3, [pc, #80] @ (800197c ) + 800192c: 2200 movs r2, #0 + 800192e: 751a strb r2, [r3, #20] hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 8001b5c: 4b12 ldr r3, [pc, #72] @ (8001ba8 ) - 8001b5e: f44f 2260 mov.w r2, #917504 @ 0xe0000 - 8001b62: 61da str r2, [r3, #28] + 8001930: 4b12 ldr r3, [pc, #72] @ (800197c ) + 8001932: f44f 2260 mov.w r2, #917504 @ 0xe0000 + 8001936: 61da str r2, [r3, #28] hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8001b64: 4b10 ldr r3, [pc, #64] @ (8001ba8 ) - 8001b66: 2200 movs r2, #0 - 8001b68: 605a str r2, [r3, #4] + 8001938: 4b10 ldr r3, [pc, #64] @ (800197c ) + 800193a: 2200 movs r2, #0 + 800193c: 605a str r2, [r3, #4] hadc2.Init.NbrOfConversion = 1; - 8001b6a: 4b0f ldr r3, [pc, #60] @ (8001ba8 ) - 8001b6c: 2201 movs r2, #1 - 8001b6e: 611a str r2, [r3, #16] + 800193e: 4b0f ldr r3, [pc, #60] @ (800197c ) + 8001940: 2201 movs r2, #1 + 8001942: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc2) != HAL_OK) - 8001b70: 480d ldr r0, [pc, #52] @ (8001ba8 ) - 8001b72: f001 fbdd bl 8003330 - 8001b76: 4603 mov r3, r0 - 8001b78: 2b00 cmp r3, #0 - 8001b7a: d001 beq.n 8001b80 + 8001944: 480d ldr r0, [pc, #52] @ (800197c ) + 8001946: f001 f9bf bl 8002cc8 + 800194a: 4603 mov r3, r0 + 800194c: 2b00 cmp r3, #0 + 800194e: d001 beq.n 8001954 { Error_Handler(); - 8001b7c: f001 f8c8 bl 8002d10 + 8001950: f000 ff28 bl 80027a4 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_1; - 8001b80: 2301 movs r3, #1 - 8001b82: 607b str r3, [r7, #4] + 8001954: 2301 movs r3, #1 + 8001956: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; - 8001b84: 2301 movs r3, #1 - 8001b86: 60bb str r3, [r7, #8] + 8001958: 2301 movs r3, #1 + 800195a: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; - 8001b88: 2300 movs r3, #0 - 8001b8a: 60fb str r3, [r7, #12] + 800195c: 2300 movs r3, #0 + 800195e: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) - 8001b8c: 1d3b adds r3, r7, #4 - 8001b8e: 4619 mov r1, r3 - 8001b90: 4805 ldr r0, [pc, #20] @ (8001ba8 ) - 8001b92: f001 fd95 bl 80036c0 - 8001b96: 4603 mov r3, r0 - 8001b98: 2b00 cmp r3, #0 - 8001b9a: d001 beq.n 8001ba0 + 8001960: 1d3b adds r3, r7, #4 + 8001962: 4619 mov r1, r3 + 8001964: 4805 ldr r0, [pc, #20] @ (800197c ) + 8001966: f001 fa87 bl 8002e78 + 800196a: 4603 mov r3, r0 + 800196c: 2b00 cmp r3, #0 + 800196e: d001 beq.n 8001974 { Error_Handler(); - 8001b9c: f001 f8b8 bl 8002d10 + 8001970: f000 ff18 bl 80027a4 } /* USER CODE BEGIN ADC2_Init 2 */ /* USER CODE END ADC2_Init 2 */ } - 8001ba0: bf00 nop - 8001ba2: 3710 adds r7, #16 - 8001ba4: 46bd mov sp, r7 - 8001ba6: bd80 pop {r7, pc} - 8001ba8: 2000014c .word 0x2000014c - 8001bac: 40012800 .word 0x40012800 + 8001974: bf00 nop + 8001976: 3710 adds r7, #16 + 8001978: 46bd mov sp, r7 + 800197a: bd80 pop {r7, pc} + 800197c: 20000144 .word 0x20000144 + 8001980: 40012800 .word 0x40012800 -08001bb0 : +08001984 : void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { - 8001bb0: b580 push {r7, lr} - 8001bb2: b08a sub sp, #40 @ 0x28 - 8001bb4: af00 add r7, sp, #0 - 8001bb6: 6078 str r0, [r7, #4] + 8001984: b580 push {r7, lr} + 8001986: b08a sub sp, #40 @ 0x28 + 8001988: af00 add r7, sp, #0 + 800198a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001bb8: f107 0318 add.w r3, r7, #24 - 8001bbc: 2200 movs r2, #0 - 8001bbe: 601a str r2, [r3, #0] - 8001bc0: 605a str r2, [r3, #4] - 8001bc2: 609a str r2, [r3, #8] - 8001bc4: 60da str r2, [r3, #12] + 800198c: f107 0318 add.w r3, r7, #24 + 8001990: 2200 movs r2, #0 + 8001992: 601a str r2, [r3, #0] + 8001994: 605a str r2, [r3, #4] + 8001996: 609a str r2, [r3, #8] + 8001998: 60da str r2, [r3, #12] if(adcHandle->Instance==ADC1) - 8001bc6: 687b ldr r3, [r7, #4] - 8001bc8: 681b ldr r3, [r3, #0] - 8001bca: 4a3c ldr r2, [pc, #240] @ (8001cbc ) - 8001bcc: 4293 cmp r3, r2 - 8001bce: d14a bne.n 8001c66 + 800199a: 687b ldr r3, [r7, #4] + 800199c: 681b ldr r3, [r3, #0] + 800199e: 4a28 ldr r2, [pc, #160] @ (8001a40 ) + 80019a0: 4293 cmp r3, r2 + 80019a2: d122 bne.n 80019ea { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* ADC1 clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); - 8001bd0: 4b3b ldr r3, [pc, #236] @ (8001cc0 ) - 8001bd2: 699b ldr r3, [r3, #24] - 8001bd4: 4a3a ldr r2, [pc, #232] @ (8001cc0 ) - 8001bd6: f443 7300 orr.w r3, r3, #512 @ 0x200 - 8001bda: 6193 str r3, [r2, #24] - 8001bdc: 4b38 ldr r3, [pc, #224] @ (8001cc0 ) - 8001bde: 699b ldr r3, [r3, #24] - 8001be0: f403 7300 and.w r3, r3, #512 @ 0x200 - 8001be4: 617b str r3, [r7, #20] - 8001be6: 697b ldr r3, [r7, #20] + 80019a4: 4b27 ldr r3, [pc, #156] @ (8001a44 ) + 80019a6: 699b ldr r3, [r3, #24] + 80019a8: 4a26 ldr r2, [pc, #152] @ (8001a44 ) + 80019aa: f443 7300 orr.w r3, r3, #512 @ 0x200 + 80019ae: 6193 str r3, [r2, #24] + 80019b0: 4b24 ldr r3, [pc, #144] @ (8001a44 ) + 80019b2: 699b ldr r3, [r3, #24] + 80019b4: f403 7300 and.w r3, r3, #512 @ 0x200 + 80019b8: 617b str r3, [r7, #20] + 80019ba: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001be8: 4b35 ldr r3, [pc, #212] @ (8001cc0 ) - 8001bea: 699b ldr r3, [r3, #24] - 8001bec: 4a34 ldr r2, [pc, #208] @ (8001cc0 ) - 8001bee: f043 0304 orr.w r3, r3, #4 - 8001bf2: 6193 str r3, [r2, #24] - 8001bf4: 4b32 ldr r3, [pc, #200] @ (8001cc0 ) - 8001bf6: 699b ldr r3, [r3, #24] - 8001bf8: f003 0304 and.w r3, r3, #4 - 8001bfc: 613b str r3, [r7, #16] - 8001bfe: 693b ldr r3, [r7, #16] + 80019bc: 4b21 ldr r3, [pc, #132] @ (8001a44 ) + 80019be: 699b ldr r3, [r3, #24] + 80019c0: 4a20 ldr r2, [pc, #128] @ (8001a44 ) + 80019c2: f043 0304 orr.w r3, r3, #4 + 80019c6: 6193 str r3, [r2, #24] + 80019c8: 4b1e ldr r3, [pc, #120] @ (8001a44 ) + 80019ca: 699b ldr r3, [r3, #24] + 80019cc: f003 0304 and.w r3, r3, #4 + 80019d0: 613b str r3, [r7, #16] + 80019d2: 693b ldr r3, [r7, #16] /**ADC1 GPIO Configuration PA0-WKUP ------> ADC1_IN0 PA1 ------> ADC1_IN1 */ GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin; - 8001c00: 2303 movs r3, #3 - 8001c02: 61bb str r3, [r7, #24] + 80019d4: 2303 movs r3, #3 + 80019d6: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8001c04: 2303 movs r3, #3 - 8001c06: 61fb str r3, [r7, #28] + 80019d8: 2303 movs r3, #3 + 80019da: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001c08: f107 0318 add.w r3, r7, #24 - 8001c0c: 4619 mov r1, r3 - 8001c0e: 482d ldr r0, [pc, #180] @ (8001cc4 ) - 8001c10: f002 fdae bl 8004770 - - /* ADC1 DMA Init */ - /* ADC1 Init */ - hdma_adc1.Instance = DMA1_Channel1; - 8001c14: 4b2c ldr r3, [pc, #176] @ (8001cc8 ) - 8001c16: 4a2d ldr r2, [pc, #180] @ (8001ccc ) - 8001c18: 601a str r2, [r3, #0] - hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY; - 8001c1a: 4b2b ldr r3, [pc, #172] @ (8001cc8 ) - 8001c1c: 2200 movs r2, #0 - 8001c1e: 605a str r2, [r3, #4] - hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE; - 8001c20: 4b29 ldr r3, [pc, #164] @ (8001cc8 ) - 8001c22: 2200 movs r2, #0 - 8001c24: 609a str r2, [r3, #8] - hdma_adc1.Init.MemInc = DMA_MINC_ENABLE; - 8001c26: 4b28 ldr r3, [pc, #160] @ (8001cc8 ) - 8001c28: 2280 movs r2, #128 @ 0x80 - 8001c2a: 60da str r2, [r3, #12] - hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; - 8001c2c: 4b26 ldr r3, [pc, #152] @ (8001cc8 ) - 8001c2e: f44f 7280 mov.w r2, #256 @ 0x100 - 8001c32: 611a str r2, [r3, #16] - hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; - 8001c34: 4b24 ldr r3, [pc, #144] @ (8001cc8 ) - 8001c36: f44f 6280 mov.w r2, #1024 @ 0x400 - 8001c3a: 615a str r2, [r3, #20] - hdma_adc1.Init.Mode = DMA_CIRCULAR; - 8001c3c: 4b22 ldr r3, [pc, #136] @ (8001cc8 ) - 8001c3e: 2220 movs r2, #32 - 8001c40: 619a str r2, [r3, #24] - hdma_adc1.Init.Priority = DMA_PRIORITY_LOW; - 8001c42: 4b21 ldr r3, [pc, #132] @ (8001cc8 ) - 8001c44: 2200 movs r2, #0 - 8001c46: 61da str r2, [r3, #28] - if (HAL_DMA_Init(&hdma_adc1) != HAL_OK) - 8001c48: 481f ldr r0, [pc, #124] @ (8001cc8 ) - 8001c4a: f002 f8ef bl 8003e2c - 8001c4e: 4603 mov r3, r0 - 8001c50: 2b00 cmp r3, #0 - 8001c52: d001 beq.n 8001c58 - { - Error_Handler(); - 8001c54: f001 f85c bl 8002d10 - } - - __HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1); - 8001c58: 687b ldr r3, [r7, #4] - 8001c5a: 4a1b ldr r2, [pc, #108] @ (8001cc8 ) - 8001c5c: 621a str r2, [r3, #32] - 8001c5e: 4a1a ldr r2, [pc, #104] @ (8001cc8 ) - 8001c60: 687b ldr r3, [r7, #4] - 8001c62: 6253 str r3, [r2, #36] @ 0x24 + 80019dc: f107 0318 add.w r3, r7, #24 + 80019e0: 4619 mov r1, r3 + 80019e2: 4819 ldr r0, [pc, #100] @ (8001a48 ) + 80019e4: f001 ff42 bl 800386c /* USER CODE BEGIN ADC2_MspInit 1 */ /* USER CODE END ADC2_MspInit 1 */ } } - 8001c64: e026 b.n 8001cb4 + 80019e8: e026 b.n 8001a38 else if(adcHandle->Instance==ADC2) - 8001c66: 687b ldr r3, [r7, #4] - 8001c68: 681b ldr r3, [r3, #0] - 8001c6a: 4a19 ldr r2, [pc, #100] @ (8001cd0 ) - 8001c6c: 4293 cmp r3, r2 - 8001c6e: d121 bne.n 8001cb4 + 80019ea: 687b ldr r3, [r7, #4] + 80019ec: 681b ldr r3, [r3, #0] + 80019ee: 4a17 ldr r2, [pc, #92] @ (8001a4c ) + 80019f0: 4293 cmp r3, r2 + 80019f2: d121 bne.n 8001a38 __HAL_RCC_ADC2_CLK_ENABLE(); - 8001c70: 4b13 ldr r3, [pc, #76] @ (8001cc0 ) - 8001c72: 699b ldr r3, [r3, #24] - 8001c74: 4a12 ldr r2, [pc, #72] @ (8001cc0 ) - 8001c76: f443 6380 orr.w r3, r3, #1024 @ 0x400 - 8001c7a: 6193 str r3, [r2, #24] - 8001c7c: 4b10 ldr r3, [pc, #64] @ (8001cc0 ) - 8001c7e: 699b ldr r3, [r3, #24] - 8001c80: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8001c84: 60fb str r3, [r7, #12] - 8001c86: 68fb ldr r3, [r7, #12] + 80019f4: 4b13 ldr r3, [pc, #76] @ (8001a44 ) + 80019f6: 699b ldr r3, [r3, #24] + 80019f8: 4a12 ldr r2, [pc, #72] @ (8001a44 ) + 80019fa: f443 6380 orr.w r3, r3, #1024 @ 0x400 + 80019fe: 6193 str r3, [r2, #24] + 8001a00: 4b10 ldr r3, [pc, #64] @ (8001a44 ) + 8001a02: 699b ldr r3, [r3, #24] + 8001a04: f403 6380 and.w r3, r3, #1024 @ 0x400 + 8001a08: 60fb str r3, [r7, #12] + 8001a0a: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001c88: 4b0d ldr r3, [pc, #52] @ (8001cc0 ) - 8001c8a: 699b ldr r3, [r3, #24] - 8001c8c: 4a0c ldr r2, [pc, #48] @ (8001cc0 ) - 8001c8e: f043 0304 orr.w r3, r3, #4 - 8001c92: 6193 str r3, [r2, #24] - 8001c94: 4b0a ldr r3, [pc, #40] @ (8001cc0 ) - 8001c96: 699b ldr r3, [r3, #24] - 8001c98: f003 0304 and.w r3, r3, #4 - 8001c9c: 60bb str r3, [r7, #8] - 8001c9e: 68bb ldr r3, [r7, #8] + 8001a0c: 4b0d ldr r3, [pc, #52] @ (8001a44 ) + 8001a0e: 699b ldr r3, [r3, #24] + 8001a10: 4a0c ldr r2, [pc, #48] @ (8001a44 ) + 8001a12: f043 0304 orr.w r3, r3, #4 + 8001a16: 6193 str r3, [r2, #24] + 8001a18: 4b0a ldr r3, [pc, #40] @ (8001a44 ) + 8001a1a: 699b ldr r3, [r3, #24] + 8001a1c: f003 0304 and.w r3, r3, #4 + 8001a20: 60bb str r3, [r7, #8] + 8001a22: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin; - 8001ca0: 2303 movs r3, #3 - 8001ca2: 61bb str r3, [r7, #24] + 8001a24: 2303 movs r3, #3 + 8001a26: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8001ca4: 2303 movs r3, #3 - 8001ca6: 61fb str r3, [r7, #28] + 8001a28: 2303 movs r3, #3 + 8001a2a: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001ca8: f107 0318 add.w r3, r7, #24 - 8001cac: 4619 mov r1, r3 - 8001cae: 4805 ldr r0, [pc, #20] @ (8001cc4 ) - 8001cb0: f002 fd5e bl 8004770 + 8001a2c: f107 0318 add.w r3, r7, #24 + 8001a30: 4619 mov r1, r3 + 8001a32: 4805 ldr r0, [pc, #20] @ (8001a48 ) + 8001a34: f001 ff1a bl 800386c } - 8001cb4: bf00 nop - 8001cb6: 3728 adds r7, #40 @ 0x28 - 8001cb8: 46bd mov sp, r7 - 8001cba: bd80 pop {r7, pc} - 8001cbc: 40012400 .word 0x40012400 - 8001cc0: 40021000 .word 0x40021000 - 8001cc4: 40010800 .word 0x40010800 - 8001cc8: 2000017c .word 0x2000017c - 8001ccc: 40020008 .word 0x40020008 - 8001cd0: 40012800 .word 0x40012800 + 8001a38: bf00 nop + 8001a3a: 3728 adds r7, #40 @ 0x28 + 8001a3c: 46bd mov sp, r7 + 8001a3e: bd80 pop {r7, pc} + 8001a40: 40012400 .word 0x40012400 + 8001a44: 40021000 .word 0x40021000 + 8001a48: 40010800 .word 0x40010800 + 8001a4c: 40012800 .word 0x40012800 -08001cd4 : +08001a50 : ADS1015_I2C i2c; float ph_dut_samples[ADS1015_PH_AVERAGES]={0}; // Write the register static void writeRegister(ADS1015_I2C *i2c, uint8_t reg, uint16_t value) { - 8001cd4: b580 push {r7, lr} - 8001cd6: b086 sub sp, #24 - 8001cd8: af02 add r7, sp, #8 - 8001cda: 6078 str r0, [r7, #4] - 8001cdc: 460b mov r3, r1 - 8001cde: 70fb strb r3, [r7, #3] - 8001ce0: 4613 mov r3, r2 - 8001ce2: 803b strh r3, [r7, #0] + 8001a50: b580 push {r7, lr} + 8001a52: b086 sub sp, #24 + 8001a54: af02 add r7, sp, #8 + 8001a56: 6078 str r0, [r7, #4] + 8001a58: 460b mov r3, r1 + 8001a5a: 70fb strb r3, [r7, #3] + 8001a5c: 4613 mov r3, r2 + 8001a5e: 803b strh r3, [r7, #0] uint8_t pData[3] = { reg, (uint8_t) (value >> 8), (uint8_t) (value & 0xFF) }; - 8001ce4: 78fb ldrb r3, [r7, #3] - 8001ce6: 733b strb r3, [r7, #12] - 8001ce8: 883b ldrh r3, [r7, #0] - 8001cea: 0a1b lsrs r3, r3, #8 - 8001cec: b29b uxth r3, r3 - 8001cee: b2db uxtb r3, r3 - 8001cf0: 737b strb r3, [r7, #13] - 8001cf2: 883b ldrh r3, [r7, #0] - 8001cf4: b2db uxtb r3, r3 - 8001cf6: 73bb strb r3, [r7, #14] + 8001a60: 78fb ldrb r3, [r7, #3] + 8001a62: 733b strb r3, [r7, #12] + 8001a64: 883b ldrh r3, [r7, #0] + 8001a66: 0a1b lsrs r3, r3, #8 + 8001a68: b29b uxth r3, r3 + 8001a6a: b2db uxtb r3, r3 + 8001a6c: 737b strb r3, [r7, #13] + 8001a6e: 883b ldrh r3, [r7, #0] + 8001a70: b2db uxtb r3, r3 + 8001a72: 73bb strb r3, [r7, #14] HAL_I2C_Master_Transmit(i2c->hi2c, i2c->m_i2cAddress, pData, 3, 10); - 8001cf8: 687b ldr r3, [r7, #4] - 8001cfa: 68d8 ldr r0, [r3, #12] - 8001cfc: 687b ldr r3, [r7, #4] - 8001cfe: 8819 ldrh r1, [r3, #0] - 8001d00: f107 020c add.w r2, r7, #12 - 8001d04: 230a movs r3, #10 - 8001d06: 9300 str r3, [sp, #0] - 8001d08: 2303 movs r3, #3 - 8001d0a: f003 f841 bl 8004d90 + 8001a74: 687b ldr r3, [r7, #4] + 8001a76: 68d8 ldr r0, [r3, #12] + 8001a78: 687b ldr r3, [r7, #4] + 8001a7a: 8819 ldrh r1, [r3, #0] + 8001a7c: f107 020c add.w r2, r7, #12 + 8001a80: 230a movs r3, #10 + 8001a82: 9300 str r3, [sp, #0] + 8001a84: 2303 movs r3, #3 + 8001a86: f002 fa01 bl 8003e8c } - 8001d0e: bf00 nop - 8001d10: 3710 adds r7, #16 - 8001d12: 46bd mov sp, r7 - 8001d14: bd80 pop {r7, pc} + 8001a8a: bf00 nop + 8001a8c: 3710 adds r7, #16 + 8001a8e: 46bd mov sp, r7 + 8001a90: bd80 pop {r7, pc} -08001d16 : +08001a92 : // Read the register static uint16_t readRegister(ADS1015_I2C *i2c, uint8_t reg) { - 8001d16: b580 push {r7, lr} - 8001d18: b086 sub sp, #24 - 8001d1a: af02 add r7, sp, #8 - 8001d1c: 6078 str r0, [r7, #4] - 8001d1e: 460b mov r3, r1 - 8001d20: 70fb strb r3, [r7, #3] + 8001a92: b580 push {r7, lr} + 8001a94: b086 sub sp, #24 + 8001a96: af02 add r7, sp, #8 + 8001a98: 6078 str r0, [r7, #4] + 8001a9a: 460b mov r3, r1 + 8001a9c: 70fb strb r3, [r7, #3] HAL_I2C_Master_Transmit(i2c->hi2c, i2c->m_i2cAddress, ®, 1, 10); - 8001d22: 687b ldr r3, [r7, #4] - 8001d24: 68d8 ldr r0, [r3, #12] - 8001d26: 687b ldr r3, [r7, #4] - 8001d28: 8819 ldrh r1, [r3, #0] - 8001d2a: 1cfa adds r2, r7, #3 - 8001d2c: 230a movs r3, #10 - 8001d2e: 9300 str r3, [sp, #0] - 8001d30: 2301 movs r3, #1 - 8001d32: f003 f82d bl 8004d90 + 8001a9e: 687b ldr r3, [r7, #4] + 8001aa0: 68d8 ldr r0, [r3, #12] + 8001aa2: 687b ldr r3, [r7, #4] + 8001aa4: 8819 ldrh r1, [r3, #0] + 8001aa6: 1cfa adds r2, r7, #3 + 8001aa8: 230a movs r3, #10 + 8001aaa: 9300 str r3, [sp, #0] + 8001aac: 2301 movs r3, #1 + 8001aae: f002 f9ed bl 8003e8c uint8_t pData[2] = { 0, 0 }; - 8001d36: 2300 movs r3, #0 - 8001d38: 81bb strh r3, [r7, #12] + 8001ab2: 2300 movs r3, #0 + 8001ab4: 81bb strh r3, [r7, #12] HAL_I2C_Master_Receive(i2c->hi2c, i2c->m_i2cAddress, pData, 2, 10); - 8001d3a: 687b ldr r3, [r7, #4] - 8001d3c: 68d8 ldr r0, [r3, #12] - 8001d3e: 687b ldr r3, [r7, #4] - 8001d40: 8819 ldrh r1, [r3, #0] - 8001d42: f107 020c add.w r2, r7, #12 - 8001d46: 230a movs r3, #10 - 8001d48: 9300 str r3, [sp, #0] - 8001d4a: 2302 movs r3, #2 - 8001d4c: f003 f91e bl 8004f8c + 8001ab6: 687b ldr r3, [r7, #4] + 8001ab8: 68d8 ldr r0, [r3, #12] + 8001aba: 687b ldr r3, [r7, #4] + 8001abc: 8819 ldrh r1, [r3, #0] + 8001abe: f107 020c add.w r2, r7, #12 + 8001ac2: 230a movs r3, #10 + 8001ac4: 9300 str r3, [sp, #0] + 8001ac6: 2302 movs r3, #2 + 8001ac8: f002 fade bl 8004088 return ((pData[0] << 8) | pData[1]); - 8001d50: 7b3b ldrb r3, [r7, #12] - 8001d52: b21b sxth r3, r3 - 8001d54: 021b lsls r3, r3, #8 - 8001d56: b21a sxth r2, r3 - 8001d58: 7b7b ldrb r3, [r7, #13] - 8001d5a: b21b sxth r3, r3 - 8001d5c: 4313 orrs r3, r2 - 8001d5e: b21b sxth r3, r3 - 8001d60: b29b uxth r3, r3 + 8001acc: 7b3b ldrb r3, [r7, #12] + 8001ace: b21b sxth r3, r3 + 8001ad0: 021b lsls r3, r3, #8 + 8001ad2: b21a sxth r2, r3 + 8001ad4: 7b7b ldrb r3, [r7, #13] + 8001ad6: b21b sxth r3, r3 + 8001ad8: 4313 orrs r3, r2 + 8001ada: b21b sxth r3, r3 + 8001adc: b29b uxth r3, r3 } - 8001d62: 4618 mov r0, r3 - 8001d64: 3710 adds r7, #16 - 8001d66: 46bd mov sp, r7 - 8001d68: bd80 pop {r7, pc} + 8001ade: 4618 mov r0, r3 + 8001ae0: 3710 adds r7, #16 + 8001ae2: 46bd mov sp, r7 + 8001ae4: bd80 pop {r7, pc} -08001d6a : +08001ae6 : HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_SET); // This MUST have GPIO PA5 ready to use - ERROR I2C - Wrong address } // Declare an ADS1015 structure void ADS1015(ADS1015_I2C *i2c, I2C_HandleTypeDef *hi2c, uint8_t i2cAddress) { - 8001d6a: b480 push {r7} - 8001d6c: b085 sub sp, #20 - 8001d6e: af00 add r7, sp, #0 - 8001d70: 60f8 str r0, [r7, #12] - 8001d72: 60b9 str r1, [r7, #8] - 8001d74: 4613 mov r3, r2 - 8001d76: 71fb strb r3, [r7, #7] + 8001ae6: b480 push {r7} + 8001ae8: b085 sub sp, #20 + 8001aea: af00 add r7, sp, #0 + 8001aec: 60f8 str r0, [r7, #12] + 8001aee: 60b9 str r1, [r7, #8] + 8001af0: 4613 mov r3, r2 + 8001af2: 71fb strb r3, [r7, #7] i2c->hi2c = hi2c; - 8001d78: 68fb ldr r3, [r7, #12] - 8001d7a: 68ba ldr r2, [r7, #8] - 8001d7c: 60da str r2, [r3, #12] + 8001af4: 68fb ldr r3, [r7, #12] + 8001af6: 68ba ldr r2, [r7, #8] + 8001af8: 60da str r2, [r3, #12] i2c->m_i2cAddress = i2cAddress << 1; // It's Important to shift the address << 1 - 8001d7e: 79fb ldrb r3, [r7, #7] - 8001d80: b29b uxth r3, r3 - 8001d82: 005b lsls r3, r3, #1 - 8001d84: b29a uxth r2, r3 - 8001d86: 68fb ldr r3, [r7, #12] - 8001d88: 801a strh r2, [r3, #0] + 8001afa: 79fb ldrb r3, [r7, #7] + 8001afc: b29b uxth r3, r3 + 8001afe: 005b lsls r3, r3, #1 + 8001b00: b29a uxth r2, r3 + 8001b02: 68fb ldr r3, [r7, #12] + 8001b04: 801a strh r2, [r3, #0] i2c->m_conversionDelay = ADS1015_CONVERSIONDELAY; - 8001d8a: 68fb ldr r3, [r7, #12] - 8001d8c: 2204 movs r2, #4 - 8001d8e: 605a str r2, [r3, #4] + 8001b06: 68fb ldr r3, [r7, #12] + 8001b08: 2204 movs r2, #4 + 8001b0a: 605a str r2, [r3, #4] i2c->m_bitShift = 4; - 8001d90: 68fb ldr r3, [r7, #12] - 8001d92: 2204 movs r2, #4 - 8001d94: 721a strb r2, [r3, #8] + 8001b0c: 68fb ldr r3, [r7, #12] + 8001b0e: 2204 movs r2, #4 + 8001b10: 721a strb r2, [r3, #8] i2c->m_gain = GAIN_TWOTHIRDS; /* +/- 6.144V range (limited to VDD +0.3V max!) */ - 8001d96: 68fb ldr r3, [r7, #12] - 8001d98: 2200 movs r2, #0 - 8001d9a: 815a strh r2, [r3, #10] + 8001b12: 68fb ldr r3, [r7, #12] + 8001b14: 2200 movs r2, #0 + 8001b16: 815a strh r2, [r3, #10] //ADSbegin(i2c); //Ready is not used } - 8001d9c: bf00 nop - 8001d9e: 3714 adds r7, #20 - 8001da0: 46bd mov sp, r7 - 8001da2: bc80 pop {r7} - 8001da4: 4770 bx lr + 8001b18: bf00 nop + 8001b1a: 3714 adds r7, #20 + 8001b1c: 46bd mov sp, r7 + 8001b1e: bc80 pop {r7} + 8001b20: 4770 bx lr -08001da6 : +08001b22 : // ADSsetGain(GAIN_TWO); // 2x gain +/- 2.048V 1 bit = 1mV 0.0625mV // ADSsetGain(GAIN_FOUR); // 4x gain +/- 1.024V 1 bit = 0.5mV 0.03125mV // ADSsetGain(GAIN_EIGHT); // 8x gain +/- 0.512V 1 bit = 0.25mV 0.015625mV // ADSsetGain(GAIN_SIXTEEN); // 16x gain +/- 0.256V 1 bit = 0.125mV 0.0078125mV */ void ADSsetGain(ADS1015_I2C *i2c, adsGain_t gain) { - 8001da6: b480 push {r7} - 8001da8: b083 sub sp, #12 - 8001daa: af00 add r7, sp, #0 - 8001dac: 6078 str r0, [r7, #4] - 8001dae: 460b mov r3, r1 - 8001db0: 807b strh r3, [r7, #2] + 8001b22: b480 push {r7} + 8001b24: b083 sub sp, #12 + 8001b26: af00 add r7, sp, #0 + 8001b28: 6078 str r0, [r7, #4] + 8001b2a: 460b mov r3, r1 + 8001b2c: 807b strh r3, [r7, #2] i2c->m_gain = gain; - 8001db2: 687b ldr r3, [r7, #4] - 8001db4: 887a ldrh r2, [r7, #2] - 8001db6: 815a strh r2, [r3, #10] + 8001b2e: 687b ldr r3, [r7, #4] + 8001b30: 887a ldrh r2, [r7, #2] + 8001b32: 815a strh r2, [r3, #10] } - 8001db8: bf00 nop - 8001dba: 370c adds r7, #12 - 8001dbc: 46bd mov sp, r7 - 8001dbe: bc80 pop {r7} - 8001dc0: 4770 bx lr + 8001b34: bf00 nop + 8001b36: 370c adds r7, #12 + 8001b38: 46bd mov sp, r7 + 8001b3a: bc80 pop {r7} + 8001b3c: 4770 bx lr -08001dc2 : +08001b3e : /* * Reads the conversion results, measuring the voltage * difference between the P (AIN0) and N (AIN1) input. Generates * a signed value since the difference can be either positive or negative. */ int16_t ADSreadADC_Differential_0_1(ADS1015_I2C *i2c) { - 8001dc2: b580 push {r7, lr} - 8001dc4: b084 sub sp, #16 - 8001dc6: af00 add r7, sp, #0 - 8001dc8: 6078 str r0, [r7, #4] + 8001b3e: b580 push {r7, lr} + 8001b40: b084 sub sp, #16 + 8001b42: af00 add r7, sp, #0 + 8001b44: 6078 str r0, [r7, #4] // Start with default values uint16_t config = - 8001dca: f240 1303 movw r3, #259 @ 0x103 - 8001dce: 81bb strh r3, [r7, #12] + 8001b46: f240 1303 movw r3, #259 @ 0x103 + 8001b4a: 81bb strh r3, [r7, #12] ADS1015_REG_CONFIG_CMODE_TRAD | // Traditional comparator (default val) ADS1015_REG_CONFIG_DR_128SPS | // 128 samples per second (default) ADS1015_REG_CONFIG_MODE_SINGLE; // Single-shot mode (default) // Set PGA/voltage range config |= i2c->m_gain; - 8001dd0: 687b ldr r3, [r7, #4] - 8001dd2: 895a ldrh r2, [r3, #10] - 8001dd4: 89bb ldrh r3, [r7, #12] - 8001dd6: 4313 orrs r3, r2 - 8001dd8: 81bb strh r3, [r7, #12] + 8001b4c: 687b ldr r3, [r7, #4] + 8001b4e: 895a ldrh r2, [r3, #10] + 8001b50: 89bb ldrh r3, [r7, #12] + 8001b52: 4313 orrs r3, r2 + 8001b54: 81bb strh r3, [r7, #12] // Set channels config |= ADS1015_REG_CONFIG_MUX_DIFF_0_1; // AIN0 = P, AIN1 = N // Set 'start single-conversion' bit config |= ADS1015_REG_CONFIG_OS_SINGLE; - 8001dda: 89bb ldrh r3, [r7, #12] - 8001ddc: ea6f 4343 mvn.w r3, r3, lsl #17 - 8001de0: ea6f 4353 mvn.w r3, r3, lsr #17 - 8001de4: 81bb strh r3, [r7, #12] + 8001b56: 89bb ldrh r3, [r7, #12] + 8001b58: ea6f 4343 mvn.w r3, r3, lsl #17 + 8001b5c: ea6f 4353 mvn.w r3, r3, lsr #17 + 8001b60: 81bb strh r3, [r7, #12] // Write config register to the ADC writeRegister(i2c, ADS1015_REG_POINTER_CONFIG, config); - 8001de6: 89bb ldrh r3, [r7, #12] - 8001de8: 461a mov r2, r3 - 8001dea: 2101 movs r1, #1 - 8001dec: 6878 ldr r0, [r7, #4] - 8001dee: f7ff ff71 bl 8001cd4 + 8001b62: 89bb ldrh r3, [r7, #12] + 8001b64: 461a mov r2, r3 + 8001b66: 2101 movs r1, #1 + 8001b68: 6878 ldr r0, [r7, #4] + 8001b6a: f7ff ff71 bl 8001a50 // Wait for the conversion to complete HAL_Delay(i2c->m_conversionDelay); - 8001df2: 687b ldr r3, [r7, #4] - 8001df4: 685b ldr r3, [r3, #4] - 8001df6: 4618 mov r0, r3 - 8001df8: f001 fa76 bl 80032e8 + 8001b6e: 687b ldr r3, [r7, #4] + 8001b70: 685b ldr r3, [r3, #4] + 8001b72: 4618 mov r0, r3 + 8001b74: f001 f884 bl 8002c80 // Read the conversion results uint16_t res = readRegister(i2c, ADS1015_REG_POINTER_CONVERT) >> i2c->m_bitShift; - 8001dfc: 2100 movs r1, #0 - 8001dfe: 6878 ldr r0, [r7, #4] - 8001e00: f7ff ff89 bl 8001d16 - 8001e04: 4603 mov r3, r0 - 8001e06: 461a mov r2, r3 - 8001e08: 687b ldr r3, [r7, #4] - 8001e0a: 7a1b ldrb r3, [r3, #8] - 8001e0c: fa42 f303 asr.w r3, r2, r3 - 8001e10: 81fb strh r3, [r7, #14] + 8001b78: 2100 movs r1, #0 + 8001b7a: 6878 ldr r0, [r7, #4] + 8001b7c: f7ff ff89 bl 8001a92 + 8001b80: 4603 mov r3, r0 + 8001b82: 461a mov r2, r3 + 8001b84: 687b ldr r3, [r7, #4] + 8001b86: 7a1b ldrb r3, [r3, #8] + 8001b88: fa42 f303 asr.w r3, r2, r3 + 8001b8c: 81fb strh r3, [r7, #14] if (i2c->m_bitShift == 0) { - 8001e12: 687b ldr r3, [r7, #4] - 8001e14: 7a1b ldrb r3, [r3, #8] - 8001e16: 2b00 cmp r3, #0 - 8001e18: d102 bne.n 8001e20 + 8001b8e: 687b ldr r3, [r7, #4] + 8001b90: 7a1b ldrb r3, [r3, #8] + 8001b92: 2b00 cmp r3, #0 + 8001b94: d102 bne.n 8001b9c return (int16_t) res; - 8001e1a: f9b7 300e ldrsh.w r3, [r7, #14] - 8001e1e: e00b b.n 8001e38 + 8001b96: f9b7 300e ldrsh.w r3, [r7, #14] + 8001b9a: e00b b.n 8001bb4 } else { // Shift 12-bit results right 4 bits for the ADS1015, // making sure we keep the sign bit intact if (res > 0x07FF) { - 8001e20: 89fb ldrh r3, [r7, #14] - 8001e22: f5b3 6f00 cmp.w r3, #2048 @ 0x800 - 8001e26: d305 bcc.n 8001e34 + 8001b9c: 89fb ldrh r3, [r7, #14] + 8001b9e: f5b3 6f00 cmp.w r3, #2048 @ 0x800 + 8001ba2: d305 bcc.n 8001bb0 // negative number - extend the sign to 16th bit res |= 0xF000; - 8001e28: 89fb ldrh r3, [r7, #14] - 8001e2a: ea6f 5303 mvn.w r3, r3, lsl #20 - 8001e2e: ea6f 5313 mvn.w r3, r3, lsr #20 - 8001e32: 81fb strh r3, [r7, #14] + 8001ba4: 89fb ldrh r3, [r7, #14] + 8001ba6: ea6f 5303 mvn.w r3, r3, lsl #20 + 8001baa: ea6f 5313 mvn.w r3, r3, lsr #20 + 8001bae: 81fb strh r3, [r7, #14] } return (int16_t) res; - 8001e34: f9b7 300e ldrsh.w r3, [r7, #14] + 8001bb0: f9b7 300e ldrsh.w r3, [r7, #14] } } - 8001e38: 4618 mov r0, r3 - 8001e3a: 3710 adds r7, #16 - 8001e3c: 46bd mov sp, r7 - 8001e3e: bd80 pop {r7, pc} + 8001bb4: 4618 mov r0, r3 + 8001bb6: 3710 adds r7, #16 + 8001bb8: 46bd mov sp, r7 + 8001bba: bd80 pop {r7, pc} -08001e40 : +08001bbc : return (int16_t) res; } } float ADSCalculate_ph_Volts(void) { - 8001e40: b580 push {r7, lr} - 8001e42: b082 sub sp, #8 - 8001e44: af00 add r7, sp, #0 + 8001bbc: b580 push {r7, lr} + 8001bbe: b082 sub sp, #8 + 8001bc0: af00 add r7, sp, #0 float ph_dut_sum; uint8_t i; for (i = (ADS1015_PH_AVERAGES-1); i > 0; i--) - 8001e46: 2307 movs r3, #7 - 8001e48: 70fb strb r3, [r7, #3] - 8001e4a: e00b b.n 8001e64 + 8001bc2: 2307 movs r3, #7 + 8001bc4: 70fb strb r3, [r7, #3] + 8001bc6: e00b b.n 8001be0 ph_dut_samples[i] = ph_dut_samples[i-1]; - 8001e4c: 78fb ldrb r3, [r7, #3] - 8001e4e: 1e5a subs r2, r3, #1 - 8001e50: 78fb ldrb r3, [r7, #3] - 8001e52: 4922 ldr r1, [pc, #136] @ (8001edc ) - 8001e54: f851 2022 ldr.w r2, [r1, r2, lsl #2] - 8001e58: 4920 ldr r1, [pc, #128] @ (8001edc ) - 8001e5a: f841 2023 str.w r2, [r1, r3, lsl #2] + 8001bc8: 78fb ldrb r3, [r7, #3] + 8001bca: 1e5a subs r2, r3, #1 + 8001bcc: 78fb ldrb r3, [r7, #3] + 8001bce: 4922 ldr r1, [pc, #136] @ (8001c58 ) + 8001bd0: f851 2022 ldr.w r2, [r1, r2, lsl #2] + 8001bd4: 4920 ldr r1, [pc, #128] @ (8001c58 ) + 8001bd6: f841 2023 str.w r2, [r1, r3, lsl #2] for (i = (ADS1015_PH_AVERAGES-1); i > 0; i--) - 8001e5e: 78fb ldrb r3, [r7, #3] - 8001e60: 3b01 subs r3, #1 - 8001e62: 70fb strb r3, [r7, #3] - 8001e64: 78fb ldrb r3, [r7, #3] - 8001e66: 2b00 cmp r3, #0 - 8001e68: d1f0 bne.n 8001e4c + 8001bda: 78fb ldrb r3, [r7, #3] + 8001bdc: 3b01 subs r3, #1 + 8001bde: 70fb strb r3, [r7, #3] + 8001be0: 78fb ldrb r3, [r7, #3] + 8001be2: 2b00 cmp r3, #0 + 8001be4: d1f0 bne.n 8001bc8 ph_dut_samples[0] = (((float)(2048 - ADSreadADC_Differential_0_1(&i2c)) * ADS1015_ADC_VREF) / ADS1015_ADC_MAX); // 1. Converter leitura bruta do ADC para tensão real (Volts) - 8001e6a: 481d ldr r0, [pc, #116] @ (8001ee0 ) - 8001e6c: f7ff ffa9 bl 8001dc2 - 8001e70: 4603 mov r3, r0 - 8001e72: f5c3 6300 rsb r3, r3, #2048 @ 0x800 - 8001e76: 4618 mov r0, r3 - 8001e78: f7fe fefa bl 8000c70 <__aeabi_i2f> - 8001e7c: 4603 mov r3, r0 - 8001e7e: 4919 ldr r1, [pc, #100] @ (8001ee4 ) - 8001e80: 4618 mov r0, r3 - 8001e82: f7fe ff49 bl 8000d18 <__aeabi_fmul> - 8001e86: 4603 mov r3, r0 - 8001e88: 4917 ldr r1, [pc, #92] @ (8001ee8 ) - 8001e8a: 4618 mov r0, r3 - 8001e8c: f7fe fff8 bl 8000e80 <__aeabi_fdiv> - 8001e90: 4603 mov r3, r0 - 8001e92: 461a mov r2, r3 - 8001e94: 4b11 ldr r3, [pc, #68] @ (8001edc ) - 8001e96: 601a str r2, [r3, #0] + 8001be6: 481d ldr r0, [pc, #116] @ (8001c5c ) + 8001be8: f7ff ffa9 bl 8001b3e + 8001bec: 4603 mov r3, r0 + 8001bee: f5c3 6300 rsb r3, r3, #2048 @ 0x800 + 8001bf2: 4618 mov r0, r3 + 8001bf4: f7fe ff02 bl 80009fc <__aeabi_i2f> + 8001bf8: 4603 mov r3, r0 + 8001bfa: 4919 ldr r1, [pc, #100] @ (8001c60 ) + 8001bfc: 4618 mov r0, r3 + 8001bfe: f7fe ff51 bl 8000aa4 <__aeabi_fmul> + 8001c02: 4603 mov r3, r0 + 8001c04: 4917 ldr r1, [pc, #92] @ (8001c64 ) + 8001c06: 4618 mov r0, r3 + 8001c08: f7ff f800 bl 8000c0c <__aeabi_fdiv> + 8001c0c: 4603 mov r3, r0 + 8001c0e: 461a mov r2, r3 + 8001c10: 4b11 ldr r3, [pc, #68] @ (8001c58 ) + 8001c12: 601a str r2, [r3, #0] for (i = 0, ph_dut_sum=0; i < ADS1015_PH_AVERAGES; i++) - 8001e98: 2300 movs r3, #0 - 8001e9a: 70fb strb r3, [r7, #3] - 8001e9c: f04f 0300 mov.w r3, #0 - 8001ea0: 607b str r3, [r7, #4] - 8001ea2: e00c b.n 8001ebe + 8001c14: 2300 movs r3, #0 + 8001c16: 70fb strb r3, [r7, #3] + 8001c18: f04f 0300 mov.w r3, #0 + 8001c1c: 607b str r3, [r7, #4] + 8001c1e: e00c b.n 8001c3a ph_dut_sum += ph_dut_samples[i]; - 8001ea4: 78fb ldrb r3, [r7, #3] - 8001ea6: 4a0d ldr r2, [pc, #52] @ (8001edc ) - 8001ea8: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8001eac: 4619 mov r1, r3 - 8001eae: 6878 ldr r0, [r7, #4] - 8001eb0: f7fe fe2a bl 8000b08 <__addsf3> - 8001eb4: 4603 mov r3, r0 - 8001eb6: 607b str r3, [r7, #4] + 8001c20: 78fb ldrb r3, [r7, #3] + 8001c22: 4a0d ldr r2, [pc, #52] @ (8001c58 ) + 8001c24: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8001c28: 4619 mov r1, r3 + 8001c2a: 6878 ldr r0, [r7, #4] + 8001c2c: f7fe fe32 bl 8000894 <__addsf3> + 8001c30: 4603 mov r3, r0 + 8001c32: 607b str r3, [r7, #4] for (i = 0, ph_dut_sum=0; i < ADS1015_PH_AVERAGES; i++) - 8001eb8: 78fb ldrb r3, [r7, #3] - 8001eba: 3301 adds r3, #1 - 8001ebc: 70fb strb r3, [r7, #3] - 8001ebe: 78fb ldrb r3, [r7, #3] - 8001ec0: 2b07 cmp r3, #7 - 8001ec2: d9ef bls.n 8001ea4 + 8001c34: 78fb ldrb r3, [r7, #3] + 8001c36: 3301 adds r3, #1 + 8001c38: 70fb strb r3, [r7, #3] + 8001c3a: 78fb ldrb r3, [r7, #3] + 8001c3c: 2b07 cmp r3, #7 + 8001c3e: d9ef bls.n 8001c20 ph_dut_sum /= ADS1015_PH_AVERAGES; - 8001ec4: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 - 8001ec8: 6878 ldr r0, [r7, #4] - 8001eca: f7fe ffd9 bl 8000e80 <__aeabi_fdiv> - 8001ece: 4603 mov r3, r0 - 8001ed0: 607b str r3, [r7, #4] + 8001c40: f04f 4182 mov.w r1, #1090519040 @ 0x41000000 + 8001c44: 6878 ldr r0, [r7, #4] + 8001c46: f7fe ffe1 bl 8000c0c <__aeabi_fdiv> + 8001c4a: 4603 mov r3, r0 + 8001c4c: 607b str r3, [r7, #4] return (ph_dut_sum); - 8001ed2: 687b ldr r3, [r7, #4] + 8001c4e: 687b ldr r3, [r7, #4] } - 8001ed4: 4618 mov r0, r3 - 8001ed6: 3708 adds r7, #8 - 8001ed8: 46bd mov sp, r7 - 8001eda: bd80 pop {r7, pc} - 8001edc: 200001d0 .word 0x200001d0 - 8001ee0: 200001c0 .word 0x200001c0 - 8001ee4: 40533333 .word 0x40533333 - 8001ee8: 457ff000 .word 0x457ff000 + 8001c50: 4618 mov r0, r3 + 8001c52: 3708 adds r7, #8 + 8001c54: 46bd mov sp, r7 + 8001c56: bd80 pop {r7, pc} + 8001c58: 20000184 .word 0x20000184 + 8001c5c: 20000174 .word 0x20000174 + 8001c60: 40533333 .word 0x40533333 + 8001c64: 457ff000 .word 0x457ff000 -08001eec : - * @param temp_dut Temperatura atual medida em Celsius. +08001c68 : * - * @return float Valor de pH calculado (0.0 a 14.0). + * @param temp_dut Unused in this non-compensated version. + * @return float Calculated pH value [0.0, 14.0]. Returns 0.0 if calibration error detected. */ -float ADSCalculate_ph_Compensated(int16_t adc_raw, float temp_dut) +float ADSCalculate_ph_Uncompensated(void) { - 8001eec: b590 push {r4, r7, lr} - 8001eee: b08b sub sp, #44 @ 0x2c - 8001ef0: af00 add r7, sp, #0 - 8001ef2: 4603 mov r3, r0 - 8001ef4: 6039 str r1, [r7, #0] - 8001ef6: 80fb strh r3, [r7, #6] - - - // 1. Converter leitura bruta do ADC para tensão real (Volts) - float v_measured = ((float)adc_raw * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; - 8001ef8: f9b7 3006 ldrsh.w r3, [r7, #6] - 8001efc: 4618 mov r0, r3 - 8001efe: f7fe feb7 bl 8000c70 <__aeabi_i2f> - 8001f02: 4603 mov r3, r0 - 8001f04: 4935 ldr r1, [pc, #212] @ (8001fdc ) - 8001f06: 4618 mov r0, r3 - 8001f08: f7fe ff06 bl 8000d18 <__aeabi_fmul> - 8001f0c: 4603 mov r3, r0 - 8001f0e: 4934 ldr r1, [pc, #208] @ (8001fe0 ) - 8001f10: 4618 mov r0, r3 - 8001f12: f7fe ffb5 bl 8000e80 <__aeabi_fdiv> - 8001f16: 4603 mov r3, r0 - 8001f18: 623b str r3, [r7, #32] - - // 2. Calcular o Slope original (medido na temperatura da calibração) - // Delta pH é fixo em 3.0 (de pH 7 para pH 4) - float delta_v_calib = flash_data.ph7_value - flash_data.ph4_value; - 8001f1a: 4b32 ldr r3, [pc, #200] @ (8001fe4 ) - 8001f1c: 689b ldr r3, [r3, #8] - 8001f1e: 4a31 ldr r2, [pc, #196] @ (8001fe4 ) - 8001f20: 6852 ldr r2, [r2, #4] - 8001f22: 4611 mov r1, r2 - 8001f24: 4618 mov r0, r3 - 8001f26: f7fe fded bl 8000b04 <__aeabi_fsub> - 8001f2a: 4603 mov r3, r0 - 8001f2c: 61fb str r3, [r7, #28] + 8001c68: b580 push {r7, lr} + 8001c6a: b084 sub sp, #16 + 8001c6c: af00 add r7, sp, #0 + /* + * 1. Convert raw ADC reading to actual voltage (Volts). + * Note: The subtraction of 2048 assumes a differential configuration + * where the midpoint is at the mid-scale of the ADS1015. + */ + float v_measured = ((float)(2048 - ADSreadADC_Differential_0_1(&i2c)) * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; + 8001c6e: 482e ldr r0, [pc, #184] @ (8001d28 ) + 8001c70: f7ff ff65 bl 8001b3e + 8001c74: 4603 mov r3, r0 + 8001c76: f5c3 6300 rsb r3, r3, #2048 @ 0x800 + 8001c7a: 4618 mov r0, r3 + 8001c7c: f7fe febe bl 80009fc <__aeabi_i2f> + 8001c80: 4603 mov r3, r0 + 8001c82: 492a ldr r1, [pc, #168] @ (8001d2c ) + 8001c84: 4618 mov r0, r3 + 8001c86: f7fe ff0d bl 8000aa4 <__aeabi_fmul> + 8001c8a: 4603 mov r3, r0 + 8001c8c: 4928 ldr r1, [pc, #160] @ (8001d30 ) + 8001c8e: 4618 mov r0, r3 + 8001c90: f7fe ffbc bl 8000c0c <__aeabi_fdiv> + 8001c94: 4603 mov r3, r0 + 8001c96: 60bb str r3, [r7, #8] + /* + * 2. Calculate the original Slope (measured during calibration). + * PH_DELTA_CALIB is a constant representing the pH difference between + * calibration points (e.g., |7.0 - 4.0| = 3.0). + */ + float delta_v_calib = flash_data.ph7_volts - flash_data.ph4_volts; + 8001c98: 4b26 ldr r3, [pc, #152] @ (8001d34 ) + 8001c9a: 689b ldr r3, [r3, #8] + 8001c9c: 4a25 ldr r2, [pc, #148] @ (8001d34 ) + 8001c9e: 6852 ldr r2, [r2, #4] + 8001ca0: 4611 mov r1, r2 + 8001ca2: 4618 mov r0, r3 + 8001ca4: f7fe fdf4 bl 8000890 <__aeabi_fsub> + 8001ca8: 4603 mov r3, r0 + 8001caa: 607b str r3, [r7, #4] + /* Safety check: Prevent division by zero if calibration data is invalid */ if (delta_v_calib == 0.0f) - 8001f2e: f04f 0100 mov.w r1, #0 - 8001f32: 69f8 ldr r0, [r7, #28] - 8001f34: f7ff f884 bl 8001040 <__aeabi_fcmpeq> - 8001f38: 4603 mov r3, r0 - 8001f3a: 2b00 cmp r3, #0 - 8001f3c: d002 beq.n 8001f44 + 8001cac: f04f 0100 mov.w r1, #0 + 8001cb0: 6878 ldr r0, [r7, #4] + 8001cb2: f7ff f88b bl 8000dcc <__aeabi_fcmpeq> + 8001cb6: 4603 mov r3, r0 + 8001cb8: 2b00 cmp r3, #0 + 8001cba: d002 beq.n 8001cc2 { - return 0.0f; // Proteção contra erro de calibração/divisão por zero - 8001f3e: f04f 0300 mov.w r3, #0 - 8001f42: e046 b.n 8001fd2 + return 0.0f; + 8001cbc: f04f 0300 mov.w r3, #0 + 8001cc0: e02d b.n 8001d1e } - float slope_at_calib = 3.0f / delta_v_calib; - 8001f44: 69f9 ldr r1, [r7, #28] - 8001f46: 4828 ldr r0, [pc, #160] @ (8001fe8 ) - 8001f48: f7fe ff9a bl 8000e80 <__aeabi_fdiv> - 8001f4c: 4603 mov r3, r0 - 8001f4e: 61bb str r3, [r7, #24] + /* Slope = Delta pH / Delta Voltage */ + float slope_at_calib = PH_DELTA_CALIB / delta_v_calib; + 8001cc2: 6879 ldr r1, [r7, #4] + 8001cc4: 481c ldr r0, [pc, #112] @ (8001d38 ) + 8001cc6: f7fe ffa1 bl 8000c0c <__aeabi_fdiv> + 8001cca: 4603 mov r3, r0 + 8001ccc: 603b str r3, [r7, #0] + /* + * 3. Final pH Calculation (Non-compensated) + * Formula: pH = pH_ref + (V_measured - V_ref_7) * Slope + * Where pH_ref is 7.0. + */ + float ph_result = 7.0f + ((v_measured - flash_data.ph7_volts) * slope_at_calib); + 8001cce: 4b19 ldr r3, [pc, #100] @ (8001d34 ) + 8001cd0: 689b ldr r3, [r3, #8] + 8001cd2: 4619 mov r1, r3 + 8001cd4: 68b8 ldr r0, [r7, #8] + 8001cd6: f7fe fddb bl 8000890 <__aeabi_fsub> + 8001cda: 4603 mov r3, r0 + 8001cdc: 6839 ldr r1, [r7, #0] + 8001cde: 4618 mov r0, r3 + 8001ce0: f7fe fee0 bl 8000aa4 <__aeabi_fmul> + 8001ce4: 4603 mov r3, r0 + 8001ce6: 4915 ldr r1, [pc, #84] @ (8001d3c ) + 8001ce8: 4618 mov r0, r3 + 8001cea: f7fe fdd3 bl 8000894 <__addsf3> + 8001cee: 4603 mov r3, r0 + 8001cf0: 60fb str r3, [r7, #12] - // 3. Calcular o Fator de Correção Térmica (Equação de Nernst) - float temp_k_now = temp_dut + ADS1015_KELVIN_OFFSET; - 8001f50: 4926 ldr r1, [pc, #152] @ (8001fec ) - 8001f52: 6838 ldr r0, [r7, #0] - 8001f54: f7fe fdd8 bl 8000b08 <__addsf3> - 8001f58: 4603 mov r3, r0 - 8001f5a: 617b str r3, [r7, #20] - float temp_k_ref = flash_data.temperature_value + ADS1015_KELVIN_OFFSET; - 8001f5c: 4b21 ldr r3, [pc, #132] @ (8001fe4 ) - 8001f5e: 695b ldr r3, [r3, #20] - 8001f60: 4922 ldr r1, [pc, #136] @ (8001fec ) - 8001f62: 4618 mov r0, r3 - 8001f64: f7fe fdd0 bl 8000b08 <__addsf3> - 8001f68: 4603 mov r3, r0 - 8001f6a: 613b str r3, [r7, #16] + /* 4. Clamping (Ensure physical limits of the pH scale) */ + if (ph_result < 0.0f) + 8001cf2: f04f 0100 mov.w r1, #0 + 8001cf6: 68f8 ldr r0, [r7, #12] + 8001cf8: f7ff f872 bl 8000de0 <__aeabi_fcmplt> + 8001cfc: 4603 mov r3, r0 + 8001cfe: 2b00 cmp r3, #0 + 8001d00: d003 beq.n 8001d0a + { + ph_result = 0.0f; + 8001d02: f04f 0300 mov.w r3, #0 + 8001d06: 60fb str r3, [r7, #12] + 8001d08: e008 b.n 8001d1c + } + else if (ph_result > 14.0f) + 8001d0a: 490d ldr r1, [pc, #52] @ (8001d40 ) + 8001d0c: 68f8 ldr r0, [r7, #12] + 8001d0e: f7ff f885 bl 8000e1c <__aeabi_fcmpgt> + 8001d12: 4603 mov r3, r0 + 8001d14: 2b00 cmp r3, #0 + 8001d16: d001 beq.n 8001d1c + { + ph_result = 14.0f; + 8001d18: 4b09 ldr r3, [pc, #36] @ (8001d40 ) + 8001d1a: 60fb str r3, [r7, #12] + } - // Fator: (T_atual / T_referencia) - float thermal_factor = temp_k_now / temp_k_ref; - 8001f6c: 6939 ldr r1, [r7, #16] - 8001f6e: 6978 ldr r0, [r7, #20] - 8001f70: f7fe ff86 bl 8000e80 <__aeabi_fdiv> - 8001f74: 4603 mov r3, r0 - 8001f76: 60fb str r3, [r7, #12] - /* - * 4. Cálculo Final do pH - * O Slope ajustado para a temperatura atual é: slope_at_calib / thermal_factor - * Fórmula: pH = pH_ref + (V_medido - V_ref_7) * Slope_ajustado - */ - float ph_result = 7.0f + ((v_measured - flash_data.ph7_value) * (slope_at_calib / thermal_factor)); - 8001f78: 4b1a ldr r3, [pc, #104] @ (8001fe4 ) - 8001f7a: 689b ldr r3, [r3, #8] - 8001f7c: 4619 mov r1, r3 - 8001f7e: 6a38 ldr r0, [r7, #32] - 8001f80: f7fe fdc0 bl 8000b04 <__aeabi_fsub> - 8001f84: 4603 mov r3, r0 - 8001f86: 461c mov r4, r3 - 8001f88: 68f9 ldr r1, [r7, #12] - 8001f8a: 69b8 ldr r0, [r7, #24] - 8001f8c: f7fe ff78 bl 8000e80 <__aeabi_fdiv> - 8001f90: 4603 mov r3, r0 - 8001f92: 4619 mov r1, r3 - 8001f94: 4620 mov r0, r4 - 8001f96: f7fe febf bl 8000d18 <__aeabi_fmul> - 8001f9a: 4603 mov r3, r0 - 8001f9c: 4914 ldr r1, [pc, #80] @ (8001ff0 ) - 8001f9e: 4618 mov r0, r3 - 8001fa0: f7fe fdb2 bl 8000b08 <__addsf3> - 8001fa4: 4603 mov r3, r0 - 8001fa6: 627b str r3, [r7, #36] @ 0x24 - - // 5. Clamping (Garantir limites físicos) - if (ph_result < 0.0f) ph_result = 0.0f; - 8001fa8: f04f 0100 mov.w r1, #0 - 8001fac: 6a78 ldr r0, [r7, #36] @ 0x24 - 8001fae: f7ff f851 bl 8001054 <__aeabi_fcmplt> - 8001fb2: 4603 mov r3, r0 - 8001fb4: 2b00 cmp r3, #0 - 8001fb6: d002 beq.n 8001fbe - 8001fb8: f04f 0300 mov.w r3, #0 - 8001fbc: 627b str r3, [r7, #36] @ 0x24 - if (ph_result > 14.0f) ph_result = 14.0f; - 8001fbe: 490d ldr r1, [pc, #52] @ (8001ff4 ) - 8001fc0: 6a78 ldr r0, [r7, #36] @ 0x24 - 8001fc2: f7ff f865 bl 8001090 <__aeabi_fcmpgt> - 8001fc6: 4603 mov r3, r0 - 8001fc8: 2b00 cmp r3, #0 - 8001fca: d001 beq.n 8001fd0 - 8001fcc: 4b09 ldr r3, [pc, #36] @ (8001ff4 ) - 8001fce: 627b str r3, [r7, #36] @ 0x24 - - return ph_result; - 8001fd0: 6a7b ldr r3, [r7, #36] @ 0x24 + return ph_result; + 8001d1c: 68fb ldr r3, [r7, #12] } - 8001fd2: 4618 mov r0, r3 - 8001fd4: 372c adds r7, #44 @ 0x2c - 8001fd6: 46bd mov sp, r7 - 8001fd8: bd90 pop {r4, r7, pc} - 8001fda: bf00 nop - 8001fdc: 40533333 .word 0x40533333 - 8001fe0: 457ff000 .word 0x457ff000 - 8001fe4: 200001f8 .word 0x200001f8 - 8001fe8: 40400000 .word 0x40400000 - 8001fec: 43889333 .word 0x43889333 - 8001ff0: 40e00000 .word 0x40e00000 - 8001ff4: 41600000 .word 0x41600000 + 8001d1e: 4618 mov r0, r3 + 8001d20: 3710 adds r7, #16 + 8001d22: 46bd mov sp, r7 + 8001d24: bd80 pop {r7, pc} + 8001d26: bf00 nop + 8001d28: 20000174 .word 0x20000174 + 8001d2c: 40533333 .word 0x40533333 + 8001d30: 457ff000 .word 0x457ff000 + 8001d34: 200001ac .word 0x200001ac + 8001d38: 40400000 .word 0x40400000 + 8001d3c: 40e00000 .word 0x40e00000 + 8001d40: 41600000 .word 0x41600000 -08001ff8 : +08001d44 : * @brief Initializes the GPIO hardware and sets initial states. * @note This function replaces the handle-based init. * @retval None */ void digital_outputs_init(void) { - 8001ff8: b580 push {r7, lr} - 8001ffa: b086 sub sp, #24 - 8001ffc: af00 add r7, sp, #0 + 8001d44: b580 push {r7, lr} + 8001d46: b086 sub sp, #24 + 8001d48: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001ffe: 1d3b adds r3, r7, #4 - 8002000: 2200 movs r2, #0 - 8002002: 601a str r2, [r3, #0] - 8002004: 605a str r2, [r3, #4] - 8002006: 609a str r2, [r3, #8] - 8002008: 60da str r2, [r3, #12] + 8001d4a: 1d3b adds r3, r7, #4 + 8001d4c: 2200 movs r2, #0 + 8001d4e: 601a str r2, [r3, #0] + 8001d50: 605a str r2, [r3, #4] + 8001d52: 609a str r2, [r3, #8] + 8001d54: 60da str r2, [r3, #12] for (int i = 0; i < OUTPUT_PINS_COUNT; i++) { - 800200a: 2300 movs r3, #0 - 800200c: 617b str r3, [r7, #20] - 800200e: e029 b.n 8002064 + 8001d56: 2300 movs r3, #0 + 8001d58: 617b str r3, [r7, #20] + 8001d5a: e029 b.n 8001db0 GPIO_InitStruct.Pin = output_pins[i].pin; - 8002010: 4a18 ldr r2, [pc, #96] @ (8002074 ) - 8002012: 697b ldr r3, [r7, #20] - 8002014: 00db lsls r3, r3, #3 - 8002016: 4413 add r3, r2 - 8002018: 889b ldrh r3, [r3, #4] - 800201a: 607b str r3, [r7, #4] + 8001d5c: 4a18 ldr r2, [pc, #96] @ (8001dc0 ) + 8001d5e: 697b ldr r3, [r7, #20] + 8001d60: 00db lsls r3, r3, #3 + 8001d62: 4413 add r3, r2 + 8001d64: 889b ldrh r3, [r3, #4] + 8001d66: 607b str r3, [r7, #4] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; // Open-drain - 800201c: 2311 movs r3, #17 - 800201e: 60bb str r3, [r7, #8] + 8001d68: 2311 movs r3, #17 + 8001d6a: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002020: 2300 movs r3, #0 - 8002022: 60fb str r3, [r7, #12] + 8001d6c: 2300 movs r3, #0 + 8001d6e: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002024: 2302 movs r3, #2 - 8002026: 613b str r3, [r7, #16] + 8001d70: 2302 movs r3, #2 + 8001d72: 613b str r3, [r7, #16] HAL_GPIO_Init(output_pins[i].port, &GPIO_InitStruct); - 8002028: 4a12 ldr r2, [pc, #72] @ (8002074 ) - 800202a: 697b ldr r3, [r7, #20] - 800202c: f852 3033 ldr.w r3, [r2, r3, lsl #3] - 8002030: 1d3a adds r2, r7, #4 - 8002032: 4611 mov r1, r2 - 8002034: 4618 mov r0, r3 - 8002036: f002 fb9b bl 8004770 + 8001d74: 4a12 ldr r2, [pc, #72] @ (8001dc0 ) + 8001d76: 697b ldr r3, [r7, #20] + 8001d78: f852 3033 ldr.w r3, [r2, r3, lsl #3] + 8001d7c: 1d3a adds r2, r7, #4 + 8001d7e: 4611 mov r1, r2 + 8001d80: 4618 mov r0, r3 + 8001d82: f001 fd73 bl 800386c // Force initial state to LOW (Reset) HAL_GPIO_WritePin(output_pins[i].port, output_pins[i].pin, GPIO_PIN_RESET); - 800203a: 4a0e ldr r2, [pc, #56] @ (8002074 ) - 800203c: 697b ldr r3, [r7, #20] - 800203e: f852 0033 ldr.w r0, [r2, r3, lsl #3] - 8002042: 4a0c ldr r2, [pc, #48] @ (8002074 ) - 8002044: 697b ldr r3, [r7, #20] - 8002046: 00db lsls r3, r3, #3 - 8002048: 4413 add r3, r2 - 800204a: 889b ldrh r3, [r3, #4] - 800204c: 2200 movs r2, #0 - 800204e: 4619 mov r1, r3 - 8002050: f002 fd29 bl 8004aa6 + 8001d86: 4a0e ldr r2, [pc, #56] @ (8001dc0 ) + 8001d88: 697b ldr r3, [r7, #20] + 8001d8a: f852 0033 ldr.w r0, [r2, r3, lsl #3] + 8001d8e: 4a0c ldr r2, [pc, #48] @ (8001dc0 ) + 8001d90: 697b ldr r3, [r7, #20] + 8001d92: 00db lsls r3, r3, #3 + 8001d94: 4413 add r3, r2 + 8001d96: 889b ldrh r3, [r3, #4] + 8001d98: 2200 movs r2, #0 + 8001d9a: 4619 mov r1, r3 + 8001d9c: f001 ff01 bl 8003ba2 pin_states[i] = 0; - 8002054: 4a08 ldr r2, [pc, #32] @ (8002078 ) - 8002056: 697b ldr r3, [r7, #20] - 8002058: 4413 add r3, r2 - 800205a: 2200 movs r2, #0 - 800205c: 701a strb r2, [r3, #0] + 8001da0: 4a08 ldr r2, [pc, #32] @ (8001dc4 ) + 8001da2: 697b ldr r3, [r7, #20] + 8001da4: 4413 add r3, r2 + 8001da6: 2200 movs r2, #0 + 8001da8: 701a strb r2, [r3, #0] for (int i = 0; i < OUTPUT_PINS_COUNT; i++) { - 800205e: 697b ldr r3, [r7, #20] - 8002060: 3301 adds r3, #1 - 8002062: 617b str r3, [r7, #20] - 8002064: 697b ldr r3, [r7, #20] - 8002066: 2b07 cmp r3, #7 - 8002068: ddd2 ble.n 8002010 + 8001daa: 697b ldr r3, [r7, #20] + 8001dac: 3301 adds r3, #1 + 8001dae: 617b str r3, [r7, #20] + 8001db0: 697b ldr r3, [r7, #20] + 8001db2: 2b07 cmp r3, #7 + 8001db4: ddd2 ble.n 8001d5c } } - 800206a: bf00 nop - 800206c: bf00 nop - 800206e: 3718 adds r7, #24 - 8002070: 46bd mov sp, r7 - 8002072: bd80 pop {r7, pc} - 8002074: 08007a20 .word 0x08007a20 - 8002078: 200001f0 .word 0x200001f0 + 8001db6: bf00 nop + 8001db8: bf00 nop + 8001dba: 3718 adds r7, #24 + 8001dbc: 46bd mov sp, r7 + 8001dbe: bd80 pop {r7, pc} + 8001dc0: 08006428 .word 0x08006428 + 8001dc4: 200001a4 .word 0x200001a4 -0800207c : - -/** - * Enable DMA controller clock - */ -void MX_DMA_Init(void) -{ - 800207c: b580 push {r7, lr} - 800207e: b082 sub sp, #8 - 8002080: af00 add r7, sp, #0 - - /* DMA controller clock enable */ - __HAL_RCC_DMA1_CLK_ENABLE(); - 8002082: 4b0c ldr r3, [pc, #48] @ (80020b4 ) - 8002084: 695b ldr r3, [r3, #20] - 8002086: 4a0b ldr r2, [pc, #44] @ (80020b4 ) - 8002088: f043 0301 orr.w r3, r3, #1 - 800208c: 6153 str r3, [r2, #20] - 800208e: 4b09 ldr r3, [pc, #36] @ (80020b4 ) - 8002090: 695b ldr r3, [r3, #20] - 8002092: f003 0301 and.w r3, r3, #1 - 8002096: 607b str r3, [r7, #4] - 8002098: 687b ldr r3, [r7, #4] - - /* DMA interrupt init */ - /* DMA1_Channel1_IRQn interrupt configuration */ - HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); - 800209a: 2200 movs r2, #0 - 800209c: 2100 movs r1, #0 - 800209e: 200b movs r0, #11 - 80020a0: f001 fe8d bl 8003dbe - HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); - 80020a4: 200b movs r0, #11 - 80020a6: f001 fea6 bl 8003df6 - -} - 80020aa: bf00 nop - 80020ac: 3708 adds r7, #8 - 80020ae: 46bd mov sp, r7 - 80020b0: bd80 pop {r7, pc} - 80020b2: bf00 nop - 80020b4: 40021000 .word 0x40021000 - -080020b8 : +08001dc8 : * @return HAL_OK em caso de sucesso. */ FlashPage_t flash_data; HAL_StatusTypeDef Flash_Save_Page(FlashPage_t *pPage) { - 80020b8: b5b0 push {r4, r5, r7, lr} - 80020ba: b08c sub sp, #48 @ 0x30 - 80020bc: af00 add r7, sp, #0 - 80020be: 6078 str r0, [r7, #4] + 8001dc8: b5b0 push {r4, r5, r7, lr} + 8001dca: b08c sub sp, #48 @ 0x30 + 8001dcc: af00 add r7, sp, #0 + 8001dce: 6078 str r0, [r7, #4] if (pPage == NULL) return HAL_ERROR; - 80020c0: 687b ldr r3, [r7, #4] - 80020c2: 2b00 cmp r3, #0 - 80020c4: d101 bne.n 80020ca - 80020c6: 2301 movs r3, #1 - 80020c8: e04a b.n 8002160 + 8001dd0: 687b ldr r3, [r7, #4] + 8001dd2: 2b00 cmp r3, #0 + 8001dd4: d101 bne.n 8001dda + 8001dd6: 2301 movs r3, #1 + 8001dd8: e04a b.n 8001e70 HAL_StatusTypeDef status = HAL_OK; - 80020ca: 2300 movs r3, #0 - 80020cc: f887 302f strb.w r3, [r7, #47] @ 0x2f + 8001dda: 2300 movs r3, #0 + 8001ddc: f887 302f strb.w r3, [r7, #47] @ 0x2f HAL_FLASH_Unlock(); - 80020d0: f002 f9be bl 8004450 + 8001de0: f001 fbb4 bl 800354c // 1. Apagar a página inteira (limpa os 1024 bytes) FLASH_EraseInitTypeDef EraseInitStruct; uint32_t PageError = 0; - 80020d4: 2300 movs r3, #0 - 80020d6: 60bb str r3, [r7, #8] + 8001de4: 2300 movs r3, #0 + 8001de6: 60bb str r3, [r7, #8] EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES; - 80020d8: 2300 movs r3, #0 - 80020da: 60fb str r3, [r7, #12] + 8001de8: 2300 movs r3, #0 + 8001dea: 60fb str r3, [r7, #12] EraseInitStruct.PageAddress = FLASH_PAGE_ADDR; - 80020dc: 4b22 ldr r3, [pc, #136] @ (8002168 ) - 80020de: 617b str r3, [r7, #20] + 8001dec: 4b22 ldr r3, [pc, #136] @ (8001e78 ) + 8001dee: 617b str r3, [r7, #20] EraseInitStruct.NbPages = 1; - 80020e0: 2301 movs r3, #1 - 80020e2: 61bb str r3, [r7, #24] + 8001df0: 2301 movs r3, #1 + 8001df2: 61bb str r3, [r7, #24] if (HAL_FLASHEx_Erase(&EraseInitStruct, &PageError) != HAL_OK) { - 80020e4: f107 0208 add.w r2, r7, #8 - 80020e8: f107 030c add.w r3, r7, #12 - 80020ec: 4611 mov r1, r2 - 80020ee: 4618 mov r0, r3 - 80020f0: f002 fa96 bl 8004620 - 80020f4: 4603 mov r3, r0 - 80020f6: 2b00 cmp r3, #0 - 80020f8: d003 beq.n 8002102 + 8001df4: f107 0208 add.w r2, r7, #8 + 8001df8: f107 030c add.w r3, r7, #12 + 8001dfc: 4611 mov r1, r2 + 8001dfe: 4618 mov r0, r3 + 8001e00: f001 fc8c bl 800371c + 8001e04: 4603 mov r3, r0 + 8001e06: 2b00 cmp r3, #0 + 8001e08: d003 beq.n 8001e12 status = HAL_ERROR; - 80020fa: 2301 movs r3, #1 - 80020fc: f887 302f strb.w r3, [r7, #47] @ 0x2f + 8001e0a: 2301 movs r3, #1 + 8001e0c: f887 302f strb.w r3, [r7, #47] @ 0x2f goto Exit; - 8002100: e02a b.n 8002158 + 8001e10: e02a b.n 8001e68 // 2. Gravar o bloco de 1KB // Como a estrutura é exatamente 1KB e alinhada, podemos tratar como um array de uint32_t. // O STM32F1 grava preferencialmente em DoubleWord (64-bit), mas HalfWord (16-bit) // funciona de forma segura para qualquer tamanho múltiplo de 2. uint32_t *pSrc = (uint32_t *)pPage; - 8002102: 687b ldr r3, [r7, #4] - 8002104: 627b str r3, [r7, #36] @ 0x24 + 8001e12: 687b ldr r3, [r7, #4] + 8001e14: 627b str r3, [r7, #36] @ 0x24 uint32_t *pDest = (uint32_t *)FLASH_PAGE_ADDR; - 8002106: 4b18 ldr r3, [pc, #96] @ (8002168 ) - 8002108: 623b str r3, [r7, #32] + 8001e16: 4b18 ldr r3, [pc, #96] @ (8001e78 ) + 8001e18: 623b str r3, [r7, #32] uint32_t iterations = FLASH_PAGE_SIZE / sizeof(uint32_t); // 1024 / 4 = 256 iterações - 800210a: f44f 7380 mov.w r3, #256 @ 0x100 - 800210e: 61fb str r3, [r7, #28] + 8001e1a: f44f 7380 mov.w r3, #256 @ 0x100 + 8001e1e: 61fb str r3, [r7, #28] for (uint32_t i = 0; i < iterations; i++) { - 8002110: 2300 movs r3, #0 - 8002112: 62bb str r3, [r7, #40] @ 0x28 - 8002114: e01b b.n 800214e + 8001e20: 2300 movs r3, #0 + 8001e22: 62bb str r3, [r7, #40] @ 0x28 + 8001e24: e01b b.n 8001e5e // Usamos o modo de gravação de 32-bit (Word) se disponível, // ou simulamos com duas gravações de 16-bit para máxima compatuidade no F1. if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, (uint32_t)&pDest[i], pSrc[i]) != HAL_OK) { - 8002116: 6abb ldr r3, [r7, #40] @ 0x28 - 8002118: 009b lsls r3, r3, #2 - 800211a: 6a3a ldr r2, [r7, #32] - 800211c: 4413 add r3, r2 - 800211e: 4619 mov r1, r3 - 8002120: 6abb ldr r3, [r7, #40] @ 0x28 - 8002122: 009b lsls r3, r3, #2 - 8002124: 6a7a ldr r2, [r7, #36] @ 0x24 - 8002126: 4413 add r3, r2 - 8002128: 681b ldr r3, [r3, #0] - 800212a: 2200 movs r2, #0 - 800212c: 461c mov r4, r3 - 800212e: 4615 mov r5, r2 - 8002130: 4622 mov r2, r4 - 8002132: 462b mov r3, r5 - 8002134: 2002 movs r0, #2 - 8002136: f002 f91b bl 8004370 - 800213a: 4603 mov r3, r0 - 800213c: 2b00 cmp r3, #0 - 800213e: d003 beq.n 8002148 + 8001e26: 6abb ldr r3, [r7, #40] @ 0x28 + 8001e28: 009b lsls r3, r3, #2 + 8001e2a: 6a3a ldr r2, [r7, #32] + 8001e2c: 4413 add r3, r2 + 8001e2e: 4619 mov r1, r3 + 8001e30: 6abb ldr r3, [r7, #40] @ 0x28 + 8001e32: 009b lsls r3, r3, #2 + 8001e34: 6a7a ldr r2, [r7, #36] @ 0x24 + 8001e36: 4413 add r3, r2 + 8001e38: 681b ldr r3, [r3, #0] + 8001e3a: 2200 movs r2, #0 + 8001e3c: 461c mov r4, r3 + 8001e3e: 4615 mov r5, r2 + 8001e40: 4622 mov r2, r4 + 8001e42: 462b mov r3, r5 + 8001e44: 2002 movs r0, #2 + 8001e46: f001 fb11 bl 800346c + 8001e4a: 4603 mov r3, r0 + 8001e4c: 2b00 cmp r3, #0 + 8001e4e: d003 beq.n 8001e58 status = HAL_ERROR; - 8002140: 2301 movs r3, #1 - 8002142: f887 302f strb.w r3, [r7, #47] @ 0x2f + 8001e50: 2301 movs r3, #1 + 8001e52: f887 302f strb.w r3, [r7, #47] @ 0x2f break; - 8002146: e007 b.n 8002158 + 8001e56: e007 b.n 8001e68 for (uint32_t i = 0; i < iterations; i++) { - 8002148: 6abb ldr r3, [r7, #40] @ 0x28 - 800214a: 3301 adds r3, #1 - 800214c: 62bb str r3, [r7, #40] @ 0x28 - 800214e: 6aba ldr r2, [r7, #40] @ 0x28 - 8002150: 69fb ldr r3, [r7, #28] - 8002152: 429a cmp r2, r3 - 8002154: d3df bcc.n 8002116 + 8001e58: 6abb ldr r3, [r7, #40] @ 0x28 + 8001e5a: 3301 adds r3, #1 + 8001e5c: 62bb str r3, [r7, #40] @ 0x28 + 8001e5e: 6aba ldr r2, [r7, #40] @ 0x28 + 8001e60: 69fb ldr r3, [r7, #28] + 8001e62: 429a cmp r2, r3 + 8001e64: d3df bcc.n 8001e26 } } Exit: - 8002156: bf00 nop + 8001e66: bf00 nop HAL_FLASH_Lock(); - 8002158: f002 f9a0 bl 800449c + 8001e68: f001 fb96 bl 8003598 return status; - 800215c: f897 302f ldrb.w r3, [r7, #47] @ 0x2f + 8001e6c: f897 302f ldrb.w r3, [r7, #47] @ 0x2f } - 8002160: 4618 mov r0, r3 - 8002162: 3730 adds r7, #48 @ 0x30 - 8002164: 46bd mov sp, r7 - 8002166: bdb0 pop {r4, r5, r7, pc} - 8002168: 0800fc00 .word 0x0800fc00 + 8001e70: 4618 mov r0, r3 + 8001e72: 3730 adds r7, #48 @ 0x30 + 8001e74: 46bd mov sp, r7 + 8001e76: bdb0 pop {r4, r5, r7, pc} + 8001e78: 0800fc00 .word 0x0800fc00 -0800216c : +08001e7c : /** * @brief Lê a página da Flash para a RAM. */ HAL_StatusTypeDef Flash_Load_Page(FlashPage_t *pDest) { - 800216c: b580 push {r7, lr} - 800216e: b082 sub sp, #8 - 8002170: af00 add r7, sp, #0 - 8002172: 6078 str r0, [r7, #4] + 8001e7c: b580 push {r7, lr} + 8001e7e: b082 sub sp, #8 + 8001e80: af00 add r7, sp, #0 + 8001e82: 6078 str r0, [r7, #4] if (pDest == NULL) return HAL_ERROR; - 8002174: 687b ldr r3, [r7, #4] - 8002176: 2b00 cmp r3, #0 - 8002178: d101 bne.n 800217e - 800217a: 2301 movs r3, #1 - 800217c: e00d b.n 800219a + 8001e84: 687b ldr r3, [r7, #4] + 8001e86: 2b00 cmp r3, #0 + 8001e88: d101 bne.n 8001e8e + 8001e8a: 2301 movs r3, #1 + 8001e8c: e00d b.n 8001eaa // Leitura direta por memcpy (A Flash é mapeada no espaço de endereçamento comum) memcpy(pDest, (void *)FLASH_PAGE_ADDR, FLASH_PAGE_SIZE); - 800217e: f44f 6280 mov.w r2, #1024 @ 0x400 - 8002182: 4908 ldr r1, [pc, #32] @ (80021a4 ) - 8002184: 6878 ldr r0, [r7, #4] - 8002186: f005 fb7d bl 8007884 + 8001e8e: f44f 6280 mov.w r2, #1024 @ 0x400 + 8001e92: 4908 ldr r1, [pc, #32] @ (8001eb4 ) + 8001e94: 6878 ldr r0, [r7, #4] + 8001e96: f004 f9f9 bl 800628c // Validação da integridade através do Magic Number if (pDest->magic_number != 0xDEADBEEF) { - 800218a: 687b ldr r3, [r7, #4] - 800218c: 681b ldr r3, [r3, #0] - 800218e: 4a06 ldr r2, [pc, #24] @ (80021a8 ) - 8002190: 4293 cmp r3, r2 - 8002192: d001 beq.n 8002198 + 8001e9a: 687b ldr r3, [r7, #4] + 8001e9c: 681b ldr r3, [r3, #0] + 8001e9e: 4a06 ldr r2, [pc, #24] @ (8001eb8 ) + 8001ea0: 4293 cmp r3, r2 + 8001ea2: d001 beq.n 8001ea8 return HAL_ERROR; - 8002194: 2301 movs r3, #1 - 8002196: e000 b.n 800219a + 8001ea4: 2301 movs r3, #1 + 8001ea6: e000 b.n 8001eaa } return HAL_OK; - 8002198: 2300 movs r3, #0 + 8001ea8: 2300 movs r3, #0 } - 800219a: 4618 mov r0, r3 - 800219c: 3708 adds r7, #8 - 800219e: 46bd mov sp, r7 - 80021a0: bd80 pop {r7, pc} - 80021a2: bf00 nop - 80021a4: 0800fc00 .word 0x0800fc00 - 80021a8: deadbeef .word 0xdeadbeef + 8001eaa: 4618 mov r0, r3 + 8001eac: 3708 adds r7, #8 + 8001eae: 46bd mov sp, r7 + 8001eb0: bd80 pop {r7, pc} + 8001eb2: bf00 nop + 8001eb4: 0800fc00 .word 0x0800fc00 + 8001eb8: deadbeef .word 0xdeadbeef -080021ac : +08001ebc : * EXTI * Free pins are configured automatically as Analog (this feature is enabled through * the Code Generation settings) */ void MX_GPIO_Init(void) { - 80021ac: b580 push {r7, lr} - 80021ae: b088 sub sp, #32 - 80021b0: af00 add r7, sp, #0 + 8001ebc: b580 push {r7, lr} + 8001ebe: b088 sub sp, #32 + 8001ec0: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80021b2: f107 0310 add.w r3, r7, #16 - 80021b6: 2200 movs r2, #0 - 80021b8: 601a str r2, [r3, #0] - 80021ba: 605a str r2, [r3, #4] - 80021bc: 609a str r2, [r3, #8] - 80021be: 60da str r2, [r3, #12] + 8001ec2: f107 0310 add.w r3, r7, #16 + 8001ec6: 2200 movs r2, #0 + 8001ec8: 601a str r2, [r3, #0] + 8001eca: 605a str r2, [r3, #4] + 8001ecc: 609a str r2, [r3, #8] + 8001ece: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); - 80021c0: 4b50 ldr r3, [pc, #320] @ (8002304 ) - 80021c2: 699b ldr r3, [r3, #24] - 80021c4: 4a4f ldr r2, [pc, #316] @ (8002304 ) - 80021c6: f043 0310 orr.w r3, r3, #16 - 80021ca: 6193 str r3, [r2, #24] - 80021cc: 4b4d ldr r3, [pc, #308] @ (8002304 ) - 80021ce: 699b ldr r3, [r3, #24] - 80021d0: f003 0310 and.w r3, r3, #16 - 80021d4: 60fb str r3, [r7, #12] - 80021d6: 68fb ldr r3, [r7, #12] + 8001ed0: 4b46 ldr r3, [pc, #280] @ (8001fec ) + 8001ed2: 699b ldr r3, [r3, #24] + 8001ed4: 4a45 ldr r2, [pc, #276] @ (8001fec ) + 8001ed6: f043 0310 orr.w r3, r3, #16 + 8001eda: 6193 str r3, [r2, #24] + 8001edc: 4b43 ldr r3, [pc, #268] @ (8001fec ) + 8001ede: 699b ldr r3, [r3, #24] + 8001ee0: f003 0310 and.w r3, r3, #16 + 8001ee4: 60fb str r3, [r7, #12] + 8001ee6: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOD_CLK_ENABLE(); - 80021d8: 4b4a ldr r3, [pc, #296] @ (8002304 ) - 80021da: 699b ldr r3, [r3, #24] - 80021dc: 4a49 ldr r2, [pc, #292] @ (8002304 ) - 80021de: f043 0320 orr.w r3, r3, #32 - 80021e2: 6193 str r3, [r2, #24] - 80021e4: 4b47 ldr r3, [pc, #284] @ (8002304 ) - 80021e6: 699b ldr r3, [r3, #24] - 80021e8: f003 0320 and.w r3, r3, #32 - 80021ec: 60bb str r3, [r7, #8] - 80021ee: 68bb ldr r3, [r7, #8] + 8001ee8: 4b40 ldr r3, [pc, #256] @ (8001fec ) + 8001eea: 699b ldr r3, [r3, #24] + 8001eec: 4a3f ldr r2, [pc, #252] @ (8001fec ) + 8001eee: f043 0320 orr.w r3, r3, #32 + 8001ef2: 6193 str r3, [r2, #24] + 8001ef4: 4b3d ldr r3, [pc, #244] @ (8001fec ) + 8001ef6: 699b ldr r3, [r3, #24] + 8001ef8: f003 0320 and.w r3, r3, #32 + 8001efc: 60bb str r3, [r7, #8] + 8001efe: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80021f0: 4b44 ldr r3, [pc, #272] @ (8002304 ) - 80021f2: 699b ldr r3, [r3, #24] - 80021f4: 4a43 ldr r2, [pc, #268] @ (8002304 ) - 80021f6: f043 0304 orr.w r3, r3, #4 - 80021fa: 6193 str r3, [r2, #24] - 80021fc: 4b41 ldr r3, [pc, #260] @ (8002304 ) - 80021fe: 699b ldr r3, [r3, #24] - 8002200: f003 0304 and.w r3, r3, #4 - 8002204: 607b str r3, [r7, #4] - 8002206: 687b ldr r3, [r7, #4] + 8001f00: 4b3a ldr r3, [pc, #232] @ (8001fec ) + 8001f02: 699b ldr r3, [r3, #24] + 8001f04: 4a39 ldr r2, [pc, #228] @ (8001fec ) + 8001f06: f043 0304 orr.w r3, r3, #4 + 8001f0a: 6193 str r3, [r2, #24] + 8001f0c: 4b37 ldr r3, [pc, #220] @ (8001fec ) + 8001f0e: 699b ldr r3, [r3, #24] + 8001f10: f003 0304 and.w r3, r3, #4 + 8001f14: 607b str r3, [r7, #4] + 8001f16: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002208: 4b3e ldr r3, [pc, #248] @ (8002304 ) - 800220a: 699b ldr r3, [r3, #24] - 800220c: 4a3d ldr r2, [pc, #244] @ (8002304 ) - 800220e: f043 0308 orr.w r3, r3, #8 - 8002212: 6193 str r3, [r2, #24] - 8002214: 4b3b ldr r3, [pc, #236] @ (8002304 ) - 8002216: 699b ldr r3, [r3, #24] - 8002218: f003 0308 and.w r3, r3, #8 - 800221c: 603b str r3, [r7, #0] - 800221e: 683b ldr r3, [r7, #0] + 8001f18: 4b34 ldr r3, [pc, #208] @ (8001fec ) + 8001f1a: 699b ldr r3, [r3, #24] + 8001f1c: 4a33 ldr r2, [pc, #204] @ (8001fec ) + 8001f1e: f043 0308 orr.w r3, r3, #8 + 8001f22: 6193 str r3, [r2, #24] + 8001f24: 4b31 ldr r3, [pc, #196] @ (8001fec ) + 8001f26: 699b ldr r3, [r3, #24] + 8001f28: f003 0308 and.w r3, r3, #8 + 8001f2c: 603b str r3, [r7, #0] + 8001f2e: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, DIGI_OUT5_Pin|DIGI_OUT6_Pin|DIGI_OUT7_Pin, GPIO_PIN_RESET); - 8002220: 2200 movs r2, #0 - 8002222: f44f 4160 mov.w r1, #57344 @ 0xe000 - 8002226: 4838 ldr r0, [pc, #224] @ (8002308 ) - 8002228: f002 fc3d bl 8004aa6 + 8001f30: 2200 movs r2, #0 + 8001f32: f44f 4160 mov.w r1, #57344 @ 0xe000 + 8001f36: 482e ldr r0, [pc, #184] @ (8001ff0 ) + 8001f38: f001 fe33 bl 8003ba2 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, DIGI_OUT0_Pin|DIGI_OUT1_Pin|DIGI_OUT2_Pin|LED_Red_Pin - 800222c: 2200 movs r2, #0 - 800222e: f240 3137 movw r1, #823 @ 0x337 - 8002232: 4836 ldr r0, [pc, #216] @ (800230c ) - 8002234: f002 fc37 bl 8004aa6 + 8001f3c: 2200 movs r2, #0 + 8001f3e: f240 3137 movw r1, #823 @ 0x337 + 8001f42: 482c ldr r0, [pc, #176] @ (8001ff4 ) + 8001f44: f001 fe2d bl 8003ba2 |LED_Green_Pin|DIGI_OUT3_Pin|DIGI_OUT4_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(TX_EN_RS485_GPIO_Port, TX_EN_RS485_Pin, GPIO_PIN_RESET); - 8002238: 2200 movs r2, #0 - 800223a: f44f 5180 mov.w r1, #4096 @ 0x1000 - 800223e: 4834 ldr r0, [pc, #208] @ (8002310 ) - 8002240: f002 fc31 bl 8004aa6 + 8001f48: 2200 movs r2, #0 + 8001f4a: f44f 5180 mov.w r1, #4096 @ 0x1000 + 8001f4e: 482a ldr r0, [pc, #168] @ (8001ff8 ) + 8001f50: f001 fe27 bl 8003ba2 /*Configure GPIO pins : DIGI_OUT5_Pin DIGI_OUT6_Pin DIGI_OUT7_Pin */ GPIO_InitStruct.Pin = DIGI_OUT5_Pin|DIGI_OUT6_Pin|DIGI_OUT7_Pin; - 8002244: f44f 4360 mov.w r3, #57344 @ 0xe000 - 8002248: 613b str r3, [r7, #16] + 8001f54: f44f 4360 mov.w r3, #57344 @ 0xe000 + 8001f58: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 800224a: 2311 movs r3, #17 - 800224c: 617b str r3, [r7, #20] + 8001f5a: 2311 movs r3, #17 + 8001f5c: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800224e: 2300 movs r3, #0 - 8002250: 61bb str r3, [r7, #24] + 8001f5e: 2300 movs r3, #0 + 8001f60: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8002252: 2302 movs r3, #2 - 8002254: 61fb str r3, [r7, #28] + 8001f62: 2302 movs r3, #2 + 8001f64: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8002256: f107 0310 add.w r3, r7, #16 - 800225a: 4619 mov r1, r3 - 800225c: 482a ldr r0, [pc, #168] @ (8002308 ) - 800225e: f002 fa87 bl 8004770 + 8001f66: f107 0310 add.w r3, r7, #16 + 8001f6a: 4619 mov r1, r3 + 8001f6c: 4820 ldr r0, [pc, #128] @ (8001ff0 ) + 8001f6e: f001 fc7d bl 800386c /*Configure GPIO pins : RS485_Addr0_Pin RS485_Addr1_Pin RS485_Addr2_Pin RS485_Addr3_Pin SYS_CFG0_Pin SYS_CFG1_Pin PG_RS485_Pin PG_CE_Pin PG_PH_Pin */ GPIO_InitStruct.Pin = RS485_Addr0_Pin|RS485_Addr1_Pin|RS485_Addr2_Pin|RS485_Addr3_Pin - 8002262: f648 13fc movw r3, #35324 @ 0x89fc - 8002266: 613b str r3, [r7, #16] + 8001f72: f648 13fc movw r3, #35324 @ 0x89fc + 8001f76: 613b str r3, [r7, #16] |SYS_CFG0_Pin|SYS_CFG1_Pin|PG_RS485_Pin|PG_CE_Pin |PG_PH_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002268: 2300 movs r3, #0 - 800226a: 617b str r3, [r7, #20] + 8001f78: 2300 movs r3, #0 + 8001f7a: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_PULLUP; - 800226c: 2301 movs r3, #1 - 800226e: 61bb str r3, [r7, #24] + 8001f7c: 2301 movs r3, #1 + 8001f7e: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002270: f107 0310 add.w r3, r7, #16 - 8002274: 4619 mov r1, r3 - 8002276: 4826 ldr r0, [pc, #152] @ (8002310 ) - 8002278: f002 fa7a bl 8004770 + 8001f80: f107 0310 add.w r3, r7, #16 + 8001f84: 4619 mov r1, r3 + 8001f86: 481c ldr r0, [pc, #112] @ (8001ff8 ) + 8001f88: f001 fc70 bl 800386c /*Configure GPIO pins : DIGI_OUT0_Pin DIGI_OUT1_Pin DIGI_OUT2_Pin LED_Red_Pin LED_Green_Pin DIGI_OUT3_Pin DIGI_OUT4_Pin */ GPIO_InitStruct.Pin = DIGI_OUT0_Pin|DIGI_OUT1_Pin|DIGI_OUT2_Pin|LED_Red_Pin - 800227c: f240 3337 movw r3, #823 @ 0x337 - 8002280: 613b str r3, [r7, #16] + 8001f8c: f240 3337 movw r3, #823 @ 0x337 + 8001f90: 613b str r3, [r7, #16] |LED_Green_Pin|DIGI_OUT3_Pin|DIGI_OUT4_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 8002282: 2311 movs r3, #17 - 8002284: 617b str r3, [r7, #20] + 8001f92: 2311 movs r3, #17 + 8001f94: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002286: 2300 movs r3, #0 - 8002288: 61bb str r3, [r7, #24] + 8001f96: 2300 movs r3, #0 + 8001f98: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800228a: 2302 movs r3, #2 - 800228c: 61fb str r3, [r7, #28] + 8001f9a: 2302 movs r3, #2 + 8001f9c: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 800228e: f107 0310 add.w r3, r7, #16 - 8002292: 4619 mov r1, r3 - 8002294: 481d ldr r0, [pc, #116] @ (800230c ) - 8002296: f002 fa6b bl 8004770 + 8001f9e: f107 0310 add.w r3, r7, #16 + 8001fa2: 4619 mov r1, r3 + 8001fa4: 4813 ldr r0, [pc, #76] @ (8001ff4 ) + 8001fa6: f001 fc61 bl 800386c - /*Configure GPIO pins : RS485_Addr4_Pin RS485_Addr5_Pin RS485_Addr6_Pin RS485_Addr7_Pin */ - GPIO_InitStruct.Pin = RS485_Addr4_Pin|RS485_Addr5_Pin|RS485_Addr6_Pin|RS485_Addr7_Pin; - 800229a: f44f 4370 mov.w r3, #61440 @ 0xf000 - 800229e: 613b str r3, [r7, #16] + /*Configure GPIO pins : RS485_Addr4_Pin RS485_Addr5_Pin RS485_Addr6_Pin RS485_Addr7_Pin + Calib_PH_Pin */ + GPIO_InitStruct.Pin = RS485_Addr4_Pin|RS485_Addr5_Pin|RS485_Addr6_Pin|RS485_Addr7_Pin + 8001faa: f24f 0308 movw r3, #61448 @ 0xf008 + 8001fae: 613b str r3, [r7, #16] + |Calib_PH_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80022a0: 2300 movs r3, #0 - 80022a2: 617b str r3, [r7, #20] + 8001fb0: 2300 movs r3, #0 + 8001fb2: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_PULLUP; - 80022a4: 2301 movs r3, #1 - 80022a6: 61bb str r3, [r7, #24] + 8001fb4: 2301 movs r3, #1 + 8001fb6: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80022a8: f107 0310 add.w r3, r7, #16 - 80022ac: 4619 mov r1, r3 - 80022ae: 4817 ldr r0, [pc, #92] @ (800230c ) - 80022b0: f002 fa5e bl 8004770 + 8001fb8: f107 0310 add.w r3, r7, #16 + 8001fbc: 4619 mov r1, r3 + 8001fbe: 480d ldr r0, [pc, #52] @ (8001ff4 ) + 8001fc0: f001 fc54 bl 800386c /*Configure GPIO pin : TX_EN_RS485_Pin */ GPIO_InitStruct.Pin = TX_EN_RS485_Pin; - 80022b4: f44f 5380 mov.w r3, #4096 @ 0x1000 - 80022b8: 613b str r3, [r7, #16] + 8001fc4: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8001fc8: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 80022ba: 2301 movs r3, #1 - 80022bc: 617b str r3, [r7, #20] + 8001fca: 2301 movs r3, #1 + 8001fcc: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80022be: 2300 movs r3, #0 - 80022c0: 61bb str r3, [r7, #24] + 8001fce: 2300 movs r3, #0 + 8001fd0: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80022c2: 2302 movs r3, #2 - 80022c4: 61fb str r3, [r7, #28] + 8001fd2: 2302 movs r3, #2 + 8001fd4: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_EN_RS485_GPIO_Port, &GPIO_InitStruct); - 80022c6: f107 0310 add.w r3, r7, #16 - 80022ca: 4619 mov r1, r3 - 80022cc: 4810 ldr r0, [pc, #64] @ (8002310 ) - 80022ce: f002 fa4f bl 8004770 - - /*Configure GPIO pin : Calib_PH_Pin */ - GPIO_InitStruct.Pin = Calib_PH_Pin; - 80022d2: 2308 movs r3, #8 - 80022d4: 613b str r3, [r7, #16] - GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING; - 80022d6: 4b0f ldr r3, [pc, #60] @ (8002314 ) - 80022d8: 617b str r3, [r7, #20] - GPIO_InitStruct.Pull = GPIO_PULLUP; - 80022da: 2301 movs r3, #1 - 80022dc: 61bb str r3, [r7, #24] - HAL_GPIO_Init(Calib_PH_GPIO_Port, &GPIO_InitStruct); - 80022de: f107 0310 add.w r3, r7, #16 - 80022e2: 4619 mov r1, r3 - 80022e4: 4809 ldr r0, [pc, #36] @ (800230c ) - 80022e6: f002 fa43 bl 8004770 - - /* EXTI interrupt init*/ - HAL_NVIC_SetPriority(EXTI3_IRQn, 0, 0); - 80022ea: 2200 movs r2, #0 - 80022ec: 2100 movs r1, #0 - 80022ee: 2009 movs r0, #9 - 80022f0: f001 fd65 bl 8003dbe - HAL_NVIC_EnableIRQ(EXTI3_IRQn); - 80022f4: 2009 movs r0, #9 - 80022f6: f001 fd7e bl 8003df6 + 8001fd6: f107 0310 add.w r3, r7, #16 + 8001fda: 4619 mov r1, r3 + 8001fdc: 4806 ldr r0, [pc, #24] @ (8001ff8 ) + 8001fde: f001 fc45 bl 800386c } - 80022fa: bf00 nop - 80022fc: 3720 adds r7, #32 - 80022fe: 46bd mov sp, r7 - 8002300: bd80 pop {r7, pc} - 8002302: bf00 nop - 8002304: 40021000 .word 0x40021000 - 8002308: 40011000 .word 0x40011000 - 800230c: 40010c00 .word 0x40010c00 - 8002310: 40010800 .word 0x40010800 - 8002314: 10310000 .word 0x10310000 + 8001fe2: bf00 nop + 8001fe4: 3720 adds r7, #32 + 8001fe6: 46bd mov sp, r7 + 8001fe8: bd80 pop {r7, pc} + 8001fea: bf00 nop + 8001fec: 40021000 .word 0x40021000 + 8001ff0: 40011000 .word 0x40011000 + 8001ff4: 40010c00 .word 0x40010c00 + 8001ff8: 40010800 .word 0x40010800 -08002318 : - * It distinguishes between rising and falling edges by reading the pin state. - * @param GPIO_Pin: Specifies the pins connected to the EXTI line. - * @retval None - */ -void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) -{ - 8002318: b580 push {r7, lr} - 800231a: b084 sub sp, #16 - 800231c: af00 add r7, sp, #0 - 800231e: 4603 mov r3, r0 - 8002320: 80fb strh r3, [r7, #6] - if ((GPIO_Pin == Calib_PH_Pin) && (main_state == STATE_RUNNING_OK)) - 8002322: 88fb ldrh r3, [r7, #6] - 8002324: 2b08 cmp r3, #8 - 8002326: d13f bne.n 80023a8 - 8002328: 4b21 ldr r3, [pc, #132] @ (80023b0 ) - 800232a: 781b ldrb r3, [r3, #0] - 800232c: 2b00 cmp r3, #0 - 800232e: d13b bne.n 80023a8 - { - uint32_t current_time = HAL_GetTick(); - 8002330: f000 ffd0 bl 80032d4 - 8002334: 60f8 str r0, [r7, #12] - GPIO_PinState pin_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_3); - 8002336: 2108 movs r1, #8 - 8002338: 481e ldr r0, [pc, #120] @ (80023b4 ) - 800233a: f002 fb9d bl 8004a78 - 800233e: 4603 mov r3, r0 - 8002340: 72fb strb r3, [r7, #11] - - if(pin_state != last_original_pin) - 8002342: 4b1d ldr r3, [pc, #116] @ (80023b8 ) - 8002344: 781b ldrb r3, [r3, #0] - 8002346: b2db uxtb r3, r3 - 8002348: 7afa ldrb r2, [r7, #11] - 800234a: 429a cmp r2, r3 - 800234c: d02c beq.n 80023a8 - { - if(first_time_state == 1) - 800234e: 4b1b ldr r3, [pc, #108] @ (80023bc ) - 8002350: 781b ldrb r3, [r3, #0] - 8002352: b2db uxtb r3, r3 - 8002354: 2b01 cmp r3, #1 - 8002356: d106 bne.n 8002366 - { - original_pin_state = pin_state; - 8002358: 4a19 ldr r2, [pc, #100] @ (80023c0 ) - 800235a: 7afb ldrb r3, [r7, #11] - 800235c: 7013 strb r3, [r2, #0] - first_time_state = 0; - 800235e: 4b17 ldr r3, [pc, #92] @ (80023bc ) - 8002360: 2200 movs r2, #0 - 8002362: 701a strb r2, [r3, #0] - last_original_pin = original_pin_state; - first_time_state = 1; - } - } - } -} - 8002364: e020 b.n 80023a8 - else if(((current_time - last_interrupt_time) > 70U) && (pin_state == original_pin_state)) - 8002366: 4b17 ldr r3, [pc, #92] @ (80023c4 ) - 8002368: 681b ldr r3, [r3, #0] - 800236a: 68fa ldr r2, [r7, #12] - 800236c: 1ad3 subs r3, r2, r3 - 800236e: 2b46 cmp r3, #70 @ 0x46 - 8002370: d91a bls.n 80023a8 - 8002372: 4b13 ldr r3, [pc, #76] @ (80023c0 ) - 8002374: 781b ldrb r3, [r3, #0] - 8002376: b2db uxtb r3, r3 - 8002378: 7afa ldrb r2, [r7, #11] - 800237a: 429a cmp r2, r3 - 800237c: d114 bne.n 80023a8 - if(pin_state == GPIO_PIN_RESET) - 800237e: 7afb ldrb r3, [r7, #11] - 8002380: 2b00 cmp r3, #0 - 8002382: d103 bne.n 800238c - edge_state = FALLING_EDGE; - 8002384: 4b10 ldr r3, [pc, #64] @ (80023c8 ) - 8002386: 22ff movs r2, #255 @ 0xff - 8002388: 701a strb r2, [r3, #0] - 800238a: e002 b.n 8002392 - edge_state = RISING_EDGE; - 800238c: 4b0e ldr r3, [pc, #56] @ (80023c8 ) - 800238e: 2201 movs r2, #1 - 8002390: 701a strb r2, [r3, #0] - last_interrupt_time = current_time; - 8002392: 4a0c ldr r2, [pc, #48] @ (80023c4 ) - 8002394: 68fb ldr r3, [r7, #12] - 8002396: 6013 str r3, [r2, #0] - last_original_pin = original_pin_state; - 8002398: 4b09 ldr r3, [pc, #36] @ (80023c0 ) - 800239a: 781b ldrb r3, [r3, #0] - 800239c: b2da uxtb r2, r3 - 800239e: 4b06 ldr r3, [pc, #24] @ (80023b8 ) - 80023a0: 701a strb r2, [r3, #0] - first_time_state = 1; - 80023a2: 4b06 ldr r3, [pc, #24] @ (80023bc ) - 80023a4: 2201 movs r2, #1 - 80023a6: 701a strb r2, [r3, #0] -} - 80023a8: bf00 nop - 80023aa: 3710 adds r7, #16 - 80023ac: 46bd mov sp, r7 - 80023ae: bd80 pop {r7, pc} - 80023b0: 200006a8 .word 0x200006a8 - 80023b4: 40010c00 .word 0x40010c00 - 80023b8: 20000001 .word 0x20000001 - 80023bc: 20000000 .word 0x20000000 - 80023c0: 200005fc .word 0x200005fc - 80023c4: 200005f8 .word 0x200005f8 - 80023c8: 200005fd .word 0x200005fd - -080023cc : +08001ffc : I2C_HandleTypeDef hi2c1; I2C_HandleTypeDef hi2c2; /* I2C1 init function */ void MX_I2C1_Init(void) { - 80023cc: b580 push {r7, lr} - 80023ce: af00 add r7, sp, #0 + 8001ffc: b580 push {r7, lr} + 8001ffe: af00 add r7, sp, #0 /* USER CODE END I2C1_Init 0 */ /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ hi2c1.Instance = I2C1; - 80023d0: 4b12 ldr r3, [pc, #72] @ (800241c ) - 80023d2: 4a13 ldr r2, [pc, #76] @ (8002420 ) - 80023d4: 601a str r2, [r3, #0] + 8002000: 4b12 ldr r3, [pc, #72] @ (800204c ) + 8002002: 4a13 ldr r2, [pc, #76] @ (8002050 ) + 8002004: 601a str r2, [r3, #0] hi2c1.Init.ClockSpeed = 100000; - 80023d6: 4b11 ldr r3, [pc, #68] @ (800241c ) - 80023d8: 4a12 ldr r2, [pc, #72] @ (8002424 ) - 80023da: 605a str r2, [r3, #4] + 8002006: 4b11 ldr r3, [pc, #68] @ (800204c ) + 8002008: 4a12 ldr r2, [pc, #72] @ (8002054 ) + 800200a: 605a str r2, [r3, #4] hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2; - 80023dc: 4b0f ldr r3, [pc, #60] @ (800241c ) - 80023de: 2200 movs r2, #0 - 80023e0: 609a str r2, [r3, #8] + 800200c: 4b0f ldr r3, [pc, #60] @ (800204c ) + 800200e: 2200 movs r2, #0 + 8002010: 609a str r2, [r3, #8] hi2c1.Init.OwnAddress1 = 0; - 80023e2: 4b0e ldr r3, [pc, #56] @ (800241c ) - 80023e4: 2200 movs r2, #0 - 80023e6: 60da str r2, [r3, #12] + 8002012: 4b0e ldr r3, [pc, #56] @ (800204c ) + 8002014: 2200 movs r2, #0 + 8002016: 60da str r2, [r3, #12] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 80023e8: 4b0c ldr r3, [pc, #48] @ (800241c ) - 80023ea: f44f 4280 mov.w r2, #16384 @ 0x4000 - 80023ee: 611a str r2, [r3, #16] + 8002018: 4b0c ldr r3, [pc, #48] @ (800204c ) + 800201a: f44f 4280 mov.w r2, #16384 @ 0x4000 + 800201e: 611a str r2, [r3, #16] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 80023f0: 4b0a ldr r3, [pc, #40] @ (800241c ) - 80023f2: 2200 movs r2, #0 - 80023f4: 615a str r2, [r3, #20] + 8002020: 4b0a ldr r3, [pc, #40] @ (800204c ) + 8002022: 2200 movs r2, #0 + 8002024: 615a str r2, [r3, #20] hi2c1.Init.OwnAddress2 = 0; - 80023f6: 4b09 ldr r3, [pc, #36] @ (800241c ) - 80023f8: 2200 movs r2, #0 - 80023fa: 619a str r2, [r3, #24] + 8002026: 4b09 ldr r3, [pc, #36] @ (800204c ) + 8002028: 2200 movs r2, #0 + 800202a: 619a str r2, [r3, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 80023fc: 4b07 ldr r3, [pc, #28] @ (800241c ) - 80023fe: 2200 movs r2, #0 - 8002400: 61da str r2, [r3, #28] + 800202c: 4b07 ldr r3, [pc, #28] @ (800204c ) + 800202e: 2200 movs r2, #0 + 8002030: 61da str r2, [r3, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 8002402: 4b06 ldr r3, [pc, #24] @ (800241c ) - 8002404: 2200 movs r2, #0 - 8002406: 621a str r2, [r3, #32] + 8002032: 4b06 ldr r3, [pc, #24] @ (800204c ) + 8002034: 2200 movs r2, #0 + 8002036: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) - 8002408: 4804 ldr r0, [pc, #16] @ (800241c ) - 800240a: f002 fb7d bl 8004b08 - 800240e: 4603 mov r3, r0 - 8002410: 2b00 cmp r3, #0 - 8002412: d001 beq.n 8002418 + 8002038: 4804 ldr r0, [pc, #16] @ (800204c ) + 800203a: f001 fde3 bl 8003c04 + 800203e: 4603 mov r3, r0 + 8002040: 2b00 cmp r3, #0 + 8002042: d001 beq.n 8002048 { Error_Handler(); - 8002414: f000 fc7c bl 8002d10 + 8002044: f000 fbae bl 80027a4 } /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } - 8002418: bf00 nop - 800241a: bd80 pop {r7, pc} - 800241c: 20000600 .word 0x20000600 - 8002420: 40005400 .word 0x40005400 - 8002424: 000186a0 .word 0x000186a0 + 8002048: bf00 nop + 800204a: bd80 pop {r7, pc} + 800204c: 200005ac .word 0x200005ac + 8002050: 40005400 .word 0x40005400 + 8002054: 000186a0 .word 0x000186a0 -08002428 : +08002058 : /* I2C2 init function */ void MX_I2C2_Init(void) { - 8002428: b580 push {r7, lr} - 800242a: af00 add r7, sp, #0 + 8002058: b580 push {r7, lr} + 800205a: af00 add r7, sp, #0 /* USER CODE END I2C2_Init 0 */ /* USER CODE BEGIN I2C2_Init 1 */ /* USER CODE END I2C2_Init 1 */ hi2c2.Instance = I2C2; - 800242c: 4b12 ldr r3, [pc, #72] @ (8002478 ) - 800242e: 4a13 ldr r2, [pc, #76] @ (800247c ) - 8002430: 601a str r2, [r3, #0] + 800205c: 4b12 ldr r3, [pc, #72] @ (80020a8 ) + 800205e: 4a13 ldr r2, [pc, #76] @ (80020ac ) + 8002060: 601a str r2, [r3, #0] hi2c2.Init.ClockSpeed = 100000; - 8002432: 4b11 ldr r3, [pc, #68] @ (8002478 ) - 8002434: 4a12 ldr r2, [pc, #72] @ (8002480 ) - 8002436: 605a str r2, [r3, #4] + 8002062: 4b11 ldr r3, [pc, #68] @ (80020a8 ) + 8002064: 4a12 ldr r2, [pc, #72] @ (80020b0 ) + 8002066: 605a str r2, [r3, #4] hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; - 8002438: 4b0f ldr r3, [pc, #60] @ (8002478 ) - 800243a: 2200 movs r2, #0 - 800243c: 609a str r2, [r3, #8] + 8002068: 4b0f ldr r3, [pc, #60] @ (80020a8 ) + 800206a: 2200 movs r2, #0 + 800206c: 609a str r2, [r3, #8] hi2c2.Init.OwnAddress1 = 0; - 800243e: 4b0e ldr r3, [pc, #56] @ (8002478 ) - 8002440: 2200 movs r2, #0 - 8002442: 60da str r2, [r3, #12] + 800206e: 4b0e ldr r3, [pc, #56] @ (80020a8 ) + 8002070: 2200 movs r2, #0 + 8002072: 60da str r2, [r3, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 8002444: 4b0c ldr r3, [pc, #48] @ (8002478 ) - 8002446: f44f 4280 mov.w r2, #16384 @ 0x4000 - 800244a: 611a str r2, [r3, #16] + 8002074: 4b0c ldr r3, [pc, #48] @ (80020a8 ) + 8002076: f44f 4280 mov.w r2, #16384 @ 0x4000 + 800207a: 611a str r2, [r3, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 800244c: 4b0a ldr r3, [pc, #40] @ (8002478 ) - 800244e: 2200 movs r2, #0 - 8002450: 615a str r2, [r3, #20] + 800207c: 4b0a ldr r3, [pc, #40] @ (80020a8 ) + 800207e: 2200 movs r2, #0 + 8002080: 615a str r2, [r3, #20] hi2c2.Init.OwnAddress2 = 0; - 8002452: 4b09 ldr r3, [pc, #36] @ (8002478 ) - 8002454: 2200 movs r2, #0 - 8002456: 619a str r2, [r3, #24] + 8002082: 4b09 ldr r3, [pc, #36] @ (80020a8 ) + 8002084: 2200 movs r2, #0 + 8002086: 619a str r2, [r3, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 8002458: 4b07 ldr r3, [pc, #28] @ (8002478 ) - 800245a: 2200 movs r2, #0 - 800245c: 61da str r2, [r3, #28] + 8002088: 4b07 ldr r3, [pc, #28] @ (80020a8 ) + 800208a: 2200 movs r2, #0 + 800208c: 61da str r2, [r3, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 800245e: 4b06 ldr r3, [pc, #24] @ (8002478 ) - 8002460: 2200 movs r2, #0 - 8002462: 621a str r2, [r3, #32] + 800208e: 4b06 ldr r3, [pc, #24] @ (80020a8 ) + 8002090: 2200 movs r2, #0 + 8002092: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) - 8002464: 4804 ldr r0, [pc, #16] @ (8002478 ) - 8002466: f002 fb4f bl 8004b08 - 800246a: 4603 mov r3, r0 - 800246c: 2b00 cmp r3, #0 - 800246e: d001 beq.n 8002474 + 8002094: 4804 ldr r0, [pc, #16] @ (80020a8 ) + 8002096: f001 fdb5 bl 8003c04 + 800209a: 4603 mov r3, r0 + 800209c: 2b00 cmp r3, #0 + 800209e: d001 beq.n 80020a4 { Error_Handler(); - 8002470: f000 fc4e bl 8002d10 + 80020a0: f000 fb80 bl 80027a4 } /* USER CODE BEGIN I2C2_Init 2 */ /* USER CODE END I2C2_Init 2 */ } - 8002474: bf00 nop - 8002476: bd80 pop {r7, pc} - 8002478: 20000654 .word 0x20000654 - 800247c: 40005800 .word 0x40005800 - 8002480: 000186a0 .word 0x000186a0 + 80020a4: bf00 nop + 80020a6: bd80 pop {r7, pc} + 80020a8: 20000600 .word 0x20000600 + 80020ac: 40005800 .word 0x40005800 + 80020b0: 000186a0 .word 0x000186a0 -08002484 : +080020b4 : void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) { - 8002484: b580 push {r7, lr} - 8002486: b08a sub sp, #40 @ 0x28 - 8002488: af00 add r7, sp, #0 - 800248a: 6078 str r0, [r7, #4] + 80020b4: b580 push {r7, lr} + 80020b6: b08a sub sp, #40 @ 0x28 + 80020b8: af00 add r7, sp, #0 + 80020ba: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 800248c: f107 0318 add.w r3, r7, #24 - 8002490: 2200 movs r2, #0 - 8002492: 601a str r2, [r3, #0] - 8002494: 605a str r2, [r3, #4] - 8002496: 609a str r2, [r3, #8] - 8002498: 60da str r2, [r3, #12] + 80020bc: f107 0318 add.w r3, r7, #24 + 80020c0: 2200 movs r2, #0 + 80020c2: 601a str r2, [r3, #0] + 80020c4: 605a str r2, [r3, #4] + 80020c6: 609a str r2, [r3, #8] + 80020c8: 60da str r2, [r3, #12] if(i2cHandle->Instance==I2C1) - 800249a: 687b ldr r3, [r7, #4] - 800249c: 681b ldr r3, [r3, #0] - 800249e: 4a2b ldr r2, [pc, #172] @ (800254c ) - 80024a0: 4293 cmp r3, r2 - 80024a2: d124 bne.n 80024ee + 80020ca: 687b ldr r3, [r7, #4] + 80020cc: 681b ldr r3, [r3, #0] + 80020ce: 4a2b ldr r2, [pc, #172] @ (800217c ) + 80020d0: 4293 cmp r3, r2 + 80020d2: d124 bne.n 800211e { /* USER CODE BEGIN I2C1_MspInit 0 */ /* USER CODE END I2C1_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); - 80024a4: 4b2a ldr r3, [pc, #168] @ (8002550 ) - 80024a6: 699b ldr r3, [r3, #24] - 80024a8: 4a29 ldr r2, [pc, #164] @ (8002550 ) - 80024aa: f043 0308 orr.w r3, r3, #8 - 80024ae: 6193 str r3, [r2, #24] - 80024b0: 4b27 ldr r3, [pc, #156] @ (8002550 ) - 80024b2: 699b ldr r3, [r3, #24] - 80024b4: f003 0308 and.w r3, r3, #8 - 80024b8: 617b str r3, [r7, #20] - 80024ba: 697b ldr r3, [r7, #20] + 80020d4: 4b2a ldr r3, [pc, #168] @ (8002180 ) + 80020d6: 699b ldr r3, [r3, #24] + 80020d8: 4a29 ldr r2, [pc, #164] @ (8002180 ) + 80020da: f043 0308 orr.w r3, r3, #8 + 80020de: 6193 str r3, [r2, #24] + 80020e0: 4b27 ldr r3, [pc, #156] @ (8002180 ) + 80020e2: 699b ldr r3, [r3, #24] + 80020e4: f003 0308 and.w r3, r3, #8 + 80020e8: 617b str r3, [r7, #20] + 80020ea: 697b ldr r3, [r7, #20] /**I2C1 GPIO Configuration PB6 ------> I2C1_SCL PB7 ------> I2C1_SDA */ GPIO_InitStruct.Pin = I2C1_SCL_PH_Pin|I2C1_SDA_PH_Pin; - 80024bc: 23c0 movs r3, #192 @ 0xc0 - 80024be: 61bb str r3, [r7, #24] + 80020ec: 23c0 movs r3, #192 @ 0xc0 + 80020ee: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 80024c0: 2312 movs r3, #18 - 80024c2: 61fb str r3, [r7, #28] + 80020f0: 2312 movs r3, #18 + 80020f2: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80024c4: 2302 movs r3, #2 - 80024c6: 627b str r3, [r7, #36] @ 0x24 + 80020f4: 2302 movs r3, #2 + 80020f6: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80024c8: f107 0318 add.w r3, r7, #24 - 80024cc: 4619 mov r1, r3 - 80024ce: 4821 ldr r0, [pc, #132] @ (8002554 ) - 80024d0: f002 f94e bl 8004770 + 80020f8: f107 0318 add.w r3, r7, #24 + 80020fc: 4619 mov r1, r3 + 80020fe: 4821 ldr r0, [pc, #132] @ (8002184 ) + 8002100: f001 fbb4 bl 800386c /* I2C1 clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); - 80024d4: 4b1e ldr r3, [pc, #120] @ (8002550 ) - 80024d6: 69db ldr r3, [r3, #28] - 80024d8: 4a1d ldr r2, [pc, #116] @ (8002550 ) - 80024da: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 - 80024de: 61d3 str r3, [r2, #28] - 80024e0: 4b1b ldr r3, [pc, #108] @ (8002550 ) - 80024e2: 69db ldr r3, [r3, #28] - 80024e4: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 80024e8: 613b str r3, [r7, #16] - 80024ea: 693b ldr r3, [r7, #16] + 8002104: 4b1e ldr r3, [pc, #120] @ (8002180 ) + 8002106: 69db ldr r3, [r3, #28] + 8002108: 4a1d ldr r2, [pc, #116] @ (8002180 ) + 800210a: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 + 800210e: 61d3 str r3, [r2, #28] + 8002110: 4b1b ldr r3, [pc, #108] @ (8002180 ) + 8002112: 69db ldr r3, [r3, #28] + 8002114: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 8002118: 613b str r3, [r7, #16] + 800211a: 693b ldr r3, [r7, #16] __HAL_RCC_I2C2_CLK_ENABLE(); /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } - 80024ec: e029 b.n 8002542 + 800211c: e029 b.n 8002172 else if(i2cHandle->Instance==I2C2) - 80024ee: 687b ldr r3, [r7, #4] - 80024f0: 681b ldr r3, [r3, #0] - 80024f2: 4a19 ldr r2, [pc, #100] @ (8002558 ) - 80024f4: 4293 cmp r3, r2 - 80024f6: d124 bne.n 8002542 + 800211e: 687b ldr r3, [r7, #4] + 8002120: 681b ldr r3, [r3, #0] + 8002122: 4a19 ldr r2, [pc, #100] @ (8002188 ) + 8002124: 4293 cmp r3, r2 + 8002126: d124 bne.n 8002172 __HAL_RCC_GPIOB_CLK_ENABLE(); - 80024f8: 4b15 ldr r3, [pc, #84] @ (8002550 ) - 80024fa: 699b ldr r3, [r3, #24] - 80024fc: 4a14 ldr r2, [pc, #80] @ (8002550 ) - 80024fe: f043 0308 orr.w r3, r3, #8 - 8002502: 6193 str r3, [r2, #24] - 8002504: 4b12 ldr r3, [pc, #72] @ (8002550 ) - 8002506: 699b ldr r3, [r3, #24] - 8002508: f003 0308 and.w r3, r3, #8 - 800250c: 60fb str r3, [r7, #12] - 800250e: 68fb ldr r3, [r7, #12] + 8002128: 4b15 ldr r3, [pc, #84] @ (8002180 ) + 800212a: 699b ldr r3, [r3, #24] + 800212c: 4a14 ldr r2, [pc, #80] @ (8002180 ) + 800212e: f043 0308 orr.w r3, r3, #8 + 8002132: 6193 str r3, [r2, #24] + 8002134: 4b12 ldr r3, [pc, #72] @ (8002180 ) + 8002136: 699b ldr r3, [r3, #24] + 8002138: f003 0308 and.w r3, r3, #8 + 800213c: 60fb str r3, [r7, #12] + 800213e: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = I2C2_SCL_CE_Pin|I2C2_SDA_CE_Pin; - 8002510: f44f 6340 mov.w r3, #3072 @ 0xc00 - 8002514: 61bb str r3, [r7, #24] + 8002140: f44f 6340 mov.w r3, #3072 @ 0xc00 + 8002144: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 8002516: 2312 movs r3, #18 - 8002518: 61fb str r3, [r7, #28] + 8002146: 2312 movs r3, #18 + 8002148: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800251a: 2302 movs r3, #2 - 800251c: 627b str r3, [r7, #36] @ 0x24 + 800214a: 2302 movs r3, #2 + 800214c: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 800251e: f107 0318 add.w r3, r7, #24 - 8002522: 4619 mov r1, r3 - 8002524: 480b ldr r0, [pc, #44] @ (8002554 ) - 8002526: f002 f923 bl 8004770 + 800214e: f107 0318 add.w r3, r7, #24 + 8002152: 4619 mov r1, r3 + 8002154: 480b ldr r0, [pc, #44] @ (8002184 ) + 8002156: f001 fb89 bl 800386c __HAL_RCC_I2C2_CLK_ENABLE(); - 800252a: 4b09 ldr r3, [pc, #36] @ (8002550 ) - 800252c: 69db ldr r3, [r3, #28] - 800252e: 4a08 ldr r2, [pc, #32] @ (8002550 ) - 8002530: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 - 8002534: 61d3 str r3, [r2, #28] - 8002536: 4b06 ldr r3, [pc, #24] @ (8002550 ) - 8002538: 69db ldr r3, [r3, #28] - 800253a: f403 0380 and.w r3, r3, #4194304 @ 0x400000 - 800253e: 60bb str r3, [r7, #8] - 8002540: 68bb ldr r3, [r7, #8] + 800215a: 4b09 ldr r3, [pc, #36] @ (8002180 ) + 800215c: 69db ldr r3, [r3, #28] + 800215e: 4a08 ldr r2, [pc, #32] @ (8002180 ) + 8002160: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 + 8002164: 61d3 str r3, [r2, #28] + 8002166: 4b06 ldr r3, [pc, #24] @ (8002180 ) + 8002168: 69db ldr r3, [r3, #28] + 800216a: f403 0380 and.w r3, r3, #4194304 @ 0x400000 + 800216e: 60bb str r3, [r7, #8] + 8002170: 68bb ldr r3, [r7, #8] } - 8002542: bf00 nop - 8002544: 3728 adds r7, #40 @ 0x28 - 8002546: 46bd mov sp, r7 - 8002548: bd80 pop {r7, pc} - 800254a: bf00 nop - 800254c: 40005400 .word 0x40005400 - 8002550: 40021000 .word 0x40021000 - 8002554: 40010c00 .word 0x40010c00 - 8002558: 40005800 .word 0x40005800 - 800255c: 00000000 .word 0x00000000 + 8002172: bf00 nop + 8002174: 3728 adds r7, #40 @ 0x28 + 8002176: 46bd mov sp, r7 + 8002178: bd80 pop {r7, pc} + 800217a: bf00 nop + 800217c: 40005400 .word 0x40005400 + 8002180: 40021000 .word 0x40021000 + 8002184: 40010c00 .word 0x40010c00 + 8002188: 40005800 .word 0x40005800 -08002560
: +0800218c
: /** * @brief The application entry point. * @retval int */ int main(void) { - 8002560: b580 push {r7, lr} - 8002562: b08c sub sp, #48 @ 0x30 - 8002564: af00 add r7, sp, #0 + 800218c: b580 push {r7, lr} + 800218e: b090 sub sp, #64 @ 0x40 + 8002190: af00 add r7, sp, #0 /* USER CODE BEGIN 1 */ HAL_StatusTypeDef status0,status1; // Variables to store previous LED states uint8_t previous_green_state = 0; - 8002566: 2300 movs r3, #0 - 8002568: f887 302a strb.w r3, [r7, #42] @ 0x2a + 8002192: 2300 movs r3, #0 + 8002194: f887 303f strb.w r3, [r7, #63] @ 0x3f uint8_t previous_red_state = 0; - 800256c: 2300 movs r3, #0 - 800256e: f887 3029 strb.w r3, [r7, #41] @ 0x29 + 8002198: 2300 movs r3, #0 + 800219a: f887 303e strb.w r3, [r7, #62] @ 0x3e // Variables for timing uint32_t previous_millis_green = 0; - 8002572: 2300 movs r3, #0 - 8002574: 62fb str r3, [r7, #44] @ 0x2c + 800219e: 2300 movs r3, #0 + 80021a0: 63bb str r3, [r7, #56] @ 0x38 uint32_t previous_millis_red = 0; - 8002576: 2300 movs r3, #0 - 8002578: 627b str r3, [r7, #36] @ 0x24 + 80021a2: 2300 movs r3, #0 + 80021a4: 637b str r3, [r7, #52] @ 0x34 /*! Temporary variables */ uint8_t tempString[10] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; - 800257a: 1d3b adds r3, r7, #4 - 800257c: 2200 movs r2, #0 - 800257e: 601a str r2, [r3, #0] - 8002580: 605a str r2, [r3, #4] - 8002582: 811a strh r2, [r3, #8] + 80021a6: f107 0308 add.w r3, r7, #8 + 80021aa: 2200 movs r2, #0 + 80021ac: 601a str r2, [r3, #0] + 80021ae: 605a str r2, [r3, #4] + 80021b0: 811a strh r2, [r3, #8] /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 8002584: f000 fe4e bl 8003224 + 80021b2: f000 fd03 bl 8002bbc /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 8002588: f000 fa44 bl 8002a14 + 80021b6: f000 f991 bl 80024dc /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 800258c: f7ff fe0e bl 80021ac - MX_DMA_Init(); - 8002590: f7ff fd74 bl 800207c + 80021ba: f7ff fe7f bl 8001ebc MX_ADC1_Init(); - 8002594: f7ff fa80 bl 8001a98 + 80021be: f7ff fb65 bl 800188c MX_ADC2_Init(); - 8002598: f7ff facc bl 8001b34 + 80021c2: f7ff fba1 bl 8001908 MX_I2C1_Init(); - 800259c: f7ff ff16 bl 80023cc + 80021c6: f7ff ff19 bl 8001ffc MX_I2C2_Init(); - 80025a0: f7ff ff42 bl 8002428 + 80021ca: f7ff ff45 bl 8002058 MX_USART1_UART_Init(); - 80025a4: f000 fd9a bl 80030dc - MX_TIM3_Init(); - 80025a8: f000 fd2c bl 8003004 + 80021ce: f000 fc51 bl 8002a74 /* USER CODE BEGIN 2 */ Flash_Load_Page(&flash_data); - 80025ac: 48c2 ldr r0, [pc, #776] @ (80028b8 ) - 80025ae: f7ff fddd bl 800216c - - //TempSensor_Init(&hadc1); - - + 80021d2: 48b9 ldr r0, [pc, #740] @ (80024b8 ) + 80021d4: f7ff fe52 bl 8001e7c HAL_TIM_Base_Start(&htim3); - 80025b2: 48c2 ldr r0, [pc, #776] @ (80028bc ) - 80025b4: f004 f8aa bl 800670c HAL_ADCEx_Calibration_Start(&hadc1); - 80025b8: 48c1 ldr r0, [pc, #772] @ (80028c0 ) - 80025ba: f001 fa7b bl 8003ab4 - HAL_ADC_Start_DMA(&hadc1, (uint32_t*)AD_RES, 2); // Start ADC Conversion - 80025be: 2202 movs r2, #2 - 80025c0: 49c0 ldr r1, [pc, #768] @ (80028c4 ) - 80025c2: 48bf ldr r0, [pc, #764] @ (80028c0 ) - 80025c4: f000 ff8c bl 80034e0 + HAL_ADC_Start_DMA(&hadc1, (uint32_t*)AD_RES, 2); // Internal Temperature conversion +*/ digital_outputs_init(); - 80025c8: f7ff fd16 bl 8001ff8 + 80021d8: f7ff fdb4 bl 8001d44 // Initialize RS-485 driver rs485_init(); - 80025cc: f000 fbb2 bl 8002d34 + 80021dc: f000 faf4 bl 80027c8 ADS1015(&i2c, &hi2c1, ADS_ADDR_GND); - 80025d0: 2248 movs r2, #72 @ 0x48 - 80025d2: 49bd ldr r1, [pc, #756] @ (80028c8 ) - 80025d4: 48bd ldr r0, [pc, #756] @ (80028cc ) - 80025d6: f7ff fbc8 bl 8001d6a + 80021e0: 2248 movs r2, #72 @ 0x48 + 80021e2: 49b6 ldr r1, [pc, #728] @ (80024bc ) + 80021e4: 48b6 ldr r0, [pc, #728] @ (80024c0 ) + 80021e6: f7ff fc7e bl 8001ae6 ADSsetGain(&i2c, GAIN_SIXTEEN); - 80025da: f44f 6120 mov.w r1, #2560 @ 0xa00 - 80025de: 48bb ldr r0, [pc, #748] @ (80028cc ) - 80025e0: f7ff fbe1 bl 8001da6 + 80021ea: f44f 6120 mov.w r1, #2560 @ 0xa00 + 80021ee: 48b4 ldr r0, [pc, #720] @ (80024c0 ) + 80021f0: f7ff fc97 bl 8001b22 // Start CE and RTD Measurement AD5934_Init(); - 80025e4: f7fe fe14 bl 8001210 + 80021f4: f7fe fed2 bl 8000f9c /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ - if(HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_3) == GPIO_PIN_RESET) - 80025e8: 2108 movs r1, #8 - 80025ea: 48b9 ldr r0, [pc, #740] @ (80028d0 ) - 80025ec: f002 fa44 bl 8004a78 - 80025f0: 4603 mov r3, r0 - 80025f2: 2b00 cmp r3, #0 - 80025f4: d167 bne.n 80026c6 + if(HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_3) == GPIO_PIN_RESET) // When PB3 (with internal pull up) in the Prog Header is set to GND + 80021f8: 2108 movs r1, #8 + 80021fa: 48b2 ldr r0, [pc, #712] @ (80024c4 ) + 80021fc: f001 fcba bl 8003b74 + 8002200: 4603 mov r3, r0 + 8002202: 2b00 cmp r3, #0 + 8002204: f040 8091 bne.w 800232a { + main_state = STATE_SETUP_CALIBRATION; - 80025f6: 4bb7 ldr r3, [pc, #732] @ (80028d4 ) - 80025f8: 2201 movs r2, #1 - 80025fa: 701a strb r2, [r3, #0] + 8002208: 4baf ldr r3, [pc, #700] @ (80024c8 ) + 800220a: 2201 movs r2, #1 + 800220c: 701a strb r2, [r3, #0] HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); - 80025fc: 2201 movs r2, #1 - 80025fe: 2110 movs r1, #16 - 8002600: 48b3 ldr r0, [pc, #716] @ (80028d0 ) - 8002602: f002 fa50 bl 8004aa6 + 800220e: 2201 movs r2, #1 + 8002210: 2110 movs r1, #16 + 8002212: 48ac ldr r0, [pc, #688] @ (80024c4 ) + 8002214: f001 fcc5 bl 8003ba2 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_RESET); // Red LED On - 8002606: 2200 movs r2, #0 - 8002608: 2120 movs r1, #32 - 800260a: 48b1 ldr r0, [pc, #708] @ (80028d0 ) - 800260c: f002 fa4b bl 8004aa6 + 8002218: 2200 movs r2, #0 + 800221a: 2120 movs r1, #32 + 800221c: 48a9 ldr r0, [pc, #676] @ (80024c4 ) + 800221e: f001 fcc0 bl 8003ba2 - for(i=0;i<32;i++) - 8002610: 2300 movs r3, #0 - 8002612: f887 302b strb.w r3, [r7, #43] @ 0x2b - 8002616: e011 b.n 800263c + for(i=0;i<32;i++) // Loop to get stability and get averages + 8002222: 2300 movs r3, #0 + 8002224: f887 3033 strb.w r3, [r7, #51] @ 0x33 + 8002228: e032 b.n 8002290 { - flash_data.temperature_value = temperature_RTD; - 8002618: 4aa7 ldr r2, [pc, #668] @ (80028b8 ) - 800261a: 6a3b ldr r3, [r7, #32] - 800261c: 6153 str r3, [r2, #20] - flash_data.ph4_value = ADSCalculate_ph_Volts(); - 800261e: f7ff fc0f bl 8001e40 - 8002622: 4603 mov r3, r0 - 8002624: 4aa4 ldr r2, [pc, #656] @ (80028b8 ) - 8002626: 6053 str r3, [r2, #4] - flash_data.ec1413_value = AD5934_GetImpedance(); - 8002628: f7ff f846 bl 80016b8 - 800262c: 4603 mov r3, r0 - 800262e: 4aa2 ldr r2, [pc, #648] @ (80028b8 ) - 8002630: 60d3 str r3, [r2, #12] - for(i=0;i<32;i++) - 8002632: f897 302b ldrb.w r3, [r7, #43] @ 0x2b - 8002636: 3301 adds r3, #1 - 8002638: f887 302b strb.w r3, [r7, #43] @ 0x2b - 800263c: f897 302b ldrb.w r3, [r7, #43] @ 0x2b - 8002640: 2b1f cmp r3, #31 - 8002642: d9e9 bls.n 8002618 + flash_data.ph4_volts = ADSCalculate_ph_Volts(); + 800222a: f7ff fcc7 bl 8001bbc + 800222e: 4603 mov r3, r0 + 8002230: 4aa1 ldr r2, [pc, #644] @ (80024b8 ) + 8002232: 6053 str r3, [r2, #4] + flash_data.temperature_value = AD5934_GetTemperature(); // Air Temperature is not stored, just used to calculate impedance + 8002234: f7fe ff0e bl 8001054 + 8002238: 4603 mov r3, r0 + 800223a: 4a9f ldr r2, [pc, #636] @ (80024b8 ) + 800223c: 6153 str r3, [r2, #20] + flash_data.ec0_mag = AD5934_GetImpedance(flash_data.temperature_value); // Dry Probe + 800223e: 4b9e ldr r3, [pc, #632] @ (80024b8 ) + 8002240: 695b ldr r3, [r3, #20] + 8002242: 4618 mov r0, r3 + 8002244: f7ff f902 bl 800144c + 8002248: 4603 mov r3, r0 + 800224a: 4a9b ldr r2, [pc, #620] @ (80024b8 ) + 800224c: 6113 str r3, [r2, #16] + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) + 800224e: 2140 movs r1, #64 @ 0x40 + 8002250: 489e ldr r0, [pc, #632] @ (80024cc ) + 8002252: f001 fc8f bl 8003b74 + 8002256: 4603 mov r3, r0 + 8002258: 2b01 cmp r3, #1 + 800225a: d103 bne.n 8002264 + flash_data.EC10mS_EC5mS_switch = AD5934_CH_EC_HIGH_GAIN; // 5mS/cm option + 800225c: 4b96 ldr r3, [pc, #600] @ (80024b8 ) + 800225e: 2284 movs r2, #132 @ 0x84 + 8002260: 765a strb r2, [r3, #25] + 8002262: e002 b.n 800226a + else + flash_data.EC10mS_EC5mS_switch = AD5934_CH_EC_MID_GAIN; //10ms/cm option + 8002264: 4b94 ldr r3, [pc, #592] @ (80024b8 ) + 8002266: 2282 movs r2, #130 @ 0x82 + 8002268: 765a strb r2, [r3, #25] + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) + 800226a: 2180 movs r1, #128 @ 0x80 + 800226c: 4897 ldr r0, [pc, #604] @ (80024cc ) + 800226e: f001 fc81 bl 8003b74 + 8002272: 4603 mov r3, r0 + 8002274: 2b01 cmp r3, #1 + 8002276: d103 bne.n 8002280 + flash_data.PT100_PT1000_switch = AD5934_CH_RTD_LOW_GAIN; //PT100 option + 8002278: 4b8f ldr r3, [pc, #572] @ (80024b8 ) + 800227a: 2241 movs r2, #65 @ 0x41 + 800227c: 761a strb r2, [r3, #24] + 800227e: e002 b.n 8002286 + else + flash_data.PT100_PT1000_switch = AD5934_CH_RTD_MID_GAIN; //PT1000 option + 8002280: 4b8d ldr r3, [pc, #564] @ (80024b8 ) + 8002282: 2242 movs r2, #66 @ 0x42 + 8002284: 761a strb r2, [r3, #24] + for(i=0;i<32;i++) // Loop to get stability and get averages + 8002286: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 + 800228a: 3301 adds r3, #1 + 800228c: f887 3033 strb.w r3, [r7, #51] @ 0x33 + 8002290: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 + 8002294: 2b1f cmp r3, #31 + 8002296: d9c8 bls.n 800222a + } while(HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_3) == GPIO_PIN_RESET); - 8002644: bf00 nop - 8002646: 2108 movs r1, #8 - 8002648: 48a1 ldr r0, [pc, #644] @ (80028d0 ) - 800264a: f002 fa15 bl 8004a78 - 800264e: 4603 mov r3, r0 - 8002650: 2b00 cmp r3, #0 - 8002652: d0f8 beq.n 8002646 + 8002298: bf00 nop + 800229a: 2108 movs r1, #8 + 800229c: 4889 ldr r0, [pc, #548] @ (80024c4 ) + 800229e: f001 fc69 bl 8003b74 + 80022a2: 4603 mov r3, r0 + 80022a4: 2b00 cmp r3, #0 + 80022a6: d0f8 beq.n 800229a HAL_Delay(500); - 8002654: f44f 70fa mov.w r0, #500 @ 0x1f4 - 8002658: f000 fe46 bl 80032e8 + 80022a8: f44f 70fa mov.w r0, #500 @ 0x1f4 + 80022ac: f000 fce8 bl 8002c80 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_RESET); // Green LED On - 800265c: 2200 movs r2, #0 - 800265e: 2110 movs r1, #16 - 8002660: 489b ldr r0, [pc, #620] @ (80028d0 ) - 8002662: f002 fa20 bl 8004aa6 + 80022b0: 2200 movs r2, #0 + 80022b2: 2110 movs r1, #16 + 80022b4: 4883 ldr r0, [pc, #524] @ (80024c4 ) + 80022b6: f001 fc74 bl 8003ba2 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); - 8002666: 2201 movs r2, #1 - 8002668: 2120 movs r1, #32 - 800266a: 4899 ldr r0, [pc, #612] @ (80028d0 ) - 800266c: f002 fa1b bl 8004aa6 + 80022ba: 2201 movs r2, #1 + 80022bc: 2120 movs r1, #32 + 80022be: 4881 ldr r0, [pc, #516] @ (80024c4 ) + 80022c0: f001 fc6f bl 8003ba2 - for(i=0;i<32;i++) - 8002670: 2300 movs r3, #0 - 8002672: f887 302b strb.w r3, [r7, #43] @ 0x2b - 8002676: e011 b.n 800269c + for(i=0;i<32;i++) // Loop to get stability and get averages + 80022c4: 2300 movs r3, #0 + 80022c6: f887 3033 strb.w r3, [r7, #51] @ 0x33 + 80022ca: e019 b.n 8002300 { - flash_data.ph7_value = ADSCalculate_ph_Volts(); - 8002678: f7ff fbe2 bl 8001e40 - 800267c: 4603 mov r3, r0 - 800267e: 4a8e ldr r2, [pc, #568] @ (80028b8 ) - 8002680: 6093 str r3, [r2, #8] - flash_data.ec12880_value = AD5934_GetImpedance(); - 8002682: f7ff f819 bl 80016b8 - 8002686: 4603 mov r3, r0 - 8002688: 4a8b ldr r2, [pc, #556] @ (80028b8 ) - 800268a: 6113 str r3, [r2, #16] - Flash_Save_Page(&flash_data); - 800268c: 488a ldr r0, [pc, #552] @ (80028b8 ) - 800268e: f7ff fd13 bl 80020b8 - for(i=0;i<32;i++) - 8002692: f897 302b ldrb.w r3, [r7, #43] @ 0x2b - 8002696: 3301 adds r3, #1 - 8002698: f887 302b strb.w r3, [r7, #43] @ 0x2b - 800269c: f897 302b ldrb.w r3, [r7, #43] @ 0x2b - 80026a0: 2b1f cmp r3, #31 - 80026a2: d9e9 bls.n 8002678 + flash_data.temperature_value = AD5934_GetTemperature(); // Liquid Temperature is stored + 80022cc: f7fe fec2 bl 8001054 + 80022d0: 4603 mov r3, r0 + 80022d2: 4a79 ldr r2, [pc, #484] @ (80024b8 ) + 80022d4: 6153 str r3, [r2, #20] + flash_data.ph7_volts = ADSCalculate_ph_Volts(); + 80022d6: f7ff fc71 bl 8001bbc + 80022da: 4603 mov r3, r0 + 80022dc: 4a76 ldr r2, [pc, #472] @ (80024b8 ) + 80022de: 6093 str r3, [r2, #8] + flash_data.ec1413_mag = AD5934_GetImpedance(flash_data.temperature_value); // Get the impedance of the reference liquid + 80022e0: 4b75 ldr r3, [pc, #468] @ (80024b8 ) + 80022e2: 695b ldr r3, [r3, #20] + 80022e4: 4618 mov r0, r3 + 80022e6: f7ff f8b1 bl 800144c + 80022ea: 4603 mov r3, r0 + 80022ec: 4a72 ldr r2, [pc, #456] @ (80024b8 ) + 80022ee: 60d3 str r3, [r2, #12] + Flash_Save_Page(&flash_data); // Store Calibration parameters in Flash + 80022f0: 4871 ldr r0, [pc, #452] @ (80024b8 ) + 80022f2: f7ff fd69 bl 8001dc8 + for(i=0;i<32;i++) // Loop to get stability and get averages + 80022f6: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 + 80022fa: 3301 adds r3, #1 + 80022fc: f887 3033 strb.w r3, [r7, #51] @ 0x33 + 8002300: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 + 8002304: 2b1f cmp r3, #31 + 8002306: d9e1 bls.n 80022cc } HAL_Delay(500); - 80026a4: f44f 70fa mov.w r0, #500 @ 0x1f4 - 80026a8: f000 fe1e bl 80032e8 + 8002308: f44f 70fa mov.w r0, #500 @ 0x1f4 + 800230c: f000 fcb8 bl 8002c80 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_RESET); // Green LED On - 80026ac: 2200 movs r2, #0 - 80026ae: 2110 movs r1, #16 - 80026b0: 4887 ldr r0, [pc, #540] @ (80028d0 ) - 80026b2: f002 f9f8 bl 8004aa6 + 8002310: 2200 movs r2, #0 + 8002312: 2110 movs r1, #16 + 8002314: 486b ldr r0, [pc, #428] @ (80024c4 ) + 8002316: f001 fc44 bl 8003ba2 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_RESET); // Red LED On - 80026b6: 2200 movs r2, #0 - 80026b8: 2120 movs r1, #32 - 80026ba: 4885 ldr r0, [pc, #532] @ (80028d0 ) - 80026bc: f002 f9f3 bl 8004aa6 + 800231a: 2200 movs r2, #0 + 800231c: 2120 movs r1, #32 + 800231e: 4869 ldr r0, [pc, #420] @ (80024c4 ) + 8002320: f001 fc3f bl 8003ba2 main_state = STATE_RUNNING_OK; - 80026c0: 4b84 ldr r3, [pc, #528] @ (80028d4 ) - 80026c2: 2200 movs r2, #0 - 80026c4: 701a strb r2, [r3, #0] - while (1) + 8002324: 4b68 ldr r3, [pc, #416] @ (80024c8 ) + 8002326: 2200 movs r2, #0 + 8002328: 701a strb r2, [r3, #0] { - /* USER CODE END WHILE */ - - /* USER CODE BEGIN 3 */ - current_millis = HAL_GetTick(); - 80026c6: f000 fe05 bl 80032d4 - 80026ca: 61f8 str r0, [r7, #28] - // Piscar LED verde em PB5 a cada 0,5 segundos - if ((current_millis - previous_millis_green) >= 500) - 80026cc: 69fa ldr r2, [r7, #28] - 80026ce: 6afb ldr r3, [r7, #44] @ 0x2c - 80026d0: 1ad3 subs r3, r2, r3 - 80026d2: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 - 80026d6: f0c0 80a7 bcc.w 8002828 - { - previous_millis_green = current_millis; - 80026da: 69fb ldr r3, [r7, #28] - 80026dc: 62fb str r3, [r7, #44] @ 0x2c - previous_green_state = current_green_state; - uint8_t led_data[2] = {0x01, current_green_state}; // Command 0x01 for green LED - - }*/ - - FloatToString(tempString, Temperature); - 80026de: 4b7e ldr r3, [pc, #504] @ (80028d8 ) - 80026e0: 681b ldr r3, [r3, #0] - 80026e2: 4618 mov r0, r3 - 80026e4: f7fd fea0 bl 8000428 <__aeabi_f2d> - 80026e8: 4602 mov r2, r0 - 80026ea: 460b mov r3, r1 - 80026ec: 1d39 adds r1, r7, #4 - 80026ee: 4608 mov r0, r1 - 80026f0: f000 f9ec bl 8002acc - status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); - 80026f4: 1d3b adds r3, r7, #4 - 80026f6: 4618 mov r0, r3 - 80026f8: f7fd fd2a bl 8000150 - 80026fc: 4603 mov r3, r0 - 80026fe: b29b uxth r3, r3 - 8002700: 3b01 subs r3, #1 - 8002702: b29a uxth r2, r3 - 8002704: 1d3b adds r3, r7, #4 - 8002706: 4611 mov r1, r2 - 8002708: 4618 mov r0, r3 - 800270a: f000 fb3f bl 8002d8c - 800270e: 4603 mov r3, r0 - 8002710: 76fb strb r3, [r7, #27] - status1 = rs485_send_broadcast(newline_temp, strlen((char*)newline_temp)); - 8002712: 4872 ldr r0, [pc, #456] @ (80028dc ) - 8002714: f7fd fd1c bl 8000150 - 8002718: 4603 mov r3, r0 - 800271a: b29b uxth r3, r3 - 800271c: 4619 mov r1, r3 - 800271e: 486f ldr r0, [pc, #444] @ (80028dc ) - 8002720: f000 fb34 bl 8002d8c - 8002724: 4603 mov r3, r0 - 8002726: 76bb strb r3, [r7, #26] + current_millis = HAL_GetTick(); + 800232a: f000 fc9f bl 8002c6c + 800232e: 62f8 str r0, [r7, #44] @ 0x2c - temperature_RTD = AD5934_GetTemperature(); - 8002728: f7fe fdca bl 80012c0 - 800272c: 6238 str r0, [r7, #32] - FloatToString(tempString, temperature_RTD); - 800272e: 6a38 ldr r0, [r7, #32] - 8002730: f7fd fe7a bl 8000428 <__aeabi_f2d> - 8002734: 4602 mov r2, r0 - 8002736: 460b mov r3, r1 - 8002738: 1d39 adds r1, r7, #4 - 800273a: 4608 mov r0, r1 - 800273c: f000 f9c6 bl 8002acc - status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); - 8002740: 1d3b adds r3, r7, #4 - 8002742: 4618 mov r0, r3 - 8002744: f7fd fd04 bl 8000150 - 8002748: 4603 mov r3, r0 - 800274a: b29b uxth r3, r3 - 800274c: 3b01 subs r3, #1 - 800274e: b29a uxth r2, r3 - 8002750: 1d3b adds r3, r7, #4 - 8002752: 4611 mov r1, r2 - 8002754: 4618 mov r0, r3 - 8002756: f000 fb19 bl 8002d8c - 800275a: 4603 mov r3, r0 - 800275c: 76fb strb r3, [r7, #27] - status1 = rs485_send_broadcast(newline_real, strlen((char*)newline_real)); - 800275e: 4860 ldr r0, [pc, #384] @ (80028e0 ) - 8002760: f7fd fcf6 bl 8000150 - 8002764: 4603 mov r3, r0 - 8002766: b29b uxth r3, r3 - 8002768: 4619 mov r1, r3 - 800276a: 485d ldr r0, [pc, #372] @ (80028e0 ) - 800276c: f000 fb0e bl 8002d8c - 8002770: 4603 mov r3, r0 - 8002772: 76bb strb r3, [r7, #26] + // Piscar LED verde em PB5 a cada 0,5 segundos + if ((current_millis - previous_millis_green) >= 500) + 8002330: 6afa ldr r2, [r7, #44] @ 0x2c + 8002332: 6bbb ldr r3, [r7, #56] @ 0x38 + 8002334: 1ad3 subs r3, r2, r3 + 8002336: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 + 800233a: d372 bcc.n 8002422 + { + previous_millis_green = current_millis; + 800233c: 6afb ldr r3, [r7, #44] @ 0x2c + 800233e: 63bb str r3, [r7, #56] @ 0x38 + HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_5); + 8002340: 2120 movs r1, #32 + 8002342: 4860 ldr r0, [pc, #384] @ (80024c4 ) + 8002344: f001 fc45 bl 8003bd2 + + // Check if state changed and send via RS485 + uint8_t current_green_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_5); + 8002348: 2120 movs r1, #32 + 800234a: 485e ldr r0, [pc, #376] @ (80024c4 ) + 800234c: f001 fc12 bl 8003b74 + 8002350: 4603 mov r3, r0 + 8002352: f887 302b strb.w r3, [r7, #43] @ 0x2b + if (current_green_state != previous_green_state) + 8002356: f897 202b ldrb.w r2, [r7, #43] @ 0x2b + 800235a: f897 303f ldrb.w r3, [r7, #63] @ 0x3f + 800235e: 429a cmp r2, r3 + 8002360: d008 beq.n 8002374 + { + previous_green_state = current_green_state; + 8002362: f897 302b ldrb.w r3, [r7, #43] @ 0x2b + 8002366: f887 303f strb.w r3, [r7, #63] @ 0x3f + uint8_t led_data[2] = {0x01, current_green_state}; // Command 0x01 for green LED + 800236a: 2301 movs r3, #1 + 800236c: 713b strb r3, [r7, #4] + 800236e: f897 302b ldrb.w r3, [r7, #43] @ 0x2b + 8002372: 717b strb r3, [r7, #5] + + } + + temperature_RTD = AD5934_GetTemperature(); + 8002374: f7fe fe6e bl 8001054 + 8002378: 6278 str r0, [r7, #36] @ 0x24 + FloatToString(tempString, temperature_RTD); + 800237a: 6a78 ldr r0, [r7, #36] @ 0x24 + 800237c: f7fe f97c bl 8000678 <__aeabi_f2d> + 8002380: 4602 mov r2, r0 + 8002382: 460b mov r3, r1 + 8002384: f107 0108 add.w r1, r7, #8 + 8002388: 4608 mov r0, r1 + 800238a: f000 f8f7 bl 800257c + status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); + 800238e: f107 0308 add.w r3, r7, #8 + 8002392: 4618 mov r0, r3 + 8002394: f7fd feda bl 800014c + 8002398: 4603 mov r3, r0 + 800239a: b29b uxth r3, r3 + 800239c: 3b01 subs r3, #1 + 800239e: b29a uxth r2, r3 + 80023a0: f107 0308 add.w r3, r7, #8 + 80023a4: 4611 mov r1, r2 + 80023a6: 4618 mov r0, r3 + 80023a8: f000 fa3a bl 8002820 + 80023ac: 4603 mov r3, r0 + 80023ae: f887 3023 strb.w r3, [r7, #35] @ 0x23 + status1 = rs485_send_broadcast(newline_temp, strlen((char*)newline_temp)); + 80023b2: 4847 ldr r0, [pc, #284] @ (80024d0 ) + 80023b4: f7fd feca bl 800014c + 80023b8: 4603 mov r3, r0 + 80023ba: b29b uxth r3, r3 + 80023bc: 4619 mov r1, r3 + 80023be: 4844 ldr r0, [pc, #272] @ (80024d0 ) + 80023c0: f000 fa2e bl 8002820 + 80023c4: 4603 mov r3, r0 + 80023c6: f887 3022 strb.w r3, [r7, #34] @ 0x22 + + admittance_EC = AD5934_GetImpedance(temperature_RTD); + 80023ca: 6a78 ldr r0, [r7, #36] @ 0x24 + 80023cc: f7ff f83e bl 800144c + 80023d0: 61f8 str r0, [r7, #28] + FloatToString(tempString, admittance_EC); + 80023d2: 69f8 ldr r0, [r7, #28] + 80023d4: f7fe f950 bl 8000678 <__aeabi_f2d> + 80023d8: 4602 mov r2, r0 + 80023da: 460b mov r3, r1 + 80023dc: f107 0108 add.w r1, r7, #8 + 80023e0: 4608 mov r0, r1 + 80023e2: f000 f8cb bl 800257c + status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); + 80023e6: f107 0308 add.w r3, r7, #8 + 80023ea: 4618 mov r0, r3 + 80023ec: f7fd feae bl 800014c + 80023f0: 4603 mov r3, r0 + 80023f2: b29b uxth r3, r3 + 80023f4: 3b01 subs r3, #1 + 80023f6: b29a uxth r2, r3 + 80023f8: f107 0308 add.w r3, r7, #8 + 80023fc: 4611 mov r1, r2 + 80023fe: 4618 mov r0, r3 + 8002400: f000 fa0e bl 8002820 + 8002404: 4603 mov r3, r0 + 8002406: f887 3023 strb.w r3, [r7, #35] @ 0x23 + status1 = rs485_send_broadcast(newline_admi, strlen((char*)newline_admi)); + 800240a: 4832 ldr r0, [pc, #200] @ (80024d4 ) + 800240c: f7fd fe9e bl 800014c + 8002410: 4603 mov r3, r0 + 8002412: b29b uxth r3, r3 + 8002414: 4619 mov r1, r3 + 8002416: 482f ldr r0, [pc, #188] @ (80024d4 ) + 8002418: f000 fa02 bl 8002820 + 800241c: 4603 mov r3, r0 + 800241e: f887 3022 strb.w r3, [r7, #34] @ 0x22 + + } + + // Piscar LED vermelho em PB4 a cada 1 segundo + if ((current_millis - previous_millis_red) >= 1000) + 8002422: 6afa ldr r2, [r7, #44] @ 0x2c + 8002424: 6b7b ldr r3, [r7, #52] @ 0x34 + 8002426: 1ad3 subs r3, r2, r3 + 8002428: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 + 800242c: f4ff af7d bcc.w 800232a + { + previous_millis_red = current_millis; + 8002430: 6afb ldr r3, [r7, #44] @ 0x2c + 8002432: 637b str r3, [r7, #52] @ 0x34 + HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_4); + 8002434: 2110 movs r1, #16 + 8002436: 4823 ldr r0, [pc, #140] @ (80024c4 ) + 8002438: f001 fbcb bl 8003bd2 + + // Check if state changed and send via RS485 + uint8_t current_red_state = HAL_GPIO_ReadPin(GPIOB, GPIO_PIN_4); + 800243c: 2110 movs r1, #16 + 800243e: 4821 ldr r0, [pc, #132] @ (80024c4 ) + 8002440: f001 fb98 bl 8003b74 + 8002444: 4603 mov r3, r0 + 8002446: 76fb strb r3, [r7, #27] + if (current_red_state != previous_red_state) + 8002448: 7efa ldrb r2, [r7, #27] + 800244a: f897 303e ldrb.w r3, [r7, #62] @ 0x3e + 800244e: 429a cmp r2, r3 + 8002450: d006 beq.n 8002460 + { + previous_red_state = current_red_state; + 8002452: 7efb ldrb r3, [r7, #27] + 8002454: f887 303e strb.w r3, [r7, #62] @ 0x3e + uint8_t led_data[2] = {0x02, current_red_state}; // Command 0x02 for red LED + 8002458: 2302 movs r3, #2 + 800245a: 703b strb r3, [r7, #0] + 800245c: 7efb ldrb r3, [r7, #27] + 800245e: 707b strb r3, [r7, #1] + + } + ph_compensated = ADSCalculate_ph_Uncompensated(); + 8002460: f7ff fc02 bl 8001c68 + 8002464: 6178 str r0, [r7, #20] + FloatToString(tempString, ph_compensated); + 8002466: 6978 ldr r0, [r7, #20] + 8002468: f7fe f906 bl 8000678 <__aeabi_f2d> + 800246c: 4602 mov r2, r0 + 800246e: 460b mov r3, r1 + 8002470: f107 0108 add.w r1, r7, #8 + 8002474: 4608 mov r0, r1 + 8002476: f000 f881 bl 800257c + status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); + 800247a: f107 0308 add.w r3, r7, #8 + 800247e: 4618 mov r0, r3 + 8002480: f7fd fe64 bl 800014c + 8002484: 4603 mov r3, r0 + 8002486: b29b uxth r3, r3 + 8002488: 3b01 subs r3, #1 + 800248a: b29a uxth r2, r3 + 800248c: f107 0308 add.w r3, r7, #8 + 8002490: 4611 mov r1, r2 + 8002492: 4618 mov r0, r3 + 8002494: f000 f9c4 bl 8002820 + 8002498: 4603 mov r3, r0 + 800249a: f887 3023 strb.w r3, [r7, #35] @ 0x23 + status1 = rs485_send_broadcast(newline_ph, strlen((char*)newline_ph)); + 800249e: 480e ldr r0, [pc, #56] @ (80024d8 ) + 80024a0: f7fd fe54 bl 800014c + 80024a4: 4603 mov r3, r0 + 80024a6: b29b uxth r3, r3 + 80024a8: 4619 mov r1, r3 + 80024aa: 480b ldr r0, [pc, #44] @ (80024d8 ) + 80024ac: f000 f9b8 bl 8002820 + 80024b0: 4603 mov r3, r0 + 80024b2: f887 3022 strb.w r3, [r7, #34] @ 0x22 + current_millis = HAL_GetTick(); + 80024b6: e738 b.n 800232a + 80024b8: 200001ac .word 0x200001ac + 80024bc: 200005ac .word 0x200005ac + 80024c0: 20000174 .word 0x20000174 + 80024c4: 40010c00 .word 0x40010c00 + 80024c8: 20000654 .word 0x20000654 + 80024cc: 40010800 .word 0x40010800 + 80024d0: 20000010 .word 0x20000010 + 80024d4: 20000008 .word 0x20000008 + 80024d8: 20000000 .word 0x20000000 - ph_compensated = ADSCalculate_ph_Compensated((2048 - ADSreadADC_Differential_0_1(&i2c)),flash_data.temperature_value); - 8002774: 4855 ldr r0, [pc, #340] @ (80028cc ) - 8002776: f7ff fb24 bl 8001dc2 - 800277a: 4603 mov r3, r0 - 800277c: b29b uxth r3, r3 - 800277e: f5c3 6300 rsb r3, r3, #2048 @ 0x800 - 8002782: b29b uxth r3, r3 - 8002784: b21b sxth r3, r3 - 8002786: 4a4c ldr r2, [pc, #304] @ (80028b8 ) - 8002788: 6952 ldr r2, [r2, #20] - 800278a: 4611 mov r1, r2 - 800278c: 4618 mov r0, r3 - 800278e: f7ff fbad bl 8001eec - 8002792: 6178 str r0, [r7, #20] - FloatToString(tempString, ph_compensated); - 8002794: 6978 ldr r0, [r7, #20] - 8002796: f7fd fe47 bl 8000428 <__aeabi_f2d> - 800279a: 4602 mov r2, r0 - 800279c: 460b mov r3, r1 - 800279e: 1d39 adds r1, r7, #4 - 80027a0: 4608 mov r0, r1 - 80027a2: f000 f993 bl 8002acc - status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); - 80027a6: 1d3b adds r3, r7, #4 - 80027a8: 4618 mov r0, r3 - 80027aa: f7fd fcd1 bl 8000150 - 80027ae: 4603 mov r3, r0 - 80027b0: b29b uxth r3, r3 - 80027b2: 3b01 subs r3, #1 - 80027b4: b29a uxth r2, r3 - 80027b6: 1d3b adds r3, r7, #4 - 80027b8: 4611 mov r1, r2 - 80027ba: 4618 mov r0, r3 - 80027bc: f000 fae6 bl 8002d8c - 80027c0: 4603 mov r3, r0 - 80027c2: 76fb strb r3, [r7, #27] - status1 = rs485_send_broadcast(newline_ph, strlen((char*)newline_ph)); - 80027c4: 4847 ldr r0, [pc, #284] @ (80028e4 ) - 80027c6: f7fd fcc3 bl 8000150 - 80027ca: 4603 mov r3, r0 - 80027cc: b29b uxth r3, r3 - 80027ce: 4619 mov r1, r3 - 80027d0: 4844 ldr r0, [pc, #272] @ (80028e4 ) - 80027d2: f000 fadb bl 8002d8c - 80027d6: 4603 mov r3, r0 - 80027d8: 76bb strb r3, [r7, #26] - - - admittance_EC = AD5934_GetImpedance(); - 80027da: f7fe ff6d bl 80016b8 - 80027de: 6138 str r0, [r7, #16] - FloatToString(tempString, admittance_EC); - 80027e0: 6938 ldr r0, [r7, #16] - 80027e2: f7fd fe21 bl 8000428 <__aeabi_f2d> - 80027e6: 4602 mov r2, r0 - 80027e8: 460b mov r3, r1 - 80027ea: 1d39 adds r1, r7, #4 - 80027ec: 4608 mov r0, r1 - 80027ee: f000 f96d bl 8002acc - status0 = rs485_send_broadcast(tempString, (strlen((char*)tempString)-1)); - 80027f2: 1d3b adds r3, r7, #4 - 80027f4: 4618 mov r0, r3 - 80027f6: f7fd fcab bl 8000150 - 80027fa: 4603 mov r3, r0 - 80027fc: b29b uxth r3, r3 - 80027fe: 3b01 subs r3, #1 - 8002800: b29a uxth r2, r3 - 8002802: 1d3b adds r3, r7, #4 - 8002804: 4611 mov r1, r2 - 8002806: 4618 mov r0, r3 - 8002808: f000 fac0 bl 8002d8c - 800280c: 4603 mov r3, r0 - 800280e: 76fb strb r3, [r7, #27] - status1 = rs485_send_broadcast(newline_admi, strlen((char*)newline_admi)); - 8002810: 4835 ldr r0, [pc, #212] @ (80028e8 ) - 8002812: f7fd fc9d bl 8000150 - 8002816: 4603 mov r3, r0 - 8002818: b29b uxth r3, r3 - 800281a: 4619 mov r1, r3 - 800281c: 4832 ldr r0, [pc, #200] @ (80028e8 ) - 800281e: f000 fab5 bl 8002d8c - 8002822: 4603 mov r3, r0 - 8002824: 76bb strb r3, [r7, #26] - 8002826: e74e b.n 80026c6 - - } - else if(UpdateEvent) - 8002828: 4b30 ldr r3, [pc, #192] @ (80028ec ) - 800282a: 781b ldrb r3, [r3, #0] - 800282c: 2b00 cmp r3, #0 - 800282e: f43f af4a beq.w 80026c6 - { - - for (i = (STM32_TEMPERATURE_AVERAGES-1); i > 0; i--) - 8002832: 2303 movs r3, #3 - 8002834: f887 302b strb.w r3, [r7, #43] @ 0x2b - 8002838: e00f b.n 800285a - Temp_Samples[i] = Temp_Samples[i-1]; - 800283a: f897 302b ldrb.w r3, [r7, #43] @ 0x2b - 800283e: 1e5a subs r2, r3, #1 - 8002840: f897 302b ldrb.w r3, [r7, #43] @ 0x2b - 8002844: 492a ldr r1, [pc, #168] @ (80028f0 ) - 8002846: f851 2022 ldr.w r2, [r1, r2, lsl #2] - 800284a: 4929 ldr r1, [pc, #164] @ (80028f0 ) - 800284c: f841 2023 str.w r2, [r1, r3, lsl #2] - for (i = (STM32_TEMPERATURE_AVERAGES-1); i > 0; i--) - 8002850: f897 302b ldrb.w r3, [r7, #43] @ 0x2b - 8002854: 3b01 subs r3, #1 - 8002856: f887 302b strb.w r3, [r7, #43] @ 0x2b - 800285a: f897 302b ldrb.w r3, [r7, #43] @ 0x2b - 800285e: 2b00 cmp r3, #0 - 8002860: d1eb bne.n 800283a - - - // Read real and imaginary data - if(AD_RES[0]>0.0f) - 8002862: 4b18 ldr r3, [pc, #96] @ (80028c4 ) - 8002864: 881b ldrh r3, [r3, #0] - 8002866: 4618 mov r0, r3 - 8002868: f7fe fa02 bl 8000c70 <__aeabi_i2f> - 800286c: 4603 mov r3, r0 - 800286e: f04f 0100 mov.w r1, #0 - 8002872: 4618 mov r0, r3 - 8002874: f7fe fc0c bl 8001090 <__aeabi_fcmpgt> - 8002878: 4603 mov r3, r0 - 800287a: 2b00 cmp r3, #0 - 800287c: d03c beq.n 80028f8 - V_Ref = (float)((V_REF_INT * 4095.0)/AD_RES[0]); - 800287e: 4b11 ldr r3, [pc, #68] @ (80028c4 ) - 8002880: 881b ldrh r3, [r3, #0] - 8002882: 4618 mov r0, r3 - 8002884: f7fd fdbe bl 8000404 <__aeabi_i2d> - 8002888: 4602 mov r2, r0 - 800288a: 460b mov r3, r1 - 800288c: a108 add r1, pc, #32 @ (adr r1, 80028b0 ) - 800288e: e9d1 0100 ldrd r0, r1, [r1] - 8002892: f7fd ff4b bl 800072c <__aeabi_ddiv> - 8002896: 4602 mov r2, r0 - 8002898: 460b mov r3, r1 - 800289a: 4610 mov r0, r2 - 800289c: 4619 mov r1, r3 - 800289e: f7fe f8dd bl 8000a5c <__aeabi_d2f> - 80028a2: 4603 mov r3, r0 - 80028a4: 4a13 ldr r2, [pc, #76] @ (80028f4 ) - 80028a6: 6013 str r3, [r2, #0] - 80028a8: e02a b.n 8002900 - 80028aa: bf00 nop - 80028ac: f3af 8000 nop.w - 80028b0: 0ccc0000 .word 0x0ccc0000 - 80028b4: 40b33200 .word 0x40b33200 - 80028b8: 200001f8 .word 0x200001f8 - 80028bc: 20000720 .word 0x20000720 - 80028c0: 2000011c .word 0x2000011c - 80028c4: 200006ac .word 0x200006ac - 80028c8: 20000600 .word 0x20000600 - 80028cc: 200001c0 .word 0x200001c0 - 80028d0: 40010c00 .word 0x40010c00 - 80028d4: 200006a8 .word 0x200006a8 - 80028d8: 200006b4 .word 0x200006b4 - 80028dc: 20000014 .word 0x20000014 - 80028e0: 2000001c .word 0x2000001c - 80028e4: 20000004 .word 0x20000004 - 80028e8: 2000000c .word 0x2000000c - 80028ec: 200006b0 .word 0x200006b0 - 80028f0: 200006c4 .word 0x200006c4 - 80028f4: 200006c0 .word 0x200006c0 - else - V_Ref = 0.0f; - 80028f8: 4b3b ldr r3, [pc, #236] @ (80029e8 ) - 80028fa: f04f 0200 mov.w r2, #0 - 80028fe: 601a str r2, [r3, #0] - V_Sense = (float)(AD_RES[1] * V_Ref) / 4095.0; - 8002900: 4b3a ldr r3, [pc, #232] @ (80029ec ) - 8002902: 885b ldrh r3, [r3, #2] - 8002904: 4618 mov r0, r3 - 8002906: f7fe f9b3 bl 8000c70 <__aeabi_i2f> - 800290a: 4602 mov r2, r0 - 800290c: 4b36 ldr r3, [pc, #216] @ (80029e8 ) - 800290e: 681b ldr r3, [r3, #0] - 8002910: 4619 mov r1, r3 - 8002912: 4610 mov r0, r2 - 8002914: f7fe fa00 bl 8000d18 <__aeabi_fmul> - 8002918: 4603 mov r3, r0 - 800291a: 4935 ldr r1, [pc, #212] @ (80029f0 ) - 800291c: 4618 mov r0, r3 - 800291e: f7fe faaf bl 8000e80 <__aeabi_fdiv> - 8002922: 4603 mov r3, r0 - 8002924: 461a mov r2, r3 - 8002926: 4b33 ldr r3, [pc, #204] @ (80029f4 ) - 8002928: 601a str r2, [r3, #0] - Temp_Samples[0] = (((V_AT_25C - V_Sense) * 1000.0) /AVG_SLOPE) + 25.0; - 800292a: 4b32 ldr r3, [pc, #200] @ (80029f4 ) - 800292c: 681b ldr r3, [r3, #0] - 800292e: 4619 mov r1, r3 - 8002930: 4831 ldr r0, [pc, #196] @ (80029f8 ) - 8002932: f7fe f8e7 bl 8000b04 <__aeabi_fsub> - 8002936: 4603 mov r3, r0 - 8002938: 4618 mov r0, r3 - 800293a: f7fd fd75 bl 8000428 <__aeabi_f2d> - 800293e: f04f 0200 mov.w r2, #0 - 8002942: 4b2e ldr r3, [pc, #184] @ (80029fc ) - 8002944: f7fd fdc8 bl 80004d8 <__aeabi_dmul> - 8002948: 4602 mov r2, r0 - 800294a: 460b mov r3, r1 - 800294c: 4610 mov r0, r2 - 800294e: 4619 mov r1, r3 - 8002950: a323 add r3, pc, #140 @ (adr r3, 80029e0 ) - 8002952: e9d3 2300 ldrd r2, r3, [r3] - 8002956: f7fd fee9 bl 800072c <__aeabi_ddiv> - 800295a: 4602 mov r2, r0 - 800295c: 460b mov r3, r1 - 800295e: 4610 mov r0, r2 - 8002960: 4619 mov r1, r3 - 8002962: f04f 0200 mov.w r2, #0 - 8002966: 4b26 ldr r3, [pc, #152] @ (8002a00 ) - 8002968: f7fd fc00 bl 800016c <__adddf3> - 800296c: 4602 mov r2, r0 - 800296e: 460b mov r3, r1 - 8002970: 4610 mov r0, r2 - 8002972: 4619 mov r1, r3 - 8002974: f7fe f872 bl 8000a5c <__aeabi_d2f> - 8002978: 4603 mov r3, r0 - 800297a: 4a22 ldr r2, [pc, #136] @ (8002a04 ) - 800297c: 6013 str r3, [r2, #0] - - for (i = 0, Temp_Sum=0; i < STM32_TEMPERATURE_AVERAGES; i++) - 800297e: 2300 movs r3, #0 - 8002980: f887 302b strb.w r3, [r7, #43] @ 0x2b - 8002984: 4b20 ldr r3, [pc, #128] @ (8002a08 ) - 8002986: f04f 0200 mov.w r2, #0 - 800298a: 601a str r2, [r3, #0] - 800298c: e013 b.n 80029b6 - Temp_Sum += Temp_Samples[i]; - 800298e: f897 302b ldrb.w r3, [r7, #43] @ 0x2b - 8002992: 4a1c ldr r2, [pc, #112] @ (8002a04 ) - 8002994: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8002998: 4a1b ldr r2, [pc, #108] @ (8002a08 ) - 800299a: 6812 ldr r2, [r2, #0] - 800299c: 4611 mov r1, r2 - 800299e: 4618 mov r0, r3 - 80029a0: f7fe f8b2 bl 8000b08 <__addsf3> - 80029a4: 4603 mov r3, r0 - 80029a6: 461a mov r2, r3 - 80029a8: 4b17 ldr r3, [pc, #92] @ (8002a08 ) - 80029aa: 601a str r2, [r3, #0] - for (i = 0, Temp_Sum=0; i < STM32_TEMPERATURE_AVERAGES; i++) - 80029ac: f897 302b ldrb.w r3, [r7, #43] @ 0x2b - 80029b0: 3301 adds r3, #1 - 80029b2: f887 302b strb.w r3, [r7, #43] @ 0x2b - 80029b6: f897 302b ldrb.w r3, [r7, #43] @ 0x2b - 80029ba: 2b03 cmp r3, #3 - 80029bc: d9e7 bls.n 800298e - - Temperature = Temp_Sum/((float)STM32_TEMPERATURE_AVERAGES); - 80029be: 4b12 ldr r3, [pc, #72] @ (8002a08 ) - 80029c0: 681b ldr r3, [r3, #0] - 80029c2: f04f 4181 mov.w r1, #1082130432 @ 0x40800000 - 80029c6: 4618 mov r0, r3 - 80029c8: f7fe fa5a bl 8000e80 <__aeabi_fdiv> - 80029cc: 4603 mov r3, r0 - 80029ce: 461a mov r2, r3 - 80029d0: 4b0e ldr r3, [pc, #56] @ (8002a0c ) - 80029d2: 601a str r2, [r3, #0] - - UpdateEvent = 0; - 80029d4: 4b0e ldr r3, [pc, #56] @ (8002a10 ) - 80029d6: 2200 movs r2, #0 - 80029d8: 701a strb r2, [r3, #0] - current_millis = HAL_GetTick(); - 80029da: e674 b.n 80026c6 - 80029dc: f3af 8000 nop.w - 80029e0: 40000000 .word 0x40000000 - 80029e4: 40113333 .word 0x40113333 - 80029e8: 200006c0 .word 0x200006c0 - 80029ec: 200006ac .word 0x200006ac - 80029f0: 457ff000 .word 0x457ff000 - 80029f4: 200006bc .word 0x200006bc - 80029f8: 3fb70a3d .word 0x3fb70a3d - 80029fc: 408f4000 .word 0x408f4000 - 8002a00: 40390000 .word 0x40390000 - 8002a04: 200006c4 .word 0x200006c4 - 8002a08: 200006b8 .word 0x200006b8 - 8002a0c: 200006b4 .word 0x200006b4 - 8002a10: 200006b0 .word 0x200006b0 - -08002a14 : +080024dc : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8002a14: b580 push {r7, lr} - 8002a16: b094 sub sp, #80 @ 0x50 - 8002a18: af00 add r7, sp, #0 + 80024dc: b580 push {r7, lr} + 80024de: b094 sub sp, #80 @ 0x50 + 80024e0: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 8002a1a: f107 0328 add.w r3, r7, #40 @ 0x28 - 8002a1e: 2228 movs r2, #40 @ 0x28 - 8002a20: 2100 movs r1, #0 - 8002a22: 4618 mov r0, r3 - 8002a24: f004 fefc bl 8007820 + 80024e2: f107 0328 add.w r3, r7, #40 @ 0x28 + 80024e6: 2228 movs r2, #40 @ 0x28 + 80024e8: 2100 movs r1, #0 + 80024ea: 4618 mov r0, r3 + 80024ec: f003 fe9c bl 8006228 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8002a28: f107 0314 add.w r3, r7, #20 - 8002a2c: 2200 movs r2, #0 - 8002a2e: 601a str r2, [r3, #0] - 8002a30: 605a str r2, [r3, #4] - 8002a32: 609a str r2, [r3, #8] - 8002a34: 60da str r2, [r3, #12] - 8002a36: 611a str r2, [r3, #16] + 80024f0: f107 0314 add.w r3, r7, #20 + 80024f4: 2200 movs r2, #0 + 80024f6: 601a str r2, [r3, #0] + 80024f8: 605a str r2, [r3, #4] + 80024fa: 609a str r2, [r3, #8] + 80024fc: 60da str r2, [r3, #12] + 80024fe: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 8002a38: 1d3b adds r3, r7, #4 - 8002a3a: 2200 movs r2, #0 - 8002a3c: 601a str r2, [r3, #0] - 8002a3e: 605a str r2, [r3, #4] - 8002a40: 609a str r2, [r3, #8] - 8002a42: 60da str r2, [r3, #12] + 8002500: 1d3b adds r3, r7, #4 + 8002502: 2200 movs r2, #0 + 8002504: 601a str r2, [r3, #0] + 8002506: 605a str r2, [r3, #4] + 8002508: 609a str r2, [r3, #8] + 800250a: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 8002a44: 2301 movs r3, #1 - 8002a46: 62bb str r3, [r7, #40] @ 0x28 + 800250c: 2301 movs r3, #1 + 800250e: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 8002a48: f44f 3380 mov.w r3, #65536 @ 0x10000 - 8002a4c: 62fb str r3, [r7, #44] @ 0x2c - RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; - 8002a4e: 2300 movs r3, #0 - 8002a50: 633b str r3, [r7, #48] @ 0x30 - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 8002a52: 2301 movs r3, #1 - 8002a54: 63bb str r3, [r7, #56] @ 0x38 - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 8002a56: 2302 movs r3, #2 - 8002a58: 647b str r3, [r7, #68] @ 0x44 - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 8002a5a: f44f 3380 mov.w r3, #65536 @ 0x10000 - 8002a5e: 64bb str r3, [r7, #72] @ 0x48 - RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL2; - 8002a60: 2300 movs r3, #0 - 8002a62: 64fb str r3, [r7, #76] @ 0x4c + 8002510: f44f 3380 mov.w r3, #65536 @ 0x10000 + 8002514: 62fb str r3, [r7, #44] @ 0x2c + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 8002516: 2300 movs r3, #0 + 8002518: 647b str r3, [r7, #68] @ 0x44 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8002a64: f107 0328 add.w r3, r7, #40 @ 0x28 - 8002a68: 4618 mov r0, r3 - 8002a6a: f003 f881 bl 8005b70 - 8002a6e: 4603 mov r3, r0 - 8002a70: 2b00 cmp r3, #0 - 8002a72: d001 beq.n 8002a78 + 800251a: f107 0328 add.w r3, r7, #40 @ 0x28 + 800251e: 4618 mov r0, r3 + 8002520: f002 fba4 bl 8004c6c + 8002524: 4603 mov r3, r0 + 8002526: 2b00 cmp r3, #0 + 8002528: d001 beq.n 800252e { Error_Handler(); - 8002a74: f000 f94c bl 8002d10 + 800252a: f000 f93b bl 80027a4 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8002a78: 230f movs r3, #15 - 8002a7a: 617b str r3, [r7, #20] + 800252e: 230f movs r3, #15 + 8002530: 617b str r3, [r7, #20] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 8002a7c: 2302 movs r3, #2 - 8002a7e: 61bb str r3, [r7, #24] + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; + 8002532: 2301 movs r3, #1 + 8002534: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8002a80: 2300 movs r3, #0 - 8002a82: 61fb str r3, [r7, #28] - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - 8002a84: f44f 6380 mov.w r3, #1024 @ 0x400 - 8002a88: 623b str r3, [r7, #32] - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 8002a8a: f44f 6380 mov.w r3, #1024 @ 0x400 - 8002a8e: 627b str r3, [r7, #36] @ 0x24 + 8002536: 2300 movs r3, #0 + 8002538: 61fb str r3, [r7, #28] + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 800253a: 2300 movs r3, #0 + 800253c: 623b str r3, [r7, #32] + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 800253e: 2300 movs r3, #0 + 8002540: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - 8002a90: f107 0314 add.w r3, r7, #20 - 8002a94: 2100 movs r1, #0 - 8002a96: 4618 mov r0, r3 - 8002a98: f003 faec bl 8006074 - 8002a9c: 4603 mov r3, r0 - 8002a9e: 2b00 cmp r3, #0 - 8002aa0: d001 beq.n 8002aa6 + 8002542: f107 0314 add.w r3, r7, #20 + 8002546: 2100 movs r1, #0 + 8002548: 4618 mov r0, r3 + 800254a: f002 fe11 bl 8005170 + 800254e: 4603 mov r3, r0 + 8002550: 2b00 cmp r3, #0 + 8002552: d001 beq.n 8002558 { Error_Handler(); - 8002aa2: f000 f935 bl 8002d10 + 8002554: f000 f926 bl 80027a4 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; - 8002aa6: 2302 movs r3, #2 - 8002aa8: 607b str r3, [r7, #4] + 8002558: 2302 movs r3, #2 + 800255a: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV8; - 8002aaa: f44f 4340 mov.w r3, #49152 @ 0xc000 - 8002aae: 60fb str r3, [r7, #12] + 800255c: f44f 4340 mov.w r3, #49152 @ 0xc000 + 8002560: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 8002ab0: 1d3b adds r3, r7, #4 - 8002ab2: 4618 mov r0, r3 - 8002ab4: f003 fc6e bl 8006394 - 8002ab8: 4603 mov r3, r0 - 8002aba: 2b00 cmp r3, #0 - 8002abc: d001 beq.n 8002ac2 + 8002562: 1d3b adds r3, r7, #4 + 8002564: 4618 mov r0, r3 + 8002566: f002 ff93 bl 8005490 + 800256a: 4603 mov r3, r0 + 800256c: 2b00 cmp r3, #0 + 800256e: d001 beq.n 8002574 { Error_Handler(); - 8002abe: f000 f927 bl 8002d10 + 8002570: f000 f918 bl 80027a4 } } - 8002ac2: bf00 nop - 8002ac4: 3750 adds r7, #80 @ 0x50 - 8002ac6: 46bd mov sp, r7 - 8002ac8: bd80 pop {r7, pc} - ... + 8002574: bf00 nop + 8002576: 3750 adds r7, #80 @ 0x50 + 8002578: 46bd mov sp, r7 + 800257a: bd80 pop {r7, pc} -08002acc : +0800257c : * @param val - value to be converted * * @return None. *******************************************************************************/ void FloatToString(char *buf, double val) { - 8002acc: b5b0 push {r4, r5, r7, lr} - 8002ace: b096 sub sp, #88 @ 0x58 - 8002ad0: af00 add r7, sp, #0 - 8002ad2: 60f8 str r0, [r7, #12] - 8002ad4: e9c7 2300 strd r2, r3, [r7] + 800257c: b5b0 push {r4, r5, r7, lr} + 800257e: b096 sub sp, #88 @ 0x58 + 8002580: af00 add r7, sp, #0 + 8002582: 60f8 str r0, [r7, #12] + 8002584: e9c7 2300 strd r2, r3, [r7] char temp[20]; // Buffer auxiliar para construção segura int i = 0; - 8002ad8: 2300 movs r3, #0 - 8002ada: 657b str r3, [r7, #84] @ 0x54 + 8002588: 2300 movs r3, #0 + 800258a: 657b str r3, [r7, #84] @ 0x54 // 1. Tratar sinal negativo if (val < 0) { - 8002adc: f04f 0200 mov.w r2, #0 - 8002ae0: f04f 0300 mov.w r3, #0 - 8002ae4: e9d7 0100 ldrd r0, r1, [r7] - 8002ae8: f7fd ff68 bl 80009bc <__aeabi_dcmplt> - 8002aec: 4603 mov r3, r0 - 8002aee: 2b00 cmp r3, #0 - 8002af0: d00d beq.n 8002b0e + 800258c: f04f 0200 mov.w r2, #0 + 8002590: f04f 0300 mov.w r3, #0 + 8002594: e9d7 0100 ldrd r0, r1, [r7] + 8002598: f7fe f926 bl 80007e8 <__aeabi_dcmplt> + 800259c: 4603 mov r3, r0 + 800259e: 2b00 cmp r3, #0 + 80025a0: d00d beq.n 80025be temp[i++] = '-'; - 8002af2: 6d7b ldr r3, [r7, #84] @ 0x54 - 8002af4: 1c5a adds r2, r3, #1 - 8002af6: 657a str r2, [r7, #84] @ 0x54 - 8002af8: 3358 adds r3, #88 @ 0x58 - 8002afa: 443b add r3, r7 - 8002afc: 222d movs r2, #45 @ 0x2d - 8002afe: f803 2c30 strb.w r2, [r3, #-48] + 80025a2: 6d7b ldr r3, [r7, #84] @ 0x54 + 80025a4: 1c5a adds r2, r3, #1 + 80025a6: 657a str r2, [r7, #84] @ 0x54 + 80025a8: 3358 adds r3, #88 @ 0x58 + 80025aa: 443b add r3, r7 + 80025ac: 222d movs r2, #45 @ 0x2d + 80025ae: f803 2c30 strb.w r2, [r3, #-48] val = -val; - 8002b02: 683c ldr r4, [r7, #0] - 8002b04: 687b ldr r3, [r7, #4] - 8002b06: f083 4500 eor.w r5, r3, #2147483648 @ 0x80000000 - 8002b0a: e9c7 4500 strd r4, r5, [r7] + 80025b2: 683c ldr r4, [r7, #0] + 80025b4: 687b ldr r3, [r7, #4] + 80025b6: f083 4500 eor.w r5, r3, #2147483648 @ 0x80000000 + 80025ba: e9c7 4500 strd r4, r5, [r7] } // 2. Separar parte inteira e fracionária long intPart = (long)val; - 8002b0e: e9d7 0100 ldrd r0, r1, [r7] - 8002b12: f7fd ff7b bl 8000a0c <__aeabi_d2iz> - 8002b16: 4603 mov r3, r0 - 8002b18: 653b str r3, [r7, #80] @ 0x50 + 80025be: e9d7 0100 ldrd r0, r1, [r7] + 80025c2: f7fe f939 bl 8000838 <__aeabi_d2iz> + 80025c6: 4603 mov r3, r0 + 80025c8: 653b str r3, [r7, #80] @ 0x50 // Multiplicamos por 1000 para obter 3 casas decimais fixas int fracPart = (int)((val - (double)intPart) * 1000.0 + 0.5); - 8002b1a: 6d38 ldr r0, [r7, #80] @ 0x50 - 8002b1c: f7fd fc72 bl 8000404 <__aeabi_i2d> - 8002b20: 4602 mov r2, r0 - 8002b22: 460b mov r3, r1 - 8002b24: e9d7 0100 ldrd r0, r1, [r7] - 8002b28: f7fd fb1e bl 8000168 <__aeabi_dsub> - 8002b2c: 4602 mov r2, r0 - 8002b2e: 460b mov r3, r1 - 8002b30: 4610 mov r0, r2 - 8002b32: 4619 mov r1, r3 - 8002b34: f04f 0200 mov.w r2, #0 - 8002b38: 4b6a ldr r3, [pc, #424] @ (8002ce4 ) - 8002b3a: f7fd fccd bl 80004d8 <__aeabi_dmul> - 8002b3e: 4602 mov r2, r0 - 8002b40: 460b mov r3, r1 - 8002b42: 4610 mov r0, r2 - 8002b44: 4619 mov r1, r3 - 8002b46: f04f 0200 mov.w r2, #0 - 8002b4a: 4b67 ldr r3, [pc, #412] @ (8002ce8 ) - 8002b4c: f7fd fb0e bl 800016c <__adddf3> - 8002b50: 4602 mov r2, r0 - 8002b52: 460b mov r3, r1 - 8002b54: 4610 mov r0, r2 - 8002b56: 4619 mov r1, r3 - 8002b58: f7fd ff58 bl 8000a0c <__aeabi_d2iz> - 8002b5c: 4603 mov r3, r0 - 8002b5e: 63fb str r3, [r7, #60] @ 0x3c + 80025ca: 6d38 ldr r0, [r7, #80] @ 0x50 + 80025cc: f7fe f842 bl 8000654 <__aeabi_i2d> + 80025d0: 4602 mov r2, r0 + 80025d2: 460b mov r3, r1 + 80025d4: e9d7 0100 ldrd r0, r1, [r7] + 80025d8: f7fd feee bl 80003b8 <__aeabi_dsub> + 80025dc: 4602 mov r2, r0 + 80025de: 460b mov r3, r1 + 80025e0: 4610 mov r0, r2 + 80025e2: 4619 mov r1, r3 + 80025e4: f04f 0200 mov.w r2, #0 + 80025e8: 4b6a ldr r3, [pc, #424] @ (8002794 ) + 80025ea: f7fd fdb7 bl 800015c <__aeabi_dmul> + 80025ee: 4602 mov r2, r0 + 80025f0: 460b mov r3, r1 + 80025f2: 4610 mov r0, r2 + 80025f4: 4619 mov r1, r3 + 80025f6: f04f 0200 mov.w r2, #0 + 80025fa: 4b67 ldr r3, [pc, #412] @ (8002798 ) + 80025fc: f7fd fede bl 80003bc <__adddf3> + 8002600: 4602 mov r2, r0 + 8002602: 460b mov r3, r1 + 8002604: 4610 mov r0, r2 + 8002606: 4619 mov r1, r3 + 8002608: f7fe f916 bl 8000838 <__aeabi_d2iz> + 800260c: 4603 mov r3, r0 + 800260e: 63fb str r3, [r7, #60] @ 0x3c // 3. Converter a parte inteira para o buffer temp // Usamos um buffer temporário de inversão para não precisar de lógica complexa de ponteiro char intRev[12]; int j = 0; - 8002b60: 2300 movs r3, #0 - 8002b62: 64fb str r3, [r7, #76] @ 0x4c + 8002610: 2300 movs r3, #0 + 8002612: 64fb str r3, [r7, #76] @ 0x4c if (intPart == 0) { - 8002b64: 6d3b ldr r3, [r7, #80] @ 0x50 - 8002b66: 2b00 cmp r3, #0 - 8002b68: d126 bne.n 8002bb8 + 8002614: 6d3b ldr r3, [r7, #80] @ 0x50 + 8002616: 2b00 cmp r3, #0 + 8002618: d126 bne.n 8002668 intRev[j++] = '0'; - 8002b6a: 6cfb ldr r3, [r7, #76] @ 0x4c - 8002b6c: 1c5a adds r2, r3, #1 - 8002b6e: 64fa str r2, [r7, #76] @ 0x4c - 8002b70: 3358 adds r3, #88 @ 0x58 - 8002b72: 443b add r3, r7 - 8002b74: 2230 movs r2, #48 @ 0x30 - 8002b76: f803 2c3c strb.w r2, [r3, #-60] - 8002b7a: e020 b.n 8002bbe + 800261a: 6cfb ldr r3, [r7, #76] @ 0x4c + 800261c: 1c5a adds r2, r3, #1 + 800261e: 64fa str r2, [r7, #76] @ 0x4c + 8002620: 3358 adds r3, #88 @ 0x58 + 8002622: 443b add r3, r7 + 8002624: 2230 movs r2, #48 @ 0x30 + 8002626: f803 2c3c strb.w r2, [r3, #-60] + 800262a: e020 b.n 800266e } else { while (intPart > 0) { intRev[j++] = (intPart % 10) + '0'; - 8002b7c: 6d3a ldr r2, [r7, #80] @ 0x50 - 8002b7e: 4b5b ldr r3, [pc, #364] @ (8002cec ) - 8002b80: fb83 1302 smull r1, r3, r3, r2 - 8002b84: 1099 asrs r1, r3, #2 - 8002b86: 17d3 asrs r3, r2, #31 - 8002b88: 1ac9 subs r1, r1, r3 - 8002b8a: 460b mov r3, r1 - 8002b8c: 009b lsls r3, r3, #2 - 8002b8e: 440b add r3, r1 - 8002b90: 005b lsls r3, r3, #1 - 8002b92: 1ad1 subs r1, r2, r3 - 8002b94: b2ca uxtb r2, r1 - 8002b96: 6cfb ldr r3, [r7, #76] @ 0x4c - 8002b98: 1c59 adds r1, r3, #1 - 8002b9a: 64f9 str r1, [r7, #76] @ 0x4c - 8002b9c: 3230 adds r2, #48 @ 0x30 - 8002b9e: b2d2 uxtb r2, r2 - 8002ba0: 3358 adds r3, #88 @ 0x58 - 8002ba2: 443b add r3, r7 - 8002ba4: f803 2c3c strb.w r2, [r3, #-60] + 800262c: 6d3a ldr r2, [r7, #80] @ 0x50 + 800262e: 4b5b ldr r3, [pc, #364] @ (800279c ) + 8002630: fb83 1302 smull r1, r3, r3, r2 + 8002634: 1099 asrs r1, r3, #2 + 8002636: 17d3 asrs r3, r2, #31 + 8002638: 1ac9 subs r1, r1, r3 + 800263a: 460b mov r3, r1 + 800263c: 009b lsls r3, r3, #2 + 800263e: 440b add r3, r1 + 8002640: 005b lsls r3, r3, #1 + 8002642: 1ad1 subs r1, r2, r3 + 8002644: b2ca uxtb r2, r1 + 8002646: 6cfb ldr r3, [r7, #76] @ 0x4c + 8002648: 1c59 adds r1, r3, #1 + 800264a: 64f9 str r1, [r7, #76] @ 0x4c + 800264c: 3230 adds r2, #48 @ 0x30 + 800264e: b2d2 uxtb r2, r2 + 8002650: 3358 adds r3, #88 @ 0x58 + 8002652: 443b add r3, r7 + 8002654: f803 2c3c strb.w r2, [r3, #-60] intPart /= 10; - 8002ba8: 6d3b ldr r3, [r7, #80] @ 0x50 - 8002baa: 4a50 ldr r2, [pc, #320] @ (8002cec ) - 8002bac: fb82 1203 smull r1, r2, r2, r3 - 8002bb0: 1092 asrs r2, r2, #2 - 8002bb2: 17db asrs r3, r3, #31 - 8002bb4: 1ad3 subs r3, r2, r3 - 8002bb6: 653b str r3, [r7, #80] @ 0x50 + 8002658: 6d3b ldr r3, [r7, #80] @ 0x50 + 800265a: 4a50 ldr r2, [pc, #320] @ (800279c ) + 800265c: fb82 1203 smull r1, r2, r2, r3 + 8002660: 1092 asrs r2, r2, #2 + 8002662: 17db asrs r3, r3, #31 + 8002664: 1ad3 subs r3, r2, r3 + 8002666: 653b str r3, [r7, #80] @ 0x50 while (intPart > 0) { - 8002bb8: 6d3b ldr r3, [r7, #80] @ 0x50 - 8002bba: 2b00 cmp r3, #0 - 8002bbc: dcde bgt.n 8002b7c + 8002668: 6d3b ldr r3, [r7, #80] @ 0x50 + 800266a: 2b00 cmp r3, #0 + 800266c: dcde bgt.n 800262c } } // Inverter a parte inteira de volta para o buffer principal for (int k = j - 1; k >= 0; k--) { - 8002bbe: 6cfb ldr r3, [r7, #76] @ 0x4c - 8002bc0: 3b01 subs r3, #1 - 8002bc2: 64bb str r3, [r7, #72] @ 0x48 - 8002bc4: e00e b.n 8002be4 + 800266e: 6cfb ldr r3, [r7, #76] @ 0x4c + 8002670: 3b01 subs r3, #1 + 8002672: 64bb str r3, [r7, #72] @ 0x48 + 8002674: e00e b.n 8002694 temp[i++] = intRev[k]; - 8002bc6: 6d7b ldr r3, [r7, #84] @ 0x54 - 8002bc8: 1c5a adds r2, r3, #1 - 8002bca: 657a str r2, [r7, #84] @ 0x54 - 8002bcc: f107 011c add.w r1, r7, #28 - 8002bd0: 6cba ldr r2, [r7, #72] @ 0x48 - 8002bd2: 440a add r2, r1 - 8002bd4: 7812 ldrb r2, [r2, #0] - 8002bd6: 3358 adds r3, #88 @ 0x58 - 8002bd8: 443b add r3, r7 - 8002bda: f803 2c30 strb.w r2, [r3, #-48] + 8002676: 6d7b ldr r3, [r7, #84] @ 0x54 + 8002678: 1c5a adds r2, r3, #1 + 800267a: 657a str r2, [r7, #84] @ 0x54 + 800267c: f107 011c add.w r1, r7, #28 + 8002680: 6cba ldr r2, [r7, #72] @ 0x48 + 8002682: 440a add r2, r1 + 8002684: 7812 ldrb r2, [r2, #0] + 8002686: 3358 adds r3, #88 @ 0x58 + 8002688: 443b add r3, r7 + 800268a: f803 2c30 strb.w r2, [r3, #-48] for (int k = j - 1; k >= 0; k--) { - 8002bde: 6cbb ldr r3, [r7, #72] @ 0x48 - 8002be0: 3b01 subs r3, #1 - 8002be2: 64bb str r3, [r7, #72] @ 0x48 - 8002be4: 6cbb ldr r3, [r7, #72] @ 0x48 - 8002be6: 2b00 cmp r3, #0 - 8002be8: daed bge.n 8002bc6 + 800268e: 6cbb ldr r3, [r7, #72] @ 0x48 + 8002690: 3b01 subs r3, #1 + 8002692: 64bb str r3, [r7, #72] @ 0x48 + 8002694: 6cbb ldr r3, [r7, #72] @ 0x48 + 8002696: 2b00 cmp r3, #0 + 8002698: daed bge.n 8002676 } // 4. Adicionar o ponto decimal e a parte fracionária (sempre 3 casas) temp[i++] = '.'; - 8002bea: 6d7b ldr r3, [r7, #84] @ 0x54 - 8002bec: 1c5a adds r2, r3, #1 - 8002bee: 657a str r2, [r7, #84] @ 0x54 - 8002bf0: 3358 adds r3, #88 @ 0x58 - 8002bf2: 443b add r3, r7 - 8002bf4: 222e movs r2, #46 @ 0x2e - 8002bf6: f803 2c30 strb.w r2, [r3, #-48] + 800269a: 6d7b ldr r3, [r7, #84] @ 0x54 + 800269c: 1c5a adds r2, r3, #1 + 800269e: 657a str r2, [r7, #84] @ 0x54 + 80026a0: 3358 adds r3, #88 @ 0x58 + 80026a2: 443b add r3, r7 + 80026a4: 222e movs r2, #46 @ 0x2e + 80026a6: f803 2c30 strb.w r2, [r3, #-48] // Garantir que a parte fracionária tenha sempre 3 dígitos (ex: .005 em vez de .5) int fracBuffer[3]; fracBuffer[2] = fracPart % 10; // Unidade - 8002bfa: 6bf9 ldr r1, [r7, #60] @ 0x3c - 8002bfc: 4b3b ldr r3, [pc, #236] @ (8002cec ) - 8002bfe: fb83 2301 smull r2, r3, r3, r1 - 8002c02: 109a asrs r2, r3, #2 - 8002c04: 17cb asrs r3, r1, #31 - 8002c06: 1ad2 subs r2, r2, r3 - 8002c08: 4613 mov r3, r2 - 8002c0a: 009b lsls r3, r3, #2 - 8002c0c: 4413 add r3, r2 - 8002c0e: 005b lsls r3, r3, #1 - 8002c10: 1aca subs r2, r1, r3 - 8002c12: 61ba str r2, [r7, #24] + 80026aa: 6bf9 ldr r1, [r7, #60] @ 0x3c + 80026ac: 4b3b ldr r3, [pc, #236] @ (800279c ) + 80026ae: fb83 2301 smull r2, r3, r3, r1 + 80026b2: 109a asrs r2, r3, #2 + 80026b4: 17cb asrs r3, r1, #31 + 80026b6: 1ad2 subs r2, r2, r3 + 80026b8: 4613 mov r3, r2 + 80026ba: 009b lsls r3, r3, #2 + 80026bc: 4413 add r3, r2 + 80026be: 005b lsls r3, r3, #1 + 80026c0: 1aca subs r2, r1, r3 + 80026c2: 61ba str r2, [r7, #24] fracBuffer[1] = (fracPart / 10) % 10; // Dezena - 8002c14: 6bfb ldr r3, [r7, #60] @ 0x3c - 8002c16: 4a35 ldr r2, [pc, #212] @ (8002cec ) - 8002c18: fb82 1203 smull r1, r2, r2, r3 - 8002c1c: 1092 asrs r2, r2, #2 - 8002c1e: 17db asrs r3, r3, #31 - 8002c20: 1ad1 subs r1, r2, r3 - 8002c22: 4b32 ldr r3, [pc, #200] @ (8002cec ) - 8002c24: fb83 2301 smull r2, r3, r3, r1 - 8002c28: 109a asrs r2, r3, #2 - 8002c2a: 17cb asrs r3, r1, #31 - 8002c2c: 1ad2 subs r2, r2, r3 - 8002c2e: 4613 mov r3, r2 - 8002c30: 009b lsls r3, r3, #2 - 8002c32: 4413 add r3, r2 - 8002c34: 005b lsls r3, r3, #1 - 8002c36: 1aca subs r2, r1, r3 - 8002c38: 617a str r2, [r7, #20] + 80026c4: 6bfb ldr r3, [r7, #60] @ 0x3c + 80026c6: 4a35 ldr r2, [pc, #212] @ (800279c ) + 80026c8: fb82 1203 smull r1, r2, r2, r3 + 80026cc: 1092 asrs r2, r2, #2 + 80026ce: 17db asrs r3, r3, #31 + 80026d0: 1ad1 subs r1, r2, r3 + 80026d2: 4b32 ldr r3, [pc, #200] @ (800279c ) + 80026d4: fb83 2301 smull r2, r3, r3, r1 + 80026d8: 109a asrs r2, r3, #2 + 80026da: 17cb asrs r3, r1, #31 + 80026dc: 1ad2 subs r2, r2, r3 + 80026de: 4613 mov r3, r2 + 80026e0: 009b lsls r3, r3, #2 + 80026e2: 4413 add r3, r2 + 80026e4: 005b lsls r3, r3, #1 + 80026e6: 1aca subs r2, r1, r3 + 80026e8: 617a str r2, [r7, #20] fracBuffer[0] = (fracPart / 100) % 10; // Centena - 8002c3a: 6bfb ldr r3, [r7, #60] @ 0x3c - 8002c3c: 4a2c ldr r2, [pc, #176] @ (8002cf0 ) - 8002c3e: fb82 1203 smull r1, r2, r2, r3 - 8002c42: 1152 asrs r2, r2, #5 - 8002c44: 17db asrs r3, r3, #31 - 8002c46: 1ad1 subs r1, r2, r3 - 8002c48: 4b28 ldr r3, [pc, #160] @ (8002cec ) - 8002c4a: fb83 2301 smull r2, r3, r3, r1 - 8002c4e: 109a asrs r2, r3, #2 - 8002c50: 17cb asrs r3, r1, #31 - 8002c52: 1ad2 subs r2, r2, r3 - 8002c54: 4613 mov r3, r2 - 8002c56: 009b lsls r3, r3, #2 - 8002c58: 4413 add r3, r2 - 8002c5a: 005b lsls r3, r3, #1 - 8002c5c: 1aca subs r2, r1, r3 - 8002c5e: 613a str r2, [r7, #16] + 80026ea: 6bfb ldr r3, [r7, #60] @ 0x3c + 80026ec: 4a2c ldr r2, [pc, #176] @ (80027a0 ) + 80026ee: fb82 1203 smull r1, r2, r2, r3 + 80026f2: 1152 asrs r2, r2, #5 + 80026f4: 17db asrs r3, r3, #31 + 80026f6: 1ad1 subs r1, r2, r3 + 80026f8: 4b28 ldr r3, [pc, #160] @ (800279c ) + 80026fa: fb83 2301 smull r2, r3, r3, r1 + 80026fe: 109a asrs r2, r3, #2 + 8002700: 17cb asrs r3, r1, #31 + 8002702: 1ad2 subs r2, r2, r3 + 8002704: 4613 mov r3, r2 + 8002706: 009b lsls r3, r3, #2 + 8002708: 4413 add r3, r2 + 800270a: 005b lsls r3, r3, #1 + 800270c: 1aca subs r2, r1, r3 + 800270e: 613a str r2, [r7, #16] for (int k = 2; k >= 0; k--) { - 8002c60: 2302 movs r3, #2 - 8002c62: 647b str r3, [r7, #68] @ 0x44 - 8002c64: e012 b.n 8002c8c + 8002710: 2302 movs r3, #2 + 8002712: 647b str r3, [r7, #68] @ 0x44 + 8002714: e012 b.n 800273c temp[i++] = fracBuffer[k] + '0'; - 8002c66: 6c7b ldr r3, [r7, #68] @ 0x44 - 8002c68: 009b lsls r3, r3, #2 - 8002c6a: 3358 adds r3, #88 @ 0x58 - 8002c6c: 443b add r3, r7 - 8002c6e: f853 3c48 ldr.w r3, [r3, #-72] - 8002c72: b2da uxtb r2, r3 - 8002c74: 6d7b ldr r3, [r7, #84] @ 0x54 - 8002c76: 1c59 adds r1, r3, #1 - 8002c78: 6579 str r1, [r7, #84] @ 0x54 - 8002c7a: 3230 adds r2, #48 @ 0x30 - 8002c7c: b2d2 uxtb r2, r2 - 8002c7e: 3358 adds r3, #88 @ 0x58 - 8002c80: 443b add r3, r7 - 8002c82: f803 2c30 strb.w r2, [r3, #-48] + 8002716: 6c7b ldr r3, [r7, #68] @ 0x44 + 8002718: 009b lsls r3, r3, #2 + 800271a: 3358 adds r3, #88 @ 0x58 + 800271c: 443b add r3, r7 + 800271e: f853 3c48 ldr.w r3, [r3, #-72] + 8002722: b2da uxtb r2, r3 + 8002724: 6d7b ldr r3, [r7, #84] @ 0x54 + 8002726: 1c59 adds r1, r3, #1 + 8002728: 6579 str r1, [r7, #84] @ 0x54 + 800272a: 3230 adds r2, #48 @ 0x30 + 800272c: b2d2 uxtb r2, r2 + 800272e: 3358 adds r3, #88 @ 0x58 + 8002730: 443b add r3, r7 + 8002732: f803 2c30 strb.w r2, [r3, #-48] for (int k = 2; k >= 0; k--) { - 8002c86: 6c7b ldr r3, [r7, #68] @ 0x44 - 8002c88: 3b01 subs r3, #1 - 8002c8a: 647b str r3, [r7, #68] @ 0x44 - 8002c8c: 6c7b ldr r3, [r7, #68] @ 0x44 - 8002c8e: 2b00 cmp r3, #0 - 8002c90: dae9 bge.n 8002c66 + 8002736: 6c7b ldr r3, [r7, #68] @ 0x44 + 8002738: 3b01 subs r3, #1 + 800273a: 647b str r3, [r7, #68] @ 0x44 + 800273c: 6c7b ldr r3, [r7, #68] @ 0x44 + 800273e: 2b00 cmp r3, #0 + 8002740: dae9 bge.n 8002716 } // 5. Finalizar a string com o caractere nulo temp[i] = '\0'; - 8002c92: f107 0228 add.w r2, r7, #40 @ 0x28 - 8002c96: 6d7b ldr r3, [r7, #84] @ 0x54 - 8002c98: 4413 add r3, r2 - 8002c9a: 2200 movs r2, #0 - 8002c9c: 701a strb r2, [r3, #0] + 8002742: f107 0228 add.w r2, r7, #40 @ 0x28 + 8002746: 6d7b ldr r3, [r7, #84] @ 0x54 + 8002748: 4413 add r3, r2 + 800274a: 2200 movs r2, #0 + 800274c: 701a strb r2, [r3, #0] // 6. Copiar para o buffer de destino final (sem risco de lixo) int destIdx = 0; - 8002c9e: 2300 movs r3, #0 - 8002ca0: 643b str r3, [r7, #64] @ 0x40 + 800274e: 2300 movs r3, #0 + 8002750: 643b str r3, [r7, #64] @ 0x40 while (temp[destIdx] != '\0' && destIdx < 15) { // Limite de segurança - 8002ca2: e00b b.n 8002cbc + 8002752: e00b b.n 800276c buf[destIdx] = temp[destIdx]; - 8002ca4: 6c3b ldr r3, [r7, #64] @ 0x40 - 8002ca6: 68fa ldr r2, [r7, #12] - 8002ca8: 4413 add r3, r2 - 8002caa: f107 0128 add.w r1, r7, #40 @ 0x28 - 8002cae: 6c3a ldr r2, [r7, #64] @ 0x40 - 8002cb0: 440a add r2, r1 - 8002cb2: 7812 ldrb r2, [r2, #0] - 8002cb4: 701a strb r2, [r3, #0] + 8002754: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002756: 68fa ldr r2, [r7, #12] + 8002758: 4413 add r3, r2 + 800275a: f107 0128 add.w r1, r7, #40 @ 0x28 + 800275e: 6c3a ldr r2, [r7, #64] @ 0x40 + 8002760: 440a add r2, r1 + 8002762: 7812 ldrb r2, [r2, #0] + 8002764: 701a strb r2, [r3, #0] destIdx++; - 8002cb6: 6c3b ldr r3, [r7, #64] @ 0x40 - 8002cb8: 3301 adds r3, #1 - 8002cba: 643b str r3, [r7, #64] @ 0x40 + 8002766: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002768: 3301 adds r3, #1 + 800276a: 643b str r3, [r7, #64] @ 0x40 while (temp[destIdx] != '\0' && destIdx < 15) { // Limite de segurança - 8002cbc: f107 0228 add.w r2, r7, #40 @ 0x28 - 8002cc0: 6c3b ldr r3, [r7, #64] @ 0x40 - 8002cc2: 4413 add r3, r2 - 8002cc4: 781b ldrb r3, [r3, #0] - 8002cc6: 2b00 cmp r3, #0 - 8002cc8: d002 beq.n 8002cd0 - 8002cca: 6c3b ldr r3, [r7, #64] @ 0x40 - 8002ccc: 2b0e cmp r3, #14 - 8002cce: dde9 ble.n 8002ca4 + 800276c: f107 0228 add.w r2, r7, #40 @ 0x28 + 8002770: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002772: 4413 add r3, r2 + 8002774: 781b ldrb r3, [r3, #0] + 8002776: 2b00 cmp r3, #0 + 8002778: d002 beq.n 8002780 + 800277a: 6c3b ldr r3, [r7, #64] @ 0x40 + 800277c: 2b0e cmp r3, #14 + 800277e: dde9 ble.n 8002754 } buf[destIdx] = '\0'; - 8002cd0: 6c3b ldr r3, [r7, #64] @ 0x40 - 8002cd2: 68fa ldr r2, [r7, #12] - 8002cd4: 4413 add r3, r2 - 8002cd6: 2200 movs r2, #0 - 8002cd8: 701a strb r2, [r3, #0] + 8002780: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002782: 68fa ldr r2, [r7, #12] + 8002784: 4413 add r3, r2 + 8002786: 2200 movs r2, #0 + 8002788: 701a strb r2, [r3, #0] } - 8002cda: bf00 nop - 8002cdc: 3758 adds r7, #88 @ 0x58 - 8002cde: 46bd mov sp, r7 - 8002ce0: bdb0 pop {r4, r5, r7, pc} - 8002ce2: bf00 nop - 8002ce4: 408f4000 .word 0x408f4000 - 8002ce8: 3fe00000 .word 0x3fe00000 - 8002cec: 66666667 .word 0x66666667 - 8002cf0: 51eb851f .word 0x51eb851f + 800278a: bf00 nop + 800278c: 3758 adds r7, #88 @ 0x58 + 800278e: 46bd mov sp, r7 + 8002790: bdb0 pop {r4, r5, r7, pc} + 8002792: bf00 nop + 8002794: 408f4000 .word 0x408f4000 + 8002798: 3fe00000 .word 0x3fe00000 + 800279c: 66666667 .word 0x66666667 + 80027a0: 51eb851f .word 0x51eb851f -08002cf4 : - } -} - - -void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) -{ - 8002cf4: b480 push {r7} - 8002cf6: b083 sub sp, #12 - 8002cf8: af00 add r7, sp, #0 - 8002cfa: 6078 str r0, [r7, #4] - UpdateEvent = 1; - 8002cfc: 4b03 ldr r3, [pc, #12] @ (8002d0c ) - 8002cfe: 2201 movs r2, #1 - 8002d00: 701a strb r2, [r3, #0] -} - 8002d02: bf00 nop - 8002d04: 370c adds r7, #12 - 8002d06: 46bd mov sp, r7 - 8002d08: bc80 pop {r7} - 8002d0a: 4770 bx lr - 8002d0c: 200006b0 .word 0x200006b0 - -08002d10 : +080027a4 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 8002d10: b480 push {r7} - 8002d12: af00 add r7, sp, #0 + 80027a4: b480 push {r7} + 80027a6: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 8002d14: b672 cpsid i + 80027a8: b672 cpsid i } - 8002d16: bf00 nop + 80027aa: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 8002d18: bf00 nop - 8002d1a: e7fd b.n 8002d18 + 80027ac: bf00 nop + 80027ae: e7fd b.n 80027ac -08002d1c : +080027b0 : * @rmtoll IDR IDy LL_GPIO_ReadInputPort * @param GPIOx GPIO Port * @retval Input data register value of port */ __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx) { - 8002d1c: b480 push {r7} - 8002d1e: b083 sub sp, #12 - 8002d20: af00 add r7, sp, #0 - 8002d22: 6078 str r0, [r7, #4] + 80027b0: b480 push {r7} + 80027b2: b083 sub sp, #12 + 80027b4: af00 add r7, sp, #0 + 80027b6: 6078 str r0, [r7, #4] return (READ_REG(GPIOx->IDR)); - 8002d24: 687b ldr r3, [r7, #4] - 8002d26: 689b ldr r3, [r3, #8] + 80027b8: 687b ldr r3, [r7, #4] + 80027ba: 689b ldr r3, [r3, #8] } - 8002d28: 4618 mov r0, r3 - 8002d2a: 370c adds r7, #12 - 8002d2c: 46bd mov sp, r7 - 8002d2e: bc80 pop {r7} - 8002d30: 4770 bx lr + 80027bc: 4618 mov r0, r3 + 80027be: 370c adds r7, #12 + 80027c0: 46bd mov sp, r7 + 80027c2: bc80 pop {r7} + 80027c4: 4770 bx lr ... -08002d34 : +080027c8 : /** * @brief Initializes the RS-485 driver. * @note This function configures GPIOs for address detection and USART1 for communication. */ void rs485_init(void) { - 8002d34: b580 push {r7, lr} - 8002d36: af00 add r7, sp, #0 + 80027c8: b580 push {r7, lr} + 80027ca: af00 add r7, sp, #0 /* Configure GPIOs for address detection */ rs485_configure_gpio_address(); - 8002d38: f000 f864 bl 8002e04 + 80027cc: f000 f864 bl 8002898 /* Configure USART1 for RS-485 communication */ rs485_configure_usart1(); - 8002d3c: f000 f8a8 bl 8002e90 + 80027d0: f000 f8a8 bl 8002924 /* Get the current device address from GPIOs */ device_address.full_address = rs485_get_address(); - 8002d40: f000 f808 bl 8002d54 - 8002d44: 4603 mov r3, r0 - 8002d46: 461a mov r2, r3 - 8002d48: 4b01 ldr r3, [pc, #4] @ (8002d50 ) - 8002d4a: 709a strb r2, [r3, #2] + 80027d4: f000 f808 bl 80027e8 + 80027d8: 4603 mov r3, r0 + 80027da: 461a mov r2, r3 + 80027dc: 4b01 ldr r3, [pc, #4] @ (80027e4 ) + 80027de: 709a strb r2, [r3, #2] } - 8002d4c: bf00 nop - 8002d4e: bd80 pop {r7, pc} - 8002d50: 200006d4 .word 0x200006d4 + 80027e0: bf00 nop + 80027e2: bd80 pop {r7, pc} + 80027e4: 20000658 .word 0x20000658 -08002d54 : +080027e8 : /** * @brief Gets the current device address from GPIOs. * @return The 8-bit device address. */ uint8_t rs485_get_address(void) { - 8002d54: b598 push {r3, r4, r7, lr} - 8002d56: af00 add r7, sp, #0 + 80027e8: b598 push {r3, r4, r7, lr} + 80027ea: af00 add r7, sp, #0 return ((uint8_t) ((((LL_GPIO_ReadInputPort(GPIOB) & RS485_ADDR_MASK_HIGH)>>RS485_ADDR_BIT_SET_HIGH) | (LL_GPIO_ReadInputPort(GPIOA) & RS485_ADDR_MASK_LOW)>>RS485_ADDR_BIT_SET_LOW))); - 8002d58: 480a ldr r0, [pc, #40] @ (8002d84 ) - 8002d5a: f7ff ffdf bl 8002d1c - 8002d5e: 4603 mov r3, r0 - 8002d60: 0a1b lsrs r3, r3, #8 - 8002d62: b2db uxtb r3, r3 - 8002d64: f023 030f bic.w r3, r3, #15 - 8002d68: b2dc uxtb r4, r3 - 8002d6a: 4807 ldr r0, [pc, #28] @ (8002d88 ) - 8002d6c: f7ff ffd6 bl 8002d1c - 8002d70: 4603 mov r3, r0 - 8002d72: 089b lsrs r3, r3, #2 - 8002d74: b2db uxtb r3, r3 - 8002d76: f003 030f and.w r3, r3, #15 - 8002d7a: b2db uxtb r3, r3 - 8002d7c: 4323 orrs r3, r4 - 8002d7e: b2db uxtb r3, r3 + 80027ec: 480a ldr r0, [pc, #40] @ (8002818 ) + 80027ee: f7ff ffdf bl 80027b0 + 80027f2: 4603 mov r3, r0 + 80027f4: 0a1b lsrs r3, r3, #8 + 80027f6: b2db uxtb r3, r3 + 80027f8: f023 030f bic.w r3, r3, #15 + 80027fc: b2dc uxtb r4, r3 + 80027fe: 4807 ldr r0, [pc, #28] @ (800281c ) + 8002800: f7ff ffd6 bl 80027b0 + 8002804: 4603 mov r3, r0 + 8002806: 089b lsrs r3, r3, #2 + 8002808: b2db uxtb r3, r3 + 800280a: f003 030f and.w r3, r3, #15 + 800280e: b2db uxtb r3, r3 + 8002810: 4323 orrs r3, r4 + 8002812: b2db uxtb r3, r3 } - 8002d80: 4618 mov r0, r3 - 8002d82: bd98 pop {r3, r4, r7, pc} - 8002d84: 40010c00 .word 0x40010c00 - 8002d88: 40010800 .word 0x40010800 + 8002814: 4618 mov r0, r3 + 8002816: bd98 pop {r3, r4, r7, pc} + 8002818: 40010c00 .word 0x40010c00 + 800281c: 40010800 .word 0x40010800 -08002d8c : +08002820 : * @param data Pointer to the data buffer. * @param length Number of bytes to send. * @retval HAL_OK on success, otherwise error code. */ HAL_StatusTypeDef rs485_send_broadcast(uint8_t* data, uint16_t length) { - 8002d8c: b580 push {r7, lr} - 8002d8e: b084 sub sp, #16 - 8002d90: af00 add r7, sp, #0 - 8002d92: 6078 str r0, [r7, #4] - 8002d94: 460b mov r3, r1 - 8002d96: 807b strh r3, [r7, #2] + 8002820: b580 push {r7, lr} + 8002822: b084 sub sp, #16 + 8002824: af00 add r7, sp, #0 + 8002826: 6078 str r0, [r7, #4] + 8002828: 460b mov r3, r1 + 800282a: 807b strh r3, [r7, #2] /* Enable transmission mode */ rs485_enable_tx(); - 8002d98: f000 f81c bl 8002dd4 + 800282c: f000 f81c bl 8002868 /* Send the broadcast address (0x00) first */ uint8_t broadcast_address = 0x00; - 8002d9c: 2300 movs r3, #0 - 8002d9e: 73bb strb r3, [r7, #14] + 8002830: 2300 movs r3, #0 + 8002832: 73bb strb r3, [r7, #14] HAL_UART_Transmit(&huart1, &broadcast_address, 1, HAL_MAX_DELAY); - 8002da0: f107 010e add.w r1, r7, #14 - 8002da4: f04f 33ff mov.w r3, #4294967295 - 8002da8: 2201 movs r2, #1 - 8002daa: 4809 ldr r0, [pc, #36] @ (8002dd0 ) - 8002dac: f003 ff72 bl 8006c94 + 8002834: f107 010e add.w r1, r7, #14 + 8002838: f04f 33ff mov.w r3, #4294967295 + 800283c: 2201 movs r2, #1 + 800283e: 4809 ldr r0, [pc, #36] @ (8002864 ) + 8002840: f002 ff2c bl 800569c /* Send the data */ HAL_StatusTypeDef status = HAL_UART_Transmit(&huart1, data, length, HAL_MAX_DELAY); - 8002db0: 887a ldrh r2, [r7, #2] - 8002db2: f04f 33ff mov.w r3, #4294967295 - 8002db6: 6879 ldr r1, [r7, #4] - 8002db8: 4805 ldr r0, [pc, #20] @ (8002dd0 ) - 8002dba: f003 ff6b bl 8006c94 - 8002dbe: 4603 mov r3, r0 - 8002dc0: 73fb strb r3, [r7, #15] + 8002844: 887a ldrh r2, [r7, #2] + 8002846: f04f 33ff mov.w r3, #4294967295 + 800284a: 6879 ldr r1, [r7, #4] + 800284c: 4805 ldr r0, [pc, #20] @ (8002864 ) + 800284e: f002 ff25 bl 800569c + 8002852: 4603 mov r3, r0 + 8002854: 73fb strb r3, [r7, #15] /* Disable transmission mode after sending */ rs485_disable_tx(); - 8002dc2: f000 f813 bl 8002dec + 8002856: f000 f813 bl 8002880 return status; - 8002dc6: 7bfb ldrb r3, [r7, #15] + 800285a: 7bfb ldrb r3, [r7, #15] } - 8002dc8: 4618 mov r0, r3 - 8002dca: 3710 adds r7, #16 - 8002dcc: 46bd mov sp, r7 - 8002dce: bd80 pop {r7, pc} - 8002dd0: 200006d8 .word 0x200006d8 + 800285c: 4618 mov r0, r3 + 800285e: 3710 adds r7, #16 + 8002860: 46bd mov sp, r7 + 8002862: bd80 pop {r7, pc} + 8002864: 2000065c .word 0x2000065c -08002dd4 : +08002868 : /** * @brief Enables transmission mode on RS-485 transceiver. */ void rs485_enable_tx(void) { - 8002dd4: b580 push {r7, lr} - 8002dd6: af00 add r7, sp, #0 + 8002868: b580 push {r7, lr} + 800286a: af00 add r7, sp, #0 /* Set TX EN pin high to enable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_SET); - 8002dd8: 2201 movs r2, #1 - 8002dda: f44f 5180 mov.w r1, #4096 @ 0x1000 - 8002dde: 4802 ldr r0, [pc, #8] @ (8002de8 ) - 8002de0: f001 fe61 bl 8004aa6 + 800286c: 2201 movs r2, #1 + 800286e: f44f 5180 mov.w r1, #4096 @ 0x1000 + 8002872: 4802 ldr r0, [pc, #8] @ (800287c ) + 8002874: f001 f995 bl 8003ba2 } - 8002de4: bf00 nop - 8002de6: bd80 pop {r7, pc} - 8002de8: 40010800 .word 0x40010800 + 8002878: bf00 nop + 800287a: bd80 pop {r7, pc} + 800287c: 40010800 .word 0x40010800 -08002dec : +08002880 : /** * @brief Disables transmission mode on RS-485 transceiver. */ void rs485_disable_tx(void) { - 8002dec: b580 push {r7, lr} - 8002dee: af00 add r7, sp, #0 + 8002880: b580 push {r7, lr} + 8002882: af00 add r7, sp, #0 /* Set TX EN pin low to disable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_RESET); - 8002df0: 2200 movs r2, #0 - 8002df2: f44f 5180 mov.w r1, #4096 @ 0x1000 - 8002df6: 4802 ldr r0, [pc, #8] @ (8002e00 ) - 8002df8: f001 fe55 bl 8004aa6 + 8002884: 2200 movs r2, #0 + 8002886: f44f 5180 mov.w r1, #4096 @ 0x1000 + 800288a: 4802 ldr r0, [pc, #8] @ (8002894 ) + 800288c: f001 f989 bl 8003ba2 } - 8002dfc: bf00 nop - 8002dfe: bd80 pop {r7, pc} - 8002e00: 40010800 .word 0x40010800 + 8002890: bf00 nop + 8002892: bd80 pop {r7, pc} + 8002894: 40010800 .word 0x40010800 -08002e04 : +08002898 : /** * @brief Configures GPIOs for address detection. */ static void rs485_configure_gpio_address(void) { - 8002e04: b580 push {r7, lr} - 8002e06: b086 sub sp, #24 - 8002e08: af00 add r7, sp, #0 + 8002898: b580 push {r7, lr} + 800289a: b086 sub sp, #24 + 800289c: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002e0a: f107 0308 add.w r3, r7, #8 - 8002e0e: 2200 movs r2, #0 - 8002e10: 601a str r2, [r3, #0] - 8002e12: 605a str r2, [r3, #4] - 8002e14: 609a str r2, [r3, #8] - 8002e16: 60da str r2, [r3, #12] + 800289e: f107 0308 add.w r3, r7, #8 + 80028a2: 2200 movs r2, #0 + 80028a4: 601a str r2, [r3, #0] + 80028a6: 605a str r2, [r3, #4] + 80028a8: 609a str r2, [r3, #8] + 80028aa: 60da str r2, [r3, #12] /* Enable clock for GPIOA and GPIOB */ __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002e18: 4b1a ldr r3, [pc, #104] @ (8002e84 ) - 8002e1a: 699b ldr r3, [r3, #24] - 8002e1c: 4a19 ldr r2, [pc, #100] @ (8002e84 ) - 8002e1e: f043 0304 orr.w r3, r3, #4 - 8002e22: 6193 str r3, [r2, #24] - 8002e24: 4b17 ldr r3, [pc, #92] @ (8002e84 ) - 8002e26: 699b ldr r3, [r3, #24] - 8002e28: f003 0304 and.w r3, r3, #4 - 8002e2c: 607b str r3, [r7, #4] - 8002e2e: 687b ldr r3, [r7, #4] + 80028ac: 4b1a ldr r3, [pc, #104] @ (8002918 ) + 80028ae: 699b ldr r3, [r3, #24] + 80028b0: 4a19 ldr r2, [pc, #100] @ (8002918 ) + 80028b2: f043 0304 orr.w r3, r3, #4 + 80028b6: 6193 str r3, [r2, #24] + 80028b8: 4b17 ldr r3, [pc, #92] @ (8002918 ) + 80028ba: 699b ldr r3, [r3, #24] + 80028bc: f003 0304 and.w r3, r3, #4 + 80028c0: 607b str r3, [r7, #4] + 80028c2: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8002e30: 4b14 ldr r3, [pc, #80] @ (8002e84 ) - 8002e32: 699b ldr r3, [r3, #24] - 8002e34: 4a13 ldr r2, [pc, #76] @ (8002e84 ) - 8002e36: f043 0308 orr.w r3, r3, #8 - 8002e3a: 6193 str r3, [r2, #24] - 8002e3c: 4b11 ldr r3, [pc, #68] @ (8002e84 ) - 8002e3e: 699b ldr r3, [r3, #24] - 8002e40: f003 0308 and.w r3, r3, #8 - 8002e44: 603b str r3, [r7, #0] - 8002e46: 683b ldr r3, [r7, #0] + 80028c4: 4b14 ldr r3, [pc, #80] @ (8002918 ) + 80028c6: 699b ldr r3, [r3, #24] + 80028c8: 4a13 ldr r2, [pc, #76] @ (8002918 ) + 80028ca: f043 0308 orr.w r3, r3, #8 + 80028ce: 6193 str r3, [r2, #24] + 80028d0: 4b11 ldr r3, [pc, #68] @ (8002918 ) + 80028d2: 699b ldr r3, [r3, #24] + 80028d4: f003 0308 and.w r3, r3, #8 + 80028d8: 603b str r3, [r7, #0] + 80028da: 683b ldr r3, [r7, #0] /* Configure PA2-PA5 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; - 8002e48: 233c movs r3, #60 @ 0x3c - 8002e4a: 60bb str r3, [r7, #8] + 80028dc: 233c movs r3, #60 @ 0x3c + 80028de: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002e4c: 2300 movs r3, #0 - 8002e4e: 60fb str r3, [r7, #12] + 80028e0: 2300 movs r3, #0 + 80028e2: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8002e50: 2301 movs r3, #1 - 8002e52: 613b str r3, [r7, #16] + 80028e4: 2301 movs r3, #1 + 80028e6: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002e54: f107 0308 add.w r3, r7, #8 - 8002e58: 4619 mov r1, r3 - 8002e5a: 480b ldr r0, [pc, #44] @ (8002e88 ) - 8002e5c: f001 fc88 bl 8004770 + 80028e8: f107 0308 add.w r3, r7, #8 + 80028ec: 4619 mov r1, r3 + 80028ee: 480b ldr r0, [pc, #44] @ (800291c ) + 80028f0: f000 ffbc bl 800386c /* Configure PB12-PB15 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15; - 8002e60: f44f 4370 mov.w r3, #61440 @ 0xf000 - 8002e64: 60bb str r3, [r7, #8] + 80028f4: f44f 4370 mov.w r3, #61440 @ 0xf000 + 80028f8: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002e66: 2300 movs r3, #0 - 8002e68: 60fb str r3, [r7, #12] + 80028fa: 2300 movs r3, #0 + 80028fc: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8002e6a: 2301 movs r3, #1 - 8002e6c: 613b str r3, [r7, #16] + 80028fe: 2301 movs r3, #1 + 8002900: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8002e6e: f107 0308 add.w r3, r7, #8 - 8002e72: 4619 mov r1, r3 - 8002e74: 4805 ldr r0, [pc, #20] @ (8002e8c ) - 8002e76: f001 fc7b bl 8004770 + 8002902: f107 0308 add.w r3, r7, #8 + 8002906: 4619 mov r1, r3 + 8002908: 4805 ldr r0, [pc, #20] @ (8002920 ) + 800290a: f000 ffaf bl 800386c } - 8002e7a: bf00 nop - 8002e7c: 3718 adds r7, #24 - 8002e7e: 46bd mov sp, r7 - 8002e80: bd80 pop {r7, pc} - 8002e82: bf00 nop - 8002e84: 40021000 .word 0x40021000 - 8002e88: 40010800 .word 0x40010800 - 8002e8c: 40010c00 .word 0x40010c00 + 800290e: bf00 nop + 8002910: 3718 adds r7, #24 + 8002912: 46bd mov sp, r7 + 8002914: bd80 pop {r7, pc} + 8002916: bf00 nop + 8002918: 40021000 .word 0x40021000 + 800291c: 40010800 .word 0x40010800 + 8002920: 40010c00 .word 0x40010c00 -08002e90 : +08002924 : /** * @brief Configures USART1 for RS-485 communication. */ static void rs485_configure_usart1(void) { - 8002e90: b580 push {r7, lr} - 8002e92: b082 sub sp, #8 - 8002e94: af00 add r7, sp, #0 + 8002924: b580 push {r7, lr} + 8002926: b082 sub sp, #8 + 8002928: af00 add r7, sp, #0 /* Enable clock for USART1 */ __HAL_RCC_USART1_CLK_ENABLE(); - 8002e96: 4b18 ldr r3, [pc, #96] @ (8002ef8 ) - 8002e98: 699b ldr r3, [r3, #24] - 8002e9a: 4a17 ldr r2, [pc, #92] @ (8002ef8 ) - 8002e9c: f443 4380 orr.w r3, r3, #16384 @ 0x4000 - 8002ea0: 6193 str r3, [r2, #24] - 8002ea2: 4b15 ldr r3, [pc, #84] @ (8002ef8 ) - 8002ea4: 699b ldr r3, [r3, #24] - 8002ea6: f403 4380 and.w r3, r3, #16384 @ 0x4000 - 8002eaa: 607b str r3, [r7, #4] - 8002eac: 687b ldr r3, [r7, #4] + 800292a: 4b18 ldr r3, [pc, #96] @ (800298c ) + 800292c: 699b ldr r3, [r3, #24] + 800292e: 4a17 ldr r2, [pc, #92] @ (800298c ) + 8002930: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 8002934: 6193 str r3, [r2, #24] + 8002936: 4b15 ldr r3, [pc, #84] @ (800298c ) + 8002938: 699b ldr r3, [r3, #24] + 800293a: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 800293e: 607b str r3, [r7, #4] + 8002940: 687b ldr r3, [r7, #4] huart1.Instance = USART1; - 8002eae: 4b13 ldr r3, [pc, #76] @ (8002efc ) - 8002eb0: 4a13 ldr r2, [pc, #76] @ (8002f00 ) - 8002eb2: 601a str r2, [r3, #0] + 8002942: 4b13 ldr r3, [pc, #76] @ (8002990 ) + 8002944: 4a13 ldr r2, [pc, #76] @ (8002994 ) + 8002946: 601a str r2, [r3, #0] huart1.Init.BaudRate = 9600; /*!< Default baud rate for RS-485 */ - 8002eb4: 4b11 ldr r3, [pc, #68] @ (8002efc ) - 8002eb6: f44f 5216 mov.w r2, #9600 @ 0x2580 - 8002eba: 605a str r2, [r3, #4] + 8002948: 4b11 ldr r3, [pc, #68] @ (8002990 ) + 800294a: f44f 5216 mov.w r2, #9600 @ 0x2580 + 800294e: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8002ebc: 4b0f ldr r3, [pc, #60] @ (8002efc ) - 8002ebe: 2200 movs r2, #0 - 8002ec0: 609a str r2, [r3, #8] + 8002950: 4b0f ldr r3, [pc, #60] @ (8002990 ) + 8002952: 2200 movs r2, #0 + 8002954: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 8002ec2: 4b0e ldr r3, [pc, #56] @ (8002efc ) - 8002ec4: 2200 movs r2, #0 - 8002ec6: 60da str r2, [r3, #12] + 8002956: 4b0e ldr r3, [pc, #56] @ (8002990 ) + 8002958: 2200 movs r2, #0 + 800295a: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 8002ec8: 4b0c ldr r3, [pc, #48] @ (8002efc ) - 8002eca: 2200 movs r2, #0 - 8002ecc: 611a str r2, [r3, #16] + 800295c: 4b0c ldr r3, [pc, #48] @ (8002990 ) + 800295e: 2200 movs r2, #0 + 8002960: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 8002ece: 4b0b ldr r3, [pc, #44] @ (8002efc ) - 8002ed0: 220c movs r2, #12 - 8002ed2: 615a str r2, [r3, #20] + 8002962: 4b0b ldr r3, [pc, #44] @ (8002990 ) + 8002964: 220c movs r2, #12 + 8002966: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; /*!< Use NONE as TX enable */ - 8002ed4: 4b09 ldr r3, [pc, #36] @ (8002efc ) - 8002ed6: 2200 movs r2, #0 - 8002ed8: 619a str r2, [r3, #24] + 8002968: 4b09 ldr r3, [pc, #36] @ (8002990 ) + 800296a: 2200 movs r2, #0 + 800296c: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8002eda: 4b08 ldr r3, [pc, #32] @ (8002efc ) - 8002edc: 2200 movs r2, #0 - 8002ede: 61da str r2, [r3, #28] + 800296e: 4b08 ldr r3, [pc, #32] @ (8002990 ) + 8002970: 2200 movs r2, #0 + 8002972: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) - 8002ee0: 4806 ldr r0, [pc, #24] @ (8002efc ) - 8002ee2: f003 fe87 bl 8006bf4 - 8002ee6: 4603 mov r3, r0 - 8002ee8: 2b00 cmp r3, #0 - 8002eea: d001 beq.n 8002ef0 + 8002974: 4806 ldr r0, [pc, #24] @ (8002990 ) + 8002976: f002 fe41 bl 80055fc + 800297a: 4603 mov r3, r0 + 800297c: 2b00 cmp r3, #0 + 800297e: d001 beq.n 8002984 { /* Initialization Error */ while(1); - 8002eec: bf00 nop - 8002eee: e7fd b.n 8002eec + 8002980: bf00 nop + 8002982: e7fd b.n 8002980 } } - 8002ef0: bf00 nop - 8002ef2: 3708 adds r7, #8 - 8002ef4: 46bd mov sp, r7 - 8002ef6: bd80 pop {r7, pc} - 8002ef8: 40021000 .word 0x40021000 - 8002efc: 200006d8 .word 0x200006d8 - 8002f00: 40013800 .word 0x40013800 + 8002984: bf00 nop + 8002986: 3708 adds r7, #8 + 8002988: 46bd mov sp, r7 + 800298a: bd80 pop {r7, pc} + 800298c: 40021000 .word 0x40021000 + 8002990: 2000065c .word 0x2000065c + 8002994: 40013800 .word 0x40013800 -08002f04 : +08002998 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8002f04: b480 push {r7} - 8002f06: b085 sub sp, #20 - 8002f08: af00 add r7, sp, #0 + 8002998: b480 push {r7} + 800299a: b085 sub sp, #20 + 800299c: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); - 8002f0a: 4b15 ldr r3, [pc, #84] @ (8002f60 ) - 8002f0c: 699b ldr r3, [r3, #24] - 8002f0e: 4a14 ldr r2, [pc, #80] @ (8002f60 ) - 8002f10: f043 0301 orr.w r3, r3, #1 - 8002f14: 6193 str r3, [r2, #24] - 8002f16: 4b12 ldr r3, [pc, #72] @ (8002f60 ) - 8002f18: 699b ldr r3, [r3, #24] - 8002f1a: f003 0301 and.w r3, r3, #1 - 8002f1e: 60bb str r3, [r7, #8] - 8002f20: 68bb ldr r3, [r7, #8] + 800299e: 4b15 ldr r3, [pc, #84] @ (80029f4 ) + 80029a0: 699b ldr r3, [r3, #24] + 80029a2: 4a14 ldr r2, [pc, #80] @ (80029f4 ) + 80029a4: f043 0301 orr.w r3, r3, #1 + 80029a8: 6193 str r3, [r2, #24] + 80029aa: 4b12 ldr r3, [pc, #72] @ (80029f4 ) + 80029ac: 699b ldr r3, [r3, #24] + 80029ae: f003 0301 and.w r3, r3, #1 + 80029b2: 60bb str r3, [r7, #8] + 80029b4: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); - 8002f22: 4b0f ldr r3, [pc, #60] @ (8002f60 ) - 8002f24: 69db ldr r3, [r3, #28] - 8002f26: 4a0e ldr r2, [pc, #56] @ (8002f60 ) - 8002f28: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8002f2c: 61d3 str r3, [r2, #28] - 8002f2e: 4b0c ldr r3, [pc, #48] @ (8002f60 ) - 8002f30: 69db ldr r3, [r3, #28] - 8002f32: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8002f36: 607b str r3, [r7, #4] - 8002f38: 687b ldr r3, [r7, #4] + 80029b6: 4b0f ldr r3, [pc, #60] @ (80029f4 ) + 80029b8: 69db ldr r3, [r3, #28] + 80029ba: 4a0e ldr r2, [pc, #56] @ (80029f4 ) + 80029bc: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 80029c0: 61d3 str r3, [r2, #28] + 80029c2: 4b0c ldr r3, [pc, #48] @ (80029f4 ) + 80029c4: 69db ldr r3, [r3, #28] + 80029c6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80029ca: 607b str r3, [r7, #4] + 80029cc: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); - 8002f3a: 4b0a ldr r3, [pc, #40] @ (8002f64 ) - 8002f3c: 685b ldr r3, [r3, #4] - 8002f3e: 60fb str r3, [r7, #12] - 8002f40: 68fb ldr r3, [r7, #12] - 8002f42: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 - 8002f46: 60fb str r3, [r7, #12] - 8002f48: 68fb ldr r3, [r7, #12] - 8002f4a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 - 8002f4e: 60fb str r3, [r7, #12] - 8002f50: 4a04 ldr r2, [pc, #16] @ (8002f64 ) - 8002f52: 68fb ldr r3, [r7, #12] - 8002f54: 6053 str r3, [r2, #4] + 80029ce: 4b0a ldr r3, [pc, #40] @ (80029f8 ) + 80029d0: 685b ldr r3, [r3, #4] + 80029d2: 60fb str r3, [r7, #12] + 80029d4: 68fb ldr r3, [r7, #12] + 80029d6: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 + 80029da: 60fb str r3, [r7, #12] + 80029dc: 68fb ldr r3, [r7, #12] + 80029de: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 + 80029e2: 60fb str r3, [r7, #12] + 80029e4: 4a04 ldr r2, [pc, #16] @ (80029f8 ) + 80029e6: 68fb ldr r3, [r7, #12] + 80029e8: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 8002f56: bf00 nop - 8002f58: 3714 adds r7, #20 - 8002f5a: 46bd mov sp, r7 - 8002f5c: bc80 pop {r7} - 8002f5e: 4770 bx lr - 8002f60: 40021000 .word 0x40021000 - 8002f64: 40010000 .word 0x40010000 + 80029ea: bf00 nop + 80029ec: 3714 adds r7, #20 + 80029ee: 46bd mov sp, r7 + 80029f0: bc80 pop {r7} + 80029f2: 4770 bx lr + 80029f4: 40021000 .word 0x40021000 + 80029f8: 40010000 .word 0x40010000 -08002f68 : +080029fc : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 8002f68: b480 push {r7} - 8002f6a: af00 add r7, sp, #0 + 80029fc: b480 push {r7} + 80029fe: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8002f6c: bf00 nop - 8002f6e: e7fd b.n 8002f6c + 8002a00: bf00 nop + 8002a02: e7fd b.n 8002a00 -08002f70 : +08002a04 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 8002f70: b480 push {r7} - 8002f72: af00 add r7, sp, #0 + 8002a04: b480 push {r7} + 8002a06: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 8002f74: bf00 nop - 8002f76: e7fd b.n 8002f74 + 8002a08: bf00 nop + 8002a0a: e7fd b.n 8002a08 -08002f78 : +08002a0c : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 8002f78: b480 push {r7} - 8002f7a: af00 add r7, sp, #0 + 8002a0c: b480 push {r7} + 8002a0e: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 8002f7c: bf00 nop - 8002f7e: e7fd b.n 8002f7c + 8002a10: bf00 nop + 8002a12: e7fd b.n 8002a10 -08002f80 : +08002a14 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { - 8002f80: b480 push {r7} - 8002f82: af00 add r7, sp, #0 + 8002a14: b480 push {r7} + 8002a16: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 8002f84: bf00 nop - 8002f86: e7fd b.n 8002f84 + 8002a18: bf00 nop + 8002a1a: e7fd b.n 8002a18 -08002f88 : +08002a1c : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 8002f88: b480 push {r7} - 8002f8a: af00 add r7, sp, #0 + 8002a1c: b480 push {r7} + 8002a1e: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 8002f8c: bf00 nop - 8002f8e: e7fd b.n 8002f8c + 8002a20: bf00 nop + 8002a22: e7fd b.n 8002a20 -08002f90 : +08002a24 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8002f90: b480 push {r7} - 8002f92: af00 add r7, sp, #0 + 8002a24: b480 push {r7} + 8002a26: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 8002f94: bf00 nop - 8002f96: 46bd mov sp, r7 - 8002f98: bc80 pop {r7} - 8002f9a: 4770 bx lr + 8002a28: bf00 nop + 8002a2a: 46bd mov sp, r7 + 8002a2c: bc80 pop {r7} + 8002a2e: 4770 bx lr -08002f9c : +08002a30 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 8002f9c: b480 push {r7} - 8002f9e: af00 add r7, sp, #0 + 8002a30: b480 push {r7} + 8002a32: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 8002fa0: bf00 nop - 8002fa2: 46bd mov sp, r7 - 8002fa4: bc80 pop {r7} - 8002fa6: 4770 bx lr + 8002a34: bf00 nop + 8002a36: 46bd mov sp, r7 + 8002a38: bc80 pop {r7} + 8002a3a: 4770 bx lr -08002fa8 : +08002a3c : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8002fa8: b480 push {r7} - 8002faa: af00 add r7, sp, #0 + 8002a3c: b480 push {r7} + 8002a3e: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8002fac: bf00 nop - 8002fae: 46bd mov sp, r7 - 8002fb0: bc80 pop {r7} - 8002fb2: 4770 bx lr + 8002a40: bf00 nop + 8002a42: 46bd mov sp, r7 + 8002a44: bc80 pop {r7} + 8002a46: 4770 bx lr -08002fb4 : +08002a48 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8002fb4: b580 push {r7, lr} - 8002fb6: af00 add r7, sp, #0 + 8002a48: b580 push {r7, lr} + 8002a4a: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8002fb8: f000 f97a bl 80032b0 + 8002a4c: f000 f8fc bl 8002c48 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8002fbc: bf00 nop - 8002fbe: bd80 pop {r7, pc} + 8002a50: bf00 nop + 8002a52: bd80 pop {r7, pc} -08002fc0 : - -/** - * @brief This function handles EXTI line3 interrupt. - */ -void EXTI3_IRQHandler(void) -{ - 8002fc0: b580 push {r7, lr} - 8002fc2: af00 add r7, sp, #0 - /* USER CODE BEGIN EXTI3_IRQn 0 */ - - /* USER CODE END EXTI3_IRQn 0 */ - HAL_GPIO_EXTI_IRQHandler(Calib_PH_Pin); - 8002fc4: 2008 movs r0, #8 - 8002fc6: f001 fd87 bl 8004ad8 - /* USER CODE BEGIN EXTI3_IRQn 1 */ - - /* USER CODE END EXTI3_IRQn 1 */ -} - 8002fca: bf00 nop - 8002fcc: bd80 pop {r7, pc} - ... - -08002fd0 : - -/** - * @brief This function handles DMA1 channel1 global interrupt. - */ -void DMA1_Channel1_IRQHandler(void) -{ - 8002fd0: b580 push {r7, lr} - 8002fd2: af00 add r7, sp, #0 - /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ - - /* USER CODE END DMA1_Channel1_IRQn 0 */ - HAL_DMA_IRQHandler(&hdma_adc1); - 8002fd4: 4802 ldr r0, [pc, #8] @ (8002fe0 ) - 8002fd6: f001 f897 bl 8004108 - /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ - - /* USER CODE END DMA1_Channel1_IRQn 1 */ -} - 8002fda: bf00 nop - 8002fdc: bd80 pop {r7, pc} - 8002fde: bf00 nop - 8002fe0: 2000017c .word 0x2000017c - -08002fe4 : +08002a54 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { - 8002fe4: b580 push {r7, lr} - 8002fe6: af00 add r7, sp, #0 + 8002a54: b580 push {r7, lr} + 8002a56: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); - 8002fe8: 4802 ldr r0, [pc, #8] @ (8002ff4 ) - 8002fea: f003 fedf bl 8006dac + 8002a58: 4802 ldr r0, [pc, #8] @ (8002a64 ) + 8002a5a: f002 feab bl 80057b4 /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } - 8002fee: bf00 nop - 8002ff0: bd80 pop {r7, pc} - 8002ff2: bf00 nop - 8002ff4: 20000768 .word 0x20000768 + 8002a5e: bf00 nop + 8002a60: bd80 pop {r7, pc} + 8002a62: bf00 nop + 8002a64: 200006a4 .word 0x200006a4 -08002ff8 : +08002a68 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { - 8002ff8: b480 push {r7} - 8002ffa: af00 add r7, sp, #0 + 8002a68: b480 push {r7} + 8002a6a: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } - 8002ffc: bf00 nop - 8002ffe: 46bd mov sp, r7 - 8003000: bc80 pop {r7} - 8003002: 4770 bx lr + 8002a6c: bf00 nop + 8002a6e: 46bd mov sp, r7 + 8002a70: bc80 pop {r7} + 8002a72: 4770 bx lr -08003004 : - -TIM_HandleTypeDef htim3; - -/* TIM3 init function */ -void MX_TIM3_Init(void) -{ - 8003004: b580 push {r7, lr} - 8003006: b086 sub sp, #24 - 8003008: af00 add r7, sp, #0 - - /* USER CODE BEGIN TIM3_Init 0 */ - - /* USER CODE END TIM3_Init 0 */ - - TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 800300a: f107 0308 add.w r3, r7, #8 - 800300e: 2200 movs r2, #0 - 8003010: 601a str r2, [r3, #0] - 8003012: 605a str r2, [r3, #4] - 8003014: 609a str r2, [r3, #8] - 8003016: 60da str r2, [r3, #12] - TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8003018: 463b mov r3, r7 - 800301a: 2200 movs r2, #0 - 800301c: 601a str r2, [r3, #0] - 800301e: 605a str r2, [r3, #4] - - /* USER CODE BEGIN TIM3_Init 1 */ - - /* USER CODE END TIM3_Init 1 */ - htim3.Instance = TIM3; - 8003020: 4b1d ldr r3, [pc, #116] @ (8003098 ) - 8003022: 4a1e ldr r2, [pc, #120] @ (800309c ) - 8003024: 601a str r2, [r3, #0] - htim3.Init.Prescaler = 3; - 8003026: 4b1c ldr r3, [pc, #112] @ (8003098 ) - 8003028: 2203 movs r2, #3 - 800302a: 605a str r2, [r3, #4] - htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - 800302c: 4b1a ldr r3, [pc, #104] @ (8003098 ) - 800302e: 2200 movs r2, #0 - 8003030: 609a str r2, [r3, #8] - htim3.Init.Period = 59999; - 8003032: 4b19 ldr r3, [pc, #100] @ (8003098 ) - 8003034: f64e 225f movw r2, #59999 @ 0xea5f - 8003038: 60da str r2, [r3, #12] - htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 800303a: 4b17 ldr r3, [pc, #92] @ (8003098 ) - 800303c: 2200 movs r2, #0 - 800303e: 611a str r2, [r3, #16] - htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 8003040: 4b15 ldr r3, [pc, #84] @ (8003098 ) - 8003042: 2280 movs r2, #128 @ 0x80 - 8003044: 619a str r2, [r3, #24] - if (HAL_TIM_Base_Init(&htim3) != HAL_OK) - 8003046: 4814 ldr r0, [pc, #80] @ (8003098 ) - 8003048: f003 fb10 bl 800666c - 800304c: 4603 mov r3, r0 - 800304e: 2b00 cmp r3, #0 - 8003050: d001 beq.n 8003056 - { - Error_Handler(); - 8003052: f7ff fe5d bl 8002d10 - } - sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8003056: f44f 5380 mov.w r3, #4096 @ 0x1000 - 800305a: 60bb str r3, [r7, #8] - if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) - 800305c: f107 0308 add.w r3, r7, #8 - 8003060: 4619 mov r1, r3 - 8003062: 480d ldr r0, [pc, #52] @ (8003098 ) - 8003064: f003 fb9c bl 80067a0 - 8003068: 4603 mov r3, r0 - 800306a: 2b00 cmp r3, #0 - 800306c: d001 beq.n 8003072 - { - Error_Handler(); - 800306e: f7ff fe4f bl 8002d10 - } - sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; - 8003072: 2320 movs r3, #32 - 8003074: 603b str r3, [r7, #0] - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8003076: 2300 movs r3, #0 - 8003078: 607b str r3, [r7, #4] - if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - 800307a: 463b mov r3, r7 - 800307c: 4619 mov r1, r3 - 800307e: 4806 ldr r0, [pc, #24] @ (8003098 ) - 8003080: f003 fd5a bl 8006b38 - 8003084: 4603 mov r3, r0 - 8003086: 2b00 cmp r3, #0 - 8003088: d001 beq.n 800308e - { - Error_Handler(); - 800308a: f7ff fe41 bl 8002d10 - } - /* USER CODE BEGIN TIM3_Init 2 */ - - /* USER CODE END TIM3_Init 2 */ - -} - 800308e: bf00 nop - 8003090: 3718 adds r7, #24 - 8003092: 46bd mov sp, r7 - 8003094: bd80 pop {r7, pc} - 8003096: bf00 nop - 8003098: 20000720 .word 0x20000720 - 800309c: 40000400 .word 0x40000400 - -080030a0 : - -void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) -{ - 80030a0: b480 push {r7} - 80030a2: b085 sub sp, #20 - 80030a4: af00 add r7, sp, #0 - 80030a6: 6078 str r0, [r7, #4] - - if(tim_baseHandle->Instance==TIM3) - 80030a8: 687b ldr r3, [r7, #4] - 80030aa: 681b ldr r3, [r3, #0] - 80030ac: 4a09 ldr r2, [pc, #36] @ (80030d4 ) - 80030ae: 4293 cmp r3, r2 - 80030b0: d10b bne.n 80030ca - { - /* USER CODE BEGIN TIM3_MspInit 0 */ - - /* USER CODE END TIM3_MspInit 0 */ - /* TIM3 clock enable */ - __HAL_RCC_TIM3_CLK_ENABLE(); - 80030b2: 4b09 ldr r3, [pc, #36] @ (80030d8 ) - 80030b4: 69db ldr r3, [r3, #28] - 80030b6: 4a08 ldr r2, [pc, #32] @ (80030d8 ) - 80030b8: f043 0302 orr.w r3, r3, #2 - 80030bc: 61d3 str r3, [r2, #28] - 80030be: 4b06 ldr r3, [pc, #24] @ (80030d8 ) - 80030c0: 69db ldr r3, [r3, #28] - 80030c2: f003 0302 and.w r3, r3, #2 - 80030c6: 60fb str r3, [r7, #12] - 80030c8: 68fb ldr r3, [r7, #12] - /* USER CODE BEGIN TIM3_MspInit 1 */ - - /* USER CODE END TIM3_MspInit 1 */ - } -} - 80030ca: bf00 nop - 80030cc: 3714 adds r7, #20 - 80030ce: 46bd mov sp, r7 - 80030d0: bc80 pop {r7} - 80030d2: 4770 bx lr - 80030d4: 40000400 .word 0x40000400 - 80030d8: 40021000 .word 0x40021000 - -080030dc : +08002a74 : UART_HandleTypeDef huart1; /* USART1 init function */ void MX_USART1_UART_Init(void) { - 80030dc: b580 push {r7, lr} - 80030de: af00 add r7, sp, #0 + 8002a74: b580 push {r7, lr} + 8002a76: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; - 80030e0: 4b11 ldr r3, [pc, #68] @ (8003128 ) - 80030e2: 4a12 ldr r2, [pc, #72] @ (800312c ) - 80030e4: 601a str r2, [r3, #0] + 8002a78: 4b11 ldr r3, [pc, #68] @ (8002ac0 ) + 8002a7a: 4a12 ldr r2, [pc, #72] @ (8002ac4 ) + 8002a7c: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; - 80030e6: 4b10 ldr r3, [pc, #64] @ (8003128 ) - 80030e8: f44f 32e1 mov.w r2, #115200 @ 0x1c200 - 80030ec: 605a str r2, [r3, #4] + 8002a7e: 4b10 ldr r3, [pc, #64] @ (8002ac0 ) + 8002a80: f44f 32e1 mov.w r2, #115200 @ 0x1c200 + 8002a84: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 80030ee: 4b0e ldr r3, [pc, #56] @ (8003128 ) - 80030f0: 2200 movs r2, #0 - 80030f2: 609a str r2, [r3, #8] + 8002a86: 4b0e ldr r3, [pc, #56] @ (8002ac0 ) + 8002a88: 2200 movs r2, #0 + 8002a8a: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 80030f4: 4b0c ldr r3, [pc, #48] @ (8003128 ) - 80030f6: 2200 movs r2, #0 - 80030f8: 60da str r2, [r3, #12] + 8002a8c: 4b0c ldr r3, [pc, #48] @ (8002ac0 ) + 8002a8e: 2200 movs r2, #0 + 8002a90: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 80030fa: 4b0b ldr r3, [pc, #44] @ (8003128 ) - 80030fc: 2200 movs r2, #0 - 80030fe: 611a str r2, [r3, #16] + 8002a92: 4b0b ldr r3, [pc, #44] @ (8002ac0 ) + 8002a94: 2200 movs r2, #0 + 8002a96: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 8003100: 4b09 ldr r3, [pc, #36] @ (8003128 ) - 8003102: 220c movs r2, #12 - 8003104: 615a str r2, [r3, #20] + 8002a98: 4b09 ldr r3, [pc, #36] @ (8002ac0 ) + 8002a9a: 220c movs r2, #12 + 8002a9c: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8003106: 4b08 ldr r3, [pc, #32] @ (8003128 ) - 8003108: 2200 movs r2, #0 - 800310a: 619a str r2, [r3, #24] + 8002a9e: 4b08 ldr r3, [pc, #32] @ (8002ac0 ) + 8002aa0: 2200 movs r2, #0 + 8002aa2: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 800310c: 4b06 ldr r3, [pc, #24] @ (8003128 ) - 800310e: 2200 movs r2, #0 - 8003110: 61da str r2, [r3, #28] + 8002aa4: 4b06 ldr r3, [pc, #24] @ (8002ac0 ) + 8002aa6: 2200 movs r2, #0 + 8002aa8: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) - 8003112: 4805 ldr r0, [pc, #20] @ (8003128 ) - 8003114: f003 fd6e bl 8006bf4 - 8003118: 4603 mov r3, r0 - 800311a: 2b00 cmp r3, #0 - 800311c: d001 beq.n 8003122 + 8002aaa: 4805 ldr r0, [pc, #20] @ (8002ac0 ) + 8002aac: f002 fda6 bl 80055fc + 8002ab0: 4603 mov r3, r0 + 8002ab2: 2b00 cmp r3, #0 + 8002ab4: d001 beq.n 8002aba { Error_Handler(); - 800311e: f7ff fdf7 bl 8002d10 + 8002ab6: f7ff fe75 bl 80027a4 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } - 8003122: bf00 nop - 8003124: bd80 pop {r7, pc} - 8003126: bf00 nop - 8003128: 20000768 .word 0x20000768 - 800312c: 40013800 .word 0x40013800 + 8002aba: bf00 nop + 8002abc: bd80 pop {r7, pc} + 8002abe: bf00 nop + 8002ac0: 200006a4 .word 0x200006a4 + 8002ac4: 40013800 .word 0x40013800 -08003130 : +08002ac8 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { - 8003130: b580 push {r7, lr} - 8003132: b088 sub sp, #32 - 8003134: af00 add r7, sp, #0 - 8003136: 6078 str r0, [r7, #4] + 8002ac8: b580 push {r7, lr} + 8002aca: b088 sub sp, #32 + 8002acc: af00 add r7, sp, #0 + 8002ace: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8003138: f107 0310 add.w r3, r7, #16 - 800313c: 2200 movs r2, #0 - 800313e: 601a str r2, [r3, #0] - 8003140: 605a str r2, [r3, #4] - 8003142: 609a str r2, [r3, #8] - 8003144: 60da str r2, [r3, #12] + 8002ad0: f107 0310 add.w r3, r7, #16 + 8002ad4: 2200 movs r2, #0 + 8002ad6: 601a str r2, [r3, #0] + 8002ad8: 605a str r2, [r3, #4] + 8002ada: 609a str r2, [r3, #8] + 8002adc: 60da str r2, [r3, #12] if(uartHandle->Instance==USART1) - 8003146: 687b ldr r3, [r7, #4] - 8003148: 681b ldr r3, [r3, #0] - 800314a: 4a20 ldr r2, [pc, #128] @ (80031cc ) - 800314c: 4293 cmp r3, r2 - 800314e: d139 bne.n 80031c4 + 8002ade: 687b ldr r3, [r7, #4] + 8002ae0: 681b ldr r3, [r3, #0] + 8002ae2: 4a20 ldr r2, [pc, #128] @ (8002b64 ) + 8002ae4: 4293 cmp r3, r2 + 8002ae6: d139 bne.n 8002b5c { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* USART1 clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); - 8003150: 4b1f ldr r3, [pc, #124] @ (80031d0 ) - 8003152: 699b ldr r3, [r3, #24] - 8003154: 4a1e ldr r2, [pc, #120] @ (80031d0 ) - 8003156: f443 4380 orr.w r3, r3, #16384 @ 0x4000 - 800315a: 6193 str r3, [r2, #24] - 800315c: 4b1c ldr r3, [pc, #112] @ (80031d0 ) - 800315e: 699b ldr r3, [r3, #24] - 8003160: f403 4380 and.w r3, r3, #16384 @ 0x4000 - 8003164: 60fb str r3, [r7, #12] - 8003166: 68fb ldr r3, [r7, #12] + 8002ae8: 4b1f ldr r3, [pc, #124] @ (8002b68 ) + 8002aea: 699b ldr r3, [r3, #24] + 8002aec: 4a1e ldr r2, [pc, #120] @ (8002b68 ) + 8002aee: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 8002af2: 6193 str r3, [r2, #24] + 8002af4: 4b1c ldr r3, [pc, #112] @ (8002b68 ) + 8002af6: 699b ldr r3, [r3, #24] + 8002af8: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 8002afc: 60fb str r3, [r7, #12] + 8002afe: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8003168: 4b19 ldr r3, [pc, #100] @ (80031d0 ) - 800316a: 699b ldr r3, [r3, #24] - 800316c: 4a18 ldr r2, [pc, #96] @ (80031d0 ) - 800316e: f043 0304 orr.w r3, r3, #4 - 8003172: 6193 str r3, [r2, #24] - 8003174: 4b16 ldr r3, [pc, #88] @ (80031d0 ) - 8003176: 699b ldr r3, [r3, #24] - 8003178: f003 0304 and.w r3, r3, #4 - 800317c: 60bb str r3, [r7, #8] - 800317e: 68bb ldr r3, [r7, #8] + 8002b00: 4b19 ldr r3, [pc, #100] @ (8002b68 ) + 8002b02: 699b ldr r3, [r3, #24] + 8002b04: 4a18 ldr r2, [pc, #96] @ (8002b68 ) + 8002b06: f043 0304 orr.w r3, r3, #4 + 8002b0a: 6193 str r3, [r2, #24] + 8002b0c: 4b16 ldr r3, [pc, #88] @ (8002b68 ) + 8002b0e: 699b ldr r3, [r3, #24] + 8002b10: f003 0304 and.w r3, r3, #4 + 8002b14: 60bb str r3, [r7, #8] + 8002b16: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = TX_RS485_Pin; - 8003180: f44f 7300 mov.w r3, #512 @ 0x200 - 8003184: 613b str r3, [r7, #16] + 8002b18: f44f 7300 mov.w r3, #512 @ 0x200 + 8002b1c: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8003186: 2302 movs r3, #2 - 8003188: 617b str r3, [r7, #20] + 8002b1e: 2302 movs r3, #2 + 8002b20: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; - 800318a: 2301 movs r3, #1 - 800318c: 61fb str r3, [r7, #28] + 8002b22: 2301 movs r3, #1 + 8002b24: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_RS485_GPIO_Port, &GPIO_InitStruct); - 800318e: f107 0310 add.w r3, r7, #16 - 8003192: 4619 mov r1, r3 - 8003194: 480f ldr r0, [pc, #60] @ (80031d4 ) - 8003196: f001 faeb bl 8004770 + 8002b26: f107 0310 add.w r3, r7, #16 + 8002b2a: 4619 mov r1, r3 + 8002b2c: 480f ldr r0, [pc, #60] @ (8002b6c ) + 8002b2e: f000 fe9d bl 800386c GPIO_InitStruct.Pin = RX_RS485_Pin; - 800319a: f44f 6380 mov.w r3, #1024 @ 0x400 - 800319e: 613b str r3, [r7, #16] + 8002b32: f44f 6380 mov.w r3, #1024 @ 0x400 + 8002b36: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80031a0: 2300 movs r3, #0 - 80031a2: 617b str r3, [r7, #20] + 8002b38: 2300 movs r3, #0 + 8002b3a: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80031a4: 2300 movs r3, #0 - 80031a6: 61bb str r3, [r7, #24] + 8002b3c: 2300 movs r3, #0 + 8002b3e: 61bb str r3, [r7, #24] HAL_GPIO_Init(RX_RS485_GPIO_Port, &GPIO_InitStruct); - 80031a8: f107 0310 add.w r3, r7, #16 - 80031ac: 4619 mov r1, r3 - 80031ae: 4809 ldr r0, [pc, #36] @ (80031d4 ) - 80031b0: f001 fade bl 8004770 + 8002b40: f107 0310 add.w r3, r7, #16 + 8002b44: 4619 mov r1, r3 + 8002b46: 4809 ldr r0, [pc, #36] @ (8002b6c ) + 8002b48: f000 fe90 bl 800386c /* USART1 interrupt Init */ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); - 80031b4: 2200 movs r2, #0 - 80031b6: 2100 movs r1, #0 - 80031b8: 2025 movs r0, #37 @ 0x25 - 80031ba: f000 fe00 bl 8003dbe + 8002b4c: 2200 movs r2, #0 + 8002b4e: 2100 movs r1, #0 + 8002b50: 2025 movs r0, #37 @ 0x25 + 8002b52: f000 fba2 bl 800329a HAL_NVIC_EnableIRQ(USART1_IRQn); - 80031be: 2025 movs r0, #37 @ 0x25 - 80031c0: f000 fe19 bl 8003df6 + 8002b56: 2025 movs r0, #37 @ 0x25 + 8002b58: f000 fbbb bl 80032d2 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } - 80031c4: bf00 nop - 80031c6: 3720 adds r7, #32 - 80031c8: 46bd mov sp, r7 - 80031ca: bd80 pop {r7, pc} - 80031cc: 40013800 .word 0x40013800 - 80031d0: 40021000 .word 0x40021000 - 80031d4: 40010800 .word 0x40010800 + 8002b5c: bf00 nop + 8002b5e: 3720 adds r7, #32 + 8002b60: 46bd mov sp, r7 + 8002b62: bd80 pop {r7, pc} + 8002b64: 40013800 .word 0x40013800 + 8002b68: 40021000 .word 0x40021000 + 8002b6c: 40010800 .word 0x40010800 -080031d8 : +08002b70 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit - 80031d8: f7ff ff0e bl 8002ff8 + 8002b70: f7ff ff7a bl 8002a68 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 80031dc: 480b ldr r0, [pc, #44] @ (800320c ) + 8002b74: 480b ldr r0, [pc, #44] @ (8002ba4 ) ldr r1, =_edata - 80031de: 490c ldr r1, [pc, #48] @ (8003210 ) + 8002b76: 490c ldr r1, [pc, #48] @ (8002ba8 ) ldr r2, =_sidata - 80031e0: 4a0c ldr r2, [pc, #48] @ (8003214 ) + 8002b78: 4a0c ldr r2, [pc, #48] @ (8002bac ) movs r3, #0 - 80031e2: 2300 movs r3, #0 + 8002b7a: 2300 movs r3, #0 b LoopCopyDataInit - 80031e4: e002 b.n 80031ec + 8002b7c: e002 b.n 8002b84 -080031e6 : +08002b7e : CopyDataInit: ldr r4, [r2, r3] - 80031e6: 58d4 ldr r4, [r2, r3] + 8002b7e: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 80031e8: 50c4 str r4, [r0, r3] + 8002b80: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 80031ea: 3304 adds r3, #4 + 8002b82: 3304 adds r3, #4 -080031ec : +08002b84 : LoopCopyDataInit: adds r4, r0, r3 - 80031ec: 18c4 adds r4, r0, r3 + 8002b84: 18c4 adds r4, r0, r3 cmp r4, r1 - 80031ee: 428c cmp r4, r1 + 8002b86: 428c cmp r4, r1 bcc CopyDataInit - 80031f0: d3f9 bcc.n 80031e6 + 8002b88: d3f9 bcc.n 8002b7e /* Zero fill the bss segment. */ ldr r2, =_sbss - 80031f2: 4a09 ldr r2, [pc, #36] @ (8003218 ) + 8002b8a: 4a09 ldr r2, [pc, #36] @ (8002bb0 ) ldr r4, =_ebss - 80031f4: 4c09 ldr r4, [pc, #36] @ (800321c ) + 8002b8c: 4c09 ldr r4, [pc, #36] @ (8002bb4 ) movs r3, #0 - 80031f6: 2300 movs r3, #0 + 8002b8e: 2300 movs r3, #0 b LoopFillZerobss - 80031f8: e001 b.n 80031fe + 8002b90: e001 b.n 8002b96 -080031fa : +08002b92 : FillZerobss: str r3, [r2] - 80031fa: 6013 str r3, [r2, #0] + 8002b92: 6013 str r3, [r2, #0] adds r2, r2, #4 - 80031fc: 3204 adds r2, #4 + 8002b94: 3204 adds r2, #4 -080031fe : +08002b96 : LoopFillZerobss: cmp r2, r4 - 80031fe: 42a2 cmp r2, r4 + 8002b96: 42a2 cmp r2, r4 bcc FillZerobss - 8003200: d3fb bcc.n 80031fa + 8002b98: d3fb bcc.n 8002b92 /* Call static constructors */ bl __libc_init_array - 8003202: f004 fb1b bl 800783c <__libc_init_array> + 8002b9a: f003 fb53 bl 8006244 <__libc_init_array> /* Call the application's entry point.*/ bl main - 8003206: f7ff f9ab bl 8002560
+ 8002b9e: f7ff faf5 bl 800218c
bx lr - 800320a: 4770 bx lr + 8002ba2: 4770 bx lr ldr r0, =_sdata - 800320c: 20000000 .word 0x20000000 + 8002ba4: 20000000 .word 0x20000000 ldr r1, =_edata - 8003210: 20000080 .word 0x20000080 + 8002ba8: 20000074 .word 0x20000074 ldr r2, =_sidata - 8003214: 08007ab8 .word 0x08007ab8 + 8002bac: 080064ac .word 0x080064ac ldr r2, =_sbss - 8003218: 20000080 .word 0x20000080 + 8002bb0: 20000078 .word 0x20000078 ldr r4, =_ebss - 800321c: 20000910 .word 0x20000910 + 8002bb4: 20000848 .word 0x20000848 -08003220 : +08002bb8 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 8003220: e7fe b.n 8003220 + 8002bb8: e7fe b.n 8002bb8 ... -08003224 : +08002bbc : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8003224: b580 push {r7, lr} - 8003226: af00 add r7, sp, #0 + 8002bbc: b580 push {r7, lr} + 8002bbe: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 8003228: 4b08 ldr r3, [pc, #32] @ (800324c ) - 800322a: 681b ldr r3, [r3, #0] - 800322c: 4a07 ldr r2, [pc, #28] @ (800324c ) - 800322e: f043 0310 orr.w r3, r3, #16 - 8003232: 6013 str r3, [r2, #0] + 8002bc0: 4b08 ldr r3, [pc, #32] @ (8002be4 ) + 8002bc2: 681b ldr r3, [r3, #0] + 8002bc4: 4a07 ldr r2, [pc, #28] @ (8002be4 ) + 8002bc6: f043 0310 orr.w r3, r3, #16 + 8002bca: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 8003234: 2003 movs r0, #3 - 8003236: f000 fdb7 bl 8003da8 + 8002bcc: 2003 movs r0, #3 + 8002bce: f000 fb59 bl 8003284 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); - 800323a: 200f movs r0, #15 - 800323c: f000 f808 bl 8003250 + 8002bd2: 200f movs r0, #15 + 8002bd4: f000 f808 bl 8002be8 /* Init the low level hardware */ HAL_MspInit(); - 8003240: f7ff fe60 bl 8002f04 + 8002bd8: f7ff fede bl 8002998 /* Return function status */ return HAL_OK; - 8003244: 2300 movs r3, #0 + 8002bdc: 2300 movs r3, #0 } - 8003246: 4618 mov r0, r3 - 8003248: bd80 pop {r7, pc} - 800324a: bf00 nop - 800324c: 40022000 .word 0x40022000 + 8002bde: 4618 mov r0, r3 + 8002be0: bd80 pop {r7, pc} + 8002be2: bf00 nop + 8002be4: 40022000 .word 0x40022000 -08003250 : +08002be8 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8003250: b580 push {r7, lr} - 8003252: b082 sub sp, #8 - 8003254: af00 add r7, sp, #0 - 8003256: 6078 str r0, [r7, #4] + 8002be8: b580 push {r7, lr} + 8002bea: b082 sub sp, #8 + 8002bec: af00 add r7, sp, #0 + 8002bee: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 8003258: 4b12 ldr r3, [pc, #72] @ (80032a4 ) - 800325a: 681a ldr r2, [r3, #0] - 800325c: 4b12 ldr r3, [pc, #72] @ (80032a8 ) - 800325e: 781b ldrb r3, [r3, #0] - 8003260: 4619 mov r1, r3 - 8003262: f44f 737a mov.w r3, #1000 @ 0x3e8 - 8003266: fbb3 f3f1 udiv r3, r3, r1 - 800326a: fbb2 f3f3 udiv r3, r2, r3 - 800326e: 4618 mov r0, r3 - 8003270: f000 fdcf bl 8003e12 - 8003274: 4603 mov r3, r0 - 8003276: 2b00 cmp r3, #0 - 8003278: d001 beq.n 800327e + 8002bf0: 4b12 ldr r3, [pc, #72] @ (8002c3c ) + 8002bf2: 681a ldr r2, [r3, #0] + 8002bf4: 4b12 ldr r3, [pc, #72] @ (8002c40 ) + 8002bf6: 781b ldrb r3, [r3, #0] + 8002bf8: 4619 mov r1, r3 + 8002bfa: f44f 737a mov.w r3, #1000 @ 0x3e8 + 8002bfe: fbb3 f3f1 udiv r3, r3, r1 + 8002c02: fbb2 f3f3 udiv r3, r2, r3 + 8002c06: 4618 mov r0, r3 + 8002c08: f000 fb71 bl 80032ee + 8002c0c: 4603 mov r3, r0 + 8002c0e: 2b00 cmp r3, #0 + 8002c10: d001 beq.n 8002c16 { return HAL_ERROR; - 800327a: 2301 movs r3, #1 - 800327c: e00e b.n 800329c + 8002c12: 2301 movs r3, #1 + 8002c14: e00e b.n 8002c34 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 800327e: 687b ldr r3, [r7, #4] - 8003280: 2b0f cmp r3, #15 - 8003282: d80a bhi.n 800329a + 8002c16: 687b ldr r3, [r7, #4] + 8002c18: 2b0f cmp r3, #15 + 8002c1a: d80a bhi.n 8002c32 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8003284: 2200 movs r2, #0 - 8003286: 6879 ldr r1, [r7, #4] - 8003288: f04f 30ff mov.w r0, #4294967295 - 800328c: f000 fd97 bl 8003dbe + 8002c1c: 2200 movs r2, #0 + 8002c1e: 6879 ldr r1, [r7, #4] + 8002c20: f04f 30ff mov.w r0, #4294967295 + 8002c24: f000 fb39 bl 800329a uwTickPrio = TickPriority; - 8003290: 4a06 ldr r2, [pc, #24] @ (80032ac ) - 8003292: 687b ldr r3, [r7, #4] - 8003294: 6013 str r3, [r2, #0] + 8002c28: 4a06 ldr r2, [pc, #24] @ (8002c44 ) + 8002c2a: 687b ldr r3, [r7, #4] + 8002c2c: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 8003296: 2300 movs r3, #0 - 8003298: e000 b.n 800329c + 8002c2e: 2300 movs r3, #0 + 8002c30: e000 b.n 8002c34 return HAL_ERROR; - 800329a: 2301 movs r3, #1 + 8002c32: 2301 movs r3, #1 } - 800329c: 4618 mov r0, r3 - 800329e: 3708 adds r7, #8 - 80032a0: 46bd mov sp, r7 - 80032a2: bd80 pop {r7, pc} - 80032a4: 20000024 .word 0x20000024 - 80032a8: 2000002c .word 0x2000002c - 80032ac: 20000028 .word 0x20000028 + 8002c34: 4618 mov r0, r3 + 8002c36: 3708 adds r7, #8 + 8002c38: 46bd mov sp, r7 + 8002c3a: bd80 pop {r7, pc} + 8002c3c: 20000018 .word 0x20000018 + 8002c40: 20000020 .word 0x20000020 + 8002c44: 2000001c .word 0x2000001c -080032b0 : +08002c48 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 80032b0: b480 push {r7} - 80032b2: af00 add r7, sp, #0 + 8002c48: b480 push {r7} + 8002c4a: af00 add r7, sp, #0 uwTick += uwTickFreq; - 80032b4: 4b05 ldr r3, [pc, #20] @ (80032cc ) - 80032b6: 781b ldrb r3, [r3, #0] - 80032b8: 461a mov r2, r3 - 80032ba: 4b05 ldr r3, [pc, #20] @ (80032d0 ) - 80032bc: 681b ldr r3, [r3, #0] - 80032be: 4413 add r3, r2 - 80032c0: 4a03 ldr r2, [pc, #12] @ (80032d0 ) - 80032c2: 6013 str r3, [r2, #0] + 8002c4c: 4b05 ldr r3, [pc, #20] @ (8002c64 ) + 8002c4e: 781b ldrb r3, [r3, #0] + 8002c50: 461a mov r2, r3 + 8002c52: 4b05 ldr r3, [pc, #20] @ (8002c68 ) + 8002c54: 681b ldr r3, [r3, #0] + 8002c56: 4413 add r3, r2 + 8002c58: 4a03 ldr r2, [pc, #12] @ (8002c68 ) + 8002c5a: 6013 str r3, [r2, #0] } - 80032c4: bf00 nop - 80032c6: 46bd mov sp, r7 - 80032c8: bc80 pop {r7} - 80032ca: 4770 bx lr - 80032cc: 2000002c .word 0x2000002c - 80032d0: 200007b0 .word 0x200007b0 + 8002c5c: bf00 nop + 8002c5e: 46bd mov sp, r7 + 8002c60: bc80 pop {r7} + 8002c62: 4770 bx lr + 8002c64: 20000020 .word 0x20000020 + 8002c68: 200006ec .word 0x200006ec -080032d4 : +08002c6c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 80032d4: b480 push {r7} - 80032d6: af00 add r7, sp, #0 + 8002c6c: b480 push {r7} + 8002c6e: af00 add r7, sp, #0 return uwTick; - 80032d8: 4b02 ldr r3, [pc, #8] @ (80032e4 ) - 80032da: 681b ldr r3, [r3, #0] + 8002c70: 4b02 ldr r3, [pc, #8] @ (8002c7c ) + 8002c72: 681b ldr r3, [r3, #0] } - 80032dc: 4618 mov r0, r3 - 80032de: 46bd mov sp, r7 - 80032e0: bc80 pop {r7} - 80032e2: 4770 bx lr - 80032e4: 200007b0 .word 0x200007b0 + 8002c74: 4618 mov r0, r3 + 8002c76: 46bd mov sp, r7 + 8002c78: bc80 pop {r7} + 8002c7a: 4770 bx lr + 8002c7c: 200006ec .word 0x200006ec -080032e8 : +08002c80 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 80032e8: b580 push {r7, lr} - 80032ea: b084 sub sp, #16 - 80032ec: af00 add r7, sp, #0 - 80032ee: 6078 str r0, [r7, #4] + 8002c80: b580 push {r7, lr} + 8002c82: b084 sub sp, #16 + 8002c84: af00 add r7, sp, #0 + 8002c86: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 80032f0: f7ff fff0 bl 80032d4 - 80032f4: 60b8 str r0, [r7, #8] + 8002c88: f7ff fff0 bl 8002c6c + 8002c8c: 60b8 str r0, [r7, #8] uint32_t wait = Delay; - 80032f6: 687b ldr r3, [r7, #4] - 80032f8: 60fb str r3, [r7, #12] + 8002c8e: 687b ldr r3, [r7, #4] + 8002c90: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 80032fa: 68fb ldr r3, [r7, #12] - 80032fc: f1b3 3fff cmp.w r3, #4294967295 - 8003300: d005 beq.n 800330e + 8002c92: 68fb ldr r3, [r7, #12] + 8002c94: f1b3 3fff cmp.w r3, #4294967295 + 8002c98: d005 beq.n 8002ca6 { wait += (uint32_t)(uwTickFreq); - 8003302: 4b0a ldr r3, [pc, #40] @ (800332c ) - 8003304: 781b ldrb r3, [r3, #0] - 8003306: 461a mov r2, r3 - 8003308: 68fb ldr r3, [r7, #12] - 800330a: 4413 add r3, r2 - 800330c: 60fb str r3, [r7, #12] + 8002c9a: 4b0a ldr r3, [pc, #40] @ (8002cc4 ) + 8002c9c: 781b ldrb r3, [r3, #0] + 8002c9e: 461a mov r2, r3 + 8002ca0: 68fb ldr r3, [r7, #12] + 8002ca2: 4413 add r3, r2 + 8002ca4: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) - 800330e: bf00 nop - 8003310: f7ff ffe0 bl 80032d4 - 8003314: 4602 mov r2, r0 - 8003316: 68bb ldr r3, [r7, #8] - 8003318: 1ad3 subs r3, r2, r3 - 800331a: 68fa ldr r2, [r7, #12] - 800331c: 429a cmp r2, r3 - 800331e: d8f7 bhi.n 8003310 + 8002ca6: bf00 nop + 8002ca8: f7ff ffe0 bl 8002c6c + 8002cac: 4602 mov r2, r0 + 8002cae: 68bb ldr r3, [r7, #8] + 8002cb0: 1ad3 subs r3, r2, r3 + 8002cb2: 68fa ldr r2, [r7, #12] + 8002cb4: 429a cmp r2, r3 + 8002cb6: d8f7 bhi.n 8002ca8 { } } - 8003320: bf00 nop - 8003322: bf00 nop - 8003324: 3710 adds r7, #16 - 8003326: 46bd mov sp, r7 - 8003328: bd80 pop {r7, pc} - 800332a: bf00 nop - 800332c: 2000002c .word 0x2000002c + 8002cb8: bf00 nop + 8002cba: bf00 nop + 8002cbc: 3710 adds r7, #16 + 8002cbe: 46bd mov sp, r7 + 8002cc0: bd80 pop {r7, pc} + 8002cc2: bf00 nop + 8002cc4: 20000020 .word 0x20000020 -08003330 : +08002cc8 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { - 8003330: b580 push {r7, lr} - 8003332: b086 sub sp, #24 - 8003334: af00 add r7, sp, #0 - 8003336: 6078 str r0, [r7, #4] + 8002cc8: b580 push {r7, lr} + 8002cca: b086 sub sp, #24 + 8002ccc: af00 add r7, sp, #0 + 8002cce: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8003338: 2300 movs r3, #0 - 800333a: 75fb strb r3, [r7, #23] + 8002cd0: 2300 movs r3, #0 + 8002cd2: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; - 800333c: 2300 movs r3, #0 - 800333e: 613b str r3, [r7, #16] + 8002cd4: 2300 movs r3, #0 + 8002cd6: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; - 8003340: 2300 movs r3, #0 - 8003342: 60bb str r3, [r7, #8] + 8002cd8: 2300 movs r3, #0 + 8002cda: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; - 8003344: 2300 movs r3, #0 - 8003346: 60fb str r3, [r7, #12] + 8002cdc: 2300 movs r3, #0 + 8002cde: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) - 8003348: 687b ldr r3, [r7, #4] - 800334a: 2b00 cmp r3, #0 - 800334c: d101 bne.n 8003352 + 8002ce0: 687b ldr r3, [r7, #4] + 8002ce2: 2b00 cmp r3, #0 + 8002ce4: d101 bne.n 8002cea { return HAL_ERROR; - 800334e: 2301 movs r3, #1 - 8003350: e0be b.n 80034d0 + 8002ce6: 2301 movs r3, #1 + 8002ce8: e0be b.n 8002e68 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) - 8003352: 687b ldr r3, [r7, #4] - 8003354: 689b ldr r3, [r3, #8] - 8003356: 2b00 cmp r3, #0 + 8002cea: 687b ldr r3, [r7, #4] + 8002cec: 689b ldr r3, [r3, #8] + 8002cee: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) - 8003358: 687b ldr r3, [r7, #4] - 800335a: 6a9b ldr r3, [r3, #40] @ 0x28 - 800335c: 2b00 cmp r3, #0 - 800335e: d109 bne.n 8003374 + 8002cf0: 687b ldr r3, [r7, #4] + 8002cf2: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002cf4: 2b00 cmp r3, #0 + 8002cf6: d109 bne.n 8002d0c { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); - 8003360: 687b ldr r3, [r7, #4] - 8003362: 2200 movs r2, #0 - 8003364: 62da str r2, [r3, #44] @ 0x2c + 8002cf8: 687b ldr r3, [r7, #4] + 8002cfa: 2200 movs r2, #0 + 8002cfc: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; - 8003366: 687b ldr r3, [r7, #4] - 8003368: 2200 movs r2, #0 - 800336a: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 8002cfe: 687b ldr r3, [r7, #4] + 8002d00: 2200 movs r2, #0 + 8002d02: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); - 800336e: 6878 ldr r0, [r7, #4] - 8003370: f7fe fc1e bl 8001bb0 + 8002d06: 6878 ldr r0, [r7, #4] + 8002d08: f7fe fe3c bl 8001984 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); - 8003374: 6878 ldr r0, [r7, #4] - 8003376: f000 faf5 bl 8003964 - 800337a: 4603 mov r3, r0 - 800337c: 75fb strb r3, [r7, #23] + 8002d0c: 6878 ldr r0, [r7, #4] + 8002d0e: f000 f9ab bl 8003068 + 8002d12: 4603 mov r3, r0 + 8002d14: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && - 800337e: 687b ldr r3, [r7, #4] - 8003380: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003382: f003 0310 and.w r3, r3, #16 - 8003386: 2b00 cmp r3, #0 - 8003388: f040 8099 bne.w 80034be - 800338c: 7dfb ldrb r3, [r7, #23] - 800338e: 2b00 cmp r3, #0 - 8003390: f040 8095 bne.w 80034be + 8002d16: 687b ldr r3, [r7, #4] + 8002d18: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002d1a: f003 0310 and.w r3, r3, #16 + 8002d1e: 2b00 cmp r3, #0 + 8002d20: f040 8099 bne.w 8002e56 + 8002d24: 7dfb ldrb r3, [r7, #23] + 8002d26: 2b00 cmp r3, #0 + 8002d28: f040 8095 bne.w 8002e56 (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8003394: 687b ldr r3, [r7, #4] - 8003396: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003398: f423 5388 bic.w r3, r3, #4352 @ 0x1100 - 800339c: f023 0302 bic.w r3, r3, #2 - 80033a0: f043 0202 orr.w r2, r3, #2 - 80033a4: 687b ldr r3, [r7, #4] - 80033a6: 629a str r2, [r3, #40] @ 0x28 + 8002d2c: 687b ldr r3, [r7, #4] + 8002d2e: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002d30: f423 5388 bic.w r3, r3, #4352 @ 0x1100 + 8002d34: f023 0302 bic.w r3, r3, #2 + 8002d38: f043 0202 orr.w r2, r3, #2 + 8002d3c: 687b ldr r3, [r7, #4] + 8002d3e: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | - 80033a8: 687b ldr r3, [r7, #4] - 80033aa: 685a ldr r2, [r3, #4] + 8002d40: 687b ldr r3, [r7, #4] + 8002d42: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | - 80033ac: 687b ldr r3, [r7, #4] - 80033ae: 69db ldr r3, [r3, #28] + 8002d44: 687b ldr r3, [r7, #4] + 8002d46: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | - 80033b0: 431a orrs r2, r3 + 8002d48: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); - 80033b2: 687b ldr r3, [r7, #4] - 80033b4: 7b1b ldrb r3, [r3, #12] - 80033b6: 005b lsls r3, r3, #1 + 8002d4a: 687b ldr r3, [r7, #4] + 8002d4c: 7b1b ldrb r3, [r3, #12] + 8002d4e: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | - 80033b8: 4313 orrs r3, r2 + 8002d50: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | - 80033ba: 68ba ldr r2, [r7, #8] - 80033bc: 4313 orrs r3, r2 - 80033be: 60bb str r3, [r7, #8] + 8002d52: 68ba ldr r2, [r7, #8] + 8002d54: 4313 orrs r3, r2 + 8002d56: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); - 80033c0: 687b ldr r3, [r7, #4] - 80033c2: 689b ldr r3, [r3, #8] - 80033c4: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 80033c8: d003 beq.n 80033d2 - 80033ca: 687b ldr r3, [r7, #4] - 80033cc: 689b ldr r3, [r3, #8] - 80033ce: 2b01 cmp r3, #1 - 80033d0: d102 bne.n 80033d8 - 80033d2: f44f 7380 mov.w r3, #256 @ 0x100 - 80033d6: e000 b.n 80033da - 80033d8: 2300 movs r3, #0 - 80033da: 693a ldr r2, [r7, #16] - 80033dc: 4313 orrs r3, r2 - 80033de: 613b str r3, [r7, #16] + 8002d58: 687b ldr r3, [r7, #4] + 8002d5a: 689b ldr r3, [r3, #8] + 8002d5c: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8002d60: d003 beq.n 8002d6a + 8002d62: 687b ldr r3, [r7, #4] + 8002d64: 689b ldr r3, [r3, #8] + 8002d66: 2b01 cmp r3, #1 + 8002d68: d102 bne.n 8002d70 + 8002d6a: f44f 7380 mov.w r3, #256 @ 0x100 + 8002d6e: e000 b.n 8002d72 + 8002d70: 2300 movs r3, #0 + 8002d72: 693a ldr r2, [r7, #16] + 8002d74: 4313 orrs r3, r2 + 8002d76: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) - 80033e0: 687b ldr r3, [r7, #4] - 80033e2: 7d1b ldrb r3, [r3, #20] - 80033e4: 2b01 cmp r3, #1 - 80033e6: d119 bne.n 800341c + 8002d78: 687b ldr r3, [r7, #4] + 8002d7a: 7d1b ldrb r3, [r3, #20] + 8002d7c: 2b01 cmp r3, #1 + 8002d7e: d119 bne.n 8002db4 { if (hadc->Init.ContinuousConvMode == DISABLE) - 80033e8: 687b ldr r3, [r7, #4] - 80033ea: 7b1b ldrb r3, [r3, #12] - 80033ec: 2b00 cmp r3, #0 - 80033ee: d109 bne.n 8003404 + 8002d80: 687b ldr r3, [r7, #4] + 8002d82: 7b1b ldrb r3, [r3, #12] + 8002d84: 2b00 cmp r3, #0 + 8002d86: d109 bne.n 8002d9c { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | - 80033f0: 687b ldr r3, [r7, #4] - 80033f2: 699b ldr r3, [r3, #24] - 80033f4: 3b01 subs r3, #1 - 80033f6: 035a lsls r2, r3, #13 - 80033f8: 693b ldr r3, [r7, #16] - 80033fa: 4313 orrs r3, r2 - 80033fc: f443 6300 orr.w r3, r3, #2048 @ 0x800 - 8003400: 613b str r3, [r7, #16] - 8003402: e00b b.n 800341c + 8002d88: 687b ldr r3, [r7, #4] + 8002d8a: 699b ldr r3, [r3, #24] + 8002d8c: 3b01 subs r3, #1 + 8002d8e: 035a lsls r2, r3, #13 + 8002d90: 693b ldr r3, [r7, #16] + 8002d92: 4313 orrs r3, r2 + 8002d94: f443 6300 orr.w r3, r3, #2048 @ 0x800 + 8002d98: 613b str r3, [r7, #16] + 8002d9a: e00b b.n 8002db4 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8003404: 687b ldr r3, [r7, #4] - 8003406: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003408: f043 0220 orr.w r2, r3, #32 - 800340c: 687b ldr r3, [r7, #4] - 800340e: 629a str r2, [r3, #40] @ 0x28 + 8002d9c: 687b ldr r3, [r7, #4] + 8002d9e: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002da0: f043 0220 orr.w r2, r3, #32 + 8002da4: 687b ldr r3, [r7, #4] + 8002da6: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8003410: 687b ldr r3, [r7, #4] - 8003412: 6adb ldr r3, [r3, #44] @ 0x2c - 8003414: f043 0201 orr.w r2, r3, #1 - 8003418: 687b ldr r3, [r7, #4] - 800341a: 62da str r2, [r3, #44] @ 0x2c + 8002da8: 687b ldr r3, [r7, #4] + 8002daa: 6adb ldr r3, [r3, #44] @ 0x2c + 8002dac: f043 0201 orr.w r2, r3, #1 + 8002db0: 687b ldr r3, [r7, #4] + 8002db2: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, - 800341c: 687b ldr r3, [r7, #4] - 800341e: 681b ldr r3, [r3, #0] - 8003420: 685b ldr r3, [r3, #4] - 8003422: f423 4169 bic.w r1, r3, #59648 @ 0xe900 - 8003426: 687b ldr r3, [r7, #4] - 8003428: 681b ldr r3, [r3, #0] - 800342a: 693a ldr r2, [r7, #16] - 800342c: 430a orrs r2, r1 - 800342e: 605a str r2, [r3, #4] + 8002db4: 687b ldr r3, [r7, #4] + 8002db6: 681b ldr r3, [r3, #0] + 8002db8: 685b ldr r3, [r3, #4] + 8002dba: f423 4169 bic.w r1, r3, #59648 @ 0xe900 + 8002dbe: 687b ldr r3, [r7, #4] + 8002dc0: 681b ldr r3, [r3, #0] + 8002dc2: 693a ldr r2, [r7, #16] + 8002dc4: 430a orrs r2, r1 + 8002dc6: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, - 8003430: 687b ldr r3, [r7, #4] - 8003432: 681b ldr r3, [r3, #0] - 8003434: 689a ldr r2, [r3, #8] - 8003436: 4b28 ldr r3, [pc, #160] @ (80034d8 ) - 8003438: 4013 ands r3, r2 - 800343a: 687a ldr r2, [r7, #4] - 800343c: 6812 ldr r2, [r2, #0] - 800343e: 68b9 ldr r1, [r7, #8] - 8003440: 430b orrs r3, r1 - 8003442: 6093 str r3, [r2, #8] + 8002dc8: 687b ldr r3, [r7, #4] + 8002dca: 681b ldr r3, [r3, #0] + 8002dcc: 689a ldr r2, [r3, #8] + 8002dce: 4b28 ldr r3, [pc, #160] @ (8002e70 ) + 8002dd0: 4013 ands r3, r2 + 8002dd2: 687a ldr r2, [r7, #4] + 8002dd4: 6812 ldr r2, [r2, #0] + 8002dd6: 68b9 ldr r1, [r7, #8] + 8002dd8: 430b orrs r3, r1 + 8002dda: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) - 8003444: 687b ldr r3, [r7, #4] - 8003446: 689b ldr r3, [r3, #8] - 8003448: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 800344c: d003 beq.n 8003456 - 800344e: 687b ldr r3, [r7, #4] - 8003450: 689b ldr r3, [r3, #8] - 8003452: 2b01 cmp r3, #1 - 8003454: d104 bne.n 8003460 + 8002ddc: 687b ldr r3, [r7, #4] + 8002dde: 689b ldr r3, [r3, #8] + 8002de0: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8002de4: d003 beq.n 8002dee + 8002de6: 687b ldr r3, [r7, #4] + 8002de8: 689b ldr r3, [r3, #8] + 8002dea: 2b01 cmp r3, #1 + 8002dec: d104 bne.n 8002df8 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); - 8003456: 687b ldr r3, [r7, #4] - 8003458: 691b ldr r3, [r3, #16] - 800345a: 3b01 subs r3, #1 - 800345c: 051b lsls r3, r3, #20 - 800345e: 60fb str r3, [r7, #12] + 8002dee: 687b ldr r3, [r7, #4] + 8002df0: 691b ldr r3, [r3, #16] + 8002df2: 3b01 subs r3, #1 + 8002df4: 051b lsls r3, r3, #20 + 8002df6: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, - 8003460: 687b ldr r3, [r7, #4] - 8003462: 681b ldr r3, [r3, #0] - 8003464: 6adb ldr r3, [r3, #44] @ 0x2c - 8003466: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 - 800346a: 687b ldr r3, [r7, #4] - 800346c: 681b ldr r3, [r3, #0] - 800346e: 68fa ldr r2, [r7, #12] - 8003470: 430a orrs r2, r1 - 8003472: 62da str r2, [r3, #44] @ 0x2c + 8002df8: 687b ldr r3, [r7, #4] + 8002dfa: 681b ldr r3, [r3, #0] + 8002dfc: 6adb ldr r3, [r3, #44] @ 0x2c + 8002dfe: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 + 8002e02: 687b ldr r3, [r7, #4] + 8002e04: 681b ldr r3, [r3, #0] + 8002e06: 68fa ldr r2, [r7, #12] + 8002e08: 430a orrs r2, r1 + 8002e0a: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 8003474: 687b ldr r3, [r7, #4] - 8003476: 681b ldr r3, [r3, #0] - 8003478: 689a ldr r2, [r3, #8] - 800347a: 4b18 ldr r3, [pc, #96] @ (80034dc ) - 800347c: 4013 ands r3, r2 - 800347e: 68ba ldr r2, [r7, #8] - 8003480: 429a cmp r2, r3 - 8003482: d10b bne.n 800349c + 8002e0c: 687b ldr r3, [r7, #4] + 8002e0e: 681b ldr r3, [r3, #0] + 8002e10: 689a ldr r2, [r3, #8] + 8002e12: 4b18 ldr r3, [pc, #96] @ (8002e74 ) + 8002e14: 4013 ands r3, r2 + 8002e16: 68ba ldr r2, [r7, #8] + 8002e18: 429a cmp r2, r3 + 8002e1a: d10b bne.n 8002e34 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); - 8003484: 687b ldr r3, [r7, #4] - 8003486: 2200 movs r2, #0 - 8003488: 62da str r2, [r3, #44] @ 0x2c + 8002e1c: 687b ldr r3, [r7, #4] + 8002e1e: 2200 movs r2, #0 + 8002e20: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, - 800348a: 687b ldr r3, [r7, #4] - 800348c: 6a9b ldr r3, [r3, #40] @ 0x28 - 800348e: f023 0303 bic.w r3, r3, #3 - 8003492: f043 0201 orr.w r2, r3, #1 - 8003496: 687b ldr r3, [r7, #4] - 8003498: 629a str r2, [r3, #40] @ 0x28 + 8002e22: 687b ldr r3, [r7, #4] + 8002e24: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002e26: f023 0303 bic.w r3, r3, #3 + 8002e2a: f043 0201 orr.w r2, r3, #1 + 8002e2e: 687b ldr r3, [r7, #4] + 8002e30: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 800349a: e018 b.n 80034ce + 8002e32: e018 b.n 8002e66 HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, - 800349c: 687b ldr r3, [r7, #4] - 800349e: 6a9b ldr r3, [r3, #40] @ 0x28 - 80034a0: f023 0312 bic.w r3, r3, #18 - 80034a4: f043 0210 orr.w r2, r3, #16 - 80034a8: 687b ldr r3, [r7, #4] - 80034aa: 629a str r2, [r3, #40] @ 0x28 + 8002e34: 687b ldr r3, [r7, #4] + 8002e36: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002e38: f023 0312 bic.w r3, r3, #18 + 8002e3c: f043 0210 orr.w r2, r3, #16 + 8002e40: 687b ldr r3, [r7, #4] + 8002e42: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80034ac: 687b ldr r3, [r7, #4] - 80034ae: 6adb ldr r3, [r3, #44] @ 0x2c - 80034b0: f043 0201 orr.w r2, r3, #1 - 80034b4: 687b ldr r3, [r7, #4] - 80034b6: 62da str r2, [r3, #44] @ 0x2c + 8002e44: 687b ldr r3, [r7, #4] + 8002e46: 6adb ldr r3, [r3, #44] @ 0x2c + 8002e48: f043 0201 orr.w r2, r3, #1 + 8002e4c: 687b ldr r3, [r7, #4] + 8002e4e: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; - 80034b8: 2301 movs r3, #1 - 80034ba: 75fb strb r3, [r7, #23] + 8002e50: 2301 movs r3, #1 + 8002e52: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 80034bc: e007 b.n 80034ce + 8002e54: e007 b.n 8002e66 } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80034be: 687b ldr r3, [r7, #4] - 80034c0: 6a9b ldr r3, [r3, #40] @ 0x28 - 80034c2: f043 0210 orr.w r2, r3, #16 - 80034c6: 687b ldr r3, [r7, #4] - 80034c8: 629a str r2, [r3, #40] @ 0x28 + 8002e56: 687b ldr r3, [r7, #4] + 8002e58: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002e5a: f043 0210 orr.w r2, r3, #16 + 8002e5e: 687b ldr r3, [r7, #4] + 8002e60: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; - 80034ca: 2301 movs r3, #1 - 80034cc: 75fb strb r3, [r7, #23] + 8002e62: 2301 movs r3, #1 + 8002e64: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; - 80034ce: 7dfb ldrb r3, [r7, #23] + 8002e66: 7dfb ldrb r3, [r7, #23] } - 80034d0: 4618 mov r0, r3 - 80034d2: 3718 adds r7, #24 - 80034d4: 46bd mov sp, r7 - 80034d6: bd80 pop {r7, pc} - 80034d8: ffe1f7fd .word 0xffe1f7fd - 80034dc: ff1f0efe .word 0xff1f0efe + 8002e68: 4618 mov r0, r3 + 8002e6a: 3718 adds r7, #24 + 8002e6c: 46bd mov sp, r7 + 8002e6e: bd80 pop {r7, pc} + 8002e70: ffe1f7fd .word 0xffe1f7fd + 8002e74: ff1f0efe .word 0xff1f0efe -080034e0 : - * @param pData: The destination Buffer address. - * @param Length: The length of data to be transferred from ADC peripheral to memory. - * @retval None - */ -HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) -{ - 80034e0: b580 push {r7, lr} - 80034e2: b086 sub sp, #24 - 80034e4: af00 add r7, sp, #0 - 80034e6: 60f8 str r0, [r7, #12] - 80034e8: 60b9 str r1, [r7, #8] - 80034ea: 607a str r2, [r7, #4] - HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 80034ec: 2300 movs r3, #0 - 80034ee: 75fb strb r3, [r7, #23] - assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance)); - - /* Verification if multimode is disabled (for devices with several ADC) */ - /* If multimode is enabled, dedicated function multimode conversion */ - /* start DMA must be used. */ - if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET) - 80034f0: 68fb ldr r3, [r7, #12] - 80034f2: 681b ldr r3, [r3, #0] - 80034f4: 4a64 ldr r2, [pc, #400] @ (8003688 ) - 80034f6: 4293 cmp r3, r2 - 80034f8: d004 beq.n 8003504 - 80034fa: 68fb ldr r3, [r7, #12] - 80034fc: 681b ldr r3, [r3, #0] - 80034fe: 4a63 ldr r2, [pc, #396] @ (800368c ) - 8003500: 4293 cmp r3, r2 - 8003502: d106 bne.n 8003512 - 8003504: 4b60 ldr r3, [pc, #384] @ (8003688 ) - 8003506: 685b ldr r3, [r3, #4] - 8003508: f403 2370 and.w r3, r3, #983040 @ 0xf0000 - 800350c: 2b00 cmp r3, #0 - 800350e: f040 80b3 bne.w 8003678 - { - /* Process locked */ - __HAL_LOCK(hadc); - 8003512: 68fb ldr r3, [r7, #12] - 8003514: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 - 8003518: 2b01 cmp r3, #1 - 800351a: d101 bne.n 8003520 - 800351c: 2302 movs r3, #2 - 800351e: e0ae b.n 800367e - 8003520: 68fb ldr r3, [r7, #12] - 8003522: 2201 movs r2, #1 - 8003524: f883 2024 strb.w r2, [r3, #36] @ 0x24 - - /* Enable the ADC peripheral */ - tmp_hal_status = ADC_Enable(hadc); - 8003528: 68f8 ldr r0, [r7, #12] - 800352a: f000 f9c1 bl 80038b0 - 800352e: 4603 mov r3, r0 - 8003530: 75fb strb r3, [r7, #23] - - /* Start conversion if ADC is effectively enabled */ - if (tmp_hal_status == HAL_OK) - 8003532: 7dfb ldrb r3, [r7, #23] - 8003534: 2b00 cmp r3, #0 - 8003536: f040 809a bne.w 800366e - { - /* Set ADC state */ - /* - Clear state bitfield related to regular group conversion results */ - /* - Set state bitfield related to regular operation */ - ADC_STATE_CLR_SET(hadc->State, - 800353a: 68fb ldr r3, [r7, #12] - 800353c: 6a9b ldr r3, [r3, #40] @ 0x28 - 800353e: f423 6370 bic.w r3, r3, #3840 @ 0xf00 - 8003542: f023 0301 bic.w r3, r3, #1 - 8003546: f443 7280 orr.w r2, r3, #256 @ 0x100 - 800354a: 68fb ldr r3, [r7, #12] - 800354c: 629a str r2, [r3, #40] @ 0x28 - HAL_ADC_STATE_REG_BUSY); - - /* Set group injected state (from auto-injection) and multimode state */ - /* for all cases of multimode: independent mode, multimode ADC master */ - /* or multimode ADC slave (for devices with several ADCs): */ - if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) - 800354e: 68fb ldr r3, [r7, #12] - 8003550: 681b ldr r3, [r3, #0] - 8003552: 4a4e ldr r2, [pc, #312] @ (800368c ) - 8003554: 4293 cmp r3, r2 - 8003556: d105 bne.n 8003564 - 8003558: 4b4b ldr r3, [pc, #300] @ (8003688 ) - 800355a: 685b ldr r3, [r3, #4] - 800355c: f403 2370 and.w r3, r3, #983040 @ 0xf0000 - 8003560: 2b00 cmp r3, #0 - 8003562: d115 bne.n 8003590 - { - /* Set ADC state (ADC independent or master) */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - 8003564: 68fb ldr r3, [r7, #12] - 8003566: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003568: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 - 800356c: 68fb ldr r3, [r7, #12] - 800356e: 629a str r2, [r3, #40] @ 0x28 - - /* If conversions on group regular are also triggering group injected, */ - /* update ADC state. */ - if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) - 8003570: 68fb ldr r3, [r7, #12] - 8003572: 681b ldr r3, [r3, #0] - 8003574: 685b ldr r3, [r3, #4] - 8003576: f403 6380 and.w r3, r3, #1024 @ 0x400 - 800357a: 2b00 cmp r3, #0 - 800357c: d026 beq.n 80035cc - { - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - 800357e: 68fb ldr r3, [r7, #12] - 8003580: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003582: f423 5340 bic.w r3, r3, #12288 @ 0x3000 - 8003586: f443 5280 orr.w r2, r3, #4096 @ 0x1000 - 800358a: 68fb ldr r3, [r7, #12] - 800358c: 629a str r2, [r3, #40] @ 0x28 - if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) - 800358e: e01d b.n 80035cc - } - } - else - { - /* Set ADC state (ADC slave) */ - SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - 8003590: 68fb ldr r3, [r7, #12] - 8003592: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003594: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 - 8003598: 68fb ldr r3, [r7, #12] - 800359a: 629a str r2, [r3, #40] @ 0x28 - - /* If conversions on group regular are also triggering group injected, */ - /* update ADC state. */ - if (ADC_MULTIMODE_AUTO_INJECTED(hadc)) - 800359c: 68fb ldr r3, [r7, #12] - 800359e: 681b ldr r3, [r3, #0] - 80035a0: 4a39 ldr r2, [pc, #228] @ (8003688 ) - 80035a2: 4293 cmp r3, r2 - 80035a4: d004 beq.n 80035b0 - 80035a6: 68fb ldr r3, [r7, #12] - 80035a8: 681b ldr r3, [r3, #0] - 80035aa: 4a38 ldr r2, [pc, #224] @ (800368c ) - 80035ac: 4293 cmp r3, r2 - 80035ae: d10d bne.n 80035cc - 80035b0: 4b35 ldr r3, [pc, #212] @ (8003688 ) - 80035b2: 685b ldr r3, [r3, #4] - 80035b4: f403 6380 and.w r3, r3, #1024 @ 0x400 - 80035b8: 2b00 cmp r3, #0 - 80035ba: d007 beq.n 80035cc - { - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - 80035bc: 68fb ldr r3, [r7, #12] - 80035be: 6a9b ldr r3, [r3, #40] @ 0x28 - 80035c0: f423 5340 bic.w r3, r3, #12288 @ 0x3000 - 80035c4: f443 5280 orr.w r2, r3, #4096 @ 0x1000 - 80035c8: 68fb ldr r3, [r7, #12] - 80035ca: 629a str r2, [r3, #40] @ 0x28 - } - } - - /* State machine update: Check if an injected conversion is ongoing */ - if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - 80035cc: 68fb ldr r3, [r7, #12] - 80035ce: 6a9b ldr r3, [r3, #40] @ 0x28 - 80035d0: f403 5380 and.w r3, r3, #4096 @ 0x1000 - 80035d4: 2b00 cmp r3, #0 - 80035d6: d006 beq.n 80035e6 - { - /* Reset ADC error code fields related to conversions on group regular */ - CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); - 80035d8: 68fb ldr r3, [r7, #12] - 80035da: 6adb ldr r3, [r3, #44] @ 0x2c - 80035dc: f023 0206 bic.w r2, r3, #6 - 80035e0: 68fb ldr r3, [r7, #12] - 80035e2: 62da str r2, [r3, #44] @ 0x2c - 80035e4: e002 b.n 80035ec - } - else - { - /* Reset ADC all error code fields */ - ADC_CLEAR_ERRORCODE(hadc); - 80035e6: 68fb ldr r3, [r7, #12] - 80035e8: 2200 movs r2, #0 - 80035ea: 62da str r2, [r3, #44] @ 0x2c - } - - /* Process unlocked */ - /* Unlock before starting ADC conversions: in case of potential */ - /* interruption, to let the process to ADC IRQ Handler. */ - __HAL_UNLOCK(hadc); - 80035ec: 68fb ldr r3, [r7, #12] - 80035ee: 2200 movs r2, #0 - 80035f0: f883 2024 strb.w r2, [r3, #36] @ 0x24 - - /* Set the DMA transfer complete callback */ - hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; - 80035f4: 68fb ldr r3, [r7, #12] - 80035f6: 6a1b ldr r3, [r3, #32] - 80035f8: 4a25 ldr r2, [pc, #148] @ (8003690 ) - 80035fa: 629a str r2, [r3, #40] @ 0x28 - - /* Set the DMA half transfer complete callback */ - hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; - 80035fc: 68fb ldr r3, [r7, #12] - 80035fe: 6a1b ldr r3, [r3, #32] - 8003600: 4a24 ldr r2, [pc, #144] @ (8003694 ) - 8003602: 62da str r2, [r3, #44] @ 0x2c - - /* Set the DMA error callback */ - hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; - 8003604: 68fb ldr r3, [r7, #12] - 8003606: 6a1b ldr r3, [r3, #32] - 8003608: 4a23 ldr r2, [pc, #140] @ (8003698 ) - 800360a: 631a str r2, [r3, #48] @ 0x30 - /* start (in case of SW start): */ - - /* Clear regular group conversion flag and overrun flag */ - /* (To ensure of no unknown state from potential previous ADC */ - /* operations) */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); - 800360c: 68fb ldr r3, [r7, #12] - 800360e: 681b ldr r3, [r3, #0] - 8003610: f06f 0202 mvn.w r2, #2 - 8003614: 601a str r2, [r3, #0] - - /* Enable ADC DMA mode */ - SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA); - 8003616: 68fb ldr r3, [r7, #12] - 8003618: 681b ldr r3, [r3, #0] - 800361a: 689a ldr r2, [r3, #8] - 800361c: 68fb ldr r3, [r7, #12] - 800361e: 681b ldr r3, [r3, #0] - 8003620: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003624: 609a str r2, [r3, #8] - - /* Start the DMA channel */ - HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); - 8003626: 68fb ldr r3, [r7, #12] - 8003628: 6a18 ldr r0, [r3, #32] - 800362a: 68fb ldr r3, [r7, #12] - 800362c: 681b ldr r3, [r3, #0] - 800362e: 334c adds r3, #76 @ 0x4c - 8003630: 4619 mov r1, r3 - 8003632: 68ba ldr r2, [r7, #8] - 8003634: 687b ldr r3, [r7, #4] - 8003636: f000 fc53 bl 8003ee0 - - /* Enable conversion of regular group. */ - /* If software start has been selected, conversion starts immediately. */ - /* If external trigger has been selected, conversion will start at next */ - /* trigger event. */ - if (ADC_IS_SOFTWARE_START_REGULAR(hadc)) - 800363a: 68fb ldr r3, [r7, #12] - 800363c: 681b ldr r3, [r3, #0] - 800363e: 689b ldr r3, [r3, #8] - 8003640: f403 2360 and.w r3, r3, #917504 @ 0xe0000 - 8003644: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 - 8003648: d108 bne.n 800365c - { - /* Start ADC conversion on regular group with SW start */ - SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG)); - 800364a: 68fb ldr r3, [r7, #12] - 800364c: 681b ldr r3, [r3, #0] - 800364e: 689a ldr r2, [r3, #8] - 8003650: 68fb ldr r3, [r7, #12] - 8003652: 681b ldr r3, [r3, #0] - 8003654: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000 - 8003658: 609a str r2, [r3, #8] - if (tmp_hal_status == HAL_OK) - 800365a: e00f b.n 800367c - } - else - { - /* Start ADC conversion on regular group with external trigger */ - SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG); - 800365c: 68fb ldr r3, [r7, #12] - 800365e: 681b ldr r3, [r3, #0] - 8003660: 689a ldr r2, [r3, #8] - 8003662: 68fb ldr r3, [r7, #12] - 8003664: 681b ldr r3, [r3, #0] - 8003666: f442 1280 orr.w r2, r2, #1048576 @ 0x100000 - 800366a: 609a str r2, [r3, #8] - if (tmp_hal_status == HAL_OK) - 800366c: e006 b.n 800367c - } - } - else - { - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 800366e: 68fb ldr r3, [r7, #12] - 8003670: 2200 movs r2, #0 - 8003672: f883 2024 strb.w r2, [r3, #36] @ 0x24 - if (tmp_hal_status == HAL_OK) - 8003676: e001 b.n 800367c - } - } - else - { - tmp_hal_status = HAL_ERROR; - 8003678: 2301 movs r3, #1 - 800367a: 75fb strb r3, [r7, #23] - } - - /* Return function status */ - return tmp_hal_status; - 800367c: 7dfb ldrb r3, [r7, #23] -} - 800367e: 4618 mov r0, r3 - 8003680: 3718 adds r7, #24 - 8003682: 46bd mov sp, r7 - 8003684: bd80 pop {r7, pc} - 8003686: bf00 nop - 8003688: 40012400 .word 0x40012400 - 800368c: 40012800 .word 0x40012800 - 8003690: 080039e7 .word 0x080039e7 - 8003694: 08003a63 .word 0x08003a63 - 8003698: 08003a7f .word 0x08003a7f - -0800369c : - * @brief Conversion DMA half-transfer callback in non blocking mode - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) -{ - 800369c: b480 push {r7} - 800369e: b083 sub sp, #12 - 80036a0: af00 add r7, sp, #0 - 80036a2: 6078 str r0, [r7, #4] - /* Prevent unused argument(s) compilation warning */ - UNUSED(hadc); - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. - */ -} - 80036a4: bf00 nop - 80036a6: 370c adds r7, #12 - 80036a8: 46bd mov sp, r7 - 80036aa: bc80 pop {r7} - 80036ac: 4770 bx lr - -080036ae : - * (ADC conversion with interruption or transfer by DMA) - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) -{ - 80036ae: b480 push {r7} - 80036b0: b083 sub sp, #12 - 80036b2: af00 add r7, sp, #0 - 80036b4: 6078 str r0, [r7, #4] - /* Prevent unused argument(s) compilation warning */ - UNUSED(hadc); - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_ErrorCallback must be implemented in the user file. - */ -} - 80036b6: bf00 nop - 80036b8: 370c adds r7, #12 - 80036ba: 46bd mov sp, r7 - 80036bc: bc80 pop {r7} - 80036be: 4770 bx lr - -080036c0 : +08002e78 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { - 80036c0: b480 push {r7} - 80036c2: b085 sub sp, #20 - 80036c4: af00 add r7, sp, #0 - 80036c6: 6078 str r0, [r7, #4] - 80036c8: 6039 str r1, [r7, #0] + 8002e78: b480 push {r7} + 8002e7a: b085 sub sp, #20 + 8002e7c: af00 add r7, sp, #0 + 8002e7e: 6078 str r0, [r7, #4] + 8002e80: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 80036ca: 2300 movs r3, #0 - 80036cc: 73fb strb r3, [r7, #15] + 8002e82: 2300 movs r3, #0 + 8002e84: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; - 80036ce: 2300 movs r3, #0 - 80036d0: 60bb str r3, [r7, #8] + 8002e86: 2300 movs r3, #0 + 8002e88: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); - 80036d2: 687b ldr r3, [r7, #4] - 80036d4: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 - 80036d8: 2b01 cmp r3, #1 - 80036da: d101 bne.n 80036e0 - 80036dc: 2302 movs r3, #2 - 80036de: e0dc b.n 800389a - 80036e0: 687b ldr r3, [r7, #4] - 80036e2: 2201 movs r2, #1 - 80036e4: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 8002e8a: 687b ldr r3, [r7, #4] + 8002e8c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 + 8002e90: 2b01 cmp r3, #1 + 8002e92: d101 bne.n 8002e98 + 8002e94: 2302 movs r3, #2 + 8002e96: e0dc b.n 8003052 + 8002e98: 687b ldr r3, [r7, #4] + 8002e9a: 2201 movs r2, #1 + 8002e9c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) - 80036e8: 683b ldr r3, [r7, #0] - 80036ea: 685b ldr r3, [r3, #4] - 80036ec: 2b06 cmp r3, #6 - 80036ee: d81c bhi.n 800372a + 8002ea0: 683b ldr r3, [r7, #0] + 8002ea2: 685b ldr r3, [r3, #4] + 8002ea4: 2b06 cmp r3, #6 + 8002ea6: d81c bhi.n 8002ee2 { MODIFY_REG(hadc->Instance->SQR3 , - 80036f0: 687b ldr r3, [r7, #4] - 80036f2: 681b ldr r3, [r3, #0] - 80036f4: 6b59 ldr r1, [r3, #52] @ 0x34 - 80036f6: 683b ldr r3, [r7, #0] - 80036f8: 685a ldr r2, [r3, #4] - 80036fa: 4613 mov r3, r2 - 80036fc: 009b lsls r3, r3, #2 - 80036fe: 4413 add r3, r2 - 8003700: 3b05 subs r3, #5 - 8003702: 221f movs r2, #31 - 8003704: fa02 f303 lsl.w r3, r2, r3 - 8003708: 43db mvns r3, r3 - 800370a: 4019 ands r1, r3 - 800370c: 683b ldr r3, [r7, #0] - 800370e: 6818 ldr r0, [r3, #0] - 8003710: 683b ldr r3, [r7, #0] - 8003712: 685a ldr r2, [r3, #4] - 8003714: 4613 mov r3, r2 - 8003716: 009b lsls r3, r3, #2 - 8003718: 4413 add r3, r2 - 800371a: 3b05 subs r3, #5 - 800371c: fa00 f203 lsl.w r2, r0, r3 - 8003720: 687b ldr r3, [r7, #4] - 8003722: 681b ldr r3, [r3, #0] - 8003724: 430a orrs r2, r1 - 8003726: 635a str r2, [r3, #52] @ 0x34 - 8003728: e03c b.n 80037a4 + 8002ea8: 687b ldr r3, [r7, #4] + 8002eaa: 681b ldr r3, [r3, #0] + 8002eac: 6b59 ldr r1, [r3, #52] @ 0x34 + 8002eae: 683b ldr r3, [r7, #0] + 8002eb0: 685a ldr r2, [r3, #4] + 8002eb2: 4613 mov r3, r2 + 8002eb4: 009b lsls r3, r3, #2 + 8002eb6: 4413 add r3, r2 + 8002eb8: 3b05 subs r3, #5 + 8002eba: 221f movs r2, #31 + 8002ebc: fa02 f303 lsl.w r3, r2, r3 + 8002ec0: 43db mvns r3, r3 + 8002ec2: 4019 ands r1, r3 + 8002ec4: 683b ldr r3, [r7, #0] + 8002ec6: 6818 ldr r0, [r3, #0] + 8002ec8: 683b ldr r3, [r7, #0] + 8002eca: 685a ldr r2, [r3, #4] + 8002ecc: 4613 mov r3, r2 + 8002ece: 009b lsls r3, r3, #2 + 8002ed0: 4413 add r3, r2 + 8002ed2: 3b05 subs r3, #5 + 8002ed4: fa00 f203 lsl.w r2, r0, r3 + 8002ed8: 687b ldr r3, [r7, #4] + 8002eda: 681b ldr r3, [r3, #0] + 8002edc: 430a orrs r2, r1 + 8002ede: 635a str r2, [r3, #52] @ 0x34 + 8002ee0: e03c b.n 8002f5c ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) - 800372a: 683b ldr r3, [r7, #0] - 800372c: 685b ldr r3, [r3, #4] - 800372e: 2b0c cmp r3, #12 - 8003730: d81c bhi.n 800376c + 8002ee2: 683b ldr r3, [r7, #0] + 8002ee4: 685b ldr r3, [r3, #4] + 8002ee6: 2b0c cmp r3, #12 + 8002ee8: d81c bhi.n 8002f24 { MODIFY_REG(hadc->Instance->SQR2 , - 8003732: 687b ldr r3, [r7, #4] - 8003734: 681b ldr r3, [r3, #0] - 8003736: 6b19 ldr r1, [r3, #48] @ 0x30 - 8003738: 683b ldr r3, [r7, #0] - 800373a: 685a ldr r2, [r3, #4] - 800373c: 4613 mov r3, r2 - 800373e: 009b lsls r3, r3, #2 - 8003740: 4413 add r3, r2 - 8003742: 3b23 subs r3, #35 @ 0x23 - 8003744: 221f movs r2, #31 - 8003746: fa02 f303 lsl.w r3, r2, r3 - 800374a: 43db mvns r3, r3 - 800374c: 4019 ands r1, r3 - 800374e: 683b ldr r3, [r7, #0] - 8003750: 6818 ldr r0, [r3, #0] - 8003752: 683b ldr r3, [r7, #0] - 8003754: 685a ldr r2, [r3, #4] - 8003756: 4613 mov r3, r2 - 8003758: 009b lsls r3, r3, #2 - 800375a: 4413 add r3, r2 - 800375c: 3b23 subs r3, #35 @ 0x23 - 800375e: fa00 f203 lsl.w r2, r0, r3 - 8003762: 687b ldr r3, [r7, #4] - 8003764: 681b ldr r3, [r3, #0] - 8003766: 430a orrs r2, r1 - 8003768: 631a str r2, [r3, #48] @ 0x30 - 800376a: e01b b.n 80037a4 + 8002eea: 687b ldr r3, [r7, #4] + 8002eec: 681b ldr r3, [r3, #0] + 8002eee: 6b19 ldr r1, [r3, #48] @ 0x30 + 8002ef0: 683b ldr r3, [r7, #0] + 8002ef2: 685a ldr r2, [r3, #4] + 8002ef4: 4613 mov r3, r2 + 8002ef6: 009b lsls r3, r3, #2 + 8002ef8: 4413 add r3, r2 + 8002efa: 3b23 subs r3, #35 @ 0x23 + 8002efc: 221f movs r2, #31 + 8002efe: fa02 f303 lsl.w r3, r2, r3 + 8002f02: 43db mvns r3, r3 + 8002f04: 4019 ands r1, r3 + 8002f06: 683b ldr r3, [r7, #0] + 8002f08: 6818 ldr r0, [r3, #0] + 8002f0a: 683b ldr r3, [r7, #0] + 8002f0c: 685a ldr r2, [r3, #4] + 8002f0e: 4613 mov r3, r2 + 8002f10: 009b lsls r3, r3, #2 + 8002f12: 4413 add r3, r2 + 8002f14: 3b23 subs r3, #35 @ 0x23 + 8002f16: fa00 f203 lsl.w r2, r0, r3 + 8002f1a: 687b ldr r3, [r7, #4] + 8002f1c: 681b ldr r3, [r3, #0] + 8002f1e: 430a orrs r2, r1 + 8002f20: 631a str r2, [r3, #48] @ 0x30 + 8002f22: e01b b.n 8002f5c ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , - 800376c: 687b ldr r3, [r7, #4] - 800376e: 681b ldr r3, [r3, #0] - 8003770: 6ad9 ldr r1, [r3, #44] @ 0x2c - 8003772: 683b ldr r3, [r7, #0] - 8003774: 685a ldr r2, [r3, #4] - 8003776: 4613 mov r3, r2 - 8003778: 009b lsls r3, r3, #2 - 800377a: 4413 add r3, r2 - 800377c: 3b41 subs r3, #65 @ 0x41 - 800377e: 221f movs r2, #31 - 8003780: fa02 f303 lsl.w r3, r2, r3 - 8003784: 43db mvns r3, r3 - 8003786: 4019 ands r1, r3 - 8003788: 683b ldr r3, [r7, #0] - 800378a: 6818 ldr r0, [r3, #0] - 800378c: 683b ldr r3, [r7, #0] - 800378e: 685a ldr r2, [r3, #4] - 8003790: 4613 mov r3, r2 - 8003792: 009b lsls r3, r3, #2 - 8003794: 4413 add r3, r2 - 8003796: 3b41 subs r3, #65 @ 0x41 - 8003798: fa00 f203 lsl.w r2, r0, r3 - 800379c: 687b ldr r3, [r7, #4] - 800379e: 681b ldr r3, [r3, #0] - 80037a0: 430a orrs r2, r1 - 80037a2: 62da str r2, [r3, #44] @ 0x2c + 8002f24: 687b ldr r3, [r7, #4] + 8002f26: 681b ldr r3, [r3, #0] + 8002f28: 6ad9 ldr r1, [r3, #44] @ 0x2c + 8002f2a: 683b ldr r3, [r7, #0] + 8002f2c: 685a ldr r2, [r3, #4] + 8002f2e: 4613 mov r3, r2 + 8002f30: 009b lsls r3, r3, #2 + 8002f32: 4413 add r3, r2 + 8002f34: 3b41 subs r3, #65 @ 0x41 + 8002f36: 221f movs r2, #31 + 8002f38: fa02 f303 lsl.w r3, r2, r3 + 8002f3c: 43db mvns r3, r3 + 8002f3e: 4019 ands r1, r3 + 8002f40: 683b ldr r3, [r7, #0] + 8002f42: 6818 ldr r0, [r3, #0] + 8002f44: 683b ldr r3, [r7, #0] + 8002f46: 685a ldr r2, [r3, #4] + 8002f48: 4613 mov r3, r2 + 8002f4a: 009b lsls r3, r3, #2 + 8002f4c: 4413 add r3, r2 + 8002f4e: 3b41 subs r3, #65 @ 0x41 + 8002f50: fa00 f203 lsl.w r2, r0, r3 + 8002f54: 687b ldr r3, [r7, #4] + 8002f56: 681b ldr r3, [r3, #0] + 8002f58: 430a orrs r2, r1 + 8002f5a: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) - 80037a4: 683b ldr r3, [r7, #0] - 80037a6: 681b ldr r3, [r3, #0] - 80037a8: 2b09 cmp r3, #9 - 80037aa: d91c bls.n 80037e6 + 8002f5c: 683b ldr r3, [r7, #0] + 8002f5e: 681b ldr r3, [r3, #0] + 8002f60: 2b09 cmp r3, #9 + 8002f62: d91c bls.n 8002f9e { MODIFY_REG(hadc->Instance->SMPR1 , - 80037ac: 687b ldr r3, [r7, #4] - 80037ae: 681b ldr r3, [r3, #0] - 80037b0: 68d9 ldr r1, [r3, #12] - 80037b2: 683b ldr r3, [r7, #0] - 80037b4: 681a ldr r2, [r3, #0] - 80037b6: 4613 mov r3, r2 - 80037b8: 005b lsls r3, r3, #1 - 80037ba: 4413 add r3, r2 - 80037bc: 3b1e subs r3, #30 - 80037be: 2207 movs r2, #7 - 80037c0: fa02 f303 lsl.w r3, r2, r3 - 80037c4: 43db mvns r3, r3 - 80037c6: 4019 ands r1, r3 - 80037c8: 683b ldr r3, [r7, #0] - 80037ca: 6898 ldr r0, [r3, #8] - 80037cc: 683b ldr r3, [r7, #0] - 80037ce: 681a ldr r2, [r3, #0] - 80037d0: 4613 mov r3, r2 - 80037d2: 005b lsls r3, r3, #1 - 80037d4: 4413 add r3, r2 - 80037d6: 3b1e subs r3, #30 - 80037d8: fa00 f203 lsl.w r2, r0, r3 - 80037dc: 687b ldr r3, [r7, #4] - 80037de: 681b ldr r3, [r3, #0] - 80037e0: 430a orrs r2, r1 - 80037e2: 60da str r2, [r3, #12] - 80037e4: e019 b.n 800381a + 8002f64: 687b ldr r3, [r7, #4] + 8002f66: 681b ldr r3, [r3, #0] + 8002f68: 68d9 ldr r1, [r3, #12] + 8002f6a: 683b ldr r3, [r7, #0] + 8002f6c: 681a ldr r2, [r3, #0] + 8002f6e: 4613 mov r3, r2 + 8002f70: 005b lsls r3, r3, #1 + 8002f72: 4413 add r3, r2 + 8002f74: 3b1e subs r3, #30 + 8002f76: 2207 movs r2, #7 + 8002f78: fa02 f303 lsl.w r3, r2, r3 + 8002f7c: 43db mvns r3, r3 + 8002f7e: 4019 ands r1, r3 + 8002f80: 683b ldr r3, [r7, #0] + 8002f82: 6898 ldr r0, [r3, #8] + 8002f84: 683b ldr r3, [r7, #0] + 8002f86: 681a ldr r2, [r3, #0] + 8002f88: 4613 mov r3, r2 + 8002f8a: 005b lsls r3, r3, #1 + 8002f8c: 4413 add r3, r2 + 8002f8e: 3b1e subs r3, #30 + 8002f90: fa00 f203 lsl.w r2, r0, r3 + 8002f94: 687b ldr r3, [r7, #4] + 8002f96: 681b ldr r3, [r3, #0] + 8002f98: 430a orrs r2, r1 + 8002f9a: 60da str r2, [r3, #12] + 8002f9c: e019 b.n 8002fd2 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , - 80037e6: 687b ldr r3, [r7, #4] - 80037e8: 681b ldr r3, [r3, #0] - 80037ea: 6919 ldr r1, [r3, #16] - 80037ec: 683b ldr r3, [r7, #0] - 80037ee: 681a ldr r2, [r3, #0] - 80037f0: 4613 mov r3, r2 - 80037f2: 005b lsls r3, r3, #1 - 80037f4: 4413 add r3, r2 - 80037f6: 2207 movs r2, #7 - 80037f8: fa02 f303 lsl.w r3, r2, r3 - 80037fc: 43db mvns r3, r3 - 80037fe: 4019 ands r1, r3 - 8003800: 683b ldr r3, [r7, #0] - 8003802: 6898 ldr r0, [r3, #8] - 8003804: 683b ldr r3, [r7, #0] - 8003806: 681a ldr r2, [r3, #0] - 8003808: 4613 mov r3, r2 - 800380a: 005b lsls r3, r3, #1 - 800380c: 4413 add r3, r2 - 800380e: fa00 f203 lsl.w r2, r0, r3 - 8003812: 687b ldr r3, [r7, #4] - 8003814: 681b ldr r3, [r3, #0] - 8003816: 430a orrs r2, r1 - 8003818: 611a str r2, [r3, #16] + 8002f9e: 687b ldr r3, [r7, #4] + 8002fa0: 681b ldr r3, [r3, #0] + 8002fa2: 6919 ldr r1, [r3, #16] + 8002fa4: 683b ldr r3, [r7, #0] + 8002fa6: 681a ldr r2, [r3, #0] + 8002fa8: 4613 mov r3, r2 + 8002faa: 005b lsls r3, r3, #1 + 8002fac: 4413 add r3, r2 + 8002fae: 2207 movs r2, #7 + 8002fb0: fa02 f303 lsl.w r3, r2, r3 + 8002fb4: 43db mvns r3, r3 + 8002fb6: 4019 ands r1, r3 + 8002fb8: 683b ldr r3, [r7, #0] + 8002fba: 6898 ldr r0, [r3, #8] + 8002fbc: 683b ldr r3, [r7, #0] + 8002fbe: 681a ldr r2, [r3, #0] + 8002fc0: 4613 mov r3, r2 + 8002fc2: 005b lsls r3, r3, #1 + 8002fc4: 4413 add r3, r2 + 8002fc6: fa00 f203 lsl.w r2, r0, r3 + 8002fca: 687b ldr r3, [r7, #4] + 8002fcc: 681b ldr r3, [r3, #0] + 8002fce: 430a orrs r2, r1 + 8002fd0: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 800381a: 683b ldr r3, [r7, #0] - 800381c: 681b ldr r3, [r3, #0] - 800381e: 2b10 cmp r3, #16 - 8003820: d003 beq.n 800382a + 8002fd2: 683b ldr r3, [r7, #0] + 8002fd4: 681b ldr r3, [r3, #0] + 8002fd6: 2b10 cmp r3, #16 + 8002fd8: d003 beq.n 8002fe2 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) - 8003822: 683b ldr r3, [r7, #0] - 8003824: 681b ldr r3, [r3, #0] + 8002fda: 683b ldr r3, [r7, #0] + 8002fdc: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 8003826: 2b11 cmp r3, #17 - 8003828: d132 bne.n 8003890 + 8002fde: 2b11 cmp r3, #17 + 8002fe0: d132 bne.n 8003048 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) - 800382a: 687b ldr r3, [r7, #4] - 800382c: 681b ldr r3, [r3, #0] - 800382e: 4a1d ldr r2, [pc, #116] @ (80038a4 ) - 8003830: 4293 cmp r3, r2 - 8003832: d125 bne.n 8003880 + 8002fe2: 687b ldr r3, [r7, #4] + 8002fe4: 681b ldr r3, [r3, #0] + 8002fe6: 4a1d ldr r2, [pc, #116] @ (800305c ) + 8002fe8: 4293 cmp r3, r2 + 8002fea: d125 bne.n 8003038 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) - 8003834: 687b ldr r3, [r7, #4] - 8003836: 681b ldr r3, [r3, #0] - 8003838: 689b ldr r3, [r3, #8] - 800383a: f403 0300 and.w r3, r3, #8388608 @ 0x800000 - 800383e: 2b00 cmp r3, #0 - 8003840: d126 bne.n 8003890 + 8002fec: 687b ldr r3, [r7, #4] + 8002fee: 681b ldr r3, [r3, #0] + 8002ff0: 689b ldr r3, [r3, #8] + 8002ff2: f403 0300 and.w r3, r3, #8388608 @ 0x800000 + 8002ff6: 2b00 cmp r3, #0 + 8002ff8: d126 bne.n 8003048 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); - 8003842: 687b ldr r3, [r7, #4] - 8003844: 681b ldr r3, [r3, #0] - 8003846: 689a ldr r2, [r3, #8] - 8003848: 687b ldr r3, [r7, #4] - 800384a: 681b ldr r3, [r3, #0] - 800384c: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 - 8003850: 609a str r2, [r3, #8] + 8002ffa: 687b ldr r3, [r7, #4] + 8002ffc: 681b ldr r3, [r3, #0] + 8002ffe: 689a ldr r2, [r3, #8] + 8003000: 687b ldr r3, [r7, #4] + 8003002: 681b ldr r3, [r3, #0] + 8003004: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 + 8003008: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) - 8003852: 683b ldr r3, [r7, #0] - 8003854: 681b ldr r3, [r3, #0] - 8003856: 2b10 cmp r3, #16 - 8003858: d11a bne.n 8003890 + 800300a: 683b ldr r3, [r7, #0] + 800300c: 681b ldr r3, [r3, #0] + 800300e: 2b10 cmp r3, #16 + 8003010: d11a bne.n 8003048 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); - 800385a: 4b13 ldr r3, [pc, #76] @ (80038a8 ) - 800385c: 681b ldr r3, [r3, #0] - 800385e: 4a13 ldr r2, [pc, #76] @ (80038ac ) - 8003860: fba2 2303 umull r2, r3, r2, r3 - 8003864: 0c9a lsrs r2, r3, #18 - 8003866: 4613 mov r3, r2 - 8003868: 009b lsls r3, r3, #2 - 800386a: 4413 add r3, r2 - 800386c: 005b lsls r3, r3, #1 - 800386e: 60bb str r3, [r7, #8] + 8003012: 4b13 ldr r3, [pc, #76] @ (8003060 ) + 8003014: 681b ldr r3, [r3, #0] + 8003016: 4a13 ldr r2, [pc, #76] @ (8003064 ) + 8003018: fba2 2303 umull r2, r3, r2, r3 + 800301c: 0c9a lsrs r2, r3, #18 + 800301e: 4613 mov r3, r2 + 8003020: 009b lsls r3, r3, #2 + 8003022: 4413 add r3, r2 + 8003024: 005b lsls r3, r3, #1 + 8003026: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 8003870: e002 b.n 8003878 + 8003028: e002 b.n 8003030 { wait_loop_index--; - 8003872: 68bb ldr r3, [r7, #8] - 8003874: 3b01 subs r3, #1 - 8003876: 60bb str r3, [r7, #8] + 800302a: 68bb ldr r3, [r7, #8] + 800302c: 3b01 subs r3, #1 + 800302e: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 8003878: 68bb ldr r3, [r7, #8] - 800387a: 2b00 cmp r3, #0 - 800387c: d1f9 bne.n 8003872 - 800387e: e007 b.n 8003890 + 8003030: 68bb ldr r3, [r7, #8] + 8003032: 2b00 cmp r3, #0 + 8003034: d1f9 bne.n 800302a + 8003036: e007 b.n 8003048 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8003880: 687b ldr r3, [r7, #4] - 8003882: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003884: f043 0220 orr.w r2, r3, #32 - 8003888: 687b ldr r3, [r7, #4] - 800388a: 629a str r2, [r3, #40] @ 0x28 + 8003038: 687b ldr r3, [r7, #4] + 800303a: 6a9b ldr r3, [r3, #40] @ 0x28 + 800303c: f043 0220 orr.w r2, r3, #32 + 8003040: 687b ldr r3, [r7, #4] + 8003042: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; - 800388c: 2301 movs r3, #1 - 800388e: 73fb strb r3, [r7, #15] + 8003044: 2301 movs r3, #1 + 8003046: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); - 8003890: 687b ldr r3, [r7, #4] - 8003892: 2200 movs r2, #0 - 8003894: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 8003048: 687b ldr r3, [r7, #4] + 800304a: 2200 movs r2, #0 + 800304c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; - 8003898: 7bfb ldrb r3, [r7, #15] + 8003050: 7bfb ldrb r3, [r7, #15] } - 800389a: 4618 mov r0, r3 - 800389c: 3714 adds r7, #20 - 800389e: 46bd mov sp, r7 - 80038a0: bc80 pop {r7} - 80038a2: 4770 bx lr - 80038a4: 40012400 .word 0x40012400 - 80038a8: 20000024 .word 0x20000024 - 80038ac: 431bde83 .word 0x431bde83 + 8003052: 4618 mov r0, r3 + 8003054: 3714 adds r7, #20 + 8003056: 46bd mov sp, r7 + 8003058: bc80 pop {r7} + 800305a: 4770 bx lr + 800305c: 40012400 .word 0x40012400 + 8003060: 20000018 .word 0x20000018 + 8003064: 431bde83 .word 0x431bde83 -080038b0 : - * and voltage regulator must be enabled (done into HAL_ADC_Init()). - * @param hadc: ADC handle - * @retval HAL status. - */ -HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) -{ - 80038b0: b580 push {r7, lr} - 80038b2: b084 sub sp, #16 - 80038b4: af00 add r7, sp, #0 - 80038b6: 6078 str r0, [r7, #4] - uint32_t tickstart = 0U; - 80038b8: 2300 movs r3, #0 - 80038ba: 60fb str r3, [r7, #12] - __IO uint32_t wait_loop_index = 0U; - 80038bc: 2300 movs r3, #0 - 80038be: 60bb str r3, [r7, #8] - - /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ - /* enabling phase not yet completed: flag ADC ready not yet set). */ - /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ - /* causes: ADC clock not running, ...). */ - if (ADC_IS_ENABLE(hadc) == RESET) - 80038c0: 687b ldr r3, [r7, #4] - 80038c2: 681b ldr r3, [r3, #0] - 80038c4: 689b ldr r3, [r3, #8] - 80038c6: f003 0301 and.w r3, r3, #1 - 80038ca: 2b01 cmp r3, #1 - 80038cc: d040 beq.n 8003950 - { - /* Enable the Peripheral */ - __HAL_ADC_ENABLE(hadc); - 80038ce: 687b ldr r3, [r7, #4] - 80038d0: 681b ldr r3, [r3, #0] - 80038d2: 689a ldr r2, [r3, #8] - 80038d4: 687b ldr r3, [r7, #4] - 80038d6: 681b ldr r3, [r3, #0] - 80038d8: f042 0201 orr.w r2, r2, #1 - 80038dc: 609a str r2, [r3, #8] - - /* Delay for ADC stabilization time */ - /* Compute number of CPU cycles to wait for */ - wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); - 80038de: 4b1f ldr r3, [pc, #124] @ (800395c ) - 80038e0: 681b ldr r3, [r3, #0] - 80038e2: 4a1f ldr r2, [pc, #124] @ (8003960 ) - 80038e4: fba2 2303 umull r2, r3, r2, r3 - 80038e8: 0c9b lsrs r3, r3, #18 - 80038ea: 60bb str r3, [r7, #8] - while(wait_loop_index != 0U) - 80038ec: e002 b.n 80038f4 - { - wait_loop_index--; - 80038ee: 68bb ldr r3, [r7, #8] - 80038f0: 3b01 subs r3, #1 - 80038f2: 60bb str r3, [r7, #8] - while(wait_loop_index != 0U) - 80038f4: 68bb ldr r3, [r7, #8] - 80038f6: 2b00 cmp r3, #0 - 80038f8: d1f9 bne.n 80038ee - } - - /* Get tick count */ - tickstart = HAL_GetTick(); - 80038fa: f7ff fceb bl 80032d4 - 80038fe: 60f8 str r0, [r7, #12] - - /* Wait for ADC effectively enabled */ - while(ADC_IS_ENABLE(hadc) == RESET) - 8003900: e01f b.n 8003942 - { - if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) - 8003902: f7ff fce7 bl 80032d4 - 8003906: 4602 mov r2, r0 - 8003908: 68fb ldr r3, [r7, #12] - 800390a: 1ad3 subs r3, r2, r3 - 800390c: 2b02 cmp r3, #2 - 800390e: d918 bls.n 8003942 - { - /* New check to avoid false timeout detection in case of preemption */ - if(ADC_IS_ENABLE(hadc) == RESET) - 8003910: 687b ldr r3, [r7, #4] - 8003912: 681b ldr r3, [r3, #0] - 8003914: 689b ldr r3, [r3, #8] - 8003916: f003 0301 and.w r3, r3, #1 - 800391a: 2b01 cmp r3, #1 - 800391c: d011 beq.n 8003942 - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 800391e: 687b ldr r3, [r7, #4] - 8003920: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003922: f043 0210 orr.w r2, r3, #16 - 8003926: 687b ldr r3, [r7, #4] - 8003928: 629a str r2, [r3, #40] @ 0x28 - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 800392a: 687b ldr r3, [r7, #4] - 800392c: 6adb ldr r3, [r3, #44] @ 0x2c - 800392e: f043 0201 orr.w r2, r3, #1 - 8003932: 687b ldr r3, [r7, #4] - 8003934: 62da str r2, [r3, #44] @ 0x2c - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 8003936: 687b ldr r3, [r7, #4] - 8003938: 2200 movs r2, #0 - 800393a: f883 2024 strb.w r2, [r3, #36] @ 0x24 - - return HAL_ERROR; - 800393e: 2301 movs r3, #1 - 8003940: e007 b.n 8003952 - while(ADC_IS_ENABLE(hadc) == RESET) - 8003942: 687b ldr r3, [r7, #4] - 8003944: 681b ldr r3, [r3, #0] - 8003946: 689b ldr r3, [r3, #8] - 8003948: f003 0301 and.w r3, r3, #1 - 800394c: 2b01 cmp r3, #1 - 800394e: d1d8 bne.n 8003902 - } - } - } - - /* Return HAL status */ - return HAL_OK; - 8003950: 2300 movs r3, #0 -} - 8003952: 4618 mov r0, r3 - 8003954: 3710 adds r7, #16 - 8003956: 46bd mov sp, r7 - 8003958: bd80 pop {r7, pc} - 800395a: bf00 nop - 800395c: 20000024 .word 0x20000024 - 8003960: 431bde83 .word 0x431bde83 - -08003964 : +08003068 : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { - 8003964: b580 push {r7, lr} - 8003966: b084 sub sp, #16 - 8003968: af00 add r7, sp, #0 - 800396a: 6078 str r0, [r7, #4] + 8003068: b580 push {r7, lr} + 800306a: b084 sub sp, #16 + 800306c: af00 add r7, sp, #0 + 800306e: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; - 800396c: 2300 movs r3, #0 - 800396e: 60fb str r3, [r7, #12] + 8003070: 2300 movs r3, #0 + 8003072: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) - 8003970: 687b ldr r3, [r7, #4] - 8003972: 681b ldr r3, [r3, #0] - 8003974: 689b ldr r3, [r3, #8] - 8003976: f003 0301 and.w r3, r3, #1 - 800397a: 2b01 cmp r3, #1 - 800397c: d12e bne.n 80039dc + 8003074: 687b ldr r3, [r7, #4] + 8003076: 681b ldr r3, [r3, #0] + 8003078: 689b ldr r3, [r3, #8] + 800307a: f003 0301 and.w r3, r3, #1 + 800307e: 2b01 cmp r3, #1 + 8003080: d12e bne.n 80030e0 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); - 800397e: 687b ldr r3, [r7, #4] - 8003980: 681b ldr r3, [r3, #0] - 8003982: 689a ldr r2, [r3, #8] - 8003984: 687b ldr r3, [r7, #4] - 8003986: 681b ldr r3, [r3, #0] - 8003988: f022 0201 bic.w r2, r2, #1 - 800398c: 609a str r2, [r3, #8] + 8003082: 687b ldr r3, [r7, #4] + 8003084: 681b ldr r3, [r3, #0] + 8003086: 689a ldr r2, [r3, #8] + 8003088: 687b ldr r3, [r7, #4] + 800308a: 681b ldr r3, [r3, #0] + 800308c: f022 0201 bic.w r2, r2, #1 + 8003090: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); - 800398e: f7ff fca1 bl 80032d4 - 8003992: 60f8 str r0, [r7, #12] + 8003092: f7ff fdeb bl 8002c6c + 8003096: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) - 8003994: e01b b.n 80039ce + 8003098: e01b b.n 80030d2 { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) - 8003996: f7ff fc9d bl 80032d4 - 800399a: 4602 mov r2, r0 - 800399c: 68fb ldr r3, [r7, #12] - 800399e: 1ad3 subs r3, r2, r3 - 80039a0: 2b02 cmp r3, #2 - 80039a2: d914 bls.n 80039ce + 800309a: f7ff fde7 bl 8002c6c + 800309e: 4602 mov r2, r0 + 80030a0: 68fb ldr r3, [r7, #12] + 80030a2: 1ad3 subs r3, r2, r3 + 80030a4: 2b02 cmp r3, #2 + 80030a6: d914 bls.n 80030d2 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) - 80039a4: 687b ldr r3, [r7, #4] - 80039a6: 681b ldr r3, [r3, #0] - 80039a8: 689b ldr r3, [r3, #8] - 80039aa: f003 0301 and.w r3, r3, #1 - 80039ae: 2b01 cmp r3, #1 - 80039b0: d10d bne.n 80039ce + 80030a8: 687b ldr r3, [r7, #4] + 80030aa: 681b ldr r3, [r3, #0] + 80030ac: 689b ldr r3, [r3, #8] + 80030ae: f003 0301 and.w r3, r3, #1 + 80030b2: 2b01 cmp r3, #1 + 80030b4: d10d bne.n 80030d2 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80039b2: 687b ldr r3, [r7, #4] - 80039b4: 6a9b ldr r3, [r3, #40] @ 0x28 - 80039b6: f043 0210 orr.w r2, r3, #16 - 80039ba: 687b ldr r3, [r7, #4] - 80039bc: 629a str r2, [r3, #40] @ 0x28 + 80030b6: 687b ldr r3, [r7, #4] + 80030b8: 6a9b ldr r3, [r3, #40] @ 0x28 + 80030ba: f043 0210 orr.w r2, r3, #16 + 80030be: 687b ldr r3, [r7, #4] + 80030c0: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80039be: 687b ldr r3, [r7, #4] - 80039c0: 6adb ldr r3, [r3, #44] @ 0x2c - 80039c2: f043 0201 orr.w r2, r3, #1 - 80039c6: 687b ldr r3, [r7, #4] - 80039c8: 62da str r2, [r3, #44] @ 0x2c + 80030c2: 687b ldr r3, [r7, #4] + 80030c4: 6adb ldr r3, [r3, #44] @ 0x2c + 80030c6: f043 0201 orr.w r2, r3, #1 + 80030ca: 687b ldr r3, [r7, #4] + 80030cc: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; - 80039ca: 2301 movs r3, #1 - 80039cc: e007 b.n 80039de + 80030ce: 2301 movs r3, #1 + 80030d0: e007 b.n 80030e2 while(ADC_IS_ENABLE(hadc) != RESET) - 80039ce: 687b ldr r3, [r7, #4] - 80039d0: 681b ldr r3, [r3, #0] - 80039d2: 689b ldr r3, [r3, #8] - 80039d4: f003 0301 and.w r3, r3, #1 - 80039d8: 2b01 cmp r3, #1 - 80039da: d0dc beq.n 8003996 + 80030d2: 687b ldr r3, [r7, #4] + 80030d4: 681b ldr r3, [r3, #0] + 80030d6: 689b ldr r3, [r3, #8] + 80030d8: f003 0301 and.w r3, r3, #1 + 80030dc: 2b01 cmp r3, #1 + 80030de: d0dc beq.n 800309a } } } /* Return HAL status */ return HAL_OK; - 80039dc: 2300 movs r3, #0 + 80030e0: 2300 movs r3, #0 } - 80039de: 4618 mov r0, r3 - 80039e0: 3710 adds r7, #16 - 80039e2: 46bd mov sp, r7 - 80039e4: bd80 pop {r7, pc} - -080039e6 : - * @brief DMA transfer complete callback. - * @param hdma: pointer to DMA handle. - * @retval None - */ -void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) -{ - 80039e6: b580 push {r7, lr} - 80039e8: b084 sub sp, #16 - 80039ea: af00 add r7, sp, #0 - 80039ec: 6078 str r0, [r7, #4] - /* Retrieve ADC handle corresponding to current DMA handle */ - ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - 80039ee: 687b ldr r3, [r7, #4] - 80039f0: 6a5b ldr r3, [r3, #36] @ 0x24 - 80039f2: 60fb str r3, [r7, #12] - - /* Update state machine on conversion status if not in error state */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) - 80039f4: 68fb ldr r3, [r7, #12] - 80039f6: 6a9b ldr r3, [r3, #40] @ 0x28 - 80039f8: f003 0350 and.w r3, r3, #80 @ 0x50 - 80039fc: 2b00 cmp r3, #0 - 80039fe: d127 bne.n 8003a50 - { - /* Update ADC state machine */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - 8003a00: 68fb ldr r3, [r7, #12] - 8003a02: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003a04: f443 7200 orr.w r2, r3, #512 @ 0x200 - 8003a08: 68fb ldr r3, [r7, #12] - 8003a0a: 629a str r2, [r3, #40] @ 0x28 - /* Determine whether any further conversion upcoming on group regular */ - /* by external trigger, continuous mode or scan sequence on going. */ - /* Note: On STM32F1 devices, in case of sequencer enabled */ - /* (several ranks selected), end of conversion flag is raised */ - /* at the end of the sequence. */ - if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 8003a0c: 68fb ldr r3, [r7, #12] - 8003a0e: 681b ldr r3, [r3, #0] - 8003a10: 689b ldr r3, [r3, #8] - 8003a12: f403 2360 and.w r3, r3, #917504 @ 0xe0000 - 8003a16: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000 - 8003a1a: d115 bne.n 8003a48 - (hadc->Init.ContinuousConvMode == DISABLE) ) - 8003a1c: 68fb ldr r3, [r7, #12] - 8003a1e: 7b1b ldrb r3, [r3, #12] - if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && - 8003a20: 2b00 cmp r3, #0 - 8003a22: d111 bne.n 8003a48 - { - /* Set ADC state */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - 8003a24: 68fb ldr r3, [r7, #12] - 8003a26: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003a28: f423 7280 bic.w r2, r3, #256 @ 0x100 - 8003a2c: 68fb ldr r3, [r7, #12] - 8003a2e: 629a str r2, [r3, #40] @ 0x28 - - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - 8003a30: 68fb ldr r3, [r7, #12] - 8003a32: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003a34: f403 5380 and.w r3, r3, #4096 @ 0x1000 - 8003a38: 2b00 cmp r3, #0 - 8003a3a: d105 bne.n 8003a48 - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - 8003a3c: 68fb ldr r3, [r7, #12] - 8003a3e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003a40: f043 0201 orr.w r2, r3, #1 - 8003a44: 68fb ldr r3, [r7, #12] - 8003a46: 629a str r2, [r3, #40] @ 0x28 - - /* Conversion complete callback */ -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->ConvCpltCallback(hadc); -#else - HAL_ADC_ConvCpltCallback(hadc); - 8003a48: 68f8 ldr r0, [r7, #12] - 8003a4a: f7ff f953 bl 8002cf4 - else - { - /* Call DMA error callback */ - hadc->DMA_Handle->XferErrorCallback(hdma); - } -} - 8003a4e: e004 b.n 8003a5a - hadc->DMA_Handle->XferErrorCallback(hdma); - 8003a50: 68fb ldr r3, [r7, #12] - 8003a52: 6a1b ldr r3, [r3, #32] - 8003a54: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003a56: 6878 ldr r0, [r7, #4] - 8003a58: 4798 blx r3 -} - 8003a5a: bf00 nop - 8003a5c: 3710 adds r7, #16 - 8003a5e: 46bd mov sp, r7 - 8003a60: bd80 pop {r7, pc} - -08003a62 : - * @brief DMA half transfer complete callback. - * @param hdma: pointer to DMA handle. - * @retval None - */ -void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) -{ - 8003a62: b580 push {r7, lr} - 8003a64: b084 sub sp, #16 - 8003a66: af00 add r7, sp, #0 - 8003a68: 6078 str r0, [r7, #4] - /* Retrieve ADC handle corresponding to current DMA handle */ - ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - 8003a6a: 687b ldr r3, [r7, #4] - 8003a6c: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003a6e: 60fb str r3, [r7, #12] - - /* Half conversion callback */ -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->ConvHalfCpltCallback(hadc); -#else - HAL_ADC_ConvHalfCpltCallback(hadc); - 8003a70: 68f8 ldr r0, [r7, #12] - 8003a72: f7ff fe13 bl 800369c -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ -} - 8003a76: bf00 nop - 8003a78: 3710 adds r7, #16 - 8003a7a: 46bd mov sp, r7 - 8003a7c: bd80 pop {r7, pc} - -08003a7e : - * @brief DMA error callback - * @param hdma: pointer to DMA handle. - * @retval None - */ -void ADC_DMAError(DMA_HandleTypeDef *hdma) -{ - 8003a7e: b580 push {r7, lr} - 8003a80: b084 sub sp, #16 - 8003a82: af00 add r7, sp, #0 - 8003a84: 6078 str r0, [r7, #4] - /* Retrieve ADC handle corresponding to current DMA handle */ - ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - 8003a86: 687b ldr r3, [r7, #4] - 8003a88: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003a8a: 60fb str r3, [r7, #12] - - /* Set ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); - 8003a8c: 68fb ldr r3, [r7, #12] - 8003a8e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003a90: f043 0240 orr.w r2, r3, #64 @ 0x40 - 8003a94: 68fb ldr r3, [r7, #12] - 8003a96: 629a str r2, [r3, #40] @ 0x28 - - /* Set ADC error code to DMA error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); - 8003a98: 68fb ldr r3, [r7, #12] - 8003a9a: 6adb ldr r3, [r3, #44] @ 0x2c - 8003a9c: f043 0204 orr.w r2, r3, #4 - 8003aa0: 68fb ldr r3, [r7, #12] - 8003aa2: 62da str r2, [r3, #44] @ 0x2c - - /* Error callback */ -#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) - hadc->ErrorCallback(hadc); -#else - HAL_ADC_ErrorCallback(hadc); - 8003aa4: 68f8 ldr r0, [r7, #12] - 8003aa6: f7ff fe02 bl 80036ae -#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ -} - 8003aaa: bf00 nop - 8003aac: 3710 adds r7, #16 - 8003aae: 46bd mov sp, r7 - 8003ab0: bd80 pop {r7, pc} + 80030e2: 4618 mov r0, r3 + 80030e4: 3710 adds r7, #16 + 80030e6: 46bd mov sp, r7 + 80030e8: bd80 pop {r7, pc} ... -08003ab4 : - * the completion of this function. - * @param hadc: ADC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) -{ - 8003ab4: b590 push {r4, r7, lr} - 8003ab6: b087 sub sp, #28 - 8003ab8: af00 add r7, sp, #0 - 8003aba: 6078 str r0, [r7, #4] - HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8003abc: 2300 movs r3, #0 - 8003abe: 75fb strb r3, [r7, #23] - uint32_t tickstart; - __IO uint32_t wait_loop_index = 0U; - 8003ac0: 2300 movs r3, #0 - 8003ac2: 60fb str r3, [r7, #12] - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Process locked */ - __HAL_LOCK(hadc); - 8003ac4: 687b ldr r3, [r7, #4] - 8003ac6: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 - 8003aca: 2b01 cmp r3, #1 - 8003acc: d101 bne.n 8003ad2 - 8003ace: 2302 movs r3, #2 - 8003ad0: e097 b.n 8003c02 - 8003ad2: 687b ldr r3, [r7, #4] - 8003ad4: 2201 movs r2, #1 - 8003ad6: f883 2024 strb.w r2, [r3, #36] @ 0x24 - - /* 1. Disable ADC peripheral */ - tmp_hal_status = ADC_ConversionStop_Disable(hadc); - 8003ada: 6878 ldr r0, [r7, #4] - 8003adc: f7ff ff42 bl 8003964 - 8003ae0: 4603 mov r3, r0 - 8003ae2: 75fb strb r3, [r7, #23] - - /* 2. Calibration prerequisite delay before starting the calibration. */ - /* - ADC must be enabled for at least two ADC clock cycles */ - tmp_hal_status = ADC_Enable(hadc); - 8003ae4: 6878 ldr r0, [r7, #4] - 8003ae6: f7ff fee3 bl 80038b0 - 8003aea: 4603 mov r3, r0 - 8003aec: 75fb strb r3, [r7, #23] - - /* Check if ADC is effectively enabled */ - if (tmp_hal_status == HAL_OK) - 8003aee: 7dfb ldrb r3, [r7, #23] - 8003af0: 2b00 cmp r3, #0 - 8003af2: f040 8081 bne.w 8003bf8 - { - /* Set ADC state */ - ADC_STATE_CLR_SET(hadc->State, - 8003af6: 687b ldr r3, [r7, #4] - 8003af8: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003afa: f423 5388 bic.w r3, r3, #4352 @ 0x1100 - 8003afe: f023 0302 bic.w r3, r3, #2 - 8003b02: f043 0202 orr.w r2, r3, #2 - 8003b06: 687b ldr r3, [r7, #4] - 8003b08: 629a str r2, [r3, #40] @ 0x28 - - /* Hardware prerequisite: delay before starting the calibration. */ - /* - Computation of CPU clock cycles corresponding to ADC clock cycles. */ - /* - Wait for the expected ADC clock cycles delay */ - wait_loop_index = ((SystemCoreClock - / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC)) - 8003b0a: 4b40 ldr r3, [pc, #256] @ (8003c0c ) - 8003b0c: 681c ldr r4, [r3, #0] - 8003b0e: 2002 movs r0, #2 - 8003b10: f002 fcf6 bl 8006500 - 8003b14: 4603 mov r3, r0 - 8003b16: fbb4 f3f3 udiv r3, r4, r3 - * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES ); - 8003b1a: 005b lsls r3, r3, #1 - wait_loop_index = ((SystemCoreClock - 8003b1c: 60fb str r3, [r7, #12] - - while(wait_loop_index != 0U) - 8003b1e: e002 b.n 8003b26 - { - wait_loop_index--; - 8003b20: 68fb ldr r3, [r7, #12] - 8003b22: 3b01 subs r3, #1 - 8003b24: 60fb str r3, [r7, #12] - while(wait_loop_index != 0U) - 8003b26: 68fb ldr r3, [r7, #12] - 8003b28: 2b00 cmp r3, #0 - 8003b2a: d1f9 bne.n 8003b20 - } - - /* 3. Resets ADC calibration registers */ - SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL); - 8003b2c: 687b ldr r3, [r7, #4] - 8003b2e: 681b ldr r3, [r3, #0] - 8003b30: 689a ldr r2, [r3, #8] - 8003b32: 687b ldr r3, [r7, #4] - 8003b34: 681b ldr r3, [r3, #0] - 8003b36: f042 0208 orr.w r2, r2, #8 - 8003b3a: 609a str r2, [r3, #8] - - tickstart = HAL_GetTick(); - 8003b3c: f7ff fbca bl 80032d4 - 8003b40: 6138 str r0, [r7, #16] - - /* Wait for calibration reset completion */ - while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) - 8003b42: e01b b.n 8003b7c - { - if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) - 8003b44: f7ff fbc6 bl 80032d4 - 8003b48: 4602 mov r2, r0 - 8003b4a: 693b ldr r3, [r7, #16] - 8003b4c: 1ad3 subs r3, r2, r3 - 8003b4e: 2b0a cmp r3, #10 - 8003b50: d914 bls.n 8003b7c - { - /* New check to avoid false timeout detection in case of preemption */ - if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) - 8003b52: 687b ldr r3, [r7, #4] - 8003b54: 681b ldr r3, [r3, #0] - 8003b56: 689b ldr r3, [r3, #8] - 8003b58: f003 0308 and.w r3, r3, #8 - 8003b5c: 2b00 cmp r3, #0 - 8003b5e: d00d beq.n 8003b7c - { - /* Update ADC state machine to error */ - ADC_STATE_CLR_SET(hadc->State, - 8003b60: 687b ldr r3, [r7, #4] - 8003b62: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003b64: f023 0312 bic.w r3, r3, #18 - 8003b68: f043 0210 orr.w r2, r3, #16 - 8003b6c: 687b ldr r3, [r7, #4] - 8003b6e: 629a str r2, [r3, #40] @ 0x28 - HAL_ADC_STATE_BUSY_INTERNAL, - HAL_ADC_STATE_ERROR_INTERNAL); - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 8003b70: 687b ldr r3, [r7, #4] - 8003b72: 2200 movs r2, #0 - 8003b74: f883 2024 strb.w r2, [r3, #36] @ 0x24 - - return HAL_ERROR; - 8003b78: 2301 movs r3, #1 - 8003b7a: e042 b.n 8003c02 - while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL)) - 8003b7c: 687b ldr r3, [r7, #4] - 8003b7e: 681b ldr r3, [r3, #0] - 8003b80: 689b ldr r3, [r3, #8] - 8003b82: f003 0308 and.w r3, r3, #8 - 8003b86: 2b00 cmp r3, #0 - 8003b88: d1dc bne.n 8003b44 - } - } - } - - /* 4. Start ADC calibration */ - SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL); - 8003b8a: 687b ldr r3, [r7, #4] - 8003b8c: 681b ldr r3, [r3, #0] - 8003b8e: 689a ldr r2, [r3, #8] - 8003b90: 687b ldr r3, [r7, #4] - 8003b92: 681b ldr r3, [r3, #0] - 8003b94: f042 0204 orr.w r2, r2, #4 - 8003b98: 609a str r2, [r3, #8] - - tickstart = HAL_GetTick(); - 8003b9a: f7ff fb9b bl 80032d4 - 8003b9e: 6138 str r0, [r7, #16] - - /* Wait for calibration completion */ - while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) - 8003ba0: e01b b.n 8003bda - { - if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) - 8003ba2: f7ff fb97 bl 80032d4 - 8003ba6: 4602 mov r2, r0 - 8003ba8: 693b ldr r3, [r7, #16] - 8003baa: 1ad3 subs r3, r2, r3 - 8003bac: 2b0a cmp r3, #10 - 8003bae: d914 bls.n 8003bda - { - /* New check to avoid false timeout detection in case of preemption */ - if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) - 8003bb0: 687b ldr r3, [r7, #4] - 8003bb2: 681b ldr r3, [r3, #0] - 8003bb4: 689b ldr r3, [r3, #8] - 8003bb6: f003 0304 and.w r3, r3, #4 - 8003bba: 2b00 cmp r3, #0 - 8003bbc: d00d beq.n 8003bda - { - /* Update ADC state machine to error */ - ADC_STATE_CLR_SET(hadc->State, - 8003bbe: 687b ldr r3, [r7, #4] - 8003bc0: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003bc2: f023 0312 bic.w r3, r3, #18 - 8003bc6: f043 0210 orr.w r2, r3, #16 - 8003bca: 687b ldr r3, [r7, #4] - 8003bcc: 629a str r2, [r3, #40] @ 0x28 - HAL_ADC_STATE_BUSY_INTERNAL, - HAL_ADC_STATE_ERROR_INTERNAL); - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 8003bce: 687b ldr r3, [r7, #4] - 8003bd0: 2200 movs r2, #0 - 8003bd2: f883 2024 strb.w r2, [r3, #36] @ 0x24 - - return HAL_ERROR; - 8003bd6: 2301 movs r3, #1 - 8003bd8: e013 b.n 8003c02 - while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL)) - 8003bda: 687b ldr r3, [r7, #4] - 8003bdc: 681b ldr r3, [r3, #0] - 8003bde: 689b ldr r3, [r3, #8] - 8003be0: f003 0304 and.w r3, r3, #4 - 8003be4: 2b00 cmp r3, #0 - 8003be6: d1dc bne.n 8003ba2 - } - } - } - - /* Set ADC state */ - ADC_STATE_CLR_SET(hadc->State, - 8003be8: 687b ldr r3, [r7, #4] - 8003bea: 6a9b ldr r3, [r3, #40] @ 0x28 - 8003bec: f023 0303 bic.w r3, r3, #3 - 8003bf0: f043 0201 orr.w r2, r3, #1 - 8003bf4: 687b ldr r3, [r7, #4] - 8003bf6: 629a str r2, [r3, #40] @ 0x28 - HAL_ADC_STATE_BUSY_INTERNAL, - HAL_ADC_STATE_READY); - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - 8003bf8: 687b ldr r3, [r7, #4] - 8003bfa: 2200 movs r2, #0 - 8003bfc: f883 2024 strb.w r2, [r3, #36] @ 0x24 - - /* Return function status */ - return tmp_hal_status; - 8003c00: 7dfb ldrb r3, [r7, #23] -} - 8003c02: 4618 mov r0, r3 - 8003c04: 371c adds r7, #28 - 8003c06: 46bd mov sp, r7 - 8003c08: bd90 pop {r4, r7, pc} - 8003c0a: bf00 nop - 8003c0c: 20000024 .word 0x20000024 - -08003c10 <__NVIC_SetPriorityGrouping>: +080030ec <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8003c10: b480 push {r7} - 8003c12: b085 sub sp, #20 - 8003c14: af00 add r7, sp, #0 - 8003c16: 6078 str r0, [r7, #4] + 80030ec: b480 push {r7} + 80030ee: b085 sub sp, #20 + 80030f0: af00 add r7, sp, #0 + 80030f2: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8003c18: 687b ldr r3, [r7, #4] - 8003c1a: f003 0307 and.w r3, r3, #7 - 8003c1e: 60fb str r3, [r7, #12] + 80030f4: 687b ldr r3, [r7, #4] + 80030f6: f003 0307 and.w r3, r3, #7 + 80030fa: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 8003c20: 4b0c ldr r3, [pc, #48] @ (8003c54 <__NVIC_SetPriorityGrouping+0x44>) - 8003c22: 68db ldr r3, [r3, #12] - 8003c24: 60bb str r3, [r7, #8] + 80030fc: 4b0c ldr r3, [pc, #48] @ (8003130 <__NVIC_SetPriorityGrouping+0x44>) + 80030fe: 68db ldr r3, [r3, #12] + 8003100: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 8003c26: 68ba ldr r2, [r7, #8] - 8003c28: f64f 03ff movw r3, #63743 @ 0xf8ff - 8003c2c: 4013 ands r3, r2 - 8003c2e: 60bb str r3, [r7, #8] + 8003102: 68ba ldr r2, [r7, #8] + 8003104: f64f 03ff movw r3, #63743 @ 0xf8ff + 8003108: 4013 ands r3, r2 + 800310a: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 8003c30: 68fb ldr r3, [r7, #12] - 8003c32: 021a lsls r2, r3, #8 + 800310c: 68fb ldr r3, [r7, #12] + 800310e: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8003c34: 68bb ldr r3, [r7, #8] - 8003c36: 4313 orrs r3, r2 + 8003110: 68bb ldr r3, [r7, #8] + 8003112: 4313 orrs r3, r2 reg_value = (reg_value | - 8003c38: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 - 8003c3c: f443 3300 orr.w r3, r3, #131072 @ 0x20000 - 8003c40: 60bb str r3, [r7, #8] + 8003114: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 + 8003118: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 800311c: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 8003c42: 4a04 ldr r2, [pc, #16] @ (8003c54 <__NVIC_SetPriorityGrouping+0x44>) - 8003c44: 68bb ldr r3, [r7, #8] - 8003c46: 60d3 str r3, [r2, #12] + 800311e: 4a04 ldr r2, [pc, #16] @ (8003130 <__NVIC_SetPriorityGrouping+0x44>) + 8003120: 68bb ldr r3, [r7, #8] + 8003122: 60d3 str r3, [r2, #12] } - 8003c48: bf00 nop - 8003c4a: 3714 adds r7, #20 - 8003c4c: 46bd mov sp, r7 - 8003c4e: bc80 pop {r7} - 8003c50: 4770 bx lr - 8003c52: bf00 nop - 8003c54: e000ed00 .word 0xe000ed00 + 8003124: bf00 nop + 8003126: 3714 adds r7, #20 + 8003128: 46bd mov sp, r7 + 800312a: bc80 pop {r7} + 800312c: 4770 bx lr + 800312e: bf00 nop + 8003130: e000ed00 .word 0xe000ed00 -08003c58 <__NVIC_GetPriorityGrouping>: +08003134 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 8003c58: b480 push {r7} - 8003c5a: af00 add r7, sp, #0 + 8003134: b480 push {r7} + 8003136: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8003c5c: 4b04 ldr r3, [pc, #16] @ (8003c70 <__NVIC_GetPriorityGrouping+0x18>) - 8003c5e: 68db ldr r3, [r3, #12] - 8003c60: 0a1b lsrs r3, r3, #8 - 8003c62: f003 0307 and.w r3, r3, #7 + 8003138: 4b04 ldr r3, [pc, #16] @ (800314c <__NVIC_GetPriorityGrouping+0x18>) + 800313a: 68db ldr r3, [r3, #12] + 800313c: 0a1b lsrs r3, r3, #8 + 800313e: f003 0307 and.w r3, r3, #7 } - 8003c66: 4618 mov r0, r3 - 8003c68: 46bd mov sp, r7 - 8003c6a: bc80 pop {r7} - 8003c6c: 4770 bx lr - 8003c6e: bf00 nop - 8003c70: e000ed00 .word 0xe000ed00 + 8003142: 4618 mov r0, r3 + 8003144: 46bd mov sp, r7 + 8003146: bc80 pop {r7} + 8003148: 4770 bx lr + 800314a: bf00 nop + 800314c: e000ed00 .word 0xe000ed00 -08003c74 <__NVIC_EnableIRQ>: +08003150 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { - 8003c74: b480 push {r7} - 8003c76: b083 sub sp, #12 - 8003c78: af00 add r7, sp, #0 - 8003c7a: 4603 mov r3, r0 - 8003c7c: 71fb strb r3, [r7, #7] + 8003150: b480 push {r7} + 8003152: b083 sub sp, #12 + 8003154: af00 add r7, sp, #0 + 8003156: 4603 mov r3, r0 + 8003158: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8003c7e: f997 3007 ldrsb.w r3, [r7, #7] - 8003c82: 2b00 cmp r3, #0 - 8003c84: db0b blt.n 8003c9e <__NVIC_EnableIRQ+0x2a> + 800315a: f997 3007 ldrsb.w r3, [r7, #7] + 800315e: 2b00 cmp r3, #0 + 8003160: db0b blt.n 800317a <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8003c86: 79fb ldrb r3, [r7, #7] - 8003c88: f003 021f and.w r2, r3, #31 - 8003c8c: 4906 ldr r1, [pc, #24] @ (8003ca8 <__NVIC_EnableIRQ+0x34>) - 8003c8e: f997 3007 ldrsb.w r3, [r7, #7] - 8003c92: 095b lsrs r3, r3, #5 - 8003c94: 2001 movs r0, #1 - 8003c96: fa00 f202 lsl.w r2, r0, r2 - 8003c9a: f841 2023 str.w r2, [r1, r3, lsl #2] + 8003162: 79fb ldrb r3, [r7, #7] + 8003164: f003 021f and.w r2, r3, #31 + 8003168: 4906 ldr r1, [pc, #24] @ (8003184 <__NVIC_EnableIRQ+0x34>) + 800316a: f997 3007 ldrsb.w r3, [r7, #7] + 800316e: 095b lsrs r3, r3, #5 + 8003170: 2001 movs r0, #1 + 8003172: fa00 f202 lsl.w r2, r0, r2 + 8003176: f841 2023 str.w r2, [r1, r3, lsl #2] } } - 8003c9e: bf00 nop - 8003ca0: 370c adds r7, #12 - 8003ca2: 46bd mov sp, r7 - 8003ca4: bc80 pop {r7} - 8003ca6: 4770 bx lr - 8003ca8: e000e100 .word 0xe000e100 + 800317a: bf00 nop + 800317c: 370c adds r7, #12 + 800317e: 46bd mov sp, r7 + 8003180: bc80 pop {r7} + 8003182: 4770 bx lr + 8003184: e000e100 .word 0xe000e100 -08003cac <__NVIC_SetPriority>: +08003188 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8003cac: b480 push {r7} - 8003cae: b083 sub sp, #12 - 8003cb0: af00 add r7, sp, #0 - 8003cb2: 4603 mov r3, r0 - 8003cb4: 6039 str r1, [r7, #0] - 8003cb6: 71fb strb r3, [r7, #7] + 8003188: b480 push {r7} + 800318a: b083 sub sp, #12 + 800318c: af00 add r7, sp, #0 + 800318e: 4603 mov r3, r0 + 8003190: 6039 str r1, [r7, #0] + 8003192: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8003cb8: f997 3007 ldrsb.w r3, [r7, #7] - 8003cbc: 2b00 cmp r3, #0 - 8003cbe: db0a blt.n 8003cd6 <__NVIC_SetPriority+0x2a> + 8003194: f997 3007 ldrsb.w r3, [r7, #7] + 8003198: 2b00 cmp r3, #0 + 800319a: db0a blt.n 80031b2 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8003cc0: 683b ldr r3, [r7, #0] - 8003cc2: b2da uxtb r2, r3 - 8003cc4: 490c ldr r1, [pc, #48] @ (8003cf8 <__NVIC_SetPriority+0x4c>) - 8003cc6: f997 3007 ldrsb.w r3, [r7, #7] - 8003cca: 0112 lsls r2, r2, #4 - 8003ccc: b2d2 uxtb r2, r2 - 8003cce: 440b add r3, r1 - 8003cd0: f883 2300 strb.w r2, [r3, #768] @ 0x300 + 800319c: 683b ldr r3, [r7, #0] + 800319e: b2da uxtb r2, r3 + 80031a0: 490c ldr r1, [pc, #48] @ (80031d4 <__NVIC_SetPriority+0x4c>) + 80031a2: f997 3007 ldrsb.w r3, [r7, #7] + 80031a6: 0112 lsls r2, r2, #4 + 80031a8: b2d2 uxtb r2, r2 + 80031aa: 440b add r3, r1 + 80031ac: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 8003cd4: e00a b.n 8003cec <__NVIC_SetPriority+0x40> + 80031b0: e00a b.n 80031c8 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8003cd6: 683b ldr r3, [r7, #0] - 8003cd8: b2da uxtb r2, r3 - 8003cda: 4908 ldr r1, [pc, #32] @ (8003cfc <__NVIC_SetPriority+0x50>) - 8003cdc: 79fb ldrb r3, [r7, #7] - 8003cde: f003 030f and.w r3, r3, #15 - 8003ce2: 3b04 subs r3, #4 - 8003ce4: 0112 lsls r2, r2, #4 - 8003ce6: b2d2 uxtb r2, r2 - 8003ce8: 440b add r3, r1 - 8003cea: 761a strb r2, [r3, #24] + 80031b2: 683b ldr r3, [r7, #0] + 80031b4: b2da uxtb r2, r3 + 80031b6: 4908 ldr r1, [pc, #32] @ (80031d8 <__NVIC_SetPriority+0x50>) + 80031b8: 79fb ldrb r3, [r7, #7] + 80031ba: f003 030f and.w r3, r3, #15 + 80031be: 3b04 subs r3, #4 + 80031c0: 0112 lsls r2, r2, #4 + 80031c2: b2d2 uxtb r2, r2 + 80031c4: 440b add r3, r1 + 80031c6: 761a strb r2, [r3, #24] } - 8003cec: bf00 nop - 8003cee: 370c adds r7, #12 - 8003cf0: 46bd mov sp, r7 - 8003cf2: bc80 pop {r7} - 8003cf4: 4770 bx lr - 8003cf6: bf00 nop - 8003cf8: e000e100 .word 0xe000e100 - 8003cfc: e000ed00 .word 0xe000ed00 + 80031c8: bf00 nop + 80031ca: 370c adds r7, #12 + 80031cc: 46bd mov sp, r7 + 80031ce: bc80 pop {r7} + 80031d0: 4770 bx lr + 80031d2: bf00 nop + 80031d4: e000e100 .word 0xe000e100 + 80031d8: e000ed00 .word 0xe000ed00 -08003d00 : +080031dc : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 8003d00: b480 push {r7} - 8003d02: b089 sub sp, #36 @ 0x24 - 8003d04: af00 add r7, sp, #0 - 8003d06: 60f8 str r0, [r7, #12] - 8003d08: 60b9 str r1, [r7, #8] - 8003d0a: 607a str r2, [r7, #4] + 80031dc: b480 push {r7} + 80031de: b089 sub sp, #36 @ 0x24 + 80031e0: af00 add r7, sp, #0 + 80031e2: 60f8 str r0, [r7, #12] + 80031e4: 60b9 str r1, [r7, #8] + 80031e6: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8003d0c: 68fb ldr r3, [r7, #12] - 8003d0e: f003 0307 and.w r3, r3, #7 - 8003d12: 61fb str r3, [r7, #28] + 80031e8: 68fb ldr r3, [r7, #12] + 80031ea: f003 0307 and.w r3, r3, #7 + 80031ee: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8003d14: 69fb ldr r3, [r7, #28] - 8003d16: f1c3 0307 rsb r3, r3, #7 - 8003d1a: 2b04 cmp r3, #4 - 8003d1c: bf28 it cs - 8003d1e: 2304 movcs r3, #4 - 8003d20: 61bb str r3, [r7, #24] + 80031f0: 69fb ldr r3, [r7, #28] + 80031f2: f1c3 0307 rsb r3, r3, #7 + 80031f6: 2b04 cmp r3, #4 + 80031f8: bf28 it cs + 80031fa: 2304 movcs r3, #4 + 80031fc: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 8003d22: 69fb ldr r3, [r7, #28] - 8003d24: 3304 adds r3, #4 - 8003d26: 2b06 cmp r3, #6 - 8003d28: d902 bls.n 8003d30 - 8003d2a: 69fb ldr r3, [r7, #28] - 8003d2c: 3b03 subs r3, #3 - 8003d2e: e000 b.n 8003d32 - 8003d30: 2300 movs r3, #0 - 8003d32: 617b str r3, [r7, #20] + 80031fe: 69fb ldr r3, [r7, #28] + 8003200: 3304 adds r3, #4 + 8003202: 2b06 cmp r3, #6 + 8003204: d902 bls.n 800320c + 8003206: 69fb ldr r3, [r7, #28] + 8003208: 3b03 subs r3, #3 + 800320a: e000 b.n 800320e + 800320c: 2300 movs r3, #0 + 800320e: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8003d34: f04f 32ff mov.w r2, #4294967295 - 8003d38: 69bb ldr r3, [r7, #24] - 8003d3a: fa02 f303 lsl.w r3, r2, r3 - 8003d3e: 43da mvns r2, r3 - 8003d40: 68bb ldr r3, [r7, #8] - 8003d42: 401a ands r2, r3 - 8003d44: 697b ldr r3, [r7, #20] - 8003d46: 409a lsls r2, r3 + 8003210: f04f 32ff mov.w r2, #4294967295 + 8003214: 69bb ldr r3, [r7, #24] + 8003216: fa02 f303 lsl.w r3, r2, r3 + 800321a: 43da mvns r2, r3 + 800321c: 68bb ldr r3, [r7, #8] + 800321e: 401a ands r2, r3 + 8003220: 697b ldr r3, [r7, #20] + 8003222: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8003d48: f04f 31ff mov.w r1, #4294967295 - 8003d4c: 697b ldr r3, [r7, #20] - 8003d4e: fa01 f303 lsl.w r3, r1, r3 - 8003d52: 43d9 mvns r1, r3 - 8003d54: 687b ldr r3, [r7, #4] - 8003d56: 400b ands r3, r1 + 8003224: f04f 31ff mov.w r1, #4294967295 + 8003228: 697b ldr r3, [r7, #20] + 800322a: fa01 f303 lsl.w r3, r1, r3 + 800322e: 43d9 mvns r1, r3 + 8003230: 687b ldr r3, [r7, #4] + 8003232: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8003d58: 4313 orrs r3, r2 + 8003234: 4313 orrs r3, r2 ); } - 8003d5a: 4618 mov r0, r3 - 8003d5c: 3724 adds r7, #36 @ 0x24 - 8003d5e: 46bd mov sp, r7 - 8003d60: bc80 pop {r7} - 8003d62: 4770 bx lr + 8003236: 4618 mov r0, r3 + 8003238: 3724 adds r7, #36 @ 0x24 + 800323a: 46bd mov sp, r7 + 800323c: bc80 pop {r7} + 800323e: 4770 bx lr -08003d64 : +08003240 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8003d64: b580 push {r7, lr} - 8003d66: b082 sub sp, #8 - 8003d68: af00 add r7, sp, #0 - 8003d6a: 6078 str r0, [r7, #4] + 8003240: b580 push {r7, lr} + 8003242: b082 sub sp, #8 + 8003244: af00 add r7, sp, #0 + 8003246: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8003d6c: 687b ldr r3, [r7, #4] - 8003d6e: 3b01 subs r3, #1 - 8003d70: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 - 8003d74: d301 bcc.n 8003d7a + 8003248: 687b ldr r3, [r7, #4] + 800324a: 3b01 subs r3, #1 + 800324c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 + 8003250: d301 bcc.n 8003256 { return (1UL); /* Reload value impossible */ - 8003d76: 2301 movs r3, #1 - 8003d78: e00f b.n 8003d9a + 8003252: 2301 movs r3, #1 + 8003254: e00f b.n 8003276 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8003d7a: 4a0a ldr r2, [pc, #40] @ (8003da4 ) - 8003d7c: 687b ldr r3, [r7, #4] - 8003d7e: 3b01 subs r3, #1 - 8003d80: 6053 str r3, [r2, #4] + 8003256: 4a0a ldr r2, [pc, #40] @ (8003280 ) + 8003258: 687b ldr r3, [r7, #4] + 800325a: 3b01 subs r3, #1 + 800325c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8003d82: 210f movs r1, #15 - 8003d84: f04f 30ff mov.w r0, #4294967295 - 8003d88: f7ff ff90 bl 8003cac <__NVIC_SetPriority> + 800325e: 210f movs r1, #15 + 8003260: f04f 30ff mov.w r0, #4294967295 + 8003264: f7ff ff90 bl 8003188 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8003d8c: 4b05 ldr r3, [pc, #20] @ (8003da4 ) - 8003d8e: 2200 movs r2, #0 - 8003d90: 609a str r2, [r3, #8] + 8003268: 4b05 ldr r3, [pc, #20] @ (8003280 ) + 800326a: 2200 movs r2, #0 + 800326c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8003d92: 4b04 ldr r3, [pc, #16] @ (8003da4 ) - 8003d94: 2207 movs r2, #7 - 8003d96: 601a str r2, [r3, #0] + 800326e: 4b04 ldr r3, [pc, #16] @ (8003280 ) + 8003270: 2207 movs r2, #7 + 8003272: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8003d98: 2300 movs r3, #0 + 8003274: 2300 movs r3, #0 } - 8003d9a: 4618 mov r0, r3 - 8003d9c: 3708 adds r7, #8 - 8003d9e: 46bd mov sp, r7 - 8003da0: bd80 pop {r7, pc} - 8003da2: bf00 nop - 8003da4: e000e010 .word 0xe000e010 + 8003276: 4618 mov r0, r3 + 8003278: 3708 adds r7, #8 + 800327a: 46bd mov sp, r7 + 800327c: bd80 pop {r7, pc} + 800327e: bf00 nop + 8003280: e000e010 .word 0xe000e010 -08003da8 : +08003284 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8003da8: b580 push {r7, lr} - 8003daa: b082 sub sp, #8 - 8003dac: af00 add r7, sp, #0 - 8003dae: 6078 str r0, [r7, #4] + 8003284: b580 push {r7, lr} + 8003286: b082 sub sp, #8 + 8003288: af00 add r7, sp, #0 + 800328a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 8003db0: 6878 ldr r0, [r7, #4] - 8003db2: f7ff ff2d bl 8003c10 <__NVIC_SetPriorityGrouping> + 800328c: 6878 ldr r0, [r7, #4] + 800328e: f7ff ff2d bl 80030ec <__NVIC_SetPriorityGrouping> } - 8003db6: bf00 nop - 8003db8: 3708 adds r7, #8 - 8003dba: 46bd mov sp, r7 - 8003dbc: bd80 pop {r7, pc} + 8003292: bf00 nop + 8003294: 3708 adds r7, #8 + 8003296: 46bd mov sp, r7 + 8003298: bd80 pop {r7, pc} -08003dbe : +0800329a : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8003dbe: b580 push {r7, lr} - 8003dc0: b086 sub sp, #24 - 8003dc2: af00 add r7, sp, #0 - 8003dc4: 4603 mov r3, r0 - 8003dc6: 60b9 str r1, [r7, #8] - 8003dc8: 607a str r2, [r7, #4] - 8003dca: 73fb strb r3, [r7, #15] + 800329a: b580 push {r7, lr} + 800329c: b086 sub sp, #24 + 800329e: af00 add r7, sp, #0 + 80032a0: 4603 mov r3, r0 + 80032a2: 60b9 str r1, [r7, #8] + 80032a4: 607a str r2, [r7, #4] + 80032a6: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; - 8003dcc: 2300 movs r3, #0 - 8003dce: 617b str r3, [r7, #20] + 80032a8: 2300 movs r3, #0 + 80032aa: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8003dd0: f7ff ff42 bl 8003c58 <__NVIC_GetPriorityGrouping> - 8003dd4: 6178 str r0, [r7, #20] + 80032ac: f7ff ff42 bl 8003134 <__NVIC_GetPriorityGrouping> + 80032b0: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 8003dd6: 687a ldr r2, [r7, #4] - 8003dd8: 68b9 ldr r1, [r7, #8] - 8003dda: 6978 ldr r0, [r7, #20] - 8003ddc: f7ff ff90 bl 8003d00 - 8003de0: 4602 mov r2, r0 - 8003de2: f997 300f ldrsb.w r3, [r7, #15] - 8003de6: 4611 mov r1, r2 - 8003de8: 4618 mov r0, r3 - 8003dea: f7ff ff5f bl 8003cac <__NVIC_SetPriority> + 80032b2: 687a ldr r2, [r7, #4] + 80032b4: 68b9 ldr r1, [r7, #8] + 80032b6: 6978 ldr r0, [r7, #20] + 80032b8: f7ff ff90 bl 80031dc + 80032bc: 4602 mov r2, r0 + 80032be: f997 300f ldrsb.w r3, [r7, #15] + 80032c2: 4611 mov r1, r2 + 80032c4: 4618 mov r0, r3 + 80032c6: f7ff ff5f bl 8003188 <__NVIC_SetPriority> } - 8003dee: bf00 nop - 8003df0: 3718 adds r7, #24 - 8003df2: 46bd mov sp, r7 - 8003df4: bd80 pop {r7, pc} + 80032ca: bf00 nop + 80032cc: 3718 adds r7, #24 + 80032ce: 46bd mov sp, r7 + 80032d0: bd80 pop {r7, pc} -08003df6 : +080032d2 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 8003df6: b580 push {r7, lr} - 8003df8: b082 sub sp, #8 - 8003dfa: af00 add r7, sp, #0 - 8003dfc: 4603 mov r3, r0 - 8003dfe: 71fb strb r3, [r7, #7] + 80032d2: b580 push {r7, lr} + 80032d4: b082 sub sp, #8 + 80032d6: af00 add r7, sp, #0 + 80032d8: 4603 mov r3, r0 + 80032da: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 8003e00: f997 3007 ldrsb.w r3, [r7, #7] - 8003e04: 4618 mov r0, r3 - 8003e06: f7ff ff35 bl 8003c74 <__NVIC_EnableIRQ> + 80032dc: f997 3007 ldrsb.w r3, [r7, #7] + 80032e0: 4618 mov r0, r3 + 80032e2: f7ff ff35 bl 8003150 <__NVIC_EnableIRQ> } - 8003e0a: bf00 nop - 8003e0c: 3708 adds r7, #8 - 8003e0e: 46bd mov sp, r7 - 8003e10: bd80 pop {r7, pc} + 80032e6: bf00 nop + 80032e8: 3708 adds r7, #8 + 80032ea: 46bd mov sp, r7 + 80032ec: bd80 pop {r7, pc} -08003e12 : +080032ee : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8003e12: b580 push {r7, lr} - 8003e14: b082 sub sp, #8 - 8003e16: af00 add r7, sp, #0 - 8003e18: 6078 str r0, [r7, #4] + 80032ee: b580 push {r7, lr} + 80032f0: b082 sub sp, #8 + 80032f2: af00 add r7, sp, #0 + 80032f4: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 8003e1a: 6878 ldr r0, [r7, #4] - 8003e1c: f7ff ffa2 bl 8003d64 - 8003e20: 4603 mov r3, r0 + 80032f6: 6878 ldr r0, [r7, #4] + 80032f8: f7ff ffa2 bl 8003240 + 80032fc: 4603 mov r3, r0 } - 8003e22: 4618 mov r0, r3 - 8003e24: 3708 adds r7, #8 - 8003e26: 46bd mov sp, r7 - 8003e28: bd80 pop {r7, pc} - ... + 80032fe: 4618 mov r0, r3 + 8003300: 3708 adds r7, #8 + 8003302: 46bd mov sp, r7 + 8003304: bd80 pop {r7, pc} -08003e2c : - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) -{ - 8003e2c: b480 push {r7} - 8003e2e: b085 sub sp, #20 - 8003e30: af00 add r7, sp, #0 - 8003e32: 6078 str r0, [r7, #4] - uint32_t tmp = 0U; - 8003e34: 2300 movs r3, #0 - 8003e36: 60fb str r3, [r7, #12] - - /* Check the DMA handle allocation */ - if(hdma == NULL) - 8003e38: 687b ldr r3, [r7, #4] - 8003e3a: 2b00 cmp r3, #0 - 8003e3c: d101 bne.n 8003e42 - { - return HAL_ERROR; - 8003e3e: 2301 movs r3, #1 - 8003e40: e043 b.n 8003eca - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2; - hdma->DmaBaseAddress = DMA2; - } -#else - /* DMA1 */ - hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; - 8003e42: 687b ldr r3, [r7, #4] - 8003e44: 681b ldr r3, [r3, #0] - 8003e46: 461a mov r2, r3 - 8003e48: 4b22 ldr r3, [pc, #136] @ (8003ed4 ) - 8003e4a: 4413 add r3, r2 - 8003e4c: 4a22 ldr r2, [pc, #136] @ (8003ed8 ) - 8003e4e: fba2 2303 umull r2, r3, r2, r3 - 8003e52: 091b lsrs r3, r3, #4 - 8003e54: 009a lsls r2, r3, #2 - 8003e56: 687b ldr r3, [r7, #4] - 8003e58: 641a str r2, [r3, #64] @ 0x40 - hdma->DmaBaseAddress = DMA1; - 8003e5a: 687b ldr r3, [r7, #4] - 8003e5c: 4a1f ldr r2, [pc, #124] @ (8003edc ) - 8003e5e: 63da str r2, [r3, #60] @ 0x3c -#endif /* DMA2 */ - - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - 8003e60: 687b ldr r3, [r7, #4] - 8003e62: 2202 movs r2, #2 - 8003e64: f883 2021 strb.w r2, [r3, #33] @ 0x21 - - /* Get the CR register value */ - tmp = hdma->Instance->CCR; - 8003e68: 687b ldr r3, [r7, #4] - 8003e6a: 681b ldr r3, [r3, #0] - 8003e6c: 681b ldr r3, [r3, #0] - 8003e6e: 60fb str r3, [r7, #12] - - /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ - tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ - 8003e70: 68fb ldr r3, [r7, #12] - 8003e72: f423 537f bic.w r3, r3, #16320 @ 0x3fc0 - 8003e76: f023 0330 bic.w r3, r3, #48 @ 0x30 - 8003e7a: 60fb str r3, [r7, #12] - DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ - DMA_CCR_DIR)); - - /* Prepare the DMA Channel configuration */ - tmp |= hdma->Init.Direction | - 8003e7c: 687b ldr r3, [r7, #4] - 8003e7e: 685a ldr r2, [r3, #4] - hdma->Init.PeriphInc | hdma->Init.MemInc | - 8003e80: 687b ldr r3, [r7, #4] - 8003e82: 689b ldr r3, [r3, #8] - tmp |= hdma->Init.Direction | - 8003e84: 431a orrs r2, r3 - hdma->Init.PeriphInc | hdma->Init.MemInc | - 8003e86: 687b ldr r3, [r7, #4] - 8003e88: 68db ldr r3, [r3, #12] - 8003e8a: 431a orrs r2, r3 - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8003e8c: 687b ldr r3, [r7, #4] - 8003e8e: 691b ldr r3, [r3, #16] - hdma->Init.PeriphInc | hdma->Init.MemInc | - 8003e90: 431a orrs r2, r3 - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8003e92: 687b ldr r3, [r7, #4] - 8003e94: 695b ldr r3, [r3, #20] - 8003e96: 431a orrs r2, r3 - hdma->Init.Mode | hdma->Init.Priority; - 8003e98: 687b ldr r3, [r7, #4] - 8003e9a: 699b ldr r3, [r3, #24] - hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8003e9c: 431a orrs r2, r3 - hdma->Init.Mode | hdma->Init.Priority; - 8003e9e: 687b ldr r3, [r7, #4] - 8003ea0: 69db ldr r3, [r3, #28] - 8003ea2: 4313 orrs r3, r2 - tmp |= hdma->Init.Direction | - 8003ea4: 68fa ldr r2, [r7, #12] - 8003ea6: 4313 orrs r3, r2 - 8003ea8: 60fb str r3, [r7, #12] - - /* Write to DMA Channel CR register */ - hdma->Instance->CCR = tmp; - 8003eaa: 687b ldr r3, [r7, #4] - 8003eac: 681b ldr r3, [r3, #0] - 8003eae: 68fa ldr r2, [r7, #12] - 8003eb0: 601a str r2, [r3, #0] - - /* Initialise the error code */ - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 8003eb2: 687b ldr r3, [r7, #4] - 8003eb4: 2200 movs r2, #0 - 8003eb6: 639a str r2, [r3, #56] @ 0x38 - - /* Initialize the DMA state*/ - hdma->State = HAL_DMA_STATE_READY; - 8003eb8: 687b ldr r3, [r7, #4] - 8003eba: 2201 movs r2, #1 - 8003ebc: f883 2021 strb.w r2, [r3, #33] @ 0x21 - /* Allocate lock resource and initialize it */ - hdma->Lock = HAL_UNLOCKED; - 8003ec0: 687b ldr r3, [r7, #4] - 8003ec2: 2200 movs r2, #0 - 8003ec4: f883 2020 strb.w r2, [r3, #32] - - return HAL_OK; - 8003ec8: 2300 movs r3, #0 -} - 8003eca: 4618 mov r0, r3 - 8003ecc: 3714 adds r7, #20 - 8003ece: 46bd mov sp, r7 - 8003ed0: bc80 pop {r7} - 8003ed2: 4770 bx lr - 8003ed4: bffdfff8 .word 0xbffdfff8 - 8003ed8: cccccccd .word 0xcccccccd - 8003edc: 40020000 .word 0x40020000 - -08003ee0 : - * @param DstAddress: The destination memory Buffer address - * @param DataLength: The length of data to be transferred from source to destination - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ - 8003ee0: b580 push {r7, lr} - 8003ee2: b086 sub sp, #24 - 8003ee4: af00 add r7, sp, #0 - 8003ee6: 60f8 str r0, [r7, #12] - 8003ee8: 60b9 str r1, [r7, #8] - 8003eea: 607a str r2, [r7, #4] - 8003eec: 603b str r3, [r7, #0] - HAL_StatusTypeDef status = HAL_OK; - 8003eee: 2300 movs r3, #0 - 8003ef0: 75fb strb r3, [r7, #23] - - /* Check the parameters */ - assert_param(IS_DMA_BUFFER_SIZE(DataLength)); - - /* Process locked */ - __HAL_LOCK(hdma); - 8003ef2: 68fb ldr r3, [r7, #12] - 8003ef4: f893 3020 ldrb.w r3, [r3, #32] - 8003ef8: 2b01 cmp r3, #1 - 8003efa: d101 bne.n 8003f00 - 8003efc: 2302 movs r3, #2 - 8003efe: e04b b.n 8003f98 - 8003f00: 68fb ldr r3, [r7, #12] - 8003f02: 2201 movs r2, #1 - 8003f04: f883 2020 strb.w r2, [r3, #32] - - if(HAL_DMA_STATE_READY == hdma->State) - 8003f08: 68fb ldr r3, [r7, #12] - 8003f0a: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 - 8003f0e: b2db uxtb r3, r3 - 8003f10: 2b01 cmp r3, #1 - 8003f12: d13a bne.n 8003f8a - { - /* Change DMA peripheral state */ - hdma->State = HAL_DMA_STATE_BUSY; - 8003f14: 68fb ldr r3, [r7, #12] - 8003f16: 2202 movs r2, #2 - 8003f18: f883 2021 strb.w r2, [r3, #33] @ 0x21 - hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 8003f1c: 68fb ldr r3, [r7, #12] - 8003f1e: 2200 movs r2, #0 - 8003f20: 639a str r2, [r3, #56] @ 0x38 - - /* Disable the peripheral */ - __HAL_DMA_DISABLE(hdma); - 8003f22: 68fb ldr r3, [r7, #12] - 8003f24: 681b ldr r3, [r3, #0] - 8003f26: 681a ldr r2, [r3, #0] - 8003f28: 68fb ldr r3, [r7, #12] - 8003f2a: 681b ldr r3, [r3, #0] - 8003f2c: f022 0201 bic.w r2, r2, #1 - 8003f30: 601a str r2, [r3, #0] - - /* Configure the source, destination address and the data length & clear flags*/ - DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); - 8003f32: 683b ldr r3, [r7, #0] - 8003f34: 687a ldr r2, [r7, #4] - 8003f36: 68b9 ldr r1, [r7, #8] - 8003f38: 68f8 ldr r0, [r7, #12] - 8003f3a: f000 f9eb bl 8004314 - - /* Enable the transfer complete interrupt */ - /* Enable the transfer Error interrupt */ - if(NULL != hdma->XferHalfCpltCallback) - 8003f3e: 68fb ldr r3, [r7, #12] - 8003f40: 6adb ldr r3, [r3, #44] @ 0x2c - 8003f42: 2b00 cmp r3, #0 - 8003f44: d008 beq.n 8003f58 - { - /* Enable the Half transfer complete interrupt as well */ - __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8003f46: 68fb ldr r3, [r7, #12] - 8003f48: 681b ldr r3, [r3, #0] - 8003f4a: 681a ldr r2, [r3, #0] - 8003f4c: 68fb ldr r3, [r7, #12] - 8003f4e: 681b ldr r3, [r3, #0] - 8003f50: f042 020e orr.w r2, r2, #14 - 8003f54: 601a str r2, [r3, #0] - 8003f56: e00f b.n 8003f78 - } - else - { - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - 8003f58: 68fb ldr r3, [r7, #12] - 8003f5a: 681b ldr r3, [r3, #0] - 8003f5c: 681a ldr r2, [r3, #0] - 8003f5e: 68fb ldr r3, [r7, #12] - 8003f60: 681b ldr r3, [r3, #0] - 8003f62: f022 0204 bic.w r2, r2, #4 - 8003f66: 601a str r2, [r3, #0] - __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE)); - 8003f68: 68fb ldr r3, [r7, #12] - 8003f6a: 681b ldr r3, [r3, #0] - 8003f6c: 681a ldr r2, [r3, #0] - 8003f6e: 68fb ldr r3, [r7, #12] - 8003f70: 681b ldr r3, [r3, #0] - 8003f72: f042 020a orr.w r2, r2, #10 - 8003f76: 601a str r2, [r3, #0] - } - /* Enable the Peripheral */ - __HAL_DMA_ENABLE(hdma); - 8003f78: 68fb ldr r3, [r7, #12] - 8003f7a: 681b ldr r3, [r3, #0] - 8003f7c: 681a ldr r2, [r3, #0] - 8003f7e: 68fb ldr r3, [r7, #12] - 8003f80: 681b ldr r3, [r3, #0] - 8003f82: f042 0201 orr.w r2, r2, #1 - 8003f86: 601a str r2, [r3, #0] - 8003f88: e005 b.n 8003f96 - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8003f8a: 68fb ldr r3, [r7, #12] - 8003f8c: 2200 movs r2, #0 - 8003f8e: f883 2020 strb.w r2, [r3, #32] - - /* Remain BUSY */ - status = HAL_BUSY; - 8003f92: 2302 movs r3, #2 - 8003f94: 75fb strb r3, [r7, #23] - } - return status; - 8003f96: 7dfb ldrb r3, [r7, #23] -} - 8003f98: 4618 mov r0, r3 - 8003f9a: 3718 adds r7, #24 - 8003f9c: 46bd mov sp, r7 - 8003f9e: bd80 pop {r7, pc} - -08003fa0 : +08003306 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { - 8003fa0: b480 push {r7} - 8003fa2: b085 sub sp, #20 - 8003fa4: af00 add r7, sp, #0 - 8003fa6: 6078 str r0, [r7, #4] + 8003306: b480 push {r7} + 8003308: b085 sub sp, #20 + 800330a: af00 add r7, sp, #0 + 800330c: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8003fa8: 2300 movs r3, #0 - 8003faa: 73fb strb r3, [r7, #15] + 800330e: 2300 movs r3, #0 + 8003310: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) - 8003fac: 687b ldr r3, [r7, #4] - 8003fae: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 - 8003fb2: b2db uxtb r3, r3 - 8003fb4: 2b02 cmp r3, #2 - 8003fb6: d008 beq.n 8003fca + 8003312: 687b ldr r3, [r7, #4] + 8003314: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 + 8003318: b2db uxtb r3, r3 + 800331a: 2b02 cmp r3, #2 + 800331c: d008 beq.n 8003330 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8003fb8: 687b ldr r3, [r7, #4] - 8003fba: 2204 movs r2, #4 - 8003fbc: 639a str r2, [r3, #56] @ 0x38 + 800331e: 687b ldr r3, [r7, #4] + 8003320: 2204 movs r2, #4 + 8003322: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8003fbe: 687b ldr r3, [r7, #4] - 8003fc0: 2200 movs r2, #0 - 8003fc2: f883 2020 strb.w r2, [r3, #32] + 8003324: 687b ldr r3, [r7, #4] + 8003326: 2200 movs r2, #0 + 8003328: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; - 8003fc6: 2301 movs r3, #1 - 8003fc8: e020 b.n 800400c + 800332c: 2301 movs r3, #1 + 800332e: e020 b.n 8003372 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8003fca: 687b ldr r3, [r7, #4] - 8003fcc: 681b ldr r3, [r3, #0] - 8003fce: 681a ldr r2, [r3, #0] - 8003fd0: 687b ldr r3, [r7, #4] - 8003fd2: 681b ldr r3, [r3, #0] - 8003fd4: f022 020e bic.w r2, r2, #14 - 8003fd8: 601a str r2, [r3, #0] + 8003330: 687b ldr r3, [r7, #4] + 8003332: 681b ldr r3, [r3, #0] + 8003334: 681a ldr r2, [r3, #0] + 8003336: 687b ldr r3, [r7, #4] + 8003338: 681b ldr r3, [r3, #0] + 800333a: f022 020e bic.w r2, r2, #14 + 800333e: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 8003fda: 687b ldr r3, [r7, #4] - 8003fdc: 681b ldr r3, [r3, #0] - 8003fde: 681a ldr r2, [r3, #0] - 8003fe0: 687b ldr r3, [r7, #4] - 8003fe2: 681b ldr r3, [r3, #0] - 8003fe4: f022 0201 bic.w r2, r2, #1 - 8003fe8: 601a str r2, [r3, #0] + 8003340: 687b ldr r3, [r7, #4] + 8003342: 681b ldr r3, [r3, #0] + 8003344: 681a ldr r2, [r3, #0] + 8003346: 687b ldr r3, [r7, #4] + 8003348: 681b ldr r3, [r3, #0] + 800334a: f022 0201 bic.w r2, r2, #1 + 800334e: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - 8003fea: 687b ldr r3, [r7, #4] - 8003fec: 6c1a ldr r2, [r3, #64] @ 0x40 - 8003fee: 687b ldr r3, [r7, #4] - 8003ff0: 6bdb ldr r3, [r3, #60] @ 0x3c - 8003ff2: 2101 movs r1, #1 - 8003ff4: fa01 f202 lsl.w r2, r1, r2 - 8003ff8: 605a str r2, [r3, #4] + 8003350: 687b ldr r3, [r7, #4] + 8003352: 6c1a ldr r2, [r3, #64] @ 0x40 + 8003354: 687b ldr r3, [r7, #4] + 8003356: 6bdb ldr r3, [r3, #60] @ 0x3c + 8003358: 2101 movs r1, #1 + 800335a: fa01 f202 lsl.w r2, r1, r2 + 800335e: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8003ffa: 687b ldr r3, [r7, #4] - 8003ffc: 2201 movs r2, #1 - 8003ffe: f883 2021 strb.w r2, [r3, #33] @ 0x21 + 8003360: 687b ldr r3, [r7, #4] + 8003362: 2201 movs r2, #1 + 8003364: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8004002: 687b ldr r3, [r7, #4] - 8004004: 2200 movs r2, #0 - 8004006: f883 2020 strb.w r2, [r3, #32] + 8003368: 687b ldr r3, [r7, #4] + 800336a: 2200 movs r2, #0 + 800336c: f883 2020 strb.w r2, [r3, #32] return status; - 800400a: 7bfb ldrb r3, [r7, #15] + 8003370: 7bfb ldrb r3, [r7, #15] } - 800400c: 4618 mov r0, r3 - 800400e: 3714 adds r7, #20 - 8004010: 46bd mov sp, r7 - 8004012: bc80 pop {r7} - 8004014: 4770 bx lr - ... + 8003372: 4618 mov r0, r3 + 8003374: 3714 adds r7, #20 + 8003376: 46bd mov sp, r7 + 8003378: bc80 pop {r7} + 800337a: 4770 bx lr -08004018 : +0800337c : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { - 8004018: b580 push {r7, lr} - 800401a: b084 sub sp, #16 - 800401c: af00 add r7, sp, #0 - 800401e: 6078 str r0, [r7, #4] + 800337c: b580 push {r7, lr} + 800337e: b084 sub sp, #16 + 8003380: af00 add r7, sp, #0 + 8003382: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8004020: 2300 movs r3, #0 - 8004022: 73fb strb r3, [r7, #15] + 8003384: 2300 movs r3, #0 + 8003386: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) - 8004024: 687b ldr r3, [r7, #4] - 8004026: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 - 800402a: b2db uxtb r3, r3 - 800402c: 2b02 cmp r3, #2 - 800402e: d005 beq.n 800403c + 8003388: 687b ldr r3, [r7, #4] + 800338a: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 + 800338e: b2db uxtb r3, r3 + 8003390: 2b02 cmp r3, #2 + 8003392: d005 beq.n 80033a0 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8004030: 687b ldr r3, [r7, #4] - 8004032: 2204 movs r2, #4 - 8004034: 639a str r2, [r3, #56] @ 0x38 + 8003394: 687b ldr r3, [r7, #4] + 8003396: 2204 movs r2, #4 + 8003398: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; - 8004036: 2301 movs r3, #1 - 8004038: 73fb strb r3, [r7, #15] - 800403a: e051 b.n 80040e0 + 800339a: 2301 movs r3, #1 + 800339c: 73fb strb r3, [r7, #15] + 800339e: e051 b.n 8003444 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 800403c: 687b ldr r3, [r7, #4] - 800403e: 681b ldr r3, [r3, #0] - 8004040: 681a ldr r2, [r3, #0] - 8004042: 687b ldr r3, [r7, #4] - 8004044: 681b ldr r3, [r3, #0] - 8004046: f022 020e bic.w r2, r2, #14 - 800404a: 601a str r2, [r3, #0] + 80033a0: 687b ldr r3, [r7, #4] + 80033a2: 681b ldr r3, [r3, #0] + 80033a4: 681a ldr r2, [r3, #0] + 80033a6: 687b ldr r3, [r7, #4] + 80033a8: 681b ldr r3, [r3, #0] + 80033aa: f022 020e bic.w r2, r2, #14 + 80033ae: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 800404c: 687b ldr r3, [r7, #4] - 800404e: 681b ldr r3, [r3, #0] - 8004050: 681a ldr r2, [r3, #0] - 8004052: 687b ldr r3, [r7, #4] - 8004054: 681b ldr r3, [r3, #0] - 8004056: f022 0201 bic.w r2, r2, #1 - 800405a: 601a str r2, [r3, #0] + 80033b0: 687b ldr r3, [r7, #4] + 80033b2: 681b ldr r3, [r3, #0] + 80033b4: 681a ldr r2, [r3, #0] + 80033b6: 687b ldr r3, [r7, #4] + 80033b8: 681b ldr r3, [r3, #0] + 80033ba: f022 0201 bic.w r2, r2, #1 + 80033be: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); - 800405c: 687b ldr r3, [r7, #4] - 800405e: 681b ldr r3, [r3, #0] - 8004060: 4a22 ldr r2, [pc, #136] @ (80040ec ) - 8004062: 4293 cmp r3, r2 - 8004064: d029 beq.n 80040ba - 8004066: 687b ldr r3, [r7, #4] - 8004068: 681b ldr r3, [r3, #0] - 800406a: 4a21 ldr r2, [pc, #132] @ (80040f0 ) - 800406c: 4293 cmp r3, r2 - 800406e: d022 beq.n 80040b6 - 8004070: 687b ldr r3, [r7, #4] - 8004072: 681b ldr r3, [r3, #0] - 8004074: 4a1f ldr r2, [pc, #124] @ (80040f4 ) - 8004076: 4293 cmp r3, r2 - 8004078: d01a beq.n 80040b0 - 800407a: 687b ldr r3, [r7, #4] - 800407c: 681b ldr r3, [r3, #0] - 800407e: 4a1e ldr r2, [pc, #120] @ (80040f8 ) - 8004080: 4293 cmp r3, r2 - 8004082: d012 beq.n 80040aa - 8004084: 687b ldr r3, [r7, #4] - 8004086: 681b ldr r3, [r3, #0] - 8004088: 4a1c ldr r2, [pc, #112] @ (80040fc ) - 800408a: 4293 cmp r3, r2 - 800408c: d00a beq.n 80040a4 - 800408e: 687b ldr r3, [r7, #4] - 8004090: 681b ldr r3, [r3, #0] - 8004092: 4a1b ldr r2, [pc, #108] @ (8004100 ) - 8004094: 4293 cmp r3, r2 - 8004096: d102 bne.n 800409e - 8004098: f44f 1380 mov.w r3, #1048576 @ 0x100000 - 800409c: e00e b.n 80040bc - 800409e: f04f 7380 mov.w r3, #16777216 @ 0x1000000 - 80040a2: e00b b.n 80040bc - 80040a4: f44f 3380 mov.w r3, #65536 @ 0x10000 - 80040a8: e008 b.n 80040bc - 80040aa: f44f 5380 mov.w r3, #4096 @ 0x1000 - 80040ae: e005 b.n 80040bc - 80040b0: f44f 7380 mov.w r3, #256 @ 0x100 - 80040b4: e002 b.n 80040bc - 80040b6: 2310 movs r3, #16 - 80040b8: e000 b.n 80040bc - 80040ba: 2301 movs r3, #1 - 80040bc: 4a11 ldr r2, [pc, #68] @ (8004104 ) - 80040be: 6053 str r3, [r2, #4] + 80033c0: 687b ldr r3, [r7, #4] + 80033c2: 681b ldr r3, [r3, #0] + 80033c4: 4a22 ldr r2, [pc, #136] @ (8003450 ) + 80033c6: 4293 cmp r3, r2 + 80033c8: d029 beq.n 800341e + 80033ca: 687b ldr r3, [r7, #4] + 80033cc: 681b ldr r3, [r3, #0] + 80033ce: 4a21 ldr r2, [pc, #132] @ (8003454 ) + 80033d0: 4293 cmp r3, r2 + 80033d2: d022 beq.n 800341a + 80033d4: 687b ldr r3, [r7, #4] + 80033d6: 681b ldr r3, [r3, #0] + 80033d8: 4a1f ldr r2, [pc, #124] @ (8003458 ) + 80033da: 4293 cmp r3, r2 + 80033dc: d01a beq.n 8003414 + 80033de: 687b ldr r3, [r7, #4] + 80033e0: 681b ldr r3, [r3, #0] + 80033e2: 4a1e ldr r2, [pc, #120] @ (800345c ) + 80033e4: 4293 cmp r3, r2 + 80033e6: d012 beq.n 800340e + 80033e8: 687b ldr r3, [r7, #4] + 80033ea: 681b ldr r3, [r3, #0] + 80033ec: 4a1c ldr r2, [pc, #112] @ (8003460 ) + 80033ee: 4293 cmp r3, r2 + 80033f0: d00a beq.n 8003408 + 80033f2: 687b ldr r3, [r7, #4] + 80033f4: 681b ldr r3, [r3, #0] + 80033f6: 4a1b ldr r2, [pc, #108] @ (8003464 ) + 80033f8: 4293 cmp r3, r2 + 80033fa: d102 bne.n 8003402 + 80033fc: f44f 1380 mov.w r3, #1048576 @ 0x100000 + 8003400: e00e b.n 8003420 + 8003402: f04f 7380 mov.w r3, #16777216 @ 0x1000000 + 8003406: e00b b.n 8003420 + 8003408: f44f 3380 mov.w r3, #65536 @ 0x10000 + 800340c: e008 b.n 8003420 + 800340e: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8003412: e005 b.n 8003420 + 8003414: f44f 7380 mov.w r3, #256 @ 0x100 + 8003418: e002 b.n 8003420 + 800341a: 2310 movs r3, #16 + 800341c: e000 b.n 8003420 + 800341e: 2301 movs r3, #1 + 8003420: 4a11 ldr r2, [pc, #68] @ (8003468 ) + 8003422: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 80040c0: 687b ldr r3, [r7, #4] - 80040c2: 2201 movs r2, #1 - 80040c4: f883 2021 strb.w r2, [r3, #33] @ 0x21 + 8003424: 687b ldr r3, [r7, #4] + 8003426: 2201 movs r2, #1 + 8003428: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80040c8: 687b ldr r3, [r7, #4] - 80040ca: 2200 movs r2, #0 - 80040cc: f883 2020 strb.w r2, [r3, #32] + 800342c: 687b ldr r3, [r7, #4] + 800342e: 2200 movs r2, #0 + 8003430: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) - 80040d0: 687b ldr r3, [r7, #4] - 80040d2: 6b5b ldr r3, [r3, #52] @ 0x34 - 80040d4: 2b00 cmp r3, #0 - 80040d6: d003 beq.n 80040e0 + 8003434: 687b ldr r3, [r7, #4] + 8003436: 6b5b ldr r3, [r3, #52] @ 0x34 + 8003438: 2b00 cmp r3, #0 + 800343a: d003 beq.n 8003444 { hdma->XferAbortCallback(hdma); - 80040d8: 687b ldr r3, [r7, #4] - 80040da: 6b5b ldr r3, [r3, #52] @ 0x34 - 80040dc: 6878 ldr r0, [r7, #4] - 80040de: 4798 blx r3 + 800343c: 687b ldr r3, [r7, #4] + 800343e: 6b5b ldr r3, [r3, #52] @ 0x34 + 8003440: 6878 ldr r0, [r7, #4] + 8003442: 4798 blx r3 } } return status; - 80040e0: 7bfb ldrb r3, [r7, #15] + 8003444: 7bfb ldrb r3, [r7, #15] } - 80040e2: 4618 mov r0, r3 - 80040e4: 3710 adds r7, #16 - 80040e6: 46bd mov sp, r7 - 80040e8: bd80 pop {r7, pc} - 80040ea: bf00 nop - 80040ec: 40020008 .word 0x40020008 - 80040f0: 4002001c .word 0x4002001c - 80040f4: 40020030 .word 0x40020030 - 80040f8: 40020044 .word 0x40020044 - 80040fc: 40020058 .word 0x40020058 - 8004100: 4002006c .word 0x4002006c - 8004104: 40020000 .word 0x40020000 + 8003446: 4618 mov r0, r3 + 8003448: 3710 adds r7, #16 + 800344a: 46bd mov sp, r7 + 800344c: bd80 pop {r7, pc} + 800344e: bf00 nop + 8003450: 40020008 .word 0x40020008 + 8003454: 4002001c .word 0x4002001c + 8003458: 40020030 .word 0x40020030 + 800345c: 40020044 .word 0x40020044 + 8003460: 40020058 .word 0x40020058 + 8003464: 4002006c .word 0x4002006c + 8003468: 40020000 .word 0x40020000 -08004108 : - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA Channel. - * @retval None - */ -void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) -{ - 8004108: b580 push {r7, lr} - 800410a: b084 sub sp, #16 - 800410c: af00 add r7, sp, #0 - 800410e: 6078 str r0, [r7, #4] - uint32_t flag_it = hdma->DmaBaseAddress->ISR; - 8004110: 687b ldr r3, [r7, #4] - 8004112: 6bdb ldr r3, [r3, #60] @ 0x3c - 8004114: 681b ldr r3, [r3, #0] - 8004116: 60fb str r3, [r7, #12] - uint32_t source_it = hdma->Instance->CCR; - 8004118: 687b ldr r3, [r7, #4] - 800411a: 681b ldr r3, [r3, #0] - 800411c: 681b ldr r3, [r3, #0] - 800411e: 60bb str r3, [r7, #8] - - /* Half Transfer Complete Interrupt management ******************************/ - if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET)) - 8004120: 687b ldr r3, [r7, #4] - 8004122: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004124: 2204 movs r2, #4 - 8004126: 409a lsls r2, r3 - 8004128: 68fb ldr r3, [r7, #12] - 800412a: 4013 ands r3, r2 - 800412c: 2b00 cmp r3, #0 - 800412e: d04f beq.n 80041d0 - 8004130: 68bb ldr r3, [r7, #8] - 8004132: f003 0304 and.w r3, r3, #4 - 8004136: 2b00 cmp r3, #0 - 8004138: d04a beq.n 80041d0 - { - /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ - if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 800413a: 687b ldr r3, [r7, #4] - 800413c: 681b ldr r3, [r3, #0] - 800413e: 681b ldr r3, [r3, #0] - 8004140: f003 0320 and.w r3, r3, #32 - 8004144: 2b00 cmp r3, #0 - 8004146: d107 bne.n 8004158 - { - /* Disable the half transfer interrupt */ - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - 8004148: 687b ldr r3, [r7, #4] - 800414a: 681b ldr r3, [r3, #0] - 800414c: 681a ldr r2, [r3, #0] - 800414e: 687b ldr r3, [r7, #4] - 8004150: 681b ldr r3, [r3, #0] - 8004152: f022 0204 bic.w r2, r2, #4 - 8004156: 601a str r2, [r3, #0] - } - /* Clear the half transfer complete flag */ - __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); - 8004158: 687b ldr r3, [r7, #4] - 800415a: 681b ldr r3, [r3, #0] - 800415c: 4a66 ldr r2, [pc, #408] @ (80042f8 ) - 800415e: 4293 cmp r3, r2 - 8004160: d029 beq.n 80041b6 - 8004162: 687b ldr r3, [r7, #4] - 8004164: 681b ldr r3, [r3, #0] - 8004166: 4a65 ldr r2, [pc, #404] @ (80042fc ) - 8004168: 4293 cmp r3, r2 - 800416a: d022 beq.n 80041b2 - 800416c: 687b ldr r3, [r7, #4] - 800416e: 681b ldr r3, [r3, #0] - 8004170: 4a63 ldr r2, [pc, #396] @ (8004300 ) - 8004172: 4293 cmp r3, r2 - 8004174: d01a beq.n 80041ac - 8004176: 687b ldr r3, [r7, #4] - 8004178: 681b ldr r3, [r3, #0] - 800417a: 4a62 ldr r2, [pc, #392] @ (8004304 ) - 800417c: 4293 cmp r3, r2 - 800417e: d012 beq.n 80041a6 - 8004180: 687b ldr r3, [r7, #4] - 8004182: 681b ldr r3, [r3, #0] - 8004184: 4a60 ldr r2, [pc, #384] @ (8004308 ) - 8004186: 4293 cmp r3, r2 - 8004188: d00a beq.n 80041a0 - 800418a: 687b ldr r3, [r7, #4] - 800418c: 681b ldr r3, [r3, #0] - 800418e: 4a5f ldr r2, [pc, #380] @ (800430c ) - 8004190: 4293 cmp r3, r2 - 8004192: d102 bne.n 800419a - 8004194: f44f 0380 mov.w r3, #4194304 @ 0x400000 - 8004198: e00e b.n 80041b8 - 800419a: f04f 6380 mov.w r3, #67108864 @ 0x4000000 - 800419e: e00b b.n 80041b8 - 80041a0: f44f 2380 mov.w r3, #262144 @ 0x40000 - 80041a4: e008 b.n 80041b8 - 80041a6: f44f 4380 mov.w r3, #16384 @ 0x4000 - 80041aa: e005 b.n 80041b8 - 80041ac: f44f 6380 mov.w r3, #1024 @ 0x400 - 80041b0: e002 b.n 80041b8 - 80041b2: 2340 movs r3, #64 @ 0x40 - 80041b4: e000 b.n 80041b8 - 80041b6: 2304 movs r3, #4 - 80041b8: 4a55 ldr r2, [pc, #340] @ (8004310 ) - 80041ba: 6053 str r3, [r2, #4] - - /* DMA peripheral state is not updated in Half Transfer */ - /* but in Transfer Complete case */ - - if(hdma->XferHalfCpltCallback != NULL) - 80041bc: 687b ldr r3, [r7, #4] - 80041be: 6adb ldr r3, [r3, #44] @ 0x2c - 80041c0: 2b00 cmp r3, #0 - 80041c2: f000 8094 beq.w 80042ee - { - /* Half transfer callback */ - hdma->XferHalfCpltCallback(hdma); - 80041c6: 687b ldr r3, [r7, #4] - 80041c8: 6adb ldr r3, [r3, #44] @ 0x2c - 80041ca: 6878 ldr r0, [r7, #4] - 80041cc: 4798 blx r3 - if(hdma->XferHalfCpltCallback != NULL) - 80041ce: e08e b.n 80042ee - } - } - - /* Transfer Complete Interrupt management ***********************************/ - else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET)) - 80041d0: 687b ldr r3, [r7, #4] - 80041d2: 6c1b ldr r3, [r3, #64] @ 0x40 - 80041d4: 2202 movs r2, #2 - 80041d6: 409a lsls r2, r3 - 80041d8: 68fb ldr r3, [r7, #12] - 80041da: 4013 ands r3, r2 - 80041dc: 2b00 cmp r3, #0 - 80041de: d056 beq.n 800428e - 80041e0: 68bb ldr r3, [r7, #8] - 80041e2: f003 0302 and.w r3, r3, #2 - 80041e6: 2b00 cmp r3, #0 - 80041e8: d051 beq.n 800428e - { - if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 80041ea: 687b ldr r3, [r7, #4] - 80041ec: 681b ldr r3, [r3, #0] - 80041ee: 681b ldr r3, [r3, #0] - 80041f0: f003 0320 and.w r3, r3, #32 - 80041f4: 2b00 cmp r3, #0 - 80041f6: d10b bne.n 8004210 - { - /* Disable the transfer complete and error interrupt */ - __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); - 80041f8: 687b ldr r3, [r7, #4] - 80041fa: 681b ldr r3, [r3, #0] - 80041fc: 681a ldr r2, [r3, #0] - 80041fe: 687b ldr r3, [r7, #4] - 8004200: 681b ldr r3, [r3, #0] - 8004202: f022 020a bic.w r2, r2, #10 - 8004206: 601a str r2, [r3, #0] - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 8004208: 687b ldr r3, [r7, #4] - 800420a: 2201 movs r2, #1 - 800420c: f883 2021 strb.w r2, [r3, #33] @ 0x21 - } - /* Clear the transfer complete flag */ - __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma)); - 8004210: 687b ldr r3, [r7, #4] - 8004212: 681b ldr r3, [r3, #0] - 8004214: 4a38 ldr r2, [pc, #224] @ (80042f8 ) - 8004216: 4293 cmp r3, r2 - 8004218: d029 beq.n 800426e - 800421a: 687b ldr r3, [r7, #4] - 800421c: 681b ldr r3, [r3, #0] - 800421e: 4a37 ldr r2, [pc, #220] @ (80042fc ) - 8004220: 4293 cmp r3, r2 - 8004222: d022 beq.n 800426a - 8004224: 687b ldr r3, [r7, #4] - 8004226: 681b ldr r3, [r3, #0] - 8004228: 4a35 ldr r2, [pc, #212] @ (8004300 ) - 800422a: 4293 cmp r3, r2 - 800422c: d01a beq.n 8004264 - 800422e: 687b ldr r3, [r7, #4] - 8004230: 681b ldr r3, [r3, #0] - 8004232: 4a34 ldr r2, [pc, #208] @ (8004304 ) - 8004234: 4293 cmp r3, r2 - 8004236: d012 beq.n 800425e - 8004238: 687b ldr r3, [r7, #4] - 800423a: 681b ldr r3, [r3, #0] - 800423c: 4a32 ldr r2, [pc, #200] @ (8004308 ) - 800423e: 4293 cmp r3, r2 - 8004240: d00a beq.n 8004258 - 8004242: 687b ldr r3, [r7, #4] - 8004244: 681b ldr r3, [r3, #0] - 8004246: 4a31 ldr r2, [pc, #196] @ (800430c ) - 8004248: 4293 cmp r3, r2 - 800424a: d102 bne.n 8004252 - 800424c: f44f 1300 mov.w r3, #2097152 @ 0x200000 - 8004250: e00e b.n 8004270 - 8004252: f04f 7300 mov.w r3, #33554432 @ 0x2000000 - 8004256: e00b b.n 8004270 - 8004258: f44f 3300 mov.w r3, #131072 @ 0x20000 - 800425c: e008 b.n 8004270 - 800425e: f44f 5300 mov.w r3, #8192 @ 0x2000 - 8004262: e005 b.n 8004270 - 8004264: f44f 7300 mov.w r3, #512 @ 0x200 - 8004268: e002 b.n 8004270 - 800426a: 2320 movs r3, #32 - 800426c: e000 b.n 8004270 - 800426e: 2302 movs r3, #2 - 8004270: 4a27 ldr r2, [pc, #156] @ (8004310 ) - 8004272: 6053 str r3, [r2, #4] - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 8004274: 687b ldr r3, [r7, #4] - 8004276: 2200 movs r2, #0 - 8004278: f883 2020 strb.w r2, [r3, #32] - - if(hdma->XferCpltCallback != NULL) - 800427c: 687b ldr r3, [r7, #4] - 800427e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8004280: 2b00 cmp r3, #0 - 8004282: d034 beq.n 80042ee - { - /* Transfer complete callback */ - hdma->XferCpltCallback(hdma); - 8004284: 687b ldr r3, [r7, #4] - 8004286: 6a9b ldr r3, [r3, #40] @ 0x28 - 8004288: 6878 ldr r0, [r7, #4] - 800428a: 4798 blx r3 - if(hdma->XferCpltCallback != NULL) - 800428c: e02f b.n 80042ee - } - } - - /* Transfer Error Interrupt management **************************************/ - else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE))) - 800428e: 687b ldr r3, [r7, #4] - 8004290: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004292: 2208 movs r2, #8 - 8004294: 409a lsls r2, r3 - 8004296: 68fb ldr r3, [r7, #12] - 8004298: 4013 ands r3, r2 - 800429a: 2b00 cmp r3, #0 - 800429c: d028 beq.n 80042f0 - 800429e: 68bb ldr r3, [r7, #8] - 80042a0: f003 0308 and.w r3, r3, #8 - 80042a4: 2b00 cmp r3, #0 - 80042a6: d023 beq.n 80042f0 - { - /* When a DMA transfer error occurs */ - /* A hardware clear of its EN bits is performed */ - /* Disable ALL DMA IT */ - __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 80042a8: 687b ldr r3, [r7, #4] - 80042aa: 681b ldr r3, [r3, #0] - 80042ac: 681a ldr r2, [r3, #0] - 80042ae: 687b ldr r3, [r7, #4] - 80042b0: 681b ldr r3, [r3, #0] - 80042b2: f022 020e bic.w r2, r2, #14 - 80042b6: 601a str r2, [r3, #0] - - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - 80042b8: 687b ldr r3, [r7, #4] - 80042ba: 6c1a ldr r2, [r3, #64] @ 0x40 - 80042bc: 687b ldr r3, [r7, #4] - 80042be: 6bdb ldr r3, [r3, #60] @ 0x3c - 80042c0: 2101 movs r1, #1 - 80042c2: fa01 f202 lsl.w r2, r1, r2 - 80042c6: 605a str r2, [r3, #4] - - /* Update error code */ - hdma->ErrorCode = HAL_DMA_ERROR_TE; - 80042c8: 687b ldr r3, [r7, #4] - 80042ca: 2201 movs r2, #1 - 80042cc: 639a str r2, [r3, #56] @ 0x38 - - /* Change the DMA state */ - hdma->State = HAL_DMA_STATE_READY; - 80042ce: 687b ldr r3, [r7, #4] - 80042d0: 2201 movs r2, #1 - 80042d2: f883 2021 strb.w r2, [r3, #33] @ 0x21 - - /* Process Unlocked */ - __HAL_UNLOCK(hdma); - 80042d6: 687b ldr r3, [r7, #4] - 80042d8: 2200 movs r2, #0 - 80042da: f883 2020 strb.w r2, [r3, #32] - - if (hdma->XferErrorCallback != NULL) - 80042de: 687b ldr r3, [r7, #4] - 80042e0: 6b1b ldr r3, [r3, #48] @ 0x30 - 80042e2: 2b00 cmp r3, #0 - 80042e4: d004 beq.n 80042f0 - { - /* Transfer error callback */ - hdma->XferErrorCallback(hdma); - 80042e6: 687b ldr r3, [r7, #4] - 80042e8: 6b1b ldr r3, [r3, #48] @ 0x30 - 80042ea: 6878 ldr r0, [r7, #4] - 80042ec: 4798 blx r3 - } - } - return; - 80042ee: bf00 nop - 80042f0: bf00 nop -} - 80042f2: 3710 adds r7, #16 - 80042f4: 46bd mov sp, r7 - 80042f6: bd80 pop {r7, pc} - 80042f8: 40020008 .word 0x40020008 - 80042fc: 4002001c .word 0x4002001c - 8004300: 40020030 .word 0x40020030 - 8004304: 40020044 .word 0x40020044 - 8004308: 40020058 .word 0x40020058 - 800430c: 4002006c .word 0x4002006c - 8004310: 40020000 .word 0x40020000 - -08004314 : - * @param DstAddress: The destination memory Buffer address - * @param DataLength: The length of data to be transferred from source to destination - * @retval HAL status - */ -static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) -{ - 8004314: b480 push {r7} - 8004316: b085 sub sp, #20 - 8004318: af00 add r7, sp, #0 - 800431a: 60f8 str r0, [r7, #12] - 800431c: 60b9 str r1, [r7, #8] - 800431e: 607a str r2, [r7, #4] - 8004320: 603b str r3, [r7, #0] - /* Clear all flags */ - hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - 8004322: 68fb ldr r3, [r7, #12] - 8004324: 6c1a ldr r2, [r3, #64] @ 0x40 - 8004326: 68fb ldr r3, [r7, #12] - 8004328: 6bdb ldr r3, [r3, #60] @ 0x3c - 800432a: 2101 movs r1, #1 - 800432c: fa01 f202 lsl.w r2, r1, r2 - 8004330: 605a str r2, [r3, #4] - - /* Configure DMA Channel data length */ - hdma->Instance->CNDTR = DataLength; - 8004332: 68fb ldr r3, [r7, #12] - 8004334: 681b ldr r3, [r3, #0] - 8004336: 683a ldr r2, [r7, #0] - 8004338: 605a str r2, [r3, #4] - - /* Memory to Peripheral */ - if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) - 800433a: 68fb ldr r3, [r7, #12] - 800433c: 685b ldr r3, [r3, #4] - 800433e: 2b10 cmp r3, #16 - 8004340: d108 bne.n 8004354 - { - /* Configure DMA Channel destination address */ - hdma->Instance->CPAR = DstAddress; - 8004342: 68fb ldr r3, [r7, #12] - 8004344: 681b ldr r3, [r3, #0] - 8004346: 687a ldr r2, [r7, #4] - 8004348: 609a str r2, [r3, #8] - - /* Configure DMA Channel source address */ - hdma->Instance->CMAR = SrcAddress; - 800434a: 68fb ldr r3, [r7, #12] - 800434c: 681b ldr r3, [r3, #0] - 800434e: 68ba ldr r2, [r7, #8] - 8004350: 60da str r2, [r3, #12] - hdma->Instance->CPAR = SrcAddress; - - /* Configure DMA Channel destination address */ - hdma->Instance->CMAR = DstAddress; - } -} - 8004352: e007 b.n 8004364 - hdma->Instance->CPAR = SrcAddress; - 8004354: 68fb ldr r3, [r7, #12] - 8004356: 681b ldr r3, [r3, #0] - 8004358: 68ba ldr r2, [r7, #8] - 800435a: 609a str r2, [r3, #8] - hdma->Instance->CMAR = DstAddress; - 800435c: 68fb ldr r3, [r7, #12] - 800435e: 681b ldr r3, [r3, #0] - 8004360: 687a ldr r2, [r7, #4] - 8004362: 60da str r2, [r3, #12] -} - 8004364: bf00 nop - 8004366: 3714 adds r7, #20 - 8004368: 46bd mov sp, r7 - 800436a: bc80 pop {r7} - 800436c: 4770 bx lr - ... - -08004370 : +0800346c : * @param Data: Specifies the data to be programmed * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) { - 8004370: b5f0 push {r4, r5, r6, r7, lr} - 8004372: b087 sub sp, #28 - 8004374: af00 add r7, sp, #0 - 8004376: 60f8 str r0, [r7, #12] - 8004378: 60b9 str r1, [r7, #8] - 800437a: e9c7 2300 strd r2, r3, [r7] + 800346c: b5f0 push {r4, r5, r6, r7, lr} + 800346e: b087 sub sp, #28 + 8003470: af00 add r7, sp, #0 + 8003472: 60f8 str r0, [r7, #12] + 8003474: 60b9 str r1, [r7, #8] + 8003476: e9c7 2300 strd r2, r3, [r7] HAL_StatusTypeDef status = HAL_ERROR; - 800437e: 2301 movs r3, #1 - 8004380: 75fb strb r3, [r7, #23] + 800347a: 2301 movs r3, #1 + 800347c: 75fb strb r3, [r7, #23] uint8_t index = 0; - 8004382: 2300 movs r3, #0 - 8004384: 75bb strb r3, [r7, #22] + 800347e: 2300 movs r3, #0 + 8003480: 75bb strb r3, [r7, #22] uint8_t nbiterations = 0; - 8004386: 2300 movs r3, #0 - 8004388: 757b strb r3, [r7, #21] + 8003482: 2300 movs r3, #0 + 8003484: 757b strb r3, [r7, #21] /* Process Locked */ __HAL_LOCK(&pFlash); - 800438a: 4b2f ldr r3, [pc, #188] @ (8004448 ) - 800438c: 7e1b ldrb r3, [r3, #24] - 800438e: 2b01 cmp r3, #1 - 8004390: d101 bne.n 8004396 - 8004392: 2302 movs r3, #2 - 8004394: e054 b.n 8004440 - 8004396: 4b2c ldr r3, [pc, #176] @ (8004448 ) - 8004398: 2201 movs r2, #1 - 800439a: 761a strb r2, [r3, #24] + 8003486: 4b2f ldr r3, [pc, #188] @ (8003544 ) + 8003488: 7e1b ldrb r3, [r3, #24] + 800348a: 2b01 cmp r3, #1 + 800348c: d101 bne.n 8003492 + 800348e: 2302 movs r3, #2 + 8003490: e054 b.n 800353c + 8003492: 4b2c ldr r3, [pc, #176] @ (8003544 ) + 8003494: 2201 movs r2, #1 + 8003496: 761a strb r2, [r3, #24] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 800439c: f24c 3050 movw r0, #50000 @ 0xc350 - 80043a0: f000 f8a8 bl 80044f4 - 80043a4: 4603 mov r3, r0 - 80043a6: 75fb strb r3, [r7, #23] + 8003498: f24c 3050 movw r0, #50000 @ 0xc350 + 800349c: f000 f8a8 bl 80035f0 + 80034a0: 4603 mov r3, r0 + 80034a2: 75fb strb r3, [r7, #23] /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE); } #endif /* FLASH_BANK2_END */ if(status == HAL_OK) - 80043a8: 7dfb ldrb r3, [r7, #23] - 80043aa: 2b00 cmp r3, #0 - 80043ac: d144 bne.n 8004438 + 80034a4: 7dfb ldrb r3, [r7, #23] + 80034a6: 2b00 cmp r3, #0 + 80034a8: d144 bne.n 8003534 { if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) - 80043ae: 68fb ldr r3, [r7, #12] - 80043b0: 2b01 cmp r3, #1 - 80043b2: d102 bne.n 80043ba + 80034aa: 68fb ldr r3, [r7, #12] + 80034ac: 2b01 cmp r3, #1 + 80034ae: d102 bne.n 80034b6 { /* Program halfword (16-bit) at a specified address. */ nbiterations = 1U; - 80043b4: 2301 movs r3, #1 - 80043b6: 757b strb r3, [r7, #21] - 80043b8: e007 b.n 80043ca + 80034b0: 2301 movs r3, #1 + 80034b2: 757b strb r3, [r7, #21] + 80034b4: e007 b.n 80034c6 } else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) - 80043ba: 68fb ldr r3, [r7, #12] - 80043bc: 2b02 cmp r3, #2 - 80043be: d102 bne.n 80043c6 + 80034b6: 68fb ldr r3, [r7, #12] + 80034b8: 2b02 cmp r3, #2 + 80034ba: d102 bne.n 80034c2 { /* Program word (32-bit = 2*16-bit) at a specified address. */ nbiterations = 2U; - 80043c0: 2302 movs r3, #2 - 80043c2: 757b strb r3, [r7, #21] - 80043c4: e001 b.n 80043ca + 80034bc: 2302 movs r3, #2 + 80034be: 757b strb r3, [r7, #21] + 80034c0: e001 b.n 80034c6 } else { /* Program double word (64-bit = 4*16-bit) at a specified address. */ nbiterations = 4U; - 80043c6: 2304 movs r3, #4 - 80043c8: 757b strb r3, [r7, #21] + 80034c2: 2304 movs r3, #4 + 80034c4: 757b strb r3, [r7, #21] } for (index = 0U; index < nbiterations; index++) - 80043ca: 2300 movs r3, #0 - 80043cc: 75bb strb r3, [r7, #22] - 80043ce: e02d b.n 800442c + 80034c6: 2300 movs r3, #0 + 80034c8: 75bb strb r3, [r7, #22] + 80034ca: e02d b.n 8003528 { FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); - 80043d0: 7dbb ldrb r3, [r7, #22] - 80043d2: 005a lsls r2, r3, #1 - 80043d4: 68bb ldr r3, [r7, #8] - 80043d6: eb02 0c03 add.w ip, r2, r3 - 80043da: 7dbb ldrb r3, [r7, #22] - 80043dc: 0119 lsls r1, r3, #4 - 80043de: e9d7 2300 ldrd r2, r3, [r7] - 80043e2: f1c1 0620 rsb r6, r1, #32 - 80043e6: f1a1 0020 sub.w r0, r1, #32 - 80043ea: fa22 f401 lsr.w r4, r2, r1 - 80043ee: fa03 f606 lsl.w r6, r3, r6 - 80043f2: 4334 orrs r4, r6 - 80043f4: fa23 f000 lsr.w r0, r3, r0 - 80043f8: 4304 orrs r4, r0 - 80043fa: fa23 f501 lsr.w r5, r3, r1 - 80043fe: b2a3 uxth r3, r4 - 8004400: 4619 mov r1, r3 - 8004402: 4660 mov r0, ip - 8004404: f000 f85a bl 80044bc + 80034cc: 7dbb ldrb r3, [r7, #22] + 80034ce: 005a lsls r2, r3, #1 + 80034d0: 68bb ldr r3, [r7, #8] + 80034d2: eb02 0c03 add.w ip, r2, r3 + 80034d6: 7dbb ldrb r3, [r7, #22] + 80034d8: 0119 lsls r1, r3, #4 + 80034da: e9d7 2300 ldrd r2, r3, [r7] + 80034de: f1c1 0620 rsb r6, r1, #32 + 80034e2: f1a1 0020 sub.w r0, r1, #32 + 80034e6: fa22 f401 lsr.w r4, r2, r1 + 80034ea: fa03 f606 lsl.w r6, r3, r6 + 80034ee: 4334 orrs r4, r6 + 80034f0: fa23 f000 lsr.w r0, r3, r0 + 80034f4: 4304 orrs r4, r0 + 80034f6: fa23 f501 lsr.w r5, r3, r1 + 80034fa: b2a3 uxth r3, r4 + 80034fc: 4619 mov r1, r3 + 80034fe: 4660 mov r0, ip + 8003500: f000 f85a bl 80035b8 #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); - 8004408: f24c 3050 movw r0, #50000 @ 0xc350 - 800440c: f000 f872 bl 80044f4 - 8004410: 4603 mov r3, r0 - 8004412: 75fb strb r3, [r7, #23] + 8003504: f24c 3050 movw r0, #50000 @ 0xc350 + 8003508: f000 f872 bl 80035f0 + 800350c: 4603 mov r3, r0 + 800350e: 75fb strb r3, [r7, #23] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PG); - 8004414: 4b0d ldr r3, [pc, #52] @ (800444c ) - 8004416: 691b ldr r3, [r3, #16] - 8004418: 4a0c ldr r2, [pc, #48] @ (800444c ) - 800441a: f023 0301 bic.w r3, r3, #1 - 800441e: 6113 str r3, [r2, #16] + 8003510: 4b0d ldr r3, [pc, #52] @ (8003548 ) + 8003512: 691b ldr r3, [r3, #16] + 8003514: 4a0c ldr r2, [pc, #48] @ (8003548 ) + 8003516: f023 0301 bic.w r3, r3, #1 + 800351a: 6113 str r3, [r2, #16] /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* In case of error, stop programation procedure */ if (status != HAL_OK) - 8004420: 7dfb ldrb r3, [r7, #23] - 8004422: 2b00 cmp r3, #0 - 8004424: d107 bne.n 8004436 + 800351c: 7dfb ldrb r3, [r7, #23] + 800351e: 2b00 cmp r3, #0 + 8003520: d107 bne.n 8003532 for (index = 0U; index < nbiterations; index++) - 8004426: 7dbb ldrb r3, [r7, #22] - 8004428: 3301 adds r3, #1 - 800442a: 75bb strb r3, [r7, #22] - 800442c: 7dba ldrb r2, [r7, #22] - 800442e: 7d7b ldrb r3, [r7, #21] - 8004430: 429a cmp r2, r3 - 8004432: d3cd bcc.n 80043d0 - 8004434: e000 b.n 8004438 + 8003522: 7dbb ldrb r3, [r7, #22] + 8003524: 3301 adds r3, #1 + 8003526: 75bb strb r3, [r7, #22] + 8003528: 7dba ldrb r2, [r7, #22] + 800352a: 7d7b ldrb r3, [r7, #21] + 800352c: 429a cmp r2, r3 + 800352e: d3cd bcc.n 80034cc + 8003530: e000 b.n 8003534 { break; - 8004436: bf00 nop + 8003532: bf00 nop } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); - 8004438: 4b03 ldr r3, [pc, #12] @ (8004448 ) - 800443a: 2200 movs r2, #0 - 800443c: 761a strb r2, [r3, #24] + 8003534: 4b03 ldr r3, [pc, #12] @ (8003544 ) + 8003536: 2200 movs r2, #0 + 8003538: 761a strb r2, [r3, #24] return status; - 800443e: 7dfb ldrb r3, [r7, #23] + 800353a: 7dfb ldrb r3, [r7, #23] } - 8004440: 4618 mov r0, r3 - 8004442: 371c adds r7, #28 - 8004444: 46bd mov sp, r7 - 8004446: bdf0 pop {r4, r5, r6, r7, pc} - 8004448: 200007b8 .word 0x200007b8 - 800444c: 40022000 .word 0x40022000 + 800353c: 4618 mov r0, r3 + 800353e: 371c adds r7, #28 + 8003540: 46bd mov sp, r7 + 8003542: bdf0 pop {r4, r5, r6, r7, pc} + 8003544: 200006f0 .word 0x200006f0 + 8003548: 40022000 .word 0x40022000 -08004450 : +0800354c : /** * @brief Unlock the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Unlock(void) { - 8004450: b480 push {r7} - 8004452: b083 sub sp, #12 - 8004454: af00 add r7, sp, #0 + 800354c: b480 push {r7} + 800354e: b083 sub sp, #12 + 8003550: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; - 8004456: 2300 movs r3, #0 - 8004458: 71fb strb r3, [r7, #7] + 8003552: 2300 movs r3, #0 + 8003554: 71fb strb r3, [r7, #7] if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) - 800445a: 4b0d ldr r3, [pc, #52] @ (8004490 ) - 800445c: 691b ldr r3, [r3, #16] - 800445e: f003 0380 and.w r3, r3, #128 @ 0x80 - 8004462: 2b00 cmp r3, #0 - 8004464: d00d beq.n 8004482 + 8003556: 4b0d ldr r3, [pc, #52] @ (800358c ) + 8003558: 691b ldr r3, [r3, #16] + 800355a: f003 0380 and.w r3, r3, #128 @ 0x80 + 800355e: 2b00 cmp r3, #0 + 8003560: d00d beq.n 800357e { /* Authorize the FLASH Registers access */ WRITE_REG(FLASH->KEYR, FLASH_KEY1); - 8004466: 4b0a ldr r3, [pc, #40] @ (8004490 ) - 8004468: 4a0a ldr r2, [pc, #40] @ (8004494 ) - 800446a: 605a str r2, [r3, #4] + 8003562: 4b0a ldr r3, [pc, #40] @ (800358c ) + 8003564: 4a0a ldr r2, [pc, #40] @ (8003590 ) + 8003566: 605a str r2, [r3, #4] WRITE_REG(FLASH->KEYR, FLASH_KEY2); - 800446c: 4b08 ldr r3, [pc, #32] @ (8004490 ) - 800446e: 4a0a ldr r2, [pc, #40] @ (8004498 ) - 8004470: 605a str r2, [r3, #4] + 8003568: 4b08 ldr r3, [pc, #32] @ (800358c ) + 800356a: 4a0a ldr r2, [pc, #40] @ (8003594 ) + 800356c: 605a str r2, [r3, #4] /* Verify Flash is unlocked */ if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) - 8004472: 4b07 ldr r3, [pc, #28] @ (8004490 ) - 8004474: 691b ldr r3, [r3, #16] - 8004476: f003 0380 and.w r3, r3, #128 @ 0x80 - 800447a: 2b00 cmp r3, #0 - 800447c: d001 beq.n 8004482 + 800356e: 4b07 ldr r3, [pc, #28] @ (800358c ) + 8003570: 691b ldr r3, [r3, #16] + 8003572: f003 0380 and.w r3, r3, #128 @ 0x80 + 8003576: 2b00 cmp r3, #0 + 8003578: d001 beq.n 800357e { status = HAL_ERROR; - 800447e: 2301 movs r3, #1 - 8004480: 71fb strb r3, [r7, #7] + 800357a: 2301 movs r3, #1 + 800357c: 71fb strb r3, [r7, #7] status = HAL_ERROR; } } #endif /* FLASH_BANK2_END */ return status; - 8004482: 79fb ldrb r3, [r7, #7] + 800357e: 79fb ldrb r3, [r7, #7] } - 8004484: 4618 mov r0, r3 - 8004486: 370c adds r7, #12 - 8004488: 46bd mov sp, r7 - 800448a: bc80 pop {r7} - 800448c: 4770 bx lr - 800448e: bf00 nop - 8004490: 40022000 .word 0x40022000 - 8004494: 45670123 .word 0x45670123 - 8004498: cdef89ab .word 0xcdef89ab + 8003580: 4618 mov r0, r3 + 8003582: 370c adds r7, #12 + 8003584: 46bd mov sp, r7 + 8003586: bc80 pop {r7} + 8003588: 4770 bx lr + 800358a: bf00 nop + 800358c: 40022000 .word 0x40022000 + 8003590: 45670123 .word 0x45670123 + 8003594: cdef89ab .word 0xcdef89ab -0800449c : +08003598 : /** * @brief Locks the FLASH control register access * @retval HAL Status */ HAL_StatusTypeDef HAL_FLASH_Lock(void) { - 800449c: b480 push {r7} - 800449e: af00 add r7, sp, #0 + 8003598: b480 push {r7} + 800359a: af00 add r7, sp, #0 /* Set the LOCK Bit to lock the FLASH Registers access */ SET_BIT(FLASH->CR, FLASH_CR_LOCK); - 80044a0: 4b05 ldr r3, [pc, #20] @ (80044b8 ) - 80044a2: 691b ldr r3, [r3, #16] - 80044a4: 4a04 ldr r2, [pc, #16] @ (80044b8 ) - 80044a6: f043 0380 orr.w r3, r3, #128 @ 0x80 - 80044aa: 6113 str r3, [r2, #16] + 800359c: 4b05 ldr r3, [pc, #20] @ (80035b4 ) + 800359e: 691b ldr r3, [r3, #16] + 80035a0: 4a04 ldr r2, [pc, #16] @ (80035b4 ) + 80035a2: f043 0380 orr.w r3, r3, #128 @ 0x80 + 80035a6: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) /* Set the LOCK Bit to lock the FLASH BANK2 Registers access */ SET_BIT(FLASH->CR2, FLASH_CR2_LOCK); #endif /* FLASH_BANK2_END */ return HAL_OK; - 80044ac: 2300 movs r3, #0 + 80035a8: 2300 movs r3, #0 } - 80044ae: 4618 mov r0, r3 - 80044b0: 46bd mov sp, r7 - 80044b2: bc80 pop {r7} - 80044b4: 4770 bx lr - 80044b6: bf00 nop - 80044b8: 40022000 .word 0x40022000 + 80035aa: 4618 mov r0, r3 + 80035ac: 46bd mov sp, r7 + 80035ae: bc80 pop {r7} + 80035b0: 4770 bx lr + 80035b2: bf00 nop + 80035b4: 40022000 .word 0x40022000 -080044bc : +080035b8 : * @param Address specify the address to be programmed. * @param Data specify the data to be programmed. * @retval None */ static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) { - 80044bc: b480 push {r7} - 80044be: b083 sub sp, #12 - 80044c0: af00 add r7, sp, #0 - 80044c2: 6078 str r0, [r7, #4] - 80044c4: 460b mov r3, r1 - 80044c6: 807b strh r3, [r7, #2] + 80035b8: b480 push {r7} + 80035ba: b083 sub sp, #12 + 80035bc: af00 add r7, sp, #0 + 80035be: 6078 str r0, [r7, #4] + 80035c0: 460b mov r3, r1 + 80035c2: 807b strh r3, [r7, #2] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 80044c8: 4b08 ldr r3, [pc, #32] @ (80044ec ) - 80044ca: 2200 movs r2, #0 - 80044cc: 61da str r2, [r3, #28] + 80035c4: 4b08 ldr r3, [pc, #32] @ (80035e8 ) + 80035c6: 2200 movs r2, #0 + 80035c8: 61da str r2, [r3, #28] #if defined(FLASH_BANK2_END) if(Address <= FLASH_BANK1_END) { #endif /* FLASH_BANK2_END */ /* Proceed to program the new data */ SET_BIT(FLASH->CR, FLASH_CR_PG); - 80044ce: 4b08 ldr r3, [pc, #32] @ (80044f0 ) - 80044d0: 691b ldr r3, [r3, #16] - 80044d2: 4a07 ldr r2, [pc, #28] @ (80044f0 ) - 80044d4: f043 0301 orr.w r3, r3, #1 - 80044d8: 6113 str r3, [r2, #16] + 80035ca: 4b08 ldr r3, [pc, #32] @ (80035ec ) + 80035cc: 691b ldr r3, [r3, #16] + 80035ce: 4a07 ldr r2, [pc, #28] @ (80035ec ) + 80035d0: f043 0301 orr.w r3, r3, #1 + 80035d4: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ /* Write data in the address */ *(__IO uint16_t*)Address = Data; - 80044da: 687b ldr r3, [r7, #4] - 80044dc: 887a ldrh r2, [r7, #2] - 80044de: 801a strh r2, [r3, #0] + 80035d6: 687b ldr r3, [r7, #4] + 80035d8: 887a ldrh r2, [r7, #2] + 80035da: 801a strh r2, [r3, #0] } - 80044e0: bf00 nop - 80044e2: 370c adds r7, #12 - 80044e4: 46bd mov sp, r7 - 80044e6: bc80 pop {r7} - 80044e8: 4770 bx lr - 80044ea: bf00 nop - 80044ec: 200007b8 .word 0x200007b8 - 80044f0: 40022000 .word 0x40022000 + 80035dc: bf00 nop + 80035de: 370c adds r7, #12 + 80035e0: 46bd mov sp, r7 + 80035e2: bc80 pop {r7} + 80035e4: 4770 bx lr + 80035e6: bf00 nop + 80035e8: 200006f0 .word 0x200006f0 + 80035ec: 40022000 .word 0x40022000 -080044f4 : +080035f0 : * @brief Wait for a FLASH operation to complete. * @param Timeout maximum flash operation timeout * @retval HAL Status */ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) { - 80044f4: b580 push {r7, lr} - 80044f6: b084 sub sp, #16 - 80044f8: af00 add r7, sp, #0 - 80044fa: 6078 str r0, [r7, #4] + 80035f0: b580 push {r7, lr} + 80035f2: b084 sub sp, #16 + 80035f4: af00 add r7, sp, #0 + 80035f6: 6078 str r0, [r7, #4] /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. Even if the FLASH operation fails, the BUSY flag will be reset and an error flag will be set */ uint32_t tickstart = HAL_GetTick(); - 80044fc: f7fe feea bl 80032d4 - 8004500: 60f8 str r0, [r7, #12] + 80035f8: f7ff fb38 bl 8002c6c + 80035fc: 60f8 str r0, [r7, #12] while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) - 8004502: e010 b.n 8004526 + 80035fe: e010 b.n 8003622 { if (Timeout != HAL_MAX_DELAY) - 8004504: 687b ldr r3, [r7, #4] - 8004506: f1b3 3fff cmp.w r3, #4294967295 - 800450a: d00c beq.n 8004526 + 8003600: 687b ldr r3, [r7, #4] + 8003602: f1b3 3fff cmp.w r3, #4294967295 + 8003606: d00c beq.n 8003622 { if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) - 800450c: 687b ldr r3, [r7, #4] - 800450e: 2b00 cmp r3, #0 - 8004510: d007 beq.n 8004522 - 8004512: f7fe fedf bl 80032d4 - 8004516: 4602 mov r2, r0 - 8004518: 68fb ldr r3, [r7, #12] - 800451a: 1ad3 subs r3, r2, r3 - 800451c: 687a ldr r2, [r7, #4] - 800451e: 429a cmp r2, r3 - 8004520: d201 bcs.n 8004526 + 8003608: 687b ldr r3, [r7, #4] + 800360a: 2b00 cmp r3, #0 + 800360c: d007 beq.n 800361e + 800360e: f7ff fb2d bl 8002c6c + 8003612: 4602 mov r2, r0 + 8003614: 68fb ldr r3, [r7, #12] + 8003616: 1ad3 subs r3, r2, r3 + 8003618: 687a ldr r2, [r7, #4] + 800361a: 429a cmp r2, r3 + 800361c: d201 bcs.n 8003622 { return HAL_TIMEOUT; - 8004522: 2303 movs r3, #3 - 8004524: e025 b.n 8004572 + 800361e: 2303 movs r3, #3 + 8003620: e025 b.n 800366e while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) - 8004526: 4b15 ldr r3, [pc, #84] @ (800457c ) - 8004528: 68db ldr r3, [r3, #12] - 800452a: f003 0301 and.w r3, r3, #1 - 800452e: 2b00 cmp r3, #0 - 8004530: d1e8 bne.n 8004504 + 8003622: 4b15 ldr r3, [pc, #84] @ (8003678 ) + 8003624: 68db ldr r3, [r3, #12] + 8003626: f003 0301 and.w r3, r3, #1 + 800362a: 2b00 cmp r3, #0 + 800362c: d1e8 bne.n 8003600 } } } /* Check FLASH End of Operation flag */ if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) - 8004532: 4b12 ldr r3, [pc, #72] @ (800457c ) - 8004534: 68db ldr r3, [r3, #12] - 8004536: f003 0320 and.w r3, r3, #32 - 800453a: 2b00 cmp r3, #0 - 800453c: d002 beq.n 8004544 + 800362e: 4b12 ldr r3, [pc, #72] @ (8003678 ) + 8003630: 68db ldr r3, [r3, #12] + 8003632: f003 0320 and.w r3, r3, #32 + 8003636: 2b00 cmp r3, #0 + 8003638: d002 beq.n 8003640 { /* Clear FLASH End of Operation pending bit */ __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); - 800453e: 4b0f ldr r3, [pc, #60] @ (800457c ) - 8004540: 2220 movs r2, #32 - 8004542: 60da str r2, [r3, #12] + 800363a: 4b0f ldr r3, [pc, #60] @ (8003678 ) + 800363c: 2220 movs r2, #32 + 800363e: 60da str r2, [r3, #12] } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || - 8004544: 4b0d ldr r3, [pc, #52] @ (800457c ) - 8004546: 68db ldr r3, [r3, #12] - 8004548: f003 0310 and.w r3, r3, #16 - 800454c: 2b00 cmp r3, #0 - 800454e: d10b bne.n 8004568 + 8003640: 4b0d ldr r3, [pc, #52] @ (8003678 ) + 8003642: 68db ldr r3, [r3, #12] + 8003644: f003 0310 and.w r3, r3, #16 + 8003648: 2b00 cmp r3, #0 + 800364a: d10b bne.n 8003664 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 8004550: 4b0a ldr r3, [pc, #40] @ (800457c ) - 8004552: 69db ldr r3, [r3, #28] - 8004554: f003 0301 and.w r3, r3, #1 + 800364c: 4b0a ldr r3, [pc, #40] @ (8003678 ) + 800364e: 69db ldr r3, [r3, #28] + 8003650: f003 0301 and.w r3, r3, #1 if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || - 8004558: 2b00 cmp r3, #0 - 800455a: d105 bne.n 8004568 + 8003654: 2b00 cmp r3, #0 + 8003656: d105 bne.n 8003664 __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) - 800455c: 4b07 ldr r3, [pc, #28] @ (800457c ) - 800455e: 68db ldr r3, [r3, #12] - 8004560: f003 0304 and.w r3, r3, #4 + 8003658: 4b07 ldr r3, [pc, #28] @ (8003678 ) + 800365a: 68db ldr r3, [r3, #12] + 800365c: f003 0304 and.w r3, r3, #4 __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || - 8004564: 2b00 cmp r3, #0 - 8004566: d003 beq.n 8004570 + 8003660: 2b00 cmp r3, #0 + 8003662: d003 beq.n 800366c { /*Save the error code*/ FLASH_SetErrorCode(); - 8004568: f000 f80a bl 8004580 + 8003664: f000 f80a bl 800367c return HAL_ERROR; - 800456c: 2301 movs r3, #1 - 800456e: e000 b.n 8004572 + 8003668: 2301 movs r3, #1 + 800366a: e000 b.n 800366e } /* There is no error flag set */ return HAL_OK; - 8004570: 2300 movs r3, #0 + 800366c: 2300 movs r3, #0 } - 8004572: 4618 mov r0, r3 - 8004574: 3710 adds r7, #16 - 8004576: 46bd mov sp, r7 - 8004578: bd80 pop {r7, pc} - 800457a: bf00 nop - 800457c: 40022000 .word 0x40022000 + 800366e: 4618 mov r0, r3 + 8003670: 3710 adds r7, #16 + 8003672: 46bd mov sp, r7 + 8003674: bd80 pop {r7, pc} + 8003676: bf00 nop + 8003678: 40022000 .word 0x40022000 -08004580 : +0800367c : /** * @brief Set the specific FLASH error flag. * @retval None */ static void FLASH_SetErrorCode(void) { - 8004580: b480 push {r7} - 8004582: b083 sub sp, #12 - 8004584: af00 add r7, sp, #0 + 800367c: b480 push {r7} + 800367e: b083 sub sp, #12 + 8003680: af00 add r7, sp, #0 uint32_t flags = 0U; - 8004586: 2300 movs r3, #0 - 8004588: 607b str r3, [r7, #4] + 8003682: 2300 movs r3, #0 + 8003684: 607b str r3, [r7, #4] #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) - 800458a: 4b23 ldr r3, [pc, #140] @ (8004618 ) - 800458c: 68db ldr r3, [r3, #12] - 800458e: f003 0310 and.w r3, r3, #16 - 8004592: 2b00 cmp r3, #0 - 8004594: d009 beq.n 80045aa + 8003686: 4b23 ldr r3, [pc, #140] @ (8003714 ) + 8003688: 68db ldr r3, [r3, #12] + 800368a: f003 0310 and.w r3, r3, #16 + 800368e: 2b00 cmp r3, #0 + 8003690: d009 beq.n 80036a6 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; - 8004596: 4b21 ldr r3, [pc, #132] @ (800461c ) - 8004598: 69db ldr r3, [r3, #28] - 800459a: f043 0302 orr.w r3, r3, #2 - 800459e: 4a1f ldr r2, [pc, #124] @ (800461c ) - 80045a0: 61d3 str r3, [r2, #28] + 8003692: 4b21 ldr r3, [pc, #132] @ (8003718 ) + 8003694: 69db ldr r3, [r3, #28] + 8003696: f043 0302 orr.w r3, r3, #2 + 800369a: 4a1f ldr r2, [pc, #124] @ (8003718 ) + 800369c: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2; #else flags |= FLASH_FLAG_WRPERR; - 80045a2: 687b ldr r3, [r7, #4] - 80045a4: f043 0310 orr.w r3, r3, #16 - 80045a8: 607b str r3, [r7, #4] + 800369e: 687b ldr r3, [r7, #4] + 80036a0: f043 0310 orr.w r3, r3, #16 + 80036a4: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } #if defined(FLASH_BANK2_END) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2)) #else if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) - 80045aa: 4b1b ldr r3, [pc, #108] @ (8004618 ) - 80045ac: 68db ldr r3, [r3, #12] - 80045ae: f003 0304 and.w r3, r3, #4 - 80045b2: 2b00 cmp r3, #0 - 80045b4: d009 beq.n 80045ca + 80036a6: 4b1b ldr r3, [pc, #108] @ (8003714 ) + 80036a8: 68db ldr r3, [r3, #12] + 80036aa: f003 0304 and.w r3, r3, #4 + 80036ae: 2b00 cmp r3, #0 + 80036b0: d009 beq.n 80036c6 #endif /* FLASH_BANK2_END */ { pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; - 80045b6: 4b19 ldr r3, [pc, #100] @ (800461c ) - 80045b8: 69db ldr r3, [r3, #28] - 80045ba: f043 0301 orr.w r3, r3, #1 - 80045be: 4a17 ldr r2, [pc, #92] @ (800461c ) - 80045c0: 61d3 str r3, [r2, #28] + 80036b2: 4b19 ldr r3, [pc, #100] @ (8003718 ) + 80036b4: 69db ldr r3, [r3, #28] + 80036b6: f043 0301 orr.w r3, r3, #1 + 80036ba: 4a17 ldr r2, [pc, #92] @ (8003718 ) + 80036bc: 61d3 str r3, [r2, #28] #if defined(FLASH_BANK2_END) flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2; #else flags |= FLASH_FLAG_PGERR; - 80045c2: 687b ldr r3, [r7, #4] - 80045c4: f043 0304 orr.w r3, r3, #4 - 80045c8: 607b str r3, [r7, #4] + 80036be: 687b ldr r3, [r7, #4] + 80036c0: f043 0304 orr.w r3, r3, #4 + 80036c4: 607b str r3, [r7, #4] #endif /* FLASH_BANK2_END */ } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) - 80045ca: 4b13 ldr r3, [pc, #76] @ (8004618 ) - 80045cc: 69db ldr r3, [r3, #28] - 80045ce: f003 0301 and.w r3, r3, #1 - 80045d2: 2b00 cmp r3, #0 - 80045d4: d00b beq.n 80045ee + 80036c6: 4b13 ldr r3, [pc, #76] @ (8003714 ) + 80036c8: 69db ldr r3, [r3, #28] + 80036ca: f003 0301 and.w r3, r3, #1 + 80036ce: 2b00 cmp r3, #0 + 80036d0: d00b beq.n 80036ea { pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; - 80045d6: 4b11 ldr r3, [pc, #68] @ (800461c ) - 80045d8: 69db ldr r3, [r3, #28] - 80045da: f043 0304 orr.w r3, r3, #4 - 80045de: 4a0f ldr r2, [pc, #60] @ (800461c ) - 80045e0: 61d3 str r3, [r2, #28] + 80036d2: 4b11 ldr r3, [pc, #68] @ (8003718 ) + 80036d4: 69db ldr r3, [r3, #28] + 80036d6: f043 0304 orr.w r3, r3, #4 + 80036da: 4a0f ldr r2, [pc, #60] @ (8003718 ) + 80036dc: 61d3 str r3, [r2, #28] __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR); - 80045e2: 4b0d ldr r3, [pc, #52] @ (8004618 ) - 80045e4: 69db ldr r3, [r3, #28] - 80045e6: 4a0c ldr r2, [pc, #48] @ (8004618 ) - 80045e8: f023 0301 bic.w r3, r3, #1 - 80045ec: 61d3 str r3, [r2, #28] + 80036de: 4b0d ldr r3, [pc, #52] @ (8003714 ) + 80036e0: 69db ldr r3, [r3, #28] + 80036e2: 4a0c ldr r2, [pc, #48] @ (8003714 ) + 80036e4: f023 0301 bic.w r3, r3, #1 + 80036e8: 61d3 str r3, [r2, #28] } /* Clear FLASH error pending bits */ __HAL_FLASH_CLEAR_FLAG(flags); - 80045ee: 687b ldr r3, [r7, #4] - 80045f0: f240 1201 movw r2, #257 @ 0x101 - 80045f4: 4293 cmp r3, r2 - 80045f6: d106 bne.n 8004606 - 80045f8: 4b07 ldr r3, [pc, #28] @ (8004618 ) - 80045fa: 69db ldr r3, [r3, #28] - 80045fc: 4a06 ldr r2, [pc, #24] @ (8004618 ) - 80045fe: f023 0301 bic.w r3, r3, #1 - 8004602: 61d3 str r3, [r2, #28] + 80036ea: 687b ldr r3, [r7, #4] + 80036ec: f240 1201 movw r2, #257 @ 0x101 + 80036f0: 4293 cmp r3, r2 + 80036f2: d106 bne.n 8003702 + 80036f4: 4b07 ldr r3, [pc, #28] @ (8003714 ) + 80036f6: 69db ldr r3, [r3, #28] + 80036f8: 4a06 ldr r2, [pc, #24] @ (8003714 ) + 80036fa: f023 0301 bic.w r3, r3, #1 + 80036fe: 61d3 str r3, [r2, #28] } - 8004604: e002 b.n 800460c + 8003700: e002 b.n 8003708 __HAL_FLASH_CLEAR_FLAG(flags); - 8004606: 4a04 ldr r2, [pc, #16] @ (8004618 ) - 8004608: 687b ldr r3, [r7, #4] - 800460a: 60d3 str r3, [r2, #12] + 8003702: 4a04 ldr r2, [pc, #16] @ (8003714 ) + 8003704: 687b ldr r3, [r7, #4] + 8003706: 60d3 str r3, [r2, #12] } - 800460c: bf00 nop - 800460e: 370c adds r7, #12 - 8004610: 46bd mov sp, r7 - 8004612: bc80 pop {r7} - 8004614: 4770 bx lr - 8004616: bf00 nop - 8004618: 40022000 .word 0x40022000 - 800461c: 200007b8 .word 0x200007b8 + 8003708: bf00 nop + 800370a: 370c adds r7, #12 + 800370c: 46bd mov sp, r7 + 800370e: bc80 pop {r7} + 8003710: 4770 bx lr + 8003712: bf00 nop + 8003714: 40022000 .word 0x40022000 + 8003718: 200006f0 .word 0x200006f0 -08004620 : +0800371c : * (0xFFFFFFFF means that all the pages have been correctly erased) * * @retval HAL_StatusTypeDef HAL Status */ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) { - 8004620: b580 push {r7, lr} - 8004622: b084 sub sp, #16 - 8004624: af00 add r7, sp, #0 - 8004626: 6078 str r0, [r7, #4] - 8004628: 6039 str r1, [r7, #0] + 800371c: b580 push {r7, lr} + 800371e: b084 sub sp, #16 + 8003720: af00 add r7, sp, #0 + 8003722: 6078 str r0, [r7, #4] + 8003724: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_ERROR; - 800462a: 2301 movs r3, #1 - 800462c: 73fb strb r3, [r7, #15] + 8003726: 2301 movs r3, #1 + 8003728: 73fb strb r3, [r7, #15] uint32_t address = 0U; - 800462e: 2300 movs r3, #0 - 8004630: 60bb str r3, [r7, #8] + 800372a: 2300 movs r3, #0 + 800372c: 60bb str r3, [r7, #8] /* Process Locked */ __HAL_LOCK(&pFlash); - 8004632: 4b2f ldr r3, [pc, #188] @ (80046f0 ) - 8004634: 7e1b ldrb r3, [r3, #24] - 8004636: 2b01 cmp r3, #1 - 8004638: d101 bne.n 800463e - 800463a: 2302 movs r3, #2 - 800463c: e053 b.n 80046e6 - 800463e: 4b2c ldr r3, [pc, #176] @ (80046f0 ) - 8004640: 2201 movs r2, #1 - 8004642: 761a strb r2, [r3, #24] + 800372e: 4b2f ldr r3, [pc, #188] @ (80037ec ) + 8003730: 7e1b ldrb r3, [r3, #24] + 8003732: 2b01 cmp r3, #1 + 8003734: d101 bne.n 800373a + 8003736: 2302 movs r3, #2 + 8003738: e053 b.n 80037e2 + 800373a: 4b2c ldr r3, [pc, #176] @ (80037ec ) + 800373c: 2201 movs r2, #1 + 800373e: 761a strb r2, [r3, #24] /* Check the parameters */ assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) - 8004644: 687b ldr r3, [r7, #4] - 8004646: 681b ldr r3, [r3, #0] - 8004648: 2b02 cmp r3, #2 - 800464a: d116 bne.n 800467a + 8003740: 687b ldr r3, [r7, #4] + 8003742: 681b ldr r3, [r3, #0] + 8003744: 2b02 cmp r3, #2 + 8003746: d116 bne.n 8003776 else #endif /* FLASH_BANK2_END */ { /* Mass Erase requested for Bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) - 800464c: f24c 3050 movw r0, #50000 @ 0xc350 - 8004650: f7ff ff50 bl 80044f4 - 8004654: 4603 mov r3, r0 - 8004656: 2b00 cmp r3, #0 - 8004658: d141 bne.n 80046de + 8003748: f24c 3050 movw r0, #50000 @ 0xc350 + 800374c: f7ff ff50 bl 80035f0 + 8003750: 4603 mov r3, r0 + 8003752: 2b00 cmp r3, #0 + 8003754: d141 bne.n 80037da { /*Mass erase to be done*/ FLASH_MassErase(FLASH_BANK_1); - 800465a: 2001 movs r0, #1 - 800465c: f000 f84c bl 80046f8 + 8003756: 2001 movs r0, #1 + 8003758: f000 f84c bl 80037f4 /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - 8004660: f24c 3050 movw r0, #50000 @ 0xc350 - 8004664: f7ff ff46 bl 80044f4 - 8004668: 4603 mov r3, r0 - 800466a: 73fb strb r3, [r7, #15] + 800375c: f24c 3050 movw r0, #50000 @ 0xc350 + 8003760: f7ff ff46 bl 80035f0 + 8003764: 4603 mov r3, r0 + 8003766: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the MER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_MER); - 800466c: 4b21 ldr r3, [pc, #132] @ (80046f4 ) - 800466e: 691b ldr r3, [r3, #16] - 8004670: 4a20 ldr r2, [pc, #128] @ (80046f4 ) - 8004672: f023 0304 bic.w r3, r3, #4 - 8004676: 6113 str r3, [r2, #16] - 8004678: e031 b.n 80046de + 8003768: 4b21 ldr r3, [pc, #132] @ (80037f0 ) + 800376a: 691b ldr r3, [r3, #16] + 800376c: 4a20 ldr r2, [pc, #128] @ (80037f0 ) + 800376e: f023 0304 bic.w r3, r3, #4 + 8003772: 6113 str r3, [r2, #16] + 8003774: e031 b.n 80037da else #endif /* FLASH_BANK2_END */ { /* Page Erase requested on address located on bank1 */ /* Wait for last operation to be completed */ if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) - 800467a: f24c 3050 movw r0, #50000 @ 0xc350 - 800467e: f7ff ff39 bl 80044f4 - 8004682: 4603 mov r3, r0 - 8004684: 2b00 cmp r3, #0 - 8004686: d12a bne.n 80046de + 8003776: f24c 3050 movw r0, #50000 @ 0xc350 + 800377a: f7ff ff39 bl 80035f0 + 800377e: 4603 mov r3, r0 + 8003780: 2b00 cmp r3, #0 + 8003782: d12a bne.n 80037da { /*Initialization of PageError variable*/ *PageError = 0xFFFFFFFFU; - 8004688: 683b ldr r3, [r7, #0] - 800468a: f04f 32ff mov.w r2, #4294967295 - 800468e: 601a str r2, [r3, #0] + 8003784: 683b ldr r3, [r7, #0] + 8003786: f04f 32ff mov.w r2, #4294967295 + 800378a: 601a str r2, [r3, #0] /* Erase page by page to be done*/ for(address = pEraseInit->PageAddress; - 8004690: 687b ldr r3, [r7, #4] - 8004692: 689b ldr r3, [r3, #8] - 8004694: 60bb str r3, [r7, #8] - 8004696: e019 b.n 80046cc + 800378c: 687b ldr r3, [r7, #4] + 800378e: 689b ldr r3, [r3, #8] + 8003790: 60bb str r3, [r7, #8] + 8003792: e019 b.n 80037c8 address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); address += FLASH_PAGE_SIZE) { FLASH_PageErase(address); - 8004698: 68b8 ldr r0, [r7, #8] - 800469a: f000 f849 bl 8004730 + 8003794: 68b8 ldr r0, [r7, #8] + 8003796: f000 f849 bl 800382c /* Wait for last operation to be completed */ status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - 800469e: f24c 3050 movw r0, #50000 @ 0xc350 - 80046a2: f7ff ff27 bl 80044f4 - 80046a6: 4603 mov r3, r0 - 80046a8: 73fb strb r3, [r7, #15] + 800379a: f24c 3050 movw r0, #50000 @ 0xc350 + 800379e: f7ff ff27 bl 80035f0 + 80037a2: 4603 mov r3, r0 + 80037a4: 73fb strb r3, [r7, #15] /* If the erase operation is completed, disable the PER Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PER); - 80046aa: 4b12 ldr r3, [pc, #72] @ (80046f4 ) - 80046ac: 691b ldr r3, [r3, #16] - 80046ae: 4a11 ldr r2, [pc, #68] @ (80046f4 ) - 80046b0: f023 0302 bic.w r3, r3, #2 - 80046b4: 6113 str r3, [r2, #16] + 80037a6: 4b12 ldr r3, [pc, #72] @ (80037f0 ) + 80037a8: 691b ldr r3, [r3, #16] + 80037aa: 4a11 ldr r2, [pc, #68] @ (80037f0 ) + 80037ac: f023 0302 bic.w r3, r3, #2 + 80037b0: 6113 str r3, [r2, #16] if (status != HAL_OK) - 80046b6: 7bfb ldrb r3, [r7, #15] - 80046b8: 2b00 cmp r3, #0 - 80046ba: d003 beq.n 80046c4 + 80037b2: 7bfb ldrb r3, [r7, #15] + 80037b4: 2b00 cmp r3, #0 + 80037b6: d003 beq.n 80037c0 { /* In case of error, stop erase procedure and return the faulty address */ *PageError = address; - 80046bc: 683b ldr r3, [r7, #0] - 80046be: 68ba ldr r2, [r7, #8] - 80046c0: 601a str r2, [r3, #0] + 80037b8: 683b ldr r3, [r7, #0] + 80037ba: 68ba ldr r2, [r7, #8] + 80037bc: 601a str r2, [r3, #0] break; - 80046c2: e00c b.n 80046de + 80037be: e00c b.n 80037da address += FLASH_PAGE_SIZE) - 80046c4: 68bb ldr r3, [r7, #8] - 80046c6: f503 6380 add.w r3, r3, #1024 @ 0x400 - 80046ca: 60bb str r3, [r7, #8] + 80037c0: 68bb ldr r3, [r7, #8] + 80037c2: f503 6380 add.w r3, r3, #1024 @ 0x400 + 80037c6: 60bb str r3, [r7, #8] address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); - 80046cc: 687b ldr r3, [r7, #4] - 80046ce: 68db ldr r3, [r3, #12] - 80046d0: 029a lsls r2, r3, #10 - 80046d2: 687b ldr r3, [r7, #4] - 80046d4: 689b ldr r3, [r3, #8] - 80046d6: 4413 add r3, r2 - 80046d8: 68ba ldr r2, [r7, #8] - 80046da: 429a cmp r2, r3 - 80046dc: d3dc bcc.n 8004698 + 80037c8: 687b ldr r3, [r7, #4] + 80037ca: 68db ldr r3, [r3, #12] + 80037cc: 029a lsls r2, r3, #10 + 80037ce: 687b ldr r3, [r7, #4] + 80037d0: 689b ldr r3, [r3, #8] + 80037d2: 4413 add r3, r2 + 80037d4: 68ba ldr r2, [r7, #8] + 80037d6: 429a cmp r2, r3 + 80037d8: d3dc bcc.n 8003794 } } } /* Process Unlocked */ __HAL_UNLOCK(&pFlash); - 80046de: 4b04 ldr r3, [pc, #16] @ (80046f0 ) - 80046e0: 2200 movs r2, #0 - 80046e2: 761a strb r2, [r3, #24] + 80037da: 4b04 ldr r3, [pc, #16] @ (80037ec ) + 80037dc: 2200 movs r2, #0 + 80037de: 761a strb r2, [r3, #24] return status; - 80046e4: 7bfb ldrb r3, [r7, #15] + 80037e0: 7bfb ldrb r3, [r7, #15] } - 80046e6: 4618 mov r0, r3 - 80046e8: 3710 adds r7, #16 - 80046ea: 46bd mov sp, r7 - 80046ec: bd80 pop {r7, pc} - 80046ee: bf00 nop - 80046f0: 200007b8 .word 0x200007b8 - 80046f4: 40022000 .word 0x40022000 + 80037e2: 4618 mov r0, r3 + 80037e4: 3710 adds r7, #16 + 80037e6: 46bd mov sp, r7 + 80037e8: bd80 pop {r7, pc} + 80037ea: bf00 nop + 80037ec: 200006f0 .word 0x200006f0 + 80037f0: 40022000 .word 0x40022000 -080046f8 : +080037f4 : @endif * * @retval None */ static void FLASH_MassErase(uint32_t Banks) { - 80046f8: b480 push {r7} - 80046fa: b083 sub sp, #12 - 80046fc: af00 add r7, sp, #0 - 80046fe: 6078 str r0, [r7, #4] + 80037f4: b480 push {r7} + 80037f6: b083 sub sp, #12 + 80037f8: af00 add r7, sp, #0 + 80037fa: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_FLASH_BANK(Banks)); /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 8004700: 4b09 ldr r3, [pc, #36] @ (8004728 ) - 8004702: 2200 movs r2, #0 - 8004704: 61da str r2, [r3, #28] + 80037fc: 4b09 ldr r3, [pc, #36] @ (8003824 ) + 80037fe: 2200 movs r2, #0 + 8003800: 61da str r2, [r3, #28] #if !defined(FLASH_BANK2_END) /* Prevent unused argument(s) compilation warning */ UNUSED(Banks); #endif /* FLASH_BANK2_END */ /* Only bank1 will be erased*/ SET_BIT(FLASH->CR, FLASH_CR_MER); - 8004706: 4b09 ldr r3, [pc, #36] @ (800472c ) - 8004708: 691b ldr r3, [r3, #16] - 800470a: 4a08 ldr r2, [pc, #32] @ (800472c ) - 800470c: f043 0304 orr.w r3, r3, #4 - 8004710: 6113 str r3, [r2, #16] + 8003802: 4b09 ldr r3, [pc, #36] @ (8003828 ) + 8003804: 691b ldr r3, [r3, #16] + 8003806: 4a08 ldr r2, [pc, #32] @ (8003828 ) + 8003808: f043 0304 orr.w r3, r3, #4 + 800380c: 6113 str r3, [r2, #16] SET_BIT(FLASH->CR, FLASH_CR_STRT); - 8004712: 4b06 ldr r3, [pc, #24] @ (800472c ) - 8004714: 691b ldr r3, [r3, #16] - 8004716: 4a05 ldr r2, [pc, #20] @ (800472c ) - 8004718: f043 0340 orr.w r3, r3, #64 @ 0x40 - 800471c: 6113 str r3, [r2, #16] + 800380e: 4b06 ldr r3, [pc, #24] @ (8003828 ) + 8003810: 691b ldr r3, [r3, #16] + 8003812: 4a05 ldr r2, [pc, #20] @ (8003828 ) + 8003814: f043 0340 orr.w r3, r3, #64 @ 0x40 + 8003818: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } - 800471e: bf00 nop - 8004720: 370c adds r7, #12 - 8004722: 46bd mov sp, r7 - 8004724: bc80 pop {r7} - 8004726: 4770 bx lr - 8004728: 200007b8 .word 0x200007b8 - 800472c: 40022000 .word 0x40022000 + 800381a: bf00 nop + 800381c: 370c adds r7, #12 + 800381e: 46bd mov sp, r7 + 8003820: bc80 pop {r7} + 8003822: 4770 bx lr + 8003824: 200006f0 .word 0x200006f0 + 8003828: 40022000 .word 0x40022000 -08004730 : +0800382c : * The value of this parameter depend on device used within the same series * * @retval None */ void FLASH_PageErase(uint32_t PageAddress) { - 8004730: b480 push {r7} - 8004732: b083 sub sp, #12 - 8004734: af00 add r7, sp, #0 - 8004736: 6078 str r0, [r7, #4] + 800382c: b480 push {r7} + 800382e: b083 sub sp, #12 + 8003830: af00 add r7, sp, #0 + 8003832: 6078 str r0, [r7, #4] /* Clean the error context */ pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - 8004738: 4b0b ldr r3, [pc, #44] @ (8004768 ) - 800473a: 2200 movs r2, #0 - 800473c: 61da str r2, [r3, #28] + 8003834: 4b0b ldr r3, [pc, #44] @ (8003864 ) + 8003836: 2200 movs r2, #0 + 8003838: 61da str r2, [r3, #28] } else { #endif /* FLASH_BANK2_END */ /* Proceed to erase the page */ SET_BIT(FLASH->CR, FLASH_CR_PER); - 800473e: 4b0b ldr r3, [pc, #44] @ (800476c ) - 8004740: 691b ldr r3, [r3, #16] - 8004742: 4a0a ldr r2, [pc, #40] @ (800476c ) - 8004744: f043 0302 orr.w r3, r3, #2 - 8004748: 6113 str r3, [r2, #16] + 800383a: 4b0b ldr r3, [pc, #44] @ (8003868 ) + 800383c: 691b ldr r3, [r3, #16] + 800383e: 4a0a ldr r2, [pc, #40] @ (8003868 ) + 8003840: f043 0302 orr.w r3, r3, #2 + 8003844: 6113 str r3, [r2, #16] WRITE_REG(FLASH->AR, PageAddress); - 800474a: 4a08 ldr r2, [pc, #32] @ (800476c ) - 800474c: 687b ldr r3, [r7, #4] - 800474e: 6153 str r3, [r2, #20] + 8003846: 4a08 ldr r2, [pc, #32] @ (8003868 ) + 8003848: 687b ldr r3, [r7, #4] + 800384a: 6153 str r3, [r2, #20] SET_BIT(FLASH->CR, FLASH_CR_STRT); - 8004750: 4b06 ldr r3, [pc, #24] @ (800476c ) - 8004752: 691b ldr r3, [r3, #16] - 8004754: 4a05 ldr r2, [pc, #20] @ (800476c ) - 8004756: f043 0340 orr.w r3, r3, #64 @ 0x40 - 800475a: 6113 str r3, [r2, #16] + 800384c: 4b06 ldr r3, [pc, #24] @ (8003868 ) + 800384e: 691b ldr r3, [r3, #16] + 8003850: 4a05 ldr r2, [pc, #20] @ (8003868 ) + 8003852: f043 0340 orr.w r3, r3, #64 @ 0x40 + 8003856: 6113 str r3, [r2, #16] #if defined(FLASH_BANK2_END) } #endif /* FLASH_BANK2_END */ } - 800475c: bf00 nop - 800475e: 370c adds r7, #12 - 8004760: 46bd mov sp, r7 - 8004762: bc80 pop {r7} - 8004764: 4770 bx lr - 8004766: bf00 nop - 8004768: 200007b8 .word 0x200007b8 - 800476c: 40022000 .word 0x40022000 + 8003858: bf00 nop + 800385a: 370c adds r7, #12 + 800385c: 46bd mov sp, r7 + 800385e: bc80 pop {r7} + 8003860: 4770 bx lr + 8003862: bf00 nop + 8003864: 200006f0 .word 0x200006f0 + 8003868: 40022000 .word 0x40022000 -08004770 : +0800386c : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8004770: b480 push {r7} - 8004772: b08b sub sp, #44 @ 0x2c - 8004774: af00 add r7, sp, #0 - 8004776: 6078 str r0, [r7, #4] - 8004778: 6039 str r1, [r7, #0] + 800386c: b480 push {r7} + 800386e: b08b sub sp, #44 @ 0x2c + 8003870: af00 add r7, sp, #0 + 8003872: 6078 str r0, [r7, #4] + 8003874: 6039 str r1, [r7, #0] uint32_t position = 0x00u; - 800477a: 2300 movs r3, #0 - 800477c: 627b str r3, [r7, #36] @ 0x24 + 8003876: 2300 movs r3, #0 + 8003878: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; - 800477e: 2300 movs r3, #0 - 8004780: 623b str r3, [r7, #32] + 800387a: 2300 movs r3, #0 + 800387c: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) - 8004782: e169 b.n 8004a58 + 800387e: e169 b.n 8003b54 { /* Get the IO position */ ioposition = (0x01uL << position); - 8004784: 2201 movs r2, #1 - 8004786: 6a7b ldr r3, [r7, #36] @ 0x24 - 8004788: fa02 f303 lsl.w r3, r2, r3 - 800478c: 61fb str r3, [r7, #28] + 8003880: 2201 movs r2, #1 + 8003882: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003884: fa02 f303 lsl.w r3, r2, r3 + 8003888: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - 800478e: 683b ldr r3, [r7, #0] - 8004790: 681b ldr r3, [r3, #0] - 8004792: 69fa ldr r2, [r7, #28] - 8004794: 4013 ands r3, r2 - 8004796: 61bb str r3, [r7, #24] + 800388a: 683b ldr r3, [r7, #0] + 800388c: 681b ldr r3, [r3, #0] + 800388e: 69fa ldr r2, [r7, #28] + 8003890: 4013 ands r3, r2 + 8003892: 61bb str r3, [r7, #24] if (iocurrent == ioposition) - 8004798: 69ba ldr r2, [r7, #24] - 800479a: 69fb ldr r3, [r7, #28] - 800479c: 429a cmp r2, r3 - 800479e: f040 8158 bne.w 8004a52 + 8003894: 69ba ldr r2, [r7, #24] + 8003896: 69fb ldr r3, [r7, #28] + 8003898: 429a cmp r2, r3 + 800389a: f040 8158 bne.w 8003b4e { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) - 80047a2: 683b ldr r3, [r7, #0] - 80047a4: 685b ldr r3, [r3, #4] - 80047a6: 4a9a ldr r2, [pc, #616] @ (8004a10 ) - 80047a8: 4293 cmp r3, r2 - 80047aa: d05e beq.n 800486a - 80047ac: 4a98 ldr r2, [pc, #608] @ (8004a10 ) - 80047ae: 4293 cmp r3, r2 - 80047b0: d875 bhi.n 800489e - 80047b2: 4a98 ldr r2, [pc, #608] @ (8004a14 ) - 80047b4: 4293 cmp r3, r2 - 80047b6: d058 beq.n 800486a - 80047b8: 4a96 ldr r2, [pc, #600] @ (8004a14 ) - 80047ba: 4293 cmp r3, r2 - 80047bc: d86f bhi.n 800489e - 80047be: 4a96 ldr r2, [pc, #600] @ (8004a18 ) - 80047c0: 4293 cmp r3, r2 - 80047c2: d052 beq.n 800486a - 80047c4: 4a94 ldr r2, [pc, #592] @ (8004a18 ) - 80047c6: 4293 cmp r3, r2 - 80047c8: d869 bhi.n 800489e - 80047ca: 4a94 ldr r2, [pc, #592] @ (8004a1c ) - 80047cc: 4293 cmp r3, r2 - 80047ce: d04c beq.n 800486a - 80047d0: 4a92 ldr r2, [pc, #584] @ (8004a1c ) - 80047d2: 4293 cmp r3, r2 - 80047d4: d863 bhi.n 800489e - 80047d6: 4a92 ldr r2, [pc, #584] @ (8004a20 ) - 80047d8: 4293 cmp r3, r2 - 80047da: d046 beq.n 800486a - 80047dc: 4a90 ldr r2, [pc, #576] @ (8004a20 ) - 80047de: 4293 cmp r3, r2 - 80047e0: d85d bhi.n 800489e - 80047e2: 2b12 cmp r3, #18 - 80047e4: d82a bhi.n 800483c - 80047e6: 2b12 cmp r3, #18 - 80047e8: d859 bhi.n 800489e - 80047ea: a201 add r2, pc, #4 @ (adr r2, 80047f0 ) - 80047ec: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80047f0: 0800486b .word 0x0800486b - 80047f4: 08004845 .word 0x08004845 - 80047f8: 08004857 .word 0x08004857 - 80047fc: 08004899 .word 0x08004899 - 8004800: 0800489f .word 0x0800489f - 8004804: 0800489f .word 0x0800489f - 8004808: 0800489f .word 0x0800489f - 800480c: 0800489f .word 0x0800489f - 8004810: 0800489f .word 0x0800489f - 8004814: 0800489f .word 0x0800489f - 8004818: 0800489f .word 0x0800489f - 800481c: 0800489f .word 0x0800489f - 8004820: 0800489f .word 0x0800489f - 8004824: 0800489f .word 0x0800489f - 8004828: 0800489f .word 0x0800489f - 800482c: 0800489f .word 0x0800489f - 8004830: 0800489f .word 0x0800489f - 8004834: 0800484d .word 0x0800484d - 8004838: 08004861 .word 0x08004861 - 800483c: 4a79 ldr r2, [pc, #484] @ (8004a24 ) - 800483e: 4293 cmp r3, r2 - 8004840: d013 beq.n 800486a + 800389e: 683b ldr r3, [r7, #0] + 80038a0: 685b ldr r3, [r3, #4] + 80038a2: 4a9a ldr r2, [pc, #616] @ (8003b0c ) + 80038a4: 4293 cmp r3, r2 + 80038a6: d05e beq.n 8003966 + 80038a8: 4a98 ldr r2, [pc, #608] @ (8003b0c ) + 80038aa: 4293 cmp r3, r2 + 80038ac: d875 bhi.n 800399a + 80038ae: 4a98 ldr r2, [pc, #608] @ (8003b10 ) + 80038b0: 4293 cmp r3, r2 + 80038b2: d058 beq.n 8003966 + 80038b4: 4a96 ldr r2, [pc, #600] @ (8003b10 ) + 80038b6: 4293 cmp r3, r2 + 80038b8: d86f bhi.n 800399a + 80038ba: 4a96 ldr r2, [pc, #600] @ (8003b14 ) + 80038bc: 4293 cmp r3, r2 + 80038be: d052 beq.n 8003966 + 80038c0: 4a94 ldr r2, [pc, #592] @ (8003b14 ) + 80038c2: 4293 cmp r3, r2 + 80038c4: d869 bhi.n 800399a + 80038c6: 4a94 ldr r2, [pc, #592] @ (8003b18 ) + 80038c8: 4293 cmp r3, r2 + 80038ca: d04c beq.n 8003966 + 80038cc: 4a92 ldr r2, [pc, #584] @ (8003b18 ) + 80038ce: 4293 cmp r3, r2 + 80038d0: d863 bhi.n 800399a + 80038d2: 4a92 ldr r2, [pc, #584] @ (8003b1c ) + 80038d4: 4293 cmp r3, r2 + 80038d6: d046 beq.n 8003966 + 80038d8: 4a90 ldr r2, [pc, #576] @ (8003b1c ) + 80038da: 4293 cmp r3, r2 + 80038dc: d85d bhi.n 800399a + 80038de: 2b12 cmp r3, #18 + 80038e0: d82a bhi.n 8003938 + 80038e2: 2b12 cmp r3, #18 + 80038e4: d859 bhi.n 800399a + 80038e6: a201 add r2, pc, #4 @ (adr r2, 80038ec ) + 80038e8: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80038ec: 08003967 .word 0x08003967 + 80038f0: 08003941 .word 0x08003941 + 80038f4: 08003953 .word 0x08003953 + 80038f8: 08003995 .word 0x08003995 + 80038fc: 0800399b .word 0x0800399b + 8003900: 0800399b .word 0x0800399b + 8003904: 0800399b .word 0x0800399b + 8003908: 0800399b .word 0x0800399b + 800390c: 0800399b .word 0x0800399b + 8003910: 0800399b .word 0x0800399b + 8003914: 0800399b .word 0x0800399b + 8003918: 0800399b .word 0x0800399b + 800391c: 0800399b .word 0x0800399b + 8003920: 0800399b .word 0x0800399b + 8003924: 0800399b .word 0x0800399b + 8003928: 0800399b .word 0x0800399b + 800392c: 0800399b .word 0x0800399b + 8003930: 08003949 .word 0x08003949 + 8003934: 0800395d .word 0x0800395d + 8003938: 4a79 ldr r2, [pc, #484] @ (8003b20 ) + 800393a: 4293 cmp r3, r2 + 800393c: d013 beq.n 8003966 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; - 8004842: e02c b.n 800489e + 800393e: e02c b.n 800399a config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; - 8004844: 683b ldr r3, [r7, #0] - 8004846: 68db ldr r3, [r3, #12] - 8004848: 623b str r3, [r7, #32] + 8003940: 683b ldr r3, [r7, #0] + 8003942: 68db ldr r3, [r3, #12] + 8003944: 623b str r3, [r7, #32] break; - 800484a: e029 b.n 80048a0 + 8003946: e029 b.n 800399c config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; - 800484c: 683b ldr r3, [r7, #0] - 800484e: 68db ldr r3, [r3, #12] - 8004850: 3304 adds r3, #4 - 8004852: 623b str r3, [r7, #32] + 8003948: 683b ldr r3, [r7, #0] + 800394a: 68db ldr r3, [r3, #12] + 800394c: 3304 adds r3, #4 + 800394e: 623b str r3, [r7, #32] break; - 8004854: e024 b.n 80048a0 + 8003950: e024 b.n 800399c config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; - 8004856: 683b ldr r3, [r7, #0] - 8004858: 68db ldr r3, [r3, #12] - 800485a: 3308 adds r3, #8 - 800485c: 623b str r3, [r7, #32] + 8003952: 683b ldr r3, [r7, #0] + 8003954: 68db ldr r3, [r3, #12] + 8003956: 3308 adds r3, #8 + 8003958: 623b str r3, [r7, #32] break; - 800485e: e01f b.n 80048a0 + 800395a: e01f b.n 800399c config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; - 8004860: 683b ldr r3, [r7, #0] - 8004862: 68db ldr r3, [r3, #12] - 8004864: 330c adds r3, #12 - 8004866: 623b str r3, [r7, #32] + 800395c: 683b ldr r3, [r7, #0] + 800395e: 68db ldr r3, [r3, #12] + 8003960: 330c adds r3, #12 + 8003962: 623b str r3, [r7, #32] break; - 8004868: e01a b.n 80048a0 + 8003964: e01a b.n 800399c if (GPIO_Init->Pull == GPIO_NOPULL) - 800486a: 683b ldr r3, [r7, #0] - 800486c: 689b ldr r3, [r3, #8] - 800486e: 2b00 cmp r3, #0 - 8004870: d102 bne.n 8004878 + 8003966: 683b ldr r3, [r7, #0] + 8003968: 689b ldr r3, [r3, #8] + 800396a: 2b00 cmp r3, #0 + 800396c: d102 bne.n 8003974 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; - 8004872: 2304 movs r3, #4 - 8004874: 623b str r3, [r7, #32] + 800396e: 2304 movs r3, #4 + 8003970: 623b str r3, [r7, #32] break; - 8004876: e013 b.n 80048a0 + 8003972: e013 b.n 800399c else if (GPIO_Init->Pull == GPIO_PULLUP) - 8004878: 683b ldr r3, [r7, #0] - 800487a: 689b ldr r3, [r3, #8] - 800487c: 2b01 cmp r3, #1 - 800487e: d105 bne.n 800488c + 8003974: 683b ldr r3, [r7, #0] + 8003976: 689b ldr r3, [r3, #8] + 8003978: 2b01 cmp r3, #1 + 800397a: d105 bne.n 8003988 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 8004880: 2308 movs r3, #8 - 8004882: 623b str r3, [r7, #32] + 800397c: 2308 movs r3, #8 + 800397e: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; - 8004884: 687b ldr r3, [r7, #4] - 8004886: 69fa ldr r2, [r7, #28] - 8004888: 611a str r2, [r3, #16] + 8003980: 687b ldr r3, [r7, #4] + 8003982: 69fa ldr r2, [r7, #28] + 8003984: 611a str r2, [r3, #16] break; - 800488a: e009 b.n 80048a0 + 8003986: e009 b.n 800399c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 800488c: 2308 movs r3, #8 - 800488e: 623b str r3, [r7, #32] + 8003988: 2308 movs r3, #8 + 800398a: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; - 8004890: 687b ldr r3, [r7, #4] - 8004892: 69fa ldr r2, [r7, #28] - 8004894: 615a str r2, [r3, #20] + 800398c: 687b ldr r3, [r7, #4] + 800398e: 69fa ldr r2, [r7, #28] + 8003990: 615a str r2, [r3, #20] break; - 8004896: e003 b.n 80048a0 + 8003992: e003 b.n 800399c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; - 8004898: 2300 movs r3, #0 - 800489a: 623b str r3, [r7, #32] + 8003994: 2300 movs r3, #0 + 8003996: 623b str r3, [r7, #32] break; - 800489c: e000 b.n 80048a0 + 8003998: e000 b.n 800399c break; - 800489e: bf00 nop + 800399a: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; - 80048a0: 69bb ldr r3, [r7, #24] - 80048a2: 2bff cmp r3, #255 @ 0xff - 80048a4: d801 bhi.n 80048aa - 80048a6: 687b ldr r3, [r7, #4] - 80048a8: e001 b.n 80048ae - 80048aa: 687b ldr r3, [r7, #4] - 80048ac: 3304 adds r3, #4 - 80048ae: 617b str r3, [r7, #20] + 800399c: 69bb ldr r3, [r7, #24] + 800399e: 2bff cmp r3, #255 @ 0xff + 80039a0: d801 bhi.n 80039a6 + 80039a2: 687b ldr r3, [r7, #4] + 80039a4: e001 b.n 80039aa + 80039a6: 687b ldr r3, [r7, #4] + 80039a8: 3304 adds r3, #4 + 80039aa: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); - 80048b0: 69bb ldr r3, [r7, #24] - 80048b2: 2bff cmp r3, #255 @ 0xff - 80048b4: d802 bhi.n 80048bc - 80048b6: 6a7b ldr r3, [r7, #36] @ 0x24 - 80048b8: 009b lsls r3, r3, #2 - 80048ba: e002 b.n 80048c2 - 80048bc: 6a7b ldr r3, [r7, #36] @ 0x24 - 80048be: 3b08 subs r3, #8 - 80048c0: 009b lsls r3, r3, #2 - 80048c2: 613b str r3, [r7, #16] + 80039ac: 69bb ldr r3, [r7, #24] + 80039ae: 2bff cmp r3, #255 @ 0xff + 80039b0: d802 bhi.n 80039b8 + 80039b2: 6a7b ldr r3, [r7, #36] @ 0x24 + 80039b4: 009b lsls r3, r3, #2 + 80039b6: e002 b.n 80039be + 80039b8: 6a7b ldr r3, [r7, #36] @ 0x24 + 80039ba: 3b08 subs r3, #8 + 80039bc: 009b lsls r3, r3, #2 + 80039be: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); - 80048c4: 697b ldr r3, [r7, #20] - 80048c6: 681a ldr r2, [r3, #0] - 80048c8: 210f movs r1, #15 - 80048ca: 693b ldr r3, [r7, #16] - 80048cc: fa01 f303 lsl.w r3, r1, r3 - 80048d0: 43db mvns r3, r3 - 80048d2: 401a ands r2, r3 - 80048d4: 6a39 ldr r1, [r7, #32] - 80048d6: 693b ldr r3, [r7, #16] - 80048d8: fa01 f303 lsl.w r3, r1, r3 - 80048dc: 431a orrs r2, r3 - 80048de: 697b ldr r3, [r7, #20] - 80048e0: 601a str r2, [r3, #0] + 80039c0: 697b ldr r3, [r7, #20] + 80039c2: 681a ldr r2, [r3, #0] + 80039c4: 210f movs r1, #15 + 80039c6: 693b ldr r3, [r7, #16] + 80039c8: fa01 f303 lsl.w r3, r1, r3 + 80039cc: 43db mvns r3, r3 + 80039ce: 401a ands r2, r3 + 80039d0: 6a39 ldr r1, [r7, #32] + 80039d2: 693b ldr r3, [r7, #16] + 80039d4: fa01 f303 lsl.w r3, r1, r3 + 80039d8: 431a orrs r2, r3 + 80039da: 697b ldr r3, [r7, #20] + 80039dc: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 80048e2: 683b ldr r3, [r7, #0] - 80048e4: 685b ldr r3, [r3, #4] - 80048e6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 80048ea: 2b00 cmp r3, #0 - 80048ec: f000 80b1 beq.w 8004a52 + 80039de: 683b ldr r3, [r7, #0] + 80039e0: 685b ldr r3, [r3, #4] + 80039e2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80039e6: 2b00 cmp r3, #0 + 80039e8: f000 80b1 beq.w 8003b4e { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); - 80048f0: 4b4d ldr r3, [pc, #308] @ (8004a28 ) - 80048f2: 699b ldr r3, [r3, #24] - 80048f4: 4a4c ldr r2, [pc, #304] @ (8004a28 ) - 80048f6: f043 0301 orr.w r3, r3, #1 - 80048fa: 6193 str r3, [r2, #24] - 80048fc: 4b4a ldr r3, [pc, #296] @ (8004a28 ) - 80048fe: 699b ldr r3, [r3, #24] - 8004900: f003 0301 and.w r3, r3, #1 - 8004904: 60bb str r3, [r7, #8] - 8004906: 68bb ldr r3, [r7, #8] + 80039ec: 4b4d ldr r3, [pc, #308] @ (8003b24 ) + 80039ee: 699b ldr r3, [r3, #24] + 80039f0: 4a4c ldr r2, [pc, #304] @ (8003b24 ) + 80039f2: f043 0301 orr.w r3, r3, #1 + 80039f6: 6193 str r3, [r2, #24] + 80039f8: 4b4a ldr r3, [pc, #296] @ (8003b24 ) + 80039fa: 699b ldr r3, [r3, #24] + 80039fc: f003 0301 and.w r3, r3, #1 + 8003a00: 60bb str r3, [r7, #8] + 8003a02: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; - 8004908: 4a48 ldr r2, [pc, #288] @ (8004a2c ) - 800490a: 6a7b ldr r3, [r7, #36] @ 0x24 - 800490c: 089b lsrs r3, r3, #2 - 800490e: 3302 adds r3, #2 - 8004910: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8004914: 60fb str r3, [r7, #12] + 8003a04: 4a48 ldr r2, [pc, #288] @ (8003b28 ) + 8003a06: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003a08: 089b lsrs r3, r3, #2 + 8003a0a: 3302 adds r3, #2 + 8003a0c: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8003a10: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); - 8004916: 6a7b ldr r3, [r7, #36] @ 0x24 - 8004918: f003 0303 and.w r3, r3, #3 - 800491c: 009b lsls r3, r3, #2 - 800491e: 220f movs r2, #15 - 8004920: fa02 f303 lsl.w r3, r2, r3 - 8004924: 43db mvns r3, r3 - 8004926: 68fa ldr r2, [r7, #12] - 8004928: 4013 ands r3, r2 - 800492a: 60fb str r3, [r7, #12] + 8003a12: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003a14: f003 0303 and.w r3, r3, #3 + 8003a18: 009b lsls r3, r3, #2 + 8003a1a: 220f movs r2, #15 + 8003a1c: fa02 f303 lsl.w r3, r2, r3 + 8003a20: 43db mvns r3, r3 + 8003a22: 68fa ldr r2, [r7, #12] + 8003a24: 4013 ands r3, r2 + 8003a26: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); - 800492c: 687b ldr r3, [r7, #4] - 800492e: 4a40 ldr r2, [pc, #256] @ (8004a30 ) - 8004930: 4293 cmp r3, r2 - 8004932: d013 beq.n 800495c - 8004934: 687b ldr r3, [r7, #4] - 8004936: 4a3f ldr r2, [pc, #252] @ (8004a34 ) - 8004938: 4293 cmp r3, r2 - 800493a: d00d beq.n 8004958 - 800493c: 687b ldr r3, [r7, #4] - 800493e: 4a3e ldr r2, [pc, #248] @ (8004a38 ) - 8004940: 4293 cmp r3, r2 - 8004942: d007 beq.n 8004954 - 8004944: 687b ldr r3, [r7, #4] - 8004946: 4a3d ldr r2, [pc, #244] @ (8004a3c ) - 8004948: 4293 cmp r3, r2 - 800494a: d101 bne.n 8004950 - 800494c: 2303 movs r3, #3 - 800494e: e006 b.n 800495e - 8004950: 2304 movs r3, #4 - 8004952: e004 b.n 800495e - 8004954: 2302 movs r3, #2 - 8004956: e002 b.n 800495e - 8004958: 2301 movs r3, #1 - 800495a: e000 b.n 800495e - 800495c: 2300 movs r3, #0 - 800495e: 6a7a ldr r2, [r7, #36] @ 0x24 - 8004960: f002 0203 and.w r2, r2, #3 - 8004964: 0092 lsls r2, r2, #2 - 8004966: 4093 lsls r3, r2 - 8004968: 68fa ldr r2, [r7, #12] - 800496a: 4313 orrs r3, r2 - 800496c: 60fb str r3, [r7, #12] + 8003a28: 687b ldr r3, [r7, #4] + 8003a2a: 4a40 ldr r2, [pc, #256] @ (8003b2c ) + 8003a2c: 4293 cmp r3, r2 + 8003a2e: d013 beq.n 8003a58 + 8003a30: 687b ldr r3, [r7, #4] + 8003a32: 4a3f ldr r2, [pc, #252] @ (8003b30 ) + 8003a34: 4293 cmp r3, r2 + 8003a36: d00d beq.n 8003a54 + 8003a38: 687b ldr r3, [r7, #4] + 8003a3a: 4a3e ldr r2, [pc, #248] @ (8003b34 ) + 8003a3c: 4293 cmp r3, r2 + 8003a3e: d007 beq.n 8003a50 + 8003a40: 687b ldr r3, [r7, #4] + 8003a42: 4a3d ldr r2, [pc, #244] @ (8003b38 ) + 8003a44: 4293 cmp r3, r2 + 8003a46: d101 bne.n 8003a4c + 8003a48: 2303 movs r3, #3 + 8003a4a: e006 b.n 8003a5a + 8003a4c: 2304 movs r3, #4 + 8003a4e: e004 b.n 8003a5a + 8003a50: 2302 movs r3, #2 + 8003a52: e002 b.n 8003a5a + 8003a54: 2301 movs r3, #1 + 8003a56: e000 b.n 8003a5a + 8003a58: 2300 movs r3, #0 + 8003a5a: 6a7a ldr r2, [r7, #36] @ 0x24 + 8003a5c: f002 0203 and.w r2, r2, #3 + 8003a60: 0092 lsls r2, r2, #2 + 8003a62: 4093 lsls r3, r2 + 8003a64: 68fa ldr r2, [r7, #12] + 8003a66: 4313 orrs r3, r2 + 8003a68: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; - 800496e: 492f ldr r1, [pc, #188] @ (8004a2c ) - 8004970: 6a7b ldr r3, [r7, #36] @ 0x24 - 8004972: 089b lsrs r3, r3, #2 - 8004974: 3302 adds r3, #2 - 8004976: 68fa ldr r2, [r7, #12] - 8004978: f841 2023 str.w r2, [r1, r3, lsl #2] + 8003a6a: 492f ldr r1, [pc, #188] @ (8003b28 ) + 8003a6c: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003a6e: 089b lsrs r3, r3, #2 + 8003a70: 3302 adds r3, #2 + 8003a72: 68fa ldr r2, [r7, #12] + 8003a74: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 800497c: 683b ldr r3, [r7, #0] - 800497e: 685b ldr r3, [r3, #4] - 8004980: f403 1380 and.w r3, r3, #1048576 @ 0x100000 - 8004984: 2b00 cmp r3, #0 - 8004986: d006 beq.n 8004996 + 8003a78: 683b ldr r3, [r7, #0] + 8003a7a: 685b ldr r3, [r3, #4] + 8003a7c: f403 1380 and.w r3, r3, #1048576 @ 0x100000 + 8003a80: 2b00 cmp r3, #0 + 8003a82: d006 beq.n 8003a92 { SET_BIT(EXTI->RTSR, iocurrent); - 8004988: 4b2d ldr r3, [pc, #180] @ (8004a40 ) - 800498a: 689a ldr r2, [r3, #8] - 800498c: 492c ldr r1, [pc, #176] @ (8004a40 ) - 800498e: 69bb ldr r3, [r7, #24] - 8004990: 4313 orrs r3, r2 - 8004992: 608b str r3, [r1, #8] - 8004994: e006 b.n 80049a4 + 8003a84: 4b2d ldr r3, [pc, #180] @ (8003b3c ) + 8003a86: 689a ldr r2, [r3, #8] + 8003a88: 492c ldr r1, [pc, #176] @ (8003b3c ) + 8003a8a: 69bb ldr r3, [r7, #24] + 8003a8c: 4313 orrs r3, r2 + 8003a8e: 608b str r3, [r1, #8] + 8003a90: e006 b.n 8003aa0 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); - 8004996: 4b2a ldr r3, [pc, #168] @ (8004a40 ) - 8004998: 689a ldr r2, [r3, #8] - 800499a: 69bb ldr r3, [r7, #24] - 800499c: 43db mvns r3, r3 - 800499e: 4928 ldr r1, [pc, #160] @ (8004a40 ) - 80049a0: 4013 ands r3, r2 - 80049a2: 608b str r3, [r1, #8] + 8003a92: 4b2a ldr r3, [pc, #168] @ (8003b3c ) + 8003a94: 689a ldr r2, [r3, #8] + 8003a96: 69bb ldr r3, [r7, #24] + 8003a98: 43db mvns r3, r3 + 8003a9a: 4928 ldr r1, [pc, #160] @ (8003b3c ) + 8003a9c: 4013 ands r3, r2 + 8003a9e: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 80049a4: 683b ldr r3, [r7, #0] - 80049a6: 685b ldr r3, [r3, #4] - 80049a8: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 80049ac: 2b00 cmp r3, #0 - 80049ae: d006 beq.n 80049be + 8003aa0: 683b ldr r3, [r7, #0] + 8003aa2: 685b ldr r3, [r3, #4] + 8003aa4: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 8003aa8: 2b00 cmp r3, #0 + 8003aaa: d006 beq.n 8003aba { SET_BIT(EXTI->FTSR, iocurrent); - 80049b0: 4b23 ldr r3, [pc, #140] @ (8004a40 ) - 80049b2: 68da ldr r2, [r3, #12] - 80049b4: 4922 ldr r1, [pc, #136] @ (8004a40 ) - 80049b6: 69bb ldr r3, [r7, #24] - 80049b8: 4313 orrs r3, r2 - 80049ba: 60cb str r3, [r1, #12] - 80049bc: e006 b.n 80049cc + 8003aac: 4b23 ldr r3, [pc, #140] @ (8003b3c ) + 8003aae: 68da ldr r2, [r3, #12] + 8003ab0: 4922 ldr r1, [pc, #136] @ (8003b3c ) + 8003ab2: 69bb ldr r3, [r7, #24] + 8003ab4: 4313 orrs r3, r2 + 8003ab6: 60cb str r3, [r1, #12] + 8003ab8: e006 b.n 8003ac8 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); - 80049be: 4b20 ldr r3, [pc, #128] @ (8004a40 ) - 80049c0: 68da ldr r2, [r3, #12] - 80049c2: 69bb ldr r3, [r7, #24] - 80049c4: 43db mvns r3, r3 - 80049c6: 491e ldr r1, [pc, #120] @ (8004a40 ) - 80049c8: 4013 ands r3, r2 - 80049ca: 60cb str r3, [r1, #12] + 8003aba: 4b20 ldr r3, [pc, #128] @ (8003b3c ) + 8003abc: 68da ldr r2, [r3, #12] + 8003abe: 69bb ldr r3, [r7, #24] + 8003ac0: 43db mvns r3, r3 + 8003ac2: 491e ldr r1, [pc, #120] @ (8003b3c ) + 8003ac4: 4013 ands r3, r2 + 8003ac6: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 80049cc: 683b ldr r3, [r7, #0] - 80049ce: 685b ldr r3, [r3, #4] - 80049d0: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 80049d4: 2b00 cmp r3, #0 - 80049d6: d006 beq.n 80049e6 + 8003ac8: 683b ldr r3, [r7, #0] + 8003aca: 685b ldr r3, [r3, #4] + 8003acc: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8003ad0: 2b00 cmp r3, #0 + 8003ad2: d006 beq.n 8003ae2 { SET_BIT(EXTI->EMR, iocurrent); - 80049d8: 4b19 ldr r3, [pc, #100] @ (8004a40 ) - 80049da: 685a ldr r2, [r3, #4] - 80049dc: 4918 ldr r1, [pc, #96] @ (8004a40 ) - 80049de: 69bb ldr r3, [r7, #24] - 80049e0: 4313 orrs r3, r2 - 80049e2: 604b str r3, [r1, #4] - 80049e4: e006 b.n 80049f4 + 8003ad4: 4b19 ldr r3, [pc, #100] @ (8003b3c ) + 8003ad6: 685a ldr r2, [r3, #4] + 8003ad8: 4918 ldr r1, [pc, #96] @ (8003b3c ) + 8003ada: 69bb ldr r3, [r7, #24] + 8003adc: 4313 orrs r3, r2 + 8003ade: 604b str r3, [r1, #4] + 8003ae0: e006 b.n 8003af0 } else { CLEAR_BIT(EXTI->EMR, iocurrent); - 80049e6: 4b16 ldr r3, [pc, #88] @ (8004a40 ) - 80049e8: 685a ldr r2, [r3, #4] - 80049ea: 69bb ldr r3, [r7, #24] - 80049ec: 43db mvns r3, r3 - 80049ee: 4914 ldr r1, [pc, #80] @ (8004a40 ) - 80049f0: 4013 ands r3, r2 - 80049f2: 604b str r3, [r1, #4] + 8003ae2: 4b16 ldr r3, [pc, #88] @ (8003b3c ) + 8003ae4: 685a ldr r2, [r3, #4] + 8003ae6: 69bb ldr r3, [r7, #24] + 8003ae8: 43db mvns r3, r3 + 8003aea: 4914 ldr r1, [pc, #80] @ (8003b3c ) + 8003aec: 4013 ands r3, r2 + 8003aee: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 80049f4: 683b ldr r3, [r7, #0] - 80049f6: 685b ldr r3, [r3, #4] - 80049f8: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 80049fc: 2b00 cmp r3, #0 - 80049fe: d021 beq.n 8004a44 + 8003af0: 683b ldr r3, [r7, #0] + 8003af2: 685b ldr r3, [r3, #4] + 8003af4: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8003af8: 2b00 cmp r3, #0 + 8003afa: d021 beq.n 8003b40 { SET_BIT(EXTI->IMR, iocurrent); - 8004a00: 4b0f ldr r3, [pc, #60] @ (8004a40 ) - 8004a02: 681a ldr r2, [r3, #0] - 8004a04: 490e ldr r1, [pc, #56] @ (8004a40 ) - 8004a06: 69bb ldr r3, [r7, #24] - 8004a08: 4313 orrs r3, r2 - 8004a0a: 600b str r3, [r1, #0] - 8004a0c: e021 b.n 8004a52 - 8004a0e: bf00 nop - 8004a10: 10320000 .word 0x10320000 - 8004a14: 10310000 .word 0x10310000 - 8004a18: 10220000 .word 0x10220000 - 8004a1c: 10210000 .word 0x10210000 - 8004a20: 10120000 .word 0x10120000 - 8004a24: 10110000 .word 0x10110000 - 8004a28: 40021000 .word 0x40021000 - 8004a2c: 40010000 .word 0x40010000 - 8004a30: 40010800 .word 0x40010800 - 8004a34: 40010c00 .word 0x40010c00 - 8004a38: 40011000 .word 0x40011000 - 8004a3c: 40011400 .word 0x40011400 - 8004a40: 40010400 .word 0x40010400 + 8003afc: 4b0f ldr r3, [pc, #60] @ (8003b3c ) + 8003afe: 681a ldr r2, [r3, #0] + 8003b00: 490e ldr r1, [pc, #56] @ (8003b3c ) + 8003b02: 69bb ldr r3, [r7, #24] + 8003b04: 4313 orrs r3, r2 + 8003b06: 600b str r3, [r1, #0] + 8003b08: e021 b.n 8003b4e + 8003b0a: bf00 nop + 8003b0c: 10320000 .word 0x10320000 + 8003b10: 10310000 .word 0x10310000 + 8003b14: 10220000 .word 0x10220000 + 8003b18: 10210000 .word 0x10210000 + 8003b1c: 10120000 .word 0x10120000 + 8003b20: 10110000 .word 0x10110000 + 8003b24: 40021000 .word 0x40021000 + 8003b28: 40010000 .word 0x40010000 + 8003b2c: 40010800 .word 0x40010800 + 8003b30: 40010c00 .word 0x40010c00 + 8003b34: 40011000 .word 0x40011000 + 8003b38: 40011400 .word 0x40011400 + 8003b3c: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); - 8004a44: 4b0b ldr r3, [pc, #44] @ (8004a74 ) - 8004a46: 681a ldr r2, [r3, #0] - 8004a48: 69bb ldr r3, [r7, #24] - 8004a4a: 43db mvns r3, r3 - 8004a4c: 4909 ldr r1, [pc, #36] @ (8004a74 ) - 8004a4e: 4013 ands r3, r2 - 8004a50: 600b str r3, [r1, #0] + 8003b40: 4b0b ldr r3, [pc, #44] @ (8003b70 ) + 8003b42: 681a ldr r2, [r3, #0] + 8003b44: 69bb ldr r3, [r7, #24] + 8003b46: 43db mvns r3, r3 + 8003b48: 4909 ldr r1, [pc, #36] @ (8003b70 ) + 8003b4a: 4013 ands r3, r2 + 8003b4c: 600b str r3, [r1, #0] } } } position++; - 8004a52: 6a7b ldr r3, [r7, #36] @ 0x24 - 8004a54: 3301 adds r3, #1 - 8004a56: 627b str r3, [r7, #36] @ 0x24 + 8003b4e: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003b50: 3301 adds r3, #1 + 8003b52: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) - 8004a58: 683b ldr r3, [r7, #0] - 8004a5a: 681a ldr r2, [r3, #0] - 8004a5c: 6a7b ldr r3, [r7, #36] @ 0x24 - 8004a5e: fa22 f303 lsr.w r3, r2, r3 - 8004a62: 2b00 cmp r3, #0 - 8004a64: f47f ae8e bne.w 8004784 + 8003b54: 683b ldr r3, [r7, #0] + 8003b56: 681a ldr r2, [r3, #0] + 8003b58: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003b5a: fa22 f303 lsr.w r3, r2, r3 + 8003b5e: 2b00 cmp r3, #0 + 8003b60: f47f ae8e bne.w 8003880 } } - 8004a68: bf00 nop - 8004a6a: bf00 nop - 8004a6c: 372c adds r7, #44 @ 0x2c - 8004a6e: 46bd mov sp, r7 - 8004a70: bc80 pop {r7} - 8004a72: 4770 bx lr - 8004a74: 40010400 .word 0x40010400 + 8003b64: bf00 nop + 8003b66: bf00 nop + 8003b68: 372c adds r7, #44 @ 0x2c + 8003b6a: 46bd mov sp, r7 + 8003b6c: bc80 pop {r7} + 8003b6e: 4770 bx lr + 8003b70: 40010400 .word 0x40010400 -08004a78 : +08003b74 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 8004a78: b480 push {r7} - 8004a7a: b085 sub sp, #20 - 8004a7c: af00 add r7, sp, #0 - 8004a7e: 6078 str r0, [r7, #4] - 8004a80: 460b mov r3, r1 - 8004a82: 807b strh r3, [r7, #2] + 8003b74: b480 push {r7} + 8003b76: b085 sub sp, #20 + 8003b78: af00 add r7, sp, #0 + 8003b7a: 6078 str r0, [r7, #4] + 8003b7c: 460b mov r3, r1 + 8003b7e: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - 8004a84: 687b ldr r3, [r7, #4] - 8004a86: 689a ldr r2, [r3, #8] - 8004a88: 887b ldrh r3, [r7, #2] - 8004a8a: 4013 ands r3, r2 - 8004a8c: 2b00 cmp r3, #0 - 8004a8e: d002 beq.n 8004a96 + 8003b80: 687b ldr r3, [r7, #4] + 8003b82: 689a ldr r2, [r3, #8] + 8003b84: 887b ldrh r3, [r7, #2] + 8003b86: 4013 ands r3, r2 + 8003b88: 2b00 cmp r3, #0 + 8003b8a: d002 beq.n 8003b92 { bitstatus = GPIO_PIN_SET; - 8004a90: 2301 movs r3, #1 - 8004a92: 73fb strb r3, [r7, #15] - 8004a94: e001 b.n 8004a9a + 8003b8c: 2301 movs r3, #1 + 8003b8e: 73fb strb r3, [r7, #15] + 8003b90: e001 b.n 8003b96 } else { bitstatus = GPIO_PIN_RESET; - 8004a96: 2300 movs r3, #0 - 8004a98: 73fb strb r3, [r7, #15] + 8003b92: 2300 movs r3, #0 + 8003b94: 73fb strb r3, [r7, #15] } return bitstatus; - 8004a9a: 7bfb ldrb r3, [r7, #15] + 8003b96: 7bfb ldrb r3, [r7, #15] } - 8004a9c: 4618 mov r0, r3 - 8004a9e: 3714 adds r7, #20 - 8004aa0: 46bd mov sp, r7 - 8004aa2: bc80 pop {r7} - 8004aa4: 4770 bx lr + 8003b98: 4618 mov r0, r3 + 8003b9a: 3714 adds r7, #20 + 8003b9c: 46bd mov sp, r7 + 8003b9e: bc80 pop {r7} + 8003ba0: 4770 bx lr -08004aa6 : +08003ba2 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8004aa6: b480 push {r7} - 8004aa8: b083 sub sp, #12 - 8004aaa: af00 add r7, sp, #0 - 8004aac: 6078 str r0, [r7, #4] - 8004aae: 460b mov r3, r1 - 8004ab0: 807b strh r3, [r7, #2] - 8004ab2: 4613 mov r3, r2 - 8004ab4: 707b strb r3, [r7, #1] + 8003ba2: b480 push {r7} + 8003ba4: b083 sub sp, #12 + 8003ba6: af00 add r7, sp, #0 + 8003ba8: 6078 str r0, [r7, #4] + 8003baa: 460b mov r3, r1 + 8003bac: 807b strh r3, [r7, #2] + 8003bae: 4613 mov r3, r2 + 8003bb0: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 8004ab6: 787b ldrb r3, [r7, #1] - 8004ab8: 2b00 cmp r3, #0 - 8004aba: d003 beq.n 8004ac4 + 8003bb2: 787b ldrb r3, [r7, #1] + 8003bb4: 2b00 cmp r3, #0 + 8003bb6: d003 beq.n 8003bc0 { GPIOx->BSRR = GPIO_Pin; - 8004abc: 887a ldrh r2, [r7, #2] - 8004abe: 687b ldr r3, [r7, #4] - 8004ac0: 611a str r2, [r3, #16] + 8003bb8: 887a ldrh r2, [r7, #2] + 8003bba: 687b ldr r3, [r7, #4] + 8003bbc: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } - 8004ac2: e003 b.n 8004acc + 8003bbe: e003 b.n 8003bc8 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; - 8004ac4: 887b ldrh r3, [r7, #2] - 8004ac6: 041a lsls r2, r3, #16 - 8004ac8: 687b ldr r3, [r7, #4] - 8004aca: 611a str r2, [r3, #16] + 8003bc0: 887b ldrh r3, [r7, #2] + 8003bc2: 041a lsls r2, r3, #16 + 8003bc4: 687b ldr r3, [r7, #4] + 8003bc6: 611a str r2, [r3, #16] } - 8004acc: bf00 nop - 8004ace: 370c adds r7, #12 - 8004ad0: 46bd mov sp, r7 - 8004ad2: bc80 pop {r7} - 8004ad4: 4770 bx lr - ... + 8003bc8: bf00 nop + 8003bca: 370c adds r7, #12 + 8003bcc: 46bd mov sp, r7 + 8003bce: bc80 pop {r7} + 8003bd0: 4770 bx lr -08004ad8 : - * @brief This function handles EXTI interrupt request. - * @param GPIO_Pin: Specifies the pins connected EXTI line +08003bd2 : + * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral + * @param GPIO_Pin: Specifies the pins to be toggled. * @retval None */ -void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) +void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 8004ad8: b580 push {r7, lr} - 8004ada: b082 sub sp, #8 - 8004adc: af00 add r7, sp, #0 - 8004ade: 4603 mov r3, r0 - 8004ae0: 80fb strh r3, [r7, #6] - /* EXTI line interrupt detected */ - if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00u) - 8004ae2: 4b08 ldr r3, [pc, #32] @ (8004b04 ) - 8004ae4: 695a ldr r2, [r3, #20] - 8004ae6: 88fb ldrh r3, [r7, #6] - 8004ae8: 4013 ands r3, r2 - 8004aea: 2b00 cmp r3, #0 - 8004aec: d006 beq.n 8004afc - { - __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); - 8004aee: 4a05 ldr r2, [pc, #20] @ (8004b04 ) - 8004af0: 88fb ldrh r3, [r7, #6] - 8004af2: 6153 str r3, [r2, #20] - HAL_GPIO_EXTI_Callback(GPIO_Pin); - 8004af4: 88fb ldrh r3, [r7, #6] - 8004af6: 4618 mov r0, r3 - 8004af8: f7fd fc0e bl 8002318 - } -} - 8004afc: bf00 nop - 8004afe: 3708 adds r7, #8 - 8004b00: 46bd mov sp, r7 - 8004b02: bd80 pop {r7, pc} - 8004b04: 40010400 .word 0x40010400 + 8003bd2: b480 push {r7} + 8003bd4: b085 sub sp, #20 + 8003bd6: af00 add r7, sp, #0 + 8003bd8: 6078 str r0, [r7, #4] + 8003bda: 460b mov r3, r1 + 8003bdc: 807b strh r3, [r7, #2] -08004b08 : + /* Check the parameters */ + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + /* get current Output Data Register value */ + odr = GPIOx->ODR; + 8003bde: 687b ldr r3, [r7, #4] + 8003be0: 68db ldr r3, [r3, #12] + 8003be2: 60fb str r3, [r7, #12] + + /* Set selected pins that were at low level, and reset ones that were high */ + GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); + 8003be4: 887a ldrh r2, [r7, #2] + 8003be6: 68fb ldr r3, [r7, #12] + 8003be8: 4013 ands r3, r2 + 8003bea: 041a lsls r2, r3, #16 + 8003bec: 68fb ldr r3, [r7, #12] + 8003bee: 43d9 mvns r1, r3 + 8003bf0: 887b ldrh r3, [r7, #2] + 8003bf2: 400b ands r3, r1 + 8003bf4: 431a orrs r2, r3 + 8003bf6: 687b ldr r3, [r7, #4] + 8003bf8: 611a str r2, [r3, #16] +} + 8003bfa: bf00 nop + 8003bfc: 3714 adds r7, #20 + 8003bfe: 46bd mov sp, r7 + 8003c00: bc80 pop {r7} + 8003c02: 4770 bx lr + +08003c04 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { - 8004b08: b580 push {r7, lr} - 8004b0a: b084 sub sp, #16 - 8004b0c: af00 add r7, sp, #0 - 8004b0e: 6078 str r0, [r7, #4] + 8003c04: b580 push {r7, lr} + 8003c06: b084 sub sp, #16 + 8003c08: af00 add r7, sp, #0 + 8003c0a: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) - 8004b10: 687b ldr r3, [r7, #4] - 8004b12: 2b00 cmp r3, #0 - 8004b14: d101 bne.n 8004b1a + 8003c0c: 687b ldr r3, [r7, #4] + 8003c0e: 2b00 cmp r3, #0 + 8003c10: d101 bne.n 8003c16 { return HAL_ERROR; - 8004b16: 2301 movs r3, #1 - 8004b18: e12b b.n 8004d72 + 8003c12: 2301 movs r3, #1 + 8003c14: e12b b.n 8003e6e assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) - 8004b1a: 687b ldr r3, [r7, #4] - 8004b1c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8004b20: b2db uxtb r3, r3 - 8004b22: 2b00 cmp r3, #0 - 8004b24: d106 bne.n 8004b34 + 8003c16: 687b ldr r3, [r7, #4] + 8003c18: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8003c1c: b2db uxtb r3, r3 + 8003c1e: 2b00 cmp r3, #0 + 8003c20: d106 bne.n 8003c30 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; - 8004b26: 687b ldr r3, [r7, #4] - 8004b28: 2200 movs r2, #0 - 8004b2a: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003c22: 687b ldr r3, [r7, #4] + 8003c24: 2200 movs r2, #0 + 8003c26: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); - 8004b2e: 6878 ldr r0, [r7, #4] - 8004b30: f7fd fca8 bl 8002484 + 8003c2a: 6878 ldr r0, [r7, #4] + 8003c2c: f7fe fa42 bl 80020b4 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; - 8004b34: 687b ldr r3, [r7, #4] - 8004b36: 2224 movs r2, #36 @ 0x24 - 8004b38: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003c30: 687b ldr r3, [r7, #4] + 8003c32: 2224 movs r2, #36 @ 0x24 + 8003c34: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 8004b3c: 687b ldr r3, [r7, #4] - 8004b3e: 681b ldr r3, [r3, #0] - 8004b40: 681a ldr r2, [r3, #0] - 8004b42: 687b ldr r3, [r7, #4] - 8004b44: 681b ldr r3, [r3, #0] - 8004b46: f022 0201 bic.w r2, r2, #1 - 8004b4a: 601a str r2, [r3, #0] + 8003c38: 687b ldr r3, [r7, #4] + 8003c3a: 681b ldr r3, [r3, #0] + 8003c3c: 681a ldr r2, [r3, #0] + 8003c3e: 687b ldr r3, [r7, #4] + 8003c40: 681b ldr r3, [r3, #0] + 8003c42: f022 0201 bic.w r2, r2, #1 + 8003c46: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; - 8004b4c: 687b ldr r3, [r7, #4] - 8004b4e: 681b ldr r3, [r3, #0] - 8004b50: 681a ldr r2, [r3, #0] - 8004b52: 687b ldr r3, [r7, #4] - 8004b54: 681b ldr r3, [r3, #0] - 8004b56: f442 4200 orr.w r2, r2, #32768 @ 0x8000 - 8004b5a: 601a str r2, [r3, #0] + 8003c48: 687b ldr r3, [r7, #4] + 8003c4a: 681b ldr r3, [r3, #0] + 8003c4c: 681a ldr r2, [r3, #0] + 8003c4e: 687b ldr r3, [r7, #4] + 8003c50: 681b ldr r3, [r3, #0] + 8003c52: f442 4200 orr.w r2, r2, #32768 @ 0x8000 + 8003c56: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; - 8004b5c: 687b ldr r3, [r7, #4] - 8004b5e: 681b ldr r3, [r3, #0] - 8004b60: 681a ldr r2, [r3, #0] - 8004b62: 687b ldr r3, [r7, #4] - 8004b64: 681b ldr r3, [r3, #0] - 8004b66: f422 4200 bic.w r2, r2, #32768 @ 0x8000 - 8004b6a: 601a str r2, [r3, #0] + 8003c58: 687b ldr r3, [r7, #4] + 8003c5a: 681b ldr r3, [r3, #0] + 8003c5c: 681a ldr r2, [r3, #0] + 8003c5e: 687b ldr r3, [r7, #4] + 8003c60: 681b ldr r3, [r3, #0] + 8003c62: f422 4200 bic.w r2, r2, #32768 @ 0x8000 + 8003c66: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); - 8004b6c: f001 fbcc bl 8006308 - 8004b70: 60f8 str r0, [r7, #12] + 8003c68: f001 fbcc bl 8005404 + 8003c6c: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) - 8004b72: 687b ldr r3, [r7, #4] - 8004b74: 685b ldr r3, [r3, #4] - 8004b76: 4a81 ldr r2, [pc, #516] @ (8004d7c ) - 8004b78: 4293 cmp r3, r2 - 8004b7a: d807 bhi.n 8004b8c - 8004b7c: 68fb ldr r3, [r7, #12] - 8004b7e: 4a80 ldr r2, [pc, #512] @ (8004d80 ) - 8004b80: 4293 cmp r3, r2 - 8004b82: bf94 ite ls - 8004b84: 2301 movls r3, #1 - 8004b86: 2300 movhi r3, #0 - 8004b88: b2db uxtb r3, r3 - 8004b8a: e006 b.n 8004b9a - 8004b8c: 68fb ldr r3, [r7, #12] - 8004b8e: 4a7d ldr r2, [pc, #500] @ (8004d84 ) - 8004b90: 4293 cmp r3, r2 - 8004b92: bf94 ite ls - 8004b94: 2301 movls r3, #1 - 8004b96: 2300 movhi r3, #0 - 8004b98: b2db uxtb r3, r3 - 8004b9a: 2b00 cmp r3, #0 - 8004b9c: d001 beq.n 8004ba2 + 8003c6e: 687b ldr r3, [r7, #4] + 8003c70: 685b ldr r3, [r3, #4] + 8003c72: 4a81 ldr r2, [pc, #516] @ (8003e78 ) + 8003c74: 4293 cmp r3, r2 + 8003c76: d807 bhi.n 8003c88 + 8003c78: 68fb ldr r3, [r7, #12] + 8003c7a: 4a80 ldr r2, [pc, #512] @ (8003e7c ) + 8003c7c: 4293 cmp r3, r2 + 8003c7e: bf94 ite ls + 8003c80: 2301 movls r3, #1 + 8003c82: 2300 movhi r3, #0 + 8003c84: b2db uxtb r3, r3 + 8003c86: e006 b.n 8003c96 + 8003c88: 68fb ldr r3, [r7, #12] + 8003c8a: 4a7d ldr r2, [pc, #500] @ (8003e80 ) + 8003c8c: 4293 cmp r3, r2 + 8003c8e: bf94 ite ls + 8003c90: 2301 movls r3, #1 + 8003c92: 2300 movhi r3, #0 + 8003c94: b2db uxtb r3, r3 + 8003c96: 2b00 cmp r3, #0 + 8003c98: d001 beq.n 8003c9e { return HAL_ERROR; - 8004b9e: 2301 movs r3, #1 - 8004ba0: e0e7 b.n 8004d72 + 8003c9a: 2301 movs r3, #1 + 8003c9c: e0e7 b.n 8003e6e } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); - 8004ba2: 68fb ldr r3, [r7, #12] - 8004ba4: 4a78 ldr r2, [pc, #480] @ (8004d88 ) - 8004ba6: fba2 2303 umull r2, r3, r2, r3 - 8004baa: 0c9b lsrs r3, r3, #18 - 8004bac: 60bb str r3, [r7, #8] + 8003c9e: 68fb ldr r3, [r7, #12] + 8003ca0: 4a78 ldr r2, [pc, #480] @ (8003e84 ) + 8003ca2: fba2 2303 umull r2, r3, r2, r3 + 8003ca6: 0c9b lsrs r3, r3, #18 + 8003ca8: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); - 8004bae: 687b ldr r3, [r7, #4] - 8004bb0: 681b ldr r3, [r3, #0] - 8004bb2: 685b ldr r3, [r3, #4] - 8004bb4: f023 013f bic.w r1, r3, #63 @ 0x3f - 8004bb8: 687b ldr r3, [r7, #4] - 8004bba: 681b ldr r3, [r3, #0] - 8004bbc: 68ba ldr r2, [r7, #8] - 8004bbe: 430a orrs r2, r1 - 8004bc0: 605a str r2, [r3, #4] + 8003caa: 687b ldr r3, [r7, #4] + 8003cac: 681b ldr r3, [r3, #0] + 8003cae: 685b ldr r3, [r3, #4] + 8003cb0: f023 013f bic.w r1, r3, #63 @ 0x3f + 8003cb4: 687b ldr r3, [r7, #4] + 8003cb6: 681b ldr r3, [r3, #0] + 8003cb8: 68ba ldr r2, [r7, #8] + 8003cba: 430a orrs r2, r1 + 8003cbc: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); - 8004bc2: 687b ldr r3, [r7, #4] - 8004bc4: 681b ldr r3, [r3, #0] - 8004bc6: 6a1b ldr r3, [r3, #32] - 8004bc8: f023 013f bic.w r1, r3, #63 @ 0x3f - 8004bcc: 687b ldr r3, [r7, #4] - 8004bce: 685b ldr r3, [r3, #4] - 8004bd0: 4a6a ldr r2, [pc, #424] @ (8004d7c ) - 8004bd2: 4293 cmp r3, r2 - 8004bd4: d802 bhi.n 8004bdc - 8004bd6: 68bb ldr r3, [r7, #8] - 8004bd8: 3301 adds r3, #1 - 8004bda: e009 b.n 8004bf0 - 8004bdc: 68bb ldr r3, [r7, #8] - 8004bde: f44f 7296 mov.w r2, #300 @ 0x12c - 8004be2: fb02 f303 mul.w r3, r2, r3 - 8004be6: 4a69 ldr r2, [pc, #420] @ (8004d8c ) - 8004be8: fba2 2303 umull r2, r3, r2, r3 - 8004bec: 099b lsrs r3, r3, #6 - 8004bee: 3301 adds r3, #1 - 8004bf0: 687a ldr r2, [r7, #4] - 8004bf2: 6812 ldr r2, [r2, #0] - 8004bf4: 430b orrs r3, r1 - 8004bf6: 6213 str r3, [r2, #32] + 8003cbe: 687b ldr r3, [r7, #4] + 8003cc0: 681b ldr r3, [r3, #0] + 8003cc2: 6a1b ldr r3, [r3, #32] + 8003cc4: f023 013f bic.w r1, r3, #63 @ 0x3f + 8003cc8: 687b ldr r3, [r7, #4] + 8003cca: 685b ldr r3, [r3, #4] + 8003ccc: 4a6a ldr r2, [pc, #424] @ (8003e78 ) + 8003cce: 4293 cmp r3, r2 + 8003cd0: d802 bhi.n 8003cd8 + 8003cd2: 68bb ldr r3, [r7, #8] + 8003cd4: 3301 adds r3, #1 + 8003cd6: e009 b.n 8003cec + 8003cd8: 68bb ldr r3, [r7, #8] + 8003cda: f44f 7296 mov.w r2, #300 @ 0x12c + 8003cde: fb02 f303 mul.w r3, r2, r3 + 8003ce2: 4a69 ldr r2, [pc, #420] @ (8003e88 ) + 8003ce4: fba2 2303 umull r2, r3, r2, r3 + 8003ce8: 099b lsrs r3, r3, #6 + 8003cea: 3301 adds r3, #1 + 8003cec: 687a ldr r2, [r7, #4] + 8003cee: 6812 ldr r2, [r2, #0] + 8003cf0: 430b orrs r3, r1 + 8003cf2: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); - 8004bf8: 687b ldr r3, [r7, #4] - 8004bfa: 681b ldr r3, [r3, #0] - 8004bfc: 69db ldr r3, [r3, #28] - 8004bfe: f423 424f bic.w r2, r3, #52992 @ 0xcf00 - 8004c02: f022 02ff bic.w r2, r2, #255 @ 0xff - 8004c06: 687b ldr r3, [r7, #4] - 8004c08: 685b ldr r3, [r3, #4] - 8004c0a: 495c ldr r1, [pc, #368] @ (8004d7c ) - 8004c0c: 428b cmp r3, r1 - 8004c0e: d819 bhi.n 8004c44 - 8004c10: 68fb ldr r3, [r7, #12] - 8004c12: 1e59 subs r1, r3, #1 - 8004c14: 687b ldr r3, [r7, #4] - 8004c16: 685b ldr r3, [r3, #4] - 8004c18: 005b lsls r3, r3, #1 - 8004c1a: fbb1 f3f3 udiv r3, r1, r3 - 8004c1e: 1c59 adds r1, r3, #1 - 8004c20: f640 73fc movw r3, #4092 @ 0xffc - 8004c24: 400b ands r3, r1 - 8004c26: 2b00 cmp r3, #0 - 8004c28: d00a beq.n 8004c40 - 8004c2a: 68fb ldr r3, [r7, #12] - 8004c2c: 1e59 subs r1, r3, #1 - 8004c2e: 687b ldr r3, [r7, #4] - 8004c30: 685b ldr r3, [r3, #4] - 8004c32: 005b lsls r3, r3, #1 - 8004c34: fbb1 f3f3 udiv r3, r1, r3 - 8004c38: 3301 adds r3, #1 - 8004c3a: f3c3 030b ubfx r3, r3, #0, #12 - 8004c3e: e051 b.n 8004ce4 - 8004c40: 2304 movs r3, #4 - 8004c42: e04f b.n 8004ce4 - 8004c44: 687b ldr r3, [r7, #4] - 8004c46: 689b ldr r3, [r3, #8] - 8004c48: 2b00 cmp r3, #0 - 8004c4a: d111 bne.n 8004c70 - 8004c4c: 68fb ldr r3, [r7, #12] - 8004c4e: 1e58 subs r0, r3, #1 - 8004c50: 687b ldr r3, [r7, #4] - 8004c52: 6859 ldr r1, [r3, #4] - 8004c54: 460b mov r3, r1 - 8004c56: 005b lsls r3, r3, #1 - 8004c58: 440b add r3, r1 - 8004c5a: fbb0 f3f3 udiv r3, r0, r3 - 8004c5e: 3301 adds r3, #1 - 8004c60: f3c3 030b ubfx r3, r3, #0, #12 - 8004c64: 2b00 cmp r3, #0 - 8004c66: bf0c ite eq - 8004c68: 2301 moveq r3, #1 - 8004c6a: 2300 movne r3, #0 - 8004c6c: b2db uxtb r3, r3 - 8004c6e: e012 b.n 8004c96 - 8004c70: 68fb ldr r3, [r7, #12] - 8004c72: 1e58 subs r0, r3, #1 - 8004c74: 687b ldr r3, [r7, #4] - 8004c76: 6859 ldr r1, [r3, #4] - 8004c78: 460b mov r3, r1 - 8004c7a: 009b lsls r3, r3, #2 - 8004c7c: 440b add r3, r1 - 8004c7e: 0099 lsls r1, r3, #2 - 8004c80: 440b add r3, r1 - 8004c82: fbb0 f3f3 udiv r3, r0, r3 - 8004c86: 3301 adds r3, #1 - 8004c88: f3c3 030b ubfx r3, r3, #0, #12 - 8004c8c: 2b00 cmp r3, #0 - 8004c8e: bf0c ite eq - 8004c90: 2301 moveq r3, #1 - 8004c92: 2300 movne r3, #0 - 8004c94: b2db uxtb r3, r3 - 8004c96: 2b00 cmp r3, #0 - 8004c98: d001 beq.n 8004c9e - 8004c9a: 2301 movs r3, #1 - 8004c9c: e022 b.n 8004ce4 - 8004c9e: 687b ldr r3, [r7, #4] - 8004ca0: 689b ldr r3, [r3, #8] - 8004ca2: 2b00 cmp r3, #0 - 8004ca4: d10e bne.n 8004cc4 - 8004ca6: 68fb ldr r3, [r7, #12] - 8004ca8: 1e58 subs r0, r3, #1 - 8004caa: 687b ldr r3, [r7, #4] - 8004cac: 6859 ldr r1, [r3, #4] - 8004cae: 460b mov r3, r1 - 8004cb0: 005b lsls r3, r3, #1 - 8004cb2: 440b add r3, r1 - 8004cb4: fbb0 f3f3 udiv r3, r0, r3 - 8004cb8: 3301 adds r3, #1 - 8004cba: f3c3 030b ubfx r3, r3, #0, #12 - 8004cbe: f443 4300 orr.w r3, r3, #32768 @ 0x8000 - 8004cc2: e00f b.n 8004ce4 - 8004cc4: 68fb ldr r3, [r7, #12] - 8004cc6: 1e58 subs r0, r3, #1 - 8004cc8: 687b ldr r3, [r7, #4] - 8004cca: 6859 ldr r1, [r3, #4] - 8004ccc: 460b mov r3, r1 - 8004cce: 009b lsls r3, r3, #2 - 8004cd0: 440b add r3, r1 - 8004cd2: 0099 lsls r1, r3, #2 - 8004cd4: 440b add r3, r1 - 8004cd6: fbb0 f3f3 udiv r3, r0, r3 - 8004cda: 3301 adds r3, #1 - 8004cdc: f3c3 030b ubfx r3, r3, #0, #12 - 8004ce0: f443 4340 orr.w r3, r3, #49152 @ 0xc000 - 8004ce4: 6879 ldr r1, [r7, #4] - 8004ce6: 6809 ldr r1, [r1, #0] - 8004ce8: 4313 orrs r3, r2 - 8004cea: 61cb str r3, [r1, #28] + 8003cf4: 687b ldr r3, [r7, #4] + 8003cf6: 681b ldr r3, [r3, #0] + 8003cf8: 69db ldr r3, [r3, #28] + 8003cfa: f423 424f bic.w r2, r3, #52992 @ 0xcf00 + 8003cfe: f022 02ff bic.w r2, r2, #255 @ 0xff + 8003d02: 687b ldr r3, [r7, #4] + 8003d04: 685b ldr r3, [r3, #4] + 8003d06: 495c ldr r1, [pc, #368] @ (8003e78 ) + 8003d08: 428b cmp r3, r1 + 8003d0a: d819 bhi.n 8003d40 + 8003d0c: 68fb ldr r3, [r7, #12] + 8003d0e: 1e59 subs r1, r3, #1 + 8003d10: 687b ldr r3, [r7, #4] + 8003d12: 685b ldr r3, [r3, #4] + 8003d14: 005b lsls r3, r3, #1 + 8003d16: fbb1 f3f3 udiv r3, r1, r3 + 8003d1a: 1c59 adds r1, r3, #1 + 8003d1c: f640 73fc movw r3, #4092 @ 0xffc + 8003d20: 400b ands r3, r1 + 8003d22: 2b00 cmp r3, #0 + 8003d24: d00a beq.n 8003d3c + 8003d26: 68fb ldr r3, [r7, #12] + 8003d28: 1e59 subs r1, r3, #1 + 8003d2a: 687b ldr r3, [r7, #4] + 8003d2c: 685b ldr r3, [r3, #4] + 8003d2e: 005b lsls r3, r3, #1 + 8003d30: fbb1 f3f3 udiv r3, r1, r3 + 8003d34: 3301 adds r3, #1 + 8003d36: f3c3 030b ubfx r3, r3, #0, #12 + 8003d3a: e051 b.n 8003de0 + 8003d3c: 2304 movs r3, #4 + 8003d3e: e04f b.n 8003de0 + 8003d40: 687b ldr r3, [r7, #4] + 8003d42: 689b ldr r3, [r3, #8] + 8003d44: 2b00 cmp r3, #0 + 8003d46: d111 bne.n 8003d6c + 8003d48: 68fb ldr r3, [r7, #12] + 8003d4a: 1e58 subs r0, r3, #1 + 8003d4c: 687b ldr r3, [r7, #4] + 8003d4e: 6859 ldr r1, [r3, #4] + 8003d50: 460b mov r3, r1 + 8003d52: 005b lsls r3, r3, #1 + 8003d54: 440b add r3, r1 + 8003d56: fbb0 f3f3 udiv r3, r0, r3 + 8003d5a: 3301 adds r3, #1 + 8003d5c: f3c3 030b ubfx r3, r3, #0, #12 + 8003d60: 2b00 cmp r3, #0 + 8003d62: bf0c ite eq + 8003d64: 2301 moveq r3, #1 + 8003d66: 2300 movne r3, #0 + 8003d68: b2db uxtb r3, r3 + 8003d6a: e012 b.n 8003d92 + 8003d6c: 68fb ldr r3, [r7, #12] + 8003d6e: 1e58 subs r0, r3, #1 + 8003d70: 687b ldr r3, [r7, #4] + 8003d72: 6859 ldr r1, [r3, #4] + 8003d74: 460b mov r3, r1 + 8003d76: 009b lsls r3, r3, #2 + 8003d78: 440b add r3, r1 + 8003d7a: 0099 lsls r1, r3, #2 + 8003d7c: 440b add r3, r1 + 8003d7e: fbb0 f3f3 udiv r3, r0, r3 + 8003d82: 3301 adds r3, #1 + 8003d84: f3c3 030b ubfx r3, r3, #0, #12 + 8003d88: 2b00 cmp r3, #0 + 8003d8a: bf0c ite eq + 8003d8c: 2301 moveq r3, #1 + 8003d8e: 2300 movne r3, #0 + 8003d90: b2db uxtb r3, r3 + 8003d92: 2b00 cmp r3, #0 + 8003d94: d001 beq.n 8003d9a + 8003d96: 2301 movs r3, #1 + 8003d98: e022 b.n 8003de0 + 8003d9a: 687b ldr r3, [r7, #4] + 8003d9c: 689b ldr r3, [r3, #8] + 8003d9e: 2b00 cmp r3, #0 + 8003da0: d10e bne.n 8003dc0 + 8003da2: 68fb ldr r3, [r7, #12] + 8003da4: 1e58 subs r0, r3, #1 + 8003da6: 687b ldr r3, [r7, #4] + 8003da8: 6859 ldr r1, [r3, #4] + 8003daa: 460b mov r3, r1 + 8003dac: 005b lsls r3, r3, #1 + 8003dae: 440b add r3, r1 + 8003db0: fbb0 f3f3 udiv r3, r0, r3 + 8003db4: 3301 adds r3, #1 + 8003db6: f3c3 030b ubfx r3, r3, #0, #12 + 8003dba: f443 4300 orr.w r3, r3, #32768 @ 0x8000 + 8003dbe: e00f b.n 8003de0 + 8003dc0: 68fb ldr r3, [r7, #12] + 8003dc2: 1e58 subs r0, r3, #1 + 8003dc4: 687b ldr r3, [r7, #4] + 8003dc6: 6859 ldr r1, [r3, #4] + 8003dc8: 460b mov r3, r1 + 8003dca: 009b lsls r3, r3, #2 + 8003dcc: 440b add r3, r1 + 8003dce: 0099 lsls r1, r3, #2 + 8003dd0: 440b add r3, r1 + 8003dd2: fbb0 f3f3 udiv r3, r0, r3 + 8003dd6: 3301 adds r3, #1 + 8003dd8: f3c3 030b ubfx r3, r3, #0, #12 + 8003ddc: f443 4340 orr.w r3, r3, #49152 @ 0xc000 + 8003de0: 6879 ldr r1, [r7, #4] + 8003de2: 6809 ldr r1, [r1, #0] + 8003de4: 4313 orrs r3, r2 + 8003de6: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); - 8004cec: 687b ldr r3, [r7, #4] - 8004cee: 681b ldr r3, [r3, #0] - 8004cf0: 681b ldr r3, [r3, #0] - 8004cf2: f023 01c0 bic.w r1, r3, #192 @ 0xc0 - 8004cf6: 687b ldr r3, [r7, #4] - 8004cf8: 69da ldr r2, [r3, #28] - 8004cfa: 687b ldr r3, [r7, #4] - 8004cfc: 6a1b ldr r3, [r3, #32] - 8004cfe: 431a orrs r2, r3 - 8004d00: 687b ldr r3, [r7, #4] - 8004d02: 681b ldr r3, [r3, #0] - 8004d04: 430a orrs r2, r1 - 8004d06: 601a str r2, [r3, #0] + 8003de8: 687b ldr r3, [r7, #4] + 8003dea: 681b ldr r3, [r3, #0] + 8003dec: 681b ldr r3, [r3, #0] + 8003dee: f023 01c0 bic.w r1, r3, #192 @ 0xc0 + 8003df2: 687b ldr r3, [r7, #4] + 8003df4: 69da ldr r2, [r3, #28] + 8003df6: 687b ldr r3, [r7, #4] + 8003df8: 6a1b ldr r3, [r3, #32] + 8003dfa: 431a orrs r2, r3 + 8003dfc: 687b ldr r3, [r7, #4] + 8003dfe: 681b ldr r3, [r3, #0] + 8003e00: 430a orrs r2, r1 + 8003e02: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); - 8004d08: 687b ldr r3, [r7, #4] - 8004d0a: 681b ldr r3, [r3, #0] - 8004d0c: 689b ldr r3, [r3, #8] - 8004d0e: f423 4303 bic.w r3, r3, #33536 @ 0x8300 - 8004d12: f023 03ff bic.w r3, r3, #255 @ 0xff - 8004d16: 687a ldr r2, [r7, #4] - 8004d18: 6911 ldr r1, [r2, #16] - 8004d1a: 687a ldr r2, [r7, #4] - 8004d1c: 68d2 ldr r2, [r2, #12] - 8004d1e: 4311 orrs r1, r2 - 8004d20: 687a ldr r2, [r7, #4] - 8004d22: 6812 ldr r2, [r2, #0] - 8004d24: 430b orrs r3, r1 - 8004d26: 6093 str r3, [r2, #8] + 8003e04: 687b ldr r3, [r7, #4] + 8003e06: 681b ldr r3, [r3, #0] + 8003e08: 689b ldr r3, [r3, #8] + 8003e0a: f423 4303 bic.w r3, r3, #33536 @ 0x8300 + 8003e0e: f023 03ff bic.w r3, r3, #255 @ 0xff + 8003e12: 687a ldr r2, [r7, #4] + 8003e14: 6911 ldr r1, [r2, #16] + 8003e16: 687a ldr r2, [r7, #4] + 8003e18: 68d2 ldr r2, [r2, #12] + 8003e1a: 4311 orrs r1, r2 + 8003e1c: 687a ldr r2, [r7, #4] + 8003e1e: 6812 ldr r2, [r2, #0] + 8003e20: 430b orrs r3, r1 + 8003e22: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); - 8004d28: 687b ldr r3, [r7, #4] - 8004d2a: 681b ldr r3, [r3, #0] - 8004d2c: 68db ldr r3, [r3, #12] - 8004d2e: f023 01ff bic.w r1, r3, #255 @ 0xff - 8004d32: 687b ldr r3, [r7, #4] - 8004d34: 695a ldr r2, [r3, #20] - 8004d36: 687b ldr r3, [r7, #4] - 8004d38: 699b ldr r3, [r3, #24] - 8004d3a: 431a orrs r2, r3 - 8004d3c: 687b ldr r3, [r7, #4] - 8004d3e: 681b ldr r3, [r3, #0] - 8004d40: 430a orrs r2, r1 - 8004d42: 60da str r2, [r3, #12] + 8003e24: 687b ldr r3, [r7, #4] + 8003e26: 681b ldr r3, [r3, #0] + 8003e28: 68db ldr r3, [r3, #12] + 8003e2a: f023 01ff bic.w r1, r3, #255 @ 0xff + 8003e2e: 687b ldr r3, [r7, #4] + 8003e30: 695a ldr r2, [r3, #20] + 8003e32: 687b ldr r3, [r7, #4] + 8003e34: 699b ldr r3, [r3, #24] + 8003e36: 431a orrs r2, r3 + 8003e38: 687b ldr r3, [r7, #4] + 8003e3a: 681b ldr r3, [r3, #0] + 8003e3c: 430a orrs r2, r1 + 8003e3e: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 8004d44: 687b ldr r3, [r7, #4] - 8004d46: 681b ldr r3, [r3, #0] - 8004d48: 681a ldr r2, [r3, #0] - 8004d4a: 687b ldr r3, [r7, #4] - 8004d4c: 681b ldr r3, [r3, #0] - 8004d4e: f042 0201 orr.w r2, r2, #1 - 8004d52: 601a str r2, [r3, #0] + 8003e40: 687b ldr r3, [r7, #4] + 8003e42: 681b ldr r3, [r3, #0] + 8003e44: 681a ldr r2, [r3, #0] + 8003e46: 687b ldr r3, [r7, #4] + 8003e48: 681b ldr r3, [r3, #0] + 8003e4a: f042 0201 orr.w r2, r2, #1 + 8003e4e: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 8004d54: 687b ldr r3, [r7, #4] - 8004d56: 2200 movs r2, #0 - 8004d58: 641a str r2, [r3, #64] @ 0x40 + 8003e50: 687b ldr r3, [r7, #4] + 8003e52: 2200 movs r2, #0 + 8003e54: 641a str r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_READY; - 8004d5a: 687b ldr r3, [r7, #4] - 8004d5c: 2220 movs r2, #32 - 8004d5e: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003e56: 687b ldr r3, [r7, #4] + 8003e58: 2220 movs r2, #32 + 8003e5a: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->PreviousState = I2C_STATE_NONE; - 8004d62: 687b ldr r3, [r7, #4] - 8004d64: 2200 movs r2, #0 - 8004d66: 631a str r2, [r3, #48] @ 0x30 + 8003e5e: 687b ldr r3, [r7, #4] + 8003e60: 2200 movs r2, #0 + 8003e62: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; - 8004d68: 687b ldr r3, [r7, #4] - 8004d6a: 2200 movs r2, #0 - 8004d6c: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003e64: 687b ldr r3, [r7, #4] + 8003e66: 2200 movs r2, #0 + 8003e68: f883 203e strb.w r2, [r3, #62] @ 0x3e return HAL_OK; - 8004d70: 2300 movs r3, #0 + 8003e6c: 2300 movs r3, #0 } - 8004d72: 4618 mov r0, r3 - 8004d74: 3710 adds r7, #16 - 8004d76: 46bd mov sp, r7 - 8004d78: bd80 pop {r7, pc} - 8004d7a: bf00 nop - 8004d7c: 000186a0 .word 0x000186a0 - 8004d80: 001e847f .word 0x001e847f - 8004d84: 003d08ff .word 0x003d08ff - 8004d88: 431bde83 .word 0x431bde83 - 8004d8c: 10624dd3 .word 0x10624dd3 + 8003e6e: 4618 mov r0, r3 + 8003e70: 3710 adds r7, #16 + 8003e72: 46bd mov sp, r7 + 8003e74: bd80 pop {r7, pc} + 8003e76: bf00 nop + 8003e78: 000186a0 .word 0x000186a0 + 8003e7c: 001e847f .word 0x001e847f + 8003e80: 003d08ff .word 0x003d08ff + 8003e84: 431bde83 .word 0x431bde83 + 8003e88: 10624dd3 .word 0x10624dd3 -08004d90 : +08003e8c : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8004d90: b580 push {r7, lr} - 8004d92: b088 sub sp, #32 - 8004d94: af02 add r7, sp, #8 - 8004d96: 60f8 str r0, [r7, #12] - 8004d98: 607a str r2, [r7, #4] - 8004d9a: 461a mov r2, r3 - 8004d9c: 460b mov r3, r1 - 8004d9e: 817b strh r3, [r7, #10] - 8004da0: 4613 mov r3, r2 - 8004da2: 813b strh r3, [r7, #8] + 8003e8c: b580 push {r7, lr} + 8003e8e: b088 sub sp, #32 + 8003e90: af02 add r7, sp, #8 + 8003e92: 60f8 str r0, [r7, #12] + 8003e94: 607a str r2, [r7, #4] + 8003e96: 461a mov r2, r3 + 8003e98: 460b mov r3, r1 + 8003e9a: 817b strh r3, [r7, #10] + 8003e9c: 4613 mov r3, r2 + 8003e9e: 813b strh r3, [r7, #8] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); - 8004da4: f7fe fa96 bl 80032d4 - 8004da8: 6178 str r0, [r7, #20] + 8003ea0: f7fe fee4 bl 8002c6c + 8003ea4: 6178 str r0, [r7, #20] if (hi2c->State == HAL_I2C_STATE_READY) - 8004daa: 68fb ldr r3, [r7, #12] - 8004dac: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8004db0: b2db uxtb r3, r3 - 8004db2: 2b20 cmp r3, #32 - 8004db4: f040 80e0 bne.w 8004f78 + 8003ea6: 68fb ldr r3, [r7, #12] + 8003ea8: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8003eac: b2db uxtb r3, r3 + 8003eae: 2b20 cmp r3, #32 + 8003eb0: f040 80e0 bne.w 8004074 { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) - 8004db8: 697b ldr r3, [r7, #20] - 8004dba: 9300 str r3, [sp, #0] - 8004dbc: 2319 movs r3, #25 - 8004dbe: 2201 movs r2, #1 - 8004dc0: 4970 ldr r1, [pc, #448] @ (8004f84 ) - 8004dc2: 68f8 ldr r0, [r7, #12] - 8004dc4: f000 fc9e bl 8005704 - 8004dc8: 4603 mov r3, r0 - 8004dca: 2b00 cmp r3, #0 - 8004dcc: d001 beq.n 8004dd2 + 8003eb4: 697b ldr r3, [r7, #20] + 8003eb6: 9300 str r3, [sp, #0] + 8003eb8: 2319 movs r3, #25 + 8003eba: 2201 movs r2, #1 + 8003ebc: 4970 ldr r1, [pc, #448] @ (8004080 ) + 8003ebe: 68f8 ldr r0, [r7, #12] + 8003ec0: f000 fc9e bl 8004800 + 8003ec4: 4603 mov r3, r0 + 8003ec6: 2b00 cmp r3, #0 + 8003ec8: d001 beq.n 8003ece { return HAL_BUSY; - 8004dce: 2302 movs r3, #2 - 8004dd0: e0d3 b.n 8004f7a + 8003eca: 2302 movs r3, #2 + 8003ecc: e0d3 b.n 8004076 } /* Process Locked */ __HAL_LOCK(hi2c); - 8004dd2: 68fb ldr r3, [r7, #12] - 8004dd4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8004dd8: 2b01 cmp r3, #1 - 8004dda: d101 bne.n 8004de0 - 8004ddc: 2302 movs r3, #2 - 8004dde: e0cc b.n 8004f7a - 8004de0: 68fb ldr r3, [r7, #12] - 8004de2: 2201 movs r2, #1 - 8004de4: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003ece: 68fb ldr r3, [r7, #12] + 8003ed0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8003ed4: 2b01 cmp r3, #1 + 8003ed6: d101 bne.n 8003edc + 8003ed8: 2302 movs r3, #2 + 8003eda: e0cc b.n 8004076 + 8003edc: 68fb ldr r3, [r7, #12] + 8003ede: 2201 movs r2, #1 + 8003ee0: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) - 8004de8: 68fb ldr r3, [r7, #12] - 8004dea: 681b ldr r3, [r3, #0] - 8004dec: 681b ldr r3, [r3, #0] - 8004dee: f003 0301 and.w r3, r3, #1 - 8004df2: 2b01 cmp r3, #1 - 8004df4: d007 beq.n 8004e06 + 8003ee4: 68fb ldr r3, [r7, #12] + 8003ee6: 681b ldr r3, [r3, #0] + 8003ee8: 681b ldr r3, [r3, #0] + 8003eea: f003 0301 and.w r3, r3, #1 + 8003eee: 2b01 cmp r3, #1 + 8003ef0: d007 beq.n 8003f02 { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 8004df6: 68fb ldr r3, [r7, #12] - 8004df8: 681b ldr r3, [r3, #0] - 8004dfa: 681a ldr r2, [r3, #0] - 8004dfc: 68fb ldr r3, [r7, #12] - 8004dfe: 681b ldr r3, [r3, #0] - 8004e00: f042 0201 orr.w r2, r2, #1 - 8004e04: 601a str r2, [r3, #0] + 8003ef2: 68fb ldr r3, [r7, #12] + 8003ef4: 681b ldr r3, [r3, #0] + 8003ef6: 681a ldr r2, [r3, #0] + 8003ef8: 68fb ldr r3, [r7, #12] + 8003efa: 681b ldr r3, [r3, #0] + 8003efc: f042 0201 orr.w r2, r2, #1 + 8003f00: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 8004e06: 68fb ldr r3, [r7, #12] - 8004e08: 681b ldr r3, [r3, #0] - 8004e0a: 681a ldr r2, [r3, #0] - 8004e0c: 68fb ldr r3, [r7, #12] - 8004e0e: 681b ldr r3, [r3, #0] - 8004e10: f422 6200 bic.w r2, r2, #2048 @ 0x800 - 8004e14: 601a str r2, [r3, #0] + 8003f02: 68fb ldr r3, [r7, #12] + 8003f04: 681b ldr r3, [r3, #0] + 8003f06: 681a ldr r2, [r3, #0] + 8003f08: 68fb ldr r3, [r7, #12] + 8003f0a: 681b ldr r3, [r3, #0] + 8003f0c: f422 6200 bic.w r2, r2, #2048 @ 0x800 + 8003f10: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; - 8004e16: 68fb ldr r3, [r7, #12] - 8004e18: 2221 movs r2, #33 @ 0x21 - 8004e1a: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003f12: 68fb ldr r3, [r7, #12] + 8003f14: 2221 movs r2, #33 @ 0x21 + 8003f16: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_MASTER; - 8004e1e: 68fb ldr r3, [r7, #12] - 8004e20: 2210 movs r2, #16 - 8004e22: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003f1a: 68fb ldr r3, [r7, #12] + 8003f1c: 2210 movs r2, #16 + 8003f1e: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 8004e26: 68fb ldr r3, [r7, #12] - 8004e28: 2200 movs r2, #0 - 8004e2a: 641a str r2, [r3, #64] @ 0x40 + 8003f22: 68fb ldr r3, [r7, #12] + 8003f24: 2200 movs r2, #0 + 8003f26: 641a str r2, [r3, #64] @ 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; - 8004e2c: 68fb ldr r3, [r7, #12] - 8004e2e: 687a ldr r2, [r7, #4] - 8004e30: 625a str r2, [r3, #36] @ 0x24 + 8003f28: 68fb ldr r3, [r7, #12] + 8003f2a: 687a ldr r2, [r7, #4] + 8003f2c: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; - 8004e32: 68fb ldr r3, [r7, #12] - 8004e34: 893a ldrh r2, [r7, #8] - 8004e36: 855a strh r2, [r3, #42] @ 0x2a + 8003f2e: 68fb ldr r3, [r7, #12] + 8003f30: 893a ldrh r2, [r7, #8] + 8003f32: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize = hi2c->XferCount; - 8004e38: 68fb ldr r3, [r7, #12] - 8004e3a: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8004e3c: b29a uxth r2, r3 - 8004e3e: 68fb ldr r3, [r7, #12] - 8004e40: 851a strh r2, [r3, #40] @ 0x28 + 8003f34: 68fb ldr r3, [r7, #12] + 8003f36: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003f38: b29a uxth r2, r3 + 8003f3a: 68fb ldr r3, [r7, #12] + 8003f3c: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 8004e42: 68fb ldr r3, [r7, #12] - 8004e44: 4a50 ldr r2, [pc, #320] @ (8004f88 ) - 8004e46: 62da str r2, [r3, #44] @ 0x2c + 8003f3e: 68fb ldr r3, [r7, #12] + 8003f40: 4a50 ldr r2, [pc, #320] @ (8004084 ) + 8003f42: 62da str r2, [r3, #44] @ 0x2c /* Send Slave Address */ if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) - 8004e48: 8979 ldrh r1, [r7, #10] - 8004e4a: 697b ldr r3, [r7, #20] - 8004e4c: 6a3a ldr r2, [r7, #32] - 8004e4e: 68f8 ldr r0, [r7, #12] - 8004e50: f000 fb08 bl 8005464 - 8004e54: 4603 mov r3, r0 - 8004e56: 2b00 cmp r3, #0 - 8004e58: d001 beq.n 8004e5e + 8003f44: 8979 ldrh r1, [r7, #10] + 8003f46: 697b ldr r3, [r7, #20] + 8003f48: 6a3a ldr r2, [r7, #32] + 8003f4a: 68f8 ldr r0, [r7, #12] + 8003f4c: f000 fb08 bl 8004560 + 8003f50: 4603 mov r3, r0 + 8003f52: 2b00 cmp r3, #0 + 8003f54: d001 beq.n 8003f5a { return HAL_ERROR; - 8004e5a: 2301 movs r3, #1 - 8004e5c: e08d b.n 8004f7a + 8003f56: 2301 movs r3, #1 + 8003f58: e08d b.n 8004076 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8004e5e: 2300 movs r3, #0 - 8004e60: 613b str r3, [r7, #16] - 8004e62: 68fb ldr r3, [r7, #12] - 8004e64: 681b ldr r3, [r3, #0] - 8004e66: 695b ldr r3, [r3, #20] - 8004e68: 613b str r3, [r7, #16] - 8004e6a: 68fb ldr r3, [r7, #12] - 8004e6c: 681b ldr r3, [r3, #0] - 8004e6e: 699b ldr r3, [r3, #24] - 8004e70: 613b str r3, [r7, #16] - 8004e72: 693b ldr r3, [r7, #16] + 8003f5a: 2300 movs r3, #0 + 8003f5c: 613b str r3, [r7, #16] + 8003f5e: 68fb ldr r3, [r7, #12] + 8003f60: 681b ldr r3, [r3, #0] + 8003f62: 695b ldr r3, [r3, #20] + 8003f64: 613b str r3, [r7, #16] + 8003f66: 68fb ldr r3, [r7, #12] + 8003f68: 681b ldr r3, [r3, #0] + 8003f6a: 699b ldr r3, [r3, #24] + 8003f6c: 613b str r3, [r7, #16] + 8003f6e: 693b ldr r3, [r7, #16] while (hi2c->XferSize > 0U) - 8004e74: e066 b.n 8004f44 + 8003f70: e066 b.n 8004040 { /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8004e76: 697a ldr r2, [r7, #20] - 8004e78: 6a39 ldr r1, [r7, #32] - 8004e7a: 68f8 ldr r0, [r7, #12] - 8004e7c: f000 fd5c bl 8005938 - 8004e80: 4603 mov r3, r0 - 8004e82: 2b00 cmp r3, #0 - 8004e84: d00d beq.n 8004ea2 + 8003f72: 697a ldr r2, [r7, #20] + 8003f74: 6a39 ldr r1, [r7, #32] + 8003f76: 68f8 ldr r0, [r7, #12] + 8003f78: f000 fd5c bl 8004a34 + 8003f7c: 4603 mov r3, r0 + 8003f7e: 2b00 cmp r3, #0 + 8003f80: d00d beq.n 8003f9e { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 8004e86: 68fb ldr r3, [r7, #12] - 8004e88: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004e8a: 2b04 cmp r3, #4 - 8004e8c: d107 bne.n 8004e9e + 8003f82: 68fb ldr r3, [r7, #12] + 8003f84: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003f86: 2b04 cmp r3, #4 + 8003f88: d107 bne.n 8003f9a { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8004e8e: 68fb ldr r3, [r7, #12] - 8004e90: 681b ldr r3, [r3, #0] - 8004e92: 681a ldr r2, [r3, #0] - 8004e94: 68fb ldr r3, [r7, #12] - 8004e96: 681b ldr r3, [r3, #0] - 8004e98: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8004e9c: 601a str r2, [r3, #0] + 8003f8a: 68fb ldr r3, [r7, #12] + 8003f8c: 681b ldr r3, [r3, #0] + 8003f8e: 681a ldr r2, [r3, #0] + 8003f90: 68fb ldr r3, [r7, #12] + 8003f92: 681b ldr r3, [r3, #0] + 8003f94: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003f98: 601a str r2, [r3, #0] } return HAL_ERROR; - 8004e9e: 2301 movs r3, #1 - 8004ea0: e06b b.n 8004f7a + 8003f9a: 2301 movs r3, #1 + 8003f9c: e06b b.n 8004076 } /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; - 8004ea2: 68fb ldr r3, [r7, #12] - 8004ea4: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004ea6: 781a ldrb r2, [r3, #0] - 8004ea8: 68fb ldr r3, [r7, #12] - 8004eaa: 681b ldr r3, [r3, #0] - 8004eac: 611a str r2, [r3, #16] + 8003f9e: 68fb ldr r3, [r7, #12] + 8003fa0: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003fa2: 781a ldrb r2, [r3, #0] + 8003fa4: 68fb ldr r3, [r7, #12] + 8003fa6: 681b ldr r3, [r3, #0] + 8003fa8: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8004eae: 68fb ldr r3, [r7, #12] - 8004eb0: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004eb2: 1c5a adds r2, r3, #1 - 8004eb4: 68fb ldr r3, [r7, #12] - 8004eb6: 625a str r2, [r3, #36] @ 0x24 + 8003faa: 68fb ldr r3, [r7, #12] + 8003fac: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003fae: 1c5a adds r2, r3, #1 + 8003fb0: 68fb ldr r3, [r7, #12] + 8003fb2: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; - 8004eb8: 68fb ldr r3, [r7, #12] - 8004eba: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8004ebc: b29b uxth r3, r3 - 8004ebe: 3b01 subs r3, #1 - 8004ec0: b29a uxth r2, r3 - 8004ec2: 68fb ldr r3, [r7, #12] - 8004ec4: 855a strh r2, [r3, #42] @ 0x2a + 8003fb4: 68fb ldr r3, [r7, #12] + 8003fb6: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003fb8: b29b uxth r3, r3 + 8003fba: 3b01 subs r3, #1 + 8003fbc: b29a uxth r2, r3 + 8003fbe: 68fb ldr r3, [r7, #12] + 8003fc0: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; - 8004ec6: 68fb ldr r3, [r7, #12] - 8004ec8: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8004eca: 3b01 subs r3, #1 - 8004ecc: b29a uxth r2, r3 - 8004ece: 68fb ldr r3, [r7, #12] - 8004ed0: 851a strh r2, [r3, #40] @ 0x28 + 8003fc2: 68fb ldr r3, [r7, #12] + 8003fc4: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003fc6: 3b01 subs r3, #1 + 8003fc8: b29a uxth r2, r3 + 8003fca: 68fb ldr r3, [r7, #12] + 8003fcc: 851a strh r2, [r3, #40] @ 0x28 if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) - 8004ed2: 68fb ldr r3, [r7, #12] - 8004ed4: 681b ldr r3, [r3, #0] - 8004ed6: 695b ldr r3, [r3, #20] - 8004ed8: f003 0304 and.w r3, r3, #4 - 8004edc: 2b04 cmp r3, #4 - 8004ede: d11b bne.n 8004f18 - 8004ee0: 68fb ldr r3, [r7, #12] - 8004ee2: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8004ee4: 2b00 cmp r3, #0 - 8004ee6: d017 beq.n 8004f18 + 8003fce: 68fb ldr r3, [r7, #12] + 8003fd0: 681b ldr r3, [r3, #0] + 8003fd2: 695b ldr r3, [r3, #20] + 8003fd4: f003 0304 and.w r3, r3, #4 + 8003fd8: 2b04 cmp r3, #4 + 8003fda: d11b bne.n 8004014 + 8003fdc: 68fb ldr r3, [r7, #12] + 8003fde: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003fe0: 2b00 cmp r3, #0 + 8003fe2: d017 beq.n 8004014 { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; - 8004ee8: 68fb ldr r3, [r7, #12] - 8004eea: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004eec: 781a ldrb r2, [r3, #0] - 8004eee: 68fb ldr r3, [r7, #12] - 8004ef0: 681b ldr r3, [r3, #0] - 8004ef2: 611a str r2, [r3, #16] + 8003fe4: 68fb ldr r3, [r7, #12] + 8003fe6: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003fe8: 781a ldrb r2, [r3, #0] + 8003fea: 68fb ldr r3, [r7, #12] + 8003fec: 681b ldr r3, [r3, #0] + 8003fee: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8004ef4: 68fb ldr r3, [r7, #12] - 8004ef6: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004ef8: 1c5a adds r2, r3, #1 - 8004efa: 68fb ldr r3, [r7, #12] - 8004efc: 625a str r2, [r3, #36] @ 0x24 + 8003ff0: 68fb ldr r3, [r7, #12] + 8003ff2: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003ff4: 1c5a adds r2, r3, #1 + 8003ff6: 68fb ldr r3, [r7, #12] + 8003ff8: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; - 8004efe: 68fb ldr r3, [r7, #12] - 8004f00: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8004f02: b29b uxth r3, r3 - 8004f04: 3b01 subs r3, #1 - 8004f06: b29a uxth r2, r3 - 8004f08: 68fb ldr r3, [r7, #12] - 8004f0a: 855a strh r2, [r3, #42] @ 0x2a + 8003ffa: 68fb ldr r3, [r7, #12] + 8003ffc: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003ffe: b29b uxth r3, r3 + 8004000: 3b01 subs r3, #1 + 8004002: b29a uxth r2, r3 + 8004004: 68fb ldr r3, [r7, #12] + 8004006: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; - 8004f0c: 68fb ldr r3, [r7, #12] - 8004f0e: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8004f10: 3b01 subs r3, #1 - 8004f12: b29a uxth r2, r3 - 8004f14: 68fb ldr r3, [r7, #12] - 8004f16: 851a strh r2, [r3, #40] @ 0x28 + 8004008: 68fb ldr r3, [r7, #12] + 800400a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800400c: 3b01 subs r3, #1 + 800400e: b29a uxth r2, r3 + 8004010: 68fb ldr r3, [r7, #12] + 8004012: 851a strh r2, [r3, #40] @ 0x28 } /* Wait until BTF flag is set */ if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8004f18: 697a ldr r2, [r7, #20] - 8004f1a: 6a39 ldr r1, [r7, #32] - 8004f1c: 68f8 ldr r0, [r7, #12] - 8004f1e: f000 fd53 bl 80059c8 - 8004f22: 4603 mov r3, r0 - 8004f24: 2b00 cmp r3, #0 - 8004f26: d00d beq.n 8004f44 + 8004014: 697a ldr r2, [r7, #20] + 8004016: 6a39 ldr r1, [r7, #32] + 8004018: 68f8 ldr r0, [r7, #12] + 800401a: f000 fd53 bl 8004ac4 + 800401e: 4603 mov r3, r0 + 8004020: 2b00 cmp r3, #0 + 8004022: d00d beq.n 8004040 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 8004f28: 68fb ldr r3, [r7, #12] - 8004f2a: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004f2c: 2b04 cmp r3, #4 - 8004f2e: d107 bne.n 8004f40 + 8004024: 68fb ldr r3, [r7, #12] + 8004026: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004028: 2b04 cmp r3, #4 + 800402a: d107 bne.n 800403c { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8004f30: 68fb ldr r3, [r7, #12] - 8004f32: 681b ldr r3, [r3, #0] - 8004f34: 681a ldr r2, [r3, #0] - 8004f36: 68fb ldr r3, [r7, #12] - 8004f38: 681b ldr r3, [r3, #0] - 8004f3a: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8004f3e: 601a str r2, [r3, #0] + 800402c: 68fb ldr r3, [r7, #12] + 800402e: 681b ldr r3, [r3, #0] + 8004030: 681a ldr r2, [r3, #0] + 8004032: 68fb ldr r3, [r7, #12] + 8004034: 681b ldr r3, [r3, #0] + 8004036: f442 7200 orr.w r2, r2, #512 @ 0x200 + 800403a: 601a str r2, [r3, #0] } return HAL_ERROR; - 8004f40: 2301 movs r3, #1 - 8004f42: e01a b.n 8004f7a + 800403c: 2301 movs r3, #1 + 800403e: e01a b.n 8004076 while (hi2c->XferSize > 0U) - 8004f44: 68fb ldr r3, [r7, #12] - 8004f46: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8004f48: 2b00 cmp r3, #0 - 8004f4a: d194 bne.n 8004e76 + 8004040: 68fb ldr r3, [r7, #12] + 8004042: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004044: 2b00 cmp r3, #0 + 8004046: d194 bne.n 8003f72 } } /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8004f4c: 68fb ldr r3, [r7, #12] - 8004f4e: 681b ldr r3, [r3, #0] - 8004f50: 681a ldr r2, [r3, #0] - 8004f52: 68fb ldr r3, [r7, #12] - 8004f54: 681b ldr r3, [r3, #0] - 8004f56: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8004f5a: 601a str r2, [r3, #0] + 8004048: 68fb ldr r3, [r7, #12] + 800404a: 681b ldr r3, [r3, #0] + 800404c: 681a ldr r2, [r3, #0] + 800404e: 68fb ldr r3, [r7, #12] + 8004050: 681b ldr r3, [r3, #0] + 8004052: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8004056: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; - 8004f5c: 68fb ldr r3, [r7, #12] - 8004f5e: 2220 movs r2, #32 - 8004f60: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004058: 68fb ldr r3, [r7, #12] + 800405a: 2220 movs r2, #32 + 800405c: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004f64: 68fb ldr r3, [r7, #12] - 8004f66: 2200 movs r2, #0 - 8004f68: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004060: 68fb ldr r3, [r7, #12] + 8004062: 2200 movs r2, #0 + 8004064: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004f6c: 68fb ldr r3, [r7, #12] - 8004f6e: 2200 movs r2, #0 - 8004f70: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004068: 68fb ldr r3, [r7, #12] + 800406a: 2200 movs r2, #0 + 800406c: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 8004f74: 2300 movs r3, #0 - 8004f76: e000 b.n 8004f7a + 8004070: 2300 movs r3, #0 + 8004072: e000 b.n 8004076 } else { return HAL_BUSY; - 8004f78: 2302 movs r3, #2 + 8004074: 2302 movs r3, #2 } } - 8004f7a: 4618 mov r0, r3 - 8004f7c: 3718 adds r7, #24 - 8004f7e: 46bd mov sp, r7 - 8004f80: bd80 pop {r7, pc} - 8004f82: bf00 nop - 8004f84: 00100002 .word 0x00100002 - 8004f88: ffff0000 .word 0xffff0000 + 8004076: 4618 mov r0, r3 + 8004078: 3718 adds r7, #24 + 800407a: 46bd mov sp, r7 + 800407c: bd80 pop {r7, pc} + 800407e: bf00 nop + 8004080: 00100002 .word 0x00100002 + 8004084: ffff0000 .word 0xffff0000 -08004f8c : +08004088 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8004f8c: b580 push {r7, lr} - 8004f8e: b08c sub sp, #48 @ 0x30 - 8004f90: af02 add r7, sp, #8 - 8004f92: 60f8 str r0, [r7, #12] - 8004f94: 607a str r2, [r7, #4] - 8004f96: 461a mov r2, r3 - 8004f98: 460b mov r3, r1 - 8004f9a: 817b strh r3, [r7, #10] - 8004f9c: 4613 mov r3, r2 - 8004f9e: 813b strh r3, [r7, #8] + 8004088: b580 push {r7, lr} + 800408a: b08c sub sp, #48 @ 0x30 + 800408c: af02 add r7, sp, #8 + 800408e: 60f8 str r0, [r7, #12] + 8004090: 607a str r2, [r7, #4] + 8004092: 461a mov r2, r3 + 8004094: 460b mov r3, r1 + 8004096: 817b strh r3, [r7, #10] + 8004098: 4613 mov r3, r2 + 800409a: 813b strh r3, [r7, #8] __IO uint32_t count = 0U; - 8004fa0: 2300 movs r3, #0 - 8004fa2: 623b str r3, [r7, #32] + 800409c: 2300 movs r3, #0 + 800409e: 623b str r3, [r7, #32] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); - 8004fa4: f7fe f996 bl 80032d4 - 8004fa8: 6278 str r0, [r7, #36] @ 0x24 + 80040a0: f7fe fde4 bl 8002c6c + 80040a4: 6278 str r0, [r7, #36] @ 0x24 if (hi2c->State == HAL_I2C_STATE_READY) - 8004faa: 68fb ldr r3, [r7, #12] - 8004fac: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8004fb0: b2db uxtb r3, r3 - 8004fb2: 2b20 cmp r3, #32 - 8004fb4: f040 824b bne.w 800544e + 80040a6: 68fb ldr r3, [r7, #12] + 80040a8: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 80040ac: b2db uxtb r3, r3 + 80040ae: 2b20 cmp r3, #32 + 80040b0: f040 824b bne.w 800454a { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) - 8004fb8: 6a7b ldr r3, [r7, #36] @ 0x24 - 8004fba: 9300 str r3, [sp, #0] - 8004fbc: 2319 movs r3, #25 - 8004fbe: 2201 movs r2, #1 - 8004fc0: 497f ldr r1, [pc, #508] @ (80051c0 ) - 8004fc2: 68f8 ldr r0, [r7, #12] - 8004fc4: f000 fb9e bl 8005704 - 8004fc8: 4603 mov r3, r0 - 8004fca: 2b00 cmp r3, #0 - 8004fcc: d001 beq.n 8004fd2 + 80040b4: 6a7b ldr r3, [r7, #36] @ 0x24 + 80040b6: 9300 str r3, [sp, #0] + 80040b8: 2319 movs r3, #25 + 80040ba: 2201 movs r2, #1 + 80040bc: 497f ldr r1, [pc, #508] @ (80042bc ) + 80040be: 68f8 ldr r0, [r7, #12] + 80040c0: f000 fb9e bl 8004800 + 80040c4: 4603 mov r3, r0 + 80040c6: 2b00 cmp r3, #0 + 80040c8: d001 beq.n 80040ce { return HAL_BUSY; - 8004fce: 2302 movs r3, #2 - 8004fd0: e23e b.n 8005450 + 80040ca: 2302 movs r3, #2 + 80040cc: e23e b.n 800454c } /* Process Locked */ __HAL_LOCK(hi2c); - 8004fd2: 68fb ldr r3, [r7, #12] - 8004fd4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8004fd8: 2b01 cmp r3, #1 - 8004fda: d101 bne.n 8004fe0 - 8004fdc: 2302 movs r3, #2 - 8004fde: e237 b.n 8005450 - 8004fe0: 68fb ldr r3, [r7, #12] - 8004fe2: 2201 movs r2, #1 - 8004fe4: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80040ce: 68fb ldr r3, [r7, #12] + 80040d0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 80040d4: 2b01 cmp r3, #1 + 80040d6: d101 bne.n 80040dc + 80040d8: 2302 movs r3, #2 + 80040da: e237 b.n 800454c + 80040dc: 68fb ldr r3, [r7, #12] + 80040de: 2201 movs r2, #1 + 80040e0: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) - 8004fe8: 68fb ldr r3, [r7, #12] - 8004fea: 681b ldr r3, [r3, #0] - 8004fec: 681b ldr r3, [r3, #0] - 8004fee: f003 0301 and.w r3, r3, #1 - 8004ff2: 2b01 cmp r3, #1 - 8004ff4: d007 beq.n 8005006 + 80040e4: 68fb ldr r3, [r7, #12] + 80040e6: 681b ldr r3, [r3, #0] + 80040e8: 681b ldr r3, [r3, #0] + 80040ea: f003 0301 and.w r3, r3, #1 + 80040ee: 2b01 cmp r3, #1 + 80040f0: d007 beq.n 8004102 { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 8004ff6: 68fb ldr r3, [r7, #12] - 8004ff8: 681b ldr r3, [r3, #0] - 8004ffa: 681a ldr r2, [r3, #0] - 8004ffc: 68fb ldr r3, [r7, #12] - 8004ffe: 681b ldr r3, [r3, #0] - 8005000: f042 0201 orr.w r2, r2, #1 - 8005004: 601a str r2, [r3, #0] + 80040f2: 68fb ldr r3, [r7, #12] + 80040f4: 681b ldr r3, [r3, #0] + 80040f6: 681a ldr r2, [r3, #0] + 80040f8: 68fb ldr r3, [r7, #12] + 80040fa: 681b ldr r3, [r3, #0] + 80040fc: f042 0201 orr.w r2, r2, #1 + 8004100: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 8005006: 68fb ldr r3, [r7, #12] - 8005008: 681b ldr r3, [r3, #0] - 800500a: 681a ldr r2, [r3, #0] - 800500c: 68fb ldr r3, [r7, #12] - 800500e: 681b ldr r3, [r3, #0] - 8005010: f422 6200 bic.w r2, r2, #2048 @ 0x800 - 8005014: 601a str r2, [r3, #0] + 8004102: 68fb ldr r3, [r7, #12] + 8004104: 681b ldr r3, [r3, #0] + 8004106: 681a ldr r2, [r3, #0] + 8004108: 68fb ldr r3, [r7, #12] + 800410a: 681b ldr r3, [r3, #0] + 800410c: f422 6200 bic.w r2, r2, #2048 @ 0x800 + 8004110: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; - 8005016: 68fb ldr r3, [r7, #12] - 8005018: 2222 movs r2, #34 @ 0x22 - 800501a: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004112: 68fb ldr r3, [r7, #12] + 8004114: 2222 movs r2, #34 @ 0x22 + 8004116: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_MASTER; - 800501e: 68fb ldr r3, [r7, #12] - 8005020: 2210 movs r2, #16 - 8005022: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800411a: 68fb ldr r3, [r7, #12] + 800411c: 2210 movs r2, #16 + 800411e: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 8005026: 68fb ldr r3, [r7, #12] - 8005028: 2200 movs r2, #0 - 800502a: 641a str r2, [r3, #64] @ 0x40 + 8004122: 68fb ldr r3, [r7, #12] + 8004124: 2200 movs r2, #0 + 8004126: 641a str r2, [r3, #64] @ 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; - 800502c: 68fb ldr r3, [r7, #12] - 800502e: 687a ldr r2, [r7, #4] - 8005030: 625a str r2, [r3, #36] @ 0x24 + 8004128: 68fb ldr r3, [r7, #12] + 800412a: 687a ldr r2, [r7, #4] + 800412c: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; - 8005032: 68fb ldr r3, [r7, #12] - 8005034: 893a ldrh r2, [r7, #8] - 8005036: 855a strh r2, [r3, #42] @ 0x2a + 800412e: 68fb ldr r3, [r7, #12] + 8004130: 893a ldrh r2, [r7, #8] + 8004132: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize = hi2c->XferCount; - 8005038: 68fb ldr r3, [r7, #12] - 800503a: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800503c: b29a uxth r2, r3 - 800503e: 68fb ldr r3, [r7, #12] - 8005040: 851a strh r2, [r3, #40] @ 0x28 + 8004134: 68fb ldr r3, [r7, #12] + 8004136: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004138: b29a uxth r2, r3 + 800413a: 68fb ldr r3, [r7, #12] + 800413c: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 8005042: 68fb ldr r3, [r7, #12] - 8005044: 4a5f ldr r2, [pc, #380] @ (80051c4 ) - 8005046: 62da str r2, [r3, #44] @ 0x2c + 800413e: 68fb ldr r3, [r7, #12] + 8004140: 4a5f ldr r2, [pc, #380] @ (80042c0 ) + 8004142: 62da str r2, [r3, #44] @ 0x2c /* Send Slave Address */ if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) - 8005048: 8979 ldrh r1, [r7, #10] - 800504a: 6a7b ldr r3, [r7, #36] @ 0x24 - 800504c: 6b3a ldr r2, [r7, #48] @ 0x30 - 800504e: 68f8 ldr r0, [r7, #12] - 8005050: f000 fa8a bl 8005568 - 8005054: 4603 mov r3, r0 - 8005056: 2b00 cmp r3, #0 - 8005058: d001 beq.n 800505e + 8004144: 8979 ldrh r1, [r7, #10] + 8004146: 6a7b ldr r3, [r7, #36] @ 0x24 + 8004148: 6b3a ldr r2, [r7, #48] @ 0x30 + 800414a: 68f8 ldr r0, [r7, #12] + 800414c: f000 fa8a bl 8004664 + 8004150: 4603 mov r3, r0 + 8004152: 2b00 cmp r3, #0 + 8004154: d001 beq.n 800415a { return HAL_ERROR; - 800505a: 2301 movs r3, #1 - 800505c: e1f8 b.n 8005450 + 8004156: 2301 movs r3, #1 + 8004158: e1f8 b.n 800454c } if (hi2c->XferSize == 0U) - 800505e: 68fb ldr r3, [r7, #12] - 8005060: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8005062: 2b00 cmp r3, #0 - 8005064: d113 bne.n 800508e + 800415a: 68fb ldr r3, [r7, #12] + 800415c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800415e: 2b00 cmp r3, #0 + 8004160: d113 bne.n 800418a { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8005066: 2300 movs r3, #0 - 8005068: 61fb str r3, [r7, #28] - 800506a: 68fb ldr r3, [r7, #12] - 800506c: 681b ldr r3, [r3, #0] - 800506e: 695b ldr r3, [r3, #20] - 8005070: 61fb str r3, [r7, #28] - 8005072: 68fb ldr r3, [r7, #12] - 8005074: 681b ldr r3, [r3, #0] - 8005076: 699b ldr r3, [r3, #24] - 8005078: 61fb str r3, [r7, #28] - 800507a: 69fb ldr r3, [r7, #28] + 8004162: 2300 movs r3, #0 + 8004164: 61fb str r3, [r7, #28] + 8004166: 68fb ldr r3, [r7, #12] + 8004168: 681b ldr r3, [r3, #0] + 800416a: 695b ldr r3, [r3, #20] + 800416c: 61fb str r3, [r7, #28] + 800416e: 68fb ldr r3, [r7, #12] + 8004170: 681b ldr r3, [r3, #0] + 8004172: 699b ldr r3, [r3, #24] + 8004174: 61fb str r3, [r7, #28] + 8004176: 69fb ldr r3, [r7, #28] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 800507c: 68fb ldr r3, [r7, #12] - 800507e: 681b ldr r3, [r3, #0] - 8005080: 681a ldr r2, [r3, #0] - 8005082: 68fb ldr r3, [r7, #12] - 8005084: 681b ldr r3, [r3, #0] - 8005086: f442 7200 orr.w r2, r2, #512 @ 0x200 - 800508a: 601a str r2, [r3, #0] - 800508c: e1cc b.n 8005428 + 8004178: 68fb ldr r3, [r7, #12] + 800417a: 681b ldr r3, [r3, #0] + 800417c: 681a ldr r2, [r3, #0] + 800417e: 68fb ldr r3, [r7, #12] + 8004180: 681b ldr r3, [r3, #0] + 8004182: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8004186: 601a str r2, [r3, #0] + 8004188: e1cc b.n 8004524 } else if (hi2c->XferSize == 1U) - 800508e: 68fb ldr r3, [r7, #12] - 8005090: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8005092: 2b01 cmp r3, #1 - 8005094: d11e bne.n 80050d4 + 800418a: 68fb ldr r3, [r7, #12] + 800418c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800418e: 2b01 cmp r3, #1 + 8004190: d11e bne.n 80041d0 { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8005096: 68fb ldr r3, [r7, #12] - 8005098: 681b ldr r3, [r3, #0] - 800509a: 681a ldr r2, [r3, #0] - 800509c: 68fb ldr r3, [r7, #12] - 800509e: 681b ldr r3, [r3, #0] - 80050a0: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 80050a4: 601a str r2, [r3, #0] + 8004192: 68fb ldr r3, [r7, #12] + 8004194: 681b ldr r3, [r3, #0] + 8004196: 681a ldr r2, [r3, #0] + 8004198: 68fb ldr r3, [r7, #12] + 800419a: 681b ldr r3, [r3, #0] + 800419c: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 80041a0: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 80050a6: b672 cpsid i + 80041a2: b672 cpsid i } - 80050a8: bf00 nop + 80041a4: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80050aa: 2300 movs r3, #0 - 80050ac: 61bb str r3, [r7, #24] - 80050ae: 68fb ldr r3, [r7, #12] - 80050b0: 681b ldr r3, [r3, #0] - 80050b2: 695b ldr r3, [r3, #20] - 80050b4: 61bb str r3, [r7, #24] - 80050b6: 68fb ldr r3, [r7, #12] - 80050b8: 681b ldr r3, [r3, #0] - 80050ba: 699b ldr r3, [r3, #24] - 80050bc: 61bb str r3, [r7, #24] - 80050be: 69bb ldr r3, [r7, #24] + 80041a6: 2300 movs r3, #0 + 80041a8: 61bb str r3, [r7, #24] + 80041aa: 68fb ldr r3, [r7, #12] + 80041ac: 681b ldr r3, [r3, #0] + 80041ae: 695b ldr r3, [r3, #20] + 80041b0: 61bb str r3, [r7, #24] + 80041b2: 68fb ldr r3, [r7, #12] + 80041b4: 681b ldr r3, [r3, #0] + 80041b6: 699b ldr r3, [r3, #24] + 80041b8: 61bb str r3, [r7, #24] + 80041ba: 69bb ldr r3, [r7, #24] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 80050c0: 68fb ldr r3, [r7, #12] - 80050c2: 681b ldr r3, [r3, #0] - 80050c4: 681a ldr r2, [r3, #0] - 80050c6: 68fb ldr r3, [r7, #12] - 80050c8: 681b ldr r3, [r3, #0] - 80050ca: f442 7200 orr.w r2, r2, #512 @ 0x200 - 80050ce: 601a str r2, [r3, #0] + 80041bc: 68fb ldr r3, [r7, #12] + 80041be: 681b ldr r3, [r3, #0] + 80041c0: 681a ldr r2, [r3, #0] + 80041c2: 68fb ldr r3, [r7, #12] + 80041c4: 681b ldr r3, [r3, #0] + 80041c6: f442 7200 orr.w r2, r2, #512 @ 0x200 + 80041ca: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); - 80050d0: b662 cpsie i + 80041cc: b662 cpsie i } - 80050d2: e035 b.n 8005140 + 80041ce: e035 b.n 800423c /* Re-enable IRQs */ __enable_irq(); } else if (hi2c->XferSize == 2U) - 80050d4: 68fb ldr r3, [r7, #12] - 80050d6: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80050d8: 2b02 cmp r3, #2 - 80050da: d11e bne.n 800511a + 80041d0: 68fb ldr r3, [r7, #12] + 80041d2: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80041d4: 2b02 cmp r3, #2 + 80041d6: d11e bne.n 8004216 { /* Enable Pos */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 80050dc: 68fb ldr r3, [r7, #12] - 80050de: 681b ldr r3, [r3, #0] - 80050e0: 681a ldr r2, [r3, #0] - 80050e2: 68fb ldr r3, [r7, #12] - 80050e4: 681b ldr r3, [r3, #0] - 80050e6: f442 6200 orr.w r2, r2, #2048 @ 0x800 - 80050ea: 601a str r2, [r3, #0] + 80041d8: 68fb ldr r3, [r7, #12] + 80041da: 681b ldr r3, [r3, #0] + 80041dc: 681a ldr r2, [r3, #0] + 80041de: 68fb ldr r3, [r7, #12] + 80041e0: 681b ldr r3, [r3, #0] + 80041e2: f442 6200 orr.w r2, r2, #2048 @ 0x800 + 80041e6: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 80050ec: b672 cpsid i + 80041e8: b672 cpsid i } - 80050ee: bf00 nop + 80041ea: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80050f0: 2300 movs r3, #0 - 80050f2: 617b str r3, [r7, #20] - 80050f4: 68fb ldr r3, [r7, #12] - 80050f6: 681b ldr r3, [r3, #0] - 80050f8: 695b ldr r3, [r3, #20] - 80050fa: 617b str r3, [r7, #20] - 80050fc: 68fb ldr r3, [r7, #12] - 80050fe: 681b ldr r3, [r3, #0] - 8005100: 699b ldr r3, [r3, #24] - 8005102: 617b str r3, [r7, #20] - 8005104: 697b ldr r3, [r7, #20] + 80041ec: 2300 movs r3, #0 + 80041ee: 617b str r3, [r7, #20] + 80041f0: 68fb ldr r3, [r7, #12] + 80041f2: 681b ldr r3, [r3, #0] + 80041f4: 695b ldr r3, [r3, #20] + 80041f6: 617b str r3, [r7, #20] + 80041f8: 68fb ldr r3, [r7, #12] + 80041fa: 681b ldr r3, [r3, #0] + 80041fc: 699b ldr r3, [r3, #24] + 80041fe: 617b str r3, [r7, #20] + 8004200: 697b ldr r3, [r7, #20] /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8005106: 68fb ldr r3, [r7, #12] - 8005108: 681b ldr r3, [r3, #0] - 800510a: 681a ldr r2, [r3, #0] - 800510c: 68fb ldr r3, [r7, #12] - 800510e: 681b ldr r3, [r3, #0] - 8005110: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 8005114: 601a str r2, [r3, #0] + 8004202: 68fb ldr r3, [r7, #12] + 8004204: 681b ldr r3, [r3, #0] + 8004206: 681a ldr r2, [r3, #0] + 8004208: 68fb ldr r3, [r7, #12] + 800420a: 681b ldr r3, [r3, #0] + 800420c: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8004210: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); - 8005116: b662 cpsie i + 8004212: b662 cpsie i } - 8005118: e012 b.n 8005140 + 8004214: e012 b.n 800423c __enable_irq(); } else { /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 800511a: 68fb ldr r3, [r7, #12] - 800511c: 681b ldr r3, [r3, #0] - 800511e: 681a ldr r2, [r3, #0] - 8005120: 68fb ldr r3, [r7, #12] - 8005122: 681b ldr r3, [r3, #0] - 8005124: f442 6280 orr.w r2, r2, #1024 @ 0x400 - 8005128: 601a str r2, [r3, #0] + 8004216: 68fb ldr r3, [r7, #12] + 8004218: 681b ldr r3, [r3, #0] + 800421a: 681a ldr r2, [r3, #0] + 800421c: 68fb ldr r3, [r7, #12] + 800421e: 681b ldr r3, [r3, #0] + 8004220: f442 6280 orr.w r2, r2, #1024 @ 0x400 + 8004224: 601a str r2, [r3, #0] /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 800512a: 2300 movs r3, #0 - 800512c: 613b str r3, [r7, #16] - 800512e: 68fb ldr r3, [r7, #12] - 8005130: 681b ldr r3, [r3, #0] - 8005132: 695b ldr r3, [r3, #20] - 8005134: 613b str r3, [r7, #16] - 8005136: 68fb ldr r3, [r7, #12] - 8005138: 681b ldr r3, [r3, #0] - 800513a: 699b ldr r3, [r3, #24] - 800513c: 613b str r3, [r7, #16] - 800513e: 693b ldr r3, [r7, #16] + 8004226: 2300 movs r3, #0 + 8004228: 613b str r3, [r7, #16] + 800422a: 68fb ldr r3, [r7, #12] + 800422c: 681b ldr r3, [r3, #0] + 800422e: 695b ldr r3, [r3, #20] + 8004230: 613b str r3, [r7, #16] + 8004232: 68fb ldr r3, [r7, #12] + 8004234: 681b ldr r3, [r3, #0] + 8004236: 699b ldr r3, [r3, #24] + 8004238: 613b str r3, [r7, #16] + 800423a: 693b ldr r3, [r7, #16] } while (hi2c->XferSize > 0U) - 8005140: e172 b.n 8005428 + 800423c: e172 b.n 8004524 { if (hi2c->XferSize <= 3U) - 8005142: 68fb ldr r3, [r7, #12] - 8005144: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8005146: 2b03 cmp r3, #3 - 8005148: f200 811f bhi.w 800538a + 800423e: 68fb ldr r3, [r7, #12] + 8004240: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004242: 2b03 cmp r3, #3 + 8004244: f200 811f bhi.w 8004486 { /* One byte */ if (hi2c->XferSize == 1U) - 800514c: 68fb ldr r3, [r7, #12] - 800514e: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8005150: 2b01 cmp r3, #1 - 8005152: d123 bne.n 800519c + 8004248: 68fb ldr r3, [r7, #12] + 800424a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800424c: 2b01 cmp r3, #1 + 800424e: d123 bne.n 8004298 { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8005154: 6a7a ldr r2, [r7, #36] @ 0x24 - 8005156: 6b39 ldr r1, [r7, #48] @ 0x30 - 8005158: 68f8 ldr r0, [r7, #12] - 800515a: f000 fc7d bl 8005a58 - 800515e: 4603 mov r3, r0 - 8005160: 2b00 cmp r3, #0 - 8005162: d001 beq.n 8005168 + 8004250: 6a7a ldr r2, [r7, #36] @ 0x24 + 8004252: 6b39 ldr r1, [r7, #48] @ 0x30 + 8004254: 68f8 ldr r0, [r7, #12] + 8004256: f000 fc7d bl 8004b54 + 800425a: 4603 mov r3, r0 + 800425c: 2b00 cmp r3, #0 + 800425e: d001 beq.n 8004264 { return HAL_ERROR; - 8005164: 2301 movs r3, #1 - 8005166: e173 b.n 8005450 + 8004260: 2301 movs r3, #1 + 8004262: e173 b.n 800454c } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8005168: 68fb ldr r3, [r7, #12] - 800516a: 681b ldr r3, [r3, #0] - 800516c: 691a ldr r2, [r3, #16] - 800516e: 68fb ldr r3, [r7, #12] - 8005170: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005172: b2d2 uxtb r2, r2 - 8005174: 701a strb r2, [r3, #0] + 8004264: 68fb ldr r3, [r7, #12] + 8004266: 681b ldr r3, [r3, #0] + 8004268: 691a ldr r2, [r3, #16] + 800426a: 68fb ldr r3, [r7, #12] + 800426c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800426e: b2d2 uxtb r2, r2 + 8004270: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8005176: 68fb ldr r3, [r7, #12] - 8005178: 6a5b ldr r3, [r3, #36] @ 0x24 - 800517a: 1c5a adds r2, r3, #1 - 800517c: 68fb ldr r3, [r7, #12] - 800517e: 625a str r2, [r3, #36] @ 0x24 + 8004272: 68fb ldr r3, [r7, #12] + 8004274: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004276: 1c5a adds r2, r3, #1 + 8004278: 68fb ldr r3, [r7, #12] + 800427a: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8005180: 68fb ldr r3, [r7, #12] - 8005182: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8005184: 3b01 subs r3, #1 - 8005186: b29a uxth r2, r3 - 8005188: 68fb ldr r3, [r7, #12] - 800518a: 851a strh r2, [r3, #40] @ 0x28 + 800427c: 68fb ldr r3, [r7, #12] + 800427e: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004280: 3b01 subs r3, #1 + 8004282: b29a uxth r2, r3 + 8004284: 68fb ldr r3, [r7, #12] + 8004286: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 800518c: 68fb ldr r3, [r7, #12] - 800518e: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8005190: b29b uxth r3, r3 - 8005192: 3b01 subs r3, #1 - 8005194: b29a uxth r2, r3 - 8005196: 68fb ldr r3, [r7, #12] - 8005198: 855a strh r2, [r3, #42] @ 0x2a - 800519a: e145 b.n 8005428 + 8004288: 68fb ldr r3, [r7, #12] + 800428a: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800428c: b29b uxth r3, r3 + 800428e: 3b01 subs r3, #1 + 8004290: b29a uxth r2, r3 + 8004292: 68fb ldr r3, [r7, #12] + 8004294: 855a strh r2, [r3, #42] @ 0x2a + 8004296: e145 b.n 8004524 } /* Two bytes */ else if (hi2c->XferSize == 2U) - 800519c: 68fb ldr r3, [r7, #12] - 800519e: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80051a0: 2b02 cmp r3, #2 - 80051a2: d152 bne.n 800524a + 8004298: 68fb ldr r3, [r7, #12] + 800429a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800429c: 2b02 cmp r3, #2 + 800429e: d152 bne.n 8004346 { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) - 80051a4: 6a7b ldr r3, [r7, #36] @ 0x24 - 80051a6: 9300 str r3, [sp, #0] - 80051a8: 6b3b ldr r3, [r7, #48] @ 0x30 - 80051aa: 2200 movs r2, #0 - 80051ac: 4906 ldr r1, [pc, #24] @ (80051c8 ) - 80051ae: 68f8 ldr r0, [r7, #12] - 80051b0: f000 faa8 bl 8005704 - 80051b4: 4603 mov r3, r0 - 80051b6: 2b00 cmp r3, #0 - 80051b8: d008 beq.n 80051cc + 80042a0: 6a7b ldr r3, [r7, #36] @ 0x24 + 80042a2: 9300 str r3, [sp, #0] + 80042a4: 6b3b ldr r3, [r7, #48] @ 0x30 + 80042a6: 2200 movs r2, #0 + 80042a8: 4906 ldr r1, [pc, #24] @ (80042c4 ) + 80042aa: 68f8 ldr r0, [r7, #12] + 80042ac: f000 faa8 bl 8004800 + 80042b0: 4603 mov r3, r0 + 80042b2: 2b00 cmp r3, #0 + 80042b4: d008 beq.n 80042c8 { return HAL_ERROR; - 80051ba: 2301 movs r3, #1 - 80051bc: e148 b.n 8005450 - 80051be: bf00 nop - 80051c0: 00100002 .word 0x00100002 - 80051c4: ffff0000 .word 0xffff0000 - 80051c8: 00010004 .word 0x00010004 + 80042b6: 2301 movs r3, #1 + 80042b8: e148 b.n 800454c + 80042ba: bf00 nop + 80042bc: 00100002 .word 0x00100002 + 80042c0: ffff0000 .word 0xffff0000 + 80042c4: 00010004 .word 0x00010004 __ASM volatile ("cpsid i" : : : "memory"); - 80051cc: b672 cpsid i + 80042c8: b672 cpsid i } - 80051ce: bf00 nop + 80042ca: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 80051d0: 68fb ldr r3, [r7, #12] - 80051d2: 681b ldr r3, [r3, #0] - 80051d4: 681a ldr r2, [r3, #0] - 80051d6: 68fb ldr r3, [r7, #12] - 80051d8: 681b ldr r3, [r3, #0] - 80051da: f442 7200 orr.w r2, r2, #512 @ 0x200 - 80051de: 601a str r2, [r3, #0] + 80042cc: 68fb ldr r3, [r7, #12] + 80042ce: 681b ldr r3, [r3, #0] + 80042d0: 681a ldr r2, [r3, #0] + 80042d2: 68fb ldr r3, [r7, #12] + 80042d4: 681b ldr r3, [r3, #0] + 80042d6: f442 7200 orr.w r2, r2, #512 @ 0x200 + 80042da: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 80051e0: 68fb ldr r3, [r7, #12] - 80051e2: 681b ldr r3, [r3, #0] - 80051e4: 691a ldr r2, [r3, #16] - 80051e6: 68fb ldr r3, [r7, #12] - 80051e8: 6a5b ldr r3, [r3, #36] @ 0x24 - 80051ea: b2d2 uxtb r2, r2 - 80051ec: 701a strb r2, [r3, #0] + 80042dc: 68fb ldr r3, [r7, #12] + 80042de: 681b ldr r3, [r3, #0] + 80042e0: 691a ldr r2, [r3, #16] + 80042e2: 68fb ldr r3, [r7, #12] + 80042e4: 6a5b ldr r3, [r3, #36] @ 0x24 + 80042e6: b2d2 uxtb r2, r2 + 80042e8: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80051ee: 68fb ldr r3, [r7, #12] - 80051f0: 6a5b ldr r3, [r3, #36] @ 0x24 - 80051f2: 1c5a adds r2, r3, #1 - 80051f4: 68fb ldr r3, [r7, #12] - 80051f6: 625a str r2, [r3, #36] @ 0x24 + 80042ea: 68fb ldr r3, [r7, #12] + 80042ec: 6a5b ldr r3, [r3, #36] @ 0x24 + 80042ee: 1c5a adds r2, r3, #1 + 80042f0: 68fb ldr r3, [r7, #12] + 80042f2: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 80051f8: 68fb ldr r3, [r7, #12] - 80051fa: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80051fc: 3b01 subs r3, #1 - 80051fe: b29a uxth r2, r3 - 8005200: 68fb ldr r3, [r7, #12] - 8005202: 851a strh r2, [r3, #40] @ 0x28 + 80042f4: 68fb ldr r3, [r7, #12] + 80042f6: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80042f8: 3b01 subs r3, #1 + 80042fa: b29a uxth r2, r3 + 80042fc: 68fb ldr r3, [r7, #12] + 80042fe: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8005204: 68fb ldr r3, [r7, #12] - 8005206: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8005208: b29b uxth r3, r3 - 800520a: 3b01 subs r3, #1 - 800520c: b29a uxth r2, r3 - 800520e: 68fb ldr r3, [r7, #12] - 8005210: 855a strh r2, [r3, #42] @ 0x2a + 8004300: 68fb ldr r3, [r7, #12] + 8004302: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004304: b29b uxth r3, r3 + 8004306: 3b01 subs r3, #1 + 8004308: b29a uxth r2, r3 + 800430a: 68fb ldr r3, [r7, #12] + 800430c: 855a strh r2, [r3, #42] @ 0x2a __ASM volatile ("cpsie i" : : : "memory"); - 8005212: b662 cpsie i + 800430e: b662 cpsie i } - 8005214: bf00 nop + 8004310: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8005216: 68fb ldr r3, [r7, #12] - 8005218: 681b ldr r3, [r3, #0] - 800521a: 691a ldr r2, [r3, #16] - 800521c: 68fb ldr r3, [r7, #12] - 800521e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005220: b2d2 uxtb r2, r2 - 8005222: 701a strb r2, [r3, #0] + 8004312: 68fb ldr r3, [r7, #12] + 8004314: 681b ldr r3, [r3, #0] + 8004316: 691a ldr r2, [r3, #16] + 8004318: 68fb ldr r3, [r7, #12] + 800431a: 6a5b ldr r3, [r3, #36] @ 0x24 + 800431c: b2d2 uxtb r2, r2 + 800431e: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8005224: 68fb ldr r3, [r7, #12] - 8005226: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005228: 1c5a adds r2, r3, #1 - 800522a: 68fb ldr r3, [r7, #12] - 800522c: 625a str r2, [r3, #36] @ 0x24 + 8004320: 68fb ldr r3, [r7, #12] + 8004322: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004324: 1c5a adds r2, r3, #1 + 8004326: 68fb ldr r3, [r7, #12] + 8004328: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 800522e: 68fb ldr r3, [r7, #12] - 8005230: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8005232: 3b01 subs r3, #1 - 8005234: b29a uxth r2, r3 - 8005236: 68fb ldr r3, [r7, #12] - 8005238: 851a strh r2, [r3, #40] @ 0x28 + 800432a: 68fb ldr r3, [r7, #12] + 800432c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800432e: 3b01 subs r3, #1 + 8004330: b29a uxth r2, r3 + 8004332: 68fb ldr r3, [r7, #12] + 8004334: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 800523a: 68fb ldr r3, [r7, #12] - 800523c: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800523e: b29b uxth r3, r3 - 8005240: 3b01 subs r3, #1 - 8005242: b29a uxth r2, r3 - 8005244: 68fb ldr r3, [r7, #12] - 8005246: 855a strh r2, [r3, #42] @ 0x2a - 8005248: e0ee b.n 8005428 + 8004336: 68fb ldr r3, [r7, #12] + 8004338: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800433a: b29b uxth r3, r3 + 800433c: 3b01 subs r3, #1 + 800433e: b29a uxth r2, r3 + 8004340: 68fb ldr r3, [r7, #12] + 8004342: 855a strh r2, [r3, #42] @ 0x2a + 8004344: e0ee b.n 8004524 } /* 3 Last bytes */ else { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) - 800524a: 6a7b ldr r3, [r7, #36] @ 0x24 - 800524c: 9300 str r3, [sp, #0] - 800524e: 6b3b ldr r3, [r7, #48] @ 0x30 - 8005250: 2200 movs r2, #0 - 8005252: 4981 ldr r1, [pc, #516] @ (8005458 ) - 8005254: 68f8 ldr r0, [r7, #12] - 8005256: f000 fa55 bl 8005704 - 800525a: 4603 mov r3, r0 - 800525c: 2b00 cmp r3, #0 - 800525e: d001 beq.n 8005264 + 8004346: 6a7b ldr r3, [r7, #36] @ 0x24 + 8004348: 9300 str r3, [sp, #0] + 800434a: 6b3b ldr r3, [r7, #48] @ 0x30 + 800434c: 2200 movs r2, #0 + 800434e: 4981 ldr r1, [pc, #516] @ (8004554 ) + 8004350: 68f8 ldr r0, [r7, #12] + 8004352: f000 fa55 bl 8004800 + 8004356: 4603 mov r3, r0 + 8004358: 2b00 cmp r3, #0 + 800435a: d001 beq.n 8004360 { return HAL_ERROR; - 8005260: 2301 movs r3, #1 - 8005262: e0f5 b.n 8005450 + 800435c: 2301 movs r3, #1 + 800435e: e0f5 b.n 800454c } /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8005264: 68fb ldr r3, [r7, #12] - 8005266: 681b ldr r3, [r3, #0] - 8005268: 681a ldr r2, [r3, #0] - 800526a: 68fb ldr r3, [r7, #12] - 800526c: 681b ldr r3, [r3, #0] - 800526e: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 8005272: 601a str r2, [r3, #0] + 8004360: 68fb ldr r3, [r7, #12] + 8004362: 681b ldr r3, [r3, #0] + 8004364: 681a ldr r2, [r3, #0] + 8004366: 68fb ldr r3, [r7, #12] + 8004368: 681b ldr r3, [r3, #0] + 800436a: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 800436e: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 8005274: b672 cpsid i + 8004370: b672 cpsid i } - 8005276: bf00 nop + 8004372: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8005278: 68fb ldr r3, [r7, #12] - 800527a: 681b ldr r3, [r3, #0] - 800527c: 691a ldr r2, [r3, #16] - 800527e: 68fb ldr r3, [r7, #12] - 8005280: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005282: b2d2 uxtb r2, r2 - 8005284: 701a strb r2, [r3, #0] + 8004374: 68fb ldr r3, [r7, #12] + 8004376: 681b ldr r3, [r3, #0] + 8004378: 691a ldr r2, [r3, #16] + 800437a: 68fb ldr r3, [r7, #12] + 800437c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800437e: b2d2 uxtb r2, r2 + 8004380: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8005286: 68fb ldr r3, [r7, #12] - 8005288: 6a5b ldr r3, [r3, #36] @ 0x24 - 800528a: 1c5a adds r2, r3, #1 - 800528c: 68fb ldr r3, [r7, #12] - 800528e: 625a str r2, [r3, #36] @ 0x24 + 8004382: 68fb ldr r3, [r7, #12] + 8004384: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004386: 1c5a adds r2, r3, #1 + 8004388: 68fb ldr r3, [r7, #12] + 800438a: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8005290: 68fb ldr r3, [r7, #12] - 8005292: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8005294: 3b01 subs r3, #1 - 8005296: b29a uxth r2, r3 - 8005298: 68fb ldr r3, [r7, #12] - 800529a: 851a strh r2, [r3, #40] @ 0x28 + 800438c: 68fb ldr r3, [r7, #12] + 800438e: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004390: 3b01 subs r3, #1 + 8004392: b29a uxth r2, r3 + 8004394: 68fb ldr r3, [r7, #12] + 8004396: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 800529c: 68fb ldr r3, [r7, #12] - 800529e: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80052a0: b29b uxth r3, r3 - 80052a2: 3b01 subs r3, #1 - 80052a4: b29a uxth r2, r3 - 80052a6: 68fb ldr r3, [r7, #12] - 80052a8: 855a strh r2, [r3, #42] @ 0x2a + 8004398: 68fb ldr r3, [r7, #12] + 800439a: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800439c: b29b uxth r3, r3 + 800439e: 3b01 subs r3, #1 + 80043a0: b29a uxth r2, r3 + 80043a2: 68fb ldr r3, [r7, #12] + 80043a4: 855a strh r2, [r3, #42] @ 0x2a /* Wait until BTF flag is set */ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U); - 80052aa: 4b6c ldr r3, [pc, #432] @ (800545c ) - 80052ac: 681b ldr r3, [r3, #0] - 80052ae: 08db lsrs r3, r3, #3 - 80052b0: 4a6b ldr r2, [pc, #428] @ (8005460 ) - 80052b2: fba2 2303 umull r2, r3, r2, r3 - 80052b6: 0a1a lsrs r2, r3, #8 - 80052b8: 4613 mov r3, r2 - 80052ba: 009b lsls r3, r3, #2 - 80052bc: 4413 add r3, r2 - 80052be: 00da lsls r2, r3, #3 - 80052c0: 1ad3 subs r3, r2, r3 - 80052c2: 623b str r3, [r7, #32] + 80043a6: 4b6c ldr r3, [pc, #432] @ (8004558 ) + 80043a8: 681b ldr r3, [r3, #0] + 80043aa: 08db lsrs r3, r3, #3 + 80043ac: 4a6b ldr r2, [pc, #428] @ (800455c ) + 80043ae: fba2 2303 umull r2, r3, r2, r3 + 80043b2: 0a1a lsrs r2, r3, #8 + 80043b4: 4613 mov r3, r2 + 80043b6: 009b lsls r3, r3, #2 + 80043b8: 4413 add r3, r2 + 80043ba: 00da lsls r2, r3, #3 + 80043bc: 1ad3 subs r3, r2, r3 + 80043be: 623b str r3, [r7, #32] do { count--; - 80052c4: 6a3b ldr r3, [r7, #32] - 80052c6: 3b01 subs r3, #1 - 80052c8: 623b str r3, [r7, #32] + 80043c0: 6a3b ldr r3, [r7, #32] + 80043c2: 3b01 subs r3, #1 + 80043c4: 623b str r3, [r7, #32] if (count == 0U) - 80052ca: 6a3b ldr r3, [r7, #32] - 80052cc: 2b00 cmp r3, #0 - 80052ce: d118 bne.n 8005302 + 80043c6: 6a3b ldr r3, [r7, #32] + 80043c8: 2b00 cmp r3, #0 + 80043ca: d118 bne.n 80043fe { hi2c->PreviousState = I2C_STATE_NONE; - 80052d0: 68fb ldr r3, [r7, #12] - 80052d2: 2200 movs r2, #0 - 80052d4: 631a str r2, [r3, #48] @ 0x30 + 80043cc: 68fb ldr r3, [r7, #12] + 80043ce: 2200 movs r2, #0 + 80043d0: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 80052d6: 68fb ldr r3, [r7, #12] - 80052d8: 2220 movs r2, #32 - 80052da: f883 203d strb.w r2, [r3, #61] @ 0x3d + 80043d2: 68fb ldr r3, [r7, #12] + 80043d4: 2220 movs r2, #32 + 80043d6: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80052de: 68fb ldr r3, [r7, #12] - 80052e0: 2200 movs r2, #0 - 80052e2: f883 203e strb.w r2, [r3, #62] @ 0x3e + 80043da: 68fb ldr r3, [r7, #12] + 80043dc: 2200 movs r2, #0 + 80043de: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 80052e6: 68fb ldr r3, [r7, #12] - 80052e8: 6c1b ldr r3, [r3, #64] @ 0x40 - 80052ea: f043 0220 orr.w r2, r3, #32 - 80052ee: 68fb ldr r3, [r7, #12] - 80052f0: 641a str r2, [r3, #64] @ 0x40 + 80043e2: 68fb ldr r3, [r7, #12] + 80043e4: 6c1b ldr r3, [r3, #64] @ 0x40 + 80043e6: f043 0220 orr.w r2, r3, #32 + 80043ea: 68fb ldr r3, [r7, #12] + 80043ec: 641a str r2, [r3, #64] @ 0x40 __ASM volatile ("cpsie i" : : : "memory"); - 80052f2: b662 cpsie i + 80043ee: b662 cpsie i } - 80052f4: bf00 nop + 80043f0: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80052f6: 68fb ldr r3, [r7, #12] - 80052f8: 2200 movs r2, #0 - 80052fa: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80043f2: 68fb ldr r3, [r7, #12] + 80043f4: 2200 movs r2, #0 + 80043f6: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 80052fe: 2301 movs r3, #1 - 8005300: e0a6 b.n 8005450 + 80043fa: 2301 movs r3, #1 + 80043fc: e0a6 b.n 800454c } } while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET); - 8005302: 68fb ldr r3, [r7, #12] - 8005304: 681b ldr r3, [r3, #0] - 8005306: 695b ldr r3, [r3, #20] - 8005308: f003 0304 and.w r3, r3, #4 - 800530c: 2b04 cmp r3, #4 - 800530e: d1d9 bne.n 80052c4 + 80043fe: 68fb ldr r3, [r7, #12] + 8004400: 681b ldr r3, [r3, #0] + 8004402: 695b ldr r3, [r3, #20] + 8004404: f003 0304 and.w r3, r3, #4 + 8004408: 2b04 cmp r3, #4 + 800440a: d1d9 bne.n 80043c0 /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8005310: 68fb ldr r3, [r7, #12] - 8005312: 681b ldr r3, [r3, #0] - 8005314: 681a ldr r2, [r3, #0] - 8005316: 68fb ldr r3, [r7, #12] - 8005318: 681b ldr r3, [r3, #0] - 800531a: f442 7200 orr.w r2, r2, #512 @ 0x200 - 800531e: 601a str r2, [r3, #0] + 800440c: 68fb ldr r3, [r7, #12] + 800440e: 681b ldr r3, [r3, #0] + 8004410: 681a ldr r2, [r3, #0] + 8004412: 68fb ldr r3, [r7, #12] + 8004414: 681b ldr r3, [r3, #0] + 8004416: f442 7200 orr.w r2, r2, #512 @ 0x200 + 800441a: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8005320: 68fb ldr r3, [r7, #12] - 8005322: 681b ldr r3, [r3, #0] - 8005324: 691a ldr r2, [r3, #16] - 8005326: 68fb ldr r3, [r7, #12] - 8005328: 6a5b ldr r3, [r3, #36] @ 0x24 - 800532a: b2d2 uxtb r2, r2 - 800532c: 701a strb r2, [r3, #0] + 800441c: 68fb ldr r3, [r7, #12] + 800441e: 681b ldr r3, [r3, #0] + 8004420: 691a ldr r2, [r3, #16] + 8004422: 68fb ldr r3, [r7, #12] + 8004424: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004426: b2d2 uxtb r2, r2 + 8004428: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 800532e: 68fb ldr r3, [r7, #12] - 8005330: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005332: 1c5a adds r2, r3, #1 - 8005334: 68fb ldr r3, [r7, #12] - 8005336: 625a str r2, [r3, #36] @ 0x24 + 800442a: 68fb ldr r3, [r7, #12] + 800442c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800442e: 1c5a adds r2, r3, #1 + 8004430: 68fb ldr r3, [r7, #12] + 8004432: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8005338: 68fb ldr r3, [r7, #12] - 800533a: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800533c: 3b01 subs r3, #1 - 800533e: b29a uxth r2, r3 - 8005340: 68fb ldr r3, [r7, #12] - 8005342: 851a strh r2, [r3, #40] @ 0x28 + 8004434: 68fb ldr r3, [r7, #12] + 8004436: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004438: 3b01 subs r3, #1 + 800443a: b29a uxth r2, r3 + 800443c: 68fb ldr r3, [r7, #12] + 800443e: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8005344: 68fb ldr r3, [r7, #12] - 8005346: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8005348: b29b uxth r3, r3 - 800534a: 3b01 subs r3, #1 - 800534c: b29a uxth r2, r3 - 800534e: 68fb ldr r3, [r7, #12] - 8005350: 855a strh r2, [r3, #42] @ 0x2a + 8004440: 68fb ldr r3, [r7, #12] + 8004442: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004444: b29b uxth r3, r3 + 8004446: 3b01 subs r3, #1 + 8004448: b29a uxth r2, r3 + 800444a: 68fb ldr r3, [r7, #12] + 800444c: 855a strh r2, [r3, #42] @ 0x2a __ASM volatile ("cpsie i" : : : "memory"); - 8005352: b662 cpsie i + 800444e: b662 cpsie i } - 8005354: bf00 nop + 8004450: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8005356: 68fb ldr r3, [r7, #12] - 8005358: 681b ldr r3, [r3, #0] - 800535a: 691a ldr r2, [r3, #16] - 800535c: 68fb ldr r3, [r7, #12] - 800535e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005360: b2d2 uxtb r2, r2 - 8005362: 701a strb r2, [r3, #0] + 8004452: 68fb ldr r3, [r7, #12] + 8004454: 681b ldr r3, [r3, #0] + 8004456: 691a ldr r2, [r3, #16] + 8004458: 68fb ldr r3, [r7, #12] + 800445a: 6a5b ldr r3, [r3, #36] @ 0x24 + 800445c: b2d2 uxtb r2, r2 + 800445e: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8005364: 68fb ldr r3, [r7, #12] - 8005366: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005368: 1c5a adds r2, r3, #1 - 800536a: 68fb ldr r3, [r7, #12] - 800536c: 625a str r2, [r3, #36] @ 0x24 + 8004460: 68fb ldr r3, [r7, #12] + 8004462: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004464: 1c5a adds r2, r3, #1 + 8004466: 68fb ldr r3, [r7, #12] + 8004468: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 800536e: 68fb ldr r3, [r7, #12] - 8005370: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8005372: 3b01 subs r3, #1 - 8005374: b29a uxth r2, r3 - 8005376: 68fb ldr r3, [r7, #12] - 8005378: 851a strh r2, [r3, #40] @ 0x28 + 800446a: 68fb ldr r3, [r7, #12] + 800446c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800446e: 3b01 subs r3, #1 + 8004470: b29a uxth r2, r3 + 8004472: 68fb ldr r3, [r7, #12] + 8004474: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 800537a: 68fb ldr r3, [r7, #12] - 800537c: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800537e: b29b uxth r3, r3 - 8005380: 3b01 subs r3, #1 - 8005382: b29a uxth r2, r3 - 8005384: 68fb ldr r3, [r7, #12] - 8005386: 855a strh r2, [r3, #42] @ 0x2a - 8005388: e04e b.n 8005428 + 8004476: 68fb ldr r3, [r7, #12] + 8004478: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800447a: b29b uxth r3, r3 + 800447c: 3b01 subs r3, #1 + 800447e: b29a uxth r2, r3 + 8004480: 68fb ldr r3, [r7, #12] + 8004482: 855a strh r2, [r3, #42] @ 0x2a + 8004484: e04e b.n 8004524 } } else { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 800538a: 6a7a ldr r2, [r7, #36] @ 0x24 - 800538c: 6b39 ldr r1, [r7, #48] @ 0x30 - 800538e: 68f8 ldr r0, [r7, #12] - 8005390: f000 fb62 bl 8005a58 - 8005394: 4603 mov r3, r0 - 8005396: 2b00 cmp r3, #0 - 8005398: d001 beq.n 800539e + 8004486: 6a7a ldr r2, [r7, #36] @ 0x24 + 8004488: 6b39 ldr r1, [r7, #48] @ 0x30 + 800448a: 68f8 ldr r0, [r7, #12] + 800448c: f000 fb62 bl 8004b54 + 8004490: 4603 mov r3, r0 + 8004492: 2b00 cmp r3, #0 + 8004494: d001 beq.n 800449a { return HAL_ERROR; - 800539a: 2301 movs r3, #1 - 800539c: e058 b.n 8005450 + 8004496: 2301 movs r3, #1 + 8004498: e058 b.n 800454c } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 800539e: 68fb ldr r3, [r7, #12] - 80053a0: 681b ldr r3, [r3, #0] - 80053a2: 691a ldr r2, [r3, #16] - 80053a4: 68fb ldr r3, [r7, #12] - 80053a6: 6a5b ldr r3, [r3, #36] @ 0x24 - 80053a8: b2d2 uxtb r2, r2 - 80053aa: 701a strb r2, [r3, #0] + 800449a: 68fb ldr r3, [r7, #12] + 800449c: 681b ldr r3, [r3, #0] + 800449e: 691a ldr r2, [r3, #16] + 80044a0: 68fb ldr r3, [r7, #12] + 80044a2: 6a5b ldr r3, [r3, #36] @ 0x24 + 80044a4: b2d2 uxtb r2, r2 + 80044a6: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80053ac: 68fb ldr r3, [r7, #12] - 80053ae: 6a5b ldr r3, [r3, #36] @ 0x24 - 80053b0: 1c5a adds r2, r3, #1 - 80053b2: 68fb ldr r3, [r7, #12] - 80053b4: 625a str r2, [r3, #36] @ 0x24 + 80044a8: 68fb ldr r3, [r7, #12] + 80044aa: 6a5b ldr r3, [r3, #36] @ 0x24 + 80044ac: 1c5a adds r2, r3, #1 + 80044ae: 68fb ldr r3, [r7, #12] + 80044b0: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 80053b6: 68fb ldr r3, [r7, #12] - 80053b8: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80053ba: 3b01 subs r3, #1 - 80053bc: b29a uxth r2, r3 - 80053be: 68fb ldr r3, [r7, #12] - 80053c0: 851a strh r2, [r3, #40] @ 0x28 + 80044b2: 68fb ldr r3, [r7, #12] + 80044b4: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80044b6: 3b01 subs r3, #1 + 80044b8: b29a uxth r2, r3 + 80044ba: 68fb ldr r3, [r7, #12] + 80044bc: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 80053c2: 68fb ldr r3, [r7, #12] - 80053c4: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80053c6: b29b uxth r3, r3 - 80053c8: 3b01 subs r3, #1 - 80053ca: b29a uxth r2, r3 - 80053cc: 68fb ldr r3, [r7, #12] - 80053ce: 855a strh r2, [r3, #42] @ 0x2a + 80044be: 68fb ldr r3, [r7, #12] + 80044c0: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80044c2: b29b uxth r3, r3 + 80044c4: 3b01 subs r3, #1 + 80044c6: b29a uxth r2, r3 + 80044c8: 68fb ldr r3, [r7, #12] + 80044ca: 855a strh r2, [r3, #42] @ 0x2a if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) - 80053d0: 68fb ldr r3, [r7, #12] - 80053d2: 681b ldr r3, [r3, #0] - 80053d4: 695b ldr r3, [r3, #20] - 80053d6: f003 0304 and.w r3, r3, #4 - 80053da: 2b04 cmp r3, #4 - 80053dc: d124 bne.n 8005428 + 80044cc: 68fb ldr r3, [r7, #12] + 80044ce: 681b ldr r3, [r3, #0] + 80044d0: 695b ldr r3, [r3, #20] + 80044d2: f003 0304 and.w r3, r3, #4 + 80044d6: 2b04 cmp r3, #4 + 80044d8: d124 bne.n 8004524 { if (hi2c->XferSize == 3U) - 80053de: 68fb ldr r3, [r7, #12] - 80053e0: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80053e2: 2b03 cmp r3, #3 - 80053e4: d107 bne.n 80053f6 + 80044da: 68fb ldr r3, [r7, #12] + 80044dc: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80044de: 2b03 cmp r3, #3 + 80044e0: d107 bne.n 80044f2 { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 80053e6: 68fb ldr r3, [r7, #12] - 80053e8: 681b ldr r3, [r3, #0] - 80053ea: 681a ldr r2, [r3, #0] - 80053ec: 68fb ldr r3, [r7, #12] - 80053ee: 681b ldr r3, [r3, #0] - 80053f0: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 80053f4: 601a str r2, [r3, #0] + 80044e2: 68fb ldr r3, [r7, #12] + 80044e4: 681b ldr r3, [r3, #0] + 80044e6: 681a ldr r2, [r3, #0] + 80044e8: 68fb ldr r3, [r7, #12] + 80044ea: 681b ldr r3, [r3, #0] + 80044ec: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 80044f0: 601a str r2, [r3, #0] } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 80053f6: 68fb ldr r3, [r7, #12] - 80053f8: 681b ldr r3, [r3, #0] - 80053fa: 691a ldr r2, [r3, #16] - 80053fc: 68fb ldr r3, [r7, #12] - 80053fe: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005400: b2d2 uxtb r2, r2 - 8005402: 701a strb r2, [r3, #0] + 80044f2: 68fb ldr r3, [r7, #12] + 80044f4: 681b ldr r3, [r3, #0] + 80044f6: 691a ldr r2, [r3, #16] + 80044f8: 68fb ldr r3, [r7, #12] + 80044fa: 6a5b ldr r3, [r3, #36] @ 0x24 + 80044fc: b2d2 uxtb r2, r2 + 80044fe: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8005404: 68fb ldr r3, [r7, #12] - 8005406: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005408: 1c5a adds r2, r3, #1 - 800540a: 68fb ldr r3, [r7, #12] - 800540c: 625a str r2, [r3, #36] @ 0x24 + 8004500: 68fb ldr r3, [r7, #12] + 8004502: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004504: 1c5a adds r2, r3, #1 + 8004506: 68fb ldr r3, [r7, #12] + 8004508: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 800540e: 68fb ldr r3, [r7, #12] - 8005410: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8005412: 3b01 subs r3, #1 - 8005414: b29a uxth r2, r3 - 8005416: 68fb ldr r3, [r7, #12] - 8005418: 851a strh r2, [r3, #40] @ 0x28 + 800450a: 68fb ldr r3, [r7, #12] + 800450c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800450e: 3b01 subs r3, #1 + 8004510: b29a uxth r2, r3 + 8004512: 68fb ldr r3, [r7, #12] + 8004514: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 800541a: 68fb ldr r3, [r7, #12] - 800541c: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800541e: b29b uxth r3, r3 - 8005420: 3b01 subs r3, #1 - 8005422: b29a uxth r2, r3 - 8005424: 68fb ldr r3, [r7, #12] - 8005426: 855a strh r2, [r3, #42] @ 0x2a + 8004516: 68fb ldr r3, [r7, #12] + 8004518: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800451a: b29b uxth r3, r3 + 800451c: 3b01 subs r3, #1 + 800451e: b29a uxth r2, r3 + 8004520: 68fb ldr r3, [r7, #12] + 8004522: 855a strh r2, [r3, #42] @ 0x2a while (hi2c->XferSize > 0U) - 8005428: 68fb ldr r3, [r7, #12] - 800542a: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800542c: 2b00 cmp r3, #0 - 800542e: f47f ae88 bne.w 8005142 + 8004524: 68fb ldr r3, [r7, #12] + 8004526: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004528: 2b00 cmp r3, #0 + 800452a: f47f ae88 bne.w 800423e } } } hi2c->State = HAL_I2C_STATE_READY; - 8005432: 68fb ldr r3, [r7, #12] - 8005434: 2220 movs r2, #32 - 8005436: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800452e: 68fb ldr r3, [r7, #12] + 8004530: 2220 movs r2, #32 + 8004532: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 800543a: 68fb ldr r3, [r7, #12] - 800543c: 2200 movs r2, #0 - 800543e: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004536: 68fb ldr r3, [r7, #12] + 8004538: 2200 movs r2, #0 + 800453a: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8005442: 68fb ldr r3, [r7, #12] - 8005444: 2200 movs r2, #0 - 8005446: f883 203c strb.w r2, [r3, #60] @ 0x3c + 800453e: 68fb ldr r3, [r7, #12] + 8004540: 2200 movs r2, #0 + 8004542: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 800544a: 2300 movs r3, #0 - 800544c: e000 b.n 8005450 + 8004546: 2300 movs r3, #0 + 8004548: e000 b.n 800454c } else { return HAL_BUSY; - 800544e: 2302 movs r3, #2 + 800454a: 2302 movs r3, #2 } } - 8005450: 4618 mov r0, r3 - 8005452: 3728 adds r7, #40 @ 0x28 - 8005454: 46bd mov sp, r7 - 8005456: bd80 pop {r7, pc} - 8005458: 00010004 .word 0x00010004 - 800545c: 20000024 .word 0x20000024 - 8005460: 14f8b589 .word 0x14f8b589 + 800454c: 4618 mov r0, r3 + 800454e: 3728 adds r7, #40 @ 0x28 + 8004550: 46bd mov sp, r7 + 8004552: bd80 pop {r7, pc} + 8004554: 00010004 .word 0x00010004 + 8004558: 20000018 .word 0x20000018 + 800455c: 14f8b589 .word 0x14f8b589 -08005464 : +08004560 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) { - 8005464: b580 push {r7, lr} - 8005466: b088 sub sp, #32 - 8005468: af02 add r7, sp, #8 - 800546a: 60f8 str r0, [r7, #12] - 800546c: 607a str r2, [r7, #4] - 800546e: 603b str r3, [r7, #0] - 8005470: 460b mov r3, r1 - 8005472: 817b strh r3, [r7, #10] + 8004560: b580 push {r7, lr} + 8004562: b088 sub sp, #32 + 8004564: af02 add r7, sp, #8 + 8004566: 60f8 str r0, [r7, #12] + 8004568: 607a str r2, [r7, #4] + 800456a: 603b str r3, [r7, #0] + 800456c: 460b mov r3, r1 + 800456e: 817b strh r3, [r7, #10] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; - 8005474: 68fb ldr r3, [r7, #12] - 8005476: 6adb ldr r3, [r3, #44] @ 0x2c - 8005478: 617b str r3, [r7, #20] + 8004570: 68fb ldr r3, [r7, #12] + 8004572: 6adb ldr r3, [r3, #44] @ 0x2c + 8004574: 617b str r3, [r7, #20] /* Generate Start condition if first transfer */ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) - 800547a: 697b ldr r3, [r7, #20] - 800547c: 2b08 cmp r3, #8 - 800547e: d006 beq.n 800548e - 8005480: 697b ldr r3, [r7, #20] - 8005482: 2b01 cmp r3, #1 - 8005484: d003 beq.n 800548e - 8005486: 697b ldr r3, [r7, #20] - 8005488: f513 3f80 cmn.w r3, #65536 @ 0x10000 - 800548c: d108 bne.n 80054a0 + 8004576: 697b ldr r3, [r7, #20] + 8004578: 2b08 cmp r3, #8 + 800457a: d006 beq.n 800458a + 800457c: 697b ldr r3, [r7, #20] + 800457e: 2b01 cmp r3, #1 + 8004580: d003 beq.n 800458a + 8004582: 697b ldr r3, [r7, #20] + 8004584: f513 3f80 cmn.w r3, #65536 @ 0x10000 + 8004588: d108 bne.n 800459c { /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 800548e: 68fb ldr r3, [r7, #12] - 8005490: 681b ldr r3, [r3, #0] - 8005492: 681a ldr r2, [r3, #0] - 8005494: 68fb ldr r3, [r7, #12] - 8005496: 681b ldr r3, [r3, #0] - 8005498: f442 7280 orr.w r2, r2, #256 @ 0x100 - 800549c: 601a str r2, [r3, #0] - 800549e: e00b b.n 80054b8 + 800458a: 68fb ldr r3, [r7, #12] + 800458c: 681b ldr r3, [r3, #0] + 800458e: 681a ldr r2, [r3, #0] + 8004590: 68fb ldr r3, [r7, #12] + 8004592: 681b ldr r3, [r3, #0] + 8004594: f442 7280 orr.w r2, r2, #256 @ 0x100 + 8004598: 601a str r2, [r3, #0] + 800459a: e00b b.n 80045b4 } else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) - 80054a0: 68fb ldr r3, [r7, #12] - 80054a2: 6b1b ldr r3, [r3, #48] @ 0x30 - 80054a4: 2b12 cmp r3, #18 - 80054a6: d107 bne.n 80054b8 + 800459c: 68fb ldr r3, [r7, #12] + 800459e: 6b1b ldr r3, [r3, #48] @ 0x30 + 80045a0: 2b12 cmp r3, #18 + 80045a2: d107 bne.n 80045b4 { /* Generate ReStart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 80054a8: 68fb ldr r3, [r7, #12] - 80054aa: 681b ldr r3, [r3, #0] - 80054ac: 681a ldr r2, [r3, #0] - 80054ae: 68fb ldr r3, [r7, #12] - 80054b0: 681b ldr r3, [r3, #0] - 80054b2: f442 7280 orr.w r2, r2, #256 @ 0x100 - 80054b6: 601a str r2, [r3, #0] + 80045a4: 68fb ldr r3, [r7, #12] + 80045a6: 681b ldr r3, [r3, #0] + 80045a8: 681a ldr r2, [r3, #0] + 80045aa: 68fb ldr r3, [r7, #12] + 80045ac: 681b ldr r3, [r3, #0] + 80045ae: f442 7280 orr.w r2, r2, #256 @ 0x100 + 80045b2: 601a str r2, [r3, #0] { /* Do nothing */ } /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 80054b8: 683b ldr r3, [r7, #0] - 80054ba: 9300 str r3, [sp, #0] - 80054bc: 687b ldr r3, [r7, #4] - 80054be: 2200 movs r2, #0 - 80054c0: f04f 1101 mov.w r1, #65537 @ 0x10001 - 80054c4: 68f8 ldr r0, [r7, #12] - 80054c6: f000 f91d bl 8005704 - 80054ca: 4603 mov r3, r0 - 80054cc: 2b00 cmp r3, #0 - 80054ce: d00d beq.n 80054ec + 80045b4: 683b ldr r3, [r7, #0] + 80045b6: 9300 str r3, [sp, #0] + 80045b8: 687b ldr r3, [r7, #4] + 80045ba: 2200 movs r2, #0 + 80045bc: f04f 1101 mov.w r1, #65537 @ 0x10001 + 80045c0: 68f8 ldr r0, [r7, #12] + 80045c2: f000 f91d bl 8004800 + 80045c6: 4603 mov r3, r0 + 80045c8: 2b00 cmp r3, #0 + 80045ca: d00d beq.n 80045e8 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 80054d0: 68fb ldr r3, [r7, #12] - 80054d2: 681b ldr r3, [r3, #0] - 80054d4: 681b ldr r3, [r3, #0] - 80054d6: f403 7380 and.w r3, r3, #256 @ 0x100 - 80054da: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 80054de: d103 bne.n 80054e8 + 80045cc: 68fb ldr r3, [r7, #12] + 80045ce: 681b ldr r3, [r3, #0] + 80045d0: 681b ldr r3, [r3, #0] + 80045d2: f403 7380 and.w r3, r3, #256 @ 0x100 + 80045d6: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80045da: d103 bne.n 80045e4 { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 80054e0: 68fb ldr r3, [r7, #12] - 80054e2: f44f 7200 mov.w r2, #512 @ 0x200 - 80054e6: 641a str r2, [r3, #64] @ 0x40 + 80045dc: 68fb ldr r3, [r7, #12] + 80045de: f44f 7200 mov.w r2, #512 @ 0x200 + 80045e2: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 80054e8: 2303 movs r3, #3 - 80054ea: e035 b.n 8005558 + 80045e4: 2303 movs r3, #3 + 80045e6: e035 b.n 8004654 } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 80054ec: 68fb ldr r3, [r7, #12] - 80054ee: 691b ldr r3, [r3, #16] - 80054f0: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 - 80054f4: d108 bne.n 8005508 + 80045e8: 68fb ldr r3, [r7, #12] + 80045ea: 691b ldr r3, [r3, #16] + 80045ec: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 + 80045f0: d108 bne.n 8004604 { /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); - 80054f6: 897b ldrh r3, [r7, #10] - 80054f8: b2db uxtb r3, r3 - 80054fa: 461a mov r2, r3 - 80054fc: 68fb ldr r3, [r7, #12] - 80054fe: 681b ldr r3, [r3, #0] - 8005500: f002 02fe and.w r2, r2, #254 @ 0xfe - 8005504: 611a str r2, [r3, #16] - 8005506: e01b b.n 8005540 + 80045f2: 897b ldrh r3, [r7, #10] + 80045f4: b2db uxtb r3, r3 + 80045f6: 461a mov r2, r3 + 80045f8: 68fb ldr r3, [r7, #12] + 80045fa: 681b ldr r3, [r3, #0] + 80045fc: f002 02fe and.w r2, r2, #254 @ 0xfe + 8004600: 611a str r2, [r3, #16] + 8004602: e01b b.n 800463c } else { /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); - 8005508: 897b ldrh r3, [r7, #10] - 800550a: 11db asrs r3, r3, #7 - 800550c: b2db uxtb r3, r3 - 800550e: f003 0306 and.w r3, r3, #6 - 8005512: b2db uxtb r3, r3 - 8005514: f063 030f orn r3, r3, #15 - 8005518: b2da uxtb r2, r3 - 800551a: 68fb ldr r3, [r7, #12] - 800551c: 681b ldr r3, [r3, #0] - 800551e: 611a str r2, [r3, #16] + 8004604: 897b ldrh r3, [r7, #10] + 8004606: 11db asrs r3, r3, #7 + 8004608: b2db uxtb r3, r3 + 800460a: f003 0306 and.w r3, r3, #6 + 800460e: b2db uxtb r3, r3 + 8004610: f063 030f orn r3, r3, #15 + 8004614: b2da uxtb r2, r3 + 8004616: 68fb ldr r3, [r7, #12] + 8004618: 681b ldr r3, [r3, #0] + 800461a: 611a str r2, [r3, #16] /* Wait until ADD10 flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) - 8005520: 683b ldr r3, [r7, #0] - 8005522: 687a ldr r2, [r7, #4] - 8005524: 490e ldr r1, [pc, #56] @ (8005560 ) - 8005526: 68f8 ldr r0, [r7, #12] - 8005528: f000 f966 bl 80057f8 - 800552c: 4603 mov r3, r0 - 800552e: 2b00 cmp r3, #0 - 8005530: d001 beq.n 8005536 + 800461c: 683b ldr r3, [r7, #0] + 800461e: 687a ldr r2, [r7, #4] + 8004620: 490e ldr r1, [pc, #56] @ (800465c ) + 8004622: 68f8 ldr r0, [r7, #12] + 8004624: f000 f966 bl 80048f4 + 8004628: 4603 mov r3, r0 + 800462a: 2b00 cmp r3, #0 + 800462c: d001 beq.n 8004632 { return HAL_ERROR; - 8005532: 2301 movs r3, #1 - 8005534: e010 b.n 8005558 + 800462e: 2301 movs r3, #1 + 8004630: e010 b.n 8004654 } /* Send slave address */ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); - 8005536: 897b ldrh r3, [r7, #10] - 8005538: b2da uxtb r2, r3 - 800553a: 68fb ldr r3, [r7, #12] - 800553c: 681b ldr r3, [r3, #0] - 800553e: 611a str r2, [r3, #16] + 8004632: 897b ldrh r3, [r7, #10] + 8004634: b2da uxtb r2, r3 + 8004636: 68fb ldr r3, [r7, #12] + 8004638: 681b ldr r3, [r3, #0] + 800463a: 611a str r2, [r3, #16] } /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 8005540: 683b ldr r3, [r7, #0] - 8005542: 687a ldr r2, [r7, #4] - 8005544: 4907 ldr r1, [pc, #28] @ (8005564 ) - 8005546: 68f8 ldr r0, [r7, #12] - 8005548: f000 f956 bl 80057f8 - 800554c: 4603 mov r3, r0 - 800554e: 2b00 cmp r3, #0 - 8005550: d001 beq.n 8005556 + 800463c: 683b ldr r3, [r7, #0] + 800463e: 687a ldr r2, [r7, #4] + 8004640: 4907 ldr r1, [pc, #28] @ (8004660 ) + 8004642: 68f8 ldr r0, [r7, #12] + 8004644: f000 f956 bl 80048f4 + 8004648: 4603 mov r3, r0 + 800464a: 2b00 cmp r3, #0 + 800464c: d001 beq.n 8004652 { return HAL_ERROR; - 8005552: 2301 movs r3, #1 - 8005554: e000 b.n 8005558 + 800464e: 2301 movs r3, #1 + 8004650: e000 b.n 8004654 } return HAL_OK; - 8005556: 2300 movs r3, #0 + 8004652: 2300 movs r3, #0 } - 8005558: 4618 mov r0, r3 - 800555a: 3718 adds r7, #24 - 800555c: 46bd mov sp, r7 - 800555e: bd80 pop {r7, pc} - 8005560: 00010008 .word 0x00010008 - 8005564: 00010002 .word 0x00010002 + 8004654: 4618 mov r0, r3 + 8004656: 3718 adds r7, #24 + 8004658: 46bd mov sp, r7 + 800465a: bd80 pop {r7, pc} + 800465c: 00010008 .word 0x00010008 + 8004660: 00010002 .word 0x00010002 -08005568 : +08004664 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) { - 8005568: b580 push {r7, lr} - 800556a: b088 sub sp, #32 - 800556c: af02 add r7, sp, #8 - 800556e: 60f8 str r0, [r7, #12] - 8005570: 607a str r2, [r7, #4] - 8005572: 603b str r3, [r7, #0] - 8005574: 460b mov r3, r1 - 8005576: 817b strh r3, [r7, #10] + 8004664: b580 push {r7, lr} + 8004666: b088 sub sp, #32 + 8004668: af02 add r7, sp, #8 + 800466a: 60f8 str r0, [r7, #12] + 800466c: 607a str r2, [r7, #4] + 800466e: 603b str r3, [r7, #0] + 8004670: 460b mov r3, r1 + 8004672: 817b strh r3, [r7, #10] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; - 8005578: 68fb ldr r3, [r7, #12] - 800557a: 6adb ldr r3, [r3, #44] @ 0x2c - 800557c: 617b str r3, [r7, #20] + 8004674: 68fb ldr r3, [r7, #12] + 8004676: 6adb ldr r3, [r3, #44] @ 0x2c + 8004678: 617b str r3, [r7, #20] /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 800557e: 68fb ldr r3, [r7, #12] - 8005580: 681b ldr r3, [r3, #0] - 8005582: 681a ldr r2, [r3, #0] - 8005584: 68fb ldr r3, [r7, #12] - 8005586: 681b ldr r3, [r3, #0] - 8005588: f442 6280 orr.w r2, r2, #1024 @ 0x400 - 800558c: 601a str r2, [r3, #0] + 800467a: 68fb ldr r3, [r7, #12] + 800467c: 681b ldr r3, [r3, #0] + 800467e: 681a ldr r2, [r3, #0] + 8004680: 68fb ldr r3, [r7, #12] + 8004682: 681b ldr r3, [r3, #0] + 8004684: f442 6280 orr.w r2, r2, #1024 @ 0x400 + 8004688: 601a str r2, [r3, #0] /* Generate Start condition if first transfer */ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) - 800558e: 697b ldr r3, [r7, #20] - 8005590: 2b08 cmp r3, #8 - 8005592: d006 beq.n 80055a2 - 8005594: 697b ldr r3, [r7, #20] - 8005596: 2b01 cmp r3, #1 - 8005598: d003 beq.n 80055a2 - 800559a: 697b ldr r3, [r7, #20] - 800559c: f513 3f80 cmn.w r3, #65536 @ 0x10000 - 80055a0: d108 bne.n 80055b4 + 800468a: 697b ldr r3, [r7, #20] + 800468c: 2b08 cmp r3, #8 + 800468e: d006 beq.n 800469e + 8004690: 697b ldr r3, [r7, #20] + 8004692: 2b01 cmp r3, #1 + 8004694: d003 beq.n 800469e + 8004696: 697b ldr r3, [r7, #20] + 8004698: f513 3f80 cmn.w r3, #65536 @ 0x10000 + 800469c: d108 bne.n 80046b0 { /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 80055a2: 68fb ldr r3, [r7, #12] - 80055a4: 681b ldr r3, [r3, #0] - 80055a6: 681a ldr r2, [r3, #0] - 80055a8: 68fb ldr r3, [r7, #12] - 80055aa: 681b ldr r3, [r3, #0] - 80055ac: f442 7280 orr.w r2, r2, #256 @ 0x100 - 80055b0: 601a str r2, [r3, #0] - 80055b2: e00b b.n 80055cc + 800469e: 68fb ldr r3, [r7, #12] + 80046a0: 681b ldr r3, [r3, #0] + 80046a2: 681a ldr r2, [r3, #0] + 80046a4: 68fb ldr r3, [r7, #12] + 80046a6: 681b ldr r3, [r3, #0] + 80046a8: f442 7280 orr.w r2, r2, #256 @ 0x100 + 80046ac: 601a str r2, [r3, #0] + 80046ae: e00b b.n 80046c8 } else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) - 80055b4: 68fb ldr r3, [r7, #12] - 80055b6: 6b1b ldr r3, [r3, #48] @ 0x30 - 80055b8: 2b11 cmp r3, #17 - 80055ba: d107 bne.n 80055cc + 80046b0: 68fb ldr r3, [r7, #12] + 80046b2: 6b1b ldr r3, [r3, #48] @ 0x30 + 80046b4: 2b11 cmp r3, #17 + 80046b6: d107 bne.n 80046c8 { /* Generate ReStart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 80055bc: 68fb ldr r3, [r7, #12] - 80055be: 681b ldr r3, [r3, #0] - 80055c0: 681a ldr r2, [r3, #0] - 80055c2: 68fb ldr r3, [r7, #12] - 80055c4: 681b ldr r3, [r3, #0] - 80055c6: f442 7280 orr.w r2, r2, #256 @ 0x100 - 80055ca: 601a str r2, [r3, #0] + 80046b8: 68fb ldr r3, [r7, #12] + 80046ba: 681b ldr r3, [r3, #0] + 80046bc: 681a ldr r2, [r3, #0] + 80046be: 68fb ldr r3, [r7, #12] + 80046c0: 681b ldr r3, [r3, #0] + 80046c2: f442 7280 orr.w r2, r2, #256 @ 0x100 + 80046c6: 601a str r2, [r3, #0] { /* Do nothing */ } /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 80055cc: 683b ldr r3, [r7, #0] - 80055ce: 9300 str r3, [sp, #0] - 80055d0: 687b ldr r3, [r7, #4] - 80055d2: 2200 movs r2, #0 - 80055d4: f04f 1101 mov.w r1, #65537 @ 0x10001 - 80055d8: 68f8 ldr r0, [r7, #12] - 80055da: f000 f893 bl 8005704 - 80055de: 4603 mov r3, r0 - 80055e0: 2b00 cmp r3, #0 - 80055e2: d00d beq.n 8005600 + 80046c8: 683b ldr r3, [r7, #0] + 80046ca: 9300 str r3, [sp, #0] + 80046cc: 687b ldr r3, [r7, #4] + 80046ce: 2200 movs r2, #0 + 80046d0: f04f 1101 mov.w r1, #65537 @ 0x10001 + 80046d4: 68f8 ldr r0, [r7, #12] + 80046d6: f000 f893 bl 8004800 + 80046da: 4603 mov r3, r0 + 80046dc: 2b00 cmp r3, #0 + 80046de: d00d beq.n 80046fc { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 80055e4: 68fb ldr r3, [r7, #12] - 80055e6: 681b ldr r3, [r3, #0] - 80055e8: 681b ldr r3, [r3, #0] - 80055ea: f403 7380 and.w r3, r3, #256 @ 0x100 - 80055ee: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 80055f2: d103 bne.n 80055fc + 80046e0: 68fb ldr r3, [r7, #12] + 80046e2: 681b ldr r3, [r3, #0] + 80046e4: 681b ldr r3, [r3, #0] + 80046e6: f403 7380 and.w r3, r3, #256 @ 0x100 + 80046ea: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80046ee: d103 bne.n 80046f8 { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 80055f4: 68fb ldr r3, [r7, #12] - 80055f6: f44f 7200 mov.w r2, #512 @ 0x200 - 80055fa: 641a str r2, [r3, #64] @ 0x40 + 80046f0: 68fb ldr r3, [r7, #12] + 80046f2: f44f 7200 mov.w r2, #512 @ 0x200 + 80046f6: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 80055fc: 2303 movs r3, #3 - 80055fe: e079 b.n 80056f4 + 80046f8: 2303 movs r3, #3 + 80046fa: e079 b.n 80047f0 } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 8005600: 68fb ldr r3, [r7, #12] - 8005602: 691b ldr r3, [r3, #16] - 8005604: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 - 8005608: d108 bne.n 800561c + 80046fc: 68fb ldr r3, [r7, #12] + 80046fe: 691b ldr r3, [r3, #16] + 8004700: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 + 8004704: d108 bne.n 8004718 { /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); - 800560a: 897b ldrh r3, [r7, #10] - 800560c: b2db uxtb r3, r3 - 800560e: f043 0301 orr.w r3, r3, #1 - 8005612: b2da uxtb r2, r3 - 8005614: 68fb ldr r3, [r7, #12] - 8005616: 681b ldr r3, [r3, #0] - 8005618: 611a str r2, [r3, #16] - 800561a: e05f b.n 80056dc + 8004706: 897b ldrh r3, [r7, #10] + 8004708: b2db uxtb r3, r3 + 800470a: f043 0301 orr.w r3, r3, #1 + 800470e: b2da uxtb r2, r3 + 8004710: 68fb ldr r3, [r7, #12] + 8004712: 681b ldr r3, [r3, #0] + 8004714: 611a str r2, [r3, #16] + 8004716: e05f b.n 80047d8 } else { /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); - 800561c: 897b ldrh r3, [r7, #10] - 800561e: 11db asrs r3, r3, #7 - 8005620: b2db uxtb r3, r3 - 8005622: f003 0306 and.w r3, r3, #6 - 8005626: b2db uxtb r3, r3 - 8005628: f063 030f orn r3, r3, #15 - 800562c: b2da uxtb r2, r3 - 800562e: 68fb ldr r3, [r7, #12] - 8005630: 681b ldr r3, [r3, #0] - 8005632: 611a str r2, [r3, #16] + 8004718: 897b ldrh r3, [r7, #10] + 800471a: 11db asrs r3, r3, #7 + 800471c: b2db uxtb r3, r3 + 800471e: f003 0306 and.w r3, r3, #6 + 8004722: b2db uxtb r3, r3 + 8004724: f063 030f orn r3, r3, #15 + 8004728: b2da uxtb r2, r3 + 800472a: 68fb ldr r3, [r7, #12] + 800472c: 681b ldr r3, [r3, #0] + 800472e: 611a str r2, [r3, #16] /* Wait until ADD10 flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) - 8005634: 683b ldr r3, [r7, #0] - 8005636: 687a ldr r2, [r7, #4] - 8005638: 4930 ldr r1, [pc, #192] @ (80056fc ) - 800563a: 68f8 ldr r0, [r7, #12] - 800563c: f000 f8dc bl 80057f8 - 8005640: 4603 mov r3, r0 - 8005642: 2b00 cmp r3, #0 - 8005644: d001 beq.n 800564a + 8004730: 683b ldr r3, [r7, #0] + 8004732: 687a ldr r2, [r7, #4] + 8004734: 4930 ldr r1, [pc, #192] @ (80047f8 ) + 8004736: 68f8 ldr r0, [r7, #12] + 8004738: f000 f8dc bl 80048f4 + 800473c: 4603 mov r3, r0 + 800473e: 2b00 cmp r3, #0 + 8004740: d001 beq.n 8004746 { return HAL_ERROR; - 8005646: 2301 movs r3, #1 - 8005648: e054 b.n 80056f4 + 8004742: 2301 movs r3, #1 + 8004744: e054 b.n 80047f0 } /* Send slave address */ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); - 800564a: 897b ldrh r3, [r7, #10] - 800564c: b2da uxtb r2, r3 - 800564e: 68fb ldr r3, [r7, #12] - 8005650: 681b ldr r3, [r3, #0] - 8005652: 611a str r2, [r3, #16] + 8004746: 897b ldrh r3, [r7, #10] + 8004748: b2da uxtb r2, r3 + 800474a: 68fb ldr r3, [r7, #12] + 800474c: 681b ldr r3, [r3, #0] + 800474e: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 8005654: 683b ldr r3, [r7, #0] - 8005656: 687a ldr r2, [r7, #4] - 8005658: 4929 ldr r1, [pc, #164] @ (8005700 ) - 800565a: 68f8 ldr r0, [r7, #12] - 800565c: f000 f8cc bl 80057f8 - 8005660: 4603 mov r3, r0 - 8005662: 2b00 cmp r3, #0 - 8005664: d001 beq.n 800566a + 8004750: 683b ldr r3, [r7, #0] + 8004752: 687a ldr r2, [r7, #4] + 8004754: 4929 ldr r1, [pc, #164] @ (80047fc ) + 8004756: 68f8 ldr r0, [r7, #12] + 8004758: f000 f8cc bl 80048f4 + 800475c: 4603 mov r3, r0 + 800475e: 2b00 cmp r3, #0 + 8004760: d001 beq.n 8004766 { return HAL_ERROR; - 8005666: 2301 movs r3, #1 - 8005668: e044 b.n 80056f4 + 8004762: 2301 movs r3, #1 + 8004764: e044 b.n 80047f0 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 800566a: 2300 movs r3, #0 - 800566c: 613b str r3, [r7, #16] - 800566e: 68fb ldr r3, [r7, #12] - 8005670: 681b ldr r3, [r3, #0] - 8005672: 695b ldr r3, [r3, #20] - 8005674: 613b str r3, [r7, #16] - 8005676: 68fb ldr r3, [r7, #12] - 8005678: 681b ldr r3, [r3, #0] - 800567a: 699b ldr r3, [r3, #24] - 800567c: 613b str r3, [r7, #16] - 800567e: 693b ldr r3, [r7, #16] + 8004766: 2300 movs r3, #0 + 8004768: 613b str r3, [r7, #16] + 800476a: 68fb ldr r3, [r7, #12] + 800476c: 681b ldr r3, [r3, #0] + 800476e: 695b ldr r3, [r3, #20] + 8004770: 613b str r3, [r7, #16] + 8004772: 68fb ldr r3, [r7, #12] + 8004774: 681b ldr r3, [r3, #0] + 8004776: 699b ldr r3, [r3, #24] + 8004778: 613b str r3, [r7, #16] + 800477a: 693b ldr r3, [r7, #16] /* Generate Restart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8005680: 68fb ldr r3, [r7, #12] - 8005682: 681b ldr r3, [r3, #0] - 8005684: 681a ldr r2, [r3, #0] - 8005686: 68fb ldr r3, [r7, #12] - 8005688: 681b ldr r3, [r3, #0] - 800568a: f442 7280 orr.w r2, r2, #256 @ 0x100 - 800568e: 601a str r2, [r3, #0] + 800477c: 68fb ldr r3, [r7, #12] + 800477e: 681b ldr r3, [r3, #0] + 8004780: 681a ldr r2, [r3, #0] + 8004782: 68fb ldr r3, [r7, #12] + 8004784: 681b ldr r3, [r3, #0] + 8004786: f442 7280 orr.w r2, r2, #256 @ 0x100 + 800478a: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8005690: 683b ldr r3, [r7, #0] - 8005692: 9300 str r3, [sp, #0] - 8005694: 687b ldr r3, [r7, #4] - 8005696: 2200 movs r2, #0 - 8005698: f04f 1101 mov.w r1, #65537 @ 0x10001 - 800569c: 68f8 ldr r0, [r7, #12] - 800569e: f000 f831 bl 8005704 - 80056a2: 4603 mov r3, r0 - 80056a4: 2b00 cmp r3, #0 - 80056a6: d00d beq.n 80056c4 + 800478c: 683b ldr r3, [r7, #0] + 800478e: 9300 str r3, [sp, #0] + 8004790: 687b ldr r3, [r7, #4] + 8004792: 2200 movs r2, #0 + 8004794: f04f 1101 mov.w r1, #65537 @ 0x10001 + 8004798: 68f8 ldr r0, [r7, #12] + 800479a: f000 f831 bl 8004800 + 800479e: 4603 mov r3, r0 + 80047a0: 2b00 cmp r3, #0 + 80047a2: d00d beq.n 80047c0 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 80056a8: 68fb ldr r3, [r7, #12] - 80056aa: 681b ldr r3, [r3, #0] - 80056ac: 681b ldr r3, [r3, #0] - 80056ae: f403 7380 and.w r3, r3, #256 @ 0x100 - 80056b2: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 80056b6: d103 bne.n 80056c0 + 80047a4: 68fb ldr r3, [r7, #12] + 80047a6: 681b ldr r3, [r3, #0] + 80047a8: 681b ldr r3, [r3, #0] + 80047aa: f403 7380 and.w r3, r3, #256 @ 0x100 + 80047ae: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80047b2: d103 bne.n 80047bc { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 80056b8: 68fb ldr r3, [r7, #12] - 80056ba: f44f 7200 mov.w r2, #512 @ 0x200 - 80056be: 641a str r2, [r3, #64] @ 0x40 + 80047b4: 68fb ldr r3, [r7, #12] + 80047b6: f44f 7200 mov.w r2, #512 @ 0x200 + 80047ba: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 80056c0: 2303 movs r3, #3 - 80056c2: e017 b.n 80056f4 + 80047bc: 2303 movs r3, #3 + 80047be: e017 b.n 80047f0 } /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress); - 80056c4: 897b ldrh r3, [r7, #10] - 80056c6: 11db asrs r3, r3, #7 - 80056c8: b2db uxtb r3, r3 - 80056ca: f003 0306 and.w r3, r3, #6 - 80056ce: b2db uxtb r3, r3 - 80056d0: f063 030e orn r3, r3, #14 - 80056d4: b2da uxtb r2, r3 - 80056d6: 68fb ldr r3, [r7, #12] - 80056d8: 681b ldr r3, [r3, #0] - 80056da: 611a str r2, [r3, #16] + 80047c0: 897b ldrh r3, [r7, #10] + 80047c2: 11db asrs r3, r3, #7 + 80047c4: b2db uxtb r3, r3 + 80047c6: f003 0306 and.w r3, r3, #6 + 80047ca: b2db uxtb r3, r3 + 80047cc: f063 030e orn r3, r3, #14 + 80047d0: b2da uxtb r2, r3 + 80047d2: 68fb ldr r3, [r7, #12] + 80047d4: 681b ldr r3, [r3, #0] + 80047d6: 611a str r2, [r3, #16] } /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 80056dc: 683b ldr r3, [r7, #0] - 80056de: 687a ldr r2, [r7, #4] - 80056e0: 4907 ldr r1, [pc, #28] @ (8005700 ) - 80056e2: 68f8 ldr r0, [r7, #12] - 80056e4: f000 f888 bl 80057f8 - 80056e8: 4603 mov r3, r0 - 80056ea: 2b00 cmp r3, #0 - 80056ec: d001 beq.n 80056f2 + 80047d8: 683b ldr r3, [r7, #0] + 80047da: 687a ldr r2, [r7, #4] + 80047dc: 4907 ldr r1, [pc, #28] @ (80047fc ) + 80047de: 68f8 ldr r0, [r7, #12] + 80047e0: f000 f888 bl 80048f4 + 80047e4: 4603 mov r3, r0 + 80047e6: 2b00 cmp r3, #0 + 80047e8: d001 beq.n 80047ee { return HAL_ERROR; - 80056ee: 2301 movs r3, #1 - 80056f0: e000 b.n 80056f4 + 80047ea: 2301 movs r3, #1 + 80047ec: e000 b.n 80047f0 } return HAL_OK; - 80056f2: 2300 movs r3, #0 + 80047ee: 2300 movs r3, #0 } - 80056f4: 4618 mov r0, r3 - 80056f6: 3718 adds r7, #24 - 80056f8: 46bd mov sp, r7 - 80056fa: bd80 pop {r7, pc} - 80056fc: 00010008 .word 0x00010008 - 8005700: 00010002 .word 0x00010002 + 80047f0: 4618 mov r0, r3 + 80047f2: 3718 adds r7, #24 + 80047f4: 46bd mov sp, r7 + 80047f6: bd80 pop {r7, pc} + 80047f8: 00010008 .word 0x00010008 + 80047fc: 00010002 .word 0x00010002 -08005704 : +08004800 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { - 8005704: b580 push {r7, lr} - 8005706: b084 sub sp, #16 - 8005708: af00 add r7, sp, #0 - 800570a: 60f8 str r0, [r7, #12] - 800570c: 60b9 str r1, [r7, #8] - 800570e: 603b str r3, [r7, #0] - 8005710: 4613 mov r3, r2 - 8005712: 71fb strb r3, [r7, #7] + 8004800: b580 push {r7, lr} + 8004802: b084 sub sp, #16 + 8004804: af00 add r7, sp, #0 + 8004806: 60f8 str r0, [r7, #12] + 8004808: 60b9 str r1, [r7, #8] + 800480a: 603b str r3, [r7, #0] + 800480c: 4613 mov r3, r2 + 800480e: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - 8005714: e048 b.n 80057a8 + 8004810: e048 b.n 80048a4 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8005716: 683b ldr r3, [r7, #0] - 8005718: f1b3 3fff cmp.w r3, #4294967295 - 800571c: d044 beq.n 80057a8 + 8004812: 683b ldr r3, [r7, #0] + 8004814: f1b3 3fff cmp.w r3, #4294967295 + 8004818: d044 beq.n 80048a4 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 800571e: f7fd fdd9 bl 80032d4 - 8005722: 4602 mov r2, r0 - 8005724: 69bb ldr r3, [r7, #24] - 8005726: 1ad3 subs r3, r2, r3 - 8005728: 683a ldr r2, [r7, #0] - 800572a: 429a cmp r2, r3 - 800572c: d302 bcc.n 8005734 - 800572e: 683b ldr r3, [r7, #0] - 8005730: 2b00 cmp r3, #0 - 8005732: d139 bne.n 80057a8 + 800481a: f7fe fa27 bl 8002c6c + 800481e: 4602 mov r2, r0 + 8004820: 69bb ldr r3, [r7, #24] + 8004822: 1ad3 subs r3, r2, r3 + 8004824: 683a ldr r2, [r7, #0] + 8004826: 429a cmp r2, r3 + 8004828: d302 bcc.n 8004830 + 800482a: 683b ldr r3, [r7, #0] + 800482c: 2b00 cmp r3, #0 + 800482e: d139 bne.n 80048a4 { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) - 8005734: 68bb ldr r3, [r7, #8] - 8005736: 0c1b lsrs r3, r3, #16 - 8005738: b2db uxtb r3, r3 - 800573a: 2b01 cmp r3, #1 - 800573c: d10d bne.n 800575a - 800573e: 68fb ldr r3, [r7, #12] - 8005740: 681b ldr r3, [r3, #0] - 8005742: 695b ldr r3, [r3, #20] - 8005744: 43da mvns r2, r3 - 8005746: 68bb ldr r3, [r7, #8] - 8005748: 4013 ands r3, r2 - 800574a: b29b uxth r3, r3 - 800574c: 2b00 cmp r3, #0 - 800574e: bf0c ite eq - 8005750: 2301 moveq r3, #1 - 8005752: 2300 movne r3, #0 - 8005754: b2db uxtb r3, r3 - 8005756: 461a mov r2, r3 - 8005758: e00c b.n 8005774 - 800575a: 68fb ldr r3, [r7, #12] - 800575c: 681b ldr r3, [r3, #0] - 800575e: 699b ldr r3, [r3, #24] - 8005760: 43da mvns r2, r3 - 8005762: 68bb ldr r3, [r7, #8] - 8005764: 4013 ands r3, r2 - 8005766: b29b uxth r3, r3 - 8005768: 2b00 cmp r3, #0 - 800576a: bf0c ite eq - 800576c: 2301 moveq r3, #1 - 800576e: 2300 movne r3, #0 - 8005770: b2db uxtb r3, r3 - 8005772: 461a mov r2, r3 - 8005774: 79fb ldrb r3, [r7, #7] - 8005776: 429a cmp r2, r3 - 8005778: d116 bne.n 80057a8 + 8004830: 68bb ldr r3, [r7, #8] + 8004832: 0c1b lsrs r3, r3, #16 + 8004834: b2db uxtb r3, r3 + 8004836: 2b01 cmp r3, #1 + 8004838: d10d bne.n 8004856 + 800483a: 68fb ldr r3, [r7, #12] + 800483c: 681b ldr r3, [r3, #0] + 800483e: 695b ldr r3, [r3, #20] + 8004840: 43da mvns r2, r3 + 8004842: 68bb ldr r3, [r7, #8] + 8004844: 4013 ands r3, r2 + 8004846: b29b uxth r3, r3 + 8004848: 2b00 cmp r3, #0 + 800484a: bf0c ite eq + 800484c: 2301 moveq r3, #1 + 800484e: 2300 movne r3, #0 + 8004850: b2db uxtb r3, r3 + 8004852: 461a mov r2, r3 + 8004854: e00c b.n 8004870 + 8004856: 68fb ldr r3, [r7, #12] + 8004858: 681b ldr r3, [r3, #0] + 800485a: 699b ldr r3, [r3, #24] + 800485c: 43da mvns r2, r3 + 800485e: 68bb ldr r3, [r7, #8] + 8004860: 4013 ands r3, r2 + 8004862: b29b uxth r3, r3 + 8004864: 2b00 cmp r3, #0 + 8004866: bf0c ite eq + 8004868: 2301 moveq r3, #1 + 800486a: 2300 movne r3, #0 + 800486c: b2db uxtb r3, r3 + 800486e: 461a mov r2, r3 + 8004870: 79fb ldrb r3, [r7, #7] + 8004872: 429a cmp r2, r3 + 8004874: d116 bne.n 80048a4 { hi2c->PreviousState = I2C_STATE_NONE; - 800577a: 68fb ldr r3, [r7, #12] - 800577c: 2200 movs r2, #0 - 800577e: 631a str r2, [r3, #48] @ 0x30 + 8004876: 68fb ldr r3, [r7, #12] + 8004878: 2200 movs r2, #0 + 800487a: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8005780: 68fb ldr r3, [r7, #12] - 8005782: 2220 movs r2, #32 - 8005784: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800487c: 68fb ldr r3, [r7, #12] + 800487e: 2220 movs r2, #32 + 8004880: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8005788: 68fb ldr r3, [r7, #12] - 800578a: 2200 movs r2, #0 - 800578c: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004884: 68fb ldr r3, [r7, #12] + 8004886: 2200 movs r2, #0 + 8004888: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8005790: 68fb ldr r3, [r7, #12] - 8005792: 6c1b ldr r3, [r3, #64] @ 0x40 - 8005794: f043 0220 orr.w r2, r3, #32 - 8005798: 68fb ldr r3, [r7, #12] - 800579a: 641a str r2, [r3, #64] @ 0x40 + 800488c: 68fb ldr r3, [r7, #12] + 800488e: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004890: f043 0220 orr.w r2, r3, #32 + 8004894: 68fb ldr r3, [r7, #12] + 8004896: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 800579c: 68fb ldr r3, [r7, #12] - 800579e: 2200 movs r2, #0 - 80057a0: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004898: 68fb ldr r3, [r7, #12] + 800489a: 2200 movs r2, #0 + 800489c: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 80057a4: 2301 movs r3, #1 - 80057a6: e023 b.n 80057f0 + 80048a0: 2301 movs r3, #1 + 80048a2: e023 b.n 80048ec while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - 80057a8: 68bb ldr r3, [r7, #8] - 80057aa: 0c1b lsrs r3, r3, #16 - 80057ac: b2db uxtb r3, r3 - 80057ae: 2b01 cmp r3, #1 - 80057b0: d10d bne.n 80057ce - 80057b2: 68fb ldr r3, [r7, #12] - 80057b4: 681b ldr r3, [r3, #0] - 80057b6: 695b ldr r3, [r3, #20] - 80057b8: 43da mvns r2, r3 - 80057ba: 68bb ldr r3, [r7, #8] - 80057bc: 4013 ands r3, r2 - 80057be: b29b uxth r3, r3 - 80057c0: 2b00 cmp r3, #0 - 80057c2: bf0c ite eq - 80057c4: 2301 moveq r3, #1 - 80057c6: 2300 movne r3, #0 - 80057c8: b2db uxtb r3, r3 - 80057ca: 461a mov r2, r3 - 80057cc: e00c b.n 80057e8 - 80057ce: 68fb ldr r3, [r7, #12] - 80057d0: 681b ldr r3, [r3, #0] - 80057d2: 699b ldr r3, [r3, #24] - 80057d4: 43da mvns r2, r3 - 80057d6: 68bb ldr r3, [r7, #8] - 80057d8: 4013 ands r3, r2 - 80057da: b29b uxth r3, r3 - 80057dc: 2b00 cmp r3, #0 - 80057de: bf0c ite eq - 80057e0: 2301 moveq r3, #1 - 80057e2: 2300 movne r3, #0 - 80057e4: b2db uxtb r3, r3 - 80057e6: 461a mov r2, r3 - 80057e8: 79fb ldrb r3, [r7, #7] - 80057ea: 429a cmp r2, r3 - 80057ec: d093 beq.n 8005716 + 80048a4: 68bb ldr r3, [r7, #8] + 80048a6: 0c1b lsrs r3, r3, #16 + 80048a8: b2db uxtb r3, r3 + 80048aa: 2b01 cmp r3, #1 + 80048ac: d10d bne.n 80048ca + 80048ae: 68fb ldr r3, [r7, #12] + 80048b0: 681b ldr r3, [r3, #0] + 80048b2: 695b ldr r3, [r3, #20] + 80048b4: 43da mvns r2, r3 + 80048b6: 68bb ldr r3, [r7, #8] + 80048b8: 4013 ands r3, r2 + 80048ba: b29b uxth r3, r3 + 80048bc: 2b00 cmp r3, #0 + 80048be: bf0c ite eq + 80048c0: 2301 moveq r3, #1 + 80048c2: 2300 movne r3, #0 + 80048c4: b2db uxtb r3, r3 + 80048c6: 461a mov r2, r3 + 80048c8: e00c b.n 80048e4 + 80048ca: 68fb ldr r3, [r7, #12] + 80048cc: 681b ldr r3, [r3, #0] + 80048ce: 699b ldr r3, [r3, #24] + 80048d0: 43da mvns r2, r3 + 80048d2: 68bb ldr r3, [r7, #8] + 80048d4: 4013 ands r3, r2 + 80048d6: b29b uxth r3, r3 + 80048d8: 2b00 cmp r3, #0 + 80048da: bf0c ite eq + 80048dc: 2301 moveq r3, #1 + 80048de: 2300 movne r3, #0 + 80048e0: b2db uxtb r3, r3 + 80048e2: 461a mov r2, r3 + 80048e4: 79fb ldrb r3, [r7, #7] + 80048e6: 429a cmp r2, r3 + 80048e8: d093 beq.n 8004812 } } } } return HAL_OK; - 80057ee: 2300 movs r3, #0 + 80048ea: 2300 movs r3, #0 } - 80057f0: 4618 mov r0, r3 - 80057f2: 3710 adds r7, #16 - 80057f4: 46bd mov sp, r7 - 80057f6: bd80 pop {r7, pc} + 80048ec: 4618 mov r0, r3 + 80048ee: 3710 adds r7, #16 + 80048f0: 46bd mov sp, r7 + 80048f2: bd80 pop {r7, pc} -080057f8 : +080048f4 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart) { - 80057f8: b580 push {r7, lr} - 80057fa: b084 sub sp, #16 - 80057fc: af00 add r7, sp, #0 - 80057fe: 60f8 str r0, [r7, #12] - 8005800: 60b9 str r1, [r7, #8] - 8005802: 607a str r2, [r7, #4] - 8005804: 603b str r3, [r7, #0] + 80048f4: b580 push {r7, lr} + 80048f6: b084 sub sp, #16 + 80048f8: af00 add r7, sp, #0 + 80048fa: 60f8 str r0, [r7, #12] + 80048fc: 60b9 str r1, [r7, #8] + 80048fe: 607a str r2, [r7, #4] + 8004900: 603b str r3, [r7, #0] while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) - 8005806: e071 b.n 80058ec + 8004902: e071 b.n 80049e8 { if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 8005808: 68fb ldr r3, [r7, #12] - 800580a: 681b ldr r3, [r3, #0] - 800580c: 695b ldr r3, [r3, #20] - 800580e: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8005812: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 8005816: d123 bne.n 8005860 + 8004904: 68fb ldr r3, [r7, #12] + 8004906: 681b ldr r3, [r3, #0] + 8004908: 695b ldr r3, [r3, #20] + 800490a: f403 6380 and.w r3, r3, #1024 @ 0x400 + 800490e: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 8004912: d123 bne.n 800495c { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8005818: 68fb ldr r3, [r7, #12] - 800581a: 681b ldr r3, [r3, #0] - 800581c: 681a ldr r2, [r3, #0] - 800581e: 68fb ldr r3, [r7, #12] - 8005820: 681b ldr r3, [r3, #0] - 8005822: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8005826: 601a str r2, [r3, #0] + 8004914: 68fb ldr r3, [r7, #12] + 8004916: 681b ldr r3, [r3, #0] + 8004918: 681a ldr r2, [r3, #0] + 800491a: 68fb ldr r3, [r7, #12] + 800491c: 681b ldr r3, [r3, #0] + 800491e: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8004922: 601a str r2, [r3, #0] /* Clear AF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8005828: 68fb ldr r3, [r7, #12] - 800582a: 681b ldr r3, [r3, #0] - 800582c: f46f 6280 mvn.w r2, #1024 @ 0x400 - 8005830: 615a str r2, [r3, #20] + 8004924: 68fb ldr r3, [r7, #12] + 8004926: 681b ldr r3, [r3, #0] + 8004928: f46f 6280 mvn.w r2, #1024 @ 0x400 + 800492c: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 8005832: 68fb ldr r3, [r7, #12] - 8005834: 2200 movs r2, #0 - 8005836: 631a str r2, [r3, #48] @ 0x30 + 800492e: 68fb ldr r3, [r7, #12] + 8004930: 2200 movs r2, #0 + 8004932: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8005838: 68fb ldr r3, [r7, #12] - 800583a: 2220 movs r2, #32 - 800583c: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004934: 68fb ldr r3, [r7, #12] + 8004936: 2220 movs r2, #32 + 8004938: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8005840: 68fb ldr r3, [r7, #12] - 8005842: 2200 movs r2, #0 - 8005844: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800493c: 68fb ldr r3, [r7, #12] + 800493e: 2200 movs r2, #0 + 8004940: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8005848: 68fb ldr r3, [r7, #12] - 800584a: 6c1b ldr r3, [r3, #64] @ 0x40 - 800584c: f043 0204 orr.w r2, r3, #4 - 8005850: 68fb ldr r3, [r7, #12] - 8005852: 641a str r2, [r3, #64] @ 0x40 + 8004944: 68fb ldr r3, [r7, #12] + 8004946: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004948: f043 0204 orr.w r2, r3, #4 + 800494c: 68fb ldr r3, [r7, #12] + 800494e: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8005854: 68fb ldr r3, [r7, #12] - 8005856: 2200 movs r2, #0 - 8005858: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004950: 68fb ldr r3, [r7, #12] + 8004952: 2200 movs r2, #0 + 8004954: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 800585c: 2301 movs r3, #1 - 800585e: e067 b.n 8005930 + 8004958: 2301 movs r3, #1 + 800495a: e067 b.n 8004a2c } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8005860: 687b ldr r3, [r7, #4] - 8005862: f1b3 3fff cmp.w r3, #4294967295 - 8005866: d041 beq.n 80058ec + 800495c: 687b ldr r3, [r7, #4] + 800495e: f1b3 3fff cmp.w r3, #4294967295 + 8004962: d041 beq.n 80049e8 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8005868: f7fd fd34 bl 80032d4 - 800586c: 4602 mov r2, r0 - 800586e: 683b ldr r3, [r7, #0] - 8005870: 1ad3 subs r3, r2, r3 - 8005872: 687a ldr r2, [r7, #4] - 8005874: 429a cmp r2, r3 - 8005876: d302 bcc.n 800587e - 8005878: 687b ldr r3, [r7, #4] - 800587a: 2b00 cmp r3, #0 - 800587c: d136 bne.n 80058ec + 8004964: f7fe f982 bl 8002c6c + 8004968: 4602 mov r2, r0 + 800496a: 683b ldr r3, [r7, #0] + 800496c: 1ad3 subs r3, r2, r3 + 800496e: 687a ldr r2, [r7, #4] + 8004970: 429a cmp r2, r3 + 8004972: d302 bcc.n 800497a + 8004974: 687b ldr r3, [r7, #4] + 8004976: 2b00 cmp r3, #0 + 8004978: d136 bne.n 80049e8 { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)) - 800587e: 68bb ldr r3, [r7, #8] - 8005880: 0c1b lsrs r3, r3, #16 - 8005882: b2db uxtb r3, r3 - 8005884: 2b01 cmp r3, #1 - 8005886: d10c bne.n 80058a2 - 8005888: 68fb ldr r3, [r7, #12] - 800588a: 681b ldr r3, [r3, #0] - 800588c: 695b ldr r3, [r3, #20] - 800588e: 43da mvns r2, r3 - 8005890: 68bb ldr r3, [r7, #8] - 8005892: 4013 ands r3, r2 - 8005894: b29b uxth r3, r3 - 8005896: 2b00 cmp r3, #0 - 8005898: bf14 ite ne - 800589a: 2301 movne r3, #1 - 800589c: 2300 moveq r3, #0 - 800589e: b2db uxtb r3, r3 - 80058a0: e00b b.n 80058ba - 80058a2: 68fb ldr r3, [r7, #12] - 80058a4: 681b ldr r3, [r3, #0] - 80058a6: 699b ldr r3, [r3, #24] - 80058a8: 43da mvns r2, r3 - 80058aa: 68bb ldr r3, [r7, #8] - 80058ac: 4013 ands r3, r2 - 80058ae: b29b uxth r3, r3 - 80058b0: 2b00 cmp r3, #0 - 80058b2: bf14 ite ne - 80058b4: 2301 movne r3, #1 - 80058b6: 2300 moveq r3, #0 - 80058b8: b2db uxtb r3, r3 - 80058ba: 2b00 cmp r3, #0 - 80058bc: d016 beq.n 80058ec + 800497a: 68bb ldr r3, [r7, #8] + 800497c: 0c1b lsrs r3, r3, #16 + 800497e: b2db uxtb r3, r3 + 8004980: 2b01 cmp r3, #1 + 8004982: d10c bne.n 800499e + 8004984: 68fb ldr r3, [r7, #12] + 8004986: 681b ldr r3, [r3, #0] + 8004988: 695b ldr r3, [r3, #20] + 800498a: 43da mvns r2, r3 + 800498c: 68bb ldr r3, [r7, #8] + 800498e: 4013 ands r3, r2 + 8004990: b29b uxth r3, r3 + 8004992: 2b00 cmp r3, #0 + 8004994: bf14 ite ne + 8004996: 2301 movne r3, #1 + 8004998: 2300 moveq r3, #0 + 800499a: b2db uxtb r3, r3 + 800499c: e00b b.n 80049b6 + 800499e: 68fb ldr r3, [r7, #12] + 80049a0: 681b ldr r3, [r3, #0] + 80049a2: 699b ldr r3, [r3, #24] + 80049a4: 43da mvns r2, r3 + 80049a6: 68bb ldr r3, [r7, #8] + 80049a8: 4013 ands r3, r2 + 80049aa: b29b uxth r3, r3 + 80049ac: 2b00 cmp r3, #0 + 80049ae: bf14 ite ne + 80049b0: 2301 movne r3, #1 + 80049b2: 2300 moveq r3, #0 + 80049b4: b2db uxtb r3, r3 + 80049b6: 2b00 cmp r3, #0 + 80049b8: d016 beq.n 80049e8 { hi2c->PreviousState = I2C_STATE_NONE; - 80058be: 68fb ldr r3, [r7, #12] - 80058c0: 2200 movs r2, #0 - 80058c2: 631a str r2, [r3, #48] @ 0x30 + 80049ba: 68fb ldr r3, [r7, #12] + 80049bc: 2200 movs r2, #0 + 80049be: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 80058c4: 68fb ldr r3, [r7, #12] - 80058c6: 2220 movs r2, #32 - 80058c8: f883 203d strb.w r2, [r3, #61] @ 0x3d + 80049c0: 68fb ldr r3, [r7, #12] + 80049c2: 2220 movs r2, #32 + 80049c4: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80058cc: 68fb ldr r3, [r7, #12] - 80058ce: 2200 movs r2, #0 - 80058d0: f883 203e strb.w r2, [r3, #62] @ 0x3e + 80049c8: 68fb ldr r3, [r7, #12] + 80049ca: 2200 movs r2, #0 + 80049cc: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 80058d4: 68fb ldr r3, [r7, #12] - 80058d6: 6c1b ldr r3, [r3, #64] @ 0x40 - 80058d8: f043 0220 orr.w r2, r3, #32 - 80058dc: 68fb ldr r3, [r7, #12] - 80058de: 641a str r2, [r3, #64] @ 0x40 + 80049d0: 68fb ldr r3, [r7, #12] + 80049d2: 6c1b ldr r3, [r3, #64] @ 0x40 + 80049d4: f043 0220 orr.w r2, r3, #32 + 80049d8: 68fb ldr r3, [r7, #12] + 80049da: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80058e0: 68fb ldr r3, [r7, #12] - 80058e2: 2200 movs r2, #0 - 80058e4: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80049dc: 68fb ldr r3, [r7, #12] + 80049de: 2200 movs r2, #0 + 80049e0: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 80058e8: 2301 movs r3, #1 - 80058ea: e021 b.n 8005930 + 80049e4: 2301 movs r3, #1 + 80049e6: e021 b.n 8004a2c while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) - 80058ec: 68bb ldr r3, [r7, #8] - 80058ee: 0c1b lsrs r3, r3, #16 - 80058f0: b2db uxtb r3, r3 - 80058f2: 2b01 cmp r3, #1 - 80058f4: d10c bne.n 8005910 - 80058f6: 68fb ldr r3, [r7, #12] - 80058f8: 681b ldr r3, [r3, #0] - 80058fa: 695b ldr r3, [r3, #20] - 80058fc: 43da mvns r2, r3 - 80058fe: 68bb ldr r3, [r7, #8] - 8005900: 4013 ands r3, r2 - 8005902: b29b uxth r3, r3 - 8005904: 2b00 cmp r3, #0 - 8005906: bf14 ite ne - 8005908: 2301 movne r3, #1 - 800590a: 2300 moveq r3, #0 - 800590c: b2db uxtb r3, r3 - 800590e: e00b b.n 8005928 - 8005910: 68fb ldr r3, [r7, #12] - 8005912: 681b ldr r3, [r3, #0] - 8005914: 699b ldr r3, [r3, #24] - 8005916: 43da mvns r2, r3 - 8005918: 68bb ldr r3, [r7, #8] - 800591a: 4013 ands r3, r2 - 800591c: b29b uxth r3, r3 - 800591e: 2b00 cmp r3, #0 - 8005920: bf14 ite ne - 8005922: 2301 movne r3, #1 - 8005924: 2300 moveq r3, #0 - 8005926: b2db uxtb r3, r3 - 8005928: 2b00 cmp r3, #0 - 800592a: f47f af6d bne.w 8005808 + 80049e8: 68bb ldr r3, [r7, #8] + 80049ea: 0c1b lsrs r3, r3, #16 + 80049ec: b2db uxtb r3, r3 + 80049ee: 2b01 cmp r3, #1 + 80049f0: d10c bne.n 8004a0c + 80049f2: 68fb ldr r3, [r7, #12] + 80049f4: 681b ldr r3, [r3, #0] + 80049f6: 695b ldr r3, [r3, #20] + 80049f8: 43da mvns r2, r3 + 80049fa: 68bb ldr r3, [r7, #8] + 80049fc: 4013 ands r3, r2 + 80049fe: b29b uxth r3, r3 + 8004a00: 2b00 cmp r3, #0 + 8004a02: bf14 ite ne + 8004a04: 2301 movne r3, #1 + 8004a06: 2300 moveq r3, #0 + 8004a08: b2db uxtb r3, r3 + 8004a0a: e00b b.n 8004a24 + 8004a0c: 68fb ldr r3, [r7, #12] + 8004a0e: 681b ldr r3, [r3, #0] + 8004a10: 699b ldr r3, [r3, #24] + 8004a12: 43da mvns r2, r3 + 8004a14: 68bb ldr r3, [r7, #8] + 8004a16: 4013 ands r3, r2 + 8004a18: b29b uxth r3, r3 + 8004a1a: 2b00 cmp r3, #0 + 8004a1c: bf14 ite ne + 8004a1e: 2301 movne r3, #1 + 8004a20: 2300 moveq r3, #0 + 8004a22: b2db uxtb r3, r3 + 8004a24: 2b00 cmp r3, #0 + 8004a26: f47f af6d bne.w 8004904 } } } } return HAL_OK; - 800592e: 2300 movs r3, #0 + 8004a2a: 2300 movs r3, #0 } - 8005930: 4618 mov r0, r3 - 8005932: 3710 adds r7, #16 - 8005934: 46bd mov sp, r7 - 8005936: bd80 pop {r7, pc} + 8004a2c: 4618 mov r0, r3 + 8004a2e: 3710 adds r7, #16 + 8004a30: 46bd mov sp, r7 + 8004a32: bd80 pop {r7, pc} -08005938 : +08004a34 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 8005938: b580 push {r7, lr} - 800593a: b084 sub sp, #16 - 800593c: af00 add r7, sp, #0 - 800593e: 60f8 str r0, [r7, #12] - 8005940: 60b9 str r1, [r7, #8] - 8005942: 607a str r2, [r7, #4] + 8004a34: b580 push {r7, lr} + 8004a36: b084 sub sp, #16 + 8004a38: af00 add r7, sp, #0 + 8004a3a: 60f8 str r0, [r7, #12] + 8004a3c: 60b9 str r1, [r7, #8] + 8004a3e: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 8005944: e034 b.n 80059b0 + 8004a40: e034 b.n 8004aac { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) - 8005946: 68f8 ldr r0, [r7, #12] - 8005948: f000 f8e3 bl 8005b12 - 800594c: 4603 mov r3, r0 - 800594e: 2b00 cmp r3, #0 - 8005950: d001 beq.n 8005956 + 8004a42: 68f8 ldr r0, [r7, #12] + 8004a44: f000 f8e3 bl 8004c0e + 8004a48: 4603 mov r3, r0 + 8004a4a: 2b00 cmp r3, #0 + 8004a4c: d001 beq.n 8004a52 { return HAL_ERROR; - 8005952: 2301 movs r3, #1 - 8005954: e034 b.n 80059c0 + 8004a4e: 2301 movs r3, #1 + 8004a50: e034 b.n 8004abc } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8005956: 68bb ldr r3, [r7, #8] - 8005958: f1b3 3fff cmp.w r3, #4294967295 - 800595c: d028 beq.n 80059b0 + 8004a52: 68bb ldr r3, [r7, #8] + 8004a54: f1b3 3fff cmp.w r3, #4294967295 + 8004a58: d028 beq.n 8004aac { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 800595e: f7fd fcb9 bl 80032d4 - 8005962: 4602 mov r2, r0 - 8005964: 687b ldr r3, [r7, #4] - 8005966: 1ad3 subs r3, r2, r3 - 8005968: 68ba ldr r2, [r7, #8] - 800596a: 429a cmp r2, r3 - 800596c: d302 bcc.n 8005974 - 800596e: 68bb ldr r3, [r7, #8] - 8005970: 2b00 cmp r3, #0 - 8005972: d11d bne.n 80059b0 + 8004a5a: f7fe f907 bl 8002c6c + 8004a5e: 4602 mov r2, r0 + 8004a60: 687b ldr r3, [r7, #4] + 8004a62: 1ad3 subs r3, r2, r3 + 8004a64: 68ba ldr r2, [r7, #8] + 8004a66: 429a cmp r2, r3 + 8004a68: d302 bcc.n 8004a70 + 8004a6a: 68bb ldr r3, [r7, #8] + 8004a6c: 2b00 cmp r3, #0 + 8004a6e: d11d bne.n 8004aac { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)) - 8005974: 68fb ldr r3, [r7, #12] - 8005976: 681b ldr r3, [r3, #0] - 8005978: 695b ldr r3, [r3, #20] - 800597a: f003 0380 and.w r3, r3, #128 @ 0x80 - 800597e: 2b80 cmp r3, #128 @ 0x80 - 8005980: d016 beq.n 80059b0 + 8004a70: 68fb ldr r3, [r7, #12] + 8004a72: 681b ldr r3, [r3, #0] + 8004a74: 695b ldr r3, [r3, #20] + 8004a76: f003 0380 and.w r3, r3, #128 @ 0x80 + 8004a7a: 2b80 cmp r3, #128 @ 0x80 + 8004a7c: d016 beq.n 8004aac { hi2c->PreviousState = I2C_STATE_NONE; - 8005982: 68fb ldr r3, [r7, #12] - 8005984: 2200 movs r2, #0 - 8005986: 631a str r2, [r3, #48] @ 0x30 + 8004a7e: 68fb ldr r3, [r7, #12] + 8004a80: 2200 movs r2, #0 + 8004a82: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8005988: 68fb ldr r3, [r7, #12] - 800598a: 2220 movs r2, #32 - 800598c: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004a84: 68fb ldr r3, [r7, #12] + 8004a86: 2220 movs r2, #32 + 8004a88: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8005990: 68fb ldr r3, [r7, #12] - 8005992: 2200 movs r2, #0 - 8005994: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004a8c: 68fb ldr r3, [r7, #12] + 8004a8e: 2200 movs r2, #0 + 8004a90: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8005998: 68fb ldr r3, [r7, #12] - 800599a: 6c1b ldr r3, [r3, #64] @ 0x40 - 800599c: f043 0220 orr.w r2, r3, #32 - 80059a0: 68fb ldr r3, [r7, #12] - 80059a2: 641a str r2, [r3, #64] @ 0x40 + 8004a94: 68fb ldr r3, [r7, #12] + 8004a96: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004a98: f043 0220 orr.w r2, r3, #32 + 8004a9c: 68fb ldr r3, [r7, #12] + 8004a9e: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80059a4: 68fb ldr r3, [r7, #12] - 80059a6: 2200 movs r2, #0 - 80059a8: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004aa0: 68fb ldr r3, [r7, #12] + 8004aa2: 2200 movs r2, #0 + 8004aa4: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 80059ac: 2301 movs r3, #1 - 80059ae: e007 b.n 80059c0 + 8004aa8: 2301 movs r3, #1 + 8004aaa: e007 b.n 8004abc while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 80059b0: 68fb ldr r3, [r7, #12] - 80059b2: 681b ldr r3, [r3, #0] - 80059b4: 695b ldr r3, [r3, #20] - 80059b6: f003 0380 and.w r3, r3, #128 @ 0x80 - 80059ba: 2b80 cmp r3, #128 @ 0x80 - 80059bc: d1c3 bne.n 8005946 + 8004aac: 68fb ldr r3, [r7, #12] + 8004aae: 681b ldr r3, [r3, #0] + 8004ab0: 695b ldr r3, [r3, #20] + 8004ab2: f003 0380 and.w r3, r3, #128 @ 0x80 + 8004ab6: 2b80 cmp r3, #128 @ 0x80 + 8004ab8: d1c3 bne.n 8004a42 } } } } return HAL_OK; - 80059be: 2300 movs r3, #0 + 8004aba: 2300 movs r3, #0 } - 80059c0: 4618 mov r0, r3 - 80059c2: 3710 adds r7, #16 - 80059c4: 46bd mov sp, r7 - 80059c6: bd80 pop {r7, pc} + 8004abc: 4618 mov r0, r3 + 8004abe: 3710 adds r7, #16 + 8004ac0: 46bd mov sp, r7 + 8004ac2: bd80 pop {r7, pc} -080059c8 : +08004ac4 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 80059c8: b580 push {r7, lr} - 80059ca: b084 sub sp, #16 - 80059cc: af00 add r7, sp, #0 - 80059ce: 60f8 str r0, [r7, #12] - 80059d0: 60b9 str r1, [r7, #8] - 80059d2: 607a str r2, [r7, #4] + 8004ac4: b580 push {r7, lr} + 8004ac6: b084 sub sp, #16 + 8004ac8: af00 add r7, sp, #0 + 8004aca: 60f8 str r0, [r7, #12] + 8004acc: 60b9 str r1, [r7, #8] + 8004ace: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) - 80059d4: e034 b.n 8005a40 + 8004ad0: e034 b.n 8004b3c { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) - 80059d6: 68f8 ldr r0, [r7, #12] - 80059d8: f000 f89b bl 8005b12 - 80059dc: 4603 mov r3, r0 - 80059de: 2b00 cmp r3, #0 - 80059e0: d001 beq.n 80059e6 + 8004ad2: 68f8 ldr r0, [r7, #12] + 8004ad4: f000 f89b bl 8004c0e + 8004ad8: 4603 mov r3, r0 + 8004ada: 2b00 cmp r3, #0 + 8004adc: d001 beq.n 8004ae2 { return HAL_ERROR; - 80059e2: 2301 movs r3, #1 - 80059e4: e034 b.n 8005a50 + 8004ade: 2301 movs r3, #1 + 8004ae0: e034 b.n 8004b4c } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 80059e6: 68bb ldr r3, [r7, #8] - 80059e8: f1b3 3fff cmp.w r3, #4294967295 - 80059ec: d028 beq.n 8005a40 + 8004ae2: 68bb ldr r3, [r7, #8] + 8004ae4: f1b3 3fff cmp.w r3, #4294967295 + 8004ae8: d028 beq.n 8004b3c { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 80059ee: f7fd fc71 bl 80032d4 - 80059f2: 4602 mov r2, r0 - 80059f4: 687b ldr r3, [r7, #4] - 80059f6: 1ad3 subs r3, r2, r3 - 80059f8: 68ba ldr r2, [r7, #8] - 80059fa: 429a cmp r2, r3 - 80059fc: d302 bcc.n 8005a04 - 80059fe: 68bb ldr r3, [r7, #8] - 8005a00: 2b00 cmp r3, #0 - 8005a02: d11d bne.n 8005a40 + 8004aea: f7fe f8bf bl 8002c6c + 8004aee: 4602 mov r2, r0 + 8004af0: 687b ldr r3, [r7, #4] + 8004af2: 1ad3 subs r3, r2, r3 + 8004af4: 68ba ldr r2, [r7, #8] + 8004af6: 429a cmp r2, r3 + 8004af8: d302 bcc.n 8004b00 + 8004afa: 68bb ldr r3, [r7, #8] + 8004afc: 2b00 cmp r3, #0 + 8004afe: d11d bne.n 8004b3c { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)) - 8005a04: 68fb ldr r3, [r7, #12] - 8005a06: 681b ldr r3, [r3, #0] - 8005a08: 695b ldr r3, [r3, #20] - 8005a0a: f003 0304 and.w r3, r3, #4 - 8005a0e: 2b04 cmp r3, #4 - 8005a10: d016 beq.n 8005a40 + 8004b00: 68fb ldr r3, [r7, #12] + 8004b02: 681b ldr r3, [r3, #0] + 8004b04: 695b ldr r3, [r3, #20] + 8004b06: f003 0304 and.w r3, r3, #4 + 8004b0a: 2b04 cmp r3, #4 + 8004b0c: d016 beq.n 8004b3c { hi2c->PreviousState = I2C_STATE_NONE; - 8005a12: 68fb ldr r3, [r7, #12] - 8005a14: 2200 movs r2, #0 - 8005a16: 631a str r2, [r3, #48] @ 0x30 + 8004b0e: 68fb ldr r3, [r7, #12] + 8004b10: 2200 movs r2, #0 + 8004b12: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8005a18: 68fb ldr r3, [r7, #12] - 8005a1a: 2220 movs r2, #32 - 8005a1c: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004b14: 68fb ldr r3, [r7, #12] + 8004b16: 2220 movs r2, #32 + 8004b18: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8005a20: 68fb ldr r3, [r7, #12] - 8005a22: 2200 movs r2, #0 - 8005a24: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004b1c: 68fb ldr r3, [r7, #12] + 8004b1e: 2200 movs r2, #0 + 8004b20: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8005a28: 68fb ldr r3, [r7, #12] - 8005a2a: 6c1b ldr r3, [r3, #64] @ 0x40 - 8005a2c: f043 0220 orr.w r2, r3, #32 - 8005a30: 68fb ldr r3, [r7, #12] - 8005a32: 641a str r2, [r3, #64] @ 0x40 + 8004b24: 68fb ldr r3, [r7, #12] + 8004b26: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004b28: f043 0220 orr.w r2, r3, #32 + 8004b2c: 68fb ldr r3, [r7, #12] + 8004b2e: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8005a34: 68fb ldr r3, [r7, #12] - 8005a36: 2200 movs r2, #0 - 8005a38: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004b30: 68fb ldr r3, [r7, #12] + 8004b32: 2200 movs r2, #0 + 8004b34: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8005a3c: 2301 movs r3, #1 - 8005a3e: e007 b.n 8005a50 + 8004b38: 2301 movs r3, #1 + 8004b3a: e007 b.n 8004b4c while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) - 8005a40: 68fb ldr r3, [r7, #12] - 8005a42: 681b ldr r3, [r3, #0] - 8005a44: 695b ldr r3, [r3, #20] - 8005a46: f003 0304 and.w r3, r3, #4 - 8005a4a: 2b04 cmp r3, #4 - 8005a4c: d1c3 bne.n 80059d6 + 8004b3c: 68fb ldr r3, [r7, #12] + 8004b3e: 681b ldr r3, [r3, #0] + 8004b40: 695b ldr r3, [r3, #20] + 8004b42: f003 0304 and.w r3, r3, #4 + 8004b46: 2b04 cmp r3, #4 + 8004b48: d1c3 bne.n 8004ad2 } } } } return HAL_OK; - 8005a4e: 2300 movs r3, #0 + 8004b4a: 2300 movs r3, #0 } - 8005a50: 4618 mov r0, r3 - 8005a52: 3710 adds r7, #16 - 8005a54: 46bd mov sp, r7 - 8005a56: bd80 pop {r7, pc} + 8004b4c: 4618 mov r0, r3 + 8004b4e: 3710 adds r7, #16 + 8004b50: 46bd mov sp, r7 + 8004b52: bd80 pop {r7, pc} -08005a58 : +08004b54 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 8005a58: b580 push {r7, lr} - 8005a5a: b084 sub sp, #16 - 8005a5c: af00 add r7, sp, #0 - 8005a5e: 60f8 str r0, [r7, #12] - 8005a60: 60b9 str r1, [r7, #8] - 8005a62: 607a str r2, [r7, #4] + 8004b54: b580 push {r7, lr} + 8004b56: b084 sub sp, #16 + 8004b58: af00 add r7, sp, #0 + 8004b5a: 60f8 str r0, [r7, #12] + 8004b5c: 60b9 str r1, [r7, #8] + 8004b5e: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - 8005a64: e049 b.n 8005afa + 8004b60: e049 b.n 8004bf6 { /* Check if a STOPF is detected */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) - 8005a66: 68fb ldr r3, [r7, #12] - 8005a68: 681b ldr r3, [r3, #0] - 8005a6a: 695b ldr r3, [r3, #20] - 8005a6c: f003 0310 and.w r3, r3, #16 - 8005a70: 2b10 cmp r3, #16 - 8005a72: d119 bne.n 8005aa8 + 8004b62: 68fb ldr r3, [r7, #12] + 8004b64: 681b ldr r3, [r3, #0] + 8004b66: 695b ldr r3, [r3, #20] + 8004b68: f003 0310 and.w r3, r3, #16 + 8004b6c: 2b10 cmp r3, #16 + 8004b6e: d119 bne.n 8004ba4 { /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 8005a74: 68fb ldr r3, [r7, #12] - 8005a76: 681b ldr r3, [r3, #0] - 8005a78: f06f 0210 mvn.w r2, #16 - 8005a7c: 615a str r2, [r3, #20] + 8004b70: 68fb ldr r3, [r7, #12] + 8004b72: 681b ldr r3, [r3, #0] + 8004b74: f06f 0210 mvn.w r2, #16 + 8004b78: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 8005a7e: 68fb ldr r3, [r7, #12] - 8005a80: 2200 movs r2, #0 - 8005a82: 631a str r2, [r3, #48] @ 0x30 + 8004b7a: 68fb ldr r3, [r7, #12] + 8004b7c: 2200 movs r2, #0 + 8004b7e: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8005a84: 68fb ldr r3, [r7, #12] - 8005a86: 2220 movs r2, #32 - 8005a88: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004b80: 68fb ldr r3, [r7, #12] + 8004b82: 2220 movs r2, #32 + 8004b84: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8005a8c: 68fb ldr r3, [r7, #12] - 8005a8e: 2200 movs r2, #0 - 8005a90: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004b88: 68fb ldr r3, [r7, #12] + 8004b8a: 2200 movs r2, #0 + 8004b8c: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_NONE; - 8005a94: 68fb ldr r3, [r7, #12] - 8005a96: 6c1a ldr r2, [r3, #64] @ 0x40 - 8005a98: 68fb ldr r3, [r7, #12] - 8005a9a: 641a str r2, [r3, #64] @ 0x40 + 8004b90: 68fb ldr r3, [r7, #12] + 8004b92: 6c1a ldr r2, [r3, #64] @ 0x40 + 8004b94: 68fb ldr r3, [r7, #12] + 8004b96: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8005a9c: 68fb ldr r3, [r7, #12] - 8005a9e: 2200 movs r2, #0 - 8005aa0: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004b98: 68fb ldr r3, [r7, #12] + 8004b9a: 2200 movs r2, #0 + 8004b9c: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8005aa4: 2301 movs r3, #1 - 8005aa6: e030 b.n 8005b0a + 8004ba0: 2301 movs r3, #1 + 8004ba2: e030 b.n 8004c06 } /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8005aa8: f7fd fc14 bl 80032d4 - 8005aac: 4602 mov r2, r0 - 8005aae: 687b ldr r3, [r7, #4] - 8005ab0: 1ad3 subs r3, r2, r3 - 8005ab2: 68ba ldr r2, [r7, #8] - 8005ab4: 429a cmp r2, r3 - 8005ab6: d302 bcc.n 8005abe - 8005ab8: 68bb ldr r3, [r7, #8] - 8005aba: 2b00 cmp r3, #0 - 8005abc: d11d bne.n 8005afa + 8004ba4: f7fe f862 bl 8002c6c + 8004ba8: 4602 mov r2, r0 + 8004baa: 687b ldr r3, [r7, #4] + 8004bac: 1ad3 subs r3, r2, r3 + 8004bae: 68ba ldr r2, [r7, #8] + 8004bb0: 429a cmp r2, r3 + 8004bb2: d302 bcc.n 8004bba + 8004bb4: 68bb ldr r3, [r7, #8] + 8004bb6: 2b00 cmp r3, #0 + 8004bb8: d11d bne.n 8004bf6 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) - 8005abe: 68fb ldr r3, [r7, #12] - 8005ac0: 681b ldr r3, [r3, #0] - 8005ac2: 695b ldr r3, [r3, #20] - 8005ac4: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005ac8: 2b40 cmp r3, #64 @ 0x40 - 8005aca: d016 beq.n 8005afa + 8004bba: 68fb ldr r3, [r7, #12] + 8004bbc: 681b ldr r3, [r3, #0] + 8004bbe: 695b ldr r3, [r3, #20] + 8004bc0: f003 0340 and.w r3, r3, #64 @ 0x40 + 8004bc4: 2b40 cmp r3, #64 @ 0x40 + 8004bc6: d016 beq.n 8004bf6 { hi2c->PreviousState = I2C_STATE_NONE; - 8005acc: 68fb ldr r3, [r7, #12] - 8005ace: 2200 movs r2, #0 - 8005ad0: 631a str r2, [r3, #48] @ 0x30 + 8004bc8: 68fb ldr r3, [r7, #12] + 8004bca: 2200 movs r2, #0 + 8004bcc: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8005ad2: 68fb ldr r3, [r7, #12] - 8005ad4: 2220 movs r2, #32 - 8005ad6: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004bce: 68fb ldr r3, [r7, #12] + 8004bd0: 2220 movs r2, #32 + 8004bd2: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8005ada: 68fb ldr r3, [r7, #12] - 8005adc: 2200 movs r2, #0 - 8005ade: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004bd6: 68fb ldr r3, [r7, #12] + 8004bd8: 2200 movs r2, #0 + 8004bda: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8005ae2: 68fb ldr r3, [r7, #12] - 8005ae4: 6c1b ldr r3, [r3, #64] @ 0x40 - 8005ae6: f043 0220 orr.w r2, r3, #32 - 8005aea: 68fb ldr r3, [r7, #12] - 8005aec: 641a str r2, [r3, #64] @ 0x40 + 8004bde: 68fb ldr r3, [r7, #12] + 8004be0: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004be2: f043 0220 orr.w r2, r3, #32 + 8004be6: 68fb ldr r3, [r7, #12] + 8004be8: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8005aee: 68fb ldr r3, [r7, #12] - 8005af0: 2200 movs r2, #0 - 8005af2: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004bea: 68fb ldr r3, [r7, #12] + 8004bec: 2200 movs r2, #0 + 8004bee: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8005af6: 2301 movs r3, #1 - 8005af8: e007 b.n 8005b0a + 8004bf2: 2301 movs r3, #1 + 8004bf4: e007 b.n 8004c06 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - 8005afa: 68fb ldr r3, [r7, #12] - 8005afc: 681b ldr r3, [r3, #0] - 8005afe: 695b ldr r3, [r3, #20] - 8005b00: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005b04: 2b40 cmp r3, #64 @ 0x40 - 8005b06: d1ae bne.n 8005a66 + 8004bf6: 68fb ldr r3, [r7, #12] + 8004bf8: 681b ldr r3, [r3, #0] + 8004bfa: 695b ldr r3, [r3, #20] + 8004bfc: f003 0340 and.w r3, r3, #64 @ 0x40 + 8004c00: 2b40 cmp r3, #64 @ 0x40 + 8004c02: d1ae bne.n 8004b62 } } } return HAL_OK; - 8005b08: 2300 movs r3, #0 + 8004c04: 2300 movs r3, #0 } - 8005b0a: 4618 mov r0, r3 - 8005b0c: 3710 adds r7, #16 - 8005b0e: 46bd mov sp, r7 - 8005b10: bd80 pop {r7, pc} + 8004c06: 4618 mov r0, r3 + 8004c08: 3710 adds r7, #16 + 8004c0a: 46bd mov sp, r7 + 8004c0c: bd80 pop {r7, pc} -08005b12 : +08004c0e : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { - 8005b12: b480 push {r7} - 8005b14: b083 sub sp, #12 - 8005b16: af00 add r7, sp, #0 - 8005b18: 6078 str r0, [r7, #4] + 8004c0e: b480 push {r7} + 8004c10: b083 sub sp, #12 + 8004c12: af00 add r7, sp, #0 + 8004c14: 6078 str r0, [r7, #4] if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 8005b1a: 687b ldr r3, [r7, #4] - 8005b1c: 681b ldr r3, [r3, #0] - 8005b1e: 695b ldr r3, [r3, #20] - 8005b20: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8005b24: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 8005b28: d11b bne.n 8005b62 + 8004c16: 687b ldr r3, [r7, #4] + 8004c18: 681b ldr r3, [r3, #0] + 8004c1a: 695b ldr r3, [r3, #20] + 8004c1c: f403 6380 and.w r3, r3, #1024 @ 0x400 + 8004c20: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 8004c24: d11b bne.n 8004c5e { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8005b2a: 687b ldr r3, [r7, #4] - 8005b2c: 681b ldr r3, [r3, #0] - 8005b2e: f46f 6280 mvn.w r2, #1024 @ 0x400 - 8005b32: 615a str r2, [r3, #20] + 8004c26: 687b ldr r3, [r7, #4] + 8004c28: 681b ldr r3, [r3, #0] + 8004c2a: f46f 6280 mvn.w r2, #1024 @ 0x400 + 8004c2e: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 8005b34: 687b ldr r3, [r7, #4] - 8005b36: 2200 movs r2, #0 - 8005b38: 631a str r2, [r3, #48] @ 0x30 + 8004c30: 687b ldr r3, [r7, #4] + 8004c32: 2200 movs r2, #0 + 8004c34: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8005b3a: 687b ldr r3, [r7, #4] - 8005b3c: 2220 movs r2, #32 - 8005b3e: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004c36: 687b ldr r3, [r7, #4] + 8004c38: 2220 movs r2, #32 + 8004c3a: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8005b42: 687b ldr r3, [r7, #4] - 8005b44: 2200 movs r2, #0 - 8005b46: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004c3e: 687b ldr r3, [r7, #4] + 8004c40: 2200 movs r2, #0 + 8004c42: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8005b4a: 687b ldr r3, [r7, #4] - 8005b4c: 6c1b ldr r3, [r3, #64] @ 0x40 - 8005b4e: f043 0204 orr.w r2, r3, #4 - 8005b52: 687b ldr r3, [r7, #4] - 8005b54: 641a str r2, [r3, #64] @ 0x40 + 8004c46: 687b ldr r3, [r7, #4] + 8004c48: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004c4a: f043 0204 orr.w r2, r3, #4 + 8004c4e: 687b ldr r3, [r7, #4] + 8004c50: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8005b56: 687b ldr r3, [r7, #4] - 8005b58: 2200 movs r2, #0 - 8005b5a: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004c52: 687b ldr r3, [r7, #4] + 8004c54: 2200 movs r2, #0 + 8004c56: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8005b5e: 2301 movs r3, #1 - 8005b60: e000 b.n 8005b64 + 8004c5a: 2301 movs r3, #1 + 8004c5c: e000 b.n 8004c60 } return HAL_OK; - 8005b62: 2300 movs r3, #0 + 8004c5e: 2300 movs r3, #0 } - 8005b64: 4618 mov r0, r3 - 8005b66: 370c adds r7, #12 - 8005b68: 46bd mov sp, r7 - 8005b6a: bc80 pop {r7} - 8005b6c: 4770 bx lr + 8004c60: 4618 mov r0, r3 + 8004c62: 370c adds r7, #12 + 8004c64: 46bd mov sp, r7 + 8004c66: bc80 pop {r7} + 8004c68: 4770 bx lr ... -08005b70 : +08004c6c : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8005b70: b580 push {r7, lr} - 8005b72: b086 sub sp, #24 - 8005b74: af00 add r7, sp, #0 - 8005b76: 6078 str r0, [r7, #4] + 8004c6c: b580 push {r7, lr} + 8004c6e: b086 sub sp, #24 + 8004c70: af00 add r7, sp, #0 + 8004c72: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) - 8005b78: 687b ldr r3, [r7, #4] - 8005b7a: 2b00 cmp r3, #0 - 8005b7c: d101 bne.n 8005b82 + 8004c74: 687b ldr r3, [r7, #4] + 8004c76: 2b00 cmp r3, #0 + 8004c78: d101 bne.n 8004c7e { return HAL_ERROR; - 8005b7e: 2301 movs r3, #1 - 8005b80: e272 b.n 8006068 + 8004c7a: 2301 movs r3, #1 + 8004c7c: e272 b.n 8005164 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8005b82: 687b ldr r3, [r7, #4] - 8005b84: 681b ldr r3, [r3, #0] - 8005b86: f003 0301 and.w r3, r3, #1 - 8005b8a: 2b00 cmp r3, #0 - 8005b8c: f000 8087 beq.w 8005c9e + 8004c7e: 687b ldr r3, [r7, #4] + 8004c80: 681b ldr r3, [r3, #0] + 8004c82: f003 0301 and.w r3, r3, #1 + 8004c86: 2b00 cmp r3, #0 + 8004c88: f000 8087 beq.w 8004d9a { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 8005b90: 4b92 ldr r3, [pc, #584] @ (8005ddc ) - 8005b92: 685b ldr r3, [r3, #4] - 8005b94: f003 030c and.w r3, r3, #12 - 8005b98: 2b04 cmp r3, #4 - 8005b9a: d00c beq.n 8005bb6 + 8004c8c: 4b92 ldr r3, [pc, #584] @ (8004ed8 ) + 8004c8e: 685b ldr r3, [r3, #4] + 8004c90: f003 030c and.w r3, r3, #12 + 8004c94: 2b04 cmp r3, #4 + 8004c96: d00c beq.n 8004cb2 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - 8005b9c: 4b8f ldr r3, [pc, #572] @ (8005ddc ) - 8005b9e: 685b ldr r3, [r3, #4] - 8005ba0: f003 030c and.w r3, r3, #12 - 8005ba4: 2b08 cmp r3, #8 - 8005ba6: d112 bne.n 8005bce - 8005ba8: 4b8c ldr r3, [pc, #560] @ (8005ddc ) - 8005baa: 685b ldr r3, [r3, #4] - 8005bac: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8005bb0: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8005bb4: d10b bne.n 8005bce + 8004c98: 4b8f ldr r3, [pc, #572] @ (8004ed8 ) + 8004c9a: 685b ldr r3, [r3, #4] + 8004c9c: f003 030c and.w r3, r3, #12 + 8004ca0: 2b08 cmp r3, #8 + 8004ca2: d112 bne.n 8004cca + 8004ca4: 4b8c ldr r3, [pc, #560] @ (8004ed8 ) + 8004ca6: 685b ldr r3, [r3, #4] + 8004ca8: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8004cac: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8004cb0: d10b bne.n 8004cca { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8005bb6: 4b89 ldr r3, [pc, #548] @ (8005ddc ) - 8005bb8: 681b ldr r3, [r3, #0] - 8005bba: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8005bbe: 2b00 cmp r3, #0 - 8005bc0: d06c beq.n 8005c9c - 8005bc2: 687b ldr r3, [r7, #4] - 8005bc4: 685b ldr r3, [r3, #4] - 8005bc6: 2b00 cmp r3, #0 - 8005bc8: d168 bne.n 8005c9c + 8004cb2: 4b89 ldr r3, [pc, #548] @ (8004ed8 ) + 8004cb4: 681b ldr r3, [r3, #0] + 8004cb6: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004cba: 2b00 cmp r3, #0 + 8004cbc: d06c beq.n 8004d98 + 8004cbe: 687b ldr r3, [r7, #4] + 8004cc0: 685b ldr r3, [r3, #4] + 8004cc2: 2b00 cmp r3, #0 + 8004cc4: d168 bne.n 8004d98 { return HAL_ERROR; - 8005bca: 2301 movs r3, #1 - 8005bcc: e24c b.n 8006068 + 8004cc6: 2301 movs r3, #1 + 8004cc8: e24c b.n 8005164 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8005bce: 687b ldr r3, [r7, #4] - 8005bd0: 685b ldr r3, [r3, #4] - 8005bd2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8005bd6: d106 bne.n 8005be6 - 8005bd8: 4b80 ldr r3, [pc, #512] @ (8005ddc ) - 8005bda: 681b ldr r3, [r3, #0] - 8005bdc: 4a7f ldr r2, [pc, #508] @ (8005ddc ) - 8005bde: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 8005be2: 6013 str r3, [r2, #0] - 8005be4: e02e b.n 8005c44 - 8005be6: 687b ldr r3, [r7, #4] - 8005be8: 685b ldr r3, [r3, #4] - 8005bea: 2b00 cmp r3, #0 - 8005bec: d10c bne.n 8005c08 - 8005bee: 4b7b ldr r3, [pc, #492] @ (8005ddc ) - 8005bf0: 681b ldr r3, [r3, #0] - 8005bf2: 4a7a ldr r2, [pc, #488] @ (8005ddc ) - 8005bf4: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 8005bf8: 6013 str r3, [r2, #0] - 8005bfa: 4b78 ldr r3, [pc, #480] @ (8005ddc ) - 8005bfc: 681b ldr r3, [r3, #0] - 8005bfe: 4a77 ldr r2, [pc, #476] @ (8005ddc ) - 8005c00: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 8005c04: 6013 str r3, [r2, #0] - 8005c06: e01d b.n 8005c44 - 8005c08: 687b ldr r3, [r7, #4] - 8005c0a: 685b ldr r3, [r3, #4] - 8005c0c: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 - 8005c10: d10c bne.n 8005c2c - 8005c12: 4b72 ldr r3, [pc, #456] @ (8005ddc ) - 8005c14: 681b ldr r3, [r3, #0] - 8005c16: 4a71 ldr r2, [pc, #452] @ (8005ddc ) - 8005c18: f443 2380 orr.w r3, r3, #262144 @ 0x40000 - 8005c1c: 6013 str r3, [r2, #0] - 8005c1e: 4b6f ldr r3, [pc, #444] @ (8005ddc ) - 8005c20: 681b ldr r3, [r3, #0] - 8005c22: 4a6e ldr r2, [pc, #440] @ (8005ddc ) - 8005c24: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 8005c28: 6013 str r3, [r2, #0] - 8005c2a: e00b b.n 8005c44 - 8005c2c: 4b6b ldr r3, [pc, #428] @ (8005ddc ) - 8005c2e: 681b ldr r3, [r3, #0] - 8005c30: 4a6a ldr r2, [pc, #424] @ (8005ddc ) - 8005c32: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 8005c36: 6013 str r3, [r2, #0] - 8005c38: 4b68 ldr r3, [pc, #416] @ (8005ddc ) - 8005c3a: 681b ldr r3, [r3, #0] - 8005c3c: 4a67 ldr r2, [pc, #412] @ (8005ddc ) - 8005c3e: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 8005c42: 6013 str r3, [r2, #0] + 8004cca: 687b ldr r3, [r7, #4] + 8004ccc: 685b ldr r3, [r3, #4] + 8004cce: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8004cd2: d106 bne.n 8004ce2 + 8004cd4: 4b80 ldr r3, [pc, #512] @ (8004ed8 ) + 8004cd6: 681b ldr r3, [r3, #0] + 8004cd8: 4a7f ldr r2, [pc, #508] @ (8004ed8 ) + 8004cda: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8004cde: 6013 str r3, [r2, #0] + 8004ce0: e02e b.n 8004d40 + 8004ce2: 687b ldr r3, [r7, #4] + 8004ce4: 685b ldr r3, [r3, #4] + 8004ce6: 2b00 cmp r3, #0 + 8004ce8: d10c bne.n 8004d04 + 8004cea: 4b7b ldr r3, [pc, #492] @ (8004ed8 ) + 8004cec: 681b ldr r3, [r3, #0] + 8004cee: 4a7a ldr r2, [pc, #488] @ (8004ed8 ) + 8004cf0: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 8004cf4: 6013 str r3, [r2, #0] + 8004cf6: 4b78 ldr r3, [pc, #480] @ (8004ed8 ) + 8004cf8: 681b ldr r3, [r3, #0] + 8004cfa: 4a77 ldr r2, [pc, #476] @ (8004ed8 ) + 8004cfc: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 8004d00: 6013 str r3, [r2, #0] + 8004d02: e01d b.n 8004d40 + 8004d04: 687b ldr r3, [r7, #4] + 8004d06: 685b ldr r3, [r3, #4] + 8004d08: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 + 8004d0c: d10c bne.n 8004d28 + 8004d0e: 4b72 ldr r3, [pc, #456] @ (8004ed8 ) + 8004d10: 681b ldr r3, [r3, #0] + 8004d12: 4a71 ldr r2, [pc, #452] @ (8004ed8 ) + 8004d14: f443 2380 orr.w r3, r3, #262144 @ 0x40000 + 8004d18: 6013 str r3, [r2, #0] + 8004d1a: 4b6f ldr r3, [pc, #444] @ (8004ed8 ) + 8004d1c: 681b ldr r3, [r3, #0] + 8004d1e: 4a6e ldr r2, [pc, #440] @ (8004ed8 ) + 8004d20: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8004d24: 6013 str r3, [r2, #0] + 8004d26: e00b b.n 8004d40 + 8004d28: 4b6b ldr r3, [pc, #428] @ (8004ed8 ) + 8004d2a: 681b ldr r3, [r3, #0] + 8004d2c: 4a6a ldr r2, [pc, #424] @ (8004ed8 ) + 8004d2e: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 8004d32: 6013 str r3, [r2, #0] + 8004d34: 4b68 ldr r3, [pc, #416] @ (8004ed8 ) + 8004d36: 681b ldr r3, [r3, #0] + 8004d38: 4a67 ldr r2, [pc, #412] @ (8004ed8 ) + 8004d3a: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 8004d3e: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 8005c44: 687b ldr r3, [r7, #4] - 8005c46: 685b ldr r3, [r3, #4] - 8005c48: 2b00 cmp r3, #0 - 8005c4a: d013 beq.n 8005c74 + 8004d40: 687b ldr r3, [r7, #4] + 8004d42: 685b ldr r3, [r3, #4] + 8004d44: 2b00 cmp r3, #0 + 8004d46: d013 beq.n 8004d70 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005c4c: f7fd fb42 bl 80032d4 - 8005c50: 6138 str r0, [r7, #16] + 8004d48: f7fd ff90 bl 8002c6c + 8004d4c: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8005c52: e008 b.n 8005c66 + 8004d4e: e008 b.n 8004d62 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 8005c54: f7fd fb3e bl 80032d4 - 8005c58: 4602 mov r2, r0 - 8005c5a: 693b ldr r3, [r7, #16] - 8005c5c: 1ad3 subs r3, r2, r3 - 8005c5e: 2b64 cmp r3, #100 @ 0x64 - 8005c60: d901 bls.n 8005c66 + 8004d50: f7fd ff8c bl 8002c6c + 8004d54: 4602 mov r2, r0 + 8004d56: 693b ldr r3, [r7, #16] + 8004d58: 1ad3 subs r3, r2, r3 + 8004d5a: 2b64 cmp r3, #100 @ 0x64 + 8004d5c: d901 bls.n 8004d62 { return HAL_TIMEOUT; - 8005c62: 2303 movs r3, #3 - 8005c64: e200 b.n 8006068 + 8004d5e: 2303 movs r3, #3 + 8004d60: e200 b.n 8005164 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8005c66: 4b5d ldr r3, [pc, #372] @ (8005ddc ) - 8005c68: 681b ldr r3, [r3, #0] - 8005c6a: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8005c6e: 2b00 cmp r3, #0 - 8005c70: d0f0 beq.n 8005c54 - 8005c72: e014 b.n 8005c9e + 8004d62: 4b5d ldr r3, [pc, #372] @ (8004ed8 ) + 8004d64: 681b ldr r3, [r3, #0] + 8004d66: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004d6a: 2b00 cmp r3, #0 + 8004d6c: d0f0 beq.n 8004d50 + 8004d6e: e014 b.n 8004d9a } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005c74: f7fd fb2e bl 80032d4 - 8005c78: 6138 str r0, [r7, #16] + 8004d70: f7fd ff7c bl 8002c6c + 8004d74: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8005c7a: e008 b.n 8005c8e + 8004d76: e008 b.n 8004d8a { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 8005c7c: f7fd fb2a bl 80032d4 - 8005c80: 4602 mov r2, r0 - 8005c82: 693b ldr r3, [r7, #16] - 8005c84: 1ad3 subs r3, r2, r3 - 8005c86: 2b64 cmp r3, #100 @ 0x64 - 8005c88: d901 bls.n 8005c8e + 8004d78: f7fd ff78 bl 8002c6c + 8004d7c: 4602 mov r2, r0 + 8004d7e: 693b ldr r3, [r7, #16] + 8004d80: 1ad3 subs r3, r2, r3 + 8004d82: 2b64 cmp r3, #100 @ 0x64 + 8004d84: d901 bls.n 8004d8a { return HAL_TIMEOUT; - 8005c8a: 2303 movs r3, #3 - 8005c8c: e1ec b.n 8006068 + 8004d86: 2303 movs r3, #3 + 8004d88: e1ec b.n 8005164 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8005c8e: 4b53 ldr r3, [pc, #332] @ (8005ddc ) - 8005c90: 681b ldr r3, [r3, #0] - 8005c92: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8005c96: 2b00 cmp r3, #0 - 8005c98: d1f0 bne.n 8005c7c - 8005c9a: e000 b.n 8005c9e + 8004d8a: 4b53 ldr r3, [pc, #332] @ (8004ed8 ) + 8004d8c: 681b ldr r3, [r3, #0] + 8004d8e: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004d92: 2b00 cmp r3, #0 + 8004d94: d1f0 bne.n 8004d78 + 8004d96: e000 b.n 8004d9a if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8005c9c: bf00 nop + 8004d98: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8005c9e: 687b ldr r3, [r7, #4] - 8005ca0: 681b ldr r3, [r3, #0] - 8005ca2: f003 0302 and.w r3, r3, #2 - 8005ca6: 2b00 cmp r3, #0 - 8005ca8: d063 beq.n 8005d72 + 8004d9a: 687b ldr r3, [r7, #4] + 8004d9c: 681b ldr r3, [r3, #0] + 8004d9e: f003 0302 and.w r3, r3, #2 + 8004da2: 2b00 cmp r3, #0 + 8004da4: d063 beq.n 8004e6e /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 8005caa: 4b4c ldr r3, [pc, #304] @ (8005ddc ) - 8005cac: 685b ldr r3, [r3, #4] - 8005cae: f003 030c and.w r3, r3, #12 - 8005cb2: 2b00 cmp r3, #0 - 8005cb4: d00b beq.n 8005cce + 8004da6: 4b4c ldr r3, [pc, #304] @ (8004ed8 ) + 8004da8: 685b ldr r3, [r3, #4] + 8004daa: f003 030c and.w r3, r3, #12 + 8004dae: 2b00 cmp r3, #0 + 8004db0: d00b beq.n 8004dca || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) - 8005cb6: 4b49 ldr r3, [pc, #292] @ (8005ddc ) - 8005cb8: 685b ldr r3, [r3, #4] - 8005cba: f003 030c and.w r3, r3, #12 - 8005cbe: 2b08 cmp r3, #8 - 8005cc0: d11c bne.n 8005cfc - 8005cc2: 4b46 ldr r3, [pc, #280] @ (8005ddc ) - 8005cc4: 685b ldr r3, [r3, #4] - 8005cc6: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8005cca: 2b00 cmp r3, #0 - 8005ccc: d116 bne.n 8005cfc + 8004db2: 4b49 ldr r3, [pc, #292] @ (8004ed8 ) + 8004db4: 685b ldr r3, [r3, #4] + 8004db6: f003 030c and.w r3, r3, #12 + 8004dba: 2b08 cmp r3, #8 + 8004dbc: d11c bne.n 8004df8 + 8004dbe: 4b46 ldr r3, [pc, #280] @ (8004ed8 ) + 8004dc0: 685b ldr r3, [r3, #4] + 8004dc2: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8004dc6: 2b00 cmp r3, #0 + 8004dc8: d116 bne.n 8004df8 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8005cce: 4b43 ldr r3, [pc, #268] @ (8005ddc ) - 8005cd0: 681b ldr r3, [r3, #0] - 8005cd2: f003 0302 and.w r3, r3, #2 - 8005cd6: 2b00 cmp r3, #0 - 8005cd8: d005 beq.n 8005ce6 - 8005cda: 687b ldr r3, [r7, #4] - 8005cdc: 691b ldr r3, [r3, #16] - 8005cde: 2b01 cmp r3, #1 - 8005ce0: d001 beq.n 8005ce6 + 8004dca: 4b43 ldr r3, [pc, #268] @ (8004ed8 ) + 8004dcc: 681b ldr r3, [r3, #0] + 8004dce: f003 0302 and.w r3, r3, #2 + 8004dd2: 2b00 cmp r3, #0 + 8004dd4: d005 beq.n 8004de2 + 8004dd6: 687b ldr r3, [r7, #4] + 8004dd8: 691b ldr r3, [r3, #16] + 8004dda: 2b01 cmp r3, #1 + 8004ddc: d001 beq.n 8004de2 { return HAL_ERROR; - 8005ce2: 2301 movs r3, #1 - 8005ce4: e1c0 b.n 8006068 + 8004dde: 2301 movs r3, #1 + 8004de0: e1c0 b.n 8005164 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8005ce6: 4b3d ldr r3, [pc, #244] @ (8005ddc ) - 8005ce8: 681b ldr r3, [r3, #0] - 8005cea: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 8005cee: 687b ldr r3, [r7, #4] - 8005cf0: 695b ldr r3, [r3, #20] - 8005cf2: 00db lsls r3, r3, #3 - 8005cf4: 4939 ldr r1, [pc, #228] @ (8005ddc ) - 8005cf6: 4313 orrs r3, r2 - 8005cf8: 600b str r3, [r1, #0] + 8004de2: 4b3d ldr r3, [pc, #244] @ (8004ed8 ) + 8004de4: 681b ldr r3, [r3, #0] + 8004de6: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 8004dea: 687b ldr r3, [r7, #4] + 8004dec: 695b ldr r3, [r3, #20] + 8004dee: 00db lsls r3, r3, #3 + 8004df0: 4939 ldr r1, [pc, #228] @ (8004ed8 ) + 8004df2: 4313 orrs r3, r2 + 8004df4: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8005cfa: e03a b.n 8005d72 + 8004df6: e03a b.n 8004e6e } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 8005cfc: 687b ldr r3, [r7, #4] - 8005cfe: 691b ldr r3, [r3, #16] - 8005d00: 2b00 cmp r3, #0 - 8005d02: d020 beq.n 8005d46 + 8004df8: 687b ldr r3, [r7, #4] + 8004dfa: 691b ldr r3, [r3, #16] + 8004dfc: 2b00 cmp r3, #0 + 8004dfe: d020 beq.n 8004e42 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 8005d04: 4b36 ldr r3, [pc, #216] @ (8005de0 ) - 8005d06: 2201 movs r2, #1 - 8005d08: 601a str r2, [r3, #0] + 8004e00: 4b36 ldr r3, [pc, #216] @ (8004edc ) + 8004e02: 2201 movs r2, #1 + 8004e04: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005d0a: f7fd fae3 bl 80032d4 - 8005d0e: 6138 str r0, [r7, #16] + 8004e06: f7fd ff31 bl 8002c6c + 8004e0a: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8005d10: e008 b.n 8005d24 + 8004e0c: e008 b.n 8004e20 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 8005d12: f7fd fadf bl 80032d4 - 8005d16: 4602 mov r2, r0 - 8005d18: 693b ldr r3, [r7, #16] - 8005d1a: 1ad3 subs r3, r2, r3 - 8005d1c: 2b02 cmp r3, #2 - 8005d1e: d901 bls.n 8005d24 + 8004e0e: f7fd ff2d bl 8002c6c + 8004e12: 4602 mov r2, r0 + 8004e14: 693b ldr r3, [r7, #16] + 8004e16: 1ad3 subs r3, r2, r3 + 8004e18: 2b02 cmp r3, #2 + 8004e1a: d901 bls.n 8004e20 { return HAL_TIMEOUT; - 8005d20: 2303 movs r3, #3 - 8005d22: e1a1 b.n 8006068 + 8004e1c: 2303 movs r3, #3 + 8004e1e: e1a1 b.n 8005164 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8005d24: 4b2d ldr r3, [pc, #180] @ (8005ddc ) - 8005d26: 681b ldr r3, [r3, #0] - 8005d28: f003 0302 and.w r3, r3, #2 - 8005d2c: 2b00 cmp r3, #0 - 8005d2e: d0f0 beq.n 8005d12 + 8004e20: 4b2d ldr r3, [pc, #180] @ (8004ed8 ) + 8004e22: 681b ldr r3, [r3, #0] + 8004e24: f003 0302 and.w r3, r3, #2 + 8004e28: 2b00 cmp r3, #0 + 8004e2a: d0f0 beq.n 8004e0e } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8005d30: 4b2a ldr r3, [pc, #168] @ (8005ddc ) - 8005d32: 681b ldr r3, [r3, #0] - 8005d34: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 8005d38: 687b ldr r3, [r7, #4] - 8005d3a: 695b ldr r3, [r3, #20] - 8005d3c: 00db lsls r3, r3, #3 - 8005d3e: 4927 ldr r1, [pc, #156] @ (8005ddc ) - 8005d40: 4313 orrs r3, r2 - 8005d42: 600b str r3, [r1, #0] - 8005d44: e015 b.n 8005d72 + 8004e2c: 4b2a ldr r3, [pc, #168] @ (8004ed8 ) + 8004e2e: 681b ldr r3, [r3, #0] + 8004e30: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 8004e34: 687b ldr r3, [r7, #4] + 8004e36: 695b ldr r3, [r3, #20] + 8004e38: 00db lsls r3, r3, #3 + 8004e3a: 4927 ldr r1, [pc, #156] @ (8004ed8 ) + 8004e3c: 4313 orrs r3, r2 + 8004e3e: 600b str r3, [r1, #0] + 8004e40: e015 b.n 8004e6e } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 8005d46: 4b26 ldr r3, [pc, #152] @ (8005de0 ) - 8005d48: 2200 movs r2, #0 - 8005d4a: 601a str r2, [r3, #0] + 8004e42: 4b26 ldr r3, [pc, #152] @ (8004edc ) + 8004e44: 2200 movs r2, #0 + 8004e46: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005d4c: f7fd fac2 bl 80032d4 - 8005d50: 6138 str r0, [r7, #16] + 8004e48: f7fd ff10 bl 8002c6c + 8004e4c: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8005d52: e008 b.n 8005d66 + 8004e4e: e008 b.n 8004e62 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 8005d54: f7fd fabe bl 80032d4 - 8005d58: 4602 mov r2, r0 - 8005d5a: 693b ldr r3, [r7, #16] - 8005d5c: 1ad3 subs r3, r2, r3 - 8005d5e: 2b02 cmp r3, #2 - 8005d60: d901 bls.n 8005d66 + 8004e50: f7fd ff0c bl 8002c6c + 8004e54: 4602 mov r2, r0 + 8004e56: 693b ldr r3, [r7, #16] + 8004e58: 1ad3 subs r3, r2, r3 + 8004e5a: 2b02 cmp r3, #2 + 8004e5c: d901 bls.n 8004e62 { return HAL_TIMEOUT; - 8005d62: 2303 movs r3, #3 - 8005d64: e180 b.n 8006068 + 8004e5e: 2303 movs r3, #3 + 8004e60: e180 b.n 8005164 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8005d66: 4b1d ldr r3, [pc, #116] @ (8005ddc ) - 8005d68: 681b ldr r3, [r3, #0] - 8005d6a: f003 0302 and.w r3, r3, #2 - 8005d6e: 2b00 cmp r3, #0 - 8005d70: d1f0 bne.n 8005d54 + 8004e62: 4b1d ldr r3, [pc, #116] @ (8004ed8 ) + 8004e64: 681b ldr r3, [r3, #0] + 8004e66: f003 0302 and.w r3, r3, #2 + 8004e6a: 2b00 cmp r3, #0 + 8004e6c: d1f0 bne.n 8004e50 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8005d72: 687b ldr r3, [r7, #4] - 8005d74: 681b ldr r3, [r3, #0] - 8005d76: f003 0308 and.w r3, r3, #8 - 8005d7a: 2b00 cmp r3, #0 - 8005d7c: d03a beq.n 8005df4 + 8004e6e: 687b ldr r3, [r7, #4] + 8004e70: 681b ldr r3, [r3, #0] + 8004e72: f003 0308 and.w r3, r3, #8 + 8004e76: 2b00 cmp r3, #0 + 8004e78: d03a beq.n 8004ef0 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 8005d7e: 687b ldr r3, [r7, #4] - 8005d80: 699b ldr r3, [r3, #24] - 8005d82: 2b00 cmp r3, #0 - 8005d84: d019 beq.n 8005dba + 8004e7a: 687b ldr r3, [r7, #4] + 8004e7c: 699b ldr r3, [r3, #24] + 8004e7e: 2b00 cmp r3, #0 + 8004e80: d019 beq.n 8004eb6 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 8005d86: 4b17 ldr r3, [pc, #92] @ (8005de4 ) - 8005d88: 2201 movs r2, #1 - 8005d8a: 601a str r2, [r3, #0] + 8004e82: 4b17 ldr r3, [pc, #92] @ (8004ee0 ) + 8004e84: 2201 movs r2, #1 + 8004e86: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005d8c: f7fd faa2 bl 80032d4 - 8005d90: 6138 str r0, [r7, #16] + 8004e88: f7fd fef0 bl 8002c6c + 8004e8c: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8005d92: e008 b.n 8005da6 + 8004e8e: e008 b.n 8004ea2 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 8005d94: f7fd fa9e bl 80032d4 - 8005d98: 4602 mov r2, r0 - 8005d9a: 693b ldr r3, [r7, #16] - 8005d9c: 1ad3 subs r3, r2, r3 - 8005d9e: 2b02 cmp r3, #2 - 8005da0: d901 bls.n 8005da6 + 8004e90: f7fd feec bl 8002c6c + 8004e94: 4602 mov r2, r0 + 8004e96: 693b ldr r3, [r7, #16] + 8004e98: 1ad3 subs r3, r2, r3 + 8004e9a: 2b02 cmp r3, #2 + 8004e9c: d901 bls.n 8004ea2 { return HAL_TIMEOUT; - 8005da2: 2303 movs r3, #3 - 8005da4: e160 b.n 8006068 + 8004e9e: 2303 movs r3, #3 + 8004ea0: e160 b.n 8005164 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 8005da6: 4b0d ldr r3, [pc, #52] @ (8005ddc ) - 8005da8: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005daa: f003 0302 and.w r3, r3, #2 - 8005dae: 2b00 cmp r3, #0 - 8005db0: d0f0 beq.n 8005d94 + 8004ea2: 4b0d ldr r3, [pc, #52] @ (8004ed8 ) + 8004ea4: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004ea6: f003 0302 and.w r3, r3, #2 + 8004eaa: 2b00 cmp r3, #0 + 8004eac: d0f0 beq.n 8004e90 } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); - 8005db2: 2001 movs r0, #1 - 8005db4: f000 fad0 bl 8006358 - 8005db8: e01c b.n 8005df4 + 8004eae: 2001 movs r0, #1 + 8004eb0: f000 fad0 bl 8005454 + 8004eb4: e01c b.n 8004ef0 } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 8005dba: 4b0a ldr r3, [pc, #40] @ (8005de4 ) - 8005dbc: 2200 movs r2, #0 - 8005dbe: 601a str r2, [r3, #0] + 8004eb6: 4b0a ldr r3, [pc, #40] @ (8004ee0 ) + 8004eb8: 2200 movs r2, #0 + 8004eba: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005dc0: f7fd fa88 bl 80032d4 - 8005dc4: 6138 str r0, [r7, #16] + 8004ebc: f7fd fed6 bl 8002c6c + 8004ec0: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8005dc6: e00f b.n 8005de8 + 8004ec2: e00f b.n 8004ee4 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 8005dc8: f7fd fa84 bl 80032d4 - 8005dcc: 4602 mov r2, r0 - 8005dce: 693b ldr r3, [r7, #16] - 8005dd0: 1ad3 subs r3, r2, r3 - 8005dd2: 2b02 cmp r3, #2 - 8005dd4: d908 bls.n 8005de8 + 8004ec4: f7fd fed2 bl 8002c6c + 8004ec8: 4602 mov r2, r0 + 8004eca: 693b ldr r3, [r7, #16] + 8004ecc: 1ad3 subs r3, r2, r3 + 8004ece: 2b02 cmp r3, #2 + 8004ed0: d908 bls.n 8004ee4 { return HAL_TIMEOUT; - 8005dd6: 2303 movs r3, #3 - 8005dd8: e146 b.n 8006068 - 8005dda: bf00 nop - 8005ddc: 40021000 .word 0x40021000 - 8005de0: 42420000 .word 0x42420000 - 8005de4: 42420480 .word 0x42420480 + 8004ed2: 2303 movs r3, #3 + 8004ed4: e146 b.n 8005164 + 8004ed6: bf00 nop + 8004ed8: 40021000 .word 0x40021000 + 8004edc: 42420000 .word 0x42420000 + 8004ee0: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8005de8: 4b92 ldr r3, [pc, #584] @ (8006034 ) - 8005dea: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005dec: f003 0302 and.w r3, r3, #2 - 8005df0: 2b00 cmp r3, #0 - 8005df2: d1e9 bne.n 8005dc8 + 8004ee4: 4b92 ldr r3, [pc, #584] @ (8005130 ) + 8004ee6: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004ee8: f003 0302 and.w r3, r3, #2 + 8004eec: 2b00 cmp r3, #0 + 8004eee: d1e9 bne.n 8004ec4 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 8005df4: 687b ldr r3, [r7, #4] - 8005df6: 681b ldr r3, [r3, #0] - 8005df8: f003 0304 and.w r3, r3, #4 - 8005dfc: 2b00 cmp r3, #0 - 8005dfe: f000 80a6 beq.w 8005f4e + 8004ef0: 687b ldr r3, [r7, #4] + 8004ef2: 681b ldr r3, [r3, #0] + 8004ef4: f003 0304 and.w r3, r3, #4 + 8004ef8: 2b00 cmp r3, #0 + 8004efa: f000 80a6 beq.w 800504a { FlagStatus pwrclkchanged = RESET; - 8005e02: 2300 movs r3, #0 - 8005e04: 75fb strb r3, [r7, #23] + 8004efe: 2300 movs r3, #0 + 8004f00: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8005e06: 4b8b ldr r3, [pc, #556] @ (8006034 ) - 8005e08: 69db ldr r3, [r3, #28] - 8005e0a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8005e0e: 2b00 cmp r3, #0 - 8005e10: d10d bne.n 8005e2e + 8004f02: 4b8b ldr r3, [pc, #556] @ (8005130 ) + 8004f04: 69db ldr r3, [r3, #28] + 8004f06: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8004f0a: 2b00 cmp r3, #0 + 8004f0c: d10d bne.n 8004f2a { __HAL_RCC_PWR_CLK_ENABLE(); - 8005e12: 4b88 ldr r3, [pc, #544] @ (8006034 ) - 8005e14: 69db ldr r3, [r3, #28] - 8005e16: 4a87 ldr r2, [pc, #540] @ (8006034 ) - 8005e18: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8005e1c: 61d3 str r3, [r2, #28] - 8005e1e: 4b85 ldr r3, [pc, #532] @ (8006034 ) - 8005e20: 69db ldr r3, [r3, #28] - 8005e22: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8005e26: 60bb str r3, [r7, #8] - 8005e28: 68bb ldr r3, [r7, #8] + 8004f0e: 4b88 ldr r3, [pc, #544] @ (8005130 ) + 8004f10: 69db ldr r3, [r3, #28] + 8004f12: 4a87 ldr r2, [pc, #540] @ (8005130 ) + 8004f14: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8004f18: 61d3 str r3, [r2, #28] + 8004f1a: 4b85 ldr r3, [pc, #532] @ (8005130 ) + 8004f1c: 69db ldr r3, [r3, #28] + 8004f1e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8004f22: 60bb str r3, [r7, #8] + 8004f24: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 8005e2a: 2301 movs r3, #1 - 8005e2c: 75fb strb r3, [r7, #23] + 8004f26: 2301 movs r3, #1 + 8004f28: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8005e2e: 4b82 ldr r3, [pc, #520] @ (8006038 ) - 8005e30: 681b ldr r3, [r3, #0] - 8005e32: f403 7380 and.w r3, r3, #256 @ 0x100 - 8005e36: 2b00 cmp r3, #0 - 8005e38: d118 bne.n 8005e6c + 8004f2a: 4b82 ldr r3, [pc, #520] @ (8005134 ) + 8004f2c: 681b ldr r3, [r3, #0] + 8004f2e: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004f32: 2b00 cmp r3, #0 + 8004f34: d118 bne.n 8004f68 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 8005e3a: 4b7f ldr r3, [pc, #508] @ (8006038 ) - 8005e3c: 681b ldr r3, [r3, #0] - 8005e3e: 4a7e ldr r2, [pc, #504] @ (8006038 ) - 8005e40: f443 7380 orr.w r3, r3, #256 @ 0x100 - 8005e44: 6013 str r3, [r2, #0] + 8004f36: 4b7f ldr r3, [pc, #508] @ (8005134 ) + 8004f38: 681b ldr r3, [r3, #0] + 8004f3a: 4a7e ldr r2, [pc, #504] @ (8005134 ) + 8004f3c: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8004f40: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8005e46: f7fd fa45 bl 80032d4 - 8005e4a: 6138 str r0, [r7, #16] + 8004f42: f7fd fe93 bl 8002c6c + 8004f46: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8005e4c: e008 b.n 8005e60 + 8004f48: e008 b.n 8004f5c { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8005e4e: f7fd fa41 bl 80032d4 - 8005e52: 4602 mov r2, r0 - 8005e54: 693b ldr r3, [r7, #16] - 8005e56: 1ad3 subs r3, r2, r3 - 8005e58: 2b64 cmp r3, #100 @ 0x64 - 8005e5a: d901 bls.n 8005e60 + 8004f4a: f7fd fe8f bl 8002c6c + 8004f4e: 4602 mov r2, r0 + 8004f50: 693b ldr r3, [r7, #16] + 8004f52: 1ad3 subs r3, r2, r3 + 8004f54: 2b64 cmp r3, #100 @ 0x64 + 8004f56: d901 bls.n 8004f5c { return HAL_TIMEOUT; - 8005e5c: 2303 movs r3, #3 - 8005e5e: e103 b.n 8006068 + 8004f58: 2303 movs r3, #3 + 8004f5a: e103 b.n 8005164 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8005e60: 4b75 ldr r3, [pc, #468] @ (8006038 ) - 8005e62: 681b ldr r3, [r3, #0] - 8005e64: f403 7380 and.w r3, r3, #256 @ 0x100 - 8005e68: 2b00 cmp r3, #0 - 8005e6a: d0f0 beq.n 8005e4e + 8004f5c: 4b75 ldr r3, [pc, #468] @ (8005134 ) + 8004f5e: 681b ldr r3, [r3, #0] + 8004f60: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004f64: 2b00 cmp r3, #0 + 8004f66: d0f0 beq.n 8004f4a } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 8005e6c: 687b ldr r3, [r7, #4] - 8005e6e: 68db ldr r3, [r3, #12] - 8005e70: 2b01 cmp r3, #1 - 8005e72: d106 bne.n 8005e82 - 8005e74: 4b6f ldr r3, [pc, #444] @ (8006034 ) - 8005e76: 6a1b ldr r3, [r3, #32] - 8005e78: 4a6e ldr r2, [pc, #440] @ (8006034 ) - 8005e7a: f043 0301 orr.w r3, r3, #1 - 8005e7e: 6213 str r3, [r2, #32] - 8005e80: e02d b.n 8005ede - 8005e82: 687b ldr r3, [r7, #4] - 8005e84: 68db ldr r3, [r3, #12] - 8005e86: 2b00 cmp r3, #0 - 8005e88: d10c bne.n 8005ea4 - 8005e8a: 4b6a ldr r3, [pc, #424] @ (8006034 ) - 8005e8c: 6a1b ldr r3, [r3, #32] - 8005e8e: 4a69 ldr r2, [pc, #420] @ (8006034 ) - 8005e90: f023 0301 bic.w r3, r3, #1 - 8005e94: 6213 str r3, [r2, #32] - 8005e96: 4b67 ldr r3, [pc, #412] @ (8006034 ) - 8005e98: 6a1b ldr r3, [r3, #32] - 8005e9a: 4a66 ldr r2, [pc, #408] @ (8006034 ) - 8005e9c: f023 0304 bic.w r3, r3, #4 - 8005ea0: 6213 str r3, [r2, #32] - 8005ea2: e01c b.n 8005ede - 8005ea4: 687b ldr r3, [r7, #4] - 8005ea6: 68db ldr r3, [r3, #12] - 8005ea8: 2b05 cmp r3, #5 - 8005eaa: d10c bne.n 8005ec6 - 8005eac: 4b61 ldr r3, [pc, #388] @ (8006034 ) - 8005eae: 6a1b ldr r3, [r3, #32] - 8005eb0: 4a60 ldr r2, [pc, #384] @ (8006034 ) - 8005eb2: f043 0304 orr.w r3, r3, #4 - 8005eb6: 6213 str r3, [r2, #32] - 8005eb8: 4b5e ldr r3, [pc, #376] @ (8006034 ) - 8005eba: 6a1b ldr r3, [r3, #32] - 8005ebc: 4a5d ldr r2, [pc, #372] @ (8006034 ) - 8005ebe: f043 0301 orr.w r3, r3, #1 - 8005ec2: 6213 str r3, [r2, #32] - 8005ec4: e00b b.n 8005ede - 8005ec6: 4b5b ldr r3, [pc, #364] @ (8006034 ) - 8005ec8: 6a1b ldr r3, [r3, #32] - 8005eca: 4a5a ldr r2, [pc, #360] @ (8006034 ) - 8005ecc: f023 0301 bic.w r3, r3, #1 - 8005ed0: 6213 str r3, [r2, #32] - 8005ed2: 4b58 ldr r3, [pc, #352] @ (8006034 ) - 8005ed4: 6a1b ldr r3, [r3, #32] - 8005ed6: 4a57 ldr r2, [pc, #348] @ (8006034 ) - 8005ed8: f023 0304 bic.w r3, r3, #4 - 8005edc: 6213 str r3, [r2, #32] + 8004f68: 687b ldr r3, [r7, #4] + 8004f6a: 68db ldr r3, [r3, #12] + 8004f6c: 2b01 cmp r3, #1 + 8004f6e: d106 bne.n 8004f7e + 8004f70: 4b6f ldr r3, [pc, #444] @ (8005130 ) + 8004f72: 6a1b ldr r3, [r3, #32] + 8004f74: 4a6e ldr r2, [pc, #440] @ (8005130 ) + 8004f76: f043 0301 orr.w r3, r3, #1 + 8004f7a: 6213 str r3, [r2, #32] + 8004f7c: e02d b.n 8004fda + 8004f7e: 687b ldr r3, [r7, #4] + 8004f80: 68db ldr r3, [r3, #12] + 8004f82: 2b00 cmp r3, #0 + 8004f84: d10c bne.n 8004fa0 + 8004f86: 4b6a ldr r3, [pc, #424] @ (8005130 ) + 8004f88: 6a1b ldr r3, [r3, #32] + 8004f8a: 4a69 ldr r2, [pc, #420] @ (8005130 ) + 8004f8c: f023 0301 bic.w r3, r3, #1 + 8004f90: 6213 str r3, [r2, #32] + 8004f92: 4b67 ldr r3, [pc, #412] @ (8005130 ) + 8004f94: 6a1b ldr r3, [r3, #32] + 8004f96: 4a66 ldr r2, [pc, #408] @ (8005130 ) + 8004f98: f023 0304 bic.w r3, r3, #4 + 8004f9c: 6213 str r3, [r2, #32] + 8004f9e: e01c b.n 8004fda + 8004fa0: 687b ldr r3, [r7, #4] + 8004fa2: 68db ldr r3, [r3, #12] + 8004fa4: 2b05 cmp r3, #5 + 8004fa6: d10c bne.n 8004fc2 + 8004fa8: 4b61 ldr r3, [pc, #388] @ (8005130 ) + 8004faa: 6a1b ldr r3, [r3, #32] + 8004fac: 4a60 ldr r2, [pc, #384] @ (8005130 ) + 8004fae: f043 0304 orr.w r3, r3, #4 + 8004fb2: 6213 str r3, [r2, #32] + 8004fb4: 4b5e ldr r3, [pc, #376] @ (8005130 ) + 8004fb6: 6a1b ldr r3, [r3, #32] + 8004fb8: 4a5d ldr r2, [pc, #372] @ (8005130 ) + 8004fba: f043 0301 orr.w r3, r3, #1 + 8004fbe: 6213 str r3, [r2, #32] + 8004fc0: e00b b.n 8004fda + 8004fc2: 4b5b ldr r3, [pc, #364] @ (8005130 ) + 8004fc4: 6a1b ldr r3, [r3, #32] + 8004fc6: 4a5a ldr r2, [pc, #360] @ (8005130 ) + 8004fc8: f023 0301 bic.w r3, r3, #1 + 8004fcc: 6213 str r3, [r2, #32] + 8004fce: 4b58 ldr r3, [pc, #352] @ (8005130 ) + 8004fd0: 6a1b ldr r3, [r3, #32] + 8004fd2: 4a57 ldr r2, [pc, #348] @ (8005130 ) + 8004fd4: f023 0304 bic.w r3, r3, #4 + 8004fd8: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 8005ede: 687b ldr r3, [r7, #4] - 8005ee0: 68db ldr r3, [r3, #12] - 8005ee2: 2b00 cmp r3, #0 - 8005ee4: d015 beq.n 8005f12 + 8004fda: 687b ldr r3, [r7, #4] + 8004fdc: 68db ldr r3, [r3, #12] + 8004fde: 2b00 cmp r3, #0 + 8004fe0: d015 beq.n 800500e { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005ee6: f7fd f9f5 bl 80032d4 - 8005eea: 6138 str r0, [r7, #16] + 8004fe2: f7fd fe43 bl 8002c6c + 8004fe6: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8005eec: e00a b.n 8005f04 + 8004fe8: e00a b.n 8005000 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8005eee: f7fd f9f1 bl 80032d4 - 8005ef2: 4602 mov r2, r0 - 8005ef4: 693b ldr r3, [r7, #16] - 8005ef6: 1ad3 subs r3, r2, r3 - 8005ef8: f241 3288 movw r2, #5000 @ 0x1388 - 8005efc: 4293 cmp r3, r2 - 8005efe: d901 bls.n 8005f04 + 8004fea: f7fd fe3f bl 8002c6c + 8004fee: 4602 mov r2, r0 + 8004ff0: 693b ldr r3, [r7, #16] + 8004ff2: 1ad3 subs r3, r2, r3 + 8004ff4: f241 3288 movw r2, #5000 @ 0x1388 + 8004ff8: 4293 cmp r3, r2 + 8004ffa: d901 bls.n 8005000 { return HAL_TIMEOUT; - 8005f00: 2303 movs r3, #3 - 8005f02: e0b1 b.n 8006068 + 8004ffc: 2303 movs r3, #3 + 8004ffe: e0b1 b.n 8005164 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8005f04: 4b4b ldr r3, [pc, #300] @ (8006034 ) - 8005f06: 6a1b ldr r3, [r3, #32] - 8005f08: f003 0302 and.w r3, r3, #2 - 8005f0c: 2b00 cmp r3, #0 - 8005f0e: d0ee beq.n 8005eee - 8005f10: e014 b.n 8005f3c + 8005000: 4b4b ldr r3, [pc, #300] @ (8005130 ) + 8005002: 6a1b ldr r3, [r3, #32] + 8005004: f003 0302 and.w r3, r3, #2 + 8005008: 2b00 cmp r3, #0 + 800500a: d0ee beq.n 8004fea + 800500c: e014 b.n 8005038 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005f12: f7fd f9df bl 80032d4 - 8005f16: 6138 str r0, [r7, #16] + 800500e: f7fd fe2d bl 8002c6c + 8005012: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8005f18: e00a b.n 8005f30 + 8005014: e00a b.n 800502c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8005f1a: f7fd f9db bl 80032d4 - 8005f1e: 4602 mov r2, r0 - 8005f20: 693b ldr r3, [r7, #16] - 8005f22: 1ad3 subs r3, r2, r3 - 8005f24: f241 3288 movw r2, #5000 @ 0x1388 - 8005f28: 4293 cmp r3, r2 - 8005f2a: d901 bls.n 8005f30 + 8005016: f7fd fe29 bl 8002c6c + 800501a: 4602 mov r2, r0 + 800501c: 693b ldr r3, [r7, #16] + 800501e: 1ad3 subs r3, r2, r3 + 8005020: f241 3288 movw r2, #5000 @ 0x1388 + 8005024: 4293 cmp r3, r2 + 8005026: d901 bls.n 800502c { return HAL_TIMEOUT; - 8005f2c: 2303 movs r3, #3 - 8005f2e: e09b b.n 8006068 + 8005028: 2303 movs r3, #3 + 800502a: e09b b.n 8005164 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8005f30: 4b40 ldr r3, [pc, #256] @ (8006034 ) - 8005f32: 6a1b ldr r3, [r3, #32] - 8005f34: f003 0302 and.w r3, r3, #2 - 8005f38: 2b00 cmp r3, #0 - 8005f3a: d1ee bne.n 8005f1a + 800502c: 4b40 ldr r3, [pc, #256] @ (8005130 ) + 800502e: 6a1b ldr r3, [r3, #32] + 8005030: f003 0302 and.w r3, r3, #2 + 8005034: 2b00 cmp r3, #0 + 8005036: d1ee bne.n 8005016 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) - 8005f3c: 7dfb ldrb r3, [r7, #23] - 8005f3e: 2b01 cmp r3, #1 - 8005f40: d105 bne.n 8005f4e + 8005038: 7dfb ldrb r3, [r7, #23] + 800503a: 2b01 cmp r3, #1 + 800503c: d105 bne.n 800504a { __HAL_RCC_PWR_CLK_DISABLE(); - 8005f42: 4b3c ldr r3, [pc, #240] @ (8006034 ) - 8005f44: 69db ldr r3, [r3, #28] - 8005f46: 4a3b ldr r2, [pc, #236] @ (8006034 ) - 8005f48: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 8005f4c: 61d3 str r3, [r2, #28] + 800503e: 4b3c ldr r3, [pc, #240] @ (8005130 ) + 8005040: 69db ldr r3, [r3, #28] + 8005042: 4a3b ldr r2, [pc, #236] @ (8005130 ) + 8005044: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 8005048: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 8005f4e: 687b ldr r3, [r7, #4] - 8005f50: 69db ldr r3, [r3, #28] - 8005f52: 2b00 cmp r3, #0 - 8005f54: f000 8087 beq.w 8006066 + 800504a: 687b ldr r3, [r7, #4] + 800504c: 69db ldr r3, [r3, #28] + 800504e: 2b00 cmp r3, #0 + 8005050: f000 8087 beq.w 8005162 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8005f58: 4b36 ldr r3, [pc, #216] @ (8006034 ) - 8005f5a: 685b ldr r3, [r3, #4] - 8005f5c: f003 030c and.w r3, r3, #12 - 8005f60: 2b08 cmp r3, #8 - 8005f62: d061 beq.n 8006028 + 8005054: 4b36 ldr r3, [pc, #216] @ (8005130 ) + 8005056: 685b ldr r3, [r3, #4] + 8005058: f003 030c and.w r3, r3, #12 + 800505c: 2b08 cmp r3, #8 + 800505e: d061 beq.n 8005124 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 8005f64: 687b ldr r3, [r7, #4] - 8005f66: 69db ldr r3, [r3, #28] - 8005f68: 2b02 cmp r3, #2 - 8005f6a: d146 bne.n 8005ffa + 8005060: 687b ldr r3, [r7, #4] + 8005062: 69db ldr r3, [r3, #28] + 8005064: 2b02 cmp r3, #2 + 8005066: d146 bne.n 80050f6 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8005f6c: 4b33 ldr r3, [pc, #204] @ (800603c ) - 8005f6e: 2200 movs r2, #0 - 8005f70: 601a str r2, [r3, #0] + 8005068: 4b33 ldr r3, [pc, #204] @ (8005138 ) + 800506a: 2200 movs r2, #0 + 800506c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005f72: f7fd f9af bl 80032d4 - 8005f76: 6138 str r0, [r7, #16] + 800506e: f7fd fdfd bl 8002c6c + 8005072: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8005f78: e008 b.n 8005f8c + 8005074: e008 b.n 8005088 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8005f7a: f7fd f9ab bl 80032d4 - 8005f7e: 4602 mov r2, r0 - 8005f80: 693b ldr r3, [r7, #16] - 8005f82: 1ad3 subs r3, r2, r3 - 8005f84: 2b02 cmp r3, #2 - 8005f86: d901 bls.n 8005f8c + 8005076: f7fd fdf9 bl 8002c6c + 800507a: 4602 mov r2, r0 + 800507c: 693b ldr r3, [r7, #16] + 800507e: 1ad3 subs r3, r2, r3 + 8005080: 2b02 cmp r3, #2 + 8005082: d901 bls.n 8005088 { return HAL_TIMEOUT; - 8005f88: 2303 movs r3, #3 - 8005f8a: e06d b.n 8006068 + 8005084: 2303 movs r3, #3 + 8005086: e06d b.n 8005164 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8005f8c: 4b29 ldr r3, [pc, #164] @ (8006034 ) - 8005f8e: 681b ldr r3, [r3, #0] - 8005f90: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8005f94: 2b00 cmp r3, #0 - 8005f96: d1f0 bne.n 8005f7a + 8005088: 4b29 ldr r3, [pc, #164] @ (8005130 ) + 800508a: 681b ldr r3, [r3, #0] + 800508c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8005090: 2b00 cmp r3, #0 + 8005092: d1f0 bne.n 8005076 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) - 8005f98: 687b ldr r3, [r7, #4] - 8005f9a: 6a1b ldr r3, [r3, #32] - 8005f9c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8005fa0: d108 bne.n 8005fb4 + 8005094: 687b ldr r3, [r7, #4] + 8005096: 6a1b ldr r3, [r3, #32] + 8005098: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 800509c: d108 bne.n 80050b0 /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); - 8005fa2: 4b24 ldr r3, [pc, #144] @ (8006034 ) - 8005fa4: 685b ldr r3, [r3, #4] - 8005fa6: f423 3200 bic.w r2, r3, #131072 @ 0x20000 - 8005faa: 687b ldr r3, [r7, #4] - 8005fac: 689b ldr r3, [r3, #8] - 8005fae: 4921 ldr r1, [pc, #132] @ (8006034 ) - 8005fb0: 4313 orrs r3, r2 - 8005fb2: 604b str r3, [r1, #4] + 800509e: 4b24 ldr r3, [pc, #144] @ (8005130 ) + 80050a0: 685b ldr r3, [r3, #4] + 80050a2: f423 3200 bic.w r2, r3, #131072 @ 0x20000 + 80050a6: 687b ldr r3, [r7, #4] + 80050a8: 689b ldr r3, [r3, #8] + 80050aa: 4921 ldr r1, [pc, #132] @ (8005130 ) + 80050ac: 4313 orrs r3, r2 + 80050ae: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 8005fb4: 4b1f ldr r3, [pc, #124] @ (8006034 ) - 8005fb6: 685b ldr r3, [r3, #4] - 8005fb8: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 - 8005fbc: 687b ldr r3, [r7, #4] - 8005fbe: 6a19 ldr r1, [r3, #32] - 8005fc0: 687b ldr r3, [r7, #4] - 8005fc2: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005fc4: 430b orrs r3, r1 - 8005fc6: 491b ldr r1, [pc, #108] @ (8006034 ) - 8005fc8: 4313 orrs r3, r2 - 8005fca: 604b str r3, [r1, #4] + 80050b0: 4b1f ldr r3, [pc, #124] @ (8005130 ) + 80050b2: 685b ldr r3, [r3, #4] + 80050b4: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 + 80050b8: 687b ldr r3, [r7, #4] + 80050ba: 6a19 ldr r1, [r3, #32] + 80050bc: 687b ldr r3, [r7, #4] + 80050be: 6a5b ldr r3, [r3, #36] @ 0x24 + 80050c0: 430b orrs r3, r1 + 80050c2: 491b ldr r1, [pc, #108] @ (8005130 ) + 80050c4: 4313 orrs r3, r2 + 80050c6: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 8005fcc: 4b1b ldr r3, [pc, #108] @ (800603c ) - 8005fce: 2201 movs r2, #1 - 8005fd0: 601a str r2, [r3, #0] + 80050c8: 4b1b ldr r3, [pc, #108] @ (8005138 ) + 80050ca: 2201 movs r2, #1 + 80050cc: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8005fd2: f7fd f97f bl 80032d4 - 8005fd6: 6138 str r0, [r7, #16] + 80050ce: f7fd fdcd bl 8002c6c + 80050d2: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8005fd8: e008 b.n 8005fec + 80050d4: e008 b.n 80050e8 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8005fda: f7fd f97b bl 80032d4 - 8005fde: 4602 mov r2, r0 - 8005fe0: 693b ldr r3, [r7, #16] - 8005fe2: 1ad3 subs r3, r2, r3 - 8005fe4: 2b02 cmp r3, #2 - 8005fe6: d901 bls.n 8005fec + 80050d6: f7fd fdc9 bl 8002c6c + 80050da: 4602 mov r2, r0 + 80050dc: 693b ldr r3, [r7, #16] + 80050de: 1ad3 subs r3, r2, r3 + 80050e0: 2b02 cmp r3, #2 + 80050e2: d901 bls.n 80050e8 { return HAL_TIMEOUT; - 8005fe8: 2303 movs r3, #3 - 8005fea: e03d b.n 8006068 + 80050e4: 2303 movs r3, #3 + 80050e6: e03d b.n 8005164 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8005fec: 4b11 ldr r3, [pc, #68] @ (8006034 ) - 8005fee: 681b ldr r3, [r3, #0] - 8005ff0: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8005ff4: 2b00 cmp r3, #0 - 8005ff6: d0f0 beq.n 8005fda - 8005ff8: e035 b.n 8006066 + 80050e8: 4b11 ldr r3, [pc, #68] @ (8005130 ) + 80050ea: 681b ldr r3, [r3, #0] + 80050ec: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 80050f0: 2b00 cmp r3, #0 + 80050f2: d0f0 beq.n 80050d6 + 80050f4: e035 b.n 8005162 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8005ffa: 4b10 ldr r3, [pc, #64] @ (800603c ) - 8005ffc: 2200 movs r2, #0 - 8005ffe: 601a str r2, [r3, #0] + 80050f6: 4b10 ldr r3, [pc, #64] @ (8005138 ) + 80050f8: 2200 movs r2, #0 + 80050fa: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8006000: f7fd f968 bl 80032d4 - 8006004: 6138 str r0, [r7, #16] + 80050fc: f7fd fdb6 bl 8002c6c + 8005100: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8006006: e008 b.n 800601a + 8005102: e008 b.n 8005116 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8006008: f7fd f964 bl 80032d4 - 800600c: 4602 mov r2, r0 - 800600e: 693b ldr r3, [r7, #16] - 8006010: 1ad3 subs r3, r2, r3 - 8006012: 2b02 cmp r3, #2 - 8006014: d901 bls.n 800601a + 8005104: f7fd fdb2 bl 8002c6c + 8005108: 4602 mov r2, r0 + 800510a: 693b ldr r3, [r7, #16] + 800510c: 1ad3 subs r3, r2, r3 + 800510e: 2b02 cmp r3, #2 + 8005110: d901 bls.n 8005116 { return HAL_TIMEOUT; - 8006016: 2303 movs r3, #3 - 8006018: e026 b.n 8006068 + 8005112: 2303 movs r3, #3 + 8005114: e026 b.n 8005164 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 800601a: 4b06 ldr r3, [pc, #24] @ (8006034 ) - 800601c: 681b ldr r3, [r3, #0] - 800601e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8006022: 2b00 cmp r3, #0 - 8006024: d1f0 bne.n 8006008 - 8006026: e01e b.n 8006066 + 8005116: 4b06 ldr r3, [pc, #24] @ (8005130 ) + 8005118: 681b ldr r3, [r3, #0] + 800511a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 800511e: 2b00 cmp r3, #0 + 8005120: d1f0 bne.n 8005104 + 8005122: e01e b.n 8005162 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8006028: 687b ldr r3, [r7, #4] - 800602a: 69db ldr r3, [r3, #28] - 800602c: 2b01 cmp r3, #1 - 800602e: d107 bne.n 8006040 + 8005124: 687b ldr r3, [r7, #4] + 8005126: 69db ldr r3, [r3, #28] + 8005128: 2b01 cmp r3, #1 + 800512a: d107 bne.n 800513c { return HAL_ERROR; - 8006030: 2301 movs r3, #1 - 8006032: e019 b.n 8006068 - 8006034: 40021000 .word 0x40021000 - 8006038: 40007000 .word 0x40007000 - 800603c: 42420060 .word 0x42420060 + 800512c: 2301 movs r3, #1 + 800512e: e019 b.n 8005164 + 8005130: 40021000 .word 0x40021000 + 8005134: 40007000 .word 0x40007000 + 8005138: 42420060 .word 0x42420060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 8006040: 4b0b ldr r3, [pc, #44] @ (8006070 ) - 8006042: 685b ldr r3, [r3, #4] - 8006044: 60fb str r3, [r7, #12] + 800513c: 4b0b ldr r3, [pc, #44] @ (800516c ) + 800513e: 685b ldr r3, [r3, #4] + 8005140: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8006046: 68fb ldr r3, [r7, #12] - 8006048: f403 3280 and.w r2, r3, #65536 @ 0x10000 - 800604c: 687b ldr r3, [r7, #4] - 800604e: 6a1b ldr r3, [r3, #32] - 8006050: 429a cmp r2, r3 - 8006052: d106 bne.n 8006062 + 8005142: 68fb ldr r3, [r7, #12] + 8005144: f403 3280 and.w r2, r3, #65536 @ 0x10000 + 8005148: 687b ldr r3, [r7, #4] + 800514a: 6a1b ldr r3, [r3, #32] + 800514c: 429a cmp r2, r3 + 800514e: d106 bne.n 800515e (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) - 8006054: 68fb ldr r3, [r7, #12] - 8006056: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 - 800605a: 687b ldr r3, [r7, #4] - 800605c: 6a5b ldr r3, [r3, #36] @ 0x24 + 8005150: 68fb ldr r3, [r7, #12] + 8005152: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 + 8005156: 687b ldr r3, [r7, #4] + 8005158: 6a5b ldr r3, [r3, #36] @ 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 800605e: 429a cmp r2, r3 - 8006060: d001 beq.n 8006066 + 800515a: 429a cmp r2, r3 + 800515c: d001 beq.n 8005162 { return HAL_ERROR; - 8006062: 2301 movs r3, #1 - 8006064: e000 b.n 8006068 + 800515e: 2301 movs r3, #1 + 8005160: e000 b.n 8005164 } } } } return HAL_OK; - 8006066: 2300 movs r3, #0 + 8005162: 2300 movs r3, #0 } - 8006068: 4618 mov r0, r3 - 800606a: 3718 adds r7, #24 - 800606c: 46bd mov sp, r7 - 800606e: bd80 pop {r7, pc} - 8006070: 40021000 .word 0x40021000 + 8005164: 4618 mov r0, r3 + 8005166: 3718 adds r7, #24 + 8005168: 46bd mov sp, r7 + 800516a: bd80 pop {r7, pc} + 800516c: 40021000 .word 0x40021000 -08006074 : +08005170 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8006074: b580 push {r7, lr} - 8006076: b084 sub sp, #16 - 8006078: af00 add r7, sp, #0 - 800607a: 6078 str r0, [r7, #4] - 800607c: 6039 str r1, [r7, #0] + 8005170: b580 push {r7, lr} + 8005172: b084 sub sp, #16 + 8005174: af00 add r7, sp, #0 + 8005176: 6078 str r0, [r7, #4] + 8005178: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) - 800607e: 687b ldr r3, [r7, #4] - 8006080: 2b00 cmp r3, #0 - 8006082: d101 bne.n 8006088 + 800517a: 687b ldr r3, [r7, #4] + 800517c: 2b00 cmp r3, #0 + 800517e: d101 bne.n 8005184 { return HAL_ERROR; - 8006084: 2301 movs r3, #1 - 8006086: e0d0 b.n 800622a + 8005180: 2301 movs r3, #1 + 8005182: e0d0 b.n 8005326 must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) - 8006088: 4b6a ldr r3, [pc, #424] @ (8006234 ) - 800608a: 681b ldr r3, [r3, #0] - 800608c: f003 0307 and.w r3, r3, #7 - 8006090: 683a ldr r2, [r7, #0] - 8006092: 429a cmp r2, r3 - 8006094: d910 bls.n 80060b8 + 8005184: 4b6a ldr r3, [pc, #424] @ (8005330 ) + 8005186: 681b ldr r3, [r3, #0] + 8005188: f003 0307 and.w r3, r3, #7 + 800518c: 683a ldr r2, [r7, #0] + 800518e: 429a cmp r2, r3 + 8005190: d910 bls.n 80051b4 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8006096: 4b67 ldr r3, [pc, #412] @ (8006234 ) - 8006098: 681b ldr r3, [r3, #0] - 800609a: f023 0207 bic.w r2, r3, #7 - 800609e: 4965 ldr r1, [pc, #404] @ (8006234 ) - 80060a0: 683b ldr r3, [r7, #0] - 80060a2: 4313 orrs r3, r2 - 80060a4: 600b str r3, [r1, #0] + 8005192: 4b67 ldr r3, [pc, #412] @ (8005330 ) + 8005194: 681b ldr r3, [r3, #0] + 8005196: f023 0207 bic.w r2, r3, #7 + 800519a: 4965 ldr r1, [pc, #404] @ (8005330 ) + 800519c: 683b ldr r3, [r7, #0] + 800519e: 4313 orrs r3, r2 + 80051a0: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 80060a6: 4b63 ldr r3, [pc, #396] @ (8006234 ) - 80060a8: 681b ldr r3, [r3, #0] - 80060aa: f003 0307 and.w r3, r3, #7 - 80060ae: 683a ldr r2, [r7, #0] - 80060b0: 429a cmp r2, r3 - 80060b2: d001 beq.n 80060b8 + 80051a2: 4b63 ldr r3, [pc, #396] @ (8005330 ) + 80051a4: 681b ldr r3, [r3, #0] + 80051a6: f003 0307 and.w r3, r3, #7 + 80051aa: 683a ldr r2, [r7, #0] + 80051ac: 429a cmp r2, r3 + 80051ae: d001 beq.n 80051b4 { return HAL_ERROR; - 80060b4: 2301 movs r3, #1 - 80060b6: e0b8 b.n 800622a + 80051b0: 2301 movs r3, #1 + 80051b2: e0b8 b.n 8005326 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 80060b8: 687b ldr r3, [r7, #4] - 80060ba: 681b ldr r3, [r3, #0] - 80060bc: f003 0302 and.w r3, r3, #2 - 80060c0: 2b00 cmp r3, #0 - 80060c2: d020 beq.n 8006106 + 80051b4: 687b ldr r3, [r7, #4] + 80051b6: 681b ldr r3, [r3, #0] + 80051b8: f003 0302 and.w r3, r3, #2 + 80051bc: 2b00 cmp r3, #0 + 80051be: d020 beq.n 8005202 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 80060c4: 687b ldr r3, [r7, #4] - 80060c6: 681b ldr r3, [r3, #0] - 80060c8: f003 0304 and.w r3, r3, #4 - 80060cc: 2b00 cmp r3, #0 - 80060ce: d005 beq.n 80060dc + 80051c0: 687b ldr r3, [r7, #4] + 80051c2: 681b ldr r3, [r3, #0] + 80051c4: f003 0304 and.w r3, r3, #4 + 80051c8: 2b00 cmp r3, #0 + 80051ca: d005 beq.n 80051d8 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); - 80060d0: 4b59 ldr r3, [pc, #356] @ (8006238 ) - 80060d2: 685b ldr r3, [r3, #4] - 80060d4: 4a58 ldr r2, [pc, #352] @ (8006238 ) - 80060d6: f443 63e0 orr.w r3, r3, #1792 @ 0x700 - 80060da: 6053 str r3, [r2, #4] + 80051cc: 4b59 ldr r3, [pc, #356] @ (8005334 ) + 80051ce: 685b ldr r3, [r3, #4] + 80051d0: 4a58 ldr r2, [pc, #352] @ (8005334 ) + 80051d2: f443 63e0 orr.w r3, r3, #1792 @ 0x700 + 80051d6: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 80060dc: 687b ldr r3, [r7, #4] - 80060de: 681b ldr r3, [r3, #0] - 80060e0: f003 0308 and.w r3, r3, #8 - 80060e4: 2b00 cmp r3, #0 - 80060e6: d005 beq.n 80060f4 + 80051d8: 687b ldr r3, [r7, #4] + 80051da: 681b ldr r3, [r3, #0] + 80051dc: f003 0308 and.w r3, r3, #8 + 80051e0: 2b00 cmp r3, #0 + 80051e2: d005 beq.n 80051f0 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); - 80060e8: 4b53 ldr r3, [pc, #332] @ (8006238 ) - 80060ea: 685b ldr r3, [r3, #4] - 80060ec: 4a52 ldr r2, [pc, #328] @ (8006238 ) - 80060ee: f443 5360 orr.w r3, r3, #14336 @ 0x3800 - 80060f2: 6053 str r3, [r2, #4] + 80051e4: 4b53 ldr r3, [pc, #332] @ (8005334 ) + 80051e6: 685b ldr r3, [r3, #4] + 80051e8: 4a52 ldr r2, [pc, #328] @ (8005334 ) + 80051ea: f443 5360 orr.w r3, r3, #14336 @ 0x3800 + 80051ee: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 80060f4: 4b50 ldr r3, [pc, #320] @ (8006238 ) - 80060f6: 685b ldr r3, [r3, #4] - 80060f8: f023 02f0 bic.w r2, r3, #240 @ 0xf0 - 80060fc: 687b ldr r3, [r7, #4] - 80060fe: 689b ldr r3, [r3, #8] - 8006100: 494d ldr r1, [pc, #308] @ (8006238 ) - 8006102: 4313 orrs r3, r2 - 8006104: 604b str r3, [r1, #4] + 80051f0: 4b50 ldr r3, [pc, #320] @ (8005334 ) + 80051f2: 685b ldr r3, [r3, #4] + 80051f4: f023 02f0 bic.w r2, r3, #240 @ 0xf0 + 80051f8: 687b ldr r3, [r7, #4] + 80051fa: 689b ldr r3, [r3, #8] + 80051fc: 494d ldr r1, [pc, #308] @ (8005334 ) + 80051fe: 4313 orrs r3, r2 + 8005200: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8006106: 687b ldr r3, [r7, #4] - 8006108: 681b ldr r3, [r3, #0] - 800610a: f003 0301 and.w r3, r3, #1 - 800610e: 2b00 cmp r3, #0 - 8006110: d040 beq.n 8006194 + 8005202: 687b ldr r3, [r7, #4] + 8005204: 681b ldr r3, [r3, #0] + 8005206: f003 0301 and.w r3, r3, #1 + 800520a: 2b00 cmp r3, #0 + 800520c: d040 beq.n 8005290 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8006112: 687b ldr r3, [r7, #4] - 8006114: 685b ldr r3, [r3, #4] - 8006116: 2b01 cmp r3, #1 - 8006118: d107 bne.n 800612a + 800520e: 687b ldr r3, [r7, #4] + 8005210: 685b ldr r3, [r3, #4] + 8005212: 2b01 cmp r3, #1 + 8005214: d107 bne.n 8005226 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 800611a: 4b47 ldr r3, [pc, #284] @ (8006238 ) - 800611c: 681b ldr r3, [r3, #0] - 800611e: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8006122: 2b00 cmp r3, #0 - 8006124: d115 bne.n 8006152 + 8005216: 4b47 ldr r3, [pc, #284] @ (8005334 ) + 8005218: 681b ldr r3, [r3, #0] + 800521a: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 800521e: 2b00 cmp r3, #0 + 8005220: d115 bne.n 800524e { return HAL_ERROR; - 8006126: 2301 movs r3, #1 - 8006128: e07f b.n 800622a + 8005222: 2301 movs r3, #1 + 8005224: e07f b.n 8005326 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 800612a: 687b ldr r3, [r7, #4] - 800612c: 685b ldr r3, [r3, #4] - 800612e: 2b02 cmp r3, #2 - 8006130: d107 bne.n 8006142 + 8005226: 687b ldr r3, [r7, #4] + 8005228: 685b ldr r3, [r3, #4] + 800522a: 2b02 cmp r3, #2 + 800522c: d107 bne.n 800523e { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8006132: 4b41 ldr r3, [pc, #260] @ (8006238 ) - 8006134: 681b ldr r3, [r3, #0] - 8006136: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 800613a: 2b00 cmp r3, #0 - 800613c: d109 bne.n 8006152 + 800522e: 4b41 ldr r3, [pc, #260] @ (8005334 ) + 8005230: 681b ldr r3, [r3, #0] + 8005232: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8005236: 2b00 cmp r3, #0 + 8005238: d109 bne.n 800524e { return HAL_ERROR; - 800613e: 2301 movs r3, #1 - 8006140: e073 b.n 800622a + 800523a: 2301 movs r3, #1 + 800523c: e073 b.n 8005326 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8006142: 4b3d ldr r3, [pc, #244] @ (8006238 ) - 8006144: 681b ldr r3, [r3, #0] - 8006146: f003 0302 and.w r3, r3, #2 - 800614a: 2b00 cmp r3, #0 - 800614c: d101 bne.n 8006152 + 800523e: 4b3d ldr r3, [pc, #244] @ (8005334 ) + 8005240: 681b ldr r3, [r3, #0] + 8005242: f003 0302 and.w r3, r3, #2 + 8005246: 2b00 cmp r3, #0 + 8005248: d101 bne.n 800524e { return HAL_ERROR; - 800614e: 2301 movs r3, #1 - 8006150: e06b b.n 800622a + 800524a: 2301 movs r3, #1 + 800524c: e06b b.n 8005326 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 8006152: 4b39 ldr r3, [pc, #228] @ (8006238 ) - 8006154: 685b ldr r3, [r3, #4] - 8006156: f023 0203 bic.w r2, r3, #3 - 800615a: 687b ldr r3, [r7, #4] - 800615c: 685b ldr r3, [r3, #4] - 800615e: 4936 ldr r1, [pc, #216] @ (8006238 ) - 8006160: 4313 orrs r3, r2 - 8006162: 604b str r3, [r1, #4] + 800524e: 4b39 ldr r3, [pc, #228] @ (8005334 ) + 8005250: 685b ldr r3, [r3, #4] + 8005252: f023 0203 bic.w r2, r3, #3 + 8005256: 687b ldr r3, [r7, #4] + 8005258: 685b ldr r3, [r3, #4] + 800525a: 4936 ldr r1, [pc, #216] @ (8005334 ) + 800525c: 4313 orrs r3, r2 + 800525e: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8006164: f7fd f8b6 bl 80032d4 - 8006168: 60f8 str r0, [r7, #12] + 8005260: f7fd fd04 bl 8002c6c + 8005264: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 800616a: e00a b.n 8006182 + 8005266: e00a b.n 800527e { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 800616c: f7fd f8b2 bl 80032d4 - 8006170: 4602 mov r2, r0 - 8006172: 68fb ldr r3, [r7, #12] - 8006174: 1ad3 subs r3, r2, r3 - 8006176: f241 3288 movw r2, #5000 @ 0x1388 - 800617a: 4293 cmp r3, r2 - 800617c: d901 bls.n 8006182 + 8005268: f7fd fd00 bl 8002c6c + 800526c: 4602 mov r2, r0 + 800526e: 68fb ldr r3, [r7, #12] + 8005270: 1ad3 subs r3, r2, r3 + 8005272: f241 3288 movw r2, #5000 @ 0x1388 + 8005276: 4293 cmp r3, r2 + 8005278: d901 bls.n 800527e { return HAL_TIMEOUT; - 800617e: 2303 movs r3, #3 - 8006180: e053 b.n 800622a + 800527a: 2303 movs r3, #3 + 800527c: e053 b.n 8005326 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8006182: 4b2d ldr r3, [pc, #180] @ (8006238 ) - 8006184: 685b ldr r3, [r3, #4] - 8006186: f003 020c and.w r2, r3, #12 - 800618a: 687b ldr r3, [r7, #4] - 800618c: 685b ldr r3, [r3, #4] - 800618e: 009b lsls r3, r3, #2 - 8006190: 429a cmp r2, r3 - 8006192: d1eb bne.n 800616c + 800527e: 4b2d ldr r3, [pc, #180] @ (8005334 ) + 8005280: 685b ldr r3, [r3, #4] + 8005282: f003 020c and.w r2, r3, #12 + 8005286: 687b ldr r3, [r7, #4] + 8005288: 685b ldr r3, [r3, #4] + 800528a: 009b lsls r3, r3, #2 + 800528c: 429a cmp r2, r3 + 800528e: d1eb bne.n 8005268 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) - 8006194: 4b27 ldr r3, [pc, #156] @ (8006234 ) - 8006196: 681b ldr r3, [r3, #0] - 8006198: f003 0307 and.w r3, r3, #7 - 800619c: 683a ldr r2, [r7, #0] - 800619e: 429a cmp r2, r3 - 80061a0: d210 bcs.n 80061c4 + 8005290: 4b27 ldr r3, [pc, #156] @ (8005330 ) + 8005292: 681b ldr r3, [r3, #0] + 8005294: f003 0307 and.w r3, r3, #7 + 8005298: 683a ldr r2, [r7, #0] + 800529a: 429a cmp r2, r3 + 800529c: d210 bcs.n 80052c0 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 80061a2: 4b24 ldr r3, [pc, #144] @ (8006234 ) - 80061a4: 681b ldr r3, [r3, #0] - 80061a6: f023 0207 bic.w r2, r3, #7 - 80061aa: 4922 ldr r1, [pc, #136] @ (8006234 ) - 80061ac: 683b ldr r3, [r7, #0] - 80061ae: 4313 orrs r3, r2 - 80061b0: 600b str r3, [r1, #0] + 800529e: 4b24 ldr r3, [pc, #144] @ (8005330 ) + 80052a0: 681b ldr r3, [r3, #0] + 80052a2: f023 0207 bic.w r2, r3, #7 + 80052a6: 4922 ldr r1, [pc, #136] @ (8005330 ) + 80052a8: 683b ldr r3, [r7, #0] + 80052aa: 4313 orrs r3, r2 + 80052ac: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 80061b2: 4b20 ldr r3, [pc, #128] @ (8006234 ) - 80061b4: 681b ldr r3, [r3, #0] - 80061b6: f003 0307 and.w r3, r3, #7 - 80061ba: 683a ldr r2, [r7, #0] - 80061bc: 429a cmp r2, r3 - 80061be: d001 beq.n 80061c4 + 80052ae: 4b20 ldr r3, [pc, #128] @ (8005330 ) + 80052b0: 681b ldr r3, [r3, #0] + 80052b2: f003 0307 and.w r3, r3, #7 + 80052b6: 683a ldr r2, [r7, #0] + 80052b8: 429a cmp r2, r3 + 80052ba: d001 beq.n 80052c0 { return HAL_ERROR; - 80061c0: 2301 movs r3, #1 - 80061c2: e032 b.n 800622a + 80052bc: 2301 movs r3, #1 + 80052be: e032 b.n 8005326 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 80061c4: 687b ldr r3, [r7, #4] - 80061c6: 681b ldr r3, [r3, #0] - 80061c8: f003 0304 and.w r3, r3, #4 - 80061cc: 2b00 cmp r3, #0 - 80061ce: d008 beq.n 80061e2 + 80052c0: 687b ldr r3, [r7, #4] + 80052c2: 681b ldr r3, [r3, #0] + 80052c4: f003 0304 and.w r3, r3, #4 + 80052c8: 2b00 cmp r3, #0 + 80052ca: d008 beq.n 80052de { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 80061d0: 4b19 ldr r3, [pc, #100] @ (8006238 ) - 80061d2: 685b ldr r3, [r3, #4] - 80061d4: f423 62e0 bic.w r2, r3, #1792 @ 0x700 - 80061d8: 687b ldr r3, [r7, #4] - 80061da: 68db ldr r3, [r3, #12] - 80061dc: 4916 ldr r1, [pc, #88] @ (8006238 ) - 80061de: 4313 orrs r3, r2 - 80061e0: 604b str r3, [r1, #4] + 80052cc: 4b19 ldr r3, [pc, #100] @ (8005334 ) + 80052ce: 685b ldr r3, [r3, #4] + 80052d0: f423 62e0 bic.w r2, r3, #1792 @ 0x700 + 80052d4: 687b ldr r3, [r7, #4] + 80052d6: 68db ldr r3, [r3, #12] + 80052d8: 4916 ldr r1, [pc, #88] @ (8005334 ) + 80052da: 4313 orrs r3, r2 + 80052dc: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 80061e2: 687b ldr r3, [r7, #4] - 80061e4: 681b ldr r3, [r3, #0] - 80061e6: f003 0308 and.w r3, r3, #8 - 80061ea: 2b00 cmp r3, #0 - 80061ec: d009 beq.n 8006202 + 80052de: 687b ldr r3, [r7, #4] + 80052e0: 681b ldr r3, [r3, #0] + 80052e2: f003 0308 and.w r3, r3, #8 + 80052e6: 2b00 cmp r3, #0 + 80052e8: d009 beq.n 80052fe { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); - 80061ee: 4b12 ldr r3, [pc, #72] @ (8006238 ) - 80061f0: 685b ldr r3, [r3, #4] - 80061f2: f423 5260 bic.w r2, r3, #14336 @ 0x3800 - 80061f6: 687b ldr r3, [r7, #4] - 80061f8: 691b ldr r3, [r3, #16] - 80061fa: 00db lsls r3, r3, #3 - 80061fc: 490e ldr r1, [pc, #56] @ (8006238 ) - 80061fe: 4313 orrs r3, r2 - 8006200: 604b str r3, [r1, #4] + 80052ea: 4b12 ldr r3, [pc, #72] @ (8005334 ) + 80052ec: 685b ldr r3, [r3, #4] + 80052ee: f423 5260 bic.w r2, r3, #14336 @ 0x3800 + 80052f2: 687b ldr r3, [r7, #4] + 80052f4: 691b ldr r3, [r3, #16] + 80052f6: 00db lsls r3, r3, #3 + 80052f8: 490e ldr r1, [pc, #56] @ (8005334 ) + 80052fa: 4313 orrs r3, r2 + 80052fc: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; - 8006202: f000 f821 bl 8006248 - 8006206: 4602 mov r2, r0 - 8006208: 4b0b ldr r3, [pc, #44] @ (8006238 ) - 800620a: 685b ldr r3, [r3, #4] - 800620c: 091b lsrs r3, r3, #4 - 800620e: f003 030f and.w r3, r3, #15 - 8006212: 490a ldr r1, [pc, #40] @ (800623c ) - 8006214: 5ccb ldrb r3, [r1, r3] - 8006216: fa22 f303 lsr.w r3, r2, r3 - 800621a: 4a09 ldr r2, [pc, #36] @ (8006240 ) - 800621c: 6013 str r3, [r2, #0] + 80052fe: f000 f821 bl 8005344 + 8005302: 4602 mov r2, r0 + 8005304: 4b0b ldr r3, [pc, #44] @ (8005334 ) + 8005306: 685b ldr r3, [r3, #4] + 8005308: 091b lsrs r3, r3, #4 + 800530a: f003 030f and.w r3, r3, #15 + 800530e: 490a ldr r1, [pc, #40] @ (8005338 ) + 8005310: 5ccb ldrb r3, [r1, r3] + 8005312: fa22 f303 lsr.w r3, r2, r3 + 8005316: 4a09 ldr r2, [pc, #36] @ (800533c ) + 8005318: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); - 800621e: 4b09 ldr r3, [pc, #36] @ (8006244 ) - 8006220: 681b ldr r3, [r3, #0] - 8006222: 4618 mov r0, r3 - 8006224: f7fd f814 bl 8003250 + 800531a: 4b09 ldr r3, [pc, #36] @ (8005340 ) + 800531c: 681b ldr r3, [r3, #0] + 800531e: 4618 mov r0, r3 + 8005320: f7fd fc62 bl 8002be8 return HAL_OK; - 8006228: 2300 movs r3, #0 + 8005324: 2300 movs r3, #0 } - 800622a: 4618 mov r0, r3 - 800622c: 3710 adds r7, #16 - 800622e: 46bd mov sp, r7 - 8006230: bd80 pop {r7, pc} - 8006232: bf00 nop - 8006234: 40022000 .word 0x40022000 - 8006238: 40021000 .word 0x40021000 - 800623c: 08007a60 .word 0x08007a60 - 8006240: 20000024 .word 0x20000024 - 8006244: 20000028 .word 0x20000028 + 8005326: 4618 mov r0, r3 + 8005328: 3710 adds r7, #16 + 800532a: 46bd mov sp, r7 + 800532c: bd80 pop {r7, pc} + 800532e: bf00 nop + 8005330: 40022000 .word 0x40022000 + 8005334: 40021000 .word 0x40021000 + 8005338: 08006468 .word 0x08006468 + 800533c: 20000018 .word 0x20000018 + 8005340: 2000001c .word 0x2000001c -08006248 : +08005344 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 8006248: b480 push {r7} - 800624a: b087 sub sp, #28 - 800624c: af00 add r7, sp, #0 + 8005344: b480 push {r7} + 8005346: b087 sub sp, #28 + 8005348: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; - 800624e: 2300 movs r3, #0 - 8006250: 60fb str r3, [r7, #12] - 8006252: 2300 movs r3, #0 - 8006254: 60bb str r3, [r7, #8] - 8006256: 2300 movs r3, #0 - 8006258: 617b str r3, [r7, #20] - 800625a: 2300 movs r3, #0 - 800625c: 607b str r3, [r7, #4] + 800534a: 2300 movs r3, #0 + 800534c: 60fb str r3, [r7, #12] + 800534e: 2300 movs r3, #0 + 8005350: 60bb str r3, [r7, #8] + 8005352: 2300 movs r3, #0 + 8005354: 617b str r3, [r7, #20] + 8005356: 2300 movs r3, #0 + 8005358: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; - 800625e: 2300 movs r3, #0 - 8006260: 613b str r3, [r7, #16] + 800535a: 2300 movs r3, #0 + 800535c: 613b str r3, [r7, #16] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; - 8006262: 4b1e ldr r3, [pc, #120] @ (80062dc ) - 8006264: 685b ldr r3, [r3, #4] - 8006266: 60fb str r3, [r7, #12] + 800535e: 4b1e ldr r3, [pc, #120] @ (80053d8 ) + 8005360: 685b ldr r3, [r3, #4] + 8005362: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 8006268: 68fb ldr r3, [r7, #12] - 800626a: f003 030c and.w r3, r3, #12 - 800626e: 2b04 cmp r3, #4 - 8006270: d002 beq.n 8006278 - 8006272: 2b08 cmp r3, #8 - 8006274: d003 beq.n 800627e - 8006276: e027 b.n 80062c8 + 8005364: 68fb ldr r3, [r7, #12] + 8005366: f003 030c and.w r3, r3, #12 + 800536a: 2b04 cmp r3, #4 + 800536c: d002 beq.n 8005374 + 800536e: 2b08 cmp r3, #8 + 8005370: d003 beq.n 800537a + 8005372: e027 b.n 80053c4 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 8006278: 4b19 ldr r3, [pc, #100] @ (80062e0 ) - 800627a: 613b str r3, [r7, #16] + 8005374: 4b19 ldr r3, [pc, #100] @ (80053dc ) + 8005376: 613b str r3, [r7, #16] break; - 800627c: e027 b.n 80062ce + 8005378: e027 b.n 80053ca } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; - 800627e: 68fb ldr r3, [r7, #12] - 8006280: 0c9b lsrs r3, r3, #18 - 8006282: f003 030f and.w r3, r3, #15 - 8006286: 4a17 ldr r2, [pc, #92] @ (80062e4 ) - 8006288: 5cd3 ldrb r3, [r2, r3] - 800628a: 607b str r3, [r7, #4] + 800537a: 68fb ldr r3, [r7, #12] + 800537c: 0c9b lsrs r3, r3, #18 + 800537e: f003 030f and.w r3, r3, #15 + 8005382: 4a17 ldr r2, [pc, #92] @ (80053e0 ) + 8005384: 5cd3 ldrb r3, [r2, r3] + 8005386: 607b str r3, [r7, #4] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) - 800628c: 68fb ldr r3, [r7, #12] - 800628e: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8006292: 2b00 cmp r3, #0 - 8006294: d010 beq.n 80062b8 + 8005388: 68fb ldr r3, [r7, #12] + 800538a: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 800538e: 2b00 cmp r3, #0 + 8005390: d010 beq.n 80053b4 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; - 8006296: 4b11 ldr r3, [pc, #68] @ (80062dc ) - 8006298: 685b ldr r3, [r3, #4] - 800629a: 0c5b lsrs r3, r3, #17 - 800629c: f003 0301 and.w r3, r3, #1 - 80062a0: 4a11 ldr r2, [pc, #68] @ (80062e8 ) - 80062a2: 5cd3 ldrb r3, [r2, r3] - 80062a4: 60bb str r3, [r7, #8] + 8005392: 4b11 ldr r3, [pc, #68] @ (80053d8 ) + 8005394: 685b ldr r3, [r3, #4] + 8005396: 0c5b lsrs r3, r3, #17 + 8005398: f003 0301 and.w r3, r3, #1 + 800539c: 4a11 ldr r2, [pc, #68] @ (80053e4 ) + 800539e: 5cd3 ldrb r3, [r2, r3] + 80053a0: 60bb str r3, [r7, #8] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); - 80062a6: 687b ldr r3, [r7, #4] - 80062a8: 4a0d ldr r2, [pc, #52] @ (80062e0 ) - 80062aa: fb03 f202 mul.w r2, r3, r2 - 80062ae: 68bb ldr r3, [r7, #8] - 80062b0: fbb2 f3f3 udiv r3, r2, r3 - 80062b4: 617b str r3, [r7, #20] - 80062b6: e004 b.n 80062c2 + 80053a2: 687b ldr r3, [r7, #4] + 80053a4: 4a0d ldr r2, [pc, #52] @ (80053dc ) + 80053a6: fb03 f202 mul.w r2, r3, r2 + 80053aa: 68bb ldr r3, [r7, #8] + 80053ac: fbb2 f3f3 udiv r3, r2, r3 + 80053b0: 617b str r3, [r7, #20] + 80053b2: e004 b.n 80053be #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); - 80062b8: 687b ldr r3, [r7, #4] - 80062ba: 4a0c ldr r2, [pc, #48] @ (80062ec ) - 80062bc: fb02 f303 mul.w r3, r2, r3 - 80062c0: 617b str r3, [r7, #20] + 80053b4: 687b ldr r3, [r7, #4] + 80053b6: 4a0c ldr r2, [pc, #48] @ (80053e8 ) + 80053b8: fb02 f303 mul.w r3, r2, r3 + 80053bc: 617b str r3, [r7, #20] } sysclockfreq = pllclk; - 80062c2: 697b ldr r3, [r7, #20] - 80062c4: 613b str r3, [r7, #16] + 80053be: 697b ldr r3, [r7, #20] + 80053c0: 613b str r3, [r7, #16] break; - 80062c6: e002 b.n 80062ce + 80053c2: e002 b.n 80053ca } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; - 80062c8: 4b09 ldr r3, [pc, #36] @ (80062f0 ) - 80062ca: 613b str r3, [r7, #16] + 80053c4: 4b09 ldr r3, [pc, #36] @ (80053ec ) + 80053c6: 613b str r3, [r7, #16] break; - 80062cc: bf00 nop + 80053c8: bf00 nop } } return sysclockfreq; - 80062ce: 693b ldr r3, [r7, #16] + 80053ca: 693b ldr r3, [r7, #16] } - 80062d0: 4618 mov r0, r3 - 80062d2: 371c adds r7, #28 - 80062d4: 46bd mov sp, r7 - 80062d6: bc80 pop {r7} - 80062d8: 4770 bx lr - 80062da: bf00 nop - 80062dc: 40021000 .word 0x40021000 - 80062e0: 00b71b00 .word 0x00b71b00 - 80062e4: 08007a78 .word 0x08007a78 - 80062e8: 08007a88 .word 0x08007a88 - 80062ec: 003d0900 .word 0x003d0900 - 80062f0: 007a1200 .word 0x007a1200 + 80053cc: 4618 mov r0, r3 + 80053ce: 371c adds r7, #28 + 80053d0: 46bd mov sp, r7 + 80053d2: bc80 pop {r7} + 80053d4: 4770 bx lr + 80053d6: bf00 nop + 80053d8: 40021000 .word 0x40021000 + 80053dc: 00b71b00 .word 0x00b71b00 + 80053e0: 08006480 .word 0x08006480 + 80053e4: 08006490 .word 0x08006490 + 80053e8: 003d0900 .word 0x003d0900 + 80053ec: 007a1200 .word 0x007a1200 -080062f4 : +080053f0 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 80062f4: b480 push {r7} - 80062f6: af00 add r7, sp, #0 + 80053f0: b480 push {r7} + 80053f2: af00 add r7, sp, #0 return SystemCoreClock; - 80062f8: 4b02 ldr r3, [pc, #8] @ (8006304 ) - 80062fa: 681b ldr r3, [r3, #0] + 80053f4: 4b02 ldr r3, [pc, #8] @ (8005400 ) + 80053f6: 681b ldr r3, [r3, #0] } - 80062fc: 4618 mov r0, r3 - 80062fe: 46bd mov sp, r7 - 8006300: bc80 pop {r7} - 8006302: 4770 bx lr - 8006304: 20000024 .word 0x20000024 + 80053f8: 4618 mov r0, r3 + 80053fa: 46bd mov sp, r7 + 80053fc: bc80 pop {r7} + 80053fe: 4770 bx lr + 8005400: 20000018 .word 0x20000018 -08006308 : +08005404 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 8006308: b580 push {r7, lr} - 800630a: af00 add r7, sp, #0 + 8005404: b580 push {r7, lr} + 8005406: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); - 800630c: f7ff fff2 bl 80062f4 - 8006310: 4602 mov r2, r0 - 8006312: 4b05 ldr r3, [pc, #20] @ (8006328 ) - 8006314: 685b ldr r3, [r3, #4] - 8006316: 0a1b lsrs r3, r3, #8 - 8006318: f003 0307 and.w r3, r3, #7 - 800631c: 4903 ldr r1, [pc, #12] @ (800632c ) - 800631e: 5ccb ldrb r3, [r1, r3] - 8006320: fa22 f303 lsr.w r3, r2, r3 + 8005408: f7ff fff2 bl 80053f0 + 800540c: 4602 mov r2, r0 + 800540e: 4b05 ldr r3, [pc, #20] @ (8005424 ) + 8005410: 685b ldr r3, [r3, #4] + 8005412: 0a1b lsrs r3, r3, #8 + 8005414: f003 0307 and.w r3, r3, #7 + 8005418: 4903 ldr r1, [pc, #12] @ (8005428 ) + 800541a: 5ccb ldrb r3, [r1, r3] + 800541c: fa22 f303 lsr.w r3, r2, r3 } - 8006324: 4618 mov r0, r3 - 8006326: bd80 pop {r7, pc} - 8006328: 40021000 .word 0x40021000 - 800632c: 08007a70 .word 0x08007a70 + 8005420: 4618 mov r0, r3 + 8005422: bd80 pop {r7, pc} + 8005424: 40021000 .word 0x40021000 + 8005428: 08006478 .word 0x08006478 -08006330 : +0800542c : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 8006330: b580 push {r7, lr} - 8006332: af00 add r7, sp, #0 + 800542c: b580 push {r7, lr} + 800542e: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); - 8006334: f7ff ffde bl 80062f4 - 8006338: 4602 mov r2, r0 - 800633a: 4b05 ldr r3, [pc, #20] @ (8006350 ) - 800633c: 685b ldr r3, [r3, #4] - 800633e: 0adb lsrs r3, r3, #11 - 8006340: f003 0307 and.w r3, r3, #7 - 8006344: 4903 ldr r1, [pc, #12] @ (8006354 ) - 8006346: 5ccb ldrb r3, [r1, r3] - 8006348: fa22 f303 lsr.w r3, r2, r3 + 8005430: f7ff ffde bl 80053f0 + 8005434: 4602 mov r2, r0 + 8005436: 4b05 ldr r3, [pc, #20] @ (800544c ) + 8005438: 685b ldr r3, [r3, #4] + 800543a: 0adb lsrs r3, r3, #11 + 800543c: f003 0307 and.w r3, r3, #7 + 8005440: 4903 ldr r1, [pc, #12] @ (8005450 ) + 8005442: 5ccb ldrb r3, [r1, r3] + 8005444: fa22 f303 lsr.w r3, r2, r3 } - 800634c: 4618 mov r0, r3 - 800634e: bd80 pop {r7, pc} - 8006350: 40021000 .word 0x40021000 - 8006354: 08007a70 .word 0x08007a70 + 8005448: 4618 mov r0, r3 + 800544a: bd80 pop {r7, pc} + 800544c: 40021000 .word 0x40021000 + 8005450: 08006478 .word 0x08006478 -08006358 : +08005454 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { - 8006358: b480 push {r7} - 800635a: b085 sub sp, #20 - 800635c: af00 add r7, sp, #0 - 800635e: 6078 str r0, [r7, #4] + 8005454: b480 push {r7} + 8005456: b085 sub sp, #20 + 8005458: af00 add r7, sp, #0 + 800545a: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); - 8006360: 4b0a ldr r3, [pc, #40] @ (800638c ) - 8006362: 681b ldr r3, [r3, #0] - 8006364: 4a0a ldr r2, [pc, #40] @ (8006390 ) - 8006366: fba2 2303 umull r2, r3, r2, r3 - 800636a: 0a5b lsrs r3, r3, #9 - 800636c: 687a ldr r2, [r7, #4] - 800636e: fb02 f303 mul.w r3, r2, r3 - 8006372: 60fb str r3, [r7, #12] + 800545c: 4b0a ldr r3, [pc, #40] @ (8005488 ) + 800545e: 681b ldr r3, [r3, #0] + 8005460: 4a0a ldr r2, [pc, #40] @ (800548c ) + 8005462: fba2 2303 umull r2, r3, r2, r3 + 8005466: 0a5b lsrs r3, r3, #9 + 8005468: 687a ldr r2, [r7, #4] + 800546a: fb02 f303 mul.w r3, r2, r3 + 800546e: 60fb str r3, [r7, #12] do { __NOP(); - 8006374: bf00 nop + 8005470: bf00 nop } while (Delay --); - 8006376: 68fb ldr r3, [r7, #12] - 8006378: 1e5a subs r2, r3, #1 - 800637a: 60fa str r2, [r7, #12] - 800637c: 2b00 cmp r3, #0 - 800637e: d1f9 bne.n 8006374 + 8005472: 68fb ldr r3, [r7, #12] + 8005474: 1e5a subs r2, r3, #1 + 8005476: 60fa str r2, [r7, #12] + 8005478: 2b00 cmp r3, #0 + 800547a: d1f9 bne.n 8005470 } - 8006380: bf00 nop - 8006382: bf00 nop - 8006384: 3714 adds r7, #20 - 8006386: 46bd mov sp, r7 - 8006388: bc80 pop {r7} - 800638a: 4770 bx lr - 800638c: 20000024 .word 0x20000024 - 8006390: 10624dd3 .word 0x10624dd3 + 800547c: bf00 nop + 800547e: bf00 nop + 8005480: 3714 adds r7, #20 + 8005482: 46bd mov sp, r7 + 8005484: bc80 pop {r7} + 8005486: 4770 bx lr + 8005488: 20000018 .word 0x20000018 + 800548c: 10624dd3 .word 0x10624dd3 -08006394 : +08005490 : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 8006394: b580 push {r7, lr} - 8006396: b086 sub sp, #24 - 8006398: af00 add r7, sp, #0 - 800639a: 6078 str r0, [r7, #4] + 8005490: b580 push {r7, lr} + 8005492: b086 sub sp, #24 + 8005494: af00 add r7, sp, #0 + 8005496: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; - 800639c: 2300 movs r3, #0 - 800639e: 613b str r3, [r7, #16] - 80063a0: 2300 movs r3, #0 - 80063a2: 60fb str r3, [r7, #12] + 8005498: 2300 movs r3, #0 + 800549a: 613b str r3, [r7, #16] + 800549c: 2300 movs r3, #0 + 800549e: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) - 80063a4: 687b ldr r3, [r7, #4] - 80063a6: 681b ldr r3, [r3, #0] - 80063a8: f003 0301 and.w r3, r3, #1 - 80063ac: 2b00 cmp r3, #0 - 80063ae: d07d beq.n 80064ac + 80054a0: 687b ldr r3, [r7, #4] + 80054a2: 681b ldr r3, [r3, #0] + 80054a4: f003 0301 and.w r3, r3, #1 + 80054a8: 2b00 cmp r3, #0 + 80054aa: d07d beq.n 80055a8 { FlagStatus pwrclkchanged = RESET; - 80063b0: 2300 movs r3, #0 - 80063b2: 75fb strb r3, [r7, #23] + 80054ac: 2300 movs r3, #0 + 80054ae: 75fb strb r3, [r7, #23] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 80063b4: 4b4f ldr r3, [pc, #316] @ (80064f4 ) - 80063b6: 69db ldr r3, [r3, #28] - 80063b8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 80063bc: 2b00 cmp r3, #0 - 80063be: d10d bne.n 80063dc + 80054b0: 4b4f ldr r3, [pc, #316] @ (80055f0 ) + 80054b2: 69db ldr r3, [r3, #28] + 80054b4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80054b8: 2b00 cmp r3, #0 + 80054ba: d10d bne.n 80054d8 { __HAL_RCC_PWR_CLK_ENABLE(); - 80063c0: 4b4c ldr r3, [pc, #304] @ (80064f4 ) - 80063c2: 69db ldr r3, [r3, #28] - 80063c4: 4a4b ldr r2, [pc, #300] @ (80064f4 ) - 80063c6: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 80063ca: 61d3 str r3, [r2, #28] - 80063cc: 4b49 ldr r3, [pc, #292] @ (80064f4 ) - 80063ce: 69db ldr r3, [r3, #28] - 80063d0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 80063d4: 60bb str r3, [r7, #8] - 80063d6: 68bb ldr r3, [r7, #8] + 80054bc: 4b4c ldr r3, [pc, #304] @ (80055f0 ) + 80054be: 69db ldr r3, [r3, #28] + 80054c0: 4a4b ldr r2, [pc, #300] @ (80055f0 ) + 80054c2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 80054c6: 61d3 str r3, [r2, #28] + 80054c8: 4b49 ldr r3, [pc, #292] @ (80055f0 ) + 80054ca: 69db ldr r3, [r3, #28] + 80054cc: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80054d0: 60bb str r3, [r7, #8] + 80054d2: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 80063d8: 2301 movs r3, #1 - 80063da: 75fb strb r3, [r7, #23] + 80054d4: 2301 movs r3, #1 + 80054d6: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80063dc: 4b46 ldr r3, [pc, #280] @ (80064f8 ) - 80063de: 681b ldr r3, [r3, #0] - 80063e0: f403 7380 and.w r3, r3, #256 @ 0x100 - 80063e4: 2b00 cmp r3, #0 - 80063e6: d118 bne.n 800641a + 80054d8: 4b46 ldr r3, [pc, #280] @ (80055f4 ) + 80054da: 681b ldr r3, [r3, #0] + 80054dc: f403 7380 and.w r3, r3, #256 @ 0x100 + 80054e0: 2b00 cmp r3, #0 + 80054e2: d118 bne.n 8005516 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 80063e8: 4b43 ldr r3, [pc, #268] @ (80064f8 ) - 80063ea: 681b ldr r3, [r3, #0] - 80063ec: 4a42 ldr r2, [pc, #264] @ (80064f8 ) - 80063ee: f443 7380 orr.w r3, r3, #256 @ 0x100 - 80063f2: 6013 str r3, [r2, #0] + 80054e4: 4b43 ldr r3, [pc, #268] @ (80055f4 ) + 80054e6: 681b ldr r3, [r3, #0] + 80054e8: 4a42 ldr r2, [pc, #264] @ (80055f4 ) + 80054ea: f443 7380 orr.w r3, r3, #256 @ 0x100 + 80054ee: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 80063f4: f7fc ff6e bl 80032d4 - 80063f8: 6138 str r0, [r7, #16] + 80054f0: f7fd fbbc bl 8002c6c + 80054f4: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80063fa: e008 b.n 800640e + 80054f6: e008 b.n 800550a { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 80063fc: f7fc ff6a bl 80032d4 - 8006400: 4602 mov r2, r0 - 8006402: 693b ldr r3, [r7, #16] - 8006404: 1ad3 subs r3, r2, r3 - 8006406: 2b64 cmp r3, #100 @ 0x64 - 8006408: d901 bls.n 800640e + 80054f8: f7fd fbb8 bl 8002c6c + 80054fc: 4602 mov r2, r0 + 80054fe: 693b ldr r3, [r7, #16] + 8005500: 1ad3 subs r3, r2, r3 + 8005502: 2b64 cmp r3, #100 @ 0x64 + 8005504: d901 bls.n 800550a { return HAL_TIMEOUT; - 800640a: 2303 movs r3, #3 - 800640c: e06d b.n 80064ea + 8005506: 2303 movs r3, #3 + 8005508: e06d b.n 80055e6 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800640e: 4b3a ldr r3, [pc, #232] @ (80064f8 ) - 8006410: 681b ldr r3, [r3, #0] - 8006412: f403 7380 and.w r3, r3, #256 @ 0x100 - 8006416: 2b00 cmp r3, #0 - 8006418: d0f0 beq.n 80063fc + 800550a: 4b3a ldr r3, [pc, #232] @ (80055f4 ) + 800550c: 681b ldr r3, [r3, #0] + 800550e: f403 7380 and.w r3, r3, #256 @ 0x100 + 8005512: 2b00 cmp r3, #0 + 8005514: d0f0 beq.n 80054f8 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); - 800641a: 4b36 ldr r3, [pc, #216] @ (80064f4 ) - 800641c: 6a1b ldr r3, [r3, #32] - 800641e: f403 7340 and.w r3, r3, #768 @ 0x300 - 8006422: 60fb str r3, [r7, #12] + 8005516: 4b36 ldr r3, [pc, #216] @ (80055f0 ) + 8005518: 6a1b ldr r3, [r3, #32] + 800551a: f403 7340 and.w r3, r3, #768 @ 0x300 + 800551e: 60fb str r3, [r7, #12] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) - 8006424: 68fb ldr r3, [r7, #12] - 8006426: 2b00 cmp r3, #0 - 8006428: d02e beq.n 8006488 - 800642a: 687b ldr r3, [r7, #4] - 800642c: 685b ldr r3, [r3, #4] - 800642e: f403 7340 and.w r3, r3, #768 @ 0x300 - 8006432: 68fa ldr r2, [r7, #12] - 8006434: 429a cmp r2, r3 - 8006436: d027 beq.n 8006488 + 8005520: 68fb ldr r3, [r7, #12] + 8005522: 2b00 cmp r3, #0 + 8005524: d02e beq.n 8005584 + 8005526: 687b ldr r3, [r7, #4] + 8005528: 685b ldr r3, [r3, #4] + 800552a: f403 7340 and.w r3, r3, #768 @ 0x300 + 800552e: 68fa ldr r2, [r7, #12] + 8005530: 429a cmp r2, r3 + 8005532: d027 beq.n 8005584 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); - 8006438: 4b2e ldr r3, [pc, #184] @ (80064f4 ) - 800643a: 6a1b ldr r3, [r3, #32] - 800643c: f423 7340 bic.w r3, r3, #768 @ 0x300 - 8006440: 60fb str r3, [r7, #12] + 8005534: 4b2e ldr r3, [pc, #184] @ (80055f0 ) + 8005536: 6a1b ldr r3, [r3, #32] + 8005538: f423 7340 bic.w r3, r3, #768 @ 0x300 + 800553c: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); - 8006442: 4b2e ldr r3, [pc, #184] @ (80064fc ) - 8006444: 2201 movs r2, #1 - 8006446: 601a str r2, [r3, #0] + 800553e: 4b2e ldr r3, [pc, #184] @ (80055f8 ) + 8005540: 2201 movs r2, #1 + 8005542: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); - 8006448: 4b2c ldr r3, [pc, #176] @ (80064fc ) - 800644a: 2200 movs r2, #0 - 800644c: 601a str r2, [r3, #0] + 8005544: 4b2c ldr r3, [pc, #176] @ (80055f8 ) + 8005546: 2200 movs r2, #0 + 8005548: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; - 800644e: 4a29 ldr r2, [pc, #164] @ (80064f4 ) - 8006450: 68fb ldr r3, [r7, #12] - 8006452: 6213 str r3, [r2, #32] + 800554a: 4a29 ldr r2, [pc, #164] @ (80055f0 ) + 800554c: 68fb ldr r3, [r7, #12] + 800554e: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) - 8006454: 68fb ldr r3, [r7, #12] - 8006456: f003 0301 and.w r3, r3, #1 - 800645a: 2b00 cmp r3, #0 - 800645c: d014 beq.n 8006488 + 8005550: 68fb ldr r3, [r7, #12] + 8005552: f003 0301 and.w r3, r3, #1 + 8005556: 2b00 cmp r3, #0 + 8005558: d014 beq.n 8005584 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 800645e: f7fc ff39 bl 80032d4 - 8006462: 6138 str r0, [r7, #16] + 800555a: f7fd fb87 bl 8002c6c + 800555e: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8006464: e00a b.n 800647c + 8005560: e00a b.n 8005578 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8006466: f7fc ff35 bl 80032d4 - 800646a: 4602 mov r2, r0 - 800646c: 693b ldr r3, [r7, #16] - 800646e: 1ad3 subs r3, r2, r3 - 8006470: f241 3288 movw r2, #5000 @ 0x1388 - 8006474: 4293 cmp r3, r2 - 8006476: d901 bls.n 800647c + 8005562: f7fd fb83 bl 8002c6c + 8005566: 4602 mov r2, r0 + 8005568: 693b ldr r3, [r7, #16] + 800556a: 1ad3 subs r3, r2, r3 + 800556c: f241 3288 movw r2, #5000 @ 0x1388 + 8005570: 4293 cmp r3, r2 + 8005572: d901 bls.n 8005578 { return HAL_TIMEOUT; - 8006478: 2303 movs r3, #3 - 800647a: e036 b.n 80064ea + 8005574: 2303 movs r3, #3 + 8005576: e036 b.n 80055e6 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 800647c: 4b1d ldr r3, [pc, #116] @ (80064f4 ) - 800647e: 6a1b ldr r3, [r3, #32] - 8006480: f003 0302 and.w r3, r3, #2 - 8006484: 2b00 cmp r3, #0 - 8006486: d0ee beq.n 8006466 + 8005578: 4b1d ldr r3, [pc, #116] @ (80055f0 ) + 800557a: 6a1b ldr r3, [r3, #32] + 800557c: f003 0302 and.w r3, r3, #2 + 8005580: 2b00 cmp r3, #0 + 8005582: d0ee beq.n 8005562 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 8006488: 4b1a ldr r3, [pc, #104] @ (80064f4 ) - 800648a: 6a1b ldr r3, [r3, #32] - 800648c: f423 7240 bic.w r2, r3, #768 @ 0x300 - 8006490: 687b ldr r3, [r7, #4] - 8006492: 685b ldr r3, [r3, #4] - 8006494: 4917 ldr r1, [pc, #92] @ (80064f4 ) - 8006496: 4313 orrs r3, r2 - 8006498: 620b str r3, [r1, #32] + 8005584: 4b1a ldr r3, [pc, #104] @ (80055f0 ) + 8005586: 6a1b ldr r3, [r3, #32] + 8005588: f423 7240 bic.w r2, r3, #768 @ 0x300 + 800558c: 687b ldr r3, [r7, #4] + 800558e: 685b ldr r3, [r3, #4] + 8005590: 4917 ldr r1, [pc, #92] @ (80055f0 ) + 8005592: 4313 orrs r3, r2 + 8005594: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) - 800649a: 7dfb ldrb r3, [r7, #23] - 800649c: 2b01 cmp r3, #1 - 800649e: d105 bne.n 80064ac + 8005596: 7dfb ldrb r3, [r7, #23] + 8005598: 2b01 cmp r3, #1 + 800559a: d105 bne.n 80055a8 { __HAL_RCC_PWR_CLK_DISABLE(); - 80064a0: 4b14 ldr r3, [pc, #80] @ (80064f4 ) - 80064a2: 69db ldr r3, [r3, #28] - 80064a4: 4a13 ldr r2, [pc, #76] @ (80064f4 ) - 80064a6: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 80064aa: 61d3 str r3, [r2, #28] + 800559c: 4b14 ldr r3, [pc, #80] @ (80055f0 ) + 800559e: 69db ldr r3, [r3, #28] + 80055a0: 4a13 ldr r2, [pc, #76] @ (80055f0 ) + 80055a2: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 80055a6: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - 80064ac: 687b ldr r3, [r7, #4] - 80064ae: 681b ldr r3, [r3, #0] - 80064b0: f003 0302 and.w r3, r3, #2 - 80064b4: 2b00 cmp r3, #0 - 80064b6: d008 beq.n 80064ca + 80055a8: 687b ldr r3, [r7, #4] + 80055aa: 681b ldr r3, [r3, #0] + 80055ac: f003 0302 and.w r3, r3, #2 + 80055b0: 2b00 cmp r3, #0 + 80055b2: d008 beq.n 80055c6 { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - 80064b8: 4b0e ldr r3, [pc, #56] @ (80064f4 ) - 80064ba: 685b ldr r3, [r3, #4] - 80064bc: f423 4240 bic.w r2, r3, #49152 @ 0xc000 - 80064c0: 687b ldr r3, [r7, #4] - 80064c2: 689b ldr r3, [r3, #8] - 80064c4: 490b ldr r1, [pc, #44] @ (80064f4 ) - 80064c6: 4313 orrs r3, r2 - 80064c8: 604b str r3, [r1, #4] + 80055b4: 4b0e ldr r3, [pc, #56] @ (80055f0 ) + 80055b6: 685b ldr r3, [r3, #4] + 80055b8: f423 4240 bic.w r2, r3, #49152 @ 0xc000 + 80055bc: 687b ldr r3, [r7, #4] + 80055be: 689b ldr r3, [r3, #8] + 80055c0: 490b ldr r1, [pc, #44] @ (80055f0 ) + 80055c2: 4313 orrs r3, r2 + 80055c4: 604b str r3, [r1, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) - 80064ca: 687b ldr r3, [r7, #4] - 80064cc: 681b ldr r3, [r3, #0] - 80064ce: f003 0310 and.w r3, r3, #16 - 80064d2: 2b00 cmp r3, #0 - 80064d4: d008 beq.n 80064e8 + 80055c6: 687b ldr r3, [r7, #4] + 80055c8: 681b ldr r3, [r3, #0] + 80055ca: f003 0310 and.w r3, r3, #16 + 80055ce: 2b00 cmp r3, #0 + 80055d0: d008 beq.n 80055e4 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); - 80064d6: 4b07 ldr r3, [pc, #28] @ (80064f4 ) - 80064d8: 685b ldr r3, [r3, #4] - 80064da: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 - 80064de: 687b ldr r3, [r7, #4] - 80064e0: 68db ldr r3, [r3, #12] - 80064e2: 4904 ldr r1, [pc, #16] @ (80064f4 ) - 80064e4: 4313 orrs r3, r2 - 80064e6: 604b str r3, [r1, #4] + 80055d2: 4b07 ldr r3, [pc, #28] @ (80055f0 ) + 80055d4: 685b ldr r3, [r3, #4] + 80055d6: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 + 80055da: 687b ldr r3, [r7, #4] + 80055dc: 68db ldr r3, [r3, #12] + 80055de: 4904 ldr r1, [pc, #16] @ (80055f0 ) + 80055e0: 4313 orrs r3, r2 + 80055e2: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; - 80064e8: 2300 movs r3, #0 + 80055e4: 2300 movs r3, #0 } - 80064ea: 4618 mov r0, r3 - 80064ec: 3718 adds r7, #24 - 80064ee: 46bd mov sp, r7 - 80064f0: bd80 pop {r7, pc} - 80064f2: bf00 nop - 80064f4: 40021000 .word 0x40021000 - 80064f8: 40007000 .word 0x40007000 - 80064fc: 42420440 .word 0x42420440 - -08006500 : - * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock - @endif - * @retval Frequency in Hz (0: means that no available frequency for the peripheral) - */ -uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) -{ - 8006500: b580 push {r7, lr} - 8006502: b088 sub sp, #32 - 8006504: af00 add r7, sp, #0 - 8006506: 6078 str r0, [r7, #4] -#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) || \ - defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) - static const uint8_t aPLLMULFactorTable[16U] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16}; - static const uint8_t aPredivFactorTable[2U] = {1, 2}; - - uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; - 8006508: 2300 movs r3, #0 - 800650a: 617b str r3, [r7, #20] - 800650c: 2300 movs r3, #0 - 800650e: 61fb str r3, [r7, #28] - 8006510: 2300 movs r3, #0 - 8006512: 613b str r3, [r7, #16] -#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG */ - uint32_t temp_reg = 0U, frequency = 0U; - 8006514: 2300 movs r3, #0 - 8006516: 60fb str r3, [r7, #12] - 8006518: 2300 movs r3, #0 - 800651a: 61bb str r3, [r7, #24] - - /* Check the parameters */ - assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); - - switch (PeriphClk) - 800651c: 687b ldr r3, [r7, #4] - 800651e: 2b10 cmp r3, #16 - 8006520: d00a beq.n 8006538 - 8006522: 687b ldr r3, [r7, #4] - 8006524: 2b10 cmp r3, #16 - 8006526: f200 8089 bhi.w 800663c - 800652a: 687b ldr r3, [r7, #4] - 800652c: 2b01 cmp r3, #1 - 800652e: d045 beq.n 80065bc - 8006530: 687b ldr r3, [r7, #4] - 8006532: 2b02 cmp r3, #2 - 8006534: d074 beq.n 8006620 - frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2); - break; - } - default: - { - break; - 8006536: e081 b.n 800663c - temp_reg = RCC->CFGR; - 8006538: 4b45 ldr r3, [pc, #276] @ (8006650 ) - 800653a: 685b ldr r3, [r3, #4] - 800653c: 60fb str r3, [r7, #12] - if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLON)) - 800653e: 4b44 ldr r3, [pc, #272] @ (8006650 ) - 8006540: 681b ldr r3, [r3, #0] - 8006542: f003 7380 and.w r3, r3, #16777216 @ 0x1000000 - 8006546: 2b00 cmp r3, #0 - 8006548: d07a beq.n 8006640 - pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; - 800654a: 68fb ldr r3, [r7, #12] - 800654c: 0c9b lsrs r3, r3, #18 - 800654e: f003 030f and.w r3, r3, #15 - 8006552: 4a40 ldr r2, [pc, #256] @ (8006654 ) - 8006554: 5cd3 ldrb r3, [r2, r3] - 8006556: 613b str r3, [r7, #16] - if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) - 8006558: 68fb ldr r3, [r7, #12] - 800655a: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 800655e: 2b00 cmp r3, #0 - 8006560: d015 beq.n 800658e - prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; - 8006562: 4b3b ldr r3, [pc, #236] @ (8006650 ) - 8006564: 685b ldr r3, [r3, #4] - 8006566: 0c5b lsrs r3, r3, #17 - 8006568: f003 0301 and.w r3, r3, #1 - 800656c: 4a3a ldr r2, [pc, #232] @ (8006658 ) - 800656e: 5cd3 ldrb r3, [r2, r3] - 8006570: 617b str r3, [r7, #20] - if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) - 8006572: 68fb ldr r3, [r7, #12] - 8006574: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8006578: 2b00 cmp r3, #0 - 800657a: d00d beq.n 8006598 - pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); - 800657c: 4a37 ldr r2, [pc, #220] @ (800665c ) - 800657e: 697b ldr r3, [r7, #20] - 8006580: fbb2 f2f3 udiv r2, r2, r3 - 8006584: 693b ldr r3, [r7, #16] - 8006586: fb02 f303 mul.w r3, r2, r3 - 800658a: 61fb str r3, [r7, #28] - 800658c: e004 b.n 8006598 - pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); - 800658e: 693b ldr r3, [r7, #16] - 8006590: 4a33 ldr r2, [pc, #204] @ (8006660 ) - 8006592: fb02 f303 mul.w r3, r2, r3 - 8006596: 61fb str r3, [r7, #28] - if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL) - 8006598: 4b2d ldr r3, [pc, #180] @ (8006650 ) - 800659a: 685b ldr r3, [r3, #4] - 800659c: f403 0380 and.w r3, r3, #4194304 @ 0x400000 - 80065a0: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 - 80065a4: d102 bne.n 80065ac - frequency = pllclk; - 80065a6: 69fb ldr r3, [r7, #28] - 80065a8: 61bb str r3, [r7, #24] - break; - 80065aa: e049 b.n 8006640 - frequency = (pllclk * 2) / 3; - 80065ac: 69fb ldr r3, [r7, #28] - 80065ae: 005b lsls r3, r3, #1 - 80065b0: 4a2c ldr r2, [pc, #176] @ (8006664 ) - 80065b2: fba2 2303 umull r2, r3, r2, r3 - 80065b6: 085b lsrs r3, r3, #1 - 80065b8: 61bb str r3, [r7, #24] - break; - 80065ba: e041 b.n 8006640 - temp_reg = RCC->BDCR; - 80065bc: 4b24 ldr r3, [pc, #144] @ (8006650 ) - 80065be: 6a1b ldr r3, [r3, #32] - 80065c0: 60fb str r3, [r7, #12] - if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY))) - 80065c2: 68fb ldr r3, [r7, #12] - 80065c4: f403 7340 and.w r3, r3, #768 @ 0x300 - 80065c8: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 80065cc: d108 bne.n 80065e0 - 80065ce: 68fb ldr r3, [r7, #12] - 80065d0: f003 0302 and.w r3, r3, #2 - 80065d4: 2b00 cmp r3, #0 - 80065d6: d003 beq.n 80065e0 - frequency = LSE_VALUE; - 80065d8: f44f 4300 mov.w r3, #32768 @ 0x8000 - 80065dc: 61bb str r3, [r7, #24] - 80065de: e01e b.n 800661e - else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) - 80065e0: 68fb ldr r3, [r7, #12] - 80065e2: f403 7340 and.w r3, r3, #768 @ 0x300 - 80065e6: f5b3 7f00 cmp.w r3, #512 @ 0x200 - 80065ea: d109 bne.n 8006600 - 80065ec: 4b18 ldr r3, [pc, #96] @ (8006650 ) - 80065ee: 6a5b ldr r3, [r3, #36] @ 0x24 - 80065f0: f003 0302 and.w r3, r3, #2 - 80065f4: 2b00 cmp r3, #0 - 80065f6: d003 beq.n 8006600 - frequency = LSI_VALUE; - 80065f8: f649 4340 movw r3, #40000 @ 0x9c40 - 80065fc: 61bb str r3, [r7, #24] - 80065fe: e00e b.n 800661e - else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) - 8006600: 68fb ldr r3, [r7, #12] - 8006602: f403 7340 and.w r3, r3, #768 @ 0x300 - 8006606: f5b3 7f40 cmp.w r3, #768 @ 0x300 - 800660a: d11b bne.n 8006644 - 800660c: 4b10 ldr r3, [pc, #64] @ (8006650 ) - 800660e: 681b ldr r3, [r3, #0] - 8006610: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8006614: 2b00 cmp r3, #0 - 8006616: d015 beq.n 8006644 - frequency = HSE_VALUE / 128U; - 8006618: 4b13 ldr r3, [pc, #76] @ (8006668 ) - 800661a: 61bb str r3, [r7, #24] - break; - 800661c: e012 b.n 8006644 - 800661e: e011 b.n 8006644 - frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 1) * 2); - 8006620: f7ff fe86 bl 8006330 - 8006624: 4602 mov r2, r0 - 8006626: 4b0a ldr r3, [pc, #40] @ (8006650 ) - 8006628: 685b ldr r3, [r3, #4] - 800662a: 0b9b lsrs r3, r3, #14 - 800662c: f003 0303 and.w r3, r3, #3 - 8006630: 3301 adds r3, #1 - 8006632: 005b lsls r3, r3, #1 - 8006634: fbb2 f3f3 udiv r3, r2, r3 - 8006638: 61bb str r3, [r7, #24] - break; - 800663a: e004 b.n 8006646 - break; - 800663c: bf00 nop - 800663e: e002 b.n 8006646 - break; - 8006640: bf00 nop - 8006642: e000 b.n 8006646 - break; - 8006644: bf00 nop - } - } - return (frequency); - 8006646: 69bb ldr r3, [r7, #24] -} - 8006648: 4618 mov r0, r3 - 800664a: 3720 adds r7, #32 - 800664c: 46bd mov sp, r7 - 800664e: bd80 pop {r7, pc} - 8006650: 40021000 .word 0x40021000 - 8006654: 08007a8c .word 0x08007a8c - 8006658: 08007a9c .word 0x08007a9c - 800665c: 00b71b00 .word 0x00b71b00 - 8006660: 003d0900 .word 0x003d0900 - 8006664: aaaaaaab .word 0xaaaaaaab - 8006668: 00016e36 .word 0x00016e36 - -0800666c : - * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) -{ - 800666c: b580 push {r7, lr} - 800666e: b082 sub sp, #8 - 8006670: af00 add r7, sp, #0 - 8006672: 6078 str r0, [r7, #4] - /* Check the TIM handle allocation */ - if (htim == NULL) - 8006674: 687b ldr r3, [r7, #4] - 8006676: 2b00 cmp r3, #0 - 8006678: d101 bne.n 800667e - { - return HAL_ERROR; - 800667a: 2301 movs r3, #1 - 800667c: e041 b.n 8006702 - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_PERIOD(htim->Init.Period)); - assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - - if (htim->State == HAL_TIM_STATE_RESET) - 800667e: 687b ldr r3, [r7, #4] - 8006680: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8006684: b2db uxtb r3, r3 - 8006686: 2b00 cmp r3, #0 - 8006688: d106 bne.n 8006698 - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - 800668a: 687b ldr r3, [r7, #4] - 800668c: 2200 movs r2, #0 - 800668e: f883 203c strb.w r2, [r3, #60] @ 0x3c - } - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - htim->Base_MspInitCallback(htim); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - HAL_TIM_Base_MspInit(htim); - 8006692: 6878 ldr r0, [r7, #4] - 8006694: f7fc fd04 bl 80030a0 -#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 8006698: 687b ldr r3, [r7, #4] - 800669a: 2202 movs r2, #2 - 800669c: f883 203d strb.w r2, [r3, #61] @ 0x3d - - /* Set the Time Base configuration */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - 80066a0: 687b ldr r3, [r7, #4] - 80066a2: 681a ldr r2, [r3, #0] - 80066a4: 687b ldr r3, [r7, #4] - 80066a6: 3304 adds r3, #4 - 80066a8: 4619 mov r1, r3 - 80066aa: 4610 mov r0, r2 - 80066ac: f000 f940 bl 8006930 - - /* Initialize the DMA burst operation state */ - htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 80066b0: 687b ldr r3, [r7, #4] - 80066b2: 2201 movs r2, #1 - 80066b4: f883 2046 strb.w r2, [r3, #70] @ 0x46 - - /* Initialize the TIM channels state */ - TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 80066b8: 687b ldr r3, [r7, #4] - 80066ba: 2201 movs r2, #1 - 80066bc: f883 203e strb.w r2, [r3, #62] @ 0x3e - 80066c0: 687b ldr r3, [r7, #4] - 80066c2: 2201 movs r2, #1 - 80066c4: f883 203f strb.w r2, [r3, #63] @ 0x3f - 80066c8: 687b ldr r3, [r7, #4] - 80066ca: 2201 movs r2, #1 - 80066cc: f883 2040 strb.w r2, [r3, #64] @ 0x40 - 80066d0: 687b ldr r3, [r7, #4] - 80066d2: 2201 movs r2, #1 - 80066d4: f883 2041 strb.w r2, [r3, #65] @ 0x41 - TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 80066d8: 687b ldr r3, [r7, #4] - 80066da: 2201 movs r2, #1 - 80066dc: f883 2042 strb.w r2, [r3, #66] @ 0x42 - 80066e0: 687b ldr r3, [r7, #4] - 80066e2: 2201 movs r2, #1 - 80066e4: f883 2043 strb.w r2, [r3, #67] @ 0x43 - 80066e8: 687b ldr r3, [r7, #4] - 80066ea: 2201 movs r2, #1 - 80066ec: f883 2044 strb.w r2, [r3, #68] @ 0x44 - 80066f0: 687b ldr r3, [r7, #4] - 80066f2: 2201 movs r2, #1 - 80066f4: f883 2045 strb.w r2, [r3, #69] @ 0x45 - - /* Initialize the TIM state*/ - htim->State = HAL_TIM_STATE_READY; - 80066f8: 687b ldr r3, [r7, #4] - 80066fa: 2201 movs r2, #1 - 80066fc: f883 203d strb.w r2, [r3, #61] @ 0x3d - - return HAL_OK; - 8006700: 2300 movs r3, #0 -} - 8006702: 4618 mov r0, r3 - 8006704: 3708 adds r7, #8 - 8006706: 46bd mov sp, r7 - 8006708: bd80 pop {r7, pc} - ... - -0800670c : - * @brief Starts the TIM Base generation. - * @param htim TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim) -{ - 800670c: b480 push {r7} - 800670e: b085 sub sp, #20 - 8006710: af00 add r7, sp, #0 - 8006712: 6078 str r0, [r7, #4] - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Check the TIM state */ - if (htim->State != HAL_TIM_STATE_READY) - 8006714: 687b ldr r3, [r7, #4] - 8006716: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 800671a: b2db uxtb r3, r3 - 800671c: 2b01 cmp r3, #1 - 800671e: d001 beq.n 8006724 - { - return HAL_ERROR; - 8006720: 2301 movs r3, #1 - 8006722: e032 b.n 800678a - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - 8006724: 687b ldr r3, [r7, #4] - 8006726: 2202 movs r2, #2 - 8006728: f883 203d strb.w r2, [r3, #61] @ 0x3d - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 800672c: 687b ldr r3, [r7, #4] - 800672e: 681b ldr r3, [r3, #0] - 8006730: 4a18 ldr r2, [pc, #96] @ (8006794 ) - 8006732: 4293 cmp r3, r2 - 8006734: d00e beq.n 8006754 - 8006736: 687b ldr r3, [r7, #4] - 8006738: 681b ldr r3, [r3, #0] - 800673a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 800673e: d009 beq.n 8006754 - 8006740: 687b ldr r3, [r7, #4] - 8006742: 681b ldr r3, [r3, #0] - 8006744: 4a14 ldr r2, [pc, #80] @ (8006798 ) - 8006746: 4293 cmp r3, r2 - 8006748: d004 beq.n 8006754 - 800674a: 687b ldr r3, [r7, #4] - 800674c: 681b ldr r3, [r3, #0] - 800674e: 4a13 ldr r2, [pc, #76] @ (800679c ) - 8006750: 4293 cmp r3, r2 - 8006752: d111 bne.n 8006778 - { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8006754: 687b ldr r3, [r7, #4] - 8006756: 681b ldr r3, [r3, #0] - 8006758: 689b ldr r3, [r3, #8] - 800675a: f003 0307 and.w r3, r3, #7 - 800675e: 60fb str r3, [r7, #12] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8006760: 68fb ldr r3, [r7, #12] - 8006762: 2b06 cmp r3, #6 - 8006764: d010 beq.n 8006788 - { - __HAL_TIM_ENABLE(htim); - 8006766: 687b ldr r3, [r7, #4] - 8006768: 681b ldr r3, [r3, #0] - 800676a: 681a ldr r2, [r3, #0] - 800676c: 687b ldr r3, [r7, #4] - 800676e: 681b ldr r3, [r3, #0] - 8006770: f042 0201 orr.w r2, r2, #1 - 8006774: 601a str r2, [r3, #0] - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8006776: e007 b.n 8006788 - } - } - else - { - __HAL_TIM_ENABLE(htim); - 8006778: 687b ldr r3, [r7, #4] - 800677a: 681b ldr r3, [r3, #0] - 800677c: 681a ldr r2, [r3, #0] - 800677e: 687b ldr r3, [r7, #4] - 8006780: 681b ldr r3, [r3, #0] - 8006782: f042 0201 orr.w r2, r2, #1 - 8006786: 601a str r2, [r3, #0] - } - - /* Return function status */ - return HAL_OK; - 8006788: 2300 movs r3, #0 -} - 800678a: 4618 mov r0, r3 - 800678c: 3714 adds r7, #20 - 800678e: 46bd mov sp, r7 - 8006790: bc80 pop {r7} - 8006792: 4770 bx lr - 8006794: 40012c00 .word 0x40012c00 - 8006798: 40000400 .word 0x40000400 - 800679c: 40000800 .word 0x40000800 - -080067a0 : - * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that - * contains the clock source information for the TIM peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) -{ - 80067a0: b580 push {r7, lr} - 80067a2: b084 sub sp, #16 - 80067a4: af00 add r7, sp, #0 - 80067a6: 6078 str r0, [r7, #4] - 80067a8: 6039 str r1, [r7, #0] - HAL_StatusTypeDef status = HAL_OK; - 80067aa: 2300 movs r3, #0 - 80067ac: 73fb strb r3, [r7, #15] - uint32_t tmpsmcr; - - /* Process Locked */ - __HAL_LOCK(htim); - 80067ae: 687b ldr r3, [r7, #4] - 80067b0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 80067b4: 2b01 cmp r3, #1 - 80067b6: d101 bne.n 80067bc - 80067b8: 2302 movs r3, #2 - 80067ba: e0b4 b.n 8006926 - 80067bc: 687b ldr r3, [r7, #4] - 80067be: 2201 movs r2, #1 - 80067c0: f883 203c strb.w r2, [r3, #60] @ 0x3c - - htim->State = HAL_TIM_STATE_BUSY; - 80067c4: 687b ldr r3, [r7, #4] - 80067c6: 2202 movs r2, #2 - 80067c8: f883 203d strb.w r2, [r3, #61] @ 0x3d - - /* Check the parameters */ - assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); - - /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ - tmpsmcr = htim->Instance->SMCR; - 80067cc: 687b ldr r3, [r7, #4] - 80067ce: 681b ldr r3, [r3, #0] - 80067d0: 689b ldr r3, [r3, #8] - 80067d2: 60bb str r3, [r7, #8] - tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - 80067d4: 68bb ldr r3, [r7, #8] - 80067d6: f023 0377 bic.w r3, r3, #119 @ 0x77 - 80067da: 60bb str r3, [r7, #8] - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 80067dc: 68bb ldr r3, [r7, #8] - 80067de: f423 437f bic.w r3, r3, #65280 @ 0xff00 - 80067e2: 60bb str r3, [r7, #8] - htim->Instance->SMCR = tmpsmcr; - 80067e4: 687b ldr r3, [r7, #4] - 80067e6: 681b ldr r3, [r3, #0] - 80067e8: 68ba ldr r2, [r7, #8] - 80067ea: 609a str r2, [r3, #8] - - switch (sClockSourceConfig->ClockSource) - 80067ec: 683b ldr r3, [r7, #0] - 80067ee: 681b ldr r3, [r3, #0] - 80067f0: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 - 80067f4: d03e beq.n 8006874 - 80067f6: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 - 80067fa: f200 8087 bhi.w 800690c - 80067fe: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8006802: f000 8086 beq.w 8006912 - 8006806: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 800680a: d87f bhi.n 800690c - 800680c: 2b70 cmp r3, #112 @ 0x70 - 800680e: d01a beq.n 8006846 - 8006810: 2b70 cmp r3, #112 @ 0x70 - 8006812: d87b bhi.n 800690c - 8006814: 2b60 cmp r3, #96 @ 0x60 - 8006816: d050 beq.n 80068ba - 8006818: 2b60 cmp r3, #96 @ 0x60 - 800681a: d877 bhi.n 800690c - 800681c: 2b50 cmp r3, #80 @ 0x50 - 800681e: d03c beq.n 800689a - 8006820: 2b50 cmp r3, #80 @ 0x50 - 8006822: d873 bhi.n 800690c - 8006824: 2b40 cmp r3, #64 @ 0x40 - 8006826: d058 beq.n 80068da - 8006828: 2b40 cmp r3, #64 @ 0x40 - 800682a: d86f bhi.n 800690c - 800682c: 2b30 cmp r3, #48 @ 0x30 - 800682e: d064 beq.n 80068fa - 8006830: 2b30 cmp r3, #48 @ 0x30 - 8006832: d86b bhi.n 800690c - 8006834: 2b20 cmp r3, #32 - 8006836: d060 beq.n 80068fa - 8006838: 2b20 cmp r3, #32 - 800683a: d867 bhi.n 800690c - 800683c: 2b00 cmp r3, #0 - 800683e: d05c beq.n 80068fa - 8006840: 2b10 cmp r3, #16 - 8006842: d05a beq.n 80068fa - 8006844: e062 b.n 800690c - assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - /* Configure the ETR Clock source */ - TIM_ETR_SetConfig(htim->Instance, - 8006846: 687b ldr r3, [r7, #4] - 8006848: 6818 ldr r0, [r3, #0] - sClockSourceConfig->ClockPrescaler, - 800684a: 683b ldr r3, [r7, #0] - 800684c: 6899 ldr r1, [r3, #8] - sClockSourceConfig->ClockPolarity, - 800684e: 683b ldr r3, [r7, #0] - 8006850: 685a ldr r2, [r3, #4] - sClockSourceConfig->ClockFilter); - 8006852: 683b ldr r3, [r7, #0] - 8006854: 68db ldr r3, [r3, #12] - TIM_ETR_SetConfig(htim->Instance, - 8006856: f000 f950 bl 8006afa - - /* Select the External clock mode1 and the ETRF trigger */ - tmpsmcr = htim->Instance->SMCR; - 800685a: 687b ldr r3, [r7, #4] - 800685c: 681b ldr r3, [r3, #0] - 800685e: 689b ldr r3, [r3, #8] - 8006860: 60bb str r3, [r7, #8] - tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 8006862: 68bb ldr r3, [r7, #8] - 8006864: f043 0377 orr.w r3, r3, #119 @ 0x77 - 8006868: 60bb str r3, [r7, #8] - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - 800686a: 687b ldr r3, [r7, #4] - 800686c: 681b ldr r3, [r3, #0] - 800686e: 68ba ldr r2, [r7, #8] - 8006870: 609a str r2, [r3, #8] - break; - 8006872: e04f b.n 8006914 - assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - /* Configure the ETR Clock source */ - TIM_ETR_SetConfig(htim->Instance, - 8006874: 687b ldr r3, [r7, #4] - 8006876: 6818 ldr r0, [r3, #0] - sClockSourceConfig->ClockPrescaler, - 8006878: 683b ldr r3, [r7, #0] - 800687a: 6899 ldr r1, [r3, #8] - sClockSourceConfig->ClockPolarity, - 800687c: 683b ldr r3, [r7, #0] - 800687e: 685a ldr r2, [r3, #4] - sClockSourceConfig->ClockFilter); - 8006880: 683b ldr r3, [r7, #0] - 8006882: 68db ldr r3, [r3, #12] - TIM_ETR_SetConfig(htim->Instance, - 8006884: f000 f939 bl 8006afa - /* Enable the External clock mode2 */ - htim->Instance->SMCR |= TIM_SMCR_ECE; - 8006888: 687b ldr r3, [r7, #4] - 800688a: 681b ldr r3, [r3, #0] - 800688c: 689a ldr r2, [r3, #8] - 800688e: 687b ldr r3, [r7, #4] - 8006890: 681b ldr r3, [r3, #0] - 8006892: f442 4280 orr.w r2, r2, #16384 @ 0x4000 - 8006896: 609a str r2, [r3, #8] - break; - 8006898: e03c b.n 8006914 - - /* Check TI1 input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - TIM_TI1_ConfigInputStage(htim->Instance, - 800689a: 687b ldr r3, [r7, #4] - 800689c: 6818 ldr r0, [r3, #0] - sClockSourceConfig->ClockPolarity, - 800689e: 683b ldr r3, [r7, #0] - 80068a0: 6859 ldr r1, [r3, #4] - sClockSourceConfig->ClockFilter); - 80068a2: 683b ldr r3, [r7, #0] - 80068a4: 68db ldr r3, [r3, #12] - TIM_TI1_ConfigInputStage(htim->Instance, - 80068a6: 461a mov r2, r3 - 80068a8: f000 f8b0 bl 8006a0c - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - 80068ac: 687b ldr r3, [r7, #4] - 80068ae: 681b ldr r3, [r3, #0] - 80068b0: 2150 movs r1, #80 @ 0x50 - 80068b2: 4618 mov r0, r3 - 80068b4: f000 f907 bl 8006ac6 - break; - 80068b8: e02c b.n 8006914 - - /* Check TI2 input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - TIM_TI2_ConfigInputStage(htim->Instance, - 80068ba: 687b ldr r3, [r7, #4] - 80068bc: 6818 ldr r0, [r3, #0] - sClockSourceConfig->ClockPolarity, - 80068be: 683b ldr r3, [r7, #0] - 80068c0: 6859 ldr r1, [r3, #4] - sClockSourceConfig->ClockFilter); - 80068c2: 683b ldr r3, [r7, #0] - 80068c4: 68db ldr r3, [r3, #12] - TIM_TI2_ConfigInputStage(htim->Instance, - 80068c6: 461a mov r2, r3 - 80068c8: f000 f8ce bl 8006a68 - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - 80068cc: 687b ldr r3, [r7, #4] - 80068ce: 681b ldr r3, [r3, #0] - 80068d0: 2160 movs r1, #96 @ 0x60 - 80068d2: 4618 mov r0, r3 - 80068d4: f000 f8f7 bl 8006ac6 - break; - 80068d8: e01c b.n 8006914 - - /* Check TI1 input conditioning related parameters */ - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - TIM_TI1_ConfigInputStage(htim->Instance, - 80068da: 687b ldr r3, [r7, #4] - 80068dc: 6818 ldr r0, [r3, #0] - sClockSourceConfig->ClockPolarity, - 80068de: 683b ldr r3, [r7, #0] - 80068e0: 6859 ldr r1, [r3, #4] - sClockSourceConfig->ClockFilter); - 80068e2: 683b ldr r3, [r7, #0] - 80068e4: 68db ldr r3, [r3, #12] - TIM_TI1_ConfigInputStage(htim->Instance, - 80068e6: 461a mov r2, r3 - 80068e8: f000 f890 bl 8006a0c - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - 80068ec: 687b ldr r3, [r7, #4] - 80068ee: 681b ldr r3, [r3, #0] - 80068f0: 2140 movs r1, #64 @ 0x40 - 80068f2: 4618 mov r0, r3 - 80068f4: f000 f8e7 bl 8006ac6 - break; - 80068f8: e00c b.n 8006914 - case TIM_CLOCKSOURCE_ITR3: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - 80068fa: 687b ldr r3, [r7, #4] - 80068fc: 681a ldr r2, [r3, #0] - 80068fe: 683b ldr r3, [r7, #0] - 8006900: 681b ldr r3, [r3, #0] - 8006902: 4619 mov r1, r3 - 8006904: 4610 mov r0, r2 - 8006906: f000 f8de bl 8006ac6 - break; - 800690a: e003 b.n 8006914 - } - - default: - status = HAL_ERROR; - 800690c: 2301 movs r3, #1 - 800690e: 73fb strb r3, [r7, #15] - break; - 8006910: e000 b.n 8006914 - break; - 8006912: bf00 nop - } - htim->State = HAL_TIM_STATE_READY; - 8006914: 687b ldr r3, [r7, #4] - 8006916: 2201 movs r2, #1 - 8006918: f883 203d strb.w r2, [r3, #61] @ 0x3d - - __HAL_UNLOCK(htim); - 800691c: 687b ldr r3, [r7, #4] - 800691e: 2200 movs r2, #0 - 8006920: f883 203c strb.w r2, [r3, #60] @ 0x3c - - return status; - 8006924: 7bfb ldrb r3, [r7, #15] -} - 8006926: 4618 mov r0, r3 - 8006928: 3710 adds r7, #16 - 800692a: 46bd mov sp, r7 - 800692c: bd80 pop {r7, pc} - ... - -08006930 : - * @param TIMx TIM peripheral - * @param Structure TIM Base configuration structure - * @retval None - */ -void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) -{ - 8006930: b480 push {r7} - 8006932: b085 sub sp, #20 - 8006934: af00 add r7, sp, #0 - 8006936: 6078 str r0, [r7, #4] - 8006938: 6039 str r1, [r7, #0] - uint32_t tmpcr1; - tmpcr1 = TIMx->CR1; - 800693a: 687b ldr r3, [r7, #4] - 800693c: 681b ldr r3, [r3, #0] - 800693e: 60fb str r3, [r7, #12] - - /* Set TIM Time Base Unit parameters ---------------------------------------*/ - if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 8006940: 687b ldr r3, [r7, #4] - 8006942: 4a2f ldr r2, [pc, #188] @ (8006a00 ) - 8006944: 4293 cmp r3, r2 - 8006946: d00b beq.n 8006960 - 8006948: 687b ldr r3, [r7, #4] - 800694a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 800694e: d007 beq.n 8006960 - 8006950: 687b ldr r3, [r7, #4] - 8006952: 4a2c ldr r2, [pc, #176] @ (8006a04 ) - 8006954: 4293 cmp r3, r2 - 8006956: d003 beq.n 8006960 - 8006958: 687b ldr r3, [r7, #4] - 800695a: 4a2b ldr r2, [pc, #172] @ (8006a08 ) - 800695c: 4293 cmp r3, r2 - 800695e: d108 bne.n 8006972 - { - /* Select the Counter Mode */ - tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 8006960: 68fb ldr r3, [r7, #12] - 8006962: f023 0370 bic.w r3, r3, #112 @ 0x70 - 8006966: 60fb str r3, [r7, #12] - tmpcr1 |= Structure->CounterMode; - 8006968: 683b ldr r3, [r7, #0] - 800696a: 685b ldr r3, [r3, #4] - 800696c: 68fa ldr r2, [r7, #12] - 800696e: 4313 orrs r3, r2 - 8006970: 60fb str r3, [r7, #12] - } - - if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 8006972: 687b ldr r3, [r7, #4] - 8006974: 4a22 ldr r2, [pc, #136] @ (8006a00 ) - 8006976: 4293 cmp r3, r2 - 8006978: d00b beq.n 8006992 - 800697a: 687b ldr r3, [r7, #4] - 800697c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 8006980: d007 beq.n 8006992 - 8006982: 687b ldr r3, [r7, #4] - 8006984: 4a1f ldr r2, [pc, #124] @ (8006a04 ) - 8006986: 4293 cmp r3, r2 - 8006988: d003 beq.n 8006992 - 800698a: 687b ldr r3, [r7, #4] - 800698c: 4a1e ldr r2, [pc, #120] @ (8006a08 ) - 800698e: 4293 cmp r3, r2 - 8006990: d108 bne.n 80069a4 - { - /* Set the clock division */ - tmpcr1 &= ~TIM_CR1_CKD; - 8006992: 68fb ldr r3, [r7, #12] - 8006994: f423 7340 bic.w r3, r3, #768 @ 0x300 - 8006998: 60fb str r3, [r7, #12] - tmpcr1 |= (uint32_t)Structure->ClockDivision; - 800699a: 683b ldr r3, [r7, #0] - 800699c: 68db ldr r3, [r3, #12] - 800699e: 68fa ldr r2, [r7, #12] - 80069a0: 4313 orrs r3, r2 - 80069a2: 60fb str r3, [r7, #12] - } - - /* Set the auto-reload preload */ - MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 80069a4: 68fb ldr r3, [r7, #12] - 80069a6: f023 0280 bic.w r2, r3, #128 @ 0x80 - 80069aa: 683b ldr r3, [r7, #0] - 80069ac: 695b ldr r3, [r3, #20] - 80069ae: 4313 orrs r3, r2 - 80069b0: 60fb str r3, [r7, #12] - - TIMx->CR1 = tmpcr1; - 80069b2: 687b ldr r3, [r7, #4] - 80069b4: 68fa ldr r2, [r7, #12] - 80069b6: 601a str r2, [r3, #0] - - /* Set the Autoreload value */ - TIMx->ARR = (uint32_t)Structure->Period ; - 80069b8: 683b ldr r3, [r7, #0] - 80069ba: 689a ldr r2, [r3, #8] - 80069bc: 687b ldr r3, [r7, #4] - 80069be: 62da str r2, [r3, #44] @ 0x2c - - /* Set the Prescaler value */ - TIMx->PSC = Structure->Prescaler; - 80069c0: 683b ldr r3, [r7, #0] - 80069c2: 681a ldr r2, [r3, #0] - 80069c4: 687b ldr r3, [r7, #4] - 80069c6: 629a str r2, [r3, #40] @ 0x28 - - if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 80069c8: 687b ldr r3, [r7, #4] - 80069ca: 4a0d ldr r2, [pc, #52] @ (8006a00 ) - 80069cc: 4293 cmp r3, r2 - 80069ce: d103 bne.n 80069d8 - { - /* Set the Repetition Counter value */ - TIMx->RCR = Structure->RepetitionCounter; - 80069d0: 683b ldr r3, [r7, #0] - 80069d2: 691a ldr r2, [r3, #16] - 80069d4: 687b ldr r3, [r7, #4] - 80069d6: 631a str r2, [r3, #48] @ 0x30 - } - - /* Generate an update event to reload the Prescaler - and the repetition counter (only for advanced timer) value immediately */ - TIMx->EGR = TIM_EGR_UG; - 80069d8: 687b ldr r3, [r7, #4] - 80069da: 2201 movs r2, #1 - 80069dc: 615a str r2, [r3, #20] - - /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ - if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) - 80069de: 687b ldr r3, [r7, #4] - 80069e0: 691b ldr r3, [r3, #16] - 80069e2: f003 0301 and.w r3, r3, #1 - 80069e6: 2b00 cmp r3, #0 - 80069e8: d005 beq.n 80069f6 - { - /* Clear the update flag */ - CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); - 80069ea: 687b ldr r3, [r7, #4] - 80069ec: 691b ldr r3, [r3, #16] - 80069ee: f023 0201 bic.w r2, r3, #1 - 80069f2: 687b ldr r3, [r7, #4] - 80069f4: 611a str r2, [r3, #16] - } -} - 80069f6: bf00 nop - 80069f8: 3714 adds r7, #20 - 80069fa: 46bd mov sp, r7 - 80069fc: bc80 pop {r7} - 80069fe: 4770 bx lr - 8006a00: 40012c00 .word 0x40012c00 - 8006a04: 40000400 .word 0x40000400 - 8006a08: 40000800 .word 0x40000800 - -08006a0c : - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - 8006a0c: b480 push {r7} - 8006a0e: b087 sub sp, #28 - 8006a10: af00 add r7, sp, #0 - 8006a12: 60f8 str r0, [r7, #12] - 8006a14: 60b9 str r1, [r7, #8] - 8006a16: 607a str r2, [r7, #4] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 1: Reset the CC1E Bit */ - tmpccer = TIMx->CCER; - 8006a18: 68fb ldr r3, [r7, #12] - 8006a1a: 6a1b ldr r3, [r3, #32] - 8006a1c: 617b str r3, [r7, #20] - TIMx->CCER &= ~TIM_CCER_CC1E; - 8006a1e: 68fb ldr r3, [r7, #12] - 8006a20: 6a1b ldr r3, [r3, #32] - 8006a22: f023 0201 bic.w r2, r3, #1 - 8006a26: 68fb ldr r3, [r7, #12] - 8006a28: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 8006a2a: 68fb ldr r3, [r7, #12] - 8006a2c: 699b ldr r3, [r3, #24] - 8006a2e: 613b str r3, [r7, #16] - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - 8006a30: 693b ldr r3, [r7, #16] - 8006a32: f023 03f0 bic.w r3, r3, #240 @ 0xf0 - 8006a36: 613b str r3, [r7, #16] - tmpccmr1 |= (TIM_ICFilter << 4U); - 8006a38: 687b ldr r3, [r7, #4] - 8006a3a: 011b lsls r3, r3, #4 - 8006a3c: 693a ldr r2, [r7, #16] - 8006a3e: 4313 orrs r3, r2 - 8006a40: 613b str r3, [r7, #16] - - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 8006a42: 697b ldr r3, [r7, #20] - 8006a44: f023 030a bic.w r3, r3, #10 - 8006a48: 617b str r3, [r7, #20] - tmpccer |= TIM_ICPolarity; - 8006a4a: 697a ldr r2, [r7, #20] - 8006a4c: 68bb ldr r3, [r7, #8] - 8006a4e: 4313 orrs r3, r2 - 8006a50: 617b str r3, [r7, #20] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - 8006a52: 68fb ldr r3, [r7, #12] - 8006a54: 693a ldr r2, [r7, #16] - 8006a56: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 8006a58: 68fb ldr r3, [r7, #12] - 8006a5a: 697a ldr r2, [r7, #20] - 8006a5c: 621a str r2, [r3, #32] -} - 8006a5e: bf00 nop - 8006a60: 371c adds r7, #28 - 8006a62: 46bd mov sp, r7 - 8006a64: bc80 pop {r7} - 8006a66: 4770 bx lr - -08006a68 : - * @param TIM_ICFilter Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - 8006a68: b480 push {r7} - 8006a6a: b087 sub sp, #28 - 8006a6c: af00 add r7, sp, #0 - 8006a6e: 60f8 str r0, [r7, #12] - 8006a70: 60b9 str r1, [r7, #8] - 8006a72: 607a str r2, [r7, #4] - uint32_t tmpccmr1; - uint32_t tmpccer; - - /* Disable the Channel 2: Reset the CC2E Bit */ - tmpccer = TIMx->CCER; - 8006a74: 68fb ldr r3, [r7, #12] - 8006a76: 6a1b ldr r3, [r3, #32] - 8006a78: 617b str r3, [r7, #20] - TIMx->CCER &= ~TIM_CCER_CC2E; - 8006a7a: 68fb ldr r3, [r7, #12] - 8006a7c: 6a1b ldr r3, [r3, #32] - 8006a7e: f023 0210 bic.w r2, r3, #16 - 8006a82: 68fb ldr r3, [r7, #12] - 8006a84: 621a str r2, [r3, #32] - tmpccmr1 = TIMx->CCMR1; - 8006a86: 68fb ldr r3, [r7, #12] - 8006a88: 699b ldr r3, [r3, #24] - 8006a8a: 613b str r3, [r7, #16] - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - 8006a8c: 693b ldr r3, [r7, #16] - 8006a8e: f423 4370 bic.w r3, r3, #61440 @ 0xf000 - 8006a92: 613b str r3, [r7, #16] - tmpccmr1 |= (TIM_ICFilter << 12U); - 8006a94: 687b ldr r3, [r7, #4] - 8006a96: 031b lsls r3, r3, #12 - 8006a98: 693a ldr r2, [r7, #16] - 8006a9a: 4313 orrs r3, r2 - 8006a9c: 613b str r3, [r7, #16] - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 8006a9e: 697b ldr r3, [r7, #20] - 8006aa0: f023 03a0 bic.w r3, r3, #160 @ 0xa0 - 8006aa4: 617b str r3, [r7, #20] - tmpccer |= (TIM_ICPolarity << 4U); - 8006aa6: 68bb ldr r3, [r7, #8] - 8006aa8: 011b lsls r3, r3, #4 - 8006aaa: 697a ldr r2, [r7, #20] - 8006aac: 4313 orrs r3, r2 - 8006aae: 617b str r3, [r7, #20] - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - 8006ab0: 68fb ldr r3, [r7, #12] - 8006ab2: 693a ldr r2, [r7, #16] - 8006ab4: 619a str r2, [r3, #24] - TIMx->CCER = tmpccer; - 8006ab6: 68fb ldr r3, [r7, #12] - 8006ab8: 697a ldr r2, [r7, #20] - 8006aba: 621a str r2, [r3, #32] -} - 8006abc: bf00 nop - 8006abe: 371c adds r7, #28 - 8006ac0: 46bd mov sp, r7 - 8006ac2: bc80 pop {r7} - 8006ac4: 4770 bx lr - -08006ac6 : - * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 - * @arg TIM_TS_ETRF: External Trigger input - * @retval None - */ -static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) -{ - 8006ac6: b480 push {r7} - 8006ac8: b085 sub sp, #20 - 8006aca: af00 add r7, sp, #0 - 8006acc: 6078 str r0, [r7, #4] - 8006ace: 6039 str r1, [r7, #0] - uint32_t tmpsmcr; - - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - 8006ad0: 687b ldr r3, [r7, #4] - 8006ad2: 689b ldr r3, [r3, #8] - 8006ad4: 60fb str r3, [r7, #12] - /* Reset the TS Bits */ - tmpsmcr &= ~TIM_SMCR_TS; - 8006ad6: 68fb ldr r3, [r7, #12] - 8006ad8: f023 0370 bic.w r3, r3, #112 @ 0x70 - 8006adc: 60fb str r3, [r7, #12] - /* Set the Input Trigger source and the slave mode*/ - tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 8006ade: 683a ldr r2, [r7, #0] - 8006ae0: 68fb ldr r3, [r7, #12] - 8006ae2: 4313 orrs r3, r2 - 8006ae4: f043 0307 orr.w r3, r3, #7 - 8006ae8: 60fb str r3, [r7, #12] - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; - 8006aea: 687b ldr r3, [r7, #4] - 8006aec: 68fa ldr r2, [r7, #12] - 8006aee: 609a str r2, [r3, #8] -} - 8006af0: bf00 nop - 8006af2: 3714 adds r7, #20 - 8006af4: 46bd mov sp, r7 - 8006af6: bc80 pop {r7} - 8006af8: 4770 bx lr - -08006afa : - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, - uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) -{ - 8006afa: b480 push {r7} - 8006afc: b087 sub sp, #28 - 8006afe: af00 add r7, sp, #0 - 8006b00: 60f8 str r0, [r7, #12] - 8006b02: 60b9 str r1, [r7, #8] - 8006b04: 607a str r2, [r7, #4] - 8006b06: 603b str r3, [r7, #0] - uint32_t tmpsmcr; - - tmpsmcr = TIMx->SMCR; - 8006b08: 68fb ldr r3, [r7, #12] - 8006b0a: 689b ldr r3, [r3, #8] - 8006b0c: 617b str r3, [r7, #20] - - /* Reset the ETR Bits */ - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8006b0e: 697b ldr r3, [r7, #20] - 8006b10: f423 437f bic.w r3, r3, #65280 @ 0xff00 - 8006b14: 617b str r3, [r7, #20] - - /* Set the Prescaler, the Filter value and the Polarity */ - tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 8006b16: 683b ldr r3, [r7, #0] - 8006b18: 021a lsls r2, r3, #8 - 8006b1a: 687b ldr r3, [r7, #4] - 8006b1c: 431a orrs r2, r3 - 8006b1e: 68bb ldr r3, [r7, #8] - 8006b20: 4313 orrs r3, r2 - 8006b22: 697a ldr r2, [r7, #20] - 8006b24: 4313 orrs r3, r2 - 8006b26: 617b str r3, [r7, #20] - - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; - 8006b28: 68fb ldr r3, [r7, #12] - 8006b2a: 697a ldr r2, [r7, #20] - 8006b2c: 609a str r2, [r3, #8] -} - 8006b2e: bf00 nop - 8006b30: 371c adds r7, #28 - 8006b32: 46bd mov sp, r7 - 8006b34: bc80 pop {r7} - 8006b36: 4770 bx lr - -08006b38 : - * mode. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, - const TIM_MasterConfigTypeDef *sMasterConfig) -{ - 8006b38: b480 push {r7} - 8006b3a: b085 sub sp, #20 - 8006b3c: af00 add r7, sp, #0 - 8006b3e: 6078 str r0, [r7, #4] - 8006b40: 6039 str r1, [r7, #0] - assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); - assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); - - /* Check input state */ - __HAL_LOCK(htim); - 8006b42: 687b ldr r3, [r7, #4] - 8006b44: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8006b48: 2b01 cmp r3, #1 - 8006b4a: d101 bne.n 8006b50 - 8006b4c: 2302 movs r3, #2 - 8006b4e: e046 b.n 8006bde - 8006b50: 687b ldr r3, [r7, #4] - 8006b52: 2201 movs r2, #1 - 8006b54: f883 203c strb.w r2, [r3, #60] @ 0x3c - - /* Change the handler state */ - htim->State = HAL_TIM_STATE_BUSY; - 8006b58: 687b ldr r3, [r7, #4] - 8006b5a: 2202 movs r2, #2 - 8006b5c: f883 203d strb.w r2, [r3, #61] @ 0x3d - - /* Get the TIMx CR2 register value */ - tmpcr2 = htim->Instance->CR2; - 8006b60: 687b ldr r3, [r7, #4] - 8006b62: 681b ldr r3, [r3, #0] - 8006b64: 685b ldr r3, [r3, #4] - 8006b66: 60fb str r3, [r7, #12] - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - 8006b68: 687b ldr r3, [r7, #4] - 8006b6a: 681b ldr r3, [r3, #0] - 8006b6c: 689b ldr r3, [r3, #8] - 8006b6e: 60bb str r3, [r7, #8] - - /* Reset the MMS Bits */ - tmpcr2 &= ~TIM_CR2_MMS; - 8006b70: 68fb ldr r3, [r7, #12] - 8006b72: f023 0370 bic.w r3, r3, #112 @ 0x70 - 8006b76: 60fb str r3, [r7, #12] - /* Select the TRGO source */ - tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 8006b78: 683b ldr r3, [r7, #0] - 8006b7a: 681b ldr r3, [r3, #0] - 8006b7c: 68fa ldr r2, [r7, #12] - 8006b7e: 4313 orrs r3, r2 - 8006b80: 60fb str r3, [r7, #12] - - /* Update TIMx CR2 */ - htim->Instance->CR2 = tmpcr2; - 8006b82: 687b ldr r3, [r7, #4] - 8006b84: 681b ldr r3, [r3, #0] - 8006b86: 68fa ldr r2, [r7, #12] - 8006b88: 605a str r2, [r3, #4] - - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8006b8a: 687b ldr r3, [r7, #4] - 8006b8c: 681b ldr r3, [r3, #0] - 8006b8e: 4a16 ldr r2, [pc, #88] @ (8006be8 ) - 8006b90: 4293 cmp r3, r2 - 8006b92: d00e beq.n 8006bb2 - 8006b94: 687b ldr r3, [r7, #4] - 8006b96: 681b ldr r3, [r3, #0] - 8006b98: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 8006b9c: d009 beq.n 8006bb2 - 8006b9e: 687b ldr r3, [r7, #4] - 8006ba0: 681b ldr r3, [r3, #0] - 8006ba2: 4a12 ldr r2, [pc, #72] @ (8006bec ) - 8006ba4: 4293 cmp r3, r2 - 8006ba6: d004 beq.n 8006bb2 - 8006ba8: 687b ldr r3, [r7, #4] - 8006baa: 681b ldr r3, [r3, #0] - 8006bac: 4a10 ldr r2, [pc, #64] @ (8006bf0 ) - 8006bae: 4293 cmp r3, r2 - 8006bb0: d10c bne.n 8006bcc - { - /* Reset the MSM Bit */ - tmpsmcr &= ~TIM_SMCR_MSM; - 8006bb2: 68bb ldr r3, [r7, #8] - 8006bb4: f023 0380 bic.w r3, r3, #128 @ 0x80 - 8006bb8: 60bb str r3, [r7, #8] - /* Set master mode */ - tmpsmcr |= sMasterConfig->MasterSlaveMode; - 8006bba: 683b ldr r3, [r7, #0] - 8006bbc: 685b ldr r3, [r3, #4] - 8006bbe: 68ba ldr r2, [r7, #8] - 8006bc0: 4313 orrs r3, r2 - 8006bc2: 60bb str r3, [r7, #8] - - /* Update TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - 8006bc4: 687b ldr r3, [r7, #4] - 8006bc6: 681b ldr r3, [r3, #0] - 8006bc8: 68ba ldr r2, [r7, #8] - 8006bca: 609a str r2, [r3, #8] - } - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - 8006bcc: 687b ldr r3, [r7, #4] - 8006bce: 2201 movs r2, #1 - 8006bd0: f883 203d strb.w r2, [r3, #61] @ 0x3d - - __HAL_UNLOCK(htim); - 8006bd4: 687b ldr r3, [r7, #4] - 8006bd6: 2200 movs r2, #0 - 8006bd8: f883 203c strb.w r2, [r3, #60] @ 0x3c - - return HAL_OK; - 8006bdc: 2300 movs r3, #0 -} - 8006bde: 4618 mov r0, r3 - 8006be0: 3714 adds r7, #20 - 8006be2: 46bd mov sp, r7 - 8006be4: bc80 pop {r7} - 8006be6: 4770 bx lr - 8006be8: 40012c00 .word 0x40012c00 - 8006bec: 40000400 .word 0x40000400 - 8006bf0: 40000800 .word 0x40000800 - -08006bf4 : + 80055e6: 4618 mov r0, r3 + 80055e8: 3718 adds r7, #24 + 80055ea: 46bd mov sp, r7 + 80055ec: bd80 pop {r7, pc} + 80055ee: bf00 nop + 80055f0: 40021000 .word 0x40021000 + 80055f4: 40007000 .word 0x40007000 + 80055f8: 42420440 .word 0x42420440 + +080055fc : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8006bf4: b580 push {r7, lr} - 8006bf6: b082 sub sp, #8 - 8006bf8: af00 add r7, sp, #0 - 8006bfa: 6078 str r0, [r7, #4] + 80055fc: b580 push {r7, lr} + 80055fe: b082 sub sp, #8 + 8005600: af00 add r7, sp, #0 + 8005602: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8006bfc: 687b ldr r3, [r7, #4] - 8006bfe: 2b00 cmp r3, #0 - 8006c00: d101 bne.n 8006c06 + 8005604: 687b ldr r3, [r7, #4] + 8005606: 2b00 cmp r3, #0 + 8005608: d101 bne.n 800560e { return HAL_ERROR; - 8006c02: 2301 movs r3, #1 - 8006c04: e042 b.n 8006c8c + 800560a: 2301 movs r3, #1 + 800560c: e042 b.n 8005694 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) - 8006c06: 687b ldr r3, [r7, #4] - 8006c08: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 8006c0c: b2db uxtb r3, r3 - 8006c0e: 2b00 cmp r3, #0 - 8006c10: d106 bne.n 8006c20 + 800560e: 687b ldr r3, [r7, #4] + 8005610: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 8005614: b2db uxtb r3, r3 + 8005616: 2b00 cmp r3, #0 + 8005618: d106 bne.n 8005628 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 8006c12: 687b ldr r3, [r7, #4] - 8006c14: 2200 movs r2, #0 - 8006c16: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 800561a: 687b ldr r3, [r7, #4] + 800561c: 2200 movs r2, #0 + 800561e: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 8006c1a: 6878 ldr r0, [r7, #4] - 8006c1c: f7fc fa88 bl 8003130 + 8005622: 6878 ldr r0, [r7, #4] + 8005624: f7fd fa50 bl 8002ac8 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 8006c20: 687b ldr r3, [r7, #4] - 8006c22: 2224 movs r2, #36 @ 0x24 - 8006c24: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005628: 687b ldr r3, [r7, #4] + 800562a: 2224 movs r2, #36 @ 0x24 + 800562c: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); - 8006c28: 687b ldr r3, [r7, #4] - 8006c2a: 681b ldr r3, [r3, #0] - 8006c2c: 68da ldr r2, [r3, #12] - 8006c2e: 687b ldr r3, [r7, #4] - 8006c30: 681b ldr r3, [r3, #0] - 8006c32: f422 5200 bic.w r2, r2, #8192 @ 0x2000 - 8006c36: 60da str r2, [r3, #12] + 8005630: 687b ldr r3, [r7, #4] + 8005632: 681b ldr r3, [r3, #0] + 8005634: 68da ldr r2, [r3, #12] + 8005636: 687b ldr r3, [r7, #4] + 8005638: 681b ldr r3, [r3, #0] + 800563a: f422 5200 bic.w r2, r2, #8192 @ 0x2000 + 800563e: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); - 8006c38: 6878 ldr r0, [r7, #4] - 8006c3a: f000 fd63 bl 8007704 + 8005640: 6878 ldr r0, [r7, #4] + 8005642: f000 fd63 bl 800610c /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 8006c3e: 687b ldr r3, [r7, #4] - 8006c40: 681b ldr r3, [r3, #0] - 8006c42: 691a ldr r2, [r3, #16] - 8006c44: 687b ldr r3, [r7, #4] - 8006c46: 681b ldr r3, [r3, #0] - 8006c48: f422 4290 bic.w r2, r2, #18432 @ 0x4800 - 8006c4c: 611a str r2, [r3, #16] + 8005646: 687b ldr r3, [r7, #4] + 8005648: 681b ldr r3, [r3, #0] + 800564a: 691a ldr r2, [r3, #16] + 800564c: 687b ldr r3, [r7, #4] + 800564e: 681b ldr r3, [r3, #0] + 8005650: f422 4290 bic.w r2, r2, #18432 @ 0x4800 + 8005654: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 8006c4e: 687b ldr r3, [r7, #4] - 8006c50: 681b ldr r3, [r3, #0] - 8006c52: 695a ldr r2, [r3, #20] - 8006c54: 687b ldr r3, [r7, #4] - 8006c56: 681b ldr r3, [r3, #0] - 8006c58: f022 022a bic.w r2, r2, #42 @ 0x2a - 8006c5c: 615a str r2, [r3, #20] + 8005656: 687b ldr r3, [r7, #4] + 8005658: 681b ldr r3, [r3, #0] + 800565a: 695a ldr r2, [r3, #20] + 800565c: 687b ldr r3, [r7, #4] + 800565e: 681b ldr r3, [r3, #0] + 8005660: f022 022a bic.w r2, r2, #42 @ 0x2a + 8005664: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); - 8006c5e: 687b ldr r3, [r7, #4] - 8006c60: 681b ldr r3, [r3, #0] - 8006c62: 68da ldr r2, [r3, #12] - 8006c64: 687b ldr r3, [r7, #4] - 8006c66: 681b ldr r3, [r3, #0] - 8006c68: f442 5200 orr.w r2, r2, #8192 @ 0x2000 - 8006c6c: 60da str r2, [r3, #12] + 8005666: 687b ldr r3, [r7, #4] + 8005668: 681b ldr r3, [r3, #0] + 800566a: 68da ldr r2, [r3, #12] + 800566c: 687b ldr r3, [r7, #4] + 800566e: 681b ldr r3, [r3, #0] + 8005670: f442 5200 orr.w r2, r2, #8192 @ 0x2000 + 8005674: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8006c6e: 687b ldr r3, [r7, #4] - 8006c70: 2200 movs r2, #0 - 8006c72: 645a str r2, [r3, #68] @ 0x44 + 8005676: 687b ldr r3, [r7, #4] + 8005678: 2200 movs r2, #0 + 800567a: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; - 8006c74: 687b ldr r3, [r7, #4] - 8006c76: 2220 movs r2, #32 - 8006c78: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 800567c: 687b ldr r3, [r7, #4] + 800567e: 2220 movs r2, #32 + 8005680: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; - 8006c7c: 687b ldr r3, [r7, #4] - 8006c7e: 2220 movs r2, #32 - 8006c80: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005684: 687b ldr r3, [r7, #4] + 8005686: 2220 movs r2, #32 + 8005688: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; - 8006c84: 687b ldr r3, [r7, #4] - 8006c86: 2200 movs r2, #0 - 8006c88: 635a str r2, [r3, #52] @ 0x34 + 800568c: 687b ldr r3, [r7, #4] + 800568e: 2200 movs r2, #0 + 8005690: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; - 8006c8a: 2300 movs r3, #0 + 8005692: 2300 movs r3, #0 } - 8006c8c: 4618 mov r0, r3 - 8006c8e: 3708 adds r7, #8 - 8006c90: 46bd mov sp, r7 - 8006c92: bd80 pop {r7, pc} + 8005694: 4618 mov r0, r3 + 8005696: 3708 adds r7, #8 + 8005698: 46bd mov sp, r7 + 800569a: bd80 pop {r7, pc} -08006c94 : +0800569c : * @param Size Amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8006c94: b580 push {r7, lr} - 8006c96: b08a sub sp, #40 @ 0x28 - 8006c98: af02 add r7, sp, #8 - 8006c9a: 60f8 str r0, [r7, #12] - 8006c9c: 60b9 str r1, [r7, #8] - 8006c9e: 603b str r3, [r7, #0] - 8006ca0: 4613 mov r3, r2 - 8006ca2: 80fb strh r3, [r7, #6] + 800569c: b580 push {r7, lr} + 800569e: b08a sub sp, #40 @ 0x28 + 80056a0: af02 add r7, sp, #8 + 80056a2: 60f8 str r0, [r7, #12] + 80056a4: 60b9 str r1, [r7, #8] + 80056a6: 603b str r3, [r7, #0] + 80056a8: 4613 mov r3, r2 + 80056aa: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart = 0U; - 8006ca4: 2300 movs r3, #0 - 8006ca6: 617b str r3, [r7, #20] + 80056ac: 2300 movs r3, #0 + 80056ae: 617b str r3, [r7, #20] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8006ca8: 68fb ldr r3, [r7, #12] - 8006caa: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 8006cae: b2db uxtb r3, r3 - 8006cb0: 2b20 cmp r3, #32 - 8006cb2: d175 bne.n 8006da0 + 80056b0: 68fb ldr r3, [r7, #12] + 80056b2: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 80056b6: b2db uxtb r3, r3 + 80056b8: 2b20 cmp r3, #32 + 80056ba: d175 bne.n 80057a8 { if ((pData == NULL) || (Size == 0U)) - 8006cb4: 68bb ldr r3, [r7, #8] - 8006cb6: 2b00 cmp r3, #0 - 8006cb8: d002 beq.n 8006cc0 - 8006cba: 88fb ldrh r3, [r7, #6] - 8006cbc: 2b00 cmp r3, #0 - 8006cbe: d101 bne.n 8006cc4 + 80056bc: 68bb ldr r3, [r7, #8] + 80056be: 2b00 cmp r3, #0 + 80056c0: d002 beq.n 80056c8 + 80056c2: 88fb ldrh r3, [r7, #6] + 80056c4: 2b00 cmp r3, #0 + 80056c6: d101 bne.n 80056cc { return HAL_ERROR; - 8006cc0: 2301 movs r3, #1 - 8006cc2: e06e b.n 8006da2 + 80056c8: 2301 movs r3, #1 + 80056ca: e06e b.n 80057aa } huart->ErrorCode = HAL_UART_ERROR_NONE; - 8006cc4: 68fb ldr r3, [r7, #12] - 8006cc6: 2200 movs r2, #0 - 8006cc8: 645a str r2, [r3, #68] @ 0x44 + 80056cc: 68fb ldr r3, [r7, #12] + 80056ce: 2200 movs r2, #0 + 80056d0: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; - 8006cca: 68fb ldr r3, [r7, #12] - 8006ccc: 2221 movs r2, #33 @ 0x21 - 8006cce: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 80056d2: 68fb ldr r3, [r7, #12] + 80056d4: 2221 movs r2, #33 @ 0x21 + 80056d6: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 8006cd2: f7fc faff bl 80032d4 - 8006cd6: 6178 str r0, [r7, #20] + 80056da: f7fd fac7 bl 8002c6c + 80056de: 6178 str r0, [r7, #20] huart->TxXferSize = Size; - 8006cd8: 68fb ldr r3, [r7, #12] - 8006cda: 88fa ldrh r2, [r7, #6] - 8006cdc: 849a strh r2, [r3, #36] @ 0x24 + 80056e0: 68fb ldr r3, [r7, #12] + 80056e2: 88fa ldrh r2, [r7, #6] + 80056e4: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; - 8006cde: 68fb ldr r3, [r7, #12] - 8006ce0: 88fa ldrh r2, [r7, #6] - 8006ce2: 84da strh r2, [r3, #38] @ 0x26 + 80056e6: 68fb ldr r3, [r7, #12] + 80056e8: 88fa ldrh r2, [r7, #6] + 80056ea: 84da strh r2, [r3, #38] @ 0x26 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8006ce4: 68fb ldr r3, [r7, #12] - 8006ce6: 689b ldr r3, [r3, #8] - 8006ce8: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8006cec: d108 bne.n 8006d00 - 8006cee: 68fb ldr r3, [r7, #12] - 8006cf0: 691b ldr r3, [r3, #16] - 8006cf2: 2b00 cmp r3, #0 - 8006cf4: d104 bne.n 8006d00 + 80056ec: 68fb ldr r3, [r7, #12] + 80056ee: 689b ldr r3, [r3, #8] + 80056f0: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 80056f4: d108 bne.n 8005708 + 80056f6: 68fb ldr r3, [r7, #12] + 80056f8: 691b ldr r3, [r3, #16] + 80056fa: 2b00 cmp r3, #0 + 80056fc: d104 bne.n 8005708 { pdata8bits = NULL; - 8006cf6: 2300 movs r3, #0 - 8006cf8: 61fb str r3, [r7, #28] + 80056fe: 2300 movs r3, #0 + 8005700: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; - 8006cfa: 68bb ldr r3, [r7, #8] - 8006cfc: 61bb str r3, [r7, #24] - 8006cfe: e003 b.n 8006d08 + 8005702: 68bb ldr r3, [r7, #8] + 8005704: 61bb str r3, [r7, #24] + 8005706: e003 b.n 8005710 } else { pdata8bits = pData; - 8006d00: 68bb ldr r3, [r7, #8] - 8006d02: 61fb str r3, [r7, #28] + 8005708: 68bb ldr r3, [r7, #8] + 800570a: 61fb str r3, [r7, #28] pdata16bits = NULL; - 8006d04: 2300 movs r3, #0 - 8006d06: 61bb str r3, [r7, #24] + 800570c: 2300 movs r3, #0 + 800570e: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) - 8006d08: e02e b.n 8006d68 + 8005710: e02e b.n 8005770 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 8006d0a: 683b ldr r3, [r7, #0] - 8006d0c: 9300 str r3, [sp, #0] - 8006d0e: 697b ldr r3, [r7, #20] - 8006d10: 2200 movs r2, #0 - 8006d12: 2180 movs r1, #128 @ 0x80 - 8006d14: 68f8 ldr r0, [r7, #12] - 8006d16: f000 fb01 bl 800731c - 8006d1a: 4603 mov r3, r0 - 8006d1c: 2b00 cmp r3, #0 - 8006d1e: d005 beq.n 8006d2c + 8005712: 683b ldr r3, [r7, #0] + 8005714: 9300 str r3, [sp, #0] + 8005716: 697b ldr r3, [r7, #20] + 8005718: 2200 movs r2, #0 + 800571a: 2180 movs r1, #128 @ 0x80 + 800571c: 68f8 ldr r0, [r7, #12] + 800571e: f000 fb01 bl 8005d24 + 8005722: 4603 mov r3, r0 + 8005724: 2b00 cmp r3, #0 + 8005726: d005 beq.n 8005734 { huart->gState = HAL_UART_STATE_READY; - 8006d20: 68fb ldr r3, [r7, #12] - 8006d22: 2220 movs r2, #32 - 8006d24: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005728: 68fb ldr r3, [r7, #12] + 800572a: 2220 movs r2, #32 + 800572c: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; - 8006d28: 2303 movs r3, #3 - 8006d2a: e03a b.n 8006da2 + 8005730: 2303 movs r3, #3 + 8005732: e03a b.n 80057aa } if (pdata8bits == NULL) - 8006d2c: 69fb ldr r3, [r7, #28] - 8006d2e: 2b00 cmp r3, #0 - 8006d30: d10b bne.n 8006d4a + 8005734: 69fb ldr r3, [r7, #28] + 8005736: 2b00 cmp r3, #0 + 8005738: d10b bne.n 8005752 { huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); - 8006d32: 69bb ldr r3, [r7, #24] - 8006d34: 881b ldrh r3, [r3, #0] - 8006d36: 461a mov r2, r3 - 8006d38: 68fb ldr r3, [r7, #12] - 8006d3a: 681b ldr r3, [r3, #0] - 8006d3c: f3c2 0208 ubfx r2, r2, #0, #9 - 8006d40: 605a str r2, [r3, #4] + 800573a: 69bb ldr r3, [r7, #24] + 800573c: 881b ldrh r3, [r3, #0] + 800573e: 461a mov r2, r3 + 8005740: 68fb ldr r3, [r7, #12] + 8005742: 681b ldr r3, [r3, #0] + 8005744: f3c2 0208 ubfx r2, r2, #0, #9 + 8005748: 605a str r2, [r3, #4] pdata16bits++; - 8006d42: 69bb ldr r3, [r7, #24] - 8006d44: 3302 adds r3, #2 - 8006d46: 61bb str r3, [r7, #24] - 8006d48: e007 b.n 8006d5a + 800574a: 69bb ldr r3, [r7, #24] + 800574c: 3302 adds r3, #2 + 800574e: 61bb str r3, [r7, #24] + 8005750: e007 b.n 8005762 } else { huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); - 8006d4a: 69fb ldr r3, [r7, #28] - 8006d4c: 781a ldrb r2, [r3, #0] - 8006d4e: 68fb ldr r3, [r7, #12] - 8006d50: 681b ldr r3, [r3, #0] - 8006d52: 605a str r2, [r3, #4] + 8005752: 69fb ldr r3, [r7, #28] + 8005754: 781a ldrb r2, [r3, #0] + 8005756: 68fb ldr r3, [r7, #12] + 8005758: 681b ldr r3, [r3, #0] + 800575a: 605a str r2, [r3, #4] pdata8bits++; - 8006d54: 69fb ldr r3, [r7, #28] - 8006d56: 3301 adds r3, #1 - 8006d58: 61fb str r3, [r7, #28] + 800575c: 69fb ldr r3, [r7, #28] + 800575e: 3301 adds r3, #1 + 8005760: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 8006d5a: 68fb ldr r3, [r7, #12] - 8006d5c: 8cdb ldrh r3, [r3, #38] @ 0x26 - 8006d5e: b29b uxth r3, r3 - 8006d60: 3b01 subs r3, #1 - 8006d62: b29a uxth r2, r3 - 8006d64: 68fb ldr r3, [r7, #12] - 8006d66: 84da strh r2, [r3, #38] @ 0x26 + 8005762: 68fb ldr r3, [r7, #12] + 8005764: 8cdb ldrh r3, [r3, #38] @ 0x26 + 8005766: b29b uxth r3, r3 + 8005768: 3b01 subs r3, #1 + 800576a: b29a uxth r2, r3 + 800576c: 68fb ldr r3, [r7, #12] + 800576e: 84da strh r2, [r3, #38] @ 0x26 while (huart->TxXferCount > 0U) - 8006d68: 68fb ldr r3, [r7, #12] - 8006d6a: 8cdb ldrh r3, [r3, #38] @ 0x26 - 8006d6c: b29b uxth r3, r3 - 8006d6e: 2b00 cmp r3, #0 - 8006d70: d1cb bne.n 8006d0a + 8005770: 68fb ldr r3, [r7, #12] + 8005772: 8cdb ldrh r3, [r3, #38] @ 0x26 + 8005774: b29b uxth r3, r3 + 8005776: 2b00 cmp r3, #0 + 8005778: d1cb bne.n 8005712 } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 8006d72: 683b ldr r3, [r7, #0] - 8006d74: 9300 str r3, [sp, #0] - 8006d76: 697b ldr r3, [r7, #20] - 8006d78: 2200 movs r2, #0 - 8006d7a: 2140 movs r1, #64 @ 0x40 - 8006d7c: 68f8 ldr r0, [r7, #12] - 8006d7e: f000 facd bl 800731c - 8006d82: 4603 mov r3, r0 - 8006d84: 2b00 cmp r3, #0 - 8006d86: d005 beq.n 8006d94 + 800577a: 683b ldr r3, [r7, #0] + 800577c: 9300 str r3, [sp, #0] + 800577e: 697b ldr r3, [r7, #20] + 8005780: 2200 movs r2, #0 + 8005782: 2140 movs r1, #64 @ 0x40 + 8005784: 68f8 ldr r0, [r7, #12] + 8005786: f000 facd bl 8005d24 + 800578a: 4603 mov r3, r0 + 800578c: 2b00 cmp r3, #0 + 800578e: d005 beq.n 800579c { huart->gState = HAL_UART_STATE_READY; - 8006d88: 68fb ldr r3, [r7, #12] - 8006d8a: 2220 movs r2, #32 - 8006d8c: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005790: 68fb ldr r3, [r7, #12] + 8005792: 2220 movs r2, #32 + 8005794: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; - 8006d90: 2303 movs r3, #3 - 8006d92: e006 b.n 8006da2 + 8005798: 2303 movs r3, #3 + 800579a: e006 b.n 80057aa } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8006d94: 68fb ldr r3, [r7, #12] - 8006d96: 2220 movs r2, #32 - 8006d98: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 800579c: 68fb ldr r3, [r7, #12] + 800579e: 2220 movs r2, #32 + 80057a0: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_OK; - 8006d9c: 2300 movs r3, #0 - 8006d9e: e000 b.n 8006da2 + 80057a4: 2300 movs r3, #0 + 80057a6: e000 b.n 80057aa } else { return HAL_BUSY; - 8006da0: 2302 movs r3, #2 + 80057a8: 2302 movs r3, #2 } } - 8006da2: 4618 mov r0, r3 - 8006da4: 3720 adds r7, #32 - 8006da6: 46bd mov sp, r7 - 8006da8: bd80 pop {r7, pc} + 80057aa: 4618 mov r0, r3 + 80057ac: 3720 adds r7, #32 + 80057ae: 46bd mov sp, r7 + 80057b0: bd80 pop {r7, pc} ... -08006dac : +080057b4 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - 8006dac: b580 push {r7, lr} - 8006dae: b0ba sub sp, #232 @ 0xe8 - 8006db0: af00 add r7, sp, #0 - 8006db2: 6078 str r0, [r7, #4] + 80057b4: b580 push {r7, lr} + 80057b6: b0ba sub sp, #232 @ 0xe8 + 80057b8: af00 add r7, sp, #0 + 80057ba: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->SR); - 8006db4: 687b ldr r3, [r7, #4] - 8006db6: 681b ldr r3, [r3, #0] - 8006db8: 681b ldr r3, [r3, #0] - 8006dba: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 + 80057bc: 687b ldr r3, [r7, #4] + 80057be: 681b ldr r3, [r3, #0] + 80057c0: 681b ldr r3, [r3, #0] + 80057c2: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8006dbe: 687b ldr r3, [r7, #4] - 8006dc0: 681b ldr r3, [r3, #0] - 8006dc2: 68db ldr r3, [r3, #12] - 8006dc4: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 + 80057c6: 687b ldr r3, [r7, #4] + 80057c8: 681b ldr r3, [r3, #0] + 80057ca: 68db ldr r3, [r3, #12] + 80057cc: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8006dc8: 687b ldr r3, [r7, #4] - 8006dca: 681b ldr r3, [r3, #0] - 8006dcc: 695b ldr r3, [r3, #20] - 8006dce: f8c7 30dc str.w r3, [r7, #220] @ 0xdc + 80057d0: 687b ldr r3, [r7, #4] + 80057d2: 681b ldr r3, [r3, #0] + 80057d4: 695b ldr r3, [r3, #20] + 80057d6: f8c7 30dc str.w r3, [r7, #220] @ 0xdc uint32_t errorflags = 0x00U; - 8006dd2: 2300 movs r3, #0 - 8006dd4: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 + 80057da: 2300 movs r3, #0 + 80057dc: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 uint32_t dmarequest = 0x00U; - 8006dd8: 2300 movs r3, #0 - 8006dda: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 + 80057e0: 2300 movs r3, #0 + 80057e2: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); - 8006dde: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8006de2: f003 030f and.w r3, r3, #15 - 8006de6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 + 80057e6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80057ea: f003 030f and.w r3, r3, #15 + 80057ee: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 if (errorflags == RESET) - 8006dea: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 - 8006dee: 2b00 cmp r3, #0 - 8006df0: d10f bne.n 8006e12 + 80057f2: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 + 80057f6: 2b00 cmp r3, #0 + 80057f8: d10f bne.n 800581a { /* UART in mode Receiver -------------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 8006df2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8006df6: f003 0320 and.w r3, r3, #32 - 8006dfa: 2b00 cmp r3, #0 - 8006dfc: d009 beq.n 8006e12 - 8006dfe: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8006e02: f003 0320 and.w r3, r3, #32 - 8006e06: 2b00 cmp r3, #0 - 8006e08: d003 beq.n 8006e12 + 80057fa: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80057fe: f003 0320 and.w r3, r3, #32 + 8005802: 2b00 cmp r3, #0 + 8005804: d009 beq.n 800581a + 8005806: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 800580a: f003 0320 and.w r3, r3, #32 + 800580e: 2b00 cmp r3, #0 + 8005810: d003 beq.n 800581a { UART_Receive_IT(huart); - 8006e0a: 6878 ldr r0, [r7, #4] - 8006e0c: f000 fbbc bl 8007588 + 8005812: 6878 ldr r0, [r7, #4] + 8005814: f000 fbbc bl 8005f90 return; - 8006e10: e25b b.n 80072ca + 8005818: e25b b.n 8005cd2 } } /* If some errors occur */ if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) - 8006e12: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 - 8006e16: 2b00 cmp r3, #0 - 8006e18: f000 80de beq.w 8006fd8 - 8006e1c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 8006e20: f003 0301 and.w r3, r3, #1 - 8006e24: 2b00 cmp r3, #0 - 8006e26: d106 bne.n 8006e36 + 800581a: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 + 800581e: 2b00 cmp r3, #0 + 8005820: f000 80de beq.w 80059e0 + 8005824: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8005828: f003 0301 and.w r3, r3, #1 + 800582c: 2b00 cmp r3, #0 + 800582e: d106 bne.n 800583e || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) - 8006e28: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8006e2c: f403 7390 and.w r3, r3, #288 @ 0x120 - 8006e30: 2b00 cmp r3, #0 - 8006e32: f000 80d1 beq.w 8006fd8 + 8005830: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005834: f403 7390 and.w r3, r3, #288 @ 0x120 + 8005838: 2b00 cmp r3, #0 + 800583a: f000 80d1 beq.w 80059e0 { /* UART parity error interrupt occurred ----------------------------------*/ if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) - 8006e36: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8006e3a: f003 0301 and.w r3, r3, #1 - 8006e3e: 2b00 cmp r3, #0 - 8006e40: d00b beq.n 8006e5a - 8006e42: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8006e46: f403 7380 and.w r3, r3, #256 @ 0x100 - 8006e4a: 2b00 cmp r3, #0 - 8006e4c: d005 beq.n 8006e5a + 800583e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005842: f003 0301 and.w r3, r3, #1 + 8005846: 2b00 cmp r3, #0 + 8005848: d00b beq.n 8005862 + 800584a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 800584e: f403 7380 and.w r3, r3, #256 @ 0x100 + 8005852: 2b00 cmp r3, #0 + 8005854: d005 beq.n 8005862 { huart->ErrorCode |= HAL_UART_ERROR_PE; - 8006e4e: 687b ldr r3, [r7, #4] - 8006e50: 6c5b ldr r3, [r3, #68] @ 0x44 - 8006e52: f043 0201 orr.w r2, r3, #1 - 8006e56: 687b ldr r3, [r7, #4] - 8006e58: 645a str r2, [r3, #68] @ 0x44 + 8005856: 687b ldr r3, [r7, #4] + 8005858: 6c5b ldr r3, [r3, #68] @ 0x44 + 800585a: f043 0201 orr.w r2, r3, #1 + 800585e: 687b ldr r3, [r7, #4] + 8005860: 645a str r2, [r3, #68] @ 0x44 } /* UART noise error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 8006e5a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8006e5e: f003 0304 and.w r3, r3, #4 - 8006e62: 2b00 cmp r3, #0 - 8006e64: d00b beq.n 8006e7e - 8006e66: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 8006e6a: f003 0301 and.w r3, r3, #1 - 8006e6e: 2b00 cmp r3, #0 - 8006e70: d005 beq.n 8006e7e + 8005862: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005866: f003 0304 and.w r3, r3, #4 + 800586a: 2b00 cmp r3, #0 + 800586c: d00b beq.n 8005886 + 800586e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8005872: f003 0301 and.w r3, r3, #1 + 8005876: 2b00 cmp r3, #0 + 8005878: d005 beq.n 8005886 { huart->ErrorCode |= HAL_UART_ERROR_NE; - 8006e72: 687b ldr r3, [r7, #4] - 8006e74: 6c5b ldr r3, [r3, #68] @ 0x44 - 8006e76: f043 0202 orr.w r2, r3, #2 - 8006e7a: 687b ldr r3, [r7, #4] - 8006e7c: 645a str r2, [r3, #68] @ 0x44 + 800587a: 687b ldr r3, [r7, #4] + 800587c: 6c5b ldr r3, [r3, #68] @ 0x44 + 800587e: f043 0202 orr.w r2, r3, #2 + 8005882: 687b ldr r3, [r7, #4] + 8005884: 645a str r2, [r3, #68] @ 0x44 } /* UART frame error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 8006e7e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8006e82: f003 0302 and.w r3, r3, #2 - 8006e86: 2b00 cmp r3, #0 - 8006e88: d00b beq.n 8006ea2 - 8006e8a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 8006e8e: f003 0301 and.w r3, r3, #1 - 8006e92: 2b00 cmp r3, #0 - 8006e94: d005 beq.n 8006ea2 + 8005886: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 800588a: f003 0302 and.w r3, r3, #2 + 800588e: 2b00 cmp r3, #0 + 8005890: d00b beq.n 80058aa + 8005892: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8005896: f003 0301 and.w r3, r3, #1 + 800589a: 2b00 cmp r3, #0 + 800589c: d005 beq.n 80058aa { huart->ErrorCode |= HAL_UART_ERROR_FE; - 8006e96: 687b ldr r3, [r7, #4] - 8006e98: 6c5b ldr r3, [r3, #68] @ 0x44 - 8006e9a: f043 0204 orr.w r2, r3, #4 - 8006e9e: 687b ldr r3, [r7, #4] - 8006ea0: 645a str r2, [r3, #68] @ 0x44 + 800589e: 687b ldr r3, [r7, #4] + 80058a0: 6c5b ldr r3, [r3, #68] @ 0x44 + 80058a2: f043 0204 orr.w r2, r3, #4 + 80058a6: 687b ldr r3, [r7, #4] + 80058a8: 645a str r2, [r3, #68] @ 0x44 } /* UART Over-Run interrupt occurred --------------------------------------*/ if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) - 8006ea2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8006ea6: f003 0308 and.w r3, r3, #8 - 8006eaa: 2b00 cmp r3, #0 - 8006eac: d011 beq.n 8006ed2 - 8006eae: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8006eb2: f003 0320 and.w r3, r3, #32 - 8006eb6: 2b00 cmp r3, #0 - 8006eb8: d105 bne.n 8006ec6 + 80058aa: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80058ae: f003 0308 and.w r3, r3, #8 + 80058b2: 2b00 cmp r3, #0 + 80058b4: d011 beq.n 80058da + 80058b6: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80058ba: f003 0320 and.w r3, r3, #32 + 80058be: 2b00 cmp r3, #0 + 80058c0: d105 bne.n 80058ce || ((cr3its & USART_CR3_EIE) != RESET))) - 8006eba: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 8006ebe: f003 0301 and.w r3, r3, #1 - 8006ec2: 2b00 cmp r3, #0 - 8006ec4: d005 beq.n 8006ed2 + 80058c2: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 80058c6: f003 0301 and.w r3, r3, #1 + 80058ca: 2b00 cmp r3, #0 + 80058cc: d005 beq.n 80058da { huart->ErrorCode |= HAL_UART_ERROR_ORE; - 8006ec6: 687b ldr r3, [r7, #4] - 8006ec8: 6c5b ldr r3, [r3, #68] @ 0x44 - 8006eca: f043 0208 orr.w r2, r3, #8 - 8006ece: 687b ldr r3, [r7, #4] - 8006ed0: 645a str r2, [r3, #68] @ 0x44 + 80058ce: 687b ldr r3, [r7, #4] + 80058d0: 6c5b ldr r3, [r3, #68] @ 0x44 + 80058d2: f043 0208 orr.w r2, r3, #8 + 80058d6: 687b ldr r3, [r7, #4] + 80058d8: 645a str r2, [r3, #68] @ 0x44 } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8006ed2: 687b ldr r3, [r7, #4] - 8006ed4: 6c5b ldr r3, [r3, #68] @ 0x44 - 8006ed6: 2b00 cmp r3, #0 - 8006ed8: f000 81f2 beq.w 80072c0 + 80058da: 687b ldr r3, [r7, #4] + 80058dc: 6c5b ldr r3, [r3, #68] @ 0x44 + 80058de: 2b00 cmp r3, #0 + 80058e0: f000 81f2 beq.w 8005cc8 { /* UART in mode Receiver -----------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 8006edc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8006ee0: f003 0320 and.w r3, r3, #32 - 8006ee4: 2b00 cmp r3, #0 - 8006ee6: d008 beq.n 8006efa - 8006ee8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8006eec: f003 0320 and.w r3, r3, #32 - 8006ef0: 2b00 cmp r3, #0 - 8006ef2: d002 beq.n 8006efa + 80058e4: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80058e8: f003 0320 and.w r3, r3, #32 + 80058ec: 2b00 cmp r3, #0 + 80058ee: d008 beq.n 8005902 + 80058f0: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80058f4: f003 0320 and.w r3, r3, #32 + 80058f8: 2b00 cmp r3, #0 + 80058fa: d002 beq.n 8005902 { UART_Receive_IT(huart); - 8006ef4: 6878 ldr r0, [r7, #4] - 8006ef6: f000 fb47 bl 8007588 + 80058fc: 6878 ldr r0, [r7, #4] + 80058fe: f000 fb47 bl 8005f90 } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - 8006efa: 687b ldr r3, [r7, #4] - 8006efc: 681b ldr r3, [r3, #0] - 8006efe: 695b ldr r3, [r3, #20] - 8006f00: f003 0340 and.w r3, r3, #64 @ 0x40 - 8006f04: 2b00 cmp r3, #0 - 8006f06: bf14 ite ne - 8006f08: 2301 movne r3, #1 - 8006f0a: 2300 moveq r3, #0 - 8006f0c: b2db uxtb r3, r3 - 8006f0e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 + 8005902: 687b ldr r3, [r7, #4] + 8005904: 681b ldr r3, [r3, #0] + 8005906: 695b ldr r3, [r3, #20] + 8005908: f003 0340 and.w r3, r3, #64 @ 0x40 + 800590c: 2b00 cmp r3, #0 + 800590e: bf14 ite ne + 8005910: 2301 movne r3, #1 + 8005912: 2300 moveq r3, #0 + 8005914: b2db uxtb r3, r3 + 8005916: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) - 8006f12: 687b ldr r3, [r7, #4] - 8006f14: 6c5b ldr r3, [r3, #68] @ 0x44 - 8006f16: f003 0308 and.w r3, r3, #8 - 8006f1a: 2b00 cmp r3, #0 - 8006f1c: d103 bne.n 8006f26 - 8006f1e: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 - 8006f22: 2b00 cmp r3, #0 - 8006f24: d04f beq.n 8006fc6 + 800591a: 687b ldr r3, [r7, #4] + 800591c: 6c5b ldr r3, [r3, #68] @ 0x44 + 800591e: f003 0308 and.w r3, r3, #8 + 8005922: 2b00 cmp r3, #0 + 8005924: d103 bne.n 800592e + 8005926: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 + 800592a: 2b00 cmp r3, #0 + 800592c: d04f beq.n 80059ce { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); - 8006f26: 6878 ldr r0, [r7, #4] - 8006f28: f000 fa51 bl 80073ce + 800592e: 6878 ldr r0, [r7, #4] + 8005930: f000 fa51 bl 8005dd6 /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8006f2c: 687b ldr r3, [r7, #4] - 8006f2e: 681b ldr r3, [r3, #0] - 8006f30: 695b ldr r3, [r3, #20] - 8006f32: f003 0340 and.w r3, r3, #64 @ 0x40 - 8006f36: 2b00 cmp r3, #0 - 8006f38: d041 beq.n 8006fbe + 8005934: 687b ldr r3, [r7, #4] + 8005936: 681b ldr r3, [r3, #0] + 8005938: 695b ldr r3, [r3, #20] + 800593a: f003 0340 and.w r3, r3, #64 @ 0x40 + 800593e: 2b00 cmp r3, #0 + 8005940: d041 beq.n 80059c6 { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8006f3a: 687b ldr r3, [r7, #4] - 8006f3c: 681b ldr r3, [r3, #0] - 8006f3e: 3314 adds r3, #20 - 8006f40: f8c7 309c str.w r3, [r7, #156] @ 0x9c + 8005942: 687b ldr r3, [r7, #4] + 8005944: 681b ldr r3, [r3, #0] + 8005946: 3314 adds r3, #20 + 8005948: f8c7 309c str.w r3, [r7, #156] @ 0x9c */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8006f44: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c - 8006f48: e853 3f00 ldrex r3, [r3] - 8006f4c: f8c7 3098 str.w r3, [r7, #152] @ 0x98 + 800594c: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c + 8005950: e853 3f00 ldrex r3, [r3] + 8005954: f8c7 3098 str.w r3, [r7, #152] @ 0x98 return(result); - 8006f50: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 - 8006f54: f023 0340 bic.w r3, r3, #64 @ 0x40 - 8006f58: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 - 8006f5c: 687b ldr r3, [r7, #4] - 8006f5e: 681b ldr r3, [r3, #0] - 8006f60: 3314 adds r3, #20 - 8006f62: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 - 8006f66: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 - 8006f6a: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 + 8005958: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 + 800595c: f023 0340 bic.w r3, r3, #64 @ 0x40 + 8005960: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 + 8005964: 687b ldr r3, [r7, #4] + 8005966: 681b ldr r3, [r3, #0] + 8005968: 3314 adds r3, #20 + 800596a: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 + 800596e: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 + 8005972: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8006f6e: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 - 8006f72: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 - 8006f76: e841 2300 strex r3, r2, [r1] - 8006f7a: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 + 8005976: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 + 800597a: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 + 800597e: e841 2300 strex r3, r2, [r1] + 8005982: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 return(result); - 8006f7e: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 - 8006f82: 2b00 cmp r3, #0 - 8006f84: d1d9 bne.n 8006f3a + 8005986: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 + 800598a: 2b00 cmp r3, #0 + 800598c: d1d9 bne.n 8005942 /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) - 8006f86: 687b ldr r3, [r7, #4] - 8006f88: 6bdb ldr r3, [r3, #60] @ 0x3c - 8006f8a: 2b00 cmp r3, #0 - 8006f8c: d013 beq.n 8006fb6 + 800598e: 687b ldr r3, [r7, #4] + 8005990: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005992: 2b00 cmp r3, #0 + 8005994: d013 beq.n 80059be { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 8006f8e: 687b ldr r3, [r7, #4] - 8006f90: 6bdb ldr r3, [r3, #60] @ 0x3c - 8006f92: 4a7e ldr r2, [pc, #504] @ (800718c ) - 8006f94: 635a str r2, [r3, #52] @ 0x34 + 8005996: 687b ldr r3, [r7, #4] + 8005998: 6bdb ldr r3, [r3, #60] @ 0x3c + 800599a: 4a7e ldr r2, [pc, #504] @ (8005b94 ) + 800599c: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 8006f96: 687b ldr r3, [r7, #4] - 8006f98: 6bdb ldr r3, [r3, #60] @ 0x3c - 8006f9a: 4618 mov r0, r3 - 8006f9c: f7fd f83c bl 8004018 - 8006fa0: 4603 mov r3, r0 - 8006fa2: 2b00 cmp r3, #0 - 8006fa4: d016 beq.n 8006fd4 + 800599e: 687b ldr r3, [r7, #4] + 80059a0: 6bdb ldr r3, [r3, #60] @ 0x3c + 80059a2: 4618 mov r0, r3 + 80059a4: f7fd fcea bl 800337c + 80059a8: 4603 mov r3, r0 + 80059aa: 2b00 cmp r3, #0 + 80059ac: d016 beq.n 80059dc { /* Call Directly XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); - 8006fa6: 687b ldr r3, [r7, #4] - 8006fa8: 6bdb ldr r3, [r3, #60] @ 0x3c - 8006faa: 6b5b ldr r3, [r3, #52] @ 0x34 - 8006fac: 687a ldr r2, [r7, #4] - 8006fae: 6bd2 ldr r2, [r2, #60] @ 0x3c - 8006fb0: 4610 mov r0, r2 - 8006fb2: 4798 blx r3 + 80059ae: 687b ldr r3, [r7, #4] + 80059b0: 6bdb ldr r3, [r3, #60] @ 0x3c + 80059b2: 6b5b ldr r3, [r3, #52] @ 0x34 + 80059b4: 687a ldr r2, [r7, #4] + 80059b6: 6bd2 ldr r2, [r2, #60] @ 0x3c + 80059b8: 4610 mov r0, r2 + 80059ba: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8006fb4: e00e b.n 8006fd4 + 80059bc: e00e b.n 80059dc #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8006fb6: 6878 ldr r0, [r7, #4] - 8006fb8: f000 f99c bl 80072f4 + 80059be: 6878 ldr r0, [r7, #4] + 80059c0: f000 f99c bl 8005cfc if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8006fbc: e00a b.n 8006fd4 + 80059c4: e00a b.n 80059dc #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8006fbe: 6878 ldr r0, [r7, #4] - 8006fc0: f000 f998 bl 80072f4 + 80059c6: 6878 ldr r0, [r7, #4] + 80059c8: f000 f998 bl 8005cfc if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8006fc4: e006 b.n 8006fd4 + 80059cc: e006 b.n 80059dc #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8006fc6: 6878 ldr r0, [r7, #4] - 8006fc8: f000 f994 bl 80072f4 + 80059ce: 6878 ldr r0, [r7, #4] + 80059d0: f000 f994 bl 8005cfc #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8006fcc: 687b ldr r3, [r7, #4] - 8006fce: 2200 movs r2, #0 - 8006fd0: 645a str r2, [r3, #68] @ 0x44 + 80059d4: 687b ldr r3, [r7, #4] + 80059d6: 2200 movs r2, #0 + 80059d8: 645a str r2, [r3, #68] @ 0x44 } } return; - 8006fd2: e175 b.n 80072c0 + 80059da: e175 b.n 8005cc8 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8006fd4: bf00 nop + 80059dc: bf00 nop return; - 8006fd6: e173 b.n 80072c0 + 80059de: e173 b.n 8005cc8 } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8006fd8: 687b ldr r3, [r7, #4] - 8006fda: 6b1b ldr r3, [r3, #48] @ 0x30 - 8006fdc: 2b01 cmp r3, #1 - 8006fde: f040 814f bne.w 8007280 + 80059e0: 687b ldr r3, [r7, #4] + 80059e2: 6b1b ldr r3, [r3, #48] @ 0x30 + 80059e4: 2b01 cmp r3, #1 + 80059e6: f040 814f bne.w 8005c88 && ((isrflags & USART_SR_IDLE) != 0U) - 8006fe2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8006fe6: f003 0310 and.w r3, r3, #16 - 8006fea: 2b00 cmp r3, #0 - 8006fec: f000 8148 beq.w 8007280 + 80059ea: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80059ee: f003 0310 and.w r3, r3, #16 + 80059f2: 2b00 cmp r3, #0 + 80059f4: f000 8148 beq.w 8005c88 && ((cr1its & USART_SR_IDLE) != 0U)) - 8006ff0: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8006ff4: f003 0310 and.w r3, r3, #16 - 8006ff8: 2b00 cmp r3, #0 - 8006ffa: f000 8141 beq.w 8007280 + 80059f8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80059fc: f003 0310 and.w r3, r3, #16 + 8005a00: 2b00 cmp r3, #0 + 8005a02: f000 8141 beq.w 8005c88 { __HAL_UART_CLEAR_IDLEFLAG(huart); - 8006ffe: 2300 movs r3, #0 - 8007000: 60bb str r3, [r7, #8] - 8007002: 687b ldr r3, [r7, #4] - 8007004: 681b ldr r3, [r3, #0] - 8007006: 681b ldr r3, [r3, #0] - 8007008: 60bb str r3, [r7, #8] - 800700a: 687b ldr r3, [r7, #4] - 800700c: 681b ldr r3, [r3, #0] - 800700e: 685b ldr r3, [r3, #4] - 8007010: 60bb str r3, [r7, #8] - 8007012: 68bb ldr r3, [r7, #8] + 8005a06: 2300 movs r3, #0 + 8005a08: 60bb str r3, [r7, #8] + 8005a0a: 687b ldr r3, [r7, #4] + 8005a0c: 681b ldr r3, [r3, #0] + 8005a0e: 681b ldr r3, [r3, #0] + 8005a10: 60bb str r3, [r7, #8] + 8005a12: 687b ldr r3, [r7, #4] + 8005a14: 681b ldr r3, [r3, #0] + 8005a16: 685b ldr r3, [r3, #4] + 8005a18: 60bb str r3, [r7, #8] + 8005a1a: 68bb ldr r3, [r7, #8] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8007014: 687b ldr r3, [r7, #4] - 8007016: 681b ldr r3, [r3, #0] - 8007018: 695b ldr r3, [r3, #20] - 800701a: f003 0340 and.w r3, r3, #64 @ 0x40 - 800701e: 2b00 cmp r3, #0 - 8007020: f000 80b6 beq.w 8007190 + 8005a1c: 687b ldr r3, [r7, #4] + 8005a1e: 681b ldr r3, [r3, #0] + 8005a20: 695b ldr r3, [r3, #20] + 8005a22: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005a26: 2b00 cmp r3, #0 + 8005a28: f000 80b6 beq.w 8005b98 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 8007024: 687b ldr r3, [r7, #4] - 8007026: 6bdb ldr r3, [r3, #60] @ 0x3c - 8007028: 681b ldr r3, [r3, #0] - 800702a: 685b ldr r3, [r3, #4] - 800702c: f8a7 30be strh.w r3, [r7, #190] @ 0xbe + 8005a2c: 687b ldr r3, [r7, #4] + 8005a2e: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005a30: 681b ldr r3, [r3, #0] + 8005a32: 685b ldr r3, [r3, #4] + 8005a34: f8a7 30be strh.w r3, [r7, #190] @ 0xbe if ((nb_remaining_rx_data > 0U) - 8007030: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe - 8007034: 2b00 cmp r3, #0 - 8007036: f000 8145 beq.w 80072c4 + 8005a38: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe + 8005a3c: 2b00 cmp r3, #0 + 8005a3e: f000 8145 beq.w 8005ccc && (nb_remaining_rx_data < huart->RxXferSize)) - 800703a: 687b ldr r3, [r7, #4] - 800703c: 8d9b ldrh r3, [r3, #44] @ 0x2c - 800703e: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe - 8007042: 429a cmp r2, r3 - 8007044: f080 813e bcs.w 80072c4 + 8005a42: 687b ldr r3, [r7, #4] + 8005a44: 8d9b ldrh r3, [r3, #44] @ 0x2c + 8005a46: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe + 8005a4a: 429a cmp r2, r3 + 8005a4c: f080 813e bcs.w 8005ccc { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; - 8007048: 687b ldr r3, [r7, #4] - 800704a: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe - 800704e: 85da strh r2, [r3, #46] @ 0x2e + 8005a50: 687b ldr r3, [r7, #4] + 8005a52: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe + 8005a56: 85da strh r2, [r3, #46] @ 0x2e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) - 8007050: 687b ldr r3, [r7, #4] - 8007052: 6bdb ldr r3, [r3, #60] @ 0x3c - 8007054: 699b ldr r3, [r3, #24] - 8007056: 2b20 cmp r3, #32 - 8007058: f000 8088 beq.w 800716c + 8005a58: 687b ldr r3, [r7, #4] + 8005a5a: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005a5c: 699b ldr r3, [r3, #24] + 8005a5e: 2b20 cmp r3, #32 + 8005a60: f000 8088 beq.w 8005b74 { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 800705c: 687b ldr r3, [r7, #4] - 800705e: 681b ldr r3, [r3, #0] - 8007060: 330c adds r3, #12 - 8007062: f8c7 3088 str.w r3, [r7, #136] @ 0x88 + 8005a64: 687b ldr r3, [r7, #4] + 8005a66: 681b ldr r3, [r3, #0] + 8005a68: 330c adds r3, #12 + 8005a6a: f8c7 3088 str.w r3, [r7, #136] @ 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8007066: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 - 800706a: e853 3f00 ldrex r3, [r3] - 800706e: f8c7 3084 str.w r3, [r7, #132] @ 0x84 + 8005a6e: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 + 8005a72: e853 3f00 ldrex r3, [r3] + 8005a76: f8c7 3084 str.w r3, [r7, #132] @ 0x84 return(result); - 8007072: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 - 8007076: f423 7380 bic.w r3, r3, #256 @ 0x100 - 800707a: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 - 800707e: 687b ldr r3, [r7, #4] - 8007080: 681b ldr r3, [r3, #0] - 8007082: 330c adds r3, #12 - 8007084: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 - 8007088: f8c7 2094 str.w r2, [r7, #148] @ 0x94 - 800708c: f8c7 3090 str.w r3, [r7, #144] @ 0x90 + 8005a7a: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 + 8005a7e: f423 7380 bic.w r3, r3, #256 @ 0x100 + 8005a82: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 + 8005a86: 687b ldr r3, [r7, #4] + 8005a88: 681b ldr r3, [r3, #0] + 8005a8a: 330c adds r3, #12 + 8005a8c: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 + 8005a90: f8c7 2094 str.w r2, [r7, #148] @ 0x94 + 8005a94: f8c7 3090 str.w r3, [r7, #144] @ 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8007090: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 - 8007094: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 - 8007098: e841 2300 strex r3, r2, [r1] - 800709c: f8c7 308c str.w r3, [r7, #140] @ 0x8c + 8005a98: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 + 8005a9c: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 + 8005aa0: e841 2300 strex r3, r2, [r1] + 8005aa4: f8c7 308c str.w r3, [r7, #140] @ 0x8c return(result); - 80070a0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c - 80070a4: 2b00 cmp r3, #0 - 80070a6: d1d9 bne.n 800705c + 8005aa8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c + 8005aac: 2b00 cmp r3, #0 + 8005aae: d1d9 bne.n 8005a64 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80070a8: 687b ldr r3, [r7, #4] - 80070aa: 681b ldr r3, [r3, #0] - 80070ac: 3314 adds r3, #20 - 80070ae: 677b str r3, [r7, #116] @ 0x74 + 8005ab0: 687b ldr r3, [r7, #4] + 8005ab2: 681b ldr r3, [r3, #0] + 8005ab4: 3314 adds r3, #20 + 8005ab6: 677b str r3, [r7, #116] @ 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80070b0: 6f7b ldr r3, [r7, #116] @ 0x74 - 80070b2: e853 3f00 ldrex r3, [r3] - 80070b6: 673b str r3, [r7, #112] @ 0x70 + 8005ab8: 6f7b ldr r3, [r7, #116] @ 0x74 + 8005aba: e853 3f00 ldrex r3, [r3] + 8005abe: 673b str r3, [r7, #112] @ 0x70 return(result); - 80070b8: 6f3b ldr r3, [r7, #112] @ 0x70 - 80070ba: f023 0301 bic.w r3, r3, #1 - 80070be: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 - 80070c2: 687b ldr r3, [r7, #4] - 80070c4: 681b ldr r3, [r3, #0] - 80070c6: 3314 adds r3, #20 - 80070c8: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 - 80070cc: f8c7 2080 str.w r2, [r7, #128] @ 0x80 - 80070d0: 67fb str r3, [r7, #124] @ 0x7c + 8005ac0: 6f3b ldr r3, [r7, #112] @ 0x70 + 8005ac2: f023 0301 bic.w r3, r3, #1 + 8005ac6: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 + 8005aca: 687b ldr r3, [r7, #4] + 8005acc: 681b ldr r3, [r3, #0] + 8005ace: 3314 adds r3, #20 + 8005ad0: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 + 8005ad4: f8c7 2080 str.w r2, [r7, #128] @ 0x80 + 8005ad8: 67fb str r3, [r7, #124] @ 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80070d2: 6ff9 ldr r1, [r7, #124] @ 0x7c - 80070d4: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 - 80070d8: e841 2300 strex r3, r2, [r1] - 80070dc: 67bb str r3, [r7, #120] @ 0x78 + 8005ada: 6ff9 ldr r1, [r7, #124] @ 0x7c + 8005adc: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 + 8005ae0: e841 2300 strex r3, r2, [r1] + 8005ae4: 67bb str r3, [r7, #120] @ 0x78 return(result); - 80070de: 6fbb ldr r3, [r7, #120] @ 0x78 - 80070e0: 2b00 cmp r3, #0 - 80070e2: d1e1 bne.n 80070a8 + 8005ae6: 6fbb ldr r3, [r7, #120] @ 0x78 + 8005ae8: 2b00 cmp r3, #0 + 8005aea: d1e1 bne.n 8005ab0 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 80070e4: 687b ldr r3, [r7, #4] - 80070e6: 681b ldr r3, [r3, #0] - 80070e8: 3314 adds r3, #20 - 80070ea: 663b str r3, [r7, #96] @ 0x60 + 8005aec: 687b ldr r3, [r7, #4] + 8005aee: 681b ldr r3, [r3, #0] + 8005af0: 3314 adds r3, #20 + 8005af2: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80070ec: 6e3b ldr r3, [r7, #96] @ 0x60 - 80070ee: e853 3f00 ldrex r3, [r3] - 80070f2: 65fb str r3, [r7, #92] @ 0x5c + 8005af4: 6e3b ldr r3, [r7, #96] @ 0x60 + 8005af6: e853 3f00 ldrex r3, [r3] + 8005afa: 65fb str r3, [r7, #92] @ 0x5c return(result); - 80070f4: 6dfb ldr r3, [r7, #92] @ 0x5c - 80070f6: f023 0340 bic.w r3, r3, #64 @ 0x40 - 80070fa: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 - 80070fe: 687b ldr r3, [r7, #4] - 8007100: 681b ldr r3, [r3, #0] - 8007102: 3314 adds r3, #20 - 8007104: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 - 8007108: 66fa str r2, [r7, #108] @ 0x6c - 800710a: 66bb str r3, [r7, #104] @ 0x68 + 8005afc: 6dfb ldr r3, [r7, #92] @ 0x5c + 8005afe: f023 0340 bic.w r3, r3, #64 @ 0x40 + 8005b02: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 + 8005b06: 687b ldr r3, [r7, #4] + 8005b08: 681b ldr r3, [r3, #0] + 8005b0a: 3314 adds r3, #20 + 8005b0c: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 + 8005b10: 66fa str r2, [r7, #108] @ 0x6c + 8005b12: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800710c: 6eb9 ldr r1, [r7, #104] @ 0x68 - 800710e: 6efa ldr r2, [r7, #108] @ 0x6c - 8007110: e841 2300 strex r3, r2, [r1] - 8007114: 667b str r3, [r7, #100] @ 0x64 + 8005b14: 6eb9 ldr r1, [r7, #104] @ 0x68 + 8005b16: 6efa ldr r2, [r7, #108] @ 0x6c + 8005b18: e841 2300 strex r3, r2, [r1] + 8005b1c: 667b str r3, [r7, #100] @ 0x64 return(result); - 8007116: 6e7b ldr r3, [r7, #100] @ 0x64 - 8007118: 2b00 cmp r3, #0 - 800711a: d1e3 bne.n 80070e4 + 8005b1e: 6e7b ldr r3, [r7, #100] @ 0x64 + 8005b20: 2b00 cmp r3, #0 + 8005b22: d1e3 bne.n 8005aec /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 800711c: 687b ldr r3, [r7, #4] - 800711e: 2220 movs r2, #32 - 8007120: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005b24: 687b ldr r3, [r7, #4] + 8005b26: 2220 movs r2, #32 + 8005b28: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8007124: 687b ldr r3, [r7, #4] - 8007126: 2200 movs r2, #0 - 8007128: 631a str r2, [r3, #48] @ 0x30 + 8005b2c: 687b ldr r3, [r7, #4] + 8005b2e: 2200 movs r2, #0 + 8005b30: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 800712a: 687b ldr r3, [r7, #4] - 800712c: 681b ldr r3, [r3, #0] - 800712e: 330c adds r3, #12 - 8007130: 64fb str r3, [r7, #76] @ 0x4c + 8005b32: 687b ldr r3, [r7, #4] + 8005b34: 681b ldr r3, [r3, #0] + 8005b36: 330c adds r3, #12 + 8005b38: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8007132: 6cfb ldr r3, [r7, #76] @ 0x4c - 8007134: e853 3f00 ldrex r3, [r3] - 8007138: 64bb str r3, [r7, #72] @ 0x48 + 8005b3a: 6cfb ldr r3, [r7, #76] @ 0x4c + 8005b3c: e853 3f00 ldrex r3, [r3] + 8005b40: 64bb str r3, [r7, #72] @ 0x48 return(result); - 800713a: 6cbb ldr r3, [r7, #72] @ 0x48 - 800713c: f023 0310 bic.w r3, r3, #16 - 8007140: f8c7 30ac str.w r3, [r7, #172] @ 0xac - 8007144: 687b ldr r3, [r7, #4] - 8007146: 681b ldr r3, [r3, #0] - 8007148: 330c adds r3, #12 - 800714a: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac - 800714e: 65ba str r2, [r7, #88] @ 0x58 - 8007150: 657b str r3, [r7, #84] @ 0x54 + 8005b42: 6cbb ldr r3, [r7, #72] @ 0x48 + 8005b44: f023 0310 bic.w r3, r3, #16 + 8005b48: f8c7 30ac str.w r3, [r7, #172] @ 0xac + 8005b4c: 687b ldr r3, [r7, #4] + 8005b4e: 681b ldr r3, [r3, #0] + 8005b50: 330c adds r3, #12 + 8005b52: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac + 8005b56: 65ba str r2, [r7, #88] @ 0x58 + 8005b58: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8007152: 6d79 ldr r1, [r7, #84] @ 0x54 - 8007154: 6dba ldr r2, [r7, #88] @ 0x58 - 8007156: e841 2300 strex r3, r2, [r1] - 800715a: 653b str r3, [r7, #80] @ 0x50 + 8005b5a: 6d79 ldr r1, [r7, #84] @ 0x54 + 8005b5c: 6dba ldr r2, [r7, #88] @ 0x58 + 8005b5e: e841 2300 strex r3, r2, [r1] + 8005b62: 653b str r3, [r7, #80] @ 0x50 return(result); - 800715c: 6d3b ldr r3, [r7, #80] @ 0x50 - 800715e: 2b00 cmp r3, #0 - 8007160: d1e3 bne.n 800712a + 8005b64: 6d3b ldr r3, [r7, #80] @ 0x50 + 8005b66: 2b00 cmp r3, #0 + 8005b68: d1e3 bne.n 8005b32 /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); - 8007162: 687b ldr r3, [r7, #4] - 8007164: 6bdb ldr r3, [r3, #60] @ 0x3c - 8007166: 4618 mov r0, r3 - 8007168: f7fc ff1a bl 8003fa0 + 8005b6a: 687b ldr r3, [r7, #4] + 8005b6c: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005b6e: 4618 mov r0, r3 + 8005b70: f7fd fbc9 bl 8003306 } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 800716c: 687b ldr r3, [r7, #4] - 800716e: 2202 movs r2, #2 - 8007170: 635a str r2, [r3, #52] @ 0x34 + 8005b74: 687b ldr r3, [r7, #4] + 8005b76: 2202 movs r2, #2 + 8005b78: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 8007172: 687b ldr r3, [r7, #4] - 8007174: 8d9a ldrh r2, [r3, #44] @ 0x2c - 8007176: 687b ldr r3, [r7, #4] - 8007178: 8ddb ldrh r3, [r3, #46] @ 0x2e - 800717a: b29b uxth r3, r3 - 800717c: 1ad3 subs r3, r2, r3 - 800717e: b29b uxth r3, r3 - 8007180: 4619 mov r1, r3 - 8007182: 6878 ldr r0, [r7, #4] - 8007184: f000 f8bf bl 8007306 + 8005b7a: 687b ldr r3, [r7, #4] + 8005b7c: 8d9a ldrh r2, [r3, #44] @ 0x2c + 8005b7e: 687b ldr r3, [r7, #4] + 8005b80: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8005b82: b29b uxth r3, r3 + 8005b84: 1ad3 subs r3, r2, r3 + 8005b86: b29b uxth r3, r3 + 8005b88: 4619 mov r1, r3 + 8005b8a: 6878 ldr r0, [r7, #4] + 8005b8c: f000 f8bf bl 8005d0e #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; - 8007188: e09c b.n 80072c4 - 800718a: bf00 nop - 800718c: 08007493 .word 0x08007493 + 8005b90: e09c b.n 8005ccc + 8005b92: bf00 nop + 8005b94: 08005e9b .word 0x08005e9b else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 8007190: 687b ldr r3, [r7, #4] - 8007192: 8d9a ldrh r2, [r3, #44] @ 0x2c - 8007194: 687b ldr r3, [r7, #4] - 8007196: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8007198: b29b uxth r3, r3 - 800719a: 1ad3 subs r3, r2, r3 - 800719c: f8a7 30ce strh.w r3, [r7, #206] @ 0xce + 8005b98: 687b ldr r3, [r7, #4] + 8005b9a: 8d9a ldrh r2, [r3, #44] @ 0x2c + 8005b9c: 687b ldr r3, [r7, #4] + 8005b9e: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8005ba0: b29b uxth r3, r3 + 8005ba2: 1ad3 subs r3, r2, r3 + 8005ba4: f8a7 30ce strh.w r3, [r7, #206] @ 0xce if ((huart->RxXferCount > 0U) - 80071a0: 687b ldr r3, [r7, #4] - 80071a2: 8ddb ldrh r3, [r3, #46] @ 0x2e - 80071a4: b29b uxth r3, r3 - 80071a6: 2b00 cmp r3, #0 - 80071a8: f000 808e beq.w 80072c8 + 8005ba8: 687b ldr r3, [r7, #4] + 8005baa: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8005bac: b29b uxth r3, r3 + 8005bae: 2b00 cmp r3, #0 + 8005bb0: f000 808e beq.w 8005cd0 && (nb_rx_data > 0U)) - 80071ac: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce - 80071b0: 2b00 cmp r3, #0 - 80071b2: f000 8089 beq.w 80072c8 + 8005bb4: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce + 8005bb8: 2b00 cmp r3, #0 + 8005bba: f000 8089 beq.w 8005cd0 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 80071b6: 687b ldr r3, [r7, #4] - 80071b8: 681b ldr r3, [r3, #0] - 80071ba: 330c adds r3, #12 - 80071bc: 63bb str r3, [r7, #56] @ 0x38 + 8005bbe: 687b ldr r3, [r7, #4] + 8005bc0: 681b ldr r3, [r3, #0] + 8005bc2: 330c adds r3, #12 + 8005bc4: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80071be: 6bbb ldr r3, [r7, #56] @ 0x38 - 80071c0: e853 3f00 ldrex r3, [r3] - 80071c4: 637b str r3, [r7, #52] @ 0x34 + 8005bc6: 6bbb ldr r3, [r7, #56] @ 0x38 + 8005bc8: e853 3f00 ldrex r3, [r3] + 8005bcc: 637b str r3, [r7, #52] @ 0x34 return(result); - 80071c6: 6b7b ldr r3, [r7, #52] @ 0x34 - 80071c8: f423 7390 bic.w r3, r3, #288 @ 0x120 - 80071cc: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 - 80071d0: 687b ldr r3, [r7, #4] - 80071d2: 681b ldr r3, [r3, #0] - 80071d4: 330c adds r3, #12 - 80071d6: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 - 80071da: 647a str r2, [r7, #68] @ 0x44 - 80071dc: 643b str r3, [r7, #64] @ 0x40 + 8005bce: 6b7b ldr r3, [r7, #52] @ 0x34 + 8005bd0: f423 7390 bic.w r3, r3, #288 @ 0x120 + 8005bd4: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 + 8005bd8: 687b ldr r3, [r7, #4] + 8005bda: 681b ldr r3, [r3, #0] + 8005bdc: 330c adds r3, #12 + 8005bde: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 + 8005be2: 647a str r2, [r7, #68] @ 0x44 + 8005be4: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80071de: 6c39 ldr r1, [r7, #64] @ 0x40 - 80071e0: 6c7a ldr r2, [r7, #68] @ 0x44 - 80071e2: e841 2300 strex r3, r2, [r1] - 80071e6: 63fb str r3, [r7, #60] @ 0x3c + 8005be6: 6c39 ldr r1, [r7, #64] @ 0x40 + 8005be8: 6c7a ldr r2, [r7, #68] @ 0x44 + 8005bea: e841 2300 strex r3, r2, [r1] + 8005bee: 63fb str r3, [r7, #60] @ 0x3c return(result); - 80071e8: 6bfb ldr r3, [r7, #60] @ 0x3c - 80071ea: 2b00 cmp r3, #0 - 80071ec: d1e3 bne.n 80071b6 + 8005bf0: 6bfb ldr r3, [r7, #60] @ 0x3c + 8005bf2: 2b00 cmp r3, #0 + 8005bf4: d1e3 bne.n 8005bbe /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80071ee: 687b ldr r3, [r7, #4] - 80071f0: 681b ldr r3, [r3, #0] - 80071f2: 3314 adds r3, #20 - 80071f4: 627b str r3, [r7, #36] @ 0x24 + 8005bf6: 687b ldr r3, [r7, #4] + 8005bf8: 681b ldr r3, [r3, #0] + 8005bfa: 3314 adds r3, #20 + 8005bfc: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80071f6: 6a7b ldr r3, [r7, #36] @ 0x24 - 80071f8: e853 3f00 ldrex r3, [r3] - 80071fc: 623b str r3, [r7, #32] + 8005bfe: 6a7b ldr r3, [r7, #36] @ 0x24 + 8005c00: e853 3f00 ldrex r3, [r3] + 8005c04: 623b str r3, [r7, #32] return(result); - 80071fe: 6a3b ldr r3, [r7, #32] - 8007200: f023 0301 bic.w r3, r3, #1 - 8007204: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 - 8007208: 687b ldr r3, [r7, #4] - 800720a: 681b ldr r3, [r3, #0] - 800720c: 3314 adds r3, #20 - 800720e: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 - 8007212: 633a str r2, [r7, #48] @ 0x30 - 8007214: 62fb str r3, [r7, #44] @ 0x2c + 8005c06: 6a3b ldr r3, [r7, #32] + 8005c08: f023 0301 bic.w r3, r3, #1 + 8005c0c: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 + 8005c10: 687b ldr r3, [r7, #4] + 8005c12: 681b ldr r3, [r3, #0] + 8005c14: 3314 adds r3, #20 + 8005c16: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 + 8005c1a: 633a str r2, [r7, #48] @ 0x30 + 8005c1c: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8007216: 6af9 ldr r1, [r7, #44] @ 0x2c - 8007218: 6b3a ldr r2, [r7, #48] @ 0x30 - 800721a: e841 2300 strex r3, r2, [r1] - 800721e: 62bb str r3, [r7, #40] @ 0x28 + 8005c1e: 6af9 ldr r1, [r7, #44] @ 0x2c + 8005c20: 6b3a ldr r2, [r7, #48] @ 0x30 + 8005c22: e841 2300 strex r3, r2, [r1] + 8005c26: 62bb str r3, [r7, #40] @ 0x28 return(result); - 8007220: 6abb ldr r3, [r7, #40] @ 0x28 - 8007222: 2b00 cmp r3, #0 - 8007224: d1e3 bne.n 80071ee + 8005c28: 6abb ldr r3, [r7, #40] @ 0x28 + 8005c2a: 2b00 cmp r3, #0 + 8005c2c: d1e3 bne.n 8005bf6 /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8007226: 687b ldr r3, [r7, #4] - 8007228: 2220 movs r2, #32 - 800722a: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005c2e: 687b ldr r3, [r7, #4] + 8005c30: 2220 movs r2, #32 + 8005c32: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 800722e: 687b ldr r3, [r7, #4] - 8007230: 2200 movs r2, #0 - 8007232: 631a str r2, [r3, #48] @ 0x30 + 8005c36: 687b ldr r3, [r7, #4] + 8005c38: 2200 movs r2, #0 + 8005c3a: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8007234: 687b ldr r3, [r7, #4] - 8007236: 681b ldr r3, [r3, #0] - 8007238: 330c adds r3, #12 - 800723a: 613b str r3, [r7, #16] + 8005c3c: 687b ldr r3, [r7, #4] + 8005c3e: 681b ldr r3, [r3, #0] + 8005c40: 330c adds r3, #12 + 8005c42: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 800723c: 693b ldr r3, [r7, #16] - 800723e: e853 3f00 ldrex r3, [r3] - 8007242: 60fb str r3, [r7, #12] + 8005c44: 693b ldr r3, [r7, #16] + 8005c46: e853 3f00 ldrex r3, [r3] + 8005c4a: 60fb str r3, [r7, #12] return(result); - 8007244: 68fb ldr r3, [r7, #12] - 8007246: f023 0310 bic.w r3, r3, #16 - 800724a: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 - 800724e: 687b ldr r3, [r7, #4] - 8007250: 681b ldr r3, [r3, #0] - 8007252: 330c adds r3, #12 - 8007254: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 - 8007258: 61fa str r2, [r7, #28] - 800725a: 61bb str r3, [r7, #24] + 8005c4c: 68fb ldr r3, [r7, #12] + 8005c4e: f023 0310 bic.w r3, r3, #16 + 8005c52: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 + 8005c56: 687b ldr r3, [r7, #4] + 8005c58: 681b ldr r3, [r3, #0] + 8005c5a: 330c adds r3, #12 + 8005c5c: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 + 8005c60: 61fa str r2, [r7, #28] + 8005c62: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800725c: 69b9 ldr r1, [r7, #24] - 800725e: 69fa ldr r2, [r7, #28] - 8007260: e841 2300 strex r3, r2, [r1] - 8007264: 617b str r3, [r7, #20] + 8005c64: 69b9 ldr r1, [r7, #24] + 8005c66: 69fa ldr r2, [r7, #28] + 8005c68: e841 2300 strex r3, r2, [r1] + 8005c6c: 617b str r3, [r7, #20] return(result); - 8007266: 697b ldr r3, [r7, #20] - 8007268: 2b00 cmp r3, #0 - 800726a: d1e3 bne.n 8007234 + 8005c6e: 697b ldr r3, [r7, #20] + 8005c70: 2b00 cmp r3, #0 + 8005c72: d1e3 bne.n 8005c3c /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 800726c: 687b ldr r3, [r7, #4] - 800726e: 2202 movs r2, #2 - 8007270: 635a str r2, [r3, #52] @ 0x34 + 8005c74: 687b ldr r3, [r7, #4] + 8005c76: 2202 movs r2, #2 + 8005c78: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); - 8007272: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce - 8007276: 4619 mov r1, r3 - 8007278: 6878 ldr r0, [r7, #4] - 800727a: f000 f844 bl 8007306 + 8005c7a: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce + 8005c7e: 4619 mov r1, r3 + 8005c80: 6878 ldr r0, [r7, #4] + 8005c82: f000 f844 bl 8005d0e #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; - 800727e: e023 b.n 80072c8 + 8005c86: e023 b.n 8005cd0 } } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) - 8007280: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8007284: f003 0380 and.w r3, r3, #128 @ 0x80 - 8007288: 2b00 cmp r3, #0 - 800728a: d009 beq.n 80072a0 - 800728c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8007290: f003 0380 and.w r3, r3, #128 @ 0x80 - 8007294: 2b00 cmp r3, #0 - 8007296: d003 beq.n 80072a0 + 8005c88: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005c8c: f003 0380 and.w r3, r3, #128 @ 0x80 + 8005c90: 2b00 cmp r3, #0 + 8005c92: d009 beq.n 8005ca8 + 8005c94: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005c98: f003 0380 and.w r3, r3, #128 @ 0x80 + 8005c9c: 2b00 cmp r3, #0 + 8005c9e: d003 beq.n 8005ca8 { UART_Transmit_IT(huart); - 8007298: 6878 ldr r0, [r7, #4] - 800729a: f000 f90e bl 80074ba + 8005ca0: 6878 ldr r0, [r7, #4] + 8005ca2: f000 f90e bl 8005ec2 return; - 800729e: e014 b.n 80072ca + 8005ca6: e014 b.n 8005cd2 } /* UART in mode Transmitter end --------------------------------------------*/ if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) - 80072a0: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 80072a4: f003 0340 and.w r3, r3, #64 @ 0x40 - 80072a8: 2b00 cmp r3, #0 - 80072aa: d00e beq.n 80072ca - 80072ac: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 80072b0: f003 0340 and.w r3, r3, #64 @ 0x40 - 80072b4: 2b00 cmp r3, #0 - 80072b6: d008 beq.n 80072ca + 8005ca8: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005cac: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005cb0: 2b00 cmp r3, #0 + 8005cb2: d00e beq.n 8005cd2 + 8005cb4: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005cb8: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005cbc: 2b00 cmp r3, #0 + 8005cbe: d008 beq.n 8005cd2 { UART_EndTransmit_IT(huart); - 80072b8: 6878 ldr r0, [r7, #4] - 80072ba: f000 f94d bl 8007558 + 8005cc0: 6878 ldr r0, [r7, #4] + 8005cc2: f000 f94d bl 8005f60 return; - 80072be: e004 b.n 80072ca + 8005cc6: e004 b.n 8005cd2 return; - 80072c0: bf00 nop - 80072c2: e002 b.n 80072ca + 8005cc8: bf00 nop + 8005cca: e002 b.n 8005cd2 return; - 80072c4: bf00 nop - 80072c6: e000 b.n 80072ca + 8005ccc: bf00 nop + 8005cce: e000 b.n 8005cd2 return; - 80072c8: bf00 nop + 8005cd0: bf00 nop } } - 80072ca: 37e8 adds r7, #232 @ 0xe8 - 80072cc: 46bd mov sp, r7 - 80072ce: bd80 pop {r7, pc} + 8005cd2: 37e8 adds r7, #232 @ 0xe8 + 8005cd4: 46bd mov sp, r7 + 8005cd6: bd80 pop {r7, pc} -080072d0 : +08005cd8 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { - 80072d0: b480 push {r7} - 80072d2: b083 sub sp, #12 - 80072d4: af00 add r7, sp, #0 - 80072d6: 6078 str r0, [r7, #4] + 8005cd8: b480 push {r7} + 8005cda: b083 sub sp, #12 + 8005cdc: af00 add r7, sp, #0 + 8005cde: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_TxCpltCallback could be implemented in the user file */ } - 80072d8: bf00 nop - 80072da: 370c adds r7, #12 - 80072dc: 46bd mov sp, r7 - 80072de: bc80 pop {r7} - 80072e0: 4770 bx lr + 8005ce0: bf00 nop + 8005ce2: 370c adds r7, #12 + 8005ce4: 46bd mov sp, r7 + 8005ce6: bc80 pop {r7} + 8005ce8: 4770 bx lr -080072e2 : +08005cea : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { - 80072e2: b480 push {r7} - 80072e4: b083 sub sp, #12 - 80072e6: af00 add r7, sp, #0 - 80072e8: 6078 str r0, [r7, #4] + 8005cea: b480 push {r7} + 8005cec: b083 sub sp, #12 + 8005cee: af00 add r7, sp, #0 + 8005cf0: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxCpltCallback could be implemented in the user file */ } - 80072ea: bf00 nop - 80072ec: 370c adds r7, #12 - 80072ee: 46bd mov sp, r7 - 80072f0: bc80 pop {r7} - 80072f2: 4770 bx lr + 8005cf2: bf00 nop + 8005cf4: 370c adds r7, #12 + 8005cf6: 46bd mov sp, r7 + 8005cf8: bc80 pop {r7} + 8005cfa: 4770 bx lr -080072f4 : +08005cfc : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { - 80072f4: b480 push {r7} - 80072f6: b083 sub sp, #12 - 80072f8: af00 add r7, sp, #0 - 80072fa: 6078 str r0, [r7, #4] + 8005cfc: b480 push {r7} + 8005cfe: b083 sub sp, #12 + 8005d00: af00 add r7, sp, #0 + 8005d02: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback could be implemented in the user file */ } - 80072fc: bf00 nop - 80072fe: 370c adds r7, #12 - 8007300: 46bd mov sp, r7 - 8007302: bc80 pop {r7} - 8007304: 4770 bx lr + 8005d04: bf00 nop + 8005d06: 370c adds r7, #12 + 8005d08: 46bd mov sp, r7 + 8005d0a: bc80 pop {r7} + 8005d0c: 4770 bx lr -08007306 : +08005d0e : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { - 8007306: b480 push {r7} - 8007308: b083 sub sp, #12 - 800730a: af00 add r7, sp, #0 - 800730c: 6078 str r0, [r7, #4] - 800730e: 460b mov r3, r1 - 8007310: 807b strh r3, [r7, #2] + 8005d0e: b480 push {r7} + 8005d10: b083 sub sp, #12 + 8005d12: af00 add r7, sp, #0 + 8005d14: 6078 str r0, [r7, #4] + 8005d16: 460b mov r3, r1 + 8005d18: 807b strh r3, [r7, #2] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } - 8007312: bf00 nop - 8007314: 370c adds r7, #12 - 8007316: 46bd mov sp, r7 - 8007318: bc80 pop {r7} - 800731a: 4770 bx lr + 8005d1a: bf00 nop + 8005d1c: 370c adds r7, #12 + 8005d1e: 46bd mov sp, r7 + 8005d20: bc80 pop {r7} + 8005d22: 4770 bx lr -0800731c : +08005d24 : * @param Timeout Timeout duration * @retval HAL status */ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 800731c: b580 push {r7, lr} - 800731e: b086 sub sp, #24 - 8007320: af00 add r7, sp, #0 - 8007322: 60f8 str r0, [r7, #12] - 8007324: 60b9 str r1, [r7, #8] - 8007326: 603b str r3, [r7, #0] - 8007328: 4613 mov r3, r2 - 800732a: 71fb strb r3, [r7, #7] + 8005d24: b580 push {r7, lr} + 8005d26: b086 sub sp, #24 + 8005d28: af00 add r7, sp, #0 + 8005d2a: 60f8 str r0, [r7, #12] + 8005d2c: 60b9 str r1, [r7, #8] + 8005d2e: 603b str r3, [r7, #0] + 8005d30: 4613 mov r3, r2 + 8005d32: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 800732c: e03b b.n 80073a6 + 8005d34: e03b b.n 8005dae { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 800732e: 6a3b ldr r3, [r7, #32] - 8007330: f1b3 3fff cmp.w r3, #4294967295 - 8007334: d037 beq.n 80073a6 + 8005d36: 6a3b ldr r3, [r7, #32] + 8005d38: f1b3 3fff cmp.w r3, #4294967295 + 8005d3c: d037 beq.n 8005dae { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8007336: f7fb ffcd bl 80032d4 - 800733a: 4602 mov r2, r0 - 800733c: 683b ldr r3, [r7, #0] - 800733e: 1ad3 subs r3, r2, r3 - 8007340: 6a3a ldr r2, [r7, #32] - 8007342: 429a cmp r2, r3 - 8007344: d302 bcc.n 800734c - 8007346: 6a3b ldr r3, [r7, #32] - 8007348: 2b00 cmp r3, #0 - 800734a: d101 bne.n 8007350 + 8005d3e: f7fc ff95 bl 8002c6c + 8005d42: 4602 mov r2, r0 + 8005d44: 683b ldr r3, [r7, #0] + 8005d46: 1ad3 subs r3, r2, r3 + 8005d48: 6a3a ldr r2, [r7, #32] + 8005d4a: 429a cmp r2, r3 + 8005d4c: d302 bcc.n 8005d54 + 8005d4e: 6a3b ldr r3, [r7, #32] + 8005d50: 2b00 cmp r3, #0 + 8005d52: d101 bne.n 8005d58 { return HAL_TIMEOUT; - 800734c: 2303 movs r3, #3 - 800734e: e03a b.n 80073c6 + 8005d54: 2303 movs r3, #3 + 8005d56: e03a b.n 8005dce } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) - 8007350: 68fb ldr r3, [r7, #12] - 8007352: 681b ldr r3, [r3, #0] - 8007354: 68db ldr r3, [r3, #12] - 8007356: f003 0304 and.w r3, r3, #4 - 800735a: 2b00 cmp r3, #0 - 800735c: d023 beq.n 80073a6 - 800735e: 68bb ldr r3, [r7, #8] - 8007360: 2b80 cmp r3, #128 @ 0x80 - 8007362: d020 beq.n 80073a6 - 8007364: 68bb ldr r3, [r7, #8] - 8007366: 2b40 cmp r3, #64 @ 0x40 - 8007368: d01d beq.n 80073a6 + 8005d58: 68fb ldr r3, [r7, #12] + 8005d5a: 681b ldr r3, [r3, #0] + 8005d5c: 68db ldr r3, [r3, #12] + 8005d5e: f003 0304 and.w r3, r3, #4 + 8005d62: 2b00 cmp r3, #0 + 8005d64: d023 beq.n 8005dae + 8005d66: 68bb ldr r3, [r7, #8] + 8005d68: 2b80 cmp r3, #128 @ 0x80 + 8005d6a: d020 beq.n 8005dae + 8005d6c: 68bb ldr r3, [r7, #8] + 8005d6e: 2b40 cmp r3, #64 @ 0x40 + 8005d70: d01d beq.n 8005dae { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) - 800736a: 68fb ldr r3, [r7, #12] - 800736c: 681b ldr r3, [r3, #0] - 800736e: 681b ldr r3, [r3, #0] - 8007370: f003 0308 and.w r3, r3, #8 - 8007374: 2b08 cmp r3, #8 - 8007376: d116 bne.n 80073a6 + 8005d72: 68fb ldr r3, [r7, #12] + 8005d74: 681b ldr r3, [r3, #0] + 8005d76: 681b ldr r3, [r3, #0] + 8005d78: f003 0308 and.w r3, r3, #8 + 8005d7c: 2b08 cmp r3, #8 + 8005d7e: d116 bne.n 8005dae { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_OREFLAG(huart); - 8007378: 2300 movs r3, #0 - 800737a: 617b str r3, [r7, #20] - 800737c: 68fb ldr r3, [r7, #12] - 800737e: 681b ldr r3, [r3, #0] - 8007380: 681b ldr r3, [r3, #0] - 8007382: 617b str r3, [r7, #20] - 8007384: 68fb ldr r3, [r7, #12] - 8007386: 681b ldr r3, [r3, #0] - 8007388: 685b ldr r3, [r3, #4] - 800738a: 617b str r3, [r7, #20] - 800738c: 697b ldr r3, [r7, #20] + 8005d80: 2300 movs r3, #0 + 8005d82: 617b str r3, [r7, #20] + 8005d84: 68fb ldr r3, [r7, #12] + 8005d86: 681b ldr r3, [r3, #0] + 8005d88: 681b ldr r3, [r3, #0] + 8005d8a: 617b str r3, [r7, #20] + 8005d8c: 68fb ldr r3, [r7, #12] + 8005d8e: 681b ldr r3, [r3, #0] + 8005d90: 685b ldr r3, [r3, #4] + 8005d92: 617b str r3, [r7, #20] + 8005d94: 697b ldr r3, [r7, #20] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); - 800738e: 68f8 ldr r0, [r7, #12] - 8007390: f000 f81d bl 80073ce + 8005d96: 68f8 ldr r0, [r7, #12] + 8005d98: f000 f81d bl 8005dd6 huart->ErrorCode = HAL_UART_ERROR_ORE; - 8007394: 68fb ldr r3, [r7, #12] - 8007396: 2208 movs r2, #8 - 8007398: 645a str r2, [r3, #68] @ 0x44 + 8005d9c: 68fb ldr r3, [r7, #12] + 8005d9e: 2208 movs r2, #8 + 8005da0: 645a str r2, [r3, #68] @ 0x44 /* Process Unlocked */ __HAL_UNLOCK(huart); - 800739a: 68fb ldr r3, [r7, #12] - 800739c: 2200 movs r2, #0 - 800739e: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 8005da2: 68fb ldr r3, [r7, #12] + 8005da4: 2200 movs r2, #0 + 8005da6: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; - 80073a2: 2301 movs r3, #1 - 80073a4: e00f b.n 80073c6 + 8005daa: 2301 movs r3, #1 + 8005dac: e00f b.n 8005dce while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 80073a6: 68fb ldr r3, [r7, #12] - 80073a8: 681b ldr r3, [r3, #0] - 80073aa: 681a ldr r2, [r3, #0] - 80073ac: 68bb ldr r3, [r7, #8] - 80073ae: 4013 ands r3, r2 - 80073b0: 68ba ldr r2, [r7, #8] - 80073b2: 429a cmp r2, r3 - 80073b4: bf0c ite eq - 80073b6: 2301 moveq r3, #1 - 80073b8: 2300 movne r3, #0 - 80073ba: b2db uxtb r3, r3 - 80073bc: 461a mov r2, r3 - 80073be: 79fb ldrb r3, [r7, #7] - 80073c0: 429a cmp r2, r3 - 80073c2: d0b4 beq.n 800732e + 8005dae: 68fb ldr r3, [r7, #12] + 8005db0: 681b ldr r3, [r3, #0] + 8005db2: 681a ldr r2, [r3, #0] + 8005db4: 68bb ldr r3, [r7, #8] + 8005db6: 4013 ands r3, r2 + 8005db8: 68ba ldr r2, [r7, #8] + 8005dba: 429a cmp r2, r3 + 8005dbc: bf0c ite eq + 8005dbe: 2301 moveq r3, #1 + 8005dc0: 2300 movne r3, #0 + 8005dc2: b2db uxtb r3, r3 + 8005dc4: 461a mov r2, r3 + 8005dc6: 79fb ldrb r3, [r7, #7] + 8005dc8: 429a cmp r2, r3 + 8005dca: d0b4 beq.n 8005d36 } } } } return HAL_OK; - 80073c4: 2300 movs r3, #0 + 8005dcc: 2300 movs r3, #0 } - 80073c6: 4618 mov r0, r3 - 80073c8: 3718 adds r7, #24 - 80073ca: 46bd mov sp, r7 - 80073cc: bd80 pop {r7, pc} + 8005dce: 4618 mov r0, r3 + 8005dd0: 3718 adds r7, #24 + 8005dd2: 46bd mov sp, r7 + 8005dd4: bd80 pop {r7, pc} -080073ce : +08005dd6 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 80073ce: b480 push {r7} - 80073d0: b095 sub sp, #84 @ 0x54 - 80073d2: af00 add r7, sp, #0 - 80073d4: 6078 str r0, [r7, #4] + 8005dd6: b480 push {r7} + 8005dd8: b095 sub sp, #84 @ 0x54 + 8005dda: af00 add r7, sp, #0 + 8005ddc: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 80073d6: 687b ldr r3, [r7, #4] - 80073d8: 681b ldr r3, [r3, #0] - 80073da: 330c adds r3, #12 - 80073dc: 637b str r3, [r7, #52] @ 0x34 + 8005dde: 687b ldr r3, [r7, #4] + 8005de0: 681b ldr r3, [r3, #0] + 8005de2: 330c adds r3, #12 + 8005de4: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80073de: 6b7b ldr r3, [r7, #52] @ 0x34 - 80073e0: e853 3f00 ldrex r3, [r3] - 80073e4: 633b str r3, [r7, #48] @ 0x30 + 8005de6: 6b7b ldr r3, [r7, #52] @ 0x34 + 8005de8: e853 3f00 ldrex r3, [r3] + 8005dec: 633b str r3, [r7, #48] @ 0x30 return(result); - 80073e6: 6b3b ldr r3, [r7, #48] @ 0x30 - 80073e8: f423 7390 bic.w r3, r3, #288 @ 0x120 - 80073ec: 64fb str r3, [r7, #76] @ 0x4c - 80073ee: 687b ldr r3, [r7, #4] - 80073f0: 681b ldr r3, [r3, #0] - 80073f2: 330c adds r3, #12 - 80073f4: 6cfa ldr r2, [r7, #76] @ 0x4c - 80073f6: 643a str r2, [r7, #64] @ 0x40 - 80073f8: 63fb str r3, [r7, #60] @ 0x3c + 8005dee: 6b3b ldr r3, [r7, #48] @ 0x30 + 8005df0: f423 7390 bic.w r3, r3, #288 @ 0x120 + 8005df4: 64fb str r3, [r7, #76] @ 0x4c + 8005df6: 687b ldr r3, [r7, #4] + 8005df8: 681b ldr r3, [r3, #0] + 8005dfa: 330c adds r3, #12 + 8005dfc: 6cfa ldr r2, [r7, #76] @ 0x4c + 8005dfe: 643a str r2, [r7, #64] @ 0x40 + 8005e00: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80073fa: 6bf9 ldr r1, [r7, #60] @ 0x3c - 80073fc: 6c3a ldr r2, [r7, #64] @ 0x40 - 80073fe: e841 2300 strex r3, r2, [r1] - 8007402: 63bb str r3, [r7, #56] @ 0x38 + 8005e02: 6bf9 ldr r1, [r7, #60] @ 0x3c + 8005e04: 6c3a ldr r2, [r7, #64] @ 0x40 + 8005e06: e841 2300 strex r3, r2, [r1] + 8005e0a: 63bb str r3, [r7, #56] @ 0x38 return(result); - 8007404: 6bbb ldr r3, [r7, #56] @ 0x38 - 8007406: 2b00 cmp r3, #0 - 8007408: d1e5 bne.n 80073d6 + 8005e0c: 6bbb ldr r3, [r7, #56] @ 0x38 + 8005e0e: 2b00 cmp r3, #0 + 8005e10: d1e5 bne.n 8005dde ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 800740a: 687b ldr r3, [r7, #4] - 800740c: 681b ldr r3, [r3, #0] - 800740e: 3314 adds r3, #20 - 8007410: 623b str r3, [r7, #32] + 8005e12: 687b ldr r3, [r7, #4] + 8005e14: 681b ldr r3, [r3, #0] + 8005e16: 3314 adds r3, #20 + 8005e18: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8007412: 6a3b ldr r3, [r7, #32] - 8007414: e853 3f00 ldrex r3, [r3] - 8007418: 61fb str r3, [r7, #28] + 8005e1a: 6a3b ldr r3, [r7, #32] + 8005e1c: e853 3f00 ldrex r3, [r3] + 8005e20: 61fb str r3, [r7, #28] return(result); - 800741a: 69fb ldr r3, [r7, #28] - 800741c: f023 0301 bic.w r3, r3, #1 - 8007420: 64bb str r3, [r7, #72] @ 0x48 - 8007422: 687b ldr r3, [r7, #4] - 8007424: 681b ldr r3, [r3, #0] - 8007426: 3314 adds r3, #20 - 8007428: 6cba ldr r2, [r7, #72] @ 0x48 - 800742a: 62fa str r2, [r7, #44] @ 0x2c - 800742c: 62bb str r3, [r7, #40] @ 0x28 + 8005e22: 69fb ldr r3, [r7, #28] + 8005e24: f023 0301 bic.w r3, r3, #1 + 8005e28: 64bb str r3, [r7, #72] @ 0x48 + 8005e2a: 687b ldr r3, [r7, #4] + 8005e2c: 681b ldr r3, [r3, #0] + 8005e2e: 3314 adds r3, #20 + 8005e30: 6cba ldr r2, [r7, #72] @ 0x48 + 8005e32: 62fa str r2, [r7, #44] @ 0x2c + 8005e34: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800742e: 6ab9 ldr r1, [r7, #40] @ 0x28 - 8007430: 6afa ldr r2, [r7, #44] @ 0x2c - 8007432: e841 2300 strex r3, r2, [r1] - 8007436: 627b str r3, [r7, #36] @ 0x24 + 8005e36: 6ab9 ldr r1, [r7, #40] @ 0x28 + 8005e38: 6afa ldr r2, [r7, #44] @ 0x2c + 8005e3a: e841 2300 strex r3, r2, [r1] + 8005e3e: 627b str r3, [r7, #36] @ 0x24 return(result); - 8007438: 6a7b ldr r3, [r7, #36] @ 0x24 - 800743a: 2b00 cmp r3, #0 - 800743c: d1e5 bne.n 800740a + 8005e40: 6a7b ldr r3, [r7, #36] @ 0x24 + 8005e42: 2b00 cmp r3, #0 + 8005e44: d1e5 bne.n 8005e12 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 800743e: 687b ldr r3, [r7, #4] - 8007440: 6b1b ldr r3, [r3, #48] @ 0x30 - 8007442: 2b01 cmp r3, #1 - 8007444: d119 bne.n 800747a + 8005e46: 687b ldr r3, [r7, #4] + 8005e48: 6b1b ldr r3, [r3, #48] @ 0x30 + 8005e4a: 2b01 cmp r3, #1 + 8005e4c: d119 bne.n 8005e82 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8007446: 687b ldr r3, [r7, #4] - 8007448: 681b ldr r3, [r3, #0] - 800744a: 330c adds r3, #12 - 800744c: 60fb str r3, [r7, #12] + 8005e4e: 687b ldr r3, [r7, #4] + 8005e50: 681b ldr r3, [r3, #0] + 8005e52: 330c adds r3, #12 + 8005e54: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 800744e: 68fb ldr r3, [r7, #12] - 8007450: e853 3f00 ldrex r3, [r3] - 8007454: 60bb str r3, [r7, #8] + 8005e56: 68fb ldr r3, [r7, #12] + 8005e58: e853 3f00 ldrex r3, [r3] + 8005e5c: 60bb str r3, [r7, #8] return(result); - 8007456: 68bb ldr r3, [r7, #8] - 8007458: f023 0310 bic.w r3, r3, #16 - 800745c: 647b str r3, [r7, #68] @ 0x44 - 800745e: 687b ldr r3, [r7, #4] - 8007460: 681b ldr r3, [r3, #0] - 8007462: 330c adds r3, #12 - 8007464: 6c7a ldr r2, [r7, #68] @ 0x44 - 8007466: 61ba str r2, [r7, #24] - 8007468: 617b str r3, [r7, #20] + 8005e5e: 68bb ldr r3, [r7, #8] + 8005e60: f023 0310 bic.w r3, r3, #16 + 8005e64: 647b str r3, [r7, #68] @ 0x44 + 8005e66: 687b ldr r3, [r7, #4] + 8005e68: 681b ldr r3, [r3, #0] + 8005e6a: 330c adds r3, #12 + 8005e6c: 6c7a ldr r2, [r7, #68] @ 0x44 + 8005e6e: 61ba str r2, [r7, #24] + 8005e70: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800746a: 6979 ldr r1, [r7, #20] - 800746c: 69ba ldr r2, [r7, #24] - 800746e: e841 2300 strex r3, r2, [r1] - 8007472: 613b str r3, [r7, #16] + 8005e72: 6979 ldr r1, [r7, #20] + 8005e74: 69ba ldr r2, [r7, #24] + 8005e76: e841 2300 strex r3, r2, [r1] + 8005e7a: 613b str r3, [r7, #16] return(result); - 8007474: 693b ldr r3, [r7, #16] - 8007476: 2b00 cmp r3, #0 - 8007478: d1e5 bne.n 8007446 + 8005e7c: 693b ldr r3, [r7, #16] + 8005e7e: 2b00 cmp r3, #0 + 8005e80: d1e5 bne.n 8005e4e } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 800747a: 687b ldr r3, [r7, #4] - 800747c: 2220 movs r2, #32 - 800747e: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005e82: 687b ldr r3, [r7, #4] + 8005e84: 2220 movs r2, #32 + 8005e86: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8007482: 687b ldr r3, [r7, #4] - 8007484: 2200 movs r2, #0 - 8007486: 631a str r2, [r3, #48] @ 0x30 + 8005e8a: 687b ldr r3, [r7, #4] + 8005e8c: 2200 movs r2, #0 + 8005e8e: 631a str r2, [r3, #48] @ 0x30 } - 8007488: bf00 nop - 800748a: 3754 adds r7, #84 @ 0x54 - 800748c: 46bd mov sp, r7 - 800748e: bc80 pop {r7} - 8007490: 4770 bx lr + 8005e90: bf00 nop + 8005e92: 3754 adds r7, #84 @ 0x54 + 8005e94: 46bd mov sp, r7 + 8005e96: bc80 pop {r7} + 8005e98: 4770 bx lr -08007492 : +08005e9a : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - 8007492: b580 push {r7, lr} - 8007494: b084 sub sp, #16 - 8007496: af00 add r7, sp, #0 - 8007498: 6078 str r0, [r7, #4] + 8005e9a: b580 push {r7, lr} + 8005e9c: b084 sub sp, #16 + 8005e9e: af00 add r7, sp, #0 + 8005ea0: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 800749a: 687b ldr r3, [r7, #4] - 800749c: 6a5b ldr r3, [r3, #36] @ 0x24 - 800749e: 60fb str r3, [r7, #12] + 8005ea2: 687b ldr r3, [r7, #4] + 8005ea4: 6a5b ldr r3, [r3, #36] @ 0x24 + 8005ea6: 60fb str r3, [r7, #12] huart->RxXferCount = 0x00U; - 80074a0: 68fb ldr r3, [r7, #12] - 80074a2: 2200 movs r2, #0 - 80074a4: 85da strh r2, [r3, #46] @ 0x2e + 8005ea8: 68fb ldr r3, [r7, #12] + 8005eaa: 2200 movs r2, #0 + 8005eac: 85da strh r2, [r3, #46] @ 0x2e huart->TxXferCount = 0x00U; - 80074a6: 68fb ldr r3, [r7, #12] - 80074a8: 2200 movs r2, #0 - 80074aa: 84da strh r2, [r3, #38] @ 0x26 + 8005eae: 68fb ldr r3, [r7, #12] + 8005eb0: 2200 movs r2, #0 + 8005eb2: 84da strh r2, [r3, #38] @ 0x26 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 80074ac: 68f8 ldr r0, [r7, #12] - 80074ae: f7ff ff21 bl 80072f4 + 8005eb4: 68f8 ldr r0, [r7, #12] + 8005eb6: f7ff ff21 bl 8005cfc #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 80074b2: bf00 nop - 80074b4: 3710 adds r7, #16 - 80074b6: 46bd mov sp, r7 - 80074b8: bd80 pop {r7, pc} + 8005eba: bf00 nop + 8005ebc: 3710 adds r7, #16 + 8005ebe: 46bd mov sp, r7 + 8005ec0: bd80 pop {r7, pc} -080074ba : +08005ec2 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) { - 80074ba: b480 push {r7} - 80074bc: b085 sub sp, #20 - 80074be: af00 add r7, sp, #0 - 80074c0: 6078 str r0, [r7, #4] + 8005ec2: b480 push {r7} + 8005ec4: b085 sub sp, #20 + 8005ec6: af00 add r7, sp, #0 + 8005ec8: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) - 80074c2: 687b ldr r3, [r7, #4] - 80074c4: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 80074c8: b2db uxtb r3, r3 - 80074ca: 2b21 cmp r3, #33 @ 0x21 - 80074cc: d13e bne.n 800754c + 8005eca: 687b ldr r3, [r7, #4] + 8005ecc: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 8005ed0: b2db uxtb r3, r3 + 8005ed2: 2b21 cmp r3, #33 @ 0x21 + 8005ed4: d13e bne.n 8005f54 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 80074ce: 687b ldr r3, [r7, #4] - 80074d0: 689b ldr r3, [r3, #8] - 80074d2: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 80074d6: d114 bne.n 8007502 - 80074d8: 687b ldr r3, [r7, #4] - 80074da: 691b ldr r3, [r3, #16] - 80074dc: 2b00 cmp r3, #0 - 80074de: d110 bne.n 8007502 + 8005ed6: 687b ldr r3, [r7, #4] + 8005ed8: 689b ldr r3, [r3, #8] + 8005eda: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8005ede: d114 bne.n 8005f0a + 8005ee0: 687b ldr r3, [r7, #4] + 8005ee2: 691b ldr r3, [r3, #16] + 8005ee4: 2b00 cmp r3, #0 + 8005ee6: d110 bne.n 8005f0a { tmp = (const uint16_t *) huart->pTxBuffPtr; - 80074e0: 687b ldr r3, [r7, #4] - 80074e2: 6a1b ldr r3, [r3, #32] - 80074e4: 60fb str r3, [r7, #12] + 8005ee8: 687b ldr r3, [r7, #4] + 8005eea: 6a1b ldr r3, [r3, #32] + 8005eec: 60fb str r3, [r7, #12] huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); - 80074e6: 68fb ldr r3, [r7, #12] - 80074e8: 881b ldrh r3, [r3, #0] - 80074ea: 461a mov r2, r3 - 80074ec: 687b ldr r3, [r7, #4] - 80074ee: 681b ldr r3, [r3, #0] - 80074f0: f3c2 0208 ubfx r2, r2, #0, #9 - 80074f4: 605a str r2, [r3, #4] + 8005eee: 68fb ldr r3, [r7, #12] + 8005ef0: 881b ldrh r3, [r3, #0] + 8005ef2: 461a mov r2, r3 + 8005ef4: 687b ldr r3, [r7, #4] + 8005ef6: 681b ldr r3, [r3, #0] + 8005ef8: f3c2 0208 ubfx r2, r2, #0, #9 + 8005efc: 605a str r2, [r3, #4] huart->pTxBuffPtr += 2U; - 80074f6: 687b ldr r3, [r7, #4] - 80074f8: 6a1b ldr r3, [r3, #32] - 80074fa: 1c9a adds r2, r3, #2 - 80074fc: 687b ldr r3, [r7, #4] - 80074fe: 621a str r2, [r3, #32] - 8007500: e008 b.n 8007514 + 8005efe: 687b ldr r3, [r7, #4] + 8005f00: 6a1b ldr r3, [r3, #32] + 8005f02: 1c9a adds r2, r3, #2 + 8005f04: 687b ldr r3, [r7, #4] + 8005f06: 621a str r2, [r3, #32] + 8005f08: e008 b.n 8005f1c } else { huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); - 8007502: 687b ldr r3, [r7, #4] - 8007504: 6a1b ldr r3, [r3, #32] - 8007506: 1c59 adds r1, r3, #1 - 8007508: 687a ldr r2, [r7, #4] - 800750a: 6211 str r1, [r2, #32] - 800750c: 781a ldrb r2, [r3, #0] - 800750e: 687b ldr r3, [r7, #4] - 8007510: 681b ldr r3, [r3, #0] - 8007512: 605a str r2, [r3, #4] + 8005f0a: 687b ldr r3, [r7, #4] + 8005f0c: 6a1b ldr r3, [r3, #32] + 8005f0e: 1c59 adds r1, r3, #1 + 8005f10: 687a ldr r2, [r7, #4] + 8005f12: 6211 str r1, [r2, #32] + 8005f14: 781a ldrb r2, [r3, #0] + 8005f16: 687b ldr r3, [r7, #4] + 8005f18: 681b ldr r3, [r3, #0] + 8005f1a: 605a str r2, [r3, #4] } if (--huart->TxXferCount == 0U) - 8007514: 687b ldr r3, [r7, #4] - 8007516: 8cdb ldrh r3, [r3, #38] @ 0x26 - 8007518: b29b uxth r3, r3 - 800751a: 3b01 subs r3, #1 - 800751c: b29b uxth r3, r3 - 800751e: 687a ldr r2, [r7, #4] - 8007520: 4619 mov r1, r3 - 8007522: 84d1 strh r1, [r2, #38] @ 0x26 - 8007524: 2b00 cmp r3, #0 - 8007526: d10f bne.n 8007548 + 8005f1c: 687b ldr r3, [r7, #4] + 8005f1e: 8cdb ldrh r3, [r3, #38] @ 0x26 + 8005f20: b29b uxth r3, r3 + 8005f22: 3b01 subs r3, #1 + 8005f24: b29b uxth r3, r3 + 8005f26: 687a ldr r2, [r7, #4] + 8005f28: 4619 mov r1, r3 + 8005f2a: 84d1 strh r1, [r2, #38] @ 0x26 + 8005f2c: 2b00 cmp r3, #0 + 8005f2e: d10f bne.n 8005f50 { /* Disable the UART Transmit Data Register Empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); - 8007528: 687b ldr r3, [r7, #4] - 800752a: 681b ldr r3, [r3, #0] - 800752c: 68da ldr r2, [r3, #12] - 800752e: 687b ldr r3, [r7, #4] - 8007530: 681b ldr r3, [r3, #0] - 8007532: f022 0280 bic.w r2, r2, #128 @ 0x80 - 8007536: 60da str r2, [r3, #12] + 8005f30: 687b ldr r3, [r7, #4] + 8005f32: 681b ldr r3, [r3, #0] + 8005f34: 68da ldr r2, [r3, #12] + 8005f36: 687b ldr r3, [r7, #4] + 8005f38: 681b ldr r3, [r3, #0] + 8005f3a: f022 0280 bic.w r2, r2, #128 @ 0x80 + 8005f3e: 60da str r2, [r3, #12] /* Enable the UART Transmit Complete Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TC); - 8007538: 687b ldr r3, [r7, #4] - 800753a: 681b ldr r3, [r3, #0] - 800753c: 68da ldr r2, [r3, #12] - 800753e: 687b ldr r3, [r7, #4] - 8007540: 681b ldr r3, [r3, #0] - 8007542: f042 0240 orr.w r2, r2, #64 @ 0x40 - 8007546: 60da str r2, [r3, #12] + 8005f40: 687b ldr r3, [r7, #4] + 8005f42: 681b ldr r3, [r3, #0] + 8005f44: 68da ldr r2, [r3, #12] + 8005f46: 687b ldr r3, [r7, #4] + 8005f48: 681b ldr r3, [r3, #0] + 8005f4a: f042 0240 orr.w r2, r2, #64 @ 0x40 + 8005f4e: 60da str r2, [r3, #12] } return HAL_OK; - 8007548: 2300 movs r3, #0 - 800754a: e000 b.n 800754e + 8005f50: 2300 movs r3, #0 + 8005f52: e000 b.n 8005f56 } else { return HAL_BUSY; - 800754c: 2302 movs r3, #2 + 8005f54: 2302 movs r3, #2 } } - 800754e: 4618 mov r0, r3 - 8007550: 3714 adds r7, #20 - 8007552: 46bd mov sp, r7 - 8007554: bc80 pop {r7} - 8007556: 4770 bx lr + 8005f56: 4618 mov r0, r3 + 8005f58: 3714 adds r7, #20 + 8005f5a: 46bd mov sp, r7 + 8005f5c: bc80 pop {r7} + 8005f5e: 4770 bx lr -08007558 : +08005f60 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) { - 8007558: b580 push {r7, lr} - 800755a: b082 sub sp, #8 - 800755c: af00 add r7, sp, #0 - 800755e: 6078 str r0, [r7, #4] + 8005f60: b580 push {r7, lr} + 8005f62: b082 sub sp, #8 + 8005f64: af00 add r7, sp, #0 + 8005f66: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TC); - 8007560: 687b ldr r3, [r7, #4] - 8007562: 681b ldr r3, [r3, #0] - 8007564: 68da ldr r2, [r3, #12] - 8007566: 687b ldr r3, [r7, #4] - 8007568: 681b ldr r3, [r3, #0] - 800756a: f022 0240 bic.w r2, r2, #64 @ 0x40 - 800756e: 60da str r2, [r3, #12] + 8005f68: 687b ldr r3, [r7, #4] + 8005f6a: 681b ldr r3, [r3, #0] + 8005f6c: 68da ldr r2, [r3, #12] + 8005f6e: 687b ldr r3, [r7, #4] + 8005f70: 681b ldr r3, [r3, #0] + 8005f72: f022 0240 bic.w r2, r2, #64 @ 0x40 + 8005f76: 60da str r2, [r3, #12] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8007570: 687b ldr r3, [r7, #4] - 8007572: 2220 movs r2, #32 - 8007574: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005f78: 687b ldr r3, [r7, #4] + 8005f7a: 2220 movs r2, #32 + 8005f7c: f883 2041 strb.w r2, [r3, #65] @ 0x41 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); - 8007578: 6878 ldr r0, [r7, #4] - 800757a: f7ff fea9 bl 80072d0 + 8005f80: 6878 ldr r0, [r7, #4] + 8005f82: f7ff fea9 bl 8005cd8 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return HAL_OK; - 800757e: 2300 movs r3, #0 + 8005f86: 2300 movs r3, #0 } - 8007580: 4618 mov r0, r3 - 8007582: 3708 adds r7, #8 - 8007584: 46bd mov sp, r7 - 8007586: bd80 pop {r7, pc} + 8005f88: 4618 mov r0, r3 + 8005f8a: 3708 adds r7, #8 + 8005f8c: 46bd mov sp, r7 + 8005f8e: bd80 pop {r7, pc} -08007588 : +08005f90 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { - 8007588: b580 push {r7, lr} - 800758a: b08c sub sp, #48 @ 0x30 - 800758c: af00 add r7, sp, #0 - 800758e: 6078 str r0, [r7, #4] + 8005f90: b580 push {r7, lr} + 8005f92: b08c sub sp, #48 @ 0x30 + 8005f94: af00 add r7, sp, #0 + 8005f96: 6078 str r0, [r7, #4] uint8_t *pdata8bits; uint16_t *pdata16bits; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8007590: 687b ldr r3, [r7, #4] - 8007592: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 - 8007596: b2db uxtb r3, r3 - 8007598: 2b22 cmp r3, #34 @ 0x22 - 800759a: f040 80ae bne.w 80076fa + 8005f98: 687b ldr r3, [r7, #4] + 8005f9a: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 + 8005f9e: b2db uxtb r3, r3 + 8005fa0: 2b22 cmp r3, #34 @ 0x22 + 8005fa2: f040 80ae bne.w 8006102 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 800759e: 687b ldr r3, [r7, #4] - 80075a0: 689b ldr r3, [r3, #8] - 80075a2: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 80075a6: d117 bne.n 80075d8 - 80075a8: 687b ldr r3, [r7, #4] - 80075aa: 691b ldr r3, [r3, #16] - 80075ac: 2b00 cmp r3, #0 - 80075ae: d113 bne.n 80075d8 + 8005fa6: 687b ldr r3, [r7, #4] + 8005fa8: 689b ldr r3, [r3, #8] + 8005faa: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8005fae: d117 bne.n 8005fe0 + 8005fb0: 687b ldr r3, [r7, #4] + 8005fb2: 691b ldr r3, [r3, #16] + 8005fb4: 2b00 cmp r3, #0 + 8005fb6: d113 bne.n 8005fe0 { pdata8bits = NULL; - 80075b0: 2300 movs r3, #0 - 80075b2: 62fb str r3, [r7, #44] @ 0x2c + 8005fb8: 2300 movs r3, #0 + 8005fba: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = (uint16_t *) huart->pRxBuffPtr; - 80075b4: 687b ldr r3, [r7, #4] - 80075b6: 6a9b ldr r3, [r3, #40] @ 0x28 - 80075b8: 62bb str r3, [r7, #40] @ 0x28 + 8005fbc: 687b ldr r3, [r7, #4] + 8005fbe: 6a9b ldr r3, [r3, #40] @ 0x28 + 8005fc0: 62bb str r3, [r7, #40] @ 0x28 *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); - 80075ba: 687b ldr r3, [r7, #4] - 80075bc: 681b ldr r3, [r3, #0] - 80075be: 685b ldr r3, [r3, #4] - 80075c0: b29b uxth r3, r3 - 80075c2: f3c3 0308 ubfx r3, r3, #0, #9 - 80075c6: b29a uxth r2, r3 - 80075c8: 6abb ldr r3, [r7, #40] @ 0x28 - 80075ca: 801a strh r2, [r3, #0] + 8005fc2: 687b ldr r3, [r7, #4] + 8005fc4: 681b ldr r3, [r3, #0] + 8005fc6: 685b ldr r3, [r3, #4] + 8005fc8: b29b uxth r3, r3 + 8005fca: f3c3 0308 ubfx r3, r3, #0, #9 + 8005fce: b29a uxth r2, r3 + 8005fd0: 6abb ldr r3, [r7, #40] @ 0x28 + 8005fd2: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; - 80075cc: 687b ldr r3, [r7, #4] - 80075ce: 6a9b ldr r3, [r3, #40] @ 0x28 - 80075d0: 1c9a adds r2, r3, #2 - 80075d2: 687b ldr r3, [r7, #4] - 80075d4: 629a str r2, [r3, #40] @ 0x28 - 80075d6: e026 b.n 8007626 + 8005fd4: 687b ldr r3, [r7, #4] + 8005fd6: 6a9b ldr r3, [r3, #40] @ 0x28 + 8005fd8: 1c9a adds r2, r3, #2 + 8005fda: 687b ldr r3, [r7, #4] + 8005fdc: 629a str r2, [r3, #40] @ 0x28 + 8005fde: e026 b.n 800602e } else { pdata8bits = (uint8_t *) huart->pRxBuffPtr; - 80075d8: 687b ldr r3, [r7, #4] - 80075da: 6a9b ldr r3, [r3, #40] @ 0x28 - 80075dc: 62fb str r3, [r7, #44] @ 0x2c + 8005fe0: 687b ldr r3, [r7, #4] + 8005fe2: 6a9b ldr r3, [r3, #40] @ 0x28 + 8005fe4: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = NULL; - 80075de: 2300 movs r3, #0 - 80075e0: 62bb str r3, [r7, #40] @ 0x28 + 8005fe6: 2300 movs r3, #0 + 8005fe8: 62bb str r3, [r7, #40] @ 0x28 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) - 80075e2: 687b ldr r3, [r7, #4] - 80075e4: 689b ldr r3, [r3, #8] - 80075e6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 80075ea: d007 beq.n 80075fc - 80075ec: 687b ldr r3, [r7, #4] - 80075ee: 689b ldr r3, [r3, #8] - 80075f0: 2b00 cmp r3, #0 - 80075f2: d10a bne.n 800760a - 80075f4: 687b ldr r3, [r7, #4] - 80075f6: 691b ldr r3, [r3, #16] - 80075f8: 2b00 cmp r3, #0 - 80075fa: d106 bne.n 800760a + 8005fea: 687b ldr r3, [r7, #4] + 8005fec: 689b ldr r3, [r3, #8] + 8005fee: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8005ff2: d007 beq.n 8006004 + 8005ff4: 687b ldr r3, [r7, #4] + 8005ff6: 689b ldr r3, [r3, #8] + 8005ff8: 2b00 cmp r3, #0 + 8005ffa: d10a bne.n 8006012 + 8005ffc: 687b ldr r3, [r7, #4] + 8005ffe: 691b ldr r3, [r3, #16] + 8006000: 2b00 cmp r3, #0 + 8006002: d106 bne.n 8006012 { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); - 80075fc: 687b ldr r3, [r7, #4] - 80075fe: 681b ldr r3, [r3, #0] - 8007600: 685b ldr r3, [r3, #4] - 8007602: b2da uxtb r2, r3 - 8007604: 6afb ldr r3, [r7, #44] @ 0x2c - 8007606: 701a strb r2, [r3, #0] - 8007608: e008 b.n 800761c + 8006004: 687b ldr r3, [r7, #4] + 8006006: 681b ldr r3, [r3, #0] + 8006008: 685b ldr r3, [r3, #4] + 800600a: b2da uxtb r2, r3 + 800600c: 6afb ldr r3, [r7, #44] @ 0x2c + 800600e: 701a strb r2, [r3, #0] + 8006010: e008 b.n 8006024 } else { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); - 800760a: 687b ldr r3, [r7, #4] - 800760c: 681b ldr r3, [r3, #0] - 800760e: 685b ldr r3, [r3, #4] - 8007610: b2db uxtb r3, r3 - 8007612: f003 037f and.w r3, r3, #127 @ 0x7f - 8007616: b2da uxtb r2, r3 - 8007618: 6afb ldr r3, [r7, #44] @ 0x2c - 800761a: 701a strb r2, [r3, #0] + 8006012: 687b ldr r3, [r7, #4] + 8006014: 681b ldr r3, [r3, #0] + 8006016: 685b ldr r3, [r3, #4] + 8006018: b2db uxtb r3, r3 + 800601a: f003 037f and.w r3, r3, #127 @ 0x7f + 800601e: b2da uxtb r2, r3 + 8006020: 6afb ldr r3, [r7, #44] @ 0x2c + 8006022: 701a strb r2, [r3, #0] } huart->pRxBuffPtr += 1U; - 800761c: 687b ldr r3, [r7, #4] - 800761e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8007620: 1c5a adds r2, r3, #1 - 8007622: 687b ldr r3, [r7, #4] - 8007624: 629a str r2, [r3, #40] @ 0x28 + 8006024: 687b ldr r3, [r7, #4] + 8006026: 6a9b ldr r3, [r3, #40] @ 0x28 + 8006028: 1c5a adds r2, r3, #1 + 800602a: 687b ldr r3, [r7, #4] + 800602c: 629a str r2, [r3, #40] @ 0x28 } if (--huart->RxXferCount == 0U) - 8007626: 687b ldr r3, [r7, #4] - 8007628: 8ddb ldrh r3, [r3, #46] @ 0x2e - 800762a: b29b uxth r3, r3 - 800762c: 3b01 subs r3, #1 - 800762e: b29b uxth r3, r3 - 8007630: 687a ldr r2, [r7, #4] - 8007632: 4619 mov r1, r3 - 8007634: 85d1 strh r1, [r2, #46] @ 0x2e - 8007636: 2b00 cmp r3, #0 - 8007638: d15d bne.n 80076f6 + 800602e: 687b ldr r3, [r7, #4] + 8006030: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8006032: b29b uxth r3, r3 + 8006034: 3b01 subs r3, #1 + 8006036: b29b uxth r3, r3 + 8006038: 687a ldr r2, [r7, #4] + 800603a: 4619 mov r1, r3 + 800603c: 85d1 strh r1, [r2, #46] @ 0x2e + 800603e: 2b00 cmp r3, #0 + 8006040: d15d bne.n 80060fe { /* Disable the UART Data Register not empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); - 800763a: 687b ldr r3, [r7, #4] - 800763c: 681b ldr r3, [r3, #0] - 800763e: 68da ldr r2, [r3, #12] - 8007640: 687b ldr r3, [r7, #4] - 8007642: 681b ldr r3, [r3, #0] - 8007644: f022 0220 bic.w r2, r2, #32 - 8007648: 60da str r2, [r3, #12] + 8006042: 687b ldr r3, [r7, #4] + 8006044: 681b ldr r3, [r3, #0] + 8006046: 68da ldr r2, [r3, #12] + 8006048: 687b ldr r3, [r7, #4] + 800604a: 681b ldr r3, [r3, #0] + 800604c: f022 0220 bic.w r2, r2, #32 + 8006050: 60da str r2, [r3, #12] /* Disable the UART Parity Error Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_PE); - 800764a: 687b ldr r3, [r7, #4] - 800764c: 681b ldr r3, [r3, #0] - 800764e: 68da ldr r2, [r3, #12] - 8007650: 687b ldr r3, [r7, #4] - 8007652: 681b ldr r3, [r3, #0] - 8007654: f422 7280 bic.w r2, r2, #256 @ 0x100 - 8007658: 60da str r2, [r3, #12] + 8006052: 687b ldr r3, [r7, #4] + 8006054: 681b ldr r3, [r3, #0] + 8006056: 68da ldr r2, [r3, #12] + 8006058: 687b ldr r3, [r7, #4] + 800605a: 681b ldr r3, [r3, #0] + 800605c: f422 7280 bic.w r2, r2, #256 @ 0x100 + 8006060: 60da str r2, [r3, #12] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); - 800765a: 687b ldr r3, [r7, #4] - 800765c: 681b ldr r3, [r3, #0] - 800765e: 695a ldr r2, [r3, #20] - 8007660: 687b ldr r3, [r7, #4] - 8007662: 681b ldr r3, [r3, #0] - 8007664: f022 0201 bic.w r2, r2, #1 - 8007668: 615a str r2, [r3, #20] + 8006062: 687b ldr r3, [r7, #4] + 8006064: 681b ldr r3, [r3, #0] + 8006066: 695a ldr r2, [r3, #20] + 8006068: 687b ldr r3, [r7, #4] + 800606a: 681b ldr r3, [r3, #0] + 800606c: f022 0201 bic.w r2, r2, #1 + 8006070: 615a str r2, [r3, #20] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 800766a: 687b ldr r3, [r7, #4] - 800766c: 2220 movs r2, #32 - 800766e: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8006072: 687b ldr r3, [r7, #4] + 8006074: 2220 movs r2, #32 + 8006076: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Initialize type of RxEvent to Transfer Complete */ huart->RxEventType = HAL_UART_RXEVENT_TC; - 8007672: 687b ldr r3, [r7, #4] - 8007674: 2200 movs r2, #0 - 8007676: 635a str r2, [r3, #52] @ 0x34 + 800607a: 687b ldr r3, [r7, #4] + 800607c: 2200 movs r2, #0 + 800607e: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8007678: 687b ldr r3, [r7, #4] - 800767a: 6b1b ldr r3, [r3, #48] @ 0x30 - 800767c: 2b01 cmp r3, #1 - 800767e: d135 bne.n 80076ec + 8006080: 687b ldr r3, [r7, #4] + 8006082: 6b1b ldr r3, [r3, #48] @ 0x30 + 8006084: 2b01 cmp r3, #1 + 8006086: d135 bne.n 80060f4 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8007680: 687b ldr r3, [r7, #4] - 8007682: 2200 movs r2, #0 - 8007684: 631a str r2, [r3, #48] @ 0x30 + 8006088: 687b ldr r3, [r7, #4] + 800608a: 2200 movs r2, #0 + 800608c: 631a str r2, [r3, #48] @ 0x30 /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8007686: 687b ldr r3, [r7, #4] - 8007688: 681b ldr r3, [r3, #0] - 800768a: 330c adds r3, #12 - 800768c: 617b str r3, [r7, #20] + 800608e: 687b ldr r3, [r7, #4] + 8006090: 681b ldr r3, [r3, #0] + 8006092: 330c adds r3, #12 + 8006094: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 800768e: 697b ldr r3, [r7, #20] - 8007690: e853 3f00 ldrex r3, [r3] - 8007694: 613b str r3, [r7, #16] + 8006096: 697b ldr r3, [r7, #20] + 8006098: e853 3f00 ldrex r3, [r3] + 800609c: 613b str r3, [r7, #16] return(result); - 8007696: 693b ldr r3, [r7, #16] - 8007698: f023 0310 bic.w r3, r3, #16 - 800769c: 627b str r3, [r7, #36] @ 0x24 - 800769e: 687b ldr r3, [r7, #4] - 80076a0: 681b ldr r3, [r3, #0] - 80076a2: 330c adds r3, #12 - 80076a4: 6a7a ldr r2, [r7, #36] @ 0x24 - 80076a6: 623a str r2, [r7, #32] - 80076a8: 61fb str r3, [r7, #28] + 800609e: 693b ldr r3, [r7, #16] + 80060a0: f023 0310 bic.w r3, r3, #16 + 80060a4: 627b str r3, [r7, #36] @ 0x24 + 80060a6: 687b ldr r3, [r7, #4] + 80060a8: 681b ldr r3, [r3, #0] + 80060aa: 330c adds r3, #12 + 80060ac: 6a7a ldr r2, [r7, #36] @ 0x24 + 80060ae: 623a str r2, [r7, #32] + 80060b0: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80076aa: 69f9 ldr r1, [r7, #28] - 80076ac: 6a3a ldr r2, [r7, #32] - 80076ae: e841 2300 strex r3, r2, [r1] - 80076b2: 61bb str r3, [r7, #24] + 80060b2: 69f9 ldr r1, [r7, #28] + 80060b4: 6a3a ldr r2, [r7, #32] + 80060b6: e841 2300 strex r3, r2, [r1] + 80060ba: 61bb str r3, [r7, #24] return(result); - 80076b4: 69bb ldr r3, [r7, #24] - 80076b6: 2b00 cmp r3, #0 - 80076b8: d1e5 bne.n 8007686 + 80060bc: 69bb ldr r3, [r7, #24] + 80060be: 2b00 cmp r3, #0 + 80060c0: d1e5 bne.n 800608e /* Check if IDLE flag is set */ if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) - 80076ba: 687b ldr r3, [r7, #4] - 80076bc: 681b ldr r3, [r3, #0] - 80076be: 681b ldr r3, [r3, #0] - 80076c0: f003 0310 and.w r3, r3, #16 - 80076c4: 2b10 cmp r3, #16 - 80076c6: d10a bne.n 80076de + 80060c2: 687b ldr r3, [r7, #4] + 80060c4: 681b ldr r3, [r3, #0] + 80060c6: 681b ldr r3, [r3, #0] + 80060c8: f003 0310 and.w r3, r3, #16 + 80060cc: 2b10 cmp r3, #16 + 80060ce: d10a bne.n 80060e6 { /* Clear IDLE flag in ISR */ __HAL_UART_CLEAR_IDLEFLAG(huart); - 80076c8: 2300 movs r3, #0 - 80076ca: 60fb str r3, [r7, #12] - 80076cc: 687b ldr r3, [r7, #4] - 80076ce: 681b ldr r3, [r3, #0] - 80076d0: 681b ldr r3, [r3, #0] - 80076d2: 60fb str r3, [r7, #12] - 80076d4: 687b ldr r3, [r7, #4] - 80076d6: 681b ldr r3, [r3, #0] - 80076d8: 685b ldr r3, [r3, #4] - 80076da: 60fb str r3, [r7, #12] - 80076dc: 68fb ldr r3, [r7, #12] + 80060d0: 2300 movs r3, #0 + 80060d2: 60fb str r3, [r7, #12] + 80060d4: 687b ldr r3, [r7, #4] + 80060d6: 681b ldr r3, [r3, #0] + 80060d8: 681b ldr r3, [r3, #0] + 80060da: 60fb str r3, [r7, #12] + 80060dc: 687b ldr r3, [r7, #4] + 80060de: 681b ldr r3, [r3, #0] + 80060e0: 685b ldr r3, [r3, #4] + 80060e2: 60fb str r3, [r7, #12] + 80060e4: 68fb ldr r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 80076de: 687b ldr r3, [r7, #4] - 80076e0: 8d9b ldrh r3, [r3, #44] @ 0x2c - 80076e2: 4619 mov r1, r3 - 80076e4: 6878 ldr r0, [r7, #4] - 80076e6: f7ff fe0e bl 8007306 - 80076ea: e002 b.n 80076f2 + 80060e6: 687b ldr r3, [r7, #4] + 80060e8: 8d9b ldrh r3, [r3, #44] @ 0x2c + 80060ea: 4619 mov r1, r3 + 80060ec: 6878 ldr r0, [r7, #4] + 80060ee: f7ff fe0e bl 8005d0e + 80060f2: e002 b.n 80060fa #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); - 80076ec: 6878 ldr r0, [r7, #4] - 80076ee: f7ff fdf8 bl 80072e2 + 80060f4: 6878 ldr r0, [r7, #4] + 80060f6: f7ff fdf8 bl 8005cea #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; - 80076f2: 2300 movs r3, #0 - 80076f4: e002 b.n 80076fc + 80060fa: 2300 movs r3, #0 + 80060fc: e002 b.n 8006104 } return HAL_OK; - 80076f6: 2300 movs r3, #0 - 80076f8: e000 b.n 80076fc + 80060fe: 2300 movs r3, #0 + 8006100: e000 b.n 8006104 } else { return HAL_BUSY; - 80076fa: 2302 movs r3, #2 + 8006102: 2302 movs r3, #2 } } - 80076fc: 4618 mov r0, r3 - 80076fe: 3730 adds r7, #48 @ 0x30 - 8007700: 46bd mov sp, r7 - 8007702: bd80 pop {r7, pc} + 8006104: 4618 mov r0, r3 + 8006106: 3730 adds r7, #48 @ 0x30 + 8006108: 46bd mov sp, r7 + 800610a: bd80 pop {r7, pc} -08007704 : +0800610c : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { - 8007704: b580 push {r7, lr} - 8007706: b084 sub sp, #16 - 8007708: af00 add r7, sp, #0 - 800770a: 6078 str r0, [r7, #4] + 800610c: b580 push {r7, lr} + 800610e: b084 sub sp, #16 + 8006110: af00 add r7, sp, #0 + 8006112: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 800770c: 687b ldr r3, [r7, #4] - 800770e: 681b ldr r3, [r3, #0] - 8007710: 691b ldr r3, [r3, #16] - 8007712: f423 5140 bic.w r1, r3, #12288 @ 0x3000 - 8007716: 687b ldr r3, [r7, #4] - 8007718: 68da ldr r2, [r3, #12] - 800771a: 687b ldr r3, [r7, #4] - 800771c: 681b ldr r3, [r3, #0] - 800771e: 430a orrs r2, r1 - 8007720: 611a str r2, [r3, #16] + 8006114: 687b ldr r3, [r7, #4] + 8006116: 681b ldr r3, [r3, #0] + 8006118: 691b ldr r3, [r3, #16] + 800611a: f423 5140 bic.w r1, r3, #12288 @ 0x3000 + 800611e: 687b ldr r3, [r7, #4] + 8006120: 68da ldr r2, [r3, #12] + 8006122: 687b ldr r3, [r7, #4] + 8006124: 681b ldr r3, [r3, #0] + 8006126: 430a orrs r2, r1 + 8006128: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; - 8007722: 687b ldr r3, [r7, #4] - 8007724: 689a ldr r2, [r3, #8] - 8007726: 687b ldr r3, [r7, #4] - 8007728: 691b ldr r3, [r3, #16] - 800772a: 431a orrs r2, r3 - 800772c: 687b ldr r3, [r7, #4] - 800772e: 695b ldr r3, [r3, #20] - 8007730: 4313 orrs r3, r2 - 8007732: 60bb str r3, [r7, #8] + 800612a: 687b ldr r3, [r7, #4] + 800612c: 689a ldr r2, [r3, #8] + 800612e: 687b ldr r3, [r7, #4] + 8006130: 691b ldr r3, [r3, #16] + 8006132: 431a orrs r2, r3 + 8006134: 687b ldr r3, [r7, #4] + 8006136: 695b ldr r3, [r3, #20] + 8006138: 4313 orrs r3, r2 + 800613a: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, - 8007734: 687b ldr r3, [r7, #4] - 8007736: 681b ldr r3, [r3, #0] - 8007738: 68db ldr r3, [r3, #12] - 800773a: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 - 800773e: f023 030c bic.w r3, r3, #12 - 8007742: 687a ldr r2, [r7, #4] - 8007744: 6812 ldr r2, [r2, #0] - 8007746: 68b9 ldr r1, [r7, #8] - 8007748: 430b orrs r3, r1 - 800774a: 60d3 str r3, [r2, #12] + 800613c: 687b ldr r3, [r7, #4] + 800613e: 681b ldr r3, [r3, #0] + 8006140: 68db ldr r3, [r3, #12] + 8006142: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 + 8006146: f023 030c bic.w r3, r3, #12 + 800614a: 687a ldr r2, [r7, #4] + 800614c: 6812 ldr r2, [r2, #0] + 800614e: 68b9 ldr r1, [r7, #8] + 8006150: 430b orrs r3, r1 + 8006152: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); - 800774c: 687b ldr r3, [r7, #4] - 800774e: 681b ldr r3, [r3, #0] - 8007750: 695b ldr r3, [r3, #20] - 8007752: f423 7140 bic.w r1, r3, #768 @ 0x300 - 8007756: 687b ldr r3, [r7, #4] - 8007758: 699a ldr r2, [r3, #24] - 800775a: 687b ldr r3, [r7, #4] - 800775c: 681b ldr r3, [r3, #0] - 800775e: 430a orrs r2, r1 - 8007760: 615a str r2, [r3, #20] + 8006154: 687b ldr r3, [r7, #4] + 8006156: 681b ldr r3, [r3, #0] + 8006158: 695b ldr r3, [r3, #20] + 800615a: f423 7140 bic.w r1, r3, #768 @ 0x300 + 800615e: 687b ldr r3, [r7, #4] + 8006160: 699a ldr r2, [r3, #24] + 8006162: 687b ldr r3, [r7, #4] + 8006164: 681b ldr r3, [r3, #0] + 8006166: 430a orrs r2, r1 + 8006168: 615a str r2, [r3, #20] if(huart->Instance == USART1) - 8007762: 687b ldr r3, [r7, #4] - 8007764: 681b ldr r3, [r3, #0] - 8007766: 4a2c ldr r2, [pc, #176] @ (8007818 ) - 8007768: 4293 cmp r3, r2 - 800776a: d103 bne.n 8007774 + 800616a: 687b ldr r3, [r7, #4] + 800616c: 681b ldr r3, [r3, #0] + 800616e: 4a2c ldr r2, [pc, #176] @ (8006220 ) + 8006170: 4293 cmp r3, r2 + 8006172: d103 bne.n 800617c { pclk = HAL_RCC_GetPCLK2Freq(); - 800776c: f7fe fde0 bl 8006330 - 8007770: 60f8 str r0, [r7, #12] - 8007772: e002 b.n 800777a + 8006174: f7ff f95a bl 800542c + 8006178: 60f8 str r0, [r7, #12] + 800617a: e002 b.n 8006182 } else { pclk = HAL_RCC_GetPCLK1Freq(); - 8007774: f7fe fdc8 bl 8006308 - 8007778: 60f8 str r0, [r7, #12] + 800617c: f7ff f942 bl 8005404 + 8006180: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); - 800777a: 68fa ldr r2, [r7, #12] - 800777c: 4613 mov r3, r2 - 800777e: 009b lsls r3, r3, #2 - 8007780: 4413 add r3, r2 - 8007782: 009a lsls r2, r3, #2 - 8007784: 441a add r2, r3 - 8007786: 687b ldr r3, [r7, #4] - 8007788: 685b ldr r3, [r3, #4] - 800778a: 009b lsls r3, r3, #2 - 800778c: fbb2 f3f3 udiv r3, r2, r3 - 8007790: 4a22 ldr r2, [pc, #136] @ (800781c ) - 8007792: fba2 2303 umull r2, r3, r2, r3 - 8007796: 095b lsrs r3, r3, #5 - 8007798: 0119 lsls r1, r3, #4 - 800779a: 68fa ldr r2, [r7, #12] - 800779c: 4613 mov r3, r2 - 800779e: 009b lsls r3, r3, #2 - 80077a0: 4413 add r3, r2 - 80077a2: 009a lsls r2, r3, #2 - 80077a4: 441a add r2, r3 - 80077a6: 687b ldr r3, [r7, #4] - 80077a8: 685b ldr r3, [r3, #4] - 80077aa: 009b lsls r3, r3, #2 - 80077ac: fbb2 f2f3 udiv r2, r2, r3 - 80077b0: 4b1a ldr r3, [pc, #104] @ (800781c ) - 80077b2: fba3 0302 umull r0, r3, r3, r2 - 80077b6: 095b lsrs r3, r3, #5 - 80077b8: 2064 movs r0, #100 @ 0x64 - 80077ba: fb00 f303 mul.w r3, r0, r3 - 80077be: 1ad3 subs r3, r2, r3 - 80077c0: 011b lsls r3, r3, #4 - 80077c2: 3332 adds r3, #50 @ 0x32 - 80077c4: 4a15 ldr r2, [pc, #84] @ (800781c ) - 80077c6: fba2 2303 umull r2, r3, r2, r3 - 80077ca: 095b lsrs r3, r3, #5 - 80077cc: f003 03f0 and.w r3, r3, #240 @ 0xf0 - 80077d0: 4419 add r1, r3 - 80077d2: 68fa ldr r2, [r7, #12] - 80077d4: 4613 mov r3, r2 - 80077d6: 009b lsls r3, r3, #2 - 80077d8: 4413 add r3, r2 - 80077da: 009a lsls r2, r3, #2 - 80077dc: 441a add r2, r3 - 80077de: 687b ldr r3, [r7, #4] - 80077e0: 685b ldr r3, [r3, #4] - 80077e2: 009b lsls r3, r3, #2 - 80077e4: fbb2 f2f3 udiv r2, r2, r3 - 80077e8: 4b0c ldr r3, [pc, #48] @ (800781c ) - 80077ea: fba3 0302 umull r0, r3, r3, r2 - 80077ee: 095b lsrs r3, r3, #5 - 80077f0: 2064 movs r0, #100 @ 0x64 - 80077f2: fb00 f303 mul.w r3, r0, r3 - 80077f6: 1ad3 subs r3, r2, r3 - 80077f8: 011b lsls r3, r3, #4 - 80077fa: 3332 adds r3, #50 @ 0x32 - 80077fc: 4a07 ldr r2, [pc, #28] @ (800781c ) - 80077fe: fba2 2303 umull r2, r3, r2, r3 - 8007802: 095b lsrs r3, r3, #5 - 8007804: f003 020f and.w r2, r3, #15 - 8007808: 687b ldr r3, [r7, #4] - 800780a: 681b ldr r3, [r3, #0] - 800780c: 440a add r2, r1 - 800780e: 609a str r2, [r3, #8] + 8006182: 68fa ldr r2, [r7, #12] + 8006184: 4613 mov r3, r2 + 8006186: 009b lsls r3, r3, #2 + 8006188: 4413 add r3, r2 + 800618a: 009a lsls r2, r3, #2 + 800618c: 441a add r2, r3 + 800618e: 687b ldr r3, [r7, #4] + 8006190: 685b ldr r3, [r3, #4] + 8006192: 009b lsls r3, r3, #2 + 8006194: fbb2 f3f3 udiv r3, r2, r3 + 8006198: 4a22 ldr r2, [pc, #136] @ (8006224 ) + 800619a: fba2 2303 umull r2, r3, r2, r3 + 800619e: 095b lsrs r3, r3, #5 + 80061a0: 0119 lsls r1, r3, #4 + 80061a2: 68fa ldr r2, [r7, #12] + 80061a4: 4613 mov r3, r2 + 80061a6: 009b lsls r3, r3, #2 + 80061a8: 4413 add r3, r2 + 80061aa: 009a lsls r2, r3, #2 + 80061ac: 441a add r2, r3 + 80061ae: 687b ldr r3, [r7, #4] + 80061b0: 685b ldr r3, [r3, #4] + 80061b2: 009b lsls r3, r3, #2 + 80061b4: fbb2 f2f3 udiv r2, r2, r3 + 80061b8: 4b1a ldr r3, [pc, #104] @ (8006224 ) + 80061ba: fba3 0302 umull r0, r3, r3, r2 + 80061be: 095b lsrs r3, r3, #5 + 80061c0: 2064 movs r0, #100 @ 0x64 + 80061c2: fb00 f303 mul.w r3, r0, r3 + 80061c6: 1ad3 subs r3, r2, r3 + 80061c8: 011b lsls r3, r3, #4 + 80061ca: 3332 adds r3, #50 @ 0x32 + 80061cc: 4a15 ldr r2, [pc, #84] @ (8006224 ) + 80061ce: fba2 2303 umull r2, r3, r2, r3 + 80061d2: 095b lsrs r3, r3, #5 + 80061d4: f003 03f0 and.w r3, r3, #240 @ 0xf0 + 80061d8: 4419 add r1, r3 + 80061da: 68fa ldr r2, [r7, #12] + 80061dc: 4613 mov r3, r2 + 80061de: 009b lsls r3, r3, #2 + 80061e0: 4413 add r3, r2 + 80061e2: 009a lsls r2, r3, #2 + 80061e4: 441a add r2, r3 + 80061e6: 687b ldr r3, [r7, #4] + 80061e8: 685b ldr r3, [r3, #4] + 80061ea: 009b lsls r3, r3, #2 + 80061ec: fbb2 f2f3 udiv r2, r2, r3 + 80061f0: 4b0c ldr r3, [pc, #48] @ (8006224 ) + 80061f2: fba3 0302 umull r0, r3, r3, r2 + 80061f6: 095b lsrs r3, r3, #5 + 80061f8: 2064 movs r0, #100 @ 0x64 + 80061fa: fb00 f303 mul.w r3, r0, r3 + 80061fe: 1ad3 subs r3, r2, r3 + 8006200: 011b lsls r3, r3, #4 + 8006202: 3332 adds r3, #50 @ 0x32 + 8006204: 4a07 ldr r2, [pc, #28] @ (8006224 ) + 8006206: fba2 2303 umull r2, r3, r2, r3 + 800620a: 095b lsrs r3, r3, #5 + 800620c: f003 020f and.w r2, r3, #15 + 8006210: 687b ldr r3, [r7, #4] + 8006212: 681b ldr r3, [r3, #0] + 8006214: 440a add r2, r1 + 8006216: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } - 8007810: bf00 nop - 8007812: 3710 adds r7, #16 - 8007814: 46bd mov sp, r7 - 8007816: bd80 pop {r7, pc} - 8007818: 40013800 .word 0x40013800 - 800781c: 51eb851f .word 0x51eb851f + 8006218: bf00 nop + 800621a: 3710 adds r7, #16 + 800621c: 46bd mov sp, r7 + 800621e: bd80 pop {r7, pc} + 8006220: 40013800 .word 0x40013800 + 8006224: 51eb851f .word 0x51eb851f -08007820 : - 8007820: 4603 mov r3, r0 - 8007822: 4402 add r2, r0 - 8007824: 4293 cmp r3, r2 - 8007826: d100 bne.n 800782a - 8007828: 4770 bx lr - 800782a: f803 1b01 strb.w r1, [r3], #1 - 800782e: e7f9 b.n 8007824 +08006228 : + 8006228: 4603 mov r3, r0 + 800622a: 4402 add r2, r0 + 800622c: 4293 cmp r3, r2 + 800622e: d100 bne.n 8006232 + 8006230: 4770 bx lr + 8006232: f803 1b01 strb.w r1, [r3], #1 + 8006236: e7f9 b.n 800622c -08007830 <__errno>: - 8007830: 4b01 ldr r3, [pc, #4] @ (8007838 <__errno+0x8>) - 8007832: 6818 ldr r0, [r3, #0] - 8007834: 4770 bx lr - 8007836: bf00 nop - 8007838: 20000030 .word 0x20000030 +08006238 <__errno>: + 8006238: 4b01 ldr r3, [pc, #4] @ (8006240 <__errno+0x8>) + 800623a: 6818 ldr r0, [r3, #0] + 800623c: 4770 bx lr + 800623e: bf00 nop + 8006240: 20000024 .word 0x20000024 -0800783c <__libc_init_array>: - 800783c: b570 push {r4, r5, r6, lr} - 800783e: 2600 movs r6, #0 - 8007840: 4d0c ldr r5, [pc, #48] @ (8007874 <__libc_init_array+0x38>) - 8007842: 4b0d ldr r3, [pc, #52] @ (8007878 <__libc_init_array+0x3c>) - 8007844: 1b5b subs r3, r3, r5 - 8007846: 109c asrs r4, r3, #2 - 8007848: 42a6 cmp r6, r4 - 800784a: d109 bne.n 8007860 <__libc_init_array+0x24> - 800784c: 2600 movs r6, #0 - 800784e: f000 f8db bl 8007a08 <_init> - 8007852: 4d0a ldr r5, [pc, #40] @ (800787c <__libc_init_array+0x40>) - 8007854: 4b0a ldr r3, [pc, #40] @ (8007880 <__libc_init_array+0x44>) - 8007856: 1b5b subs r3, r3, r5 - 8007858: 109c asrs r4, r3, #2 - 800785a: 42a6 cmp r6, r4 - 800785c: d105 bne.n 800786a <__libc_init_array+0x2e> - 800785e: bd70 pop {r4, r5, r6, pc} - 8007860: f855 3b04 ldr.w r3, [r5], #4 - 8007864: 4798 blx r3 - 8007866: 3601 adds r6, #1 - 8007868: e7ee b.n 8007848 <__libc_init_array+0xc> - 800786a: f855 3b04 ldr.w r3, [r5], #4 - 800786e: 4798 blx r3 - 8007870: 3601 adds r6, #1 - 8007872: e7f2 b.n 800785a <__libc_init_array+0x1e> - 8007874: 08007ab0 .word 0x08007ab0 - 8007878: 08007ab0 .word 0x08007ab0 - 800787c: 08007ab0 .word 0x08007ab0 - 8007880: 08007ab4 .word 0x08007ab4 +08006244 <__libc_init_array>: + 8006244: b570 push {r4, r5, r6, lr} + 8006246: 2600 movs r6, #0 + 8006248: 4d0c ldr r5, [pc, #48] @ (800627c <__libc_init_array+0x38>) + 800624a: 4b0d ldr r3, [pc, #52] @ (8006280 <__libc_init_array+0x3c>) + 800624c: 1b5b subs r3, r3, r5 + 800624e: 109c asrs r4, r3, #2 + 8006250: 42a6 cmp r6, r4 + 8006252: d109 bne.n 8006268 <__libc_init_array+0x24> + 8006254: 2600 movs r6, #0 + 8006256: f000 f8db bl 8006410 <_init> + 800625a: 4d0a ldr r5, [pc, #40] @ (8006284 <__libc_init_array+0x40>) + 800625c: 4b0a ldr r3, [pc, #40] @ (8006288 <__libc_init_array+0x44>) + 800625e: 1b5b subs r3, r3, r5 + 8006260: 109c asrs r4, r3, #2 + 8006262: 42a6 cmp r6, r4 + 8006264: d105 bne.n 8006272 <__libc_init_array+0x2e> + 8006266: bd70 pop {r4, r5, r6, pc} + 8006268: f855 3b04 ldr.w r3, [r5], #4 + 800626c: 4798 blx r3 + 800626e: 3601 adds r6, #1 + 8006270: e7ee b.n 8006250 <__libc_init_array+0xc> + 8006272: f855 3b04 ldr.w r3, [r5], #4 + 8006276: 4798 blx r3 + 8006278: 3601 adds r6, #1 + 800627a: e7f2 b.n 8006262 <__libc_init_array+0x1e> + 800627c: 080064a4 .word 0x080064a4 + 8006280: 080064a4 .word 0x080064a4 + 8006284: 080064a4 .word 0x080064a4 + 8006288: 080064a8 .word 0x080064a8 -08007884 : - 8007884: 440a add r2, r1 - 8007886: 4291 cmp r1, r2 - 8007888: f100 33ff add.w r3, r0, #4294967295 - 800788c: d100 bne.n 8007890 - 800788e: 4770 bx lr - 8007890: b510 push {r4, lr} - 8007892: f811 4b01 ldrb.w r4, [r1], #1 - 8007896: 4291 cmp r1, r2 - 8007898: f803 4f01 strb.w r4, [r3, #1]! - 800789c: d1f9 bne.n 8007892 - 800789e: bd10 pop {r4, pc} +0800628c : + 800628c: 440a add r2, r1 + 800628e: 4291 cmp r1, r2 + 8006290: f100 33ff add.w r3, r0, #4294967295 + 8006294: d100 bne.n 8006298 + 8006296: 4770 bx lr + 8006298: b510 push {r4, lr} + 800629a: f811 4b01 ldrb.w r4, [r1], #1 + 800629e: 4291 cmp r1, r2 + 80062a0: f803 4f01 strb.w r4, [r3, #1]! + 80062a4: d1f9 bne.n 800629a + 80062a6: bd10 pop {r4, pc} -080078a0 : - 80078a0: b538 push {r3, r4, r5, lr} - 80078a2: 4604 mov r4, r0 - 80078a4: f000 f81a bl 80078dc <__ieee754_sqrtf> - 80078a8: 4621 mov r1, r4 - 80078aa: 4605 mov r5, r0 - 80078ac: 4620 mov r0, r4 - 80078ae: f7f9 fbf9 bl 80010a4 <__aeabi_fcmpun> - 80078b2: b920 cbnz r0, 80078be - 80078b4: 4620 mov r0, r4 - 80078b6: 2100 movs r1, #0 - 80078b8: f7f9 fbcc bl 8001054 <__aeabi_fcmplt> - 80078bc: b908 cbnz r0, 80078c2 - 80078be: 4628 mov r0, r5 - 80078c0: bd38 pop {r3, r4, r5, pc} - 80078c2: f7ff ffb5 bl 8007830 <__errno> - 80078c6: 2221 movs r2, #33 @ 0x21 - 80078c8: 4603 mov r3, r0 - 80078ca: 2100 movs r1, #0 - 80078cc: 601a str r2, [r3, #0] - 80078ce: 4608 mov r0, r1 - 80078d0: f7f9 fad6 bl 8000e80 <__aeabi_fdiv> - 80078d4: 4605 mov r5, r0 - 80078d6: 4628 mov r0, r5 - 80078d8: bd38 pop {r3, r4, r5, pc} - 80078da: bf00 nop +080062a8 : + 80062a8: b538 push {r3, r4, r5, lr} + 80062aa: 4604 mov r4, r0 + 80062ac: f000 f81a bl 80062e4 <__ieee754_sqrtf> + 80062b0: 4621 mov r1, r4 + 80062b2: 4605 mov r5, r0 + 80062b4: 4620 mov r0, r4 + 80062b6: f7fa fdbb bl 8000e30 <__aeabi_fcmpun> + 80062ba: b920 cbnz r0, 80062c6 + 80062bc: 4620 mov r0, r4 + 80062be: 2100 movs r1, #0 + 80062c0: f7fa fd8e bl 8000de0 <__aeabi_fcmplt> + 80062c4: b908 cbnz r0, 80062ca + 80062c6: 4628 mov r0, r5 + 80062c8: bd38 pop {r3, r4, r5, pc} + 80062ca: f7ff ffb5 bl 8006238 <__errno> + 80062ce: 2221 movs r2, #33 @ 0x21 + 80062d0: 4603 mov r3, r0 + 80062d2: 2100 movs r1, #0 + 80062d4: 601a str r2, [r3, #0] + 80062d6: 4608 mov r0, r1 + 80062d8: f7fa fc98 bl 8000c0c <__aeabi_fdiv> + 80062dc: 4605 mov r5, r0 + 80062de: 4628 mov r0, r5 + 80062e0: bd38 pop {r3, r4, r5, pc} + 80062e2: bf00 nop -080078dc <__ieee754_sqrtf>: - 80078dc: f020 4200 bic.w r2, r0, #2147483648 @ 0x80000000 - 80078e0: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000 - 80078e4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 80078e8: 4604 mov r4, r0 - 80078ea: d24f bcs.n 800798c <__ieee754_sqrtf+0xb0> - 80078ec: 2a00 cmp r2, #0 - 80078ee: d04b beq.n 8007988 <__ieee754_sqrtf+0xac> - 80078f0: 2800 cmp r0, #0 - 80078f2: 4603 mov r3, r0 - 80078f4: db54 blt.n 80079a0 <__ieee754_sqrtf+0xc4> - 80078f6: f010 42ff ands.w r2, r0, #2139095040 @ 0x7f800000 - 80078fa: d14f bne.n 800799c <__ieee754_sqrtf+0xc0> - 80078fc: 005b lsls r3, r3, #1 - 80078fe: 0218 lsls r0, r3, #8 - 8007900: 4611 mov r1, r2 - 8007902: f102 0201 add.w r2, r2, #1 - 8007906: d5f9 bpl.n 80078fc <__ieee754_sqrtf+0x20> - 8007908: 4249 negs r1, r1 - 800790a: 2400 movs r4, #0 - 800790c: f3c3 0216 ubfx r2, r3, #0, #23 - 8007910: f1a1 057f sub.w r5, r1, #127 @ 0x7f - 8007914: 07cb lsls r3, r1, #31 - 8007916: f04f 0e19 mov.w lr, #25 - 800791a: f04f 7c80 mov.w ip, #16777216 @ 0x1000000 - 800791e: 4621 mov r1, r4 - 8007920: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 - 8007924: bf58 it pl - 8007926: 0052 lslpl r2, r2, #1 - 8007928: 106d asrs r5, r5, #1 - 800792a: 0052 lsls r2, r2, #1 - 800792c: eb01 030c add.w r3, r1, ip - 8007930: 4293 cmp r3, r2 - 8007932: bfcf iteee gt - 8007934: 4613 movgt r3, r2 - 8007936: eb03 010c addle.w r1, r3, ip - 800793a: 4464 addle r4, ip - 800793c: 1ad3 suble r3, r2, r3 - 800793e: f1be 0e01 subs.w lr, lr, #1 - 8007942: ea4f 0243 mov.w r2, r3, lsl #1 - 8007946: ea4f 0c5c mov.w ip, ip, lsr #1 - 800794a: d1ef bne.n 800792c <__ieee754_sqrtf+0x50> - 800794c: b1bb cbz r3, 800797e <__ieee754_sqrtf+0xa2> - 800794e: 4e1a ldr r6, [pc, #104] @ (80079b8 <__ieee754_sqrtf+0xdc>) - 8007950: 4f1a ldr r7, [pc, #104] @ (80079bc <__ieee754_sqrtf+0xe0>) - 8007952: 6830 ldr r0, [r6, #0] - 8007954: 6839 ldr r1, [r7, #0] - 8007956: f7f9 f8d5 bl 8000b04 <__aeabi_fsub> - 800795a: f8d6 8000 ldr.w r8, [r6] - 800795e: 4601 mov r1, r0 - 8007960: 4640 mov r0, r8 - 8007962: f7f9 fb81 bl 8001068 <__aeabi_fcmple> - 8007966: b150 cbz r0, 800797e <__ieee754_sqrtf+0xa2> - 8007968: 6830 ldr r0, [r6, #0] - 800796a: 6839 ldr r1, [r7, #0] - 800796c: f7f9 f8cc bl 8000b08 <__addsf3> - 8007970: 6836 ldr r6, [r6, #0] - 8007972: 4601 mov r1, r0 - 8007974: 4630 mov r0, r6 - 8007976: f7f9 fb6d bl 8001054 <__aeabi_fcmplt> - 800797a: b1c8 cbz r0, 80079b0 <__ieee754_sqrtf+0xd4> - 800797c: 3402 adds r4, #2 - 800797e: 1060 asrs r0, r4, #1 - 8007980: f100 507c add.w r0, r0, #1056964608 @ 0x3f000000 - 8007984: eb00 50c5 add.w r0, r0, r5, lsl #23 - 8007988: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 800798c: 4601 mov r1, r0 - 800798e: f7f9 f9c3 bl 8000d18 <__aeabi_fmul> - 8007992: 4621 mov r1, r4 - 8007994: f7f9 f8b8 bl 8000b08 <__addsf3> - 8007998: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 800799c: 15c1 asrs r1, r0, #23 - 800799e: e7b4 b.n 800790a <__ieee754_sqrtf+0x2e> - 80079a0: 4601 mov r1, r0 - 80079a2: f7f9 f8af bl 8000b04 <__aeabi_fsub> - 80079a6: 4601 mov r1, r0 - 80079a8: f7f9 fa6a bl 8000e80 <__aeabi_fdiv> - 80079ac: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 80079b0: 3401 adds r4, #1 - 80079b2: f024 0401 bic.w r4, r4, #1 - 80079b6: e7e2 b.n 800797e <__ieee754_sqrtf+0xa2> - 80079b8: 08007aa4 .word 0x08007aa4 - 80079bc: 08007aa0 .word 0x08007aa0 +080062e4 <__ieee754_sqrtf>: + 80062e4: f020 4200 bic.w r2, r0, #2147483648 @ 0x80000000 + 80062e8: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000 + 80062ec: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 80062f0: 4604 mov r4, r0 + 80062f2: d24f bcs.n 8006394 <__ieee754_sqrtf+0xb0> + 80062f4: 2a00 cmp r2, #0 + 80062f6: d04b beq.n 8006390 <__ieee754_sqrtf+0xac> + 80062f8: 2800 cmp r0, #0 + 80062fa: 4603 mov r3, r0 + 80062fc: db54 blt.n 80063a8 <__ieee754_sqrtf+0xc4> + 80062fe: f010 42ff ands.w r2, r0, #2139095040 @ 0x7f800000 + 8006302: d14f bne.n 80063a4 <__ieee754_sqrtf+0xc0> + 8006304: 005b lsls r3, r3, #1 + 8006306: 0218 lsls r0, r3, #8 + 8006308: 4611 mov r1, r2 + 800630a: f102 0201 add.w r2, r2, #1 + 800630e: d5f9 bpl.n 8006304 <__ieee754_sqrtf+0x20> + 8006310: 4249 negs r1, r1 + 8006312: 2400 movs r4, #0 + 8006314: f3c3 0216 ubfx r2, r3, #0, #23 + 8006318: f1a1 057f sub.w r5, r1, #127 @ 0x7f + 800631c: 07cb lsls r3, r1, #31 + 800631e: f04f 0e19 mov.w lr, #25 + 8006322: f04f 7c80 mov.w ip, #16777216 @ 0x1000000 + 8006326: 4621 mov r1, r4 + 8006328: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 + 800632c: bf58 it pl + 800632e: 0052 lslpl r2, r2, #1 + 8006330: 106d asrs r5, r5, #1 + 8006332: 0052 lsls r2, r2, #1 + 8006334: eb01 030c add.w r3, r1, ip + 8006338: 4293 cmp r3, r2 + 800633a: bfcf iteee gt + 800633c: 4613 movgt r3, r2 + 800633e: eb03 010c addle.w r1, r3, ip + 8006342: 4464 addle r4, ip + 8006344: 1ad3 suble r3, r2, r3 + 8006346: f1be 0e01 subs.w lr, lr, #1 + 800634a: ea4f 0243 mov.w r2, r3, lsl #1 + 800634e: ea4f 0c5c mov.w ip, ip, lsr #1 + 8006352: d1ef bne.n 8006334 <__ieee754_sqrtf+0x50> + 8006354: b1bb cbz r3, 8006386 <__ieee754_sqrtf+0xa2> + 8006356: 4e1a ldr r6, [pc, #104] @ (80063c0 <__ieee754_sqrtf+0xdc>) + 8006358: 4f1a ldr r7, [pc, #104] @ (80063c4 <__ieee754_sqrtf+0xe0>) + 800635a: 6830 ldr r0, [r6, #0] + 800635c: 6839 ldr r1, [r7, #0] + 800635e: f7fa fa97 bl 8000890 <__aeabi_fsub> + 8006362: f8d6 8000 ldr.w r8, [r6] + 8006366: 4601 mov r1, r0 + 8006368: 4640 mov r0, r8 + 800636a: f7fa fd43 bl 8000df4 <__aeabi_fcmple> + 800636e: b150 cbz r0, 8006386 <__ieee754_sqrtf+0xa2> + 8006370: 6830 ldr r0, [r6, #0] + 8006372: 6839 ldr r1, [r7, #0] + 8006374: f7fa fa8e bl 8000894 <__addsf3> + 8006378: 6836 ldr r6, [r6, #0] + 800637a: 4601 mov r1, r0 + 800637c: 4630 mov r0, r6 + 800637e: f7fa fd2f bl 8000de0 <__aeabi_fcmplt> + 8006382: b1c8 cbz r0, 80063b8 <__ieee754_sqrtf+0xd4> + 8006384: 3402 adds r4, #2 + 8006386: 1060 asrs r0, r4, #1 + 8006388: f100 507c add.w r0, r0, #1056964608 @ 0x3f000000 + 800638c: eb00 50c5 add.w r0, r0, r5, lsl #23 + 8006390: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006394: 4601 mov r1, r0 + 8006396: f7fa fb85 bl 8000aa4 <__aeabi_fmul> + 800639a: 4621 mov r1, r4 + 800639c: f7fa fa7a bl 8000894 <__addsf3> + 80063a0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 80063a4: 15c1 asrs r1, r0, #23 + 80063a6: e7b4 b.n 8006312 <__ieee754_sqrtf+0x2e> + 80063a8: 4601 mov r1, r0 + 80063aa: f7fa fa71 bl 8000890 <__aeabi_fsub> + 80063ae: 4601 mov r1, r0 + 80063b0: f7fa fc2c bl 8000c0c <__aeabi_fdiv> + 80063b4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 80063b8: 3401 adds r4, #1 + 80063ba: f024 0401 bic.w r4, r4, #1 + 80063be: e7e2 b.n 8006386 <__ieee754_sqrtf+0xa2> + 80063c0: 08006498 .word 0x08006498 + 80063c4: 08006494 .word 0x08006494 -080079c0 : - 80079c0: b508 push {r3, lr} - 80079c2: f3c0 53c7 ubfx r3, r0, #23, #8 - 80079c6: 3b7f subs r3, #127 @ 0x7f - 80079c8: 2b16 cmp r3, #22 - 80079ca: 4601 mov r1, r0 - 80079cc: dc0e bgt.n 80079ec - 80079ce: 2b00 cmp r3, #0 - 80079d0: 4602 mov r2, r0 - 80079d2: db10 blt.n 80079f6 - 80079d4: 480b ldr r0, [pc, #44] @ (8007a04 ) - 80079d6: 4118 asrs r0, r3 - 80079d8: 4201 tst r1, r0 - 80079da: d005 beq.n 80079e8 - 80079dc: f44f 0180 mov.w r1, #4194304 @ 0x400000 - 80079e0: 4119 asrs r1, r3 - 80079e2: 4411 add r1, r2 - 80079e4: ea21 0100 bic.w r1, r1, r0 - 80079e8: 4608 mov r0, r1 - 80079ea: bd08 pop {r3, pc} - 80079ec: 2b80 cmp r3, #128 @ 0x80 - 80079ee: d1fb bne.n 80079e8 - 80079f0: f7f9 f88a bl 8000b08 <__addsf3> - 80079f4: bd08 pop {r3, pc} - 80079f6: 3301 adds r3, #1 - 80079f8: f000 4100 and.w r1, r0, #2147483648 @ 0x80000000 - 80079fc: d1f4 bne.n 80079e8 - 80079fe: f041 517e orr.w r1, r1, #1065353216 @ 0x3f800000 - 8007a02: e7f1 b.n 80079e8 - 8007a04: 007fffff .word 0x007fffff +080063c8 : + 80063c8: b508 push {r3, lr} + 80063ca: f3c0 53c7 ubfx r3, r0, #23, #8 + 80063ce: 3b7f subs r3, #127 @ 0x7f + 80063d0: 2b16 cmp r3, #22 + 80063d2: 4601 mov r1, r0 + 80063d4: dc0e bgt.n 80063f4 + 80063d6: 2b00 cmp r3, #0 + 80063d8: 4602 mov r2, r0 + 80063da: db10 blt.n 80063fe + 80063dc: 480b ldr r0, [pc, #44] @ (800640c ) + 80063de: 4118 asrs r0, r3 + 80063e0: 4201 tst r1, r0 + 80063e2: d005 beq.n 80063f0 + 80063e4: f44f 0180 mov.w r1, #4194304 @ 0x400000 + 80063e8: 4119 asrs r1, r3 + 80063ea: 4411 add r1, r2 + 80063ec: ea21 0100 bic.w r1, r1, r0 + 80063f0: 4608 mov r0, r1 + 80063f2: bd08 pop {r3, pc} + 80063f4: 2b80 cmp r3, #128 @ 0x80 + 80063f6: d1fb bne.n 80063f0 + 80063f8: f7fa fa4c bl 8000894 <__addsf3> + 80063fc: bd08 pop {r3, pc} + 80063fe: 3301 adds r3, #1 + 8006400: f000 4100 and.w r1, r0, #2147483648 @ 0x80000000 + 8006404: d1f4 bne.n 80063f0 + 8006406: f041 517e orr.w r1, r1, #1065353216 @ 0x3f800000 + 800640a: e7f1 b.n 80063f0 + 800640c: 007fffff .word 0x007fffff -08007a08 <_init>: - 8007a08: b5f8 push {r3, r4, r5, r6, r7, lr} - 8007a0a: bf00 nop - 8007a0c: bcf8 pop {r3, r4, r5, r6, r7} - 8007a0e: bc08 pop {r3} - 8007a10: 469e mov lr, r3 - 8007a12: 4770 bx lr +08006410 <_init>: + 8006410: b5f8 push {r3, r4, r5, r6, r7, lr} + 8006412: bf00 nop + 8006414: bcf8 pop {r3, r4, r5, r6, r7} + 8006416: bc08 pop {r3} + 8006418: 469e mov lr, r3 + 800641a: 4770 bx lr -08007a14 <_fini>: - 8007a14: b5f8 push {r3, r4, r5, r6, r7, lr} - 8007a16: bf00 nop - 8007a18: bcf8 pop {r3, r4, r5, r6, r7} - 8007a1a: bc08 pop {r3} - 8007a1c: 469e mov lr, r3 - 8007a1e: 4770 bx lr +0800641c <_fini>: + 800641c: b5f8 push {r3, r4, r5, r6, r7, lr} + 800641e: bf00 nop + 8006420: bcf8 pop {r3, r4, r5, r6, r7} + 8006422: bc08 pop {r3} + 8006424: 469e mov lr, r3 + 8006426: 4770 bx lr diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.map b/Fertirrega_v6/Debug/Fertirrega_v6.map index 61da399..2497adb 100644 --- a/Fertirrega_v6/Debug/Fertirrega_v6.map +++ b/Fertirrega_v6/Debug/Fertirrega_v6.map @@ -29,7 +29,7 @@ C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externalt C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-lock.o) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) (__retarget_lock_init_recursive) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memcpy-stub.o) - ./Core/Src/flash_manager.o (memcpy) + ./Core/Src/ad5934_driver.o (memcpy) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) ./Core/Src/main.o (strlen) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-freer.o) @@ -54,14 +54,10 @@ C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externalt ./Core/Src/ad5934_driver.o (__aeabi_fmul) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o) ./Core/Src/main.o (__aeabi_dsub) -C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivdf3.o) - ./Core/Src/main.o (__aeabi_ddiv) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o) ./Core/Src/main.o (__aeabi_dcmplt) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o) ./Core/Src/main.o (__aeabi_d2iz) -C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_truncdfsf2.o) - ./Core/Src/main.o (__aeabi_d2f) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o) ./Core/Src/ad5934_driver.o (__aeabi_fsub) C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o) @@ -148,8 +144,6 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/ad5934_driver.o .group 0x00000000 0xc ./Core/Src/ad5934_driver.o .group 0x00000000 0xc ./Core/Src/ad5934_driver.o - .group 0x00000000 0xc ./Core/Src/ad5934_driver.o - .group 0x00000000 0xc ./Core/Src/ad5934_driver.o .text 0x00000000 0x0 ./Core/Src/ad5934_driver.o .data 0x00000000 0x0 ./Core/Src/ad5934_driver.o .bss 0x00000000 0x0 ./Core/Src/ad5934_driver.o @@ -157,7 +151,9 @@ Discarded input sections 0x00000000 0x20 ./Core/Src/ad5934_driver.o .text.AD5934_ReadRegister 0x00000000 0x9c ./Core/Src/ad5934_driver.o - .group 0x00000000 0xc ./Core/Src/adc.o + .rodata 0x00000000 0x60 ./Core/Src/ad5934_driver.o + .text.AD5934_Get_Target_Conductivity + 0x00000000 0x120 ./Core/Src/ad5934_driver.o .group 0x00000000 0xc ./Core/Src/adc.o .group 0x00000000 0xc ./Core/Src/adc.o .group 0x00000000 0xc ./Core/Src/adc.o @@ -201,9 +197,9 @@ Discarded input sections .data 0x00000000 0x0 ./Core/Src/adc.o .bss 0x00000000 0x0 ./Core/Src/adc.o .text.HAL_ADC_MspDeInit - 0x00000000 0x68 ./Core/Src/adc.o + 0x00000000 0x60 ./Core/Src/adc.o .debug_macro 0x00000000 0xacc ./Core/Src/adc.o - .debug_macro 0x00000000 0x22d ./Core/Src/adc.o + .debug_macro 0x00000000 0x221 ./Core/Src/adc.o .debug_macro 0x00000000 0x2e ./Core/Src/adc.o .debug_macro 0x00000000 0x22 ./Core/Src/adc.o .debug_macro 0x00000000 0x22 ./Core/Src/adc.o @@ -238,7 +234,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/adc.o .debug_macro 0x00000000 0x287 ./Core/Src/adc.o .debug_macro 0x00000000 0x140 ./Core/Src/adc.o - .debug_macro 0x00000000 0x8ed ./Core/Src/adc.o .debug_macro 0x00000000 0x28e ./Core/Src/adc.o .debug_macro 0x00000000 0x83 ./Core/Src/adc.o .group 0x00000000 0xc ./Core/Src/ads1015_driver.o @@ -298,8 +293,6 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/ads1015_driver.o .group 0x00000000 0xc ./Core/Src/ads1015_driver.o .group 0x00000000 0xc ./Core/Src/ads1015_driver.o - .group 0x00000000 0xc ./Core/Src/ads1015_driver.o - .group 0x00000000 0xc ./Core/Src/ads1015_driver.o .text 0x00000000 0x0 ./Core/Src/ads1015_driver.o .data 0x00000000 0x0 ./Core/Src/ads1015_driver.o .bss 0x00000000 0x0 ./Core/Src/ads1015_driver.o @@ -315,6 +308,11 @@ Discarded input sections 0x00000000 0x90 ./Core/Src/ads1015_driver.o .text.ADSgetLastConversionResults 0x00000000 0x56 ./Core/Src/ads1015_driver.o + .text.ADSCalculate_ph_Compensated + 0x00000000 0x114 ./Core/Src/ads1015_driver.o + .rodata 0x00000000 0x90 ./Core/Src/ads1015_driver.o + .text.ADSinterpolate_ph + 0x00000000 0x158 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0xacc ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x8e ./Core/Src/ads1015_driver.o @@ -322,7 +320,7 @@ Discarded input sections .debug_macro 0x00000000 0x103 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x6a ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x1df ./Core/Src/ads1015_driver.o - .debug_macro 0x00000000 0x22d ./Core/Src/ads1015_driver.o + .debug_macro 0x00000000 0x221 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x2e ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x1c ./Core/Src/ads1015_driver.o @@ -351,10 +349,9 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x287 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x140 ./Core/Src/ads1015_driver.o - .debug_macro 0x00000000 0x8ed ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x28e ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x83 ./Core/Src/ads1015_driver.o - .debug_macro 0x00000000 0x1c7 ./Core/Src/ads1015_driver.o + .debug_macro 0x00000000 0x1c1 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x10 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x61 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x24 ./Core/Src/ads1015_driver.o @@ -372,8 +369,6 @@ Discarded input sections .debug_macro 0x00000000 0x10 ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x3c ./Core/Src/ads1015_driver.o .debug_macro 0x00000000 0x20 ./Core/Src/ads1015_driver.o - .debug_macro 0x00000000 0x10 ./Core/Src/ads1015_driver.o - .group 0x00000000 0xc ./Core/Src/analog_loop_driver.o .group 0x00000000 0xc ./Core/Src/analog_loop_driver.o .group 0x00000000 0xc ./Core/Src/analog_loop_driver.o .group 0x00000000 0xc ./Core/Src/analog_loop_driver.o @@ -439,9 +434,9 @@ Discarded input sections 0x00000000 0x40 ./Core/Src/analog_loop_driver.o .debug_rnglists 0x00000000 0x2c ./Core/Src/analog_loop_driver.o - .debug_macro 0x00000000 0x1d0 ./Core/Src/analog_loop_driver.o + .debug_macro 0x00000000 0x1bb ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0xacc ./Core/Src/analog_loop_driver.o - .debug_macro 0x00000000 0x22d ./Core/Src/analog_loop_driver.o + .debug_macro 0x00000000 0x221 ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x2e ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/analog_loop_driver.o @@ -476,12 +471,11 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x287 ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x140 ./Core/Src/analog_loop_driver.o - .debug_macro 0x00000000 0x8ed ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x28e ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x83 ./Core/Src/analog_loop_driver.o .debug_macro 0x00000000 0x34 ./Core/Src/analog_loop_driver.o - .debug_line 0x00000000 0x814 ./Core/Src/analog_loop_driver.o - .debug_str 0x00000000 0x89f28 ./Core/Src/analog_loop_driver.o + .debug_line 0x00000000 0x7e3 ./Core/Src/analog_loop_driver.o + .debug_str 0x00000000 0x831df ./Core/Src/analog_loop_driver.o .comment 0x00000000 0x44 ./Core/Src/analog_loop_driver.o .debug_frame 0x00000000 0xbc ./Core/Src/analog_loop_driver.o .ARM.attributes @@ -525,7 +519,6 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/digital_outputs_driver.o .group 0x00000000 0xc ./Core/Src/digital_outputs_driver.o .group 0x00000000 0xc ./Core/Src/digital_outputs_driver.o - .group 0x00000000 0xc ./Core/Src/digital_outputs_driver.o .text 0x00000000 0x0 ./Core/Src/digital_outputs_driver.o .data 0x00000000 0x0 ./Core/Src/digital_outputs_driver.o .bss 0x00000000 0x0 ./Core/Src/digital_outputs_driver.o @@ -538,7 +531,7 @@ Discarded input sections .text.digital_outputs_reset_all 0x00000000 0x2e ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0xacc ./Core/Src/digital_outputs_driver.o - .debug_macro 0x00000000 0x22d ./Core/Src/digital_outputs_driver.o + .debug_macro 0x00000000 0x221 ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x2e ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/digital_outputs_driver.o @@ -573,95 +566,9 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x287 ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x140 ./Core/Src/digital_outputs_driver.o - .debug_macro 0x00000000 0x8ed ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x28e ./Core/Src/digital_outputs_driver.o .debug_macro 0x00000000 0x83 ./Core/Src/digital_outputs_driver.o - .debug_macro 0x00000000 0x1c7 ./Core/Src/digital_outputs_driver.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/dma.o - .text 0x00000000 0x0 ./Core/Src/dma.o - .data 0x00000000 0x0 ./Core/Src/dma.o - .bss 0x00000000 0x0 ./Core/Src/dma.o - .debug_macro 0x00000000 0xacc ./Core/Src/dma.o - .debug_macro 0x00000000 0x22d ./Core/Src/dma.o - .debug_macro 0x00000000 0x2e ./Core/Src/dma.o - .debug_macro 0x00000000 0x22 ./Core/Src/dma.o - .debug_macro 0x00000000 0x22 ./Core/Src/dma.o - .debug_macro 0x00000000 0x8e ./Core/Src/dma.o - .debug_macro 0x00000000 0x51 ./Core/Src/dma.o - .debug_macro 0x00000000 0x103 ./Core/Src/dma.o - .debug_macro 0x00000000 0x6a ./Core/Src/dma.o - .debug_macro 0x00000000 0x1df ./Core/Src/dma.o - .debug_macro 0x00000000 0x1c ./Core/Src/dma.o - .debug_macro 0x00000000 0x22 ./Core/Src/dma.o - .debug_macro 0x00000000 0xbd ./Core/Src/dma.o - .debug_macro 0x00000000 0xd23 ./Core/Src/dma.o - .debug_macro 0x00000000 0xe09e ./Core/Src/dma.o - .debug_macro 0x00000000 0x6d ./Core/Src/dma.o - .debug_macro 0x00000000 0x34a2 ./Core/Src/dma.o - .debug_macro 0x00000000 0x190 ./Core/Src/dma.o - .debug_macro 0x00000000 0x5c ./Core/Src/dma.o - .debug_macro 0x00000000 0x5bc ./Core/Src/dma.o - .debug_macro 0x00000000 0x289 ./Core/Src/dma.o - .debug_macro 0x00000000 0x1cb ./Core/Src/dma.o - .debug_macro 0x00000000 0x114 ./Core/Src/dma.o - .debug_macro 0x00000000 0x1b2 ./Core/Src/dma.o - .debug_macro 0x00000000 0x27 ./Core/Src/dma.o - .debug_macro 0x00000000 0x136 ./Core/Src/dma.o - .debug_macro 0x00000000 0x1bc ./Core/Src/dma.o - .debug_macro 0x00000000 0x34 ./Core/Src/dma.o - .debug_macro 0x00000000 0x3c ./Core/Src/dma.o - .debug_macro 0x00000000 0x57 ./Core/Src/dma.o - .debug_macro 0x00000000 0x46a ./Core/Src/dma.o - .debug_macro 0x00000000 0x1b5 ./Core/Src/dma.o - .debug_macro 0x00000000 0x87 ./Core/Src/dma.o - .debug_macro 0x00000000 0x240 ./Core/Src/dma.o - .debug_macro 0x00000000 0x287 ./Core/Src/dma.o - .debug_macro 0x00000000 0x140 ./Core/Src/dma.o - .debug_macro 0x00000000 0x8ed ./Core/Src/dma.o - .debug_macro 0x00000000 0x28e ./Core/Src/dma.o - .debug_macro 0x00000000 0x83 ./Core/Src/dma.o - .debug_macro 0x00000000 0x1c7 ./Core/Src/dma.o - .group 0x00000000 0xc ./Core/Src/flash_manager.o - .group 0x00000000 0xc ./Core/Src/flash_manager.o + .debug_macro 0x00000000 0x1c1 ./Core/Src/digital_outputs_driver.o .group 0x00000000 0xc ./Core/Src/flash_manager.o .group 0x00000000 0xc ./Core/Src/flash_manager.o .group 0x00000000 0xc ./Core/Src/flash_manager.o @@ -722,7 +629,7 @@ Discarded input sections .bss 0x00000000 0x0 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0xacc ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x10 ./Core/Src/flash_manager.o - .debug_macro 0x00000000 0x22d ./Core/Src/flash_manager.o + .debug_macro 0x00000000 0x221 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x2e ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x22 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x22 ./Core/Src/flash_manager.o @@ -757,7 +664,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x287 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x140 ./Core/Src/flash_manager.o - .debug_macro 0x00000000 0x8ed ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x28e ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x83 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x61 ./Core/Src/flash_manager.o @@ -776,8 +682,6 @@ Discarded input sections .debug_macro 0x00000000 0x10 ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x3c ./Core/Src/flash_manager.o .debug_macro 0x00000000 0x20 ./Core/Src/flash_manager.o - .debug_macro 0x00000000 0x10 ./Core/Src/flash_manager.o - .group 0x00000000 0xc ./Core/Src/gpio.o .group 0x00000000 0xc ./Core/Src/gpio.o .group 0x00000000 0xc ./Core/Src/gpio.o .group 0x00000000 0xc ./Core/Src/gpio.o @@ -821,8 +725,20 @@ Discarded input sections .text 0x00000000 0x0 ./Core/Src/gpio.o .data 0x00000000 0x0 ./Core/Src/gpio.o .bss 0x00000000 0x0 ./Core/Src/gpio.o + .bss.last_interrupt_time + 0x00000000 0x4 ./Core/Src/gpio.o + .data.first_time_state + 0x00000000 0x1 ./Core/Src/gpio.o + .bss.original_pin_state + 0x00000000 0x1 ./Core/Src/gpio.o + .data.last_original_pin + 0x00000000 0x1 ./Core/Src/gpio.o + .bss.edge_state + 0x00000000 0x1 ./Core/Src/gpio.o + .text.HAL_GPIO_EXTI_Callback + 0x00000000 0x14 ./Core/Src/gpio.o .debug_macro 0x00000000 0xacc ./Core/Src/gpio.o - .debug_macro 0x00000000 0x22d ./Core/Src/gpio.o + .debug_macro 0x00000000 0x221 ./Core/Src/gpio.o .debug_macro 0x00000000 0x2e ./Core/Src/gpio.o .debug_macro 0x00000000 0x22 ./Core/Src/gpio.o .debug_macro 0x00000000 0x22 ./Core/Src/gpio.o @@ -857,11 +773,9 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/gpio.o .debug_macro 0x00000000 0x287 ./Core/Src/gpio.o .debug_macro 0x00000000 0x140 ./Core/Src/gpio.o - .debug_macro 0x00000000 0x8ed ./Core/Src/gpio.o .debug_macro 0x00000000 0x28e ./Core/Src/gpio.o .debug_macro 0x00000000 0x83 ./Core/Src/gpio.o - .debug_macro 0x00000000 0x1c7 ./Core/Src/gpio.o - .group 0x00000000 0xc ./Core/Src/i2c.o + .debug_macro 0x00000000 0x1c1 ./Core/Src/gpio.o .group 0x00000000 0xc ./Core/Src/i2c.o .group 0x00000000 0xc ./Core/Src/i2c.o .group 0x00000000 0xc ./Core/Src/i2c.o @@ -907,7 +821,7 @@ Discarded input sections .text.HAL_I2C_MspDeInit 0x00000000 0x74 ./Core/Src/i2c.o .debug_macro 0x00000000 0xacc ./Core/Src/i2c.o - .debug_macro 0x00000000 0x22d ./Core/Src/i2c.o + .debug_macro 0x00000000 0x221 ./Core/Src/i2c.o .debug_macro 0x00000000 0x2e ./Core/Src/i2c.o .debug_macro 0x00000000 0x22 ./Core/Src/i2c.o .debug_macro 0x00000000 0x22 ./Core/Src/i2c.o @@ -942,12 +856,9 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/i2c.o .debug_macro 0x00000000 0x287 ./Core/Src/i2c.o .debug_macro 0x00000000 0x140 ./Core/Src/i2c.o - .debug_macro 0x00000000 0x8ed ./Core/Src/i2c.o .debug_macro 0x00000000 0x28e ./Core/Src/i2c.o .debug_macro 0x00000000 0x83 ./Core/Src/i2c.o - .debug_macro 0x00000000 0x1c7 ./Core/Src/i2c.o - .group 0x00000000 0xc ./Core/Src/main.o - .group 0x00000000 0xc ./Core/Src/main.o + .debug_macro 0x00000000 0x1c1 ./Core/Src/i2c.o .group 0x00000000 0xc ./Core/Src/main.o .group 0x00000000 0xc ./Core/Src/main.o .group 0x00000000 0xc ./Core/Src/main.o @@ -1036,10 +947,20 @@ Discarded input sections .data.minus 0x00000000 0x2 ./Core/Src/main.o .bss.rs485_address 0x00000000 0x1 ./Core/Src/main.o + .bss.AD_RES 0x00000000 0x4 ./Core/Src/main.o + .bss.UpdateEvent + 0x00000000 0x1 ./Core/Src/main.o + .bss.Temperature + 0x00000000 0x4 ./Core/Src/main.o + .bss.Temp_Sum 0x00000000 0x4 ./Core/Src/main.o + .bss.V_Sense 0x00000000 0x4 ./Core/Src/main.o + .bss.V_Ref 0x00000000 0x4 ./Core/Src/main.o + .bss.Temp_Samples + 0x00000000 0x10 ./Core/Src/main.o .text.intToStr 0x00000000 0xd8 ./Core/Src/main.o .debug_macro 0x00000000 0xacc ./Core/Src/main.o - .debug_macro 0x00000000 0x22d ./Core/Src/main.o + .debug_macro 0x00000000 0x221 ./Core/Src/main.o .debug_macro 0x00000000 0x2e ./Core/Src/main.o .debug_macro 0x00000000 0x22 ./Core/Src/main.o .debug_macro 0x00000000 0x22 ./Core/Src/main.o @@ -1074,10 +995,9 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/main.o .debug_macro 0x00000000 0x287 ./Core/Src/main.o .debug_macro 0x00000000 0x140 ./Core/Src/main.o - .debug_macro 0x00000000 0x8ed ./Core/Src/main.o .debug_macro 0x00000000 0x28e ./Core/Src/main.o .debug_macro 0x00000000 0x83 ./Core/Src/main.o - .debug_macro 0x00000000 0x1c7 ./Core/Src/main.o + .debug_macro 0x00000000 0x1c1 ./Core/Src/main.o .debug_macro 0x00000000 0x10 ./Core/Src/main.o .debug_macro 0x00000000 0x61 ./Core/Src/main.o .debug_macro 0x00000000 0x24 ./Core/Src/main.o @@ -1095,8 +1015,7 @@ Discarded input sections .debug_macro 0x00000000 0x10 ./Core/Src/main.o .debug_macro 0x00000000 0x3c ./Core/Src/main.o .debug_macro 0x00000000 0x20 ./Core/Src/main.o - .debug_macro 0x00000000 0x10 ./Core/Src/main.o - .debug_macro 0x00000000 0x16e ./Core/Src/main.o + .debug_macro 0x00000000 0x198 ./Core/Src/main.o .debug_macro 0x00000000 0x19b ./Core/Src/main.o .debug_macro 0x00000000 0x16 ./Core/Src/main.o .debug_macro 0x00000000 0x16 ./Core/Src/main.o @@ -1142,7 +1061,6 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/rs485_driver.o .group 0x00000000 0xc ./Core/Src/rs485_driver.o .group 0x00000000 0xc ./Core/Src/rs485_driver.o - .group 0x00000000 0xc ./Core/Src/rs485_driver.o .text 0x00000000 0x0 ./Core/Src/rs485_driver.o .data 0x00000000 0x0 ./Core/Src/rs485_driver.o .bss 0x00000000 0x0 ./Core/Src/rs485_driver.o @@ -1157,7 +1075,7 @@ Discarded input sections .debug_macro 0x00000000 0x103 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x6a ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x1df ./Core/Src/rs485_driver.o - .debug_macro 0x00000000 0x22d ./Core/Src/rs485_driver.o + .debug_macro 0x00000000 0x221 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x2e ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x22 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x1c ./Core/Src/rs485_driver.o @@ -1186,7 +1104,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x287 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x140 ./Core/Src/rs485_driver.o - .debug_macro 0x00000000 0x8ed ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x28e ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x83 ./Core/Src/rs485_driver.o .debug_macro 0x00000000 0x229 ./Core/Src/rs485_driver.o @@ -1230,12 +1147,11 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/stm32f1xx_hal_msp.o .group 0x00000000 0xc ./Core/Src/stm32f1xx_hal_msp.o .group 0x00000000 0xc ./Core/Src/stm32f1xx_hal_msp.o - .group 0x00000000 0xc ./Core/Src/stm32f1xx_hal_msp.o .text 0x00000000 0x0 ./Core/Src/stm32f1xx_hal_msp.o .data 0x00000000 0x0 ./Core/Src/stm32f1xx_hal_msp.o .bss 0x00000000 0x0 ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0xacc ./Core/Src/stm32f1xx_hal_msp.o - .debug_macro 0x00000000 0x22d ./Core/Src/stm32f1xx_hal_msp.o + .debug_macro 0x00000000 0x221 ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x2e ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x22 ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x22 ./Core/Src/stm32f1xx_hal_msp.o @@ -1270,11 +1186,9 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x287 ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x140 ./Core/Src/stm32f1xx_hal_msp.o - .debug_macro 0x00000000 0x8ed ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x28e ./Core/Src/stm32f1xx_hal_msp.o .debug_macro 0x00000000 0x83 ./Core/Src/stm32f1xx_hal_msp.o - .debug_macro 0x00000000 0x1c7 ./Core/Src/stm32f1xx_hal_msp.o - .group 0x00000000 0xc ./Core/Src/stm32f1xx_it.o + .debug_macro 0x00000000 0x1c1 ./Core/Src/stm32f1xx_hal_msp.o .group 0x00000000 0xc ./Core/Src/stm32f1xx_it.o .group 0x00000000 0xc ./Core/Src/stm32f1xx_it.o .group 0x00000000 0xc ./Core/Src/stm32f1xx_it.o @@ -1318,7 +1232,7 @@ Discarded input sections .data 0x00000000 0x0 ./Core/Src/stm32f1xx_it.o .bss 0x00000000 0x0 ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0xacc ./Core/Src/stm32f1xx_it.o - .debug_macro 0x00000000 0x22d ./Core/Src/stm32f1xx_it.o + .debug_macro 0x00000000 0x221 ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x2e ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x22 ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x22 ./Core/Src/stm32f1xx_it.o @@ -1353,10 +1267,9 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x287 ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x140 ./Core/Src/stm32f1xx_it.o - .debug_macro 0x00000000 0x8ed ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x28e ./Core/Src/stm32f1xx_it.o .debug_macro 0x00000000 0x83 ./Core/Src/stm32f1xx_it.o - .debug_macro 0x00000000 0x1c7 ./Core/Src/stm32f1xx_it.o + .debug_macro 0x00000000 0x1c1 ./Core/Src/stm32f1xx_it.o .group 0x00000000 0xc ./Core/Src/syscalls.o .group 0x00000000 0xc ./Core/Src/syscalls.o .group 0x00000000 0xc ./Core/Src/syscalls.o @@ -1595,7 +1508,6 @@ Discarded input sections .group 0x00000000 0xc ./Core/Src/system_stm32f1xx.o .group 0x00000000 0xc ./Core/Src/system_stm32f1xx.o .group 0x00000000 0xc ./Core/Src/system_stm32f1xx.o - .group 0x00000000 0xc ./Core/Src/system_stm32f1xx.o .text 0x00000000 0x0 ./Core/Src/system_stm32f1xx.o .data 0x00000000 0x0 ./Core/Src/system_stm32f1xx.o .bss 0x00000000 0x0 ./Core/Src/system_stm32f1xx.o @@ -1616,7 +1528,7 @@ Discarded input sections .debug_macro 0x00000000 0xd23 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0xe09e ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x6d ./Core/Src/system_stm32f1xx.o - .debug_macro 0x00000000 0x22d ./Core/Src/system_stm32f1xx.o + .debug_macro 0x00000000 0x221 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x34a2 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x190 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x5c ./Core/Src/system_stm32f1xx.o @@ -1637,95 +1549,8 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x287 ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x140 ./Core/Src/system_stm32f1xx.o - .debug_macro 0x00000000 0x8ed ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x28e ./Core/Src/system_stm32f1xx.o .debug_macro 0x00000000 0x83 ./Core/Src/system_stm32f1xx.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/tim.o - .text 0x00000000 0x0 ./Core/Src/tim.o - .data 0x00000000 0x0 ./Core/Src/tim.o - .bss 0x00000000 0x0 ./Core/Src/tim.o - .text.HAL_TIM_Base_MspDeInit - 0x00000000 0x30 ./Core/Src/tim.o - .debug_macro 0x00000000 0xacc ./Core/Src/tim.o - .debug_macro 0x00000000 0x22d ./Core/Src/tim.o - .debug_macro 0x00000000 0x2e ./Core/Src/tim.o - .debug_macro 0x00000000 0x22 ./Core/Src/tim.o - .debug_macro 0x00000000 0x22 ./Core/Src/tim.o - .debug_macro 0x00000000 0x8e ./Core/Src/tim.o - .debug_macro 0x00000000 0x51 ./Core/Src/tim.o - .debug_macro 0x00000000 0x103 ./Core/Src/tim.o - .debug_macro 0x00000000 0x6a ./Core/Src/tim.o - .debug_macro 0x00000000 0x1df ./Core/Src/tim.o - .debug_macro 0x00000000 0x1c ./Core/Src/tim.o - .debug_macro 0x00000000 0x22 ./Core/Src/tim.o - .debug_macro 0x00000000 0xbd ./Core/Src/tim.o - .debug_macro 0x00000000 0xd23 ./Core/Src/tim.o - .debug_macro 0x00000000 0xe09e ./Core/Src/tim.o - .debug_macro 0x00000000 0x6d ./Core/Src/tim.o - .debug_macro 0x00000000 0x34a2 ./Core/Src/tim.o - .debug_macro 0x00000000 0x190 ./Core/Src/tim.o - .debug_macro 0x00000000 0x5c ./Core/Src/tim.o - .debug_macro 0x00000000 0x5bc ./Core/Src/tim.o - .debug_macro 0x00000000 0x289 ./Core/Src/tim.o - .debug_macro 0x00000000 0x1cb ./Core/Src/tim.o - .debug_macro 0x00000000 0x114 ./Core/Src/tim.o - .debug_macro 0x00000000 0x1b2 ./Core/Src/tim.o - .debug_macro 0x00000000 0x27 ./Core/Src/tim.o - .debug_macro 0x00000000 0x136 ./Core/Src/tim.o - .debug_macro 0x00000000 0x1bc ./Core/Src/tim.o - .debug_macro 0x00000000 0x34 ./Core/Src/tim.o - .debug_macro 0x00000000 0x3c ./Core/Src/tim.o - .debug_macro 0x00000000 0x57 ./Core/Src/tim.o - .debug_macro 0x00000000 0x46a ./Core/Src/tim.o - .debug_macro 0x00000000 0x1b5 ./Core/Src/tim.o - .debug_macro 0x00000000 0x87 ./Core/Src/tim.o - .debug_macro 0x00000000 0x240 ./Core/Src/tim.o - .debug_macro 0x00000000 0x287 ./Core/Src/tim.o - .debug_macro 0x00000000 0x140 ./Core/Src/tim.o - .debug_macro 0x00000000 0x8ed ./Core/Src/tim.o - .debug_macro 0x00000000 0x28e ./Core/Src/tim.o - .debug_macro 0x00000000 0x83 ./Core/Src/tim.o - .debug_macro 0x00000000 0x1c7 ./Core/Src/tim.o - .group 0x00000000 0xc ./Core/Src/usart.o .group 0x00000000 0xc ./Core/Src/usart.o .group 0x00000000 0xc ./Core/Src/usart.o .group 0x00000000 0xc ./Core/Src/usart.o @@ -1771,7 +1596,7 @@ Discarded input sections .text.HAL_UART_MspDeInit 0x00000000 0x44 ./Core/Src/usart.o .debug_macro 0x00000000 0xacc ./Core/Src/usart.o - .debug_macro 0x00000000 0x22d ./Core/Src/usart.o + .debug_macro 0x00000000 0x221 ./Core/Src/usart.o .debug_macro 0x00000000 0x2e ./Core/Src/usart.o .debug_macro 0x00000000 0x22 ./Core/Src/usart.o .debug_macro 0x00000000 0x22 ./Core/Src/usart.o @@ -1806,10 +1631,9 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Core/Src/usart.o .debug_macro 0x00000000 0x287 ./Core/Src/usart.o .debug_macro 0x00000000 0x140 ./Core/Src/usart.o - .debug_macro 0x00000000 0x8ed ./Core/Src/usart.o .debug_macro 0x00000000 0x28e ./Core/Src/usart.o .debug_macro 0x00000000 0x83 ./Core/Src/usart.o - .debug_macro 0x00000000 0x1c7 ./Core/Src/usart.o + .debug_macro 0x00000000 0x1c1 ./Core/Src/usart.o .text 0x00000000 0x14 ./Core/Startup/startup_stm32f103c8tx.o .data 0x00000000 0x0 ./Core/Startup/startup_stm32f103c8tx.o .bss 0x00000000 0x0 ./Core/Startup/startup_stm32f103c8tx.o @@ -1851,7 +1675,6 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o @@ -1896,7 +1719,7 @@ Discarded input sections .text.HAL_DBGMCU_DisableDBGStandbyMode 0x00000000 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o @@ -1931,7 +1754,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o @@ -1972,7 +1794,6 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o @@ -1994,6 +1815,8 @@ Discarded input sections 0x00000000 0x16c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .text.HAL_ADC_Stop_IT 0x00000000 0x68 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .text.HAL_ADC_Start_DMA + 0x00000000 0x1bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .text.HAL_ADC_Stop_DMA 0x00000000 0x98 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .text.HAL_ADC_GetValue @@ -2002,16 +1825,28 @@ Discarded input sections 0x00000000 0x17e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .text.HAL_ADC_ConvCpltCallback 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .text.HAL_ADC_ConvHalfCpltCallback + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .text.HAL_ADC_LevelOutOfWindowCallback 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .text.HAL_ADC_ErrorCallback + 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .text.HAL_ADC_AnalogWDGConfig 0x00000000 0xac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .text.HAL_ADC_GetState 0x00000000 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .text.HAL_ADC_GetError 0x00000000 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .text.ADC_Enable + 0x00000000 0xb4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .text.ADC_DMAConvCplt + 0x00000000 0x7c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .text.ADC_DMAHalfConvCplt + 0x00000000 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .text.ADC_DMAError + 0x00000000 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o @@ -2046,7 +1881,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o @@ -2087,10 +1921,11 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .text.HAL_ADCEx_Calibration_Start + 0x00000000 0x15c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .text.HAL_ADCEx_InjectedStart 0x00000000 0x10c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .text.HAL_ADCEx_InjectedStop @@ -2115,8 +1950,15 @@ Discarded input sections 0x00000000 0x334 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .text.HAL_ADCEx_MultiModeConfigChannel 0x00000000 0xa4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_info 0x00000000 0xa10 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_abbrev 0x00000000 0x249 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_aranges + 0x00000000 0x80 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_rnglists + 0x00000000 0x65 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_macro 0x00000000 0x1be ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o @@ -2151,10 +1993,14 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_line 0x00000000 0xd0e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_str 0x00000000 0x833e4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .comment 0x00000000 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .debug_frame 0x00000000 0x1f4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o + .ARM.attributes + 0x00000000 0x2d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o @@ -2235,7 +2081,7 @@ Discarded input sections .text.HAL_SYSTICK_Callback 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o @@ -2270,7 +2116,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o @@ -2311,16 +2156,21 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .text.HAL_DMA_Init + 0x00000000 0xb4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .text.HAL_DMA_DeInit 0x00000000 0xb8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .text.HAL_DMA_Start 0x00000000 0x86 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .text.HAL_DMA_Start_IT + 0x00000000 0xc0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .text.HAL_DMA_PollForTransfer 0x00000000 0x324 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .text.HAL_DMA_IRQHandler + 0x00000000 0x20c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .text.HAL_DMA_RegisterCallback 0x00000000 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .text.HAL_DMA_UnRegisterCallback @@ -2329,8 +2179,10 @@ Discarded input sections 0x00000000 0x1a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .text.HAL_DMA_GetError 0x00000000 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .text.DMA_SetConfig + 0x00000000 0x5a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o @@ -2365,7 +2217,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o @@ -2406,7 +2257,6 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o @@ -2434,9 +2284,9 @@ Discarded input sections 0x00000000 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_rnglists 0x00000000 0x46 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o - .debug_macro 0x00000000 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o + .debug_macro 0x00000000 0x1ac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o @@ -2471,11 +2321,10 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o - .debug_line 0x00000000 0xa42 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o - .debug_str 0x00000000 0x89bfb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o + .debug_line 0x00000000 0xa11 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o + .debug_str 0x00000000 0x82eb2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .comment 0x00000000 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .debug_frame 0x00000000 0x154 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.o .ARM.attributes @@ -2518,7 +2367,6 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o @@ -2539,7 +2387,7 @@ Discarded input sections .text.HAL_FLASH_GetError 0x00000000 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o @@ -2574,7 +2422,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o @@ -2615,7 +2462,6 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o @@ -2646,7 +2492,7 @@ Discarded input sections .text.FLASH_OB_GetUser 0x00000000 0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o @@ -2681,7 +2527,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o @@ -2722,20 +2567,19 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .text.HAL_GPIO_DeInit 0x00000000 0x178 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .text.HAL_GPIO_TogglePin - 0x00000000 0x32 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .text.HAL_GPIO_LockPin 0x00000000 0x4e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .text.HAL_GPIO_EXTI_IRQHandler + 0x00000000 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .text.HAL_GPIO_EXTI_Callback 0x00000000 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o @@ -2770,7 +2614,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o @@ -2811,7 +2654,6 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o @@ -2827,9 +2669,9 @@ Discarded input sections 0x00000000 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_rnglists 0x00000000 0x1f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o - .debug_macro 0x00000000 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o + .debug_macro 0x00000000 0x1ac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o @@ -2864,11 +2706,10 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o - .debug_line 0x00000000 0x78a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o - .debug_str 0x00000000 0x89a7c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o + .debug_line 0x00000000 0x759 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o + .debug_str 0x00000000 0x82d33 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .comment 0x00000000 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .debug_frame 0x00000000 0x6c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.o .ARM.attributes @@ -2911,7 +2752,6 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o @@ -3058,7 +2898,7 @@ Discarded input sections .text.I2C_ConvertOtherXferOptions 0x00000000 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o @@ -3093,7 +2933,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o @@ -3134,7 +2973,6 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o @@ -3180,9 +3018,9 @@ Discarded input sections 0x00000000 0xa8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_rnglists 0x00000000 0x7a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o - .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o + .debug_macro 0x00000000 0x20c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o @@ -3217,11 +3055,10 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o - .debug_line 0x00000000 0x99c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o - .debug_str 0x00000000 0x89fb0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o + .debug_line 0x00000000 0x96b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o + .debug_str 0x00000000 0x83267 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .comment 0x00000000 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .debug_frame 0x00000000 0x230 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o .ARM.attributes @@ -3264,7 +3101,6 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o @@ -3285,7 +3121,7 @@ Discarded input sections .text.HAL_RCC_CSSCallback 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o @@ -3320,7 +3156,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o @@ -3361,14 +3196,19 @@ Discarded input sections .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .text.HAL_RCCEx_GetPeriphCLKConfig 0x00000000 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .text.HAL_RCCEx_GetPeriphCLKFreq + 0x00000000 0x16c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .rodata.aPLLMULFactorTable.1 + 0x00000000 0x10 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .rodata.aPredivFactorTable.0 + 0x00000000 0x2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o @@ -3403,476 +3243,8 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_Base_DeInit - 0x00000000 0xa8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_Base_MspInit - 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_Base_MspDeInit - 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_Base_Stop - 0x00000000 0x4c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_Base_Start_IT - 0x00000000 0xa4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_Base_Stop_IT - 0x00000000 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_Base_Start_DMA - 0x00000000 0x10c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_Base_Stop_DMA - 0x00000000 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_OC_Init - 0x00000000 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_OC_DeInit - 0x00000000 0xa8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_OC_MspInit - 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_OC_MspDeInit - 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_OC_Start - 0x00000000 0x144 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_OC_Stop - 0x00000000 0xc8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .text.HAL_TIM_OC_Start_IT - 0x00000000 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0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .data 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .bss 0x00000000 0x0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Init - 0x00000000 0x152 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_DeInit - 0x00000000 0x88 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_MspInit - 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_MspDeInit - 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Start - 0x00000000 0xe4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Stop - 0x00000000 0x70 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Start_IT - 0x00000000 0xf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Stop_IT - 0x00000000 0x80 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Start_DMA - 0x00000000 0x134 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_Stop_DMA - 0x00000000 0x7a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Start - 0x00000000 0x13c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Stop - 0x00000000 0xba ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Start_IT - 0x00000000 0x1ac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Stop_IT - 0x00000000 0x13e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Start_DMA - 0x00000000 0x2c8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_OCN_Stop_DMA - 0x00000000 0x138 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_PWMN_Start - 0x00000000 0x13c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_PWMN_Stop - 0x00000000 0xba ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_PWMN_Start_IT - 0x00000000 0x1ac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_PWMN_Stop_IT - 0x00000000 0x13e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_PWMN_Start_DMA - 0x00000000 0x2c8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_PWMN_Stop_DMA - 0x00000000 0x138 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_OnePulseN_Start - 0x00000000 0xaa ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_OnePulseN_Stop - 0x00000000 0xbe ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_OnePulseN_Start_IT - 0x00000000 0xca ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_OnePulseN_Stop_IT - 0x00000000 0xde ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_ConfigCommutEvent - 0x00000000 0xbe ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_ConfigCommutEvent_IT - 0x00000000 0xbe ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_ConfigCommutEvent_DMA - 0x00000000 0xe4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_ConfigBreakDeadTime - 0x00000000 0xa2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_RemapConfig - 0x00000000 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_CommutCallback - 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_CommutHalfCpltCallback - 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_BreakCallback - 0x00000000 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_HallSensor_GetState - 0x00000000 0x1a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.HAL_TIMEx_GetChannelNState - 0x00000000 0x50 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.TIMEx_DMACommutationCplt - 0x00000000 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.TIMEx_DMACommutationHalfCplt - 0x00000000 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.TIM_DMADelayPulseNCplt - 0x00000000 0x86 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.TIM_DMAErrorCCxN - 0x00000000 0x6e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .text.TIM_CCxNChannelCmd - 0x00000000 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x8e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x51 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x103 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x6a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x1df ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0xbd ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0xd23 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0xe09e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x6d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x34a2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x190 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x5bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x289 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x1cb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x114 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x1b2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x27 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x136 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x1bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x3c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x57 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x46a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x1b5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x87 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .group 0x00000000 0xc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o @@ -4011,7 +3383,7 @@ Discarded input sections .text.UART_DMARxOnlyAbortCallback 0x00000000 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0xacc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - .debug_macro 0x00000000 0x22d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + .debug_macro 0x00000000 0x221 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o @@ -4046,7 +3418,6 @@ Discarded input sections .debug_macro 0x00000000 0x240 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x287 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - .debug_macro 0x00000000 0x8ed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x28e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_macro 0x00000000 0x83 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-exit.o) @@ -4263,12 +3634,8 @@ Discarded input sections .text 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) - .text 0x00000000 0x254 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) - .debug_frame 0x00000000 0x30 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) - .ARM.attributes - 0x00000000 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) .text 0x00000000 0x168 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_mulsf3.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_mulsf3.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_mulsf3.o) @@ -4277,14 +3644,10 @@ Discarded input sections 0x00000000 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_mulsf3.o) .data 0x00000000 0x0 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AD5934_GetRegisterValue + 0x08000f0c 0x90 ./Core/Src/ad5934_driver.o + 0x08000f0c AD5934_GetRegisterValue .text.AD5934_Init - 0x08001210 0x40 ./Core/Src/ad5934_driver.o - 0x08001210 AD5934_Init + 0x08000f9c 0x40 ./Core/Src/ad5934_driver.o + 0x08000f9c AD5934_Init .text.AD5934_RestartSweep - 0x08001250 0x34 ./Core/Src/ad5934_driver.o - 0x08001250 AD5934_RestartSweep + 0x08000fdc 0x3e ./Core/Src/ad5934_driver.o + 0x08000fdc AD5934_RestartSweep .text.AD5934_Sweep - 0x08001284 0x3a ./Core/Src/ad5934_driver.o - 0x08001284 AD5934_Sweep - *fill* 0x080012be 0x2 + 0x0800101a 0x3a ./Core/Src/ad5934_driver.o + 0x0800101a AD5934_Sweep .text.AD5934_GetTemperature - 0x080012c0 0x3f8 ./Core/Src/ad5934_driver.o - 0x080012c0 AD5934_GetTemperature + 0x08001054 0x3f8 ./Core/Src/ad5934_driver.o + 0x08001054 AD5934_GetTemperature .text.AD5934_GetImpedance - 0x080016b8 0x19c ./Core/Src/ad5934_driver.o - 0x080016b8 AD5934_GetImpedance + 0x0800144c 0x1fc ./Core/Src/ad5934_driver.o + 0x0800144c AD5934_GetImpedance .text.AD5934_Wait_For_Data_Valid - 0x08001854 0x4a ./Core/Src/ad5934_driver.o - 0x08001854 AD5934_Wait_For_Data_Valid - *fill* 0x0800189e 0x2 + 0x08001648 0x4a ./Core/Src/ad5934_driver.o + 0x08001648 AD5934_Wait_For_Data_Valid + *fill* 0x08001692 0x2 .text.AD5934_Round_Float_Precision - 0x080018a0 0x5c ./Core/Src/ad5934_driver.o - 0x080018a0 AD5934_Round_Float_Precision + 0x08001694 0x5c ./Core/Src/ad5934_driver.o + 0x08001694 AD5934_Round_Float_Precision .text.AD5934_Linear_Correction - 0x080018fc 0x34 ./Core/Src/ad5934_driver.o - 0x080018fc AD5934_Linear_Correction + 0x080016f0 0x34 ./Core/Src/ad5934_driver.o + 0x080016f0 AD5934_Linear_Correction .text.ADG715_SetRegisterValue - 0x08001930 0x30 ./Core/Src/ad5934_driver.o - 0x08001930 ADG715_SetRegisterValue + 0x08001724 0x30 ./Core/Src/ad5934_driver.o + 0x08001724 ADG715_SetRegisterValue .text.ADG715_SetChannels - 0x08001960 0x26 ./Core/Src/ad5934_driver.o - 0x08001960 ADG715_SetChannels + 0x08001754 0x26 ./Core/Src/ad5934_driver.o + 0x08001754 ADG715_SetChannels .text.ADG715_ResetChannels - 0x08001986 0xe ./Core/Src/ad5934_driver.o - 0x08001986 ADG715_ResetChannels + 0x0800177a 0xe ./Core/Src/ad5934_driver.o + 0x0800177a ADG715_ResetChannels .text.ADG715_Update - 0x08001994 0x104 ./Core/Src/ad5934_driver.o - 0x08001994 ADG715_Update + 0x08001788 0x104 ./Core/Src/ad5934_driver.o + 0x08001788 ADG715_Update .text.MX_ADC1_Init - 0x08001a98 0x9c ./Core/Src/adc.o - 0x08001a98 MX_ADC1_Init + 0x0800188c 0x7c ./Core/Src/adc.o + 0x0800188c MX_ADC1_Init .text.MX_ADC2_Init - 0x08001b34 0x7c ./Core/Src/adc.o - 0x08001b34 MX_ADC2_Init + 0x08001908 0x7c ./Core/Src/adc.o + 0x08001908 MX_ADC2_Init .text.HAL_ADC_MspInit - 0x08001bb0 0x124 ./Core/Src/adc.o - 0x08001bb0 HAL_ADC_MspInit + 0x08001984 0xcc ./Core/Src/adc.o + 0x08001984 HAL_ADC_MspInit .text.writeRegister - 0x08001cd4 0x42 ./Core/Src/ads1015_driver.o + 0x08001a50 0x42 ./Core/Src/ads1015_driver.o .text.readRegister - 0x08001d16 0x54 ./Core/Src/ads1015_driver.o - .text.ADS1015 0x08001d6a 0x3c ./Core/Src/ads1015_driver.o - 0x08001d6a ADS1015 + 0x08001a92 0x54 ./Core/Src/ads1015_driver.o + .text.ADS1015 0x08001ae6 0x3c ./Core/Src/ads1015_driver.o + 0x08001ae6 ADS1015 .text.ADSsetGain - 0x08001da6 0x1c ./Core/Src/ads1015_driver.o - 0x08001da6 ADSsetGain + 0x08001b22 0x1c ./Core/Src/ads1015_driver.o + 0x08001b22 ADSsetGain .text.ADSreadADC_Differential_0_1 - 0x08001dc2 0x7e ./Core/Src/ads1015_driver.o - 0x08001dc2 ADSreadADC_Differential_0_1 + 0x08001b3e 0x7e ./Core/Src/ads1015_driver.o + 0x08001b3e ADSreadADC_Differential_0_1 .text.ADSCalculate_ph_Volts - 0x08001e40 0xac ./Core/Src/ads1015_driver.o - 0x08001e40 ADSCalculate_ph_Volts - .text.ADSCalculate_ph_Compensated - 0x08001eec 0x10c ./Core/Src/ads1015_driver.o - 0x08001eec ADSCalculate_ph_Compensated + 0x08001bbc 0xac ./Core/Src/ads1015_driver.o + 0x08001bbc ADSCalculate_ph_Volts + .text.ADSCalculate_ph_Uncompensated + 0x08001c68 0xdc ./Core/Src/ads1015_driver.o + 0x08001c68 ADSCalculate_ph_Uncompensated .text.digital_outputs_init - 0x08001ff8 0x84 ./Core/Src/digital_outputs_driver.o - 0x08001ff8 digital_outputs_init - .text.MX_DMA_Init - 0x0800207c 0x3c ./Core/Src/dma.o - 0x0800207c MX_DMA_Init + 0x08001d44 0x84 ./Core/Src/digital_outputs_driver.o + 0x08001d44 digital_outputs_init .text.Flash_Save_Page - 0x080020b8 0xb4 ./Core/Src/flash_manager.o - 0x080020b8 Flash_Save_Page + 0x08001dc8 0xb4 ./Core/Src/flash_manager.o + 0x08001dc8 Flash_Save_Page .text.Flash_Load_Page - 0x0800216c 0x40 ./Core/Src/flash_manager.o - 0x0800216c Flash_Load_Page + 0x08001e7c 0x40 ./Core/Src/flash_manager.o + 0x08001e7c Flash_Load_Page .text.MX_GPIO_Init - 0x080021ac 0x16c ./Core/Src/gpio.o - 0x080021ac MX_GPIO_Init - .text.HAL_GPIO_EXTI_Callback - 0x08002318 0xb4 ./Core/Src/gpio.o - 0x08002318 HAL_GPIO_EXTI_Callback + 0x08001ebc 0x140 ./Core/Src/gpio.o + 0x08001ebc MX_GPIO_Init .text.MX_I2C1_Init - 0x080023cc 0x5c ./Core/Src/i2c.o - 0x080023cc MX_I2C1_Init + 0x08001ffc 0x5c ./Core/Src/i2c.o + 0x08001ffc MX_I2C1_Init .text.MX_I2C2_Init - 0x08002428 0x5c ./Core/Src/i2c.o - 0x08002428 MX_I2C2_Init + 0x08002058 0x5c ./Core/Src/i2c.o + 0x08002058 MX_I2C2_Init .text.HAL_I2C_MspInit - 0x08002484 0xd8 ./Core/Src/i2c.o - 0x08002484 HAL_I2C_MspInit - *fill* 0x0800255c 0x4 - .text.main 0x08002560 0x4b4 ./Core/Src/main.o - 0x08002560 main + 0x080020b4 0xd8 ./Core/Src/i2c.o + 0x080020b4 HAL_I2C_MspInit + .text.main 0x0800218c 0x350 ./Core/Src/main.o + 0x0800218c main .text.SystemClock_Config - 0x08002a14 0xb6 ./Core/Src/main.o - 0x08002a14 SystemClock_Config - *fill* 0x08002aca 0x2 + 0x080024dc 0xa0 ./Core/Src/main.o + 0x080024dc SystemClock_Config .text.FloatToString - 0x08002acc 0x228 ./Core/Src/main.o - 0x08002acc FloatToString - .text.HAL_ADC_ConvCpltCallback - 0x08002cf4 0x1c ./Core/Src/main.o - 0x08002cf4 HAL_ADC_ConvCpltCallback + 0x0800257c 0x228 ./Core/Src/main.o + 0x0800257c FloatToString .text.Error_Handler - 0x08002d10 0xc ./Core/Src/main.o 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0x08002dec rs485_disable_tx + 0x08002880 0x18 ./Core/Src/rs485_driver.o + 0x08002880 rs485_disable_tx .text.rs485_configure_gpio_address - 0x08002e04 0x8c ./Core/Src/rs485_driver.o + 0x08002898 0x8c ./Core/Src/rs485_driver.o .text.rs485_configure_usart1 - 0x08002e90 0x74 ./Core/Src/rs485_driver.o + 0x08002924 0x74 ./Core/Src/rs485_driver.o .text.HAL_MspInit - 0x08002f04 0x64 ./Core/Src/stm32f1xx_hal_msp.o - 0x08002f04 HAL_MspInit + 0x08002998 0x64 ./Core/Src/stm32f1xx_hal_msp.o + 0x08002998 HAL_MspInit .text.NMI_Handler - 0x08002f68 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002f68 NMI_Handler + 0x080029fc 0x8 ./Core/Src/stm32f1xx_it.o + 0x080029fc NMI_Handler .text.HardFault_Handler - 0x08002f70 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002f70 HardFault_Handler + 0x08002a04 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002a04 HardFault_Handler .text.MemManage_Handler - 0x08002f78 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002f78 MemManage_Handler + 0x08002a0c 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002a0c MemManage_Handler .text.BusFault_Handler - 0x08002f80 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002f80 BusFault_Handler + 0x08002a14 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002a14 BusFault_Handler .text.UsageFault_Handler - 0x08002f88 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002f88 UsageFault_Handler + 0x08002a1c 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002a1c UsageFault_Handler .text.SVC_Handler - 0x08002f90 0xc ./Core/Src/stm32f1xx_it.o - 0x08002f90 SVC_Handler + 0x08002a24 0xc ./Core/Src/stm32f1xx_it.o + 0x08002a24 SVC_Handler .text.DebugMon_Handler - 0x08002f9c 0xc ./Core/Src/stm32f1xx_it.o - 0x08002f9c DebugMon_Handler + 0x08002a30 0xc ./Core/Src/stm32f1xx_it.o + 0x08002a30 DebugMon_Handler .text.PendSV_Handler - 0x08002fa8 0xc ./Core/Src/stm32f1xx_it.o - 0x08002fa8 PendSV_Handler + 0x08002a3c 0xc ./Core/Src/stm32f1xx_it.o + 0x08002a3c PendSV_Handler .text.SysTick_Handler - 0x08002fb4 0xc ./Core/Src/stm32f1xx_it.o - 0x08002fb4 SysTick_Handler - .text.EXTI3_IRQHandler - 0x08002fc0 0xe ./Core/Src/stm32f1xx_it.o - 0x08002fc0 EXTI3_IRQHandler - *fill* 0x08002fce 0x2 - .text.DMA1_Channel1_IRQHandler - 0x08002fd0 0x14 ./Core/Src/stm32f1xx_it.o - 0x08002fd0 DMA1_Channel1_IRQHandler + 0x08002a48 0xc ./Core/Src/stm32f1xx_it.o + 0x08002a48 SysTick_Handler .text.USART1_IRQHandler - 0x08002fe4 0x14 ./Core/Src/stm32f1xx_it.o - 0x08002fe4 USART1_IRQHandler + 0x08002a54 0x14 ./Core/Src/stm32f1xx_it.o + 0x08002a54 USART1_IRQHandler .text.SystemInit - 0x08002ff8 0xc ./Core/Src/system_stm32f1xx.o - 0x08002ff8 SystemInit - .text.MX_TIM3_Init - 0x08003004 0x9c ./Core/Src/tim.o - 0x08003004 MX_TIM3_Init - .text.HAL_TIM_Base_MspInit - 0x080030a0 0x3c ./Core/Src/tim.o - 0x080030a0 HAL_TIM_Base_MspInit + 0x08002a68 0xc ./Core/Src/system_stm32f1xx.o + 0x08002a68 SystemInit .text.MX_USART1_UART_Init - 0x080030dc 0x54 ./Core/Src/usart.o - 0x080030dc MX_USART1_UART_Init + 0x08002a74 0x54 ./Core/Src/usart.o + 0x08002a74 MX_USART1_UART_Init .text.HAL_UART_MspInit - 0x08003130 0xa8 ./Core/Src/usart.o - 0x08003130 HAL_UART_MspInit + 0x08002ac8 0xa8 ./Core/Src/usart.o + 0x08002ac8 HAL_UART_MspInit .text.Reset_Handler - 0x080031d8 0x48 ./Core/Startup/startup_stm32f103c8tx.o - 0x080031d8 Reset_Handler + 0x08002b70 0x48 ./Core/Startup/startup_stm32f103c8tx.o + 0x08002b70 Reset_Handler .text.Default_Handler - 0x08003220 0x2 ./Core/Startup/startup_stm32f103c8tx.o - 0x08003220 RTC_Alarm_IRQHandler - 0x08003220 EXTI2_IRQHandler - 0x08003220 TIM1_CC_IRQHandler - 0x08003220 PVD_IRQHandler - 0x08003220 EXTI0_IRQHandler - 0x08003220 I2C2_EV_IRQHandler - 0x08003220 ADC1_2_IRQHandler - 0x08003220 SPI1_IRQHandler - 0x08003220 TAMPER_IRQHandler - 0x08003220 DMA1_Channel4_IRQHandler - 0x08003220 USART3_IRQHandler - 0x08003220 RTC_IRQHandler - 0x08003220 DMA1_Channel7_IRQHandler - 0x08003220 CAN1_RX1_IRQHandler - 0x08003220 TIM4_IRQHandler - 0x08003220 I2C1_EV_IRQHandler - 0x08003220 DMA1_Channel6_IRQHandler - 0x08003220 TIM3_IRQHandler - 0x08003220 RCC_IRQHandler - 0x08003220 TIM1_TRG_COM_IRQHandler - 0x08003220 Default_Handler - 0x08003220 EXTI15_10_IRQHandler - 0x08003220 EXTI9_5_IRQHandler - 0x08003220 SPI2_IRQHandler - 0x08003220 DMA1_Channel5_IRQHandler - 0x08003220 EXTI4_IRQHandler - 0x08003220 USB_LP_CAN1_RX0_IRQHandler - 0x08003220 USB_HP_CAN1_TX_IRQHandler - 0x08003220 DMA1_Channel3_IRQHandler - 0x08003220 TIM1_UP_IRQHandler - 0x08003220 WWDG_IRQHandler - 0x08003220 TIM2_IRQHandler - 0x08003220 TIM1_BRK_IRQHandler - 0x08003220 EXTI1_IRQHandler - 0x08003220 USART2_IRQHandler - 0x08003220 I2C2_ER_IRQHandler - 0x08003220 DMA1_Channel2_IRQHandler - 0x08003220 CAN1_SCE_IRQHandler - 0x08003220 FLASH_IRQHandler - 0x08003220 I2C1_ER_IRQHandler - 0x08003220 USBWakeUp_IRQHandler - *fill* 0x08003222 0x2 + 0x08002bb8 0x2 ./Core/Startup/startup_stm32f103c8tx.o + 0x08002bb8 RTC_Alarm_IRQHandler + 0x08002bb8 EXTI2_IRQHandler + 0x08002bb8 TIM1_CC_IRQHandler + 0x08002bb8 PVD_IRQHandler + 0x08002bb8 EXTI3_IRQHandler + 0x08002bb8 EXTI0_IRQHandler + 0x08002bb8 I2C2_EV_IRQHandler + 0x08002bb8 ADC1_2_IRQHandler + 0x08002bb8 SPI1_IRQHandler + 0x08002bb8 TAMPER_IRQHandler + 0x08002bb8 DMA1_Channel4_IRQHandler + 0x08002bb8 USART3_IRQHandler + 0x08002bb8 RTC_IRQHandler + 0x08002bb8 DMA1_Channel7_IRQHandler + 0x08002bb8 CAN1_RX1_IRQHandler + 0x08002bb8 TIM4_IRQHandler + 0x08002bb8 I2C1_EV_IRQHandler + 0x08002bb8 DMA1_Channel6_IRQHandler + 0x08002bb8 TIM3_IRQHandler + 0x08002bb8 RCC_IRQHandler + 0x08002bb8 TIM1_TRG_COM_IRQHandler + 0x08002bb8 DMA1_Channel1_IRQHandler + 0x08002bb8 Default_Handler + 0x08002bb8 EXTI15_10_IRQHandler + 0x08002bb8 EXTI9_5_IRQHandler + 0x08002bb8 SPI2_IRQHandler + 0x08002bb8 DMA1_Channel5_IRQHandler + 0x08002bb8 EXTI4_IRQHandler + 0x08002bb8 USB_LP_CAN1_RX0_IRQHandler + 0x08002bb8 USB_HP_CAN1_TX_IRQHandler + 0x08002bb8 DMA1_Channel3_IRQHandler + 0x08002bb8 TIM1_UP_IRQHandler + 0x08002bb8 WWDG_IRQHandler + 0x08002bb8 TIM2_IRQHandler + 0x08002bb8 TIM1_BRK_IRQHandler + 0x08002bb8 EXTI1_IRQHandler + 0x08002bb8 USART2_IRQHandler + 0x08002bb8 I2C2_ER_IRQHandler + 0x08002bb8 DMA1_Channel2_IRQHandler + 0x08002bb8 CAN1_SCE_IRQHandler + 0x08002bb8 FLASH_IRQHandler + 0x08002bb8 I2C1_ER_IRQHandler + 0x08002bb8 USBWakeUp_IRQHandler + *fill* 0x08002bba 0x2 .text.HAL_Init - 0x08003224 0x2c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08003224 HAL_Init + 0x08002bbc 0x2c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002bbc HAL_Init .text.HAL_InitTick - 0x08003250 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08003250 HAL_InitTick + 0x08002be8 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002be8 HAL_InitTick .text.HAL_IncTick - 0x080032b0 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x080032b0 HAL_IncTick + 0x08002c48 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002c48 HAL_IncTick .text.HAL_GetTick - 0x080032d4 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x080032d4 HAL_GetTick + 0x08002c6c 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002c6c HAL_GetTick .text.HAL_Delay - 0x080032e8 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x080032e8 HAL_Delay + 0x08002c80 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002c80 HAL_Delay .text.HAL_ADC_Init - 0x08003330 0x1b0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x08003330 HAL_ADC_Init - .text.HAL_ADC_Start_DMA - 0x080034e0 0x1bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x080034e0 HAL_ADC_Start_DMA - .text.HAL_ADC_ConvHalfCpltCallback - 0x0800369c 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x0800369c HAL_ADC_ConvHalfCpltCallback - .text.HAL_ADC_ErrorCallback - 0x080036ae 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x080036ae HAL_ADC_ErrorCallback + 0x08002cc8 0x1b0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x08002cc8 HAL_ADC_Init .text.HAL_ADC_ConfigChannel - 0x080036c0 0x1f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x080036c0 HAL_ADC_ConfigChannel - .text.ADC_Enable - 0x080038b0 0xb4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x080038b0 ADC_Enable + 0x08002e78 0x1f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x08002e78 HAL_ADC_ConfigChannel .text.ADC_ConversionStop_Disable - 0x08003964 0x82 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x08003964 ADC_ConversionStop_Disable - .text.ADC_DMAConvCplt - 0x080039e6 0x7c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x080039e6 ADC_DMAConvCplt - .text.ADC_DMAHalfConvCplt - 0x08003a62 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x08003a62 ADC_DMAHalfConvCplt - .text.ADC_DMAError - 0x08003a7e 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x08003a7e ADC_DMAError - *fill* 0x08003ab2 0x2 - .text.HAL_ADCEx_Calibration_Start - 0x08003ab4 0x15c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o - 0x08003ab4 HAL_ADCEx_Calibration_Start + 0x08003068 0x82 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x08003068 ADC_ConversionStop_Disable + *fill* 0x080030ea 0x2 .text.__NVIC_SetPriorityGrouping - 0x08003c10 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080030ec 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_GetPriorityGrouping - 0x08003c58 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003134 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_EnableIRQ - 0x08003c74 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003150 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_SetPriority - 0x08003cac 0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003188 0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.NVIC_EncodePriority - 0x08003d00 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080031dc 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.SysTick_Config - 0x08003d64 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003240 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.HAL_NVIC_SetPriorityGrouping - 0x08003da8 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08003da8 HAL_NVIC_SetPriorityGrouping + 0x08003284 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003284 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x08003dbe 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08003dbe HAL_NVIC_SetPriority + 0x0800329a 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x0800329a HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08003df6 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08003df6 HAL_NVIC_EnableIRQ + 0x080032d2 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080032d2 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08003e12 0x18 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08003e12 HAL_SYSTICK_Config - *fill* 0x08003e2a 0x2 - .text.HAL_DMA_Init - 0x08003e2c 0xb4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x08003e2c HAL_DMA_Init - .text.HAL_DMA_Start_IT - 0x08003ee0 0xc0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x08003ee0 HAL_DMA_Start_IT + 0x080032ee 0x18 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080032ee HAL_SYSTICK_Config .text.HAL_DMA_Abort - 0x08003fa0 0x76 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x08003fa0 HAL_DMA_Abort - *fill* 0x08004016 0x2 + 0x08003306 0x76 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x08003306 HAL_DMA_Abort .text.HAL_DMA_Abort_IT - 0x08004018 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x08004018 HAL_DMA_Abort_IT - .text.HAL_DMA_IRQHandler - 0x08004108 0x20c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x08004108 HAL_DMA_IRQHandler - .text.DMA_SetConfig - 0x08004314 0x5a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - *fill* 0x0800436e 0x2 + 0x0800337c 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x0800337c HAL_DMA_Abort_IT .text.HAL_FLASH_Program - 0x08004370 0xe0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - 0x08004370 HAL_FLASH_Program + 0x0800346c 0xe0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + 0x0800346c HAL_FLASH_Program .text.HAL_FLASH_Unlock - 0x08004450 0x4c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - 0x08004450 HAL_FLASH_Unlock + 0x0800354c 0x4c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + 0x0800354c HAL_FLASH_Unlock .text.HAL_FLASH_Lock - 0x0800449c 0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - 0x0800449c HAL_FLASH_Lock + 0x08003598 0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + 0x08003598 HAL_FLASH_Lock .text.FLASH_Program_HalfWord - 0x080044bc 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + 0x080035b8 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .text.FLASH_WaitForLastOperation - 0x080044f4 0x8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - 0x080044f4 FLASH_WaitForLastOperation + 0x080035f0 0x8c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + 0x080035f0 FLASH_WaitForLastOperation .text.FLASH_SetErrorCode - 0x08004580 0xa0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + 0x0800367c 0xa0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o .text.HAL_FLASHEx_Erase - 0x08004620 0xd8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o - 0x08004620 HAL_FLASHEx_Erase + 0x0800371c 0xd8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + 0x0800371c HAL_FLASHEx_Erase .text.FLASH_MassErase - 0x080046f8 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + 0x080037f4 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o .text.FLASH_PageErase - 0x08004730 0x40 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o - 0x08004730 FLASH_PageErase + 0x0800382c 0x40 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + 0x0800382c FLASH_PageErase .text.HAL_GPIO_Init - 0x08004770 0x308 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08004770 HAL_GPIO_Init + 0x0800386c 0x308 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x0800386c HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x08004a78 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08004a78 HAL_GPIO_ReadPin + 0x08003b74 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003b74 HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x08004aa6 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08004aa6 HAL_GPIO_WritePin - *fill* 0x08004ad6 0x2 - .text.HAL_GPIO_EXTI_IRQHandler - 0x08004ad8 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08004ad8 HAL_GPIO_EXTI_IRQHandler + 0x08003ba2 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003ba2 HAL_GPIO_WritePin + .text.HAL_GPIO_TogglePin + 0x08003bd2 0x32 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003bd2 HAL_GPIO_TogglePin .text.HAL_I2C_Init - 0x08004b08 0x288 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x08004b08 HAL_I2C_Init + 0x08003c04 0x288 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08003c04 HAL_I2C_Init .text.HAL_I2C_Master_Transmit - 0x08004d90 0x1fc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x08004d90 HAL_I2C_Master_Transmit + 0x08003e8c 0x1fc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08003e8c HAL_I2C_Master_Transmit .text.HAL_I2C_Master_Receive - 0x08004f8c 0x4d8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x08004f8c HAL_I2C_Master_Receive + 0x08004088 0x4d8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004088 HAL_I2C_Master_Receive .text.I2C_MasterRequestWrite - 0x08005464 0x104 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004560 0x104 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_MasterRequestRead - 0x08005568 0x19c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004664 0x19c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnFlagUntilTimeout - 0x08005704 0xf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004800 0xf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnMasterAddressFlagUntilTimeout - 0x080057f8 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x080048f4 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnTXEFlagUntilTimeout - 0x08005938 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004a34 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnBTFFlagUntilTimeout - 0x080059c8 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004ac4 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnRXNEFlagUntilTimeout - 0x08005a58 0xba ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004b54 0xba ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_IsAcknowledgeFailed - 0x08005b12 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - *fill* 0x08005b6e 0x2 + 0x08004c0e 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + *fill* 0x08004c6a 0x2 .text.HAL_RCC_OscConfig - 0x08005b70 0x504 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08005b70 HAL_RCC_OscConfig + 0x08004c6c 0x504 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08004c6c HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x08006074 0x1d4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08006074 HAL_RCC_ClockConfig + 0x08005170 0x1d4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005170 HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x08006248 0xac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08006248 HAL_RCC_GetSysClockFreq + 0x08005344 0xac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005344 HAL_RCC_GetSysClockFreq .text.HAL_RCC_GetHCLKFreq - 0x080062f4 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x080062f4 HAL_RCC_GetHCLKFreq + 0x080053f0 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x080053f0 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x08006308 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08006308 HAL_RCC_GetPCLK1Freq + 0x08005404 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005404 HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x08006330 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08006330 HAL_RCC_GetPCLK2Freq + 0x0800542c 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x0800542c HAL_RCC_GetPCLK2Freq .text.RCC_Delay - 0x08006358 0x3c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005454 0x3c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .text.HAL_RCCEx_PeriphCLKConfig - 0x08006394 0x16c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - 0x08006394 HAL_RCCEx_PeriphCLKConfig - .text.HAL_RCCEx_GetPeriphCLKFreq - 0x08006500 0x16c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - 0x08006500 HAL_RCCEx_GetPeriphCLKFreq - .text.HAL_TIM_Base_Init - 0x0800666c 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x0800666c HAL_TIM_Base_Init - *fill* 0x0800670a 0x2 - .text.HAL_TIM_Base_Start - 0x0800670c 0x94 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x0800670c HAL_TIM_Base_Start - .text.HAL_TIM_ConfigClockSource - 0x080067a0 0x18e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x080067a0 HAL_TIM_ConfigClockSource - *fill* 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0x080064a4 __exidx_end = . + 0x080064a4 . = ALIGN (0x4) -.preinit_array 0x08007ab0 0x0 - 0x08007ab0 . = ALIGN (0x4) - 0x08007ab0 PROVIDE (__preinit_array_start = .) +.preinit_array 0x080064a4 0x0 + 0x080064a4 . = ALIGN (0x4) + 0x080064a4 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x08007ab0 PROVIDE (__preinit_array_end = .) - 0x08007ab0 . = ALIGN (0x4) + 0x080064a4 PROVIDE (__preinit_array_end = .) + 0x080064a4 . = ALIGN (0x4) -.init_array 0x08007ab0 0x4 - 0x08007ab0 . = ALIGN (0x4) - 0x08007ab0 PROVIDE (__init_array_start = .) +.init_array 0x080064a4 0x4 + 0x080064a4 . = ALIGN (0x4) + 0x080064a4 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x08007ab0 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o - 0x08007ab4 PROVIDE (__init_array_end = .) - 0x08007ab4 . = ALIGN (0x4) + .init_array 0x080064a4 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + 0x080064a8 PROVIDE (__init_array_end = .) + 0x080064a8 . = ALIGN (0x4) -.fini_array 0x08007ab4 0x4 - 0x08007ab4 . = ALIGN (0x4) +.fini_array 0x080064a8 0x4 + 0x080064a8 . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x08007ab4 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + .fini_array 0x080064a8 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x08007ab8 . = ALIGN (0x4) - 0x08007ab8 _sidata = LOADADDR (.data) + 0x080064ac . = ALIGN (0x4) + 0x080064ac _sidata = LOADADDR (.data) -.rel.dyn 0x08007ab8 0x0 - .rel.iplt 0x08007ab8 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o +.rel.dyn 0x080064ac 0x0 + .rel.iplt 0x080064ac 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o -.data 0x20000000 0x80 load address 0x08007ab8 +.data 0x20000000 0x74 load address 0x080064ac 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) *(.data*) - .data.first_time_state - 0x20000000 0x1 ./Core/Src/gpio.o - 0x20000000 first_time_state - .data.last_original_pin - 0x20000001 0x1 ./Core/Src/gpio.o - 0x20000001 last_original_pin - *fill* 0x20000002 0x2 .data.newline_ph - 0x20000004 0x5 ./Core/Src/main.o - 0x20000004 newline_ph - *fill* 0x20000009 0x3 + 0x20000000 0x5 ./Core/Src/main.o + 0x20000000 newline_ph + *fill* 0x20000005 0x3 .data.newline_admi - 0x2000000c 0x5 ./Core/Src/main.o - 0x2000000c newline_admi - *fill* 0x20000011 0x3 + 0x20000008 0x5 ./Core/Src/main.o + 0x20000008 newline_admi + *fill* 0x2000000d 0x3 .data.newline_temp - 0x20000014 0x5 ./Core/Src/main.o - 0x20000014 newline_temp - *fill* 0x20000019 0x3 - .data.newline_real - 0x2000001c 0x5 ./Core/Src/main.o - 0x2000001c newline_real - *fill* 0x20000021 0x3 + 0x20000010 0x5 ./Core/Src/main.o + 0x20000010 newline_temp + *fill* 0x20000015 0x3 .data.SystemCoreClock - 0x20000024 0x4 ./Core/Src/system_stm32f1xx.o - 0x20000024 SystemCoreClock + 0x20000018 0x4 ./Core/Src/system_stm32f1xx.o + 0x20000018 SystemCoreClock .data.uwTickPrio - 0x20000028 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x20000028 uwTickPrio + 0x2000001c 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x2000001c uwTickPrio .data.uwTickFreq - 0x2000002c 0x1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x2000002c uwTickFreq - *fill* 0x2000002d 0x3 + 0x20000020 0x1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x20000020 uwTickFreq + *fill* 0x20000021 0x3 .data._impure_ptr - 0x20000030 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) - 0x20000030 _impure_ptr + 0x20000024 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) + 0x20000024 _impure_ptr .data._impure_data - 0x20000034 0x4c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) - 0x20000034 _impure_data + 0x20000028 0x4c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) + 0x20000028 _impure_data *(.RamFunc) *(.RamFunc*) - 0x20000080 . = ALIGN (0x4) - 0x20000080 _edata = . + 0x20000074 . = ALIGN (0x4) + 0x20000074 _edata = . -.igot.plt 0x20000080 0x0 load address 0x08007b38 - .igot.plt 0x20000080 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o - 0x20000080 . = ALIGN (0x4) +.igot.plt 0x20000074 0x0 load address 0x08006520 + .igot.plt 0x20000074 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + 0x20000074 . = ALIGN (0x4) -.bss 0x20000080 0x890 load address 0x08007b38 - 0x20000080 _sbss = . - 0x20000080 __bss_start__ = _sbss +.bss 0x20000078 0x7d0 load address 0x08006520 + 0x20000078 _sbss = . + 0x20000078 __bss_start__ = _sbss *(.bss) - .bss 0x20000080 0x1c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + .bss 0x20000078 0x1c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o *(.bss*) .bss.temperature_dut_samples - 0x2000009c 0x20 ./Core/Src/ad5934_driver.o - 0x2000009c temperature_dut_samples + 0x20000094 0x20 ./Core/Src/ad5934_driver.o + 0x20000094 temperature_dut_samples .bss.temperature_ref_samples - 0x200000bc 0x20 ./Core/Src/ad5934_driver.o - 0x200000bc temperature_ref_samples + 0x200000b4 0x20 ./Core/Src/ad5934_driver.o + 0x200000b4 temperature_ref_samples .bss.temperature_display - 0x200000dc 0x20 ./Core/Src/ad5934_driver.o - 0x200000dc temperature_display + 0x200000d4 0x20 ./Core/Src/ad5934_driver.o + 0x200000d4 temperature_display .bss.ec_dut_samples - 0x200000fc 0x20 ./Core/Src/ad5934_driver.o - 0x200000fc ec_dut_samples - .bss.hadc1 0x2000011c 0x30 ./Core/Src/adc.o - 0x2000011c hadc1 - .bss.hadc2 0x2000014c 0x30 ./Core/Src/adc.o - 0x2000014c hadc2 - .bss.hdma_adc1 - 0x2000017c 0x44 ./Core/Src/adc.o - 0x2000017c hdma_adc1 - .bss.i2c 0x200001c0 0x10 ./Core/Src/ads1015_driver.o - 0x200001c0 i2c + 0x200000f4 0x20 ./Core/Src/ad5934_driver.o + 0x200000f4 ec_dut_samples + .bss.hadc1 0x20000114 0x30 ./Core/Src/adc.o + 0x20000114 hadc1 + .bss.hadc2 0x20000144 0x30 ./Core/Src/adc.o + 0x20000144 hadc2 + .bss.i2c 0x20000174 0x10 ./Core/Src/ads1015_driver.o + 0x20000174 i2c .bss.ph_dut_samples - 0x200001d0 0x20 ./Core/Src/ads1015_driver.o - 0x200001d0 ph_dut_samples + 0x20000184 0x20 ./Core/Src/ads1015_driver.o + 0x20000184 ph_dut_samples .bss.pin_states - 0x200001f0 0x8 ./Core/Src/digital_outputs_driver.o + 0x200001a4 0x8 ./Core/Src/digital_outputs_driver.o .bss.flash_data - 0x200001f8 0x400 ./Core/Src/flash_manager.o - 0x200001f8 flash_data - .bss.last_interrupt_time - 0x200005f8 0x4 ./Core/Src/gpio.o - 0x200005f8 last_interrupt_time - .bss.original_pin_state - 0x200005fc 0x1 ./Core/Src/gpio.o - 0x200005fc original_pin_state - .bss.edge_state - 0x200005fd 0x1 ./Core/Src/gpio.o - 0x200005fd edge_state - *fill* 0x200005fe 0x2 - .bss.hi2c1 0x20000600 0x54 ./Core/Src/i2c.o - 0x20000600 hi2c1 - .bss.hi2c2 0x20000654 0x54 ./Core/Src/i2c.o - 0x20000654 hi2c2 + 0x200001ac 0x400 ./Core/Src/flash_manager.o + 0x200001ac flash_data + .bss.hi2c1 0x200005ac 0x54 ./Core/Src/i2c.o + 0x200005ac hi2c1 + .bss.hi2c2 0x20000600 0x54 ./Core/Src/i2c.o + 0x20000600 hi2c2 .bss.main_state - 0x200006a8 0x1 ./Core/Src/main.o - 0x200006a8 main_state - *fill* 0x200006a9 0x3 - .bss.AD_RES 0x200006ac 0x4 ./Core/Src/main.o - 0x200006ac AD_RES - .bss.UpdateEvent - 0x200006b0 0x1 ./Core/Src/main.o - 0x200006b0 UpdateEvent - *fill* 0x200006b1 0x3 - .bss.Temperature - 0x200006b4 0x4 ./Core/Src/main.o - 0x200006b4 Temperature - .bss.Temp_Sum 0x200006b8 0x4 ./Core/Src/main.o - 0x200006b8 Temp_Sum - .bss.V_Sense 0x200006bc 0x4 ./Core/Src/main.o - 0x200006bc V_Sense - .bss.V_Ref 0x200006c0 0x4 ./Core/Src/main.o - 0x200006c0 V_Ref - .bss.Temp_Samples - 0x200006c4 0x10 ./Core/Src/main.o - 0x200006c4 Temp_Samples + 0x20000654 0x1 ./Core/Src/main.o + 0x20000654 main_state + *fill* 0x20000655 0x3 .bss.device_address - 0x200006d4 0x3 ./Core/Src/rs485_driver.o - *fill* 0x200006d7 0x1 - .bss.huart1 0x200006d8 0x48 ./Core/Src/rs485_driver.o - .bss.htim3 0x20000720 0x48 ./Core/Src/tim.o - 0x20000720 htim3 - .bss.huart1 0x20000768 0x48 ./Core/Src/usart.o - 0x20000768 huart1 - .bss.uwTick 0x200007b0 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x200007b0 uwTick - *fill* 0x200007b4 0x4 - .bss.pFlash 0x200007b8 0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - 0x200007b8 pFlash - .bss.__sf 0x200007d8 0x138 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) - 0x200007d8 __sf + 0x20000658 0x3 ./Core/Src/rs485_driver.o + *fill* 0x2000065b 0x1 + .bss.huart1 0x2000065c 0x48 ./Core/Src/rs485_driver.o + .bss.huart1 0x200006a4 0x48 ./Core/Src/usart.o + 0x200006a4 huart1 + .bss.uwTick 0x200006ec 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x200006ec uwTick + .bss.pFlash 0x200006f0 0x20 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + 0x200006f0 pFlash + .bss.__sf 0x20000710 0x138 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) + 0x20000710 __sf *(COMMON) - 0x20000910 . = ALIGN (0x4) - 0x20000910 _ebss = . - 0x20000910 __bss_end__ = _ebss + 0x20000848 . = ALIGN (0x4) + 0x20000848 _ebss = . + 0x20000848 __bss_end__ = _ebss ._user_heap_stack - 0x20000910 0x600 load address 0x08007b38 - 0x20000910 . = ALIGN (0x8) + 0x20000848 0x600 load address 0x08006520 + 0x20000848 . = ALIGN (0x8) [!provide] PROVIDE (end = .) - 0x20000910 PROVIDE (_end = .) - 0x20000b10 . = (. + _Min_Heap_Size) - *fill* 0x20000910 0x200 - 0x20000f10 . = (. + _Min_Stack_Size) - *fill* 0x20000b10 0x400 - 0x20000f10 . = ALIGN (0x8) + 0x20000848 PROVIDE (_end = .) + 0x20000a48 . = (. + _Min_Heap_Size) + *fill* 0x20000848 0x200 + 0x20000e48 . = (. + _Min_Stack_Size) + *fill* 0x20000a48 0x400 + 0x20000e48 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -5244,458 +4457,399 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .ARM.attributes 0x000000d1 0x2d ./Core/Src/digital_outputs_driver.o .ARM.attributes - 0x000000fe 0x2d ./Core/Src/dma.o + 0x000000fe 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.debug_line 0x000077ad 0x78 ./Core/Startup/startup_stm32f103c8tx.o + .debug_line 0x00007825 0x9ca ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_line 0x000081ef 0xfec ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_line 0x000091db 0xb91 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_line 0x00009d6c 0xdd1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_line 0x0000ab3d 0xa81 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_line 0x0000b5be 0xb8e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_line 0x0000c14c 0xa21 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_line 0x0000cb6d 0x3bc4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_line 0x00010731 0xe80 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_line 0x000115b1 0x932 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_line 0x00011ee3 0x24e3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_str 0x00000000 0x9592c - .debug_str 0x00000000 0x9592c ./Core/Src/ad5934_driver.o - 0x8eeb0 (size before relaxing) - .debug_str 0x0009592c 0x8a631 ./Core/Src/adc.o - .debug_str 0x0009592c 0x8e3d4 ./Core/Src/ads1015_driver.o - .debug_str 0x0009592c 0x8a382 ./Core/Src/digital_outputs_driver.o - .debug_str 0x0009592c 0x8a4b1 ./Core/Src/dma.o - .debug_str 0x0009592c 0x8cd4b ./Core/Src/flash_manager.o - .debug_str 0x0009592c 0x8a65a ./Core/Src/gpio.o - .debug_str 0x0009592c 0x8a720 ./Core/Src/i2c.o - .debug_str 0x0009592c 0x90f47 ./Core/Src/main.o - .debug_str 0x0009592c 0x8b0b6 ./Core/Src/rs485_driver.o - .debug_str 0x0009592c 0x8a1db ./Core/Src/stm32f1xx_hal_msp.o - .debug_str 0x0009592c 0x8a68b ./Core/Src/stm32f1xx_it.o - .debug_str 0x0009592c 0x89a79 ./Core/Src/system_stm32f1xx.o - .debug_str 0x0009592c 0x8a7e1 ./Core/Src/tim.o - .debug_str 0x0009592c 0x8a9b6 ./Core/Src/usart.o - .debug_str 0x0009592c 0x6e ./Core/Startup/startup_stm32f103c8tx.o - .debug_str 0x0009592c 0x8a1ac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_str 0x0009592c 0x8a15d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_str 0x0009592c 0x8a12d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o - .debug_str 0x0009592c 0x8a0f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_str 0x0009592c 0x89e22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_str 0x0009592c 0x89d54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o - .debug_str 0x0009592c 0x89f02 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o - .debug_str 0x0009592c 0x89dff ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_str 0x0009592c 0x8ab40 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_str 0x0009592c 0x89ea8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_str 0x0009592c 0x89bf8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_str 0x0009592c 0x8aeaa ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_str 0x0009592c 0x8a6b6 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_str 0x0009592c 0x8a519 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o +.debug_str 0x00000000 0x8d3f3 + .debug_str 0x00000000 0x8d3f3 ./Core/Src/ad5934_driver.o + 0x88195 (size before relaxing) + .debug_str 0x0008d3f3 0x838a4 ./Core/Src/adc.o + .debug_str 0x0008d3f3 0x8776a ./Core/Src/ads1015_driver.o + .debug_str 0x0008d3f3 0x8361b ./Core/Src/digital_outputs_driver.o + .debug_str 0x0008d3f3 0x8600d ./Core/Src/flash_manager.o + .debug_str 0x0008d3f3 0x835ad ./Core/Src/gpio.o + .debug_str 0x0008d3f3 0x839b9 ./Core/Src/i2c.o + .debug_str 0x0008d3f3 0x89def ./Core/Src/main.o + .debug_str 0x0008d3f3 0x8436d ./Core/Src/rs485_driver.o + .debug_str 0x0008d3f3 0x83474 ./Core/Src/stm32f1xx_hal_msp.o + .debug_str 0x0008d3f3 0x838c4 ./Core/Src/stm32f1xx_it.o + .debug_str 0x0008d3f3 0x82d30 ./Core/Src/system_stm32f1xx.o + .debug_str 0x0008d3f3 0x83c4f ./Core/Src/usart.o + .debug_str 0x0008d3f3 0x6e ./Core/Startup/startup_stm32f103c8tx.o + .debug_str 0x0008d3f3 0x83463 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_str 0x0008d3f3 0x83414 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_str 0x0008d3f3 0x833af ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_str 0x0008d3f3 0x830d9 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_str 0x0008d3f3 0x8300b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o + .debug_str 0x0008d3f3 0x831b9 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.o + .debug_str 0x0008d3f3 0x830b6 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_str 0x0008d3f3 0x83df7 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_str 0x0008d3f3 0x8315f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_str 0x0008d3f3 0x82eaf ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_str 0x0008d3f3 0x837d0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .comment 0x00000000 0x43 .comment 0x00000000 0x43 ./Core/Src/ad5934_driver.o @@ -5703,7 +4857,6 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .comment 0x00000043 0x44 ./Core/Src/adc.o .comment 0x00000043 0x44 ./Core/Src/ads1015_driver.o .comment 0x00000043 0x44 ./Core/Src/digital_outputs_driver.o - .comment 0x00000043 0x44 ./Core/Src/dma.o .comment 0x00000043 0x44 ./Core/Src/flash_manager.o .comment 0x00000043 0x44 ./Core/Src/gpio.o .comment 0x00000043 0x44 ./Core/Src/i2c.o @@ -5712,11 +4865,9 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .comment 0x00000043 0x44 ./Core/Src/stm32f1xx_hal_msp.o .comment 0x00000043 0x44 ./Core/Src/stm32f1xx_it.o .comment 0x00000043 0x44 ./Core/Src/system_stm32f1xx.o - .comment 0x00000043 0x44 ./Core/Src/tim.o .comment 0x00000043 0x44 ./Core/Src/usart.o .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.o .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.o @@ -5725,59 +4876,51 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_frame 0x00000000 0x5410 - .debug_frame 0x00000000 0x224 ./Core/Src/ad5934_driver.o - .debug_frame 0x00000224 0xa0 ./Core/Src/adc.o - .debug_frame 0x000002c4 0x1e8 ./Core/Src/ads1015_driver.o - .debug_frame 0x000004ac 0xc4 ./Core/Src/digital_outputs_driver.o - .debug_frame 0x00000570 0x34 ./Core/Src/dma.o - .debug_frame 0x000005a4 0x5c ./Core/Src/flash_manager.o - .debug_frame 0x00000600 0x58 ./Core/Src/gpio.o - .debug_frame 0x00000658 0x90 ./Core/Src/i2c.o - .debug_frame 0x000006e8 0xe0 ./Core/Src/main.o - .debug_frame 0x000007c8 0x15c ./Core/Src/rs485_driver.o - .debug_frame 0x00000924 0x34 ./Core/Src/stm32f1xx_hal_msp.o - .debug_frame 0x00000958 0x14c ./Core/Src/stm32f1xx_it.o - .debug_frame 0x00000aa4 0x50 ./Core/Src/system_stm32f1xx.o - .debug_frame 0x00000af4 0x7c ./Core/Src/tim.o - .debug_frame 0x00000b70 0x74 ./Core/Src/usart.o - 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./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_frame 0x00003f1c 0x600 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_frame 0x0000451c 0x8dc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - .debug_frame 0x00004df8 0x144 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) - .debug_frame 0x00004f3c 0x20 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memset.o) - .debug_frame 0x00004f5c 0x20 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-errno.o) - .debug_frame 0x00004f7c 0x2c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-init.o) - .debug_frame 0x00004fa8 0x28 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memcpy-stub.o) - .debug_frame 0x00004fd0 0x20 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) - .debug_frame 0x00004ff0 0x2c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-wf_sqrt.o) - .debug_frame 0x0000501c 0x30 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) - .debug_frame 0x0000504c 0x28 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C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) + .debug_frame 0x00003a3c 0x24 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixsfsi.o) .debug_line_str 0x00000000 0x52 diff --git a/Fertirrega_v6/Debug/objects.list b/Fertirrega_v6/Debug/objects.list index fbb812a..f9c78b7 100644 --- a/Fertirrega_v6/Debug/objects.list +++ b/Fertirrega_v6/Debug/objects.list @@ -3,7 +3,6 @@ "./Core/Src/ads1015_driver.o" "./Core/Src/analog_loop_driver.o" "./Core/Src/digital_outputs_driver.o" -"./Core/Src/dma.o" "./Core/Src/flash_manager.o" "./Core/Src/gpio.o" "./Core/Src/i2c.o" @@ -14,7 +13,6 @@ "./Core/Src/syscalls.o" "./Core/Src/sysmem.o" "./Core/Src/system_stm32f1xx.o" -"./Core/Src/tim.o" "./Core/Src/usart.o" "./Core/Startup/startup_stm32f103c8tx.o" "./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o" @@ -31,6 +29,4 @@ "./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.o" "./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o" "./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o" -"./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o" "./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o" diff --git a/Fertirrega_v6/Fertirrega_v6.ioc b/Fertirrega_v6/Fertirrega_v6.ioc index 4b2a143..9ea7627 100644 --- a/Fertirrega_v6/Fertirrega_v6.ioc +++ b/Fertirrega_v6/Fertirrega_v6.ioc @@ -1,18 +1,13 @@ #MicroXplorer Configuration settings - do not modify -ADC1.Channel-4\#ChannelRegularConversion=ADC_CHANNEL_VREFINT -ADC1.Channel-5\#ChannelRegularConversion=ADC_CHANNEL_TEMPSENSOR -ADC1.ContinuousConvMode=DISABLE -ADC1.ExternalTrigConv=ADC_EXTERNALTRIGCONV_T3_TRGO -ADC1.IPParameters=Rank-4\#ChannelRegularConversion,Channel-4\#ChannelRegularConversion,SamplingTime-4\#ChannelRegularConversion,NbrOfConversionFlag,ContinuousConvMode,master,Rank-5\#ChannelRegularConversion,Channel-5\#ChannelRegularConversion,SamplingTime-5\#ChannelRegularConversion,NbrOfConversion,ExternalTrigConv -ADC1.NbrOfConversion=2 +ADC1.Channel-6\#ChannelRegularConversion=ADC_CHANNEL_0 +ADC1.ContinuousConvMode=ENABLE +ADC1.IPParameters=Rank-6\#ChannelRegularConversion,master,Channel-6\#ChannelRegularConversion,SamplingTime-6\#ChannelRegularConversion,NbrOfConversionFlag,ContinuousConvMode ADC1.NbrOfConversionFlag=1 -ADC1.Rank-4\#ChannelRegularConversion=1 -ADC1.Rank-5\#ChannelRegularConversion=2 -ADC1.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5 -ADC1.SamplingTime-5\#ChannelRegularConversion=ADC_SAMPLETIME_239CYCLES_5 +ADC1.Rank-6\#ChannelRegularConversion=1 +ADC1.SamplingTime-6\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 ADC1.master=1 ADC2.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_1 -ADC2.ContinuousConvMode=DISABLE +ADC2.ContinuousConvMode=ENABLE ADC2.IPParameters=Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,NbrOfConversionFlag,ContinuousConvMode ADC2.NbrOfConversionFlag=1 ADC2.Rank-3\#ChannelRegularConversion=1 @@ -20,17 +15,6 @@ ADC2.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5 CAD.formats=[] CAD.pinconfig=Dual CAD.provider=Component Search Engine -Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY -Dma.ADC1.0.Instance=DMA1_Channel1 -Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD -Dma.ADC1.0.MemInc=DMA_MINC_ENABLE -Dma.ADC1.0.Mode=DMA_CIRCULAR -Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD -Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE -Dma.ADC1.0.Priority=DMA_PRIORITY_LOW -Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority -Dma.Request0=ADC1 -Dma.RequestsNb=1 File.Version=6 GPIO.groupedBy=Group By Peripherals KeepUserPlacement=false @@ -38,15 +22,13 @@ Mcu.CPN=STM32F103C8T6 Mcu.Family=STM32F1 Mcu.IP0=ADC1 Mcu.IP1=ADC2 -Mcu.IP2=DMA -Mcu.IP3=I2C1 -Mcu.IP4=I2C2 -Mcu.IP5=NVIC -Mcu.IP6=RCC -Mcu.IP7=SYS -Mcu.IP8=TIM3 -Mcu.IP9=USART1 -Mcu.IPNb=10 +Mcu.IP2=I2C1 +Mcu.IP3=I2C2 +Mcu.IP4=NVIC +Mcu.IP5=RCC +Mcu.IP6=SYS +Mcu.IP7=USART1 +Mcu.IPNb=8 Mcu.Name=STM32F103C(8-B)Tx Mcu.Package=LQFP48 Mcu.Pin0=PC13-TAMPER-RTC @@ -80,26 +62,21 @@ Mcu.Pin33=PB6 Mcu.Pin34=PB7 Mcu.Pin35=PB8 Mcu.Pin36=PB9 -Mcu.Pin37=VP_ADC1_TempSens_Input -Mcu.Pin38=VP_ADC1_Vref_Input -Mcu.Pin39=VP_SYS_VS_Systick +Mcu.Pin37=VP_SYS_VS_Systick Mcu.Pin4=PD1-OSC_OUT -Mcu.Pin40=VP_TIM3_VS_ClockSourceINT Mcu.Pin5=PA0-WKUP Mcu.Pin6=PA1 Mcu.Pin7=PA2 Mcu.Pin8=PA3 Mcu.Pin9=PA4 -Mcu.PinsNb=41 +Mcu.PinsNb=38 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32F103C8Tx MxCube.Version=6.17.0 MxDb.Version=DB.6.0.170 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false -NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false -NVIC.EXTI3_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true NVIC.ForceEnableDMAVector=true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false @@ -230,12 +207,11 @@ PB2.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD PB2.GPIO_PuPd=GPIO_NOPULL PB2.Locked=true PB2.Signal=GPIO_Output -PB3.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI +PB3.GPIOParameters=GPIO_PuPd,GPIO_Label PB3.GPIO_Label=Calib_PH -PB3.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_RISING_FALLING PB3.GPIO_PuPd=GPIO_PULLUP PB3.Locked=true -PB3.Signal=GPXTI3 +PB3.Signal=GPIO_Input PB4.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP PB4.GPIO_Label=LED_Red PB4.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD @@ -335,7 +311,7 @@ ProjectManager.ToolChainLocation= ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptBeforePath= ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_ADC2_Init-ADC2-false-HAL-true,6-MX_I2C1_Init-I2C1-false-HAL-true,7-MX_I2C2_Init-I2C2-false-HAL-true,8-MX_USART1_UART_Init-USART1-false-HAL-true,9-MX_TIM3_Init-TIM3-false-HAL-true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_ADC2_Init-ADC2-false-HAL-true,5-MX_I2C1_Init-I2C1-false-HAL-true,6-MX_I2C2_Init-I2C2-false-HAL-true,7-MX_USART1_UART_Init-USART1-false-HAL-true RCC.ADCFreqValue=1500000 RCC.ADCPresc=RCC_ADCPCLK2_DIV8 RCC.AHBFreq_Value=12000000 @@ -347,7 +323,7 @@ RCC.FCLKCortexFreq_Value=12000000 RCC.FamilyName=M RCC.HCLKFreq_Value=12000000 RCC.HSE_VALUE=12000000 -RCC.IPParameters=ADCFreqValue,ADCPresc,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLSourceVirtual,PREFETCH_ENABLE,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,VCOOutput2Freq_Value +RCC.IPParameters=ADCFreqValue,ADCPresc,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLSourceVirtual,PREFETCH_ENABLE,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,TimSys_Div,USBFreq_Value,VCOOutput2Freq_Value RCC.MCOFreq_Value=12000000 RCC.PLLCLKFreq_Value=24000000 RCC.PLLMCOFreq_Value=12000000 @@ -355,30 +331,18 @@ RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE RCC.PREFETCH_ENABLE=1 RCC.SYSCLKFreq_VALUE=12000000 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_HSE -RCC.TimSysFreq_Value=12000000 +RCC.TimSysFreq_Value=1500000 +RCC.TimSys_Div=SYSTICK_CLKSOURCE_HCLK_DIV8 RCC.USBFreq_Value=24000000 RCC.VCOOutput2Freq_Value=12000000 -SH.ADCx_IN0.0=ADC1_IN0 -SH.ADCx_IN0.1=ADC2_IN0,IN0 +SH.ADCx_IN0.0=ADC2_IN0 +SH.ADCx_IN0.1=ADC1_IN0,IN0 SH.ADCx_IN0.ConfNb=2 SH.ADCx_IN1.0=ADC2_IN1,IN1 SH.ADCx_IN1.1=ADC1_IN1 SH.ADCx_IN1.ConfNb=2 -SH.GPXTI3.0=GPIO_EXTI3 -SH.GPXTI3.ConfNb=1 -TIM3.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_ENABLE -TIM3.IPParameters=Prescaler,Period,AutoReloadPreload,TIM_MasterOutputTrigger -TIM3.Period=59999 -TIM3.Prescaler=3 -TIM3.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE USART1.IPParameters=VirtualMode USART1.VirtualMode=VM_ASYNC -VP_ADC1_TempSens_Input.Mode=IN-TempSens -VP_ADC1_TempSens_Input.Signal=ADC1_TempSens_Input -VP_ADC1_Vref_Input.Mode=IN-Vrefint -VP_ADC1_Vref_Input.Signal=ADC1_Vref_Input VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick -VP_TIM3_VS_ClockSourceINT.Mode=Internal -VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT board=custom