From aae14ca9233d85ca1da73e014c04ea7544fb0362 Mon Sep 17 00:00:00 2001 From: hardware Date: Thu, 30 Jul 2026 18:00:52 +0100 Subject: [PATCH] Fertirrega_v6 with EC compensated by Temperature --- Fertirrega_v6/Core/Inc/ad5934_driver.h | 8 +- Fertirrega_v6/Core/Src/ad5934_driver.c | 22 +- Fertirrega_v6/Core/Src/main.c | 215 +- .../Debug/Core/Src/ad5934_driver.cyclo | 50 +- Fertirrega_v6/Debug/Core/Src/ad5934_driver.o | Bin 831544 -> 832696 bytes Fertirrega_v6/Debug/Core/Src/ad5934_driver.su | 50 +- Fertirrega_v6/Debug/Core/Src/main.cyclo | 12 +- Fertirrega_v6/Debug/Core/Src/main.d | 4 +- Fertirrega_v6/Debug/Core/Src/main.o | Bin 835976 -> 834284 bytes Fertirrega_v6/Debug/Core/Src/main.su | 12 +- Fertirrega_v6/Debug/Fertirrega_v6.elf | Bin 989300 -> 989552 bytes Fertirrega_v6/Debug/Fertirrega_v6.list | 20086 ++++++++-------- Fertirrega_v6/Debug/Fertirrega_v6.map | 1260 +- 13 files changed, 10906 insertions(+), 10813 deletions(-) diff --git a/Fertirrega_v6/Core/Inc/ad5934_driver.h b/Fertirrega_v6/Core/Inc/ad5934_driver.h index b6ac621..7c2daaf 100644 --- a/Fertirrega_v6/Core/Inc/ad5934_driver.h +++ b/Fertirrega_v6/Core/Inc/ad5934_driver.h @@ -164,8 +164,8 @@ extern "C" { /*****************************************************************************/ /**************************** Filtering Defines *****************************/ /*****************************************************************************/ -#define AD5934_TIME_PER_SWEEP 60 // 60 ms entre o início de cada sweep -#define AD5934_TIME_MUX_SETTLING 10 // 10 ms de espera após trocar o MUX +#define AD5934_TIME_PER_SWEEP 60 // 60 ms entre o início de cada sweep +#define AD5934_TIME_MUX_SETTLING 10 // 10 ms de espera após trocar o MUX #define AD5934_BURST_SIZE 5 #define AD5934_TRIM_COUNT 1 @@ -357,6 +357,7 @@ static const uint16_t AD5934_Scale_Out_Max[AD5934_CH_MAX] = { extern I2C_HandleTypeDef hi2c2; +extern float reference_resistor, temperature_RTD, thermal_compensaded_EC; extern volatile AD5934_State_t ad5934_state; extern volatile uint32_t g_ms_counter; // Increment each 1ms Timer @@ -364,6 +365,9 @@ extern volatile uint32_t g_ms_counter; // Increment each 1ms Timer extern uint8_t current_mux_channel; extern uint8_t sweep_count; // Count how many sweeps done at the same channel now (0 a 7) extern uint8_t is_new_channel; +extern uint8_t current_ec_mux; +extern uint8_t current_rtd_mux; +extern uint8_t current_ref_mux; extern AD5934_filter_t g_rtd_filter, g_ec_filter, g_ref_filter; diff --git a/Fertirrega_v6/Core/Src/ad5934_driver.c b/Fertirrega_v6/Core/Src/ad5934_driver.c index c84d16e..0effacd 100644 --- a/Fertirrega_v6/Core/Src/ad5934_driver.c +++ b/Fertirrega_v6/Core/Src/ad5934_driver.c @@ -15,8 +15,13 @@ volatile AD5934_State_t ad5934_state = AD5934_IDLE; volatile uint32_t g_ms_counter = 0; /* Incrementado a cada 1ms no Timer */ +float reference_resistor = 0, temperature_RTD = 0, thermal_compensaded_EC = 0; + uint8_t current_mux_channel = AD5934_ID_RTD; uint8_t current_hw_mux_connection = ADG715_Channel_Map[AD5934_CH_RTD_LOW_GAIN]; // PT100 Connection +uint8_t current_ec_mux = AD5934_CH_EC_MID_GAIN; +uint8_t current_rtd_mux = AD5934_CH_RTD_LOW_GAIN; +uint8_t current_ref_mux = AD5934_CH_REF100R_LOW_GAIN; uint8_t sweep_count = 0; /* Conta quantos sweeps foram feitos no canal atual (0 a 7) */ @@ -205,9 +210,10 @@ float AD5934_Calculate_Temperature(float mag_ref, float mag_dut) float ratio_mag = mag_ref / mag_dut; - if(ch_ref==AD5934_CH_REF100R_LOW_GAIN) // only for PT100 + // This correction isn't validated + /*if(ch_ref==AD5934_CH_REF100R_LOW_GAIN) // only for PT100 impedance_dut = AD5934_Linear_Correction(gain_factor * ratio_mag); - else + else*/ impedance_dut = gain_factor * ratio_mag; // Calculate impedance ratio with the Reference Resistor @@ -503,23 +509,23 @@ void AD5934_Process_System(void) { case AD5934_ID_RTD: if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - current_hw_mux_connection = AD5934_CH_RTD_LOW_GAIN; //PT100 + current_rtd_mux = current_hw_mux_connection = AD5934_CH_RTD_LOW_GAIN; //PT100 else - current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 + current_rtd_mux = current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 break; case AD5934_ID_EC: if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) // Hardware Setup: Gain Selection (PA6) - current_hw_mux_connection = AD5934_CH_EC_HIGH_GAIN; + current_ec_mux = current_hw_mux_connection = AD5934_CH_EC_HIGH_GAIN; else - current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; + current_ec_mux = current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; break; case AD5934_ID_REF: if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - current_hw_mux_connection = AD5934_CH_REF100R_LOW_GAIN; // 100 Ohms Reference Resistor + current_ref_mux = current_hw_mux_connection = AD5934_CH_REF100R_LOW_GAIN; // 100 Ohms Reference Resistor else - current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor + current_ref_mux = current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor break; } ADG715_SetChannels(current_hw_mux_connection); // Change the analog mux diff --git a/Fertirrega_v6/Core/Src/main.c b/Fertirrega_v6/Core/Src/main.c index 44ea5ba..0446b96 100644 --- a/Fertirrega_v6/Core/Src/main.c +++ b/Fertirrega_v6/Core/Src/main.c @@ -30,7 +30,6 @@ #include "digital_outputs_driver.h" #include "ad5934_driver.h" #include "rs485_driver.h" -#include "flash_manager.h" #include @@ -43,10 +42,7 @@ /* Private define ------------------------------------------------------------*/ /* USER CODE BEGIN PD */ -#define AVG_SLOPE (4.3F) -#define V_AT_25C (1.43F) -#define V_REF_INT (1.2F) -#define STM32_TEMPERATURE_AVERAGES 4 + /* USER CODE END PD */ /* Private macro -------------------------------------------------------------*/ @@ -59,29 +55,6 @@ /* USER CODE BEGIN PV */ -uint8_t newline[]={'\r','\n'}; -uint8_t doubleSpace[]={'_','_','\0'}; -uint8_t newline_ph[]={'_','p','H','\n','\0'}; -uint8_t newline_admi[]={'_','u','S','\n','\0'}; -uint8_t newline_temp[]={' ','°','C','\n','\0'}; -uint8_t newline_imag[]={'_','O','h','m','\n','\0'}; -uint8_t newline_485[]={'_','a','d','\n','\0'}; -uint8_t minus[]={'-',' '}; -uint8_t ad_t[]={'A','d',':',' ','\0'}; -uint8_t ph_t[]={'p','H',':',' ','\0'}; -uint8_t tm_t[]={'T','M',':',' ','\0'}; - -uint8_t main_state = STATE_RUNNING_OK; -uint8_t rs485_address=0; - -/* -uint16_t AD_RES[2]; -uint8_t UpdateEvent = 0; -float Temperature, Temp_Sum, V_Sense, V_Ref; -float Temp_Samples[STM32_TEMPERATURE_AVERAGES]={0}; -*/ - - /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ @@ -106,16 +79,17 @@ int main(void) { /* USER CODE BEGIN 1 */ - uint8_t tempString[15] = {0}; - uint8_t i; - uint8_t mux_connection = 0; + uint8_t tempString[15] = {0}; + + uint8_t averages = 0; + uint8_t newline = '\n'; // Variables for timing uint32_t previous_millis_green = 0; uint32_t previous_millis_red = 0; uint32_t current_millis; - //float temperature_RTD, admittance_EC, refResistance, update_value, ph7_interp, ph4_interp, ph_compensated; + /* USER CODE END 1 */ @@ -148,11 +122,6 @@ int main(void) HAL_TIM_Base_Start_IT(&htim3); - /* - TempSensor_Init(&hadc1); - HAL_ADCEx_Calibration_Start(&hadc1); - HAL_ADC_Start_DMA(&hadc1, (uint32_t*)AD_RES, 2); // Internal Temperature conversion - */ HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); // LED Green Off HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); // LED Red Off @@ -167,83 +136,28 @@ int main(void) /* Infinite loop */ /* USER CODE BEGIN WHILE */ -/* - for(i=0;i 0; i--) - Temp_Samples[i] = Temp_Samples[i-1]; - - - // Read real and imaginary data - if(AD_RES[0]>0.0f) - V_Ref = (float)((V_REF_INT * 4095.0)/AD_RES[0]); - else - V_Ref = 0.0f; - V_Sense = (float)(AD_RES[1] * V_Ref) / 4095.0; - Temp_Samples[0] = (((V_AT_25C - V_Sense) * 1000.0) /AVG_SLOPE) + 25.0; - - for (i = 0, Temp_Sum=0; i < STM32_TEMPERATURE_AVERAGES; i++) - Temp_Sum += Temp_Samples[i]; - - Temperature = Temp_Sum/((float)STM32_TEMPERATURE_AVERAGES); - - UpdateEvent = 0; - } - */ } @@ -555,14 +434,6 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) } - -/* -void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) -{ - UpdateEvent = 1; // Internal TEmperature -} -*/ - /* USER CODE END 4 */ /** diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo index 9171845..97633f6 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo @@ -1,25 +1,25 @@ -../Core/Src/ad5934_driver.c:40:6:AD5934_SetRegisterValue 2 -../Core/Src/ad5934_driver.c:68:10:AD5934_GetRegisterValue 3 -../Core/Src/ad5934_driver.c:103:6:AD5934_Init 1 -../Core/Src/ad5934_driver.c:134:6:AD5934_RestartSweep 1 -../Core/Src/ad5934_driver.c:157:6:AD5934_Repeat_Sweep 1 -../Core/Src/ad5934_driver.c:170:6:AD5934_StopSweep 1 -../Core/Src/ad5934_driver.c:190:7:AD5934_Calculate_Temperature 3 -../Core/Src/ad5934_driver.c:231:7:AD5934_EC_Compensate_Magnitude_To_25C 2 -../Core/Src/ad5934_driver.c:246:7:AD5934_EC_Calibrate_Temperature 5 -../Core/Src/ad5934_driver.c:292:7:AD5934_GetMagnitude 1 -../Core/Src/ad5934_driver.c:317:10:AD5934_Compress_To_IntScale 5 -../Core/Src/ad5934_driver.c:347:7:AD5934_Round_Float_Precision 2 -../Core/Src/ad5934_driver.c:372:7:AD5934_Linear_Correction 1 -../Core/Src/ad5934_driver.c:391:7:AD5934_Calibrate 1 -../Core/Src/ad5934_driver.c:413:6:AD5934_Process_System 24 -../Core/Src/ad5934_driver.c:538:6:AD5934_Sort_Array 4 -../Core/Src/ad5934_driver.c:560:7:AD5934_Trimmed_Mean 3 -../Core/Src/ad5934_driver.c:586:7:AD5934_History_Average 2 -../Core/Src/ad5934_driver.c:600:6:AD5934_Process_Sample 4 -../Core/Src/ad5934_driver.c:646:6:AD5934_RTD_NewSample 1 -../Core/Src/ad5934_driver.c:653:6:AD5934_EC_NewSample 1 -../Core/Src/ad5934_driver.c:660:6:AD5934_Reference_NewSample 1 -../Core/Src/ad5934_driver.c:676:6:ADG715_SetRegisterValue 1 -../Core/Src/ad5934_driver.c:694:6:ADG715_ResetChannels 1 -../Core/Src/ad5934_driver.c:706:6:ADG715_SetChannels 2 +../Core/Src/ad5934_driver.c:45:6:AD5934_SetRegisterValue 2 +../Core/Src/ad5934_driver.c:73:10:AD5934_GetRegisterValue 3 +../Core/Src/ad5934_driver.c:108:6:AD5934_Init 1 +../Core/Src/ad5934_driver.c:139:6:AD5934_RestartSweep 1 +../Core/Src/ad5934_driver.c:162:6:AD5934_Repeat_Sweep 1 +../Core/Src/ad5934_driver.c:175:6:AD5934_StopSweep 1 +../Core/Src/ad5934_driver.c:195:7:AD5934_Calculate_Temperature 2 +../Core/Src/ad5934_driver.c:237:7:AD5934_EC_Compensate_Magnitude_To_25C 2 +../Core/Src/ad5934_driver.c:252:7:AD5934_EC_Calibrate_Temperature 5 +../Core/Src/ad5934_driver.c:298:7:AD5934_GetMagnitude 1 +../Core/Src/ad5934_driver.c:323:10:AD5934_Compress_To_IntScale 5 +../Core/Src/ad5934_driver.c:353:7:AD5934_Round_Float_Precision 2 +../Core/Src/ad5934_driver.c:378:7:AD5934_Linear_Correction 1 +../Core/Src/ad5934_driver.c:397:7:AD5934_Calibrate 1 +../Core/Src/ad5934_driver.c:419:6:AD5934_Process_System 24 +../Core/Src/ad5934_driver.c:544:6:AD5934_Sort_Array 4 +../Core/Src/ad5934_driver.c:566:7:AD5934_Trimmed_Mean 3 +../Core/Src/ad5934_driver.c:592:7:AD5934_History_Average 2 +../Core/Src/ad5934_driver.c:606:6:AD5934_Process_Sample 4 +../Core/Src/ad5934_driver.c:652:6:AD5934_RTD_NewSample 1 +../Core/Src/ad5934_driver.c:659:6:AD5934_EC_NewSample 1 +../Core/Src/ad5934_driver.c:666:6:AD5934_Reference_NewSample 1 +../Core/Src/ad5934_driver.c:682:6:ADG715_SetRegisterValue 1 +../Core/Src/ad5934_driver.c:700:6:ADG715_ResetChannels 1 +../Core/Src/ad5934_driver.c:712:6:ADG715_SetChannels 2 diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o index 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b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su index 2858318..e5eddbe 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su @@ -1,25 +1,25 @@ -../Core/Src/ad5934_driver.c:40:6:AD5934_SetRegisterValue 32 static -../Core/Src/ad5934_driver.c:68:10:AD5934_GetRegisterValue 40 static -../Core/Src/ad5934_driver.c:103:6:AD5934_Init 8 static -../Core/Src/ad5934_driver.c:134:6:AD5934_RestartSweep 8 static -../Core/Src/ad5934_driver.c:157:6:AD5934_Repeat_Sweep 8 static -../Core/Src/ad5934_driver.c:170:6:AD5934_StopSweep 8 static -../Core/Src/ad5934_driver.c:190:7:AD5934_Calculate_Temperature 40 static -../Core/Src/ad5934_driver.c:231:7:AD5934_EC_Compensate_Magnitude_To_25C 24 static -../Core/Src/ad5934_driver.c:246:7:AD5934_EC_Calibrate_Temperature 152 static -../Core/Src/ad5934_driver.c:292:7:AD5934_GetMagnitude 24 static -../Core/Src/ad5934_driver.c:317:10:AD5934_Compress_To_IntScale 32 static -../Core/Src/ad5934_driver.c:347:7:AD5934_Round_Float_Precision 24 static -../Core/Src/ad5934_driver.c:372:7:AD5934_Linear_Correction 24 static -../Core/Src/ad5934_driver.c:391:7:AD5934_Calibrate 48 static -../Core/Src/ad5934_driver.c:413:6:AD5934_Process_System 16 static -../Core/Src/ad5934_driver.c:538:6:AD5934_Sort_Array 24 static -../Core/Src/ad5934_driver.c:560:7:AD5934_Trimmed_Mean 32 static -../Core/Src/ad5934_driver.c:586:7:AD5934_History_Average 24 static -../Core/Src/ad5934_driver.c:600:6:AD5934_Process_Sample 32 static -../Core/Src/ad5934_driver.c:646:6:AD5934_RTD_NewSample 16 static -../Core/Src/ad5934_driver.c:653:6:AD5934_EC_NewSample 16 static -../Core/Src/ad5934_driver.c:660:6:AD5934_Reference_NewSample 16 static -../Core/Src/ad5934_driver.c:676:6:ADG715_SetRegisterValue 32 static -../Core/Src/ad5934_driver.c:694:6:ADG715_ResetChannels 8 static -../Core/Src/ad5934_driver.c:706:6:ADG715_SetChannels 16 static +../Core/Src/ad5934_driver.c:45:6:AD5934_SetRegisterValue 32 static +../Core/Src/ad5934_driver.c:73:10:AD5934_GetRegisterValue 40 static +../Core/Src/ad5934_driver.c:108:6:AD5934_Init 8 static +../Core/Src/ad5934_driver.c:139:6:AD5934_RestartSweep 8 static +../Core/Src/ad5934_driver.c:162:6:AD5934_Repeat_Sweep 8 static +../Core/Src/ad5934_driver.c:175:6:AD5934_StopSweep 8 static +../Core/Src/ad5934_driver.c:195:7:AD5934_Calculate_Temperature 40 static +../Core/Src/ad5934_driver.c:237:7:AD5934_EC_Compensate_Magnitude_To_25C 24 static +../Core/Src/ad5934_driver.c:252:7:AD5934_EC_Calibrate_Temperature 152 static +../Core/Src/ad5934_driver.c:298:7:AD5934_GetMagnitude 24 static +../Core/Src/ad5934_driver.c:323:10:AD5934_Compress_To_IntScale 32 static +../Core/Src/ad5934_driver.c:353:7:AD5934_Round_Float_Precision 24 static +../Core/Src/ad5934_driver.c:378:7:AD5934_Linear_Correction 24 static +../Core/Src/ad5934_driver.c:397:7:AD5934_Calibrate 48 static +../Core/Src/ad5934_driver.c:419:6:AD5934_Process_System 16 static +../Core/Src/ad5934_driver.c:544:6:AD5934_Sort_Array 24 static +../Core/Src/ad5934_driver.c:566:7:AD5934_Trimmed_Mean 32 static +../Core/Src/ad5934_driver.c:592:7:AD5934_History_Average 24 static +../Core/Src/ad5934_driver.c:606:6:AD5934_Process_Sample 32 static +../Core/Src/ad5934_driver.c:652:6:AD5934_RTD_NewSample 16 static +../Core/Src/ad5934_driver.c:659:6:AD5934_EC_NewSample 16 static +../Core/Src/ad5934_driver.c:666:6:AD5934_Reference_NewSample 16 static +../Core/Src/ad5934_driver.c:682:6:ADG715_SetRegisterValue 32 static +../Core/Src/ad5934_driver.c:700:6:ADG715_ResetChannels 8 static +../Core/Src/ad5934_driver.c:712:6:ADG715_SetChannels 16 static diff --git a/Fertirrega_v6/Debug/Core/Src/main.cyclo b/Fertirrega_v6/Debug/Core/Src/main.cyclo index f5c15e9..719cab9 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/main.cyclo @@ -1,6 +1,6 @@ -../Core/Src/main.c:105:5:main 10 -../Core/Src/main.c:377:6:SystemClock_Config 4 -../Core/Src/main.c:428:6:FloatToString 8 -../Core/Src/main.c:490:6:intToStr 12 -../Core/Src/main.c:548:6:HAL_TIM_PeriodElapsedCallback 2 -../Core/Src/main.c:572:6:Error_Handler 1 +../Core/Src/main.c:78:5:main 10 +../Core/Src/main.c:256:6:SystemClock_Config 4 +../Core/Src/main.c:307:6:FloatToString 8 +../Core/Src/main.c:369:6:intToStr 12 +../Core/Src/main.c:427:6:HAL_TIM_PeriodElapsedCallback 2 +../Core/Src/main.c:443:6:Error_Handler 1 diff --git a/Fertirrega_v6/Debug/Core/Src/main.d b/Fertirrega_v6/Debug/Core/Src/main.d index 13325cb..70c5024 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.d +++ b/Fertirrega_v6/Debug/Core/Src/main.d @@ -31,8 +31,7 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Core/Inc/usart.h ../Core/Inc/gpio.h ../Core/Inc/ads1015_driver.h \ ../Core/Inc/flash_manager.h ../Core/Inc/digital_outputs_driver.h \ ../Core/Inc/ad5934_driver.h ../Core/Inc/rs485_driver.h \ - ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h \ - ../Core/Inc/flash_manager.h + ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h ../Core/Inc/main.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h: ../Core/Inc/stm32f1xx_hal_conf.h: @@ -74,4 +73,3 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ ../Core/Inc/ad5934_driver.h: ../Core/Inc/rs485_driver.h: ../Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h: -../Core/Inc/flash_manager.h: diff --git a/Fertirrega_v6/Debug/Core/Src/main.o b/Fertirrega_v6/Debug/Core/Src/main.o index 4fe11e27ba528d3d4237e9617ecb2bfa97eb7583..9bb39e4620c6f81b483be22f73f983faea1e10bb 100644 GIT binary patch delta 229614 zcmb5W2UHbT*FQXSr{0-6w}N69d+)us7+YdZ)Yy$tV@x!*SQ0PA4ycIIrHP6HqJj-n zniUZhEZ7yh*cA)5|8HMzp7;5`-?zTCK3AB1cHigBnN#*TH!HkbJ}GIjwz}OAXkhS9 zXhlz^9`l4LW>}QQ;%^-Os5~Bj6P)FVfImCSlK_8lmL~&Fah9h7{^~4G1N_Zdo(}lC zv-}6(42H2g9Lxmrr;{-YaJI8N2XL;lJP+_MXL&y00%v(4;38-FZ@_Wc^mdk)ki=3avJ7y!v%CUurL(*W(8pQ!1@v>4R|Bqbme&IMJIm_;1DxgcfE%3U zK)@hpIT$d6$`oNJ{=x{sUpW3YI?EA&kMX|rZgZBm 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zTh{jeCBeR&_K*4o7jtqd7KQH*2)>-J#ZFa2_|E~s&^(=E)`g{I!LWRNUECPnTSl<% zR;mk^C|F-tG=>`p&ew8&Rb%*8Sui3|7oI5#DhoAg>Y7dC9l&k$>ZVh^56~> zX7iD^8R6itiLW^oUk!g<9t=$!3J(jb{~LZ*9^9U{lbZ`33kO#O!}7k^)5A1{wfg!K z-jDJ~SkKqQk#I`|DV025Y|e)J6>=p!N64L%j}_|*lfCC}7Xu@gnp1x&: 8000130: b508 push {r3, lr} @@ -75,8 +75,8 @@ Disassembly of section .text: 800013a: f3af 8000 nop.w 800013e: bd08 pop {r3, pc} 8000140: 00000000 .word 0x00000000 - 8000144: 20000068 .word 0x20000068 - 8000148: 0800600c .word 0x0800600c + 8000144: 20000064 .word 0x20000064 + 8000148: 08006180 .word 0x08006180 0800014c : 800014c: 4603 mov r3, r0 @@ -696,7 +696,7 @@ void AD5934_SetRegisterValue(uint8_t registerAddress, uint32_t registerValue, ui 80007ac: 2302 movs r3, #2 80007ae: 211a movs r1, #26 80007b0: 4807 ldr r0, [pc, #28] @ (80007d0 ) - 80007b2: f002 fda9 bl 8003308 + 80007b2: f002 fe63 bl 800347c 80007b6: 4603 mov r3, r0 80007b8: 73bb strb r3, [r7, #14] for (uint8_t i = 0; i < numberOfBytes; i++) @@ -716,7 +716,7 @@ void AD5934_SetRegisterValue(uint8_t registerAddress, uint32_t registerValue, ui 80007ca: 3710 adds r7, #16 80007cc: 46bd mov sp, r7 80007ce: bd80 pop {r7, pc} - 80007d0: 20000268 .word 0x20000268 + 80007d0: 20000270 .word 0x20000270 080007d4 : * @param numberOfBytes - Number of bytes to be read from the register. @@ -772,7 +772,7 @@ uint32_t AD5934_GetRegisterValue(uint8_t registerAddress, uint8_t numberOfBytes) 8000814: 2302 movs r3, #2 8000816: 211a movs r1, #26 8000818: 4811 ldr r0, [pc, #68] @ (8000860 ) - 800081a: f002 fd75 bl 8003308 + 800081a: f002 fe2f bl 800347c 800081e: 4603 mov r3, r0 8000820: 75bb strb r3, [r7, #22] @@ -787,7 +787,7 @@ uint32_t AD5934_GetRegisterValue(uint8_t registerAddress, uint8_t numberOfBytes) 800082e: 2301 movs r3, #1 8000830: 211a movs r1, #26 8000832: 480b ldr r0, [pc, #44] @ (8000860 ) - 8000834: f002 fe66 bl 8003504 + 8000834: f002 ff20 bl 8003678 8000838: 4603 mov r3, r0 800083a: 75bb strb r3, [r7, #22] AD5934_reg.bytes[i]=readData[0]; @@ -814,7 +814,7 @@ uint32_t AD5934_GetRegisterValue(uint8_t registerAddress, uint8_t numberOfBytes) 800085a: 3718 adds r7, #24 800085c: 46bd mov sp, r7 800085e: bd80 pop {r7, pc} - 8000860: 20000268 .word 0x20000268 + 8000860: 20000270 .word 0x20000270 08000864 : * @param None. @@ -827,7 +827,7 @@ void AD5934_Init(void) 8000866: af00 add r7, sp, #0 ADG715_ResetChannels(); // Disconnects Analog Switch on the CE / RTD / Ref Resistor - 8000868: f000 fbbc bl 8000fe4 + 8000868: f000 fc60 bl 800112c /************ Config Sweep******************/ @@ -954,7803 +954,7768 @@ void AD5934_StopSweep(void) 80008f8: bf00 nop 80008fa: bd80 pop {r7, pc} -080008fc : +080008fc : +* @param mag_dut - Magnitude of the device under test. +* +* @return Temperature in Celsius. +******************************************************************************/ +float AD5934_Calculate_Temperature(float mag_ref, float mag_dut) +{ + 80008fc: b580 push {r7, lr} + 80008fe: b088 sub sp, #32 + 8000900: af00 add r7, sp, #0 + 8000902: 6078 str r0, [r7, #4] + 8000904: 6039 str r1, [r7, #0] + uint8_t ch_ref; + float gain_factor, impedance_dut, ratio, discriminant; + + if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND + 8000906: 2180 movs r1, #128 @ 0x80 + 8000908: 4821 ldr r0, [pc, #132] @ (8000990 ) + 800090a: f002 fc2b bl 8003164 + 800090e: 4603 mov r3, r0 + 8000910: 2b01 cmp r3, #1 + 8000912: d104 bne.n 800091e + { + ch_ref = AD5934_CH_RTD_LOW_GAIN; //PT100 + 8000914: 2309 movs r3, #9 + 8000916: 76fb strb r3, [r7, #27] + gain_factor = AD5934_GAIN_FACTOR_100R; + 8000918: 4b1e ldr r3, [pc, #120] @ (8000994 ) + 800091a: 61fb str r3, [r7, #28] + 800091c: e003 b.n 8000926 + } + else + { + ch_ref = AD5934_CH_RTD_MID_GAIN; //PT1000 + 800091e: 230a movs r3, #10 + 8000920: 76fb strb r3, [r7, #27] + gain_factor = AD5934_GAIN_FACTOR_1K; + 8000922: 4b1d ldr r3, [pc, #116] @ (8000998 ) + 8000924: 61fb str r3, [r7, #28] + } + + float ratio_mag = mag_ref / mag_dut; + 8000926: 6839 ldr r1, [r7, #0] + 8000928: 6878 ldr r0, [r7, #4] + 800092a: f7ff fdd9 bl 80004e0 <__aeabi_fdiv> + 800092e: 4603 mov r3, r0 + 8000930: 617b str r3, [r7, #20] + + // This correction isn't validated + /*if(ch_ref==AD5934_CH_REF100R_LOW_GAIN) // only for PT100 + impedance_dut = AD5934_Linear_Correction(gain_factor * ratio_mag); + else*/ + impedance_dut = gain_factor * ratio_mag; + 8000932: 6979 ldr r1, [r7, #20] + 8000934: 69f8 ldr r0, [r7, #28] + 8000936: f7ff fd1f bl 8000378 <__aeabi_fmul> + 800093a: 4603 mov r3, r0 + 800093c: 613b str r3, [r7, #16] + + // Calculate impedance ratio with the Reference Resistor + ratio = impedance_dut / gain_factor; + 800093e: 69f9 ldr r1, [r7, #28] + 8000940: 6938 ldr r0, [r7, #16] + 8000942: f7ff fdcd bl 80004e0 <__aeabi_fdiv> + 8000946: 4603 mov r3, r0 + 8000948: 60fb str r3, [r7, #12] + + // Calculate impedance discriminant with the ratio + discriminant = (AD5934_RTD_A*AD5934_RTD_A)-(4.0f * AD5934_RTD_B * (1.0f - ratio)); + 800094a: 68f9 ldr r1, [r7, #12] + 800094c: f04f 507e mov.w r0, #1065353216 @ 0x3f800000 + 8000950: f7ff fc08 bl 8000164 <__aeabi_fsub> + 8000954: 4603 mov r3, r0 + 8000956: 4911 ldr r1, [pc, #68] @ (800099c ) + 8000958: 4618 mov r0, r3 + 800095a: f7ff fd0d bl 8000378 <__aeabi_fmul> + 800095e: 4603 mov r3, r0 + 8000960: 490f ldr r1, [pc, #60] @ (80009a0 ) + 8000962: 4618 mov r0, r3 + 8000964: f7ff fc00 bl 8000168 <__addsf3> + 8000968: 4603 mov r3, r0 + 800096a: 60bb str r3, [r7, #8] + + return ((-AD5934_RTD_A + sqrtf(discriminant))/(2.0f * AD5934_RTD_B)); + 800096c: 68b8 ldr r0, [r7, #8] + 800096e: f005 fb77 bl 8006060 + 8000972: 4603 mov r3, r0 + 8000974: 490b ldr r1, [pc, #44] @ (80009a4 ) + 8000976: 4618 mov r0, r3 + 8000978: f7ff fbf4 bl 8000164 <__aeabi_fsub> + 800097c: 4603 mov r3, r0 + 800097e: 490a ldr r1, [pc, #40] @ (80009a8 ) + 8000980: 4618 mov r0, r3 + 8000982: f7ff fdad bl 80004e0 <__aeabi_fdiv> + 8000986: 4603 mov r3, r0 + +} + 8000988: 4618 mov r0, r3 + 800098a: 3720 adds r7, #32 + 800098c: 46bd mov sp, r7 + 800098e: bd80 pop {r7, pc} + 8000990: 40010800 .word 0x40010800 + 8000994: 42c80000 .word 0x42c80000 + 8000998: 447a0000 .word 0x447a0000 + 800099c: 361b057f .word 0x361b057f + 80009a0: 37802266 .word 0x37802266 + 80009a4: 3b801132 .word 0x3b801132 + 80009a8: b59b057f .word 0xb59b057f + +080009ac : + * @param temperature_dut The current temperature of the DUT (Device Under Test). + * + * @return The value of the Magnitude of the dut when it in 25C. + */ +float AD5934_EC_Compensate_Magnitude_To_25C(float mag_dut, float temperature_dut) +{ + 80009ac: b580 push {r7, lr} + 80009ae: b084 sub sp, #16 + 80009b0: af00 add r7, sp, #0 + 80009b2: 6078 str r0, [r7, #4] + 80009b4: 6039 str r1, [r7, #0] + float factor = 1.0f + AD5934_EC_ALPHA_PER_C * (temperature_dut - AD5934_EC_TEMP_REF_C); + 80009b6: 4911 ldr r1, [pc, #68] @ (80009fc ) + 80009b8: 6838 ldr r0, [r7, #0] + 80009ba: f7ff fbd3 bl 8000164 <__aeabi_fsub> + 80009be: 4603 mov r3, r0 + 80009c0: 490f ldr r1, [pc, #60] @ (8000a00 ) + 80009c2: 4618 mov r0, r3 + 80009c4: f7ff fcd8 bl 8000378 <__aeabi_fmul> + 80009c8: 4603 mov r3, r0 + 80009ca: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 + 80009ce: 4618 mov r0, r3 + 80009d0: f7ff fbca bl 8000168 <__addsf3> + 80009d4: 4603 mov r3, r0 + 80009d6: 60fb str r3, [r7, #12] + + if (factor < 0.1f) + 80009d8: 490a ldr r1, [pc, #40] @ (8000a04 ) + 80009da: 68f8 ldr r0, [r7, #12] + 80009dc: f7ff fe6a bl 80006b4 <__aeabi_fcmplt> + 80009e0: 4603 mov r3, r0 + 80009e2: 2b00 cmp r3, #0 + 80009e4: d001 beq.n 80009ea + factor = 0.1f; + 80009e6: 4b07 ldr r3, [pc, #28] @ (8000a04 ) + 80009e8: 60fb str r3, [r7, #12] + + return (mag_dut / factor); + 80009ea: 68f9 ldr r1, [r7, #12] + 80009ec: 6878 ldr r0, [r7, #4] + 80009ee: f7ff fd77 bl 80004e0 <__aeabi_fdiv> + 80009f2: 4603 mov r3, r0 +} + 80009f4: 4618 mov r0, r3 + 80009f6: 3710 adds r7, #16 + 80009f8: 46bd mov sp, r7 + 80009fa: bd80 pop {r7, pc} + 80009fc: 41c80000 .word 0x41c80000 + 8000a00: 3ca3d70a .word 0x3ca3d70a + 8000a04: 3dcccccd .word 0x3dcccccd + +08000a08 : * @param: none * * @return Magnitude (float). ******************************************************************************/ float AD5934_GetMagnitude(void) { - 80008fc: b5b0 push {r4, r5, r7, lr} - 80008fe: b082 sub sp, #8 - 8000900: af00 add r7, sp, #0 + 8000a08: b5b0 push {r4, r5, r7, lr} + 8000a0a: b082 sub sp, #8 + 8000a0c: af00 add r7, sp, #0 // Get Real Data register int16_t real_value = ((AD5934_GetRegisterValue(AD5934_REAL_REG_LB,2))); - 8000902: 2102 movs r1, #2 - 8000904: 2095 movs r0, #149 @ 0x95 - 8000906: f7ff ff65 bl 80007d4 - 800090a: 4603 mov r3, r0 - 800090c: 80fb strh r3, [r7, #6] + 8000a0e: 2102 movs r1, #2 + 8000a10: 2095 movs r0, #149 @ 0x95 + 8000a12: f7ff fedf bl 80007d4 + 8000a16: 4603 mov r3, r0 + 8000a18: 80fb strh r3, [r7, #6] // Get Imaginary Data register int16_t imag_value = ((AD5934_GetRegisterValue(AD5934_IMG_REG_LB,2))); - 800090e: 2102 movs r1, #2 - 8000910: 2097 movs r0, #151 @ 0x97 - 8000912: f7ff ff5f bl 80007d4 - 8000916: 4603 mov r3, r0 - 8000918: 80bb strh r3, [r7, #4] + 8000a1a: 2102 movs r1, #2 + 8000a1c: 2097 movs r0, #151 @ 0x97 + 8000a1e: f7ff fed9 bl 80007d4 + 8000a22: 4603 mov r3, r0 + 8000a24: 80bb strh r3, [r7, #4] // Calculate Magnitude using float function sqrtf float magnitude = sqrtf(((float)real_value * (float)real_value) + ((float)imag_value * (float)imag_value)); - 800091a: f9b7 3006 ldrsh.w r3, [r7, #6] - 800091e: 4618 mov r0, r3 - 8000920: f7ff fcd6 bl 80002d0 <__aeabi_i2f> - 8000924: 4604 mov r4, r0 - 8000926: f9b7 3006 ldrsh.w r3, [r7, #6] - 800092a: 4618 mov r0, r3 - 800092c: f7ff fcd0 bl 80002d0 <__aeabi_i2f> - 8000930: 4603 mov r3, r0 - 8000932: 4619 mov r1, r3 - 8000934: 4620 mov r0, r4 - 8000936: f7ff fd1f bl 8000378 <__aeabi_fmul> - 800093a: 4603 mov r3, r0 - 800093c: 461d mov r5, r3 - 800093e: f9b7 3004 ldrsh.w r3, [r7, #4] - 8000942: 4618 mov r0, r3 - 8000944: f7ff fcc4 bl 80002d0 <__aeabi_i2f> - 8000948: 4604 mov r4, r0 - 800094a: f9b7 3004 ldrsh.w r3, [r7, #4] - 800094e: 4618 mov r0, r3 - 8000950: f7ff fcbe bl 80002d0 <__aeabi_i2f> - 8000954: 4603 mov r3, r0 - 8000956: 4619 mov r1, r3 - 8000958: 4620 mov r0, r4 - 800095a: f7ff fd0d bl 8000378 <__aeabi_fmul> - 800095e: 4603 mov r3, r0 - 8000960: 4619 mov r1, r3 - 8000962: 4628 mov r0, r5 - 8000964: f7ff fc00 bl 8000168 <__addsf3> - 8000968: 4603 mov r3, r0 - 800096a: 4618 mov r0, r3 - 800096c: f005 fabe bl 8005eec - 8000970: 6038 str r0, [r7, #0] + 8000a26: f9b7 3006 ldrsh.w r3, [r7, #6] + 8000a2a: 4618 mov r0, r3 + 8000a2c: f7ff fc50 bl 80002d0 <__aeabi_i2f> + 8000a30: 4604 mov r4, r0 + 8000a32: f9b7 3006 ldrsh.w r3, [r7, #6] + 8000a36: 4618 mov r0, r3 + 8000a38: f7ff fc4a bl 80002d0 <__aeabi_i2f> + 8000a3c: 4603 mov r3, r0 + 8000a3e: 4619 mov r1, r3 + 8000a40: 4620 mov r0, r4 + 8000a42: f7ff fc99 bl 8000378 <__aeabi_fmul> + 8000a46: 4603 mov r3, r0 + 8000a48: 461d mov r5, r3 + 8000a4a: f9b7 3004 ldrsh.w r3, [r7, #4] + 8000a4e: 4618 mov r0, r3 + 8000a50: f7ff fc3e bl 80002d0 <__aeabi_i2f> + 8000a54: 4604 mov r4, r0 + 8000a56: f9b7 3004 ldrsh.w r3, [r7, #4] + 8000a5a: 4618 mov r0, r3 + 8000a5c: f7ff fc38 bl 80002d0 <__aeabi_i2f> + 8000a60: 4603 mov r3, r0 + 8000a62: 4619 mov r1, r3 + 8000a64: 4620 mov r0, r4 + 8000a66: f7ff fc87 bl 8000378 <__aeabi_fmul> + 8000a6a: 4603 mov r3, r0 + 8000a6c: 4619 mov r1, r3 + 8000a6e: 4628 mov r0, r5 + 8000a70: f7ff fb7a bl 8000168 <__addsf3> + 8000a74: 4603 mov r3, r0 + 8000a76: 4618 mov r0, r3 + 8000a78: f005 faf2 bl 8006060 + 8000a7c: 6038 str r0, [r7, #0] // Return magnitude value return (magnitude); - 8000972: 683b ldr r3, [r7, #0] + 8000a7e: 683b ldr r3, [r7, #0] } - 8000974: 4618 mov r0, r3 - 8000976: 3708 adds r7, #8 - 8000978: 46bd mov sp, r7 - 800097a: bdb0 pop {r4, r5, r7, pc} + 8000a80: 4618 mov r0, r3 + 8000a82: 3708 adds r7, #8 + 8000a84: 46bd mov sp, r7 + 8000a86: bdb0 pop {r4, r5, r7, pc} -0800097c : +08000a88 : * @param scale Escala de Ref Res, EC e RTD * * @return uint16_t Valor convertido na escala de UINT16_MIN a UINT16_MAX */ uint16_t AD5934_Compress_To_IntScale(float value, uint8_t scale) { - 800097c: b5b0 push {r4, r5, r7, lr} - 800097e: b084 sub sp, #16 - 8000980: af00 add r7, sp, #0 - 8000982: 6078 str r0, [r7, #4] - 8000984: 460b mov r3, r1 - 8000986: 70fb strb r3, [r7, #3] + 8000a88: b5b0 push {r4, r5, r7, lr} + 8000a8a: b084 sub sp, #16 + 8000a8c: af00 add r7, sp, #0 + 8000a8e: 6078 str r0, [r7, #4] + 8000a90: 460b mov r3, r1 + 8000a92: 70fb strb r3, [r7, #3] // Proteção contra índice inválido para evitar HardFault if (scale >= AD5934_CH_MAX) - 8000988: 78fb ldrb r3, [r7, #3] - 800098a: 2b0e cmp r3, #14 - 800098c: d901 bls.n 8000992 + 8000a94: 78fb ldrb r3, [r7, #3] + 8000a96: 2b0e cmp r3, #14 + 8000a98: d901 bls.n 8000a9e return 0; - 800098e: 2300 movs r3, #0 - 8000990: e076 b.n 8000a80 + 8000a9a: 2300 movs r3, #0 + 8000a9c: e076 b.n 8000b8c // Verifica limites do valor de entrada if (value < AD5934_Scale_Float_Min[scale]) - 8000992: 78fb ldrb r3, [r7, #3] - 8000994: 4a3c ldr r2, [pc, #240] @ (8000a88 ) - 8000996: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 800099a: 4619 mov r1, r3 - 800099c: 6878 ldr r0, [r7, #4] - 800099e: f7ff fe89 bl 80006b4 <__aeabi_fcmplt> - 80009a2: 4603 mov r3, r0 - 80009a4: 2b00 cmp r3, #0 - 80009a6: d004 beq.n 80009b2 + 8000a9e: 78fb ldrb r3, [r7, #3] + 8000aa0: 4a3c ldr r2, [pc, #240] @ (8000b94 ) + 8000aa2: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8000aa6: 4619 mov r1, r3 + 8000aa8: 6878 ldr r0, [r7, #4] + 8000aaa: f7ff fe03 bl 80006b4 <__aeabi_fcmplt> + 8000aae: 4603 mov r3, r0 + 8000ab0: 2b00 cmp r3, #0 + 8000ab2: d004 beq.n 8000abe return AD5934_Scale_Out_Min[scale]; - 80009a8: 78fb ldrb r3, [r7, #3] - 80009aa: 4a38 ldr r2, [pc, #224] @ (8000a8c ) - 80009ac: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 80009b0: e066 b.n 8000a80 + 8000ab4: 78fb ldrb r3, [r7, #3] + 8000ab6: 4a38 ldr r2, [pc, #224] @ (8000b98 ) + 8000ab8: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8000abc: e066 b.n 8000b8c else if (value > AD5934_Scale_Float_Max[scale]) - 80009b2: 78fb ldrb r3, [r7, #3] - 80009b4: 4a36 ldr r2, [pc, #216] @ (8000a90 ) - 80009b6: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 80009ba: 4619 mov r1, r3 - 80009bc: 6878 ldr r0, [r7, #4] - 80009be: f7ff fe97 bl 80006f0 <__aeabi_fcmpgt> - 80009c2: 4603 mov r3, r0 - 80009c4: 2b00 cmp r3, #0 - 80009c6: d004 beq.n 80009d2 + 8000abe: 78fb ldrb r3, [r7, #3] + 8000ac0: 4a36 ldr r2, [pc, #216] @ (8000b9c ) + 8000ac2: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8000ac6: 4619 mov r1, r3 + 8000ac8: 6878 ldr r0, [r7, #4] + 8000aca: f7ff fe11 bl 80006f0 <__aeabi_fcmpgt> + 8000ace: 4603 mov r3, r0 + 8000ad0: 2b00 cmp r3, #0 + 8000ad2: d004 beq.n 8000ade return AD5934_Scale_Out_Max[scale]; - 80009c8: 78fb ldrb r3, [r7, #3] - 80009ca: 4a32 ldr r2, [pc, #200] @ (8000a94 ) - 80009cc: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 80009d0: e056 b.n 8000a80 + 8000ad4: 78fb ldrb r3, [r7, #3] + 8000ad6: 4a32 ldr r2, [pc, #200] @ (8000ba0 ) + 8000ad8: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8000adc: e056 b.n 8000b8c // Converte o valor usando a fórmula: ((value - FLOAT_MIN) / (FLOAT_MAX - FLOAT_MIN)) * (UINT16_MAX - UINT16_MIN) + UINT16_MIN uint16_t result = (uint16_t)(((value - AD5934_Scale_Float_Min[scale]) / (AD5934_Scale_Float_Max[scale] - AD5934_Scale_Float_Min[scale])) * ((float)AD5934_Scale_Out_Max[scale] - (float)AD5934_Scale_Out_Min[scale]) + (float)AD5934_Scale_Out_Min[scale]); - 80009d2: 78fb ldrb r3, [r7, #3] - 80009d4: 4a2c ldr r2, [pc, #176] @ (8000a88 ) - 80009d6: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 80009da: 4619 mov r1, r3 - 80009dc: 6878 ldr r0, [r7, #4] - 80009de: f7ff fbc1 bl 8000164 <__aeabi_fsub> - 80009e2: 4603 mov r3, r0 - 80009e4: 461c mov r4, r3 - 80009e6: 78fb ldrb r3, [r7, #3] - 80009e8: 4a29 ldr r2, [pc, #164] @ (8000a90 ) - 80009ea: f852 2023 ldr.w r2, [r2, r3, lsl #2] - 80009ee: 78fb ldrb r3, [r7, #3] - 80009f0: 4925 ldr r1, [pc, #148] @ (8000a88 ) - 80009f2: f851 3023 ldr.w r3, [r1, r3, lsl #2] - 80009f6: 4619 mov r1, r3 - 80009f8: 4610 mov r0, r2 - 80009fa: f7ff fbb3 bl 8000164 <__aeabi_fsub> - 80009fe: 4603 mov r3, r0 - 8000a00: 4619 mov r1, r3 - 8000a02: 4620 mov r0, r4 - 8000a04: f7ff fd6c bl 80004e0 <__aeabi_fdiv> - 8000a08: 4603 mov r3, r0 - 8000a0a: 461d mov r5, r3 - 8000a0c: 78fb ldrb r3, [r7, #3] - 8000a0e: 4a21 ldr r2, [pc, #132] @ (8000a94 ) - 8000a10: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000a14: 4618 mov r0, r3 - 8000a16: f7ff fc57 bl 80002c8 <__aeabi_ui2f> - 8000a1a: 4604 mov r4, r0 - 8000a1c: 78fb ldrb r3, [r7, #3] - 8000a1e: 4a1b ldr r2, [pc, #108] @ (8000a8c ) - 8000a20: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000a24: 4618 mov r0, r3 - 8000a26: f7ff fc4f bl 80002c8 <__aeabi_ui2f> - 8000a2a: 4603 mov r3, r0 - 8000a2c: 4619 mov r1, r3 - 8000a2e: 4620 mov r0, r4 - 8000a30: f7ff fb98 bl 8000164 <__aeabi_fsub> - 8000a34: 4603 mov r3, r0 - 8000a36: 4619 mov r1, r3 - 8000a38: 4628 mov r0, r5 - 8000a3a: f7ff fc9d bl 8000378 <__aeabi_fmul> - 8000a3e: 4603 mov r3, r0 - 8000a40: 461c mov r4, r3 - 8000a42: 78fb ldrb r3, [r7, #3] - 8000a44: 4a11 ldr r2, [pc, #68] @ (8000a8c ) - 8000a46: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000a4a: 4618 mov r0, r3 - 8000a4c: f7ff fc3c bl 80002c8 <__aeabi_ui2f> - 8000a50: 4603 mov r3, r0 - 8000a52: 4619 mov r1, r3 - 8000a54: 4620 mov r0, r4 - 8000a56: f7ff fb87 bl 8000168 <__addsf3> - 8000a5a: 4603 mov r3, r0 - 8000a5c: 4618 mov r0, r3 - 8000a5e: f7ff fe67 bl 8000730 <__aeabi_f2uiz> - 8000a62: 4603 mov r3, r0 - 8000a64: 81fb strh r3, [r7, #14] + 8000ade: 78fb ldrb r3, [r7, #3] + 8000ae0: 4a2c ldr r2, [pc, #176] @ (8000b94 ) + 8000ae2: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8000ae6: 4619 mov r1, r3 + 8000ae8: 6878 ldr r0, [r7, #4] + 8000aea: f7ff fb3b bl 8000164 <__aeabi_fsub> + 8000aee: 4603 mov r3, r0 + 8000af0: 461c mov r4, r3 + 8000af2: 78fb ldrb r3, [r7, #3] + 8000af4: 4a29 ldr r2, [pc, #164] @ (8000b9c ) + 8000af6: f852 2023 ldr.w r2, [r2, r3, lsl #2] + 8000afa: 78fb ldrb r3, [r7, #3] + 8000afc: 4925 ldr r1, [pc, #148] @ (8000b94 ) + 8000afe: f851 3023 ldr.w r3, [r1, r3, lsl #2] + 8000b02: 4619 mov r1, r3 + 8000b04: 4610 mov r0, r2 + 8000b06: f7ff fb2d bl 8000164 <__aeabi_fsub> + 8000b0a: 4603 mov r3, r0 + 8000b0c: 4619 mov r1, r3 + 8000b0e: 4620 mov r0, r4 + 8000b10: f7ff fce6 bl 80004e0 <__aeabi_fdiv> + 8000b14: 4603 mov r3, r0 + 8000b16: 461d mov r5, r3 + 8000b18: 78fb ldrb r3, [r7, #3] + 8000b1a: 4a21 ldr r2, [pc, #132] @ (8000ba0 ) + 8000b1c: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8000b20: 4618 mov r0, r3 + 8000b22: f7ff fbd1 bl 80002c8 <__aeabi_ui2f> + 8000b26: 4604 mov r4, r0 + 8000b28: 78fb ldrb r3, [r7, #3] + 8000b2a: 4a1b ldr r2, [pc, #108] @ (8000b98 ) + 8000b2c: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8000b30: 4618 mov r0, r3 + 8000b32: f7ff fbc9 bl 80002c8 <__aeabi_ui2f> + 8000b36: 4603 mov r3, r0 + 8000b38: 4619 mov r1, r3 + 8000b3a: 4620 mov r0, r4 + 8000b3c: f7ff fb12 bl 8000164 <__aeabi_fsub> + 8000b40: 4603 mov r3, r0 + 8000b42: 4619 mov r1, r3 + 8000b44: 4628 mov r0, r5 + 8000b46: f7ff fc17 bl 8000378 <__aeabi_fmul> + 8000b4a: 4603 mov r3, r0 + 8000b4c: 461c mov r4, r3 + 8000b4e: 78fb ldrb r3, [r7, #3] + 8000b50: 4a11 ldr r2, [pc, #68] @ (8000b98 ) + 8000b52: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8000b56: 4618 mov r0, r3 + 8000b58: f7ff fbb6 bl 80002c8 <__aeabi_ui2f> + 8000b5c: 4603 mov r3, r0 + 8000b5e: 4619 mov r1, r3 + 8000b60: 4620 mov r0, r4 + 8000b62: f7ff fb01 bl 8000168 <__addsf3> + 8000b66: 4603 mov r3, r0 + 8000b68: 4618 mov r0, r3 + 8000b6a: f7ff fde1 bl 8000730 <__aeabi_f2uiz> + 8000b6e: 4603 mov r3, r0 + 8000b70: 81fb strh r3, [r7, #14] // Garante que o resultado não exceda o limite superior if (result > AD5934_Scale_Out_Max[scale]) - 8000a66: 78fb ldrb r3, [r7, #3] - 8000a68: 4a0a ldr r2, [pc, #40] @ (8000a94 ) - 8000a6a: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000a6e: 89fa ldrh r2, [r7, #14] - 8000a70: 429a cmp r2, r3 - 8000a72: d904 bls.n 8000a7e + 8000b72: 78fb ldrb r3, [r7, #3] + 8000b74: 4a0a ldr r2, [pc, #40] @ (8000ba0 ) + 8000b76: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8000b7a: 89fa ldrh r2, [r7, #14] + 8000b7c: 429a cmp r2, r3 + 8000b7e: d904 bls.n 8000b8a return (AD5934_Scale_Out_Max[scale]); - 8000a74: 78fb ldrb r3, [r7, #3] - 8000a76: 4a07 ldr r2, [pc, #28] @ (8000a94 ) - 8000a78: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000a7c: e000 b.n 8000a80 + 8000b80: 78fb ldrb r3, [r7, #3] + 8000b82: 4a07 ldr r2, [pc, #28] @ (8000ba0 ) + 8000b84: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8000b88: e000 b.n 8000b8c return result; - 8000a7e: 89fb ldrh r3, [r7, #14] + 8000b8a: 89fb ldrh r3, [r7, #14] } - 8000a80: 4618 mov r0, r3 - 8000a82: 3710 adds r7, #16 - 8000a84: 46bd mov sp, r7 - 8000a86: bdb0 pop {r4, r5, r7, pc} - 8000a88: 08006034 .word 0x08006034 - 8000a8c: 080060ac .word 0x080060ac - 8000a90: 08006070 .word 0x08006070 - 8000a94: 080060cc .word 0x080060cc + 8000b8c: 4618 mov r0, r3 + 8000b8e: 3710 adds r7, #16 + 8000b90: 46bd mov sp, r7 + 8000b92: bdb0 pop {r4, r5, r7, pc} + 8000b94: 080061a8 .word 0x080061a8 + 8000b98: 08006220 .word 0x08006220 + 8000b9c: 080061e4 .word 0x080061e4 + 8000ba0: 08006240 .word 0x08006240 -08000a98 : +08000ba4 : * @param none * * @return none */ void AD5934_Process_System(void) { - 8000a98: b580 push {r7, lr} - 8000a9a: b082 sub sp, #8 - 8000a9c: af00 add r7, sp, #0 + 8000ba4: b580 push {r7, lr} + 8000ba6: b082 sub sp, #8 + 8000ba8: af00 add r7, sp, #0 static uint32_t state_timer = 0; uint8_t status = 0; - 8000a9e: 2300 movs r3, #0 - 8000aa0: 71fb strb r3, [r7, #7] + 8000baa: 2300 movs r3, #0 + 8000bac: 71fb strb r3, [r7, #7] switch (ad5934_state) - 8000aa2: 4b79 ldr r3, [pc, #484] @ (8000c88 ) - 8000aa4: 781b ldrb r3, [r3, #0] - 8000aa6: b2db uxtb r3, r3 - 8000aa8: 2b06 cmp r3, #6 - 8000aaa: f200 80e9 bhi.w 8000c80 - 8000aae: a201 add r2, pc, #4 @ (adr r2, 8000ab4 ) - 8000ab0: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8000ab4: 08000ad1 .word 0x08000ad1 - 8000ab8: 08000b0f .word 0x08000b0f - 8000abc: 08000b37 .word 0x08000b37 - 8000ac0: 08000b57 .word 0x08000b57 - 8000ac4: 08000baf .word 0x08000baf - 8000ac8: 08000bc5 .word 0x08000bc5 - 8000acc: 08000af1 .word 0x08000af1 + 8000bae: 4b85 ldr r3, [pc, #532] @ (8000dc4 ) + 8000bb0: 781b ldrb r3, [r3, #0] + 8000bb2: b2db uxtb r3, r3 + 8000bb4: 2b06 cmp r3, #6 + 8000bb6: f200 8101 bhi.w 8000dbc + 8000bba: a201 add r2, pc, #4 @ (adr r2, 8000bc0 ) + 8000bbc: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8000bc0: 08000bdd .word 0x08000bdd + 8000bc4: 08000c1b .word 0x08000c1b + 8000bc8: 08000c43 .word 0x08000c43 + 8000bcc: 08000c63 .word 0x08000c63 + 8000bd0: 08000cbb .word 0x08000cbb + 8000bd4: 08000cd1 .word 0x08000cd1 + 8000bd8: 08000bfd .word 0x08000bfd { case AD5934_IDLE: ADG715_SetChannels(current_mux_channel); // Starts changing the mux channel - 8000ad0: 4b6e ldr r3, [pc, #440] @ (8000c8c ) - 8000ad2: 781b ldrb r3, [r3, #0] - 8000ad4: 4618 mov r0, r3 - 8000ad6: f000 fa8d bl 8000ff4 + 8000bdc: 4b7a ldr r3, [pc, #488] @ (8000dc8 ) + 8000bde: 781b ldrb r3, [r3, #0] + 8000be0: 4618 mov r0, r3 + 8000be2: f000 faab bl 800113c is_new_channel = 1; // Forces first channel - 8000ada: 4b6d ldr r3, [pc, #436] @ (8000c90 ) - 8000adc: 2201 movs r2, #1 - 8000ade: 701a strb r2, [r3, #0] + 8000be6: 4b79 ldr r3, [pc, #484] @ (8000dcc ) + 8000be8: 2201 movs r2, #1 + 8000bea: 701a strb r2, [r3, #0] state_timer = g_ms_counter; - 8000ae0: 4b6c ldr r3, [pc, #432] @ (8000c94 ) - 8000ae2: 681b ldr r3, [r3, #0] - 8000ae4: 4a6c ldr r2, [pc, #432] @ (8000c98 ) - 8000ae6: 6013 str r3, [r2, #0] + 8000bec: 4b78 ldr r3, [pc, #480] @ (8000dd0 ) + 8000bee: 681b ldr r3, [r3, #0] + 8000bf0: 4a78 ldr r2, [pc, #480] @ (8000dd4 ) + 8000bf2: 6013 str r3, [r2, #0] ad5934_state = AD5934_WAIT_MUX; - 8000ae8: 4b67 ldr r3, [pc, #412] @ (8000c88 ) - 8000aea: 2206 movs r2, #6 - 8000aec: 701a strb r2, [r3, #0] + 8000bf4: 4b73 ldr r3, [pc, #460] @ (8000dc4 ) + 8000bf6: 2206 movs r2, #6 + 8000bf8: 701a strb r2, [r3, #0] break; - 8000aee: e0c7 b.n 8000c80 + 8000bfa: e0df b.n 8000dbc case AD5934_WAIT_MUX: if ((g_ms_counter - state_timer) >= AD5934_SYNC_MUX_SETTLING) // Wait until AD715 Mux switch stability - 8000af0: 4b68 ldr r3, [pc, #416] @ (8000c94 ) - 8000af2: 681a ldr r2, [r3, #0] - 8000af4: 4b68 ldr r3, [pc, #416] @ (8000c98 ) - 8000af6: 681b ldr r3, [r3, #0] - 8000af8: 1ad3 subs r3, r2, r3 - 8000afa: 2b04 cmp r3, #4 - 8000afc: f240 80bb bls.w 8000c76 + 8000bfc: 4b74 ldr r3, [pc, #464] @ (8000dd0 ) + 8000bfe: 681a ldr r2, [r3, #0] + 8000c00: 4b74 ldr r3, [pc, #464] @ (8000dd4 ) + 8000c02: 681b ldr r3, [r3, #0] + 8000c04: 1ad3 subs r3, r2, r3 + 8000c06: 2b04 cmp r3, #4 + 8000c08: f240 80d3 bls.w 8000db2 { sweep_count = 0; - 8000b00: 4b66 ldr r3, [pc, #408] @ (8000c9c ) - 8000b02: 2200 movs r2, #0 - 8000b04: 701a strb r2, [r3, #0] + 8000c0c: 4b72 ldr r3, [pc, #456] @ (8000dd8 ) + 8000c0e: 2200 movs r2, #0 + 8000c10: 701a strb r2, [r3, #0] ad5934_state = AD5934_START_CONVERSION; - 8000b06: 4b60 ldr r3, [pc, #384] @ (8000c88 ) - 8000b08: 2201 movs r2, #1 - 8000b0a: 701a strb r2, [r3, #0] + 8000c12: 4b6c ldr r3, [pc, #432] @ (8000dc4 ) + 8000c14: 2201 movs r2, #1 + 8000c16: 701a strb r2, [r3, #0] } break; - 8000b0c: e0b3 b.n 8000c76 + 8000c18: e0cb b.n 8000db2 case AD5934_START_CONVERSION: state_timer = g_ms_counter; // Starts to count the Burst period for the sweeps - 8000b0e: 4b61 ldr r3, [pc, #388] @ (8000c94 ) - 8000b10: 681b ldr r3, [r3, #0] - 8000b12: 4a61 ldr r2, [pc, #388] @ (8000c98 ) - 8000b14: 6013 str r3, [r2, #0] + 8000c1a: 4b6d ldr r3, [pc, #436] @ (8000dd0 ) + 8000c1c: 681b ldr r3, [r3, #0] + 8000c1e: 4a6d ldr r2, [pc, #436] @ (8000dd4 ) + 8000c20: 6013 str r3, [r2, #0] /* DECISÃO DE COMANDO: Novo canal vs Leituras sucessivas */ if (is_new_channel) // Decision: Channel Switched or Next Sample in the Burst ? - 8000b16: 4b5e ldr r3, [pc, #376] @ (8000c90 ) - 8000b18: 781b ldrb r3, [r3, #0] - 8000b1a: 2b00 cmp r3, #0 - 8000b1c: d005 beq.n 8000b2a + 8000c22: 4b6a ldr r3, [pc, #424] @ (8000dcc ) + 8000c24: 781b ldrb r3, [r3, #0] + 8000c26: 2b00 cmp r3, #0 + 8000c28: d005 beq.n 8000c36 { AD5934_RestartSweep(); // Clean some AD5934 internal registers to Re-Start Sweep - 8000b1e: f7ff fec3 bl 80008a8 + 8000c2a: f7ff fe3d bl 80008a8 is_new_channel = 0; // Resets the flag to read the next Sample Burst - 8000b22: 4b5b ldr r3, [pc, #364] @ (8000c90 ) - 8000b24: 2200 movs r2, #0 - 8000b26: 701a strb r2, [r3, #0] - 8000b28: e001 b.n 8000b2e + 8000c2e: 4b67 ldr r3, [pc, #412] @ (8000dcc ) + 8000c30: 2200 movs r2, #0 + 8000c32: 701a strb r2, [r3, #0] + 8000c34: e001 b.n 8000c3a } else { AD5934_Repeat_Sweep(); // Get Sample and just repeat reading - 8000b2a: f7ff fed5 bl 80008d8 + 8000c36: f7ff fe4f bl 80008d8 } ad5934_state = AD5934_WAIT_CONVERSION; // Next State - 8000b2e: 4b56 ldr r3, [pc, #344] @ (8000c88 ) - 8000b30: 2202 movs r2, #2 - 8000b32: 701a strb r2, [r3, #0] + 8000c3a: 4b62 ldr r3, [pc, #392] @ (8000dc4 ) + 8000c3c: 2202 movs r2, #2 + 8000c3e: 701a strb r2, [r3, #0] break; - 8000b34: e0a4 b.n 8000c80 + 8000c40: e0bc b.n 8000dbc case AD5934_WAIT_CONVERSION: status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); // Check if the current converion is ready in the AD5934 - 8000b36: 2101 movs r1, #1 - 8000b38: 208f movs r0, #143 @ 0x8f - 8000b3a: f7ff fe4b bl 80007d4 - 8000b3e: 4603 mov r3, r0 - 8000b40: 71fb strb r3, [r7, #7] + 8000c42: 2101 movs r1, #1 + 8000c44: 208f movs r0, #143 @ 0x8f + 8000c46: f7ff fdc5 bl 80007d4 + 8000c4a: 4603 mov r3, r0 + 8000c4c: 71fb strb r3, [r7, #7] if ((status & AD5934_STATUS_DATA_VALID) != 0) - 8000b42: 79fb ldrb r3, [r7, #7] - 8000b44: f003 0302 and.w r3, r3, #2 - 8000b48: 2b00 cmp r3, #0 - 8000b4a: f000 8096 beq.w 8000c7a + 8000c4e: 79fb ldrb r3, [r7, #7] + 8000c50: f003 0302 and.w r3, r3, #2 + 8000c54: 2b00 cmp r3, #0 + 8000c56: f000 80ae beq.w 8000db6 { ad5934_state = AD5934_READ_DATA; - 8000b4e: 4b4e ldr r3, [pc, #312] @ (8000c88 ) - 8000b50: 2203 movs r2, #3 - 8000b52: 701a strb r2, [r3, #0] + 8000c5a: 4b5a ldr r3, [pc, #360] @ (8000dc4 ) + 8000c5c: 2203 movs r2, #3 + 8000c5e: 701a strb r2, [r3, #0] } break; - 8000b54: e091 b.n 8000c7a + 8000c60: e0a9 b.n 8000db6 case AD5934_READ_DATA: { float magnitude = AD5934_GetMagnitude(); - 8000b56: f7ff fed1 bl 80008fc - 8000b5a: 6038 str r0, [r7, #0] + 8000c62: f7ff fed1 bl 8000a08 + 8000c66: 6038 str r0, [r7, #0] switch (current_mux_channel) - 8000b5c: 4b4b ldr r3, [pc, #300] @ (8000c8c ) - 8000b5e: 781b ldrb r3, [r3, #0] - 8000b60: 2b02 cmp r3, #2 - 8000b62: d00e beq.n 8000b82 - 8000b64: 2b02 cmp r3, #2 - 8000b66: dc10 bgt.n 8000b8a - 8000b68: 2b00 cmp r3, #0 - 8000b6a: d002 beq.n 8000b72 - 8000b6c: 2b01 cmp r3, #1 - 8000b6e: d004 beq.n 8000b7a - 8000b70: e00b b.n 8000b8a + 8000c68: 4b57 ldr r3, [pc, #348] @ (8000dc8 ) + 8000c6a: 781b ldrb r3, [r3, #0] + 8000c6c: 2b02 cmp r3, #2 + 8000c6e: d00e beq.n 8000c8e + 8000c70: 2b02 cmp r3, #2 + 8000c72: dc10 bgt.n 8000c96 + 8000c74: 2b00 cmp r3, #0 + 8000c76: d002 beq.n 8000c7e + 8000c78: 2b01 cmp r3, #1 + 8000c7a: d004 beq.n 8000c86 + 8000c7c: e00b b.n 8000c96 { case AD5934_ID_RTD: AD5934_RTD_NewSample(magnitude); - 8000b72: 6838 ldr r0, [r7, #0] - 8000b74: f000 f9f4 bl 8000f60 + 8000c7e: 6838 ldr r0, [r7, #0] + 8000c80: f000 fa12 bl 80010a8 break; - 8000b78: e007 b.n 8000b8a + 8000c84: e007 b.n 8000c96 case AD5934_ID_EC: AD5934_EC_NewSample(magnitude); - 8000b7a: 6838 ldr r0, [r7, #0] - 8000b7c: f000 f9fe bl 8000f7c + 8000c86: 6838 ldr r0, [r7, #0] + 8000c88: f000 fa1c bl 80010c4 break; - 8000b80: e003 b.n 8000b8a + 8000c8c: e003 b.n 8000c96 case AD5934_ID_REF: AD5934_Reference_NewSample(magnitude); - 8000b82: 6838 ldr r0, [r7, #0] - 8000b84: f000 fa08 bl 8000f98 + 8000c8e: 6838 ldr r0, [r7, #0] + 8000c90: f000 fa26 bl 80010e0 break; - 8000b88: bf00 nop + 8000c94: bf00 nop } sweep_count++; - 8000b8a: 4b44 ldr r3, [pc, #272] @ (8000c9c ) - 8000b8c: 781b ldrb r3, [r3, #0] - 8000b8e: 3301 adds r3, #1 - 8000b90: b2da uxtb r2, r3 - 8000b92: 4b42 ldr r3, [pc, #264] @ (8000c9c ) - 8000b94: 701a strb r2, [r3, #0] + 8000c96: 4b50 ldr r3, [pc, #320] @ (8000dd8 ) + 8000c98: 781b ldrb r3, [r3, #0] + 8000c9a: 3301 adds r3, #1 + 8000c9c: b2da uxtb r2, r3 + 8000c9e: 4b4e ldr r3, [pc, #312] @ (8000dd8 ) + 8000ca0: 701a strb r2, [r3, #0] if (sweep_count >= AD5934_BURST_SIZE) // Check if number of samples for the burst is complete - 8000b96: 4b41 ldr r3, [pc, #260] @ (8000c9c ) - 8000b98: 781b ldrb r3, [r3, #0] - 8000b9a: 2b04 cmp r3, #4 - 8000b9c: d903 bls.n 8000ba6 + 8000ca2: 4b4d ldr r3, [pc, #308] @ (8000dd8 ) + 8000ca4: 781b ldrb r3, [r3, #0] + 8000ca6: 2b04 cmp r3, #4 + 8000ca8: d903 bls.n 8000cb2 { ad5934_state = AD5934_SWITCH_MUX; // Next Re-Start Sweep - 8000b9e: 4b3a ldr r3, [pc, #232] @ (8000c88 ) - 8000ba0: 2205 movs r2, #5 - 8000ba2: 701a strb r2, [r3, #0] + 8000caa: 4b46 ldr r3, [pc, #280] @ (8000dc4 ) + 8000cac: 2205 movs r2, #5 + 8000cae: 701a strb r2, [r3, #0] else { ad5934_state = AD5934_WAIT_NEXT_SWEEP; // Next Repeat Sweep } } break; - 8000ba4: e06c b.n 8000c80 + 8000cb0: e084 b.n 8000dbc ad5934_state = AD5934_WAIT_NEXT_SWEEP; // Next Repeat Sweep - 8000ba6: 4b38 ldr r3, [pc, #224] @ (8000c88 ) - 8000ba8: 2204 movs r2, #4 - 8000baa: 701a strb r2, [r3, #0] + 8000cb2: 4b44 ldr r3, [pc, #272] @ (8000dc4 ) + 8000cb4: 2204 movs r2, #4 + 8000cb6: 701a strb r2, [r3, #0] break; - 8000bac: e068 b.n 8000c80 + 8000cb8: e080 b.n 8000dbc case AD5934_WAIT_NEXT_SWEEP: if ((g_ms_counter - state_timer) >= AD5934_TIME_PER_SWEEP) - 8000bae: 4b39 ldr r3, [pc, #228] @ (8000c94 ) - 8000bb0: 681a ldr r2, [r3, #0] - 8000bb2: 4b39 ldr r3, [pc, #228] @ (8000c98 ) - 8000bb4: 681b ldr r3, [r3, #0] - 8000bb6: 1ad3 subs r3, r2, r3 - 8000bb8: 2b3b cmp r3, #59 @ 0x3b - 8000bba: d960 bls.n 8000c7e + 8000cba: 4b45 ldr r3, [pc, #276] @ (8000dd0 ) + 8000cbc: 681a ldr r2, [r3, #0] + 8000cbe: 4b45 ldr r3, [pc, #276] @ (8000dd4 ) + 8000cc0: 681b ldr r3, [r3, #0] + 8000cc2: 1ad3 subs r3, r2, r3 + 8000cc4: 2b3b cmp r3, #59 @ 0x3b + 8000cc6: d978 bls.n 8000dba { ad5934_state = AD5934_START_CONVERSION; - 8000bbc: 4b32 ldr r3, [pc, #200] @ (8000c88 ) - 8000bbe: 2201 movs r2, #1 - 8000bc0: 701a strb r2, [r3, #0] + 8000cc8: 4b3e ldr r3, [pc, #248] @ (8000dc4 ) + 8000cca: 2201 movs r2, #1 + 8000ccc: 701a strb r2, [r3, #0] } break; - 8000bc2: e05c b.n 8000c7e + 8000cce: e074 b.n 8000dba case AD5934_SWITCH_MUX: AD5934_StopSweep(); // Put AD5934 in Standby - 8000bc4: f7ff fe91 bl 80008ea + 8000cd0: f7ff fe0b bl 80008ea current_mux_channel = (uint8_t)((current_mux_channel + 1) % 3); // Pointer to the next channel (Circular Buffer 0 to 2) - 8000bc8: 4b30 ldr r3, [pc, #192] @ (8000c8c ) - 8000bca: 781b ldrb r3, [r3, #0] - 8000bcc: 1c5a adds r2, r3, #1 - 8000bce: 4b34 ldr r3, [pc, #208] @ (8000ca0 ) - 8000bd0: fb83 3102 smull r3, r1, r3, r2 - 8000bd4: 17d3 asrs r3, r2, #31 - 8000bd6: 1ac9 subs r1, r1, r3 - 8000bd8: 460b mov r3, r1 - 8000bda: 005b lsls r3, r3, #1 - 8000bdc: 440b add r3, r1 - 8000bde: 1ad1 subs r1, r2, r3 - 8000be0: b2ca uxtb r2, r1 - 8000be2: 4b2a ldr r3, [pc, #168] @ (8000c8c ) - 8000be4: 701a strb r2, [r3, #0] + 8000cd4: 4b3c ldr r3, [pc, #240] @ (8000dc8 ) + 8000cd6: 781b ldrb r3, [r3, #0] + 8000cd8: 1c5a adds r2, r3, #1 + 8000cda: 4b40 ldr r3, [pc, #256] @ (8000ddc ) + 8000cdc: fb83 3102 smull r3, r1, r3, r2 + 8000ce0: 17d3 asrs r3, r2, #31 + 8000ce2: 1ac9 subs r1, r1, r3 + 8000ce4: 460b mov r3, r1 + 8000ce6: 005b lsls r3, r3, #1 + 8000ce8: 440b add r3, r1 + 8000cea: 1ad1 subs r1, r2, r3 + 8000cec: b2ca uxtb r2, r1 + 8000cee: 4b36 ldr r3, [pc, #216] @ (8000dc8 ) + 8000cf0: 701a strb r2, [r3, #0] switch (current_mux_channel) - 8000be6: 4b29 ldr r3, [pc, #164] @ (8000c8c ) - 8000be8: 781b ldrb r3, [r3, #0] - 8000bea: 2b02 cmp r3, #2 - 8000bec: d024 beq.n 8000c38 - 8000bee: 2b02 cmp r3, #2 - 8000bf0: dc31 bgt.n 8000c56 - 8000bf2: 2b00 cmp r3, #0 - 8000bf4: d002 beq.n 8000bfc - 8000bf6: 2b01 cmp r3, #1 - 8000bf8: d00f beq.n 8000c1a - 8000bfa: e02c b.n 8000c56 + 8000cf2: 4b35 ldr r3, [pc, #212] @ (8000dc8 ) + 8000cf4: 781b ldrb r3, [r3, #0] + 8000cf6: 2b02 cmp r3, #2 + 8000cf8: d034 beq.n 8000d64 + 8000cfa: 2b02 cmp r3, #2 + 8000cfc: dc49 bgt.n 8000d92 + 8000cfe: 2b00 cmp r3, #0 + 8000d00: d002 beq.n 8000d08 + 8000d02: 2b01 cmp r3, #1 + 8000d04: d017 beq.n 8000d36 + 8000d06: e044 b.n 8000d92 { case AD5934_ID_RTD: if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 8000bfc: 2180 movs r1, #128 @ 0x80 - 8000bfe: 4829 ldr r0, [pc, #164] @ (8000ca4 ) - 8000c00: f002 f9f6 bl 8002ff0 - 8000c04: 4603 mov r3, r0 - 8000c06: 2b01 cmp r3, #1 - 8000c08: d103 bne.n 8000c12 - current_hw_mux_connection = AD5934_CH_RTD_LOW_GAIN; //PT100 - 8000c0a: 4b27 ldr r3, [pc, #156] @ (8000ca8 ) - 8000c0c: 2209 movs r2, #9 - 8000c0e: 701a strb r2, [r3, #0] + 8000d08: 2180 movs r1, #128 @ 0x80 + 8000d0a: 4835 ldr r0, [pc, #212] @ (8000de0 ) + 8000d0c: f002 fa2a bl 8003164 + 8000d10: 4603 mov r3, r0 + 8000d12: 2b01 cmp r3, #1 + 8000d14: d107 bne.n 8000d26 + current_rtd_mux = current_hw_mux_connection = AD5934_CH_RTD_LOW_GAIN; //PT100 + 8000d16: 4b33 ldr r3, [pc, #204] @ (8000de4 ) + 8000d18: 2209 movs r2, #9 + 8000d1a: 701a strb r2, [r3, #0] + 8000d1c: 4b31 ldr r3, [pc, #196] @ (8000de4 ) + 8000d1e: 781a ldrb r2, [r3, #0] + 8000d20: 4b31 ldr r3, [pc, #196] @ (8000de8 ) + 8000d22: 701a strb r2, [r3, #0] else - current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 + current_rtd_mux = current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 break; - 8000c10: e021 b.n 8000c56 - current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 - 8000c12: 4b25 ldr r3, [pc, #148] @ (8000ca8 ) - 8000c14: 220a movs r2, #10 - 8000c16: 701a strb r2, [r3, #0] + 8000d24: e035 b.n 8000d92 + current_rtd_mux = current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 + 8000d26: 4b2f ldr r3, [pc, #188] @ (8000de4 ) + 8000d28: 220a movs r2, #10 + 8000d2a: 701a strb r2, [r3, #0] + 8000d2c: 4b2d ldr r3, [pc, #180] @ (8000de4 ) + 8000d2e: 781a ldrb r2, [r3, #0] + 8000d30: 4b2d ldr r3, [pc, #180] @ (8000de8 ) + 8000d32: 701a strb r2, [r3, #0] break; - 8000c18: e01d b.n 8000c56 + 8000d34: e02d b.n 8000d92 case AD5934_ID_EC: if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) // Hardware Setup: Gain Selection (PA6) - 8000c1a: 2140 movs r1, #64 @ 0x40 - 8000c1c: 4821 ldr r0, [pc, #132] @ (8000ca4 ) - 8000c1e: f002 f9e7 bl 8002ff0 - 8000c22: 4603 mov r3, r0 - 8000c24: 2b01 cmp r3, #1 - 8000c26: d103 bne.n 8000c30 - current_hw_mux_connection = AD5934_CH_EC_HIGH_GAIN; - 8000c28: 4b1f ldr r3, [pc, #124] @ (8000ca8 ) - 8000c2a: 220e movs r2, #14 - 8000c2c: 701a strb r2, [r3, #0] + 8000d36: 2140 movs r1, #64 @ 0x40 + 8000d38: 4829 ldr r0, [pc, #164] @ (8000de0 ) + 8000d3a: f002 fa13 bl 8003164 + 8000d3e: 4603 mov r3, r0 + 8000d40: 2b01 cmp r3, #1 + 8000d42: d107 bne.n 8000d54 + current_ec_mux = current_hw_mux_connection = AD5934_CH_EC_HIGH_GAIN; + 8000d44: 4b27 ldr r3, [pc, #156] @ (8000de4 ) + 8000d46: 220e movs r2, #14 + 8000d48: 701a strb r2, [r3, #0] + 8000d4a: 4b26 ldr r3, [pc, #152] @ (8000de4 ) + 8000d4c: 781a ldrb r2, [r3, #0] + 8000d4e: 4b27 ldr r3, [pc, #156] @ (8000dec ) + 8000d50: 701a strb r2, [r3, #0] else - current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; + current_ec_mux = current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; break; - 8000c2e: e012 b.n 8000c56 - current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; - 8000c30: 4b1d ldr r3, [pc, #116] @ (8000ca8 ) - 8000c32: 220d movs r2, #13 - 8000c34: 701a strb r2, [r3, #0] + 8000d52: e01e b.n 8000d92 + current_ec_mux = current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; + 8000d54: 4b23 ldr r3, [pc, #140] @ (8000de4 ) + 8000d56: 220d movs r2, #13 + 8000d58: 701a strb r2, [r3, #0] + 8000d5a: 4b22 ldr r3, [pc, #136] @ (8000de4 ) + 8000d5c: 781a ldrb r2, [r3, #0] + 8000d5e: 4b23 ldr r3, [pc, #140] @ (8000dec ) + 8000d60: 701a strb r2, [r3, #0] break; - 8000c36: e00e b.n 8000c56 + 8000d62: e016 b.n 8000d92 case AD5934_ID_REF: if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 8000c38: 2180 movs r1, #128 @ 0x80 - 8000c3a: 481a ldr r0, [pc, #104] @ (8000ca4 ) - 8000c3c: f002 f9d8 bl 8002ff0 - 8000c40: 4603 mov r3, r0 - 8000c42: 2b01 cmp r3, #1 - 8000c44: d103 bne.n 8000c4e - current_hw_mux_connection = AD5934_CH_REF100R_LOW_GAIN; // 100 Ohms Reference Resistor - 8000c46: 4b18 ldr r3, [pc, #96] @ (8000ca8 ) - 8000c48: 2200 movs r2, #0 - 8000c4a: 701a strb r2, [r3, #0] + 8000d64: 2180 movs r1, #128 @ 0x80 + 8000d66: 481e ldr r0, [pc, #120] @ (8000de0 ) + 8000d68: f002 f9fc bl 8003164 + 8000d6c: 4603 mov r3, r0 + 8000d6e: 2b01 cmp r3, #1 + 8000d70: d107 bne.n 8000d82 + current_ref_mux = current_hw_mux_connection = AD5934_CH_REF100R_LOW_GAIN; // 100 Ohms Reference Resistor + 8000d72: 4b1c ldr r3, [pc, #112] @ (8000de4 ) + 8000d74: 2200 movs r2, #0 + 8000d76: 701a strb r2, [r3, #0] + 8000d78: 4b1a ldr r3, [pc, #104] @ (8000de4 ) + 8000d7a: 781a ldrb r2, [r3, #0] + 8000d7c: 4b1c ldr r3, [pc, #112] @ (8000df0 ) + 8000d7e: 701a strb r2, [r3, #0] else - current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor + current_ref_mux = current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor break; - 8000c4c: e002 b.n 8000c54 - current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor - 8000c4e: 4b16 ldr r3, [pc, #88] @ (8000ca8 ) - 8000c50: 2204 movs r2, #4 - 8000c52: 701a strb r2, [r3, #0] + 8000d80: e006 b.n 8000d90 + current_ref_mux = current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor + 8000d82: 4b18 ldr r3, [pc, #96] @ (8000de4 ) + 8000d84: 2204 movs r2, #4 + 8000d86: 701a strb r2, [r3, #0] + 8000d88: 4b16 ldr r3, [pc, #88] @ (8000de4 ) + 8000d8a: 781a ldrb r2, [r3, #0] + 8000d8c: 4b18 ldr r3, [pc, #96] @ (8000df0 ) + 8000d8e: 701a strb r2, [r3, #0] break; - 8000c54: bf00 nop + 8000d90: bf00 nop } ADG715_SetChannels(current_hw_mux_connection); // Change the analog mux - 8000c56: 4b14 ldr r3, [pc, #80] @ (8000ca8 ) - 8000c58: 781b ldrb r3, [r3, #0] - 8000c5a: 4618 mov r0, r3 - 8000c5c: f000 f9ca bl 8000ff4 + 8000d92: 4b14 ldr r3, [pc, #80] @ (8000de4 ) + 8000d94: 781b ldrb r3, [r3, #0] + 8000d96: 4618 mov r0, r3 + 8000d98: f000 f9d0 bl 800113c is_new_channel = 1; // Channel Switched - 8000c60: 4b0b ldr r3, [pc, #44] @ (8000c90 ) - 8000c62: 2201 movs r2, #1 - 8000c64: 701a strb r2, [r3, #0] + 8000d9c: 4b0b ldr r3, [pc, #44] @ (8000dcc ) + 8000d9e: 2201 movs r2, #1 + 8000da0: 701a strb r2, [r3, #0] state_timer = g_ms_counter; // Reload timer to wait for stability - 8000c66: 4b0b ldr r3, [pc, #44] @ (8000c94 ) - 8000c68: 681b ldr r3, [r3, #0] - 8000c6a: 4a0b ldr r2, [pc, #44] @ (8000c98 ) - 8000c6c: 6013 str r3, [r2, #0] + 8000da2: 4b0b ldr r3, [pc, #44] @ (8000dd0 ) + 8000da4: 681b ldr r3, [r3, #0] + 8000da6: 4a0b ldr r2, [pc, #44] @ (8000dd4 ) + 8000da8: 6013 str r3, [r2, #0] ad5934_state = AD5934_WAIT_MUX; // Next State - 8000c6e: 4b06 ldr r3, [pc, #24] @ (8000c88 ) - 8000c70: 2206 movs r2, #6 - 8000c72: 701a strb r2, [r3, #0] + 8000daa: 4b06 ldr r3, [pc, #24] @ (8000dc4 ) + 8000dac: 2206 movs r2, #6 + 8000dae: 701a strb r2, [r3, #0] break; - 8000c74: e004 b.n 8000c80 + 8000db0: e004 b.n 8000dbc break; - 8000c76: bf00 nop - 8000c78: e002 b.n 8000c80 + 8000db2: bf00 nop + 8000db4: e002 b.n 8000dbc break; - 8000c7a: bf00 nop - 8000c7c: e000 b.n 8000c80 + 8000db6: bf00 nop + 8000db8: e000 b.n 8000dbc break; - 8000c7e: bf00 nop + 8000dba: bf00 nop } } - 8000c80: bf00 nop - 8000c82: 3708 adds r7, #8 - 8000c84: 46bd mov sp, r7 - 8000c86: bd80 pop {r7, pc} - 8000c88: 20000080 .word 0x20000080 - 8000c8c: 20000088 .word 0x20000088 - 8000c90: 20000001 .word 0x20000001 - 8000c94: 20000084 .word 0x20000084 - 8000c98: 2000014c .word 0x2000014c - 8000c9c: 20000089 .word 0x20000089 - 8000ca0: 55555556 .word 0x55555556 - 8000ca4: 40010800 .word 0x40010800 - 8000ca8: 20000000 .word 0x20000000 + 8000dbc: bf00 nop + 8000dbe: 3708 adds r7, #8 + 8000dc0: 46bd mov sp, r7 + 8000dc2: bd80 pop {r7, pc} + 8000dc4: 2000007c .word 0x2000007c + 8000dc8: 20000090 .word 0x20000090 + 8000dcc: 20000003 .word 0x20000003 + 8000dd0: 20000080 .word 0x20000080 + 8000dd4: 20000154 .word 0x20000154 + 8000dd8: 20000092 .word 0x20000092 + 8000ddc: 55555556 .word 0x55555556 + 8000de0: 40010800 .word 0x40010800 + 8000de4: 20000000 .word 0x20000000 + 8000de8: 20000002 .word 0x20000002 + 8000dec: 20000001 .word 0x20000001 + 8000df0: 20000091 .word 0x20000091 -08000cac : +08000df4 : /** * Simple insertion sort - BURST_SIZE is small, so the cost is negligible * and it avoids depending on qsort/heap allocation. **/ void AD5934_Sort_Array(float *v, uint8_t n) { - 8000cac: b580 push {r7, lr} - 8000cae: b084 sub sp, #16 - 8000cb0: af00 add r7, sp, #0 - 8000cb2: 6078 str r0, [r7, #4] - 8000cb4: 460b mov r3, r1 - 8000cb6: 70fb strb r3, [r7, #3] + 8000df4: b580 push {r7, lr} + 8000df6: b084 sub sp, #16 + 8000df8: af00 add r7, sp, #0 + 8000dfa: 6078 str r0, [r7, #4] + 8000dfc: 460b mov r3, r1 + 8000dfe: 70fb strb r3, [r7, #3] for (uint8_t i = 1; i < n; i++) - 8000cb8: 2301 movs r3, #1 - 8000cba: 73fb strb r3, [r7, #15] - 8000cbc: e039 b.n 8000d32 + 8000e00: 2301 movs r3, #1 + 8000e02: 73fb strb r3, [r7, #15] + 8000e04: e039 b.n 8000e7a { float key = v[i]; - 8000cbe: 7bfb ldrb r3, [r7, #15] - 8000cc0: 009b lsls r3, r3, #2 - 8000cc2: 687a ldr r2, [r7, #4] - 8000cc4: 4413 add r3, r2 - 8000cc6: 681b ldr r3, [r3, #0] - 8000cc8: 60bb str r3, [r7, #8] + 8000e06: 7bfb ldrb r3, [r7, #15] + 8000e08: 009b lsls r3, r3, #2 + 8000e0a: 687a ldr r2, [r7, #4] + 8000e0c: 4413 add r3, r2 + 8000e0e: 681b ldr r3, [r3, #0] + 8000e10: 60bb str r3, [r7, #8] int8_t j = (int8_t)i - 1; - 8000cca: 7bfb ldrb r3, [r7, #15] - 8000ccc: 3b01 subs r3, #1 - 8000cce: b2db uxtb r3, r3 - 8000cd0: 73bb strb r3, [r7, #14] + 8000e12: 7bfb ldrb r3, [r7, #15] + 8000e14: 3b01 subs r3, #1 + 8000e16: b2db uxtb r3, r3 + 8000e18: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 8000cd2: e012 b.n 8000cfa + 8000e1a: e012 b.n 8000e42 { v[j + 1] = v[j]; - 8000cd4: f997 300e ldrsb.w r3, [r7, #14] - 8000cd8: 009b lsls r3, r3, #2 - 8000cda: 687a ldr r2, [r7, #4] - 8000cdc: 441a add r2, r3 - 8000cde: f997 300e ldrsb.w r3, [r7, #14] - 8000ce2: 3301 adds r3, #1 - 8000ce4: 009b lsls r3, r3, #2 - 8000ce6: 6879 ldr r1, [r7, #4] - 8000ce8: 440b add r3, r1 - 8000cea: 6812 ldr r2, [r2, #0] - 8000cec: 601a str r2, [r3, #0] + 8000e1c: f997 300e ldrsb.w r3, [r7, #14] + 8000e20: 009b lsls r3, r3, #2 + 8000e22: 687a ldr r2, [r7, #4] + 8000e24: 441a add r2, r3 + 8000e26: f997 300e ldrsb.w r3, [r7, #14] + 8000e2a: 3301 adds r3, #1 + 8000e2c: 009b lsls r3, r3, #2 + 8000e2e: 6879 ldr r1, [r7, #4] + 8000e30: 440b add r3, r1 + 8000e32: 6812 ldr r2, [r2, #0] + 8000e34: 601a str r2, [r3, #0] j--; - 8000cee: f997 300e ldrsb.w r3, [r7, #14] - 8000cf2: b2db uxtb r3, r3 - 8000cf4: 3b01 subs r3, #1 - 8000cf6: b2db uxtb r3, r3 - 8000cf8: 73bb strb r3, [r7, #14] + 8000e36: f997 300e ldrsb.w r3, [r7, #14] + 8000e3a: b2db uxtb r3, r3 + 8000e3c: 3b01 subs r3, #1 + 8000e3e: b2db uxtb r3, r3 + 8000e40: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 8000cfa: f997 300e ldrsb.w r3, [r7, #14] - 8000cfe: 2b00 cmp r3, #0 - 8000d00: db0c blt.n 8000d1c - 8000d02: f997 300e ldrsb.w r3, [r7, #14] - 8000d06: 009b lsls r3, r3, #2 - 8000d08: 687a ldr r2, [r7, #4] - 8000d0a: 4413 add r3, r2 - 8000d0c: 681b ldr r3, [r3, #0] - 8000d0e: 4619 mov r1, r3 - 8000d10: 68b8 ldr r0, [r7, #8] - 8000d12: f7ff fccf bl 80006b4 <__aeabi_fcmplt> - 8000d16: 4603 mov r3, r0 - 8000d18: 2b00 cmp r3, #0 - 8000d1a: d1db bne.n 8000cd4 + 8000e42: f997 300e ldrsb.w r3, [r7, #14] + 8000e46: 2b00 cmp r3, #0 + 8000e48: db0c blt.n 8000e64 + 8000e4a: f997 300e ldrsb.w r3, [r7, #14] + 8000e4e: 009b lsls r3, r3, #2 + 8000e50: 687a ldr r2, [r7, #4] + 8000e52: 4413 add r3, r2 + 8000e54: 681b ldr r3, [r3, #0] + 8000e56: 4619 mov r1, r3 + 8000e58: 68b8 ldr r0, [r7, #8] + 8000e5a: f7ff fc2b bl 80006b4 <__aeabi_fcmplt> + 8000e5e: 4603 mov r3, r0 + 8000e60: 2b00 cmp r3, #0 + 8000e62: d1db bne.n 8000e1c } v[j + 1] = key; - 8000d1c: f997 300e ldrsb.w r3, [r7, #14] - 8000d20: 3301 adds r3, #1 - 8000d22: 009b lsls r3, r3, #2 - 8000d24: 687a ldr r2, [r7, #4] - 8000d26: 4413 add r3, r2 - 8000d28: 68ba ldr r2, [r7, #8] - 8000d2a: 601a str r2, [r3, #0] + 8000e64: f997 300e ldrsb.w r3, [r7, #14] + 8000e68: 3301 adds r3, #1 + 8000e6a: 009b lsls r3, r3, #2 + 8000e6c: 687a ldr r2, [r7, #4] + 8000e6e: 4413 add r3, r2 + 8000e70: 68ba ldr r2, [r7, #8] + 8000e72: 601a str r2, [r3, #0] for (uint8_t i = 1; i < n; i++) - 8000d2c: 7bfb ldrb r3, [r7, #15] - 8000d2e: 3301 adds r3, #1 - 8000d30: 73fb strb r3, [r7, #15] - 8000d32: 7bfa ldrb r2, [r7, #15] - 8000d34: 78fb ldrb r3, [r7, #3] - 8000d36: 429a cmp r2, r3 - 8000d38: d3c1 bcc.n 8000cbe + 8000e74: 7bfb ldrb r3, [r7, #15] + 8000e76: 3301 adds r3, #1 + 8000e78: 73fb strb r3, [r7, #15] + 8000e7a: 7bfa ldrb r2, [r7, #15] + 8000e7c: 78fb ldrb r3, [r7, #3] + 8000e7e: 429a cmp r2, r3 + 8000e80: d3c1 bcc.n 8000e06 } } - 8000d3a: bf00 nop - 8000d3c: bf00 nop - 8000d3e: 3710 adds r7, #16 - 8000d40: 46bd mov sp, r7 - 8000d42: bd80 pop {r7, pc} + 8000e82: bf00 nop + 8000e84: bf00 nop + 8000e86: 3710 adds r7, #16 + 8000e88: 46bd mov sp, r7 + 8000e8a: bd80 pop {r7, pc} -08000d44 : +08000e8c : * original order is not needed), discards TRIM_COUNT values from each * end, and averages the remainder. Sorting in place avoids a temporary * array and removes the need for memcpy()/string.h entirely. **/ float AD5934_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim) { - 8000d44: b580 push {r7, lr} - 8000d46: b086 sub sp, #24 - 8000d48: af00 add r7, sp, #0 - 8000d4a: 6078 str r0, [r7, #4] - 8000d4c: 460b mov r3, r1 - 8000d4e: 70fb strb r3, [r7, #3] - 8000d50: 4613 mov r3, r2 - 8000d52: 70bb strb r3, [r7, #2] + 8000e8c: b580 push {r7, lr} + 8000e8e: b086 sub sp, #24 + 8000e90: af00 add r7, sp, #0 + 8000e92: 6078 str r0, [r7, #4] + 8000e94: 460b mov r3, r1 + 8000e96: 70fb strb r3, [r7, #3] + 8000e98: 4613 mov r3, r2 + 8000e9a: 70bb strb r3, [r7, #2] AD5934_Sort_Array(buffer, n); - 8000d54: 78fb ldrb r3, [r7, #3] - 8000d56: 4619 mov r1, r3 - 8000d58: 6878 ldr r0, [r7, #4] - 8000d5a: f7ff ffa7 bl 8000cac + 8000e9c: 78fb ldrb r3, [r7, #3] + 8000e9e: 4619 mov r1, r3 + 8000ea0: 6878 ldr r0, [r7, #4] + 8000ea2: f7ff ffa7 bl 8000df4 uint8_t start = trim; - 8000d5e: 78bb ldrb r3, [r7, #2] - 8000d60: 75fb strb r3, [r7, #23] + 8000ea6: 78bb ldrb r3, [r7, #2] + 8000ea8: 75fb strb r3, [r7, #23] uint8_t end = n - trim; /* exclusive */ - 8000d62: 78fa ldrb r2, [r7, #3] - 8000d64: 78bb ldrb r3, [r7, #2] - 8000d66: 1ad3 subs r3, r2, r3 - 8000d68: 75bb strb r3, [r7, #22] + 8000eaa: 78fa ldrb r2, [r7, #3] + 8000eac: 78bb ldrb r3, [r7, #2] + 8000eae: 1ad3 subs r3, r2, r3 + 8000eb0: 75bb strb r3, [r7, #22] if (end <= start) /* guard against a misconfigured trim value */ - 8000d6a: 7dba ldrb r2, [r7, #22] - 8000d6c: 7dfb ldrb r3, [r7, #23] - 8000d6e: 429a cmp r2, r3 - 8000d70: d803 bhi.n 8000d7a + 8000eb2: 7dba ldrb r2, [r7, #22] + 8000eb4: 7dfb ldrb r3, [r7, #23] + 8000eb6: 429a cmp r2, r3 + 8000eb8: d803 bhi.n 8000ec2 { start = 0; - 8000d72: 2300 movs r3, #0 - 8000d74: 75fb strb r3, [r7, #23] + 8000eba: 2300 movs r3, #0 + 8000ebc: 75fb strb r3, [r7, #23] end = n; - 8000d76: 78fb ldrb r3, [r7, #3] - 8000d78: 75bb strb r3, [r7, #22] + 8000ebe: 78fb ldrb r3, [r7, #3] + 8000ec0: 75bb strb r3, [r7, #22] } float sum = 0.0f; - 8000d7a: f04f 0300 mov.w r3, #0 - 8000d7e: 613b str r3, [r7, #16] + 8000ec2: f04f 0300 mov.w r3, #0 + 8000ec6: 613b str r3, [r7, #16] uint8_t count = 0; - 8000d80: 2300 movs r3, #0 - 8000d82: 73fb strb r3, [r7, #15] + 8000ec8: 2300 movs r3, #0 + 8000eca: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 8000d84: 7dfb ldrb r3, [r7, #23] - 8000d86: 73bb strb r3, [r7, #14] - 8000d88: e010 b.n 8000dac + 8000ecc: 7dfb ldrb r3, [r7, #23] + 8000ece: 73bb strb r3, [r7, #14] + 8000ed0: e010 b.n 8000ef4 { sum += buffer[i]; - 8000d8a: 7bbb ldrb r3, [r7, #14] - 8000d8c: 009b lsls r3, r3, #2 - 8000d8e: 687a ldr r2, [r7, #4] - 8000d90: 4413 add r3, r2 - 8000d92: 681b ldr r3, [r3, #0] - 8000d94: 4619 mov r1, r3 - 8000d96: 6938 ldr r0, [r7, #16] - 8000d98: f7ff f9e6 bl 8000168 <__addsf3> - 8000d9c: 4603 mov r3, r0 - 8000d9e: 613b str r3, [r7, #16] + 8000ed2: 7bbb ldrb r3, [r7, #14] + 8000ed4: 009b lsls r3, r3, #2 + 8000ed6: 687a ldr r2, [r7, #4] + 8000ed8: 4413 add r3, r2 + 8000eda: 681b ldr r3, [r3, #0] + 8000edc: 4619 mov r1, r3 + 8000ede: 6938 ldr r0, [r7, #16] + 8000ee0: f7ff f942 bl 8000168 <__addsf3> + 8000ee4: 4603 mov r3, r0 + 8000ee6: 613b str r3, [r7, #16] count++; - 8000da0: 7bfb ldrb r3, [r7, #15] - 8000da2: 3301 adds r3, #1 - 8000da4: 73fb strb r3, [r7, #15] + 8000ee8: 7bfb ldrb r3, [r7, #15] + 8000eea: 3301 adds r3, #1 + 8000eec: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 8000da6: 7bbb ldrb r3, [r7, #14] - 8000da8: 3301 adds r3, #1 - 8000daa: 73bb strb r3, [r7, #14] - 8000dac: 7bba ldrb r2, [r7, #14] - 8000dae: 7dbb ldrb r3, [r7, #22] - 8000db0: 429a cmp r2, r3 - 8000db2: d3ea bcc.n 8000d8a + 8000eee: 7bbb ldrb r3, [r7, #14] + 8000ef0: 3301 adds r3, #1 + 8000ef2: 73bb strb r3, [r7, #14] + 8000ef4: 7bba ldrb r2, [r7, #14] + 8000ef6: 7dbb ldrb r3, [r7, #22] + 8000ef8: 429a cmp r2, r3 + 8000efa: d3ea bcc.n 8000ed2 } return sum / (float)count; - 8000db4: 7bfb ldrb r3, [r7, #15] - 8000db6: 4618 mov r0, r3 - 8000db8: f7ff fa86 bl 80002c8 <__aeabi_ui2f> - 8000dbc: 4603 mov r3, r0 - 8000dbe: 4619 mov r1, r3 - 8000dc0: 6938 ldr r0, [r7, #16] - 8000dc2: f7ff fb8d bl 80004e0 <__aeabi_fdiv> - 8000dc6: 4603 mov r3, r0 + 8000efc: 7bfb ldrb r3, [r7, #15] + 8000efe: 4618 mov r0, r3 + 8000f00: f7ff f9e2 bl 80002c8 <__aeabi_ui2f> + 8000f04: 4603 mov r3, r0 + 8000f06: 4619 mov r1, r3 + 8000f08: 6938 ldr r0, [r7, #16] + 8000f0a: f7ff fae9 bl 80004e0 <__aeabi_fdiv> + 8000f0e: 4603 mov r3, r0 } - 8000dc8: 4618 mov r0, r3 - 8000dca: 3718 adds r7, #24 - 8000dcc: 46bd mov sp, r7 - 8000dce: bd80 pop {r7, pc} + 8000f10: 4618 mov r0, r3 + 8000f12: 3718 adds r7, #24 + 8000f14: 46bd mov sp, r7 + 8000f16: bd80 pop {r7, pc} -08000dd0 : +08000f18 : /* * Simple average of the history buffer (stage-2 sliding window) */ float AD5934_History_Average(const float *hist, uint8_t n) { - 8000dd0: b580 push {r7, lr} - 8000dd2: b084 sub sp, #16 - 8000dd4: af00 add r7, sp, #0 - 8000dd6: 6078 str r0, [r7, #4] - 8000dd8: 460b mov r3, r1 - 8000dda: 70fb strb r3, [r7, #3] + 8000f18: b580 push {r7, lr} + 8000f1a: b084 sub sp, #16 + 8000f1c: af00 add r7, sp, #0 + 8000f1e: 6078 str r0, [r7, #4] + 8000f20: 460b mov r3, r1 + 8000f22: 70fb strb r3, [r7, #3] float sum = 0.0f; - 8000ddc: f04f 0300 mov.w r3, #0 - 8000de0: 60fb str r3, [r7, #12] + 8000f24: f04f 0300 mov.w r3, #0 + 8000f28: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 8000de2: 2300 movs r3, #0 - 8000de4: 72fb strb r3, [r7, #11] - 8000de6: e00d b.n 8000e04 + 8000f2a: 2300 movs r3, #0 + 8000f2c: 72fb strb r3, [r7, #11] + 8000f2e: e00d b.n 8000f4c sum += hist[i]; - 8000de8: 7afb ldrb r3, [r7, #11] - 8000dea: 009b lsls r3, r3, #2 - 8000dec: 687a ldr r2, [r7, #4] - 8000dee: 4413 add r3, r2 - 8000df0: 681b ldr r3, [r3, #0] - 8000df2: 4619 mov r1, r3 - 8000df4: 68f8 ldr r0, [r7, #12] - 8000df6: f7ff f9b7 bl 8000168 <__addsf3> - 8000dfa: 4603 mov r3, r0 - 8000dfc: 60fb str r3, [r7, #12] + 8000f30: 7afb ldrb r3, [r7, #11] + 8000f32: 009b lsls r3, r3, #2 + 8000f34: 687a ldr r2, [r7, #4] + 8000f36: 4413 add r3, r2 + 8000f38: 681b ldr r3, [r3, #0] + 8000f3a: 4619 mov r1, r3 + 8000f3c: 68f8 ldr r0, [r7, #12] + 8000f3e: f7ff f913 bl 8000168 <__addsf3> + 8000f42: 4603 mov r3, r0 + 8000f44: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 8000dfe: 7afb ldrb r3, [r7, #11] - 8000e00: 3301 adds r3, #1 - 8000e02: 72fb strb r3, [r7, #11] - 8000e04: 7afa ldrb r2, [r7, #11] - 8000e06: 78fb ldrb r3, [r7, #3] - 8000e08: 429a cmp r2, r3 - 8000e0a: d3ed bcc.n 8000de8 + 8000f46: 7afb ldrb r3, [r7, #11] + 8000f48: 3301 adds r3, #1 + 8000f4a: 72fb strb r3, [r7, #11] + 8000f4c: 7afa ldrb r2, [r7, #11] + 8000f4e: 78fb ldrb r3, [r7, #3] + 8000f50: 429a cmp r2, r3 + 8000f52: d3ed bcc.n 8000f30 return sum / (float)n; - 8000e0c: 78fb ldrb r3, [r7, #3] - 8000e0e: 4618 mov r0, r3 - 8000e10: f7ff fa5a bl 80002c8 <__aeabi_ui2f> - 8000e14: 4603 mov r3, r0 - 8000e16: 4619 mov r1, r3 - 8000e18: 68f8 ldr r0, [r7, #12] - 8000e1a: f7ff fb61 bl 80004e0 <__aeabi_fdiv> - 8000e1e: 4603 mov r3, r0 + 8000f54: 78fb ldrb r3, [r7, #3] + 8000f56: 4618 mov r0, r3 + 8000f58: f7ff f9b6 bl 80002c8 <__aeabi_ui2f> + 8000f5c: 4603 mov r3, r0 + 8000f5e: 4619 mov r1, r3 + 8000f60: 68f8 ldr r0, [r7, #12] + 8000f62: f7ff fabd bl 80004e0 <__aeabi_fdiv> + 8000f66: 4603 mov r3, r0 } - 8000e20: 4618 mov r0, r3 - 8000e22: 3710 adds r7, #16 - 8000e24: 46bd mov sp, r7 - 8000e26: bd80 pop {r7, pc} + 8000f68: 4618 mov r0, r3 + 8000f6a: 3710 adds r7, #16 + 8000f6c: 46bd mov sp, r7 + 8000f6e: bd80 pop {r7, pc} -08000e28 : +08000f70 : * Common processing core: applied identically to all 3 channels. * Receives the current raw reading and the channel's state (global * arrays/struct). **/ void AD5934_Process_Sample(AD5934_filter_t *ch, float raw) { - 8000e28: b590 push {r4, r7, lr} - 8000e2a: b085 sub sp, #20 - 8000e2c: af00 add r7, sp, #0 - 8000e2e: 6078 str r0, [r7, #4] - 8000e30: 6039 str r1, [r7, #0] + 8000f70: b590 push {r4, r7, lr} + 8000f72: b085 sub sp, #20 + 8000f74: af00 add r7, sp, #0 + 8000f76: 6078 str r0, [r7, #4] + 8000f78: 6039 str r1, [r7, #0] /* --- Stage 1: accumulate into the current burst --- */ ch->burst[ch->burst_index] = raw; - 8000e32: 687b ldr r3, [r7, #4] - 8000e34: 7d1b ldrb r3, [r3, #20] - 8000e36: 4619 mov r1, r3 - 8000e38: 687b ldr r3, [r7, #4] - 8000e3a: 683a ldr r2, [r7, #0] - 8000e3c: f843 2021 str.w r2, [r3, r1, lsl #2] + 8000f7a: 687b ldr r3, [r7, #4] + 8000f7c: 7d1b ldrb r3, [r3, #20] + 8000f7e: 4619 mov r1, r3 + 8000f80: 687b ldr r3, [r7, #4] + 8000f82: 683a ldr r2, [r7, #0] + 8000f84: f843 2021 str.w r2, [r3, r1, lsl #2] ch->burst_index++; - 8000e40: 687b ldr r3, [r7, #4] - 8000e42: 7d1b ldrb r3, [r3, #20] - 8000e44: 3301 adds r3, #1 - 8000e46: b2da uxtb r2, r3 - 8000e48: 687b ldr r3, [r7, #4] - 8000e4a: 751a strb r2, [r3, #20] + 8000f88: 687b ldr r3, [r7, #4] + 8000f8a: 7d1b ldrb r3, [r3, #20] + 8000f8c: 3301 adds r3, #1 + 8000f8e: b2da uxtb r2, r3 + 8000f90: 687b ldr r3, [r7, #4] + 8000f92: 751a strb r2, [r3, #20] if (ch->burst_index < AD5934_BURST_SIZE) - 8000e4c: 687b ldr r3, [r7, #4] - 8000e4e: 7d1b ldrb r3, [r3, #20] - 8000e50: 2b04 cmp r3, #4 - 8000e52: d97a bls.n 8000f4a + 8000f94: 687b ldr r3, [r7, #4] + 8000f96: 7d1b ldrb r3, [r3, #20] + 8000f98: 2b04 cmp r3, #4 + 8000f9a: d97a bls.n 8001092 return; /* still collecting the burst, nothing else to do */ /* Burst complete: compute the trimmed mean */ float burst_result = AD5934_Trimmed_Mean(ch->burst, AD5934_BURST_SIZE, AD5934_TRIM_COUNT); - 8000e54: 687b ldr r3, [r7, #4] - 8000e56: 2201 movs r2, #1 - 8000e58: 2105 movs r1, #5 - 8000e5a: 4618 mov r0, r3 - 8000e5c: f7ff ff72 bl 8000d44 - 8000e60: 60f8 str r0, [r7, #12] + 8000f9c: 687b ldr r3, [r7, #4] + 8000f9e: 2201 movs r2, #1 + 8000fa0: 2105 movs r1, #5 + 8000fa2: 4618 mov r0, r3 + 8000fa4: f7ff ff72 bl 8000e8c + 8000fa8: 60f8 str r0, [r7, #12] ch->burst_index = 0; /* reset for the next burst */ - 8000e62: 687b ldr r3, [r7, #4] - 8000e64: 2200 movs r2, #0 - 8000e66: 751a strb r2, [r3, #20] + 8000faa: 687b ldr r3, [r7, #4] + 8000fac: 2200 movs r2, #0 + 8000fae: 751a strb r2, [r3, #20] /* --- Stage 2a: rolling history / sliding window --- */ ch->history[ch->history_index] = burst_result; - 8000e68: 687b ldr r3, [r7, #4] - 8000e6a: f893 302c ldrb.w r3, [r3, #44] @ 0x2c - 8000e6e: 461a mov r2, r3 - 8000e70: 687b ldr r3, [r7, #4] - 8000e72: 3206 adds r2, #6 - 8000e74: 68f9 ldr r1, [r7, #12] - 8000e76: f843 1022 str.w r1, [r3, r2, lsl #2] + 8000fb0: 687b ldr r3, [r7, #4] + 8000fb2: f893 302c ldrb.w r3, [r3, #44] @ 0x2c + 8000fb6: 461a mov r2, r3 + 8000fb8: 687b ldr r3, [r7, #4] + 8000fba: 3206 adds r2, #6 + 8000fbc: 68f9 ldr r1, [r7, #12] + 8000fbe: f843 1022 str.w r1, [r3, r2, lsl #2] ch->history_index = (uint8_t)((ch->history_index + 1) % AD5934_HISTORY_SIZE); - 8000e7a: 687b ldr r3, [r7, #4] - 8000e7c: f893 302c ldrb.w r3, [r3, #44] @ 0x2c - 8000e80: 1c5a adds r2, r3, #1 - 8000e82: 4b34 ldr r3, [pc, #208] @ (8000f54 ) - 8000e84: fb83 1302 smull r1, r3, r3, r2 - 8000e88: 1059 asrs r1, r3, #1 - 8000e8a: 17d3 asrs r3, r2, #31 - 8000e8c: 1ac9 subs r1, r1, r3 - 8000e8e: 460b mov r3, r1 - 8000e90: 009b lsls r3, r3, #2 - 8000e92: 440b add r3, r1 - 8000e94: 1ad1 subs r1, r2, r3 - 8000e96: b2ca uxtb r2, r1 - 8000e98: 687b ldr r3, [r7, #4] - 8000e9a: f883 202c strb.w r2, [r3, #44] @ 0x2c + 8000fc2: 687b ldr r3, [r7, #4] + 8000fc4: f893 302c ldrb.w r3, [r3, #44] @ 0x2c + 8000fc8: 1c5a adds r2, r3, #1 + 8000fca: 4b34 ldr r3, [pc, #208] @ (800109c ) + 8000fcc: fb83 1302 smull r1, r3, r3, r2 + 8000fd0: 1059 asrs r1, r3, #1 + 8000fd2: 17d3 asrs r3, r2, #31 + 8000fd4: 1ac9 subs r1, r1, r3 + 8000fd6: 460b mov r3, r1 + 8000fd8: 009b lsls r3, r3, #2 + 8000fda: 440b add r3, r1 + 8000fdc: 1ad1 subs r1, r2, r3 + 8000fde: b2ca uxtb r2, r1 + 8000fe0: 687b ldr r3, [r7, #4] + 8000fe2: f883 202c strb.w r2, [r3, #44] @ 0x2c if (ch->history_count < AD5934_HISTORY_SIZE) - 8000e9e: 687b ldr r3, [r7, #4] - 8000ea0: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 8000ea4: 2b04 cmp r3, #4 - 8000ea6: d807 bhi.n 8000eb8 + 8000fe6: 687b ldr r3, [r7, #4] + 8000fe8: f893 302d ldrb.w r3, [r3, #45] @ 0x2d + 8000fec: 2b04 cmp r3, #4 + 8000fee: d807 bhi.n 8001000 ch->history_count++; - 8000ea8: 687b ldr r3, [r7, #4] - 8000eaa: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 8000eae: 3301 adds r3, #1 - 8000eb0: b2da uxtb r2, r3 - 8000eb2: 687b ldr r3, [r7, #4] - 8000eb4: f883 202d strb.w r2, [r3, #45] @ 0x2d + 8000ff0: 687b ldr r3, [r7, #4] + 8000ff2: f893 302d ldrb.w r3, [r3, #45] @ 0x2d + 8000ff6: 3301 adds r3, #1 + 8000ff8: b2da uxtb r2, r3 + 8000ffa: 687b ldr r3, [r7, #4] + 8000ffc: f883 202d strb.w r2, [r3, #45] @ 0x2d float window_average = AD5934_History_Average(ch->history, ch->history_count); - 8000eb8: 687b ldr r3, [r7, #4] - 8000eba: f103 0218 add.w r2, r3, #24 - 8000ebe: 687b ldr r3, [r7, #4] - 8000ec0: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 8000ec4: 4619 mov r1, r3 - 8000ec6: 4610 mov r0, r2 - 8000ec8: f7ff ff82 bl 8000dd0 - 8000ecc: 60b8 str r0, [r7, #8] + 8001000: 687b ldr r3, [r7, #4] + 8001002: f103 0218 add.w r2, r3, #24 + 8001006: 687b ldr r3, [r7, #4] + 8001008: f893 302d ldrb.w r3, [r3, #45] @ 0x2d + 800100c: 4619 mov r1, r3 + 800100e: 4610 mov r0, r2 + 8001010: f7ff ff82 bl 8000f18 + 8001014: 60b8 str r0, [r7, #8] /* --- Stage 2b: first-order IIR low-pass filter on the burst result --- */ if (!ch->iir_initialized) - 8000ece: 687b ldr r3, [r7, #4] - 8000ed0: f893 3034 ldrb.w r3, [r3, #52] @ 0x34 - 8000ed4: 2b00 cmp r3, #0 - 8000ed6: d107 bne.n 8000ee8 + 8001016: 687b ldr r3, [r7, #4] + 8001018: f893 3034 ldrb.w r3, [r3, #52] @ 0x34 + 800101c: 2b00 cmp r3, #0 + 800101e: d107 bne.n 8001030 { ch->iir_state = burst_result; - 8000ed8: 687b ldr r3, [r7, #4] - 8000eda: 68fa ldr r2, [r7, #12] - 8000edc: 631a str r2, [r3, #48] @ 0x30 + 8001020: 687b ldr r3, [r7, #4] + 8001022: 68fa ldr r2, [r7, #12] + 8001024: 631a str r2, [r3, #48] @ 0x30 ch->iir_initialized = 1; - 8000ede: 687b ldr r3, [r7, #4] - 8000ee0: 2201 movs r2, #1 - 8000ee2: f883 2034 strb.w r2, [r3, #52] @ 0x34 - 8000ee6: e014 b.n 8000f12 + 8001026: 687b ldr r3, [r7, #4] + 8001028: 2201 movs r2, #1 + 800102a: f883 2034 strb.w r2, [r3, #52] @ 0x34 + 800102e: e014 b.n 800105a } else { ch->iir_state = AD5934_IIR_ALPHA * burst_result + (1.0f - AD5934_IIR_ALPHA) * ch->iir_state; - 8000ee8: 491b ldr r1, [pc, #108] @ (8000f58 ) - 8000eea: 68f8 ldr r0, [r7, #12] - 8000eec: f7ff fa44 bl 8000378 <__aeabi_fmul> - 8000ef0: 4603 mov r3, r0 - 8000ef2: 461c mov r4, r3 - 8000ef4: 687b ldr r3, [r7, #4] - 8000ef6: 6b1b ldr r3, [r3, #48] @ 0x30 - 8000ef8: 4918 ldr r1, [pc, #96] @ (8000f5c ) - 8000efa: 4618 mov r0, r3 - 8000efc: f7ff fa3c bl 8000378 <__aeabi_fmul> - 8000f00: 4603 mov r3, r0 - 8000f02: 4619 mov r1, r3 - 8000f04: 4620 mov r0, r4 - 8000f06: f7ff f92f bl 8000168 <__addsf3> - 8000f0a: 4603 mov r3, r0 - 8000f0c: 461a mov r2, r3 - 8000f0e: 687b ldr r3, [r7, #4] - 8000f10: 631a str r2, [r3, #48] @ 0x30 + 8001030: 491b ldr r1, [pc, #108] @ (80010a0 ) + 8001032: 68f8 ldr r0, [r7, #12] + 8001034: f7ff f9a0 bl 8000378 <__aeabi_fmul> + 8001038: 4603 mov r3, r0 + 800103a: 461c mov r4, r3 + 800103c: 687b ldr r3, [r7, #4] + 800103e: 6b1b ldr r3, [r3, #48] @ 0x30 + 8001040: 4918 ldr r1, [pc, #96] @ (80010a4 ) + 8001042: 4618 mov r0, r3 + 8001044: f7ff f998 bl 8000378 <__aeabi_fmul> + 8001048: 4603 mov r3, r0 + 800104a: 4619 mov r1, r3 + 800104c: 4620 mov r0, r4 + 800104e: f7ff f88b bl 8000168 <__addsf3> + 8001052: 4603 mov r3, r0 + 8001054: 461a mov r2, r3 + 8001056: 687b ldr r3, [r7, #4] + 8001058: 631a str r2, [r3, #48] @ 0x30 } /* Final output: combines the IIR state (fast response to real drift) * with the window average (more stable, slower response). Adjust * the weighting per channel if needed. */ ch->filtered_value = 0.5f * ch->iir_state + 0.5f * window_average; - 8000f12: 687b ldr r3, [r7, #4] - 8000f14: 6b1b ldr r3, [r3, #48] @ 0x30 - 8000f16: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 - 8000f1a: 4618 mov r0, r3 - 8000f1c: f7ff fa2c bl 8000378 <__aeabi_fmul> - 8000f20: 4603 mov r3, r0 - 8000f22: 461c mov r4, r3 - 8000f24: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 - 8000f28: 68b8 ldr r0, [r7, #8] - 8000f2a: f7ff fa25 bl 8000378 <__aeabi_fmul> - 8000f2e: 4603 mov r3, r0 - 8000f30: 4619 mov r1, r3 - 8000f32: 4620 mov r0, r4 - 8000f34: f7ff f918 bl 8000168 <__addsf3> - 8000f38: 4603 mov r3, r0 - 8000f3a: 461a mov r2, r3 - 8000f3c: 687b ldr r3, [r7, #4] - 8000f3e: 639a str r2, [r3, #56] @ 0x38 + 800105a: 687b ldr r3, [r7, #4] + 800105c: 6b1b ldr r3, [r3, #48] @ 0x30 + 800105e: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 + 8001062: 4618 mov r0, r3 + 8001064: f7ff f988 bl 8000378 <__aeabi_fmul> + 8001068: 4603 mov r3, r0 + 800106a: 461c mov r4, r3 + 800106c: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 + 8001070: 68b8 ldr r0, [r7, #8] + 8001072: f7ff f981 bl 8000378 <__aeabi_fmul> + 8001076: 4603 mov r3, r0 + 8001078: 4619 mov r1, r3 + 800107a: 4620 mov r0, r4 + 800107c: f7ff f874 bl 8000168 <__addsf3> + 8001080: 4603 mov r3, r0 + 8001082: 461a mov r2, r3 + 8001084: 687b ldr r3, [r7, #4] + 8001086: 639a str r2, [r3, #56] @ 0x38 ch->value_valid = 1; - 8000f40: 687b ldr r3, [r7, #4] - 8000f42: 2201 movs r2, #1 - 8000f44: f883 203c strb.w r2, [r3, #60] @ 0x3c - 8000f48: e000 b.n 8000f4c + 8001088: 687b ldr r3, [r7, #4] + 800108a: 2201 movs r2, #1 + 800108c: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8001090: e000 b.n 8001094 return; /* still collecting the burst, nothing else to do */ - 8000f4a: bf00 nop + 8001092: bf00 nop } - 8000f4c: 3714 adds r7, #20 - 8000f4e: 46bd mov sp, r7 - 8000f50: bd90 pop {r4, r7, pc} - 8000f52: bf00 nop - 8000f54: 66666667 .word 0x66666667 - 8000f58: 3f0ccccd .word 0x3f0ccccd - 8000f5c: 3ee66666 .word 0x3ee66666 + 8001094: 3714 adds r7, #20 + 8001096: 46bd mov sp, r7 + 8001098: bd90 pop {r4, r7, pc} + 800109a: bf00 nop + 800109c: 66666667 .word 0x66666667 + 80010a0: 3f0ccccd .word 0x3f0ccccd + 80010a4: 3ee66666 .word 0x3ee66666 -08000f60 : +080010a8 : /* ---------------------------------------------------------------------- */ /* Call this every time a sweep completes with the mux on the RTD * (PT100/PT1000) channel */ void AD5934_RTD_NewSample(float raw) { - 8000f60: b580 push {r7, lr} - 8000f62: b082 sub sp, #8 - 8000f64: af00 add r7, sp, #0 - 8000f66: 6078 str r0, [r7, #4] + 80010a8: b580 push {r7, lr} + 80010aa: b082 sub sp, #8 + 80010ac: af00 add r7, sp, #0 + 80010ae: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_rtd_filter, raw); - 8000f68: 6879 ldr r1, [r7, #4] - 8000f6a: 4803 ldr r0, [pc, #12] @ (8000f78 ) - 8000f6c: f7ff ff5c bl 8000e28 + 80010b0: 6879 ldr r1, [r7, #4] + 80010b2: 4803 ldr r0, [pc, #12] @ (80010c0 ) + 80010b4: f7ff ff5c bl 8000f70 } - 8000f70: bf00 nop - 8000f72: 3708 adds r7, #8 - 8000f74: 46bd mov sp, r7 - 8000f76: bd80 pop {r7, pc} - 8000f78: 2000008c .word 0x2000008c + 80010b8: bf00 nop + 80010ba: 3708 adds r7, #8 + 80010bc: 46bd mov sp, r7 + 80010be: bd80 pop {r7, pc} + 80010c0: 20000094 .word 0x20000094 -08000f7c : +080010c4 : /* Call this every time a sweep completes with the mux on the EC * (conductivity probe) channel */ void AD5934_EC_NewSample(float raw) { - 8000f7c: b580 push {r7, lr} - 8000f7e: b082 sub sp, #8 - 8000f80: af00 add r7, sp, #0 - 8000f82: 6078 str r0, [r7, #4] + 80010c4: b580 push {r7, lr} + 80010c6: b082 sub sp, #8 + 80010c8: af00 add r7, sp, #0 + 80010ca: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_ec_filter, raw); - 8000f84: 6879 ldr r1, [r7, #4] - 8000f86: 4803 ldr r0, [pc, #12] @ (8000f94 ) - 8000f88: f7ff ff4e bl 8000e28 + 80010cc: 6879 ldr r1, [r7, #4] + 80010ce: 4803 ldr r0, [pc, #12] @ (80010dc ) + 80010d0: f7ff ff4e bl 8000f70 } - 8000f8c: bf00 nop - 8000f8e: 3708 adds r7, #8 - 8000f90: 46bd mov sp, r7 - 8000f92: bd80 pop {r7, pc} - 8000f94: 200000cc .word 0x200000cc + 80010d4: bf00 nop + 80010d6: 3708 adds r7, #8 + 80010d8: 46bd mov sp, r7 + 80010da: bd80 pop {r7, pc} + 80010dc: 200000d4 .word 0x200000d4 -08000f98 : +080010e0 : /* Call this every time a sweep completes with the mux on the on-board * precision reference resistor channel */ void AD5934_Reference_NewSample(float raw) { - 8000f98: b580 push {r7, lr} - 8000f9a: b082 sub sp, #8 - 8000f9c: af00 add r7, sp, #0 - 8000f9e: 6078 str r0, [r7, #4] + 80010e0: b580 push {r7, lr} + 80010e2: b082 sub sp, #8 + 80010e4: af00 add r7, sp, #0 + 80010e6: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_ref_filter, raw); - 8000fa0: 6879 ldr r1, [r7, #4] - 8000fa2: 4803 ldr r0, [pc, #12] @ (8000fb0 ) - 8000fa4: f7ff ff40 bl 8000e28 + 80010e8: 6879 ldr r1, [r7, #4] + 80010ea: 4803 ldr r0, [pc, #12] @ (80010f8 ) + 80010ec: f7ff ff40 bl 8000f70 } - 8000fa8: bf00 nop - 8000faa: 3708 adds r7, #8 - 8000fac: 46bd mov sp, r7 - 8000fae: bd80 pop {r7, pc} - 8000fb0: 2000010c .word 0x2000010c + 80010f0: bf00 nop + 80010f2: 3708 adds r7, #8 + 80010f4: 46bd mov sp, r7 + 80010f6: bd80 pop {r7, pc} + 80010f8: 20000114 .word 0x20000114 -08000fb4 : +080010fc : * * @return None. *******************************************************************************/ void ADG715_SetRegisterValue(char value) { - 8000fb4: b580 push {r7, lr} - 8000fb6: b086 sub sp, #24 - 8000fb8: af02 add r7, sp, #8 - 8000fba: 4603 mov r3, r0 - 8000fbc: 71fb strb r3, [r7, #7] + 80010fc: b580 push {r7, lr} + 80010fe: b086 sub sp, #24 + 8001100: af02 add r7, sp, #8 + 8001102: 4603 mov r3, r0 + 8001104: 71fb strb r3, [r7, #7] uint8_t writeData[1] = {value}; - 8000fbe: 79fb ldrb r3, [r7, #7] - 8000fc0: 733b strb r3, [r7, #12] + 8001106: 79fb ldrb r3, [r7, #7] + 8001108: 733b strb r3, [r7, #12] HAL_StatusTypeDef status; status = HAL_I2C_Master_Transmit(&hi2c2, ADG715_I2C_ADDRESS, writeData, 1, 1); - 8000fc2: f107 020c add.w r2, r7, #12 - 8000fc6: 2301 movs r3, #1 - 8000fc8: 9300 str r3, [sp, #0] - 8000fca: 2301 movs r3, #1 - 8000fcc: 2190 movs r1, #144 @ 0x90 - 8000fce: 4804 ldr r0, [pc, #16] @ (8000fe0 ) - 8000fd0: f002 f99a bl 8003308 - 8000fd4: 4603 mov r3, r0 - 8000fd6: 73fb strb r3, [r7, #15] + 800110a: f107 020c add.w r2, r7, #12 + 800110e: 2301 movs r3, #1 + 8001110: 9300 str r3, [sp, #0] + 8001112: 2301 movs r3, #1 + 8001114: 2190 movs r1, #144 @ 0x90 + 8001116: 4804 ldr r0, [pc, #16] @ (8001128 ) + 8001118: f002 f9b0 bl 800347c + 800111c: 4603 mov r3, r0 + 800111e: 73fb strb r3, [r7, #15] return; - 8000fd8: bf00 nop + 8001120: bf00 nop } - 8000fda: 3710 adds r7, #16 - 8000fdc: 46bd mov sp, r7 - 8000fde: bd80 pop {r7, pc} - 8000fe0: 20000268 .word 0x20000268 + 8001122: 3710 adds r7, #16 + 8001124: 46bd mov sp, r7 + 8001126: bd80 pop {r7, pc} + 8001128: 20000270 .word 0x20000270 -08000fe4 : +0800112c : * * @return none. ******************************************************************************/ void ADG715_ResetChannels(void) { - 8000fe4: b580 push {r7, lr} - 8000fe6: af00 add r7, sp, #0 + 800112c: b580 push {r7, lr} + 800112e: af00 add r7, sp, #0 ADG715_SetRegisterValue(0); - 8000fe8: 2000 movs r0, #0 - 8000fea: f7ff ffe3 bl 8000fb4 + 8001130: 2000 movs r0, #0 + 8001132: f7ff ffe3 bl 80010fc } - 8000fee: bf00 nop - 8000ff0: bd80 pop {r7, pc} + 8001136: bf00 nop + 8001138: bd80 pop {r7, pc} ... -08000ff4 : +0800113c : * @param: channel * * @return none. ******************************************************************************/ void ADG715_SetChannels(AD5934_Channel_t channel) { - 8000ff4: b580 push {r7, lr} - 8000ff6: b082 sub sp, #8 - 8000ff8: af00 add r7, sp, #0 - 8000ffa: 4603 mov r3, r0 - 8000ffc: 71fb strb r3, [r7, #7] + 800113c: b580 push {r7, lr} + 800113e: b082 sub sp, #8 + 8001140: af00 add r7, sp, #0 + 8001142: 4603 mov r3, r0 + 8001144: 71fb strb r3, [r7, #7] // Garante que o índice recebido não ultrapassa os limites do vetor if (channel >= AD5934_CH_MAX) - 8000ffe: 79fb ldrb r3, [r7, #7] - 8001000: 2b0e cmp r3, #14 - 8001002: d806 bhi.n 8001012 + 8001146: 79fb ldrb r3, [r7, #7] + 8001148: 2b0e cmp r3, #14 + 800114a: d806 bhi.n 800115a return; // Envia o byte combinado via I2C (Make-before-break nativo por barramento) ADG715_SetRegisterValue(ADG715_Channel_Map[channel]); - 8001004: 79fb ldrb r3, [r7, #7] - 8001006: 4a05 ldr r2, [pc, #20] @ (800101c ) - 8001008: 5cd3 ldrb r3, [r2, r3] - 800100a: 4618 mov r0, r3 - 800100c: f7ff ffd2 bl 8000fb4 - 8001010: e000 b.n 8001014 + 800114c: 79fb ldrb r3, [r7, #7] + 800114e: 4a05 ldr r2, [pc, #20] @ (8001164 ) + 8001150: 5cd3 ldrb r3, [r2, r3] + 8001152: 4618 mov r0, r3 + 8001154: f7ff ffd2 bl 80010fc + 8001158: e000 b.n 800115c return; - 8001012: bf00 nop + 800115a: bf00 nop } - 8001014: 3708 adds r7, #8 - 8001016: 46bd mov sp, r7 - 8001018: bd80 pop {r7, pc} - 800101a: bf00 nop - 800101c: 08006024 .word 0x08006024 + 800115c: 3708 adds r7, #8 + 800115e: 46bd mov sp, r7 + 8001160: bd80 pop {r7, pc} + 8001162: bf00 nop + 8001164: 08006198 .word 0x08006198 -08001020 : +08001168 : ADC_HandleTypeDef hadc1; ADC_HandleTypeDef hadc2; /* ADC1 init function */ void MX_ADC1_Init(void) { - 8001020: b580 push {r7, lr} - 8001022: b084 sub sp, #16 - 8001024: af00 add r7, sp, #0 + 8001168: b580 push {r7, lr} + 800116a: b084 sub sp, #16 + 800116c: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 8001026: 1d3b adds r3, r7, #4 - 8001028: 2200 movs r2, #0 - 800102a: 601a str r2, [r3, #0] - 800102c: 605a str r2, [r3, #4] - 800102e: 609a str r2, [r3, #8] + 800116e: 1d3b adds r3, r7, #4 + 8001170: 2200 movs r2, #0 + 8001172: 601a str r2, [r3, #0] + 8001174: 605a str r2, [r3, #4] + 8001176: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; - 8001030: 4b18 ldr r3, [pc, #96] @ (8001094 ) - 8001032: 4a19 ldr r2, [pc, #100] @ (8001098 ) - 8001034: 601a str r2, [r3, #0] + 8001178: 4b18 ldr r3, [pc, #96] @ (80011dc ) + 800117a: 4a19 ldr r2, [pc, #100] @ (80011e0 ) + 800117c: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; - 8001036: 4b17 ldr r3, [pc, #92] @ (8001094 ) - 8001038: 2200 movs r2, #0 - 800103a: 609a str r2, [r3, #8] + 800117e: 4b17 ldr r3, [pc, #92] @ (80011dc ) + 8001180: 2200 movs r2, #0 + 8001182: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = ENABLE; - 800103c: 4b15 ldr r3, [pc, #84] @ (8001094 ) - 800103e: 2201 movs r2, #1 - 8001040: 731a strb r2, [r3, #12] + 8001184: 4b15 ldr r3, [pc, #84] @ (80011dc ) + 8001186: 2201 movs r2, #1 + 8001188: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; - 8001042: 4b14 ldr r3, [pc, #80] @ (8001094 ) - 8001044: 2200 movs r2, #0 - 8001046: 751a strb r2, [r3, #20] + 800118a: 4b14 ldr r3, [pc, #80] @ (80011dc ) + 800118c: 2200 movs r2, #0 + 800118e: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 8001048: 4b12 ldr r3, [pc, #72] @ (8001094 ) - 800104a: f44f 2260 mov.w r2, #917504 @ 0xe0000 - 800104e: 61da str r2, [r3, #28] + 8001190: 4b12 ldr r3, [pc, #72] @ (80011dc ) + 8001192: f44f 2260 mov.w r2, #917504 @ 0xe0000 + 8001196: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8001050: 4b10 ldr r3, [pc, #64] @ (8001094 ) - 8001052: 2200 movs r2, #0 - 8001054: 605a str r2, [r3, #4] + 8001198: 4b10 ldr r3, [pc, #64] @ (80011dc ) + 800119a: 2200 movs r2, #0 + 800119c: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 1; - 8001056: 4b0f ldr r3, [pc, #60] @ (8001094 ) - 8001058: 2201 movs r2, #1 - 800105a: 611a str r2, [r3, #16] + 800119e: 4b0f ldr r3, [pc, #60] @ (80011dc ) + 80011a0: 2201 movs r2, #1 + 80011a2: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) - 800105c: 480d ldr r0, [pc, #52] @ (8001094 ) - 800105e: f001 fa71 bl 8002544 - 8001062: 4603 mov r3, r0 - 8001064: 2b00 cmp r3, #0 - 8001066: d001 beq.n 800106c + 80011a4: 480d ldr r0, [pc, #52] @ (80011dc ) + 80011a6: f001 fa87 bl 80026b8 + 80011aa: 4603 mov r3, r0 + 80011ac: 2b00 cmp r3, #0 + 80011ae: d001 beq.n 80011b4 { Error_Handler(); - 8001068: f000 ff80 bl 8001f6c + 80011b0: f000 ff96 bl 80020e0 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_0; - 800106c: 2300 movs r3, #0 - 800106e: 607b str r3, [r7, #4] + 80011b4: 2300 movs r3, #0 + 80011b6: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; - 8001070: 2301 movs r3, #1 - 8001072: 60bb str r3, [r7, #8] + 80011b8: 2301 movs r3, #1 + 80011ba: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; - 8001074: 2300 movs r3, #0 - 8001076: 60fb str r3, [r7, #12] + 80011bc: 2300 movs r3, #0 + 80011be: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 8001078: 1d3b adds r3, r7, #4 - 800107a: 4619 mov r1, r3 - 800107c: 4805 ldr r0, [pc, #20] @ (8001094 ) - 800107e: f001 fb39 bl 80026f4 - 8001082: 4603 mov r3, r0 - 8001084: 2b00 cmp r3, #0 - 8001086: d001 beq.n 800108c + 80011c0: 1d3b adds r3, r7, #4 + 80011c2: 4619 mov r1, r3 + 80011c4: 4805 ldr r0, [pc, #20] @ (80011dc ) + 80011c6: f001 fb4f bl 8002868 + 80011ca: 4603 mov r3, r0 + 80011cc: 2b00 cmp r3, #0 + 80011ce: d001 beq.n 80011d4 { Error_Handler(); - 8001088: f000 ff70 bl 8001f6c + 80011d0: f000 ff86 bl 80020e0 } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } - 800108c: bf00 nop - 800108e: 3710 adds r7, #16 - 8001090: 46bd mov sp, r7 - 8001092: bd80 pop {r7, pc} - 8001094: 20000150 .word 0x20000150 - 8001098: 40012400 .word 0x40012400 + 80011d4: bf00 nop + 80011d6: 3710 adds r7, #16 + 80011d8: 46bd mov sp, r7 + 80011da: bd80 pop {r7, pc} + 80011dc: 20000158 .word 0x20000158 + 80011e0: 40012400 .word 0x40012400 -0800109c : +080011e4 : /* ADC2 init function */ void MX_ADC2_Init(void) { - 800109c: b580 push {r7, lr} - 800109e: b084 sub sp, #16 - 80010a0: af00 add r7, sp, #0 + 80011e4: b580 push {r7, lr} + 80011e6: b084 sub sp, #16 + 80011e8: af00 add r7, sp, #0 /* USER CODE BEGIN ADC2_Init 0 */ /* USER CODE END ADC2_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 80010a2: 1d3b adds r3, r7, #4 - 80010a4: 2200 movs r2, #0 - 80010a6: 601a str r2, [r3, #0] - 80010a8: 605a str r2, [r3, #4] - 80010aa: 609a str r2, [r3, #8] + 80011ea: 1d3b adds r3, r7, #4 + 80011ec: 2200 movs r2, #0 + 80011ee: 601a str r2, [r3, #0] + 80011f0: 605a str r2, [r3, #4] + 80011f2: 609a str r2, [r3, #8] /* USER CODE END ADC2_Init 1 */ /** Common config */ hadc2.Instance = ADC2; - 80010ac: 4b18 ldr r3, [pc, #96] @ (8001110 ) - 80010ae: 4a19 ldr r2, [pc, #100] @ (8001114 ) - 80010b0: 601a str r2, [r3, #0] + 80011f4: 4b18 ldr r3, [pc, #96] @ (8001258 ) + 80011f6: 4a19 ldr r2, [pc, #100] @ (800125c ) + 80011f8: 601a str r2, [r3, #0] hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; - 80010b2: 4b17 ldr r3, [pc, #92] @ (8001110 ) - 80010b4: 2200 movs r2, #0 - 80010b6: 609a str r2, [r3, #8] + 80011fa: 4b17 ldr r3, [pc, #92] @ (8001258 ) + 80011fc: 2200 movs r2, #0 + 80011fe: 609a str r2, [r3, #8] hadc2.Init.ContinuousConvMode = ENABLE; - 80010b8: 4b15 ldr r3, [pc, #84] @ (8001110 ) - 80010ba: 2201 movs r2, #1 - 80010bc: 731a strb r2, [r3, #12] + 8001200: 4b15 ldr r3, [pc, #84] @ (8001258 ) + 8001202: 2201 movs r2, #1 + 8001204: 731a strb r2, [r3, #12] hadc2.Init.DiscontinuousConvMode = DISABLE; - 80010be: 4b14 ldr r3, [pc, #80] @ (8001110 ) - 80010c0: 2200 movs r2, #0 - 80010c2: 751a strb r2, [r3, #20] + 8001206: 4b14 ldr r3, [pc, #80] @ (8001258 ) + 8001208: 2200 movs r2, #0 + 800120a: 751a strb r2, [r3, #20] hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 80010c4: 4b12 ldr r3, [pc, #72] @ (8001110 ) - 80010c6: f44f 2260 mov.w r2, #917504 @ 0xe0000 - 80010ca: 61da str r2, [r3, #28] + 800120c: 4b12 ldr r3, [pc, #72] @ (8001258 ) + 800120e: f44f 2260 mov.w r2, #917504 @ 0xe0000 + 8001212: 61da str r2, [r3, #28] hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 80010cc: 4b10 ldr r3, [pc, #64] @ (8001110 ) - 80010ce: 2200 movs r2, #0 - 80010d0: 605a str r2, [r3, #4] + 8001214: 4b10 ldr r3, [pc, #64] @ (8001258 ) + 8001216: 2200 movs r2, #0 + 8001218: 605a str r2, [r3, #4] hadc2.Init.NbrOfConversion = 1; - 80010d2: 4b0f ldr r3, [pc, #60] @ (8001110 ) - 80010d4: 2201 movs r2, #1 - 80010d6: 611a str r2, [r3, #16] + 800121a: 4b0f ldr r3, [pc, #60] @ (8001258 ) + 800121c: 2201 movs r2, #1 + 800121e: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc2) != HAL_OK) - 80010d8: 480d ldr r0, [pc, #52] @ (8001110 ) - 80010da: f001 fa33 bl 8002544 - 80010de: 4603 mov r3, r0 - 80010e0: 2b00 cmp r3, #0 - 80010e2: d001 beq.n 80010e8 + 8001220: 480d ldr r0, [pc, #52] @ (8001258 ) + 8001222: f001 fa49 bl 80026b8 + 8001226: 4603 mov r3, r0 + 8001228: 2b00 cmp r3, #0 + 800122a: d001 beq.n 8001230 { Error_Handler(); - 80010e4: f000 ff42 bl 8001f6c + 800122c: f000 ff58 bl 80020e0 } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_1; - 80010e8: 2301 movs r3, #1 - 80010ea: 607b str r3, [r7, #4] + 8001230: 2301 movs r3, #1 + 8001232: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; - 80010ec: 2301 movs r3, #1 - 80010ee: 60bb str r3, [r7, #8] + 8001234: 2301 movs r3, #1 + 8001236: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; - 80010f0: 2300 movs r3, #0 - 80010f2: 60fb str r3, [r7, #12] + 8001238: 2300 movs r3, #0 + 800123a: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) - 80010f4: 1d3b adds r3, r7, #4 - 80010f6: 4619 mov r1, r3 - 80010f8: 4805 ldr r0, [pc, #20] @ (8001110 ) - 80010fa: f001 fafb bl 80026f4 - 80010fe: 4603 mov r3, r0 - 8001100: 2b00 cmp r3, #0 - 8001102: d001 beq.n 8001108 + 800123c: 1d3b adds r3, r7, #4 + 800123e: 4619 mov r1, r3 + 8001240: 4805 ldr r0, [pc, #20] @ (8001258 ) + 8001242: f001 fb11 bl 8002868 + 8001246: 4603 mov r3, r0 + 8001248: 2b00 cmp r3, #0 + 800124a: d001 beq.n 8001250 { Error_Handler(); - 8001104: f000 ff32 bl 8001f6c + 800124c: f000 ff48 bl 80020e0 } /* USER CODE BEGIN ADC2_Init 2 */ /* USER CODE END ADC2_Init 2 */ } - 8001108: bf00 nop - 800110a: 3710 adds r7, #16 - 800110c: 46bd mov sp, r7 - 800110e: bd80 pop {r7, pc} - 8001110: 20000180 .word 0x20000180 - 8001114: 40012800 .word 0x40012800 + 8001250: bf00 nop + 8001252: 3710 adds r7, #16 + 8001254: 46bd mov sp, r7 + 8001256: bd80 pop {r7, pc} + 8001258: 20000188 .word 0x20000188 + 800125c: 40012800 .word 0x40012800 -08001118 : +08001260 : void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { - 8001118: b580 push {r7, lr} - 800111a: b08a sub sp, #40 @ 0x28 - 800111c: af00 add r7, sp, #0 - 800111e: 6078 str r0, [r7, #4] + 8001260: b580 push {r7, lr} + 8001262: b08a sub sp, #40 @ 0x28 + 8001264: af00 add r7, sp, #0 + 8001266: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001120: f107 0318 add.w r3, r7, #24 - 8001124: 2200 movs r2, #0 - 8001126: 601a str r2, [r3, #0] - 8001128: 605a str r2, [r3, #4] - 800112a: 609a str r2, [r3, #8] - 800112c: 60da str r2, [r3, #12] + 8001268: f107 0318 add.w r3, r7, #24 + 800126c: 2200 movs r2, #0 + 800126e: 601a str r2, [r3, #0] + 8001270: 605a str r2, [r3, #4] + 8001272: 609a str r2, [r3, #8] + 8001274: 60da str r2, [r3, #12] if(adcHandle->Instance==ADC1) - 800112e: 687b ldr r3, [r7, #4] - 8001130: 681b ldr r3, [r3, #0] - 8001132: 4a28 ldr r2, [pc, #160] @ (80011d4 ) - 8001134: 4293 cmp r3, r2 - 8001136: d122 bne.n 800117e + 8001276: 687b ldr r3, [r7, #4] + 8001278: 681b ldr r3, [r3, #0] + 800127a: 4a28 ldr r2, [pc, #160] @ (800131c ) + 800127c: 4293 cmp r3, r2 + 800127e: d122 bne.n 80012c6 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* ADC1 clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); - 8001138: 4b27 ldr r3, [pc, #156] @ (80011d8 ) - 800113a: 699b ldr r3, [r3, #24] - 800113c: 4a26 ldr r2, [pc, #152] @ (80011d8 ) - 800113e: f443 7300 orr.w r3, r3, #512 @ 0x200 - 8001142: 6193 str r3, [r2, #24] - 8001144: 4b24 ldr r3, [pc, #144] @ (80011d8 ) - 8001146: 699b ldr r3, [r3, #24] - 8001148: f403 7300 and.w r3, r3, #512 @ 0x200 - 800114c: 617b str r3, [r7, #20] - 800114e: 697b ldr r3, [r7, #20] + 8001280: 4b27 ldr r3, [pc, #156] @ (8001320 ) + 8001282: 699b ldr r3, [r3, #24] + 8001284: 4a26 ldr r2, [pc, #152] @ (8001320 ) + 8001286: f443 7300 orr.w r3, r3, #512 @ 0x200 + 800128a: 6193 str r3, [r2, #24] + 800128c: 4b24 ldr r3, [pc, #144] @ (8001320 ) + 800128e: 699b ldr r3, [r3, #24] + 8001290: f403 7300 and.w r3, r3, #512 @ 0x200 + 8001294: 617b str r3, [r7, #20] + 8001296: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001150: 4b21 ldr r3, [pc, #132] @ (80011d8 ) - 8001152: 699b ldr r3, [r3, #24] - 8001154: 4a20 ldr r2, [pc, #128] @ (80011d8 ) - 8001156: f043 0304 orr.w r3, r3, #4 - 800115a: 6193 str r3, [r2, #24] - 800115c: 4b1e ldr r3, [pc, #120] @ (80011d8 ) - 800115e: 699b ldr r3, [r3, #24] - 8001160: f003 0304 and.w r3, r3, #4 - 8001164: 613b str r3, [r7, #16] - 8001166: 693b ldr r3, [r7, #16] + 8001298: 4b21 ldr r3, [pc, #132] @ (8001320 ) + 800129a: 699b ldr r3, [r3, #24] + 800129c: 4a20 ldr r2, [pc, #128] @ (8001320 ) + 800129e: f043 0304 orr.w r3, r3, #4 + 80012a2: 6193 str r3, [r2, #24] + 80012a4: 4b1e ldr r3, [pc, #120] @ (8001320 ) + 80012a6: 699b ldr r3, [r3, #24] + 80012a8: f003 0304 and.w r3, r3, #4 + 80012ac: 613b str r3, [r7, #16] + 80012ae: 693b ldr r3, [r7, #16] /**ADC1 GPIO Configuration PA0-WKUP ------> ADC1_IN0 PA1 ------> ADC1_IN1 */ GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin; - 8001168: 2303 movs r3, #3 - 800116a: 61bb str r3, [r7, #24] + 80012b0: 2303 movs r3, #3 + 80012b2: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 800116c: 2303 movs r3, #3 - 800116e: 61fb str r3, [r7, #28] + 80012b4: 2303 movs r3, #3 + 80012b6: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001170: f107 0318 add.w r3, r7, #24 - 8001174: 4619 mov r1, r3 - 8001176: 4819 ldr r0, [pc, #100] @ (80011dc ) - 8001178: f001 fdb6 bl 8002ce8 + 80012b8: f107 0318 add.w r3, r7, #24 + 80012bc: 4619 mov r1, r3 + 80012be: 4819 ldr r0, [pc, #100] @ (8001324 ) + 80012c0: f001 fdcc bl 8002e5c /* USER CODE BEGIN ADC2_MspInit 1 */ /* USER CODE END ADC2_MspInit 1 */ } } - 800117c: e026 b.n 80011cc + 80012c4: e026 b.n 8001314 else if(adcHandle->Instance==ADC2) - 800117e: 687b ldr r3, [r7, #4] - 8001180: 681b ldr r3, [r3, #0] - 8001182: 4a17 ldr r2, [pc, #92] @ (80011e0 ) - 8001184: 4293 cmp r3, r2 - 8001186: d121 bne.n 80011cc + 80012c6: 687b ldr r3, [r7, #4] + 80012c8: 681b ldr r3, [r3, #0] + 80012ca: 4a17 ldr r2, [pc, #92] @ (8001328 ) + 80012cc: 4293 cmp r3, r2 + 80012ce: d121 bne.n 8001314 __HAL_RCC_ADC2_CLK_ENABLE(); - 8001188: 4b13 ldr r3, [pc, #76] @ (80011d8 ) - 800118a: 699b ldr r3, [r3, #24] - 800118c: 4a12 ldr r2, [pc, #72] @ (80011d8 ) - 800118e: f443 6380 orr.w r3, r3, #1024 @ 0x400 - 8001192: 6193 str r3, [r2, #24] - 8001194: 4b10 ldr r3, [pc, #64] @ (80011d8 ) - 8001196: 699b ldr r3, [r3, #24] - 8001198: f403 6380 and.w r3, r3, #1024 @ 0x400 - 800119c: 60fb str r3, [r7, #12] - 800119e: 68fb ldr r3, [r7, #12] + 80012d0: 4b13 ldr r3, [pc, #76] @ (8001320 ) + 80012d2: 699b ldr r3, [r3, #24] + 80012d4: 4a12 ldr r2, [pc, #72] @ (8001320 ) + 80012d6: f443 6380 orr.w r3, r3, #1024 @ 0x400 + 80012da: 6193 str r3, [r2, #24] + 80012dc: 4b10 ldr r3, [pc, #64] @ (8001320 ) + 80012de: 699b ldr r3, [r3, #24] + 80012e0: f403 6380 and.w r3, r3, #1024 @ 0x400 + 80012e4: 60fb str r3, [r7, #12] + 80012e6: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80011a0: 4b0d ldr r3, [pc, #52] @ (80011d8 ) - 80011a2: 699b ldr r3, [r3, #24] - 80011a4: 4a0c ldr r2, [pc, #48] @ (80011d8 ) - 80011a6: f043 0304 orr.w r3, r3, #4 - 80011aa: 6193 str r3, [r2, #24] - 80011ac: 4b0a ldr r3, [pc, #40] @ (80011d8 ) - 80011ae: 699b ldr r3, [r3, #24] - 80011b0: f003 0304 and.w r3, r3, #4 - 80011b4: 60bb str r3, [r7, #8] - 80011b6: 68bb ldr r3, [r7, #8] + 80012e8: 4b0d ldr r3, [pc, #52] @ (8001320 ) + 80012ea: 699b ldr r3, [r3, #24] + 80012ec: 4a0c ldr r2, [pc, #48] @ (8001320 ) + 80012ee: f043 0304 orr.w r3, r3, #4 + 80012f2: 6193 str r3, [r2, #24] + 80012f4: 4b0a ldr r3, [pc, #40] @ (8001320 ) + 80012f6: 699b ldr r3, [r3, #24] + 80012f8: f003 0304 and.w r3, r3, #4 + 80012fc: 60bb str r3, [r7, #8] + 80012fe: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin; - 80011b8: 2303 movs r3, #3 - 80011ba: 61bb str r3, [r7, #24] + 8001300: 2303 movs r3, #3 + 8001302: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 80011bc: 2303 movs r3, #3 - 80011be: 61fb str r3, [r7, #28] + 8001304: 2303 movs r3, #3 + 8001306: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80011c0: f107 0318 add.w r3, r7, #24 - 80011c4: 4619 mov r1, r3 - 80011c6: 4805 ldr r0, [pc, #20] @ (80011dc ) - 80011c8: f001 fd8e bl 8002ce8 + 8001308: f107 0318 add.w r3, r7, #24 + 800130c: 4619 mov r1, r3 + 800130e: 4805 ldr r0, [pc, #20] @ (8001324 ) + 8001310: f001 fda4 bl 8002e5c } - 80011cc: bf00 nop - 80011ce: 3728 adds r7, #40 @ 0x28 - 80011d0: 46bd mov sp, r7 - 80011d2: bd80 pop {r7, pc} - 80011d4: 40012400 .word 0x40012400 - 80011d8: 40021000 .word 0x40021000 - 80011dc: 40010800 .word 0x40010800 - 80011e0: 40012800 .word 0x40012800 + 8001314: bf00 nop + 8001316: 3728 adds r7, #40 @ 0x28 + 8001318: 46bd mov sp, r7 + 800131a: bd80 pop {r7, pc} + 800131c: 40012400 .word 0x40012400 + 8001320: 40021000 .word 0x40021000 + 8001324: 40010800 .word 0x40010800 + 8001328: 40012800 .word 0x40012800 -080011e4 : +0800132c : ADS1015_filter_t g_ph_filter = {0}; volatile ADS1015_State_t ads1015_state = ADS1015_IDLE; // Write the register static void writeRegister(ADS1015_I2C *i2c, uint8_t reg, uint16_t value) { - 80011e4: b580 push {r7, lr} - 80011e6: b086 sub sp, #24 - 80011e8: af02 add r7, sp, #8 - 80011ea: 6078 str r0, [r7, #4] - 80011ec: 460b mov r3, r1 - 80011ee: 70fb strb r3, [r7, #3] - 80011f0: 4613 mov r3, r2 - 80011f2: 803b strh r3, [r7, #0] + 800132c: b580 push {r7, lr} + 800132e: b086 sub sp, #24 + 8001330: af02 add r7, sp, #8 + 8001332: 6078 str r0, [r7, #4] + 8001334: 460b mov r3, r1 + 8001336: 70fb strb r3, [r7, #3] + 8001338: 4613 mov r3, r2 + 800133a: 803b strh r3, [r7, #0] uint8_t pData[3] = { reg, (uint8_t) (value >> 8), (uint8_t) (value & 0xFF) }; - 80011f4: 78fb ldrb r3, [r7, #3] - 80011f6: 733b strb r3, [r7, #12] - 80011f8: 883b ldrh r3, [r7, #0] - 80011fa: 0a1b lsrs r3, r3, #8 - 80011fc: b29b uxth r3, r3 - 80011fe: b2db uxtb r3, r3 - 8001200: 737b strb r3, [r7, #13] - 8001202: 883b ldrh r3, [r7, #0] - 8001204: b2db uxtb r3, r3 - 8001206: 73bb strb r3, [r7, #14] + 800133c: 78fb ldrb r3, [r7, #3] + 800133e: 733b strb r3, [r7, #12] + 8001340: 883b ldrh r3, [r7, #0] + 8001342: 0a1b lsrs r3, r3, #8 + 8001344: b29b uxth r3, r3 + 8001346: b2db uxtb r3, r3 + 8001348: 737b strb r3, [r7, #13] + 800134a: 883b ldrh r3, [r7, #0] + 800134c: b2db uxtb r3, r3 + 800134e: 73bb strb r3, [r7, #14] HAL_I2C_Master_Transmit(i2c->hi2c, i2c->m_i2cAddress, pData, 3, 10); - 8001208: 687b ldr r3, [r7, #4] - 800120a: 68d8 ldr r0, [r3, #12] - 800120c: 687b ldr r3, [r7, #4] - 800120e: 8819 ldrh r1, [r3, #0] - 8001210: f107 020c add.w r2, r7, #12 - 8001214: 230a movs r3, #10 - 8001216: 9300 str r3, [sp, #0] - 8001218: 2303 movs r3, #3 - 800121a: f002 f875 bl 8003308 + 8001350: 687b ldr r3, [r7, #4] + 8001352: 68d8 ldr r0, [r3, #12] + 8001354: 687b ldr r3, [r7, #4] + 8001356: 8819 ldrh r1, [r3, #0] + 8001358: f107 020c add.w r2, r7, #12 + 800135c: 230a movs r3, #10 + 800135e: 9300 str r3, [sp, #0] + 8001360: 2303 movs r3, #3 + 8001362: f002 f88b bl 800347c } - 800121e: bf00 nop - 8001220: 3710 adds r7, #16 - 8001222: 46bd mov sp, r7 - 8001224: bd80 pop {r7, pc} + 8001366: bf00 nop + 8001368: 3710 adds r7, #16 + 800136a: 46bd mov sp, r7 + 800136c: bd80 pop {r7, pc} -08001226 : +0800136e : // Read the register static uint16_t readRegister(ADS1015_I2C *i2c, uint8_t reg) { - 8001226: b580 push {r7, lr} - 8001228: b086 sub sp, #24 - 800122a: af02 add r7, sp, #8 - 800122c: 6078 str r0, [r7, #4] - 800122e: 460b mov r3, r1 - 8001230: 70fb strb r3, [r7, #3] + 800136e: b580 push {r7, lr} + 8001370: b086 sub sp, #24 + 8001372: af02 add r7, sp, #8 + 8001374: 6078 str r0, [r7, #4] + 8001376: 460b mov r3, r1 + 8001378: 70fb strb r3, [r7, #3] HAL_I2C_Master_Transmit(i2c->hi2c, i2c->m_i2cAddress, ®, 1, 10); - 8001232: 687b ldr r3, [r7, #4] - 8001234: 68d8 ldr r0, [r3, #12] - 8001236: 687b ldr r3, [r7, #4] - 8001238: 8819 ldrh r1, [r3, #0] - 800123a: 1cfa adds r2, r7, #3 - 800123c: 230a movs r3, #10 - 800123e: 9300 str r3, [sp, #0] - 8001240: 2301 movs r3, #1 - 8001242: f002 f861 bl 8003308 + 800137a: 687b ldr r3, [r7, #4] + 800137c: 68d8 ldr r0, [r3, #12] + 800137e: 687b ldr r3, [r7, #4] + 8001380: 8819 ldrh r1, [r3, #0] + 8001382: 1cfa adds r2, r7, #3 + 8001384: 230a movs r3, #10 + 8001386: 9300 str r3, [sp, #0] + 8001388: 2301 movs r3, #1 + 800138a: f002 f877 bl 800347c uint8_t pData[2] = { 0, 0 }; - 8001246: 2300 movs r3, #0 - 8001248: 81bb strh r3, [r7, #12] + 800138e: 2300 movs r3, #0 + 8001390: 81bb strh r3, [r7, #12] HAL_I2C_Master_Receive(i2c->hi2c, i2c->m_i2cAddress, pData, 2, 10); - 800124a: 687b ldr r3, [r7, #4] - 800124c: 68d8 ldr r0, [r3, #12] - 800124e: 687b ldr r3, [r7, #4] - 8001250: 8819 ldrh r1, [r3, #0] - 8001252: f107 020c add.w r2, r7, #12 - 8001256: 230a movs r3, #10 - 8001258: 9300 str r3, [sp, #0] - 800125a: 2302 movs r3, #2 - 800125c: f002 f952 bl 8003504 + 8001392: 687b ldr r3, [r7, #4] + 8001394: 68d8 ldr r0, [r3, #12] + 8001396: 687b ldr r3, [r7, #4] + 8001398: 8819 ldrh r1, [r3, #0] + 800139a: f107 020c add.w r2, r7, #12 + 800139e: 230a movs r3, #10 + 80013a0: 9300 str r3, [sp, #0] + 80013a2: 2302 movs r3, #2 + 80013a4: f002 f968 bl 8003678 return ((pData[0] << 8) | pData[1]); - 8001260: 7b3b ldrb r3, [r7, #12] - 8001262: b21b sxth r3, r3 - 8001264: 021b lsls r3, r3, #8 - 8001266: b21a sxth r2, r3 - 8001268: 7b7b ldrb r3, [r7, #13] - 800126a: b21b sxth r3, r3 - 800126c: 4313 orrs r3, r2 - 800126e: b21b sxth r3, r3 - 8001270: b29b uxth r3, r3 + 80013a8: 7b3b ldrb r3, [r7, #12] + 80013aa: b21b sxth r3, r3 + 80013ac: 021b lsls r3, r3, #8 + 80013ae: b21a sxth r2, r3 + 80013b0: 7b7b ldrb r3, [r7, #13] + 80013b2: b21b sxth r3, r3 + 80013b4: 4313 orrs r3, r2 + 80013b6: b21b sxth r3, r3 + 80013b8: b29b uxth r3, r3 } - 8001272: 4618 mov r0, r3 - 8001274: 3710 adds r7, #16 - 8001276: 46bd mov sp, r7 - 8001278: bd80 pop {r7, pc} + 80013ba: 4618 mov r0, r3 + 80013bc: 3710 adds r7, #16 + 80013be: 46bd mov sp, r7 + 80013c0: bd80 pop {r7, pc} ... -0800127c : +080013c4 : // ADSsetGain(GAIN_EIGHT); // 8x gain +/- 0.512V 1 bit = 0.25mV 0.015625mV // ADSsetGain(GAIN_SIXTEEN); // 16x gain +/- 0.256V 1 bit = 0.125mV 0.0078125mV */ // Declare an ADS1015 structure void ADS1015_Init(void) { - 800127c: b480 push {r7} - 800127e: af00 add r7, sp, #0 + 80013c4: b480 push {r7} + 80013c6: af00 add r7, sp, #0 i2c_ads1015.hi2c = &hi2c1; - 8001280: 4b09 ldr r3, [pc, #36] @ (80012a8 ) - 8001282: 4a0a ldr r2, [pc, #40] @ (80012ac ) - 8001284: 60da str r2, [r3, #12] + 80013c8: 4b09 ldr r3, [pc, #36] @ (80013f0 ) + 80013ca: 4a0a ldr r2, [pc, #40] @ (80013f4 ) + 80013cc: 60da str r2, [r3, #12] i2c_ads1015.m_i2cAddress = ADS1015_ADDR_GND; // It's Important to shift the address << 1 - 8001286: 4b08 ldr r3, [pc, #32] @ (80012a8 ) - 8001288: 2290 movs r2, #144 @ 0x90 - 800128a: 801a strh r2, [r3, #0] + 80013ce: 4b08 ldr r3, [pc, #32] @ (80013f0 ) + 80013d0: 2290 movs r2, #144 @ 0x90 + 80013d2: 801a strh r2, [r3, #0] i2c_ads1015.m_conversionDelay = ADS1015_CONVERSIONDELAY; - 800128c: 4b06 ldr r3, [pc, #24] @ (80012a8 ) - 800128e: 2204 movs r2, #4 - 8001290: 605a str r2, [r3, #4] + 80013d4: 4b06 ldr r3, [pc, #24] @ (80013f0 ) + 80013d6: 2204 movs r2, #4 + 80013d8: 605a str r2, [r3, #4] i2c_ads1015.m_bitShift = 4; - 8001292: 4b05 ldr r3, [pc, #20] @ (80012a8 ) - 8001294: 2204 movs r2, #4 - 8001296: 721a strb r2, [r3, #8] + 80013da: 4b05 ldr r3, [pc, #20] @ (80013f0 ) + 80013dc: 2204 movs r2, #4 + 80013de: 721a strb r2, [r3, #8] i2c_ads1015.m_gain = GAIN_FOUR; /* 4x gain +/- 1.024V 1 bit = 0.5mV 0.03125mV */ - 8001298: 4b03 ldr r3, [pc, #12] @ (80012a8 ) - 800129a: f44f 62c0 mov.w r2, #1536 @ 0x600 - 800129e: 815a strh r2, [r3, #10] + 80013e0: 4b03 ldr r3, [pc, #12] @ (80013f0 ) + 80013e2: f44f 62c0 mov.w r2, #1536 @ 0x600 + 80013e6: 815a strh r2, [r3, #10] } - 80012a0: bf00 nop - 80012a2: 46bd mov sp, r7 - 80012a4: bc80 pop {r7} - 80012a6: 4770 bx lr - 80012a8: 200001b0 .word 0x200001b0 - 80012ac: 20000214 .word 0x20000214 + 80013e8: bf00 nop + 80013ea: 46bd mov sp, r7 + 80013ec: bc80 pop {r7} + 80013ee: 4770 bx lr + 80013f0: 200001b8 .word 0x200001b8 + 80013f4: 2000021c .word 0x2000021c -080012b0 : +080013f8 : * @param value Valor float entre FLOAT_MIN e FLOAT_MAX * * @return uint16_t Valor convertido na escala de UINT16_MIN a UINT16_MAX */ uint16_t ADS1015_Compress_To_IntScale(float value) { - 80012b0: b580 push {r7, lr} - 80012b2: b084 sub sp, #16 - 80012b4: af00 add r7, sp, #0 - 80012b6: 6078 str r0, [r7, #4] + 80013f8: b580 push {r7, lr} + 80013fa: b084 sub sp, #16 + 80013fc: af00 add r7, sp, #0 + 80013fe: 6078 str r0, [r7, #4] // Verifica limites do valor de entrada if (value < ADS1015_PH_FLOAT_SCALE_MIN) - 80012b8: 491c ldr r1, [pc, #112] @ (800132c ) - 80012ba: 6878 ldr r0, [r7, #4] - 80012bc: f7ff f9fa bl 80006b4 <__aeabi_fcmplt> - 80012c0: 4603 mov r3, r0 - 80012c2: 2b00 cmp r3, #0 - 80012c4: d001 beq.n 80012ca + 8001400: 491c ldr r1, [pc, #112] @ (8001474 ) + 8001402: 6878 ldr r0, [r7, #4] + 8001404: f7ff f956 bl 80006b4 <__aeabi_fcmplt> + 8001408: 4603 mov r3, r0 + 800140a: 2b00 cmp r3, #0 + 800140c: d001 beq.n 8001412 return ADS1015_PH_OUT_SCALE_MIN; - 80012c6: 2300 movs r3, #0 - 80012c8: e02c b.n 8001324 + 800140e: 2300 movs r3, #0 + 8001410: e02c b.n 800146c else if (value > ADS1015_PH_FLOAT_SCALE_MAX) - 80012ca: 4919 ldr r1, [pc, #100] @ (8001330 ) - 80012cc: 6878 ldr r0, [r7, #4] - 80012ce: f7ff fa0f bl 80006f0 <__aeabi_fcmpgt> - 80012d2: 4603 mov r3, r0 - 80012d4: 2b00 cmp r3, #0 - 80012d6: d002 beq.n 80012de + 8001412: 4919 ldr r1, [pc, #100] @ (8001478 ) + 8001414: 6878 ldr r0, [r7, #4] + 8001416: f7ff f96b bl 80006f0 <__aeabi_fcmpgt> + 800141a: 4603 mov r3, r0 + 800141c: 2b00 cmp r3, #0 + 800141e: d002 beq.n 8001426 return ADS1015_PH_OUT_SCALE_MAX; - 80012d8: f44f 5380 mov.w r3, #4096 @ 0x1000 - 80012dc: e022 b.n 8001324 + 8001420: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8001424: e022 b.n 800146c // Converte o valor usando a fórmula: ((value - FLOAT_MIN) / (FLOAT_MAX - FLOAT_MIN)) * (UINT16_MAX - UINT16_MIN) + UINT16_MIN uint16_t result = (uint16_t)(((value - ADS1015_PH_FLOAT_SCALE_MIN) / (ADS1015_PH_FLOAT_SCALE_MAX - ADS1015_PH_FLOAT_SCALE_MIN)) * ((float)ADS1015_PH_OUT_SCALE_MAX - (float)ADS1015_PH_OUT_SCALE_MIN) + (float)ADS1015_PH_OUT_SCALE_MIN); - 80012de: 4913 ldr r1, [pc, #76] @ (800132c ) - 80012e0: 6878 ldr r0, [r7, #4] - 80012e2: f7fe ff3f bl 8000164 <__aeabi_fsub> - 80012e6: 4603 mov r3, r0 - 80012e8: 4912 ldr r1, [pc, #72] @ (8001334 ) - 80012ea: 4618 mov r0, r3 - 80012ec: f7ff f8f8 bl 80004e0 <__aeabi_fdiv> - 80012f0: 4603 mov r3, r0 - 80012f2: f04f 418b mov.w r1, #1166016512 @ 0x45800000 - 80012f6: 4618 mov r0, r3 - 80012f8: f7ff f83e bl 8000378 <__aeabi_fmul> - 80012fc: 4603 mov r3, r0 - 80012fe: f04f 0100 mov.w r1, #0 - 8001302: 4618 mov r0, r3 - 8001304: f7fe ff30 bl 8000168 <__addsf3> - 8001308: 4603 mov r3, r0 - 800130a: 4618 mov r0, r3 - 800130c: f7ff fa10 bl 8000730 <__aeabi_f2uiz> - 8001310: 4603 mov r3, r0 - 8001312: 81fb strh r3, [r7, #14] + 8001426: 4913 ldr r1, [pc, #76] @ (8001474 ) + 8001428: 6878 ldr r0, [r7, #4] + 800142a: f7fe fe9b bl 8000164 <__aeabi_fsub> + 800142e: 4603 mov r3, r0 + 8001430: 4912 ldr r1, [pc, #72] @ (800147c ) + 8001432: 4618 mov r0, r3 + 8001434: f7ff f854 bl 80004e0 <__aeabi_fdiv> + 8001438: 4603 mov r3, r0 + 800143a: f04f 418b mov.w r1, #1166016512 @ 0x45800000 + 800143e: 4618 mov r0, r3 + 8001440: f7fe ff9a bl 8000378 <__aeabi_fmul> + 8001444: 4603 mov r3, r0 + 8001446: f04f 0100 mov.w r1, #0 + 800144a: 4618 mov r0, r3 + 800144c: f7fe fe8c bl 8000168 <__addsf3> + 8001450: 4603 mov r3, r0 + 8001452: 4618 mov r0, r3 + 8001454: f7ff f96c bl 8000730 <__aeabi_f2uiz> + 8001458: 4603 mov r3, r0 + 800145a: 81fb strh r3, [r7, #14] // Garante que o resultado não exceda o limite superior if (result > ADS1015_PH_OUT_SCALE_MAX) - 8001314: 89fb ldrh r3, [r7, #14] - 8001316: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 800131a: d902 bls.n 8001322 + 800145c: 89fb ldrh r3, [r7, #14] + 800145e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8001462: d902 bls.n 800146a return (ADS1015_PH_OUT_SCALE_MAX); - 800131c: f44f 5380 mov.w r3, #4096 @ 0x1000 - 8001320: e000 b.n 8001324 + 8001464: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8001468: e000 b.n 800146c return result; - 8001322: 89fb ldrh r3, [r7, #14] + 800146a: 89fb ldrh r3, [r7, #14] } - 8001324: 4618 mov r0, r3 - 8001326: 3710 adds r7, #16 - 8001328: 46bd mov sp, r7 - 800132a: bd80 pop {r7, pc} - 800132c: 447a0000 .word 0x447a0000 - 8001330: 453b8000 .word 0x453b8000 - 8001334: 44fa0000 .word 0x44fa0000 + 800146c: 4618 mov r0, r3 + 800146e: 3710 adds r7, #16 + 8001470: 46bd mov sp, r7 + 8001472: bd80 pop {r7, pc} + 8001474: 447a0000 .word 0x447a0000 + 8001478: 453b8000 .word 0x453b8000 + 800147c: 44fa0000 .word 0x44fa0000 -08001338 : +08001480 : void ADS1015_Process_System(void) { - 8001338: b580 push {r7, lr} - 800133a: b082 sub sp, #8 - 800133c: af00 add r7, sp, #0 + 8001480: b580 push {r7, lr} + 8001482: b082 sub sp, #8 + 8001484: af00 add r7, sp, #0 static uint32_t state_timer = 0; static uint32_t sample_count = 0; uint16_t config_reg = 0; - 800133e: 2300 movs r3, #0 - 8001340: 80fb strh r3, [r7, #6] + 8001486: 2300 movs r3, #0 + 8001488: 80fb strh r3, [r7, #6] switch (ads1015_state) - 8001342: 4b3d ldr r3, [pc, #244] @ (8001438 ) - 8001344: 781b ldrb r3, [r3, #0] - 8001346: b2db uxtb r3, r3 - 8001348: 2b04 cmp r3, #4 - 800134a: d870 bhi.n 800142e - 800134c: a201 add r2, pc, #4 @ (adr r2, 8001354 ) - 800134e: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8001352: bf00 nop - 8001354: 08001369 .word 0x08001369 - 8001358: 08001377 .word 0x08001377 - 800135c: 08001393 .word 0x08001393 - 8001360: 080013bd .word 0x080013bd - 8001364: 08001413 .word 0x08001413 + 800148a: 4b3d ldr r3, [pc, #244] @ (8001580 ) + 800148c: 781b ldrb r3, [r3, #0] + 800148e: b2db uxtb r3, r3 + 8001490: 2b04 cmp r3, #4 + 8001492: d870 bhi.n 8001576 + 8001494: a201 add r2, pc, #4 @ (adr r2, 800149c ) + 8001496: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 800149a: bf00 nop + 800149c: 080014b1 .word 0x080014b1 + 80014a0: 080014bf .word 0x080014bf + 80014a4: 080014db .word 0x080014db + 80014a8: 08001505 .word 0x08001505 + 80014ac: 0800155b .word 0x0800155b { case ADS1015_IDLE: sample_count = 0; - 8001368: 4b34 ldr r3, [pc, #208] @ (800143c ) - 800136a: 2200 movs r2, #0 - 800136c: 601a str r2, [r3, #0] + 80014b0: 4b34 ldr r3, [pc, #208] @ (8001584 ) + 80014b2: 2200 movs r2, #0 + 80014b4: 601a str r2, [r3, #0] ads1015_state = ADS1015_START_CONVERSION; - 800136e: 4b32 ldr r3, [pc, #200] @ (8001438 ) - 8001370: 2201 movs r2, #1 - 8001372: 701a strb r2, [r3, #0] + 80014b6: 4b32 ldr r3, [pc, #200] @ (8001580 ) + 80014b8: 2201 movs r2, #1 + 80014ba: 701a strb r2, [r3, #0] break; - 8001374: e05b b.n 800142e + 80014bc: e05b b.n 8001576 case ADS1015_START_CONVERSION: state_timer = g_ms_counter; - 8001376: 4b32 ldr r3, [pc, #200] @ (8001440 ) - 8001378: 681b ldr r3, [r3, #0] - 800137a: 4a32 ldr r2, [pc, #200] @ (8001444 ) - 800137c: 6013 str r3, [r2, #0] + 80014be: 4b32 ldr r3, [pc, #200] @ (8001588 ) + 80014c0: 681b ldr r3, [r3, #0] + 80014c2: 4a32 ldr r2, [pc, #200] @ (800158c ) + 80014c4: 6013 str r3, [r2, #0] /* Escreve no Config Register (P[1:0]=01b) com OS=1 para * iniciar a conversão single-shot. O bit OS só tem efeito * quando o dispositivo está em power-down (seção 7.4.2.1) */ // Write config register to the ADC writeRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONFIG, ADS1015_CONFIG_START_SINGLE); - 800137e: f248 7203 movw r2, #34563 @ 0x8703 - 8001382: 2101 movs r1, #1 - 8001384: 4830 ldr r0, [pc, #192] @ (8001448 ) - 8001386: f7ff ff2d bl 80011e4 + 80014c6: f248 7203 movw r2, #34563 @ 0x8703 + 80014ca: 2101 movs r1, #1 + 80014cc: 4830 ldr r0, [pc, #192] @ (8001590 ) + 80014ce: f7ff ff2d bl 800132c ads1015_state = ADS1015_WAIT_CONVERSION; - 800138a: 4b2b ldr r3, [pc, #172] @ (8001438 ) - 800138c: 2202 movs r2, #2 - 800138e: 701a strb r2, [r3, #0] + 80014d2: 4b2b ldr r3, [pc, #172] @ (8001580 ) + 80014d4: 2202 movs r2, #2 + 80014d6: 701a strb r2, [r3, #0] break; - 8001390: e04d b.n 800142e + 80014d8: e04d b.n 8001576 * 0b = dispositivo ainda convertendo * 1b = conversão concluída, dado pronto no Conversion Register * (Tabela 8-4, descrição do bit OS) */ config_reg = readRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONFIG); - 8001392: 2101 movs r1, #1 - 8001394: 482c ldr r0, [pc, #176] @ (8001448 ) - 8001396: f7ff ff46 bl 8001226 - 800139a: 4603 mov r3, r0 - 800139c: 80fb strh r3, [r7, #6] + 80014da: 2101 movs r1, #1 + 80014dc: 482c ldr r0, [pc, #176] @ (8001590 ) + 80014de: f7ff ff46 bl 800136e + 80014e2: 4603 mov r3, r0 + 80014e4: 80fb strh r3, [r7, #6] if (((config_reg & ADS1015_REG_CONFIG_OS_SINGLE) != 0) && (g_ms_counter - state_timer)>ADS1015_TIME_PER_SAMPLE) - 800139e: f9b7 3006 ldrsh.w r3, [r7, #6] - 80013a2: 2b00 cmp r3, #0 - 80013a4: da40 bge.n 8001428 - 80013a6: 4b26 ldr r3, [pc, #152] @ (8001440 ) - 80013a8: 681a ldr r2, [r3, #0] - 80013aa: 4b26 ldr r3, [pc, #152] @ (8001444 ) - 80013ac: 681b ldr r3, [r3, #0] - 80013ae: 1ad3 subs r3, r2, r3 - 80013b0: 2b09 cmp r3, #9 - 80013b2: d939 bls.n 8001428 + 80014e6: f9b7 3006 ldrsh.w r3, [r7, #6] + 80014ea: 2b00 cmp r3, #0 + 80014ec: da40 bge.n 8001570 + 80014ee: 4b26 ldr r3, [pc, #152] @ (8001588 ) + 80014f0: 681a ldr r2, [r3, #0] + 80014f2: 4b26 ldr r3, [pc, #152] @ (800158c ) + 80014f4: 681b ldr r3, [r3, #0] + 80014f6: 1ad3 subs r3, r2, r3 + 80014f8: 2b09 cmp r3, #9 + 80014fa: d939 bls.n 8001570 { ads1015_state = ADS1015_READ_DATA; - 80013b4: 4b20 ldr r3, [pc, #128] @ (8001438 ) - 80013b6: 2203 movs r2, #3 - 80013b8: 701a strb r2, [r3, #0] + 80014fc: 4b20 ldr r3, [pc, #128] @ (8001580 ) + 80014fe: 2203 movs r2, #3 + 8001500: 701a strb r2, [r3, #0] } // (opcional) tratar timeout comparando g_ms_counter - state_timer // Datasheet: conversão single-cycle, tempo = 1/DR (ex: 1600SPS ≈ 625µs) break; - 80013ba: e035 b.n 8001428 + 8001502: e035 b.n 8001570 case ADS1015_READ_DATA: { /* Muda o Address Pointer para o Conversion Register (P[1:0]=00b) * e lê os 16 bits. Dado é 12 bits em complemento de 2, * left-justified em D[15:4]; D[3:0] sempre lê 0h (Tabela 8-3) */ int16_t raw = (int16_t)readRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONVERT); - 80013bc: 2100 movs r1, #0 - 80013be: 4822 ldr r0, [pc, #136] @ (8001448 ) - 80013c0: f7ff ff31 bl 8001226 - 80013c4: 4603 mov r3, r0 - 80013c6: 80bb strh r3, [r7, #4] + 8001504: 2100 movs r1, #0 + 8001506: 4822 ldr r0, [pc, #136] @ (8001590 ) + 8001508: f7ff ff31 bl 800136e + 800150c: 4603 mov r3, r0 + 800150e: 80bb strh r3, [r7, #4] raw >>= 4; // remove os 4 bits reservados (D[3:0]), resultado = 12 bits signed - 80013c8: f9b7 3004 ldrsh.w r3, [r7, #4] - 80013cc: 111b asrs r3, r3, #4 - 80013ce: 80bb strh r3, [r7, #4] + 8001510: f9b7 3004 ldrsh.w r3, [r7, #4] + 8001514: 111b asrs r3, r3, #4 + 8001516: 80bb strh r3, [r7, #4] float value = (float)(2048 - raw); // ((float)raw * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; // usa FSR configurado no PGA - 80013d0: f9b7 3004 ldrsh.w r3, [r7, #4] - 80013d4: f5c3 6300 rsb r3, r3, #2048 @ 0x800 - 80013d8: 4618 mov r0, r3 - 80013da: f7fe ff79 bl 80002d0 <__aeabi_i2f> - 80013de: 4603 mov r3, r0 - 80013e0: 603b str r3, [r7, #0] + 8001518: f9b7 3004 ldrsh.w r3, [r7, #4] + 800151c: f5c3 6300 rsb r3, r3, #2048 @ 0x800 + 8001520: 4618 mov r0, r3 + 8001522: f7fe fed5 bl 80002d0 <__aeabi_i2f> + 8001526: 4603 mov r3, r0 + 8001528: 603b str r3, [r7, #0] ADS1015_pH_NewSample(value); - 80013e2: 6838 ldr r0, [r7, #0] - 80013e4: f000 f98c bl 8001700 + 800152a: 6838 ldr r0, [r7, #0] + 800152c: f000 f98c bl 8001848 sample_count++; - 80013e8: 4b14 ldr r3, [pc, #80] @ (800143c ) - 80013ea: 681b ldr r3, [r3, #0] - 80013ec: 3301 adds r3, #1 - 80013ee: 4a13 ldr r2, [pc, #76] @ (800143c ) - 80013f0: 6013 str r3, [r2, #0] + 8001530: 4b14 ldr r3, [pc, #80] @ (8001584 ) + 8001532: 681b ldr r3, [r3, #0] + 8001534: 3301 adds r3, #1 + 8001536: 4a13 ldr r2, [pc, #76] @ (8001584 ) + 8001538: 6013 str r3, [r2, #0] if (sample_count >= ADS1015_BURST_SIZE) - 80013f2: 4b12 ldr r3, [pc, #72] @ (800143c ) - 80013f4: 681b ldr r3, [r3, #0] - 80013f6: 2b04 cmp r3, #4 - 80013f8: d903 bls.n 8001402 + 800153a: 4b12 ldr r3, [pc, #72] @ (8001584 ) + 800153c: 681b ldr r3, [r3, #0] + 800153e: 2b04 cmp r3, #4 + 8001540: d903 bls.n 800154a { ads1015_state = ADS1015_IDLE; - 80013fa: 4b0f ldr r3, [pc, #60] @ (8001438 ) - 80013fc: 2200 movs r2, #0 - 80013fe: 701a strb r2, [r3, #0] + 8001542: 4b0f ldr r3, [pc, #60] @ (8001580 ) + 8001544: 2200 movs r2, #0 + 8001546: 701a strb r2, [r3, #0] { state_timer = g_ms_counter; ads1015_state = ADS1015_WAIT_NEXT_SAMPLE; } } break; - 8001400: e015 b.n 800142e + 8001548: e015 b.n 8001576 state_timer = g_ms_counter; - 8001402: 4b0f ldr r3, [pc, #60] @ (8001440 ) - 8001404: 681b ldr r3, [r3, #0] - 8001406: 4a0f ldr r2, [pc, #60] @ (8001444 ) - 8001408: 6013 str r3, [r2, #0] + 800154a: 4b0f ldr r3, [pc, #60] @ (8001588 ) + 800154c: 681b ldr r3, [r3, #0] + 800154e: 4a0f ldr r2, [pc, #60] @ (800158c ) + 8001550: 6013 str r3, [r2, #0] ads1015_state = ADS1015_WAIT_NEXT_SAMPLE; - 800140a: 4b0b ldr r3, [pc, #44] @ (8001438 ) - 800140c: 2204 movs r2, #4 - 800140e: 701a strb r2, [r3, #0] + 8001552: 4b0b ldr r3, [pc, #44] @ (8001580 ) + 8001554: 2204 movs r2, #4 + 8001556: 701a strb r2, [r3, #0] break; - 8001410: e00d b.n 800142e + 8001558: e00d b.n 8001576 case ADS1015_WAIT_NEXT_SAMPLE: if ((g_ms_counter - state_timer) >= ADS1015_TIME_PER_SAMPLE) - 8001412: 4b0b ldr r3, [pc, #44] @ (8001440 ) - 8001414: 681a ldr r2, [r3, #0] - 8001416: 4b0b ldr r3, [pc, #44] @ (8001444 ) - 8001418: 681b ldr r3, [r3, #0] - 800141a: 1ad3 subs r3, r2, r3 - 800141c: 2b08 cmp r3, #8 - 800141e: d905 bls.n 800142c + 800155a: 4b0b ldr r3, [pc, #44] @ (8001588 ) + 800155c: 681a ldr r2, [r3, #0] + 800155e: 4b0b ldr r3, [pc, #44] @ (800158c ) + 8001560: 681b ldr r3, [r3, #0] + 8001562: 1ad3 subs r3, r2, r3 + 8001564: 2b08 cmp r3, #8 + 8001566: d905 bls.n 8001574 { ads1015_state = ADS1015_START_CONVERSION; - 8001420: 4b05 ldr r3, [pc, #20] @ (8001438 ) - 8001422: 2201 movs r2, #1 - 8001424: 701a strb r2, [r3, #0] + 8001568: 4b05 ldr r3, [pc, #20] @ (8001580 ) + 800156a: 2201 movs r2, #1 + 800156c: 701a strb r2, [r3, #0] } break; - 8001426: e001 b.n 800142c + 800156e: e001 b.n 8001574 break; - 8001428: bf00 nop - 800142a: e000 b.n 800142e + 8001570: bf00 nop + 8001572: e000 b.n 8001576 break; - 800142c: bf00 nop + 8001574: bf00 nop } } - 800142e: bf00 nop - 8001430: 3708 adds r7, #8 - 8001432: 46bd mov sp, r7 - 8001434: bd80 pop {r7, pc} - 8001436: bf00 nop - 8001438: 20000200 .word 0x20000200 - 800143c: 20000204 .word 0x20000204 - 8001440: 20000084 .word 0x20000084 - 8001444: 20000208 .word 0x20000208 - 8001448: 200001b0 .word 0x200001b0 + 8001576: bf00 nop + 8001578: 3708 adds r7, #8 + 800157a: 46bd mov sp, r7 + 800157c: bd80 pop {r7, pc} + 800157e: bf00 nop + 8001580: 20000208 .word 0x20000208 + 8001584: 2000020c .word 0x2000020c + 8001588: 20000080 .word 0x20000080 + 800158c: 20000210 .word 0x20000210 + 8001590: 200001b8 .word 0x200001b8 -0800144c : +08001594 : /** * Simple insertion sort - BURST_SIZE is small, so the cost is negligible * and it avoids depending on qsort/heap allocation. **/ void ADS1015_Sort_Array(float *v, uint8_t n) { - 800144c: b580 push {r7, lr} - 800144e: b084 sub sp, #16 - 8001450: af00 add r7, sp, #0 - 8001452: 6078 str r0, [r7, #4] - 8001454: 460b mov r3, r1 - 8001456: 70fb strb r3, [r7, #3] + 8001594: b580 push {r7, lr} + 8001596: b084 sub sp, #16 + 8001598: af00 add r7, sp, #0 + 800159a: 6078 str r0, [r7, #4] + 800159c: 460b mov r3, r1 + 800159e: 70fb strb r3, [r7, #3] for (uint8_t i = 1; i < n; i++) - 8001458: 2301 movs r3, #1 - 800145a: 73fb strb r3, [r7, #15] - 800145c: e039 b.n 80014d2 + 80015a0: 2301 movs r3, #1 + 80015a2: 73fb strb r3, [r7, #15] + 80015a4: e039 b.n 800161a { float key = v[i]; - 800145e: 7bfb ldrb r3, [r7, #15] - 8001460: 009b lsls r3, r3, #2 - 8001462: 687a ldr r2, [r7, #4] - 8001464: 4413 add r3, r2 - 8001466: 681b ldr r3, [r3, #0] - 8001468: 60bb str r3, [r7, #8] + 80015a6: 7bfb ldrb r3, [r7, #15] + 80015a8: 009b lsls r3, r3, #2 + 80015aa: 687a ldr r2, [r7, #4] + 80015ac: 4413 add r3, r2 + 80015ae: 681b ldr r3, [r3, #0] + 80015b0: 60bb str r3, [r7, #8] int8_t j = (int8_t)i - 1; - 800146a: 7bfb ldrb r3, [r7, #15] - 800146c: 3b01 subs r3, #1 - 800146e: b2db uxtb r3, r3 - 8001470: 73bb strb r3, [r7, #14] + 80015b2: 7bfb ldrb r3, [r7, #15] + 80015b4: 3b01 subs r3, #1 + 80015b6: b2db uxtb r3, r3 + 80015b8: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 8001472: e012 b.n 800149a + 80015ba: e012 b.n 80015e2 { v[j + 1] = v[j]; - 8001474: f997 300e ldrsb.w r3, [r7, #14] - 8001478: 009b lsls r3, r3, #2 - 800147a: 687a ldr r2, [r7, #4] - 800147c: 441a add r2, r3 - 800147e: f997 300e ldrsb.w r3, [r7, #14] - 8001482: 3301 adds r3, #1 - 8001484: 009b lsls r3, r3, #2 - 8001486: 6879 ldr r1, [r7, #4] - 8001488: 440b add r3, r1 - 800148a: 6812 ldr r2, [r2, #0] - 800148c: 601a str r2, [r3, #0] + 80015bc: f997 300e ldrsb.w r3, [r7, #14] + 80015c0: 009b lsls r3, r3, #2 + 80015c2: 687a ldr r2, [r7, #4] + 80015c4: 441a add r2, r3 + 80015c6: f997 300e ldrsb.w r3, [r7, #14] + 80015ca: 3301 adds r3, #1 + 80015cc: 009b lsls r3, r3, #2 + 80015ce: 6879 ldr r1, [r7, #4] + 80015d0: 440b add r3, r1 + 80015d2: 6812 ldr r2, [r2, #0] + 80015d4: 601a str r2, [r3, #0] j--; - 800148e: f997 300e ldrsb.w r3, [r7, #14] - 8001492: b2db uxtb r3, r3 - 8001494: 3b01 subs r3, #1 - 8001496: b2db uxtb r3, r3 - 8001498: 73bb strb r3, [r7, #14] + 80015d6: f997 300e ldrsb.w r3, [r7, #14] + 80015da: b2db uxtb r3, r3 + 80015dc: 3b01 subs r3, #1 + 80015de: b2db uxtb r3, r3 + 80015e0: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 800149a: f997 300e ldrsb.w r3, [r7, #14] - 800149e: 2b00 cmp r3, #0 - 80014a0: db0c blt.n 80014bc - 80014a2: f997 300e ldrsb.w r3, [r7, #14] - 80014a6: 009b lsls r3, r3, #2 - 80014a8: 687a ldr r2, [r7, #4] - 80014aa: 4413 add r3, r2 - 80014ac: 681b ldr r3, [r3, #0] - 80014ae: 4619 mov r1, r3 - 80014b0: 68b8 ldr r0, [r7, #8] - 80014b2: f7ff f8ff bl 80006b4 <__aeabi_fcmplt> - 80014b6: 4603 mov r3, r0 - 80014b8: 2b00 cmp r3, #0 - 80014ba: d1db bne.n 8001474 + 80015e2: f997 300e ldrsb.w r3, [r7, #14] + 80015e6: 2b00 cmp r3, #0 + 80015e8: db0c blt.n 8001604 + 80015ea: f997 300e ldrsb.w r3, [r7, #14] + 80015ee: 009b lsls r3, r3, #2 + 80015f0: 687a ldr r2, [r7, #4] + 80015f2: 4413 add r3, r2 + 80015f4: 681b ldr r3, [r3, #0] + 80015f6: 4619 mov r1, r3 + 80015f8: 68b8 ldr r0, [r7, #8] + 80015fa: f7ff f85b bl 80006b4 <__aeabi_fcmplt> + 80015fe: 4603 mov r3, r0 + 8001600: 2b00 cmp r3, #0 + 8001602: d1db bne.n 80015bc } v[j + 1] = key; - 80014bc: f997 300e ldrsb.w r3, [r7, #14] - 80014c0: 3301 adds r3, #1 - 80014c2: 009b lsls r3, r3, #2 - 80014c4: 687a ldr r2, [r7, #4] - 80014c6: 4413 add r3, r2 - 80014c8: 68ba ldr r2, [r7, #8] - 80014ca: 601a str r2, [r3, #0] + 8001604: f997 300e ldrsb.w r3, [r7, #14] + 8001608: 3301 adds r3, #1 + 800160a: 009b lsls r3, r3, #2 + 800160c: 687a ldr r2, [r7, #4] + 800160e: 4413 add r3, r2 + 8001610: 68ba ldr r2, [r7, #8] + 8001612: 601a str r2, [r3, #0] for (uint8_t i = 1; i < n; i++) - 80014cc: 7bfb ldrb r3, [r7, #15] - 80014ce: 3301 adds r3, #1 - 80014d0: 73fb strb r3, [r7, #15] - 80014d2: 7bfa ldrb r2, [r7, #15] - 80014d4: 78fb ldrb r3, [r7, #3] - 80014d6: 429a cmp r2, r3 - 80014d8: d3c1 bcc.n 800145e + 8001614: 7bfb ldrb r3, [r7, #15] + 8001616: 3301 adds r3, #1 + 8001618: 73fb strb r3, [r7, #15] + 800161a: 7bfa ldrb r2, [r7, #15] + 800161c: 78fb ldrb r3, [r7, #3] + 800161e: 429a cmp r2, r3 + 8001620: d3c1 bcc.n 80015a6 } } - 80014da: bf00 nop - 80014dc: bf00 nop - 80014de: 3710 adds r7, #16 - 80014e0: 46bd mov sp, r7 - 80014e2: bd80 pop {r7, pc} + 8001622: bf00 nop + 8001624: bf00 nop + 8001626: 3710 adds r7, #16 + 8001628: 46bd mov sp, r7 + 800162a: bd80 pop {r7, pc} -080014e4 : +0800162c : * original order is not needed), discards TRIM_COUNT values from each * end, and averages the remainder. Sorting in place avoids a temporary * array and removes the need for memcpy()/string.h entirely. **/ float ADS1015_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim) { - 80014e4: b580 push {r7, lr} - 80014e6: b086 sub sp, #24 - 80014e8: af00 add r7, sp, #0 - 80014ea: 6078 str r0, [r7, #4] - 80014ec: 460b mov r3, r1 - 80014ee: 70fb strb r3, [r7, #3] - 80014f0: 4613 mov r3, r2 - 80014f2: 70bb strb r3, [r7, #2] + 800162c: b580 push {r7, lr} + 800162e: b086 sub sp, #24 + 8001630: af00 add r7, sp, #0 + 8001632: 6078 str r0, [r7, #4] + 8001634: 460b mov r3, r1 + 8001636: 70fb strb r3, [r7, #3] + 8001638: 4613 mov r3, r2 + 800163a: 70bb strb r3, [r7, #2] ADS1015_Sort_Array(buffer, n); - 80014f4: 78fb ldrb r3, [r7, #3] - 80014f6: 4619 mov r1, r3 - 80014f8: 6878 ldr r0, [r7, #4] - 80014fa: f7ff ffa7 bl 800144c + 800163c: 78fb ldrb r3, [r7, #3] + 800163e: 4619 mov r1, r3 + 8001640: 6878 ldr r0, [r7, #4] + 8001642: f7ff ffa7 bl 8001594 uint8_t start = trim; - 80014fe: 78bb ldrb r3, [r7, #2] - 8001500: 75fb strb r3, [r7, #23] + 8001646: 78bb ldrb r3, [r7, #2] + 8001648: 75fb strb r3, [r7, #23] uint8_t end = n - trim; /* exclusive */ - 8001502: 78fa ldrb r2, [r7, #3] - 8001504: 78bb ldrb r3, [r7, #2] - 8001506: 1ad3 subs r3, r2, r3 - 8001508: 75bb strb r3, [r7, #22] + 800164a: 78fa ldrb r2, [r7, #3] + 800164c: 78bb ldrb r3, [r7, #2] + 800164e: 1ad3 subs r3, r2, r3 + 8001650: 75bb strb r3, [r7, #22] if (end <= start) /* guard against a misconfigured trim value */ - 800150a: 7dba ldrb r2, [r7, #22] - 800150c: 7dfb ldrb r3, [r7, #23] - 800150e: 429a cmp r2, r3 - 8001510: d803 bhi.n 800151a + 8001652: 7dba ldrb r2, [r7, #22] + 8001654: 7dfb ldrb r3, [r7, #23] + 8001656: 429a cmp r2, r3 + 8001658: d803 bhi.n 8001662 { start = 0; - 8001512: 2300 movs r3, #0 - 8001514: 75fb strb r3, [r7, #23] + 800165a: 2300 movs r3, #0 + 800165c: 75fb strb r3, [r7, #23] end = n; - 8001516: 78fb ldrb r3, [r7, #3] - 8001518: 75bb strb r3, [r7, #22] + 800165e: 78fb ldrb r3, [r7, #3] + 8001660: 75bb strb r3, [r7, #22] } float sum = 0.0f; - 800151a: f04f 0300 mov.w r3, #0 - 800151e: 613b str r3, [r7, #16] + 8001662: f04f 0300 mov.w r3, #0 + 8001666: 613b str r3, [r7, #16] uint8_t count = 0; - 8001520: 2300 movs r3, #0 - 8001522: 73fb strb r3, [r7, #15] + 8001668: 2300 movs r3, #0 + 800166a: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 8001524: 7dfb ldrb r3, [r7, #23] - 8001526: 73bb strb r3, [r7, #14] - 8001528: e010 b.n 800154c + 800166c: 7dfb ldrb r3, [r7, #23] + 800166e: 73bb strb r3, [r7, #14] + 8001670: e010 b.n 8001694 { sum += buffer[i]; - 800152a: 7bbb ldrb r3, [r7, #14] - 800152c: 009b lsls r3, r3, #2 - 800152e: 687a ldr r2, [r7, #4] - 8001530: 4413 add r3, r2 - 8001532: 681b ldr r3, [r3, #0] - 8001534: 4619 mov r1, r3 - 8001536: 6938 ldr r0, [r7, #16] - 8001538: f7fe fe16 bl 8000168 <__addsf3> - 800153c: 4603 mov r3, r0 - 800153e: 613b str r3, [r7, #16] + 8001672: 7bbb ldrb r3, [r7, #14] + 8001674: 009b lsls r3, r3, #2 + 8001676: 687a ldr r2, [r7, #4] + 8001678: 4413 add r3, r2 + 800167a: 681b ldr r3, [r3, #0] + 800167c: 4619 mov r1, r3 + 800167e: 6938 ldr r0, [r7, #16] + 8001680: f7fe fd72 bl 8000168 <__addsf3> + 8001684: 4603 mov r3, r0 + 8001686: 613b str r3, [r7, #16] count++; - 8001540: 7bfb ldrb r3, [r7, #15] - 8001542: 3301 adds r3, #1 - 8001544: 73fb strb r3, [r7, #15] + 8001688: 7bfb ldrb r3, [r7, #15] + 800168a: 3301 adds r3, #1 + 800168c: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 8001546: 7bbb ldrb r3, [r7, #14] - 8001548: 3301 adds r3, #1 - 800154a: 73bb strb r3, [r7, #14] - 800154c: 7bba ldrb r2, [r7, #14] - 800154e: 7dbb ldrb r3, [r7, #22] - 8001550: 429a cmp r2, r3 - 8001552: d3ea bcc.n 800152a + 800168e: 7bbb ldrb r3, [r7, #14] + 8001690: 3301 adds r3, #1 + 8001692: 73bb strb r3, [r7, #14] + 8001694: 7bba ldrb r2, [r7, #14] + 8001696: 7dbb ldrb r3, [r7, #22] + 8001698: 429a cmp r2, r3 + 800169a: d3ea bcc.n 8001672 } return sum / (float)count; - 8001554: 7bfb ldrb r3, [r7, #15] - 8001556: 4618 mov r0, r3 - 8001558: f7fe feb6 bl 80002c8 <__aeabi_ui2f> - 800155c: 4603 mov r3, r0 - 800155e: 4619 mov r1, r3 - 8001560: 6938 ldr r0, [r7, #16] - 8001562: f7fe ffbd bl 80004e0 <__aeabi_fdiv> - 8001566: 4603 mov r3, r0 + 800169c: 7bfb ldrb r3, [r7, #15] + 800169e: 4618 mov r0, r3 + 80016a0: f7fe fe12 bl 80002c8 <__aeabi_ui2f> + 80016a4: 4603 mov r3, r0 + 80016a6: 4619 mov r1, r3 + 80016a8: 6938 ldr r0, [r7, #16] + 80016aa: f7fe ff19 bl 80004e0 <__aeabi_fdiv> + 80016ae: 4603 mov r3, r0 } - 8001568: 4618 mov r0, r3 - 800156a: 3718 adds r7, #24 - 800156c: 46bd mov sp, r7 - 800156e: bd80 pop {r7, pc} + 80016b0: 4618 mov r0, r3 + 80016b2: 3718 adds r7, #24 + 80016b4: 46bd mov sp, r7 + 80016b6: bd80 pop {r7, pc} -08001570 : +080016b8 : /* * Simple average of the history buffer (stage-2 sliding window) */ float ADS1015_History_Average(const float *hist, uint8_t n) { - 8001570: b580 push {r7, lr} - 8001572: b084 sub sp, #16 - 8001574: af00 add r7, sp, #0 - 8001576: 6078 str r0, [r7, #4] - 8001578: 460b mov r3, r1 - 800157a: 70fb strb r3, [r7, #3] + 80016b8: b580 push {r7, lr} + 80016ba: b084 sub sp, #16 + 80016bc: af00 add r7, sp, #0 + 80016be: 6078 str r0, [r7, #4] + 80016c0: 460b mov r3, r1 + 80016c2: 70fb strb r3, [r7, #3] float sum = 0.0f; - 800157c: f04f 0300 mov.w r3, #0 - 8001580: 60fb str r3, [r7, #12] + 80016c4: f04f 0300 mov.w r3, #0 + 80016c8: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 8001582: 2300 movs r3, #0 - 8001584: 72fb strb r3, [r7, #11] - 8001586: e00d b.n 80015a4 + 80016ca: 2300 movs r3, #0 + 80016cc: 72fb strb r3, [r7, #11] + 80016ce: e00d b.n 80016ec sum += hist[i]; - 8001588: 7afb ldrb r3, [r7, #11] - 800158a: 009b lsls r3, r3, #2 - 800158c: 687a ldr r2, [r7, #4] - 800158e: 4413 add r3, r2 - 8001590: 681b ldr r3, [r3, #0] - 8001592: 4619 mov r1, r3 - 8001594: 68f8 ldr r0, [r7, #12] - 8001596: f7fe fde7 bl 8000168 <__addsf3> - 800159a: 4603 mov r3, r0 - 800159c: 60fb str r3, [r7, #12] + 80016d0: 7afb ldrb r3, [r7, #11] + 80016d2: 009b lsls r3, r3, #2 + 80016d4: 687a ldr r2, [r7, #4] + 80016d6: 4413 add r3, r2 + 80016d8: 681b ldr r3, [r3, #0] + 80016da: 4619 mov r1, r3 + 80016dc: 68f8 ldr r0, [r7, #12] + 80016de: f7fe fd43 bl 8000168 <__addsf3> + 80016e2: 4603 mov r3, r0 + 80016e4: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 800159e: 7afb ldrb r3, [r7, #11] - 80015a0: 3301 adds r3, #1 - 80015a2: 72fb strb r3, [r7, #11] - 80015a4: 7afa ldrb r2, [r7, #11] - 80015a6: 78fb ldrb r3, [r7, #3] - 80015a8: 429a cmp r2, r3 - 80015aa: d3ed bcc.n 8001588 + 80016e6: 7afb ldrb r3, [r7, #11] + 80016e8: 3301 adds r3, #1 + 80016ea: 72fb strb r3, [r7, #11] + 80016ec: 7afa ldrb r2, [r7, #11] + 80016ee: 78fb ldrb r3, [r7, #3] + 80016f0: 429a cmp r2, r3 + 80016f2: d3ed bcc.n 80016d0 return sum / (float)n; - 80015ac: 78fb ldrb r3, [r7, #3] - 80015ae: 4618 mov r0, r3 - 80015b0: f7fe fe8a bl 80002c8 <__aeabi_ui2f> - 80015b4: 4603 mov r3, r0 - 80015b6: 4619 mov r1, r3 - 80015b8: 68f8 ldr r0, [r7, #12] - 80015ba: f7fe ff91 bl 80004e0 <__aeabi_fdiv> - 80015be: 4603 mov r3, r0 + 80016f4: 78fb ldrb r3, [r7, #3] + 80016f6: 4618 mov r0, r3 + 80016f8: f7fe fde6 bl 80002c8 <__aeabi_ui2f> + 80016fc: 4603 mov r3, r0 + 80016fe: 4619 mov r1, r3 + 8001700: 68f8 ldr r0, [r7, #12] + 8001702: f7fe feed bl 80004e0 <__aeabi_fdiv> + 8001706: 4603 mov r3, r0 } - 80015c0: 4618 mov r0, r3 - 80015c2: 3710 adds r7, #16 - 80015c4: 46bd mov sp, r7 - 80015c6: bd80 pop {r7, pc} + 8001708: 4618 mov r0, r3 + 800170a: 3710 adds r7, #16 + 800170c: 46bd mov sp, r7 + 800170e: bd80 pop {r7, pc} -080015c8 : +08001710 : * Common processing core: applied identically to all 3 channels. * Receives the current raw reading and the channel's state (global * arrays/struct). **/ void ADS1015_Process_Sample(ADS1015_filter_t *ch, float raw) { - 80015c8: b590 push {r4, r7, lr} - 80015ca: b085 sub sp, #20 - 80015cc: af00 add r7, sp, #0 - 80015ce: 6078 str r0, [r7, #4] - 80015d0: 6039 str r1, [r7, #0] + 8001710: b590 push {r4, r7, lr} + 8001712: b085 sub sp, #20 + 8001714: af00 add r7, sp, #0 + 8001716: 6078 str r0, [r7, #4] + 8001718: 6039 str r1, [r7, #0] /* --- Stage 1: accumulate into the current burst --- */ ch->burst[ch->burst_index] = raw; - 80015d2: 687b ldr r3, [r7, #4] - 80015d4: 7d1b ldrb r3, [r3, #20] - 80015d6: 4619 mov r1, r3 - 80015d8: 687b ldr r3, [r7, #4] - 80015da: 683a ldr r2, [r7, #0] - 80015dc: f843 2021 str.w r2, [r3, r1, lsl #2] + 800171a: 687b ldr r3, [r7, #4] + 800171c: 7d1b ldrb r3, [r3, #20] + 800171e: 4619 mov r1, r3 + 8001720: 687b ldr r3, [r7, #4] + 8001722: 683a ldr r2, [r7, #0] + 8001724: f843 2021 str.w r2, [r3, r1, lsl #2] ch->burst_index++; - 80015e0: 687b ldr r3, [r7, #4] - 80015e2: 7d1b ldrb r3, [r3, #20] - 80015e4: 3301 adds r3, #1 - 80015e6: b2da uxtb r2, r3 - 80015e8: 687b ldr r3, [r7, #4] - 80015ea: 751a strb r2, [r3, #20] + 8001728: 687b ldr r3, [r7, #4] + 800172a: 7d1b ldrb r3, [r3, #20] + 800172c: 3301 adds r3, #1 + 800172e: b2da uxtb r2, r3 + 8001730: 687b ldr r3, [r7, #4] + 8001732: 751a strb r2, [r3, #20] if (ch->burst_index < ADS1015_BURST_SIZE) - 80015ec: 687b ldr r3, [r7, #4] - 80015ee: 7d1b ldrb r3, [r3, #20] - 80015f0: 2b04 cmp r3, #4 - 80015f2: d97a bls.n 80016ea + 8001734: 687b ldr r3, [r7, #4] + 8001736: 7d1b ldrb r3, [r3, #20] + 8001738: 2b04 cmp r3, #4 + 800173a: d97a bls.n 8001832 return; /* still collecting the burst, nothing else to do */ /* Burst complete: compute the trimmed mean */ float burst_result = ADS1015_Trimmed_Mean(ch->burst, ADS1015_BURST_SIZE, ADS1015_TRIM_COUNT); - 80015f4: 687b ldr r3, [r7, #4] - 80015f6: 2201 movs r2, #1 - 80015f8: 2105 movs r1, #5 - 80015fa: 4618 mov r0, r3 - 80015fc: f7ff ff72 bl 80014e4 - 8001600: 60f8 str r0, [r7, #12] + 800173c: 687b ldr r3, [r7, #4] + 800173e: 2201 movs r2, #1 + 8001740: 2105 movs r1, #5 + 8001742: 4618 mov r0, r3 + 8001744: f7ff ff72 bl 800162c + 8001748: 60f8 str r0, [r7, #12] ch->burst_index = 0; /* reset for the next burst */ - 8001602: 687b ldr r3, [r7, #4] - 8001604: 2200 movs r2, #0 - 8001606: 751a strb r2, [r3, #20] + 800174a: 687b ldr r3, [r7, #4] + 800174c: 2200 movs r2, #0 + 800174e: 751a strb r2, [r3, #20] /* --- Stage 2a: rolling history / sliding window --- */ ch->history[ch->history_index] = burst_result; - 8001608: 687b ldr r3, [r7, #4] - 800160a: f893 302c ldrb.w r3, [r3, #44] @ 0x2c - 800160e: 461a mov r2, r3 - 8001610: 687b ldr r3, [r7, #4] - 8001612: 3206 adds r2, #6 - 8001614: 68f9 ldr r1, [r7, #12] - 8001616: f843 1022 str.w r1, [r3, r2, lsl #2] + 8001750: 687b ldr r3, [r7, #4] + 8001752: f893 302c ldrb.w r3, [r3, #44] @ 0x2c + 8001756: 461a mov r2, r3 + 8001758: 687b ldr r3, [r7, #4] + 800175a: 3206 adds r2, #6 + 800175c: 68f9 ldr r1, [r7, #12] + 800175e: f843 1022 str.w r1, [r3, r2, lsl #2] ch->history_index = (uint8_t)((ch->history_index + 1) % ADS1015_HISTORY_SIZE); - 800161a: 687b ldr r3, [r7, #4] - 800161c: f893 302c ldrb.w r3, [r3, #44] @ 0x2c - 8001620: 1c5a adds r2, r3, #1 - 8001622: 4b34 ldr r3, [pc, #208] @ (80016f4 ) - 8001624: fb83 1302 smull r1, r3, r3, r2 - 8001628: 1059 asrs r1, r3, #1 - 800162a: 17d3 asrs r3, r2, #31 - 800162c: 1ac9 subs r1, r1, r3 - 800162e: 460b mov r3, r1 - 8001630: 009b lsls r3, r3, #2 - 8001632: 440b add r3, r1 - 8001634: 1ad1 subs r1, r2, r3 - 8001636: b2ca uxtb r2, r1 - 8001638: 687b ldr r3, [r7, #4] - 800163a: f883 202c strb.w r2, [r3, #44] @ 0x2c + 8001762: 687b ldr r3, [r7, #4] + 8001764: f893 302c ldrb.w r3, [r3, #44] @ 0x2c + 8001768: 1c5a adds r2, r3, #1 + 800176a: 4b34 ldr r3, [pc, #208] @ (800183c ) + 800176c: fb83 1302 smull r1, r3, r3, r2 + 8001770: 1059 asrs r1, r3, #1 + 8001772: 17d3 asrs r3, r2, #31 + 8001774: 1ac9 subs r1, r1, r3 + 8001776: 460b mov r3, r1 + 8001778: 009b lsls r3, r3, #2 + 800177a: 440b add r3, r1 + 800177c: 1ad1 subs r1, r2, r3 + 800177e: b2ca uxtb r2, r1 + 8001780: 687b ldr r3, [r7, #4] + 8001782: f883 202c strb.w r2, [r3, #44] @ 0x2c if (ch->history_count < ADS1015_HISTORY_SIZE) - 800163e: 687b ldr r3, [r7, #4] - 8001640: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 8001644: 2b04 cmp r3, #4 - 8001646: d807 bhi.n 8001658 + 8001786: 687b ldr r3, [r7, #4] + 8001788: f893 302d ldrb.w r3, [r3, #45] @ 0x2d + 800178c: 2b04 cmp r3, #4 + 800178e: d807 bhi.n 80017a0 ch->history_count++; - 8001648: 687b ldr r3, [r7, #4] - 800164a: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 800164e: 3301 adds r3, #1 - 8001650: b2da uxtb r2, r3 - 8001652: 687b ldr r3, [r7, #4] - 8001654: f883 202d strb.w r2, [r3, #45] @ 0x2d + 8001790: 687b ldr r3, [r7, #4] + 8001792: f893 302d ldrb.w r3, [r3, #45] @ 0x2d + 8001796: 3301 adds r3, #1 + 8001798: b2da uxtb r2, r3 + 800179a: 687b ldr r3, [r7, #4] + 800179c: f883 202d strb.w r2, [r3, #45] @ 0x2d float window_average = ADS1015_History_Average(ch->history, ch->history_count); - 8001658: 687b ldr r3, [r7, #4] - 800165a: f103 0218 add.w r2, r3, #24 - 800165e: 687b ldr r3, [r7, #4] - 8001660: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 8001664: 4619 mov r1, r3 - 8001666: 4610 mov r0, r2 - 8001668: f7ff ff82 bl 8001570 - 800166c: 60b8 str r0, [r7, #8] + 80017a0: 687b ldr r3, [r7, #4] + 80017a2: f103 0218 add.w r2, r3, #24 + 80017a6: 687b ldr r3, [r7, #4] + 80017a8: f893 302d ldrb.w r3, [r3, #45] @ 0x2d + 80017ac: 4619 mov r1, r3 + 80017ae: 4610 mov r0, r2 + 80017b0: f7ff ff82 bl 80016b8 + 80017b4: 60b8 str r0, [r7, #8] /* --- Stage 2b: first-order IIR low-pass filter on the burst result --- */ if (!ch->iir_initialized) - 800166e: 687b ldr r3, [r7, #4] - 8001670: f893 3034 ldrb.w r3, [r3, #52] @ 0x34 - 8001674: 2b00 cmp r3, #0 - 8001676: d107 bne.n 8001688 + 80017b6: 687b ldr r3, [r7, #4] + 80017b8: f893 3034 ldrb.w r3, [r3, #52] @ 0x34 + 80017bc: 2b00 cmp r3, #0 + 80017be: d107 bne.n 80017d0 { ch->iir_state = burst_result; - 8001678: 687b ldr r3, [r7, #4] - 800167a: 68fa ldr r2, [r7, #12] - 800167c: 631a str r2, [r3, #48] @ 0x30 + 80017c0: 687b ldr r3, [r7, #4] + 80017c2: 68fa ldr r2, [r7, #12] + 80017c4: 631a str r2, [r3, #48] @ 0x30 ch->iir_initialized = 1; - 800167e: 687b ldr r3, [r7, #4] - 8001680: 2201 movs r2, #1 - 8001682: f883 2034 strb.w r2, [r3, #52] @ 0x34 - 8001686: e014 b.n 80016b2 + 80017c6: 687b ldr r3, [r7, #4] + 80017c8: 2201 movs r2, #1 + 80017ca: f883 2034 strb.w r2, [r3, #52] @ 0x34 + 80017ce: e014 b.n 80017fa } else { ch->iir_state = ADS1015_IIR_ALPHA * burst_result + (1.0f - ADS1015_IIR_ALPHA) * ch->iir_state; - 8001688: 491b ldr r1, [pc, #108] @ (80016f8 ) - 800168a: 68f8 ldr r0, [r7, #12] - 800168c: f7fe fe74 bl 8000378 <__aeabi_fmul> - 8001690: 4603 mov r3, r0 - 8001692: 461c mov r4, r3 - 8001694: 687b ldr r3, [r7, #4] - 8001696: 6b1b ldr r3, [r3, #48] @ 0x30 - 8001698: 4918 ldr r1, [pc, #96] @ (80016fc ) - 800169a: 4618 mov r0, r3 - 800169c: f7fe fe6c bl 8000378 <__aeabi_fmul> - 80016a0: 4603 mov r3, r0 - 80016a2: 4619 mov r1, r3 - 80016a4: 4620 mov r0, r4 - 80016a6: f7fe fd5f bl 8000168 <__addsf3> - 80016aa: 4603 mov r3, r0 - 80016ac: 461a mov r2, r3 - 80016ae: 687b ldr r3, [r7, #4] - 80016b0: 631a str r2, [r3, #48] @ 0x30 + 80017d0: 491b ldr r1, [pc, #108] @ (8001840 ) + 80017d2: 68f8 ldr r0, [r7, #12] + 80017d4: f7fe fdd0 bl 8000378 <__aeabi_fmul> + 80017d8: 4603 mov r3, r0 + 80017da: 461c mov r4, r3 + 80017dc: 687b ldr r3, [r7, #4] + 80017de: 6b1b ldr r3, [r3, #48] @ 0x30 + 80017e0: 4918 ldr r1, [pc, #96] @ (8001844 ) + 80017e2: 4618 mov r0, r3 + 80017e4: f7fe fdc8 bl 8000378 <__aeabi_fmul> + 80017e8: 4603 mov r3, r0 + 80017ea: 4619 mov r1, r3 + 80017ec: 4620 mov r0, r4 + 80017ee: f7fe fcbb bl 8000168 <__addsf3> + 80017f2: 4603 mov r3, r0 + 80017f4: 461a mov r2, r3 + 80017f6: 687b ldr r3, [r7, #4] + 80017f8: 631a str r2, [r3, #48] @ 0x30 } /* Final output: combines the IIR state (fast response to real drift) * with the window average (more stable, slower response). Adjust * the weighting per channel if needed. */ ch->filtered_value = 0.5f * ch->iir_state + 0.5f * window_average; - 80016b2: 687b ldr r3, [r7, #4] - 80016b4: 6b1b ldr r3, [r3, #48] @ 0x30 - 80016b6: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 - 80016ba: 4618 mov r0, r3 - 80016bc: f7fe fe5c bl 8000378 <__aeabi_fmul> - 80016c0: 4603 mov r3, r0 - 80016c2: 461c mov r4, r3 - 80016c4: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 - 80016c8: 68b8 ldr r0, [r7, #8] - 80016ca: f7fe fe55 bl 8000378 <__aeabi_fmul> - 80016ce: 4603 mov r3, r0 - 80016d0: 4619 mov r1, r3 - 80016d2: 4620 mov r0, r4 - 80016d4: f7fe fd48 bl 8000168 <__addsf3> - 80016d8: 4603 mov r3, r0 - 80016da: 461a mov r2, r3 - 80016dc: 687b ldr r3, [r7, #4] - 80016de: 639a str r2, [r3, #56] @ 0x38 + 80017fa: 687b ldr r3, [r7, #4] + 80017fc: 6b1b ldr r3, [r3, #48] @ 0x30 + 80017fe: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 + 8001802: 4618 mov r0, r3 + 8001804: f7fe fdb8 bl 8000378 <__aeabi_fmul> + 8001808: 4603 mov r3, r0 + 800180a: 461c mov r4, r3 + 800180c: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 + 8001810: 68b8 ldr r0, [r7, #8] + 8001812: f7fe fdb1 bl 8000378 <__aeabi_fmul> + 8001816: 4603 mov r3, r0 + 8001818: 4619 mov r1, r3 + 800181a: 4620 mov r0, r4 + 800181c: f7fe fca4 bl 8000168 <__addsf3> + 8001820: 4603 mov r3, r0 + 8001822: 461a mov r2, r3 + 8001824: 687b ldr r3, [r7, #4] + 8001826: 639a str r2, [r3, #56] @ 0x38 ch->value_valid = 1; - 80016e0: 687b ldr r3, [r7, #4] - 80016e2: 2201 movs r2, #1 - 80016e4: f883 203c strb.w r2, [r3, #60] @ 0x3c - 80016e8: e000 b.n 80016ec + 8001828: 687b ldr r3, [r7, #4] + 800182a: 2201 movs r2, #1 + 800182c: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8001830: e000 b.n 8001834 return; /* still collecting the burst, nothing else to do */ - 80016ea: bf00 nop + 8001832: bf00 nop } - 80016ec: 3714 adds r7, #20 - 80016ee: 46bd mov sp, r7 - 80016f0: bd90 pop {r4, r7, pc} - 80016f2: bf00 nop - 80016f4: 66666667 .word 0x66666667 - 80016f8: 3f0ccccd .word 0x3f0ccccd - 80016fc: 3ee66666 .word 0x3ee66666 + 8001834: 3714 adds r7, #20 + 8001836: 46bd mov sp, r7 + 8001838: bd90 pop {r4, r7, pc} + 800183a: bf00 nop + 800183c: 66666667 .word 0x66666667 + 8001840: 3f0ccccd .word 0x3f0ccccd + 8001844: 3ee66666 .word 0x3ee66666 -08001700 : +08001848 : /* PUBLIC FUNCTIONS - ONE PER CHANNEL */ /* ---------------------------------------------------------------------- */ void ADS1015_pH_NewSample(float raw) { - 8001700: b580 push {r7, lr} - 8001702: b082 sub sp, #8 - 8001704: af00 add r7, sp, #0 - 8001706: 6078 str r0, [r7, #4] + 8001848: b580 push {r7, lr} + 800184a: b082 sub sp, #8 + 800184c: af00 add r7, sp, #0 + 800184e: 6078 str r0, [r7, #4] ADS1015_Process_Sample(&g_ph_filter, raw); - 8001708: 6879 ldr r1, [r7, #4] - 800170a: 4803 ldr r0, [pc, #12] @ (8001718 ) - 800170c: f7ff ff5c bl 80015c8 + 8001850: 6879 ldr r1, [r7, #4] + 8001852: 4803 ldr r0, [pc, #12] @ (8001860 ) + 8001854: f7ff ff5c bl 8001710 } - 8001710: bf00 nop - 8001712: 3708 adds r7, #8 - 8001714: 46bd mov sp, r7 - 8001716: bd80 pop {r7, pc} - 8001718: 200001c0 .word 0x200001c0 + 8001858: bf00 nop + 800185a: 3708 adds r7, #8 + 800185c: 46bd mov sp, r7 + 800185e: bd80 pop {r7, pc} + 8001860: 200001c8 .word 0x200001c8 -0800171c : +08001864 : * @brief Initializes the GPIO hardware and sets initial states. * @note This function replaces the handle-based init. * @retval None */ void digital_outputs_init(void) { - 800171c: b580 push {r7, lr} - 800171e: b086 sub sp, #24 - 8001720: af00 add r7, sp, #0 + 8001864: b580 push {r7, lr} + 8001866: b086 sub sp, #24 + 8001868: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001722: 1d3b adds r3, r7, #4 - 8001724: 2200 movs r2, #0 - 8001726: 601a str r2, [r3, #0] - 8001728: 605a str r2, [r3, #4] - 800172a: 609a str r2, [r3, #8] - 800172c: 60da str r2, [r3, #12] + 800186a: 1d3b adds r3, r7, #4 + 800186c: 2200 movs r2, #0 + 800186e: 601a str r2, [r3, #0] + 8001870: 605a str r2, [r3, #4] + 8001872: 609a str r2, [r3, #8] + 8001874: 60da str r2, [r3, #12] for (int i = 0; i < OUTPUT_PINS_COUNT; i++) { - 800172e: 2300 movs r3, #0 - 8001730: 617b str r3, [r7, #20] - 8001732: e029 b.n 8001788 + 8001876: 2300 movs r3, #0 + 8001878: 617b str r3, [r7, #20] + 800187a: e029 b.n 80018d0 GPIO_InitStruct.Pin = output_pins[i].pin; - 8001734: 4a18 ldr r2, [pc, #96] @ (8001798 ) - 8001736: 697b ldr r3, [r7, #20] - 8001738: 00db lsls r3, r3, #3 - 800173a: 4413 add r3, r2 - 800173c: 889b ldrh r3, [r3, #4] - 800173e: 607b str r3, [r7, #4] + 800187c: 4a18 ldr r2, [pc, #96] @ (80018e0 ) + 800187e: 697b ldr r3, [r7, #20] + 8001880: 00db lsls r3, r3, #3 + 8001882: 4413 add r3, r2 + 8001884: 889b ldrh r3, [r3, #4] + 8001886: 607b str r3, [r7, #4] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; // Open-drain - 8001740: 2311 movs r3, #17 - 8001742: 60bb str r3, [r7, #8] + 8001888: 2311 movs r3, #17 + 800188a: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001744: 2300 movs r3, #0 - 8001746: 60fb str r3, [r7, #12] + 800188c: 2300 movs r3, #0 + 800188e: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001748: 2302 movs r3, #2 - 800174a: 613b str r3, [r7, #16] + 8001890: 2302 movs r3, #2 + 8001892: 613b str r3, [r7, #16] HAL_GPIO_Init(output_pins[i].port, &GPIO_InitStruct); - 800174c: 4a12 ldr r2, [pc, #72] @ (8001798 ) - 800174e: 697b ldr r3, [r7, #20] - 8001750: f852 3033 ldr.w r3, [r2, r3, lsl #3] - 8001754: 1d3a adds r2, r7, #4 - 8001756: 4611 mov r1, r2 - 8001758: 4618 mov r0, r3 - 800175a: f001 fac5 bl 8002ce8 + 8001894: 4a12 ldr r2, [pc, #72] @ (80018e0 ) + 8001896: 697b ldr r3, [r7, #20] + 8001898: f852 3033 ldr.w r3, [r2, r3, lsl #3] + 800189c: 1d3a adds r2, r7, #4 + 800189e: 4611 mov r1, r2 + 80018a0: 4618 mov r0, r3 + 80018a2: f001 fadb bl 8002e5c // Force initial state to LOW (Reset) HAL_GPIO_WritePin(output_pins[i].port, output_pins[i].pin, GPIO_PIN_SET); - 800175e: 4a0e ldr r2, [pc, #56] @ (8001798 ) - 8001760: 697b ldr r3, [r7, #20] - 8001762: f852 0033 ldr.w r0, [r2, r3, lsl #3] - 8001766: 4a0c ldr r2, [pc, #48] @ (8001798 ) - 8001768: 697b ldr r3, [r7, #20] - 800176a: 00db lsls r3, r3, #3 - 800176c: 4413 add r3, r2 - 800176e: 889b ldrh r3, [r3, #4] - 8001770: 2201 movs r2, #1 - 8001772: 4619 mov r1, r3 - 8001774: f001 fc53 bl 800301e + 80018a6: 4a0e ldr r2, [pc, #56] @ (80018e0 ) + 80018a8: 697b ldr r3, [r7, #20] + 80018aa: f852 0033 ldr.w r0, [r2, r3, lsl #3] + 80018ae: 4a0c ldr r2, [pc, #48] @ (80018e0 ) + 80018b0: 697b ldr r3, [r7, #20] + 80018b2: 00db lsls r3, r3, #3 + 80018b4: 4413 add r3, r2 + 80018b6: 889b ldrh r3, [r3, #4] + 80018b8: 2201 movs r2, #1 + 80018ba: 4619 mov r1, r3 + 80018bc: f001 fc69 bl 8003192 pin_states[i] = 0; - 8001778: 4a08 ldr r2, [pc, #32] @ (800179c ) - 800177a: 697b ldr r3, [r7, #20] - 800177c: 4413 add r3, r2 - 800177e: 2200 movs r2, #0 - 8001780: 701a strb r2, [r3, #0] + 80018c0: 4a08 ldr r2, [pc, #32] @ (80018e4 ) + 80018c2: 697b ldr r3, [r7, #20] + 80018c4: 4413 add r3, r2 + 80018c6: 2200 movs r2, #0 + 80018c8: 701a strb r2, [r3, #0] for (int i = 0; i < OUTPUT_PINS_COUNT; i++) { - 8001782: 697b ldr r3, [r7, #20] - 8001784: 3301 adds r3, #1 - 8001786: 617b str r3, [r7, #20] - 8001788: 697b ldr r3, [r7, #20] - 800178a: 2b07 cmp r3, #7 - 800178c: ddd2 ble.n 8001734 + 80018ca: 697b ldr r3, [r7, #20] + 80018cc: 3301 adds r3, #1 + 80018ce: 617b str r3, [r7, #20] + 80018d0: 697b ldr r3, [r7, #20] + 80018d2: 2b07 cmp r3, #7 + 80018d4: ddd2 ble.n 800187c } } - 800178e: bf00 nop - 8001790: bf00 nop - 8001792: 3718 adds r7, #24 - 8001794: 46bd mov sp, r7 - 8001796: bd80 pop {r7, pc} - 8001798: 080060ec .word 0x080060ec - 800179c: 2000020c .word 0x2000020c + 80018d6: bf00 nop + 80018d8: bf00 nop + 80018da: 3718 adds r7, #24 + 80018dc: 46bd mov sp, r7 + 80018de: bd80 pop {r7, pc} + 80018e0: 08006260 .word 0x08006260 + 80018e4: 20000214 .word 0x20000214 -080017a0 : +080018e8 : * EXTI * Free pins are configured automatically as Analog (this feature is enabled through * the Code Generation settings) */ void MX_GPIO_Init(void) { - 80017a0: b580 push {r7, lr} - 80017a2: b088 sub sp, #32 - 80017a4: af00 add r7, sp, #0 + 80018e8: b580 push {r7, lr} + 80018ea: b088 sub sp, #32 + 80018ec: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80017a6: f107 0310 add.w r3, r7, #16 - 80017aa: 2200 movs r2, #0 - 80017ac: 601a str r2, [r3, #0] - 80017ae: 605a str r2, [r3, #4] - 80017b0: 609a str r2, [r3, #8] - 80017b2: 60da str r2, [r3, #12] + 80018ee: f107 0310 add.w r3, r7, #16 + 80018f2: 2200 movs r2, #0 + 80018f4: 601a str r2, [r3, #0] + 80018f6: 605a str r2, [r3, #4] + 80018f8: 609a str r2, [r3, #8] + 80018fa: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); - 80017b4: 4b46 ldr r3, [pc, #280] @ (80018d0 ) - 80017b6: 699b ldr r3, [r3, #24] - 80017b8: 4a45 ldr r2, [pc, #276] @ (80018d0 ) - 80017ba: f043 0310 orr.w r3, r3, #16 - 80017be: 6193 str r3, [r2, #24] - 80017c0: 4b43 ldr r3, [pc, #268] @ (80018d0 ) - 80017c2: 699b ldr r3, [r3, #24] - 80017c4: f003 0310 and.w r3, r3, #16 - 80017c8: 60fb str r3, [r7, #12] - 80017ca: 68fb ldr r3, [r7, #12] + 80018fc: 4b46 ldr r3, [pc, #280] @ (8001a18 ) + 80018fe: 699b ldr r3, [r3, #24] + 8001900: 4a45 ldr r2, [pc, #276] @ (8001a18 ) + 8001902: f043 0310 orr.w r3, r3, #16 + 8001906: 6193 str r3, [r2, #24] + 8001908: 4b43 ldr r3, [pc, #268] @ (8001a18 ) + 800190a: 699b ldr r3, [r3, #24] + 800190c: f003 0310 and.w r3, r3, #16 + 8001910: 60fb str r3, [r7, #12] + 8001912: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOD_CLK_ENABLE(); - 80017cc: 4b40 ldr r3, [pc, #256] @ (80018d0 ) - 80017ce: 699b ldr r3, [r3, #24] - 80017d0: 4a3f ldr r2, [pc, #252] @ (80018d0 ) - 80017d2: f043 0320 orr.w r3, r3, #32 - 80017d6: 6193 str r3, [r2, #24] - 80017d8: 4b3d ldr r3, [pc, #244] @ (80018d0 ) - 80017da: 699b ldr r3, [r3, #24] - 80017dc: f003 0320 and.w r3, r3, #32 - 80017e0: 60bb str r3, [r7, #8] - 80017e2: 68bb ldr r3, [r7, #8] + 8001914: 4b40 ldr r3, [pc, #256] @ (8001a18 ) + 8001916: 699b ldr r3, [r3, #24] + 8001918: 4a3f ldr r2, [pc, #252] @ (8001a18 ) + 800191a: f043 0320 orr.w r3, r3, #32 + 800191e: 6193 str r3, [r2, #24] + 8001920: 4b3d ldr r3, [pc, #244] @ (8001a18 ) + 8001922: 699b ldr r3, [r3, #24] + 8001924: f003 0320 and.w r3, r3, #32 + 8001928: 60bb str r3, [r7, #8] + 800192a: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80017e4: 4b3a ldr r3, [pc, #232] @ (80018d0 ) - 80017e6: 699b ldr r3, [r3, #24] - 80017e8: 4a39 ldr r2, [pc, #228] @ (80018d0 ) - 80017ea: f043 0304 orr.w r3, r3, #4 - 80017ee: 6193 str r3, [r2, #24] - 80017f0: 4b37 ldr r3, [pc, #220] @ (80018d0 ) - 80017f2: 699b ldr r3, [r3, #24] - 80017f4: f003 0304 and.w r3, r3, #4 - 80017f8: 607b str r3, [r7, #4] - 80017fa: 687b ldr r3, [r7, #4] + 800192c: 4b3a ldr r3, [pc, #232] @ (8001a18 ) + 800192e: 699b ldr r3, [r3, #24] + 8001930: 4a39 ldr r2, [pc, #228] @ (8001a18 ) + 8001932: f043 0304 orr.w r3, r3, #4 + 8001936: 6193 str r3, [r2, #24] + 8001938: 4b37 ldr r3, [pc, #220] @ (8001a18 ) + 800193a: 699b ldr r3, [r3, #24] + 800193c: f003 0304 and.w r3, r3, #4 + 8001940: 607b str r3, [r7, #4] + 8001942: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); - 80017fc: 4b34 ldr r3, [pc, #208] @ (80018d0 ) - 80017fe: 699b ldr r3, [r3, #24] - 8001800: 4a33 ldr r2, [pc, #204] @ (80018d0 ) - 8001802: f043 0308 orr.w r3, r3, #8 - 8001806: 6193 str r3, [r2, #24] - 8001808: 4b31 ldr r3, [pc, #196] @ (80018d0 ) - 800180a: 699b ldr r3, [r3, #24] - 800180c: f003 0308 and.w r3, r3, #8 - 8001810: 603b str r3, [r7, #0] - 8001812: 683b ldr r3, [r7, #0] + 8001944: 4b34 ldr r3, [pc, #208] @ (8001a18 ) + 8001946: 699b ldr r3, [r3, #24] + 8001948: 4a33 ldr r2, [pc, #204] @ (8001a18 ) + 800194a: f043 0308 orr.w r3, r3, #8 + 800194e: 6193 str r3, [r2, #24] + 8001950: 4b31 ldr r3, [pc, #196] @ (8001a18 ) + 8001952: 699b ldr r3, [r3, #24] + 8001954: f003 0308 and.w r3, r3, #8 + 8001958: 603b str r3, [r7, #0] + 800195a: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, DIGI_OUT5_Pin|DIGI_OUT6_Pin|DIGI_OUT7_Pin, GPIO_PIN_RESET); - 8001814: 2200 movs r2, #0 - 8001816: f44f 4160 mov.w r1, #57344 @ 0xe000 - 800181a: 482e ldr r0, [pc, #184] @ (80018d4 ) - 800181c: f001 fbff bl 800301e + 800195c: 2200 movs r2, #0 + 800195e: f44f 4160 mov.w r1, #57344 @ 0xe000 + 8001962: 482e ldr r0, [pc, #184] @ (8001a1c ) + 8001964: f001 fc15 bl 8003192 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, DIGI_OUT0_Pin|DIGI_OUT1_Pin|DIGI_OUT2_Pin|LED_Red_Pin - 8001820: 2200 movs r2, #0 - 8001822: f240 3137 movw r1, #823 @ 0x337 - 8001826: 482c ldr r0, [pc, #176] @ (80018d8 ) - 8001828: f001 fbf9 bl 800301e + 8001968: 2200 movs r2, #0 + 800196a: f240 3137 movw r1, #823 @ 0x337 + 800196e: 482c ldr r0, [pc, #176] @ (8001a20 ) + 8001970: f001 fc0f bl 8003192 |LED_Green_Pin|DIGI_OUT3_Pin|DIGI_OUT4_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(TX_EN_RS485_GPIO_Port, TX_EN_RS485_Pin, GPIO_PIN_RESET); - 800182c: 2200 movs r2, #0 - 800182e: f44f 5180 mov.w r1, #4096 @ 0x1000 - 8001832: 482a ldr r0, [pc, #168] @ (80018dc ) - 8001834: f001 fbf3 bl 800301e + 8001974: 2200 movs r2, #0 + 8001976: f44f 5180 mov.w r1, #4096 @ 0x1000 + 800197a: 482a ldr r0, [pc, #168] @ (8001a24 ) + 800197c: f001 fc09 bl 8003192 /*Configure GPIO pins : DIGI_OUT5_Pin DIGI_OUT6_Pin DIGI_OUT7_Pin */ GPIO_InitStruct.Pin = DIGI_OUT5_Pin|DIGI_OUT6_Pin|DIGI_OUT7_Pin; - 8001838: f44f 4360 mov.w r3, #57344 @ 0xe000 - 800183c: 613b str r3, [r7, #16] + 8001980: f44f 4360 mov.w r3, #57344 @ 0xe000 + 8001984: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 800183e: 2311 movs r3, #17 - 8001840: 617b str r3, [r7, #20] + 8001986: 2311 movs r3, #17 + 8001988: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001842: 2300 movs r3, #0 - 8001844: 61bb str r3, [r7, #24] + 800198a: 2300 movs r3, #0 + 800198c: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001846: 2302 movs r3, #2 - 8001848: 61fb str r3, [r7, #28] + 800198e: 2302 movs r3, #2 + 8001990: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 800184a: f107 0310 add.w r3, r7, #16 - 800184e: 4619 mov r1, r3 - 8001850: 4820 ldr r0, [pc, #128] @ (80018d4 ) - 8001852: f001 fa49 bl 8002ce8 + 8001992: f107 0310 add.w r3, r7, #16 + 8001996: 4619 mov r1, r3 + 8001998: 4820 ldr r0, [pc, #128] @ (8001a1c ) + 800199a: f001 fa5f bl 8002e5c /*Configure GPIO pins : RS485_Addr0_Pin RS485_Addr1_Pin RS485_Addr2_Pin RS485_Addr3_Pin SYS_CFG0_Pin SYS_CFG1_Pin PG_RS485_Pin PG_CE_Pin PG_PH_Pin */ GPIO_InitStruct.Pin = RS485_Addr0_Pin|RS485_Addr1_Pin|RS485_Addr2_Pin|RS485_Addr3_Pin - 8001856: f648 13fc movw r3, #35324 @ 0x89fc - 800185a: 613b str r3, [r7, #16] + 800199e: f648 13fc movw r3, #35324 @ 0x89fc + 80019a2: 613b str r3, [r7, #16] |SYS_CFG0_Pin|SYS_CFG1_Pin|PG_RS485_Pin|PG_CE_Pin |PG_PH_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 800185c: 2300 movs r3, #0 - 800185e: 617b str r3, [r7, #20] + 80019a4: 2300 movs r3, #0 + 80019a6: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8001860: 2301 movs r3, #1 - 8001862: 61bb str r3, [r7, #24] + 80019a8: 2301 movs r3, #1 + 80019aa: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001864: f107 0310 add.w r3, r7, #16 - 8001868: 4619 mov r1, r3 - 800186a: 481c ldr r0, [pc, #112] @ (80018dc ) - 800186c: f001 fa3c bl 8002ce8 + 80019ac: f107 0310 add.w r3, r7, #16 + 80019b0: 4619 mov r1, r3 + 80019b2: 481c ldr r0, [pc, #112] @ (8001a24 ) + 80019b4: f001 fa52 bl 8002e5c /*Configure GPIO pins : DIGI_OUT0_Pin DIGI_OUT1_Pin DIGI_OUT2_Pin LED_Red_Pin LED_Green_Pin DIGI_OUT3_Pin DIGI_OUT4_Pin */ GPIO_InitStruct.Pin = DIGI_OUT0_Pin|DIGI_OUT1_Pin|DIGI_OUT2_Pin|LED_Red_Pin - 8001870: f240 3337 movw r3, #823 @ 0x337 - 8001874: 613b str r3, [r7, #16] + 80019b8: f240 3337 movw r3, #823 @ 0x337 + 80019bc: 613b str r3, [r7, #16] |LED_Green_Pin|DIGI_OUT3_Pin|DIGI_OUT4_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 8001876: 2311 movs r3, #17 - 8001878: 617b str r3, [r7, #20] + 80019be: 2311 movs r3, #17 + 80019c0: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 800187a: 2300 movs r3, #0 - 800187c: 61bb str r3, [r7, #24] + 80019c2: 2300 movs r3, #0 + 80019c4: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 800187e: 2302 movs r3, #2 - 8001880: 61fb str r3, [r7, #28] + 80019c6: 2302 movs r3, #2 + 80019c8: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001882: f107 0310 add.w r3, r7, #16 - 8001886: 4619 mov r1, r3 - 8001888: 4813 ldr r0, [pc, #76] @ (80018d8 ) - 800188a: f001 fa2d bl 8002ce8 + 80019ca: f107 0310 add.w r3, r7, #16 + 80019ce: 4619 mov r1, r3 + 80019d0: 4813 ldr r0, [pc, #76] @ (8001a20 ) + 80019d2: f001 fa43 bl 8002e5c /*Configure GPIO pins : RS485_Addr4_Pin RS485_Addr5_Pin RS485_Addr6_Pin RS485_Addr7_Pin Calib_PH_Pin */ GPIO_InitStruct.Pin = RS485_Addr4_Pin|RS485_Addr5_Pin|RS485_Addr6_Pin|RS485_Addr7_Pin - 800188e: f24f 0308 movw r3, #61448 @ 0xf008 - 8001892: 613b str r3, [r7, #16] + 80019d6: f24f 0308 movw r3, #61448 @ 0xf008 + 80019da: 613b str r3, [r7, #16] |Calib_PH_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8001894: 2300 movs r3, #0 - 8001896: 617b str r3, [r7, #20] + 80019dc: 2300 movs r3, #0 + 80019de: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8001898: 2301 movs r3, #1 - 800189a: 61bb str r3, [r7, #24] + 80019e0: 2301 movs r3, #1 + 80019e2: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 800189c: f107 0310 add.w r3, r7, #16 - 80018a0: 4619 mov r1, r3 - 80018a2: 480d ldr r0, [pc, #52] @ (80018d8 ) - 80018a4: f001 fa20 bl 8002ce8 + 80019e4: f107 0310 add.w r3, r7, #16 + 80019e8: 4619 mov r1, r3 + 80019ea: 480d ldr r0, [pc, #52] @ (8001a20 ) + 80019ec: f001 fa36 bl 8002e5c /*Configure GPIO pin : TX_EN_RS485_Pin */ GPIO_InitStruct.Pin = TX_EN_RS485_Pin; - 80018a8: f44f 5380 mov.w r3, #4096 @ 0x1000 - 80018ac: 613b str r3, [r7, #16] + 80019f0: f44f 5380 mov.w r3, #4096 @ 0x1000 + 80019f4: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 80018ae: 2301 movs r3, #1 - 80018b0: 617b str r3, [r7, #20] + 80019f6: 2301 movs r3, #1 + 80019f8: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 80018b2: 2300 movs r3, #0 - 80018b4: 61bb str r3, [r7, #24] + 80019fa: 2300 movs r3, #0 + 80019fc: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80018b6: 2302 movs r3, #2 - 80018b8: 61fb str r3, [r7, #28] + 80019fe: 2302 movs r3, #2 + 8001a00: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_EN_RS485_GPIO_Port, &GPIO_InitStruct); - 80018ba: f107 0310 add.w r3, r7, #16 - 80018be: 4619 mov r1, r3 - 80018c0: 4806 ldr r0, [pc, #24] @ (80018dc ) - 80018c2: f001 fa11 bl 8002ce8 + 8001a02: f107 0310 add.w r3, r7, #16 + 8001a06: 4619 mov r1, r3 + 8001a08: 4806 ldr r0, [pc, #24] @ (8001a24 ) + 8001a0a: f001 fa27 bl 8002e5c } - 80018c6: bf00 nop - 80018c8: 3720 adds r7, #32 - 80018ca: 46bd mov sp, r7 - 80018cc: bd80 pop {r7, pc} - 80018ce: bf00 nop - 80018d0: 40021000 .word 0x40021000 - 80018d4: 40011000 .word 0x40011000 - 80018d8: 40010c00 .word 0x40010c00 - 80018dc: 40010800 .word 0x40010800 + 8001a0e: bf00 nop + 8001a10: 3720 adds r7, #32 + 8001a12: 46bd mov sp, r7 + 8001a14: bd80 pop {r7, pc} + 8001a16: bf00 nop + 8001a18: 40021000 .word 0x40021000 + 8001a1c: 40011000 .word 0x40011000 + 8001a20: 40010c00 .word 0x40010c00 + 8001a24: 40010800 .word 0x40010800 -080018e0 : +08001a28 : I2C_HandleTypeDef hi2c1; I2C_HandleTypeDef hi2c2; /* I2C1 init function */ void MX_I2C1_Init(void) { - 80018e0: b580 push {r7, lr} - 80018e2: af00 add r7, sp, #0 + 8001a28: b580 push {r7, lr} + 8001a2a: af00 add r7, sp, #0 /* USER CODE END I2C1_Init 0 */ /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ hi2c1.Instance = I2C1; - 80018e4: 4b12 ldr r3, [pc, #72] @ (8001930 ) - 80018e6: 4a13 ldr r2, [pc, #76] @ (8001934 ) - 80018e8: 601a str r2, [r3, #0] + 8001a2c: 4b12 ldr r3, [pc, #72] @ (8001a78 ) + 8001a2e: 4a13 ldr r2, [pc, #76] @ (8001a7c ) + 8001a30: 601a str r2, [r3, #0] hi2c1.Init.ClockSpeed = 100000; - 80018ea: 4b11 ldr r3, [pc, #68] @ (8001930 ) - 80018ec: 4a12 ldr r2, [pc, #72] @ (8001938 ) - 80018ee: 605a str r2, [r3, #4] + 8001a32: 4b11 ldr r3, [pc, #68] @ (8001a78 ) + 8001a34: 4a12 ldr r2, [pc, #72] @ (8001a80 ) + 8001a36: 605a str r2, [r3, #4] hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2; - 80018f0: 4b0f ldr r3, [pc, #60] @ (8001930 ) - 80018f2: 2200 movs r2, #0 - 80018f4: 609a str r2, [r3, #8] + 8001a38: 4b0f ldr r3, [pc, #60] @ (8001a78 ) + 8001a3a: 2200 movs r2, #0 + 8001a3c: 609a str r2, [r3, #8] hi2c1.Init.OwnAddress1 = 0; - 80018f6: 4b0e ldr r3, [pc, #56] @ (8001930 ) - 80018f8: 2200 movs r2, #0 - 80018fa: 60da str r2, [r3, #12] + 8001a3e: 4b0e ldr r3, [pc, #56] @ (8001a78 ) + 8001a40: 2200 movs r2, #0 + 8001a42: 60da str r2, [r3, #12] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 80018fc: 4b0c ldr r3, [pc, #48] @ (8001930 ) - 80018fe: f44f 4280 mov.w r2, #16384 @ 0x4000 - 8001902: 611a str r2, [r3, #16] + 8001a44: 4b0c ldr r3, [pc, #48] @ (8001a78 ) + 8001a46: f44f 4280 mov.w r2, #16384 @ 0x4000 + 8001a4a: 611a str r2, [r3, #16] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 8001904: 4b0a ldr r3, [pc, #40] @ (8001930 ) - 8001906: 2200 movs r2, #0 - 8001908: 615a str r2, [r3, #20] + 8001a4c: 4b0a ldr r3, [pc, #40] @ (8001a78 ) + 8001a4e: 2200 movs r2, #0 + 8001a50: 615a str r2, [r3, #20] hi2c1.Init.OwnAddress2 = 0; - 800190a: 4b09 ldr r3, [pc, #36] @ (8001930 ) - 800190c: 2200 movs r2, #0 - 800190e: 619a str r2, [r3, #24] + 8001a52: 4b09 ldr r3, [pc, #36] @ (8001a78 ) + 8001a54: 2200 movs r2, #0 + 8001a56: 619a str r2, [r3, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 8001910: 4b07 ldr r3, [pc, #28] @ (8001930 ) - 8001912: 2200 movs r2, #0 - 8001914: 61da str r2, [r3, #28] + 8001a58: 4b07 ldr r3, [pc, #28] @ (8001a78 ) + 8001a5a: 2200 movs r2, #0 + 8001a5c: 61da str r2, [r3, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 8001916: 4b06 ldr r3, [pc, #24] @ (8001930 ) - 8001918: 2200 movs r2, #0 - 800191a: 621a str r2, [r3, #32] + 8001a5e: 4b06 ldr r3, [pc, #24] @ (8001a78 ) + 8001a60: 2200 movs r2, #0 + 8001a62: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) - 800191c: 4804 ldr r0, [pc, #16] @ (8001930 ) - 800191e: f001 fbaf bl 8003080 - 8001922: 4603 mov r3, r0 - 8001924: 2b00 cmp r3, #0 - 8001926: d001 beq.n 800192c + 8001a64: 4804 ldr r0, [pc, #16] @ (8001a78 ) + 8001a66: f001 fbc5 bl 80031f4 + 8001a6a: 4603 mov r3, r0 + 8001a6c: 2b00 cmp r3, #0 + 8001a6e: d001 beq.n 8001a74 { Error_Handler(); - 8001928: f000 fb20 bl 8001f6c + 8001a70: f000 fb36 bl 80020e0 } /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } - 800192c: bf00 nop - 800192e: bd80 pop {r7, pc} - 8001930: 20000214 .word 0x20000214 - 8001934: 40005400 .word 0x40005400 - 8001938: 000186a0 .word 0x000186a0 + 8001a74: bf00 nop + 8001a76: bd80 pop {r7, pc} + 8001a78: 2000021c .word 0x2000021c + 8001a7c: 40005400 .word 0x40005400 + 8001a80: 000186a0 .word 0x000186a0 -0800193c : +08001a84 : /* I2C2 init function */ void MX_I2C2_Init(void) { - 800193c: b580 push {r7, lr} - 800193e: af00 add r7, sp, #0 + 8001a84: b580 push {r7, lr} + 8001a86: af00 add r7, sp, #0 /* USER CODE END I2C2_Init 0 */ /* USER CODE BEGIN I2C2_Init 1 */ /* USER CODE END I2C2_Init 1 */ hi2c2.Instance = I2C2; - 8001940: 4b12 ldr r3, [pc, #72] @ (800198c ) - 8001942: 4a13 ldr r2, [pc, #76] @ (8001990 ) - 8001944: 601a str r2, [r3, #0] + 8001a88: 4b12 ldr r3, [pc, #72] @ (8001ad4 ) + 8001a8a: 4a13 ldr r2, [pc, #76] @ (8001ad8 ) + 8001a8c: 601a str r2, [r3, #0] hi2c2.Init.ClockSpeed = 100000; - 8001946: 4b11 ldr r3, [pc, #68] @ (800198c ) - 8001948: 4a12 ldr r2, [pc, #72] @ (8001994 ) - 800194a: 605a str r2, [r3, #4] + 8001a8e: 4b11 ldr r3, [pc, #68] @ (8001ad4 ) + 8001a90: 4a12 ldr r2, [pc, #72] @ (8001adc ) + 8001a92: 605a str r2, [r3, #4] hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; - 800194c: 4b0f ldr r3, [pc, #60] @ (800198c ) - 800194e: 2200 movs r2, #0 - 8001950: 609a str r2, [r3, #8] + 8001a94: 4b0f ldr r3, [pc, #60] @ (8001ad4 ) + 8001a96: 2200 movs r2, #0 + 8001a98: 609a str r2, [r3, #8] hi2c2.Init.OwnAddress1 = 0; - 8001952: 4b0e ldr r3, [pc, #56] @ (800198c ) - 8001954: 2200 movs r2, #0 - 8001956: 60da str r2, [r3, #12] + 8001a9a: 4b0e ldr r3, [pc, #56] @ (8001ad4 ) + 8001a9c: 2200 movs r2, #0 + 8001a9e: 60da str r2, [r3, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 8001958: 4b0c ldr r3, [pc, #48] @ (800198c ) - 800195a: f44f 4280 mov.w r2, #16384 @ 0x4000 - 800195e: 611a str r2, [r3, #16] + 8001aa0: 4b0c ldr r3, [pc, #48] @ (8001ad4 ) + 8001aa2: f44f 4280 mov.w r2, #16384 @ 0x4000 + 8001aa6: 611a str r2, [r3, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 8001960: 4b0a ldr r3, [pc, #40] @ (800198c ) - 8001962: 2200 movs r2, #0 - 8001964: 615a str r2, [r3, #20] + 8001aa8: 4b0a ldr r3, [pc, #40] @ (8001ad4 ) + 8001aaa: 2200 movs r2, #0 + 8001aac: 615a str r2, [r3, #20] hi2c2.Init.OwnAddress2 = 0; - 8001966: 4b09 ldr r3, [pc, #36] @ (800198c ) - 8001968: 2200 movs r2, #0 - 800196a: 619a str r2, [r3, #24] + 8001aae: 4b09 ldr r3, [pc, #36] @ (8001ad4 ) + 8001ab0: 2200 movs r2, #0 + 8001ab2: 619a str r2, [r3, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 800196c: 4b07 ldr r3, [pc, #28] @ (800198c ) - 800196e: 2200 movs r2, #0 - 8001970: 61da str r2, [r3, #28] + 8001ab4: 4b07 ldr r3, [pc, #28] @ (8001ad4 ) + 8001ab6: 2200 movs r2, #0 + 8001ab8: 61da str r2, [r3, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 8001972: 4b06 ldr r3, [pc, #24] @ (800198c ) - 8001974: 2200 movs r2, #0 - 8001976: 621a str r2, [r3, #32] + 8001aba: 4b06 ldr r3, [pc, #24] @ (8001ad4 ) + 8001abc: 2200 movs r2, #0 + 8001abe: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) - 8001978: 4804 ldr r0, [pc, #16] @ (800198c ) - 800197a: f001 fb81 bl 8003080 - 800197e: 4603 mov r3, r0 - 8001980: 2b00 cmp r3, #0 - 8001982: d001 beq.n 8001988 + 8001ac0: 4804 ldr r0, [pc, #16] @ (8001ad4 ) + 8001ac2: f001 fb97 bl 80031f4 + 8001ac6: 4603 mov r3, r0 + 8001ac8: 2b00 cmp r3, #0 + 8001aca: d001 beq.n 8001ad0 { Error_Handler(); - 8001984: f000 faf2 bl 8001f6c + 8001acc: f000 fb08 bl 80020e0 } /* USER CODE BEGIN I2C2_Init 2 */ /* USER CODE END I2C2_Init 2 */ } - 8001988: bf00 nop - 800198a: bd80 pop {r7, pc} - 800198c: 20000268 .word 0x20000268 - 8001990: 40005800 .word 0x40005800 - 8001994: 000186a0 .word 0x000186a0 + 8001ad0: bf00 nop + 8001ad2: bd80 pop {r7, pc} + 8001ad4: 20000270 .word 0x20000270 + 8001ad8: 40005800 .word 0x40005800 + 8001adc: 000186a0 .word 0x000186a0 -08001998 : +08001ae0 : void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) { - 8001998: b580 push {r7, lr} - 800199a: b08a sub sp, #40 @ 0x28 - 800199c: af00 add r7, sp, #0 - 800199e: 6078 str r0, [r7, #4] + 8001ae0: b580 push {r7, lr} + 8001ae2: b08a sub sp, #40 @ 0x28 + 8001ae4: af00 add r7, sp, #0 + 8001ae6: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80019a0: f107 0318 add.w r3, r7, #24 - 80019a4: 2200 movs r2, #0 - 80019a6: 601a str r2, [r3, #0] - 80019a8: 605a str r2, [r3, #4] - 80019aa: 609a str r2, [r3, #8] - 80019ac: 60da str r2, [r3, #12] + 8001ae8: f107 0318 add.w r3, r7, #24 + 8001aec: 2200 movs r2, #0 + 8001aee: 601a str r2, [r3, #0] + 8001af0: 605a str r2, [r3, #4] + 8001af2: 609a str r2, [r3, #8] + 8001af4: 60da str r2, [r3, #12] if(i2cHandle->Instance==I2C1) - 80019ae: 687b ldr r3, [r7, #4] - 80019b0: 681b ldr r3, [r3, #0] - 80019b2: 4a2b ldr r2, [pc, #172] @ (8001a60 ) - 80019b4: 4293 cmp r3, r2 - 80019b6: d124 bne.n 8001a02 + 8001af6: 687b ldr r3, [r7, #4] + 8001af8: 681b ldr r3, [r3, #0] + 8001afa: 4a2b ldr r2, [pc, #172] @ (8001ba8 ) + 8001afc: 4293 cmp r3, r2 + 8001afe: d124 bne.n 8001b4a { /* USER CODE BEGIN I2C1_MspInit 0 */ /* USER CODE END I2C1_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); - 80019b8: 4b2a ldr r3, [pc, #168] @ (8001a64 ) - 80019ba: 699b ldr r3, [r3, #24] - 80019bc: 4a29 ldr r2, [pc, #164] @ (8001a64 ) - 80019be: f043 0308 orr.w r3, r3, #8 - 80019c2: 6193 str r3, [r2, #24] - 80019c4: 4b27 ldr r3, [pc, #156] @ (8001a64 ) - 80019c6: 699b ldr r3, [r3, #24] - 80019c8: f003 0308 and.w r3, r3, #8 - 80019cc: 617b str r3, [r7, #20] - 80019ce: 697b ldr r3, [r7, #20] + 8001b00: 4b2a ldr r3, [pc, #168] @ (8001bac ) + 8001b02: 699b ldr r3, [r3, #24] + 8001b04: 4a29 ldr r2, [pc, #164] @ (8001bac ) + 8001b06: f043 0308 orr.w r3, r3, #8 + 8001b0a: 6193 str r3, [r2, #24] + 8001b0c: 4b27 ldr r3, [pc, #156] @ (8001bac ) + 8001b0e: 699b ldr r3, [r3, #24] + 8001b10: f003 0308 and.w r3, r3, #8 + 8001b14: 617b str r3, [r7, #20] + 8001b16: 697b ldr r3, [r7, #20] /**I2C1 GPIO Configuration PB6 ------> I2C1_SCL PB7 ------> I2C1_SDA */ GPIO_InitStruct.Pin = I2C1_SCL_PH_Pin|I2C1_SDA_PH_Pin; - 80019d0: 23c0 movs r3, #192 @ 0xc0 - 80019d2: 61bb str r3, [r7, #24] + 8001b18: 23c0 movs r3, #192 @ 0xc0 + 8001b1a: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 80019d4: 2312 movs r3, #18 - 80019d6: 61fb str r3, [r7, #28] + 8001b1c: 2312 movs r3, #18 + 8001b1e: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 80019d8: 2302 movs r3, #2 - 80019da: 627b str r3, [r7, #36] @ 0x24 + 8001b20: 2302 movs r3, #2 + 8001b22: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80019dc: f107 0318 add.w r3, r7, #24 - 80019e0: 4619 mov r1, r3 - 80019e2: 4821 ldr r0, [pc, #132] @ (8001a68 ) - 80019e4: f001 f980 bl 8002ce8 + 8001b24: f107 0318 add.w r3, r7, #24 + 8001b28: 4619 mov r1, r3 + 8001b2a: 4821 ldr r0, [pc, #132] @ (8001bb0 ) + 8001b2c: f001 f996 bl 8002e5c /* I2C1 clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); - 80019e8: 4b1e ldr r3, [pc, #120] @ (8001a64 ) - 80019ea: 69db ldr r3, [r3, #28] - 80019ec: 4a1d ldr r2, [pc, #116] @ (8001a64 ) - 80019ee: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 - 80019f2: 61d3 str r3, [r2, #28] - 80019f4: 4b1b ldr r3, [pc, #108] @ (8001a64 ) - 80019f6: 69db ldr r3, [r3, #28] - 80019f8: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 80019fc: 613b str r3, [r7, #16] - 80019fe: 693b ldr r3, [r7, #16] + 8001b30: 4b1e ldr r3, [pc, #120] @ (8001bac ) + 8001b32: 69db ldr r3, [r3, #28] + 8001b34: 4a1d ldr r2, [pc, #116] @ (8001bac ) + 8001b36: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 + 8001b3a: 61d3 str r3, [r2, #28] + 8001b3c: 4b1b ldr r3, [pc, #108] @ (8001bac ) + 8001b3e: 69db ldr r3, [r3, #28] + 8001b40: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 8001b44: 613b str r3, [r7, #16] + 8001b46: 693b ldr r3, [r7, #16] __HAL_RCC_I2C2_CLK_ENABLE(); /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } - 8001a00: e029 b.n 8001a56 + 8001b48: e029 b.n 8001b9e else if(i2cHandle->Instance==I2C2) - 8001a02: 687b ldr r3, [r7, #4] - 8001a04: 681b ldr r3, [r3, #0] - 8001a06: 4a19 ldr r2, [pc, #100] @ (8001a6c ) - 8001a08: 4293 cmp r3, r2 - 8001a0a: d124 bne.n 8001a56 + 8001b4a: 687b ldr r3, [r7, #4] + 8001b4c: 681b ldr r3, [r3, #0] + 8001b4e: 4a19 ldr r2, [pc, #100] @ (8001bb4 ) + 8001b50: 4293 cmp r3, r2 + 8001b52: d124 bne.n 8001b9e __HAL_RCC_GPIOB_CLK_ENABLE(); - 8001a0c: 4b15 ldr r3, [pc, #84] @ (8001a64 ) - 8001a0e: 699b ldr r3, [r3, #24] - 8001a10: 4a14 ldr r2, [pc, #80] @ (8001a64 ) - 8001a12: f043 0308 orr.w r3, r3, #8 - 8001a16: 6193 str r3, [r2, #24] - 8001a18: 4b12 ldr r3, [pc, #72] @ (8001a64 ) - 8001a1a: 699b ldr r3, [r3, #24] - 8001a1c: f003 0308 and.w r3, r3, #8 - 8001a20: 60fb str r3, [r7, #12] - 8001a22: 68fb ldr r3, [r7, #12] + 8001b54: 4b15 ldr r3, [pc, #84] @ (8001bac ) + 8001b56: 699b ldr r3, [r3, #24] + 8001b58: 4a14 ldr r2, [pc, #80] @ (8001bac ) + 8001b5a: f043 0308 orr.w r3, r3, #8 + 8001b5e: 6193 str r3, [r2, #24] + 8001b60: 4b12 ldr r3, [pc, #72] @ (8001bac ) + 8001b62: 699b ldr r3, [r3, #24] + 8001b64: f003 0308 and.w r3, r3, #8 + 8001b68: 60fb str r3, [r7, #12] + 8001b6a: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = I2C2_SCL_CE_Pin|I2C2_SDA_CE_Pin; - 8001a24: f44f 6340 mov.w r3, #3072 @ 0xc00 - 8001a28: 61bb str r3, [r7, #24] + 8001b6c: f44f 6340 mov.w r3, #3072 @ 0xc00 + 8001b70: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 8001a2a: 2312 movs r3, #18 - 8001a2c: 61fb str r3, [r7, #28] + 8001b72: 2312 movs r3, #18 + 8001b74: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001a2e: 2302 movs r3, #2 - 8001a30: 627b str r3, [r7, #36] @ 0x24 + 8001b76: 2302 movs r3, #2 + 8001b78: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001a32: f107 0318 add.w r3, r7, #24 - 8001a36: 4619 mov r1, r3 - 8001a38: 480b ldr r0, [pc, #44] @ (8001a68 ) - 8001a3a: f001 f955 bl 8002ce8 + 8001b7a: f107 0318 add.w r3, r7, #24 + 8001b7e: 4619 mov r1, r3 + 8001b80: 480b ldr r0, [pc, #44] @ (8001bb0 ) + 8001b82: f001 f96b bl 8002e5c __HAL_RCC_I2C2_CLK_ENABLE(); - 8001a3e: 4b09 ldr r3, [pc, #36] @ (8001a64 ) - 8001a40: 69db ldr r3, [r3, #28] - 8001a42: 4a08 ldr r2, [pc, #32] @ (8001a64 ) - 8001a44: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 - 8001a48: 61d3 str r3, [r2, #28] - 8001a4a: 4b06 ldr r3, [pc, #24] @ (8001a64 ) - 8001a4c: 69db ldr r3, [r3, #28] - 8001a4e: f403 0380 and.w r3, r3, #4194304 @ 0x400000 - 8001a52: 60bb str r3, [r7, #8] - 8001a54: 68bb ldr r3, [r7, #8] + 8001b86: 4b09 ldr r3, [pc, #36] @ (8001bac ) + 8001b88: 69db ldr r3, [r3, #28] + 8001b8a: 4a08 ldr r2, [pc, #32] @ (8001bac ) + 8001b8c: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 + 8001b90: 61d3 str r3, [r2, #28] + 8001b92: 4b06 ldr r3, [pc, #24] @ (8001bac ) + 8001b94: 69db ldr r3, [r3, #28] + 8001b96: f403 0380 and.w r3, r3, #4194304 @ 0x400000 + 8001b9a: 60bb str r3, [r7, #8] + 8001b9c: 68bb ldr r3, [r7, #8] } - 8001a56: bf00 nop - 8001a58: 3728 adds r7, #40 @ 0x28 - 8001a5a: 46bd mov sp, r7 - 8001a5c: bd80 pop {r7, pc} - 8001a5e: bf00 nop - 8001a60: 40005400 .word 0x40005400 - 8001a64: 40021000 .word 0x40021000 - 8001a68: 40010c00 .word 0x40010c00 - 8001a6c: 40005800 .word 0x40005800 + 8001b9e: bf00 nop + 8001ba0: 3728 adds r7, #40 @ 0x28 + 8001ba2: 46bd mov sp, r7 + 8001ba4: bd80 pop {r7, pc} + 8001ba6: bf00 nop + 8001ba8: 40005400 .word 0x40005400 + 8001bac: 40021000 .word 0x40021000 + 8001bb0: 40010c00 .word 0x40010c00 + 8001bb4: 40005800 .word 0x40005800 -08001a70
: +08001bb8
: /** * @brief The application entry point. * @retval int */ int main(void) { - 8001a70: b580 push {r7, lr} - 8001a72: b08a sub sp, #40 @ 0x28 - 8001a74: af00 add r7, sp, #0 + 8001bb8: b580 push {r7, lr} + 8001bba: b08c sub sp, #48 @ 0x30 + 8001bbc: af00 add r7, sp, #0 /* USER CODE BEGIN 1 */ - uint8_t tempString[15] = {0}; - 8001a76: 463b mov r3, r7 - 8001a78: 2200 movs r2, #0 - 8001a7a: 601a str r2, [r3, #0] - 8001a7c: 605a str r2, [r3, #4] - 8001a7e: 609a str r2, [r3, #8] - 8001a80: f8c3 200b str.w r2, [r3, #11] - uint8_t i; - uint8_t mux_connection = 0; - 8001a84: 2300 movs r3, #0 - 8001a86: f887 3027 strb.w r3, [r7, #39] @ 0x27 + uint8_t tempString[15] = {0}; + 8001bbe: 1d3b adds r3, r7, #4 + 8001bc0: 2200 movs r2, #0 + 8001bc2: 601a str r2, [r3, #0] + 8001bc4: 605a str r2, [r3, #4] + 8001bc6: 609a str r2, [r3, #8] + 8001bc8: f8c3 200b str.w r2, [r3, #11] + + uint8_t averages = 0; + 8001bcc: 2300 movs r3, #0 + 8001bce: f887 302f strb.w r3, [r7, #47] @ 0x2f + uint8_t newline = '\n'; + 8001bd2: 230a movs r3, #10 + 8001bd4: 70fb strb r3, [r7, #3] // Variables for timing uint32_t previous_millis_green = 0; - 8001a8a: 2300 movs r3, #0 - 8001a8c: 623b str r3, [r7, #32] + 8001bd6: 2300 movs r3, #0 + 8001bd8: 62bb str r3, [r7, #40] @ 0x28 uint32_t previous_millis_red = 0; - 8001a8e: 2300 movs r3, #0 - 8001a90: 61fb str r3, [r7, #28] + 8001bda: 2300 movs r3, #0 + 8001bdc: 627b str r3, [r7, #36] @ 0x24 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 8001a92: f000 fcf5 bl 8002480 + 8001bde: f000 fd09 bl 80025f4 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 8001a96: f000 f935 bl 8001d04 + 8001be2: f000 f949 bl 8001e78 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 8001a9a: f7ff fe81 bl 80017a0 + 8001be6: f7ff fe7f bl 80018e8 MX_ADC1_Init(); - 8001a9e: f7ff fabf bl 8001020 + 8001bea: f7ff fabd bl 8001168 MX_ADC2_Init(); - 8001aa2: f7ff fafb bl 800109c + 8001bee: f7ff faf9 bl 80011e4 MX_I2C1_Init(); - 8001aa6: f7ff ff1b bl 80018e0 + 8001bf2: f7ff ff19 bl 8001a28 MX_I2C2_Init(); - 8001aaa: f7ff ff47 bl 800193c + 8001bf6: f7ff ff45 bl 8001a84 MX_USART1_UART_Init(); - 8001aae: f000 fc43 bl 8002338 + 8001bfa: f000 fc57 bl 80024ac MX_TIM3_Init(); - 8001ab2: f000 fbcd bl 8002250 + 8001bfe: f000 fbe1 bl 80023c4 /* USER CODE BEGIN 2 */ HAL_TIM_Base_Start_IT(&htim3); - 8001ab6: 4889 ldr r0, [pc, #548] @ (8001cdc ) - 8001ab8: f003 f82e bl 8004b18 - TempSensor_Init(&hadc1); - HAL_ADCEx_Calibration_Start(&hadc1); - HAL_ADC_Start_DMA(&hadc1, (uint32_t*)AD_RES, 2); // Internal Temperature conversion - */ + 8001c02: 488e ldr r0, [pc, #568] @ (8001e3c ) + 8001c04: f003 f842 bl 8004c8c + HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); // LED Green Off - 8001abc: 2201 movs r2, #1 - 8001abe: 2110 movs r1, #16 - 8001ac0: 4887 ldr r0, [pc, #540] @ (8001ce0 ) - 8001ac2: f001 faac bl 800301e + 8001c08: 2201 movs r2, #1 + 8001c0a: 2110 movs r1, #16 + 8001c0c: 488c ldr r0, [pc, #560] @ (8001e40 ) + 8001c0e: f001 fac0 bl 8003192 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); // LED Red Off - 8001ac6: 2201 movs r2, #1 - 8001ac8: 2120 movs r1, #32 - 8001aca: 4885 ldr r0, [pc, #532] @ (8001ce0 ) - 8001acc: f001 faa7 bl 800301e + 8001c12: 2201 movs r2, #1 + 8001c14: 2120 movs r1, #32 + 8001c16: 488a ldr r0, [pc, #552] @ (8001e40 ) + 8001c18: f001 fabb bl 8003192 digital_outputs_init(); - 8001ad0: f7ff fe24 bl 800171c + 8001c1c: f7ff fe22 bl 8001864 rs485_init(); - 8001ad4: f000 fa5c bl 8001f90 + 8001c20: f000 fa70 bl 8002104 ADS1015_Init(); // Initializes pH Measurement - 8001ad8: f7ff fbd0 bl 800127c + 8001c24: f7ff fbce bl 80013c4 AD5934_Init(); // Initializes CE and RTD Measurement - 8001adc: f7fe fec2 bl 8000864 -*/ + 8001c28: f7fe fe1c bl 8000864 + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + + while(averages<15) + 8001c2c: e02c b.n 8001c88 + { + AD5934_Process_System(); + 8001c2e: f7fe ffb9 bl 8000ba4 + ADS1015_Process_System(); + 8001c32: f7ff fc25 bl 8001480 + + current_millis = g_ms_counter; + 8001c36: 4b83 ldr r3, [pc, #524] @ (8001e44 ) + 8001c38: 681b ldr r3, [r3, #0] + 8001c3a: 623b str r3, [r7, #32] + + if((current_millis % 20) == 0) // Send data each 20ms + 8001c3c: 6a39 ldr r1, [r7, #32] + 8001c3e: 4b82 ldr r3, [pc, #520] @ (8001e48 ) + 8001c40: fba3 2301 umull r2, r3, r3, r1 + 8001c44: 091a lsrs r2, r3, #4 + 8001c46: 4613 mov r3, r2 + 8001c48: 009b lsls r3, r3, #2 + 8001c4a: 4413 add r3, r2 + 8001c4c: 009b lsls r3, r3, #2 + 8001c4e: 1aca subs r2, r1, r3 + 8001c50: 2a00 cmp r2, #0 + 8001c52: d119 bne.n 8001c88 + { + if (g_ref_filter.value_valid) // Reference Resistor on Board: 100 Ohms or 1000 Ohms + 8001c54: 4b7d ldr r3, [pc, #500] @ (8001e4c ) + 8001c56: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8001c5a: 2b00 cmp r3, #0 + 8001c5c: d014 beq.n 8001c88 + { + reference_resistor = g_ref_filter.filtered_value; + 8001c5e: 4b7b ldr r3, [pc, #492] @ (8001e4c ) + 8001c60: 6b9b ldr r3, [r3, #56] @ 0x38 + 8001c62: 4a7b ldr r2, [pc, #492] @ (8001e50 ) + 8001c64: 6013 str r3, [r2, #0] + uint16_t reference_final = AD5934_REF_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_ref_filter.filtered_value, current_ref_mux); + 8001c66: 4b79 ldr r3, [pc, #484] @ (8001e4c ) + 8001c68: 6b9b ldr r3, [r3, #56] @ 0x38 + 8001c6a: 4a7a ldr r2, [pc, #488] @ (8001e54 ) + 8001c6c: 7812 ldrb r2, [r2, #0] + 8001c6e: 4611 mov r1, r2 + 8001c70: 4618 mov r0, r3 + 8001c72: f7fe ff09 bl 8000a88 + 8001c76: 4603 mov r3, r0 + 8001c78: f5c3 5380 rsb r3, r3, #4096 @ 0x1000 + 8001c7c: 82fb strh r3, [r7, #22] + + averages++; + 8001c7e: f897 302f ldrb.w r3, [r7, #47] @ 0x2f + 8001c82: 3301 adds r3, #1 + 8001c84: f887 302f strb.w r3, [r7, #47] @ 0x2f + while(averages<15) + 8001c88: f897 302f ldrb.w r3, [r7, #47] @ 0x2f + 8001c8c: 2b0e cmp r3, #14 + 8001c8e: d9ce bls.n 8001c2e + while (1) { AD5934_Process_System(); - 8001ae0: f7fe ffda bl 8000a98 + 8001c90: f7fe ff88 bl 8000ba4 ADS1015_Process_System(); - 8001ae4: f7ff fc28 bl 8001338 + 8001c94: f7ff fbf4 bl 8001480 current_millis = g_ms_counter; - 8001ae8: 4b7e ldr r3, [pc, #504] @ (8001ce4 ) - 8001aea: 681b ldr r3, [r3, #0] - 8001aec: 61bb str r3, [r7, #24] + 8001c98: 4b6a ldr r3, [pc, #424] @ (8001e44 ) + 8001c9a: 681b ldr r3, [r3, #0] + 8001c9c: 623b str r3, [r7, #32] - if((current_millis % 100) == 0) // Send data each 50ms - 8001aee: 69ba ldr r2, [r7, #24] - 8001af0: 4b7d ldr r3, [pc, #500] @ (8001ce8 ) - 8001af2: fba3 1302 umull r1, r3, r3, r2 - 8001af6: 095b lsrs r3, r3, #5 - 8001af8: 2164 movs r1, #100 @ 0x64 - 8001afa: fb01 f303 mul.w r3, r1, r3 - 8001afe: 1ad3 subs r3, r2, r3 - 8001b00: 2b00 cmp r3, #0 - 8001b02: f040 80dc bne.w 8001cbe + if((current_millis % 100) == 0) // Send data each 100ms + 8001c9e: 6a3a ldr r2, [r7, #32] + 8001ca0: 4b6d ldr r3, [pc, #436] @ (8001e58 ) + 8001ca2: fba3 1302 umull r1, r3, r3, r2 + 8001ca6: 095b lsrs r3, r3, #5 + 8001ca8: 2164 movs r1, #100 @ 0x64 + 8001caa: fb01 f303 mul.w r3, r1, r3 + 8001cae: 1ad3 subs r3, r2, r3 + 8001cb0: 2b00 cmp r3, #0 + 8001cb2: f040 80b4 bne.w 8001e1e { if (g_ref_filter.value_valid) // Reference Resistor on Board: 100 Ohms or 1000 Ohms - 8001b06: 4b79 ldr r3, [pc, #484] @ (8001cec ) - 8001b08: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8001b0c: 2b00 cmp r3, #0 - 8001b0e: d034 beq.n 8001b7a + 8001cb6: 4b65 ldr r3, [pc, #404] @ (8001e4c ) + 8001cb8: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8001cbc: 2b00 cmp r3, #0 + 8001cbe: d022 beq.n 8001d06 { - if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 8001b10: 2180 movs r1, #128 @ 0x80 - 8001b12: 4877 ldr r0, [pc, #476] @ (8001cf0 ) - 8001b14: f001 fa6c bl 8002ff0 - 8001b18: 4603 mov r3, r0 - 8001b1a: 2b01 cmp r3, #1 - 8001b1c: d103 bne.n 8001b26 - mux_connection = AD5934_CH_REF100R_LOW_GAIN; // 100 Ohms Reference Resistor - 8001b1e: 2300 movs r3, #0 - 8001b20: f887 3027 strb.w r3, [r7, #39] @ 0x27 - 8001b24: e002 b.n 8001b2c - else - mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor - 8001b26: 2304 movs r3, #4 - 8001b28: f887 3027 strb.w r3, [r7, #39] @ 0x27 - - uint16_t reference_final = AD5934_REF_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_ref_filter.filtered_value, mux_connection); - 8001b2c: 4b6f ldr r3, [pc, #444] @ (8001cec ) - 8001b2e: 6b9b ldr r3, [r3, #56] @ 0x38 - 8001b30: f897 2027 ldrb.w r2, [r7, #39] @ 0x27 - 8001b34: 4611 mov r1, r2 - 8001b36: 4618 mov r0, r3 - 8001b38: f7fe ff20 bl 800097c - 8001b3c: 4603 mov r3, r0 - 8001b3e: f5c3 5380 rsb r3, r3, #4096 @ 0x1000 - 8001b42: 82fb strh r3, [r7, #22] + //reference_resistor = g_ref_filter.filtered_value; + uint16_t reference_final = AD5934_REF_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_ref_filter.filtered_value, current_ref_mux); + 8001cc0: 4b62 ldr r3, [pc, #392] @ (8001e4c ) + 8001cc2: 6b9b ldr r3, [r3, #56] @ 0x38 + 8001cc4: 4a63 ldr r2, [pc, #396] @ (8001e54 ) + 8001cc6: 7812 ldrb r2, [r2, #0] + 8001cc8: 4611 mov r1, r2 + 8001cca: 4618 mov r0, r3 + 8001ccc: f7fe fedc bl 8000a88 + 8001cd0: 4603 mov r3, r0 + 8001cd2: f5c3 5380 rsb r3, r3, #4096 @ 0x1000 + 8001cd6: 83fb strh r3, [r7, #30] intToStr(reference_final, tempString); - 8001b44: f9b7 3016 ldrsh.w r3, [r7, #22] - 8001b48: 463a mov r2, r7 - 8001b4a: 4611 mov r1, r2 - 8001b4c: 4618 mov r0, r3 - 8001b4e: f000 f929 bl 8001da4 + 8001cd8: f9b7 301e ldrsh.w r3, [r7, #30] + 8001cdc: 1d3a adds r2, r7, #4 + 8001cde: 4611 mov r1, r2 + 8001ce0: 4618 mov r0, r3 + 8001ce2: f000 f919 bl 8001f18 // float ref_final = g_ref_filter.filtered_value; //FloatToString(tempString, ref_final); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); - 8001b52: 463b mov r3, r7 - 8001b54: 4618 mov r0, r3 - 8001b56: f7fe faf9 bl 800014c - 8001b5a: 4603 mov r3, r0 - 8001b5c: b29a uxth r2, r3 - 8001b5e: 463b mov r3, r7 - 8001b60: 4611 mov r1, r2 - 8001b62: 4618 mov r0, r3 - 8001b64: f000 fa40 bl 8001fe8 - rs485_send_broadcast(newline, (strlen((uint8_t*)newline))); - 8001b68: 4862 ldr r0, [pc, #392] @ (8001cf4 ) - 8001b6a: f7fe faef bl 800014c - 8001b6e: 4603 mov r3, r0 - 8001b70: b29b uxth r3, r3 - 8001b72: 4619 mov r1, r3 - 8001b74: 485f ldr r0, [pc, #380] @ (8001cf4 ) - 8001b76: f000 fa37 bl 8001fe8 - } - - if (g_ec_filter.value_valid) // EC - 8001b7a: 4b5f ldr r3, [pc, #380] @ (8001cf8 ) - 8001b7c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8001b80: 2b00 cmp r3, #0 - 8001b82: d032 beq.n 8001bea - { - if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) // Hardware Setup: Gain Selection (PA6) - 8001b84: 2140 movs r1, #64 @ 0x40 - 8001b86: 485a ldr r0, [pc, #360] @ (8001cf0 ) - 8001b88: f001 fa32 bl 8002ff0 - 8001b8c: 4603 mov r3, r0 - 8001b8e: 2b01 cmp r3, #1 - 8001b90: d103 bne.n 8001b9a - mux_connection = AD5934_CH_EC_HIGH_GAIN; // 5mS - 8001b92: 230e movs r3, #14 - 8001b94: f887 3027 strb.w r3, [r7, #39] @ 0x27 - 8001b98: e002 b.n 8001ba0 - else - mux_connection = AD5934_CH_EC_MID_GAIN; // 10mS - 8001b9a: 230d movs r3, #13 - 8001b9c: f887 3027 strb.w r3, [r7, #39] @ 0x27 - - uint16_t ec_final = AD5934_Compress_To_IntScale(g_ec_filter.filtered_value, mux_connection); - 8001ba0: 4b55 ldr r3, [pc, #340] @ (8001cf8 ) - 8001ba2: 6b9b ldr r3, [r3, #56] @ 0x38 - 8001ba4: f897 2027 ldrb.w r2, [r7, #39] @ 0x27 - 8001ba8: 4611 mov r1, r2 - 8001baa: 4618 mov r0, r3 - 8001bac: f7fe fee6 bl 800097c - 8001bb0: 4603 mov r3, r0 - 8001bb2: 82bb strh r3, [r7, #20] - intToStr(ec_final, tempString); - 8001bb4: f9b7 3014 ldrsh.w r3, [r7, #20] - 8001bb8: 463a mov r2, r7 - 8001bba: 4611 mov r1, r2 - 8001bbc: 4618 mov r0, r3 - 8001bbe: f000 f8f1 bl 8001da4 - // float ec_final = g_ec_filter.filtered_value; - // FloatToString(tempString, ec_final); - rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); - 8001bc2: 463b mov r3, r7 - 8001bc4: 4618 mov r0, r3 - 8001bc6: f7fe fac1 bl 800014c - 8001bca: 4603 mov r3, r0 - 8001bcc: b29a uxth r2, r3 - 8001bce: 463b mov r3, r7 - 8001bd0: 4611 mov r1, r2 - 8001bd2: 4618 mov r0, r3 - 8001bd4: f000 fa08 bl 8001fe8 - rs485_send_broadcast(newline, (strlen((uint8_t*)newline))); - 8001bd8: 4846 ldr r0, [pc, #280] @ (8001cf4 ) - 8001bda: f7fe fab7 bl 800014c - 8001bde: 4603 mov r3, r0 - 8001be0: b29b uxth r3, r3 - 8001be2: 4619 mov r1, r3 - 8001be4: 4843 ldr r0, [pc, #268] @ (8001cf4 ) - 8001be6: f000 f9ff bl 8001fe8 + 8001ce6: 1d3b adds r3, r7, #4 + 8001ce8: 4618 mov r0, r3 + 8001cea: f7fe fa2f bl 800014c + 8001cee: 4603 mov r3, r0 + 8001cf0: b29a uxth r2, r3 + 8001cf2: 1d3b adds r3, r7, #4 + 8001cf4: 4611 mov r1, r2 + 8001cf6: 4618 mov r0, r3 + 8001cf8: f000 fa30 bl 800215c + rs485_send_broadcast(&newline, 1); + 8001cfc: 1cfb adds r3, r7, #3 + 8001cfe: 2101 movs r1, #1 + 8001d00: 4618 mov r0, r3 + 8001d02: f000 fa2b bl 800215c } if (g_rtd_filter.value_valid) // PT100 or PT1000 in °C - 8001bea: 4b44 ldr r3, [pc, #272] @ (8001cfc ) - 8001bec: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8001bf0: 2b00 cmp r3, #0 - 8001bf2: d034 beq.n 8001c5e + 8001d06: 4b55 ldr r3, [pc, #340] @ (8001e5c ) + 8001d08: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8001d0c: 2b00 cmp r3, #0 + 8001d0e: d02d beq.n 8001d6c { - if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 8001bf4: 2180 movs r1, #128 @ 0x80 - 8001bf6: 483e ldr r0, [pc, #248] @ (8001cf0 ) - 8001bf8: f001 f9fa bl 8002ff0 - 8001bfc: 4603 mov r3, r0 - 8001bfe: 2b01 cmp r3, #1 - 8001c00: d103 bne.n 8001c0a - mux_connection = AD5934_CH_RTD_LOW_GAIN; //PT100 - 8001c02: 2309 movs r3, #9 - 8001c04: f887 3027 strb.w r3, [r7, #39] @ 0x27 - 8001c08: e002 b.n 8001c10 - else - mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 - 8001c0a: 230a movs r3, #10 - 8001c0c: f887 3027 strb.w r3, [r7, #39] @ 0x27 - - uint16_t rtd_final = AD5934_RTD_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_rtd_filter.filtered_value, mux_connection); - 8001c10: 4b3a ldr r3, [pc, #232] @ (8001cfc ) - 8001c12: 6b9b ldr r3, [r3, #56] @ 0x38 - 8001c14: f897 2027 ldrb.w r2, [r7, #39] @ 0x27 - 8001c18: 4611 mov r1, r2 - 8001c1a: 4618 mov r0, r3 - 8001c1c: f7fe feae bl 800097c - 8001c20: 4603 mov r3, r0 - 8001c22: f5c3 5380 rsb r3, r3, #4096 @ 0x1000 - 8001c26: 827b strh r3, [r7, #18] + temperature_RTD = AD5934_Calculate_Temperature(reference_resistor, g_rtd_filter.filtered_value); + 8001d10: 4b4f ldr r3, [pc, #316] @ (8001e50 ) + 8001d12: 681b ldr r3, [r3, #0] + 8001d14: 4a51 ldr r2, [pc, #324] @ (8001e5c ) + 8001d16: 6b92 ldr r2, [r2, #56] @ 0x38 + 8001d18: 4611 mov r1, r2 + 8001d1a: 4618 mov r0, r3 + 8001d1c: f7fe fdee bl 80008fc + 8001d20: 4603 mov r3, r0 + 8001d22: 4a4f ldr r2, [pc, #316] @ (8001e60 ) + 8001d24: 6013 str r3, [r2, #0] + uint16_t rtd_final = AD5934_RTD_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_rtd_filter.filtered_value, current_rtd_mux); + 8001d26: 4b4d ldr r3, [pc, #308] @ (8001e5c ) + 8001d28: 6b9b ldr r3, [r3, #56] @ 0x38 + 8001d2a: 4a4e ldr r2, [pc, #312] @ (8001e64 ) + 8001d2c: 7812 ldrb r2, [r2, #0] + 8001d2e: 4611 mov r1, r2 + 8001d30: 4618 mov r0, r3 + 8001d32: f7fe fea9 bl 8000a88 + 8001d36: 4603 mov r3, r0 + 8001d38: f5c3 5380 rsb r3, r3, #4096 @ 0x1000 + 8001d3c: 83bb strh r3, [r7, #28] intToStr(rtd_final, tempString); - 8001c28: f9b7 3012 ldrsh.w r3, [r7, #18] - 8001c2c: 463a mov r2, r7 - 8001c2e: 4611 mov r1, r2 - 8001c30: 4618 mov r0, r3 - 8001c32: f000 f8b7 bl 8001da4 + 8001d3e: f9b7 301c ldrsh.w r3, [r7, #28] + 8001d42: 1d3a adds r2, r7, #4 + 8001d44: 4611 mov r1, r2 + 8001d46: 4618 mov r0, r3 + 8001d48: f000 f8e6 bl 8001f18 //float rtd_final = g_rtd_filter.filtered_value; //FloatToString(tempString, rtd_final); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); - 8001c36: 463b mov r3, r7 - 8001c38: 4618 mov r0, r3 - 8001c3a: f7fe fa87 bl 800014c - 8001c3e: 4603 mov r3, r0 - 8001c40: b29a uxth r2, r3 - 8001c42: 463b mov r3, r7 - 8001c44: 4611 mov r1, r2 - 8001c46: 4618 mov r0, r3 - 8001c48: f000 f9ce bl 8001fe8 - rs485_send_broadcast(newline, (strlen((uint8_t*)newline))); - 8001c4c: 4829 ldr r0, [pc, #164] @ (8001cf4 ) - 8001c4e: f7fe fa7d bl 800014c - 8001c52: 4603 mov r3, r0 - 8001c54: b29b uxth r3, r3 - 8001c56: 4619 mov r1, r3 - 8001c58: 4826 ldr r0, [pc, #152] @ (8001cf4 ) - 8001c5a: f000 f9c5 bl 8001fe8 + 8001d4c: 1d3b adds r3, r7, #4 + 8001d4e: 4618 mov r0, r3 + 8001d50: f7fe f9fc bl 800014c + 8001d54: 4603 mov r3, r0 + 8001d56: b29a uxth r2, r3 + 8001d58: 1d3b adds r3, r7, #4 + 8001d5a: 4611 mov r1, r2 + 8001d5c: 4618 mov r0, r3 + 8001d5e: f000 f9fd bl 800215c + rs485_send_broadcast(&newline, 1); + 8001d62: 1cfb adds r3, r7, #3 + 8001d64: 2101 movs r1, #1 + 8001d66: 4618 mov r0, r3 + 8001d68: f000 f9f8 bl 800215c + } + + if (g_ec_filter.value_valid) // EC + 8001d6c: 4b3e ldr r3, [pc, #248] @ (8001e68 ) + 8001d6e: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8001d72: 2b00 cmp r3, #0 + 8001d74: d02b beq.n 8001dce + { + thermal_compensaded_EC = AD5934_EC_Compensate_Magnitude_To_25C(g_ec_filter.filtered_value, temperature_RTD); + 8001d76: 4b3c ldr r3, [pc, #240] @ (8001e68 ) + 8001d78: 6b9b ldr r3, [r3, #56] @ 0x38 + 8001d7a: 4a39 ldr r2, [pc, #228] @ (8001e60 ) + 8001d7c: 6812 ldr r2, [r2, #0] + 8001d7e: 4611 mov r1, r2 + 8001d80: 4618 mov r0, r3 + 8001d82: f7fe fe13 bl 80009ac + 8001d86: 4603 mov r3, r0 + 8001d88: 4a38 ldr r2, [pc, #224] @ (8001e6c ) + 8001d8a: 6013 str r3, [r2, #0] + uint16_t ec_final = AD5934_Compress_To_IntScale(thermal_compensaded_EC, current_ec_mux); + 8001d8c: 4b37 ldr r3, [pc, #220] @ (8001e6c ) + 8001d8e: 681b ldr r3, [r3, #0] + 8001d90: 4a37 ldr r2, [pc, #220] @ (8001e70 ) + 8001d92: 7812 ldrb r2, [r2, #0] + 8001d94: 4611 mov r1, r2 + 8001d96: 4618 mov r0, r3 + 8001d98: f7fe fe76 bl 8000a88 + 8001d9c: 4603 mov r3, r0 + 8001d9e: 837b strh r3, [r7, #26] + intToStr(ec_final, tempString); + 8001da0: f9b7 301a ldrsh.w r3, [r7, #26] + 8001da4: 1d3a adds r2, r7, #4 + 8001da6: 4611 mov r1, r2 + 8001da8: 4618 mov r0, r3 + 8001daa: f000 f8b5 bl 8001f18 + // float ec_final = g_ec_filter.filtered_value; + // FloatToString(tempString, ec_final); + rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); + 8001dae: 1d3b adds r3, r7, #4 + 8001db0: 4618 mov r0, r3 + 8001db2: f7fe f9cb bl 800014c + 8001db6: 4603 mov r3, r0 + 8001db8: b29a uxth r2, r3 + 8001dba: 1d3b adds r3, r7, #4 + 8001dbc: 4611 mov r1, r2 + 8001dbe: 4618 mov r0, r3 + 8001dc0: f000 f9cc bl 800215c + rs485_send_broadcast(&newline, 1); + 8001dc4: 1cfb adds r3, r7, #3 + 8001dc6: 2101 movs r1, #1 + 8001dc8: 4618 mov r0, r3 + 8001dca: f000 f9c7 bl 800215c } if (g_ph_filter.value_valid) // pH - 8001c5e: 4b28 ldr r3, [pc, #160] @ (8001d00 ) - 8001c60: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8001c64: 2b00 cmp r3, #0 - 8001c66: d021 beq.n 8001cac + 8001dce: 4b29 ldr r3, [pc, #164] @ (8001e74 ) + 8001dd0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8001dd4: 2b00 cmp r3, #0 + 8001dd6: d01d beq.n 8001e14 { uint16_t ph_final = ADS1015_Compress_To_IntScale(g_ph_filter.filtered_value); - 8001c68: 4b25 ldr r3, [pc, #148] @ (8001d00 ) - 8001c6a: 6b9b ldr r3, [r3, #56] @ 0x38 - 8001c6c: 4618 mov r0, r3 - 8001c6e: f7ff fb1f bl 80012b0 - 8001c72: 4603 mov r3, r0 - 8001c74: 823b strh r3, [r7, #16] + 8001dd8: 4b26 ldr r3, [pc, #152] @ (8001e74 ) + 8001dda: 6b9b ldr r3, [r3, #56] @ 0x38 + 8001ddc: 4618 mov r0, r3 + 8001dde: f7ff fb0b bl 80013f8 + 8001de2: 4603 mov r3, r0 + 8001de4: 833b strh r3, [r7, #24] intToStr(ph_final, tempString); - 8001c76: f9b7 3010 ldrsh.w r3, [r7, #16] - 8001c7a: 463a mov r2, r7 - 8001c7c: 4611 mov r1, r2 - 8001c7e: 4618 mov r0, r3 - 8001c80: f000 f890 bl 8001da4 + 8001de6: f9b7 3018 ldrsh.w r3, [r7, #24] + 8001dea: 1d3a adds r2, r7, #4 + 8001dec: 4611 mov r1, r2 + 8001dee: 4618 mov r0, r3 + 8001df0: f000 f892 bl 8001f18 //float ph_final = g_ph_filter.filtered_value; //FloatToString(tempString, ph_final); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); - 8001c84: 463b mov r3, r7 - 8001c86: 4618 mov r0, r3 - 8001c88: f7fe fa60 bl 800014c - 8001c8c: 4603 mov r3, r0 - 8001c8e: b29a uxth r2, r3 - 8001c90: 463b mov r3, r7 - 8001c92: 4611 mov r1, r2 - 8001c94: 4618 mov r0, r3 - 8001c96: f000 f9a7 bl 8001fe8 - rs485_send_broadcast(newline, (strlen((uint8_t*)newline))); - 8001c9a: 4816 ldr r0, [pc, #88] @ (8001cf4 ) - 8001c9c: f7fe fa56 bl 800014c - 8001ca0: 4603 mov r3, r0 - 8001ca2: b29b uxth r3, r3 - 8001ca4: 4619 mov r1, r3 - 8001ca6: 4813 ldr r0, [pc, #76] @ (8001cf4 ) - 8001ca8: f000 f99e bl 8001fe8 + 8001df4: 1d3b adds r3, r7, #4 + 8001df6: 4618 mov r0, r3 + 8001df8: f7fe f9a8 bl 800014c + 8001dfc: 4603 mov r3, r0 + 8001dfe: b29a uxth r2, r3 + 8001e00: 1d3b adds r3, r7, #4 + 8001e02: 4611 mov r1, r2 + 8001e04: 4618 mov r0, r3 + 8001e06: f000 f9a9 bl 800215c + rs485_send_broadcast(&newline, 1); + 8001e0a: 1cfb adds r3, r7, #3 + 8001e0c: 2101 movs r1, #1 + 8001e0e: 4618 mov r0, r3 + 8001e10: f000 f9a4 bl 800215c } - rs485_send_broadcast(newline, (strlen((uint8_t*)newline))); - 8001cac: 4811 ldr r0, [pc, #68] @ (8001cf4 ) - 8001cae: f7fe fa4d bl 800014c - 8001cb2: 4603 mov r3, r0 - 8001cb4: b29b uxth r3, r3 - 8001cb6: 4619 mov r1, r3 - 8001cb8: 480e ldr r0, [pc, #56] @ (8001cf4 ) - 8001cba: f000 f995 bl 8001fe8 + rs485_send_broadcast(&newline, 1); + 8001e14: 1cfb adds r3, r7, #3 + 8001e16: 2101 movs r1, #1 + 8001e18: 4618 mov r0, r3 + 8001e1a: f000 f99f bl 800215c } // Piscar LED verde em PB4 a cada 1 segundo if ((current_millis - previous_millis_green) >= 1000) - 8001cbe: 69ba ldr r2, [r7, #24] - 8001cc0: 6a3b ldr r3, [r7, #32] - 8001cc2: 1ad3 subs r3, r2, r3 - 8001cc4: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 - 8001cc8: f4ff af0a bcc.w 8001ae0 + 8001e1e: 6a3a ldr r2, [r7, #32] + 8001e20: 6abb ldr r3, [r7, #40] @ 0x28 + 8001e22: 1ad3 subs r3, r2, r3 + 8001e24: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 + 8001e28: f4ff af32 bcc.w 8001c90 { previous_millis_green = current_millis; - 8001ccc: 69bb ldr r3, [r7, #24] - 8001cce: 623b str r3, [r7, #32] + 8001e2c: 6a3b ldr r3, [r7, #32] + 8001e2e: 62bb str r3, [r7, #40] @ 0x28 HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_4); - 8001cd0: 2110 movs r1, #16 - 8001cd2: 4803 ldr r0, [pc, #12] @ (8001ce0 ) - 8001cd4: f001 f9bb bl 800304e + 8001e30: 2110 movs r1, #16 + 8001e32: 4803 ldr r0, [pc, #12] @ (8001e40 ) + 8001e34: f001 f9c5 bl 80031c2 AD5934_Process_System(); - 8001cd8: e702 b.n 8001ae0 - 8001cda: bf00 nop - 8001cdc: 20000308 .word 0x20000308 - 8001ce0: 40010c00 .word 0x40010c00 - 8001ce4: 20000084 .word 0x20000084 - 8001ce8: 51eb851f .word 0x51eb851f - 8001cec: 2000010c .word 0x2000010c - 8001cf0: 40010800 .word 0x40010800 - 8001cf4: 20000004 .word 0x20000004 - 8001cf8: 200000cc .word 0x200000cc - 8001cfc: 2000008c .word 0x2000008c - 8001d00: 200001c0 .word 0x200001c0 + 8001e38: e72a b.n 8001c90 + 8001e3a: bf00 nop + 8001e3c: 20000310 .word 0x20000310 + 8001e40: 40010c00 .word 0x40010c00 + 8001e44: 20000080 .word 0x20000080 + 8001e48: cccccccd .word 0xcccccccd + 8001e4c: 20000114 .word 0x20000114 + 8001e50: 20000084 .word 0x20000084 + 8001e54: 20000091 .word 0x20000091 + 8001e58: 51eb851f .word 0x51eb851f + 8001e5c: 20000094 .word 0x20000094 + 8001e60: 20000088 .word 0x20000088 + 8001e64: 20000002 .word 0x20000002 + 8001e68: 200000d4 .word 0x200000d4 + 8001e6c: 2000008c .word 0x2000008c + 8001e70: 20000001 .word 0x20000001 + 8001e74: 200001c8 .word 0x200001c8 -08001d04 : +08001e78 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8001d04: b580 push {r7, lr} - 8001d06: b094 sub sp, #80 @ 0x50 - 8001d08: af00 add r7, sp, #0 + 8001e78: b580 push {r7, lr} + 8001e7a: b094 sub sp, #80 @ 0x50 + 8001e7c: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 8001d0a: f107 0328 add.w r3, r7, #40 @ 0x28 - 8001d0e: 2228 movs r2, #40 @ 0x28 - 8001d10: 2100 movs r1, #0 - 8001d12: 4618 mov r0, r3 - 8001d14: f004 f8b8 bl 8005e88 + 8001e7e: f107 0328 add.w r3, r7, #40 @ 0x28 + 8001e82: 2228 movs r2, #40 @ 0x28 + 8001e84: 2100 movs r1, #0 + 8001e86: 4618 mov r0, r3 + 8001e88: f004 f8b8 bl 8005ffc RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8001d18: f107 0314 add.w r3, r7, #20 - 8001d1c: 2200 movs r2, #0 - 8001d1e: 601a str r2, [r3, #0] - 8001d20: 605a str r2, [r3, #4] - 8001d22: 609a str r2, [r3, #8] - 8001d24: 60da str r2, [r3, #12] - 8001d26: 611a str r2, [r3, #16] + 8001e8c: f107 0314 add.w r3, r7, #20 + 8001e90: 2200 movs r2, #0 + 8001e92: 601a str r2, [r3, #0] + 8001e94: 605a str r2, [r3, #4] + 8001e96: 609a str r2, [r3, #8] + 8001e98: 60da str r2, [r3, #12] + 8001e9a: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 8001d28: 1d3b adds r3, r7, #4 - 8001d2a: 2200 movs r2, #0 - 8001d2c: 601a str r2, [r3, #0] - 8001d2e: 605a str r2, [r3, #4] - 8001d30: 609a str r2, [r3, #8] - 8001d32: 60da str r2, [r3, #12] + 8001e9c: 1d3b adds r3, r7, #4 + 8001e9e: 2200 movs r2, #0 + 8001ea0: 601a str r2, [r3, #0] + 8001ea2: 605a str r2, [r3, #4] + 8001ea4: 609a str r2, [r3, #8] + 8001ea6: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 8001d34: 2301 movs r3, #1 - 8001d36: 62bb str r3, [r7, #40] @ 0x28 + 8001ea8: 2301 movs r3, #1 + 8001eaa: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 8001d38: f44f 3380 mov.w r3, #65536 @ 0x10000 - 8001d3c: 62fb str r3, [r7, #44] @ 0x2c + 8001eac: f44f 3380 mov.w r3, #65536 @ 0x10000 + 8001eb0: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - 8001d3e: 2300 movs r3, #0 - 8001d40: 647b str r3, [r7, #68] @ 0x44 + 8001eb2: 2300 movs r3, #0 + 8001eb4: 647b str r3, [r7, #68] @ 0x44 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8001d42: f107 0328 add.w r3, r7, #40 @ 0x28 - 8001d46: 4618 mov r0, r3 - 8001d48: f002 f9ce bl 80040e8 - 8001d4c: 4603 mov r3, r0 - 8001d4e: 2b00 cmp r3, #0 - 8001d50: d001 beq.n 8001d56 + 8001eb6: f107 0328 add.w r3, r7, #40 @ 0x28 + 8001eba: 4618 mov r0, r3 + 8001ebc: f002 f9ce bl 800425c + 8001ec0: 4603 mov r3, r0 + 8001ec2: 2b00 cmp r3, #0 + 8001ec4: d001 beq.n 8001eca { Error_Handler(); - 8001d52: f000 f90b bl 8001f6c + 8001ec6: f000 f90b bl 80020e0 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8001d56: 230f movs r3, #15 - 8001d58: 617b str r3, [r7, #20] + 8001eca: 230f movs r3, #15 + 8001ecc: 617b str r3, [r7, #20] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; - 8001d5a: 2301 movs r3, #1 - 8001d5c: 61bb str r3, [r7, #24] + 8001ece: 2301 movs r3, #1 + 8001ed0: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8001d5e: 2300 movs r3, #0 - 8001d60: 61fb str r3, [r7, #28] + 8001ed2: 2300 movs r3, #0 + 8001ed4: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 8001d62: 2300 movs r3, #0 - 8001d64: 623b str r3, [r7, #32] + 8001ed6: 2300 movs r3, #0 + 8001ed8: 623b str r3, [r7, #32] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 8001d66: 2300 movs r3, #0 - 8001d68: 627b str r3, [r7, #36] @ 0x24 + 8001eda: 2300 movs r3, #0 + 8001edc: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - 8001d6a: f107 0314 add.w r3, r7, #20 - 8001d6e: 2100 movs r1, #0 - 8001d70: 4618 mov r0, r3 - 8001d72: f002 fc3b bl 80045ec - 8001d76: 4603 mov r3, r0 - 8001d78: 2b00 cmp r3, #0 - 8001d7a: d001 beq.n 8001d80 + 8001ede: f107 0314 add.w r3, r7, #20 + 8001ee2: 2100 movs r1, #0 + 8001ee4: 4618 mov r0, r3 + 8001ee6: f002 fc3b bl 8004760 + 8001eea: 4603 mov r3, r0 + 8001eec: 2b00 cmp r3, #0 + 8001eee: d001 beq.n 8001ef4 { Error_Handler(); - 8001d7c: f000 f8f6 bl 8001f6c + 8001ef0: f000 f8f6 bl 80020e0 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; - 8001d80: 2302 movs r3, #2 - 8001d82: 607b str r3, [r7, #4] + 8001ef4: 2302 movs r3, #2 + 8001ef6: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV8; - 8001d84: f44f 4340 mov.w r3, #49152 @ 0xc000 - 8001d88: 60fb str r3, [r7, #12] + 8001ef8: f44f 4340 mov.w r3, #49152 @ 0xc000 + 8001efc: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 8001d8a: 1d3b adds r3, r7, #4 - 8001d8c: 4618 mov r0, r3 - 8001d8e: f002 fdbd bl 800490c - 8001d92: 4603 mov r3, r0 - 8001d94: 2b00 cmp r3, #0 - 8001d96: d001 beq.n 8001d9c + 8001efe: 1d3b adds r3, r7, #4 + 8001f00: 4618 mov r0, r3 + 8001f02: f002 fdbd bl 8004a80 + 8001f06: 4603 mov r3, r0 + 8001f08: 2b00 cmp r3, #0 + 8001f0a: d001 beq.n 8001f10 { Error_Handler(); - 8001d98: f000 f8e8 bl 8001f6c + 8001f0c: f000 f8e8 bl 80020e0 } } - 8001d9c: bf00 nop - 8001d9e: 3750 adds r7, #80 @ 0x50 - 8001da0: 46bd mov sp, r7 - 8001da2: bd80 pop {r7, pc} + 8001f10: bf00 nop + 8001f12: 3750 adds r7, #80 @ 0x50 + 8001f14: 46bd mov sp, r7 + 8001f16: bd80 pop {r7, pc} -08001da4 : +08001f18 : } void intToStr(int16_t N, uint8_t *str) { - 8001da4: b480 push {r7} - 8001da6: b087 sub sp, #28 - 8001da8: af00 add r7, sp, #0 - 8001daa: 4603 mov r3, r0 - 8001dac: 6039 str r1, [r7, #0] - 8001dae: 80fb strh r3, [r7, #6] + 8001f18: b480 push {r7} + 8001f1a: b087 sub sp, #28 + 8001f1c: af00 add r7, sp, #0 + 8001f1e: 4603 mov r3, r0 + 8001f20: 6039 str r1, [r7, #0] + 8001f22: 80fb strh r3, [r7, #6] int16_t i = 0; - 8001db0: 2300 movs r3, #0 - 8001db2: 82fb strh r3, [r7, #22] + 8001f24: 2300 movs r3, #0 + 8001f26: 82fb strh r3, [r7, #22] int16_t sign = N; - 8001db4: 88fb ldrh r3, [r7, #6] - 8001db6: 823b strh r3, [r7, #16] + 8001f28: 88fb ldrh r3, [r7, #6] + 8001f2a: 823b strh r3, [r7, #16] uint8_t max_len = 15; // Tamanho máximo do buffer - 8001db8: 230f movs r3, #15 - 8001dba: 73fb strb r3, [r7, #15] + 8001f2c: 230f movs r3, #15 + 8001f2e: 73fb strb r3, [r7, #15] uint8_t width = 4; // mínimo 4 caracteres - 8001dbc: 2304 movs r3, #4 - 8001dbe: 757b strb r3, [r7, #21] + 8001f30: 2304 movs r3, #4 + 8001f32: 757b strb r3, [r7, #21] // Trata o caso do número zero isoladamente if (N == 0) - 8001dc0: f9b7 3006 ldrsh.w r3, [r7, #6] - 8001dc4: 2b00 cmp r3, #0 - 8001dc6: d127 bne.n 8001e18 + 8001f34: f9b7 3006 ldrsh.w r3, [r7, #6] + 8001f38: 2b00 cmp r3, #0 + 8001f3a: d127 bne.n 8001f8c { // Preenche com zeros à esquerda até atingir a largura desejada while (width > 1 && i < (max_len - 1)) - 8001dc8: e00c b.n 8001de4 + 8001f3c: e00c b.n 8001f58 { str[i++] = '0'; - 8001dca: f9b7 2016 ldrsh.w r2, [r7, #22] - 8001dce: b293 uxth r3, r2 - 8001dd0: 3301 adds r3, #1 - 8001dd2: b29b uxth r3, r3 - 8001dd4: 82fb strh r3, [r7, #22] - 8001dd6: 683b ldr r3, [r7, #0] - 8001dd8: 4413 add r3, r2 - 8001dda: 2230 movs r2, #48 @ 0x30 - 8001ddc: 701a strb r2, [r3, #0] + 8001f3e: f9b7 2016 ldrsh.w r2, [r7, #22] + 8001f42: b293 uxth r3, r2 + 8001f44: 3301 adds r3, #1 + 8001f46: b29b uxth r3, r3 + 8001f48: 82fb strh r3, [r7, #22] + 8001f4a: 683b ldr r3, [r7, #0] + 8001f4c: 4413 add r3, r2 + 8001f4e: 2230 movs r2, #48 @ 0x30 + 8001f50: 701a strb r2, [r3, #0] width--; - 8001dde: 7d7b ldrb r3, [r7, #21] - 8001de0: 3b01 subs r3, #1 - 8001de2: 757b strb r3, [r7, #21] + 8001f52: 7d7b ldrb r3, [r7, #21] + 8001f54: 3b01 subs r3, #1 + 8001f56: 757b strb r3, [r7, #21] while (width > 1 && i < (max_len - 1)) - 8001de4: 7d7b ldrb r3, [r7, #21] - 8001de6: 2b01 cmp r3, #1 - 8001de8: d905 bls.n 8001df6 - 8001dea: f9b7 2016 ldrsh.w r2, [r7, #22] - 8001dee: 7bfb ldrb r3, [r7, #15] - 8001df0: 3b01 subs r3, #1 - 8001df2: 429a cmp r2, r3 - 8001df4: dbe9 blt.n 8001dca + 8001f58: 7d7b ldrb r3, [r7, #21] + 8001f5a: 2b01 cmp r3, #1 + 8001f5c: d905 bls.n 8001f6a + 8001f5e: f9b7 2016 ldrsh.w r2, [r7, #22] + 8001f62: 7bfb ldrb r3, [r7, #15] + 8001f64: 3b01 subs r3, #1 + 8001f66: 429a cmp r2, r3 + 8001f68: dbe9 blt.n 8001f3e } str[i++] = '0'; - 8001df6: f9b7 2016 ldrsh.w r2, [r7, #22] - 8001dfa: b293 uxth r3, r2 - 8001dfc: 3301 adds r3, #1 - 8001dfe: b29b uxth r3, r3 - 8001e00: 82fb strh r3, [r7, #22] - 8001e02: 683b ldr r3, [r7, #0] - 8001e04: 4413 add r3, r2 - 8001e06: 2230 movs r2, #48 @ 0x30 - 8001e08: 701a strb r2, [r3, #0] + 8001f6a: f9b7 2016 ldrsh.w r2, [r7, #22] + 8001f6e: b293 uxth r3, r2 + 8001f70: 3301 adds r3, #1 + 8001f72: b29b uxth r3, r3 + 8001f74: 82fb strh r3, [r7, #22] + 8001f76: 683b ldr r3, [r7, #0] + 8001f78: 4413 add r3, r2 + 8001f7a: 2230 movs r2, #48 @ 0x30 + 8001f7c: 701a strb r2, [r3, #0] str[i] = '\0'; - 8001e0a: f9b7 3016 ldrsh.w r3, [r7, #22] - 8001e0e: 683a ldr r2, [r7, #0] - 8001e10: 4413 add r3, r2 - 8001e12: 2200 movs r2, #0 - 8001e14: 701a strb r2, [r3, #0] + 8001f7e: f9b7 3016 ldrsh.w r3, [r7, #22] + 8001f82: 683a ldr r2, [r7, #0] + 8001f84: 4413 add r3, r2 + 8001f86: 2200 movs r2, #0 + 8001f88: 701a strb r2, [r3, #0] return; - 8001e16: e08a b.n 8001f2e + 8001f8a: e08a b.n 80020a2 } if (N < 0) - 8001e18: f9b7 3006 ldrsh.w r3, [r7, #6] - 8001e1c: 2b00 cmp r3, #0 - 8001e1e: da2d bge.n 8001e7c + 8001f8c: f9b7 3006 ldrsh.w r3, [r7, #6] + 8001f90: 2b00 cmp r3, #0 + 8001f92: da2d bge.n 8001ff0 N = -N; - 8001e20: 88fb ldrh r3, [r7, #6] - 8001e22: 425b negs r3, r3 - 8001e24: b29b uxth r3, r3 - 8001e26: 80fb strh r3, [r7, #6] + 8001f94: 88fb ldrh r3, [r7, #6] + 8001f96: 425b negs r3, r3 + 8001f98: b29b uxth r3, r3 + 8001f9a: 80fb strh r3, [r7, #6] // Extração dos dígitos while (N > 0) - 8001e28: e028 b.n 8001e7c + 8001f9c: e028 b.n 8001ff0 { if (i >= (max_len - 1)) - 8001e2a: f9b7 2016 ldrsh.w r2, [r7, #22] - 8001e2e: 7bfb ldrb r3, [r7, #15] - 8001e30: 3b01 subs r3, #1 - 8001e32: 429a cmp r2, r3 - 8001e34: da27 bge.n 8001e86 + 8001f9e: f9b7 2016 ldrsh.w r2, [r7, #22] + 8001fa2: 7bfb ldrb r3, [r7, #15] + 8001fa4: 3b01 subs r3, #1 + 8001fa6: 429a cmp r2, r3 + 8001fa8: da27 bge.n 8001ffa break; // Proteção de estouro str[i++] = (N % 10) + '0'; - 8001e36: f9b7 2006 ldrsh.w r2, [r7, #6] - 8001e3a: 4b3f ldr r3, [pc, #252] @ (8001f38 ) - 8001e3c: fb83 1302 smull r1, r3, r3, r2 - 8001e40: 1099 asrs r1, r3, #2 - 8001e42: 17d3 asrs r3, r2, #31 - 8001e44: 1ac9 subs r1, r1, r3 - 8001e46: 460b mov r3, r1 - 8001e48: 009b lsls r3, r3, #2 - 8001e4a: 440b add r3, r1 - 8001e4c: 005b lsls r3, r3, #1 - 8001e4e: 1ad3 subs r3, r2, r3 - 8001e50: b21b sxth r3, r3 - 8001e52: b2da uxtb r2, r3 - 8001e54: f9b7 1016 ldrsh.w r1, [r7, #22] - 8001e58: b28b uxth r3, r1 - 8001e5a: 3301 adds r3, #1 - 8001e5c: b29b uxth r3, r3 - 8001e5e: 82fb strh r3, [r7, #22] - 8001e60: 683b ldr r3, [r7, #0] - 8001e62: 440b add r3, r1 - 8001e64: 3230 adds r2, #48 @ 0x30 - 8001e66: b2d2 uxtb r2, r2 - 8001e68: 701a strb r2, [r3, #0] + 8001faa: f9b7 2006 ldrsh.w r2, [r7, #6] + 8001fae: 4b3f ldr r3, [pc, #252] @ (80020ac ) + 8001fb0: fb83 1302 smull r1, r3, r3, r2 + 8001fb4: 1099 asrs r1, r3, #2 + 8001fb6: 17d3 asrs r3, r2, #31 + 8001fb8: 1ac9 subs r1, r1, r3 + 8001fba: 460b mov r3, r1 + 8001fbc: 009b lsls r3, r3, #2 + 8001fbe: 440b add r3, r1 + 8001fc0: 005b lsls r3, r3, #1 + 8001fc2: 1ad3 subs r3, r2, r3 + 8001fc4: b21b sxth r3, r3 + 8001fc6: b2da uxtb r2, r3 + 8001fc8: f9b7 1016 ldrsh.w r1, [r7, #22] + 8001fcc: b28b uxth r3, r1 + 8001fce: 3301 adds r3, #1 + 8001fd0: b29b uxth r3, r3 + 8001fd2: 82fb strh r3, [r7, #22] + 8001fd4: 683b ldr r3, [r7, #0] + 8001fd6: 440b add r3, r1 + 8001fd8: 3230 adds r2, #48 @ 0x30 + 8001fda: b2d2 uxtb r2, r2 + 8001fdc: 701a strb r2, [r3, #0] N /= 10; - 8001e6a: f9b7 3006 ldrsh.w r3, [r7, #6] - 8001e6e: 4a32 ldr r2, [pc, #200] @ (8001f38 ) - 8001e70: fb82 1203 smull r1, r2, r2, r3 - 8001e74: 1092 asrs r2, r2, #2 - 8001e76: 17db asrs r3, r3, #31 - 8001e78: 1ad3 subs r3, r2, r3 - 8001e7a: 80fb strh r3, [r7, #6] + 8001fde: f9b7 3006 ldrsh.w r3, [r7, #6] + 8001fe2: 4a32 ldr r2, [pc, #200] @ (80020ac ) + 8001fe4: fb82 1203 smull r1, r2, r2, r3 + 8001fe8: 1092 asrs r2, r2, #2 + 8001fea: 17db asrs r3, r3, #31 + 8001fec: 1ad3 subs r3, r2, r3 + 8001fee: 80fb strh r3, [r7, #6] while (N > 0) - 8001e7c: f9b7 3006 ldrsh.w r3, [r7, #6] - 8001e80: 2b00 cmp r3, #0 - 8001e82: dcd2 bgt.n 8001e2a - 8001e84: e000 b.n 8001e88 + 8001ff0: f9b7 3006 ldrsh.w r3, [r7, #6] + 8001ff4: 2b00 cmp r3, #0 + 8001ff6: dcd2 bgt.n 8001f9e + 8001ff8: e000 b.n 8001ffc break; // Proteção de estouro - 8001e86: bf00 nop + 8001ffa: bf00 nop } // Adiciona o sinal de menos se necessário if (sign < 0) - 8001e88: f9b7 3010 ldrsh.w r3, [r7, #16] - 8001e8c: 2b00 cmp r3, #0 - 8001e8e: da1a bge.n 8001ec6 + 8001ffc: f9b7 3010 ldrsh.w r3, [r7, #16] + 8002000: 2b00 cmp r3, #0 + 8002002: da1a bge.n 800203a { if (i < (max_len - 1)) - 8001e90: f9b7 2016 ldrsh.w r2, [r7, #22] - 8001e94: 7bfb ldrb r3, [r7, #15] - 8001e96: 3b01 subs r3, #1 - 8001e98: 429a cmp r2, r3 - 8001e9a: da14 bge.n 8001ec6 + 8002004: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002008: 7bfb ldrb r3, [r7, #15] + 800200a: 3b01 subs r3, #1 + 800200c: 429a cmp r2, r3 + 800200e: da14 bge.n 800203a str[i++] = '-'; - 8001e9c: f9b7 2016 ldrsh.w r2, [r7, #22] - 8001ea0: b293 uxth r3, r2 - 8001ea2: 3301 adds r3, #1 - 8001ea4: b29b uxth r3, r3 - 8001ea6: 82fb strh r3, [r7, #22] - 8001ea8: 683b ldr r3, [r7, #0] - 8001eaa: 4413 add r3, r2 - 8001eac: 222d movs r2, #45 @ 0x2d - 8001eae: 701a strb r2, [r3, #0] + 8002010: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002014: b293 uxth r3, r2 + 8002016: 3301 adds r3, #1 + 8002018: b29b uxth r3, r3 + 800201a: 82fb strh r3, [r7, #22] + 800201c: 683b ldr r3, [r7, #0] + 800201e: 4413 add r3, r2 + 8002020: 222d movs r2, #45 @ 0x2d + 8002022: 701a strb r2, [r3, #0] } // Preenche com zeros à esquerda (considerando o espaço ocupado pelos dígitos e sinal) while (i < width && i < (max_len - 1)) - 8001eb0: e009 b.n 8001ec6 + 8002024: e009 b.n 800203a { str[i++] = '0'; - 8001eb2: f9b7 2016 ldrsh.w r2, [r7, #22] - 8001eb6: b293 uxth r3, r2 - 8001eb8: 3301 adds r3, #1 - 8001eba: b29b uxth r3, r3 - 8001ebc: 82fb strh r3, [r7, #22] - 8001ebe: 683b ldr r3, [r7, #0] - 8001ec0: 4413 add r3, r2 - 8001ec2: 2230 movs r2, #48 @ 0x30 - 8001ec4: 701a strb r2, [r3, #0] + 8002026: f9b7 2016 ldrsh.w r2, [r7, #22] + 800202a: b293 uxth r3, r2 + 800202c: 3301 adds r3, #1 + 800202e: b29b uxth r3, r3 + 8002030: 82fb strh r3, [r7, #22] + 8002032: 683b ldr r3, [r7, #0] + 8002034: 4413 add r3, r2 + 8002036: 2230 movs r2, #48 @ 0x30 + 8002038: 701a strb r2, [r3, #0] while (i < width && i < (max_len - 1)) - 8001ec6: f9b7 2016 ldrsh.w r2, [r7, #22] - 8001eca: 7d7b ldrb r3, [r7, #21] - 8001ecc: 429a cmp r2, r3 - 8001ece: da05 bge.n 8001edc - 8001ed0: f9b7 2016 ldrsh.w r2, [r7, #22] - 8001ed4: 7bfb ldrb r3, [r7, #15] - 8001ed6: 3b01 subs r3, #1 - 8001ed8: 429a cmp r2, r3 - 8001eda: dbea blt.n 8001eb2 + 800203a: f9b7 2016 ldrsh.w r2, [r7, #22] + 800203e: 7d7b ldrb r3, [r7, #21] + 8002040: 429a cmp r2, r3 + 8002042: da05 bge.n 8002050 + 8002044: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002048: 7bfb ldrb r3, [r7, #15] + 800204a: 3b01 subs r3, #1 + 800204c: 429a cmp r2, r3 + 800204e: dbea blt.n 8002026 } str[i] = '\0'; - 8001edc: f9b7 3016 ldrsh.w r3, [r7, #22] - 8001ee0: 683a ldr r2, [r7, #0] - 8001ee2: 4413 add r3, r2 - 8001ee4: 2200 movs r2, #0 - 8001ee6: 701a strb r2, [r3, #0] + 8002050: f9b7 3016 ldrsh.w r3, [r7, #22] + 8002054: 683a ldr r2, [r7, #0] + 8002056: 4413 add r3, r2 + 8002058: 2200 movs r2, #0 + 800205a: 701a strb r2, [r3, #0] // Inverte a string para colocar na ordem correta for (uint8_t j = 0, k = i - 1; j < k; j++, k--) - 8001ee8: 2300 movs r3, #0 - 8001eea: 753b strb r3, [r7, #20] - 8001eec: 8afb ldrh r3, [r7, #22] - 8001eee: b2db uxtb r3, r3 - 8001ef0: 3b01 subs r3, #1 - 8001ef2: 74fb strb r3, [r7, #19] - 8001ef4: e017 b.n 8001f26 + 800205c: 2300 movs r3, #0 + 800205e: 753b strb r3, [r7, #20] + 8002060: 8afb ldrh r3, [r7, #22] + 8002062: b2db uxtb r3, r3 + 8002064: 3b01 subs r3, #1 + 8002066: 74fb strb r3, [r7, #19] + 8002068: e017 b.n 800209a { uint8_t temp = str[j]; - 8001ef6: 7d3b ldrb r3, [r7, #20] - 8001ef8: 683a ldr r2, [r7, #0] - 8001efa: 4413 add r3, r2 - 8001efc: 781b ldrb r3, [r3, #0] - 8001efe: 73bb strb r3, [r7, #14] + 800206a: 7d3b ldrb r3, [r7, #20] + 800206c: 683a ldr r2, [r7, #0] + 800206e: 4413 add r3, r2 + 8002070: 781b ldrb r3, [r3, #0] + 8002072: 73bb strb r3, [r7, #14] str[j] = str[k]; - 8001f00: 7cfb ldrb r3, [r7, #19] - 8001f02: 683a ldr r2, [r7, #0] - 8001f04: 441a add r2, r3 - 8001f06: 7d3b ldrb r3, [r7, #20] - 8001f08: 6839 ldr r1, [r7, #0] - 8001f0a: 440b add r3, r1 - 8001f0c: 7812 ldrb r2, [r2, #0] - 8001f0e: 701a strb r2, [r3, #0] + 8002074: 7cfb ldrb r3, [r7, #19] + 8002076: 683a ldr r2, [r7, #0] + 8002078: 441a add r2, r3 + 800207a: 7d3b ldrb r3, [r7, #20] + 800207c: 6839 ldr r1, [r7, #0] + 800207e: 440b add r3, r1 + 8002080: 7812 ldrb r2, [r2, #0] + 8002082: 701a strb r2, [r3, #0] str[k] = temp; - 8001f10: 7cfb ldrb r3, [r7, #19] - 8001f12: 683a ldr r2, [r7, #0] - 8001f14: 4413 add r3, r2 - 8001f16: 7bba ldrb r2, [r7, #14] - 8001f18: 701a strb r2, [r3, #0] + 8002084: 7cfb ldrb r3, [r7, #19] + 8002086: 683a ldr r2, [r7, #0] + 8002088: 4413 add r3, r2 + 800208a: 7bba ldrb r2, [r7, #14] + 800208c: 701a strb r2, [r3, #0] for (uint8_t j = 0, k = i - 1; j < k; j++, k--) - 8001f1a: 7d3b ldrb r3, [r7, #20] - 8001f1c: 3301 adds r3, #1 - 8001f1e: 753b strb r3, [r7, #20] - 8001f20: 7cfb ldrb r3, [r7, #19] - 8001f22: 3b01 subs r3, #1 - 8001f24: 74fb strb r3, [r7, #19] - 8001f26: 7d3a ldrb r2, [r7, #20] - 8001f28: 7cfb ldrb r3, [r7, #19] - 8001f2a: 429a cmp r2, r3 - 8001f2c: d3e3 bcc.n 8001ef6 + 800208e: 7d3b ldrb r3, [r7, #20] + 8002090: 3301 adds r3, #1 + 8002092: 753b strb r3, [r7, #20] + 8002094: 7cfb ldrb r3, [r7, #19] + 8002096: 3b01 subs r3, #1 + 8002098: 74fb strb r3, [r7, #19] + 800209a: 7d3a ldrb r2, [r7, #20] + 800209c: 7cfb ldrb r3, [r7, #19] + 800209e: 429a cmp r2, r3 + 80020a0: d3e3 bcc.n 800206a } } - 8001f2e: 371c adds r7, #28 - 8001f30: 46bd mov sp, r7 - 8001f32: bc80 pop {r7} - 8001f34: 4770 bx lr - 8001f36: bf00 nop - 8001f38: 66666667 .word 0x66666667 + 80020a2: 371c adds r7, #28 + 80020a4: 46bd mov sp, r7 + 80020a6: bc80 pop {r7} + 80020a8: 4770 bx lr + 80020aa: bf00 nop + 80020ac: 66666667 .word 0x66666667 -08001f3c : +080020b0 : /* TIM3 Timer Interrupt */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - 8001f3c: b480 push {r7} - 8001f3e: b083 sub sp, #12 - 8001f40: af00 add r7, sp, #0 - 8001f42: 6078 str r0, [r7, #4] + 80020b0: b480 push {r7} + 80020b2: b083 sub sp, #12 + 80020b4: af00 add r7, sp, #0 + 80020b6: 6078 str r0, [r7, #4] if (htim->Instance == TIM3) - 8001f44: 687b ldr r3, [r7, #4] - 8001f46: 681b ldr r3, [r3, #0] - 8001f48: 4a06 ldr r2, [pc, #24] @ (8001f64 ) - 8001f4a: 4293 cmp r3, r2 - 8001f4c: d104 bne.n 8001f58 + 80020b8: 687b ldr r3, [r7, #4] + 80020ba: 681b ldr r3, [r3, #0] + 80020bc: 4a06 ldr r2, [pc, #24] @ (80020d8 ) + 80020be: 4293 cmp r3, r2 + 80020c0: d104 bne.n 80020cc { g_ms_counter++; /* Relógio global do sistema */ - 8001f4e: 4b06 ldr r3, [pc, #24] @ (8001f68 ) - 8001f50: 681b ldr r3, [r3, #0] - 8001f52: 3301 adds r3, #1 - 8001f54: 4a04 ldr r2, [pc, #16] @ (8001f68 ) - 8001f56: 6013 str r3, [r2, #0] + 80020c2: 4b06 ldr r3, [pc, #24] @ (80020dc ) + 80020c4: 681b ldr r3, [r3, #0] + 80020c6: 3301 adds r3, #1 + 80020c8: 4a04 ldr r2, [pc, #16] @ (80020dc ) + 80020ca: 6013 str r3, [r2, #0] } } - 8001f58: bf00 nop - 8001f5a: 370c adds r7, #12 - 8001f5c: 46bd mov sp, r7 - 8001f5e: bc80 pop {r7} - 8001f60: 4770 bx lr - 8001f62: bf00 nop - 8001f64: 40000400 .word 0x40000400 - 8001f68: 20000084 .word 0x20000084 + 80020cc: bf00 nop + 80020ce: 370c adds r7, #12 + 80020d0: 46bd mov sp, r7 + 80020d2: bc80 pop {r7} + 80020d4: 4770 bx lr + 80020d6: bf00 nop + 80020d8: 40000400 .word 0x40000400 + 80020dc: 20000080 .word 0x20000080 -08001f6c : +080020e0 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 8001f6c: b480 push {r7} - 8001f6e: af00 add r7, sp, #0 + 80020e0: b480 push {r7} + 80020e2: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 8001f70: b672 cpsid i + 80020e4: b672 cpsid i } - 8001f72: bf00 nop + 80020e6: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 8001f74: bf00 nop - 8001f76: e7fd b.n 8001f74 + 80020e8: bf00 nop + 80020ea: e7fd b.n 80020e8 -08001f78 : +080020ec : * @rmtoll IDR IDy LL_GPIO_ReadInputPort * @param GPIOx GPIO Port * @retval Input data register value of port */ __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx) { - 8001f78: b480 push {r7} - 8001f7a: b083 sub sp, #12 - 8001f7c: af00 add r7, sp, #0 - 8001f7e: 6078 str r0, [r7, #4] + 80020ec: b480 push {r7} + 80020ee: b083 sub sp, #12 + 80020f0: af00 add r7, sp, #0 + 80020f2: 6078 str r0, [r7, #4] return (READ_REG(GPIOx->IDR)); - 8001f80: 687b ldr r3, [r7, #4] - 8001f82: 689b ldr r3, [r3, #8] + 80020f4: 687b ldr r3, [r7, #4] + 80020f6: 689b ldr r3, [r3, #8] } - 8001f84: 4618 mov r0, r3 - 8001f86: 370c adds r7, #12 - 8001f88: 46bd mov sp, r7 - 8001f8a: bc80 pop {r7} - 8001f8c: 4770 bx lr + 80020f8: 4618 mov r0, r3 + 80020fa: 370c adds r7, #12 + 80020fc: 46bd mov sp, r7 + 80020fe: bc80 pop {r7} + 8002100: 4770 bx lr ... -08001f90 : +08002104 : /** * @brief Initializes the RS-485 driver. * @note This function configures GPIOs for address detection and USART1 for communication. */ void rs485_init(void) { - 8001f90: b580 push {r7, lr} - 8001f92: af00 add r7, sp, #0 + 8002104: b580 push {r7, lr} + 8002106: af00 add r7, sp, #0 /* Configure GPIOs for address detection */ rs485_configure_gpio_address(); - 8001f94: f000 f864 bl 8002060 + 8002108: f000 f864 bl 80021d4 /* Configure USART1 for RS-485 communication */ rs485_configure_usart1(); - 8001f98: f000 f8a8 bl 80020ec + 800210c: f000 f8a8 bl 8002260 /* Get the current device address from GPIOs */ device_address.full_address = rs485_get_address(); - 8001f9c: f000 f808 bl 8001fb0 - 8001fa0: 4603 mov r3, r0 - 8001fa2: 461a mov r2, r3 - 8001fa4: 4b01 ldr r3, [pc, #4] @ (8001fac ) - 8001fa6: 709a strb r2, [r3, #2] + 8002110: f000 f808 bl 8002124 + 8002114: 4603 mov r3, r0 + 8002116: 461a mov r2, r3 + 8002118: 4b01 ldr r3, [pc, #4] @ (8002120 ) + 800211a: 709a strb r2, [r3, #2] } - 8001fa8: bf00 nop - 8001faa: bd80 pop {r7, pc} - 8001fac: 200002bc .word 0x200002bc + 800211c: bf00 nop + 800211e: bd80 pop {r7, pc} + 8002120: 200002c4 .word 0x200002c4 -08001fb0 : +08002124 : /** * @brief Gets the current device address from GPIOs. * @return The 8-bit device address. */ uint8_t rs485_get_address(void) { - 8001fb0: b598 push {r3, r4, r7, lr} - 8001fb2: af00 add r7, sp, #0 + 8002124: b598 push {r3, r4, r7, lr} + 8002126: af00 add r7, sp, #0 return ((uint8_t) ((((LL_GPIO_ReadInputPort(GPIOB) & RS485_ADDR_MASK_HIGH)>>RS485_ADDR_BIT_SET_HIGH) | (LL_GPIO_ReadInputPort(GPIOA) & RS485_ADDR_MASK_LOW)>>RS485_ADDR_BIT_SET_LOW))); - 8001fb4: 480a ldr r0, [pc, #40] @ (8001fe0 ) - 8001fb6: f7ff ffdf bl 8001f78 - 8001fba: 4603 mov r3, r0 - 8001fbc: 0a1b lsrs r3, r3, #8 - 8001fbe: b2db uxtb r3, r3 - 8001fc0: f023 030f bic.w r3, r3, #15 - 8001fc4: b2dc uxtb r4, r3 - 8001fc6: 4807 ldr r0, [pc, #28] @ (8001fe4 ) - 8001fc8: f7ff ffd6 bl 8001f78 - 8001fcc: 4603 mov r3, r0 - 8001fce: 089b lsrs r3, r3, #2 - 8001fd0: b2db uxtb r3, r3 - 8001fd2: f003 030f and.w r3, r3, #15 - 8001fd6: b2db uxtb r3, r3 - 8001fd8: 4323 orrs r3, r4 - 8001fda: b2db uxtb r3, r3 + 8002128: 480a ldr r0, [pc, #40] @ (8002154 ) + 800212a: f7ff ffdf bl 80020ec + 800212e: 4603 mov r3, r0 + 8002130: 0a1b lsrs r3, r3, #8 + 8002132: b2db uxtb r3, r3 + 8002134: f023 030f bic.w r3, r3, #15 + 8002138: b2dc uxtb r4, r3 + 800213a: 4807 ldr r0, [pc, #28] @ (8002158 ) + 800213c: f7ff ffd6 bl 80020ec + 8002140: 4603 mov r3, r0 + 8002142: 089b lsrs r3, r3, #2 + 8002144: b2db uxtb r3, r3 + 8002146: f003 030f and.w r3, r3, #15 + 800214a: b2db uxtb r3, r3 + 800214c: 4323 orrs r3, r4 + 800214e: b2db uxtb r3, r3 } - 8001fdc: 4618 mov r0, r3 - 8001fde: bd98 pop {r3, r4, r7, pc} - 8001fe0: 40010c00 .word 0x40010c00 - 8001fe4: 40010800 .word 0x40010800 + 8002150: 4618 mov r0, r3 + 8002152: bd98 pop {r3, r4, r7, pc} + 8002154: 40010c00 .word 0x40010c00 + 8002158: 40010800 .word 0x40010800 -08001fe8 : +0800215c : * @param data Pointer to the data buffer. * @param length Number of bytes to send. * @retval HAL_OK on success, otherwise error code. */ HAL_StatusTypeDef rs485_send_broadcast(uint8_t* data, uint16_t length) { - 8001fe8: b580 push {r7, lr} - 8001fea: b084 sub sp, #16 - 8001fec: af00 add r7, sp, #0 - 8001fee: 6078 str r0, [r7, #4] - 8001ff0: 460b mov r3, r1 - 8001ff2: 807b strh r3, [r7, #2] + 800215c: b580 push {r7, lr} + 800215e: b084 sub sp, #16 + 8002160: af00 add r7, sp, #0 + 8002162: 6078 str r0, [r7, #4] + 8002164: 460b mov r3, r1 + 8002166: 807b strh r3, [r7, #2] /* Enable transmission mode */ rs485_enable_tx(); - 8001ff4: f000 f81c bl 8002030 + 8002168: f000 f81c bl 80021a4 /* Send the broadcast address (0x00) first */ uint8_t broadcast_address = 0x00; - 8001ff8: 2300 movs r3, #0 - 8001ffa: 73bb strb r3, [r7, #14] + 800216c: 2300 movs r3, #0 + 800216e: 73bb strb r3, [r7, #14] HAL_UART_Transmit(&huart1, &broadcast_address, 1, HAL_MAX_DELAY); - 8001ffc: f107 010e add.w r1, r7, #14 - 8002000: f04f 33ff mov.w r3, #4294967295 - 8002004: 2201 movs r2, #1 - 8002006: 4809 ldr r0, [pc, #36] @ (800202c ) - 8002008: f003 f978 bl 80052fc + 8002170: f107 010e add.w r1, r7, #14 + 8002174: f04f 33ff mov.w r3, #4294967295 + 8002178: 2201 movs r2, #1 + 800217a: 4809 ldr r0, [pc, #36] @ (80021a0 ) + 800217c: f003 f978 bl 8005470 /* Send the data */ HAL_StatusTypeDef status = HAL_UART_Transmit(&huart1, data, length, HAL_MAX_DELAY); - 800200c: 887a ldrh r2, [r7, #2] - 800200e: f04f 33ff mov.w r3, #4294967295 - 8002012: 6879 ldr r1, [r7, #4] - 8002014: 4805 ldr r0, [pc, #20] @ (800202c ) - 8002016: f003 f971 bl 80052fc - 800201a: 4603 mov r3, r0 - 800201c: 73fb strb r3, [r7, #15] + 8002180: 887a ldrh r2, [r7, #2] + 8002182: f04f 33ff mov.w r3, #4294967295 + 8002186: 6879 ldr r1, [r7, #4] + 8002188: 4805 ldr r0, [pc, #20] @ (80021a0 ) + 800218a: f003 f971 bl 8005470 + 800218e: 4603 mov r3, r0 + 8002190: 73fb strb r3, [r7, #15] /* Disable transmission mode after sending */ rs485_disable_tx(); - 800201e: f000 f813 bl 8002048 + 8002192: f000 f813 bl 80021bc return status; - 8002022: 7bfb ldrb r3, [r7, #15] + 8002196: 7bfb ldrb r3, [r7, #15] } - 8002024: 4618 mov r0, r3 - 8002026: 3710 adds r7, #16 - 8002028: 46bd mov sp, r7 - 800202a: bd80 pop {r7, pc} - 800202c: 200002c0 .word 0x200002c0 + 8002198: 4618 mov r0, r3 + 800219a: 3710 adds r7, #16 + 800219c: 46bd mov sp, r7 + 800219e: bd80 pop {r7, pc} + 80021a0: 200002c8 .word 0x200002c8 -08002030 : +080021a4 : /** * @brief Enables transmission mode on RS-485 transceiver. */ void rs485_enable_tx(void) { - 8002030: b580 push {r7, lr} - 8002032: af00 add r7, sp, #0 + 80021a4: b580 push {r7, lr} + 80021a6: af00 add r7, sp, #0 /* Set TX EN pin high to enable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_SET); - 8002034: 2201 movs r2, #1 - 8002036: f44f 5180 mov.w r1, #4096 @ 0x1000 - 800203a: 4802 ldr r0, [pc, #8] @ (8002044 ) - 800203c: f000 ffef bl 800301e + 80021a8: 2201 movs r2, #1 + 80021aa: f44f 5180 mov.w r1, #4096 @ 0x1000 + 80021ae: 4802 ldr r0, [pc, #8] @ (80021b8 ) + 80021b0: f000 ffef bl 8003192 } - 8002040: bf00 nop - 8002042: bd80 pop {r7, pc} - 8002044: 40010800 .word 0x40010800 + 80021b4: bf00 nop + 80021b6: bd80 pop {r7, pc} + 80021b8: 40010800 .word 0x40010800 -08002048 : +080021bc : /** * @brief Disables transmission mode on RS-485 transceiver. */ void rs485_disable_tx(void) { - 8002048: b580 push {r7, lr} - 800204a: af00 add r7, sp, #0 + 80021bc: b580 push {r7, lr} + 80021be: af00 add r7, sp, #0 /* Set TX EN pin low to disable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_RESET); - 800204c: 2200 movs r2, #0 - 800204e: f44f 5180 mov.w r1, #4096 @ 0x1000 - 8002052: 4802 ldr r0, [pc, #8] @ (800205c ) - 8002054: f000 ffe3 bl 800301e + 80021c0: 2200 movs r2, #0 + 80021c2: f44f 5180 mov.w r1, #4096 @ 0x1000 + 80021c6: 4802 ldr r0, [pc, #8] @ (80021d0 ) + 80021c8: f000 ffe3 bl 8003192 } - 8002058: bf00 nop - 800205a: bd80 pop {r7, pc} - 800205c: 40010800 .word 0x40010800 + 80021cc: bf00 nop + 80021ce: bd80 pop {r7, pc} + 80021d0: 40010800 .word 0x40010800 -08002060 : +080021d4 : /** * @brief Configures GPIOs for address detection. */ static void rs485_configure_gpio_address(void) { - 8002060: b580 push {r7, lr} - 8002062: b086 sub sp, #24 - 8002064: af00 add r7, sp, #0 + 80021d4: b580 push {r7, lr} + 80021d6: b086 sub sp, #24 + 80021d8: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002066: f107 0308 add.w r3, r7, #8 - 800206a: 2200 movs r2, #0 - 800206c: 601a str r2, [r3, #0] - 800206e: 605a str r2, [r3, #4] - 8002070: 609a str r2, [r3, #8] - 8002072: 60da str r2, [r3, #12] + 80021da: f107 0308 add.w r3, r7, #8 + 80021de: 2200 movs r2, #0 + 80021e0: 601a str r2, [r3, #0] + 80021e2: 605a str r2, [r3, #4] + 80021e4: 609a str r2, [r3, #8] + 80021e6: 60da str r2, [r3, #12] /* Enable clock for GPIOA and GPIOB */ __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002074: 4b1a ldr r3, [pc, #104] @ (80020e0 ) - 8002076: 699b ldr r3, [r3, #24] - 8002078: 4a19 ldr r2, [pc, #100] @ (80020e0 ) - 800207a: f043 0304 orr.w r3, r3, #4 - 800207e: 6193 str r3, [r2, #24] - 8002080: 4b17 ldr r3, [pc, #92] @ (80020e0 ) - 8002082: 699b ldr r3, [r3, #24] - 8002084: f003 0304 and.w r3, r3, #4 - 8002088: 607b str r3, [r7, #4] - 800208a: 687b ldr r3, [r7, #4] + 80021e8: 4b1a ldr r3, [pc, #104] @ (8002254 ) + 80021ea: 699b ldr r3, [r3, #24] + 80021ec: 4a19 ldr r2, [pc, #100] @ (8002254 ) + 80021ee: f043 0304 orr.w r3, r3, #4 + 80021f2: 6193 str r3, [r2, #24] + 80021f4: 4b17 ldr r3, [pc, #92] @ (8002254 ) + 80021f6: 699b ldr r3, [r3, #24] + 80021f8: f003 0304 and.w r3, r3, #4 + 80021fc: 607b str r3, [r7, #4] + 80021fe: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); - 800208c: 4b14 ldr r3, [pc, #80] @ (80020e0 ) - 800208e: 699b ldr r3, [r3, #24] - 8002090: 4a13 ldr r2, [pc, #76] @ (80020e0 ) - 8002092: f043 0308 orr.w r3, r3, #8 - 8002096: 6193 str r3, [r2, #24] - 8002098: 4b11 ldr r3, [pc, #68] @ (80020e0 ) - 800209a: 699b ldr r3, [r3, #24] - 800209c: f003 0308 and.w r3, r3, #8 - 80020a0: 603b str r3, [r7, #0] - 80020a2: 683b ldr r3, [r7, #0] + 8002200: 4b14 ldr r3, [pc, #80] @ (8002254 ) + 8002202: 699b ldr r3, [r3, #24] + 8002204: 4a13 ldr r2, [pc, #76] @ (8002254 ) + 8002206: f043 0308 orr.w r3, r3, #8 + 800220a: 6193 str r3, [r2, #24] + 800220c: 4b11 ldr r3, [pc, #68] @ (8002254 ) + 800220e: 699b ldr r3, [r3, #24] + 8002210: f003 0308 and.w r3, r3, #8 + 8002214: 603b str r3, [r7, #0] + 8002216: 683b ldr r3, [r7, #0] /* Configure PA2-PA5 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; - 80020a4: 233c movs r3, #60 @ 0x3c - 80020a6: 60bb str r3, [r7, #8] + 8002218: 233c movs r3, #60 @ 0x3c + 800221a: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80020a8: 2300 movs r3, #0 - 80020aa: 60fb str r3, [r7, #12] + 800221c: 2300 movs r3, #0 + 800221e: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; - 80020ac: 2301 movs r3, #1 - 80020ae: 613b str r3, [r7, #16] + 8002220: 2301 movs r3, #1 + 8002222: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 80020b0: f107 0308 add.w r3, r7, #8 - 80020b4: 4619 mov r1, r3 - 80020b6: 480b ldr r0, [pc, #44] @ (80020e4 ) - 80020b8: f000 fe16 bl 8002ce8 + 8002224: f107 0308 add.w r3, r7, #8 + 8002228: 4619 mov r1, r3 + 800222a: 480b ldr r0, [pc, #44] @ (8002258 ) + 800222c: f000 fe16 bl 8002e5c /* Configure PB12-PB15 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15; - 80020bc: f44f 4370 mov.w r3, #61440 @ 0xf000 - 80020c0: 60bb str r3, [r7, #8] + 8002230: f44f 4370 mov.w r3, #61440 @ 0xf000 + 8002234: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80020c2: 2300 movs r3, #0 - 80020c4: 60fb str r3, [r7, #12] + 8002236: 2300 movs r3, #0 + 8002238: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; - 80020c6: 2301 movs r3, #1 - 80020c8: 613b str r3, [r7, #16] + 800223a: 2301 movs r3, #1 + 800223c: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 80020ca: f107 0308 add.w r3, r7, #8 - 80020ce: 4619 mov r1, r3 - 80020d0: 4805 ldr r0, [pc, #20] @ (80020e8 ) - 80020d2: f000 fe09 bl 8002ce8 + 800223e: f107 0308 add.w r3, r7, #8 + 8002242: 4619 mov r1, r3 + 8002244: 4805 ldr r0, [pc, #20] @ (800225c ) + 8002246: f000 fe09 bl 8002e5c } - 80020d6: bf00 nop - 80020d8: 3718 adds r7, #24 - 80020da: 46bd mov sp, r7 - 80020dc: bd80 pop {r7, pc} - 80020de: bf00 nop - 80020e0: 40021000 .word 0x40021000 - 80020e4: 40010800 .word 0x40010800 - 80020e8: 40010c00 .word 0x40010c00 + 800224a: bf00 nop + 800224c: 3718 adds r7, #24 + 800224e: 46bd mov sp, r7 + 8002250: bd80 pop {r7, pc} + 8002252: bf00 nop + 8002254: 40021000 .word 0x40021000 + 8002258: 40010800 .word 0x40010800 + 800225c: 40010c00 .word 0x40010c00 -080020ec : +08002260 : /** * @brief Configures USART1 for RS-485 communication. */ static void rs485_configure_usart1(void) { - 80020ec: b580 push {r7, lr} - 80020ee: b082 sub sp, #8 - 80020f0: af00 add r7, sp, #0 + 8002260: b580 push {r7, lr} + 8002262: b082 sub sp, #8 + 8002264: af00 add r7, sp, #0 /* Enable clock for USART1 */ __HAL_RCC_USART1_CLK_ENABLE(); - 80020f2: 4b18 ldr r3, [pc, #96] @ (8002154 ) - 80020f4: 699b ldr r3, [r3, #24] - 80020f6: 4a17 ldr r2, [pc, #92] @ (8002154 ) - 80020f8: f443 4380 orr.w r3, r3, #16384 @ 0x4000 - 80020fc: 6193 str r3, [r2, #24] - 80020fe: 4b15 ldr r3, [pc, #84] @ (8002154 ) - 8002100: 699b ldr r3, [r3, #24] - 8002102: f403 4380 and.w r3, r3, #16384 @ 0x4000 - 8002106: 607b str r3, [r7, #4] - 8002108: 687b ldr r3, [r7, #4] + 8002266: 4b18 ldr r3, [pc, #96] @ (80022c8 ) + 8002268: 699b ldr r3, [r3, #24] + 800226a: 4a17 ldr r2, [pc, #92] @ (80022c8 ) + 800226c: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 8002270: 6193 str r3, [r2, #24] + 8002272: 4b15 ldr r3, [pc, #84] @ (80022c8 ) + 8002274: 699b ldr r3, [r3, #24] + 8002276: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 800227a: 607b str r3, [r7, #4] + 800227c: 687b ldr r3, [r7, #4] huart1.Instance = USART1; - 800210a: 4b13 ldr r3, [pc, #76] @ (8002158 ) - 800210c: 4a13 ldr r2, [pc, #76] @ (800215c ) - 800210e: 601a str r2, [r3, #0] + 800227e: 4b13 ldr r3, [pc, #76] @ (80022cc ) + 8002280: 4a13 ldr r2, [pc, #76] @ (80022d0 ) + 8002282: 601a str r2, [r3, #0] huart1.Init.BaudRate = 9600; /*!< Default baud rate for RS-485 */ - 8002110: 4b11 ldr r3, [pc, #68] @ (8002158 ) - 8002112: f44f 5216 mov.w r2, #9600 @ 0x2580 - 8002116: 605a str r2, [r3, #4] + 8002284: 4b11 ldr r3, [pc, #68] @ (80022cc ) + 8002286: f44f 5216 mov.w r2, #9600 @ 0x2580 + 800228a: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8002118: 4b0f ldr r3, [pc, #60] @ (8002158 ) - 800211a: 2200 movs r2, #0 - 800211c: 609a str r2, [r3, #8] + 800228c: 4b0f ldr r3, [pc, #60] @ (80022cc ) + 800228e: 2200 movs r2, #0 + 8002290: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 800211e: 4b0e ldr r3, [pc, #56] @ (8002158 ) - 8002120: 2200 movs r2, #0 - 8002122: 60da str r2, [r3, #12] + 8002292: 4b0e ldr r3, [pc, #56] @ (80022cc ) + 8002294: 2200 movs r2, #0 + 8002296: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 8002124: 4b0c ldr r3, [pc, #48] @ (8002158 ) - 8002126: 2200 movs r2, #0 - 8002128: 611a str r2, [r3, #16] + 8002298: 4b0c ldr r3, [pc, #48] @ (80022cc ) + 800229a: 2200 movs r2, #0 + 800229c: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 800212a: 4b0b ldr r3, [pc, #44] @ (8002158 ) - 800212c: 220c movs r2, #12 - 800212e: 615a str r2, [r3, #20] + 800229e: 4b0b ldr r3, [pc, #44] @ (80022cc ) + 80022a0: 220c movs r2, #12 + 80022a2: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; /*!< Use NONE as TX enable */ - 8002130: 4b09 ldr r3, [pc, #36] @ (8002158 ) - 8002132: 2200 movs r2, #0 - 8002134: 619a str r2, [r3, #24] + 80022a4: 4b09 ldr r3, [pc, #36] @ (80022cc ) + 80022a6: 2200 movs r2, #0 + 80022a8: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8002136: 4b08 ldr r3, [pc, #32] @ (8002158 ) - 8002138: 2200 movs r2, #0 - 800213a: 61da str r2, [r3, #28] + 80022aa: 4b08 ldr r3, [pc, #32] @ (80022cc ) + 80022ac: 2200 movs r2, #0 + 80022ae: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) - 800213c: 4806 ldr r0, [pc, #24] @ (8002158 ) - 800213e: f003 f88d bl 800525c - 8002142: 4603 mov r3, r0 - 8002144: 2b00 cmp r3, #0 - 8002146: d001 beq.n 800214c + 80022b0: 4806 ldr r0, [pc, #24] @ (80022cc ) + 80022b2: f003 f88d bl 80053d0 + 80022b6: 4603 mov r3, r0 + 80022b8: 2b00 cmp r3, #0 + 80022ba: d001 beq.n 80022c0 { /* Initialization Error */ while(1); - 8002148: bf00 nop - 800214a: e7fd b.n 8002148 + 80022bc: bf00 nop + 80022be: e7fd b.n 80022bc } } - 800214c: bf00 nop - 800214e: 3708 adds r7, #8 - 8002150: 46bd mov sp, r7 - 8002152: bd80 pop {r7, pc} - 8002154: 40021000 .word 0x40021000 - 8002158: 200002c0 .word 0x200002c0 - 800215c: 40013800 .word 0x40013800 + 80022c0: bf00 nop + 80022c2: 3708 adds r7, #8 + 80022c4: 46bd mov sp, r7 + 80022c6: bd80 pop {r7, pc} + 80022c8: 40021000 .word 0x40021000 + 80022cc: 200002c8 .word 0x200002c8 + 80022d0: 40013800 .word 0x40013800 -08002160 : +080022d4 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8002160: b480 push {r7} - 8002162: b085 sub sp, #20 - 8002164: af00 add r7, sp, #0 + 80022d4: b480 push {r7} + 80022d6: b085 sub sp, #20 + 80022d8: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); - 8002166: 4b15 ldr r3, [pc, #84] @ (80021bc ) - 8002168: 699b ldr r3, [r3, #24] - 800216a: 4a14 ldr r2, [pc, #80] @ (80021bc ) - 800216c: f043 0301 orr.w r3, r3, #1 - 8002170: 6193 str r3, [r2, #24] - 8002172: 4b12 ldr r3, [pc, #72] @ (80021bc ) - 8002174: 699b ldr r3, [r3, #24] - 8002176: f003 0301 and.w r3, r3, #1 - 800217a: 60bb str r3, [r7, #8] - 800217c: 68bb ldr r3, [r7, #8] + 80022da: 4b15 ldr r3, [pc, #84] @ (8002330 ) + 80022dc: 699b ldr r3, [r3, #24] + 80022de: 4a14 ldr r2, [pc, #80] @ (8002330 ) + 80022e0: f043 0301 orr.w r3, r3, #1 + 80022e4: 6193 str r3, [r2, #24] + 80022e6: 4b12 ldr r3, [pc, #72] @ (8002330 ) + 80022e8: 699b ldr r3, [r3, #24] + 80022ea: f003 0301 and.w r3, r3, #1 + 80022ee: 60bb str r3, [r7, #8] + 80022f0: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); - 800217e: 4b0f ldr r3, [pc, #60] @ (80021bc ) - 8002180: 69db ldr r3, [r3, #28] - 8002182: 4a0e ldr r2, [pc, #56] @ (80021bc ) - 8002184: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8002188: 61d3 str r3, [r2, #28] - 800218a: 4b0c ldr r3, [pc, #48] @ (80021bc ) - 800218c: 69db ldr r3, [r3, #28] - 800218e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8002192: 607b str r3, [r7, #4] - 8002194: 687b ldr r3, [r7, #4] + 80022f2: 4b0f ldr r3, [pc, #60] @ (8002330 ) + 80022f4: 69db ldr r3, [r3, #28] + 80022f6: 4a0e ldr r2, [pc, #56] @ (8002330 ) + 80022f8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 80022fc: 61d3 str r3, [r2, #28] + 80022fe: 4b0c ldr r3, [pc, #48] @ (8002330 ) + 8002300: 69db ldr r3, [r3, #28] + 8002302: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8002306: 607b str r3, [r7, #4] + 8002308: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); - 8002196: 4b0a ldr r3, [pc, #40] @ (80021c0 ) - 8002198: 685b ldr r3, [r3, #4] - 800219a: 60fb str r3, [r7, #12] - 800219c: 68fb ldr r3, [r7, #12] - 800219e: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 - 80021a2: 60fb str r3, [r7, #12] - 80021a4: 68fb ldr r3, [r7, #12] - 80021a6: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 - 80021aa: 60fb str r3, [r7, #12] - 80021ac: 4a04 ldr r2, [pc, #16] @ (80021c0 ) - 80021ae: 68fb ldr r3, [r7, #12] - 80021b0: 6053 str r3, [r2, #4] + 800230a: 4b0a ldr r3, [pc, #40] @ (8002334 ) + 800230c: 685b ldr r3, [r3, #4] + 800230e: 60fb str r3, [r7, #12] + 8002310: 68fb ldr r3, [r7, #12] + 8002312: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 + 8002316: 60fb str r3, [r7, #12] + 8002318: 68fb ldr r3, [r7, #12] + 800231a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 + 800231e: 60fb str r3, [r7, #12] + 8002320: 4a04 ldr r2, [pc, #16] @ (8002334 ) + 8002322: 68fb ldr r3, [r7, #12] + 8002324: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 80021b2: bf00 nop - 80021b4: 3714 adds r7, #20 - 80021b6: 46bd mov sp, r7 - 80021b8: bc80 pop {r7} - 80021ba: 4770 bx lr - 80021bc: 40021000 .word 0x40021000 - 80021c0: 40010000 .word 0x40010000 + 8002326: bf00 nop + 8002328: 3714 adds r7, #20 + 800232a: 46bd mov sp, r7 + 800232c: bc80 pop {r7} + 800232e: 4770 bx lr + 8002330: 40021000 .word 0x40021000 + 8002334: 40010000 .word 0x40010000 -080021c4 : +08002338 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 80021c4: b480 push {r7} - 80021c6: af00 add r7, sp, #0 + 8002338: b480 push {r7} + 800233a: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 80021c8: bf00 nop - 80021ca: e7fd b.n 80021c8 + 800233c: bf00 nop + 800233e: e7fd b.n 800233c -080021cc : +08002340 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 80021cc: b480 push {r7} - 80021ce: af00 add r7, sp, #0 + 8002340: b480 push {r7} + 8002342: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 80021d0: bf00 nop - 80021d2: e7fd b.n 80021d0 + 8002344: bf00 nop + 8002346: e7fd b.n 8002344 -080021d4 : +08002348 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 80021d4: b480 push {r7} - 80021d6: af00 add r7, sp, #0 + 8002348: b480 push {r7} + 800234a: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 80021d8: bf00 nop - 80021da: e7fd b.n 80021d8 + 800234c: bf00 nop + 800234e: e7fd b.n 800234c -080021dc : +08002350 : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { - 80021dc: b480 push {r7} - 80021de: af00 add r7, sp, #0 + 8002350: b480 push {r7} + 8002352: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 80021e0: bf00 nop - 80021e2: e7fd b.n 80021e0 + 8002354: bf00 nop + 8002356: e7fd b.n 8002354 -080021e4 : +08002358 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 80021e4: b480 push {r7} - 80021e6: af00 add r7, sp, #0 + 8002358: b480 push {r7} + 800235a: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 80021e8: bf00 nop - 80021ea: e7fd b.n 80021e8 + 800235c: bf00 nop + 800235e: e7fd b.n 800235c -080021ec : +08002360 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 80021ec: b480 push {r7} - 80021ee: af00 add r7, sp, #0 + 8002360: b480 push {r7} + 8002362: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 80021f0: bf00 nop - 80021f2: 46bd mov sp, r7 - 80021f4: bc80 pop {r7} - 80021f6: 4770 bx lr + 8002364: bf00 nop + 8002366: 46bd mov sp, r7 + 8002368: bc80 pop {r7} + 800236a: 4770 bx lr -080021f8 : +0800236c : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 80021f8: b480 push {r7} - 80021fa: af00 add r7, sp, #0 + 800236c: b480 push {r7} + 800236e: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 80021fc: bf00 nop - 80021fe: 46bd mov sp, r7 - 8002200: bc80 pop {r7} - 8002202: 4770 bx lr + 8002370: bf00 nop + 8002372: 46bd mov sp, r7 + 8002374: bc80 pop {r7} + 8002376: 4770 bx lr -08002204 : +08002378 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8002204: b480 push {r7} - 8002206: af00 add r7, sp, #0 + 8002378: b480 push {r7} + 800237a: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8002208: bf00 nop - 800220a: 46bd mov sp, r7 - 800220c: bc80 pop {r7} - 800220e: 4770 bx lr + 800237c: bf00 nop + 800237e: 46bd mov sp, r7 + 8002380: bc80 pop {r7} + 8002382: 4770 bx lr -08002210 : +08002384 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8002210: b580 push {r7, lr} - 8002212: af00 add r7, sp, #0 + 8002384: b580 push {r7, lr} + 8002386: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8002214: f000 f97a bl 800250c + 8002388: f000 f97a bl 8002680 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8002218: bf00 nop - 800221a: bd80 pop {r7, pc} + 800238c: bf00 nop + 800238e: bd80 pop {r7, pc} -0800221c : +08002390 : /** * @brief This function handles TIM3 global interrupt. */ void TIM3_IRQHandler(void) { - 800221c: b580 push {r7, lr} - 800221e: af00 add r7, sp, #0 + 8002390: b580 push {r7, lr} + 8002392: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_IRQn 0 */ /* USER CODE END TIM3_IRQn 0 */ HAL_TIM_IRQHandler(&htim3); - 8002220: 4802 ldr r0, [pc, #8] @ (800222c ) - 8002222: f002 fccb bl 8004bbc + 8002394: 4802 ldr r0, [pc, #8] @ (80023a0 ) + 8002396: f002 fccb bl 8004d30 /* USER CODE BEGIN TIM3_IRQn 1 */ /* USER CODE END TIM3_IRQn 1 */ } - 8002226: bf00 nop - 8002228: bd80 pop {r7, pc} - 800222a: bf00 nop - 800222c: 20000308 .word 0x20000308 + 800239a: bf00 nop + 800239c: bd80 pop {r7, pc} + 800239e: bf00 nop + 80023a0: 20000310 .word 0x20000310 -08002230 : +080023a4 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { - 8002230: b580 push {r7, lr} - 8002232: af00 add r7, sp, #0 + 80023a4: b580 push {r7, lr} + 80023a6: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); - 8002234: 4802 ldr r0, [pc, #8] @ (8002240 ) - 8002236: f003 f8ed bl 8005414 + 80023a8: 4802 ldr r0, [pc, #8] @ (80023b4 ) + 80023aa: f003 f8ed bl 8005588 /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } - 800223a: bf00 nop - 800223c: bd80 pop {r7, pc} - 800223e: bf00 nop - 8002240: 20000350 .word 0x20000350 + 80023ae: bf00 nop + 80023b0: bd80 pop {r7, pc} + 80023b2: bf00 nop + 80023b4: 20000358 .word 0x20000358 -08002244 : +080023b8 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { - 8002244: b480 push {r7} - 8002246: af00 add r7, sp, #0 + 80023b8: b480 push {r7} + 80023ba: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } - 8002248: bf00 nop - 800224a: 46bd mov sp, r7 - 800224c: bc80 pop {r7} - 800224e: 4770 bx lr + 80023bc: bf00 nop + 80023be: 46bd mov sp, r7 + 80023c0: bc80 pop {r7} + 80023c2: 4770 bx lr -08002250 : +080023c4 : TIM_HandleTypeDef htim3; /* TIM3 init function */ void MX_TIM3_Init(void) { - 8002250: b580 push {r7, lr} - 8002252: b086 sub sp, #24 - 8002254: af00 add r7, sp, #0 + 80023c4: b580 push {r7, lr} + 80023c6: b086 sub sp, #24 + 80023c8: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_Init 0 */ /* USER CODE END TIM3_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 8002256: f107 0308 add.w r3, r7, #8 - 800225a: 2200 movs r2, #0 - 800225c: 601a str r2, [r3, #0] - 800225e: 605a str r2, [r3, #4] - 8002260: 609a str r2, [r3, #8] - 8002262: 60da str r2, [r3, #12] + 80023ca: f107 0308 add.w r3, r7, #8 + 80023ce: 2200 movs r2, #0 + 80023d0: 601a str r2, [r3, #0] + 80023d2: 605a str r2, [r3, #4] + 80023d4: 609a str r2, [r3, #8] + 80023d6: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8002264: 463b mov r3, r7 - 8002266: 2200 movs r2, #0 - 8002268: 601a str r2, [r3, #0] - 800226a: 605a str r2, [r3, #4] + 80023d8: 463b mov r3, r7 + 80023da: 2200 movs r2, #0 + 80023dc: 601a str r2, [r3, #0] + 80023de: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM3_Init 1 */ /* USER CODE END TIM3_Init 1 */ htim3.Instance = TIM3; - 800226c: 4b1d ldr r3, [pc, #116] @ (80022e4 ) - 800226e: 4a1e ldr r2, [pc, #120] @ (80022e8 ) - 8002270: 601a str r2, [r3, #0] + 80023e0: 4b1d ldr r3, [pc, #116] @ (8002458 ) + 80023e2: 4a1e ldr r2, [pc, #120] @ (800245c ) + 80023e4: 601a str r2, [r3, #0] htim3.Init.Prescaler = 2; - 8002272: 4b1c ldr r3, [pc, #112] @ (80022e4 ) - 8002274: 2202 movs r2, #2 - 8002276: 605a str r2, [r3, #4] + 80023e6: 4b1c ldr r3, [pc, #112] @ (8002458 ) + 80023e8: 2202 movs r2, #2 + 80023ea: 605a str r2, [r3, #4] htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - 8002278: 4b1a ldr r3, [pc, #104] @ (80022e4 ) - 800227a: 2200 movs r2, #0 - 800227c: 609a str r2, [r3, #8] + 80023ec: 4b1a ldr r3, [pc, #104] @ (8002458 ) + 80023ee: 2200 movs r2, #0 + 80023f0: 609a str r2, [r3, #8] htim3.Init.Period = 999; - 800227e: 4b19 ldr r3, [pc, #100] @ (80022e4 ) - 8002280: f240 32e7 movw r2, #999 @ 0x3e7 - 8002284: 60da str r2, [r3, #12] + 80023f2: 4b19 ldr r3, [pc, #100] @ (8002458 ) + 80023f4: f240 32e7 movw r2, #999 @ 0x3e7 + 80023f8: 60da str r2, [r3, #12] htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8002286: 4b17 ldr r3, [pc, #92] @ (80022e4 ) - 8002288: 2200 movs r2, #0 - 800228a: 611a str r2, [r3, #16] + 80023fa: 4b17 ldr r3, [pc, #92] @ (8002458 ) + 80023fc: 2200 movs r2, #0 + 80023fe: 611a str r2, [r3, #16] htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 800228c: 4b15 ldr r3, [pc, #84] @ (80022e4 ) - 800228e: 2280 movs r2, #128 @ 0x80 - 8002290: 619a str r2, [r3, #24] + 8002400: 4b15 ldr r3, [pc, #84] @ (8002458 ) + 8002402: 2280 movs r2, #128 @ 0x80 + 8002404: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim3) != HAL_OK) - 8002292: 4814 ldr r0, [pc, #80] @ (80022e4 ) - 8002294: f002 fbf0 bl 8004a78 - 8002298: 4603 mov r3, r0 - 800229a: 2b00 cmp r3, #0 - 800229c: d001 beq.n 80022a2 + 8002406: 4814 ldr r0, [pc, #80] @ (8002458 ) + 8002408: f002 fbf0 bl 8004bec + 800240c: 4603 mov r3, r0 + 800240e: 2b00 cmp r3, #0 + 8002410: d001 beq.n 8002416 { Error_Handler(); - 800229e: f7ff fe65 bl 8001f6c + 8002412: f7ff fe65 bl 80020e0 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 80022a2: f44f 5380 mov.w r3, #4096 @ 0x1000 - 80022a6: 60bb str r3, [r7, #8] + 8002416: f44f 5380 mov.w r3, #4096 @ 0x1000 + 800241a: 60bb str r3, [r7, #8] if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) - 80022a8: f107 0308 add.w r3, r7, #8 - 80022ac: 4619 mov r1, r3 - 80022ae: 480d ldr r0, [pc, #52] @ (80022e4 ) - 80022b0: f002 fd74 bl 8004d9c - 80022b4: 4603 mov r3, r0 - 80022b6: 2b00 cmp r3, #0 - 80022b8: d001 beq.n 80022be + 800241c: f107 0308 add.w r3, r7, #8 + 8002420: 4619 mov r1, r3 + 8002422: 480d ldr r0, [pc, #52] @ (8002458 ) + 8002424: f002 fd74 bl 8004f10 + 8002428: 4603 mov r3, r0 + 800242a: 2b00 cmp r3, #0 + 800242c: d001 beq.n 8002432 { Error_Handler(); - 80022ba: f7ff fe57 bl 8001f6c + 800242e: f7ff fe57 bl 80020e0 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 80022be: 2300 movs r3, #0 - 80022c0: 603b str r3, [r7, #0] + 8002432: 2300 movs r3, #0 + 8002434: 603b str r3, [r7, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 80022c2: 2300 movs r3, #0 - 80022c4: 607b str r3, [r7, #4] + 8002436: 2300 movs r3, #0 + 8002438: 607b str r3, [r7, #4] if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - 80022c6: 463b mov r3, r7 - 80022c8: 4619 mov r1, r3 - 80022ca: 4806 ldr r0, [pc, #24] @ (80022e4 ) - 80022cc: f002 ff56 bl 800517c - 80022d0: 4603 mov r3, r0 - 80022d2: 2b00 cmp r3, #0 - 80022d4: d001 beq.n 80022da + 800243a: 463b mov r3, r7 + 800243c: 4619 mov r1, r3 + 800243e: 4806 ldr r0, [pc, #24] @ (8002458 ) + 8002440: f002 ff56 bl 80052f0 + 8002444: 4603 mov r3, r0 + 8002446: 2b00 cmp r3, #0 + 8002448: d001 beq.n 800244e { Error_Handler(); - 80022d6: f7ff fe49 bl 8001f6c + 800244a: f7ff fe49 bl 80020e0 } /* USER CODE BEGIN TIM3_Init 2 */ /* USER CODE END TIM3_Init 2 */ } - 80022da: bf00 nop - 80022dc: 3718 adds r7, #24 - 80022de: 46bd mov sp, r7 - 80022e0: bd80 pop {r7, pc} - 80022e2: bf00 nop - 80022e4: 20000308 .word 0x20000308 - 80022e8: 40000400 .word 0x40000400 + 800244e: bf00 nop + 8002450: 3718 adds r7, #24 + 8002452: 46bd mov sp, r7 + 8002454: bd80 pop {r7, pc} + 8002456: bf00 nop + 8002458: 20000310 .word 0x20000310 + 800245c: 40000400 .word 0x40000400 -080022ec : +08002460 : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { - 80022ec: b580 push {r7, lr} - 80022ee: b084 sub sp, #16 - 80022f0: af00 add r7, sp, #0 - 80022f2: 6078 str r0, [r7, #4] + 8002460: b580 push {r7, lr} + 8002462: b084 sub sp, #16 + 8002464: af00 add r7, sp, #0 + 8002466: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM3) - 80022f4: 687b ldr r3, [r7, #4] - 80022f6: 681b ldr r3, [r3, #0] - 80022f8: 4a0d ldr r2, [pc, #52] @ (8002330 ) - 80022fa: 4293 cmp r3, r2 - 80022fc: d113 bne.n 8002326 + 8002468: 687b ldr r3, [r7, #4] + 800246a: 681b ldr r3, [r3, #0] + 800246c: 4a0d ldr r2, [pc, #52] @ (80024a4 ) + 800246e: 4293 cmp r3, r2 + 8002470: d113 bne.n 800249a { /* USER CODE BEGIN TIM3_MspInit 0 */ /* USER CODE END TIM3_MspInit 0 */ /* TIM3 clock enable */ __HAL_RCC_TIM3_CLK_ENABLE(); - 80022fe: 4b0d ldr r3, [pc, #52] @ (8002334 ) - 8002300: 69db ldr r3, [r3, #28] - 8002302: 4a0c ldr r2, [pc, #48] @ (8002334 ) - 8002304: f043 0302 orr.w r3, r3, #2 - 8002308: 61d3 str r3, [r2, #28] - 800230a: 4b0a ldr r3, [pc, #40] @ (8002334 ) - 800230c: 69db ldr r3, [r3, #28] - 800230e: f003 0302 and.w r3, r3, #2 - 8002312: 60fb str r3, [r7, #12] - 8002314: 68fb ldr r3, [r7, #12] + 8002472: 4b0d ldr r3, [pc, #52] @ (80024a8 ) + 8002474: 69db ldr r3, [r3, #28] + 8002476: 4a0c ldr r2, [pc, #48] @ (80024a8 ) + 8002478: f043 0302 orr.w r3, r3, #2 + 800247c: 61d3 str r3, [r2, #28] + 800247e: 4b0a ldr r3, [pc, #40] @ (80024a8 ) + 8002480: 69db ldr r3, [r3, #28] + 8002482: f003 0302 and.w r3, r3, #2 + 8002486: 60fb str r3, [r7, #12] + 8002488: 68fb ldr r3, [r7, #12] /* TIM3 interrupt Init */ HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0); - 8002316: 2200 movs r2, #0 - 8002318: 2100 movs r1, #0 - 800231a: 201d movs r0, #29 - 800231c: f000 fbfb bl 8002b16 + 800248a: 2200 movs r2, #0 + 800248c: 2100 movs r1, #0 + 800248e: 201d movs r0, #29 + 8002490: f000 fbfb bl 8002c8a HAL_NVIC_EnableIRQ(TIM3_IRQn); - 8002320: 201d movs r0, #29 - 8002322: f000 fc14 bl 8002b4e + 8002494: 201d movs r0, #29 + 8002496: f000 fc14 bl 8002cc2 /* USER CODE BEGIN TIM3_MspInit 1 */ /* USER CODE END TIM3_MspInit 1 */ } } - 8002326: bf00 nop - 8002328: 3710 adds r7, #16 - 800232a: 46bd mov sp, r7 - 800232c: bd80 pop {r7, pc} - 800232e: bf00 nop - 8002330: 40000400 .word 0x40000400 - 8002334: 40021000 .word 0x40021000 + 800249a: bf00 nop + 800249c: 3710 adds r7, #16 + 800249e: 46bd mov sp, r7 + 80024a0: bd80 pop {r7, pc} + 80024a2: bf00 nop + 80024a4: 40000400 .word 0x40000400 + 80024a8: 40021000 .word 0x40021000 -08002338 : +080024ac : UART_HandleTypeDef huart1; /* USART1 init function */ void MX_USART1_UART_Init(void) { - 8002338: b580 push {r7, lr} - 800233a: af00 add r7, sp, #0 + 80024ac: b580 push {r7, lr} + 80024ae: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; - 800233c: 4b11 ldr r3, [pc, #68] @ (8002384 ) - 800233e: 4a12 ldr r2, [pc, #72] @ (8002388 ) - 8002340: 601a str r2, [r3, #0] + 80024b0: 4b11 ldr r3, [pc, #68] @ (80024f8 ) + 80024b2: 4a12 ldr r2, [pc, #72] @ (80024fc ) + 80024b4: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; - 8002342: 4b10 ldr r3, [pc, #64] @ (8002384 ) - 8002344: f44f 32e1 mov.w r2, #115200 @ 0x1c200 - 8002348: 605a str r2, [r3, #4] + 80024b6: 4b10 ldr r3, [pc, #64] @ (80024f8 ) + 80024b8: f44f 32e1 mov.w r2, #115200 @ 0x1c200 + 80024bc: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 800234a: 4b0e ldr r3, [pc, #56] @ (8002384 ) - 800234c: 2200 movs r2, #0 - 800234e: 609a str r2, [r3, #8] + 80024be: 4b0e ldr r3, [pc, #56] @ (80024f8 ) + 80024c0: 2200 movs r2, #0 + 80024c2: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 8002350: 4b0c ldr r3, [pc, #48] @ (8002384 ) - 8002352: 2200 movs r2, #0 - 8002354: 60da str r2, [r3, #12] + 80024c4: 4b0c ldr r3, [pc, #48] @ (80024f8 ) + 80024c6: 2200 movs r2, #0 + 80024c8: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 8002356: 4b0b ldr r3, [pc, #44] @ (8002384 ) - 8002358: 2200 movs r2, #0 - 800235a: 611a str r2, [r3, #16] + 80024ca: 4b0b ldr r3, [pc, #44] @ (80024f8 ) + 80024cc: 2200 movs r2, #0 + 80024ce: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 800235c: 4b09 ldr r3, [pc, #36] @ (8002384 ) - 800235e: 220c movs r2, #12 - 8002360: 615a str r2, [r3, #20] + 80024d0: 4b09 ldr r3, [pc, #36] @ (80024f8 ) + 80024d2: 220c movs r2, #12 + 80024d4: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 8002362: 4b08 ldr r3, [pc, #32] @ (8002384 ) - 8002364: 2200 movs r2, #0 - 8002366: 619a str r2, [r3, #24] + 80024d6: 4b08 ldr r3, [pc, #32] @ (80024f8 ) + 80024d8: 2200 movs r2, #0 + 80024da: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8002368: 4b06 ldr r3, [pc, #24] @ (8002384 ) - 800236a: 2200 movs r2, #0 - 800236c: 61da str r2, [r3, #28] + 80024dc: 4b06 ldr r3, [pc, #24] @ (80024f8 ) + 80024de: 2200 movs r2, #0 + 80024e0: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) - 800236e: 4805 ldr r0, [pc, #20] @ (8002384 ) - 8002370: f002 ff74 bl 800525c - 8002374: 4603 mov r3, r0 - 8002376: 2b00 cmp r3, #0 - 8002378: d001 beq.n 800237e + 80024e2: 4805 ldr r0, [pc, #20] @ (80024f8 ) + 80024e4: f002 ff74 bl 80053d0 + 80024e8: 4603 mov r3, r0 + 80024ea: 2b00 cmp r3, #0 + 80024ec: d001 beq.n 80024f2 { Error_Handler(); - 800237a: f7ff fdf7 bl 8001f6c + 80024ee: f7ff fdf7 bl 80020e0 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } - 800237e: bf00 nop - 8002380: bd80 pop {r7, pc} - 8002382: bf00 nop - 8002384: 20000350 .word 0x20000350 - 8002388: 40013800 .word 0x40013800 + 80024f2: bf00 nop + 80024f4: bd80 pop {r7, pc} + 80024f6: bf00 nop + 80024f8: 20000358 .word 0x20000358 + 80024fc: 40013800 .word 0x40013800 -0800238c : +08002500 : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { - 800238c: b580 push {r7, lr} - 800238e: b088 sub sp, #32 - 8002390: af00 add r7, sp, #0 - 8002392: 6078 str r0, [r7, #4] + 8002500: b580 push {r7, lr} + 8002502: b088 sub sp, #32 + 8002504: af00 add r7, sp, #0 + 8002506: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8002394: f107 0310 add.w r3, r7, #16 - 8002398: 2200 movs r2, #0 - 800239a: 601a str r2, [r3, #0] - 800239c: 605a str r2, [r3, #4] - 800239e: 609a str r2, [r3, #8] - 80023a0: 60da str r2, [r3, #12] + 8002508: f107 0310 add.w r3, r7, #16 + 800250c: 2200 movs r2, #0 + 800250e: 601a str r2, [r3, #0] + 8002510: 605a str r2, [r3, #4] + 8002512: 609a str r2, [r3, #8] + 8002514: 60da str r2, [r3, #12] if(uartHandle->Instance==USART1) - 80023a2: 687b ldr r3, [r7, #4] - 80023a4: 681b ldr r3, [r3, #0] - 80023a6: 4a20 ldr r2, [pc, #128] @ (8002428 ) - 80023a8: 4293 cmp r3, r2 - 80023aa: d139 bne.n 8002420 + 8002516: 687b ldr r3, [r7, #4] + 8002518: 681b ldr r3, [r3, #0] + 800251a: 4a20 ldr r2, [pc, #128] @ (800259c ) + 800251c: 4293 cmp r3, r2 + 800251e: d139 bne.n 8002594 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* USART1 clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); - 80023ac: 4b1f ldr r3, [pc, #124] @ (800242c ) - 80023ae: 699b ldr r3, [r3, #24] - 80023b0: 4a1e ldr r2, [pc, #120] @ (800242c ) - 80023b2: f443 4380 orr.w r3, r3, #16384 @ 0x4000 - 80023b6: 6193 str r3, [r2, #24] - 80023b8: 4b1c ldr r3, [pc, #112] @ (800242c ) - 80023ba: 699b ldr r3, [r3, #24] - 80023bc: f403 4380 and.w r3, r3, #16384 @ 0x4000 - 80023c0: 60fb str r3, [r7, #12] - 80023c2: 68fb ldr r3, [r7, #12] + 8002520: 4b1f ldr r3, [pc, #124] @ (80025a0 ) + 8002522: 699b ldr r3, [r3, #24] + 8002524: 4a1e ldr r2, [pc, #120] @ (80025a0 ) + 8002526: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 800252a: 6193 str r3, [r2, #24] + 800252c: 4b1c ldr r3, [pc, #112] @ (80025a0 ) + 800252e: 699b ldr r3, [r3, #24] + 8002530: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 8002534: 60fb str r3, [r7, #12] + 8002536: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80023c4: 4b19 ldr r3, [pc, #100] @ (800242c ) - 80023c6: 699b ldr r3, [r3, #24] - 80023c8: 4a18 ldr r2, [pc, #96] @ (800242c ) - 80023ca: f043 0304 orr.w r3, r3, #4 - 80023ce: 6193 str r3, [r2, #24] - 80023d0: 4b16 ldr r3, [pc, #88] @ (800242c ) - 80023d2: 699b ldr r3, [r3, #24] - 80023d4: f003 0304 and.w r3, r3, #4 - 80023d8: 60bb str r3, [r7, #8] - 80023da: 68bb ldr r3, [r7, #8] + 8002538: 4b19 ldr r3, [pc, #100] @ (80025a0 ) + 800253a: 699b ldr r3, [r3, #24] + 800253c: 4a18 ldr r2, [pc, #96] @ (80025a0 ) + 800253e: f043 0304 orr.w r3, r3, #4 + 8002542: 6193 str r3, [r2, #24] + 8002544: 4b16 ldr r3, [pc, #88] @ (80025a0 ) + 8002546: 699b ldr r3, [r3, #24] + 8002548: f003 0304 and.w r3, r3, #4 + 800254c: 60bb str r3, [r7, #8] + 800254e: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = TX_RS485_Pin; - 80023dc: f44f 7300 mov.w r3, #512 @ 0x200 - 80023e0: 613b str r3, [r7, #16] + 8002550: f44f 7300 mov.w r3, #512 @ 0x200 + 8002554: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 80023e2: 2302 movs r3, #2 - 80023e4: 617b str r3, [r7, #20] + 8002556: 2302 movs r3, #2 + 8002558: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; - 80023e6: 2301 movs r3, #1 - 80023e8: 61fb str r3, [r7, #28] + 800255a: 2301 movs r3, #1 + 800255c: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_RS485_GPIO_Port, &GPIO_InitStruct); - 80023ea: f107 0310 add.w r3, r7, #16 - 80023ee: 4619 mov r1, r3 - 80023f0: 480f ldr r0, [pc, #60] @ (8002430 ) - 80023f2: f000 fc79 bl 8002ce8 + 800255e: f107 0310 add.w r3, r7, #16 + 8002562: 4619 mov r1, r3 + 8002564: 480f ldr r0, [pc, #60] @ (80025a4 ) + 8002566: f000 fc79 bl 8002e5c GPIO_InitStruct.Pin = RX_RS485_Pin; - 80023f6: f44f 6380 mov.w r3, #1024 @ 0x400 - 80023fa: 613b str r3, [r7, #16] + 800256a: f44f 6380 mov.w r3, #1024 @ 0x400 + 800256e: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 80023fc: 2300 movs r3, #0 - 80023fe: 617b str r3, [r7, #20] + 8002570: 2300 movs r3, #0 + 8002572: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002400: 2300 movs r3, #0 - 8002402: 61bb str r3, [r7, #24] + 8002574: 2300 movs r3, #0 + 8002576: 61bb str r3, [r7, #24] HAL_GPIO_Init(RX_RS485_GPIO_Port, &GPIO_InitStruct); - 8002404: f107 0310 add.w r3, r7, #16 - 8002408: 4619 mov r1, r3 - 800240a: 4809 ldr r0, [pc, #36] @ (8002430 ) - 800240c: f000 fc6c bl 8002ce8 + 8002578: f107 0310 add.w r3, r7, #16 + 800257c: 4619 mov r1, r3 + 800257e: 4809 ldr r0, [pc, #36] @ (80025a4 ) + 8002580: f000 fc6c bl 8002e5c /* USART1 interrupt Init */ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); - 8002410: 2200 movs r2, #0 - 8002412: 2100 movs r1, #0 - 8002414: 2025 movs r0, #37 @ 0x25 - 8002416: f000 fb7e bl 8002b16 + 8002584: 2200 movs r2, #0 + 8002586: 2100 movs r1, #0 + 8002588: 2025 movs r0, #37 @ 0x25 + 800258a: f000 fb7e bl 8002c8a HAL_NVIC_EnableIRQ(USART1_IRQn); - 800241a: 2025 movs r0, #37 @ 0x25 - 800241c: f000 fb97 bl 8002b4e + 800258e: 2025 movs r0, #37 @ 0x25 + 8002590: f000 fb97 bl 8002cc2 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } - 8002420: bf00 nop - 8002422: 3720 adds r7, #32 - 8002424: 46bd mov sp, r7 - 8002426: bd80 pop {r7, pc} - 8002428: 40013800 .word 0x40013800 - 800242c: 40021000 .word 0x40021000 - 8002430: 40010800 .word 0x40010800 + 8002594: bf00 nop + 8002596: 3720 adds r7, #32 + 8002598: 46bd mov sp, r7 + 800259a: bd80 pop {r7, pc} + 800259c: 40013800 .word 0x40013800 + 80025a0: 40021000 .word 0x40021000 + 80025a4: 40010800 .word 0x40010800 -08002434 : +080025a8 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit - 8002434: f7ff ff06 bl 8002244 + 80025a8: f7ff ff06 bl 80023b8 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8002438: 480b ldr r0, [pc, #44] @ (8002468 ) + 80025ac: 480b ldr r0, [pc, #44] @ (80025dc ) ldr r1, =_edata - 800243a: 490c ldr r1, [pc, #48] @ (800246c ) + 80025ae: 490c ldr r1, [pc, #48] @ (80025e0 ) ldr r2, =_sidata - 800243c: 4a0c ldr r2, [pc, #48] @ (8002470 ) + 80025b0: 4a0c ldr r2, [pc, #48] @ (80025e4 ) movs r3, #0 - 800243e: 2300 movs r3, #0 + 80025b2: 2300 movs r3, #0 b LoopCopyDataInit - 8002440: e002 b.n 8002448 + 80025b4: e002 b.n 80025bc -08002442 : +080025b6 : CopyDataInit: ldr r4, [r2, r3] - 8002442: 58d4 ldr r4, [r2, r3] + 80025b6: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 8002444: 50c4 str r4, [r0, r3] + 80025b8: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 8002446: 3304 adds r3, #4 + 80025ba: 3304 adds r3, #4 -08002448 : +080025bc : LoopCopyDataInit: adds r4, r0, r3 - 8002448: 18c4 adds r4, r0, r3 + 80025bc: 18c4 adds r4, r0, r3 cmp r4, r1 - 800244a: 428c cmp r4, r1 + 80025be: 428c cmp r4, r1 bcc CopyDataInit - 800244c: d3f9 bcc.n 8002442 + 80025c0: d3f9 bcc.n 80025b6 /* Zero fill the bss segment. */ ldr r2, =_sbss - 800244e: 4a09 ldr r2, [pc, #36] @ (8002474 ) + 80025c2: 4a09 ldr r2, [pc, #36] @ (80025e8 ) ldr r4, =_ebss - 8002450: 4c09 ldr r4, [pc, #36] @ (8002478 ) + 80025c4: 4c09 ldr r4, [pc, #36] @ (80025ec ) movs r3, #0 - 8002452: 2300 movs r3, #0 + 80025c6: 2300 movs r3, #0 b LoopFillZerobss - 8002454: e001 b.n 800245a + 80025c8: e001 b.n 80025ce -08002456 : +080025ca : FillZerobss: str r3, [r2] - 8002456: 6013 str r3, [r2, #0] + 80025ca: 6013 str r3, [r2, #0] adds r2, r2, #4 - 8002458: 3204 adds r2, #4 + 80025cc: 3204 adds r2, #4 -0800245a : +080025ce : LoopFillZerobss: cmp r2, r4 - 800245a: 42a2 cmp r2, r4 + 80025ce: 42a2 cmp r2, r4 bcc FillZerobss - 800245c: d3fb bcc.n 8002456 + 80025d0: d3fb bcc.n 80025ca /* Call static constructors */ bl __libc_init_array - 800245e: f003 fd21 bl 8005ea4 <__libc_init_array> + 80025d2: f003 fd21 bl 8006018 <__libc_init_array> /* Call the application's entry point.*/ bl main - 8002462: f7ff fb05 bl 8001a70
+ 80025d6: f7ff faef bl 8001bb8
bx lr - 8002466: 4770 bx lr + 80025da: 4770 bx lr ldr r0, =_sdata - 8002468: 20000000 .word 0x20000000 + 80025dc: 20000000 .word 0x20000000 ldr r1, =_edata - 800246c: 20000064 .word 0x20000064 + 80025e0: 20000060 .word 0x20000060 ldr r2, =_sidata - 8002470: 08006170 .word 0x08006170 + 80025e4: 080062e4 .word 0x080062e4 ldr r2, =_sbss - 8002474: 20000064 .word 0x20000064 + 80025e8: 20000060 .word 0x20000060 ldr r4, =_ebss - 8002478: 200004d4 .word 0x200004d4 + 80025ec: 200004dc .word 0x200004dc -0800247c : +080025f0 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 800247c: e7fe b.n 800247c + 80025f0: e7fe b.n 80025f0 ... -08002480 : +080025f4 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 8002480: b580 push {r7, lr} - 8002482: af00 add r7, sp, #0 + 80025f4: b580 push {r7, lr} + 80025f6: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 8002484: 4b08 ldr r3, [pc, #32] @ (80024a8 ) - 8002486: 681b ldr r3, [r3, #0] - 8002488: 4a07 ldr r2, [pc, #28] @ (80024a8 ) - 800248a: f043 0310 orr.w r3, r3, #16 - 800248e: 6013 str r3, [r2, #0] + 80025f8: 4b08 ldr r3, [pc, #32] @ (800261c ) + 80025fa: 681b ldr r3, [r3, #0] + 80025fc: 4a07 ldr r2, [pc, #28] @ (800261c ) + 80025fe: f043 0310 orr.w r3, r3, #16 + 8002602: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 8002490: 2003 movs r0, #3 - 8002492: f000 fb35 bl 8002b00 + 8002604: 2003 movs r0, #3 + 8002606: f000 fb35 bl 8002c74 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); - 8002496: 200f movs r0, #15 - 8002498: f000 f808 bl 80024ac + 800260a: 200f movs r0, #15 + 800260c: f000 f808 bl 8002620 /* Init the low level hardware */ HAL_MspInit(); - 800249c: f7ff fe60 bl 8002160 + 8002610: f7ff fe60 bl 80022d4 /* Return function status */ return HAL_OK; - 80024a0: 2300 movs r3, #0 + 8002614: 2300 movs r3, #0 } - 80024a2: 4618 mov r0, r3 - 80024a4: bd80 pop {r7, pc} - 80024a6: bf00 nop - 80024a8: 40022000 .word 0x40022000 + 8002616: 4618 mov r0, r3 + 8002618: bd80 pop {r7, pc} + 800261a: bf00 nop + 800261c: 40022000 .word 0x40022000 -080024ac : +08002620 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 80024ac: b580 push {r7, lr} - 80024ae: b082 sub sp, #8 - 80024b0: af00 add r7, sp, #0 - 80024b2: 6078 str r0, [r7, #4] + 8002620: b580 push {r7, lr} + 8002622: b082 sub sp, #8 + 8002624: af00 add r7, sp, #0 + 8002626: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 80024b4: 4b12 ldr r3, [pc, #72] @ (8002500 ) - 80024b6: 681a ldr r2, [r3, #0] - 80024b8: 4b12 ldr r3, [pc, #72] @ (8002504 ) - 80024ba: 781b ldrb r3, [r3, #0] - 80024bc: 4619 mov r1, r3 - 80024be: f44f 737a mov.w r3, #1000 @ 0x3e8 - 80024c2: fbb3 f3f1 udiv r3, r3, r1 - 80024c6: fbb2 f3f3 udiv r3, r2, r3 - 80024ca: 4618 mov r0, r3 - 80024cc: f000 fb4d bl 8002b6a - 80024d0: 4603 mov r3, r0 - 80024d2: 2b00 cmp r3, #0 - 80024d4: d001 beq.n 80024da + 8002628: 4b12 ldr r3, [pc, #72] @ (8002674 ) + 800262a: 681a ldr r2, [r3, #0] + 800262c: 4b12 ldr r3, [pc, #72] @ (8002678 ) + 800262e: 781b ldrb r3, [r3, #0] + 8002630: 4619 mov r1, r3 + 8002632: f44f 737a mov.w r3, #1000 @ 0x3e8 + 8002636: fbb3 f3f1 udiv r3, r3, r1 + 800263a: fbb2 f3f3 udiv r3, r2, r3 + 800263e: 4618 mov r0, r3 + 8002640: f000 fb4d bl 8002cde + 8002644: 4603 mov r3, r0 + 8002646: 2b00 cmp r3, #0 + 8002648: d001 beq.n 800264e { return HAL_ERROR; - 80024d6: 2301 movs r3, #1 - 80024d8: e00e b.n 80024f8 + 800264a: 2301 movs r3, #1 + 800264c: e00e b.n 800266c } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 80024da: 687b ldr r3, [r7, #4] - 80024dc: 2b0f cmp r3, #15 - 80024de: d80a bhi.n 80024f6 + 800264e: 687b ldr r3, [r7, #4] + 8002650: 2b0f cmp r3, #15 + 8002652: d80a bhi.n 800266a { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 80024e0: 2200 movs r2, #0 - 80024e2: 6879 ldr r1, [r7, #4] - 80024e4: f04f 30ff mov.w r0, #4294967295 - 80024e8: f000 fb15 bl 8002b16 + 8002654: 2200 movs r2, #0 + 8002656: 6879 ldr r1, [r7, #4] + 8002658: f04f 30ff mov.w r0, #4294967295 + 800265c: f000 fb15 bl 8002c8a uwTickPrio = TickPriority; - 80024ec: 4a06 ldr r2, [pc, #24] @ (8002508 ) - 80024ee: 687b ldr r3, [r7, #4] - 80024f0: 6013 str r3, [r2, #0] + 8002660: 4a06 ldr r2, [pc, #24] @ (800267c ) + 8002662: 687b ldr r3, [r7, #4] + 8002664: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 80024f2: 2300 movs r3, #0 - 80024f4: e000 b.n 80024f8 + 8002666: 2300 movs r3, #0 + 8002668: e000 b.n 800266c return HAL_ERROR; - 80024f6: 2301 movs r3, #1 + 800266a: 2301 movs r3, #1 } - 80024f8: 4618 mov r0, r3 - 80024fa: 3708 adds r7, #8 - 80024fc: 46bd mov sp, r7 - 80024fe: bd80 pop {r7, pc} - 8002500: 20000008 .word 0x20000008 - 8002504: 20000010 .word 0x20000010 - 8002508: 2000000c .word 0x2000000c + 800266c: 4618 mov r0, r3 + 800266e: 3708 adds r7, #8 + 8002670: 46bd mov sp, r7 + 8002672: bd80 pop {r7, pc} + 8002674: 20000004 .word 0x20000004 + 8002678: 2000000c .word 0x2000000c + 800267c: 20000008 .word 0x20000008 -0800250c : +08002680 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 800250c: b480 push {r7} - 800250e: af00 add r7, sp, #0 + 8002680: b480 push {r7} + 8002682: af00 add r7, sp, #0 uwTick += uwTickFreq; - 8002510: 4b05 ldr r3, [pc, #20] @ (8002528 ) - 8002512: 781b ldrb r3, [r3, #0] - 8002514: 461a mov r2, r3 - 8002516: 4b05 ldr r3, [pc, #20] @ (800252c ) - 8002518: 681b ldr r3, [r3, #0] - 800251a: 4413 add r3, r2 - 800251c: 4a03 ldr r2, [pc, #12] @ (800252c ) - 800251e: 6013 str r3, [r2, #0] + 8002684: 4b05 ldr r3, [pc, #20] @ (800269c ) + 8002686: 781b ldrb r3, [r3, #0] + 8002688: 461a mov r2, r3 + 800268a: 4b05 ldr r3, [pc, #20] @ (80026a0 ) + 800268c: 681b ldr r3, [r3, #0] + 800268e: 4413 add r3, r2 + 8002690: 4a03 ldr r2, [pc, #12] @ (80026a0 ) + 8002692: 6013 str r3, [r2, #0] } - 8002520: bf00 nop - 8002522: 46bd mov sp, r7 - 8002524: bc80 pop {r7} - 8002526: 4770 bx lr - 8002528: 20000010 .word 0x20000010 - 800252c: 20000398 .word 0x20000398 + 8002694: bf00 nop + 8002696: 46bd mov sp, r7 + 8002698: bc80 pop {r7} + 800269a: 4770 bx lr + 800269c: 2000000c .word 0x2000000c + 80026a0: 200003a0 .word 0x200003a0 -08002530 : +080026a4 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8002530: b480 push {r7} - 8002532: af00 add r7, sp, #0 + 80026a4: b480 push {r7} + 80026a6: af00 add r7, sp, #0 return uwTick; - 8002534: 4b02 ldr r3, [pc, #8] @ (8002540 ) - 8002536: 681b ldr r3, [r3, #0] + 80026a8: 4b02 ldr r3, [pc, #8] @ (80026b4 ) + 80026aa: 681b ldr r3, [r3, #0] } - 8002538: 4618 mov r0, r3 - 800253a: 46bd mov sp, r7 - 800253c: bc80 pop {r7} - 800253e: 4770 bx lr - 8002540: 20000398 .word 0x20000398 + 80026ac: 4618 mov r0, r3 + 80026ae: 46bd mov sp, r7 + 80026b0: bc80 pop {r7} + 80026b2: 4770 bx lr + 80026b4: 200003a0 .word 0x200003a0 -08002544 : +080026b8 : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { - 8002544: b580 push {r7, lr} - 8002546: b086 sub sp, #24 - 8002548: af00 add r7, sp, #0 - 800254a: 6078 str r0, [r7, #4] + 80026b8: b580 push {r7, lr} + 80026ba: b086 sub sp, #24 + 80026bc: af00 add r7, sp, #0 + 80026be: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 800254c: 2300 movs r3, #0 - 800254e: 75fb strb r3, [r7, #23] + 80026c0: 2300 movs r3, #0 + 80026c2: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; - 8002550: 2300 movs r3, #0 - 8002552: 613b str r3, [r7, #16] + 80026c4: 2300 movs r3, #0 + 80026c6: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; - 8002554: 2300 movs r3, #0 - 8002556: 60bb str r3, [r7, #8] + 80026c8: 2300 movs r3, #0 + 80026ca: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; - 8002558: 2300 movs r3, #0 - 800255a: 60fb str r3, [r7, #12] + 80026cc: 2300 movs r3, #0 + 80026ce: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) - 800255c: 687b ldr r3, [r7, #4] - 800255e: 2b00 cmp r3, #0 - 8002560: d101 bne.n 8002566 + 80026d0: 687b ldr r3, [r7, #4] + 80026d2: 2b00 cmp r3, #0 + 80026d4: d101 bne.n 80026da { return HAL_ERROR; - 8002562: 2301 movs r3, #1 - 8002564: e0be b.n 80026e4 + 80026d6: 2301 movs r3, #1 + 80026d8: e0be b.n 8002858 assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) - 8002566: 687b ldr r3, [r7, #4] - 8002568: 689b ldr r3, [r3, #8] - 800256a: 2b00 cmp r3, #0 + 80026da: 687b ldr r3, [r7, #4] + 80026dc: 689b ldr r3, [r3, #8] + 80026de: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) - 800256c: 687b ldr r3, [r7, #4] - 800256e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002570: 2b00 cmp r3, #0 - 8002572: d109 bne.n 8002588 + 80026e0: 687b ldr r3, [r7, #4] + 80026e2: 6a9b ldr r3, [r3, #40] @ 0x28 + 80026e4: 2b00 cmp r3, #0 + 80026e6: d109 bne.n 80026fc { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); - 8002574: 687b ldr r3, [r7, #4] - 8002576: 2200 movs r2, #0 - 8002578: 62da str r2, [r3, #44] @ 0x2c + 80026e8: 687b ldr r3, [r7, #4] + 80026ea: 2200 movs r2, #0 + 80026ec: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; - 800257a: 687b ldr r3, [r7, #4] - 800257c: 2200 movs r2, #0 - 800257e: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 80026ee: 687b ldr r3, [r7, #4] + 80026f0: 2200 movs r2, #0 + 80026f2: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); - 8002582: 6878 ldr r0, [r7, #4] - 8002584: f7fe fdc8 bl 8001118 + 80026f6: 6878 ldr r0, [r7, #4] + 80026f8: f7fe fdb2 bl 8001260 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); - 8002588: 6878 ldr r0, [r7, #4] - 800258a: f000 f9ab bl 80028e4 - 800258e: 4603 mov r3, r0 - 8002590: 75fb strb r3, [r7, #23] + 80026fc: 6878 ldr r0, [r7, #4] + 80026fe: f000 f9ab bl 8002a58 + 8002702: 4603 mov r3, r0 + 8002704: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && - 8002592: 687b ldr r3, [r7, #4] - 8002594: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002596: f003 0310 and.w r3, r3, #16 - 800259a: 2b00 cmp r3, #0 - 800259c: f040 8099 bne.w 80026d2 - 80025a0: 7dfb ldrb r3, [r7, #23] - 80025a2: 2b00 cmp r3, #0 - 80025a4: f040 8095 bne.w 80026d2 + 8002706: 687b ldr r3, [r7, #4] + 8002708: 6a9b ldr r3, [r3, #40] @ 0x28 + 800270a: f003 0310 and.w r3, r3, #16 + 800270e: 2b00 cmp r3, #0 + 8002710: f040 8099 bne.w 8002846 + 8002714: 7dfb ldrb r3, [r7, #23] + 8002716: 2b00 cmp r3, #0 + 8002718: f040 8095 bne.w 8002846 (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 80025a8: 687b ldr r3, [r7, #4] - 80025aa: 6a9b ldr r3, [r3, #40] @ 0x28 - 80025ac: f423 5388 bic.w r3, r3, #4352 @ 0x1100 - 80025b0: f023 0302 bic.w r3, r3, #2 - 80025b4: f043 0202 orr.w r2, r3, #2 - 80025b8: 687b ldr r3, [r7, #4] - 80025ba: 629a str r2, [r3, #40] @ 0x28 + 800271c: 687b ldr r3, [r7, #4] + 800271e: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002720: f423 5388 bic.w r3, r3, #4352 @ 0x1100 + 8002724: f023 0302 bic.w r3, r3, #2 + 8002728: f043 0202 orr.w r2, r3, #2 + 800272c: 687b ldr r3, [r7, #4] + 800272e: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | - 80025bc: 687b ldr r3, [r7, #4] - 80025be: 685a ldr r2, [r3, #4] + 8002730: 687b ldr r3, [r7, #4] + 8002732: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | - 80025c0: 687b ldr r3, [r7, #4] - 80025c2: 69db ldr r3, [r3, #28] + 8002734: 687b ldr r3, [r7, #4] + 8002736: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | - 80025c4: 431a orrs r2, r3 + 8002738: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); - 80025c6: 687b ldr r3, [r7, #4] - 80025c8: 7b1b ldrb r3, [r3, #12] - 80025ca: 005b lsls r3, r3, #1 + 800273a: 687b ldr r3, [r7, #4] + 800273c: 7b1b ldrb r3, [r3, #12] + 800273e: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | - 80025cc: 4313 orrs r3, r2 + 8002740: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | - 80025ce: 68ba ldr r2, [r7, #8] - 80025d0: 4313 orrs r3, r2 - 80025d2: 60bb str r3, [r7, #8] + 8002742: 68ba ldr r2, [r7, #8] + 8002744: 4313 orrs r3, r2 + 8002746: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); - 80025d4: 687b ldr r3, [r7, #4] - 80025d6: 689b ldr r3, [r3, #8] - 80025d8: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 80025dc: d003 beq.n 80025e6 - 80025de: 687b ldr r3, [r7, #4] - 80025e0: 689b ldr r3, [r3, #8] - 80025e2: 2b01 cmp r3, #1 - 80025e4: d102 bne.n 80025ec - 80025e6: f44f 7380 mov.w r3, #256 @ 0x100 - 80025ea: e000 b.n 80025ee - 80025ec: 2300 movs r3, #0 - 80025ee: 693a ldr r2, [r7, #16] - 80025f0: 4313 orrs r3, r2 - 80025f2: 613b str r3, [r7, #16] + 8002748: 687b ldr r3, [r7, #4] + 800274a: 689b ldr r3, [r3, #8] + 800274c: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8002750: d003 beq.n 800275a + 8002752: 687b ldr r3, [r7, #4] + 8002754: 689b ldr r3, [r3, #8] + 8002756: 2b01 cmp r3, #1 + 8002758: d102 bne.n 8002760 + 800275a: f44f 7380 mov.w r3, #256 @ 0x100 + 800275e: e000 b.n 8002762 + 8002760: 2300 movs r3, #0 + 8002762: 693a ldr r2, [r7, #16] + 8002764: 4313 orrs r3, r2 + 8002766: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) - 80025f4: 687b ldr r3, [r7, #4] - 80025f6: 7d1b ldrb r3, [r3, #20] - 80025f8: 2b01 cmp r3, #1 - 80025fa: d119 bne.n 8002630 + 8002768: 687b ldr r3, [r7, #4] + 800276a: 7d1b ldrb r3, [r3, #20] + 800276c: 2b01 cmp r3, #1 + 800276e: d119 bne.n 80027a4 { if (hadc->Init.ContinuousConvMode == DISABLE) - 80025fc: 687b ldr r3, [r7, #4] - 80025fe: 7b1b ldrb r3, [r3, #12] - 8002600: 2b00 cmp r3, #0 - 8002602: d109 bne.n 8002618 + 8002770: 687b ldr r3, [r7, #4] + 8002772: 7b1b ldrb r3, [r3, #12] + 8002774: 2b00 cmp r3, #0 + 8002776: d109 bne.n 800278c { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | - 8002604: 687b ldr r3, [r7, #4] - 8002606: 699b ldr r3, [r3, #24] - 8002608: 3b01 subs r3, #1 - 800260a: 035a lsls r2, r3, #13 - 800260c: 693b ldr r3, [r7, #16] - 800260e: 4313 orrs r3, r2 - 8002610: f443 6300 orr.w r3, r3, #2048 @ 0x800 - 8002614: 613b str r3, [r7, #16] - 8002616: e00b b.n 8002630 + 8002778: 687b ldr r3, [r7, #4] + 800277a: 699b ldr r3, [r3, #24] + 800277c: 3b01 subs r3, #1 + 800277e: 035a lsls r2, r3, #13 + 8002780: 693b ldr r3, [r7, #16] + 8002782: 4313 orrs r3, r2 + 8002784: f443 6300 orr.w r3, r3, #2048 @ 0x800 + 8002788: 613b str r3, [r7, #16] + 800278a: e00b b.n 80027a4 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8002618: 687b ldr r3, [r7, #4] - 800261a: 6a9b ldr r3, [r3, #40] @ 0x28 - 800261c: f043 0220 orr.w r2, r3, #32 - 8002620: 687b ldr r3, [r7, #4] - 8002622: 629a str r2, [r3, #40] @ 0x28 + 800278c: 687b ldr r3, [r7, #4] + 800278e: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002790: f043 0220 orr.w r2, r3, #32 + 8002794: 687b ldr r3, [r7, #4] + 8002796: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8002624: 687b ldr r3, [r7, #4] - 8002626: 6adb ldr r3, [r3, #44] @ 0x2c - 8002628: f043 0201 orr.w r2, r3, #1 - 800262c: 687b ldr r3, [r7, #4] - 800262e: 62da str r2, [r3, #44] @ 0x2c + 8002798: 687b ldr r3, [r7, #4] + 800279a: 6adb ldr r3, [r3, #44] @ 0x2c + 800279c: f043 0201 orr.w r2, r3, #1 + 80027a0: 687b ldr r3, [r7, #4] + 80027a2: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, - 8002630: 687b ldr r3, [r7, #4] - 8002632: 681b ldr r3, [r3, #0] - 8002634: 685b ldr r3, [r3, #4] - 8002636: f423 4169 bic.w r1, r3, #59648 @ 0xe900 - 800263a: 687b ldr r3, [r7, #4] - 800263c: 681b ldr r3, [r3, #0] - 800263e: 693a ldr r2, [r7, #16] - 8002640: 430a orrs r2, r1 - 8002642: 605a str r2, [r3, #4] + 80027a4: 687b ldr r3, [r7, #4] + 80027a6: 681b ldr r3, [r3, #0] + 80027a8: 685b ldr r3, [r3, #4] + 80027aa: f423 4169 bic.w r1, r3, #59648 @ 0xe900 + 80027ae: 687b ldr r3, [r7, #4] + 80027b0: 681b ldr r3, [r3, #0] + 80027b2: 693a ldr r2, [r7, #16] + 80027b4: 430a orrs r2, r1 + 80027b6: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, - 8002644: 687b ldr r3, [r7, #4] - 8002646: 681b ldr r3, [r3, #0] - 8002648: 689a ldr r2, [r3, #8] - 800264a: 4b28 ldr r3, [pc, #160] @ (80026ec ) - 800264c: 4013 ands r3, r2 - 800264e: 687a ldr r2, [r7, #4] - 8002650: 6812 ldr r2, [r2, #0] - 8002652: 68b9 ldr r1, [r7, #8] - 8002654: 430b orrs r3, r1 - 8002656: 6093 str r3, [r2, #8] + 80027b8: 687b ldr r3, [r7, #4] + 80027ba: 681b ldr r3, [r3, #0] + 80027bc: 689a ldr r2, [r3, #8] + 80027be: 4b28 ldr r3, [pc, #160] @ (8002860 ) + 80027c0: 4013 ands r3, r2 + 80027c2: 687a ldr r2, [r7, #4] + 80027c4: 6812 ldr r2, [r2, #0] + 80027c6: 68b9 ldr r1, [r7, #8] + 80027c8: 430b orrs r3, r1 + 80027ca: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) - 8002658: 687b ldr r3, [r7, #4] - 800265a: 689b ldr r3, [r3, #8] - 800265c: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8002660: d003 beq.n 800266a - 8002662: 687b ldr r3, [r7, #4] - 8002664: 689b ldr r3, [r3, #8] - 8002666: 2b01 cmp r3, #1 - 8002668: d104 bne.n 8002674 + 80027cc: 687b ldr r3, [r7, #4] + 80027ce: 689b ldr r3, [r3, #8] + 80027d0: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80027d4: d003 beq.n 80027de + 80027d6: 687b ldr r3, [r7, #4] + 80027d8: 689b ldr r3, [r3, #8] + 80027da: 2b01 cmp r3, #1 + 80027dc: d104 bne.n 80027e8 { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); - 800266a: 687b ldr r3, [r7, #4] - 800266c: 691b ldr r3, [r3, #16] - 800266e: 3b01 subs r3, #1 - 8002670: 051b lsls r3, r3, #20 - 8002672: 60fb str r3, [r7, #12] + 80027de: 687b ldr r3, [r7, #4] + 80027e0: 691b ldr r3, [r3, #16] + 80027e2: 3b01 subs r3, #1 + 80027e4: 051b lsls r3, r3, #20 + 80027e6: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, - 8002674: 687b ldr r3, [r7, #4] - 8002676: 681b ldr r3, [r3, #0] - 8002678: 6adb ldr r3, [r3, #44] @ 0x2c - 800267a: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 - 800267e: 687b ldr r3, [r7, #4] - 8002680: 681b ldr r3, [r3, #0] - 8002682: 68fa ldr r2, [r7, #12] - 8002684: 430a orrs r2, r1 - 8002686: 62da str r2, [r3, #44] @ 0x2c + 80027e8: 687b ldr r3, [r7, #4] + 80027ea: 681b ldr r3, [r3, #0] + 80027ec: 6adb ldr r3, [r3, #44] @ 0x2c + 80027ee: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 + 80027f2: 687b ldr r3, [r7, #4] + 80027f4: 681b ldr r3, [r3, #0] + 80027f6: 68fa ldr r2, [r7, #12] + 80027f8: 430a orrs r2, r1 + 80027fa: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 8002688: 687b ldr r3, [r7, #4] - 800268a: 681b ldr r3, [r3, #0] - 800268c: 689a ldr r2, [r3, #8] - 800268e: 4b18 ldr r3, [pc, #96] @ (80026f0 ) - 8002690: 4013 ands r3, r2 - 8002692: 68ba ldr r2, [r7, #8] - 8002694: 429a cmp r2, r3 - 8002696: d10b bne.n 80026b0 + 80027fc: 687b ldr r3, [r7, #4] + 80027fe: 681b ldr r3, [r3, #0] + 8002800: 689a ldr r2, [r3, #8] + 8002802: 4b18 ldr r3, [pc, #96] @ (8002864 ) + 8002804: 4013 ands r3, r2 + 8002806: 68ba ldr r2, [r7, #8] + 8002808: 429a cmp r2, r3 + 800280a: d10b bne.n 8002824 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); - 8002698: 687b ldr r3, [r7, #4] - 800269a: 2200 movs r2, #0 - 800269c: 62da str r2, [r3, #44] @ 0x2c + 800280c: 687b ldr r3, [r7, #4] + 800280e: 2200 movs r2, #0 + 8002810: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, - 800269e: 687b ldr r3, [r7, #4] - 80026a0: 6a9b ldr r3, [r3, #40] @ 0x28 - 80026a2: f023 0303 bic.w r3, r3, #3 - 80026a6: f043 0201 orr.w r2, r3, #1 - 80026aa: 687b ldr r3, [r7, #4] - 80026ac: 629a str r2, [r3, #40] @ 0x28 + 8002812: 687b ldr r3, [r7, #4] + 8002814: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002816: f023 0303 bic.w r3, r3, #3 + 800281a: f043 0201 orr.w r2, r3, #1 + 800281e: 687b ldr r3, [r7, #4] + 8002820: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 80026ae: e018 b.n 80026e2 + 8002822: e018 b.n 8002856 HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, - 80026b0: 687b ldr r3, [r7, #4] - 80026b2: 6a9b ldr r3, [r3, #40] @ 0x28 - 80026b4: f023 0312 bic.w r3, r3, #18 - 80026b8: f043 0210 orr.w r2, r3, #16 - 80026bc: 687b ldr r3, [r7, #4] - 80026be: 629a str r2, [r3, #40] @ 0x28 + 8002824: 687b ldr r3, [r7, #4] + 8002826: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002828: f023 0312 bic.w r3, r3, #18 + 800282c: f043 0210 orr.w r2, r3, #16 + 8002830: 687b ldr r3, [r7, #4] + 8002832: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 80026c0: 687b ldr r3, [r7, #4] - 80026c2: 6adb ldr r3, [r3, #44] @ 0x2c - 80026c4: f043 0201 orr.w r2, r3, #1 - 80026c8: 687b ldr r3, [r7, #4] - 80026ca: 62da str r2, [r3, #44] @ 0x2c + 8002834: 687b ldr r3, [r7, #4] + 8002836: 6adb ldr r3, [r3, #44] @ 0x2c + 8002838: f043 0201 orr.w r2, r3, #1 + 800283c: 687b ldr r3, [r7, #4] + 800283e: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; - 80026cc: 2301 movs r3, #1 - 80026ce: 75fb strb r3, [r7, #23] + 8002840: 2301 movs r3, #1 + 8002842: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 80026d0: e007 b.n 80026e2 + 8002844: e007 b.n 8002856 } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 80026d2: 687b ldr r3, [r7, #4] - 80026d4: 6a9b ldr r3, [r3, #40] @ 0x28 - 80026d6: f043 0210 orr.w r2, r3, #16 - 80026da: 687b ldr r3, [r7, #4] - 80026dc: 629a str r2, [r3, #40] @ 0x28 + 8002846: 687b ldr r3, [r7, #4] + 8002848: 6a9b ldr r3, [r3, #40] @ 0x28 + 800284a: f043 0210 orr.w r2, r3, #16 + 800284e: 687b ldr r3, [r7, #4] + 8002850: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; - 80026de: 2301 movs r3, #1 - 80026e0: 75fb strb r3, [r7, #23] + 8002852: 2301 movs r3, #1 + 8002854: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; - 80026e2: 7dfb ldrb r3, [r7, #23] + 8002856: 7dfb ldrb r3, [r7, #23] } - 80026e4: 4618 mov r0, r3 - 80026e6: 3718 adds r7, #24 - 80026e8: 46bd mov sp, r7 - 80026ea: bd80 pop {r7, pc} - 80026ec: ffe1f7fd .word 0xffe1f7fd - 80026f0: ff1f0efe .word 0xff1f0efe + 8002858: 4618 mov r0, r3 + 800285a: 3718 adds r7, #24 + 800285c: 46bd mov sp, r7 + 800285e: bd80 pop {r7, pc} + 8002860: ffe1f7fd .word 0xffe1f7fd + 8002864: ff1f0efe .word 0xff1f0efe -080026f4 : +08002868 : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { - 80026f4: b480 push {r7} - 80026f6: b085 sub sp, #20 - 80026f8: af00 add r7, sp, #0 - 80026fa: 6078 str r0, [r7, #4] - 80026fc: 6039 str r1, [r7, #0] + 8002868: b480 push {r7} + 800286a: b085 sub sp, #20 + 800286c: af00 add r7, sp, #0 + 800286e: 6078 str r0, [r7, #4] + 8002870: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 80026fe: 2300 movs r3, #0 - 8002700: 73fb strb r3, [r7, #15] + 8002872: 2300 movs r3, #0 + 8002874: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; - 8002702: 2300 movs r3, #0 - 8002704: 60bb str r3, [r7, #8] + 8002876: 2300 movs r3, #0 + 8002878: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); - 8002706: 687b ldr r3, [r7, #4] - 8002708: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 - 800270c: 2b01 cmp r3, #1 - 800270e: d101 bne.n 8002714 - 8002710: 2302 movs r3, #2 - 8002712: e0dc b.n 80028ce - 8002714: 687b ldr r3, [r7, #4] - 8002716: 2201 movs r2, #1 - 8002718: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 800287a: 687b ldr r3, [r7, #4] + 800287c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 + 8002880: 2b01 cmp r3, #1 + 8002882: d101 bne.n 8002888 + 8002884: 2302 movs r3, #2 + 8002886: e0dc b.n 8002a42 + 8002888: 687b ldr r3, [r7, #4] + 800288a: 2201 movs r2, #1 + 800288c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) - 800271c: 683b ldr r3, [r7, #0] - 800271e: 685b ldr r3, [r3, #4] - 8002720: 2b06 cmp r3, #6 - 8002722: d81c bhi.n 800275e + 8002890: 683b ldr r3, [r7, #0] + 8002892: 685b ldr r3, [r3, #4] + 8002894: 2b06 cmp r3, #6 + 8002896: d81c bhi.n 80028d2 { MODIFY_REG(hadc->Instance->SQR3 , - 8002724: 687b ldr r3, [r7, #4] - 8002726: 681b ldr r3, [r3, #0] - 8002728: 6b59 ldr r1, [r3, #52] @ 0x34 - 800272a: 683b ldr r3, [r7, #0] - 800272c: 685a ldr r2, [r3, #4] - 800272e: 4613 mov r3, r2 - 8002730: 009b lsls r3, r3, #2 - 8002732: 4413 add r3, r2 - 8002734: 3b05 subs r3, #5 - 8002736: 221f movs r2, #31 - 8002738: fa02 f303 lsl.w r3, r2, r3 - 800273c: 43db mvns r3, r3 - 800273e: 4019 ands r1, r3 - 8002740: 683b ldr r3, [r7, #0] - 8002742: 6818 ldr r0, [r3, #0] - 8002744: 683b ldr r3, [r7, #0] - 8002746: 685a ldr r2, [r3, #4] - 8002748: 4613 mov r3, r2 - 800274a: 009b lsls r3, r3, #2 - 800274c: 4413 add r3, r2 - 800274e: 3b05 subs r3, #5 - 8002750: fa00 f203 lsl.w r2, r0, r3 - 8002754: 687b ldr r3, [r7, #4] - 8002756: 681b ldr r3, [r3, #0] - 8002758: 430a orrs r2, r1 - 800275a: 635a str r2, [r3, #52] @ 0x34 - 800275c: e03c b.n 80027d8 + 8002898: 687b ldr r3, [r7, #4] + 800289a: 681b ldr r3, [r3, #0] + 800289c: 6b59 ldr r1, [r3, #52] @ 0x34 + 800289e: 683b ldr r3, [r7, #0] + 80028a0: 685a ldr r2, [r3, #4] + 80028a2: 4613 mov r3, r2 + 80028a4: 009b lsls r3, r3, #2 + 80028a6: 4413 add r3, r2 + 80028a8: 3b05 subs r3, #5 + 80028aa: 221f movs r2, #31 + 80028ac: fa02 f303 lsl.w r3, r2, r3 + 80028b0: 43db mvns r3, r3 + 80028b2: 4019 ands r1, r3 + 80028b4: 683b ldr r3, [r7, #0] + 80028b6: 6818 ldr r0, [r3, #0] + 80028b8: 683b ldr r3, [r7, #0] + 80028ba: 685a ldr r2, [r3, #4] + 80028bc: 4613 mov r3, r2 + 80028be: 009b lsls r3, r3, #2 + 80028c0: 4413 add r3, r2 + 80028c2: 3b05 subs r3, #5 + 80028c4: fa00 f203 lsl.w r2, r0, r3 + 80028c8: 687b ldr r3, [r7, #4] + 80028ca: 681b ldr r3, [r3, #0] + 80028cc: 430a orrs r2, r1 + 80028ce: 635a str r2, [r3, #52] @ 0x34 + 80028d0: e03c b.n 800294c ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) - 800275e: 683b ldr r3, [r7, #0] - 8002760: 685b ldr r3, [r3, #4] - 8002762: 2b0c cmp r3, #12 - 8002764: d81c bhi.n 80027a0 + 80028d2: 683b ldr r3, [r7, #0] + 80028d4: 685b ldr r3, [r3, #4] + 80028d6: 2b0c cmp r3, #12 + 80028d8: d81c bhi.n 8002914 { MODIFY_REG(hadc->Instance->SQR2 , - 8002766: 687b ldr r3, [r7, #4] - 8002768: 681b ldr r3, [r3, #0] - 800276a: 6b19 ldr r1, [r3, #48] @ 0x30 - 800276c: 683b ldr r3, [r7, #0] - 800276e: 685a ldr r2, [r3, #4] - 8002770: 4613 mov r3, r2 - 8002772: 009b lsls r3, r3, #2 - 8002774: 4413 add r3, r2 - 8002776: 3b23 subs r3, #35 @ 0x23 - 8002778: 221f movs r2, #31 - 800277a: fa02 f303 lsl.w r3, r2, r3 - 800277e: 43db mvns r3, r3 - 8002780: 4019 ands r1, r3 - 8002782: 683b ldr r3, [r7, #0] - 8002784: 6818 ldr r0, [r3, #0] - 8002786: 683b ldr r3, [r7, #0] - 8002788: 685a ldr r2, [r3, #4] - 800278a: 4613 mov r3, r2 - 800278c: 009b lsls r3, r3, #2 - 800278e: 4413 add r3, r2 - 8002790: 3b23 subs r3, #35 @ 0x23 - 8002792: fa00 f203 lsl.w r2, r0, r3 - 8002796: 687b ldr r3, [r7, #4] - 8002798: 681b ldr r3, [r3, #0] - 800279a: 430a orrs r2, r1 - 800279c: 631a str r2, [r3, #48] @ 0x30 - 800279e: e01b b.n 80027d8 + 80028da: 687b ldr r3, [r7, #4] + 80028dc: 681b ldr r3, [r3, #0] + 80028de: 6b19 ldr r1, [r3, #48] @ 0x30 + 80028e0: 683b ldr r3, [r7, #0] + 80028e2: 685a ldr r2, [r3, #4] + 80028e4: 4613 mov r3, r2 + 80028e6: 009b lsls r3, r3, #2 + 80028e8: 4413 add r3, r2 + 80028ea: 3b23 subs r3, #35 @ 0x23 + 80028ec: 221f movs r2, #31 + 80028ee: fa02 f303 lsl.w r3, r2, r3 + 80028f2: 43db mvns r3, r3 + 80028f4: 4019 ands r1, r3 + 80028f6: 683b ldr r3, [r7, #0] + 80028f8: 6818 ldr r0, [r3, #0] + 80028fa: 683b ldr r3, [r7, #0] + 80028fc: 685a ldr r2, [r3, #4] + 80028fe: 4613 mov r3, r2 + 8002900: 009b lsls r3, r3, #2 + 8002902: 4413 add r3, r2 + 8002904: 3b23 subs r3, #35 @ 0x23 + 8002906: fa00 f203 lsl.w r2, r0, r3 + 800290a: 687b ldr r3, [r7, #4] + 800290c: 681b ldr r3, [r3, #0] + 800290e: 430a orrs r2, r1 + 8002910: 631a str r2, [r3, #48] @ 0x30 + 8002912: e01b b.n 800294c ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , - 80027a0: 687b ldr r3, [r7, #4] - 80027a2: 681b ldr r3, [r3, #0] - 80027a4: 6ad9 ldr r1, [r3, #44] @ 0x2c - 80027a6: 683b ldr r3, [r7, #0] - 80027a8: 685a ldr r2, [r3, #4] - 80027aa: 4613 mov r3, r2 - 80027ac: 009b lsls r3, r3, #2 - 80027ae: 4413 add r3, r2 - 80027b0: 3b41 subs r3, #65 @ 0x41 - 80027b2: 221f movs r2, #31 - 80027b4: fa02 f303 lsl.w r3, r2, r3 - 80027b8: 43db mvns r3, r3 - 80027ba: 4019 ands r1, r3 - 80027bc: 683b ldr r3, [r7, #0] - 80027be: 6818 ldr r0, [r3, #0] - 80027c0: 683b ldr r3, [r7, #0] - 80027c2: 685a ldr r2, [r3, #4] - 80027c4: 4613 mov r3, r2 - 80027c6: 009b lsls r3, r3, #2 - 80027c8: 4413 add r3, r2 - 80027ca: 3b41 subs r3, #65 @ 0x41 - 80027cc: fa00 f203 lsl.w r2, r0, r3 - 80027d0: 687b ldr r3, [r7, #4] - 80027d2: 681b ldr r3, [r3, #0] - 80027d4: 430a orrs r2, r1 - 80027d6: 62da str r2, [r3, #44] @ 0x2c + 8002914: 687b ldr r3, [r7, #4] + 8002916: 681b ldr r3, [r3, #0] + 8002918: 6ad9 ldr r1, [r3, #44] @ 0x2c + 800291a: 683b ldr r3, [r7, #0] + 800291c: 685a ldr r2, [r3, #4] + 800291e: 4613 mov r3, r2 + 8002920: 009b lsls r3, r3, #2 + 8002922: 4413 add r3, r2 + 8002924: 3b41 subs r3, #65 @ 0x41 + 8002926: 221f movs r2, #31 + 8002928: fa02 f303 lsl.w r3, r2, r3 + 800292c: 43db mvns r3, r3 + 800292e: 4019 ands r1, r3 + 8002930: 683b ldr r3, [r7, #0] + 8002932: 6818 ldr r0, [r3, #0] + 8002934: 683b ldr r3, [r7, #0] + 8002936: 685a ldr r2, [r3, #4] + 8002938: 4613 mov r3, r2 + 800293a: 009b lsls r3, r3, #2 + 800293c: 4413 add r3, r2 + 800293e: 3b41 subs r3, #65 @ 0x41 + 8002940: fa00 f203 lsl.w r2, r0, r3 + 8002944: 687b ldr r3, [r7, #4] + 8002946: 681b ldr r3, [r3, #0] + 8002948: 430a orrs r2, r1 + 800294a: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) - 80027d8: 683b ldr r3, [r7, #0] - 80027da: 681b ldr r3, [r3, #0] - 80027dc: 2b09 cmp r3, #9 - 80027de: d91c bls.n 800281a + 800294c: 683b ldr r3, [r7, #0] + 800294e: 681b ldr r3, [r3, #0] + 8002950: 2b09 cmp r3, #9 + 8002952: d91c bls.n 800298e { MODIFY_REG(hadc->Instance->SMPR1 , - 80027e0: 687b ldr r3, [r7, #4] - 80027e2: 681b ldr r3, [r3, #0] - 80027e4: 68d9 ldr r1, [r3, #12] - 80027e6: 683b ldr r3, [r7, #0] - 80027e8: 681a ldr r2, [r3, #0] - 80027ea: 4613 mov r3, r2 - 80027ec: 005b lsls r3, r3, #1 - 80027ee: 4413 add r3, r2 - 80027f0: 3b1e subs r3, #30 - 80027f2: 2207 movs r2, #7 - 80027f4: fa02 f303 lsl.w r3, r2, r3 - 80027f8: 43db mvns r3, r3 - 80027fa: 4019 ands r1, r3 - 80027fc: 683b ldr r3, [r7, #0] - 80027fe: 6898 ldr r0, [r3, #8] - 8002800: 683b ldr r3, [r7, #0] - 8002802: 681a ldr r2, [r3, #0] - 8002804: 4613 mov r3, r2 - 8002806: 005b lsls r3, r3, #1 - 8002808: 4413 add r3, r2 - 800280a: 3b1e subs r3, #30 - 800280c: fa00 f203 lsl.w r2, r0, r3 - 8002810: 687b ldr r3, [r7, #4] - 8002812: 681b ldr r3, [r3, #0] - 8002814: 430a orrs r2, r1 - 8002816: 60da str r2, [r3, #12] - 8002818: e019 b.n 800284e + 8002954: 687b ldr r3, [r7, #4] + 8002956: 681b ldr r3, [r3, #0] + 8002958: 68d9 ldr r1, [r3, #12] + 800295a: 683b ldr r3, [r7, #0] + 800295c: 681a ldr r2, [r3, #0] + 800295e: 4613 mov r3, r2 + 8002960: 005b lsls r3, r3, #1 + 8002962: 4413 add r3, r2 + 8002964: 3b1e subs r3, #30 + 8002966: 2207 movs r2, #7 + 8002968: fa02 f303 lsl.w r3, r2, r3 + 800296c: 43db mvns r3, r3 + 800296e: 4019 ands r1, r3 + 8002970: 683b ldr r3, [r7, #0] + 8002972: 6898 ldr r0, [r3, #8] + 8002974: 683b ldr r3, [r7, #0] + 8002976: 681a ldr r2, [r3, #0] + 8002978: 4613 mov r3, r2 + 800297a: 005b lsls r3, r3, #1 + 800297c: 4413 add r3, r2 + 800297e: 3b1e subs r3, #30 + 8002980: fa00 f203 lsl.w r2, r0, r3 + 8002984: 687b ldr r3, [r7, #4] + 8002986: 681b ldr r3, [r3, #0] + 8002988: 430a orrs r2, r1 + 800298a: 60da str r2, [r3, #12] + 800298c: e019 b.n 80029c2 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , - 800281a: 687b ldr r3, [r7, #4] - 800281c: 681b ldr r3, [r3, #0] - 800281e: 6919 ldr r1, [r3, #16] - 8002820: 683b ldr r3, [r7, #0] - 8002822: 681a ldr r2, [r3, #0] - 8002824: 4613 mov r3, r2 - 8002826: 005b lsls r3, r3, #1 - 8002828: 4413 add r3, r2 - 800282a: 2207 movs r2, #7 - 800282c: fa02 f303 lsl.w r3, r2, r3 - 8002830: 43db mvns r3, r3 - 8002832: 4019 ands r1, r3 - 8002834: 683b ldr r3, [r7, #0] - 8002836: 6898 ldr r0, [r3, #8] - 8002838: 683b ldr r3, [r7, #0] - 800283a: 681a ldr r2, [r3, #0] - 800283c: 4613 mov r3, r2 - 800283e: 005b lsls r3, r3, #1 - 8002840: 4413 add r3, r2 - 8002842: fa00 f203 lsl.w r2, r0, r3 - 8002846: 687b ldr r3, [r7, #4] - 8002848: 681b ldr r3, [r3, #0] - 800284a: 430a orrs r2, r1 - 800284c: 611a str r2, [r3, #16] + 800298e: 687b ldr r3, [r7, #4] + 8002990: 681b ldr r3, [r3, #0] + 8002992: 6919 ldr r1, [r3, #16] + 8002994: 683b ldr r3, [r7, #0] + 8002996: 681a ldr r2, [r3, #0] + 8002998: 4613 mov r3, r2 + 800299a: 005b lsls r3, r3, #1 + 800299c: 4413 add r3, r2 + 800299e: 2207 movs r2, #7 + 80029a0: fa02 f303 lsl.w r3, r2, r3 + 80029a4: 43db mvns r3, r3 + 80029a6: 4019 ands r1, r3 + 80029a8: 683b ldr r3, [r7, #0] + 80029aa: 6898 ldr r0, [r3, #8] + 80029ac: 683b ldr r3, [r7, #0] + 80029ae: 681a ldr r2, [r3, #0] + 80029b0: 4613 mov r3, r2 + 80029b2: 005b lsls r3, r3, #1 + 80029b4: 4413 add r3, r2 + 80029b6: fa00 f203 lsl.w r2, r0, r3 + 80029ba: 687b ldr r3, [r7, #4] + 80029bc: 681b ldr r3, [r3, #0] + 80029be: 430a orrs r2, r1 + 80029c0: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 800284e: 683b ldr r3, [r7, #0] - 8002850: 681b ldr r3, [r3, #0] - 8002852: 2b10 cmp r3, #16 - 8002854: d003 beq.n 800285e + 80029c2: 683b ldr r3, [r7, #0] + 80029c4: 681b ldr r3, [r3, #0] + 80029c6: 2b10 cmp r3, #16 + 80029c8: d003 beq.n 80029d2 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) - 8002856: 683b ldr r3, [r7, #0] - 8002858: 681b ldr r3, [r3, #0] + 80029ca: 683b ldr r3, [r7, #0] + 80029cc: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 800285a: 2b11 cmp r3, #17 - 800285c: d132 bne.n 80028c4 + 80029ce: 2b11 cmp r3, #17 + 80029d0: d132 bne.n 8002a38 { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) - 800285e: 687b ldr r3, [r7, #4] - 8002860: 681b ldr r3, [r3, #0] - 8002862: 4a1d ldr r2, [pc, #116] @ (80028d8 ) - 8002864: 4293 cmp r3, r2 - 8002866: d125 bne.n 80028b4 + 80029d2: 687b ldr r3, [r7, #4] + 80029d4: 681b ldr r3, [r3, #0] + 80029d6: 4a1d ldr r2, [pc, #116] @ (8002a4c ) + 80029d8: 4293 cmp r3, r2 + 80029da: d125 bne.n 8002a28 { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) - 8002868: 687b ldr r3, [r7, #4] - 800286a: 681b ldr r3, [r3, #0] - 800286c: 689b ldr r3, [r3, #8] - 800286e: f403 0300 and.w r3, r3, #8388608 @ 0x800000 - 8002872: 2b00 cmp r3, #0 - 8002874: d126 bne.n 80028c4 + 80029dc: 687b ldr r3, [r7, #4] + 80029de: 681b ldr r3, [r3, #0] + 80029e0: 689b ldr r3, [r3, #8] + 80029e2: f403 0300 and.w r3, r3, #8388608 @ 0x800000 + 80029e6: 2b00 cmp r3, #0 + 80029e8: d126 bne.n 8002a38 { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); - 8002876: 687b ldr r3, [r7, #4] - 8002878: 681b ldr r3, [r3, #0] - 800287a: 689a ldr r2, [r3, #8] - 800287c: 687b ldr r3, [r7, #4] - 800287e: 681b ldr r3, [r3, #0] - 8002880: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 - 8002884: 609a str r2, [r3, #8] + 80029ea: 687b ldr r3, [r7, #4] + 80029ec: 681b ldr r3, [r3, #0] + 80029ee: 689a ldr r2, [r3, #8] + 80029f0: 687b ldr r3, [r7, #4] + 80029f2: 681b ldr r3, [r3, #0] + 80029f4: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 + 80029f8: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) - 8002886: 683b ldr r3, [r7, #0] - 8002888: 681b ldr r3, [r3, #0] - 800288a: 2b10 cmp r3, #16 - 800288c: d11a bne.n 80028c4 + 80029fa: 683b ldr r3, [r7, #0] + 80029fc: 681b ldr r3, [r3, #0] + 80029fe: 2b10 cmp r3, #16 + 8002a00: d11a bne.n 8002a38 { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); - 800288e: 4b13 ldr r3, [pc, #76] @ (80028dc ) - 8002890: 681b ldr r3, [r3, #0] - 8002892: 4a13 ldr r2, [pc, #76] @ (80028e0 ) - 8002894: fba2 2303 umull r2, r3, r2, r3 - 8002898: 0c9a lsrs r2, r3, #18 - 800289a: 4613 mov r3, r2 - 800289c: 009b lsls r3, r3, #2 - 800289e: 4413 add r3, r2 - 80028a0: 005b lsls r3, r3, #1 - 80028a2: 60bb str r3, [r7, #8] + 8002a02: 4b13 ldr r3, [pc, #76] @ (8002a50 ) + 8002a04: 681b ldr r3, [r3, #0] + 8002a06: 4a13 ldr r2, [pc, #76] @ (8002a54 ) + 8002a08: fba2 2303 umull r2, r3, r2, r3 + 8002a0c: 0c9a lsrs r2, r3, #18 + 8002a0e: 4613 mov r3, r2 + 8002a10: 009b lsls r3, r3, #2 + 8002a12: 4413 add r3, r2 + 8002a14: 005b lsls r3, r3, #1 + 8002a16: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 80028a4: e002 b.n 80028ac + 8002a18: e002 b.n 8002a20 { wait_loop_index--; - 80028a6: 68bb ldr r3, [r7, #8] - 80028a8: 3b01 subs r3, #1 - 80028aa: 60bb str r3, [r7, #8] + 8002a1a: 68bb ldr r3, [r7, #8] + 8002a1c: 3b01 subs r3, #1 + 8002a1e: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 80028ac: 68bb ldr r3, [r7, #8] - 80028ae: 2b00 cmp r3, #0 - 80028b0: d1f9 bne.n 80028a6 - 80028b2: e007 b.n 80028c4 + 8002a20: 68bb ldr r3, [r7, #8] + 8002a22: 2b00 cmp r3, #0 + 8002a24: d1f9 bne.n 8002a1a + 8002a26: e007 b.n 8002a38 } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 80028b4: 687b ldr r3, [r7, #4] - 80028b6: 6a9b ldr r3, [r3, #40] @ 0x28 - 80028b8: f043 0220 orr.w r2, r3, #32 - 80028bc: 687b ldr r3, [r7, #4] - 80028be: 629a str r2, [r3, #40] @ 0x28 + 8002a28: 687b ldr r3, [r7, #4] + 8002a2a: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002a2c: f043 0220 orr.w r2, r3, #32 + 8002a30: 687b ldr r3, [r7, #4] + 8002a32: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; - 80028c0: 2301 movs r3, #1 - 80028c2: 73fb strb r3, [r7, #15] + 8002a34: 2301 movs r3, #1 + 8002a36: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); - 80028c4: 687b ldr r3, [r7, #4] - 80028c6: 2200 movs r2, #0 - 80028c8: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 8002a38: 687b ldr r3, [r7, #4] + 8002a3a: 2200 movs r2, #0 + 8002a3c: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; - 80028cc: 7bfb ldrb r3, [r7, #15] + 8002a40: 7bfb ldrb r3, [r7, #15] } - 80028ce: 4618 mov r0, r3 - 80028d0: 3714 adds r7, #20 - 80028d2: 46bd mov sp, r7 - 80028d4: bc80 pop {r7} - 80028d6: 4770 bx lr - 80028d8: 40012400 .word 0x40012400 - 80028dc: 20000008 .word 0x20000008 - 80028e0: 431bde83 .word 0x431bde83 + 8002a42: 4618 mov r0, r3 + 8002a44: 3714 adds r7, #20 + 8002a46: 46bd mov sp, r7 + 8002a48: bc80 pop {r7} + 8002a4a: 4770 bx lr + 8002a4c: 40012400 .word 0x40012400 + 8002a50: 20000004 .word 0x20000004 + 8002a54: 431bde83 .word 0x431bde83 -080028e4 : +08002a58 : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { - 80028e4: b580 push {r7, lr} - 80028e6: b084 sub sp, #16 - 80028e8: af00 add r7, sp, #0 - 80028ea: 6078 str r0, [r7, #4] + 8002a58: b580 push {r7, lr} + 8002a5a: b084 sub sp, #16 + 8002a5c: af00 add r7, sp, #0 + 8002a5e: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; - 80028ec: 2300 movs r3, #0 - 80028ee: 60fb str r3, [r7, #12] + 8002a60: 2300 movs r3, #0 + 8002a62: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) - 80028f0: 687b ldr r3, [r7, #4] - 80028f2: 681b ldr r3, [r3, #0] - 80028f4: 689b ldr r3, [r3, #8] - 80028f6: f003 0301 and.w r3, r3, #1 - 80028fa: 2b01 cmp r3, #1 - 80028fc: d12e bne.n 800295c + 8002a64: 687b ldr r3, [r7, #4] + 8002a66: 681b ldr r3, [r3, #0] + 8002a68: 689b ldr r3, [r3, #8] + 8002a6a: f003 0301 and.w r3, r3, #1 + 8002a6e: 2b01 cmp r3, #1 + 8002a70: d12e bne.n 8002ad0 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); - 80028fe: 687b ldr r3, [r7, #4] - 8002900: 681b ldr r3, [r3, #0] - 8002902: 689a ldr r2, [r3, #8] - 8002904: 687b ldr r3, [r7, #4] - 8002906: 681b ldr r3, [r3, #0] - 8002908: f022 0201 bic.w r2, r2, #1 - 800290c: 609a str r2, [r3, #8] + 8002a72: 687b ldr r3, [r7, #4] + 8002a74: 681b ldr r3, [r3, #0] + 8002a76: 689a ldr r2, [r3, #8] + 8002a78: 687b ldr r3, [r7, #4] + 8002a7a: 681b ldr r3, [r3, #0] + 8002a7c: f022 0201 bic.w r2, r2, #1 + 8002a80: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); - 800290e: f7ff fe0f bl 8002530 - 8002912: 60f8 str r0, [r7, #12] + 8002a82: f7ff fe0f bl 80026a4 + 8002a86: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) - 8002914: e01b b.n 800294e + 8002a88: e01b b.n 8002ac2 { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) - 8002916: f7ff fe0b bl 8002530 - 800291a: 4602 mov r2, r0 - 800291c: 68fb ldr r3, [r7, #12] - 800291e: 1ad3 subs r3, r2, r3 - 8002920: 2b02 cmp r3, #2 - 8002922: d914 bls.n 800294e + 8002a8a: f7ff fe0b bl 80026a4 + 8002a8e: 4602 mov r2, r0 + 8002a90: 68fb ldr r3, [r7, #12] + 8002a92: 1ad3 subs r3, r2, r3 + 8002a94: 2b02 cmp r3, #2 + 8002a96: d914 bls.n 8002ac2 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) - 8002924: 687b ldr r3, [r7, #4] - 8002926: 681b ldr r3, [r3, #0] - 8002928: 689b ldr r3, [r3, #8] - 800292a: f003 0301 and.w r3, r3, #1 - 800292e: 2b01 cmp r3, #1 - 8002930: d10d bne.n 800294e + 8002a98: 687b ldr r3, [r7, #4] + 8002a9a: 681b ldr r3, [r3, #0] + 8002a9c: 689b ldr r3, [r3, #8] + 8002a9e: f003 0301 and.w r3, r3, #1 + 8002aa2: 2b01 cmp r3, #1 + 8002aa4: d10d bne.n 8002ac2 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8002932: 687b ldr r3, [r7, #4] - 8002934: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002936: f043 0210 orr.w r2, r3, #16 - 800293a: 687b ldr r3, [r7, #4] - 800293c: 629a str r2, [r3, #40] @ 0x28 + 8002aa6: 687b ldr r3, [r7, #4] + 8002aa8: 6a9b ldr r3, [r3, #40] @ 0x28 + 8002aaa: f043 0210 orr.w r2, r3, #16 + 8002aae: 687b ldr r3, [r7, #4] + 8002ab0: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 800293e: 687b ldr r3, [r7, #4] - 8002940: 6adb ldr r3, [r3, #44] @ 0x2c - 8002942: f043 0201 orr.w r2, r3, #1 - 8002946: 687b ldr r3, [r7, #4] - 8002948: 62da str r2, [r3, #44] @ 0x2c + 8002ab2: 687b ldr r3, [r7, #4] + 8002ab4: 6adb ldr r3, [r3, #44] @ 0x2c + 8002ab6: f043 0201 orr.w r2, r3, #1 + 8002aba: 687b ldr r3, [r7, #4] + 8002abc: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; - 800294a: 2301 movs r3, #1 - 800294c: e007 b.n 800295e + 8002abe: 2301 movs r3, #1 + 8002ac0: e007 b.n 8002ad2 while(ADC_IS_ENABLE(hadc) != RESET) - 800294e: 687b ldr r3, [r7, #4] - 8002950: 681b ldr r3, [r3, #0] - 8002952: 689b ldr r3, [r3, #8] - 8002954: f003 0301 and.w r3, r3, #1 - 8002958: 2b01 cmp r3, #1 - 800295a: d0dc beq.n 8002916 + 8002ac2: 687b ldr r3, [r7, #4] + 8002ac4: 681b ldr r3, [r3, #0] + 8002ac6: 689b ldr r3, [r3, #8] + 8002ac8: f003 0301 and.w r3, r3, #1 + 8002acc: 2b01 cmp r3, #1 + 8002ace: d0dc beq.n 8002a8a } } } /* Return HAL status */ return HAL_OK; - 800295c: 2300 movs r3, #0 + 8002ad0: 2300 movs r3, #0 } - 800295e: 4618 mov r0, r3 - 8002960: 3710 adds r7, #16 - 8002962: 46bd mov sp, r7 - 8002964: bd80 pop {r7, pc} + 8002ad2: 4618 mov r0, r3 + 8002ad4: 3710 adds r7, #16 + 8002ad6: 46bd mov sp, r7 + 8002ad8: bd80 pop {r7, pc} ... -08002968 <__NVIC_SetPriorityGrouping>: +08002adc <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8002968: b480 push {r7} - 800296a: b085 sub sp, #20 - 800296c: af00 add r7, sp, #0 - 800296e: 6078 str r0, [r7, #4] + 8002adc: b480 push {r7} + 8002ade: b085 sub sp, #20 + 8002ae0: af00 add r7, sp, #0 + 8002ae2: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8002970: 687b ldr r3, [r7, #4] - 8002972: f003 0307 and.w r3, r3, #7 - 8002976: 60fb str r3, [r7, #12] + 8002ae4: 687b ldr r3, [r7, #4] + 8002ae6: f003 0307 and.w r3, r3, #7 + 8002aea: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 8002978: 4b0c ldr r3, [pc, #48] @ (80029ac <__NVIC_SetPriorityGrouping+0x44>) - 800297a: 68db ldr r3, [r3, #12] - 800297c: 60bb str r3, [r7, #8] + 8002aec: 4b0c ldr r3, [pc, #48] @ (8002b20 <__NVIC_SetPriorityGrouping+0x44>) + 8002aee: 68db ldr r3, [r3, #12] + 8002af0: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 800297e: 68ba ldr r2, [r7, #8] - 8002980: f64f 03ff movw r3, #63743 @ 0xf8ff - 8002984: 4013 ands r3, r2 - 8002986: 60bb str r3, [r7, #8] + 8002af2: 68ba ldr r2, [r7, #8] + 8002af4: f64f 03ff movw r3, #63743 @ 0xf8ff + 8002af8: 4013 ands r3, r2 + 8002afa: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 8002988: 68fb ldr r3, [r7, #12] - 800298a: 021a lsls r2, r3, #8 + 8002afc: 68fb ldr r3, [r7, #12] + 8002afe: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 800298c: 68bb ldr r3, [r7, #8] - 800298e: 4313 orrs r3, r2 + 8002b00: 68bb ldr r3, [r7, #8] + 8002b02: 4313 orrs r3, r2 reg_value = (reg_value | - 8002990: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 - 8002994: f443 3300 orr.w r3, r3, #131072 @ 0x20000 - 8002998: 60bb str r3, [r7, #8] + 8002b04: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 + 8002b08: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 8002b0c: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 800299a: 4a04 ldr r2, [pc, #16] @ (80029ac <__NVIC_SetPriorityGrouping+0x44>) - 800299c: 68bb ldr r3, [r7, #8] - 800299e: 60d3 str r3, [r2, #12] + 8002b0e: 4a04 ldr r2, [pc, #16] @ (8002b20 <__NVIC_SetPriorityGrouping+0x44>) + 8002b10: 68bb ldr r3, [r7, #8] + 8002b12: 60d3 str r3, [r2, #12] } - 80029a0: bf00 nop - 80029a2: 3714 adds r7, #20 - 80029a4: 46bd mov sp, r7 - 80029a6: bc80 pop {r7} - 80029a8: 4770 bx lr - 80029aa: bf00 nop - 80029ac: e000ed00 .word 0xe000ed00 + 8002b14: bf00 nop + 8002b16: 3714 adds r7, #20 + 8002b18: 46bd mov sp, r7 + 8002b1a: bc80 pop {r7} + 8002b1c: 4770 bx lr + 8002b1e: bf00 nop + 8002b20: e000ed00 .word 0xe000ed00 -080029b0 <__NVIC_GetPriorityGrouping>: +08002b24 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 80029b0: b480 push {r7} - 80029b2: af00 add r7, sp, #0 + 8002b24: b480 push {r7} + 8002b26: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 80029b4: 4b04 ldr r3, [pc, #16] @ (80029c8 <__NVIC_GetPriorityGrouping+0x18>) - 80029b6: 68db ldr r3, [r3, #12] - 80029b8: 0a1b lsrs r3, r3, #8 - 80029ba: f003 0307 and.w r3, r3, #7 + 8002b28: 4b04 ldr r3, [pc, #16] @ (8002b3c <__NVIC_GetPriorityGrouping+0x18>) + 8002b2a: 68db ldr r3, [r3, #12] + 8002b2c: 0a1b lsrs r3, r3, #8 + 8002b2e: f003 0307 and.w r3, r3, #7 } - 80029be: 4618 mov r0, r3 - 80029c0: 46bd mov sp, r7 - 80029c2: bc80 pop {r7} - 80029c4: 4770 bx lr - 80029c6: bf00 nop - 80029c8: e000ed00 .word 0xe000ed00 + 8002b32: 4618 mov r0, r3 + 8002b34: 46bd mov sp, r7 + 8002b36: bc80 pop {r7} + 8002b38: 4770 bx lr + 8002b3a: bf00 nop + 8002b3c: e000ed00 .word 0xe000ed00 -080029cc <__NVIC_EnableIRQ>: +08002b40 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { - 80029cc: b480 push {r7} - 80029ce: b083 sub sp, #12 - 80029d0: af00 add r7, sp, #0 - 80029d2: 4603 mov r3, r0 - 80029d4: 71fb strb r3, [r7, #7] + 8002b40: b480 push {r7} + 8002b42: b083 sub sp, #12 + 8002b44: af00 add r7, sp, #0 + 8002b46: 4603 mov r3, r0 + 8002b48: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 80029d6: f997 3007 ldrsb.w r3, [r7, #7] - 80029da: 2b00 cmp r3, #0 - 80029dc: db0b blt.n 80029f6 <__NVIC_EnableIRQ+0x2a> + 8002b4a: f997 3007 ldrsb.w r3, [r7, #7] + 8002b4e: 2b00 cmp r3, #0 + 8002b50: db0b blt.n 8002b6a <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 80029de: 79fb ldrb r3, [r7, #7] - 80029e0: f003 021f and.w r2, r3, #31 - 80029e4: 4906 ldr r1, [pc, #24] @ (8002a00 <__NVIC_EnableIRQ+0x34>) - 80029e6: f997 3007 ldrsb.w r3, [r7, #7] - 80029ea: 095b lsrs r3, r3, #5 - 80029ec: 2001 movs r0, #1 - 80029ee: fa00 f202 lsl.w r2, r0, r2 - 80029f2: f841 2023 str.w r2, [r1, r3, lsl #2] + 8002b52: 79fb ldrb r3, [r7, #7] + 8002b54: f003 021f and.w r2, r3, #31 + 8002b58: 4906 ldr r1, [pc, #24] @ (8002b74 <__NVIC_EnableIRQ+0x34>) + 8002b5a: f997 3007 ldrsb.w r3, [r7, #7] + 8002b5e: 095b lsrs r3, r3, #5 + 8002b60: 2001 movs r0, #1 + 8002b62: fa00 f202 lsl.w r2, r0, r2 + 8002b66: f841 2023 str.w r2, [r1, r3, lsl #2] } } - 80029f6: bf00 nop - 80029f8: 370c adds r7, #12 - 80029fa: 46bd mov sp, r7 - 80029fc: bc80 pop {r7} - 80029fe: 4770 bx lr - 8002a00: e000e100 .word 0xe000e100 + 8002b6a: bf00 nop + 8002b6c: 370c adds r7, #12 + 8002b6e: 46bd mov sp, r7 + 8002b70: bc80 pop {r7} + 8002b72: 4770 bx lr + 8002b74: e000e100 .word 0xe000e100 -08002a04 <__NVIC_SetPriority>: +08002b78 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8002a04: b480 push {r7} - 8002a06: b083 sub sp, #12 - 8002a08: af00 add r7, sp, #0 - 8002a0a: 4603 mov r3, r0 - 8002a0c: 6039 str r1, [r7, #0] - 8002a0e: 71fb strb r3, [r7, #7] + 8002b78: b480 push {r7} + 8002b7a: b083 sub sp, #12 + 8002b7c: af00 add r7, sp, #0 + 8002b7e: 4603 mov r3, r0 + 8002b80: 6039 str r1, [r7, #0] + 8002b82: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8002a10: f997 3007 ldrsb.w r3, [r7, #7] - 8002a14: 2b00 cmp r3, #0 - 8002a16: db0a blt.n 8002a2e <__NVIC_SetPriority+0x2a> + 8002b84: f997 3007 ldrsb.w r3, [r7, #7] + 8002b88: 2b00 cmp r3, #0 + 8002b8a: db0a blt.n 8002ba2 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8002a18: 683b ldr r3, [r7, #0] - 8002a1a: b2da uxtb r2, r3 - 8002a1c: 490c ldr r1, [pc, #48] @ (8002a50 <__NVIC_SetPriority+0x4c>) - 8002a1e: f997 3007 ldrsb.w r3, [r7, #7] - 8002a22: 0112 lsls r2, r2, #4 - 8002a24: b2d2 uxtb r2, r2 - 8002a26: 440b add r3, r1 - 8002a28: f883 2300 strb.w r2, [r3, #768] @ 0x300 + 8002b8c: 683b ldr r3, [r7, #0] + 8002b8e: b2da uxtb r2, r3 + 8002b90: 490c ldr r1, [pc, #48] @ (8002bc4 <__NVIC_SetPriority+0x4c>) + 8002b92: f997 3007 ldrsb.w r3, [r7, #7] + 8002b96: 0112 lsls r2, r2, #4 + 8002b98: b2d2 uxtb r2, r2 + 8002b9a: 440b add r3, r1 + 8002b9c: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 8002a2c: e00a b.n 8002a44 <__NVIC_SetPriority+0x40> + 8002ba0: e00a b.n 8002bb8 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8002a2e: 683b ldr r3, [r7, #0] - 8002a30: b2da uxtb r2, r3 - 8002a32: 4908 ldr r1, [pc, #32] @ (8002a54 <__NVIC_SetPriority+0x50>) - 8002a34: 79fb ldrb r3, [r7, #7] - 8002a36: f003 030f and.w r3, r3, #15 - 8002a3a: 3b04 subs r3, #4 - 8002a3c: 0112 lsls r2, r2, #4 - 8002a3e: b2d2 uxtb r2, r2 - 8002a40: 440b add r3, r1 - 8002a42: 761a strb r2, [r3, #24] + 8002ba2: 683b ldr r3, [r7, #0] + 8002ba4: b2da uxtb r2, r3 + 8002ba6: 4908 ldr r1, [pc, #32] @ (8002bc8 <__NVIC_SetPriority+0x50>) + 8002ba8: 79fb ldrb r3, [r7, #7] + 8002baa: f003 030f and.w r3, r3, #15 + 8002bae: 3b04 subs r3, #4 + 8002bb0: 0112 lsls r2, r2, #4 + 8002bb2: b2d2 uxtb r2, r2 + 8002bb4: 440b add r3, r1 + 8002bb6: 761a strb r2, [r3, #24] } - 8002a44: bf00 nop - 8002a46: 370c adds r7, #12 - 8002a48: 46bd mov sp, r7 - 8002a4a: bc80 pop {r7} - 8002a4c: 4770 bx lr - 8002a4e: bf00 nop - 8002a50: e000e100 .word 0xe000e100 - 8002a54: e000ed00 .word 0xe000ed00 + 8002bb8: bf00 nop + 8002bba: 370c adds r7, #12 + 8002bbc: 46bd mov sp, r7 + 8002bbe: bc80 pop {r7} + 8002bc0: 4770 bx lr + 8002bc2: bf00 nop + 8002bc4: e000e100 .word 0xe000e100 + 8002bc8: e000ed00 .word 0xe000ed00 -08002a58 : +08002bcc : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 8002a58: b480 push {r7} - 8002a5a: b089 sub sp, #36 @ 0x24 - 8002a5c: af00 add r7, sp, #0 - 8002a5e: 60f8 str r0, [r7, #12] - 8002a60: 60b9 str r1, [r7, #8] - 8002a62: 607a str r2, [r7, #4] + 8002bcc: b480 push {r7} + 8002bce: b089 sub sp, #36 @ 0x24 + 8002bd0: af00 add r7, sp, #0 + 8002bd2: 60f8 str r0, [r7, #12] + 8002bd4: 60b9 str r1, [r7, #8] + 8002bd6: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8002a64: 68fb ldr r3, [r7, #12] - 8002a66: f003 0307 and.w r3, r3, #7 - 8002a6a: 61fb str r3, [r7, #28] + 8002bd8: 68fb ldr r3, [r7, #12] + 8002bda: f003 0307 and.w r3, r3, #7 + 8002bde: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8002a6c: 69fb ldr r3, [r7, #28] - 8002a6e: f1c3 0307 rsb r3, r3, #7 - 8002a72: 2b04 cmp r3, #4 - 8002a74: bf28 it cs - 8002a76: 2304 movcs r3, #4 - 8002a78: 61bb str r3, [r7, #24] + 8002be0: 69fb ldr r3, [r7, #28] + 8002be2: f1c3 0307 rsb r3, r3, #7 + 8002be6: 2b04 cmp r3, #4 + 8002be8: bf28 it cs + 8002bea: 2304 movcs r3, #4 + 8002bec: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 8002a7a: 69fb ldr r3, [r7, #28] - 8002a7c: 3304 adds r3, #4 - 8002a7e: 2b06 cmp r3, #6 - 8002a80: d902 bls.n 8002a88 - 8002a82: 69fb ldr r3, [r7, #28] - 8002a84: 3b03 subs r3, #3 - 8002a86: e000 b.n 8002a8a - 8002a88: 2300 movs r3, #0 - 8002a8a: 617b str r3, [r7, #20] + 8002bee: 69fb ldr r3, [r7, #28] + 8002bf0: 3304 adds r3, #4 + 8002bf2: 2b06 cmp r3, #6 + 8002bf4: d902 bls.n 8002bfc + 8002bf6: 69fb ldr r3, [r7, #28] + 8002bf8: 3b03 subs r3, #3 + 8002bfa: e000 b.n 8002bfe + 8002bfc: 2300 movs r3, #0 + 8002bfe: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8002a8c: f04f 32ff mov.w r2, #4294967295 - 8002a90: 69bb ldr r3, [r7, #24] - 8002a92: fa02 f303 lsl.w r3, r2, r3 - 8002a96: 43da mvns r2, r3 - 8002a98: 68bb ldr r3, [r7, #8] - 8002a9a: 401a ands r2, r3 - 8002a9c: 697b ldr r3, [r7, #20] - 8002a9e: 409a lsls r2, r3 + 8002c00: f04f 32ff mov.w r2, #4294967295 + 8002c04: 69bb ldr r3, [r7, #24] + 8002c06: fa02 f303 lsl.w r3, r2, r3 + 8002c0a: 43da mvns r2, r3 + 8002c0c: 68bb ldr r3, [r7, #8] + 8002c0e: 401a ands r2, r3 + 8002c10: 697b ldr r3, [r7, #20] + 8002c12: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8002aa0: f04f 31ff mov.w r1, #4294967295 - 8002aa4: 697b ldr r3, [r7, #20] - 8002aa6: fa01 f303 lsl.w r3, r1, r3 - 8002aaa: 43d9 mvns r1, r3 - 8002aac: 687b ldr r3, [r7, #4] - 8002aae: 400b ands r3, r1 + 8002c14: f04f 31ff mov.w r1, #4294967295 + 8002c18: 697b ldr r3, [r7, #20] + 8002c1a: fa01 f303 lsl.w r3, r1, r3 + 8002c1e: 43d9 mvns r1, r3 + 8002c20: 687b ldr r3, [r7, #4] + 8002c22: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8002ab0: 4313 orrs r3, r2 + 8002c24: 4313 orrs r3, r2 ); } - 8002ab2: 4618 mov r0, r3 - 8002ab4: 3724 adds r7, #36 @ 0x24 - 8002ab6: 46bd mov sp, r7 - 8002ab8: bc80 pop {r7} - 8002aba: 4770 bx lr + 8002c26: 4618 mov r0, r3 + 8002c28: 3724 adds r7, #36 @ 0x24 + 8002c2a: 46bd mov sp, r7 + 8002c2c: bc80 pop {r7} + 8002c2e: 4770 bx lr -08002abc : +08002c30 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8002abc: b580 push {r7, lr} - 8002abe: b082 sub sp, #8 - 8002ac0: af00 add r7, sp, #0 - 8002ac2: 6078 str r0, [r7, #4] + 8002c30: b580 push {r7, lr} + 8002c32: b082 sub sp, #8 + 8002c34: af00 add r7, sp, #0 + 8002c36: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8002ac4: 687b ldr r3, [r7, #4] - 8002ac6: 3b01 subs r3, #1 - 8002ac8: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 - 8002acc: d301 bcc.n 8002ad2 + 8002c38: 687b ldr r3, [r7, #4] + 8002c3a: 3b01 subs r3, #1 + 8002c3c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 + 8002c40: d301 bcc.n 8002c46 { return (1UL); /* Reload value impossible */ - 8002ace: 2301 movs r3, #1 - 8002ad0: e00f b.n 8002af2 + 8002c42: 2301 movs r3, #1 + 8002c44: e00f b.n 8002c66 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8002ad2: 4a0a ldr r2, [pc, #40] @ (8002afc ) - 8002ad4: 687b ldr r3, [r7, #4] - 8002ad6: 3b01 subs r3, #1 - 8002ad8: 6053 str r3, [r2, #4] + 8002c46: 4a0a ldr r2, [pc, #40] @ (8002c70 ) + 8002c48: 687b ldr r3, [r7, #4] + 8002c4a: 3b01 subs r3, #1 + 8002c4c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8002ada: 210f movs r1, #15 - 8002adc: f04f 30ff mov.w r0, #4294967295 - 8002ae0: f7ff ff90 bl 8002a04 <__NVIC_SetPriority> + 8002c4e: 210f movs r1, #15 + 8002c50: f04f 30ff mov.w r0, #4294967295 + 8002c54: f7ff ff90 bl 8002b78 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8002ae4: 4b05 ldr r3, [pc, #20] @ (8002afc ) - 8002ae6: 2200 movs r2, #0 - 8002ae8: 609a str r2, [r3, #8] + 8002c58: 4b05 ldr r3, [pc, #20] @ (8002c70 ) + 8002c5a: 2200 movs r2, #0 + 8002c5c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8002aea: 4b04 ldr r3, [pc, #16] @ (8002afc ) - 8002aec: 2207 movs r2, #7 - 8002aee: 601a str r2, [r3, #0] + 8002c5e: 4b04 ldr r3, [pc, #16] @ (8002c70 ) + 8002c60: 2207 movs r2, #7 + 8002c62: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8002af0: 2300 movs r3, #0 + 8002c64: 2300 movs r3, #0 } - 8002af2: 4618 mov r0, r3 - 8002af4: 3708 adds r7, #8 - 8002af6: 46bd mov sp, r7 - 8002af8: bd80 pop {r7, pc} - 8002afa: bf00 nop - 8002afc: e000e010 .word 0xe000e010 + 8002c66: 4618 mov r0, r3 + 8002c68: 3708 adds r7, #8 + 8002c6a: 46bd mov sp, r7 + 8002c6c: bd80 pop {r7, pc} + 8002c6e: bf00 nop + 8002c70: e000e010 .word 0xe000e010 -08002b00 : +08002c74 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8002b00: b580 push {r7, lr} - 8002b02: b082 sub sp, #8 - 8002b04: af00 add r7, sp, #0 - 8002b06: 6078 str r0, [r7, #4] + 8002c74: b580 push {r7, lr} + 8002c76: b082 sub sp, #8 + 8002c78: af00 add r7, sp, #0 + 8002c7a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 8002b08: 6878 ldr r0, [r7, #4] - 8002b0a: f7ff ff2d bl 8002968 <__NVIC_SetPriorityGrouping> + 8002c7c: 6878 ldr r0, [r7, #4] + 8002c7e: f7ff ff2d bl 8002adc <__NVIC_SetPriorityGrouping> } - 8002b0e: bf00 nop - 8002b10: 3708 adds r7, #8 - 8002b12: 46bd mov sp, r7 - 8002b14: bd80 pop {r7, pc} + 8002c82: bf00 nop + 8002c84: 3708 adds r7, #8 + 8002c86: 46bd mov sp, r7 + 8002c88: bd80 pop {r7, pc} -08002b16 : +08002c8a : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8002b16: b580 push {r7, lr} - 8002b18: b086 sub sp, #24 - 8002b1a: af00 add r7, sp, #0 - 8002b1c: 4603 mov r3, r0 - 8002b1e: 60b9 str r1, [r7, #8] - 8002b20: 607a str r2, [r7, #4] - 8002b22: 73fb strb r3, [r7, #15] + 8002c8a: b580 push {r7, lr} + 8002c8c: b086 sub sp, #24 + 8002c8e: af00 add r7, sp, #0 + 8002c90: 4603 mov r3, r0 + 8002c92: 60b9 str r1, [r7, #8] + 8002c94: 607a str r2, [r7, #4] + 8002c96: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; - 8002b24: 2300 movs r3, #0 - 8002b26: 617b str r3, [r7, #20] + 8002c98: 2300 movs r3, #0 + 8002c9a: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8002b28: f7ff ff42 bl 80029b0 <__NVIC_GetPriorityGrouping> - 8002b2c: 6178 str r0, [r7, #20] + 8002c9c: f7ff ff42 bl 8002b24 <__NVIC_GetPriorityGrouping> + 8002ca0: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 8002b2e: 687a ldr r2, [r7, #4] - 8002b30: 68b9 ldr r1, [r7, #8] - 8002b32: 6978 ldr r0, [r7, #20] - 8002b34: f7ff ff90 bl 8002a58 - 8002b38: 4602 mov r2, r0 - 8002b3a: f997 300f ldrsb.w r3, [r7, #15] - 8002b3e: 4611 mov r1, r2 - 8002b40: 4618 mov r0, r3 - 8002b42: f7ff ff5f bl 8002a04 <__NVIC_SetPriority> + 8002ca2: 687a ldr r2, [r7, #4] + 8002ca4: 68b9 ldr r1, [r7, #8] + 8002ca6: 6978 ldr r0, [r7, #20] + 8002ca8: f7ff ff90 bl 8002bcc + 8002cac: 4602 mov r2, r0 + 8002cae: f997 300f ldrsb.w r3, [r7, #15] + 8002cb2: 4611 mov r1, r2 + 8002cb4: 4618 mov r0, r3 + 8002cb6: f7ff ff5f bl 8002b78 <__NVIC_SetPriority> } - 8002b46: bf00 nop - 8002b48: 3718 adds r7, #24 - 8002b4a: 46bd mov sp, r7 - 8002b4c: bd80 pop {r7, pc} + 8002cba: bf00 nop + 8002cbc: 3718 adds r7, #24 + 8002cbe: 46bd mov sp, r7 + 8002cc0: bd80 pop {r7, pc} -08002b4e : +08002cc2 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 8002b4e: b580 push {r7, lr} - 8002b50: b082 sub sp, #8 - 8002b52: af00 add r7, sp, #0 - 8002b54: 4603 mov r3, r0 - 8002b56: 71fb strb r3, [r7, #7] + 8002cc2: b580 push {r7, lr} + 8002cc4: b082 sub sp, #8 + 8002cc6: af00 add r7, sp, #0 + 8002cc8: 4603 mov r3, r0 + 8002cca: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 8002b58: f997 3007 ldrsb.w r3, [r7, #7] - 8002b5c: 4618 mov r0, r3 - 8002b5e: f7ff ff35 bl 80029cc <__NVIC_EnableIRQ> + 8002ccc: f997 3007 ldrsb.w r3, [r7, #7] + 8002cd0: 4618 mov r0, r3 + 8002cd2: f7ff ff35 bl 8002b40 <__NVIC_EnableIRQ> } - 8002b62: bf00 nop - 8002b64: 3708 adds r7, #8 - 8002b66: 46bd mov sp, r7 - 8002b68: bd80 pop {r7, pc} + 8002cd6: bf00 nop + 8002cd8: 3708 adds r7, #8 + 8002cda: 46bd mov sp, r7 + 8002cdc: bd80 pop {r7, pc} -08002b6a : +08002cde : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8002b6a: b580 push {r7, lr} - 8002b6c: b082 sub sp, #8 - 8002b6e: af00 add r7, sp, #0 - 8002b70: 6078 str r0, [r7, #4] + 8002cde: b580 push {r7, lr} + 8002ce0: b082 sub sp, #8 + 8002ce2: af00 add r7, sp, #0 + 8002ce4: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 8002b72: 6878 ldr r0, [r7, #4] - 8002b74: f7ff ffa2 bl 8002abc - 8002b78: 4603 mov r3, r0 + 8002ce6: 6878 ldr r0, [r7, #4] + 8002ce8: f7ff ffa2 bl 8002c30 + 8002cec: 4603 mov r3, r0 } - 8002b7a: 4618 mov r0, r3 - 8002b7c: 3708 adds r7, #8 - 8002b7e: 46bd mov sp, r7 - 8002b80: bd80 pop {r7, pc} + 8002cee: 4618 mov r0, r3 + 8002cf0: 3708 adds r7, #8 + 8002cf2: 46bd mov sp, r7 + 8002cf4: bd80 pop {r7, pc} -08002b82 : +08002cf6 : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { - 8002b82: b480 push {r7} - 8002b84: b085 sub sp, #20 - 8002b86: af00 add r7, sp, #0 - 8002b88: 6078 str r0, [r7, #4] + 8002cf6: b480 push {r7} + 8002cf8: b085 sub sp, #20 + 8002cfa: af00 add r7, sp, #0 + 8002cfc: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8002b8a: 2300 movs r3, #0 - 8002b8c: 73fb strb r3, [r7, #15] + 8002cfe: 2300 movs r3, #0 + 8002d00: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) - 8002b8e: 687b ldr r3, [r7, #4] - 8002b90: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 - 8002b94: b2db uxtb r3, r3 - 8002b96: 2b02 cmp r3, #2 - 8002b98: d008 beq.n 8002bac + 8002d02: 687b ldr r3, [r7, #4] + 8002d04: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 + 8002d08: b2db uxtb r3, r3 + 8002d0a: 2b02 cmp r3, #2 + 8002d0c: d008 beq.n 8002d20 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8002b9a: 687b ldr r3, [r7, #4] - 8002b9c: 2204 movs r2, #4 - 8002b9e: 639a str r2, [r3, #56] @ 0x38 + 8002d0e: 687b ldr r3, [r7, #4] + 8002d10: 2204 movs r2, #4 + 8002d12: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8002ba0: 687b ldr r3, [r7, #4] - 8002ba2: 2200 movs r2, #0 - 8002ba4: f883 2020 strb.w r2, [r3, #32] + 8002d14: 687b ldr r3, [r7, #4] + 8002d16: 2200 movs r2, #0 + 8002d18: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; - 8002ba8: 2301 movs r3, #1 - 8002baa: e020 b.n 8002bee + 8002d1c: 2301 movs r3, #1 + 8002d1e: e020 b.n 8002d62 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8002bac: 687b ldr r3, [r7, #4] - 8002bae: 681b ldr r3, [r3, #0] - 8002bb0: 681a ldr r2, [r3, #0] - 8002bb2: 687b ldr r3, [r7, #4] - 8002bb4: 681b ldr r3, [r3, #0] - 8002bb6: f022 020e bic.w r2, r2, #14 - 8002bba: 601a str r2, [r3, #0] + 8002d20: 687b ldr r3, [r7, #4] + 8002d22: 681b ldr r3, [r3, #0] + 8002d24: 681a ldr r2, [r3, #0] + 8002d26: 687b ldr r3, [r7, #4] + 8002d28: 681b ldr r3, [r3, #0] + 8002d2a: f022 020e bic.w r2, r2, #14 + 8002d2e: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 8002bbc: 687b ldr r3, [r7, #4] - 8002bbe: 681b ldr r3, [r3, #0] - 8002bc0: 681a ldr r2, [r3, #0] - 8002bc2: 687b ldr r3, [r7, #4] - 8002bc4: 681b ldr r3, [r3, #0] - 8002bc6: f022 0201 bic.w r2, r2, #1 - 8002bca: 601a str r2, [r3, #0] + 8002d30: 687b ldr r3, [r7, #4] + 8002d32: 681b ldr r3, [r3, #0] + 8002d34: 681a ldr r2, [r3, #0] + 8002d36: 687b ldr r3, [r7, #4] + 8002d38: 681b ldr r3, [r3, #0] + 8002d3a: f022 0201 bic.w r2, r2, #1 + 8002d3e: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - 8002bcc: 687b ldr r3, [r7, #4] - 8002bce: 6c1a ldr r2, [r3, #64] @ 0x40 - 8002bd0: 687b ldr r3, [r7, #4] - 8002bd2: 6bdb ldr r3, [r3, #60] @ 0x3c - 8002bd4: 2101 movs r1, #1 - 8002bd6: fa01 f202 lsl.w r2, r1, r2 - 8002bda: 605a str r2, [r3, #4] + 8002d40: 687b ldr r3, [r7, #4] + 8002d42: 6c1a ldr r2, [r3, #64] @ 0x40 + 8002d44: 687b ldr r3, [r7, #4] + 8002d46: 6bdb ldr r3, [r3, #60] @ 0x3c + 8002d48: 2101 movs r1, #1 + 8002d4a: fa01 f202 lsl.w r2, r1, r2 + 8002d4e: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8002bdc: 687b ldr r3, [r7, #4] - 8002bde: 2201 movs r2, #1 - 8002be0: f883 2021 strb.w r2, [r3, #33] @ 0x21 + 8002d50: 687b ldr r3, [r7, #4] + 8002d52: 2201 movs r2, #1 + 8002d54: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8002be4: 687b ldr r3, [r7, #4] - 8002be6: 2200 movs r2, #0 - 8002be8: f883 2020 strb.w r2, [r3, #32] + 8002d58: 687b ldr r3, [r7, #4] + 8002d5a: 2200 movs r2, #0 + 8002d5c: f883 2020 strb.w r2, [r3, #32] return status; - 8002bec: 7bfb ldrb r3, [r7, #15] + 8002d60: 7bfb ldrb r3, [r7, #15] } - 8002bee: 4618 mov r0, r3 - 8002bf0: 3714 adds r7, #20 - 8002bf2: 46bd mov sp, r7 - 8002bf4: bc80 pop {r7} - 8002bf6: 4770 bx lr + 8002d62: 4618 mov r0, r3 + 8002d64: 3714 adds r7, #20 + 8002d66: 46bd mov sp, r7 + 8002d68: bc80 pop {r7} + 8002d6a: 4770 bx lr -08002bf8 : +08002d6c : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { - 8002bf8: b580 push {r7, lr} - 8002bfa: b084 sub sp, #16 - 8002bfc: af00 add r7, sp, #0 - 8002bfe: 6078 str r0, [r7, #4] + 8002d6c: b580 push {r7, lr} + 8002d6e: b084 sub sp, #16 + 8002d70: af00 add r7, sp, #0 + 8002d72: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8002c00: 2300 movs r3, #0 - 8002c02: 73fb strb r3, [r7, #15] + 8002d74: 2300 movs r3, #0 + 8002d76: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) - 8002c04: 687b ldr r3, [r7, #4] - 8002c06: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 - 8002c0a: b2db uxtb r3, r3 - 8002c0c: 2b02 cmp r3, #2 - 8002c0e: d005 beq.n 8002c1c + 8002d78: 687b ldr r3, [r7, #4] + 8002d7a: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 + 8002d7e: b2db uxtb r3, r3 + 8002d80: 2b02 cmp r3, #2 + 8002d82: d005 beq.n 8002d90 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8002c10: 687b ldr r3, [r7, #4] - 8002c12: 2204 movs r2, #4 - 8002c14: 639a str r2, [r3, #56] @ 0x38 + 8002d84: 687b ldr r3, [r7, #4] + 8002d86: 2204 movs r2, #4 + 8002d88: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; - 8002c16: 2301 movs r3, #1 - 8002c18: 73fb strb r3, [r7, #15] - 8002c1a: e051 b.n 8002cc0 + 8002d8a: 2301 movs r3, #1 + 8002d8c: 73fb strb r3, [r7, #15] + 8002d8e: e051 b.n 8002e34 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8002c1c: 687b ldr r3, [r7, #4] - 8002c1e: 681b ldr r3, [r3, #0] - 8002c20: 681a ldr r2, [r3, #0] - 8002c22: 687b ldr r3, [r7, #4] - 8002c24: 681b ldr r3, [r3, #0] - 8002c26: f022 020e bic.w r2, r2, #14 - 8002c2a: 601a str r2, [r3, #0] + 8002d90: 687b ldr r3, [r7, #4] + 8002d92: 681b ldr r3, [r3, #0] + 8002d94: 681a ldr r2, [r3, #0] + 8002d96: 687b ldr r3, [r7, #4] + 8002d98: 681b ldr r3, [r3, #0] + 8002d9a: f022 020e bic.w r2, r2, #14 + 8002d9e: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 8002c2c: 687b ldr r3, [r7, #4] - 8002c2e: 681b ldr r3, [r3, #0] - 8002c30: 681a ldr r2, [r3, #0] - 8002c32: 687b ldr r3, [r7, #4] - 8002c34: 681b ldr r3, [r3, #0] - 8002c36: f022 0201 bic.w r2, r2, #1 - 8002c3a: 601a str r2, [r3, #0] + 8002da0: 687b ldr r3, [r7, #4] + 8002da2: 681b ldr r3, [r3, #0] + 8002da4: 681a ldr r2, [r3, #0] + 8002da6: 687b ldr r3, [r7, #4] + 8002da8: 681b ldr r3, [r3, #0] + 8002daa: f022 0201 bic.w r2, r2, #1 + 8002dae: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); - 8002c3c: 687b ldr r3, [r7, #4] - 8002c3e: 681b ldr r3, [r3, #0] - 8002c40: 4a22 ldr r2, [pc, #136] @ (8002ccc ) - 8002c42: 4293 cmp r3, r2 - 8002c44: d029 beq.n 8002c9a - 8002c46: 687b ldr r3, [r7, #4] - 8002c48: 681b ldr r3, [r3, #0] - 8002c4a: 4a21 ldr r2, [pc, #132] @ (8002cd0 ) - 8002c4c: 4293 cmp r3, r2 - 8002c4e: d022 beq.n 8002c96 - 8002c50: 687b ldr r3, [r7, #4] - 8002c52: 681b ldr r3, [r3, #0] - 8002c54: 4a1f ldr r2, [pc, #124] @ (8002cd4 ) - 8002c56: 4293 cmp r3, r2 - 8002c58: d01a beq.n 8002c90 - 8002c5a: 687b ldr r3, [r7, #4] - 8002c5c: 681b ldr r3, [r3, #0] - 8002c5e: 4a1e ldr r2, [pc, #120] @ (8002cd8 ) - 8002c60: 4293 cmp r3, r2 - 8002c62: d012 beq.n 8002c8a - 8002c64: 687b ldr r3, [r7, #4] - 8002c66: 681b ldr r3, [r3, #0] - 8002c68: 4a1c ldr r2, [pc, #112] @ (8002cdc ) - 8002c6a: 4293 cmp r3, r2 - 8002c6c: d00a beq.n 8002c84 - 8002c6e: 687b ldr r3, [r7, #4] - 8002c70: 681b ldr r3, [r3, #0] - 8002c72: 4a1b ldr r2, [pc, #108] @ (8002ce0 ) - 8002c74: 4293 cmp r3, r2 - 8002c76: d102 bne.n 8002c7e - 8002c78: f44f 1380 mov.w r3, #1048576 @ 0x100000 - 8002c7c: e00e b.n 8002c9c - 8002c7e: f04f 7380 mov.w r3, #16777216 @ 0x1000000 - 8002c82: e00b b.n 8002c9c - 8002c84: f44f 3380 mov.w r3, #65536 @ 0x10000 - 8002c88: e008 b.n 8002c9c - 8002c8a: f44f 5380 mov.w r3, #4096 @ 0x1000 - 8002c8e: e005 b.n 8002c9c - 8002c90: f44f 7380 mov.w r3, #256 @ 0x100 - 8002c94: e002 b.n 8002c9c - 8002c96: 2310 movs r3, #16 - 8002c98: e000 b.n 8002c9c - 8002c9a: 2301 movs r3, #1 - 8002c9c: 4a11 ldr r2, [pc, #68] @ (8002ce4 ) - 8002c9e: 6053 str r3, [r2, #4] + 8002db0: 687b ldr r3, [r7, #4] + 8002db2: 681b ldr r3, [r3, #0] + 8002db4: 4a22 ldr r2, [pc, #136] @ (8002e40 ) + 8002db6: 4293 cmp r3, r2 + 8002db8: d029 beq.n 8002e0e + 8002dba: 687b ldr r3, [r7, #4] + 8002dbc: 681b ldr r3, [r3, #0] + 8002dbe: 4a21 ldr r2, [pc, #132] @ (8002e44 ) + 8002dc0: 4293 cmp r3, r2 + 8002dc2: d022 beq.n 8002e0a + 8002dc4: 687b ldr r3, [r7, #4] + 8002dc6: 681b ldr r3, [r3, #0] + 8002dc8: 4a1f ldr r2, [pc, #124] @ (8002e48 ) + 8002dca: 4293 cmp r3, r2 + 8002dcc: d01a beq.n 8002e04 + 8002dce: 687b ldr r3, [r7, #4] + 8002dd0: 681b ldr r3, [r3, #0] + 8002dd2: 4a1e ldr r2, [pc, #120] @ (8002e4c ) + 8002dd4: 4293 cmp r3, r2 + 8002dd6: d012 beq.n 8002dfe + 8002dd8: 687b ldr r3, [r7, #4] + 8002dda: 681b ldr r3, [r3, #0] + 8002ddc: 4a1c ldr r2, [pc, #112] @ (8002e50 ) + 8002dde: 4293 cmp r3, r2 + 8002de0: d00a beq.n 8002df8 + 8002de2: 687b ldr r3, [r7, #4] + 8002de4: 681b ldr r3, [r3, #0] + 8002de6: 4a1b ldr r2, [pc, #108] @ (8002e54 ) + 8002de8: 4293 cmp r3, r2 + 8002dea: d102 bne.n 8002df2 + 8002dec: f44f 1380 mov.w r3, #1048576 @ 0x100000 + 8002df0: e00e b.n 8002e10 + 8002df2: f04f 7380 mov.w r3, #16777216 @ 0x1000000 + 8002df6: e00b b.n 8002e10 + 8002df8: f44f 3380 mov.w r3, #65536 @ 0x10000 + 8002dfc: e008 b.n 8002e10 + 8002dfe: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8002e02: e005 b.n 8002e10 + 8002e04: f44f 7380 mov.w r3, #256 @ 0x100 + 8002e08: e002 b.n 8002e10 + 8002e0a: 2310 movs r3, #16 + 8002e0c: e000 b.n 8002e10 + 8002e0e: 2301 movs r3, #1 + 8002e10: 4a11 ldr r2, [pc, #68] @ (8002e58 ) + 8002e12: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8002ca0: 687b ldr r3, [r7, #4] - 8002ca2: 2201 movs r2, #1 - 8002ca4: f883 2021 strb.w r2, [r3, #33] @ 0x21 + 8002e14: 687b ldr r3, [r7, #4] + 8002e16: 2201 movs r2, #1 + 8002e18: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8002ca8: 687b ldr r3, [r7, #4] - 8002caa: 2200 movs r2, #0 - 8002cac: f883 2020 strb.w r2, [r3, #32] + 8002e1c: 687b ldr r3, [r7, #4] + 8002e1e: 2200 movs r2, #0 + 8002e20: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) - 8002cb0: 687b ldr r3, [r7, #4] - 8002cb2: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002cb4: 2b00 cmp r3, #0 - 8002cb6: d003 beq.n 8002cc0 + 8002e24: 687b ldr r3, [r7, #4] + 8002e26: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002e28: 2b00 cmp r3, #0 + 8002e2a: d003 beq.n 8002e34 { hdma->XferAbortCallback(hdma); - 8002cb8: 687b ldr r3, [r7, #4] - 8002cba: 6b5b ldr r3, [r3, #52] @ 0x34 - 8002cbc: 6878 ldr r0, [r7, #4] - 8002cbe: 4798 blx r3 + 8002e2c: 687b ldr r3, [r7, #4] + 8002e2e: 6b5b ldr r3, [r3, #52] @ 0x34 + 8002e30: 6878 ldr r0, [r7, #4] + 8002e32: 4798 blx r3 } } return status; - 8002cc0: 7bfb ldrb r3, [r7, #15] + 8002e34: 7bfb ldrb r3, [r7, #15] } - 8002cc2: 4618 mov r0, r3 - 8002cc4: 3710 adds r7, #16 - 8002cc6: 46bd mov sp, r7 - 8002cc8: bd80 pop {r7, pc} - 8002cca: bf00 nop - 8002ccc: 40020008 .word 0x40020008 - 8002cd0: 4002001c .word 0x4002001c - 8002cd4: 40020030 .word 0x40020030 - 8002cd8: 40020044 .word 0x40020044 - 8002cdc: 40020058 .word 0x40020058 - 8002ce0: 4002006c .word 0x4002006c - 8002ce4: 40020000 .word 0x40020000 + 8002e36: 4618 mov r0, r3 + 8002e38: 3710 adds r7, #16 + 8002e3a: 46bd mov sp, r7 + 8002e3c: bd80 pop {r7, pc} + 8002e3e: bf00 nop + 8002e40: 40020008 .word 0x40020008 + 8002e44: 4002001c .word 0x4002001c + 8002e48: 40020030 .word 0x40020030 + 8002e4c: 40020044 .word 0x40020044 + 8002e50: 40020058 .word 0x40020058 + 8002e54: 4002006c .word 0x4002006c + 8002e58: 40020000 .word 0x40020000 -08002ce8 : +08002e5c : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8002ce8: b480 push {r7} - 8002cea: b08b sub sp, #44 @ 0x2c - 8002cec: af00 add r7, sp, #0 - 8002cee: 6078 str r0, [r7, #4] - 8002cf0: 6039 str r1, [r7, #0] + 8002e5c: b480 push {r7} + 8002e5e: b08b sub sp, #44 @ 0x2c + 8002e60: af00 add r7, sp, #0 + 8002e62: 6078 str r0, [r7, #4] + 8002e64: 6039 str r1, [r7, #0] uint32_t position = 0x00u; - 8002cf2: 2300 movs r3, #0 - 8002cf4: 627b str r3, [r7, #36] @ 0x24 + 8002e66: 2300 movs r3, #0 + 8002e68: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; - 8002cf6: 2300 movs r3, #0 - 8002cf8: 623b str r3, [r7, #32] + 8002e6a: 2300 movs r3, #0 + 8002e6c: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) - 8002cfa: e169 b.n 8002fd0 + 8002e6e: e169 b.n 8003144 { /* Get the IO position */ ioposition = (0x01uL << position); - 8002cfc: 2201 movs r2, #1 - 8002cfe: 6a7b ldr r3, [r7, #36] @ 0x24 - 8002d00: fa02 f303 lsl.w r3, r2, r3 - 8002d04: 61fb str r3, [r7, #28] + 8002e70: 2201 movs r2, #1 + 8002e72: 6a7b ldr r3, [r7, #36] @ 0x24 + 8002e74: fa02 f303 lsl.w r3, r2, r3 + 8002e78: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - 8002d06: 683b ldr r3, [r7, #0] - 8002d08: 681b ldr r3, [r3, #0] - 8002d0a: 69fa ldr r2, [r7, #28] - 8002d0c: 4013 ands r3, r2 - 8002d0e: 61bb str r3, [r7, #24] + 8002e7a: 683b ldr r3, [r7, #0] + 8002e7c: 681b ldr r3, [r3, #0] + 8002e7e: 69fa ldr r2, [r7, #28] + 8002e80: 4013 ands r3, r2 + 8002e82: 61bb str r3, [r7, #24] if (iocurrent == ioposition) - 8002d10: 69ba ldr r2, [r7, #24] - 8002d12: 69fb ldr r3, [r7, #28] - 8002d14: 429a cmp r2, r3 - 8002d16: f040 8158 bne.w 8002fca + 8002e84: 69ba ldr r2, [r7, #24] + 8002e86: 69fb ldr r3, [r7, #28] + 8002e88: 429a cmp r2, r3 + 8002e8a: f040 8158 bne.w 800313e { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) - 8002d1a: 683b ldr r3, [r7, #0] - 8002d1c: 685b ldr r3, [r3, #4] - 8002d1e: 4a9a ldr r2, [pc, #616] @ (8002f88 ) - 8002d20: 4293 cmp r3, r2 - 8002d22: d05e beq.n 8002de2 - 8002d24: 4a98 ldr r2, [pc, #608] @ (8002f88 ) - 8002d26: 4293 cmp r3, r2 - 8002d28: d875 bhi.n 8002e16 - 8002d2a: 4a98 ldr r2, [pc, #608] @ (8002f8c ) - 8002d2c: 4293 cmp r3, r2 - 8002d2e: d058 beq.n 8002de2 - 8002d30: 4a96 ldr r2, [pc, #600] @ (8002f8c ) - 8002d32: 4293 cmp r3, r2 - 8002d34: d86f bhi.n 8002e16 - 8002d36: 4a96 ldr r2, [pc, #600] @ (8002f90 ) - 8002d38: 4293 cmp r3, r2 - 8002d3a: d052 beq.n 8002de2 - 8002d3c: 4a94 ldr r2, [pc, #592] @ (8002f90 ) - 8002d3e: 4293 cmp r3, r2 - 8002d40: d869 bhi.n 8002e16 - 8002d42: 4a94 ldr r2, [pc, #592] @ (8002f94 ) - 8002d44: 4293 cmp r3, r2 - 8002d46: d04c beq.n 8002de2 - 8002d48: 4a92 ldr r2, [pc, #584] @ (8002f94 ) - 8002d4a: 4293 cmp r3, r2 - 8002d4c: d863 bhi.n 8002e16 - 8002d4e: 4a92 ldr r2, [pc, #584] @ (8002f98 ) - 8002d50: 4293 cmp r3, r2 - 8002d52: d046 beq.n 8002de2 - 8002d54: 4a90 ldr r2, [pc, #576] @ (8002f98 ) - 8002d56: 4293 cmp r3, r2 - 8002d58: d85d bhi.n 8002e16 - 8002d5a: 2b12 cmp r3, #18 - 8002d5c: d82a bhi.n 8002db4 - 8002d5e: 2b12 cmp r3, #18 - 8002d60: d859 bhi.n 8002e16 - 8002d62: a201 add r2, pc, #4 @ (adr r2, 8002d68 ) - 8002d64: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8002d68: 08002de3 .word 0x08002de3 - 8002d6c: 08002dbd .word 0x08002dbd - 8002d70: 08002dcf .word 0x08002dcf - 8002d74: 08002e11 .word 0x08002e11 - 8002d78: 08002e17 .word 0x08002e17 - 8002d7c: 08002e17 .word 0x08002e17 - 8002d80: 08002e17 .word 0x08002e17 - 8002d84: 08002e17 .word 0x08002e17 - 8002d88: 08002e17 .word 0x08002e17 - 8002d8c: 08002e17 .word 0x08002e17 - 8002d90: 08002e17 .word 0x08002e17 - 8002d94: 08002e17 .word 0x08002e17 - 8002d98: 08002e17 .word 0x08002e17 - 8002d9c: 08002e17 .word 0x08002e17 - 8002da0: 08002e17 .word 0x08002e17 - 8002da4: 08002e17 .word 0x08002e17 - 8002da8: 08002e17 .word 0x08002e17 - 8002dac: 08002dc5 .word 0x08002dc5 - 8002db0: 08002dd9 .word 0x08002dd9 - 8002db4: 4a79 ldr r2, [pc, #484] @ (8002f9c ) - 8002db6: 4293 cmp r3, r2 - 8002db8: d013 beq.n 8002de2 + 8002e8e: 683b ldr r3, [r7, #0] + 8002e90: 685b ldr r3, [r3, #4] + 8002e92: 4a9a ldr r2, [pc, #616] @ (80030fc ) + 8002e94: 4293 cmp r3, r2 + 8002e96: d05e beq.n 8002f56 + 8002e98: 4a98 ldr r2, [pc, #608] @ (80030fc ) + 8002e9a: 4293 cmp r3, r2 + 8002e9c: d875 bhi.n 8002f8a + 8002e9e: 4a98 ldr r2, [pc, #608] @ (8003100 ) + 8002ea0: 4293 cmp r3, r2 + 8002ea2: d058 beq.n 8002f56 + 8002ea4: 4a96 ldr r2, [pc, #600] @ (8003100 ) + 8002ea6: 4293 cmp r3, r2 + 8002ea8: d86f bhi.n 8002f8a + 8002eaa: 4a96 ldr r2, [pc, #600] @ (8003104 ) + 8002eac: 4293 cmp r3, r2 + 8002eae: d052 beq.n 8002f56 + 8002eb0: 4a94 ldr r2, [pc, #592] @ (8003104 ) + 8002eb2: 4293 cmp r3, r2 + 8002eb4: d869 bhi.n 8002f8a + 8002eb6: 4a94 ldr r2, [pc, #592] @ (8003108 ) + 8002eb8: 4293 cmp r3, r2 + 8002eba: d04c beq.n 8002f56 + 8002ebc: 4a92 ldr r2, [pc, #584] @ (8003108 ) + 8002ebe: 4293 cmp r3, r2 + 8002ec0: d863 bhi.n 8002f8a + 8002ec2: 4a92 ldr r2, [pc, #584] @ (800310c ) + 8002ec4: 4293 cmp r3, r2 + 8002ec6: d046 beq.n 8002f56 + 8002ec8: 4a90 ldr r2, [pc, #576] @ (800310c ) + 8002eca: 4293 cmp r3, r2 + 8002ecc: d85d bhi.n 8002f8a + 8002ece: 2b12 cmp r3, #18 + 8002ed0: d82a bhi.n 8002f28 + 8002ed2: 2b12 cmp r3, #18 + 8002ed4: d859 bhi.n 8002f8a + 8002ed6: a201 add r2, pc, #4 @ (adr r2, 8002edc ) + 8002ed8: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8002edc: 08002f57 .word 0x08002f57 + 8002ee0: 08002f31 .word 0x08002f31 + 8002ee4: 08002f43 .word 0x08002f43 + 8002ee8: 08002f85 .word 0x08002f85 + 8002eec: 08002f8b .word 0x08002f8b + 8002ef0: 08002f8b .word 0x08002f8b + 8002ef4: 08002f8b .word 0x08002f8b + 8002ef8: 08002f8b .word 0x08002f8b + 8002efc: 08002f8b .word 0x08002f8b + 8002f00: 08002f8b .word 0x08002f8b + 8002f04: 08002f8b .word 0x08002f8b + 8002f08: 08002f8b .word 0x08002f8b + 8002f0c: 08002f8b .word 0x08002f8b + 8002f10: 08002f8b .word 0x08002f8b + 8002f14: 08002f8b .word 0x08002f8b + 8002f18: 08002f8b .word 0x08002f8b + 8002f1c: 08002f8b .word 0x08002f8b + 8002f20: 08002f39 .word 0x08002f39 + 8002f24: 08002f4d .word 0x08002f4d + 8002f28: 4a79 ldr r2, [pc, #484] @ (8003110 ) + 8002f2a: 4293 cmp r3, r2 + 8002f2c: d013 beq.n 8002f56 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; - 8002dba: e02c b.n 8002e16 + 8002f2e: e02c b.n 8002f8a config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; - 8002dbc: 683b ldr r3, [r7, #0] - 8002dbe: 68db ldr r3, [r3, #12] - 8002dc0: 623b str r3, [r7, #32] + 8002f30: 683b ldr r3, [r7, #0] + 8002f32: 68db ldr r3, [r3, #12] + 8002f34: 623b str r3, [r7, #32] break; - 8002dc2: e029 b.n 8002e18 + 8002f36: e029 b.n 8002f8c config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; - 8002dc4: 683b ldr r3, [r7, #0] - 8002dc6: 68db ldr r3, [r3, #12] - 8002dc8: 3304 adds r3, #4 - 8002dca: 623b str r3, [r7, #32] + 8002f38: 683b ldr r3, [r7, #0] + 8002f3a: 68db ldr r3, [r3, #12] + 8002f3c: 3304 adds r3, #4 + 8002f3e: 623b str r3, [r7, #32] break; - 8002dcc: e024 b.n 8002e18 + 8002f40: e024 b.n 8002f8c config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; - 8002dce: 683b ldr r3, [r7, #0] - 8002dd0: 68db ldr r3, [r3, #12] - 8002dd2: 3308 adds r3, #8 - 8002dd4: 623b str r3, [r7, #32] + 8002f42: 683b ldr r3, [r7, #0] + 8002f44: 68db ldr r3, [r3, #12] + 8002f46: 3308 adds r3, #8 + 8002f48: 623b str r3, [r7, #32] break; - 8002dd6: e01f b.n 8002e18 + 8002f4a: e01f b.n 8002f8c config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; - 8002dd8: 683b ldr r3, [r7, #0] - 8002dda: 68db ldr r3, [r3, #12] - 8002ddc: 330c adds r3, #12 - 8002dde: 623b str r3, [r7, #32] + 8002f4c: 683b ldr r3, [r7, #0] + 8002f4e: 68db ldr r3, [r3, #12] + 8002f50: 330c adds r3, #12 + 8002f52: 623b str r3, [r7, #32] break; - 8002de0: e01a b.n 8002e18 + 8002f54: e01a b.n 8002f8c if (GPIO_Init->Pull == GPIO_NOPULL) - 8002de2: 683b ldr r3, [r7, #0] - 8002de4: 689b ldr r3, [r3, #8] - 8002de6: 2b00 cmp r3, #0 - 8002de8: d102 bne.n 8002df0 + 8002f56: 683b ldr r3, [r7, #0] + 8002f58: 689b ldr r3, [r3, #8] + 8002f5a: 2b00 cmp r3, #0 + 8002f5c: d102 bne.n 8002f64 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; - 8002dea: 2304 movs r3, #4 - 8002dec: 623b str r3, [r7, #32] + 8002f5e: 2304 movs r3, #4 + 8002f60: 623b str r3, [r7, #32] break; - 8002dee: e013 b.n 8002e18 + 8002f62: e013 b.n 8002f8c else if (GPIO_Init->Pull == GPIO_PULLUP) - 8002df0: 683b ldr r3, [r7, #0] - 8002df2: 689b ldr r3, [r3, #8] - 8002df4: 2b01 cmp r3, #1 - 8002df6: d105 bne.n 8002e04 + 8002f64: 683b ldr r3, [r7, #0] + 8002f66: 689b ldr r3, [r3, #8] + 8002f68: 2b01 cmp r3, #1 + 8002f6a: d105 bne.n 8002f78 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 8002df8: 2308 movs r3, #8 - 8002dfa: 623b str r3, [r7, #32] + 8002f6c: 2308 movs r3, #8 + 8002f6e: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; - 8002dfc: 687b ldr r3, [r7, #4] - 8002dfe: 69fa ldr r2, [r7, #28] - 8002e00: 611a str r2, [r3, #16] + 8002f70: 687b ldr r3, [r7, #4] + 8002f72: 69fa ldr r2, [r7, #28] + 8002f74: 611a str r2, [r3, #16] break; - 8002e02: e009 b.n 8002e18 + 8002f76: e009 b.n 8002f8c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 8002e04: 2308 movs r3, #8 - 8002e06: 623b str r3, [r7, #32] + 8002f78: 2308 movs r3, #8 + 8002f7a: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; - 8002e08: 687b ldr r3, [r7, #4] - 8002e0a: 69fa ldr r2, [r7, #28] - 8002e0c: 615a str r2, [r3, #20] + 8002f7c: 687b ldr r3, [r7, #4] + 8002f7e: 69fa ldr r2, [r7, #28] + 8002f80: 615a str r2, [r3, #20] break; - 8002e0e: e003 b.n 8002e18 + 8002f82: e003 b.n 8002f8c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; - 8002e10: 2300 movs r3, #0 - 8002e12: 623b str r3, [r7, #32] + 8002f84: 2300 movs r3, #0 + 8002f86: 623b str r3, [r7, #32] break; - 8002e14: e000 b.n 8002e18 + 8002f88: e000 b.n 8002f8c break; - 8002e16: bf00 nop + 8002f8a: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; - 8002e18: 69bb ldr r3, [r7, #24] - 8002e1a: 2bff cmp r3, #255 @ 0xff - 8002e1c: d801 bhi.n 8002e22 - 8002e1e: 687b ldr r3, [r7, #4] - 8002e20: e001 b.n 8002e26 - 8002e22: 687b ldr r3, [r7, #4] - 8002e24: 3304 adds r3, #4 - 8002e26: 617b str r3, [r7, #20] + 8002f8c: 69bb ldr r3, [r7, #24] + 8002f8e: 2bff cmp r3, #255 @ 0xff + 8002f90: d801 bhi.n 8002f96 + 8002f92: 687b ldr r3, [r7, #4] + 8002f94: e001 b.n 8002f9a + 8002f96: 687b ldr r3, [r7, #4] + 8002f98: 3304 adds r3, #4 + 8002f9a: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); - 8002e28: 69bb ldr r3, [r7, #24] - 8002e2a: 2bff cmp r3, #255 @ 0xff - 8002e2c: d802 bhi.n 8002e34 - 8002e2e: 6a7b ldr r3, [r7, #36] @ 0x24 - 8002e30: 009b lsls r3, r3, #2 - 8002e32: e002 b.n 8002e3a - 8002e34: 6a7b ldr r3, [r7, #36] @ 0x24 - 8002e36: 3b08 subs r3, #8 - 8002e38: 009b lsls r3, r3, #2 - 8002e3a: 613b str r3, [r7, #16] + 8002f9c: 69bb ldr r3, [r7, #24] + 8002f9e: 2bff cmp r3, #255 @ 0xff + 8002fa0: d802 bhi.n 8002fa8 + 8002fa2: 6a7b ldr r3, [r7, #36] @ 0x24 + 8002fa4: 009b lsls r3, r3, #2 + 8002fa6: e002 b.n 8002fae + 8002fa8: 6a7b ldr r3, [r7, #36] @ 0x24 + 8002faa: 3b08 subs r3, #8 + 8002fac: 009b lsls r3, r3, #2 + 8002fae: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); - 8002e3c: 697b ldr r3, [r7, #20] - 8002e3e: 681a ldr r2, [r3, #0] - 8002e40: 210f movs r1, #15 - 8002e42: 693b ldr r3, [r7, #16] - 8002e44: fa01 f303 lsl.w r3, r1, r3 - 8002e48: 43db mvns r3, r3 - 8002e4a: 401a ands r2, r3 - 8002e4c: 6a39 ldr r1, [r7, #32] - 8002e4e: 693b ldr r3, [r7, #16] - 8002e50: fa01 f303 lsl.w r3, r1, r3 - 8002e54: 431a orrs r2, r3 - 8002e56: 697b ldr r3, [r7, #20] - 8002e58: 601a str r2, [r3, #0] + 8002fb0: 697b ldr r3, [r7, #20] + 8002fb2: 681a ldr r2, [r3, #0] + 8002fb4: 210f movs r1, #15 + 8002fb6: 693b ldr r3, [r7, #16] + 8002fb8: fa01 f303 lsl.w r3, r1, r3 + 8002fbc: 43db mvns r3, r3 + 8002fbe: 401a ands r2, r3 + 8002fc0: 6a39 ldr r1, [r7, #32] + 8002fc2: 693b ldr r3, [r7, #16] + 8002fc4: fa01 f303 lsl.w r3, r1, r3 + 8002fc8: 431a orrs r2, r3 + 8002fca: 697b ldr r3, [r7, #20] + 8002fcc: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 8002e5a: 683b ldr r3, [r7, #0] - 8002e5c: 685b ldr r3, [r3, #4] - 8002e5e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8002e62: 2b00 cmp r3, #0 - 8002e64: f000 80b1 beq.w 8002fca + 8002fce: 683b ldr r3, [r7, #0] + 8002fd0: 685b ldr r3, [r3, #4] + 8002fd2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8002fd6: 2b00 cmp r3, #0 + 8002fd8: f000 80b1 beq.w 800313e { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); - 8002e68: 4b4d ldr r3, [pc, #308] @ (8002fa0 ) - 8002e6a: 699b ldr r3, [r3, #24] - 8002e6c: 4a4c ldr r2, [pc, #304] @ (8002fa0 ) - 8002e6e: f043 0301 orr.w r3, r3, #1 - 8002e72: 6193 str r3, [r2, #24] - 8002e74: 4b4a ldr r3, [pc, #296] @ (8002fa0 ) - 8002e76: 699b ldr r3, [r3, #24] - 8002e78: f003 0301 and.w r3, r3, #1 - 8002e7c: 60bb str r3, [r7, #8] - 8002e7e: 68bb ldr r3, [r7, #8] + 8002fdc: 4b4d ldr r3, [pc, #308] @ (8003114 ) + 8002fde: 699b ldr r3, [r3, #24] + 8002fe0: 4a4c ldr r2, [pc, #304] @ (8003114 ) + 8002fe2: f043 0301 orr.w r3, r3, #1 + 8002fe6: 6193 str r3, [r2, #24] + 8002fe8: 4b4a ldr r3, [pc, #296] @ (8003114 ) + 8002fea: 699b ldr r3, [r3, #24] + 8002fec: f003 0301 and.w r3, r3, #1 + 8002ff0: 60bb str r3, [r7, #8] + 8002ff2: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; - 8002e80: 4a48 ldr r2, [pc, #288] @ (8002fa4 ) - 8002e82: 6a7b ldr r3, [r7, #36] @ 0x24 - 8002e84: 089b lsrs r3, r3, #2 - 8002e86: 3302 adds r3, #2 - 8002e88: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8002e8c: 60fb str r3, [r7, #12] + 8002ff4: 4a48 ldr r2, [pc, #288] @ (8003118 ) + 8002ff6: 6a7b ldr r3, [r7, #36] @ 0x24 + 8002ff8: 089b lsrs r3, r3, #2 + 8002ffa: 3302 adds r3, #2 + 8002ffc: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8003000: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); - 8002e8e: 6a7b ldr r3, [r7, #36] @ 0x24 - 8002e90: f003 0303 and.w r3, r3, #3 - 8002e94: 009b lsls r3, r3, #2 - 8002e96: 220f movs r2, #15 - 8002e98: fa02 f303 lsl.w r3, r2, r3 - 8002e9c: 43db mvns r3, r3 - 8002e9e: 68fa ldr r2, [r7, #12] - 8002ea0: 4013 ands r3, r2 - 8002ea2: 60fb str r3, [r7, #12] + 8003002: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003004: f003 0303 and.w r3, r3, #3 + 8003008: 009b lsls r3, r3, #2 + 800300a: 220f movs r2, #15 + 800300c: fa02 f303 lsl.w r3, r2, r3 + 8003010: 43db mvns r3, r3 + 8003012: 68fa ldr r2, [r7, #12] + 8003014: 4013 ands r3, r2 + 8003016: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); - 8002ea4: 687b ldr r3, [r7, #4] - 8002ea6: 4a40 ldr r2, [pc, #256] @ (8002fa8 ) - 8002ea8: 4293 cmp r3, r2 - 8002eaa: d013 beq.n 8002ed4 - 8002eac: 687b ldr r3, [r7, #4] - 8002eae: 4a3f ldr r2, [pc, #252] @ (8002fac ) - 8002eb0: 4293 cmp r3, r2 - 8002eb2: d00d beq.n 8002ed0 - 8002eb4: 687b ldr r3, [r7, #4] - 8002eb6: 4a3e ldr r2, [pc, #248] @ (8002fb0 ) - 8002eb8: 4293 cmp r3, r2 - 8002eba: d007 beq.n 8002ecc - 8002ebc: 687b ldr r3, [r7, #4] - 8002ebe: 4a3d ldr r2, [pc, #244] @ (8002fb4 ) - 8002ec0: 4293 cmp r3, r2 - 8002ec2: d101 bne.n 8002ec8 - 8002ec4: 2303 movs r3, #3 - 8002ec6: e006 b.n 8002ed6 - 8002ec8: 2304 movs r3, #4 - 8002eca: e004 b.n 8002ed6 - 8002ecc: 2302 movs r3, #2 - 8002ece: e002 b.n 8002ed6 - 8002ed0: 2301 movs r3, #1 - 8002ed2: e000 b.n 8002ed6 - 8002ed4: 2300 movs r3, #0 - 8002ed6: 6a7a ldr r2, [r7, #36] @ 0x24 - 8002ed8: f002 0203 and.w r2, r2, #3 - 8002edc: 0092 lsls r2, r2, #2 - 8002ede: 4093 lsls r3, r2 - 8002ee0: 68fa ldr r2, [r7, #12] - 8002ee2: 4313 orrs r3, r2 - 8002ee4: 60fb str r3, [r7, #12] + 8003018: 687b ldr r3, [r7, #4] + 800301a: 4a40 ldr r2, [pc, #256] @ (800311c ) + 800301c: 4293 cmp r3, r2 + 800301e: d013 beq.n 8003048 + 8003020: 687b ldr r3, [r7, #4] + 8003022: 4a3f ldr r2, [pc, #252] @ (8003120 ) + 8003024: 4293 cmp r3, r2 + 8003026: d00d beq.n 8003044 + 8003028: 687b ldr r3, [r7, #4] + 800302a: 4a3e ldr r2, [pc, #248] @ (8003124 ) + 800302c: 4293 cmp r3, r2 + 800302e: d007 beq.n 8003040 + 8003030: 687b ldr r3, [r7, #4] + 8003032: 4a3d ldr r2, [pc, #244] @ (8003128 ) + 8003034: 4293 cmp r3, r2 + 8003036: d101 bne.n 800303c + 8003038: 2303 movs r3, #3 + 800303a: e006 b.n 800304a + 800303c: 2304 movs r3, #4 + 800303e: e004 b.n 800304a + 8003040: 2302 movs r3, #2 + 8003042: e002 b.n 800304a + 8003044: 2301 movs r3, #1 + 8003046: e000 b.n 800304a + 8003048: 2300 movs r3, #0 + 800304a: 6a7a ldr r2, [r7, #36] @ 0x24 + 800304c: f002 0203 and.w r2, r2, #3 + 8003050: 0092 lsls r2, r2, #2 + 8003052: 4093 lsls r3, r2 + 8003054: 68fa ldr r2, [r7, #12] + 8003056: 4313 orrs r3, r2 + 8003058: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; - 8002ee6: 492f ldr r1, [pc, #188] @ (8002fa4 ) - 8002ee8: 6a7b ldr r3, [r7, #36] @ 0x24 - 8002eea: 089b lsrs r3, r3, #2 - 8002eec: 3302 adds r3, #2 - 8002eee: 68fa ldr r2, [r7, #12] - 8002ef0: f841 2023 str.w r2, [r1, r3, lsl #2] + 800305a: 492f ldr r1, [pc, #188] @ (8003118 ) + 800305c: 6a7b ldr r3, [r7, #36] @ 0x24 + 800305e: 089b lsrs r3, r3, #2 + 8003060: 3302 adds r3, #2 + 8003062: 68fa ldr r2, [r7, #12] + 8003064: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 8002ef4: 683b ldr r3, [r7, #0] - 8002ef6: 685b ldr r3, [r3, #4] - 8002ef8: f403 1380 and.w r3, r3, #1048576 @ 0x100000 - 8002efc: 2b00 cmp r3, #0 - 8002efe: d006 beq.n 8002f0e + 8003068: 683b ldr r3, [r7, #0] + 800306a: 685b ldr r3, [r3, #4] + 800306c: f403 1380 and.w r3, r3, #1048576 @ 0x100000 + 8003070: 2b00 cmp r3, #0 + 8003072: d006 beq.n 8003082 { SET_BIT(EXTI->RTSR, iocurrent); - 8002f00: 4b2d ldr r3, [pc, #180] @ (8002fb8 ) - 8002f02: 689a ldr r2, [r3, #8] - 8002f04: 492c ldr r1, [pc, #176] @ (8002fb8 ) - 8002f06: 69bb ldr r3, [r7, #24] - 8002f08: 4313 orrs r3, r2 - 8002f0a: 608b str r3, [r1, #8] - 8002f0c: e006 b.n 8002f1c + 8003074: 4b2d ldr r3, [pc, #180] @ (800312c ) + 8003076: 689a ldr r2, [r3, #8] + 8003078: 492c ldr r1, [pc, #176] @ (800312c ) + 800307a: 69bb ldr r3, [r7, #24] + 800307c: 4313 orrs r3, r2 + 800307e: 608b str r3, [r1, #8] + 8003080: e006 b.n 8003090 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); - 8002f0e: 4b2a ldr r3, [pc, #168] @ (8002fb8 ) - 8002f10: 689a ldr r2, [r3, #8] - 8002f12: 69bb ldr r3, [r7, #24] - 8002f14: 43db mvns r3, r3 - 8002f16: 4928 ldr r1, [pc, #160] @ (8002fb8 ) - 8002f18: 4013 ands r3, r2 - 8002f1a: 608b str r3, [r1, #8] + 8003082: 4b2a ldr r3, [pc, #168] @ (800312c ) + 8003084: 689a ldr r2, [r3, #8] + 8003086: 69bb ldr r3, [r7, #24] + 8003088: 43db mvns r3, r3 + 800308a: 4928 ldr r1, [pc, #160] @ (800312c ) + 800308c: 4013 ands r3, r2 + 800308e: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 8002f1c: 683b ldr r3, [r7, #0] - 8002f1e: 685b ldr r3, [r3, #4] - 8002f20: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 8002f24: 2b00 cmp r3, #0 - 8002f26: d006 beq.n 8002f36 + 8003090: 683b ldr r3, [r7, #0] + 8003092: 685b ldr r3, [r3, #4] + 8003094: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 8003098: 2b00 cmp r3, #0 + 800309a: d006 beq.n 80030aa { SET_BIT(EXTI->FTSR, iocurrent); - 8002f28: 4b23 ldr r3, [pc, #140] @ (8002fb8 ) - 8002f2a: 68da ldr r2, [r3, #12] - 8002f2c: 4922 ldr r1, [pc, #136] @ (8002fb8 ) - 8002f2e: 69bb ldr r3, [r7, #24] - 8002f30: 4313 orrs r3, r2 - 8002f32: 60cb str r3, [r1, #12] - 8002f34: e006 b.n 8002f44 + 800309c: 4b23 ldr r3, [pc, #140] @ (800312c ) + 800309e: 68da ldr r2, [r3, #12] + 80030a0: 4922 ldr r1, [pc, #136] @ (800312c ) + 80030a2: 69bb ldr r3, [r7, #24] + 80030a4: 4313 orrs r3, r2 + 80030a6: 60cb str r3, [r1, #12] + 80030a8: e006 b.n 80030b8 } else { CLEAR_BIT(EXTI->FTSR, iocurrent); - 8002f36: 4b20 ldr r3, [pc, #128] @ (8002fb8 ) - 8002f38: 68da ldr r2, [r3, #12] - 8002f3a: 69bb ldr r3, [r7, #24] - 8002f3c: 43db mvns r3, r3 - 8002f3e: 491e ldr r1, [pc, #120] @ (8002fb8 ) - 8002f40: 4013 ands r3, r2 - 8002f42: 60cb str r3, [r1, #12] + 80030aa: 4b20 ldr r3, [pc, #128] @ (800312c ) + 80030ac: 68da ldr r2, [r3, #12] + 80030ae: 69bb ldr r3, [r7, #24] + 80030b0: 43db mvns r3, r3 + 80030b2: 491e ldr r1, [pc, #120] @ (800312c ) + 80030b4: 4013 ands r3, r2 + 80030b6: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 8002f44: 683b ldr r3, [r7, #0] - 8002f46: 685b ldr r3, [r3, #4] - 8002f48: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8002f4c: 2b00 cmp r3, #0 - 8002f4e: d006 beq.n 8002f5e + 80030b8: 683b ldr r3, [r7, #0] + 80030ba: 685b ldr r3, [r3, #4] + 80030bc: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 80030c0: 2b00 cmp r3, #0 + 80030c2: d006 beq.n 80030d2 { SET_BIT(EXTI->EMR, iocurrent); - 8002f50: 4b19 ldr r3, [pc, #100] @ (8002fb8 ) - 8002f52: 685a ldr r2, [r3, #4] - 8002f54: 4918 ldr r1, [pc, #96] @ (8002fb8 ) - 8002f56: 69bb ldr r3, [r7, #24] - 8002f58: 4313 orrs r3, r2 - 8002f5a: 604b str r3, [r1, #4] - 8002f5c: e006 b.n 8002f6c + 80030c4: 4b19 ldr r3, [pc, #100] @ (800312c ) + 80030c6: 685a ldr r2, [r3, #4] + 80030c8: 4918 ldr r1, [pc, #96] @ (800312c ) + 80030ca: 69bb ldr r3, [r7, #24] + 80030cc: 4313 orrs r3, r2 + 80030ce: 604b str r3, [r1, #4] + 80030d0: e006 b.n 80030e0 } else { CLEAR_BIT(EXTI->EMR, iocurrent); - 8002f5e: 4b16 ldr r3, [pc, #88] @ (8002fb8 ) - 8002f60: 685a ldr r2, [r3, #4] - 8002f62: 69bb ldr r3, [r7, #24] - 8002f64: 43db mvns r3, r3 - 8002f66: 4914 ldr r1, [pc, #80] @ (8002fb8 ) - 8002f68: 4013 ands r3, r2 - 8002f6a: 604b str r3, [r1, #4] + 80030d2: 4b16 ldr r3, [pc, #88] @ (800312c ) + 80030d4: 685a ldr r2, [r3, #4] + 80030d6: 69bb ldr r3, [r7, #24] + 80030d8: 43db mvns r3, r3 + 80030da: 4914 ldr r1, [pc, #80] @ (800312c ) + 80030dc: 4013 ands r3, r2 + 80030de: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 8002f6c: 683b ldr r3, [r7, #0] - 8002f6e: 685b ldr r3, [r3, #4] - 8002f70: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8002f74: 2b00 cmp r3, #0 - 8002f76: d021 beq.n 8002fbc + 80030e0: 683b ldr r3, [r7, #0] + 80030e2: 685b ldr r3, [r3, #4] + 80030e4: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 80030e8: 2b00 cmp r3, #0 + 80030ea: d021 beq.n 8003130 { SET_BIT(EXTI->IMR, iocurrent); - 8002f78: 4b0f ldr r3, [pc, #60] @ (8002fb8 ) - 8002f7a: 681a ldr r2, [r3, #0] - 8002f7c: 490e ldr r1, [pc, #56] @ (8002fb8 ) - 8002f7e: 69bb ldr r3, [r7, #24] - 8002f80: 4313 orrs r3, r2 - 8002f82: 600b str r3, [r1, #0] - 8002f84: e021 b.n 8002fca - 8002f86: bf00 nop - 8002f88: 10320000 .word 0x10320000 - 8002f8c: 10310000 .word 0x10310000 - 8002f90: 10220000 .word 0x10220000 - 8002f94: 10210000 .word 0x10210000 - 8002f98: 10120000 .word 0x10120000 - 8002f9c: 10110000 .word 0x10110000 - 8002fa0: 40021000 .word 0x40021000 - 8002fa4: 40010000 .word 0x40010000 - 8002fa8: 40010800 .word 0x40010800 - 8002fac: 40010c00 .word 0x40010c00 - 8002fb0: 40011000 .word 0x40011000 - 8002fb4: 40011400 .word 0x40011400 - 8002fb8: 40010400 .word 0x40010400 + 80030ec: 4b0f ldr r3, [pc, #60] @ (800312c ) + 80030ee: 681a ldr r2, [r3, #0] + 80030f0: 490e ldr r1, [pc, #56] @ (800312c ) + 80030f2: 69bb ldr r3, [r7, #24] + 80030f4: 4313 orrs r3, r2 + 80030f6: 600b str r3, [r1, #0] + 80030f8: e021 b.n 800313e + 80030fa: bf00 nop + 80030fc: 10320000 .word 0x10320000 + 8003100: 10310000 .word 0x10310000 + 8003104: 10220000 .word 0x10220000 + 8003108: 10210000 .word 0x10210000 + 800310c: 10120000 .word 0x10120000 + 8003110: 10110000 .word 0x10110000 + 8003114: 40021000 .word 0x40021000 + 8003118: 40010000 .word 0x40010000 + 800311c: 40010800 .word 0x40010800 + 8003120: 40010c00 .word 0x40010c00 + 8003124: 40011000 .word 0x40011000 + 8003128: 40011400 .word 0x40011400 + 800312c: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); - 8002fbc: 4b0b ldr r3, [pc, #44] @ (8002fec ) - 8002fbe: 681a ldr r2, [r3, #0] - 8002fc0: 69bb ldr r3, [r7, #24] - 8002fc2: 43db mvns r3, r3 - 8002fc4: 4909 ldr r1, [pc, #36] @ (8002fec ) - 8002fc6: 4013 ands r3, r2 - 8002fc8: 600b str r3, [r1, #0] + 8003130: 4b0b ldr r3, [pc, #44] @ (8003160 ) + 8003132: 681a ldr r2, [r3, #0] + 8003134: 69bb ldr r3, [r7, #24] + 8003136: 43db mvns r3, r3 + 8003138: 4909 ldr r1, [pc, #36] @ (8003160 ) + 800313a: 4013 ands r3, r2 + 800313c: 600b str r3, [r1, #0] } } } position++; - 8002fca: 6a7b ldr r3, [r7, #36] @ 0x24 - 8002fcc: 3301 adds r3, #1 - 8002fce: 627b str r3, [r7, #36] @ 0x24 + 800313e: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003140: 3301 adds r3, #1 + 8003142: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) - 8002fd0: 683b ldr r3, [r7, #0] - 8002fd2: 681a ldr r2, [r3, #0] - 8002fd4: 6a7b ldr r3, [r7, #36] @ 0x24 - 8002fd6: fa22 f303 lsr.w r3, r2, r3 - 8002fda: 2b00 cmp r3, #0 - 8002fdc: f47f ae8e bne.w 8002cfc + 8003144: 683b ldr r3, [r7, #0] + 8003146: 681a ldr r2, [r3, #0] + 8003148: 6a7b ldr r3, [r7, #36] @ 0x24 + 800314a: fa22 f303 lsr.w r3, r2, r3 + 800314e: 2b00 cmp r3, #0 + 8003150: f47f ae8e bne.w 8002e70 } } - 8002fe0: bf00 nop - 8002fe2: bf00 nop - 8002fe4: 372c adds r7, #44 @ 0x2c - 8002fe6: 46bd mov sp, r7 - 8002fe8: bc80 pop {r7} - 8002fea: 4770 bx lr - 8002fec: 40010400 .word 0x40010400 + 8003154: bf00 nop + 8003156: bf00 nop + 8003158: 372c adds r7, #44 @ 0x2c + 800315a: 46bd mov sp, r7 + 800315c: bc80 pop {r7} + 800315e: 4770 bx lr + 8003160: 40010400 .word 0x40010400 -08002ff0 : +08003164 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 8002ff0: b480 push {r7} - 8002ff2: b085 sub sp, #20 - 8002ff4: af00 add r7, sp, #0 - 8002ff6: 6078 str r0, [r7, #4] - 8002ff8: 460b mov r3, r1 - 8002ffa: 807b strh r3, [r7, #2] + 8003164: b480 push {r7} + 8003166: b085 sub sp, #20 + 8003168: af00 add r7, sp, #0 + 800316a: 6078 str r0, [r7, #4] + 800316c: 460b mov r3, r1 + 800316e: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - 8002ffc: 687b ldr r3, [r7, #4] - 8002ffe: 689a ldr r2, [r3, #8] - 8003000: 887b ldrh r3, [r7, #2] - 8003002: 4013 ands r3, r2 - 8003004: 2b00 cmp r3, #0 - 8003006: d002 beq.n 800300e + 8003170: 687b ldr r3, [r7, #4] + 8003172: 689a ldr r2, [r3, #8] + 8003174: 887b ldrh r3, [r7, #2] + 8003176: 4013 ands r3, r2 + 8003178: 2b00 cmp r3, #0 + 800317a: d002 beq.n 8003182 { bitstatus = GPIO_PIN_SET; - 8003008: 2301 movs r3, #1 - 800300a: 73fb strb r3, [r7, #15] - 800300c: e001 b.n 8003012 + 800317c: 2301 movs r3, #1 + 800317e: 73fb strb r3, [r7, #15] + 8003180: e001 b.n 8003186 } else { bitstatus = GPIO_PIN_RESET; - 800300e: 2300 movs r3, #0 - 8003010: 73fb strb r3, [r7, #15] + 8003182: 2300 movs r3, #0 + 8003184: 73fb strb r3, [r7, #15] } return bitstatus; - 8003012: 7bfb ldrb r3, [r7, #15] + 8003186: 7bfb ldrb r3, [r7, #15] } - 8003014: 4618 mov r0, r3 - 8003016: 3714 adds r7, #20 - 8003018: 46bd mov sp, r7 - 800301a: bc80 pop {r7} - 800301c: 4770 bx lr + 8003188: 4618 mov r0, r3 + 800318a: 3714 adds r7, #20 + 800318c: 46bd mov sp, r7 + 800318e: bc80 pop {r7} + 8003190: 4770 bx lr -0800301e : +08003192 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 800301e: b480 push {r7} - 8003020: b083 sub sp, #12 - 8003022: af00 add r7, sp, #0 - 8003024: 6078 str r0, [r7, #4] - 8003026: 460b mov r3, r1 - 8003028: 807b strh r3, [r7, #2] - 800302a: 4613 mov r3, r2 - 800302c: 707b strb r3, [r7, #1] + 8003192: b480 push {r7} + 8003194: b083 sub sp, #12 + 8003196: af00 add r7, sp, #0 + 8003198: 6078 str r0, [r7, #4] + 800319a: 460b mov r3, r1 + 800319c: 807b strh r3, [r7, #2] + 800319e: 4613 mov r3, r2 + 80031a0: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 800302e: 787b ldrb r3, [r7, #1] - 8003030: 2b00 cmp r3, #0 - 8003032: d003 beq.n 800303c + 80031a2: 787b ldrb r3, [r7, #1] + 80031a4: 2b00 cmp r3, #0 + 80031a6: d003 beq.n 80031b0 { GPIOx->BSRR = GPIO_Pin; - 8003034: 887a ldrh r2, [r7, #2] - 8003036: 687b ldr r3, [r7, #4] - 8003038: 611a str r2, [r3, #16] + 80031a8: 887a ldrh r2, [r7, #2] + 80031aa: 687b ldr r3, [r7, #4] + 80031ac: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } - 800303a: e003 b.n 8003044 + 80031ae: e003 b.n 80031b8 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; - 800303c: 887b ldrh r3, [r7, #2] - 800303e: 041a lsls r2, r3, #16 - 8003040: 687b ldr r3, [r7, #4] - 8003042: 611a str r2, [r3, #16] + 80031b0: 887b ldrh r3, [r7, #2] + 80031b2: 041a lsls r2, r3, #16 + 80031b4: 687b ldr r3, [r7, #4] + 80031b6: 611a str r2, [r3, #16] } - 8003044: bf00 nop - 8003046: 370c adds r7, #12 - 8003048: 46bd mov sp, r7 - 800304a: bc80 pop {r7} - 800304c: 4770 bx lr + 80031b8: bf00 nop + 80031ba: 370c adds r7, #12 + 80031bc: 46bd mov sp, r7 + 80031be: bc80 pop {r7} + 80031c0: 4770 bx lr -0800304e : +080031c2 : * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral * @param GPIO_Pin: Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 800304e: b480 push {r7} - 8003050: b085 sub sp, #20 - 8003052: af00 add r7, sp, #0 - 8003054: 6078 str r0, [r7, #4] - 8003056: 460b mov r3, r1 - 8003058: 807b strh r3, [r7, #2] + 80031c2: b480 push {r7} + 80031c4: b085 sub sp, #20 + 80031c6: af00 add r7, sp, #0 + 80031c8: 6078 str r0, [r7, #4] + 80031ca: 460b mov r3, r1 + 80031cc: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; - 800305a: 687b ldr r3, [r7, #4] - 800305c: 68db ldr r3, [r3, #12] - 800305e: 60fb str r3, [r7, #12] + 80031ce: 687b ldr r3, [r7, #4] + 80031d0: 68db ldr r3, [r3, #12] + 80031d2: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); - 8003060: 887a ldrh r2, [r7, #2] - 8003062: 68fb ldr r3, [r7, #12] - 8003064: 4013 ands r3, r2 - 8003066: 041a lsls r2, r3, #16 - 8003068: 68fb ldr r3, [r7, #12] - 800306a: 43d9 mvns r1, r3 - 800306c: 887b ldrh r3, [r7, #2] - 800306e: 400b ands r3, r1 - 8003070: 431a orrs r2, r3 - 8003072: 687b ldr r3, [r7, #4] - 8003074: 611a str r2, [r3, #16] + 80031d4: 887a ldrh r2, [r7, #2] + 80031d6: 68fb ldr r3, [r7, #12] + 80031d8: 4013 ands r3, r2 + 80031da: 041a lsls r2, r3, #16 + 80031dc: 68fb ldr r3, [r7, #12] + 80031de: 43d9 mvns r1, r3 + 80031e0: 887b ldrh r3, [r7, #2] + 80031e2: 400b ands r3, r1 + 80031e4: 431a orrs r2, r3 + 80031e6: 687b ldr r3, [r7, #4] + 80031e8: 611a str r2, [r3, #16] } - 8003076: bf00 nop - 8003078: 3714 adds r7, #20 - 800307a: 46bd mov sp, r7 - 800307c: bc80 pop {r7} - 800307e: 4770 bx lr + 80031ea: bf00 nop + 80031ec: 3714 adds r7, #20 + 80031ee: 46bd mov sp, r7 + 80031f0: bc80 pop {r7} + 80031f2: 4770 bx lr -08003080 : +080031f4 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { - 8003080: b580 push {r7, lr} - 8003082: b084 sub sp, #16 - 8003084: af00 add r7, sp, #0 - 8003086: 6078 str r0, [r7, #4] + 80031f4: b580 push {r7, lr} + 80031f6: b084 sub sp, #16 + 80031f8: af00 add r7, sp, #0 + 80031fa: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) - 8003088: 687b ldr r3, [r7, #4] - 800308a: 2b00 cmp r3, #0 - 800308c: d101 bne.n 8003092 + 80031fc: 687b ldr r3, [r7, #4] + 80031fe: 2b00 cmp r3, #0 + 8003200: d101 bne.n 8003206 { return HAL_ERROR; - 800308e: 2301 movs r3, #1 - 8003090: e12b b.n 80032ea + 8003202: 2301 movs r3, #1 + 8003204: e12b b.n 800345e assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) - 8003092: 687b ldr r3, [r7, #4] - 8003094: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8003098: b2db uxtb r3, r3 - 800309a: 2b00 cmp r3, #0 - 800309c: d106 bne.n 80030ac + 8003206: 687b ldr r3, [r7, #4] + 8003208: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 800320c: b2db uxtb r3, r3 + 800320e: 2b00 cmp r3, #0 + 8003210: d106 bne.n 8003220 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; - 800309e: 687b ldr r3, [r7, #4] - 80030a0: 2200 movs r2, #0 - 80030a2: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003212: 687b ldr r3, [r7, #4] + 8003214: 2200 movs r2, #0 + 8003216: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); - 80030a6: 6878 ldr r0, [r7, #4] - 80030a8: f7fe fc76 bl 8001998 + 800321a: 6878 ldr r0, [r7, #4] + 800321c: f7fe fc60 bl 8001ae0 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; - 80030ac: 687b ldr r3, [r7, #4] - 80030ae: 2224 movs r2, #36 @ 0x24 - 80030b0: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003220: 687b ldr r3, [r7, #4] + 8003222: 2224 movs r2, #36 @ 0x24 + 8003224: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 80030b4: 687b ldr r3, [r7, #4] - 80030b6: 681b ldr r3, [r3, #0] - 80030b8: 681a ldr r2, [r3, #0] - 80030ba: 687b ldr r3, [r7, #4] - 80030bc: 681b ldr r3, [r3, #0] - 80030be: f022 0201 bic.w r2, r2, #1 - 80030c2: 601a str r2, [r3, #0] + 8003228: 687b ldr r3, [r7, #4] + 800322a: 681b ldr r3, [r3, #0] + 800322c: 681a ldr r2, [r3, #0] + 800322e: 687b ldr r3, [r7, #4] + 8003230: 681b ldr r3, [r3, #0] + 8003232: f022 0201 bic.w r2, r2, #1 + 8003236: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; - 80030c4: 687b ldr r3, [r7, #4] - 80030c6: 681b ldr r3, [r3, #0] - 80030c8: 681a ldr r2, [r3, #0] - 80030ca: 687b ldr r3, [r7, #4] - 80030cc: 681b ldr r3, [r3, #0] - 80030ce: f442 4200 orr.w r2, r2, #32768 @ 0x8000 - 80030d2: 601a str r2, [r3, #0] + 8003238: 687b ldr r3, [r7, #4] + 800323a: 681b ldr r3, [r3, #0] + 800323c: 681a ldr r2, [r3, #0] + 800323e: 687b ldr r3, [r7, #4] + 8003240: 681b ldr r3, [r3, #0] + 8003242: f442 4200 orr.w r2, r2, #32768 @ 0x8000 + 8003246: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; - 80030d4: 687b ldr r3, [r7, #4] - 80030d6: 681b ldr r3, [r3, #0] - 80030d8: 681a ldr r2, [r3, #0] - 80030da: 687b ldr r3, [r7, #4] - 80030dc: 681b ldr r3, [r3, #0] - 80030de: f422 4200 bic.w r2, r2, #32768 @ 0x8000 - 80030e2: 601a str r2, [r3, #0] + 8003248: 687b ldr r3, [r7, #4] + 800324a: 681b ldr r3, [r3, #0] + 800324c: 681a ldr r2, [r3, #0] + 800324e: 687b ldr r3, [r7, #4] + 8003250: 681b ldr r3, [r3, #0] + 8003252: f422 4200 bic.w r2, r2, #32768 @ 0x8000 + 8003256: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); - 80030e4: f001 fbcc bl 8004880 - 80030e8: 60f8 str r0, [r7, #12] + 8003258: f001 fbcc bl 80049f4 + 800325c: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) - 80030ea: 687b ldr r3, [r7, #4] - 80030ec: 685b ldr r3, [r3, #4] - 80030ee: 4a81 ldr r2, [pc, #516] @ (80032f4 ) - 80030f0: 4293 cmp r3, r2 - 80030f2: d807 bhi.n 8003104 - 80030f4: 68fb ldr r3, [r7, #12] - 80030f6: 4a80 ldr r2, [pc, #512] @ (80032f8 ) - 80030f8: 4293 cmp r3, r2 - 80030fa: bf94 ite ls - 80030fc: 2301 movls r3, #1 - 80030fe: 2300 movhi r3, #0 - 8003100: b2db uxtb r3, r3 - 8003102: e006 b.n 8003112 - 8003104: 68fb ldr r3, [r7, #12] - 8003106: 4a7d ldr r2, [pc, #500] @ (80032fc ) - 8003108: 4293 cmp r3, r2 - 800310a: bf94 ite ls - 800310c: 2301 movls r3, #1 - 800310e: 2300 movhi r3, #0 - 8003110: b2db uxtb r3, r3 - 8003112: 2b00 cmp r3, #0 - 8003114: d001 beq.n 800311a + 800325e: 687b ldr r3, [r7, #4] + 8003260: 685b ldr r3, [r3, #4] + 8003262: 4a81 ldr r2, [pc, #516] @ (8003468 ) + 8003264: 4293 cmp r3, r2 + 8003266: d807 bhi.n 8003278 + 8003268: 68fb ldr r3, [r7, #12] + 800326a: 4a80 ldr r2, [pc, #512] @ (800346c ) + 800326c: 4293 cmp r3, r2 + 800326e: bf94 ite ls + 8003270: 2301 movls r3, #1 + 8003272: 2300 movhi r3, #0 + 8003274: b2db uxtb r3, r3 + 8003276: e006 b.n 8003286 + 8003278: 68fb ldr r3, [r7, #12] + 800327a: 4a7d ldr r2, [pc, #500] @ (8003470 ) + 800327c: 4293 cmp r3, r2 + 800327e: bf94 ite ls + 8003280: 2301 movls r3, #1 + 8003282: 2300 movhi r3, #0 + 8003284: b2db uxtb r3, r3 + 8003286: 2b00 cmp r3, #0 + 8003288: d001 beq.n 800328e { return HAL_ERROR; - 8003116: 2301 movs r3, #1 - 8003118: e0e7 b.n 80032ea + 800328a: 2301 movs r3, #1 + 800328c: e0e7 b.n 800345e } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); - 800311a: 68fb ldr r3, [r7, #12] - 800311c: 4a78 ldr r2, [pc, #480] @ (8003300 ) - 800311e: fba2 2303 umull r2, r3, r2, r3 - 8003122: 0c9b lsrs r3, r3, #18 - 8003124: 60bb str r3, [r7, #8] + 800328e: 68fb ldr r3, [r7, #12] + 8003290: 4a78 ldr r2, [pc, #480] @ (8003474 ) + 8003292: fba2 2303 umull r2, r3, r2, r3 + 8003296: 0c9b lsrs r3, r3, #18 + 8003298: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); - 8003126: 687b ldr r3, [r7, #4] - 8003128: 681b ldr r3, [r3, #0] - 800312a: 685b ldr r3, [r3, #4] - 800312c: f023 013f bic.w r1, r3, #63 @ 0x3f - 8003130: 687b ldr r3, [r7, #4] - 8003132: 681b ldr r3, [r3, #0] - 8003134: 68ba ldr r2, [r7, #8] - 8003136: 430a orrs r2, r1 - 8003138: 605a str r2, [r3, #4] + 800329a: 687b ldr r3, [r7, #4] + 800329c: 681b ldr r3, [r3, #0] + 800329e: 685b ldr r3, [r3, #4] + 80032a0: f023 013f bic.w r1, r3, #63 @ 0x3f + 80032a4: 687b ldr r3, [r7, #4] + 80032a6: 681b ldr r3, [r3, #0] + 80032a8: 68ba ldr r2, [r7, #8] + 80032aa: 430a orrs r2, r1 + 80032ac: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); - 800313a: 687b ldr r3, [r7, #4] - 800313c: 681b ldr r3, [r3, #0] - 800313e: 6a1b ldr r3, [r3, #32] - 8003140: f023 013f bic.w r1, r3, #63 @ 0x3f - 8003144: 687b ldr r3, [r7, #4] - 8003146: 685b ldr r3, [r3, #4] - 8003148: 4a6a ldr r2, [pc, #424] @ (80032f4 ) - 800314a: 4293 cmp r3, r2 - 800314c: d802 bhi.n 8003154 - 800314e: 68bb ldr r3, [r7, #8] - 8003150: 3301 adds r3, #1 - 8003152: e009 b.n 8003168 - 8003154: 68bb ldr r3, [r7, #8] - 8003156: f44f 7296 mov.w r2, #300 @ 0x12c - 800315a: fb02 f303 mul.w r3, r2, r3 - 800315e: 4a69 ldr r2, [pc, #420] @ (8003304 ) - 8003160: fba2 2303 umull r2, r3, r2, r3 - 8003164: 099b lsrs r3, r3, #6 - 8003166: 3301 adds r3, #1 - 8003168: 687a ldr r2, [r7, #4] - 800316a: 6812 ldr r2, [r2, #0] - 800316c: 430b orrs r3, r1 - 800316e: 6213 str r3, [r2, #32] + 80032ae: 687b ldr r3, [r7, #4] + 80032b0: 681b ldr r3, [r3, #0] + 80032b2: 6a1b ldr r3, [r3, #32] + 80032b4: f023 013f bic.w r1, r3, #63 @ 0x3f + 80032b8: 687b ldr r3, [r7, #4] + 80032ba: 685b ldr r3, [r3, #4] + 80032bc: 4a6a ldr r2, [pc, #424] @ (8003468 ) + 80032be: 4293 cmp r3, r2 + 80032c0: d802 bhi.n 80032c8 + 80032c2: 68bb ldr r3, [r7, #8] + 80032c4: 3301 adds r3, #1 + 80032c6: e009 b.n 80032dc + 80032c8: 68bb ldr r3, [r7, #8] + 80032ca: f44f 7296 mov.w r2, #300 @ 0x12c + 80032ce: fb02 f303 mul.w r3, r2, r3 + 80032d2: 4a69 ldr r2, [pc, #420] @ (8003478 ) + 80032d4: fba2 2303 umull r2, r3, r2, r3 + 80032d8: 099b lsrs r3, r3, #6 + 80032da: 3301 adds r3, #1 + 80032dc: 687a ldr r2, [r7, #4] + 80032de: 6812 ldr r2, [r2, #0] + 80032e0: 430b orrs r3, r1 + 80032e2: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); - 8003170: 687b ldr r3, [r7, #4] - 8003172: 681b ldr r3, [r3, #0] - 8003174: 69db ldr r3, [r3, #28] - 8003176: f423 424f bic.w r2, r3, #52992 @ 0xcf00 - 800317a: f022 02ff bic.w r2, r2, #255 @ 0xff - 800317e: 687b ldr r3, [r7, #4] - 8003180: 685b ldr r3, [r3, #4] - 8003182: 495c ldr r1, [pc, #368] @ (80032f4 ) - 8003184: 428b cmp r3, r1 - 8003186: d819 bhi.n 80031bc - 8003188: 68fb ldr r3, [r7, #12] - 800318a: 1e59 subs r1, r3, #1 - 800318c: 687b ldr r3, [r7, #4] - 800318e: 685b ldr r3, [r3, #4] - 8003190: 005b lsls r3, r3, #1 - 8003192: fbb1 f3f3 udiv r3, r1, r3 - 8003196: 1c59 adds r1, r3, #1 - 8003198: f640 73fc movw r3, #4092 @ 0xffc - 800319c: 400b ands r3, r1 - 800319e: 2b00 cmp r3, #0 - 80031a0: d00a beq.n 80031b8 - 80031a2: 68fb ldr r3, [r7, #12] - 80031a4: 1e59 subs r1, r3, #1 - 80031a6: 687b ldr r3, [r7, #4] - 80031a8: 685b ldr r3, [r3, #4] - 80031aa: 005b lsls r3, r3, #1 - 80031ac: fbb1 f3f3 udiv r3, r1, r3 - 80031b0: 3301 adds r3, #1 - 80031b2: f3c3 030b ubfx r3, r3, #0, #12 - 80031b6: e051 b.n 800325c - 80031b8: 2304 movs r3, #4 - 80031ba: e04f b.n 800325c - 80031bc: 687b ldr r3, [r7, #4] - 80031be: 689b ldr r3, [r3, #8] - 80031c0: 2b00 cmp r3, #0 - 80031c2: d111 bne.n 80031e8 - 80031c4: 68fb ldr r3, [r7, #12] - 80031c6: 1e58 subs r0, r3, #1 - 80031c8: 687b ldr r3, [r7, #4] - 80031ca: 6859 ldr r1, [r3, #4] - 80031cc: 460b mov r3, r1 - 80031ce: 005b lsls r3, r3, #1 - 80031d0: 440b add r3, r1 - 80031d2: fbb0 f3f3 udiv r3, r0, r3 - 80031d6: 3301 adds r3, #1 - 80031d8: f3c3 030b ubfx r3, r3, #0, #12 - 80031dc: 2b00 cmp r3, #0 - 80031de: bf0c ite eq - 80031e0: 2301 moveq r3, #1 - 80031e2: 2300 movne r3, #0 - 80031e4: b2db uxtb r3, r3 - 80031e6: e012 b.n 800320e - 80031e8: 68fb ldr r3, [r7, #12] - 80031ea: 1e58 subs r0, r3, #1 - 80031ec: 687b ldr r3, [r7, #4] - 80031ee: 6859 ldr r1, [r3, #4] - 80031f0: 460b mov r3, r1 - 80031f2: 009b lsls r3, r3, #2 - 80031f4: 440b add r3, r1 - 80031f6: 0099 lsls r1, r3, #2 - 80031f8: 440b add r3, r1 - 80031fa: fbb0 f3f3 udiv r3, r0, r3 - 80031fe: 3301 adds r3, #1 - 8003200: f3c3 030b ubfx r3, r3, #0, #12 - 8003204: 2b00 cmp r3, #0 - 8003206: bf0c ite eq - 8003208: 2301 moveq r3, #1 - 800320a: 2300 movne r3, #0 - 800320c: b2db uxtb r3, r3 - 800320e: 2b00 cmp r3, #0 - 8003210: d001 beq.n 8003216 - 8003212: 2301 movs r3, #1 - 8003214: e022 b.n 800325c - 8003216: 687b ldr r3, [r7, #4] - 8003218: 689b ldr r3, [r3, #8] - 800321a: 2b00 cmp r3, #0 - 800321c: d10e bne.n 800323c - 800321e: 68fb ldr r3, [r7, #12] - 8003220: 1e58 subs r0, r3, #1 - 8003222: 687b ldr r3, [r7, #4] - 8003224: 6859 ldr r1, [r3, #4] - 8003226: 460b mov r3, r1 - 8003228: 005b lsls r3, r3, #1 - 800322a: 440b add r3, r1 - 800322c: fbb0 f3f3 udiv r3, r0, r3 - 8003230: 3301 adds r3, #1 - 8003232: f3c3 030b ubfx r3, r3, #0, #12 - 8003236: f443 4300 orr.w r3, r3, #32768 @ 0x8000 - 800323a: e00f b.n 800325c - 800323c: 68fb ldr r3, [r7, #12] - 800323e: 1e58 subs r0, r3, #1 - 8003240: 687b ldr r3, [r7, #4] - 8003242: 6859 ldr r1, [r3, #4] - 8003244: 460b mov r3, r1 - 8003246: 009b lsls r3, r3, #2 - 8003248: 440b add r3, r1 - 800324a: 0099 lsls r1, r3, #2 - 800324c: 440b add r3, r1 - 800324e: fbb0 f3f3 udiv r3, r0, r3 - 8003252: 3301 adds r3, #1 - 8003254: f3c3 030b ubfx r3, r3, #0, #12 - 8003258: f443 4340 orr.w r3, r3, #49152 @ 0xc000 - 800325c: 6879 ldr r1, [r7, #4] - 800325e: 6809 ldr r1, [r1, #0] - 8003260: 4313 orrs r3, r2 - 8003262: 61cb str r3, [r1, #28] + 80032e4: 687b ldr r3, [r7, #4] + 80032e6: 681b ldr r3, [r3, #0] + 80032e8: 69db ldr r3, [r3, #28] + 80032ea: f423 424f bic.w r2, r3, #52992 @ 0xcf00 + 80032ee: f022 02ff bic.w r2, r2, #255 @ 0xff + 80032f2: 687b ldr r3, [r7, #4] + 80032f4: 685b ldr r3, [r3, #4] + 80032f6: 495c ldr r1, [pc, #368] @ (8003468 ) + 80032f8: 428b cmp r3, r1 + 80032fa: d819 bhi.n 8003330 + 80032fc: 68fb ldr r3, [r7, #12] + 80032fe: 1e59 subs r1, r3, #1 + 8003300: 687b ldr r3, [r7, #4] + 8003302: 685b ldr r3, [r3, #4] + 8003304: 005b lsls r3, r3, #1 + 8003306: fbb1 f3f3 udiv r3, r1, r3 + 800330a: 1c59 adds r1, r3, #1 + 800330c: f640 73fc movw r3, #4092 @ 0xffc + 8003310: 400b ands r3, r1 + 8003312: 2b00 cmp r3, #0 + 8003314: d00a beq.n 800332c + 8003316: 68fb ldr r3, [r7, #12] + 8003318: 1e59 subs r1, r3, #1 + 800331a: 687b ldr r3, [r7, #4] + 800331c: 685b ldr r3, [r3, #4] + 800331e: 005b lsls r3, r3, #1 + 8003320: fbb1 f3f3 udiv r3, r1, r3 + 8003324: 3301 adds r3, #1 + 8003326: f3c3 030b ubfx r3, r3, #0, #12 + 800332a: e051 b.n 80033d0 + 800332c: 2304 movs r3, #4 + 800332e: e04f b.n 80033d0 + 8003330: 687b ldr r3, [r7, #4] + 8003332: 689b ldr r3, [r3, #8] + 8003334: 2b00 cmp r3, #0 + 8003336: d111 bne.n 800335c + 8003338: 68fb ldr r3, [r7, #12] + 800333a: 1e58 subs r0, r3, #1 + 800333c: 687b ldr r3, [r7, #4] + 800333e: 6859 ldr r1, [r3, #4] + 8003340: 460b mov r3, r1 + 8003342: 005b lsls r3, r3, #1 + 8003344: 440b add r3, r1 + 8003346: fbb0 f3f3 udiv r3, r0, r3 + 800334a: 3301 adds r3, #1 + 800334c: f3c3 030b ubfx r3, r3, #0, #12 + 8003350: 2b00 cmp r3, #0 + 8003352: bf0c ite eq + 8003354: 2301 moveq r3, #1 + 8003356: 2300 movne r3, #0 + 8003358: b2db uxtb r3, r3 + 800335a: e012 b.n 8003382 + 800335c: 68fb ldr r3, [r7, #12] + 800335e: 1e58 subs r0, r3, #1 + 8003360: 687b ldr r3, [r7, #4] + 8003362: 6859 ldr r1, [r3, #4] + 8003364: 460b mov r3, r1 + 8003366: 009b lsls r3, r3, #2 + 8003368: 440b add r3, r1 + 800336a: 0099 lsls r1, r3, #2 + 800336c: 440b add r3, r1 + 800336e: fbb0 f3f3 udiv r3, r0, r3 + 8003372: 3301 adds r3, #1 + 8003374: f3c3 030b ubfx r3, r3, #0, #12 + 8003378: 2b00 cmp r3, #0 + 800337a: bf0c ite eq + 800337c: 2301 moveq r3, #1 + 800337e: 2300 movne r3, #0 + 8003380: b2db uxtb r3, r3 + 8003382: 2b00 cmp r3, #0 + 8003384: d001 beq.n 800338a + 8003386: 2301 movs r3, #1 + 8003388: e022 b.n 80033d0 + 800338a: 687b ldr r3, [r7, #4] + 800338c: 689b ldr r3, [r3, #8] + 800338e: 2b00 cmp r3, #0 + 8003390: d10e bne.n 80033b0 + 8003392: 68fb ldr r3, [r7, #12] + 8003394: 1e58 subs r0, r3, #1 + 8003396: 687b ldr r3, [r7, #4] + 8003398: 6859 ldr r1, [r3, #4] + 800339a: 460b mov r3, r1 + 800339c: 005b lsls r3, r3, #1 + 800339e: 440b add r3, r1 + 80033a0: fbb0 f3f3 udiv r3, r0, r3 + 80033a4: 3301 adds r3, #1 + 80033a6: f3c3 030b ubfx r3, r3, #0, #12 + 80033aa: f443 4300 orr.w r3, r3, #32768 @ 0x8000 + 80033ae: e00f b.n 80033d0 + 80033b0: 68fb ldr r3, [r7, #12] + 80033b2: 1e58 subs r0, r3, #1 + 80033b4: 687b ldr r3, [r7, #4] + 80033b6: 6859 ldr r1, [r3, #4] + 80033b8: 460b mov r3, r1 + 80033ba: 009b lsls r3, r3, #2 + 80033bc: 440b add r3, r1 + 80033be: 0099 lsls r1, r3, #2 + 80033c0: 440b add r3, r1 + 80033c2: fbb0 f3f3 udiv r3, r0, r3 + 80033c6: 3301 adds r3, #1 + 80033c8: f3c3 030b ubfx r3, r3, #0, #12 + 80033cc: f443 4340 orr.w r3, r3, #49152 @ 0xc000 + 80033d0: 6879 ldr r1, [r7, #4] + 80033d2: 6809 ldr r1, [r1, #0] + 80033d4: 4313 orrs r3, r2 + 80033d6: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); - 8003264: 687b ldr r3, [r7, #4] - 8003266: 681b ldr r3, [r3, #0] - 8003268: 681b ldr r3, [r3, #0] - 800326a: f023 01c0 bic.w r1, r3, #192 @ 0xc0 - 800326e: 687b ldr r3, [r7, #4] - 8003270: 69da ldr r2, [r3, #28] - 8003272: 687b ldr r3, [r7, #4] - 8003274: 6a1b ldr r3, [r3, #32] - 8003276: 431a orrs r2, r3 - 8003278: 687b ldr r3, [r7, #4] - 800327a: 681b ldr r3, [r3, #0] - 800327c: 430a orrs r2, r1 - 800327e: 601a str r2, [r3, #0] + 80033d8: 687b ldr r3, [r7, #4] + 80033da: 681b ldr r3, [r3, #0] + 80033dc: 681b ldr r3, [r3, #0] + 80033de: f023 01c0 bic.w r1, r3, #192 @ 0xc0 + 80033e2: 687b ldr r3, [r7, #4] + 80033e4: 69da ldr r2, [r3, #28] + 80033e6: 687b ldr r3, [r7, #4] + 80033e8: 6a1b ldr r3, [r3, #32] + 80033ea: 431a orrs r2, r3 + 80033ec: 687b ldr r3, [r7, #4] + 80033ee: 681b ldr r3, [r3, #0] + 80033f0: 430a orrs r2, r1 + 80033f2: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); - 8003280: 687b ldr r3, [r7, #4] - 8003282: 681b ldr r3, [r3, #0] - 8003284: 689b ldr r3, [r3, #8] - 8003286: f423 4303 bic.w r3, r3, #33536 @ 0x8300 - 800328a: f023 03ff bic.w r3, r3, #255 @ 0xff - 800328e: 687a ldr r2, [r7, #4] - 8003290: 6911 ldr r1, [r2, #16] - 8003292: 687a ldr r2, [r7, #4] - 8003294: 68d2 ldr r2, [r2, #12] - 8003296: 4311 orrs r1, r2 - 8003298: 687a ldr r2, [r7, #4] - 800329a: 6812 ldr r2, [r2, #0] - 800329c: 430b orrs r3, r1 - 800329e: 6093 str r3, [r2, #8] + 80033f4: 687b ldr r3, [r7, #4] + 80033f6: 681b ldr r3, [r3, #0] + 80033f8: 689b ldr r3, [r3, #8] + 80033fa: f423 4303 bic.w r3, r3, #33536 @ 0x8300 + 80033fe: f023 03ff bic.w r3, r3, #255 @ 0xff + 8003402: 687a ldr r2, [r7, #4] + 8003404: 6911 ldr r1, [r2, #16] + 8003406: 687a ldr r2, [r7, #4] + 8003408: 68d2 ldr r2, [r2, #12] + 800340a: 4311 orrs r1, r2 + 800340c: 687a ldr r2, [r7, #4] + 800340e: 6812 ldr r2, [r2, #0] + 8003410: 430b orrs r3, r1 + 8003412: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); - 80032a0: 687b ldr r3, [r7, #4] - 80032a2: 681b ldr r3, [r3, #0] - 80032a4: 68db ldr r3, [r3, #12] - 80032a6: f023 01ff bic.w r1, r3, #255 @ 0xff - 80032aa: 687b ldr r3, [r7, #4] - 80032ac: 695a ldr r2, [r3, #20] - 80032ae: 687b ldr r3, [r7, #4] - 80032b0: 699b ldr r3, [r3, #24] - 80032b2: 431a orrs r2, r3 - 80032b4: 687b ldr r3, [r7, #4] - 80032b6: 681b ldr r3, [r3, #0] - 80032b8: 430a orrs r2, r1 - 80032ba: 60da str r2, [r3, #12] + 8003414: 687b ldr r3, [r7, #4] + 8003416: 681b ldr r3, [r3, #0] + 8003418: 68db ldr r3, [r3, #12] + 800341a: f023 01ff bic.w r1, r3, #255 @ 0xff + 800341e: 687b ldr r3, [r7, #4] + 8003420: 695a ldr r2, [r3, #20] + 8003422: 687b ldr r3, [r7, #4] + 8003424: 699b ldr r3, [r3, #24] + 8003426: 431a orrs r2, r3 + 8003428: 687b ldr r3, [r7, #4] + 800342a: 681b ldr r3, [r3, #0] + 800342c: 430a orrs r2, r1 + 800342e: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 80032bc: 687b ldr r3, [r7, #4] - 80032be: 681b ldr r3, [r3, #0] - 80032c0: 681a ldr r2, [r3, #0] - 80032c2: 687b ldr r3, [r7, #4] - 80032c4: 681b ldr r3, [r3, #0] - 80032c6: f042 0201 orr.w r2, r2, #1 - 80032ca: 601a str r2, [r3, #0] + 8003430: 687b ldr r3, [r7, #4] + 8003432: 681b ldr r3, [r3, #0] + 8003434: 681a ldr r2, [r3, #0] + 8003436: 687b ldr r3, [r7, #4] + 8003438: 681b ldr r3, [r3, #0] + 800343a: f042 0201 orr.w r2, r2, #1 + 800343e: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 80032cc: 687b ldr r3, [r7, #4] - 80032ce: 2200 movs r2, #0 - 80032d0: 641a str r2, [r3, #64] @ 0x40 + 8003440: 687b ldr r3, [r7, #4] + 8003442: 2200 movs r2, #0 + 8003444: 641a str r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_READY; - 80032d2: 687b ldr r3, [r7, #4] - 80032d4: 2220 movs r2, #32 - 80032d6: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003446: 687b ldr r3, [r7, #4] + 8003448: 2220 movs r2, #32 + 800344a: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->PreviousState = I2C_STATE_NONE; - 80032da: 687b ldr r3, [r7, #4] - 80032dc: 2200 movs r2, #0 - 80032de: 631a str r2, [r3, #48] @ 0x30 + 800344e: 687b ldr r3, [r7, #4] + 8003450: 2200 movs r2, #0 + 8003452: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; - 80032e0: 687b ldr r3, [r7, #4] - 80032e2: 2200 movs r2, #0 - 80032e4: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003454: 687b ldr r3, [r7, #4] + 8003456: 2200 movs r2, #0 + 8003458: f883 203e strb.w r2, [r3, #62] @ 0x3e return HAL_OK; - 80032e8: 2300 movs r3, #0 + 800345c: 2300 movs r3, #0 } - 80032ea: 4618 mov r0, r3 - 80032ec: 3710 adds r7, #16 - 80032ee: 46bd mov sp, r7 - 80032f0: bd80 pop {r7, pc} - 80032f2: bf00 nop - 80032f4: 000186a0 .word 0x000186a0 - 80032f8: 001e847f .word 0x001e847f - 80032fc: 003d08ff .word 0x003d08ff - 8003300: 431bde83 .word 0x431bde83 - 8003304: 10624dd3 .word 0x10624dd3 + 800345e: 4618 mov r0, r3 + 8003460: 3710 adds r7, #16 + 8003462: 46bd mov sp, r7 + 8003464: bd80 pop {r7, pc} + 8003466: bf00 nop + 8003468: 000186a0 .word 0x000186a0 + 800346c: 001e847f .word 0x001e847f + 8003470: 003d08ff .word 0x003d08ff + 8003474: 431bde83 .word 0x431bde83 + 8003478: 10624dd3 .word 0x10624dd3 -08003308 : +0800347c : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8003308: b580 push {r7, lr} - 800330a: b088 sub sp, #32 - 800330c: af02 add r7, sp, #8 - 800330e: 60f8 str r0, [r7, #12] - 8003310: 607a str r2, [r7, #4] - 8003312: 461a mov r2, r3 - 8003314: 460b mov r3, r1 - 8003316: 817b strh r3, [r7, #10] - 8003318: 4613 mov r3, r2 - 800331a: 813b strh r3, [r7, #8] + 800347c: b580 push {r7, lr} + 800347e: b088 sub sp, #32 + 8003480: af02 add r7, sp, #8 + 8003482: 60f8 str r0, [r7, #12] + 8003484: 607a str r2, [r7, #4] + 8003486: 461a mov r2, r3 + 8003488: 460b mov r3, r1 + 800348a: 817b strh r3, [r7, #10] + 800348c: 4613 mov r3, r2 + 800348e: 813b strh r3, [r7, #8] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); - 800331c: f7ff f908 bl 8002530 - 8003320: 6178 str r0, [r7, #20] + 8003490: f7ff f908 bl 80026a4 + 8003494: 6178 str r0, [r7, #20] if (hi2c->State == HAL_I2C_STATE_READY) - 8003322: 68fb ldr r3, [r7, #12] - 8003324: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8003328: b2db uxtb r3, r3 - 800332a: 2b20 cmp r3, #32 - 800332c: f040 80e0 bne.w 80034f0 + 8003496: 68fb ldr r3, [r7, #12] + 8003498: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 800349c: b2db uxtb r3, r3 + 800349e: 2b20 cmp r3, #32 + 80034a0: f040 80e0 bne.w 8003664 { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) - 8003330: 697b ldr r3, [r7, #20] - 8003332: 9300 str r3, [sp, #0] - 8003334: 2319 movs r3, #25 - 8003336: 2201 movs r2, #1 - 8003338: 4970 ldr r1, [pc, #448] @ (80034fc ) - 800333a: 68f8 ldr r0, [r7, #12] - 800333c: f000 fc9e bl 8003c7c - 8003340: 4603 mov r3, r0 - 8003342: 2b00 cmp r3, #0 - 8003344: d001 beq.n 800334a + 80034a4: 697b ldr r3, [r7, #20] + 80034a6: 9300 str r3, [sp, #0] + 80034a8: 2319 movs r3, #25 + 80034aa: 2201 movs r2, #1 + 80034ac: 4970 ldr r1, [pc, #448] @ (8003670 ) + 80034ae: 68f8 ldr r0, [r7, #12] + 80034b0: f000 fc9e bl 8003df0 + 80034b4: 4603 mov r3, r0 + 80034b6: 2b00 cmp r3, #0 + 80034b8: d001 beq.n 80034be { return HAL_BUSY; - 8003346: 2302 movs r3, #2 - 8003348: e0d3 b.n 80034f2 + 80034ba: 2302 movs r3, #2 + 80034bc: e0d3 b.n 8003666 } /* Process Locked */ __HAL_LOCK(hi2c); - 800334a: 68fb ldr r3, [r7, #12] - 800334c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8003350: 2b01 cmp r3, #1 - 8003352: d101 bne.n 8003358 - 8003354: 2302 movs r3, #2 - 8003356: e0cc b.n 80034f2 - 8003358: 68fb ldr r3, [r7, #12] - 800335a: 2201 movs r2, #1 - 800335c: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80034be: 68fb ldr r3, [r7, #12] + 80034c0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 80034c4: 2b01 cmp r3, #1 + 80034c6: d101 bne.n 80034cc + 80034c8: 2302 movs r3, #2 + 80034ca: e0cc b.n 8003666 + 80034cc: 68fb ldr r3, [r7, #12] + 80034ce: 2201 movs r2, #1 + 80034d0: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) - 8003360: 68fb ldr r3, [r7, #12] - 8003362: 681b ldr r3, [r3, #0] - 8003364: 681b ldr r3, [r3, #0] - 8003366: f003 0301 and.w r3, r3, #1 - 800336a: 2b01 cmp r3, #1 - 800336c: d007 beq.n 800337e + 80034d4: 68fb ldr r3, [r7, #12] + 80034d6: 681b ldr r3, [r3, #0] + 80034d8: 681b ldr r3, [r3, #0] + 80034da: f003 0301 and.w r3, r3, #1 + 80034de: 2b01 cmp r3, #1 + 80034e0: d007 beq.n 80034f2 { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 800336e: 68fb ldr r3, [r7, #12] - 8003370: 681b ldr r3, [r3, #0] - 8003372: 681a ldr r2, [r3, #0] - 8003374: 68fb ldr r3, [r7, #12] - 8003376: 681b ldr r3, [r3, #0] - 8003378: f042 0201 orr.w r2, r2, #1 - 800337c: 601a str r2, [r3, #0] + 80034e2: 68fb ldr r3, [r7, #12] + 80034e4: 681b ldr r3, [r3, #0] + 80034e6: 681a ldr r2, [r3, #0] + 80034e8: 68fb ldr r3, [r7, #12] + 80034ea: 681b ldr r3, [r3, #0] + 80034ec: f042 0201 orr.w r2, r2, #1 + 80034f0: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 800337e: 68fb ldr r3, [r7, #12] - 8003380: 681b ldr r3, [r3, #0] - 8003382: 681a ldr r2, [r3, #0] - 8003384: 68fb ldr r3, [r7, #12] - 8003386: 681b ldr r3, [r3, #0] - 8003388: f422 6200 bic.w r2, r2, #2048 @ 0x800 - 800338c: 601a str r2, [r3, #0] + 80034f2: 68fb ldr r3, [r7, #12] + 80034f4: 681b ldr r3, [r3, #0] + 80034f6: 681a ldr r2, [r3, #0] + 80034f8: 68fb ldr r3, [r7, #12] + 80034fa: 681b ldr r3, [r3, #0] + 80034fc: f422 6200 bic.w r2, r2, #2048 @ 0x800 + 8003500: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; - 800338e: 68fb ldr r3, [r7, #12] - 8003390: 2221 movs r2, #33 @ 0x21 - 8003392: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003502: 68fb ldr r3, [r7, #12] + 8003504: 2221 movs r2, #33 @ 0x21 + 8003506: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_MASTER; - 8003396: 68fb ldr r3, [r7, #12] - 8003398: 2210 movs r2, #16 - 800339a: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800350a: 68fb ldr r3, [r7, #12] + 800350c: 2210 movs r2, #16 + 800350e: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 800339e: 68fb ldr r3, [r7, #12] - 80033a0: 2200 movs r2, #0 - 80033a2: 641a str r2, [r3, #64] @ 0x40 + 8003512: 68fb ldr r3, [r7, #12] + 8003514: 2200 movs r2, #0 + 8003516: 641a str r2, [r3, #64] @ 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; - 80033a4: 68fb ldr r3, [r7, #12] - 80033a6: 687a ldr r2, [r7, #4] - 80033a8: 625a str r2, [r3, #36] @ 0x24 + 8003518: 68fb ldr r3, [r7, #12] + 800351a: 687a ldr r2, [r7, #4] + 800351c: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; - 80033aa: 68fb ldr r3, [r7, #12] - 80033ac: 893a ldrh r2, [r7, #8] - 80033ae: 855a strh r2, [r3, #42] @ 0x2a + 800351e: 68fb ldr r3, [r7, #12] + 8003520: 893a ldrh r2, [r7, #8] + 8003522: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize = hi2c->XferCount; - 80033b0: 68fb ldr r3, [r7, #12] - 80033b2: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80033b4: b29a uxth r2, r3 - 80033b6: 68fb ldr r3, [r7, #12] - 80033b8: 851a strh r2, [r3, #40] @ 0x28 + 8003524: 68fb ldr r3, [r7, #12] + 8003526: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003528: b29a uxth r2, r3 + 800352a: 68fb ldr r3, [r7, #12] + 800352c: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 80033ba: 68fb ldr r3, [r7, #12] - 80033bc: 4a50 ldr r2, [pc, #320] @ (8003500 ) - 80033be: 62da str r2, [r3, #44] @ 0x2c + 800352e: 68fb ldr r3, [r7, #12] + 8003530: 4a50 ldr r2, [pc, #320] @ (8003674 ) + 8003532: 62da str r2, [r3, #44] @ 0x2c /* Send Slave Address */ if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) - 80033c0: 8979 ldrh r1, [r7, #10] - 80033c2: 697b ldr r3, [r7, #20] - 80033c4: 6a3a ldr r2, [r7, #32] - 80033c6: 68f8 ldr r0, [r7, #12] - 80033c8: f000 fb08 bl 80039dc - 80033cc: 4603 mov r3, r0 - 80033ce: 2b00 cmp r3, #0 - 80033d0: d001 beq.n 80033d6 + 8003534: 8979 ldrh r1, [r7, #10] + 8003536: 697b ldr r3, [r7, #20] + 8003538: 6a3a ldr r2, [r7, #32] + 800353a: 68f8 ldr r0, [r7, #12] + 800353c: f000 fb08 bl 8003b50 + 8003540: 4603 mov r3, r0 + 8003542: 2b00 cmp r3, #0 + 8003544: d001 beq.n 800354a { return HAL_ERROR; - 80033d2: 2301 movs r3, #1 - 80033d4: e08d b.n 80034f2 + 8003546: 2301 movs r3, #1 + 8003548: e08d b.n 8003666 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80033d6: 2300 movs r3, #0 - 80033d8: 613b str r3, [r7, #16] - 80033da: 68fb ldr r3, [r7, #12] - 80033dc: 681b ldr r3, [r3, #0] - 80033de: 695b ldr r3, [r3, #20] - 80033e0: 613b str r3, [r7, #16] - 80033e2: 68fb ldr r3, [r7, #12] - 80033e4: 681b ldr r3, [r3, #0] - 80033e6: 699b ldr r3, [r3, #24] - 80033e8: 613b str r3, [r7, #16] - 80033ea: 693b ldr r3, [r7, #16] + 800354a: 2300 movs r3, #0 + 800354c: 613b str r3, [r7, #16] + 800354e: 68fb ldr r3, [r7, #12] + 8003550: 681b ldr r3, [r3, #0] + 8003552: 695b ldr r3, [r3, #20] + 8003554: 613b str r3, [r7, #16] + 8003556: 68fb ldr r3, [r7, #12] + 8003558: 681b ldr r3, [r3, #0] + 800355a: 699b ldr r3, [r3, #24] + 800355c: 613b str r3, [r7, #16] + 800355e: 693b ldr r3, [r7, #16] while (hi2c->XferSize > 0U) - 80033ec: e066 b.n 80034bc + 8003560: e066 b.n 8003630 { /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 80033ee: 697a ldr r2, [r7, #20] - 80033f0: 6a39 ldr r1, [r7, #32] - 80033f2: 68f8 ldr r0, [r7, #12] - 80033f4: f000 fd5c bl 8003eb0 - 80033f8: 4603 mov r3, r0 - 80033fa: 2b00 cmp r3, #0 - 80033fc: d00d beq.n 800341a + 8003562: 697a ldr r2, [r7, #20] + 8003564: 6a39 ldr r1, [r7, #32] + 8003566: 68f8 ldr r0, [r7, #12] + 8003568: f000 fd5c bl 8004024 + 800356c: 4603 mov r3, r0 + 800356e: 2b00 cmp r3, #0 + 8003570: d00d beq.n 800358e { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 80033fe: 68fb ldr r3, [r7, #12] - 8003400: 6c1b ldr r3, [r3, #64] @ 0x40 - 8003402: 2b04 cmp r3, #4 - 8003404: d107 bne.n 8003416 + 8003572: 68fb ldr r3, [r7, #12] + 8003574: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003576: 2b04 cmp r3, #4 + 8003578: d107 bne.n 800358a { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003406: 68fb ldr r3, [r7, #12] - 8003408: 681b ldr r3, [r3, #0] - 800340a: 681a ldr r2, [r3, #0] - 800340c: 68fb ldr r3, [r7, #12] - 800340e: 681b ldr r3, [r3, #0] - 8003410: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8003414: 601a str r2, [r3, #0] + 800357a: 68fb ldr r3, [r7, #12] + 800357c: 681b ldr r3, [r3, #0] + 800357e: 681a ldr r2, [r3, #0] + 8003580: 68fb ldr r3, [r7, #12] + 8003582: 681b ldr r3, [r3, #0] + 8003584: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003588: 601a str r2, [r3, #0] } return HAL_ERROR; - 8003416: 2301 movs r3, #1 - 8003418: e06b b.n 80034f2 + 800358a: 2301 movs r3, #1 + 800358c: e06b b.n 8003666 } /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; - 800341a: 68fb ldr r3, [r7, #12] - 800341c: 6a5b ldr r3, [r3, #36] @ 0x24 - 800341e: 781a ldrb r2, [r3, #0] - 8003420: 68fb ldr r3, [r7, #12] - 8003422: 681b ldr r3, [r3, #0] - 8003424: 611a str r2, [r3, #16] + 800358e: 68fb ldr r3, [r7, #12] + 8003590: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003592: 781a ldrb r2, [r3, #0] + 8003594: 68fb ldr r3, [r7, #12] + 8003596: 681b ldr r3, [r3, #0] + 8003598: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003426: 68fb ldr r3, [r7, #12] - 8003428: 6a5b ldr r3, [r3, #36] @ 0x24 - 800342a: 1c5a adds r2, r3, #1 - 800342c: 68fb ldr r3, [r7, #12] - 800342e: 625a str r2, [r3, #36] @ 0x24 + 800359a: 68fb ldr r3, [r7, #12] + 800359c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800359e: 1c5a adds r2, r3, #1 + 80035a0: 68fb ldr r3, [r7, #12] + 80035a2: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; - 8003430: 68fb ldr r3, [r7, #12] - 8003432: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003434: b29b uxth r3, r3 - 8003436: 3b01 subs r3, #1 - 8003438: b29a uxth r2, r3 - 800343a: 68fb ldr r3, [r7, #12] - 800343c: 855a strh r2, [r3, #42] @ 0x2a + 80035a4: 68fb ldr r3, [r7, #12] + 80035a6: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80035a8: b29b uxth r3, r3 + 80035aa: 3b01 subs r3, #1 + 80035ac: b29a uxth r2, r3 + 80035ae: 68fb ldr r3, [r7, #12] + 80035b0: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; - 800343e: 68fb ldr r3, [r7, #12] - 8003440: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003442: 3b01 subs r3, #1 - 8003444: b29a uxth r2, r3 - 8003446: 68fb ldr r3, [r7, #12] - 8003448: 851a strh r2, [r3, #40] @ 0x28 + 80035b2: 68fb ldr r3, [r7, #12] + 80035b4: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80035b6: 3b01 subs r3, #1 + 80035b8: b29a uxth r2, r3 + 80035ba: 68fb ldr r3, [r7, #12] + 80035bc: 851a strh r2, [r3, #40] @ 0x28 if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) - 800344a: 68fb ldr r3, [r7, #12] - 800344c: 681b ldr r3, [r3, #0] - 800344e: 695b ldr r3, [r3, #20] - 8003450: f003 0304 and.w r3, r3, #4 - 8003454: 2b04 cmp r3, #4 - 8003456: d11b bne.n 8003490 - 8003458: 68fb ldr r3, [r7, #12] - 800345a: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800345c: 2b00 cmp r3, #0 - 800345e: d017 beq.n 8003490 + 80035be: 68fb ldr r3, [r7, #12] + 80035c0: 681b ldr r3, [r3, #0] + 80035c2: 695b ldr r3, [r3, #20] + 80035c4: f003 0304 and.w r3, r3, #4 + 80035c8: 2b04 cmp r3, #4 + 80035ca: d11b bne.n 8003604 + 80035cc: 68fb ldr r3, [r7, #12] + 80035ce: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80035d0: 2b00 cmp r3, #0 + 80035d2: d017 beq.n 8003604 { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; - 8003460: 68fb ldr r3, [r7, #12] - 8003462: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003464: 781a ldrb r2, [r3, #0] - 8003466: 68fb ldr r3, [r7, #12] - 8003468: 681b ldr r3, [r3, #0] - 800346a: 611a str r2, [r3, #16] + 80035d4: 68fb ldr r3, [r7, #12] + 80035d6: 6a5b ldr r3, [r3, #36] @ 0x24 + 80035d8: 781a ldrb r2, [r3, #0] + 80035da: 68fb ldr r3, [r7, #12] + 80035dc: 681b ldr r3, [r3, #0] + 80035de: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 800346c: 68fb ldr r3, [r7, #12] - 800346e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003470: 1c5a adds r2, r3, #1 - 8003472: 68fb ldr r3, [r7, #12] - 8003474: 625a str r2, [r3, #36] @ 0x24 + 80035e0: 68fb ldr r3, [r7, #12] + 80035e2: 6a5b ldr r3, [r3, #36] @ 0x24 + 80035e4: 1c5a adds r2, r3, #1 + 80035e6: 68fb ldr r3, [r7, #12] + 80035e8: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; - 8003476: 68fb ldr r3, [r7, #12] - 8003478: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800347a: b29b uxth r3, r3 - 800347c: 3b01 subs r3, #1 - 800347e: b29a uxth r2, r3 - 8003480: 68fb ldr r3, [r7, #12] - 8003482: 855a strh r2, [r3, #42] @ 0x2a + 80035ea: 68fb ldr r3, [r7, #12] + 80035ec: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80035ee: b29b uxth r3, r3 + 80035f0: 3b01 subs r3, #1 + 80035f2: b29a uxth r2, r3 + 80035f4: 68fb ldr r3, [r7, #12] + 80035f6: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; - 8003484: 68fb ldr r3, [r7, #12] - 8003486: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003488: 3b01 subs r3, #1 - 800348a: b29a uxth r2, r3 - 800348c: 68fb ldr r3, [r7, #12] - 800348e: 851a strh r2, [r3, #40] @ 0x28 + 80035f8: 68fb ldr r3, [r7, #12] + 80035fa: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80035fc: 3b01 subs r3, #1 + 80035fe: b29a uxth r2, r3 + 8003600: 68fb ldr r3, [r7, #12] + 8003602: 851a strh r2, [r3, #40] @ 0x28 } /* Wait until BTF flag is set */ if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8003490: 697a ldr r2, [r7, #20] - 8003492: 6a39 ldr r1, [r7, #32] - 8003494: 68f8 ldr r0, [r7, #12] - 8003496: f000 fd53 bl 8003f40 - 800349a: 4603 mov r3, r0 - 800349c: 2b00 cmp r3, #0 - 800349e: d00d beq.n 80034bc + 8003604: 697a ldr r2, [r7, #20] + 8003606: 6a39 ldr r1, [r7, #32] + 8003608: 68f8 ldr r0, [r7, #12] + 800360a: f000 fd53 bl 80040b4 + 800360e: 4603 mov r3, r0 + 8003610: 2b00 cmp r3, #0 + 8003612: d00d beq.n 8003630 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 80034a0: 68fb ldr r3, [r7, #12] - 80034a2: 6c1b ldr r3, [r3, #64] @ 0x40 - 80034a4: 2b04 cmp r3, #4 - 80034a6: d107 bne.n 80034b8 + 8003614: 68fb ldr r3, [r7, #12] + 8003616: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003618: 2b04 cmp r3, #4 + 800361a: d107 bne.n 800362c { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 80034a8: 68fb ldr r3, [r7, #12] - 80034aa: 681b ldr r3, [r3, #0] - 80034ac: 681a ldr r2, [r3, #0] - 80034ae: 68fb ldr r3, [r7, #12] - 80034b0: 681b ldr r3, [r3, #0] - 80034b2: f442 7200 orr.w r2, r2, #512 @ 0x200 - 80034b6: 601a str r2, [r3, #0] + 800361c: 68fb ldr r3, [r7, #12] + 800361e: 681b ldr r3, [r3, #0] + 8003620: 681a ldr r2, [r3, #0] + 8003622: 68fb ldr r3, [r7, #12] + 8003624: 681b ldr r3, [r3, #0] + 8003626: f442 7200 orr.w r2, r2, #512 @ 0x200 + 800362a: 601a str r2, [r3, #0] } return HAL_ERROR; - 80034b8: 2301 movs r3, #1 - 80034ba: e01a b.n 80034f2 + 800362c: 2301 movs r3, #1 + 800362e: e01a b.n 8003666 while (hi2c->XferSize > 0U) - 80034bc: 68fb ldr r3, [r7, #12] - 80034be: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80034c0: 2b00 cmp r3, #0 - 80034c2: d194 bne.n 80033ee + 8003630: 68fb ldr r3, [r7, #12] + 8003632: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003634: 2b00 cmp r3, #0 + 8003636: d194 bne.n 8003562 } } /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 80034c4: 68fb ldr r3, [r7, #12] - 80034c6: 681b ldr r3, [r3, #0] - 80034c8: 681a ldr r2, [r3, #0] - 80034ca: 68fb ldr r3, [r7, #12] - 80034cc: 681b ldr r3, [r3, #0] - 80034ce: f442 7200 orr.w r2, r2, #512 @ 0x200 - 80034d2: 601a str r2, [r3, #0] - - hi2c->State = HAL_I2C_STATE_READY; - 80034d4: 68fb ldr r3, [r7, #12] - 80034d6: 2220 movs r2, #32 - 80034d8: f883 203d strb.w r2, [r3, #61] @ 0x3d - hi2c->Mode = HAL_I2C_MODE_NONE; - 80034dc: 68fb ldr r3, [r7, #12] - 80034de: 2200 movs r2, #0 - 80034e0: f883 203e strb.w r2, [r3, #62] @ 0x3e - - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - 80034e4: 68fb ldr r3, [r7, #12] - 80034e6: 2200 movs r2, #0 - 80034e8: f883 203c strb.w r2, [r3, #60] @ 0x3c - - return HAL_OK; - 80034ec: 2300 movs r3, #0 - 80034ee: e000 b.n 80034f2 - } - else - { - return HAL_BUSY; - 80034f0: 2302 movs r3, #2 - } -} - 80034f2: 4618 mov r0, r3 - 80034f4: 3718 adds r7, #24 - 80034f6: 46bd mov sp, r7 - 80034f8: bd80 pop {r7, pc} - 80034fa: bf00 nop - 80034fc: 00100002 .word 0x00100002 - 8003500: ffff0000 .word 0xffff0000 - -08003504 : - * @param Size Amount of data to be sent - * @param Timeout Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - 8003504: b580 push {r7, lr} - 8003506: b08c sub sp, #48 @ 0x30 - 8003508: af02 add r7, sp, #8 - 800350a: 60f8 str r0, [r7, #12] - 800350c: 607a str r2, [r7, #4] - 800350e: 461a mov r2, r3 - 8003510: 460b mov r3, r1 - 8003512: 817b strh r3, [r7, #10] - 8003514: 4613 mov r3, r2 - 8003516: 813b strh r3, [r7, #8] - __IO uint32_t count = 0U; - 8003518: 2300 movs r3, #0 - 800351a: 623b str r3, [r7, #32] - - /* Init tickstart for timeout management*/ - uint32_t tickstart = HAL_GetTick(); - 800351c: f7ff f808 bl 8002530 - 8003520: 6278 str r0, [r7, #36] @ 0x24 - - if (hi2c->State == HAL_I2C_STATE_READY) - 8003522: 68fb ldr r3, [r7, #12] - 8003524: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8003528: b2db uxtb r3, r3 - 800352a: 2b20 cmp r3, #32 - 800352c: f040 824b bne.w 80039c6 - { - /* Wait until BUSY flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) - 8003530: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003532: 9300 str r3, [sp, #0] - 8003534: 2319 movs r3, #25 - 8003536: 2201 movs r2, #1 - 8003538: 497f ldr r1, [pc, #508] @ (8003738 ) - 800353a: 68f8 ldr r0, [r7, #12] - 800353c: f000 fb9e bl 8003c7c - 8003540: 4603 mov r3, r0 - 8003542: 2b00 cmp r3, #0 - 8003544: d001 beq.n 800354a - { - return HAL_BUSY; - 8003546: 2302 movs r3, #2 - 8003548: e23e b.n 80039c8 - } - - /* Process Locked */ - __HAL_LOCK(hi2c); - 800354a: 68fb ldr r3, [r7, #12] - 800354c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8003550: 2b01 cmp r3, #1 - 8003552: d101 bne.n 8003558 - 8003554: 2302 movs r3, #2 - 8003556: e237 b.n 80039c8 - 8003558: 68fb ldr r3, [r7, #12] - 800355a: 2201 movs r2, #1 - 800355c: f883 203c strb.w r2, [r3, #60] @ 0x3c - - /* Check if the I2C is already enabled */ - if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) - 8003560: 68fb ldr r3, [r7, #12] - 8003562: 681b ldr r3, [r3, #0] - 8003564: 681b ldr r3, [r3, #0] - 8003566: f003 0301 and.w r3, r3, #1 - 800356a: 2b01 cmp r3, #1 - 800356c: d007 beq.n 800357e - { - /* Enable I2C peripheral */ - __HAL_I2C_ENABLE(hi2c); - 800356e: 68fb ldr r3, [r7, #12] - 8003570: 681b ldr r3, [r3, #0] - 8003572: 681a ldr r2, [r3, #0] - 8003574: 68fb ldr r3, [r7, #12] - 8003576: 681b ldr r3, [r3, #0] - 8003578: f042 0201 orr.w r2, r2, #1 - 800357c: 601a str r2, [r3, #0] - } - - /* Disable Pos */ - CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 800357e: 68fb ldr r3, [r7, #12] - 8003580: 681b ldr r3, [r3, #0] - 8003582: 681a ldr r2, [r3, #0] - 8003584: 68fb ldr r3, [r7, #12] - 8003586: 681b ldr r3, [r3, #0] - 8003588: f422 6200 bic.w r2, r2, #2048 @ 0x800 - 800358c: 601a str r2, [r3, #0] - - hi2c->State = HAL_I2C_STATE_BUSY_RX; - 800358e: 68fb ldr r3, [r7, #12] - 8003590: 2222 movs r2, #34 @ 0x22 - 8003592: f883 203d strb.w r2, [r3, #61] @ 0x3d - hi2c->Mode = HAL_I2C_MODE_MASTER; - 8003596: 68fb ldr r3, [r7, #12] - 8003598: 2210 movs r2, #16 - 800359a: f883 203e strb.w r2, [r3, #62] @ 0x3e - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 800359e: 68fb ldr r3, [r7, #12] - 80035a0: 2200 movs r2, #0 - 80035a2: 641a str r2, [r3, #64] @ 0x40 - - /* Prepare transfer parameters */ - hi2c->pBuffPtr = pData; - 80035a4: 68fb ldr r3, [r7, #12] - 80035a6: 687a ldr r2, [r7, #4] - 80035a8: 625a str r2, [r3, #36] @ 0x24 - hi2c->XferCount = Size; - 80035aa: 68fb ldr r3, [r7, #12] - 80035ac: 893a ldrh r2, [r7, #8] - 80035ae: 855a strh r2, [r3, #42] @ 0x2a - hi2c->XferSize = hi2c->XferCount; - 80035b0: 68fb ldr r3, [r7, #12] - 80035b2: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80035b4: b29a uxth r2, r3 - 80035b6: 68fb ldr r3, [r7, #12] - 80035b8: 851a strh r2, [r3, #40] @ 0x28 - hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 80035ba: 68fb ldr r3, [r7, #12] - 80035bc: 4a5f ldr r2, [pc, #380] @ (800373c ) - 80035be: 62da str r2, [r3, #44] @ 0x2c - - /* Send Slave Address */ - if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) - 80035c0: 8979 ldrh r1, [r7, #10] - 80035c2: 6a7b ldr r3, [r7, #36] @ 0x24 - 80035c4: 6b3a ldr r2, [r7, #48] @ 0x30 - 80035c6: 68f8 ldr r0, [r7, #12] - 80035c8: f000 fa8a bl 8003ae0 - 80035cc: 4603 mov r3, r0 - 80035ce: 2b00 cmp r3, #0 - 80035d0: d001 beq.n 80035d6 - { - return HAL_ERROR; - 80035d2: 2301 movs r3, #1 - 80035d4: e1f8 b.n 80039c8 - } - - if (hi2c->XferSize == 0U) - 80035d6: 68fb ldr r3, [r7, #12] - 80035d8: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80035da: 2b00 cmp r3, #0 - 80035dc: d113 bne.n 8003606 - { - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80035de: 2300 movs r3, #0 - 80035e0: 61fb str r3, [r7, #28] - 80035e2: 68fb ldr r3, [r7, #12] - 80035e4: 681b ldr r3, [r3, #0] - 80035e6: 695b ldr r3, [r3, #20] - 80035e8: 61fb str r3, [r7, #28] - 80035ea: 68fb ldr r3, [r7, #12] - 80035ec: 681b ldr r3, [r3, #0] - 80035ee: 699b ldr r3, [r3, #24] - 80035f0: 61fb str r3, [r7, #28] - 80035f2: 69fb ldr r3, [r7, #28] - - /* Generate Stop */ - SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 80035f4: 68fb ldr r3, [r7, #12] - 80035f6: 681b ldr r3, [r3, #0] - 80035f8: 681a ldr r2, [r3, #0] - 80035fa: 68fb ldr r3, [r7, #12] - 80035fc: 681b ldr r3, [r3, #0] - 80035fe: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8003602: 601a str r2, [r3, #0] - 8003604: e1cc b.n 80039a0 - } - else if (hi2c->XferSize == 1U) - 8003606: 68fb ldr r3, [r7, #12] - 8003608: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800360a: 2b01 cmp r3, #1 - 800360c: d11e bne.n 800364c - { - /* Disable Acknowledge */ - CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 800360e: 68fb ldr r3, [r7, #12] - 8003610: 681b ldr r3, [r3, #0] - 8003612: 681a ldr r2, [r3, #0] - 8003614: 68fb ldr r3, [r7, #12] - 8003616: 681b ldr r3, [r3, #0] - 8003618: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 800361c: 601a str r2, [r3, #0] - __ASM volatile ("cpsid i" : : : "memory"); - 800361e: b672 cpsid i -} - 8003620: bf00 nop - /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 - software sequence must complete before the current byte end of transfer */ - __disable_irq(); - - /* Clear ADDR flag */ - __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8003622: 2300 movs r3, #0 - 8003624: 61bb str r3, [r7, #24] - 8003626: 68fb ldr r3, [r7, #12] - 8003628: 681b ldr r3, [r3, #0] - 800362a: 695b ldr r3, [r3, #20] - 800362c: 61bb str r3, [r7, #24] - 800362e: 68fb ldr r3, [r7, #12] - 8003630: 681b ldr r3, [r3, #0] - 8003632: 699b ldr r3, [r3, #24] - 8003634: 61bb str r3, [r7, #24] - 8003636: 69bb ldr r3, [r7, #24] - - /* Generate Stop */ - SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); 8003638: 68fb ldr r3, [r7, #12] 800363a: 681b ldr r3, [r3, #0] 800363c: 681a ldr r2, [r3, #0] @@ -8758,7407 +8723,7660 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd 8003640: 681b ldr r3, [r3, #0] 8003642: f442 7200 orr.w r2, r2, #512 @ 0x200 8003646: 601a str r2, [r3, #0] - __ASM volatile ("cpsie i" : : : "memory"); - 8003648: b662 cpsie i -} - 800364a: e035 b.n 80036b8 - /* Re-enable IRQs */ - __enable_irq(); - } - else if (hi2c->XferSize == 2U) - 800364c: 68fb ldr r3, [r7, #12] - 800364e: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003650: 2b02 cmp r3, #2 - 8003652: d11e bne.n 8003692 - { - /* Enable Pos */ - SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 8003654: 68fb ldr r3, [r7, #12] - 8003656: 681b ldr r3, [r3, #0] - 8003658: 681a ldr r2, [r3, #0] - 800365a: 68fb ldr r3, [r7, #12] - 800365c: 681b ldr r3, [r3, #0] - 800365e: f442 6200 orr.w r2, r2, #2048 @ 0x800 - 8003662: 601a str r2, [r3, #0] - __ASM volatile ("cpsid i" : : : "memory"); - 8003664: b672 cpsid i + hi2c->State = HAL_I2C_STATE_READY; + 8003648: 68fb ldr r3, [r7, #12] + 800364a: 2220 movs r2, #32 + 800364c: f883 203d strb.w r2, [r3, #61] @ 0x3d + hi2c->Mode = HAL_I2C_MODE_NONE; + 8003650: 68fb ldr r3, [r7, #12] + 8003652: 2200 movs r2, #0 + 8003654: f883 203e strb.w r2, [r3, #62] @ 0x3e + + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + 8003658: 68fb ldr r3, [r7, #12] + 800365a: 2200 movs r2, #0 + 800365c: f883 203c strb.w r2, [r3, #60] @ 0x3c + + return HAL_OK; + 8003660: 2300 movs r3, #0 + 8003662: e000 b.n 8003666 + } + else + { + return HAL_BUSY; + 8003664: 2302 movs r3, #2 + } } - 8003666: bf00 nop + 8003666: 4618 mov r0, r3 + 8003668: 3718 adds r7, #24 + 800366a: 46bd mov sp, r7 + 800366c: bd80 pop {r7, pc} + 800366e: bf00 nop + 8003670: 00100002 .word 0x00100002 + 8003674: ffff0000 .word 0xffff0000 + +08003678 : + * @param Size Amount of data to be sent + * @param Timeout Timeout duration + * @retval HAL status + */ +HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) +{ + 8003678: b580 push {r7, lr} + 800367a: b08c sub sp, #48 @ 0x30 + 800367c: af02 add r7, sp, #8 + 800367e: 60f8 str r0, [r7, #12] + 8003680: 607a str r2, [r7, #4] + 8003682: 461a mov r2, r3 + 8003684: 460b mov r3, r1 + 8003686: 817b strh r3, [r7, #10] + 8003688: 4613 mov r3, r2 + 800368a: 813b strh r3, [r7, #8] + __IO uint32_t count = 0U; + 800368c: 2300 movs r3, #0 + 800368e: 623b str r3, [r7, #32] + + /* Init tickstart for timeout management*/ + uint32_t tickstart = HAL_GetTick(); + 8003690: f7ff f808 bl 80026a4 + 8003694: 6278 str r0, [r7, #36] @ 0x24 + + if (hi2c->State == HAL_I2C_STATE_READY) + 8003696: 68fb ldr r3, [r7, #12] + 8003698: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 800369c: b2db uxtb r3, r3 + 800369e: 2b20 cmp r3, #32 + 80036a0: f040 824b bne.w 8003b3a + { + /* Wait until BUSY flag is reset */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) + 80036a4: 6a7b ldr r3, [r7, #36] @ 0x24 + 80036a6: 9300 str r3, [sp, #0] + 80036a8: 2319 movs r3, #25 + 80036aa: 2201 movs r2, #1 + 80036ac: 497f ldr r1, [pc, #508] @ (80038ac ) + 80036ae: 68f8 ldr r0, [r7, #12] + 80036b0: f000 fb9e bl 8003df0 + 80036b4: 4603 mov r3, r0 + 80036b6: 2b00 cmp r3, #0 + 80036b8: d001 beq.n 80036be + { + return HAL_BUSY; + 80036ba: 2302 movs r3, #2 + 80036bc: e23e b.n 8003b3c + } + + /* Process Locked */ + __HAL_LOCK(hi2c); + 80036be: 68fb ldr r3, [r7, #12] + 80036c0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 80036c4: 2b01 cmp r3, #1 + 80036c6: d101 bne.n 80036cc + 80036c8: 2302 movs r3, #2 + 80036ca: e237 b.n 8003b3c + 80036cc: 68fb ldr r3, [r7, #12] + 80036ce: 2201 movs r2, #1 + 80036d0: f883 203c strb.w r2, [r3, #60] @ 0x3c + + /* Check if the I2C is already enabled */ + if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) + 80036d4: 68fb ldr r3, [r7, #12] + 80036d6: 681b ldr r3, [r3, #0] + 80036d8: 681b ldr r3, [r3, #0] + 80036da: f003 0301 and.w r3, r3, #1 + 80036de: 2b01 cmp r3, #1 + 80036e0: d007 beq.n 80036f2 + { + /* Enable I2C peripheral */ + __HAL_I2C_ENABLE(hi2c); + 80036e2: 68fb ldr r3, [r7, #12] + 80036e4: 681b ldr r3, [r3, #0] + 80036e6: 681a ldr r2, [r3, #0] + 80036e8: 68fb ldr r3, [r7, #12] + 80036ea: 681b ldr r3, [r3, #0] + 80036ec: f042 0201 orr.w r2, r2, #1 + 80036f0: 601a str r2, [r3, #0] + } + + /* Disable Pos */ + CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); + 80036f2: 68fb ldr r3, [r7, #12] + 80036f4: 681b ldr r3, [r3, #0] + 80036f6: 681a ldr r2, [r3, #0] + 80036f8: 68fb ldr r3, [r7, #12] + 80036fa: 681b ldr r3, [r3, #0] + 80036fc: f422 6200 bic.w r2, r2, #2048 @ 0x800 + 8003700: 601a str r2, [r3, #0] + + hi2c->State = HAL_I2C_STATE_BUSY_RX; + 8003702: 68fb ldr r3, [r7, #12] + 8003704: 2222 movs r2, #34 @ 0x22 + 8003706: f883 203d strb.w r2, [r3, #61] @ 0x3d + hi2c->Mode = HAL_I2C_MODE_MASTER; + 800370a: 68fb ldr r3, [r7, #12] + 800370c: 2210 movs r2, #16 + 800370e: f883 203e strb.w r2, [r3, #62] @ 0x3e + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 8003712: 68fb ldr r3, [r7, #12] + 8003714: 2200 movs r2, #0 + 8003716: 641a str r2, [r3, #64] @ 0x40 + + /* Prepare transfer parameters */ + hi2c->pBuffPtr = pData; + 8003718: 68fb ldr r3, [r7, #12] + 800371a: 687a ldr r2, [r7, #4] + 800371c: 625a str r2, [r3, #36] @ 0x24 + hi2c->XferCount = Size; + 800371e: 68fb ldr r3, [r7, #12] + 8003720: 893a ldrh r2, [r7, #8] + 8003722: 855a strh r2, [r3, #42] @ 0x2a + hi2c->XferSize = hi2c->XferCount; + 8003724: 68fb ldr r3, [r7, #12] + 8003726: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003728: b29a uxth r2, r3 + 800372a: 68fb ldr r3, [r7, #12] + 800372c: 851a strh r2, [r3, #40] @ 0x28 + hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 800372e: 68fb ldr r3, [r7, #12] + 8003730: 4a5f ldr r2, [pc, #380] @ (80038b0 ) + 8003732: 62da str r2, [r3, #44] @ 0x2c + + /* Send Slave Address */ + if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) + 8003734: 8979 ldrh r1, [r7, #10] + 8003736: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003738: 6b3a ldr r2, [r7, #48] @ 0x30 + 800373a: 68f8 ldr r0, [r7, #12] + 800373c: f000 fa8a bl 8003c54 + 8003740: 4603 mov r3, r0 + 8003742: 2b00 cmp r3, #0 + 8003744: d001 beq.n 800374a + { + return HAL_ERROR; + 8003746: 2301 movs r3, #1 + 8003748: e1f8 b.n 8003b3c + } + + if (hi2c->XferSize == 0U) + 800374a: 68fb ldr r3, [r7, #12] + 800374c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800374e: 2b00 cmp r3, #0 + 8003750: d113 bne.n 800377a + { + /* Clear ADDR flag */ + __HAL_I2C_CLEAR_ADDRFLAG(hi2c); + 8003752: 2300 movs r3, #0 + 8003754: 61fb str r3, [r7, #28] + 8003756: 68fb ldr r3, [r7, #12] + 8003758: 681b ldr r3, [r3, #0] + 800375a: 695b ldr r3, [r3, #20] + 800375c: 61fb str r3, [r7, #28] + 800375e: 68fb ldr r3, [r7, #12] + 8003760: 681b ldr r3, [r3, #0] + 8003762: 699b ldr r3, [r3, #24] + 8003764: 61fb str r3, [r7, #28] + 8003766: 69fb ldr r3, [r7, #28] + + /* Generate Stop */ + SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); + 8003768: 68fb ldr r3, [r7, #12] + 800376a: 681b ldr r3, [r3, #0] + 800376c: 681a ldr r2, [r3, #0] + 800376e: 68fb ldr r3, [r7, #12] + 8003770: 681b ldr r3, [r3, #0] + 8003772: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003776: 601a str r2, [r3, #0] + 8003778: e1cc b.n 8003b14 + } + else if (hi2c->XferSize == 1U) + 800377a: 68fb ldr r3, [r7, #12] + 800377c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800377e: 2b01 cmp r3, #1 + 8003780: d11e bne.n 80037c0 + { + /* Disable Acknowledge */ + CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); + 8003782: 68fb ldr r3, [r7, #12] + 8003784: 681b ldr r3, [r3, #0] + 8003786: 681a ldr r2, [r3, #0] + 8003788: 68fb ldr r3, [r7, #12] + 800378a: 681b ldr r3, [r3, #0] + 800378c: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8003790: 601a str r2, [r3, #0] + __ASM volatile ("cpsid i" : : : "memory"); + 8003792: b672 cpsid i +} + 8003794: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8003668: 2300 movs r3, #0 - 800366a: 617b str r3, [r7, #20] - 800366c: 68fb ldr r3, [r7, #12] - 800366e: 681b ldr r3, [r3, #0] - 8003670: 695b ldr r3, [r3, #20] - 8003672: 617b str r3, [r7, #20] - 8003674: 68fb ldr r3, [r7, #12] - 8003676: 681b ldr r3, [r3, #0] - 8003678: 699b ldr r3, [r3, #24] - 800367a: 617b str r3, [r7, #20] - 800367c: 697b ldr r3, [r7, #20] + 8003796: 2300 movs r3, #0 + 8003798: 61bb str r3, [r7, #24] + 800379a: 68fb ldr r3, [r7, #12] + 800379c: 681b ldr r3, [r3, #0] + 800379e: 695b ldr r3, [r3, #20] + 80037a0: 61bb str r3, [r7, #24] + 80037a2: 68fb ldr r3, [r7, #12] + 80037a4: 681b ldr r3, [r3, #0] + 80037a6: 699b ldr r3, [r3, #24] + 80037a8: 61bb str r3, [r7, #24] + 80037aa: 69bb ldr r3, [r7, #24] + + /* Generate Stop */ + SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); + 80037ac: 68fb ldr r3, [r7, #12] + 80037ae: 681b ldr r3, [r3, #0] + 80037b0: 681a ldr r2, [r3, #0] + 80037b2: 68fb ldr r3, [r7, #12] + 80037b4: 681b ldr r3, [r3, #0] + 80037b6: f442 7200 orr.w r2, r2, #512 @ 0x200 + 80037ba: 601a str r2, [r3, #0] + __ASM volatile ("cpsie i" : : : "memory"); + 80037bc: b662 cpsie i +} + 80037be: e035 b.n 800382c + + /* Re-enable IRQs */ + __enable_irq(); + } + else if (hi2c->XferSize == 2U) + 80037c0: 68fb ldr r3, [r7, #12] + 80037c2: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80037c4: 2b02 cmp r3, #2 + 80037c6: d11e bne.n 8003806 + { + /* Enable Pos */ + SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); + 80037c8: 68fb ldr r3, [r7, #12] + 80037ca: 681b ldr r3, [r3, #0] + 80037cc: 681a ldr r2, [r3, #0] + 80037ce: 68fb ldr r3, [r7, #12] + 80037d0: 681b ldr r3, [r3, #0] + 80037d2: f442 6200 orr.w r2, r2, #2048 @ 0x800 + 80037d6: 601a str r2, [r3, #0] + __ASM volatile ("cpsid i" : : : "memory"); + 80037d8: b672 cpsid i +} + 80037da: bf00 nop + /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 + software sequence must complete before the current byte end of transfer */ + __disable_irq(); + + /* Clear ADDR flag */ + __HAL_I2C_CLEAR_ADDRFLAG(hi2c); + 80037dc: 2300 movs r3, #0 + 80037de: 617b str r3, [r7, #20] + 80037e0: 68fb ldr r3, [r7, #12] + 80037e2: 681b ldr r3, [r3, #0] + 80037e4: 695b ldr r3, [r3, #20] + 80037e6: 617b str r3, [r7, #20] + 80037e8: 68fb ldr r3, [r7, #12] + 80037ea: 681b ldr r3, [r3, #0] + 80037ec: 699b ldr r3, [r3, #24] + 80037ee: 617b str r3, [r7, #20] + 80037f0: 697b ldr r3, [r7, #20] /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 800367e: 68fb ldr r3, [r7, #12] - 8003680: 681b ldr r3, [r3, #0] - 8003682: 681a ldr r2, [r3, #0] - 8003684: 68fb ldr r3, [r7, #12] - 8003686: 681b ldr r3, [r3, #0] - 8003688: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 800368c: 601a str r2, [r3, #0] + 80037f2: 68fb ldr r3, [r7, #12] + 80037f4: 681b ldr r3, [r3, #0] + 80037f6: 681a ldr r2, [r3, #0] + 80037f8: 68fb ldr r3, [r7, #12] + 80037fa: 681b ldr r3, [r3, #0] + 80037fc: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8003800: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); - 800368e: b662 cpsie i + 8003802: b662 cpsie i } - 8003690: e012 b.n 80036b8 + 8003804: e012 b.n 800382c __enable_irq(); } else { /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003692: 68fb ldr r3, [r7, #12] - 8003694: 681b ldr r3, [r3, #0] - 8003696: 681a ldr r2, [r3, #0] - 8003698: 68fb ldr r3, [r7, #12] - 800369a: 681b ldr r3, [r3, #0] - 800369c: f442 6280 orr.w r2, r2, #1024 @ 0x400 - 80036a0: 601a str r2, [r3, #0] + 8003806: 68fb ldr r3, [r7, #12] + 8003808: 681b ldr r3, [r3, #0] + 800380a: 681a ldr r2, [r3, #0] + 800380c: 68fb ldr r3, [r7, #12] + 800380e: 681b ldr r3, [r3, #0] + 8003810: f442 6280 orr.w r2, r2, #1024 @ 0x400 + 8003814: 601a str r2, [r3, #0] /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 80036a2: 2300 movs r3, #0 - 80036a4: 613b str r3, [r7, #16] - 80036a6: 68fb ldr r3, [r7, #12] - 80036a8: 681b ldr r3, [r3, #0] - 80036aa: 695b ldr r3, [r3, #20] - 80036ac: 613b str r3, [r7, #16] - 80036ae: 68fb ldr r3, [r7, #12] - 80036b0: 681b ldr r3, [r3, #0] - 80036b2: 699b ldr r3, [r3, #24] - 80036b4: 613b str r3, [r7, #16] - 80036b6: 693b ldr r3, [r7, #16] + 8003816: 2300 movs r3, #0 + 8003818: 613b str r3, [r7, #16] + 800381a: 68fb ldr r3, [r7, #12] + 800381c: 681b ldr r3, [r3, #0] + 800381e: 695b ldr r3, [r3, #20] + 8003820: 613b str r3, [r7, #16] + 8003822: 68fb ldr r3, [r7, #12] + 8003824: 681b ldr r3, [r3, #0] + 8003826: 699b ldr r3, [r3, #24] + 8003828: 613b str r3, [r7, #16] + 800382a: 693b ldr r3, [r7, #16] } while (hi2c->XferSize > 0U) - 80036b8: e172 b.n 80039a0 + 800382c: e172 b.n 8003b14 { if (hi2c->XferSize <= 3U) - 80036ba: 68fb ldr r3, [r7, #12] - 80036bc: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80036be: 2b03 cmp r3, #3 - 80036c0: f200 811f bhi.w 8003902 + 800382e: 68fb ldr r3, [r7, #12] + 8003830: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003832: 2b03 cmp r3, #3 + 8003834: f200 811f bhi.w 8003a76 { /* One byte */ if (hi2c->XferSize == 1U) - 80036c4: 68fb ldr r3, [r7, #12] - 80036c6: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80036c8: 2b01 cmp r3, #1 - 80036ca: d123 bne.n 8003714 + 8003838: 68fb ldr r3, [r7, #12] + 800383a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800383c: 2b01 cmp r3, #1 + 800383e: d123 bne.n 8003888 { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 80036cc: 6a7a ldr r2, [r7, #36] @ 0x24 - 80036ce: 6b39 ldr r1, [r7, #48] @ 0x30 - 80036d0: 68f8 ldr r0, [r7, #12] - 80036d2: f000 fc7d bl 8003fd0 - 80036d6: 4603 mov r3, r0 - 80036d8: 2b00 cmp r3, #0 - 80036da: d001 beq.n 80036e0 + 8003840: 6a7a ldr r2, [r7, #36] @ 0x24 + 8003842: 6b39 ldr r1, [r7, #48] @ 0x30 + 8003844: 68f8 ldr r0, [r7, #12] + 8003846: f000 fc7d bl 8004144 + 800384a: 4603 mov r3, r0 + 800384c: 2b00 cmp r3, #0 + 800384e: d001 beq.n 8003854 { return HAL_ERROR; - 80036dc: 2301 movs r3, #1 - 80036de: e173 b.n 80039c8 + 8003850: 2301 movs r3, #1 + 8003852: e173 b.n 8003b3c } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 80036e0: 68fb ldr r3, [r7, #12] - 80036e2: 681b ldr r3, [r3, #0] - 80036e4: 691a ldr r2, [r3, #16] - 80036e6: 68fb ldr r3, [r7, #12] - 80036e8: 6a5b ldr r3, [r3, #36] @ 0x24 - 80036ea: b2d2 uxtb r2, r2 - 80036ec: 701a strb r2, [r3, #0] + 8003854: 68fb ldr r3, [r7, #12] + 8003856: 681b ldr r3, [r3, #0] + 8003858: 691a ldr r2, [r3, #16] + 800385a: 68fb ldr r3, [r7, #12] + 800385c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800385e: b2d2 uxtb r2, r2 + 8003860: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80036ee: 68fb ldr r3, [r7, #12] - 80036f0: 6a5b ldr r3, [r3, #36] @ 0x24 - 80036f2: 1c5a adds r2, r3, #1 - 80036f4: 68fb ldr r3, [r7, #12] - 80036f6: 625a str r2, [r3, #36] @ 0x24 + 8003862: 68fb ldr r3, [r7, #12] + 8003864: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003866: 1c5a adds r2, r3, #1 + 8003868: 68fb ldr r3, [r7, #12] + 800386a: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 80036f8: 68fb ldr r3, [r7, #12] - 80036fa: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80036fc: 3b01 subs r3, #1 - 80036fe: b29a uxth r2, r3 - 8003700: 68fb ldr r3, [r7, #12] - 8003702: 851a strh r2, [r3, #40] @ 0x28 + 800386c: 68fb ldr r3, [r7, #12] + 800386e: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003870: 3b01 subs r3, #1 + 8003872: b29a uxth r2, r3 + 8003874: 68fb ldr r3, [r7, #12] + 8003876: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003704: 68fb ldr r3, [r7, #12] - 8003706: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003708: b29b uxth r3, r3 - 800370a: 3b01 subs r3, #1 - 800370c: b29a uxth r2, r3 - 800370e: 68fb ldr r3, [r7, #12] - 8003710: 855a strh r2, [r3, #42] @ 0x2a - 8003712: e145 b.n 80039a0 + 8003878: 68fb ldr r3, [r7, #12] + 800387a: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800387c: b29b uxth r3, r3 + 800387e: 3b01 subs r3, #1 + 8003880: b29a uxth r2, r3 + 8003882: 68fb ldr r3, [r7, #12] + 8003884: 855a strh r2, [r3, #42] @ 0x2a + 8003886: e145 b.n 8003b14 } /* Two bytes */ else if (hi2c->XferSize == 2U) - 8003714: 68fb ldr r3, [r7, #12] - 8003716: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003718: 2b02 cmp r3, #2 - 800371a: d152 bne.n 80037c2 + 8003888: 68fb ldr r3, [r7, #12] + 800388a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800388c: 2b02 cmp r3, #2 + 800388e: d152 bne.n 8003936 { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) - 800371c: 6a7b ldr r3, [r7, #36] @ 0x24 - 800371e: 9300 str r3, [sp, #0] - 8003720: 6b3b ldr r3, [r7, #48] @ 0x30 - 8003722: 2200 movs r2, #0 - 8003724: 4906 ldr r1, [pc, #24] @ (8003740 ) - 8003726: 68f8 ldr r0, [r7, #12] - 8003728: f000 faa8 bl 8003c7c - 800372c: 4603 mov r3, r0 - 800372e: 2b00 cmp r3, #0 - 8003730: d008 beq.n 8003744 + 8003890: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003892: 9300 str r3, [sp, #0] + 8003894: 6b3b ldr r3, [r7, #48] @ 0x30 + 8003896: 2200 movs r2, #0 + 8003898: 4906 ldr r1, [pc, #24] @ (80038b4 ) + 800389a: 68f8 ldr r0, [r7, #12] + 800389c: f000 faa8 bl 8003df0 + 80038a0: 4603 mov r3, r0 + 80038a2: 2b00 cmp r3, #0 + 80038a4: d008 beq.n 80038b8 { return HAL_ERROR; - 8003732: 2301 movs r3, #1 - 8003734: e148 b.n 80039c8 - 8003736: bf00 nop - 8003738: 00100002 .word 0x00100002 - 800373c: ffff0000 .word 0xffff0000 - 8003740: 00010004 .word 0x00010004 + 80038a6: 2301 movs r3, #1 + 80038a8: e148 b.n 8003b3c + 80038aa: bf00 nop + 80038ac: 00100002 .word 0x00100002 + 80038b0: ffff0000 .word 0xffff0000 + 80038b4: 00010004 .word 0x00010004 __ASM volatile ("cpsid i" : : : "memory"); - 8003744: b672 cpsid i + 80038b8: b672 cpsid i } - 8003746: bf00 nop + 80038ba: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003748: 68fb ldr r3, [r7, #12] - 800374a: 681b ldr r3, [r3, #0] - 800374c: 681a ldr r2, [r3, #0] - 800374e: 68fb ldr r3, [r7, #12] - 8003750: 681b ldr r3, [r3, #0] - 8003752: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8003756: 601a str r2, [r3, #0] + 80038bc: 68fb ldr r3, [r7, #12] + 80038be: 681b ldr r3, [r3, #0] + 80038c0: 681a ldr r2, [r3, #0] + 80038c2: 68fb ldr r3, [r7, #12] + 80038c4: 681b ldr r3, [r3, #0] + 80038c6: f442 7200 orr.w r2, r2, #512 @ 0x200 + 80038ca: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003758: 68fb ldr r3, [r7, #12] - 800375a: 681b ldr r3, [r3, #0] - 800375c: 691a ldr r2, [r3, #16] - 800375e: 68fb ldr r3, [r7, #12] - 8003760: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003762: b2d2 uxtb r2, r2 - 8003764: 701a strb r2, [r3, #0] + 80038cc: 68fb ldr r3, [r7, #12] + 80038ce: 681b ldr r3, [r3, #0] + 80038d0: 691a ldr r2, [r3, #16] + 80038d2: 68fb ldr r3, [r7, #12] + 80038d4: 6a5b ldr r3, [r3, #36] @ 0x24 + 80038d6: b2d2 uxtb r2, r2 + 80038d8: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003766: 68fb ldr r3, [r7, #12] - 8003768: 6a5b ldr r3, [r3, #36] @ 0x24 - 800376a: 1c5a adds r2, r3, #1 - 800376c: 68fb ldr r3, [r7, #12] - 800376e: 625a str r2, [r3, #36] @ 0x24 + 80038da: 68fb ldr r3, [r7, #12] + 80038dc: 6a5b ldr r3, [r3, #36] @ 0x24 + 80038de: 1c5a adds r2, r3, #1 + 80038e0: 68fb ldr r3, [r7, #12] + 80038e2: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003770: 68fb ldr r3, [r7, #12] - 8003772: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003774: 3b01 subs r3, #1 - 8003776: b29a uxth r2, r3 - 8003778: 68fb ldr r3, [r7, #12] - 800377a: 851a strh r2, [r3, #40] @ 0x28 + 80038e4: 68fb ldr r3, [r7, #12] + 80038e6: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80038e8: 3b01 subs r3, #1 + 80038ea: b29a uxth r2, r3 + 80038ec: 68fb ldr r3, [r7, #12] + 80038ee: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 800377c: 68fb ldr r3, [r7, #12] - 800377e: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003780: b29b uxth r3, r3 - 8003782: 3b01 subs r3, #1 - 8003784: b29a uxth r2, r3 - 8003786: 68fb ldr r3, [r7, #12] - 8003788: 855a strh r2, [r3, #42] @ 0x2a + 80038f0: 68fb ldr r3, [r7, #12] + 80038f2: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80038f4: b29b uxth r3, r3 + 80038f6: 3b01 subs r3, #1 + 80038f8: b29a uxth r2, r3 + 80038fa: 68fb ldr r3, [r7, #12] + 80038fc: 855a strh r2, [r3, #42] @ 0x2a __ASM volatile ("cpsie i" : : : "memory"); - 800378a: b662 cpsie i + 80038fe: b662 cpsie i } - 800378c: bf00 nop + 8003900: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 800378e: 68fb ldr r3, [r7, #12] - 8003790: 681b ldr r3, [r3, #0] - 8003792: 691a ldr r2, [r3, #16] - 8003794: 68fb ldr r3, [r7, #12] - 8003796: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003798: b2d2 uxtb r2, r2 - 800379a: 701a strb r2, [r3, #0] + 8003902: 68fb ldr r3, [r7, #12] + 8003904: 681b ldr r3, [r3, #0] + 8003906: 691a ldr r2, [r3, #16] + 8003908: 68fb ldr r3, [r7, #12] + 800390a: 6a5b ldr r3, [r3, #36] @ 0x24 + 800390c: b2d2 uxtb r2, r2 + 800390e: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 800379c: 68fb ldr r3, [r7, #12] - 800379e: 6a5b ldr r3, [r3, #36] @ 0x24 - 80037a0: 1c5a adds r2, r3, #1 - 80037a2: 68fb ldr r3, [r7, #12] - 80037a4: 625a str r2, [r3, #36] @ 0x24 + 8003910: 68fb ldr r3, [r7, #12] + 8003912: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003914: 1c5a adds r2, r3, #1 + 8003916: 68fb ldr r3, [r7, #12] + 8003918: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 80037a6: 68fb ldr r3, [r7, #12] - 80037a8: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80037aa: 3b01 subs r3, #1 - 80037ac: b29a uxth r2, r3 - 80037ae: 68fb ldr r3, [r7, #12] - 80037b0: 851a strh r2, [r3, #40] @ 0x28 + 800391a: 68fb ldr r3, [r7, #12] + 800391c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800391e: 3b01 subs r3, #1 + 8003920: b29a uxth r2, r3 + 8003922: 68fb ldr r3, [r7, #12] + 8003924: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 80037b2: 68fb ldr r3, [r7, #12] - 80037b4: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80037b6: b29b uxth r3, r3 - 80037b8: 3b01 subs r3, #1 - 80037ba: b29a uxth r2, r3 - 80037bc: 68fb ldr r3, [r7, #12] - 80037be: 855a strh r2, [r3, #42] @ 0x2a - 80037c0: e0ee b.n 80039a0 + 8003926: 68fb ldr r3, [r7, #12] + 8003928: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800392a: b29b uxth r3, r3 + 800392c: 3b01 subs r3, #1 + 800392e: b29a uxth r2, r3 + 8003930: 68fb ldr r3, [r7, #12] + 8003932: 855a strh r2, [r3, #42] @ 0x2a + 8003934: e0ee b.n 8003b14 } /* 3 Last bytes */ else { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) - 80037c2: 6a7b ldr r3, [r7, #36] @ 0x24 - 80037c4: 9300 str r3, [sp, #0] - 80037c6: 6b3b ldr r3, [r7, #48] @ 0x30 - 80037c8: 2200 movs r2, #0 - 80037ca: 4981 ldr r1, [pc, #516] @ (80039d0 ) - 80037cc: 68f8 ldr r0, [r7, #12] - 80037ce: f000 fa55 bl 8003c7c - 80037d2: 4603 mov r3, r0 - 80037d4: 2b00 cmp r3, #0 - 80037d6: d001 beq.n 80037dc + 8003936: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003938: 9300 str r3, [sp, #0] + 800393a: 6b3b ldr r3, [r7, #48] @ 0x30 + 800393c: 2200 movs r2, #0 + 800393e: 4981 ldr r1, [pc, #516] @ (8003b44 ) + 8003940: 68f8 ldr r0, [r7, #12] + 8003942: f000 fa55 bl 8003df0 + 8003946: 4603 mov r3, r0 + 8003948: 2b00 cmp r3, #0 + 800394a: d001 beq.n 8003950 { return HAL_ERROR; - 80037d8: 2301 movs r3, #1 - 80037da: e0f5 b.n 80039c8 + 800394c: 2301 movs r3, #1 + 800394e: e0f5 b.n 8003b3c } /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 80037dc: 68fb ldr r3, [r7, #12] - 80037de: 681b ldr r3, [r3, #0] - 80037e0: 681a ldr r2, [r3, #0] - 80037e2: 68fb ldr r3, [r7, #12] - 80037e4: 681b ldr r3, [r3, #0] - 80037e6: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 80037ea: 601a str r2, [r3, #0] + 8003950: 68fb ldr r3, [r7, #12] + 8003952: 681b ldr r3, [r3, #0] + 8003954: 681a ldr r2, [r3, #0] + 8003956: 68fb ldr r3, [r7, #12] + 8003958: 681b ldr r3, [r3, #0] + 800395a: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 800395e: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 80037ec: b672 cpsid i + 8003960: b672 cpsid i } - 80037ee: bf00 nop + 8003962: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 80037f0: 68fb ldr r3, [r7, #12] - 80037f2: 681b ldr r3, [r3, #0] - 80037f4: 691a ldr r2, [r3, #16] - 80037f6: 68fb ldr r3, [r7, #12] - 80037f8: 6a5b ldr r3, [r3, #36] @ 0x24 - 80037fa: b2d2 uxtb r2, r2 - 80037fc: 701a strb r2, [r3, #0] + 8003964: 68fb ldr r3, [r7, #12] + 8003966: 681b ldr r3, [r3, #0] + 8003968: 691a ldr r2, [r3, #16] + 800396a: 68fb ldr r3, [r7, #12] + 800396c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800396e: b2d2 uxtb r2, r2 + 8003970: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80037fe: 68fb ldr r3, [r7, #12] - 8003800: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003802: 1c5a adds r2, r3, #1 - 8003804: 68fb ldr r3, [r7, #12] - 8003806: 625a str r2, [r3, #36] @ 0x24 + 8003972: 68fb ldr r3, [r7, #12] + 8003974: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003976: 1c5a adds r2, r3, #1 + 8003978: 68fb ldr r3, [r7, #12] + 800397a: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003808: 68fb ldr r3, [r7, #12] - 800380a: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800380c: 3b01 subs r3, #1 - 800380e: b29a uxth r2, r3 - 8003810: 68fb ldr r3, [r7, #12] - 8003812: 851a strh r2, [r3, #40] @ 0x28 + 800397c: 68fb ldr r3, [r7, #12] + 800397e: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003980: 3b01 subs r3, #1 + 8003982: b29a uxth r2, r3 + 8003984: 68fb ldr r3, [r7, #12] + 8003986: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003814: 68fb ldr r3, [r7, #12] - 8003816: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003818: b29b uxth r3, r3 - 800381a: 3b01 subs r3, #1 - 800381c: b29a uxth r2, r3 - 800381e: 68fb ldr r3, [r7, #12] - 8003820: 855a strh r2, [r3, #42] @ 0x2a + 8003988: 68fb ldr r3, [r7, #12] + 800398a: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800398c: b29b uxth r3, r3 + 800398e: 3b01 subs r3, #1 + 8003990: b29a uxth r2, r3 + 8003992: 68fb ldr r3, [r7, #12] + 8003994: 855a strh r2, [r3, #42] @ 0x2a /* Wait until BTF flag is set */ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U); - 8003822: 4b6c ldr r3, [pc, #432] @ (80039d4 ) - 8003824: 681b ldr r3, [r3, #0] - 8003826: 08db lsrs r3, r3, #3 - 8003828: 4a6b ldr r2, [pc, #428] @ (80039d8 ) - 800382a: fba2 2303 umull r2, r3, r2, r3 - 800382e: 0a1a lsrs r2, r3, #8 - 8003830: 4613 mov r3, r2 - 8003832: 009b lsls r3, r3, #2 - 8003834: 4413 add r3, r2 - 8003836: 00da lsls r2, r3, #3 - 8003838: 1ad3 subs r3, r2, r3 - 800383a: 623b str r3, [r7, #32] + 8003996: 4b6c ldr r3, [pc, #432] @ (8003b48 ) + 8003998: 681b ldr r3, [r3, #0] + 800399a: 08db lsrs r3, r3, #3 + 800399c: 4a6b ldr r2, [pc, #428] @ (8003b4c ) + 800399e: fba2 2303 umull r2, r3, r2, r3 + 80039a2: 0a1a lsrs r2, r3, #8 + 80039a4: 4613 mov r3, r2 + 80039a6: 009b lsls r3, r3, #2 + 80039a8: 4413 add r3, r2 + 80039aa: 00da lsls r2, r3, #3 + 80039ac: 1ad3 subs r3, r2, r3 + 80039ae: 623b str r3, [r7, #32] do { count--; - 800383c: 6a3b ldr r3, [r7, #32] - 800383e: 3b01 subs r3, #1 - 8003840: 623b str r3, [r7, #32] + 80039b0: 6a3b ldr r3, [r7, #32] + 80039b2: 3b01 subs r3, #1 + 80039b4: 623b str r3, [r7, #32] if (count == 0U) - 8003842: 6a3b ldr r3, [r7, #32] - 8003844: 2b00 cmp r3, #0 - 8003846: d118 bne.n 800387a + 80039b6: 6a3b ldr r3, [r7, #32] + 80039b8: 2b00 cmp r3, #0 + 80039ba: d118 bne.n 80039ee { hi2c->PreviousState = I2C_STATE_NONE; - 8003848: 68fb ldr r3, [r7, #12] - 800384a: 2200 movs r2, #0 - 800384c: 631a str r2, [r3, #48] @ 0x30 + 80039bc: 68fb ldr r3, [r7, #12] + 80039be: 2200 movs r2, #0 + 80039c0: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 800384e: 68fb ldr r3, [r7, #12] - 8003850: 2220 movs r2, #32 - 8003852: f883 203d strb.w r2, [r3, #61] @ 0x3d + 80039c2: 68fb ldr r3, [r7, #12] + 80039c4: 2220 movs r2, #32 + 80039c6: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003856: 68fb ldr r3, [r7, #12] - 8003858: 2200 movs r2, #0 - 800385a: f883 203e strb.w r2, [r3, #62] @ 0x3e + 80039ca: 68fb ldr r3, [r7, #12] + 80039cc: 2200 movs r2, #0 + 80039ce: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 800385e: 68fb ldr r3, [r7, #12] - 8003860: 6c1b ldr r3, [r3, #64] @ 0x40 - 8003862: f043 0220 orr.w r2, r3, #32 - 8003866: 68fb ldr r3, [r7, #12] - 8003868: 641a str r2, [r3, #64] @ 0x40 + 80039d2: 68fb ldr r3, [r7, #12] + 80039d4: 6c1b ldr r3, [r3, #64] @ 0x40 + 80039d6: f043 0220 orr.w r2, r3, #32 + 80039da: 68fb ldr r3, [r7, #12] + 80039dc: 641a str r2, [r3, #64] @ 0x40 __ASM volatile ("cpsie i" : : : "memory"); - 800386a: b662 cpsie i + 80039de: b662 cpsie i } - 800386c: bf00 nop + 80039e0: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 800386e: 68fb ldr r3, [r7, #12] - 8003870: 2200 movs r2, #0 - 8003872: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80039e2: 68fb ldr r3, [r7, #12] + 80039e4: 2200 movs r2, #0 + 80039e6: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8003876: 2301 movs r3, #1 - 8003878: e0a6 b.n 80039c8 + 80039ea: 2301 movs r3, #1 + 80039ec: e0a6 b.n 8003b3c } } while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET); - 800387a: 68fb ldr r3, [r7, #12] - 800387c: 681b ldr r3, [r3, #0] - 800387e: 695b ldr r3, [r3, #20] - 8003880: f003 0304 and.w r3, r3, #4 - 8003884: 2b04 cmp r3, #4 - 8003886: d1d9 bne.n 800383c + 80039ee: 68fb ldr r3, [r7, #12] + 80039f0: 681b ldr r3, [r3, #0] + 80039f2: 695b ldr r3, [r3, #20] + 80039f4: f003 0304 and.w r3, r3, #4 + 80039f8: 2b04 cmp r3, #4 + 80039fa: d1d9 bne.n 80039b0 /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003888: 68fb ldr r3, [r7, #12] - 800388a: 681b ldr r3, [r3, #0] - 800388c: 681a ldr r2, [r3, #0] - 800388e: 68fb ldr r3, [r7, #12] - 8003890: 681b ldr r3, [r3, #0] - 8003892: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8003896: 601a str r2, [r3, #0] + 80039fc: 68fb ldr r3, [r7, #12] + 80039fe: 681b ldr r3, [r3, #0] + 8003a00: 681a ldr r2, [r3, #0] + 8003a02: 68fb ldr r3, [r7, #12] + 8003a04: 681b ldr r3, [r3, #0] + 8003a06: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003a0a: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003898: 68fb ldr r3, [r7, #12] - 800389a: 681b ldr r3, [r3, #0] - 800389c: 691a ldr r2, [r3, #16] - 800389e: 68fb ldr r3, [r7, #12] - 80038a0: 6a5b ldr r3, [r3, #36] @ 0x24 - 80038a2: b2d2 uxtb r2, r2 - 80038a4: 701a strb r2, [r3, #0] + 8003a0c: 68fb ldr r3, [r7, #12] + 8003a0e: 681b ldr r3, [r3, #0] + 8003a10: 691a ldr r2, [r3, #16] + 8003a12: 68fb ldr r3, [r7, #12] + 8003a14: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003a16: b2d2 uxtb r2, r2 + 8003a18: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80038a6: 68fb ldr r3, [r7, #12] - 80038a8: 6a5b ldr r3, [r3, #36] @ 0x24 - 80038aa: 1c5a adds r2, r3, #1 - 80038ac: 68fb ldr r3, [r7, #12] - 80038ae: 625a str r2, [r3, #36] @ 0x24 + 8003a1a: 68fb ldr r3, [r7, #12] + 8003a1c: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003a1e: 1c5a adds r2, r3, #1 + 8003a20: 68fb ldr r3, [r7, #12] + 8003a22: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 80038b0: 68fb ldr r3, [r7, #12] - 80038b2: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80038b4: 3b01 subs r3, #1 - 80038b6: b29a uxth r2, r3 - 80038b8: 68fb ldr r3, [r7, #12] - 80038ba: 851a strh r2, [r3, #40] @ 0x28 + 8003a24: 68fb ldr r3, [r7, #12] + 8003a26: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003a28: 3b01 subs r3, #1 + 8003a2a: b29a uxth r2, r3 + 8003a2c: 68fb ldr r3, [r7, #12] + 8003a2e: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 80038bc: 68fb ldr r3, [r7, #12] - 80038be: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80038c0: b29b uxth r3, r3 - 80038c2: 3b01 subs r3, #1 - 80038c4: b29a uxth r2, r3 - 80038c6: 68fb ldr r3, [r7, #12] - 80038c8: 855a strh r2, [r3, #42] @ 0x2a + 8003a30: 68fb ldr r3, [r7, #12] + 8003a32: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003a34: b29b uxth r3, r3 + 8003a36: 3b01 subs r3, #1 + 8003a38: b29a uxth r2, r3 + 8003a3a: 68fb ldr r3, [r7, #12] + 8003a3c: 855a strh r2, [r3, #42] @ 0x2a __ASM volatile ("cpsie i" : : : "memory"); - 80038ca: b662 cpsie i + 8003a3e: b662 cpsie i } - 80038cc: bf00 nop + 8003a40: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 80038ce: 68fb ldr r3, [r7, #12] - 80038d0: 681b ldr r3, [r3, #0] - 80038d2: 691a ldr r2, [r3, #16] - 80038d4: 68fb ldr r3, [r7, #12] - 80038d6: 6a5b ldr r3, [r3, #36] @ 0x24 - 80038d8: b2d2 uxtb r2, r2 - 80038da: 701a strb r2, [r3, #0] + 8003a42: 68fb ldr r3, [r7, #12] + 8003a44: 681b ldr r3, [r3, #0] + 8003a46: 691a ldr r2, [r3, #16] + 8003a48: 68fb ldr r3, [r7, #12] + 8003a4a: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003a4c: b2d2 uxtb r2, r2 + 8003a4e: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80038dc: 68fb ldr r3, [r7, #12] - 80038de: 6a5b ldr r3, [r3, #36] @ 0x24 - 80038e0: 1c5a adds r2, r3, #1 - 80038e2: 68fb ldr r3, [r7, #12] - 80038e4: 625a str r2, [r3, #36] @ 0x24 + 8003a50: 68fb ldr r3, [r7, #12] + 8003a52: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003a54: 1c5a adds r2, r3, #1 + 8003a56: 68fb ldr r3, [r7, #12] + 8003a58: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 80038e6: 68fb ldr r3, [r7, #12] - 80038e8: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80038ea: 3b01 subs r3, #1 - 80038ec: b29a uxth r2, r3 - 80038ee: 68fb ldr r3, [r7, #12] - 80038f0: 851a strh r2, [r3, #40] @ 0x28 + 8003a5a: 68fb ldr r3, [r7, #12] + 8003a5c: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003a5e: 3b01 subs r3, #1 + 8003a60: b29a uxth r2, r3 + 8003a62: 68fb ldr r3, [r7, #12] + 8003a64: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 80038f2: 68fb ldr r3, [r7, #12] - 80038f4: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80038f6: b29b uxth r3, r3 - 80038f8: 3b01 subs r3, #1 - 80038fa: b29a uxth r2, r3 - 80038fc: 68fb ldr r3, [r7, #12] - 80038fe: 855a strh r2, [r3, #42] @ 0x2a - 8003900: e04e b.n 80039a0 + 8003a66: 68fb ldr r3, [r7, #12] + 8003a68: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003a6a: b29b uxth r3, r3 + 8003a6c: 3b01 subs r3, #1 + 8003a6e: b29a uxth r2, r3 + 8003a70: 68fb ldr r3, [r7, #12] + 8003a72: 855a strh r2, [r3, #42] @ 0x2a + 8003a74: e04e b.n 8003b14 } } else { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8003902: 6a7a ldr r2, [r7, #36] @ 0x24 - 8003904: 6b39 ldr r1, [r7, #48] @ 0x30 - 8003906: 68f8 ldr r0, [r7, #12] - 8003908: f000 fb62 bl 8003fd0 - 800390c: 4603 mov r3, r0 - 800390e: 2b00 cmp r3, #0 - 8003910: d001 beq.n 8003916 + 8003a76: 6a7a ldr r2, [r7, #36] @ 0x24 + 8003a78: 6b39 ldr r1, [r7, #48] @ 0x30 + 8003a7a: 68f8 ldr r0, [r7, #12] + 8003a7c: f000 fb62 bl 8004144 + 8003a80: 4603 mov r3, r0 + 8003a82: 2b00 cmp r3, #0 + 8003a84: d001 beq.n 8003a8a { return HAL_ERROR; - 8003912: 2301 movs r3, #1 - 8003914: e058 b.n 80039c8 + 8003a86: 2301 movs r3, #1 + 8003a88: e058 b.n 8003b3c } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003916: 68fb ldr r3, [r7, #12] - 8003918: 681b ldr r3, [r3, #0] - 800391a: 691a ldr r2, [r3, #16] - 800391c: 68fb ldr r3, [r7, #12] - 800391e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003920: b2d2 uxtb r2, r2 - 8003922: 701a strb r2, [r3, #0] + 8003a8a: 68fb ldr r3, [r7, #12] + 8003a8c: 681b ldr r3, [r3, #0] + 8003a8e: 691a ldr r2, [r3, #16] + 8003a90: 68fb ldr r3, [r7, #12] + 8003a92: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003a94: b2d2 uxtb r2, r2 + 8003a96: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003924: 68fb ldr r3, [r7, #12] - 8003926: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003928: 1c5a adds r2, r3, #1 - 800392a: 68fb ldr r3, [r7, #12] - 800392c: 625a str r2, [r3, #36] @ 0x24 + 8003a98: 68fb ldr r3, [r7, #12] + 8003a9a: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003a9c: 1c5a adds r2, r3, #1 + 8003a9e: 68fb ldr r3, [r7, #12] + 8003aa0: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 800392e: 68fb ldr r3, [r7, #12] - 8003930: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003932: 3b01 subs r3, #1 - 8003934: b29a uxth r2, r3 - 8003936: 68fb ldr r3, [r7, #12] - 8003938: 851a strh r2, [r3, #40] @ 0x28 + 8003aa2: 68fb ldr r3, [r7, #12] + 8003aa4: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003aa6: 3b01 subs r3, #1 + 8003aa8: b29a uxth r2, r3 + 8003aaa: 68fb ldr r3, [r7, #12] + 8003aac: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 800393a: 68fb ldr r3, [r7, #12] - 800393c: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800393e: b29b uxth r3, r3 - 8003940: 3b01 subs r3, #1 - 8003942: b29a uxth r2, r3 - 8003944: 68fb ldr r3, [r7, #12] - 8003946: 855a strh r2, [r3, #42] @ 0x2a + 8003aae: 68fb ldr r3, [r7, #12] + 8003ab0: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003ab2: b29b uxth r3, r3 + 8003ab4: 3b01 subs r3, #1 + 8003ab6: b29a uxth r2, r3 + 8003ab8: 68fb ldr r3, [r7, #12] + 8003aba: 855a strh r2, [r3, #42] @ 0x2a if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) - 8003948: 68fb ldr r3, [r7, #12] - 800394a: 681b ldr r3, [r3, #0] - 800394c: 695b ldr r3, [r3, #20] - 800394e: f003 0304 and.w r3, r3, #4 - 8003952: 2b04 cmp r3, #4 - 8003954: d124 bne.n 80039a0 + 8003abc: 68fb ldr r3, [r7, #12] + 8003abe: 681b ldr r3, [r3, #0] + 8003ac0: 695b ldr r3, [r3, #20] + 8003ac2: f003 0304 and.w r3, r3, #4 + 8003ac6: 2b04 cmp r3, #4 + 8003ac8: d124 bne.n 8003b14 { if (hi2c->XferSize == 3U) - 8003956: 68fb ldr r3, [r7, #12] - 8003958: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800395a: 2b03 cmp r3, #3 - 800395c: d107 bne.n 800396e + 8003aca: 68fb ldr r3, [r7, #12] + 8003acc: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003ace: 2b03 cmp r3, #3 + 8003ad0: d107 bne.n 8003ae2 { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 800395e: 68fb ldr r3, [r7, #12] - 8003960: 681b ldr r3, [r3, #0] - 8003962: 681a ldr r2, [r3, #0] - 8003964: 68fb ldr r3, [r7, #12] - 8003966: 681b ldr r3, [r3, #0] - 8003968: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 800396c: 601a str r2, [r3, #0] + 8003ad2: 68fb ldr r3, [r7, #12] + 8003ad4: 681b ldr r3, [r3, #0] + 8003ad6: 681a ldr r2, [r3, #0] + 8003ad8: 68fb ldr r3, [r7, #12] + 8003ada: 681b ldr r3, [r3, #0] + 8003adc: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8003ae0: 601a str r2, [r3, #0] } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 800396e: 68fb ldr r3, [r7, #12] - 8003970: 681b ldr r3, [r3, #0] - 8003972: 691a ldr r2, [r3, #16] - 8003974: 68fb ldr r3, [r7, #12] - 8003976: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003978: b2d2 uxtb r2, r2 - 800397a: 701a strb r2, [r3, #0] + 8003ae2: 68fb ldr r3, [r7, #12] + 8003ae4: 681b ldr r3, [r3, #0] + 8003ae6: 691a ldr r2, [r3, #16] + 8003ae8: 68fb ldr r3, [r7, #12] + 8003aea: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003aec: b2d2 uxtb r2, r2 + 8003aee: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 800397c: 68fb ldr r3, [r7, #12] - 800397e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003980: 1c5a adds r2, r3, #1 - 8003982: 68fb ldr r3, [r7, #12] - 8003984: 625a str r2, [r3, #36] @ 0x24 + 8003af0: 68fb ldr r3, [r7, #12] + 8003af2: 6a5b ldr r3, [r3, #36] @ 0x24 + 8003af4: 1c5a adds r2, r3, #1 + 8003af6: 68fb ldr r3, [r7, #12] + 8003af8: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003986: 68fb ldr r3, [r7, #12] - 8003988: 8d1b ldrh r3, [r3, #40] @ 0x28 - 800398a: 3b01 subs r3, #1 - 800398c: b29a uxth r2, r3 - 800398e: 68fb ldr r3, [r7, #12] - 8003990: 851a strh r2, [r3, #40] @ 0x28 + 8003afa: 68fb ldr r3, [r7, #12] + 8003afc: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003afe: 3b01 subs r3, #1 + 8003b00: b29a uxth r2, r3 + 8003b02: 68fb ldr r3, [r7, #12] + 8003b04: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003992: 68fb ldr r3, [r7, #12] - 8003994: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003996: b29b uxth r3, r3 - 8003998: 3b01 subs r3, #1 - 800399a: b29a uxth r2, r3 - 800399c: 68fb ldr r3, [r7, #12] - 800399e: 855a strh r2, [r3, #42] @ 0x2a + 8003b06: 68fb ldr r3, [r7, #12] + 8003b08: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8003b0a: b29b uxth r3, r3 + 8003b0c: 3b01 subs r3, #1 + 8003b0e: b29a uxth r2, r3 + 8003b10: 68fb ldr r3, [r7, #12] + 8003b12: 855a strh r2, [r3, #42] @ 0x2a while (hi2c->XferSize > 0U) - 80039a0: 68fb ldr r3, [r7, #12] - 80039a2: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80039a4: 2b00 cmp r3, #0 - 80039a6: f47f ae88 bne.w 80036ba + 8003b14: 68fb ldr r3, [r7, #12] + 8003b16: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8003b18: 2b00 cmp r3, #0 + 8003b1a: f47f ae88 bne.w 800382e } } } hi2c->State = HAL_I2C_STATE_READY; - 80039aa: 68fb ldr r3, [r7, #12] - 80039ac: 2220 movs r2, #32 - 80039ae: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003b1e: 68fb ldr r3, [r7, #12] + 8003b20: 2220 movs r2, #32 + 8003b22: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80039b2: 68fb ldr r3, [r7, #12] - 80039b4: 2200 movs r2, #0 - 80039b6: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003b26: 68fb ldr r3, [r7, #12] + 8003b28: 2200 movs r2, #0 + 8003b2a: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80039ba: 68fb ldr r3, [r7, #12] - 80039bc: 2200 movs r2, #0 - 80039be: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003b2e: 68fb ldr r3, [r7, #12] + 8003b30: 2200 movs r2, #0 + 8003b32: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 80039c2: 2300 movs r3, #0 - 80039c4: e000 b.n 80039c8 + 8003b36: 2300 movs r3, #0 + 8003b38: e000 b.n 8003b3c } else { return HAL_BUSY; - 80039c6: 2302 movs r3, #2 + 8003b3a: 2302 movs r3, #2 } } - 80039c8: 4618 mov r0, r3 - 80039ca: 3728 adds r7, #40 @ 0x28 - 80039cc: 46bd mov sp, r7 - 80039ce: bd80 pop {r7, pc} - 80039d0: 00010004 .word 0x00010004 - 80039d4: 20000008 .word 0x20000008 - 80039d8: 14f8b589 .word 0x14f8b589 + 8003b3c: 4618 mov r0, r3 + 8003b3e: 3728 adds r7, #40 @ 0x28 + 8003b40: 46bd mov sp, r7 + 8003b42: bd80 pop {r7, pc} + 8003b44: 00010004 .word 0x00010004 + 8003b48: 20000004 .word 0x20000004 + 8003b4c: 14f8b589 .word 0x14f8b589 -080039dc : +08003b50 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) { - 80039dc: b580 push {r7, lr} - 80039de: b088 sub sp, #32 - 80039e0: af02 add r7, sp, #8 - 80039e2: 60f8 str r0, [r7, #12] - 80039e4: 607a str r2, [r7, #4] - 80039e6: 603b str r3, [r7, #0] - 80039e8: 460b mov r3, r1 - 80039ea: 817b strh r3, [r7, #10] + 8003b50: b580 push {r7, lr} + 8003b52: b088 sub sp, #32 + 8003b54: af02 add r7, sp, #8 + 8003b56: 60f8 str r0, [r7, #12] + 8003b58: 607a str r2, [r7, #4] + 8003b5a: 603b str r3, [r7, #0] + 8003b5c: 460b mov r3, r1 + 8003b5e: 817b strh r3, [r7, #10] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; - 80039ec: 68fb ldr r3, [r7, #12] - 80039ee: 6adb ldr r3, [r3, #44] @ 0x2c - 80039f0: 617b str r3, [r7, #20] + 8003b60: 68fb ldr r3, [r7, #12] + 8003b62: 6adb ldr r3, [r3, #44] @ 0x2c + 8003b64: 617b str r3, [r7, #20] /* Generate Start condition if first transfer */ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) - 80039f2: 697b ldr r3, [r7, #20] - 80039f4: 2b08 cmp r3, #8 - 80039f6: d006 beq.n 8003a06 - 80039f8: 697b ldr r3, [r7, #20] - 80039fa: 2b01 cmp r3, #1 - 80039fc: d003 beq.n 8003a06 - 80039fe: 697b ldr r3, [r7, #20] - 8003a00: f513 3f80 cmn.w r3, #65536 @ 0x10000 - 8003a04: d108 bne.n 8003a18 + 8003b66: 697b ldr r3, [r7, #20] + 8003b68: 2b08 cmp r3, #8 + 8003b6a: d006 beq.n 8003b7a + 8003b6c: 697b ldr r3, [r7, #20] + 8003b6e: 2b01 cmp r3, #1 + 8003b70: d003 beq.n 8003b7a + 8003b72: 697b ldr r3, [r7, #20] + 8003b74: f513 3f80 cmn.w r3, #65536 @ 0x10000 + 8003b78: d108 bne.n 8003b8c { /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003a06: 68fb ldr r3, [r7, #12] - 8003a08: 681b ldr r3, [r3, #0] - 8003a0a: 681a ldr r2, [r3, #0] - 8003a0c: 68fb ldr r3, [r7, #12] - 8003a0e: 681b ldr r3, [r3, #0] - 8003a10: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003a14: 601a str r2, [r3, #0] - 8003a16: e00b b.n 8003a30 + 8003b7a: 68fb ldr r3, [r7, #12] + 8003b7c: 681b ldr r3, [r3, #0] + 8003b7e: 681a ldr r2, [r3, #0] + 8003b80: 68fb ldr r3, [r7, #12] + 8003b82: 681b ldr r3, [r3, #0] + 8003b84: f442 7280 orr.w r2, r2, #256 @ 0x100 + 8003b88: 601a str r2, [r3, #0] + 8003b8a: e00b b.n 8003ba4 } else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) - 8003a18: 68fb ldr r3, [r7, #12] - 8003a1a: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003a1c: 2b12 cmp r3, #18 - 8003a1e: d107 bne.n 8003a30 + 8003b8c: 68fb ldr r3, [r7, #12] + 8003b8e: 6b1b ldr r3, [r3, #48] @ 0x30 + 8003b90: 2b12 cmp r3, #18 + 8003b92: d107 bne.n 8003ba4 { /* Generate ReStart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003a20: 68fb ldr r3, [r7, #12] - 8003a22: 681b ldr r3, [r3, #0] - 8003a24: 681a ldr r2, [r3, #0] - 8003a26: 68fb ldr r3, [r7, #12] - 8003a28: 681b ldr r3, [r3, #0] - 8003a2a: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003a2e: 601a str r2, [r3, #0] + 8003b94: 68fb ldr r3, [r7, #12] + 8003b96: 681b ldr r3, [r3, #0] + 8003b98: 681a ldr r2, [r3, #0] + 8003b9a: 68fb ldr r3, [r7, #12] + 8003b9c: 681b ldr r3, [r3, #0] + 8003b9e: f442 7280 orr.w r2, r2, #256 @ 0x100 + 8003ba2: 601a str r2, [r3, #0] { /* Do nothing */ } /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8003a30: 683b ldr r3, [r7, #0] - 8003a32: 9300 str r3, [sp, #0] - 8003a34: 687b ldr r3, [r7, #4] - 8003a36: 2200 movs r2, #0 - 8003a38: f04f 1101 mov.w r1, #65537 @ 0x10001 - 8003a3c: 68f8 ldr r0, [r7, #12] - 8003a3e: f000 f91d bl 8003c7c - 8003a42: 4603 mov r3, r0 - 8003a44: 2b00 cmp r3, #0 - 8003a46: d00d beq.n 8003a64 + 8003ba4: 683b ldr r3, [r7, #0] + 8003ba6: 9300 str r3, [sp, #0] + 8003ba8: 687b ldr r3, [r7, #4] + 8003baa: 2200 movs r2, #0 + 8003bac: f04f 1101 mov.w r1, #65537 @ 0x10001 + 8003bb0: 68f8 ldr r0, [r7, #12] + 8003bb2: f000 f91d bl 8003df0 + 8003bb6: 4603 mov r3, r0 + 8003bb8: 2b00 cmp r3, #0 + 8003bba: d00d beq.n 8003bd8 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 8003a48: 68fb ldr r3, [r7, #12] - 8003a4a: 681b ldr r3, [r3, #0] - 8003a4c: 681b ldr r3, [r3, #0] - 8003a4e: f403 7380 and.w r3, r3, #256 @ 0x100 - 8003a52: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8003a56: d103 bne.n 8003a60 + 8003bbc: 68fb ldr r3, [r7, #12] + 8003bbe: 681b ldr r3, [r3, #0] + 8003bc0: 681b ldr r3, [r3, #0] + 8003bc2: f403 7380 and.w r3, r3, #256 @ 0x100 + 8003bc6: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8003bca: d103 bne.n 8003bd4 { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 8003a58: 68fb ldr r3, [r7, #12] - 8003a5a: f44f 7200 mov.w r2, #512 @ 0x200 - 8003a5e: 641a str r2, [r3, #64] @ 0x40 + 8003bcc: 68fb ldr r3, [r7, #12] + 8003bce: f44f 7200 mov.w r2, #512 @ 0x200 + 8003bd2: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 8003a60: 2303 movs r3, #3 - 8003a62: e035 b.n 8003ad0 + 8003bd4: 2303 movs r3, #3 + 8003bd6: e035 b.n 8003c44 } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 8003a64: 68fb ldr r3, [r7, #12] - 8003a66: 691b ldr r3, [r3, #16] - 8003a68: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 - 8003a6c: d108 bne.n 8003a80 + 8003bd8: 68fb ldr r3, [r7, #12] + 8003bda: 691b ldr r3, [r3, #16] + 8003bdc: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 + 8003be0: d108 bne.n 8003bf4 { /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); - 8003a6e: 897b ldrh r3, [r7, #10] - 8003a70: b2db uxtb r3, r3 - 8003a72: 461a mov r2, r3 - 8003a74: 68fb ldr r3, [r7, #12] - 8003a76: 681b ldr r3, [r3, #0] - 8003a78: f002 02fe and.w r2, r2, #254 @ 0xfe - 8003a7c: 611a str r2, [r3, #16] - 8003a7e: e01b b.n 8003ab8 + 8003be2: 897b ldrh r3, [r7, #10] + 8003be4: b2db uxtb r3, r3 + 8003be6: 461a mov r2, r3 + 8003be8: 68fb ldr r3, [r7, #12] + 8003bea: 681b ldr r3, [r3, #0] + 8003bec: f002 02fe and.w r2, r2, #254 @ 0xfe + 8003bf0: 611a str r2, [r3, #16] + 8003bf2: e01b b.n 8003c2c } else { /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); - 8003a80: 897b ldrh r3, [r7, #10] - 8003a82: 11db asrs r3, r3, #7 - 8003a84: b2db uxtb r3, r3 - 8003a86: f003 0306 and.w r3, r3, #6 - 8003a8a: b2db uxtb r3, r3 - 8003a8c: f063 030f orn r3, r3, #15 - 8003a90: b2da uxtb r2, r3 - 8003a92: 68fb ldr r3, [r7, #12] - 8003a94: 681b ldr r3, [r3, #0] - 8003a96: 611a str r2, [r3, #16] + 8003bf4: 897b ldrh r3, [r7, #10] + 8003bf6: 11db asrs r3, r3, #7 + 8003bf8: b2db uxtb r3, r3 + 8003bfa: f003 0306 and.w r3, r3, #6 + 8003bfe: b2db uxtb r3, r3 + 8003c00: f063 030f orn r3, r3, #15 + 8003c04: b2da uxtb r2, r3 + 8003c06: 68fb ldr r3, [r7, #12] + 8003c08: 681b ldr r3, [r3, #0] + 8003c0a: 611a str r2, [r3, #16] /* Wait until ADD10 flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) - 8003a98: 683b ldr r3, [r7, #0] - 8003a9a: 687a ldr r2, [r7, #4] - 8003a9c: 490e ldr r1, [pc, #56] @ (8003ad8 ) - 8003a9e: 68f8 ldr r0, [r7, #12] - 8003aa0: f000 f966 bl 8003d70 - 8003aa4: 4603 mov r3, r0 - 8003aa6: 2b00 cmp r3, #0 - 8003aa8: d001 beq.n 8003aae + 8003c0c: 683b ldr r3, [r7, #0] + 8003c0e: 687a ldr r2, [r7, #4] + 8003c10: 490e ldr r1, [pc, #56] @ (8003c4c ) + 8003c12: 68f8 ldr r0, [r7, #12] + 8003c14: f000 f966 bl 8003ee4 + 8003c18: 4603 mov r3, r0 + 8003c1a: 2b00 cmp r3, #0 + 8003c1c: d001 beq.n 8003c22 { return HAL_ERROR; - 8003aaa: 2301 movs r3, #1 - 8003aac: e010 b.n 8003ad0 + 8003c1e: 2301 movs r3, #1 + 8003c20: e010 b.n 8003c44 } /* Send slave address */ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); - 8003aae: 897b ldrh r3, [r7, #10] - 8003ab0: b2da uxtb r2, r3 - 8003ab2: 68fb ldr r3, [r7, #12] - 8003ab4: 681b ldr r3, [r3, #0] - 8003ab6: 611a str r2, [r3, #16] + 8003c22: 897b ldrh r3, [r7, #10] + 8003c24: b2da uxtb r2, r3 + 8003c26: 68fb ldr r3, [r7, #12] + 8003c28: 681b ldr r3, [r3, #0] + 8003c2a: 611a str r2, [r3, #16] } /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 8003ab8: 683b ldr r3, [r7, #0] - 8003aba: 687a ldr r2, [r7, #4] - 8003abc: 4907 ldr r1, [pc, #28] @ (8003adc ) - 8003abe: 68f8 ldr r0, [r7, #12] - 8003ac0: f000 f956 bl 8003d70 - 8003ac4: 4603 mov r3, r0 - 8003ac6: 2b00 cmp r3, #0 - 8003ac8: d001 beq.n 8003ace + 8003c2c: 683b ldr r3, [r7, #0] + 8003c2e: 687a ldr r2, [r7, #4] + 8003c30: 4907 ldr r1, [pc, #28] @ (8003c50 ) + 8003c32: 68f8 ldr r0, [r7, #12] + 8003c34: f000 f956 bl 8003ee4 + 8003c38: 4603 mov r3, r0 + 8003c3a: 2b00 cmp r3, #0 + 8003c3c: d001 beq.n 8003c42 { return HAL_ERROR; - 8003aca: 2301 movs r3, #1 - 8003acc: e000 b.n 8003ad0 + 8003c3e: 2301 movs r3, #1 + 8003c40: e000 b.n 8003c44 } return HAL_OK; - 8003ace: 2300 movs r3, #0 + 8003c42: 2300 movs r3, #0 } - 8003ad0: 4618 mov r0, r3 - 8003ad2: 3718 adds r7, #24 - 8003ad4: 46bd mov sp, r7 - 8003ad6: bd80 pop {r7, pc} - 8003ad8: 00010008 .word 0x00010008 - 8003adc: 00010002 .word 0x00010002 + 8003c44: 4618 mov r0, r3 + 8003c46: 3718 adds r7, #24 + 8003c48: 46bd mov sp, r7 + 8003c4a: bd80 pop {r7, pc} + 8003c4c: 00010008 .word 0x00010008 + 8003c50: 00010002 .word 0x00010002 -08003ae0 : +08003c54 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) { - 8003ae0: b580 push {r7, lr} - 8003ae2: b088 sub sp, #32 - 8003ae4: af02 add r7, sp, #8 - 8003ae6: 60f8 str r0, [r7, #12] - 8003ae8: 607a str r2, [r7, #4] - 8003aea: 603b str r3, [r7, #0] - 8003aec: 460b mov r3, r1 - 8003aee: 817b strh r3, [r7, #10] + 8003c54: b580 push {r7, lr} + 8003c56: b088 sub sp, #32 + 8003c58: af02 add r7, sp, #8 + 8003c5a: 60f8 str r0, [r7, #12] + 8003c5c: 607a str r2, [r7, #4] + 8003c5e: 603b str r3, [r7, #0] + 8003c60: 460b mov r3, r1 + 8003c62: 817b strh r3, [r7, #10] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; - 8003af0: 68fb ldr r3, [r7, #12] - 8003af2: 6adb ldr r3, [r3, #44] @ 0x2c - 8003af4: 617b str r3, [r7, #20] + 8003c64: 68fb ldr r3, [r7, #12] + 8003c66: 6adb ldr r3, [r3, #44] @ 0x2c + 8003c68: 617b str r3, [r7, #20] /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003af6: 68fb ldr r3, [r7, #12] - 8003af8: 681b ldr r3, [r3, #0] - 8003afa: 681a ldr r2, [r3, #0] - 8003afc: 68fb ldr r3, [r7, #12] - 8003afe: 681b ldr r3, [r3, #0] - 8003b00: f442 6280 orr.w r2, r2, #1024 @ 0x400 - 8003b04: 601a str r2, [r3, #0] + 8003c6a: 68fb ldr r3, [r7, #12] + 8003c6c: 681b ldr r3, [r3, #0] + 8003c6e: 681a ldr r2, [r3, #0] + 8003c70: 68fb ldr r3, [r7, #12] + 8003c72: 681b ldr r3, [r3, #0] + 8003c74: f442 6280 orr.w r2, r2, #1024 @ 0x400 + 8003c78: 601a str r2, [r3, #0] /* Generate Start condition if first transfer */ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) - 8003b06: 697b ldr r3, [r7, #20] - 8003b08: 2b08 cmp r3, #8 - 8003b0a: d006 beq.n 8003b1a - 8003b0c: 697b ldr r3, [r7, #20] - 8003b0e: 2b01 cmp r3, #1 - 8003b10: d003 beq.n 8003b1a - 8003b12: 697b ldr r3, [r7, #20] - 8003b14: f513 3f80 cmn.w r3, #65536 @ 0x10000 - 8003b18: d108 bne.n 8003b2c + 8003c7a: 697b ldr r3, [r7, #20] + 8003c7c: 2b08 cmp r3, #8 + 8003c7e: d006 beq.n 8003c8e + 8003c80: 697b ldr r3, [r7, #20] + 8003c82: 2b01 cmp r3, #1 + 8003c84: d003 beq.n 8003c8e + 8003c86: 697b ldr r3, [r7, #20] + 8003c88: f513 3f80 cmn.w r3, #65536 @ 0x10000 + 8003c8c: d108 bne.n 8003ca0 { /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003b1a: 68fb ldr r3, [r7, #12] - 8003b1c: 681b ldr r3, [r3, #0] - 8003b1e: 681a ldr r2, [r3, #0] - 8003b20: 68fb ldr r3, [r7, #12] - 8003b22: 681b ldr r3, [r3, #0] - 8003b24: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003b28: 601a str r2, [r3, #0] - 8003b2a: e00b b.n 8003b44 + 8003c8e: 68fb ldr r3, [r7, #12] + 8003c90: 681b ldr r3, [r3, #0] + 8003c92: 681a ldr r2, [r3, #0] + 8003c94: 68fb ldr r3, [r7, #12] + 8003c96: 681b ldr r3, [r3, #0] + 8003c98: f442 7280 orr.w r2, r2, #256 @ 0x100 + 8003c9c: 601a str r2, [r3, #0] + 8003c9e: e00b b.n 8003cb8 } else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) - 8003b2c: 68fb ldr r3, [r7, #12] - 8003b2e: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003b30: 2b11 cmp r3, #17 - 8003b32: d107 bne.n 8003b44 + 8003ca0: 68fb ldr r3, [r7, #12] + 8003ca2: 6b1b ldr r3, [r3, #48] @ 0x30 + 8003ca4: 2b11 cmp r3, #17 + 8003ca6: d107 bne.n 8003cb8 { /* Generate ReStart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003b34: 68fb ldr r3, [r7, #12] - 8003b36: 681b ldr r3, [r3, #0] - 8003b38: 681a ldr r2, [r3, #0] - 8003b3a: 68fb ldr r3, [r7, #12] - 8003b3c: 681b ldr r3, [r3, #0] - 8003b3e: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003b42: 601a str r2, [r3, #0] + 8003ca8: 68fb ldr r3, [r7, #12] + 8003caa: 681b ldr r3, [r3, #0] + 8003cac: 681a ldr r2, [r3, #0] + 8003cae: 68fb ldr r3, [r7, #12] + 8003cb0: 681b ldr r3, [r3, #0] + 8003cb2: f442 7280 orr.w r2, r2, #256 @ 0x100 + 8003cb6: 601a str r2, [r3, #0] { /* Do nothing */ } /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8003b44: 683b ldr r3, [r7, #0] - 8003b46: 9300 str r3, [sp, #0] - 8003b48: 687b ldr r3, [r7, #4] - 8003b4a: 2200 movs r2, #0 - 8003b4c: f04f 1101 mov.w r1, #65537 @ 0x10001 - 8003b50: 68f8 ldr r0, [r7, #12] - 8003b52: f000 f893 bl 8003c7c - 8003b56: 4603 mov r3, r0 - 8003b58: 2b00 cmp r3, #0 - 8003b5a: d00d beq.n 8003b78 + 8003cb8: 683b ldr r3, [r7, #0] + 8003cba: 9300 str r3, [sp, #0] + 8003cbc: 687b ldr r3, [r7, #4] + 8003cbe: 2200 movs r2, #0 + 8003cc0: f04f 1101 mov.w r1, #65537 @ 0x10001 + 8003cc4: 68f8 ldr r0, [r7, #12] + 8003cc6: f000 f893 bl 8003df0 + 8003cca: 4603 mov r3, r0 + 8003ccc: 2b00 cmp r3, #0 + 8003cce: d00d beq.n 8003cec { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 8003b5c: 68fb ldr r3, [r7, #12] - 8003b5e: 681b ldr r3, [r3, #0] - 8003b60: 681b ldr r3, [r3, #0] - 8003b62: f403 7380 and.w r3, r3, #256 @ 0x100 - 8003b66: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8003b6a: d103 bne.n 8003b74 + 8003cd0: 68fb ldr r3, [r7, #12] + 8003cd2: 681b ldr r3, [r3, #0] + 8003cd4: 681b ldr r3, [r3, #0] + 8003cd6: f403 7380 and.w r3, r3, #256 @ 0x100 + 8003cda: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8003cde: d103 bne.n 8003ce8 { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 8003b6c: 68fb ldr r3, [r7, #12] - 8003b6e: f44f 7200 mov.w r2, #512 @ 0x200 - 8003b72: 641a str r2, [r3, #64] @ 0x40 + 8003ce0: 68fb ldr r3, [r7, #12] + 8003ce2: f44f 7200 mov.w r2, #512 @ 0x200 + 8003ce6: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 8003b74: 2303 movs r3, #3 - 8003b76: e079 b.n 8003c6c + 8003ce8: 2303 movs r3, #3 + 8003cea: e079 b.n 8003de0 } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 8003b78: 68fb ldr r3, [r7, #12] - 8003b7a: 691b ldr r3, [r3, #16] - 8003b7c: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 - 8003b80: d108 bne.n 8003b94 + 8003cec: 68fb ldr r3, [r7, #12] + 8003cee: 691b ldr r3, [r3, #16] + 8003cf0: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 + 8003cf4: d108 bne.n 8003d08 { /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); - 8003b82: 897b ldrh r3, [r7, #10] - 8003b84: b2db uxtb r3, r3 - 8003b86: f043 0301 orr.w r3, r3, #1 - 8003b8a: b2da uxtb r2, r3 - 8003b8c: 68fb ldr r3, [r7, #12] - 8003b8e: 681b ldr r3, [r3, #0] - 8003b90: 611a str r2, [r3, #16] - 8003b92: e05f b.n 8003c54 + 8003cf6: 897b ldrh r3, [r7, #10] + 8003cf8: b2db uxtb r3, r3 + 8003cfa: f043 0301 orr.w r3, r3, #1 + 8003cfe: b2da uxtb r2, r3 + 8003d00: 68fb ldr r3, [r7, #12] + 8003d02: 681b ldr r3, [r3, #0] + 8003d04: 611a str r2, [r3, #16] + 8003d06: e05f b.n 8003dc8 } else { /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); - 8003b94: 897b ldrh r3, [r7, #10] - 8003b96: 11db asrs r3, r3, #7 - 8003b98: b2db uxtb r3, r3 - 8003b9a: f003 0306 and.w r3, r3, #6 - 8003b9e: b2db uxtb r3, r3 - 8003ba0: f063 030f orn r3, r3, #15 - 8003ba4: b2da uxtb r2, r3 - 8003ba6: 68fb ldr r3, [r7, #12] - 8003ba8: 681b ldr r3, [r3, #0] - 8003baa: 611a str r2, [r3, #16] + 8003d08: 897b ldrh r3, [r7, #10] + 8003d0a: 11db asrs r3, r3, #7 + 8003d0c: b2db uxtb r3, r3 + 8003d0e: f003 0306 and.w r3, r3, #6 + 8003d12: b2db uxtb r3, r3 + 8003d14: f063 030f orn r3, r3, #15 + 8003d18: b2da uxtb r2, r3 + 8003d1a: 68fb ldr r3, [r7, #12] + 8003d1c: 681b ldr r3, [r3, #0] + 8003d1e: 611a str r2, [r3, #16] /* Wait until ADD10 flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) - 8003bac: 683b ldr r3, [r7, #0] - 8003bae: 687a ldr r2, [r7, #4] - 8003bb0: 4930 ldr r1, [pc, #192] @ (8003c74 ) - 8003bb2: 68f8 ldr r0, [r7, #12] - 8003bb4: f000 f8dc bl 8003d70 - 8003bb8: 4603 mov r3, r0 - 8003bba: 2b00 cmp r3, #0 - 8003bbc: d001 beq.n 8003bc2 + 8003d20: 683b ldr r3, [r7, #0] + 8003d22: 687a ldr r2, [r7, #4] + 8003d24: 4930 ldr r1, [pc, #192] @ (8003de8 ) + 8003d26: 68f8 ldr r0, [r7, #12] + 8003d28: f000 f8dc bl 8003ee4 + 8003d2c: 4603 mov r3, r0 + 8003d2e: 2b00 cmp r3, #0 + 8003d30: d001 beq.n 8003d36 { return HAL_ERROR; - 8003bbe: 2301 movs r3, #1 - 8003bc0: e054 b.n 8003c6c + 8003d32: 2301 movs r3, #1 + 8003d34: e054 b.n 8003de0 } /* Send slave address */ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); - 8003bc2: 897b ldrh r3, [r7, #10] - 8003bc4: b2da uxtb r2, r3 - 8003bc6: 68fb ldr r3, [r7, #12] - 8003bc8: 681b ldr r3, [r3, #0] - 8003bca: 611a str r2, [r3, #16] + 8003d36: 897b ldrh r3, [r7, #10] + 8003d38: b2da uxtb r2, r3 + 8003d3a: 68fb ldr r3, [r7, #12] + 8003d3c: 681b ldr r3, [r3, #0] + 8003d3e: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 8003bcc: 683b ldr r3, [r7, #0] - 8003bce: 687a ldr r2, [r7, #4] - 8003bd0: 4929 ldr r1, [pc, #164] @ (8003c78 ) - 8003bd2: 68f8 ldr r0, [r7, #12] - 8003bd4: f000 f8cc bl 8003d70 - 8003bd8: 4603 mov r3, r0 - 8003bda: 2b00 cmp r3, #0 - 8003bdc: d001 beq.n 8003be2 + 8003d40: 683b ldr r3, [r7, #0] + 8003d42: 687a ldr r2, [r7, #4] + 8003d44: 4929 ldr r1, [pc, #164] @ (8003dec ) + 8003d46: 68f8 ldr r0, [r7, #12] + 8003d48: f000 f8cc bl 8003ee4 + 8003d4c: 4603 mov r3, r0 + 8003d4e: 2b00 cmp r3, #0 + 8003d50: d001 beq.n 8003d56 { return HAL_ERROR; - 8003bde: 2301 movs r3, #1 - 8003be0: e044 b.n 8003c6c + 8003d52: 2301 movs r3, #1 + 8003d54: e044 b.n 8003de0 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8003be2: 2300 movs r3, #0 - 8003be4: 613b str r3, [r7, #16] - 8003be6: 68fb ldr r3, [r7, #12] - 8003be8: 681b ldr r3, [r3, #0] - 8003bea: 695b ldr r3, [r3, #20] - 8003bec: 613b str r3, [r7, #16] - 8003bee: 68fb ldr r3, [r7, #12] - 8003bf0: 681b ldr r3, [r3, #0] - 8003bf2: 699b ldr r3, [r3, #24] - 8003bf4: 613b str r3, [r7, #16] - 8003bf6: 693b ldr r3, [r7, #16] + 8003d56: 2300 movs r3, #0 + 8003d58: 613b str r3, [r7, #16] + 8003d5a: 68fb ldr r3, [r7, #12] + 8003d5c: 681b ldr r3, [r3, #0] + 8003d5e: 695b ldr r3, [r3, #20] + 8003d60: 613b str r3, [r7, #16] + 8003d62: 68fb ldr r3, [r7, #12] + 8003d64: 681b ldr r3, [r3, #0] + 8003d66: 699b ldr r3, [r3, #24] + 8003d68: 613b str r3, [r7, #16] + 8003d6a: 693b ldr r3, [r7, #16] /* Generate Restart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003bf8: 68fb ldr r3, [r7, #12] - 8003bfa: 681b ldr r3, [r3, #0] - 8003bfc: 681a ldr r2, [r3, #0] - 8003bfe: 68fb ldr r3, [r7, #12] - 8003c00: 681b ldr r3, [r3, #0] - 8003c02: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003c06: 601a str r2, [r3, #0] + 8003d6c: 68fb ldr r3, [r7, #12] + 8003d6e: 681b ldr r3, [r3, #0] + 8003d70: 681a ldr r2, [r3, #0] + 8003d72: 68fb ldr r3, [r7, #12] + 8003d74: 681b ldr r3, [r3, #0] + 8003d76: f442 7280 orr.w r2, r2, #256 @ 0x100 + 8003d7a: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8003c08: 683b ldr r3, [r7, #0] - 8003c0a: 9300 str r3, [sp, #0] - 8003c0c: 687b ldr r3, [r7, #4] - 8003c0e: 2200 movs r2, #0 - 8003c10: f04f 1101 mov.w r1, #65537 @ 0x10001 - 8003c14: 68f8 ldr r0, [r7, #12] - 8003c16: f000 f831 bl 8003c7c - 8003c1a: 4603 mov r3, r0 - 8003c1c: 2b00 cmp r3, #0 - 8003c1e: d00d beq.n 8003c3c + 8003d7c: 683b ldr r3, [r7, #0] + 8003d7e: 9300 str r3, [sp, #0] + 8003d80: 687b ldr r3, [r7, #4] + 8003d82: 2200 movs r2, #0 + 8003d84: f04f 1101 mov.w r1, #65537 @ 0x10001 + 8003d88: 68f8 ldr r0, [r7, #12] + 8003d8a: f000 f831 bl 8003df0 + 8003d8e: 4603 mov r3, r0 + 8003d90: 2b00 cmp r3, #0 + 8003d92: d00d beq.n 8003db0 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 8003c20: 68fb ldr r3, [r7, #12] - 8003c22: 681b ldr r3, [r3, #0] - 8003c24: 681b ldr r3, [r3, #0] - 8003c26: f403 7380 and.w r3, r3, #256 @ 0x100 - 8003c2a: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8003c2e: d103 bne.n 8003c38 + 8003d94: 68fb ldr r3, [r7, #12] + 8003d96: 681b ldr r3, [r3, #0] + 8003d98: 681b ldr r3, [r3, #0] + 8003d9a: f403 7380 and.w r3, r3, #256 @ 0x100 + 8003d9e: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8003da2: d103 bne.n 8003dac { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 8003c30: 68fb ldr r3, [r7, #12] - 8003c32: f44f 7200 mov.w r2, #512 @ 0x200 - 8003c36: 641a str r2, [r3, #64] @ 0x40 + 8003da4: 68fb ldr r3, [r7, #12] + 8003da6: f44f 7200 mov.w r2, #512 @ 0x200 + 8003daa: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 8003c38: 2303 movs r3, #3 - 8003c3a: e017 b.n 8003c6c + 8003dac: 2303 movs r3, #3 + 8003dae: e017 b.n 8003de0 } /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress); - 8003c3c: 897b ldrh r3, [r7, #10] - 8003c3e: 11db asrs r3, r3, #7 - 8003c40: b2db uxtb r3, r3 - 8003c42: f003 0306 and.w r3, r3, #6 - 8003c46: b2db uxtb r3, r3 - 8003c48: f063 030e orn r3, r3, #14 - 8003c4c: b2da uxtb r2, r3 - 8003c4e: 68fb ldr r3, [r7, #12] - 8003c50: 681b ldr r3, [r3, #0] - 8003c52: 611a str r2, [r3, #16] + 8003db0: 897b ldrh r3, [r7, #10] + 8003db2: 11db asrs r3, r3, #7 + 8003db4: b2db uxtb r3, r3 + 8003db6: f003 0306 and.w r3, r3, #6 + 8003dba: b2db uxtb r3, r3 + 8003dbc: f063 030e orn r3, r3, #14 + 8003dc0: b2da uxtb r2, r3 + 8003dc2: 68fb ldr r3, [r7, #12] + 8003dc4: 681b ldr r3, [r3, #0] + 8003dc6: 611a str r2, [r3, #16] } /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 8003c54: 683b ldr r3, [r7, #0] - 8003c56: 687a ldr r2, [r7, #4] - 8003c58: 4907 ldr r1, [pc, #28] @ (8003c78 ) - 8003c5a: 68f8 ldr r0, [r7, #12] - 8003c5c: f000 f888 bl 8003d70 - 8003c60: 4603 mov r3, r0 - 8003c62: 2b00 cmp r3, #0 - 8003c64: d001 beq.n 8003c6a + 8003dc8: 683b ldr r3, [r7, #0] + 8003dca: 687a ldr r2, [r7, #4] + 8003dcc: 4907 ldr r1, [pc, #28] @ (8003dec ) + 8003dce: 68f8 ldr r0, [r7, #12] + 8003dd0: f000 f888 bl 8003ee4 + 8003dd4: 4603 mov r3, r0 + 8003dd6: 2b00 cmp r3, #0 + 8003dd8: d001 beq.n 8003dde { return HAL_ERROR; - 8003c66: 2301 movs r3, #1 - 8003c68: e000 b.n 8003c6c + 8003dda: 2301 movs r3, #1 + 8003ddc: e000 b.n 8003de0 } return HAL_OK; - 8003c6a: 2300 movs r3, #0 + 8003dde: 2300 movs r3, #0 } - 8003c6c: 4618 mov r0, r3 - 8003c6e: 3718 adds r7, #24 - 8003c70: 46bd mov sp, r7 - 8003c72: bd80 pop {r7, pc} - 8003c74: 00010008 .word 0x00010008 - 8003c78: 00010002 .word 0x00010002 + 8003de0: 4618 mov r0, r3 + 8003de2: 3718 adds r7, #24 + 8003de4: 46bd mov sp, r7 + 8003de6: bd80 pop {r7, pc} + 8003de8: 00010008 .word 0x00010008 + 8003dec: 00010002 .word 0x00010002 -08003c7c : +08003df0 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { - 8003c7c: b580 push {r7, lr} - 8003c7e: b084 sub sp, #16 - 8003c80: af00 add r7, sp, #0 - 8003c82: 60f8 str r0, [r7, #12] - 8003c84: 60b9 str r1, [r7, #8] - 8003c86: 603b str r3, [r7, #0] - 8003c88: 4613 mov r3, r2 - 8003c8a: 71fb strb r3, [r7, #7] + 8003df0: b580 push {r7, lr} + 8003df2: b084 sub sp, #16 + 8003df4: af00 add r7, sp, #0 + 8003df6: 60f8 str r0, [r7, #12] + 8003df8: 60b9 str r1, [r7, #8] + 8003dfa: 603b str r3, [r7, #0] + 8003dfc: 4613 mov r3, r2 + 8003dfe: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - 8003c8c: e048 b.n 8003d20 + 8003e00: e048 b.n 8003e94 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8003c8e: 683b ldr r3, [r7, #0] - 8003c90: f1b3 3fff cmp.w r3, #4294967295 - 8003c94: d044 beq.n 8003d20 + 8003e02: 683b ldr r3, [r7, #0] + 8003e04: f1b3 3fff cmp.w r3, #4294967295 + 8003e08: d044 beq.n 8003e94 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8003c96: f7fe fc4b bl 8002530 - 8003c9a: 4602 mov r2, r0 - 8003c9c: 69bb ldr r3, [r7, #24] - 8003c9e: 1ad3 subs r3, r2, r3 - 8003ca0: 683a ldr r2, [r7, #0] - 8003ca2: 429a cmp r2, r3 - 8003ca4: d302 bcc.n 8003cac - 8003ca6: 683b ldr r3, [r7, #0] - 8003ca8: 2b00 cmp r3, #0 - 8003caa: d139 bne.n 8003d20 + 8003e0a: f7fe fc4b bl 80026a4 + 8003e0e: 4602 mov r2, r0 + 8003e10: 69bb ldr r3, [r7, #24] + 8003e12: 1ad3 subs r3, r2, r3 + 8003e14: 683a ldr r2, [r7, #0] + 8003e16: 429a cmp r2, r3 + 8003e18: d302 bcc.n 8003e20 + 8003e1a: 683b ldr r3, [r7, #0] + 8003e1c: 2b00 cmp r3, #0 + 8003e1e: d139 bne.n 8003e94 { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) - 8003cac: 68bb ldr r3, [r7, #8] - 8003cae: 0c1b lsrs r3, r3, #16 - 8003cb0: b2db uxtb r3, r3 - 8003cb2: 2b01 cmp r3, #1 - 8003cb4: d10d bne.n 8003cd2 - 8003cb6: 68fb ldr r3, [r7, #12] - 8003cb8: 681b ldr r3, [r3, #0] - 8003cba: 695b ldr r3, [r3, #20] - 8003cbc: 43da mvns r2, r3 - 8003cbe: 68bb ldr r3, [r7, #8] - 8003cc0: 4013 ands r3, r2 - 8003cc2: b29b uxth r3, r3 - 8003cc4: 2b00 cmp r3, #0 - 8003cc6: bf0c ite eq - 8003cc8: 2301 moveq r3, #1 - 8003cca: 2300 movne r3, #0 - 8003ccc: b2db uxtb r3, r3 - 8003cce: 461a mov r2, r3 - 8003cd0: e00c b.n 8003cec - 8003cd2: 68fb ldr r3, [r7, #12] - 8003cd4: 681b ldr r3, [r3, #0] - 8003cd6: 699b ldr r3, [r3, #24] - 8003cd8: 43da mvns r2, r3 - 8003cda: 68bb ldr r3, [r7, #8] - 8003cdc: 4013 ands r3, r2 - 8003cde: b29b uxth r3, r3 - 8003ce0: 2b00 cmp r3, #0 - 8003ce2: bf0c ite eq - 8003ce4: 2301 moveq r3, #1 - 8003ce6: 2300 movne r3, #0 - 8003ce8: b2db uxtb r3, r3 - 8003cea: 461a mov r2, r3 - 8003cec: 79fb ldrb r3, [r7, #7] - 8003cee: 429a cmp r2, r3 - 8003cf0: d116 bne.n 8003d20 + 8003e20: 68bb ldr r3, [r7, #8] + 8003e22: 0c1b lsrs r3, r3, #16 + 8003e24: b2db uxtb r3, r3 + 8003e26: 2b01 cmp r3, #1 + 8003e28: d10d bne.n 8003e46 + 8003e2a: 68fb ldr r3, [r7, #12] + 8003e2c: 681b ldr r3, [r3, #0] + 8003e2e: 695b ldr r3, [r3, #20] + 8003e30: 43da mvns r2, r3 + 8003e32: 68bb ldr r3, [r7, #8] + 8003e34: 4013 ands r3, r2 + 8003e36: b29b uxth r3, r3 + 8003e38: 2b00 cmp r3, #0 + 8003e3a: bf0c ite eq + 8003e3c: 2301 moveq r3, #1 + 8003e3e: 2300 movne r3, #0 + 8003e40: b2db uxtb r3, r3 + 8003e42: 461a mov r2, r3 + 8003e44: e00c b.n 8003e60 + 8003e46: 68fb ldr r3, [r7, #12] + 8003e48: 681b ldr r3, [r3, #0] + 8003e4a: 699b ldr r3, [r3, #24] + 8003e4c: 43da mvns r2, r3 + 8003e4e: 68bb ldr r3, [r7, #8] + 8003e50: 4013 ands r3, r2 + 8003e52: b29b uxth r3, r3 + 8003e54: 2b00 cmp r3, #0 + 8003e56: bf0c ite eq + 8003e58: 2301 moveq r3, #1 + 8003e5a: 2300 movne r3, #0 + 8003e5c: b2db uxtb r3, r3 + 8003e5e: 461a mov r2, r3 + 8003e60: 79fb ldrb r3, [r7, #7] + 8003e62: 429a cmp r2, r3 + 8003e64: d116 bne.n 8003e94 { hi2c->PreviousState = I2C_STATE_NONE; - 8003cf2: 68fb ldr r3, [r7, #12] - 8003cf4: 2200 movs r2, #0 - 8003cf6: 631a str r2, [r3, #48] @ 0x30 + 8003e66: 68fb ldr r3, [r7, #12] + 8003e68: 2200 movs r2, #0 + 8003e6a: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8003cf8: 68fb ldr r3, [r7, #12] - 8003cfa: 2220 movs r2, #32 - 8003cfc: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003e6c: 68fb ldr r3, [r7, #12] + 8003e6e: 2220 movs r2, #32 + 8003e70: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003d00: 68fb ldr r3, [r7, #12] - 8003d02: 2200 movs r2, #0 - 8003d04: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003e74: 68fb ldr r3, [r7, #12] + 8003e76: 2200 movs r2, #0 + 8003e78: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8003d08: 68fb ldr r3, [r7, #12] - 8003d0a: 6c1b ldr r3, [r3, #64] @ 0x40 - 8003d0c: f043 0220 orr.w r2, r3, #32 - 8003d10: 68fb ldr r3, [r7, #12] - 8003d12: 641a str r2, [r3, #64] @ 0x40 + 8003e7c: 68fb ldr r3, [r7, #12] + 8003e7e: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003e80: f043 0220 orr.w r2, r3, #32 + 8003e84: 68fb ldr r3, [r7, #12] + 8003e86: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003d14: 68fb ldr r3, [r7, #12] - 8003d16: 2200 movs r2, #0 - 8003d18: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003e88: 68fb ldr r3, [r7, #12] + 8003e8a: 2200 movs r2, #0 + 8003e8c: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8003d1c: 2301 movs r3, #1 - 8003d1e: e023 b.n 8003d68 + 8003e90: 2301 movs r3, #1 + 8003e92: e023 b.n 8003edc while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - 8003d20: 68bb ldr r3, [r7, #8] - 8003d22: 0c1b lsrs r3, r3, #16 - 8003d24: b2db uxtb r3, r3 - 8003d26: 2b01 cmp r3, #1 - 8003d28: d10d bne.n 8003d46 - 8003d2a: 68fb ldr r3, [r7, #12] - 8003d2c: 681b ldr r3, [r3, #0] - 8003d2e: 695b ldr r3, [r3, #20] - 8003d30: 43da mvns r2, r3 - 8003d32: 68bb ldr r3, [r7, #8] - 8003d34: 4013 ands r3, r2 - 8003d36: b29b uxth r3, r3 - 8003d38: 2b00 cmp r3, #0 - 8003d3a: bf0c ite eq - 8003d3c: 2301 moveq r3, #1 - 8003d3e: 2300 movne r3, #0 - 8003d40: b2db uxtb r3, r3 - 8003d42: 461a mov r2, r3 - 8003d44: e00c b.n 8003d60 - 8003d46: 68fb ldr r3, [r7, #12] - 8003d48: 681b ldr r3, [r3, #0] - 8003d4a: 699b ldr r3, [r3, #24] - 8003d4c: 43da mvns r2, r3 - 8003d4e: 68bb ldr r3, [r7, #8] - 8003d50: 4013 ands r3, r2 - 8003d52: b29b uxth r3, r3 - 8003d54: 2b00 cmp r3, #0 - 8003d56: bf0c ite eq - 8003d58: 2301 moveq r3, #1 - 8003d5a: 2300 movne r3, #0 - 8003d5c: b2db uxtb r3, r3 - 8003d5e: 461a mov r2, r3 - 8003d60: 79fb ldrb r3, [r7, #7] - 8003d62: 429a cmp r2, r3 - 8003d64: d093 beq.n 8003c8e + 8003e94: 68bb ldr r3, [r7, #8] + 8003e96: 0c1b lsrs r3, r3, #16 + 8003e98: b2db uxtb r3, r3 + 8003e9a: 2b01 cmp r3, #1 + 8003e9c: d10d bne.n 8003eba + 8003e9e: 68fb ldr r3, [r7, #12] + 8003ea0: 681b ldr r3, [r3, #0] + 8003ea2: 695b ldr r3, [r3, #20] + 8003ea4: 43da mvns r2, r3 + 8003ea6: 68bb ldr r3, [r7, #8] + 8003ea8: 4013 ands r3, r2 + 8003eaa: b29b uxth r3, r3 + 8003eac: 2b00 cmp r3, #0 + 8003eae: bf0c ite eq + 8003eb0: 2301 moveq r3, #1 + 8003eb2: 2300 movne r3, #0 + 8003eb4: b2db uxtb r3, r3 + 8003eb6: 461a mov r2, r3 + 8003eb8: e00c b.n 8003ed4 + 8003eba: 68fb ldr r3, [r7, #12] + 8003ebc: 681b ldr r3, [r3, #0] + 8003ebe: 699b ldr r3, [r3, #24] + 8003ec0: 43da mvns r2, r3 + 8003ec2: 68bb ldr r3, [r7, #8] + 8003ec4: 4013 ands r3, r2 + 8003ec6: b29b uxth r3, r3 + 8003ec8: 2b00 cmp r3, #0 + 8003eca: bf0c ite eq + 8003ecc: 2301 moveq r3, #1 + 8003ece: 2300 movne r3, #0 + 8003ed0: b2db uxtb r3, r3 + 8003ed2: 461a mov r2, r3 + 8003ed4: 79fb ldrb r3, [r7, #7] + 8003ed6: 429a cmp r2, r3 + 8003ed8: d093 beq.n 8003e02 } } } } return HAL_OK; - 8003d66: 2300 movs r3, #0 + 8003eda: 2300 movs r3, #0 } - 8003d68: 4618 mov r0, r3 - 8003d6a: 3710 adds r7, #16 - 8003d6c: 46bd mov sp, r7 - 8003d6e: bd80 pop {r7, pc} + 8003edc: 4618 mov r0, r3 + 8003ede: 3710 adds r7, #16 + 8003ee0: 46bd mov sp, r7 + 8003ee2: bd80 pop {r7, pc} -08003d70 : +08003ee4 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart) { - 8003d70: b580 push {r7, lr} - 8003d72: b084 sub sp, #16 - 8003d74: af00 add r7, sp, #0 - 8003d76: 60f8 str r0, [r7, #12] - 8003d78: 60b9 str r1, [r7, #8] - 8003d7a: 607a str r2, [r7, #4] - 8003d7c: 603b str r3, [r7, #0] + 8003ee4: b580 push {r7, lr} + 8003ee6: b084 sub sp, #16 + 8003ee8: af00 add r7, sp, #0 + 8003eea: 60f8 str r0, [r7, #12] + 8003eec: 60b9 str r1, [r7, #8] + 8003eee: 607a str r2, [r7, #4] + 8003ef0: 603b str r3, [r7, #0] while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) - 8003d7e: e071 b.n 8003e64 + 8003ef2: e071 b.n 8003fd8 { if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 8003d80: 68fb ldr r3, [r7, #12] - 8003d82: 681b ldr r3, [r3, #0] - 8003d84: 695b ldr r3, [r3, #20] - 8003d86: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8003d8a: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 8003d8e: d123 bne.n 8003dd8 + 8003ef4: 68fb ldr r3, [r7, #12] + 8003ef6: 681b ldr r3, [r3, #0] + 8003ef8: 695b ldr r3, [r3, #20] + 8003efa: f403 6380 and.w r3, r3, #1024 @ 0x400 + 8003efe: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 8003f02: d123 bne.n 8003f4c { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003d90: 68fb ldr r3, [r7, #12] - 8003d92: 681b ldr r3, [r3, #0] - 8003d94: 681a ldr r2, [r3, #0] - 8003d96: 68fb ldr r3, [r7, #12] - 8003d98: 681b ldr r3, [r3, #0] - 8003d9a: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8003d9e: 601a str r2, [r3, #0] + 8003f04: 68fb ldr r3, [r7, #12] + 8003f06: 681b ldr r3, [r3, #0] + 8003f08: 681a ldr r2, [r3, #0] + 8003f0a: 68fb ldr r3, [r7, #12] + 8003f0c: 681b ldr r3, [r3, #0] + 8003f0e: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8003f12: 601a str r2, [r3, #0] /* Clear AF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8003da0: 68fb ldr r3, [r7, #12] - 8003da2: 681b ldr r3, [r3, #0] - 8003da4: f46f 6280 mvn.w r2, #1024 @ 0x400 - 8003da8: 615a str r2, [r3, #20] + 8003f14: 68fb ldr r3, [r7, #12] + 8003f16: 681b ldr r3, [r3, #0] + 8003f18: f46f 6280 mvn.w r2, #1024 @ 0x400 + 8003f1c: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 8003daa: 68fb ldr r3, [r7, #12] - 8003dac: 2200 movs r2, #0 - 8003dae: 631a str r2, [r3, #48] @ 0x30 + 8003f1e: 68fb ldr r3, [r7, #12] + 8003f20: 2200 movs r2, #0 + 8003f22: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8003db0: 68fb ldr r3, [r7, #12] - 8003db2: 2220 movs r2, #32 - 8003db4: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003f24: 68fb ldr r3, [r7, #12] + 8003f26: 2220 movs r2, #32 + 8003f28: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003db8: 68fb ldr r3, [r7, #12] - 8003dba: 2200 movs r2, #0 - 8003dbc: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003f2c: 68fb ldr r3, [r7, #12] + 8003f2e: 2200 movs r2, #0 + 8003f30: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8003dc0: 68fb ldr r3, [r7, #12] - 8003dc2: 6c1b ldr r3, [r3, #64] @ 0x40 - 8003dc4: f043 0204 orr.w r2, r3, #4 - 8003dc8: 68fb ldr r3, [r7, #12] - 8003dca: 641a str r2, [r3, #64] @ 0x40 + 8003f34: 68fb ldr r3, [r7, #12] + 8003f36: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003f38: f043 0204 orr.w r2, r3, #4 + 8003f3c: 68fb ldr r3, [r7, #12] + 8003f3e: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003dcc: 68fb ldr r3, [r7, #12] - 8003dce: 2200 movs r2, #0 - 8003dd0: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003f40: 68fb ldr r3, [r7, #12] + 8003f42: 2200 movs r2, #0 + 8003f44: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8003dd4: 2301 movs r3, #1 - 8003dd6: e067 b.n 8003ea8 + 8003f48: 2301 movs r3, #1 + 8003f4a: e067 b.n 800401c } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8003dd8: 687b ldr r3, [r7, #4] - 8003dda: f1b3 3fff cmp.w r3, #4294967295 - 8003dde: d041 beq.n 8003e64 + 8003f4c: 687b ldr r3, [r7, #4] + 8003f4e: f1b3 3fff cmp.w r3, #4294967295 + 8003f52: d041 beq.n 8003fd8 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8003de0: f7fe fba6 bl 8002530 - 8003de4: 4602 mov r2, r0 - 8003de6: 683b ldr r3, [r7, #0] - 8003de8: 1ad3 subs r3, r2, r3 - 8003dea: 687a ldr r2, [r7, #4] - 8003dec: 429a cmp r2, r3 - 8003dee: d302 bcc.n 8003df6 - 8003df0: 687b ldr r3, [r7, #4] - 8003df2: 2b00 cmp r3, #0 - 8003df4: d136 bne.n 8003e64 + 8003f54: f7fe fba6 bl 80026a4 + 8003f58: 4602 mov r2, r0 + 8003f5a: 683b ldr r3, [r7, #0] + 8003f5c: 1ad3 subs r3, r2, r3 + 8003f5e: 687a ldr r2, [r7, #4] + 8003f60: 429a cmp r2, r3 + 8003f62: d302 bcc.n 8003f6a + 8003f64: 687b ldr r3, [r7, #4] + 8003f66: 2b00 cmp r3, #0 + 8003f68: d136 bne.n 8003fd8 { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)) - 8003df6: 68bb ldr r3, [r7, #8] - 8003df8: 0c1b lsrs r3, r3, #16 - 8003dfa: b2db uxtb r3, r3 - 8003dfc: 2b01 cmp r3, #1 - 8003dfe: d10c bne.n 8003e1a - 8003e00: 68fb ldr r3, [r7, #12] - 8003e02: 681b ldr r3, [r3, #0] - 8003e04: 695b ldr r3, [r3, #20] - 8003e06: 43da mvns r2, r3 - 8003e08: 68bb ldr r3, [r7, #8] - 8003e0a: 4013 ands r3, r2 - 8003e0c: b29b uxth r3, r3 - 8003e0e: 2b00 cmp r3, #0 - 8003e10: bf14 ite ne - 8003e12: 2301 movne r3, #1 - 8003e14: 2300 moveq r3, #0 - 8003e16: b2db uxtb r3, r3 - 8003e18: e00b b.n 8003e32 - 8003e1a: 68fb ldr r3, [r7, #12] - 8003e1c: 681b ldr r3, [r3, #0] - 8003e1e: 699b ldr r3, [r3, #24] - 8003e20: 43da mvns r2, r3 - 8003e22: 68bb ldr r3, [r7, #8] - 8003e24: 4013 ands r3, r2 - 8003e26: b29b uxth r3, r3 - 8003e28: 2b00 cmp r3, #0 - 8003e2a: bf14 ite ne - 8003e2c: 2301 movne r3, #1 - 8003e2e: 2300 moveq r3, #0 - 8003e30: b2db uxtb r3, r3 - 8003e32: 2b00 cmp r3, #0 - 8003e34: d016 beq.n 8003e64 + 8003f6a: 68bb ldr r3, [r7, #8] + 8003f6c: 0c1b lsrs r3, r3, #16 + 8003f6e: b2db uxtb r3, r3 + 8003f70: 2b01 cmp r3, #1 + 8003f72: d10c bne.n 8003f8e + 8003f74: 68fb ldr r3, [r7, #12] + 8003f76: 681b ldr r3, [r3, #0] + 8003f78: 695b ldr r3, [r3, #20] + 8003f7a: 43da mvns r2, r3 + 8003f7c: 68bb ldr r3, [r7, #8] + 8003f7e: 4013 ands r3, r2 + 8003f80: b29b uxth r3, r3 + 8003f82: 2b00 cmp r3, #0 + 8003f84: bf14 ite ne + 8003f86: 2301 movne r3, #1 + 8003f88: 2300 moveq r3, #0 + 8003f8a: b2db uxtb r3, r3 + 8003f8c: e00b b.n 8003fa6 + 8003f8e: 68fb ldr r3, [r7, #12] + 8003f90: 681b ldr r3, [r3, #0] + 8003f92: 699b ldr r3, [r3, #24] + 8003f94: 43da mvns r2, r3 + 8003f96: 68bb ldr r3, [r7, #8] + 8003f98: 4013 ands r3, r2 + 8003f9a: b29b uxth r3, r3 + 8003f9c: 2b00 cmp r3, #0 + 8003f9e: bf14 ite ne + 8003fa0: 2301 movne r3, #1 + 8003fa2: 2300 moveq r3, #0 + 8003fa4: b2db uxtb r3, r3 + 8003fa6: 2b00 cmp r3, #0 + 8003fa8: d016 beq.n 8003fd8 { hi2c->PreviousState = I2C_STATE_NONE; - 8003e36: 68fb ldr r3, [r7, #12] - 8003e38: 2200 movs r2, #0 - 8003e3a: 631a str r2, [r3, #48] @ 0x30 + 8003faa: 68fb ldr r3, [r7, #12] + 8003fac: 2200 movs r2, #0 + 8003fae: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8003e3c: 68fb ldr r3, [r7, #12] - 8003e3e: 2220 movs r2, #32 - 8003e40: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003fb0: 68fb ldr r3, [r7, #12] + 8003fb2: 2220 movs r2, #32 + 8003fb4: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003e44: 68fb ldr r3, [r7, #12] - 8003e46: 2200 movs r2, #0 - 8003e48: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8003fb8: 68fb ldr r3, [r7, #12] + 8003fba: 2200 movs r2, #0 + 8003fbc: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8003e4c: 68fb ldr r3, [r7, #12] - 8003e4e: 6c1b ldr r3, [r3, #64] @ 0x40 - 8003e50: f043 0220 orr.w r2, r3, #32 - 8003e54: 68fb ldr r3, [r7, #12] - 8003e56: 641a str r2, [r3, #64] @ 0x40 + 8003fc0: 68fb ldr r3, [r7, #12] + 8003fc2: 6c1b ldr r3, [r3, #64] @ 0x40 + 8003fc4: f043 0220 orr.w r2, r3, #32 + 8003fc8: 68fb ldr r3, [r7, #12] + 8003fca: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003e58: 68fb ldr r3, [r7, #12] - 8003e5a: 2200 movs r2, #0 - 8003e5c: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003fcc: 68fb ldr r3, [r7, #12] + 8003fce: 2200 movs r2, #0 + 8003fd0: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8003e60: 2301 movs r3, #1 - 8003e62: e021 b.n 8003ea8 + 8003fd4: 2301 movs r3, #1 + 8003fd6: e021 b.n 800401c while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) - 8003e64: 68bb ldr r3, [r7, #8] - 8003e66: 0c1b lsrs r3, r3, #16 - 8003e68: b2db uxtb r3, r3 - 8003e6a: 2b01 cmp r3, #1 - 8003e6c: d10c bne.n 8003e88 - 8003e6e: 68fb ldr r3, [r7, #12] - 8003e70: 681b ldr r3, [r3, #0] - 8003e72: 695b ldr r3, [r3, #20] - 8003e74: 43da mvns r2, r3 - 8003e76: 68bb ldr r3, [r7, #8] - 8003e78: 4013 ands r3, r2 - 8003e7a: b29b uxth r3, r3 - 8003e7c: 2b00 cmp r3, #0 - 8003e7e: bf14 ite ne - 8003e80: 2301 movne r3, #1 - 8003e82: 2300 moveq r3, #0 - 8003e84: b2db uxtb r3, r3 - 8003e86: e00b b.n 8003ea0 - 8003e88: 68fb ldr r3, [r7, #12] - 8003e8a: 681b ldr r3, [r3, #0] - 8003e8c: 699b ldr r3, [r3, #24] - 8003e8e: 43da mvns r2, r3 - 8003e90: 68bb ldr r3, [r7, #8] - 8003e92: 4013 ands r3, r2 - 8003e94: b29b uxth r3, r3 - 8003e96: 2b00 cmp r3, #0 - 8003e98: bf14 ite ne - 8003e9a: 2301 movne r3, #1 - 8003e9c: 2300 moveq r3, #0 - 8003e9e: b2db uxtb r3, r3 - 8003ea0: 2b00 cmp r3, #0 - 8003ea2: f47f af6d bne.w 8003d80 + 8003fd8: 68bb ldr r3, [r7, #8] + 8003fda: 0c1b lsrs r3, r3, #16 + 8003fdc: b2db uxtb r3, r3 + 8003fde: 2b01 cmp r3, #1 + 8003fe0: d10c bne.n 8003ffc + 8003fe2: 68fb ldr r3, [r7, #12] + 8003fe4: 681b ldr r3, [r3, #0] + 8003fe6: 695b ldr r3, [r3, #20] + 8003fe8: 43da mvns r2, r3 + 8003fea: 68bb ldr r3, [r7, #8] + 8003fec: 4013 ands r3, r2 + 8003fee: b29b uxth r3, r3 + 8003ff0: 2b00 cmp r3, #0 + 8003ff2: bf14 ite ne + 8003ff4: 2301 movne r3, #1 + 8003ff6: 2300 moveq r3, #0 + 8003ff8: b2db uxtb r3, r3 + 8003ffa: e00b b.n 8004014 + 8003ffc: 68fb ldr r3, [r7, #12] + 8003ffe: 681b ldr r3, [r3, #0] + 8004000: 699b ldr r3, [r3, #24] + 8004002: 43da mvns r2, r3 + 8004004: 68bb ldr r3, [r7, #8] + 8004006: 4013 ands r3, r2 + 8004008: b29b uxth r3, r3 + 800400a: 2b00 cmp r3, #0 + 800400c: bf14 ite ne + 800400e: 2301 movne r3, #1 + 8004010: 2300 moveq r3, #0 + 8004012: b2db uxtb r3, r3 + 8004014: 2b00 cmp r3, #0 + 8004016: f47f af6d bne.w 8003ef4 } } } } return HAL_OK; - 8003ea6: 2300 movs r3, #0 + 800401a: 2300 movs r3, #0 } - 8003ea8: 4618 mov r0, r3 - 8003eaa: 3710 adds r7, #16 - 8003eac: 46bd mov sp, r7 - 8003eae: bd80 pop {r7, pc} + 800401c: 4618 mov r0, r3 + 800401e: 3710 adds r7, #16 + 8004020: 46bd mov sp, r7 + 8004022: bd80 pop {r7, pc} -08003eb0 : +08004024 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 8003eb0: b580 push {r7, lr} - 8003eb2: b084 sub sp, #16 - 8003eb4: af00 add r7, sp, #0 - 8003eb6: 60f8 str r0, [r7, #12] - 8003eb8: 60b9 str r1, [r7, #8] - 8003eba: 607a str r2, [r7, #4] + 8004024: b580 push {r7, lr} + 8004026: b084 sub sp, #16 + 8004028: af00 add r7, sp, #0 + 800402a: 60f8 str r0, [r7, #12] + 800402c: 60b9 str r1, [r7, #8] + 800402e: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 8003ebc: e034 b.n 8003f28 + 8004030: e034 b.n 800409c { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) - 8003ebe: 68f8 ldr r0, [r7, #12] - 8003ec0: f000 f8e3 bl 800408a - 8003ec4: 4603 mov r3, r0 - 8003ec6: 2b00 cmp r3, #0 - 8003ec8: d001 beq.n 8003ece + 8004032: 68f8 ldr r0, [r7, #12] + 8004034: f000 f8e3 bl 80041fe + 8004038: 4603 mov r3, r0 + 800403a: 2b00 cmp r3, #0 + 800403c: d001 beq.n 8004042 { return HAL_ERROR; - 8003eca: 2301 movs r3, #1 - 8003ecc: e034 b.n 8003f38 + 800403e: 2301 movs r3, #1 + 8004040: e034 b.n 80040ac } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8003ece: 68bb ldr r3, [r7, #8] - 8003ed0: f1b3 3fff cmp.w r3, #4294967295 - 8003ed4: d028 beq.n 8003f28 + 8004042: 68bb ldr r3, [r7, #8] + 8004044: f1b3 3fff cmp.w r3, #4294967295 + 8004048: d028 beq.n 800409c { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8003ed6: f7fe fb2b bl 8002530 - 8003eda: 4602 mov r2, r0 - 8003edc: 687b ldr r3, [r7, #4] - 8003ede: 1ad3 subs r3, r2, r3 - 8003ee0: 68ba ldr r2, [r7, #8] - 8003ee2: 429a cmp r2, r3 - 8003ee4: d302 bcc.n 8003eec - 8003ee6: 68bb ldr r3, [r7, #8] - 8003ee8: 2b00 cmp r3, #0 - 8003eea: d11d bne.n 8003f28 + 800404a: f7fe fb2b bl 80026a4 + 800404e: 4602 mov r2, r0 + 8004050: 687b ldr r3, [r7, #4] + 8004052: 1ad3 subs r3, r2, r3 + 8004054: 68ba ldr r2, [r7, #8] + 8004056: 429a cmp r2, r3 + 8004058: d302 bcc.n 8004060 + 800405a: 68bb ldr r3, [r7, #8] + 800405c: 2b00 cmp r3, #0 + 800405e: d11d bne.n 800409c { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)) - 8003eec: 68fb ldr r3, [r7, #12] - 8003eee: 681b ldr r3, [r3, #0] - 8003ef0: 695b ldr r3, [r3, #20] - 8003ef2: f003 0380 and.w r3, r3, #128 @ 0x80 - 8003ef6: 2b80 cmp r3, #128 @ 0x80 - 8003ef8: d016 beq.n 8003f28 + 8004060: 68fb ldr r3, [r7, #12] + 8004062: 681b ldr r3, [r3, #0] + 8004064: 695b ldr r3, [r3, #20] + 8004066: f003 0380 and.w r3, r3, #128 @ 0x80 + 800406a: 2b80 cmp r3, #128 @ 0x80 + 800406c: d016 beq.n 800409c { hi2c->PreviousState = I2C_STATE_NONE; - 8003efa: 68fb ldr r3, [r7, #12] - 8003efc: 2200 movs r2, #0 - 8003efe: 631a str r2, [r3, #48] @ 0x30 + 800406e: 68fb ldr r3, [r7, #12] + 8004070: 2200 movs r2, #0 + 8004072: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8003f00: 68fb ldr r3, [r7, #12] - 8003f02: 2220 movs r2, #32 - 8003f04: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004074: 68fb ldr r3, [r7, #12] + 8004076: 2220 movs r2, #32 + 8004078: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003f08: 68fb ldr r3, [r7, #12] - 8003f0a: 2200 movs r2, #0 - 8003f0c: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800407c: 68fb ldr r3, [r7, #12] + 800407e: 2200 movs r2, #0 + 8004080: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8003f10: 68fb ldr r3, [r7, #12] - 8003f12: 6c1b ldr r3, [r3, #64] @ 0x40 - 8003f14: f043 0220 orr.w r2, r3, #32 - 8003f18: 68fb ldr r3, [r7, #12] - 8003f1a: 641a str r2, [r3, #64] @ 0x40 + 8004084: 68fb ldr r3, [r7, #12] + 8004086: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004088: f043 0220 orr.w r2, r3, #32 + 800408c: 68fb ldr r3, [r7, #12] + 800408e: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003f1c: 68fb ldr r3, [r7, #12] - 8003f1e: 2200 movs r2, #0 - 8003f20: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004090: 68fb ldr r3, [r7, #12] + 8004092: 2200 movs r2, #0 + 8004094: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8003f24: 2301 movs r3, #1 - 8003f26: e007 b.n 8003f38 + 8004098: 2301 movs r3, #1 + 800409a: e007 b.n 80040ac while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 8003f28: 68fb ldr r3, [r7, #12] - 8003f2a: 681b ldr r3, [r3, #0] - 8003f2c: 695b ldr r3, [r3, #20] - 8003f2e: f003 0380 and.w r3, r3, #128 @ 0x80 - 8003f32: 2b80 cmp r3, #128 @ 0x80 - 8003f34: d1c3 bne.n 8003ebe + 800409c: 68fb ldr r3, [r7, #12] + 800409e: 681b ldr r3, [r3, #0] + 80040a0: 695b ldr r3, [r3, #20] + 80040a2: f003 0380 and.w r3, r3, #128 @ 0x80 + 80040a6: 2b80 cmp r3, #128 @ 0x80 + 80040a8: d1c3 bne.n 8004032 } } } } return HAL_OK; - 8003f36: 2300 movs r3, #0 + 80040aa: 2300 movs r3, #0 } - 8003f38: 4618 mov r0, r3 - 8003f3a: 3710 adds r7, #16 - 8003f3c: 46bd mov sp, r7 - 8003f3e: bd80 pop {r7, pc} + 80040ac: 4618 mov r0, r3 + 80040ae: 3710 adds r7, #16 + 80040b0: 46bd mov sp, r7 + 80040b2: bd80 pop {r7, pc} -08003f40 : +080040b4 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 8003f40: b580 push {r7, lr} - 8003f42: b084 sub sp, #16 - 8003f44: af00 add r7, sp, #0 - 8003f46: 60f8 str r0, [r7, #12] - 8003f48: 60b9 str r1, [r7, #8] - 8003f4a: 607a str r2, [r7, #4] + 80040b4: b580 push {r7, lr} + 80040b6: b084 sub sp, #16 + 80040b8: af00 add r7, sp, #0 + 80040ba: 60f8 str r0, [r7, #12] + 80040bc: 60b9 str r1, [r7, #8] + 80040be: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) - 8003f4c: e034 b.n 8003fb8 + 80040c0: e034 b.n 800412c { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) - 8003f4e: 68f8 ldr r0, [r7, #12] - 8003f50: f000 f89b bl 800408a - 8003f54: 4603 mov r3, r0 - 8003f56: 2b00 cmp r3, #0 - 8003f58: d001 beq.n 8003f5e + 80040c2: 68f8 ldr r0, [r7, #12] + 80040c4: f000 f89b bl 80041fe + 80040c8: 4603 mov r3, r0 + 80040ca: 2b00 cmp r3, #0 + 80040cc: d001 beq.n 80040d2 { return HAL_ERROR; - 8003f5a: 2301 movs r3, #1 - 8003f5c: e034 b.n 8003fc8 + 80040ce: 2301 movs r3, #1 + 80040d0: e034 b.n 800413c } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8003f5e: 68bb ldr r3, [r7, #8] - 8003f60: f1b3 3fff cmp.w r3, #4294967295 - 8003f64: d028 beq.n 8003fb8 + 80040d2: 68bb ldr r3, [r7, #8] + 80040d4: f1b3 3fff cmp.w r3, #4294967295 + 80040d8: d028 beq.n 800412c { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8003f66: f7fe fae3 bl 8002530 - 8003f6a: 4602 mov r2, r0 - 8003f6c: 687b ldr r3, [r7, #4] - 8003f6e: 1ad3 subs r3, r2, r3 - 8003f70: 68ba ldr r2, [r7, #8] - 8003f72: 429a cmp r2, r3 - 8003f74: d302 bcc.n 8003f7c - 8003f76: 68bb ldr r3, [r7, #8] - 8003f78: 2b00 cmp r3, #0 - 8003f7a: d11d bne.n 8003fb8 + 80040da: f7fe fae3 bl 80026a4 + 80040de: 4602 mov r2, r0 + 80040e0: 687b ldr r3, [r7, #4] + 80040e2: 1ad3 subs r3, r2, r3 + 80040e4: 68ba ldr r2, [r7, #8] + 80040e6: 429a cmp r2, r3 + 80040e8: d302 bcc.n 80040f0 + 80040ea: 68bb ldr r3, [r7, #8] + 80040ec: 2b00 cmp r3, #0 + 80040ee: d11d bne.n 800412c { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)) - 8003f7c: 68fb ldr r3, [r7, #12] - 8003f7e: 681b ldr r3, [r3, #0] - 8003f80: 695b ldr r3, [r3, #20] - 8003f82: f003 0304 and.w r3, r3, #4 - 8003f86: 2b04 cmp r3, #4 - 8003f88: d016 beq.n 8003fb8 + 80040f0: 68fb ldr r3, [r7, #12] + 80040f2: 681b ldr r3, [r3, #0] + 80040f4: 695b ldr r3, [r3, #20] + 80040f6: f003 0304 and.w r3, r3, #4 + 80040fa: 2b04 cmp r3, #4 + 80040fc: d016 beq.n 800412c { hi2c->PreviousState = I2C_STATE_NONE; - 8003f8a: 68fb ldr r3, [r7, #12] - 8003f8c: 2200 movs r2, #0 - 8003f8e: 631a str r2, [r3, #48] @ 0x30 + 80040fe: 68fb ldr r3, [r7, #12] + 8004100: 2200 movs r2, #0 + 8004102: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8003f90: 68fb ldr r3, [r7, #12] - 8003f92: 2220 movs r2, #32 - 8003f94: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004104: 68fb ldr r3, [r7, #12] + 8004106: 2220 movs r2, #32 + 8004108: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003f98: 68fb ldr r3, [r7, #12] - 8003f9a: 2200 movs r2, #0 - 8003f9c: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800410c: 68fb ldr r3, [r7, #12] + 800410e: 2200 movs r2, #0 + 8004110: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8003fa0: 68fb ldr r3, [r7, #12] - 8003fa2: 6c1b ldr r3, [r3, #64] @ 0x40 - 8003fa4: f043 0220 orr.w r2, r3, #32 - 8003fa8: 68fb ldr r3, [r7, #12] - 8003faa: 641a str r2, [r3, #64] @ 0x40 + 8004114: 68fb ldr r3, [r7, #12] + 8004116: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004118: f043 0220 orr.w r2, r3, #32 + 800411c: 68fb ldr r3, [r7, #12] + 800411e: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003fac: 68fb ldr r3, [r7, #12] - 8003fae: 2200 movs r2, #0 - 8003fb0: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004120: 68fb ldr r3, [r7, #12] + 8004122: 2200 movs r2, #0 + 8004124: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8003fb4: 2301 movs r3, #1 - 8003fb6: e007 b.n 8003fc8 + 8004128: 2301 movs r3, #1 + 800412a: e007 b.n 800413c while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) - 8003fb8: 68fb ldr r3, [r7, #12] - 8003fba: 681b ldr r3, [r3, #0] - 8003fbc: 695b ldr r3, [r3, #20] - 8003fbe: f003 0304 and.w r3, r3, #4 - 8003fc2: 2b04 cmp r3, #4 - 8003fc4: d1c3 bne.n 8003f4e + 800412c: 68fb ldr r3, [r7, #12] + 800412e: 681b ldr r3, [r3, #0] + 8004130: 695b ldr r3, [r3, #20] + 8004132: f003 0304 and.w r3, r3, #4 + 8004136: 2b04 cmp r3, #4 + 8004138: d1c3 bne.n 80040c2 } } } } return HAL_OK; - 8003fc6: 2300 movs r3, #0 + 800413a: 2300 movs r3, #0 } - 8003fc8: 4618 mov r0, r3 - 8003fca: 3710 adds r7, #16 - 8003fcc: 46bd mov sp, r7 - 8003fce: bd80 pop {r7, pc} + 800413c: 4618 mov r0, r3 + 800413e: 3710 adds r7, #16 + 8004140: 46bd mov sp, r7 + 8004142: bd80 pop {r7, pc} -08003fd0 : +08004144 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 8003fd0: b580 push {r7, lr} - 8003fd2: b084 sub sp, #16 - 8003fd4: af00 add r7, sp, #0 - 8003fd6: 60f8 str r0, [r7, #12] - 8003fd8: 60b9 str r1, [r7, #8] - 8003fda: 607a str r2, [r7, #4] + 8004144: b580 push {r7, lr} + 8004146: b084 sub sp, #16 + 8004148: af00 add r7, sp, #0 + 800414a: 60f8 str r0, [r7, #12] + 800414c: 60b9 str r1, [r7, #8] + 800414e: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - 8003fdc: e049 b.n 8004072 + 8004150: e049 b.n 80041e6 { /* Check if a STOPF is detected */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) - 8003fde: 68fb ldr r3, [r7, #12] - 8003fe0: 681b ldr r3, [r3, #0] - 8003fe2: 695b ldr r3, [r3, #20] - 8003fe4: f003 0310 and.w r3, r3, #16 - 8003fe8: 2b10 cmp r3, #16 - 8003fea: d119 bne.n 8004020 + 8004152: 68fb ldr r3, [r7, #12] + 8004154: 681b ldr r3, [r3, #0] + 8004156: 695b ldr r3, [r3, #20] + 8004158: f003 0310 and.w r3, r3, #16 + 800415c: 2b10 cmp r3, #16 + 800415e: d119 bne.n 8004194 { /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 8003fec: 68fb ldr r3, [r7, #12] - 8003fee: 681b ldr r3, [r3, #0] - 8003ff0: f06f 0210 mvn.w r2, #16 - 8003ff4: 615a str r2, [r3, #20] + 8004160: 68fb ldr r3, [r7, #12] + 8004162: 681b ldr r3, [r3, #0] + 8004164: f06f 0210 mvn.w r2, #16 + 8004168: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 8003ff6: 68fb ldr r3, [r7, #12] - 8003ff8: 2200 movs r2, #0 - 8003ffa: 631a str r2, [r3, #48] @ 0x30 + 800416a: 68fb ldr r3, [r7, #12] + 800416c: 2200 movs r2, #0 + 800416e: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8003ffc: 68fb ldr r3, [r7, #12] - 8003ffe: 2220 movs r2, #32 - 8004000: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004170: 68fb ldr r3, [r7, #12] + 8004172: 2220 movs r2, #32 + 8004174: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004004: 68fb ldr r3, [r7, #12] - 8004006: 2200 movs r2, #0 - 8004008: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004178: 68fb ldr r3, [r7, #12] + 800417a: 2200 movs r2, #0 + 800417c: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_NONE; - 800400c: 68fb ldr r3, [r7, #12] - 800400e: 6c1a ldr r2, [r3, #64] @ 0x40 - 8004010: 68fb ldr r3, [r7, #12] - 8004012: 641a str r2, [r3, #64] @ 0x40 + 8004180: 68fb ldr r3, [r7, #12] + 8004182: 6c1a ldr r2, [r3, #64] @ 0x40 + 8004184: 68fb ldr r3, [r7, #12] + 8004186: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004014: 68fb ldr r3, [r7, #12] - 8004016: 2200 movs r2, #0 - 8004018: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004188: 68fb ldr r3, [r7, #12] + 800418a: 2200 movs r2, #0 + 800418c: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 800401c: 2301 movs r3, #1 - 800401e: e030 b.n 8004082 + 8004190: 2301 movs r3, #1 + 8004192: e030 b.n 80041f6 } /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8004020: f7fe fa86 bl 8002530 - 8004024: 4602 mov r2, r0 - 8004026: 687b ldr r3, [r7, #4] - 8004028: 1ad3 subs r3, r2, r3 - 800402a: 68ba ldr r2, [r7, #8] - 800402c: 429a cmp r2, r3 - 800402e: d302 bcc.n 8004036 - 8004030: 68bb ldr r3, [r7, #8] - 8004032: 2b00 cmp r3, #0 - 8004034: d11d bne.n 8004072 + 8004194: f7fe fa86 bl 80026a4 + 8004198: 4602 mov r2, r0 + 800419a: 687b ldr r3, [r7, #4] + 800419c: 1ad3 subs r3, r2, r3 + 800419e: 68ba ldr r2, [r7, #8] + 80041a0: 429a cmp r2, r3 + 80041a2: d302 bcc.n 80041aa + 80041a4: 68bb ldr r3, [r7, #8] + 80041a6: 2b00 cmp r3, #0 + 80041a8: d11d bne.n 80041e6 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) - 8004036: 68fb ldr r3, [r7, #12] - 8004038: 681b ldr r3, [r3, #0] - 800403a: 695b ldr r3, [r3, #20] - 800403c: f003 0340 and.w r3, r3, #64 @ 0x40 - 8004040: 2b40 cmp r3, #64 @ 0x40 - 8004042: d016 beq.n 8004072 + 80041aa: 68fb ldr r3, [r7, #12] + 80041ac: 681b ldr r3, [r3, #0] + 80041ae: 695b ldr r3, [r3, #20] + 80041b0: f003 0340 and.w r3, r3, #64 @ 0x40 + 80041b4: 2b40 cmp r3, #64 @ 0x40 + 80041b6: d016 beq.n 80041e6 { hi2c->PreviousState = I2C_STATE_NONE; - 8004044: 68fb ldr r3, [r7, #12] - 8004046: 2200 movs r2, #0 - 8004048: 631a str r2, [r3, #48] @ 0x30 + 80041b8: 68fb ldr r3, [r7, #12] + 80041ba: 2200 movs r2, #0 + 80041bc: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 800404a: 68fb ldr r3, [r7, #12] - 800404c: 2220 movs r2, #32 - 800404e: f883 203d strb.w r2, [r3, #61] @ 0x3d + 80041be: 68fb ldr r3, [r7, #12] + 80041c0: 2220 movs r2, #32 + 80041c2: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004052: 68fb ldr r3, [r7, #12] - 8004054: 2200 movs r2, #0 - 8004056: f883 203e strb.w r2, [r3, #62] @ 0x3e + 80041c6: 68fb ldr r3, [r7, #12] + 80041c8: 2200 movs r2, #0 + 80041ca: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 800405a: 68fb ldr r3, [r7, #12] - 800405c: 6c1b ldr r3, [r3, #64] @ 0x40 - 800405e: f043 0220 orr.w r2, r3, #32 - 8004062: 68fb ldr r3, [r7, #12] - 8004064: 641a str r2, [r3, #64] @ 0x40 + 80041ce: 68fb ldr r3, [r7, #12] + 80041d0: 6c1b ldr r3, [r3, #64] @ 0x40 + 80041d2: f043 0220 orr.w r2, r3, #32 + 80041d6: 68fb ldr r3, [r7, #12] + 80041d8: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004066: 68fb ldr r3, [r7, #12] - 8004068: 2200 movs r2, #0 - 800406a: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80041da: 68fb ldr r3, [r7, #12] + 80041dc: 2200 movs r2, #0 + 80041de: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 800406e: 2301 movs r3, #1 - 8004070: e007 b.n 8004082 + 80041e2: 2301 movs r3, #1 + 80041e4: e007 b.n 80041f6 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - 8004072: 68fb ldr r3, [r7, #12] - 8004074: 681b ldr r3, [r3, #0] - 8004076: 695b ldr r3, [r3, #20] - 8004078: f003 0340 and.w r3, r3, #64 @ 0x40 - 800407c: 2b40 cmp r3, #64 @ 0x40 - 800407e: d1ae bne.n 8003fde + 80041e6: 68fb ldr r3, [r7, #12] + 80041e8: 681b ldr r3, [r3, #0] + 80041ea: 695b ldr r3, [r3, #20] + 80041ec: f003 0340 and.w r3, r3, #64 @ 0x40 + 80041f0: 2b40 cmp r3, #64 @ 0x40 + 80041f2: d1ae bne.n 8004152 } } } return HAL_OK; - 8004080: 2300 movs r3, #0 + 80041f4: 2300 movs r3, #0 } - 8004082: 4618 mov r0, r3 - 8004084: 3710 adds r7, #16 - 8004086: 46bd mov sp, r7 - 8004088: bd80 pop {r7, pc} + 80041f6: 4618 mov r0, r3 + 80041f8: 3710 adds r7, #16 + 80041fa: 46bd mov sp, r7 + 80041fc: bd80 pop {r7, pc} -0800408a : +080041fe : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { - 800408a: b480 push {r7} - 800408c: b083 sub sp, #12 - 800408e: af00 add r7, sp, #0 - 8004090: 6078 str r0, [r7, #4] + 80041fe: b480 push {r7} + 8004200: b083 sub sp, #12 + 8004202: af00 add r7, sp, #0 + 8004204: 6078 str r0, [r7, #4] if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 8004092: 687b ldr r3, [r7, #4] - 8004094: 681b ldr r3, [r3, #0] - 8004096: 695b ldr r3, [r3, #20] - 8004098: f403 6380 and.w r3, r3, #1024 @ 0x400 - 800409c: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 80040a0: d11b bne.n 80040da + 8004206: 687b ldr r3, [r7, #4] + 8004208: 681b ldr r3, [r3, #0] + 800420a: 695b ldr r3, [r3, #20] + 800420c: f403 6380 and.w r3, r3, #1024 @ 0x400 + 8004210: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 8004214: d11b bne.n 800424e { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 80040a2: 687b ldr r3, [r7, #4] - 80040a4: 681b ldr r3, [r3, #0] - 80040a6: f46f 6280 mvn.w r2, #1024 @ 0x400 - 80040aa: 615a str r2, [r3, #20] + 8004216: 687b ldr r3, [r7, #4] + 8004218: 681b ldr r3, [r3, #0] + 800421a: f46f 6280 mvn.w r2, #1024 @ 0x400 + 800421e: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 80040ac: 687b ldr r3, [r7, #4] - 80040ae: 2200 movs r2, #0 - 80040b0: 631a str r2, [r3, #48] @ 0x30 + 8004220: 687b ldr r3, [r7, #4] + 8004222: 2200 movs r2, #0 + 8004224: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 80040b2: 687b ldr r3, [r7, #4] - 80040b4: 2220 movs r2, #32 - 80040b6: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004226: 687b ldr r3, [r7, #4] + 8004228: 2220 movs r2, #32 + 800422a: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80040ba: 687b ldr r3, [r7, #4] - 80040bc: 2200 movs r2, #0 - 80040be: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800422e: 687b ldr r3, [r7, #4] + 8004230: 2200 movs r2, #0 + 8004232: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 80040c2: 687b ldr r3, [r7, #4] - 80040c4: 6c1b ldr r3, [r3, #64] @ 0x40 - 80040c6: f043 0204 orr.w r2, r3, #4 - 80040ca: 687b ldr r3, [r7, #4] - 80040cc: 641a str r2, [r3, #64] @ 0x40 + 8004236: 687b ldr r3, [r7, #4] + 8004238: 6c1b ldr r3, [r3, #64] @ 0x40 + 800423a: f043 0204 orr.w r2, r3, #4 + 800423e: 687b ldr r3, [r7, #4] + 8004240: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80040ce: 687b ldr r3, [r7, #4] - 80040d0: 2200 movs r2, #0 - 80040d2: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004242: 687b ldr r3, [r7, #4] + 8004244: 2200 movs r2, #0 + 8004246: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 80040d6: 2301 movs r3, #1 - 80040d8: e000 b.n 80040dc + 800424a: 2301 movs r3, #1 + 800424c: e000 b.n 8004250 } return HAL_OK; - 80040da: 2300 movs r3, #0 + 800424e: 2300 movs r3, #0 } - 80040dc: 4618 mov r0, r3 - 80040de: 370c adds r7, #12 - 80040e0: 46bd mov sp, r7 - 80040e2: bc80 pop {r7} - 80040e4: 4770 bx lr + 8004250: 4618 mov r0, r3 + 8004252: 370c adds r7, #12 + 8004254: 46bd mov sp, r7 + 8004256: bc80 pop {r7} + 8004258: 4770 bx lr ... -080040e8 : +0800425c : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 80040e8: b580 push {r7, lr} - 80040ea: b086 sub sp, #24 - 80040ec: af00 add r7, sp, #0 - 80040ee: 6078 str r0, [r7, #4] + 800425c: b580 push {r7, lr} + 800425e: b086 sub sp, #24 + 8004260: af00 add r7, sp, #0 + 8004262: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) - 80040f0: 687b ldr r3, [r7, #4] - 80040f2: 2b00 cmp r3, #0 - 80040f4: d101 bne.n 80040fa + 8004264: 687b ldr r3, [r7, #4] + 8004266: 2b00 cmp r3, #0 + 8004268: d101 bne.n 800426e { return HAL_ERROR; - 80040f6: 2301 movs r3, #1 - 80040f8: e272 b.n 80045e0 + 800426a: 2301 movs r3, #1 + 800426c: e272 b.n 8004754 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 80040fa: 687b ldr r3, [r7, #4] - 80040fc: 681b ldr r3, [r3, #0] - 80040fe: f003 0301 and.w r3, r3, #1 - 8004102: 2b00 cmp r3, #0 - 8004104: f000 8087 beq.w 8004216 + 800426e: 687b ldr r3, [r7, #4] + 8004270: 681b ldr r3, [r3, #0] + 8004272: f003 0301 and.w r3, r3, #1 + 8004276: 2b00 cmp r3, #0 + 8004278: f000 8087 beq.w 800438a { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 8004108: 4b92 ldr r3, [pc, #584] @ (8004354 ) - 800410a: 685b ldr r3, [r3, #4] - 800410c: f003 030c and.w r3, r3, #12 - 8004110: 2b04 cmp r3, #4 - 8004112: d00c beq.n 800412e + 800427c: 4b92 ldr r3, [pc, #584] @ (80044c8 ) + 800427e: 685b ldr r3, [r3, #4] + 8004280: f003 030c and.w r3, r3, #12 + 8004284: 2b04 cmp r3, #4 + 8004286: d00c beq.n 80042a2 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - 8004114: 4b8f ldr r3, [pc, #572] @ (8004354 ) - 8004116: 685b ldr r3, [r3, #4] - 8004118: f003 030c and.w r3, r3, #12 - 800411c: 2b08 cmp r3, #8 - 800411e: d112 bne.n 8004146 - 8004120: 4b8c ldr r3, [pc, #560] @ (8004354 ) - 8004122: 685b ldr r3, [r3, #4] - 8004124: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8004128: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 800412c: d10b bne.n 8004146 + 8004288: 4b8f ldr r3, [pc, #572] @ (80044c8 ) + 800428a: 685b ldr r3, [r3, #4] + 800428c: f003 030c and.w r3, r3, #12 + 8004290: 2b08 cmp r3, #8 + 8004292: d112 bne.n 80042ba + 8004294: 4b8c ldr r3, [pc, #560] @ (80044c8 ) + 8004296: 685b ldr r3, [r3, #4] + 8004298: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 800429c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 80042a0: d10b bne.n 80042ba { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 800412e: 4b89 ldr r3, [pc, #548] @ (8004354 ) - 8004130: 681b ldr r3, [r3, #0] - 8004132: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8004136: 2b00 cmp r3, #0 - 8004138: d06c beq.n 8004214 - 800413a: 687b ldr r3, [r7, #4] - 800413c: 685b ldr r3, [r3, #4] - 800413e: 2b00 cmp r3, #0 - 8004140: d168 bne.n 8004214 + 80042a2: 4b89 ldr r3, [pc, #548] @ (80044c8 ) + 80042a4: 681b ldr r3, [r3, #0] + 80042a6: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 80042aa: 2b00 cmp r3, #0 + 80042ac: d06c beq.n 8004388 + 80042ae: 687b ldr r3, [r7, #4] + 80042b0: 685b ldr r3, [r3, #4] + 80042b2: 2b00 cmp r3, #0 + 80042b4: d168 bne.n 8004388 { return HAL_ERROR; - 8004142: 2301 movs r3, #1 - 8004144: e24c b.n 80045e0 + 80042b6: 2301 movs r3, #1 + 80042b8: e24c b.n 8004754 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8004146: 687b ldr r3, [r7, #4] - 8004148: 685b ldr r3, [r3, #4] - 800414a: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 800414e: d106 bne.n 800415e - 8004150: 4b80 ldr r3, [pc, #512] @ (8004354 ) - 8004152: 681b ldr r3, [r3, #0] - 8004154: 4a7f ldr r2, [pc, #508] @ (8004354 ) - 8004156: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 800415a: 6013 str r3, [r2, #0] - 800415c: e02e b.n 80041bc - 800415e: 687b ldr r3, [r7, #4] - 8004160: 685b ldr r3, [r3, #4] - 8004162: 2b00 cmp r3, #0 - 8004164: d10c bne.n 8004180 - 8004166: 4b7b ldr r3, [pc, #492] @ (8004354 ) - 8004168: 681b ldr r3, [r3, #0] - 800416a: 4a7a ldr r2, [pc, #488] @ (8004354 ) - 800416c: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 8004170: 6013 str r3, [r2, #0] - 8004172: 4b78 ldr r3, [pc, #480] @ (8004354 ) - 8004174: 681b ldr r3, [r3, #0] - 8004176: 4a77 ldr r2, [pc, #476] @ (8004354 ) - 8004178: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 800417c: 6013 str r3, [r2, #0] - 800417e: e01d b.n 80041bc - 8004180: 687b ldr r3, [r7, #4] - 8004182: 685b ldr r3, [r3, #4] - 8004184: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 - 8004188: d10c bne.n 80041a4 - 800418a: 4b72 ldr r3, [pc, #456] @ (8004354 ) - 800418c: 681b ldr r3, [r3, #0] - 800418e: 4a71 ldr r2, [pc, #452] @ (8004354 ) - 8004190: f443 2380 orr.w r3, r3, #262144 @ 0x40000 - 8004194: 6013 str r3, [r2, #0] - 8004196: 4b6f ldr r3, [pc, #444] @ (8004354 ) - 8004198: 681b ldr r3, [r3, #0] - 800419a: 4a6e ldr r2, [pc, #440] @ (8004354 ) - 800419c: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 80041a0: 6013 str r3, [r2, #0] - 80041a2: e00b b.n 80041bc - 80041a4: 4b6b ldr r3, [pc, #428] @ (8004354 ) - 80041a6: 681b ldr r3, [r3, #0] - 80041a8: 4a6a ldr r2, [pc, #424] @ (8004354 ) - 80041aa: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 80041ae: 6013 str r3, [r2, #0] - 80041b0: 4b68 ldr r3, [pc, #416] @ (8004354 ) - 80041b2: 681b ldr r3, [r3, #0] - 80041b4: 4a67 ldr r2, [pc, #412] @ (8004354 ) - 80041b6: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 80041ba: 6013 str r3, [r2, #0] + 80042ba: 687b ldr r3, [r7, #4] + 80042bc: 685b ldr r3, [r3, #4] + 80042be: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 80042c2: d106 bne.n 80042d2 + 80042c4: 4b80 ldr r3, [pc, #512] @ (80044c8 ) + 80042c6: 681b ldr r3, [r3, #0] + 80042c8: 4a7f ldr r2, [pc, #508] @ (80044c8 ) + 80042ca: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 80042ce: 6013 str r3, [r2, #0] + 80042d0: e02e b.n 8004330 + 80042d2: 687b ldr r3, [r7, #4] + 80042d4: 685b ldr r3, [r3, #4] + 80042d6: 2b00 cmp r3, #0 + 80042d8: d10c bne.n 80042f4 + 80042da: 4b7b ldr r3, [pc, #492] @ (80044c8 ) + 80042dc: 681b ldr r3, [r3, #0] + 80042de: 4a7a ldr r2, [pc, #488] @ (80044c8 ) + 80042e0: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 80042e4: 6013 str r3, [r2, #0] + 80042e6: 4b78 ldr r3, [pc, #480] @ (80044c8 ) + 80042e8: 681b ldr r3, [r3, #0] + 80042ea: 4a77 ldr r2, [pc, #476] @ (80044c8 ) + 80042ec: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 80042f0: 6013 str r3, [r2, #0] + 80042f2: e01d b.n 8004330 + 80042f4: 687b ldr r3, [r7, #4] + 80042f6: 685b ldr r3, [r3, #4] + 80042f8: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 + 80042fc: d10c bne.n 8004318 + 80042fe: 4b72 ldr r3, [pc, #456] @ (80044c8 ) + 8004300: 681b ldr r3, [r3, #0] + 8004302: 4a71 ldr r2, [pc, #452] @ (80044c8 ) + 8004304: f443 2380 orr.w r3, r3, #262144 @ 0x40000 + 8004308: 6013 str r3, [r2, #0] + 800430a: 4b6f ldr r3, [pc, #444] @ (80044c8 ) + 800430c: 681b ldr r3, [r3, #0] + 800430e: 4a6e ldr r2, [pc, #440] @ (80044c8 ) + 8004310: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8004314: 6013 str r3, [r2, #0] + 8004316: e00b b.n 8004330 + 8004318: 4b6b ldr r3, [pc, #428] @ (80044c8 ) + 800431a: 681b ldr r3, [r3, #0] + 800431c: 4a6a ldr r2, [pc, #424] @ (80044c8 ) + 800431e: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 8004322: 6013 str r3, [r2, #0] + 8004324: 4b68 ldr r3, [pc, #416] @ (80044c8 ) + 8004326: 681b ldr r3, [r3, #0] + 8004328: 4a67 ldr r2, [pc, #412] @ (80044c8 ) + 800432a: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 800432e: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 80041bc: 687b ldr r3, [r7, #4] - 80041be: 685b ldr r3, [r3, #4] - 80041c0: 2b00 cmp r3, #0 - 80041c2: d013 beq.n 80041ec + 8004330: 687b ldr r3, [r7, #4] + 8004332: 685b ldr r3, [r3, #4] + 8004334: 2b00 cmp r3, #0 + 8004336: d013 beq.n 8004360 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80041c4: f7fe f9b4 bl 8002530 - 80041c8: 6138 str r0, [r7, #16] + 8004338: f7fe f9b4 bl 80026a4 + 800433c: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 80041ca: e008 b.n 80041de + 800433e: e008 b.n 8004352 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 80041cc: f7fe f9b0 bl 8002530 - 80041d0: 4602 mov r2, r0 - 80041d2: 693b ldr r3, [r7, #16] - 80041d4: 1ad3 subs r3, r2, r3 - 80041d6: 2b64 cmp r3, #100 @ 0x64 - 80041d8: d901 bls.n 80041de + 8004340: f7fe f9b0 bl 80026a4 + 8004344: 4602 mov r2, r0 + 8004346: 693b ldr r3, [r7, #16] + 8004348: 1ad3 subs r3, r2, r3 + 800434a: 2b64 cmp r3, #100 @ 0x64 + 800434c: d901 bls.n 8004352 { return HAL_TIMEOUT; - 80041da: 2303 movs r3, #3 - 80041dc: e200 b.n 80045e0 + 800434e: 2303 movs r3, #3 + 8004350: e200 b.n 8004754 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 80041de: 4b5d ldr r3, [pc, #372] @ (8004354 ) - 80041e0: 681b ldr r3, [r3, #0] - 80041e2: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 80041e6: 2b00 cmp r3, #0 - 80041e8: d0f0 beq.n 80041cc - 80041ea: e014 b.n 8004216 + 8004352: 4b5d ldr r3, [pc, #372] @ (80044c8 ) + 8004354: 681b ldr r3, [r3, #0] + 8004356: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 800435a: 2b00 cmp r3, #0 + 800435c: d0f0 beq.n 8004340 + 800435e: e014 b.n 800438a } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80041ec: f7fe f9a0 bl 8002530 - 80041f0: 6138 str r0, [r7, #16] + 8004360: f7fe f9a0 bl 80026a4 + 8004364: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 80041f2: e008 b.n 8004206 + 8004366: e008 b.n 800437a { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 80041f4: f7fe f99c bl 8002530 - 80041f8: 4602 mov r2, r0 - 80041fa: 693b ldr r3, [r7, #16] - 80041fc: 1ad3 subs r3, r2, r3 - 80041fe: 2b64 cmp r3, #100 @ 0x64 - 8004200: d901 bls.n 8004206 + 8004368: f7fe f99c bl 80026a4 + 800436c: 4602 mov r2, r0 + 800436e: 693b ldr r3, [r7, #16] + 8004370: 1ad3 subs r3, r2, r3 + 8004372: 2b64 cmp r3, #100 @ 0x64 + 8004374: d901 bls.n 800437a { return HAL_TIMEOUT; - 8004202: 2303 movs r3, #3 - 8004204: e1ec b.n 80045e0 + 8004376: 2303 movs r3, #3 + 8004378: e1ec b.n 8004754 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 8004206: 4b53 ldr r3, [pc, #332] @ (8004354 ) - 8004208: 681b ldr r3, [r3, #0] - 800420a: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 800420e: 2b00 cmp r3, #0 - 8004210: d1f0 bne.n 80041f4 - 8004212: e000 b.n 8004216 + 800437a: 4b53 ldr r3, [pc, #332] @ (80044c8 ) + 800437c: 681b ldr r3, [r3, #0] + 800437e: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004382: 2b00 cmp r3, #0 + 8004384: d1f0 bne.n 8004368 + 8004386: e000 b.n 800438a if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8004214: bf00 nop + 8004388: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8004216: 687b ldr r3, [r7, #4] - 8004218: 681b ldr r3, [r3, #0] - 800421a: f003 0302 and.w r3, r3, #2 - 800421e: 2b00 cmp r3, #0 - 8004220: d063 beq.n 80042ea + 800438a: 687b ldr r3, [r7, #4] + 800438c: 681b ldr r3, [r3, #0] + 800438e: f003 0302 and.w r3, r3, #2 + 8004392: 2b00 cmp r3, #0 + 8004394: d063 beq.n 800445e /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 8004222: 4b4c ldr r3, [pc, #304] @ (8004354 ) - 8004224: 685b ldr r3, [r3, #4] - 8004226: f003 030c and.w r3, r3, #12 - 800422a: 2b00 cmp r3, #0 - 800422c: d00b beq.n 8004246 + 8004396: 4b4c ldr r3, [pc, #304] @ (80044c8 ) + 8004398: 685b ldr r3, [r3, #4] + 800439a: f003 030c and.w r3, r3, #12 + 800439e: 2b00 cmp r3, #0 + 80043a0: d00b beq.n 80043ba || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) - 800422e: 4b49 ldr r3, [pc, #292] @ (8004354 ) - 8004230: 685b ldr r3, [r3, #4] - 8004232: f003 030c and.w r3, r3, #12 - 8004236: 2b08 cmp r3, #8 - 8004238: d11c bne.n 8004274 - 800423a: 4b46 ldr r3, [pc, #280] @ (8004354 ) - 800423c: 685b ldr r3, [r3, #4] - 800423e: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8004242: 2b00 cmp r3, #0 - 8004244: d116 bne.n 8004274 + 80043a2: 4b49 ldr r3, [pc, #292] @ (80044c8 ) + 80043a4: 685b ldr r3, [r3, #4] + 80043a6: f003 030c and.w r3, r3, #12 + 80043aa: 2b08 cmp r3, #8 + 80043ac: d11c bne.n 80043e8 + 80043ae: 4b46 ldr r3, [pc, #280] @ (80044c8 ) + 80043b0: 685b ldr r3, [r3, #4] + 80043b2: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 80043b6: 2b00 cmp r3, #0 + 80043b8: d116 bne.n 80043e8 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8004246: 4b43 ldr r3, [pc, #268] @ (8004354 ) - 8004248: 681b ldr r3, [r3, #0] - 800424a: f003 0302 and.w r3, r3, #2 - 800424e: 2b00 cmp r3, #0 - 8004250: d005 beq.n 800425e - 8004252: 687b ldr r3, [r7, #4] - 8004254: 691b ldr r3, [r3, #16] - 8004256: 2b01 cmp r3, #1 - 8004258: d001 beq.n 800425e + 80043ba: 4b43 ldr r3, [pc, #268] @ (80044c8 ) + 80043bc: 681b ldr r3, [r3, #0] + 80043be: f003 0302 and.w r3, r3, #2 + 80043c2: 2b00 cmp r3, #0 + 80043c4: d005 beq.n 80043d2 + 80043c6: 687b ldr r3, [r7, #4] + 80043c8: 691b ldr r3, [r3, #16] + 80043ca: 2b01 cmp r3, #1 + 80043cc: d001 beq.n 80043d2 { return HAL_ERROR; - 800425a: 2301 movs r3, #1 - 800425c: e1c0 b.n 80045e0 + 80043ce: 2301 movs r3, #1 + 80043d0: e1c0 b.n 8004754 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 800425e: 4b3d ldr r3, [pc, #244] @ (8004354 ) - 8004260: 681b ldr r3, [r3, #0] - 8004262: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 8004266: 687b ldr r3, [r7, #4] - 8004268: 695b ldr r3, [r3, #20] - 800426a: 00db lsls r3, r3, #3 - 800426c: 4939 ldr r1, [pc, #228] @ (8004354 ) - 800426e: 4313 orrs r3, r2 - 8004270: 600b str r3, [r1, #0] + 80043d2: 4b3d ldr r3, [pc, #244] @ (80044c8 ) + 80043d4: 681b ldr r3, [r3, #0] + 80043d6: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 80043da: 687b ldr r3, [r7, #4] + 80043dc: 695b ldr r3, [r3, #20] + 80043de: 00db lsls r3, r3, #3 + 80043e0: 4939 ldr r1, [pc, #228] @ (80044c8 ) + 80043e2: 4313 orrs r3, r2 + 80043e4: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 8004272: e03a b.n 80042ea + 80043e6: e03a b.n 800445e } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 8004274: 687b ldr r3, [r7, #4] - 8004276: 691b ldr r3, [r3, #16] - 8004278: 2b00 cmp r3, #0 - 800427a: d020 beq.n 80042be + 80043e8: 687b ldr r3, [r7, #4] + 80043ea: 691b ldr r3, [r3, #16] + 80043ec: 2b00 cmp r3, #0 + 80043ee: d020 beq.n 8004432 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 800427c: 4b36 ldr r3, [pc, #216] @ (8004358 ) - 800427e: 2201 movs r2, #1 - 8004280: 601a str r2, [r3, #0] + 80043f0: 4b36 ldr r3, [pc, #216] @ (80044cc ) + 80043f2: 2201 movs r2, #1 + 80043f4: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004282: f7fe f955 bl 8002530 - 8004286: 6138 str r0, [r7, #16] + 80043f6: f7fe f955 bl 80026a4 + 80043fa: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8004288: e008 b.n 800429c + 80043fc: e008 b.n 8004410 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 800428a: f7fe f951 bl 8002530 - 800428e: 4602 mov r2, r0 - 8004290: 693b ldr r3, [r7, #16] - 8004292: 1ad3 subs r3, r2, r3 - 8004294: 2b02 cmp r3, #2 - 8004296: d901 bls.n 800429c + 80043fe: f7fe f951 bl 80026a4 + 8004402: 4602 mov r2, r0 + 8004404: 693b ldr r3, [r7, #16] + 8004406: 1ad3 subs r3, r2, r3 + 8004408: 2b02 cmp r3, #2 + 800440a: d901 bls.n 8004410 { return HAL_TIMEOUT; - 8004298: 2303 movs r3, #3 - 800429a: e1a1 b.n 80045e0 + 800440c: 2303 movs r3, #3 + 800440e: e1a1 b.n 8004754 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 800429c: 4b2d ldr r3, [pc, #180] @ (8004354 ) - 800429e: 681b ldr r3, [r3, #0] - 80042a0: f003 0302 and.w r3, r3, #2 - 80042a4: 2b00 cmp r3, #0 - 80042a6: d0f0 beq.n 800428a + 8004410: 4b2d ldr r3, [pc, #180] @ (80044c8 ) + 8004412: 681b ldr r3, [r3, #0] + 8004414: f003 0302 and.w r3, r3, #2 + 8004418: 2b00 cmp r3, #0 + 800441a: d0f0 beq.n 80043fe } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80042a8: 4b2a ldr r3, [pc, #168] @ (8004354 ) - 80042aa: 681b ldr r3, [r3, #0] - 80042ac: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 80042b0: 687b ldr r3, [r7, #4] - 80042b2: 695b ldr r3, [r3, #20] - 80042b4: 00db lsls r3, r3, #3 - 80042b6: 4927 ldr r1, [pc, #156] @ (8004354 ) - 80042b8: 4313 orrs r3, r2 - 80042ba: 600b str r3, [r1, #0] - 80042bc: e015 b.n 80042ea + 800441c: 4b2a ldr r3, [pc, #168] @ (80044c8 ) + 800441e: 681b ldr r3, [r3, #0] + 8004420: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 8004424: 687b ldr r3, [r7, #4] + 8004426: 695b ldr r3, [r3, #20] + 8004428: 00db lsls r3, r3, #3 + 800442a: 4927 ldr r1, [pc, #156] @ (80044c8 ) + 800442c: 4313 orrs r3, r2 + 800442e: 600b str r3, [r1, #0] + 8004430: e015 b.n 800445e } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 80042be: 4b26 ldr r3, [pc, #152] @ (8004358 ) - 80042c0: 2200 movs r2, #0 - 80042c2: 601a str r2, [r3, #0] + 8004432: 4b26 ldr r3, [pc, #152] @ (80044cc ) + 8004434: 2200 movs r2, #0 + 8004436: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80042c4: f7fe f934 bl 8002530 - 80042c8: 6138 str r0, [r7, #16] + 8004438: f7fe f934 bl 80026a4 + 800443c: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80042ca: e008 b.n 80042de + 800443e: e008 b.n 8004452 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 80042cc: f7fe f930 bl 8002530 - 80042d0: 4602 mov r2, r0 - 80042d2: 693b ldr r3, [r7, #16] - 80042d4: 1ad3 subs r3, r2, r3 - 80042d6: 2b02 cmp r3, #2 - 80042d8: d901 bls.n 80042de + 8004440: f7fe f930 bl 80026a4 + 8004444: 4602 mov r2, r0 + 8004446: 693b ldr r3, [r7, #16] + 8004448: 1ad3 subs r3, r2, r3 + 800444a: 2b02 cmp r3, #2 + 800444c: d901 bls.n 8004452 { return HAL_TIMEOUT; - 80042da: 2303 movs r3, #3 - 80042dc: e180 b.n 80045e0 + 800444e: 2303 movs r3, #3 + 8004450: e180 b.n 8004754 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 80042de: 4b1d ldr r3, [pc, #116] @ (8004354 ) - 80042e0: 681b ldr r3, [r3, #0] - 80042e2: f003 0302 and.w r3, r3, #2 - 80042e6: 2b00 cmp r3, #0 - 80042e8: d1f0 bne.n 80042cc + 8004452: 4b1d ldr r3, [pc, #116] @ (80044c8 ) + 8004454: 681b ldr r3, [r3, #0] + 8004456: f003 0302 and.w r3, r3, #2 + 800445a: 2b00 cmp r3, #0 + 800445c: d1f0 bne.n 8004440 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 80042ea: 687b ldr r3, [r7, #4] - 80042ec: 681b ldr r3, [r3, #0] - 80042ee: f003 0308 and.w r3, r3, #8 - 80042f2: 2b00 cmp r3, #0 - 80042f4: d03a beq.n 800436c + 800445e: 687b ldr r3, [r7, #4] + 8004460: 681b ldr r3, [r3, #0] + 8004462: f003 0308 and.w r3, r3, #8 + 8004466: 2b00 cmp r3, #0 + 8004468: d03a beq.n 80044e0 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 80042f6: 687b ldr r3, [r7, #4] - 80042f8: 699b ldr r3, [r3, #24] - 80042fa: 2b00 cmp r3, #0 - 80042fc: d019 beq.n 8004332 + 800446a: 687b ldr r3, [r7, #4] + 800446c: 699b ldr r3, [r3, #24] + 800446e: 2b00 cmp r3, #0 + 8004470: d019 beq.n 80044a6 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 80042fe: 4b17 ldr r3, [pc, #92] @ (800435c ) - 8004300: 2201 movs r2, #1 - 8004302: 601a str r2, [r3, #0] + 8004472: 4b17 ldr r3, [pc, #92] @ (80044d0 ) + 8004474: 2201 movs r2, #1 + 8004476: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004304: f7fe f914 bl 8002530 - 8004308: 6138 str r0, [r7, #16] + 8004478: f7fe f914 bl 80026a4 + 800447c: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 800430a: e008 b.n 800431e + 800447e: e008 b.n 8004492 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 800430c: f7fe f910 bl 8002530 - 8004310: 4602 mov r2, r0 - 8004312: 693b ldr r3, [r7, #16] - 8004314: 1ad3 subs r3, r2, r3 - 8004316: 2b02 cmp r3, #2 - 8004318: d901 bls.n 800431e + 8004480: f7fe f910 bl 80026a4 + 8004484: 4602 mov r2, r0 + 8004486: 693b ldr r3, [r7, #16] + 8004488: 1ad3 subs r3, r2, r3 + 800448a: 2b02 cmp r3, #2 + 800448c: d901 bls.n 8004492 { return HAL_TIMEOUT; - 800431a: 2303 movs r3, #3 - 800431c: e160 b.n 80045e0 + 800448e: 2303 movs r3, #3 + 8004490: e160 b.n 8004754 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 800431e: 4b0d ldr r3, [pc, #52] @ (8004354 ) - 8004320: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004322: f003 0302 and.w r3, r3, #2 - 8004326: 2b00 cmp r3, #0 - 8004328: d0f0 beq.n 800430c + 8004492: 4b0d ldr r3, [pc, #52] @ (80044c8 ) + 8004494: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004496: f003 0302 and.w r3, r3, #2 + 800449a: 2b00 cmp r3, #0 + 800449c: d0f0 beq.n 8004480 } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); - 800432a: 2001 movs r0, #1 - 800432c: f000 fad0 bl 80048d0 - 8004330: e01c b.n 800436c + 800449e: 2001 movs r0, #1 + 80044a0: f000 fad0 bl 8004a44 + 80044a4: e01c b.n 80044e0 } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 8004332: 4b0a ldr r3, [pc, #40] @ (800435c ) - 8004334: 2200 movs r2, #0 - 8004336: 601a str r2, [r3, #0] + 80044a6: 4b0a ldr r3, [pc, #40] @ (80044d0 ) + 80044a8: 2200 movs r2, #0 + 80044aa: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004338: f7fe f8fa bl 8002530 - 800433c: 6138 str r0, [r7, #16] + 80044ac: f7fe f8fa bl 80026a4 + 80044b0: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 800433e: e00f b.n 8004360 + 80044b2: e00f b.n 80044d4 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 8004340: f7fe f8f6 bl 8002530 - 8004344: 4602 mov r2, r0 - 8004346: 693b ldr r3, [r7, #16] - 8004348: 1ad3 subs r3, r2, r3 - 800434a: 2b02 cmp r3, #2 - 800434c: d908 bls.n 8004360 + 80044b4: f7fe f8f6 bl 80026a4 + 80044b8: 4602 mov r2, r0 + 80044ba: 693b ldr r3, [r7, #16] + 80044bc: 1ad3 subs r3, r2, r3 + 80044be: 2b02 cmp r3, #2 + 80044c0: d908 bls.n 80044d4 { return HAL_TIMEOUT; - 800434e: 2303 movs r3, #3 - 8004350: e146 b.n 80045e0 - 8004352: bf00 nop - 8004354: 40021000 .word 0x40021000 - 8004358: 42420000 .word 0x42420000 - 800435c: 42420480 .word 0x42420480 + 80044c2: 2303 movs r3, #3 + 80044c4: e146 b.n 8004754 + 80044c6: bf00 nop + 80044c8: 40021000 .word 0x40021000 + 80044cc: 42420000 .word 0x42420000 + 80044d0: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8004360: 4b92 ldr r3, [pc, #584] @ (80045ac ) - 8004362: 6a5b ldr r3, [r3, #36] @ 0x24 - 8004364: f003 0302 and.w r3, r3, #2 - 8004368: 2b00 cmp r3, #0 - 800436a: d1e9 bne.n 8004340 + 80044d4: 4b92 ldr r3, [pc, #584] @ (8004720 ) + 80044d6: 6a5b ldr r3, [r3, #36] @ 0x24 + 80044d8: f003 0302 and.w r3, r3, #2 + 80044dc: 2b00 cmp r3, #0 + 80044de: d1e9 bne.n 80044b4 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 800436c: 687b ldr r3, [r7, #4] - 800436e: 681b ldr r3, [r3, #0] - 8004370: f003 0304 and.w r3, r3, #4 - 8004374: 2b00 cmp r3, #0 - 8004376: f000 80a6 beq.w 80044c6 + 80044e0: 687b ldr r3, [r7, #4] + 80044e2: 681b ldr r3, [r3, #0] + 80044e4: f003 0304 and.w r3, r3, #4 + 80044e8: 2b00 cmp r3, #0 + 80044ea: f000 80a6 beq.w 800463a { FlagStatus pwrclkchanged = RESET; - 800437a: 2300 movs r3, #0 - 800437c: 75fb strb r3, [r7, #23] + 80044ee: 2300 movs r3, #0 + 80044f0: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 800437e: 4b8b ldr r3, [pc, #556] @ (80045ac ) - 8004380: 69db ldr r3, [r3, #28] - 8004382: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8004386: 2b00 cmp r3, #0 - 8004388: d10d bne.n 80043a6 + 80044f2: 4b8b ldr r3, [pc, #556] @ (8004720 ) + 80044f4: 69db ldr r3, [r3, #28] + 80044f6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80044fa: 2b00 cmp r3, #0 + 80044fc: d10d bne.n 800451a { __HAL_RCC_PWR_CLK_ENABLE(); - 800438a: 4b88 ldr r3, [pc, #544] @ (80045ac ) - 800438c: 69db ldr r3, [r3, #28] - 800438e: 4a87 ldr r2, [pc, #540] @ (80045ac ) - 8004390: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8004394: 61d3 str r3, [r2, #28] - 8004396: 4b85 ldr r3, [pc, #532] @ (80045ac ) - 8004398: 69db ldr r3, [r3, #28] - 800439a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 800439e: 60bb str r3, [r7, #8] - 80043a0: 68bb ldr r3, [r7, #8] + 80044fe: 4b88 ldr r3, [pc, #544] @ (8004720 ) + 8004500: 69db ldr r3, [r3, #28] + 8004502: 4a87 ldr r2, [pc, #540] @ (8004720 ) + 8004504: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8004508: 61d3 str r3, [r2, #28] + 800450a: 4b85 ldr r3, [pc, #532] @ (8004720 ) + 800450c: 69db ldr r3, [r3, #28] + 800450e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8004512: 60bb str r3, [r7, #8] + 8004514: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 80043a2: 2301 movs r3, #1 - 80043a4: 75fb strb r3, [r7, #23] + 8004516: 2301 movs r3, #1 + 8004518: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80043a6: 4b82 ldr r3, [pc, #520] @ (80045b0 ) - 80043a8: 681b ldr r3, [r3, #0] - 80043aa: f403 7380 and.w r3, r3, #256 @ 0x100 - 80043ae: 2b00 cmp r3, #0 - 80043b0: d118 bne.n 80043e4 + 800451a: 4b82 ldr r3, [pc, #520] @ (8004724 ) + 800451c: 681b ldr r3, [r3, #0] + 800451e: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004522: 2b00 cmp r3, #0 + 8004524: d118 bne.n 8004558 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 80043b2: 4b7f ldr r3, [pc, #508] @ (80045b0 ) - 80043b4: 681b ldr r3, [r3, #0] - 80043b6: 4a7e ldr r2, [pc, #504] @ (80045b0 ) - 80043b8: f443 7380 orr.w r3, r3, #256 @ 0x100 - 80043bc: 6013 str r3, [r2, #0] + 8004526: 4b7f ldr r3, [pc, #508] @ (8004724 ) + 8004528: 681b ldr r3, [r3, #0] + 800452a: 4a7e ldr r2, [pc, #504] @ (8004724 ) + 800452c: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8004530: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 80043be: f7fe f8b7 bl 8002530 - 80043c2: 6138 str r0, [r7, #16] + 8004532: f7fe f8b7 bl 80026a4 + 8004536: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80043c4: e008 b.n 80043d8 + 8004538: e008 b.n 800454c { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 80043c6: f7fe f8b3 bl 8002530 - 80043ca: 4602 mov r2, r0 - 80043cc: 693b ldr r3, [r7, #16] - 80043ce: 1ad3 subs r3, r2, r3 - 80043d0: 2b64 cmp r3, #100 @ 0x64 - 80043d2: d901 bls.n 80043d8 + 800453a: f7fe f8b3 bl 80026a4 + 800453e: 4602 mov r2, r0 + 8004540: 693b ldr r3, [r7, #16] + 8004542: 1ad3 subs r3, r2, r3 + 8004544: 2b64 cmp r3, #100 @ 0x64 + 8004546: d901 bls.n 800454c { return HAL_TIMEOUT; - 80043d4: 2303 movs r3, #3 - 80043d6: e103 b.n 80045e0 + 8004548: 2303 movs r3, #3 + 800454a: e103 b.n 8004754 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80043d8: 4b75 ldr r3, [pc, #468] @ (80045b0 ) - 80043da: 681b ldr r3, [r3, #0] - 80043dc: f403 7380 and.w r3, r3, #256 @ 0x100 - 80043e0: 2b00 cmp r3, #0 - 80043e2: d0f0 beq.n 80043c6 + 800454c: 4b75 ldr r3, [pc, #468] @ (8004724 ) + 800454e: 681b ldr r3, [r3, #0] + 8004550: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004554: 2b00 cmp r3, #0 + 8004556: d0f0 beq.n 800453a } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 80043e4: 687b ldr r3, [r7, #4] - 80043e6: 68db ldr r3, [r3, #12] - 80043e8: 2b01 cmp r3, #1 - 80043ea: d106 bne.n 80043fa - 80043ec: 4b6f ldr r3, [pc, #444] @ (80045ac ) - 80043ee: 6a1b ldr r3, [r3, #32] - 80043f0: 4a6e ldr r2, [pc, #440] @ (80045ac ) - 80043f2: f043 0301 orr.w r3, r3, #1 - 80043f6: 6213 str r3, [r2, #32] - 80043f8: e02d b.n 8004456 - 80043fa: 687b ldr r3, [r7, #4] - 80043fc: 68db ldr r3, [r3, #12] - 80043fe: 2b00 cmp r3, #0 - 8004400: d10c bne.n 800441c - 8004402: 4b6a ldr r3, [pc, #424] @ (80045ac ) - 8004404: 6a1b ldr r3, [r3, #32] - 8004406: 4a69 ldr r2, [pc, #420] @ (80045ac ) - 8004408: f023 0301 bic.w r3, r3, #1 - 800440c: 6213 str r3, [r2, #32] - 800440e: 4b67 ldr r3, [pc, #412] @ (80045ac ) - 8004410: 6a1b ldr r3, [r3, #32] - 8004412: 4a66 ldr r2, [pc, #408] @ (80045ac ) - 8004414: f023 0304 bic.w r3, r3, #4 - 8004418: 6213 str r3, [r2, #32] - 800441a: e01c b.n 8004456 - 800441c: 687b ldr r3, [r7, #4] - 800441e: 68db ldr r3, [r3, #12] - 8004420: 2b05 cmp r3, #5 - 8004422: d10c bne.n 800443e - 8004424: 4b61 ldr r3, [pc, #388] @ (80045ac ) - 8004426: 6a1b ldr r3, [r3, #32] - 8004428: 4a60 ldr r2, [pc, #384] @ (80045ac ) - 800442a: f043 0304 orr.w r3, r3, #4 - 800442e: 6213 str r3, [r2, #32] - 8004430: 4b5e ldr r3, [pc, #376] @ (80045ac ) - 8004432: 6a1b ldr r3, [r3, #32] - 8004434: 4a5d ldr r2, [pc, #372] @ (80045ac ) - 8004436: f043 0301 orr.w r3, r3, #1 - 800443a: 6213 str r3, [r2, #32] - 800443c: e00b b.n 8004456 - 800443e: 4b5b ldr r3, [pc, #364] @ (80045ac ) - 8004440: 6a1b ldr r3, [r3, #32] - 8004442: 4a5a ldr r2, [pc, #360] @ (80045ac ) - 8004444: f023 0301 bic.w r3, r3, #1 - 8004448: 6213 str r3, [r2, #32] - 800444a: 4b58 ldr r3, [pc, #352] @ (80045ac ) - 800444c: 6a1b ldr r3, [r3, #32] - 800444e: 4a57 ldr r2, [pc, #348] @ (80045ac ) - 8004450: f023 0304 bic.w r3, r3, #4 - 8004454: 6213 str r3, [r2, #32] + 8004558: 687b ldr r3, [r7, #4] + 800455a: 68db ldr r3, [r3, #12] + 800455c: 2b01 cmp r3, #1 + 800455e: d106 bne.n 800456e + 8004560: 4b6f ldr r3, [pc, #444] @ (8004720 ) + 8004562: 6a1b ldr r3, [r3, #32] + 8004564: 4a6e ldr r2, [pc, #440] @ (8004720 ) + 8004566: f043 0301 orr.w r3, r3, #1 + 800456a: 6213 str r3, [r2, #32] + 800456c: e02d b.n 80045ca + 800456e: 687b ldr r3, [r7, #4] + 8004570: 68db ldr r3, [r3, #12] + 8004572: 2b00 cmp r3, #0 + 8004574: d10c bne.n 8004590 + 8004576: 4b6a ldr r3, [pc, #424] @ (8004720 ) + 8004578: 6a1b ldr r3, [r3, #32] + 800457a: 4a69 ldr r2, [pc, #420] @ (8004720 ) + 800457c: f023 0301 bic.w r3, r3, #1 + 8004580: 6213 str r3, [r2, #32] + 8004582: 4b67 ldr r3, [pc, #412] @ (8004720 ) + 8004584: 6a1b ldr r3, [r3, #32] + 8004586: 4a66 ldr r2, [pc, #408] @ (8004720 ) + 8004588: f023 0304 bic.w r3, r3, #4 + 800458c: 6213 str r3, [r2, #32] + 800458e: e01c b.n 80045ca + 8004590: 687b ldr r3, [r7, #4] + 8004592: 68db ldr r3, [r3, #12] + 8004594: 2b05 cmp r3, #5 + 8004596: d10c bne.n 80045b2 + 8004598: 4b61 ldr r3, [pc, #388] @ (8004720 ) + 800459a: 6a1b ldr r3, [r3, #32] + 800459c: 4a60 ldr r2, [pc, #384] @ (8004720 ) + 800459e: f043 0304 orr.w r3, r3, #4 + 80045a2: 6213 str r3, [r2, #32] + 80045a4: 4b5e ldr r3, [pc, #376] @ (8004720 ) + 80045a6: 6a1b ldr r3, [r3, #32] + 80045a8: 4a5d ldr r2, [pc, #372] @ (8004720 ) + 80045aa: f043 0301 orr.w r3, r3, #1 + 80045ae: 6213 str r3, [r2, #32] + 80045b0: e00b b.n 80045ca + 80045b2: 4b5b ldr r3, [pc, #364] @ (8004720 ) + 80045b4: 6a1b ldr r3, [r3, #32] + 80045b6: 4a5a ldr r2, [pc, #360] @ (8004720 ) + 80045b8: f023 0301 bic.w r3, r3, #1 + 80045bc: 6213 str r3, [r2, #32] + 80045be: 4b58 ldr r3, [pc, #352] @ (8004720 ) + 80045c0: 6a1b ldr r3, [r3, #32] + 80045c2: 4a57 ldr r2, [pc, #348] @ (8004720 ) + 80045c4: f023 0304 bic.w r3, r3, #4 + 80045c8: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 8004456: 687b ldr r3, [r7, #4] - 8004458: 68db ldr r3, [r3, #12] - 800445a: 2b00 cmp r3, #0 - 800445c: d015 beq.n 800448a + 80045ca: 687b ldr r3, [r7, #4] + 80045cc: 68db ldr r3, [r3, #12] + 80045ce: 2b00 cmp r3, #0 + 80045d0: d015 beq.n 80045fe { /* Get Start Tick */ tickstart = HAL_GetTick(); - 800445e: f7fe f867 bl 8002530 - 8004462: 6138 str r0, [r7, #16] + 80045d2: f7fe f867 bl 80026a4 + 80045d6: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8004464: e00a b.n 800447c + 80045d8: e00a b.n 80045f0 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8004466: f7fe f863 bl 8002530 - 800446a: 4602 mov r2, r0 - 800446c: 693b ldr r3, [r7, #16] - 800446e: 1ad3 subs r3, r2, r3 - 8004470: f241 3288 movw r2, #5000 @ 0x1388 - 8004474: 4293 cmp r3, r2 - 8004476: d901 bls.n 800447c + 80045da: f7fe f863 bl 80026a4 + 80045de: 4602 mov r2, r0 + 80045e0: 693b ldr r3, [r7, #16] + 80045e2: 1ad3 subs r3, r2, r3 + 80045e4: f241 3288 movw r2, #5000 @ 0x1388 + 80045e8: 4293 cmp r3, r2 + 80045ea: d901 bls.n 80045f0 { return HAL_TIMEOUT; - 8004478: 2303 movs r3, #3 - 800447a: e0b1 b.n 80045e0 + 80045ec: 2303 movs r3, #3 + 80045ee: e0b1 b.n 8004754 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 800447c: 4b4b ldr r3, [pc, #300] @ (80045ac ) - 800447e: 6a1b ldr r3, [r3, #32] - 8004480: f003 0302 and.w r3, r3, #2 - 8004484: 2b00 cmp r3, #0 - 8004486: d0ee beq.n 8004466 - 8004488: e014 b.n 80044b4 + 80045f0: 4b4b ldr r3, [pc, #300] @ (8004720 ) + 80045f2: 6a1b ldr r3, [r3, #32] + 80045f4: f003 0302 and.w r3, r3, #2 + 80045f8: 2b00 cmp r3, #0 + 80045fa: d0ee beq.n 80045da + 80045fc: e014 b.n 8004628 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 800448a: f7fe f851 bl 8002530 - 800448e: 6138 str r0, [r7, #16] + 80045fe: f7fe f851 bl 80026a4 + 8004602: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8004490: e00a b.n 80044a8 + 8004604: e00a b.n 800461c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8004492: f7fe f84d bl 8002530 - 8004496: 4602 mov r2, r0 - 8004498: 693b ldr r3, [r7, #16] - 800449a: 1ad3 subs r3, r2, r3 - 800449c: f241 3288 movw r2, #5000 @ 0x1388 - 80044a0: 4293 cmp r3, r2 - 80044a2: d901 bls.n 80044a8 + 8004606: f7fe f84d bl 80026a4 + 800460a: 4602 mov r2, r0 + 800460c: 693b ldr r3, [r7, #16] + 800460e: 1ad3 subs r3, r2, r3 + 8004610: f241 3288 movw r2, #5000 @ 0x1388 + 8004614: 4293 cmp r3, r2 + 8004616: d901 bls.n 800461c { return HAL_TIMEOUT; - 80044a4: 2303 movs r3, #3 - 80044a6: e09b b.n 80045e0 + 8004618: 2303 movs r3, #3 + 800461a: e09b b.n 8004754 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 80044a8: 4b40 ldr r3, [pc, #256] @ (80045ac ) - 80044aa: 6a1b ldr r3, [r3, #32] - 80044ac: f003 0302 and.w r3, r3, #2 - 80044b0: 2b00 cmp r3, #0 - 80044b2: d1ee bne.n 8004492 + 800461c: 4b40 ldr r3, [pc, #256] @ (8004720 ) + 800461e: 6a1b ldr r3, [r3, #32] + 8004620: f003 0302 and.w r3, r3, #2 + 8004624: 2b00 cmp r3, #0 + 8004626: d1ee bne.n 8004606 } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) - 80044b4: 7dfb ldrb r3, [r7, #23] - 80044b6: 2b01 cmp r3, #1 - 80044b8: d105 bne.n 80044c6 + 8004628: 7dfb ldrb r3, [r7, #23] + 800462a: 2b01 cmp r3, #1 + 800462c: d105 bne.n 800463a { __HAL_RCC_PWR_CLK_DISABLE(); - 80044ba: 4b3c ldr r3, [pc, #240] @ (80045ac ) - 80044bc: 69db ldr r3, [r3, #28] - 80044be: 4a3b ldr r2, [pc, #236] @ (80045ac ) - 80044c0: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 80044c4: 61d3 str r3, [r2, #28] + 800462e: 4b3c ldr r3, [pc, #240] @ (8004720 ) + 8004630: 69db ldr r3, [r3, #28] + 8004632: 4a3b ldr r2, [pc, #236] @ (8004720 ) + 8004634: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 8004638: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 80044c6: 687b ldr r3, [r7, #4] - 80044c8: 69db ldr r3, [r3, #28] - 80044ca: 2b00 cmp r3, #0 - 80044cc: f000 8087 beq.w 80045de + 800463a: 687b ldr r3, [r7, #4] + 800463c: 69db ldr r3, [r3, #28] + 800463e: 2b00 cmp r3, #0 + 8004640: f000 8087 beq.w 8004752 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 80044d0: 4b36 ldr r3, [pc, #216] @ (80045ac ) - 80044d2: 685b ldr r3, [r3, #4] - 80044d4: f003 030c and.w r3, r3, #12 - 80044d8: 2b08 cmp r3, #8 - 80044da: d061 beq.n 80045a0 + 8004644: 4b36 ldr r3, [pc, #216] @ (8004720 ) + 8004646: 685b ldr r3, [r3, #4] + 8004648: f003 030c and.w r3, r3, #12 + 800464c: 2b08 cmp r3, #8 + 800464e: d061 beq.n 8004714 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 80044dc: 687b ldr r3, [r7, #4] - 80044de: 69db ldr r3, [r3, #28] - 80044e0: 2b02 cmp r3, #2 - 80044e2: d146 bne.n 8004572 + 8004650: 687b ldr r3, [r7, #4] + 8004652: 69db ldr r3, [r3, #28] + 8004654: 2b02 cmp r3, #2 + 8004656: d146 bne.n 80046e6 /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 80044e4: 4b33 ldr r3, [pc, #204] @ (80045b4 ) - 80044e6: 2200 movs r2, #0 - 80044e8: 601a str r2, [r3, #0] + 8004658: 4b33 ldr r3, [pc, #204] @ (8004728 ) + 800465a: 2200 movs r2, #0 + 800465c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80044ea: f7fe f821 bl 8002530 - 80044ee: 6138 str r0, [r7, #16] + 800465e: f7fe f821 bl 80026a4 + 8004662: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80044f0: e008 b.n 8004504 + 8004664: e008 b.n 8004678 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 80044f2: f7fe f81d bl 8002530 - 80044f6: 4602 mov r2, r0 - 80044f8: 693b ldr r3, [r7, #16] - 80044fa: 1ad3 subs r3, r2, r3 - 80044fc: 2b02 cmp r3, #2 - 80044fe: d901 bls.n 8004504 + 8004666: f7fe f81d bl 80026a4 + 800466a: 4602 mov r2, r0 + 800466c: 693b ldr r3, [r7, #16] + 800466e: 1ad3 subs r3, r2, r3 + 8004670: 2b02 cmp r3, #2 + 8004672: d901 bls.n 8004678 { return HAL_TIMEOUT; - 8004500: 2303 movs r3, #3 - 8004502: e06d b.n 80045e0 + 8004674: 2303 movs r3, #3 + 8004676: e06d b.n 8004754 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8004504: 4b29 ldr r3, [pc, #164] @ (80045ac ) - 8004506: 681b ldr r3, [r3, #0] - 8004508: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 800450c: 2b00 cmp r3, #0 - 800450e: d1f0 bne.n 80044f2 + 8004678: 4b29 ldr r3, [pc, #164] @ (8004720 ) + 800467a: 681b ldr r3, [r3, #0] + 800467c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8004680: 2b00 cmp r3, #0 + 8004682: d1f0 bne.n 8004666 } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) - 8004510: 687b ldr r3, [r7, #4] - 8004512: 6a1b ldr r3, [r3, #32] - 8004514: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 8004518: d108 bne.n 800452c + 8004684: 687b ldr r3, [r7, #4] + 8004686: 6a1b ldr r3, [r3, #32] + 8004688: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 800468c: d108 bne.n 80046a0 /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); - 800451a: 4b24 ldr r3, [pc, #144] @ (80045ac ) - 800451c: 685b ldr r3, [r3, #4] - 800451e: f423 3200 bic.w r2, r3, #131072 @ 0x20000 - 8004522: 687b ldr r3, [r7, #4] - 8004524: 689b ldr r3, [r3, #8] - 8004526: 4921 ldr r1, [pc, #132] @ (80045ac ) - 8004528: 4313 orrs r3, r2 - 800452a: 604b str r3, [r1, #4] + 800468e: 4b24 ldr r3, [pc, #144] @ (8004720 ) + 8004690: 685b ldr r3, [r3, #4] + 8004692: f423 3200 bic.w r2, r3, #131072 @ 0x20000 + 8004696: 687b ldr r3, [r7, #4] + 8004698: 689b ldr r3, [r3, #8] + 800469a: 4921 ldr r1, [pc, #132] @ (8004720 ) + 800469c: 4313 orrs r3, r2 + 800469e: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 800452c: 4b1f ldr r3, [pc, #124] @ (80045ac ) - 800452e: 685b ldr r3, [r3, #4] - 8004530: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 - 8004534: 687b ldr r3, [r7, #4] - 8004536: 6a19 ldr r1, [r3, #32] - 8004538: 687b ldr r3, [r7, #4] - 800453a: 6a5b ldr r3, [r3, #36] @ 0x24 - 800453c: 430b orrs r3, r1 - 800453e: 491b ldr r1, [pc, #108] @ (80045ac ) - 8004540: 4313 orrs r3, r2 - 8004542: 604b str r3, [r1, #4] + 80046a0: 4b1f ldr r3, [pc, #124] @ (8004720 ) + 80046a2: 685b ldr r3, [r3, #4] + 80046a4: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 + 80046a8: 687b ldr r3, [r7, #4] + 80046aa: 6a19 ldr r1, [r3, #32] + 80046ac: 687b ldr r3, [r7, #4] + 80046ae: 6a5b ldr r3, [r3, #36] @ 0x24 + 80046b0: 430b orrs r3, r1 + 80046b2: 491b ldr r1, [pc, #108] @ (8004720 ) + 80046b4: 4313 orrs r3, r2 + 80046b6: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 8004544: 4b1b ldr r3, [pc, #108] @ (80045b4 ) - 8004546: 2201 movs r2, #1 - 8004548: 601a str r2, [r3, #0] + 80046b8: 4b1b ldr r3, [pc, #108] @ (8004728 ) + 80046ba: 2201 movs r2, #1 + 80046bc: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800454a: f7fd fff1 bl 8002530 - 800454e: 6138 str r0, [r7, #16] + 80046be: f7fd fff1 bl 80026a4 + 80046c2: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8004550: e008 b.n 8004564 + 80046c4: e008 b.n 80046d8 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8004552: f7fd ffed bl 8002530 - 8004556: 4602 mov r2, r0 - 8004558: 693b ldr r3, [r7, #16] - 800455a: 1ad3 subs r3, r2, r3 - 800455c: 2b02 cmp r3, #2 - 800455e: d901 bls.n 8004564 + 80046c6: f7fd ffed bl 80026a4 + 80046ca: 4602 mov r2, r0 + 80046cc: 693b ldr r3, [r7, #16] + 80046ce: 1ad3 subs r3, r2, r3 + 80046d0: 2b02 cmp r3, #2 + 80046d2: d901 bls.n 80046d8 { return HAL_TIMEOUT; - 8004560: 2303 movs r3, #3 - 8004562: e03d b.n 80045e0 + 80046d4: 2303 movs r3, #3 + 80046d6: e03d b.n 8004754 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8004564: 4b11 ldr r3, [pc, #68] @ (80045ac ) - 8004566: 681b ldr r3, [r3, #0] - 8004568: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 800456c: 2b00 cmp r3, #0 - 800456e: d0f0 beq.n 8004552 - 8004570: e035 b.n 80045de + 80046d8: 4b11 ldr r3, [pc, #68] @ (8004720 ) + 80046da: 681b ldr r3, [r3, #0] + 80046dc: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 80046e0: 2b00 cmp r3, #0 + 80046e2: d0f0 beq.n 80046c6 + 80046e4: e035 b.n 8004752 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8004572: 4b10 ldr r3, [pc, #64] @ (80045b4 ) - 8004574: 2200 movs r2, #0 - 8004576: 601a str r2, [r3, #0] + 80046e6: 4b10 ldr r3, [pc, #64] @ (8004728 ) + 80046e8: 2200 movs r2, #0 + 80046ea: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004578: f7fd ffda bl 8002530 - 800457c: 6138 str r0, [r7, #16] + 80046ec: f7fd ffda bl 80026a4 + 80046f0: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 800457e: e008 b.n 8004592 + 80046f2: e008 b.n 8004706 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8004580: f7fd ffd6 bl 8002530 - 8004584: 4602 mov r2, r0 - 8004586: 693b ldr r3, [r7, #16] - 8004588: 1ad3 subs r3, r2, r3 - 800458a: 2b02 cmp r3, #2 - 800458c: d901 bls.n 8004592 + 80046f4: f7fd ffd6 bl 80026a4 + 80046f8: 4602 mov r2, r0 + 80046fa: 693b ldr r3, [r7, #16] + 80046fc: 1ad3 subs r3, r2, r3 + 80046fe: 2b02 cmp r3, #2 + 8004700: d901 bls.n 8004706 { return HAL_TIMEOUT; - 800458e: 2303 movs r3, #3 - 8004590: e026 b.n 80045e0 + 8004702: 2303 movs r3, #3 + 8004704: e026 b.n 8004754 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8004592: 4b06 ldr r3, [pc, #24] @ (80045ac ) - 8004594: 681b ldr r3, [r3, #0] - 8004596: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 800459a: 2b00 cmp r3, #0 - 800459c: d1f0 bne.n 8004580 - 800459e: e01e b.n 80045de + 8004706: 4b06 ldr r3, [pc, #24] @ (8004720 ) + 8004708: 681b ldr r3, [r3, #0] + 800470a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 800470e: 2b00 cmp r3, #0 + 8004710: d1f0 bne.n 80046f4 + 8004712: e01e b.n 8004752 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 80045a0: 687b ldr r3, [r7, #4] - 80045a2: 69db ldr r3, [r3, #28] - 80045a4: 2b01 cmp r3, #1 - 80045a6: d107 bne.n 80045b8 + 8004714: 687b ldr r3, [r7, #4] + 8004716: 69db ldr r3, [r3, #28] + 8004718: 2b01 cmp r3, #1 + 800471a: d107 bne.n 800472c { return HAL_ERROR; - 80045a8: 2301 movs r3, #1 - 80045aa: e019 b.n 80045e0 - 80045ac: 40021000 .word 0x40021000 - 80045b0: 40007000 .word 0x40007000 - 80045b4: 42420060 .word 0x42420060 + 800471c: 2301 movs r3, #1 + 800471e: e019 b.n 8004754 + 8004720: 40021000 .word 0x40021000 + 8004724: 40007000 .word 0x40007000 + 8004728: 42420060 .word 0x42420060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 80045b8: 4b0b ldr r3, [pc, #44] @ (80045e8 ) - 80045ba: 685b ldr r3, [r3, #4] - 80045bc: 60fb str r3, [r7, #12] + 800472c: 4b0b ldr r3, [pc, #44] @ (800475c ) + 800472e: 685b ldr r3, [r3, #4] + 8004730: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80045be: 68fb ldr r3, [r7, #12] - 80045c0: f403 3280 and.w r2, r3, #65536 @ 0x10000 - 80045c4: 687b ldr r3, [r7, #4] - 80045c6: 6a1b ldr r3, [r3, #32] - 80045c8: 429a cmp r2, r3 - 80045ca: d106 bne.n 80045da + 8004732: 68fb ldr r3, [r7, #12] + 8004734: f403 3280 and.w r2, r3, #65536 @ 0x10000 + 8004738: 687b ldr r3, [r7, #4] + 800473a: 6a1b ldr r3, [r3, #32] + 800473c: 429a cmp r2, r3 + 800473e: d106 bne.n 800474e (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) - 80045cc: 68fb ldr r3, [r7, #12] - 80045ce: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 - 80045d2: 687b ldr r3, [r7, #4] - 80045d4: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004740: 68fb ldr r3, [r7, #12] + 8004742: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 + 8004746: 687b ldr r3, [r7, #4] + 8004748: 6a5b ldr r3, [r3, #36] @ 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 80045d6: 429a cmp r2, r3 - 80045d8: d001 beq.n 80045de + 800474a: 429a cmp r2, r3 + 800474c: d001 beq.n 8004752 { return HAL_ERROR; - 80045da: 2301 movs r3, #1 - 80045dc: e000 b.n 80045e0 + 800474e: 2301 movs r3, #1 + 8004750: e000 b.n 8004754 } } } } return HAL_OK; - 80045de: 2300 movs r3, #0 + 8004752: 2300 movs r3, #0 } - 80045e0: 4618 mov r0, r3 - 80045e2: 3718 adds r7, #24 - 80045e4: 46bd mov sp, r7 - 80045e6: bd80 pop {r7, pc} - 80045e8: 40021000 .word 0x40021000 + 8004754: 4618 mov r0, r3 + 8004756: 3718 adds r7, #24 + 8004758: 46bd mov sp, r7 + 800475a: bd80 pop {r7, pc} + 800475c: 40021000 .word 0x40021000 -080045ec : +08004760 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 80045ec: b580 push {r7, lr} - 80045ee: b084 sub sp, #16 - 80045f0: af00 add r7, sp, #0 - 80045f2: 6078 str r0, [r7, #4] - 80045f4: 6039 str r1, [r7, #0] + 8004760: b580 push {r7, lr} + 8004762: b084 sub sp, #16 + 8004764: af00 add r7, sp, #0 + 8004766: 6078 str r0, [r7, #4] + 8004768: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) - 80045f6: 687b ldr r3, [r7, #4] - 80045f8: 2b00 cmp r3, #0 - 80045fa: d101 bne.n 8004600 + 800476a: 687b ldr r3, [r7, #4] + 800476c: 2b00 cmp r3, #0 + 800476e: d101 bne.n 8004774 { return HAL_ERROR; - 80045fc: 2301 movs r3, #1 - 80045fe: e0d0 b.n 80047a2 + 8004770: 2301 movs r3, #1 + 8004772: e0d0 b.n 8004916 must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) - 8004600: 4b6a ldr r3, [pc, #424] @ (80047ac ) - 8004602: 681b ldr r3, [r3, #0] - 8004604: f003 0307 and.w r3, r3, #7 - 8004608: 683a ldr r2, [r7, #0] - 800460a: 429a cmp r2, r3 - 800460c: d910 bls.n 8004630 + 8004774: 4b6a ldr r3, [pc, #424] @ (8004920 ) + 8004776: 681b ldr r3, [r3, #0] + 8004778: f003 0307 and.w r3, r3, #7 + 800477c: 683a ldr r2, [r7, #0] + 800477e: 429a cmp r2, r3 + 8004780: d910 bls.n 80047a4 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 800460e: 4b67 ldr r3, [pc, #412] @ (80047ac ) - 8004610: 681b ldr r3, [r3, #0] - 8004612: f023 0207 bic.w r2, r3, #7 - 8004616: 4965 ldr r1, [pc, #404] @ (80047ac ) - 8004618: 683b ldr r3, [r7, #0] - 800461a: 4313 orrs r3, r2 - 800461c: 600b str r3, [r1, #0] + 8004782: 4b67 ldr r3, [pc, #412] @ (8004920 ) + 8004784: 681b ldr r3, [r3, #0] + 8004786: f023 0207 bic.w r2, r3, #7 + 800478a: 4965 ldr r1, [pc, #404] @ (8004920 ) + 800478c: 683b ldr r3, [r7, #0] + 800478e: 4313 orrs r3, r2 + 8004790: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 800461e: 4b63 ldr r3, [pc, #396] @ (80047ac ) - 8004620: 681b ldr r3, [r3, #0] - 8004622: f003 0307 and.w r3, r3, #7 - 8004626: 683a ldr r2, [r7, #0] - 8004628: 429a cmp r2, r3 - 800462a: d001 beq.n 8004630 + 8004792: 4b63 ldr r3, [pc, #396] @ (8004920 ) + 8004794: 681b ldr r3, [r3, #0] + 8004796: f003 0307 and.w r3, r3, #7 + 800479a: 683a ldr r2, [r7, #0] + 800479c: 429a cmp r2, r3 + 800479e: d001 beq.n 80047a4 { return HAL_ERROR; - 800462c: 2301 movs r3, #1 - 800462e: e0b8 b.n 80047a2 + 80047a0: 2301 movs r3, #1 + 80047a2: e0b8 b.n 8004916 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8004630: 687b ldr r3, [r7, #4] - 8004632: 681b ldr r3, [r3, #0] - 8004634: f003 0302 and.w r3, r3, #2 - 8004638: 2b00 cmp r3, #0 - 800463a: d020 beq.n 800467e + 80047a4: 687b ldr r3, [r7, #4] + 80047a6: 681b ldr r3, [r3, #0] + 80047a8: f003 0302 and.w r3, r3, #2 + 80047ac: 2b00 cmp r3, #0 + 80047ae: d020 beq.n 80047f2 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 800463c: 687b ldr r3, [r7, #4] - 800463e: 681b ldr r3, [r3, #0] - 8004640: f003 0304 and.w r3, r3, #4 - 8004644: 2b00 cmp r3, #0 - 8004646: d005 beq.n 8004654 + 80047b0: 687b ldr r3, [r7, #4] + 80047b2: 681b ldr r3, [r3, #0] + 80047b4: f003 0304 and.w r3, r3, #4 + 80047b8: 2b00 cmp r3, #0 + 80047ba: d005 beq.n 80047c8 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); - 8004648: 4b59 ldr r3, [pc, #356] @ (80047b0 ) - 800464a: 685b ldr r3, [r3, #4] - 800464c: 4a58 ldr r2, [pc, #352] @ (80047b0 ) - 800464e: f443 63e0 orr.w r3, r3, #1792 @ 0x700 - 8004652: 6053 str r3, [r2, #4] + 80047bc: 4b59 ldr r3, [pc, #356] @ (8004924 ) + 80047be: 685b ldr r3, [r3, #4] + 80047c0: 4a58 ldr r2, [pc, #352] @ (8004924 ) + 80047c2: f443 63e0 orr.w r3, r3, #1792 @ 0x700 + 80047c6: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8004654: 687b ldr r3, [r7, #4] - 8004656: 681b ldr r3, [r3, #0] - 8004658: f003 0308 and.w r3, r3, #8 - 800465c: 2b00 cmp r3, #0 - 800465e: d005 beq.n 800466c + 80047c8: 687b ldr r3, [r7, #4] + 80047ca: 681b ldr r3, [r3, #0] + 80047cc: f003 0308 and.w r3, r3, #8 + 80047d0: 2b00 cmp r3, #0 + 80047d2: d005 beq.n 80047e0 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); - 8004660: 4b53 ldr r3, [pc, #332] @ (80047b0 ) - 8004662: 685b ldr r3, [r3, #4] - 8004664: 4a52 ldr r2, [pc, #328] @ (80047b0 ) - 8004666: f443 5360 orr.w r3, r3, #14336 @ 0x3800 - 800466a: 6053 str r3, [r2, #4] + 80047d4: 4b53 ldr r3, [pc, #332] @ (8004924 ) + 80047d6: 685b ldr r3, [r3, #4] + 80047d8: 4a52 ldr r2, [pc, #328] @ (8004924 ) + 80047da: f443 5360 orr.w r3, r3, #14336 @ 0x3800 + 80047de: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 800466c: 4b50 ldr r3, [pc, #320] @ (80047b0 ) - 800466e: 685b ldr r3, [r3, #4] - 8004670: f023 02f0 bic.w r2, r3, #240 @ 0xf0 - 8004674: 687b ldr r3, [r7, #4] - 8004676: 689b ldr r3, [r3, #8] - 8004678: 494d ldr r1, [pc, #308] @ (80047b0 ) - 800467a: 4313 orrs r3, r2 - 800467c: 604b str r3, [r1, #4] + 80047e0: 4b50 ldr r3, [pc, #320] @ (8004924 ) + 80047e2: 685b ldr r3, [r3, #4] + 80047e4: f023 02f0 bic.w r2, r3, #240 @ 0xf0 + 80047e8: 687b ldr r3, [r7, #4] + 80047ea: 689b ldr r3, [r3, #8] + 80047ec: 494d ldr r1, [pc, #308] @ (8004924 ) + 80047ee: 4313 orrs r3, r2 + 80047f0: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 800467e: 687b ldr r3, [r7, #4] - 8004680: 681b ldr r3, [r3, #0] - 8004682: f003 0301 and.w r3, r3, #1 - 8004686: 2b00 cmp r3, #0 - 8004688: d040 beq.n 800470c + 80047f2: 687b ldr r3, [r7, #4] + 80047f4: 681b ldr r3, [r3, #0] + 80047f6: f003 0301 and.w r3, r3, #1 + 80047fa: 2b00 cmp r3, #0 + 80047fc: d040 beq.n 8004880 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 800468a: 687b ldr r3, [r7, #4] - 800468c: 685b ldr r3, [r3, #4] - 800468e: 2b01 cmp r3, #1 - 8004690: d107 bne.n 80046a2 + 80047fe: 687b ldr r3, [r7, #4] + 8004800: 685b ldr r3, [r3, #4] + 8004802: 2b01 cmp r3, #1 + 8004804: d107 bne.n 8004816 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8004692: 4b47 ldr r3, [pc, #284] @ (80047b0 ) - 8004694: 681b ldr r3, [r3, #0] - 8004696: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 800469a: 2b00 cmp r3, #0 - 800469c: d115 bne.n 80046ca + 8004806: 4b47 ldr r3, [pc, #284] @ (8004924 ) + 8004808: 681b ldr r3, [r3, #0] + 800480a: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 800480e: 2b00 cmp r3, #0 + 8004810: d115 bne.n 800483e { return HAL_ERROR; - 800469e: 2301 movs r3, #1 - 80046a0: e07f b.n 80047a2 + 8004812: 2301 movs r3, #1 + 8004814: e07f b.n 8004916 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 80046a2: 687b ldr r3, [r7, #4] - 80046a4: 685b ldr r3, [r3, #4] - 80046a6: 2b02 cmp r3, #2 - 80046a8: d107 bne.n 80046ba + 8004816: 687b ldr r3, [r7, #4] + 8004818: 685b ldr r3, [r3, #4] + 800481a: 2b02 cmp r3, #2 + 800481c: d107 bne.n 800482e { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 80046aa: 4b41 ldr r3, [pc, #260] @ (80047b0 ) - 80046ac: 681b ldr r3, [r3, #0] - 80046ae: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 80046b2: 2b00 cmp r3, #0 - 80046b4: d109 bne.n 80046ca + 800481e: 4b41 ldr r3, [pc, #260] @ (8004924 ) + 8004820: 681b ldr r3, [r3, #0] + 8004822: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8004826: 2b00 cmp r3, #0 + 8004828: d109 bne.n 800483e { return HAL_ERROR; - 80046b6: 2301 movs r3, #1 - 80046b8: e073 b.n 80047a2 + 800482a: 2301 movs r3, #1 + 800482c: e073 b.n 8004916 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 80046ba: 4b3d ldr r3, [pc, #244] @ (80047b0 ) - 80046bc: 681b ldr r3, [r3, #0] - 80046be: f003 0302 and.w r3, r3, #2 - 80046c2: 2b00 cmp r3, #0 - 80046c4: d101 bne.n 80046ca + 800482e: 4b3d ldr r3, [pc, #244] @ (8004924 ) + 8004830: 681b ldr r3, [r3, #0] + 8004832: f003 0302 and.w r3, r3, #2 + 8004836: 2b00 cmp r3, #0 + 8004838: d101 bne.n 800483e { return HAL_ERROR; - 80046c6: 2301 movs r3, #1 - 80046c8: e06b b.n 80047a2 + 800483a: 2301 movs r3, #1 + 800483c: e06b b.n 8004916 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 80046ca: 4b39 ldr r3, [pc, #228] @ (80047b0 ) - 80046cc: 685b ldr r3, [r3, #4] - 80046ce: f023 0203 bic.w r2, r3, #3 - 80046d2: 687b ldr r3, [r7, #4] - 80046d4: 685b ldr r3, [r3, #4] - 80046d6: 4936 ldr r1, [pc, #216] @ (80047b0 ) - 80046d8: 4313 orrs r3, r2 - 80046da: 604b str r3, [r1, #4] + 800483e: 4b39 ldr r3, [pc, #228] @ (8004924 ) + 8004840: 685b ldr r3, [r3, #4] + 8004842: f023 0203 bic.w r2, r3, #3 + 8004846: 687b ldr r3, [r7, #4] + 8004848: 685b ldr r3, [r3, #4] + 800484a: 4936 ldr r1, [pc, #216] @ (8004924 ) + 800484c: 4313 orrs r3, r2 + 800484e: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80046dc: f7fd ff28 bl 8002530 - 80046e0: 60f8 str r0, [r7, #12] + 8004850: f7fd ff28 bl 80026a4 + 8004854: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80046e2: e00a b.n 80046fa + 8004856: e00a b.n 800486e { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 80046e4: f7fd ff24 bl 8002530 - 80046e8: 4602 mov r2, r0 - 80046ea: 68fb ldr r3, [r7, #12] - 80046ec: 1ad3 subs r3, r2, r3 - 80046ee: f241 3288 movw r2, #5000 @ 0x1388 - 80046f2: 4293 cmp r3, r2 - 80046f4: d901 bls.n 80046fa + 8004858: f7fd ff24 bl 80026a4 + 800485c: 4602 mov r2, r0 + 800485e: 68fb ldr r3, [r7, #12] + 8004860: 1ad3 subs r3, r2, r3 + 8004862: f241 3288 movw r2, #5000 @ 0x1388 + 8004866: 4293 cmp r3, r2 + 8004868: d901 bls.n 800486e { return HAL_TIMEOUT; - 80046f6: 2303 movs r3, #3 - 80046f8: e053 b.n 80047a2 + 800486a: 2303 movs r3, #3 + 800486c: e053 b.n 8004916 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 80046fa: 4b2d ldr r3, [pc, #180] @ (80047b0 ) - 80046fc: 685b ldr r3, [r3, #4] - 80046fe: f003 020c and.w r2, r3, #12 - 8004702: 687b ldr r3, [r7, #4] - 8004704: 685b ldr r3, [r3, #4] - 8004706: 009b lsls r3, r3, #2 - 8004708: 429a cmp r2, r3 - 800470a: d1eb bne.n 80046e4 + 800486e: 4b2d ldr r3, [pc, #180] @ (8004924 ) + 8004870: 685b ldr r3, [r3, #4] + 8004872: f003 020c and.w r2, r3, #12 + 8004876: 687b ldr r3, [r7, #4] + 8004878: 685b ldr r3, [r3, #4] + 800487a: 009b lsls r3, r3, #2 + 800487c: 429a cmp r2, r3 + 800487e: d1eb bne.n 8004858 } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) - 800470c: 4b27 ldr r3, [pc, #156] @ (80047ac ) - 800470e: 681b ldr r3, [r3, #0] - 8004710: f003 0307 and.w r3, r3, #7 - 8004714: 683a ldr r2, [r7, #0] - 8004716: 429a cmp r2, r3 - 8004718: d210 bcs.n 800473c + 8004880: 4b27 ldr r3, [pc, #156] @ (8004920 ) + 8004882: 681b ldr r3, [r3, #0] + 8004884: f003 0307 and.w r3, r3, #7 + 8004888: 683a ldr r2, [r7, #0] + 800488a: 429a cmp r2, r3 + 800488c: d210 bcs.n 80048b0 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 800471a: 4b24 ldr r3, [pc, #144] @ (80047ac ) - 800471c: 681b ldr r3, [r3, #0] - 800471e: f023 0207 bic.w r2, r3, #7 - 8004722: 4922 ldr r1, [pc, #136] @ (80047ac ) - 8004724: 683b ldr r3, [r7, #0] - 8004726: 4313 orrs r3, r2 - 8004728: 600b str r3, [r1, #0] + 800488e: 4b24 ldr r3, [pc, #144] @ (8004920 ) + 8004890: 681b ldr r3, [r3, #0] + 8004892: f023 0207 bic.w r2, r3, #7 + 8004896: 4922 ldr r1, [pc, #136] @ (8004920 ) + 8004898: 683b ldr r3, [r7, #0] + 800489a: 4313 orrs r3, r2 + 800489c: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 800472a: 4b20 ldr r3, [pc, #128] @ (80047ac ) - 800472c: 681b ldr r3, [r3, #0] - 800472e: f003 0307 and.w r3, r3, #7 - 8004732: 683a ldr r2, [r7, #0] - 8004734: 429a cmp r2, r3 - 8004736: d001 beq.n 800473c + 800489e: 4b20 ldr r3, [pc, #128] @ (8004920 ) + 80048a0: 681b ldr r3, [r3, #0] + 80048a2: f003 0307 and.w r3, r3, #7 + 80048a6: 683a ldr r2, [r7, #0] + 80048a8: 429a cmp r2, r3 + 80048aa: d001 beq.n 80048b0 { return HAL_ERROR; - 8004738: 2301 movs r3, #1 - 800473a: e032 b.n 80047a2 + 80048ac: 2301 movs r3, #1 + 80048ae: e032 b.n 8004916 } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 800473c: 687b ldr r3, [r7, #4] - 800473e: 681b ldr r3, [r3, #0] - 8004740: f003 0304 and.w r3, r3, #4 - 8004744: 2b00 cmp r3, #0 - 8004746: d008 beq.n 800475a + 80048b0: 687b ldr r3, [r7, #4] + 80048b2: 681b ldr r3, [r3, #0] + 80048b4: f003 0304 and.w r3, r3, #4 + 80048b8: 2b00 cmp r3, #0 + 80048ba: d008 beq.n 80048ce { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8004748: 4b19 ldr r3, [pc, #100] @ (80047b0 ) - 800474a: 685b ldr r3, [r3, #4] - 800474c: f423 62e0 bic.w r2, r3, #1792 @ 0x700 - 8004750: 687b ldr r3, [r7, #4] - 8004752: 68db ldr r3, [r3, #12] - 8004754: 4916 ldr r1, [pc, #88] @ (80047b0 ) - 8004756: 4313 orrs r3, r2 - 8004758: 604b str r3, [r1, #4] + 80048bc: 4b19 ldr r3, [pc, #100] @ (8004924 ) + 80048be: 685b ldr r3, [r3, #4] + 80048c0: f423 62e0 bic.w r2, r3, #1792 @ 0x700 + 80048c4: 687b ldr r3, [r7, #4] + 80048c6: 68db ldr r3, [r3, #12] + 80048c8: 4916 ldr r1, [pc, #88] @ (8004924 ) + 80048ca: 4313 orrs r3, r2 + 80048cc: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 800475a: 687b ldr r3, [r7, #4] - 800475c: 681b ldr r3, [r3, #0] - 800475e: f003 0308 and.w r3, r3, #8 - 8004762: 2b00 cmp r3, #0 - 8004764: d009 beq.n 800477a + 80048ce: 687b ldr r3, [r7, #4] + 80048d0: 681b ldr r3, [r3, #0] + 80048d2: f003 0308 and.w r3, r3, #8 + 80048d6: 2b00 cmp r3, #0 + 80048d8: d009 beq.n 80048ee { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); - 8004766: 4b12 ldr r3, [pc, #72] @ (80047b0 ) - 8004768: 685b ldr r3, [r3, #4] - 800476a: f423 5260 bic.w r2, r3, #14336 @ 0x3800 - 800476e: 687b ldr r3, [r7, #4] - 8004770: 691b ldr r3, [r3, #16] - 8004772: 00db lsls r3, r3, #3 - 8004774: 490e ldr r1, [pc, #56] @ (80047b0 ) - 8004776: 4313 orrs r3, r2 - 8004778: 604b str r3, [r1, #4] + 80048da: 4b12 ldr r3, [pc, #72] @ (8004924 ) + 80048dc: 685b ldr r3, [r3, #4] + 80048de: f423 5260 bic.w r2, r3, #14336 @ 0x3800 + 80048e2: 687b ldr r3, [r7, #4] + 80048e4: 691b ldr r3, [r3, #16] + 80048e6: 00db lsls r3, r3, #3 + 80048e8: 490e ldr r1, [pc, #56] @ (8004924 ) + 80048ea: 4313 orrs r3, r2 + 80048ec: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; - 800477a: f000 f821 bl 80047c0 - 800477e: 4602 mov r2, r0 - 8004780: 4b0b ldr r3, [pc, #44] @ (80047b0 ) - 8004782: 685b ldr r3, [r3, #4] - 8004784: 091b lsrs r3, r3, #4 - 8004786: f003 030f and.w r3, r3, #15 - 800478a: 490a ldr r1, [pc, #40] @ (80047b4 ) - 800478c: 5ccb ldrb r3, [r1, r3] - 800478e: fa22 f303 lsr.w r3, r2, r3 - 8004792: 4a09 ldr r2, [pc, #36] @ (80047b8 ) - 8004794: 6013 str r3, [r2, #0] + 80048ee: f000 f821 bl 8004934 + 80048f2: 4602 mov r2, r0 + 80048f4: 4b0b ldr r3, [pc, #44] @ (8004924 ) + 80048f6: 685b ldr r3, [r3, #4] + 80048f8: 091b lsrs r3, r3, #4 + 80048fa: f003 030f and.w r3, r3, #15 + 80048fe: 490a ldr r1, [pc, #40] @ (8004928 ) + 8004900: 5ccb ldrb r3, [r1, r3] + 8004902: fa22 f303 lsr.w r3, r2, r3 + 8004906: 4a09 ldr r2, [pc, #36] @ (800492c ) + 8004908: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); - 8004796: 4b09 ldr r3, [pc, #36] @ (80047bc ) - 8004798: 681b ldr r3, [r3, #0] - 800479a: 4618 mov r0, r3 - 800479c: f7fd fe86 bl 80024ac + 800490a: 4b09 ldr r3, [pc, #36] @ (8004930 ) + 800490c: 681b ldr r3, [r3, #0] + 800490e: 4618 mov r0, r3 + 8004910: f7fd fe86 bl 8002620 return HAL_OK; - 80047a0: 2300 movs r3, #0 + 8004914: 2300 movs r3, #0 } - 80047a2: 4618 mov r0, r3 - 80047a4: 3710 adds r7, #16 - 80047a6: 46bd mov sp, r7 - 80047a8: bd80 pop {r7, pc} - 80047aa: bf00 nop - 80047ac: 40022000 .word 0x40022000 - 80047b0: 40021000 .word 0x40021000 - 80047b4: 0800612c .word 0x0800612c - 80047b8: 20000008 .word 0x20000008 - 80047bc: 2000000c .word 0x2000000c + 8004916: 4618 mov r0, r3 + 8004918: 3710 adds r7, #16 + 800491a: 46bd mov sp, r7 + 800491c: bd80 pop {r7, pc} + 800491e: bf00 nop + 8004920: 40022000 .word 0x40022000 + 8004924: 40021000 .word 0x40021000 + 8004928: 080062a0 .word 0x080062a0 + 800492c: 20000004 .word 0x20000004 + 8004930: 20000008 .word 0x20000008 -080047c0 : +08004934 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 80047c0: b480 push {r7} - 80047c2: b087 sub sp, #28 - 80047c4: af00 add r7, sp, #0 + 8004934: b480 push {r7} + 8004936: b087 sub sp, #28 + 8004938: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; - 80047c6: 2300 movs r3, #0 - 80047c8: 60fb str r3, [r7, #12] - 80047ca: 2300 movs r3, #0 - 80047cc: 60bb str r3, [r7, #8] - 80047ce: 2300 movs r3, #0 - 80047d0: 617b str r3, [r7, #20] - 80047d2: 2300 movs r3, #0 - 80047d4: 607b str r3, [r7, #4] + 800493a: 2300 movs r3, #0 + 800493c: 60fb str r3, [r7, #12] + 800493e: 2300 movs r3, #0 + 8004940: 60bb str r3, [r7, #8] + 8004942: 2300 movs r3, #0 + 8004944: 617b str r3, [r7, #20] + 8004946: 2300 movs r3, #0 + 8004948: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; - 80047d6: 2300 movs r3, #0 - 80047d8: 613b str r3, [r7, #16] + 800494a: 2300 movs r3, #0 + 800494c: 613b str r3, [r7, #16] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; - 80047da: 4b1e ldr r3, [pc, #120] @ (8004854 ) - 80047dc: 685b ldr r3, [r3, #4] - 80047de: 60fb str r3, [r7, #12] + 800494e: 4b1e ldr r3, [pc, #120] @ (80049c8 ) + 8004950: 685b ldr r3, [r3, #4] + 8004952: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 80047e0: 68fb ldr r3, [r7, #12] - 80047e2: f003 030c and.w r3, r3, #12 - 80047e6: 2b04 cmp r3, #4 - 80047e8: d002 beq.n 80047f0 - 80047ea: 2b08 cmp r3, #8 - 80047ec: d003 beq.n 80047f6 - 80047ee: e027 b.n 8004840 + 8004954: 68fb ldr r3, [r7, #12] + 8004956: f003 030c and.w r3, r3, #12 + 800495a: 2b04 cmp r3, #4 + 800495c: d002 beq.n 8004964 + 800495e: 2b08 cmp r3, #8 + 8004960: d003 beq.n 800496a + 8004962: e027 b.n 80049b4 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 80047f0: 4b19 ldr r3, [pc, #100] @ (8004858 ) - 80047f2: 613b str r3, [r7, #16] + 8004964: 4b19 ldr r3, [pc, #100] @ (80049cc ) + 8004966: 613b str r3, [r7, #16] break; - 80047f4: e027 b.n 8004846 + 8004968: e027 b.n 80049ba } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; - 80047f6: 68fb ldr r3, [r7, #12] - 80047f8: 0c9b lsrs r3, r3, #18 - 80047fa: f003 030f and.w r3, r3, #15 - 80047fe: 4a17 ldr r2, [pc, #92] @ (800485c ) - 8004800: 5cd3 ldrb r3, [r2, r3] - 8004802: 607b str r3, [r7, #4] + 800496a: 68fb ldr r3, [r7, #12] + 800496c: 0c9b lsrs r3, r3, #18 + 800496e: f003 030f and.w r3, r3, #15 + 8004972: 4a17 ldr r2, [pc, #92] @ (80049d0 ) + 8004974: 5cd3 ldrb r3, [r2, r3] + 8004976: 607b str r3, [r7, #4] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) - 8004804: 68fb ldr r3, [r7, #12] - 8004806: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 800480a: 2b00 cmp r3, #0 - 800480c: d010 beq.n 8004830 + 8004978: 68fb ldr r3, [r7, #12] + 800497a: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 800497e: 2b00 cmp r3, #0 + 8004980: d010 beq.n 80049a4 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; - 800480e: 4b11 ldr r3, [pc, #68] @ (8004854 ) - 8004810: 685b ldr r3, [r3, #4] - 8004812: 0c5b lsrs r3, r3, #17 - 8004814: f003 0301 and.w r3, r3, #1 - 8004818: 4a11 ldr r2, [pc, #68] @ (8004860 ) - 800481a: 5cd3 ldrb r3, [r2, r3] - 800481c: 60bb str r3, [r7, #8] + 8004982: 4b11 ldr r3, [pc, #68] @ (80049c8 ) + 8004984: 685b ldr r3, [r3, #4] + 8004986: 0c5b lsrs r3, r3, #17 + 8004988: f003 0301 and.w r3, r3, #1 + 800498c: 4a11 ldr r2, [pc, #68] @ (80049d4 ) + 800498e: 5cd3 ldrb r3, [r2, r3] + 8004990: 60bb str r3, [r7, #8] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); - 800481e: 687b ldr r3, [r7, #4] - 8004820: 4a0d ldr r2, [pc, #52] @ (8004858 ) - 8004822: fb03 f202 mul.w r2, r3, r2 - 8004826: 68bb ldr r3, [r7, #8] - 8004828: fbb2 f3f3 udiv r3, r2, r3 - 800482c: 617b str r3, [r7, #20] - 800482e: e004 b.n 800483a + 8004992: 687b ldr r3, [r7, #4] + 8004994: 4a0d ldr r2, [pc, #52] @ (80049cc ) + 8004996: fb03 f202 mul.w r2, r3, r2 + 800499a: 68bb ldr r3, [r7, #8] + 800499c: fbb2 f3f3 udiv r3, r2, r3 + 80049a0: 617b str r3, [r7, #20] + 80049a2: e004 b.n 80049ae #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); - 8004830: 687b ldr r3, [r7, #4] - 8004832: 4a0c ldr r2, [pc, #48] @ (8004864 ) - 8004834: fb02 f303 mul.w r3, r2, r3 - 8004838: 617b str r3, [r7, #20] + 80049a4: 687b ldr r3, [r7, #4] + 80049a6: 4a0c ldr r2, [pc, #48] @ (80049d8 ) + 80049a8: fb02 f303 mul.w r3, r2, r3 + 80049ac: 617b str r3, [r7, #20] } sysclockfreq = pllclk; - 800483a: 697b ldr r3, [r7, #20] - 800483c: 613b str r3, [r7, #16] + 80049ae: 697b ldr r3, [r7, #20] + 80049b0: 613b str r3, [r7, #16] break; - 800483e: e002 b.n 8004846 + 80049b2: e002 b.n 80049ba } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; - 8004840: 4b09 ldr r3, [pc, #36] @ (8004868 ) - 8004842: 613b str r3, [r7, #16] + 80049b4: 4b09 ldr r3, [pc, #36] @ (80049dc ) + 80049b6: 613b str r3, [r7, #16] break; - 8004844: bf00 nop + 80049b8: bf00 nop } } return sysclockfreq; - 8004846: 693b ldr r3, [r7, #16] + 80049ba: 693b ldr r3, [r7, #16] } - 8004848: 4618 mov r0, r3 - 800484a: 371c adds r7, #28 - 800484c: 46bd mov sp, r7 - 800484e: bc80 pop {r7} - 8004850: 4770 bx lr - 8004852: bf00 nop - 8004854: 40021000 .word 0x40021000 - 8004858: 00b71b00 .word 0x00b71b00 - 800485c: 08006144 .word 0x08006144 - 8004860: 08006154 .word 0x08006154 - 8004864: 003d0900 .word 0x003d0900 - 8004868: 007a1200 .word 0x007a1200 + 80049bc: 4618 mov r0, r3 + 80049be: 371c adds r7, #28 + 80049c0: 46bd mov sp, r7 + 80049c2: bc80 pop {r7} + 80049c4: 4770 bx lr + 80049c6: bf00 nop + 80049c8: 40021000 .word 0x40021000 + 80049cc: 00b71b00 .word 0x00b71b00 + 80049d0: 080062b8 .word 0x080062b8 + 80049d4: 080062c8 .word 0x080062c8 + 80049d8: 003d0900 .word 0x003d0900 + 80049dc: 007a1200 .word 0x007a1200 -0800486c : +080049e0 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 800486c: b480 push {r7} - 800486e: af00 add r7, sp, #0 + 80049e0: b480 push {r7} + 80049e2: af00 add r7, sp, #0 return SystemCoreClock; - 8004870: 4b02 ldr r3, [pc, #8] @ (800487c ) - 8004872: 681b ldr r3, [r3, #0] + 80049e4: 4b02 ldr r3, [pc, #8] @ (80049f0 ) + 80049e6: 681b ldr r3, [r3, #0] } - 8004874: 4618 mov r0, r3 - 8004876: 46bd mov sp, r7 - 8004878: bc80 pop {r7} - 800487a: 4770 bx lr - 800487c: 20000008 .word 0x20000008 + 80049e8: 4618 mov r0, r3 + 80049ea: 46bd mov sp, r7 + 80049ec: bc80 pop {r7} + 80049ee: 4770 bx lr + 80049f0: 20000004 .word 0x20000004 -08004880 : +080049f4 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 8004880: b580 push {r7, lr} - 8004882: af00 add r7, sp, #0 + 80049f4: b580 push {r7, lr} + 80049f6: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); - 8004884: f7ff fff2 bl 800486c - 8004888: 4602 mov r2, r0 - 800488a: 4b05 ldr r3, [pc, #20] @ (80048a0 ) - 800488c: 685b ldr r3, [r3, #4] - 800488e: 0a1b lsrs r3, r3, #8 - 8004890: f003 0307 and.w r3, r3, #7 - 8004894: 4903 ldr r1, [pc, #12] @ (80048a4 ) - 8004896: 5ccb ldrb r3, [r1, r3] - 8004898: fa22 f303 lsr.w r3, r2, r3 + 80049f8: f7ff fff2 bl 80049e0 + 80049fc: 4602 mov r2, r0 + 80049fe: 4b05 ldr r3, [pc, #20] @ (8004a14 ) + 8004a00: 685b ldr r3, [r3, #4] + 8004a02: 0a1b lsrs r3, r3, #8 + 8004a04: f003 0307 and.w r3, r3, #7 + 8004a08: 4903 ldr r1, [pc, #12] @ (8004a18 ) + 8004a0a: 5ccb ldrb r3, [r1, r3] + 8004a0c: fa22 f303 lsr.w r3, r2, r3 } - 800489c: 4618 mov r0, r3 - 800489e: bd80 pop {r7, pc} - 80048a0: 40021000 .word 0x40021000 - 80048a4: 0800613c .word 0x0800613c + 8004a10: 4618 mov r0, r3 + 8004a12: bd80 pop {r7, pc} + 8004a14: 40021000 .word 0x40021000 + 8004a18: 080062b0 .word 0x080062b0 -080048a8 : +08004a1c : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 80048a8: b580 push {r7, lr} - 80048aa: af00 add r7, sp, #0 + 8004a1c: b580 push {r7, lr} + 8004a1e: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); - 80048ac: f7ff ffde bl 800486c - 80048b0: 4602 mov r2, r0 - 80048b2: 4b05 ldr r3, [pc, #20] @ (80048c8 ) - 80048b4: 685b ldr r3, [r3, #4] - 80048b6: 0adb lsrs r3, r3, #11 - 80048b8: f003 0307 and.w r3, r3, #7 - 80048bc: 4903 ldr r1, [pc, #12] @ (80048cc ) - 80048be: 5ccb ldrb r3, [r1, r3] - 80048c0: fa22 f303 lsr.w r3, r2, r3 + 8004a20: f7ff ffde bl 80049e0 + 8004a24: 4602 mov r2, r0 + 8004a26: 4b05 ldr r3, [pc, #20] @ (8004a3c ) + 8004a28: 685b ldr r3, [r3, #4] + 8004a2a: 0adb lsrs r3, r3, #11 + 8004a2c: f003 0307 and.w r3, r3, #7 + 8004a30: 4903 ldr r1, [pc, #12] @ (8004a40 ) + 8004a32: 5ccb ldrb r3, [r1, r3] + 8004a34: fa22 f303 lsr.w r3, r2, r3 } - 80048c4: 4618 mov r0, r3 - 80048c6: bd80 pop {r7, pc} - 80048c8: 40021000 .word 0x40021000 - 80048cc: 0800613c .word 0x0800613c + 8004a38: 4618 mov r0, r3 + 8004a3a: bd80 pop {r7, pc} + 8004a3c: 40021000 .word 0x40021000 + 8004a40: 080062b0 .word 0x080062b0 -080048d0 : +08004a44 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { - 80048d0: b480 push {r7} - 80048d2: b085 sub sp, #20 - 80048d4: af00 add r7, sp, #0 - 80048d6: 6078 str r0, [r7, #4] + 8004a44: b480 push {r7} + 8004a46: b085 sub sp, #20 + 8004a48: af00 add r7, sp, #0 + 8004a4a: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); - 80048d8: 4b0a ldr r3, [pc, #40] @ (8004904 ) - 80048da: 681b ldr r3, [r3, #0] - 80048dc: 4a0a ldr r2, [pc, #40] @ (8004908 ) - 80048de: fba2 2303 umull r2, r3, r2, r3 - 80048e2: 0a5b lsrs r3, r3, #9 - 80048e4: 687a ldr r2, [r7, #4] - 80048e6: fb02 f303 mul.w r3, r2, r3 - 80048ea: 60fb str r3, [r7, #12] + 8004a4c: 4b0a ldr r3, [pc, #40] @ (8004a78 ) + 8004a4e: 681b ldr r3, [r3, #0] + 8004a50: 4a0a ldr r2, [pc, #40] @ (8004a7c ) + 8004a52: fba2 2303 umull r2, r3, r2, r3 + 8004a56: 0a5b lsrs r3, r3, #9 + 8004a58: 687a ldr r2, [r7, #4] + 8004a5a: fb02 f303 mul.w r3, r2, r3 + 8004a5e: 60fb str r3, [r7, #12] do { __NOP(); - 80048ec: bf00 nop + 8004a60: bf00 nop } while (Delay --); - 80048ee: 68fb ldr r3, [r7, #12] - 80048f0: 1e5a subs r2, r3, #1 - 80048f2: 60fa str r2, [r7, #12] - 80048f4: 2b00 cmp r3, #0 - 80048f6: d1f9 bne.n 80048ec + 8004a62: 68fb ldr r3, [r7, #12] + 8004a64: 1e5a subs r2, r3, #1 + 8004a66: 60fa str r2, [r7, #12] + 8004a68: 2b00 cmp r3, #0 + 8004a6a: d1f9 bne.n 8004a60 } - 80048f8: bf00 nop - 80048fa: bf00 nop - 80048fc: 3714 adds r7, #20 - 80048fe: 46bd mov sp, r7 - 8004900: bc80 pop {r7} - 8004902: 4770 bx lr - 8004904: 20000008 .word 0x20000008 - 8004908: 10624dd3 .word 0x10624dd3 + 8004a6c: bf00 nop + 8004a6e: bf00 nop + 8004a70: 3714 adds r7, #20 + 8004a72: 46bd mov sp, r7 + 8004a74: bc80 pop {r7} + 8004a76: 4770 bx lr + 8004a78: 20000004 .word 0x20000004 + 8004a7c: 10624dd3 .word 0x10624dd3 -0800490c : +08004a80 : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 800490c: b580 push {r7, lr} - 800490e: b086 sub sp, #24 - 8004910: af00 add r7, sp, #0 - 8004912: 6078 str r0, [r7, #4] + 8004a80: b580 push {r7, lr} + 8004a82: b086 sub sp, #24 + 8004a84: af00 add r7, sp, #0 + 8004a86: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; - 8004914: 2300 movs r3, #0 - 8004916: 613b str r3, [r7, #16] - 8004918: 2300 movs r3, #0 - 800491a: 60fb str r3, [r7, #12] + 8004a88: 2300 movs r3, #0 + 8004a8a: 613b str r3, [r7, #16] + 8004a8c: 2300 movs r3, #0 + 8004a8e: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) - 800491c: 687b ldr r3, [r7, #4] - 800491e: 681b ldr r3, [r3, #0] - 8004920: f003 0301 and.w r3, r3, #1 - 8004924: 2b00 cmp r3, #0 - 8004926: d07d beq.n 8004a24 + 8004a90: 687b ldr r3, [r7, #4] + 8004a92: 681b ldr r3, [r3, #0] + 8004a94: f003 0301 and.w r3, r3, #1 + 8004a98: 2b00 cmp r3, #0 + 8004a9a: d07d beq.n 8004b98 { FlagStatus pwrclkchanged = RESET; - 8004928: 2300 movs r3, #0 - 800492a: 75fb strb r3, [r7, #23] + 8004a9c: 2300 movs r3, #0 + 8004a9e: 75fb strb r3, [r7, #23] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 800492c: 4b4f ldr r3, [pc, #316] @ (8004a6c ) - 800492e: 69db ldr r3, [r3, #28] - 8004930: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8004934: 2b00 cmp r3, #0 - 8004936: d10d bne.n 8004954 + 8004aa0: 4b4f ldr r3, [pc, #316] @ (8004be0 ) + 8004aa2: 69db ldr r3, [r3, #28] + 8004aa4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8004aa8: 2b00 cmp r3, #0 + 8004aaa: d10d bne.n 8004ac8 { __HAL_RCC_PWR_CLK_ENABLE(); - 8004938: 4b4c ldr r3, [pc, #304] @ (8004a6c ) - 800493a: 69db ldr r3, [r3, #28] - 800493c: 4a4b ldr r2, [pc, #300] @ (8004a6c ) - 800493e: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8004942: 61d3 str r3, [r2, #28] - 8004944: 4b49 ldr r3, [pc, #292] @ (8004a6c ) - 8004946: 69db ldr r3, [r3, #28] - 8004948: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 800494c: 60bb str r3, [r7, #8] - 800494e: 68bb ldr r3, [r7, #8] + 8004aac: 4b4c ldr r3, [pc, #304] @ (8004be0 ) + 8004aae: 69db ldr r3, [r3, #28] + 8004ab0: 4a4b ldr r2, [pc, #300] @ (8004be0 ) + 8004ab2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8004ab6: 61d3 str r3, [r2, #28] + 8004ab8: 4b49 ldr r3, [pc, #292] @ (8004be0 ) + 8004aba: 69db ldr r3, [r3, #28] + 8004abc: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8004ac0: 60bb str r3, [r7, #8] + 8004ac2: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 8004950: 2301 movs r3, #1 - 8004952: 75fb strb r3, [r7, #23] + 8004ac4: 2301 movs r3, #1 + 8004ac6: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004954: 4b46 ldr r3, [pc, #280] @ (8004a70 ) - 8004956: 681b ldr r3, [r3, #0] - 8004958: f403 7380 and.w r3, r3, #256 @ 0x100 - 800495c: 2b00 cmp r3, #0 - 800495e: d118 bne.n 8004992 + 8004ac8: 4b46 ldr r3, [pc, #280] @ (8004be4 ) + 8004aca: 681b ldr r3, [r3, #0] + 8004acc: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004ad0: 2b00 cmp r3, #0 + 8004ad2: d118 bne.n 8004b06 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 8004960: 4b43 ldr r3, [pc, #268] @ (8004a70 ) - 8004962: 681b ldr r3, [r3, #0] - 8004964: 4a42 ldr r2, [pc, #264] @ (8004a70 ) - 8004966: f443 7380 orr.w r3, r3, #256 @ 0x100 - 800496a: 6013 str r3, [r2, #0] + 8004ad4: 4b43 ldr r3, [pc, #268] @ (8004be4 ) + 8004ad6: 681b ldr r3, [r3, #0] + 8004ad8: 4a42 ldr r2, [pc, #264] @ (8004be4 ) + 8004ada: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8004ade: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 800496c: f7fd fde0 bl 8002530 - 8004970: 6138 str r0, [r7, #16] + 8004ae0: f7fd fde0 bl 80026a4 + 8004ae4: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004972: e008 b.n 8004986 + 8004ae6: e008 b.n 8004afa { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8004974: f7fd fddc bl 8002530 - 8004978: 4602 mov r2, r0 - 800497a: 693b ldr r3, [r7, #16] - 800497c: 1ad3 subs r3, r2, r3 - 800497e: 2b64 cmp r3, #100 @ 0x64 - 8004980: d901 bls.n 8004986 + 8004ae8: f7fd fddc bl 80026a4 + 8004aec: 4602 mov r2, r0 + 8004aee: 693b ldr r3, [r7, #16] + 8004af0: 1ad3 subs r3, r2, r3 + 8004af2: 2b64 cmp r3, #100 @ 0x64 + 8004af4: d901 bls.n 8004afa { return HAL_TIMEOUT; - 8004982: 2303 movs r3, #3 - 8004984: e06d b.n 8004a62 + 8004af6: 2303 movs r3, #3 + 8004af8: e06d b.n 8004bd6 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004986: 4b3a ldr r3, [pc, #232] @ (8004a70 ) - 8004988: 681b ldr r3, [r3, #0] - 800498a: f403 7380 and.w r3, r3, #256 @ 0x100 - 800498e: 2b00 cmp r3, #0 - 8004990: d0f0 beq.n 8004974 + 8004afa: 4b3a ldr r3, [pc, #232] @ (8004be4 ) + 8004afc: 681b ldr r3, [r3, #0] + 8004afe: f403 7380 and.w r3, r3, #256 @ 0x100 + 8004b02: 2b00 cmp r3, #0 + 8004b04: d0f0 beq.n 8004ae8 } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); - 8004992: 4b36 ldr r3, [pc, #216] @ (8004a6c ) - 8004994: 6a1b ldr r3, [r3, #32] - 8004996: f403 7340 and.w r3, r3, #768 @ 0x300 - 800499a: 60fb str r3, [r7, #12] + 8004b06: 4b36 ldr r3, [pc, #216] @ (8004be0 ) + 8004b08: 6a1b ldr r3, [r3, #32] + 8004b0a: f403 7340 and.w r3, r3, #768 @ 0x300 + 8004b0e: 60fb str r3, [r7, #12] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) - 800499c: 68fb ldr r3, [r7, #12] - 800499e: 2b00 cmp r3, #0 - 80049a0: d02e beq.n 8004a00 - 80049a2: 687b ldr r3, [r7, #4] - 80049a4: 685b ldr r3, [r3, #4] - 80049a6: f403 7340 and.w r3, r3, #768 @ 0x300 - 80049aa: 68fa ldr r2, [r7, #12] - 80049ac: 429a cmp r2, r3 - 80049ae: d027 beq.n 8004a00 + 8004b10: 68fb ldr r3, [r7, #12] + 8004b12: 2b00 cmp r3, #0 + 8004b14: d02e beq.n 8004b74 + 8004b16: 687b ldr r3, [r7, #4] + 8004b18: 685b ldr r3, [r3, #4] + 8004b1a: f403 7340 and.w r3, r3, #768 @ 0x300 + 8004b1e: 68fa ldr r2, [r7, #12] + 8004b20: 429a cmp r2, r3 + 8004b22: d027 beq.n 8004b74 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); - 80049b0: 4b2e ldr r3, [pc, #184] @ (8004a6c ) - 80049b2: 6a1b ldr r3, [r3, #32] - 80049b4: f423 7340 bic.w r3, r3, #768 @ 0x300 - 80049b8: 60fb str r3, [r7, #12] + 8004b24: 4b2e ldr r3, [pc, #184] @ (8004be0 ) + 8004b26: 6a1b ldr r3, [r3, #32] + 8004b28: f423 7340 bic.w r3, r3, #768 @ 0x300 + 8004b2c: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); - 80049ba: 4b2e ldr r3, [pc, #184] @ (8004a74 ) - 80049bc: 2201 movs r2, #1 - 80049be: 601a str r2, [r3, #0] + 8004b2e: 4b2e ldr r3, [pc, #184] @ (8004be8 ) + 8004b30: 2201 movs r2, #1 + 8004b32: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); - 80049c0: 4b2c ldr r3, [pc, #176] @ (8004a74 ) - 80049c2: 2200 movs r2, #0 - 80049c4: 601a str r2, [r3, #0] + 8004b34: 4b2c ldr r3, [pc, #176] @ (8004be8 ) + 8004b36: 2200 movs r2, #0 + 8004b38: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; - 80049c6: 4a29 ldr r2, [pc, #164] @ (8004a6c ) - 80049c8: 68fb ldr r3, [r7, #12] - 80049ca: 6213 str r3, [r2, #32] + 8004b3a: 4a29 ldr r2, [pc, #164] @ (8004be0 ) + 8004b3c: 68fb ldr r3, [r7, #12] + 8004b3e: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) - 80049cc: 68fb ldr r3, [r7, #12] - 80049ce: f003 0301 and.w r3, r3, #1 - 80049d2: 2b00 cmp r3, #0 - 80049d4: d014 beq.n 8004a00 + 8004b40: 68fb ldr r3, [r7, #12] + 8004b42: f003 0301 and.w r3, r3, #1 + 8004b46: 2b00 cmp r3, #0 + 8004b48: d014 beq.n 8004b74 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80049d6: f7fd fdab bl 8002530 - 80049da: 6138 str r0, [r7, #16] + 8004b4a: f7fd fdab bl 80026a4 + 8004b4e: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 80049dc: e00a b.n 80049f4 + 8004b50: e00a b.n 8004b68 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 80049de: f7fd fda7 bl 8002530 - 80049e2: 4602 mov r2, r0 - 80049e4: 693b ldr r3, [r7, #16] - 80049e6: 1ad3 subs r3, r2, r3 - 80049e8: f241 3288 movw r2, #5000 @ 0x1388 - 80049ec: 4293 cmp r3, r2 - 80049ee: d901 bls.n 80049f4 + 8004b52: f7fd fda7 bl 80026a4 + 8004b56: 4602 mov r2, r0 + 8004b58: 693b ldr r3, [r7, #16] + 8004b5a: 1ad3 subs r3, r2, r3 + 8004b5c: f241 3288 movw r2, #5000 @ 0x1388 + 8004b60: 4293 cmp r3, r2 + 8004b62: d901 bls.n 8004b68 { return HAL_TIMEOUT; - 80049f0: 2303 movs r3, #3 - 80049f2: e036 b.n 8004a62 + 8004b64: 2303 movs r3, #3 + 8004b66: e036 b.n 8004bd6 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 80049f4: 4b1d ldr r3, [pc, #116] @ (8004a6c ) - 80049f6: 6a1b ldr r3, [r3, #32] - 80049f8: f003 0302 and.w r3, r3, #2 - 80049fc: 2b00 cmp r3, #0 - 80049fe: d0ee beq.n 80049de + 8004b68: 4b1d ldr r3, [pc, #116] @ (8004be0 ) + 8004b6a: 6a1b ldr r3, [r3, #32] + 8004b6c: f003 0302 and.w r3, r3, #2 + 8004b70: 2b00 cmp r3, #0 + 8004b72: d0ee beq.n 8004b52 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 8004a00: 4b1a ldr r3, [pc, #104] @ (8004a6c ) - 8004a02: 6a1b ldr r3, [r3, #32] - 8004a04: f423 7240 bic.w r2, r3, #768 @ 0x300 - 8004a08: 687b ldr r3, [r7, #4] - 8004a0a: 685b ldr r3, [r3, #4] - 8004a0c: 4917 ldr r1, [pc, #92] @ (8004a6c ) - 8004a0e: 4313 orrs r3, r2 - 8004a10: 620b str r3, [r1, #32] + 8004b74: 4b1a ldr r3, [pc, #104] @ (8004be0 ) + 8004b76: 6a1b ldr r3, [r3, #32] + 8004b78: f423 7240 bic.w r2, r3, #768 @ 0x300 + 8004b7c: 687b ldr r3, [r7, #4] + 8004b7e: 685b ldr r3, [r3, #4] + 8004b80: 4917 ldr r1, [pc, #92] @ (8004be0 ) + 8004b82: 4313 orrs r3, r2 + 8004b84: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) - 8004a12: 7dfb ldrb r3, [r7, #23] - 8004a14: 2b01 cmp r3, #1 - 8004a16: d105 bne.n 8004a24 + 8004b86: 7dfb ldrb r3, [r7, #23] + 8004b88: 2b01 cmp r3, #1 + 8004b8a: d105 bne.n 8004b98 { __HAL_RCC_PWR_CLK_DISABLE(); - 8004a18: 4b14 ldr r3, [pc, #80] @ (8004a6c ) - 8004a1a: 69db ldr r3, [r3, #28] - 8004a1c: 4a13 ldr r2, [pc, #76] @ (8004a6c ) - 8004a1e: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 8004a22: 61d3 str r3, [r2, #28] + 8004b8c: 4b14 ldr r3, [pc, #80] @ (8004be0 ) + 8004b8e: 69db ldr r3, [r3, #28] + 8004b90: 4a13 ldr r2, [pc, #76] @ (8004be0 ) + 8004b92: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 8004b96: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - 8004a24: 687b ldr r3, [r7, #4] - 8004a26: 681b ldr r3, [r3, #0] - 8004a28: f003 0302 and.w r3, r3, #2 - 8004a2c: 2b00 cmp r3, #0 - 8004a2e: d008 beq.n 8004a42 + 8004b98: 687b ldr r3, [r7, #4] + 8004b9a: 681b ldr r3, [r3, #0] + 8004b9c: f003 0302 and.w r3, r3, #2 + 8004ba0: 2b00 cmp r3, #0 + 8004ba2: d008 beq.n 8004bb6 { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - 8004a30: 4b0e ldr r3, [pc, #56] @ (8004a6c ) - 8004a32: 685b ldr r3, [r3, #4] - 8004a34: f423 4240 bic.w r2, r3, #49152 @ 0xc000 - 8004a38: 687b ldr r3, [r7, #4] - 8004a3a: 689b ldr r3, [r3, #8] - 8004a3c: 490b ldr r1, [pc, #44] @ (8004a6c ) - 8004a3e: 4313 orrs r3, r2 - 8004a40: 604b str r3, [r1, #4] + 8004ba4: 4b0e ldr r3, [pc, #56] @ (8004be0 ) + 8004ba6: 685b ldr r3, [r3, #4] + 8004ba8: f423 4240 bic.w r2, r3, #49152 @ 0xc000 + 8004bac: 687b ldr r3, [r7, #4] + 8004bae: 689b ldr r3, [r3, #8] + 8004bb0: 490b ldr r1, [pc, #44] @ (8004be0 ) + 8004bb2: 4313 orrs r3, r2 + 8004bb4: 604b str r3, [r1, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) - 8004a42: 687b ldr r3, [r7, #4] - 8004a44: 681b ldr r3, [r3, #0] - 8004a46: f003 0310 and.w r3, r3, #16 - 8004a4a: 2b00 cmp r3, #0 - 8004a4c: d008 beq.n 8004a60 + 8004bb6: 687b ldr r3, [r7, #4] + 8004bb8: 681b ldr r3, [r3, #0] + 8004bba: f003 0310 and.w r3, r3, #16 + 8004bbe: 2b00 cmp r3, #0 + 8004bc0: d008 beq.n 8004bd4 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); - 8004a4e: 4b07 ldr r3, [pc, #28] @ (8004a6c ) - 8004a50: 685b ldr r3, [r3, #4] - 8004a52: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 - 8004a56: 687b ldr r3, [r7, #4] - 8004a58: 68db ldr r3, [r3, #12] - 8004a5a: 4904 ldr r1, [pc, #16] @ (8004a6c ) - 8004a5c: 4313 orrs r3, r2 - 8004a5e: 604b str r3, [r1, #4] + 8004bc2: 4b07 ldr r3, [pc, #28] @ (8004be0 ) + 8004bc4: 685b ldr r3, [r3, #4] + 8004bc6: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 + 8004bca: 687b ldr r3, [r7, #4] + 8004bcc: 68db ldr r3, [r3, #12] + 8004bce: 4904 ldr r1, [pc, #16] @ (8004be0 ) + 8004bd0: 4313 orrs r3, r2 + 8004bd2: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; - 8004a60: 2300 movs r3, #0 + 8004bd4: 2300 movs r3, #0 } - 8004a62: 4618 mov r0, r3 - 8004a64: 3718 adds r7, #24 - 8004a66: 46bd mov sp, r7 - 8004a68: bd80 pop {r7, pc} - 8004a6a: bf00 nop - 8004a6c: 40021000 .word 0x40021000 - 8004a70: 40007000 .word 0x40007000 - 8004a74: 42420440 .word 0x42420440 + 8004bd6: 4618 mov r0, r3 + 8004bd8: 3718 adds r7, #24 + 8004bda: 46bd mov sp, r7 + 8004bdc: bd80 pop {r7, pc} + 8004bde: bf00 nop + 8004be0: 40021000 .word 0x40021000 + 8004be4: 40007000 .word 0x40007000 + 8004be8: 42420440 .word 0x42420440 -08004a78 : +08004bec : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { - 8004a78: b580 push {r7, lr} - 8004a7a: b082 sub sp, #8 - 8004a7c: af00 add r7, sp, #0 - 8004a7e: 6078 str r0, [r7, #4] + 8004bec: b580 push {r7, lr} + 8004bee: b082 sub sp, #8 + 8004bf0: af00 add r7, sp, #0 + 8004bf2: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) - 8004a80: 687b ldr r3, [r7, #4] - 8004a82: 2b00 cmp r3, #0 - 8004a84: d101 bne.n 8004a8a + 8004bf4: 687b ldr r3, [r7, #4] + 8004bf6: 2b00 cmp r3, #0 + 8004bf8: d101 bne.n 8004bfe { return HAL_ERROR; - 8004a86: 2301 movs r3, #1 - 8004a88: e041 b.n 8004b0e + 8004bfa: 2301 movs r3, #1 + 8004bfc: e041 b.n 8004c82 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) - 8004a8a: 687b ldr r3, [r7, #4] - 8004a8c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8004a90: b2db uxtb r3, r3 - 8004a92: 2b00 cmp r3, #0 - 8004a94: d106 bne.n 8004aa4 + 8004bfe: 687b ldr r3, [r7, #4] + 8004c00: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8004c04: b2db uxtb r3, r3 + 8004c06: 2b00 cmp r3, #0 + 8004c08: d106 bne.n 8004c18 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; - 8004a96: 687b ldr r3, [r7, #4] - 8004a98: 2200 movs r2, #0 - 8004a9a: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004c0a: 687b ldr r3, [r7, #4] + 8004c0c: 2200 movs r2, #0 + 8004c0e: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); - 8004a9e: 6878 ldr r0, [r7, #4] - 8004aa0: f7fd fc24 bl 80022ec + 8004c12: 6878 ldr r0, [r7, #4] + 8004c14: f7fd fc24 bl 8002460 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8004aa4: 687b ldr r3, [r7, #4] - 8004aa6: 2202 movs r2, #2 - 8004aa8: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004c18: 687b ldr r3, [r7, #4] + 8004c1a: 2202 movs r2, #2 + 8004c1c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8004aac: 687b ldr r3, [r7, #4] - 8004aae: 681a ldr r2, [r3, #0] - 8004ab0: 687b ldr r3, [r7, #4] - 8004ab2: 3304 adds r3, #4 - 8004ab4: 4619 mov r1, r3 - 8004ab6: 4610 mov r0, r2 - 8004ab8: f000 fa5c bl 8004f74 + 8004c20: 687b ldr r3, [r7, #4] + 8004c22: 681a ldr r2, [r3, #0] + 8004c24: 687b ldr r3, [r7, #4] + 8004c26: 3304 adds r3, #4 + 8004c28: 4619 mov r1, r3 + 8004c2a: 4610 mov r0, r2 + 8004c2c: f000 fa5c bl 80050e8 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8004abc: 687b ldr r3, [r7, #4] - 8004abe: 2201 movs r2, #1 - 8004ac0: f883 2046 strb.w r2, [r3, #70] @ 0x46 + 8004c30: 687b ldr r3, [r7, #4] + 8004c32: 2201 movs r2, #1 + 8004c34: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8004ac4: 687b ldr r3, [r7, #4] - 8004ac6: 2201 movs r2, #1 - 8004ac8: f883 203e strb.w r2, [r3, #62] @ 0x3e - 8004acc: 687b ldr r3, [r7, #4] - 8004ace: 2201 movs r2, #1 - 8004ad0: f883 203f strb.w r2, [r3, #63] @ 0x3f - 8004ad4: 687b ldr r3, [r7, #4] - 8004ad6: 2201 movs r2, #1 - 8004ad8: f883 2040 strb.w r2, [r3, #64] @ 0x40 - 8004adc: 687b ldr r3, [r7, #4] - 8004ade: 2201 movs r2, #1 - 8004ae0: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8004c38: 687b ldr r3, [r7, #4] + 8004c3a: 2201 movs r2, #1 + 8004c3c: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004c40: 687b ldr r3, [r7, #4] + 8004c42: 2201 movs r2, #1 + 8004c44: f883 203f strb.w r2, [r3, #63] @ 0x3f + 8004c48: 687b ldr r3, [r7, #4] + 8004c4a: 2201 movs r2, #1 + 8004c4c: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 8004c50: 687b ldr r3, [r7, #4] + 8004c52: 2201 movs r2, #1 + 8004c54: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8004ae4: 687b ldr r3, [r7, #4] - 8004ae6: 2201 movs r2, #1 - 8004ae8: f883 2042 strb.w r2, [r3, #66] @ 0x42 - 8004aec: 687b ldr r3, [r7, #4] - 8004aee: 2201 movs r2, #1 - 8004af0: f883 2043 strb.w r2, [r3, #67] @ 0x43 - 8004af4: 687b ldr r3, [r7, #4] - 8004af6: 2201 movs r2, #1 - 8004af8: f883 2044 strb.w r2, [r3, #68] @ 0x44 - 8004afc: 687b ldr r3, [r7, #4] - 8004afe: 2201 movs r2, #1 - 8004b00: f883 2045 strb.w r2, [r3, #69] @ 0x45 + 8004c58: 687b ldr r3, [r7, #4] + 8004c5a: 2201 movs r2, #1 + 8004c5c: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8004c60: 687b ldr r3, [r7, #4] + 8004c62: 2201 movs r2, #1 + 8004c64: f883 2043 strb.w r2, [r3, #67] @ 0x43 + 8004c68: 687b ldr r3, [r7, #4] + 8004c6a: 2201 movs r2, #1 + 8004c6c: f883 2044 strb.w r2, [r3, #68] @ 0x44 + 8004c70: 687b ldr r3, [r7, #4] + 8004c72: 2201 movs r2, #1 + 8004c74: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; - 8004b04: 687b ldr r3, [r7, #4] - 8004b06: 2201 movs r2, #1 - 8004b08: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004c78: 687b ldr r3, [r7, #4] + 8004c7a: 2201 movs r2, #1 + 8004c7c: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; - 8004b0c: 2300 movs r3, #0 + 8004c80: 2300 movs r3, #0 } - 8004b0e: 4618 mov r0, r3 - 8004b10: 3708 adds r7, #8 - 8004b12: 46bd mov sp, r7 - 8004b14: bd80 pop {r7, pc} + 8004c82: 4618 mov r0, r3 + 8004c84: 3708 adds r7, #8 + 8004c86: 46bd mov sp, r7 + 8004c88: bd80 pop {r7, pc} ... -08004b18 : +08004c8c : * @brief Starts the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) { - 8004b18: b480 push {r7} - 8004b1a: b085 sub sp, #20 - 8004b1c: af00 add r7, sp, #0 - 8004b1e: 6078 str r0, [r7, #4] + 8004c8c: b480 push {r7} + 8004c8e: b085 sub sp, #20 + 8004c90: af00 add r7, sp, #0 + 8004c92: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Check the TIM state */ if (htim->State != HAL_TIM_STATE_READY) - 8004b20: 687b ldr r3, [r7, #4] - 8004b22: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8004b26: b2db uxtb r3, r3 - 8004b28: 2b01 cmp r3, #1 - 8004b2a: d001 beq.n 8004b30 + 8004c94: 687b ldr r3, [r7, #4] + 8004c96: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8004c9a: b2db uxtb r3, r3 + 8004c9c: 2b01 cmp r3, #1 + 8004c9e: d001 beq.n 8004ca4 { return HAL_ERROR; - 8004b2c: 2301 movs r3, #1 - 8004b2e: e03a b.n 8004ba6 + 8004ca0: 2301 movs r3, #1 + 8004ca2: e03a b.n 8004d1a } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8004b30: 687b ldr r3, [r7, #4] - 8004b32: 2202 movs r2, #2 - 8004b34: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004ca4: 687b ldr r3, [r7, #4] + 8004ca6: 2202 movs r2, #2 + 8004ca8: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - 8004b38: 687b ldr r3, [r7, #4] - 8004b3a: 681b ldr r3, [r3, #0] - 8004b3c: 68da ldr r2, [r3, #12] - 8004b3e: 687b ldr r3, [r7, #4] - 8004b40: 681b ldr r3, [r3, #0] - 8004b42: f042 0201 orr.w r2, r2, #1 - 8004b46: 60da str r2, [r3, #12] + 8004cac: 687b ldr r3, [r7, #4] + 8004cae: 681b ldr r3, [r3, #0] + 8004cb0: 68da ldr r2, [r3, #12] + 8004cb2: 687b ldr r3, [r7, #4] + 8004cb4: 681b ldr r3, [r3, #0] + 8004cb6: f042 0201 orr.w r2, r2, #1 + 8004cba: 60da str r2, [r3, #12] /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8004b48: 687b ldr r3, [r7, #4] - 8004b4a: 681b ldr r3, [r3, #0] - 8004b4c: 4a18 ldr r2, [pc, #96] @ (8004bb0 ) - 8004b4e: 4293 cmp r3, r2 - 8004b50: d00e beq.n 8004b70 - 8004b52: 687b ldr r3, [r7, #4] - 8004b54: 681b ldr r3, [r3, #0] - 8004b56: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 8004b5a: d009 beq.n 8004b70 - 8004b5c: 687b ldr r3, [r7, #4] - 8004b5e: 681b ldr r3, [r3, #0] - 8004b60: 4a14 ldr r2, [pc, #80] @ (8004bb4 ) - 8004b62: 4293 cmp r3, r2 - 8004b64: d004 beq.n 8004b70 - 8004b66: 687b ldr r3, [r7, #4] - 8004b68: 681b ldr r3, [r3, #0] - 8004b6a: 4a13 ldr r2, [pc, #76] @ (8004bb8 ) - 8004b6c: 4293 cmp r3, r2 - 8004b6e: d111 bne.n 8004b94 + 8004cbc: 687b ldr r3, [r7, #4] + 8004cbe: 681b ldr r3, [r3, #0] + 8004cc0: 4a18 ldr r2, [pc, #96] @ (8004d24 ) + 8004cc2: 4293 cmp r3, r2 + 8004cc4: d00e beq.n 8004ce4 + 8004cc6: 687b ldr r3, [r7, #4] + 8004cc8: 681b ldr r3, [r3, #0] + 8004cca: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8004cce: d009 beq.n 8004ce4 + 8004cd0: 687b ldr r3, [r7, #4] + 8004cd2: 681b ldr r3, [r3, #0] + 8004cd4: 4a14 ldr r2, [pc, #80] @ (8004d28 ) + 8004cd6: 4293 cmp r3, r2 + 8004cd8: d004 beq.n 8004ce4 + 8004cda: 687b ldr r3, [r7, #4] + 8004cdc: 681b ldr r3, [r3, #0] + 8004cde: 4a13 ldr r2, [pc, #76] @ (8004d2c ) + 8004ce0: 4293 cmp r3, r2 + 8004ce2: d111 bne.n 8004d08 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8004b70: 687b ldr r3, [r7, #4] - 8004b72: 681b ldr r3, [r3, #0] - 8004b74: 689b ldr r3, [r3, #8] - 8004b76: f003 0307 and.w r3, r3, #7 - 8004b7a: 60fb str r3, [r7, #12] + 8004ce4: 687b ldr r3, [r7, #4] + 8004ce6: 681b ldr r3, [r3, #0] + 8004ce8: 689b ldr r3, [r3, #8] + 8004cea: f003 0307 and.w r3, r3, #7 + 8004cee: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8004b7c: 68fb ldr r3, [r7, #12] - 8004b7e: 2b06 cmp r3, #6 - 8004b80: d010 beq.n 8004ba4 + 8004cf0: 68fb ldr r3, [r7, #12] + 8004cf2: 2b06 cmp r3, #6 + 8004cf4: d010 beq.n 8004d18 { __HAL_TIM_ENABLE(htim); - 8004b82: 687b ldr r3, [r7, #4] - 8004b84: 681b ldr r3, [r3, #0] - 8004b86: 681a ldr r2, [r3, #0] - 8004b88: 687b ldr r3, [r7, #4] - 8004b8a: 681b ldr r3, [r3, #0] - 8004b8c: f042 0201 orr.w r2, r2, #1 - 8004b90: 601a str r2, [r3, #0] + 8004cf6: 687b ldr r3, [r7, #4] + 8004cf8: 681b ldr r3, [r3, #0] + 8004cfa: 681a ldr r2, [r3, #0] + 8004cfc: 687b ldr r3, [r7, #4] + 8004cfe: 681b ldr r3, [r3, #0] + 8004d00: f042 0201 orr.w r2, r2, #1 + 8004d04: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8004b92: e007 b.n 8004ba4 + 8004d06: e007 b.n 8004d18 } } else { __HAL_TIM_ENABLE(htim); - 8004b94: 687b ldr r3, [r7, #4] - 8004b96: 681b ldr r3, [r3, #0] - 8004b98: 681a ldr r2, [r3, #0] - 8004b9a: 687b ldr r3, [r7, #4] - 8004b9c: 681b ldr r3, [r3, #0] - 8004b9e: f042 0201 orr.w r2, r2, #1 - 8004ba2: 601a str r2, [r3, #0] + 8004d08: 687b ldr r3, [r7, #4] + 8004d0a: 681b ldr r3, [r3, #0] + 8004d0c: 681a ldr r2, [r3, #0] + 8004d0e: 687b ldr r3, [r7, #4] + 8004d10: 681b ldr r3, [r3, #0] + 8004d12: f042 0201 orr.w r2, r2, #1 + 8004d16: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; - 8004ba4: 2300 movs r3, #0 + 8004d18: 2300 movs r3, #0 } - 8004ba6: 4618 mov r0, r3 - 8004ba8: 3714 adds r7, #20 - 8004baa: 46bd mov sp, r7 - 8004bac: bc80 pop {r7} - 8004bae: 4770 bx lr - 8004bb0: 40012c00 .word 0x40012c00 - 8004bb4: 40000400 .word 0x40000400 - 8004bb8: 40000800 .word 0x40000800 + 8004d1a: 4618 mov r0, r3 + 8004d1c: 3714 adds r7, #20 + 8004d1e: 46bd mov sp, r7 + 8004d20: bc80 pop {r7} + 8004d22: 4770 bx lr + 8004d24: 40012c00 .word 0x40012c00 + 8004d28: 40000400 .word 0x40000400 + 8004d2c: 40000800 .word 0x40000800 -08004bbc : +08004d30 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { - 8004bbc: b580 push {r7, lr} - 8004bbe: b084 sub sp, #16 - 8004bc0: af00 add r7, sp, #0 - 8004bc2: 6078 str r0, [r7, #4] + 8004d30: b580 push {r7, lr} + 8004d32: b084 sub sp, #16 + 8004d34: af00 add r7, sp, #0 + 8004d36: 6078 str r0, [r7, #4] uint32_t itsource = htim->Instance->DIER; - 8004bc4: 687b ldr r3, [r7, #4] - 8004bc6: 681b ldr r3, [r3, #0] - 8004bc8: 68db ldr r3, [r3, #12] - 8004bca: 60fb str r3, [r7, #12] + 8004d38: 687b ldr r3, [r7, #4] + 8004d3a: 681b ldr r3, [r3, #0] + 8004d3c: 68db ldr r3, [r3, #12] + 8004d3e: 60fb str r3, [r7, #12] uint32_t itflag = htim->Instance->SR; - 8004bcc: 687b ldr r3, [r7, #4] - 8004bce: 681b ldr r3, [r3, #0] - 8004bd0: 691b ldr r3, [r3, #16] - 8004bd2: 60bb str r3, [r7, #8] + 8004d40: 687b ldr r3, [r7, #4] + 8004d42: 681b ldr r3, [r3, #0] + 8004d44: 691b ldr r3, [r3, #16] + 8004d46: 60bb str r3, [r7, #8] /* Capture compare 1 event */ if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) - 8004bd4: 68bb ldr r3, [r7, #8] - 8004bd6: f003 0302 and.w r3, r3, #2 - 8004bda: 2b00 cmp r3, #0 - 8004bdc: d020 beq.n 8004c20 + 8004d48: 68bb ldr r3, [r7, #8] + 8004d4a: f003 0302 and.w r3, r3, #2 + 8004d4e: 2b00 cmp r3, #0 + 8004d50: d020 beq.n 8004d94 { if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) - 8004bde: 68fb ldr r3, [r7, #12] - 8004be0: f003 0302 and.w r3, r3, #2 - 8004be4: 2b00 cmp r3, #0 - 8004be6: d01b beq.n 8004c20 + 8004d52: 68fb ldr r3, [r7, #12] + 8004d54: f003 0302 and.w r3, r3, #2 + 8004d58: 2b00 cmp r3, #0 + 8004d5a: d01b beq.n 8004d94 { { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); - 8004be8: 687b ldr r3, [r7, #4] - 8004bea: 681b ldr r3, [r3, #0] - 8004bec: f06f 0202 mvn.w r2, #2 - 8004bf0: 611a str r2, [r3, #16] + 8004d5c: 687b ldr r3, [r7, #4] + 8004d5e: 681b ldr r3, [r3, #0] + 8004d60: f06f 0202 mvn.w r2, #2 + 8004d64: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 8004bf2: 687b ldr r3, [r7, #4] - 8004bf4: 2201 movs r2, #1 - 8004bf6: 771a strb r2, [r3, #28] + 8004d66: 687b ldr r3, [r7, #4] + 8004d68: 2201 movs r2, #1 + 8004d6a: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 8004bf8: 687b ldr r3, [r7, #4] - 8004bfa: 681b ldr r3, [r3, #0] - 8004bfc: 699b ldr r3, [r3, #24] - 8004bfe: f003 0303 and.w r3, r3, #3 - 8004c02: 2b00 cmp r3, #0 - 8004c04: d003 beq.n 8004c0e + 8004d6c: 687b ldr r3, [r7, #4] + 8004d6e: 681b ldr r3, [r3, #0] + 8004d70: 699b ldr r3, [r3, #24] + 8004d72: f003 0303 and.w r3, r3, #3 + 8004d76: 2b00 cmp r3, #0 + 8004d78: d003 beq.n 8004d82 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8004c06: 6878 ldr r0, [r7, #4] - 8004c08: f000 f998 bl 8004f3c - 8004c0c: e005 b.n 8004c1a + 8004d7a: 6878 ldr r0, [r7, #4] + 8004d7c: f000 f998 bl 80050b0 + 8004d80: e005 b.n 8004d8e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8004c0e: 6878 ldr r0, [r7, #4] - 8004c10: f000 f98b bl 8004f2a + 8004d82: 6878 ldr r0, [r7, #4] + 8004d84: f000 f98b bl 800509e HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004c14: 6878 ldr r0, [r7, #4] - 8004c16: f000 f99a bl 8004f4e + 8004d88: 6878 ldr r0, [r7, #4] + 8004d8a: f000 f99a bl 80050c2 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004c1a: 687b ldr r3, [r7, #4] - 8004c1c: 2200 movs r2, #0 - 8004c1e: 771a strb r2, [r3, #28] + 8004d8e: 687b ldr r3, [r7, #4] + 8004d90: 2200 movs r2, #0 + 8004d92: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) - 8004c20: 68bb ldr r3, [r7, #8] - 8004c22: f003 0304 and.w r3, r3, #4 - 8004c26: 2b00 cmp r3, #0 - 8004c28: d020 beq.n 8004c6c + 8004d94: 68bb ldr r3, [r7, #8] + 8004d96: f003 0304 and.w r3, r3, #4 + 8004d9a: 2b00 cmp r3, #0 + 8004d9c: d020 beq.n 8004de0 { if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) - 8004c2a: 68fb ldr r3, [r7, #12] - 8004c2c: f003 0304 and.w r3, r3, #4 - 8004c30: 2b00 cmp r3, #0 - 8004c32: d01b beq.n 8004c6c + 8004d9e: 68fb ldr r3, [r7, #12] + 8004da0: f003 0304 and.w r3, r3, #4 + 8004da4: 2b00 cmp r3, #0 + 8004da6: d01b beq.n 8004de0 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); - 8004c34: 687b ldr r3, [r7, #4] - 8004c36: 681b ldr r3, [r3, #0] - 8004c38: f06f 0204 mvn.w r2, #4 - 8004c3c: 611a str r2, [r3, #16] + 8004da8: 687b ldr r3, [r7, #4] + 8004daa: 681b ldr r3, [r3, #0] + 8004dac: f06f 0204 mvn.w r2, #4 + 8004db0: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 8004c3e: 687b ldr r3, [r7, #4] - 8004c40: 2202 movs r2, #2 - 8004c42: 771a strb r2, [r3, #28] + 8004db2: 687b ldr r3, [r7, #4] + 8004db4: 2202 movs r2, #2 + 8004db6: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 8004c44: 687b ldr r3, [r7, #4] - 8004c46: 681b ldr r3, [r3, #0] - 8004c48: 699b ldr r3, [r3, #24] - 8004c4a: f403 7340 and.w r3, r3, #768 @ 0x300 - 8004c4e: 2b00 cmp r3, #0 - 8004c50: d003 beq.n 8004c5a + 8004db8: 687b ldr r3, [r7, #4] + 8004dba: 681b ldr r3, [r3, #0] + 8004dbc: 699b ldr r3, [r3, #24] + 8004dbe: f403 7340 and.w r3, r3, #768 @ 0x300 + 8004dc2: 2b00 cmp r3, #0 + 8004dc4: d003 beq.n 8004dce { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8004c52: 6878 ldr r0, [r7, #4] - 8004c54: f000 f972 bl 8004f3c - 8004c58: e005 b.n 8004c66 + 8004dc6: 6878 ldr r0, [r7, #4] + 8004dc8: f000 f972 bl 80050b0 + 8004dcc: e005 b.n 8004dda { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8004c5a: 6878 ldr r0, [r7, #4] - 8004c5c: f000 f965 bl 8004f2a + 8004dce: 6878 ldr r0, [r7, #4] + 8004dd0: f000 f965 bl 800509e HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004c60: 6878 ldr r0, [r7, #4] - 8004c62: f000 f974 bl 8004f4e + 8004dd4: 6878 ldr r0, [r7, #4] + 8004dd6: f000 f974 bl 80050c2 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004c66: 687b ldr r3, [r7, #4] - 8004c68: 2200 movs r2, #0 - 8004c6a: 771a strb r2, [r3, #28] + 8004dda: 687b ldr r3, [r7, #4] + 8004ddc: 2200 movs r2, #0 + 8004dde: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) - 8004c6c: 68bb ldr r3, [r7, #8] - 8004c6e: f003 0308 and.w r3, r3, #8 - 8004c72: 2b00 cmp r3, #0 - 8004c74: d020 beq.n 8004cb8 + 8004de0: 68bb ldr r3, [r7, #8] + 8004de2: f003 0308 and.w r3, r3, #8 + 8004de6: 2b00 cmp r3, #0 + 8004de8: d020 beq.n 8004e2c { if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) - 8004c76: 68fb ldr r3, [r7, #12] - 8004c78: f003 0308 and.w r3, r3, #8 - 8004c7c: 2b00 cmp r3, #0 - 8004c7e: d01b beq.n 8004cb8 + 8004dea: 68fb ldr r3, [r7, #12] + 8004dec: f003 0308 and.w r3, r3, #8 + 8004df0: 2b00 cmp r3, #0 + 8004df2: d01b beq.n 8004e2c { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); - 8004c80: 687b ldr r3, [r7, #4] - 8004c82: 681b ldr r3, [r3, #0] - 8004c84: f06f 0208 mvn.w r2, #8 - 8004c88: 611a str r2, [r3, #16] + 8004df4: 687b ldr r3, [r7, #4] + 8004df6: 681b ldr r3, [r3, #0] + 8004df8: f06f 0208 mvn.w r2, #8 + 8004dfc: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 8004c8a: 687b ldr r3, [r7, #4] - 8004c8c: 2204 movs r2, #4 - 8004c8e: 771a strb r2, [r3, #28] + 8004dfe: 687b ldr r3, [r7, #4] + 8004e00: 2204 movs r2, #4 + 8004e02: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 8004c90: 687b ldr r3, [r7, #4] - 8004c92: 681b ldr r3, [r3, #0] - 8004c94: 69db ldr r3, [r3, #28] - 8004c96: f003 0303 and.w r3, r3, #3 - 8004c9a: 2b00 cmp r3, #0 - 8004c9c: d003 beq.n 8004ca6 + 8004e04: 687b ldr r3, [r7, #4] + 8004e06: 681b ldr r3, [r3, #0] + 8004e08: 69db ldr r3, [r3, #28] + 8004e0a: f003 0303 and.w r3, r3, #3 + 8004e0e: 2b00 cmp r3, #0 + 8004e10: d003 beq.n 8004e1a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8004c9e: 6878 ldr r0, [r7, #4] - 8004ca0: f000 f94c bl 8004f3c - 8004ca4: e005 b.n 8004cb2 + 8004e12: 6878 ldr r0, [r7, #4] + 8004e14: f000 f94c bl 80050b0 + 8004e18: e005 b.n 8004e26 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8004ca6: 6878 ldr r0, [r7, #4] - 8004ca8: f000 f93f bl 8004f2a + 8004e1a: 6878 ldr r0, [r7, #4] + 8004e1c: f000 f93f bl 800509e HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004cac: 6878 ldr r0, [r7, #4] - 8004cae: f000 f94e bl 8004f4e + 8004e20: 6878 ldr r0, [r7, #4] + 8004e22: f000 f94e bl 80050c2 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004cb2: 687b ldr r3, [r7, #4] - 8004cb4: 2200 movs r2, #0 - 8004cb6: 771a strb r2, [r3, #28] + 8004e26: 687b ldr r3, [r7, #4] + 8004e28: 2200 movs r2, #0 + 8004e2a: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) - 8004cb8: 68bb ldr r3, [r7, #8] - 8004cba: f003 0310 and.w r3, r3, #16 - 8004cbe: 2b00 cmp r3, #0 - 8004cc0: d020 beq.n 8004d04 + 8004e2c: 68bb ldr r3, [r7, #8] + 8004e2e: f003 0310 and.w r3, r3, #16 + 8004e32: 2b00 cmp r3, #0 + 8004e34: d020 beq.n 8004e78 { if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) - 8004cc2: 68fb ldr r3, [r7, #12] - 8004cc4: f003 0310 and.w r3, r3, #16 - 8004cc8: 2b00 cmp r3, #0 - 8004cca: d01b beq.n 8004d04 + 8004e36: 68fb ldr r3, [r7, #12] + 8004e38: f003 0310 and.w r3, r3, #16 + 8004e3c: 2b00 cmp r3, #0 + 8004e3e: d01b beq.n 8004e78 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); - 8004ccc: 687b ldr r3, [r7, #4] - 8004cce: 681b ldr r3, [r3, #0] - 8004cd0: f06f 0210 mvn.w r2, #16 - 8004cd4: 611a str r2, [r3, #16] + 8004e40: 687b ldr r3, [r7, #4] + 8004e42: 681b ldr r3, [r3, #0] + 8004e44: f06f 0210 mvn.w r2, #16 + 8004e48: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 8004cd6: 687b ldr r3, [r7, #4] - 8004cd8: 2208 movs r2, #8 - 8004cda: 771a strb r2, [r3, #28] + 8004e4a: 687b ldr r3, [r7, #4] + 8004e4c: 2208 movs r2, #8 + 8004e4e: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8004cdc: 687b ldr r3, [r7, #4] - 8004cde: 681b ldr r3, [r3, #0] - 8004ce0: 69db ldr r3, [r3, #28] - 8004ce2: f403 7340 and.w r3, r3, #768 @ 0x300 - 8004ce6: 2b00 cmp r3, #0 - 8004ce8: d003 beq.n 8004cf2 + 8004e50: 687b ldr r3, [r7, #4] + 8004e52: 681b ldr r3, [r3, #0] + 8004e54: 69db ldr r3, [r3, #28] + 8004e56: f403 7340 and.w r3, r3, #768 @ 0x300 + 8004e5a: 2b00 cmp r3, #0 + 8004e5c: d003 beq.n 8004e66 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8004cea: 6878 ldr r0, [r7, #4] - 8004cec: f000 f926 bl 8004f3c - 8004cf0: e005 b.n 8004cfe + 8004e5e: 6878 ldr r0, [r7, #4] + 8004e60: f000 f926 bl 80050b0 + 8004e64: e005 b.n 8004e72 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8004cf2: 6878 ldr r0, [r7, #4] - 8004cf4: f000 f919 bl 8004f2a + 8004e66: 6878 ldr r0, [r7, #4] + 8004e68: f000 f919 bl 800509e HAL_TIM_PWM_PulseFinishedCallback(htim); - 8004cf8: 6878 ldr r0, [r7, #4] - 8004cfa: f000 f928 bl 8004f4e + 8004e6c: 6878 ldr r0, [r7, #4] + 8004e6e: f000 f928 bl 80050c2 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8004cfe: 687b ldr r3, [r7, #4] - 8004d00: 2200 movs r2, #0 - 8004d02: 771a strb r2, [r3, #28] + 8004e72: 687b ldr r3, [r7, #4] + 8004e74: 2200 movs r2, #0 + 8004e76: 771a strb r2, [r3, #28] } } /* TIM Update event */ if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) - 8004d04: 68bb ldr r3, [r7, #8] - 8004d06: f003 0301 and.w r3, r3, #1 - 8004d0a: 2b00 cmp r3, #0 - 8004d0c: d00c beq.n 8004d28 + 8004e78: 68bb ldr r3, [r7, #8] + 8004e7a: f003 0301 and.w r3, r3, #1 + 8004e7e: 2b00 cmp r3, #0 + 8004e80: d00c beq.n 8004e9c { if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) - 8004d0e: 68fb ldr r3, [r7, #12] - 8004d10: f003 0301 and.w r3, r3, #1 - 8004d14: 2b00 cmp r3, #0 - 8004d16: d007 beq.n 8004d28 + 8004e82: 68fb ldr r3, [r7, #12] + 8004e84: f003 0301 and.w r3, r3, #1 + 8004e88: 2b00 cmp r3, #0 + 8004e8a: d007 beq.n 8004e9c { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); - 8004d18: 687b ldr r3, [r7, #4] - 8004d1a: 681b ldr r3, [r3, #0] - 8004d1c: f06f 0201 mvn.w r2, #1 - 8004d20: 611a str r2, [r3, #16] + 8004e8c: 687b ldr r3, [r7, #4] + 8004e8e: 681b ldr r3, [r3, #0] + 8004e90: f06f 0201 mvn.w r2, #1 + 8004e94: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); - 8004d22: 6878 ldr r0, [r7, #4] - 8004d24: f7fd f90a bl 8001f3c + 8004e96: 6878 ldr r0, [r7, #4] + 8004e98: f7fd f90a bl 80020b0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) - 8004d28: 68bb ldr r3, [r7, #8] - 8004d2a: f003 0380 and.w r3, r3, #128 @ 0x80 - 8004d2e: 2b00 cmp r3, #0 - 8004d30: d00c beq.n 8004d4c + 8004e9c: 68bb ldr r3, [r7, #8] + 8004e9e: f003 0380 and.w r3, r3, #128 @ 0x80 + 8004ea2: 2b00 cmp r3, #0 + 8004ea4: d00c beq.n 8004ec0 { if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) - 8004d32: 68fb ldr r3, [r7, #12] - 8004d34: f003 0380 and.w r3, r3, #128 @ 0x80 - 8004d38: 2b00 cmp r3, #0 - 8004d3a: d007 beq.n 8004d4c + 8004ea6: 68fb ldr r3, [r7, #12] + 8004ea8: f003 0380 and.w r3, r3, #128 @ 0x80 + 8004eac: 2b00 cmp r3, #0 + 8004eae: d007 beq.n 8004ec0 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK); - 8004d3c: 687b ldr r3, [r7, #4] - 8004d3e: 681b ldr r3, [r3, #0] - 8004d40: f06f 0280 mvn.w r2, #128 @ 0x80 - 8004d44: 611a str r2, [r3, #16] + 8004eb0: 687b ldr r3, [r7, #4] + 8004eb2: 681b ldr r3, [r3, #0] + 8004eb4: f06f 0280 mvn.w r2, #128 @ 0x80 + 8004eb8: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); - 8004d46: 6878 ldr r0, [r7, #4] - 8004d48: f000 fa7f bl 800524a + 8004eba: 6878 ldr r0, [r7, #4] + 8004ebc: f000 fa7f bl 80053be #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) - 8004d4c: 68bb ldr r3, [r7, #8] - 8004d4e: f003 0340 and.w r3, r3, #64 @ 0x40 - 8004d52: 2b00 cmp r3, #0 - 8004d54: d00c beq.n 8004d70 + 8004ec0: 68bb ldr r3, [r7, #8] + 8004ec2: f003 0340 and.w r3, r3, #64 @ 0x40 + 8004ec6: 2b00 cmp r3, #0 + 8004ec8: d00c beq.n 8004ee4 { if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) - 8004d56: 68fb ldr r3, [r7, #12] - 8004d58: f003 0340 and.w r3, r3, #64 @ 0x40 - 8004d5c: 2b00 cmp r3, #0 - 8004d5e: d007 beq.n 8004d70 + 8004eca: 68fb ldr r3, [r7, #12] + 8004ecc: f003 0340 and.w r3, r3, #64 @ 0x40 + 8004ed0: 2b00 cmp r3, #0 + 8004ed2: d007 beq.n 8004ee4 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); - 8004d60: 687b ldr r3, [r7, #4] - 8004d62: 681b ldr r3, [r3, #0] - 8004d64: f06f 0240 mvn.w r2, #64 @ 0x40 - 8004d68: 611a str r2, [r3, #16] + 8004ed4: 687b ldr r3, [r7, #4] + 8004ed6: 681b ldr r3, [r3, #0] + 8004ed8: f06f 0240 mvn.w r2, #64 @ 0x40 + 8004edc: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); - 8004d6a: 6878 ldr r0, [r7, #4] - 8004d6c: f000 f8f8 bl 8004f60 + 8004ede: 6878 ldr r0, [r7, #4] + 8004ee0: f000 f8f8 bl 80050d4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM)) - 8004d70: 68bb ldr r3, [r7, #8] - 8004d72: f003 0320 and.w r3, r3, #32 - 8004d76: 2b00 cmp r3, #0 - 8004d78: d00c beq.n 8004d94 + 8004ee4: 68bb ldr r3, [r7, #8] + 8004ee6: f003 0320 and.w r3, r3, #32 + 8004eea: 2b00 cmp r3, #0 + 8004eec: d00c beq.n 8004f08 { if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM)) - 8004d7a: 68fb ldr r3, [r7, #12] - 8004d7c: f003 0320 and.w r3, r3, #32 - 8004d80: 2b00 cmp r3, #0 - 8004d82: d007 beq.n 8004d94 + 8004eee: 68fb ldr r3, [r7, #12] + 8004ef0: f003 0320 and.w r3, r3, #32 + 8004ef4: 2b00 cmp r3, #0 + 8004ef6: d007 beq.n 8004f08 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); - 8004d84: 687b ldr r3, [r7, #4] - 8004d86: 681b ldr r3, [r3, #0] - 8004d88: f06f 0220 mvn.w r2, #32 - 8004d8c: 611a str r2, [r3, #16] + 8004ef8: 687b ldr r3, [r7, #4] + 8004efa: 681b ldr r3, [r3, #0] + 8004efc: f06f 0220 mvn.w r2, #32 + 8004f00: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); - 8004d8e: 6878 ldr r0, [r7, #4] - 8004d90: f000 fa52 bl 8005238 + 8004f02: 6878 ldr r0, [r7, #4] + 8004f04: f000 fa52 bl 80053ac #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } - 8004d94: bf00 nop - 8004d96: 3710 adds r7, #16 - 8004d98: 46bd mov sp, r7 - 8004d9a: bd80 pop {r7, pc} + 8004f08: bf00 nop + 8004f0a: 3710 adds r7, #16 + 8004f0c: 46bd mov sp, r7 + 8004f0e: bd80 pop {r7, pc} -08004d9c : +08004f10 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { - 8004d9c: b580 push {r7, lr} - 8004d9e: b084 sub sp, #16 - 8004da0: af00 add r7, sp, #0 - 8004da2: 6078 str r0, [r7, #4] - 8004da4: 6039 str r1, [r7, #0] + 8004f10: b580 push {r7, lr} + 8004f12: b084 sub sp, #16 + 8004f14: af00 add r7, sp, #0 + 8004f16: 6078 str r0, [r7, #4] + 8004f18: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; - 8004da6: 2300 movs r3, #0 - 8004da8: 73fb strb r3, [r7, #15] + 8004f1a: 2300 movs r3, #0 + 8004f1c: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); - 8004daa: 687b ldr r3, [r7, #4] - 8004dac: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8004db0: 2b01 cmp r3, #1 - 8004db2: d101 bne.n 8004db8 - 8004db4: 2302 movs r3, #2 - 8004db6: e0b4 b.n 8004f22 - 8004db8: 687b ldr r3, [r7, #4] - 8004dba: 2201 movs r2, #1 - 8004dbc: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004f1e: 687b ldr r3, [r7, #4] + 8004f20: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8004f24: 2b01 cmp r3, #1 + 8004f26: d101 bne.n 8004f2c + 8004f28: 2302 movs r3, #2 + 8004f2a: e0b4 b.n 8005096 + 8004f2c: 687b ldr r3, [r7, #4] + 8004f2e: 2201 movs r2, #1 + 8004f30: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; - 8004dc0: 687b ldr r3, [r7, #4] - 8004dc2: 2202 movs r2, #2 - 8004dc4: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004f34: 687b ldr r3, [r7, #4] + 8004f36: 2202 movs r2, #2 + 8004f38: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; - 8004dc8: 687b ldr r3, [r7, #4] - 8004dca: 681b ldr r3, [r3, #0] - 8004dcc: 689b ldr r3, [r3, #8] - 8004dce: 60bb str r3, [r7, #8] + 8004f3c: 687b ldr r3, [r7, #4] + 8004f3e: 681b ldr r3, [r3, #0] + 8004f40: 689b ldr r3, [r3, #8] + 8004f42: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - 8004dd0: 68bb ldr r3, [r7, #8] - 8004dd2: f023 0377 bic.w r3, r3, #119 @ 0x77 - 8004dd6: 60bb str r3, [r7, #8] + 8004f44: 68bb ldr r3, [r7, #8] + 8004f46: f023 0377 bic.w r3, r3, #119 @ 0x77 + 8004f4a: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8004dd8: 68bb ldr r3, [r7, #8] - 8004dda: f423 437f bic.w r3, r3, #65280 @ 0xff00 - 8004dde: 60bb str r3, [r7, #8] + 8004f4c: 68bb ldr r3, [r7, #8] + 8004f4e: f423 437f bic.w r3, r3, #65280 @ 0xff00 + 8004f52: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; - 8004de0: 687b ldr r3, [r7, #4] - 8004de2: 681b ldr r3, [r3, #0] - 8004de4: 68ba ldr r2, [r7, #8] - 8004de6: 609a str r2, [r3, #8] + 8004f54: 687b ldr r3, [r7, #4] + 8004f56: 681b ldr r3, [r3, #0] + 8004f58: 68ba ldr r2, [r7, #8] + 8004f5a: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) - 8004de8: 683b ldr r3, [r7, #0] - 8004dea: 681b ldr r3, [r3, #0] - 8004dec: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 - 8004df0: d03e beq.n 8004e70 - 8004df2: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 - 8004df6: f200 8087 bhi.w 8004f08 - 8004dfa: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8004dfe: f000 8086 beq.w 8004f0e - 8004e02: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8004e06: d87f bhi.n 8004f08 - 8004e08: 2b70 cmp r3, #112 @ 0x70 - 8004e0a: d01a beq.n 8004e42 - 8004e0c: 2b70 cmp r3, #112 @ 0x70 - 8004e0e: d87b bhi.n 8004f08 - 8004e10: 2b60 cmp r3, #96 @ 0x60 - 8004e12: d050 beq.n 8004eb6 - 8004e14: 2b60 cmp r3, #96 @ 0x60 - 8004e16: d877 bhi.n 8004f08 - 8004e18: 2b50 cmp r3, #80 @ 0x50 - 8004e1a: d03c beq.n 8004e96 - 8004e1c: 2b50 cmp r3, #80 @ 0x50 - 8004e1e: d873 bhi.n 8004f08 - 8004e20: 2b40 cmp r3, #64 @ 0x40 - 8004e22: d058 beq.n 8004ed6 - 8004e24: 2b40 cmp r3, #64 @ 0x40 - 8004e26: d86f bhi.n 8004f08 - 8004e28: 2b30 cmp r3, #48 @ 0x30 - 8004e2a: d064 beq.n 8004ef6 - 8004e2c: 2b30 cmp r3, #48 @ 0x30 - 8004e2e: d86b bhi.n 8004f08 - 8004e30: 2b20 cmp r3, #32 - 8004e32: d060 beq.n 8004ef6 - 8004e34: 2b20 cmp r3, #32 - 8004e36: d867 bhi.n 8004f08 - 8004e38: 2b00 cmp r3, #0 - 8004e3a: d05c beq.n 8004ef6 - 8004e3c: 2b10 cmp r3, #16 - 8004e3e: d05a beq.n 8004ef6 - 8004e40: e062 b.n 8004f08 + 8004f5c: 683b ldr r3, [r7, #0] + 8004f5e: 681b ldr r3, [r3, #0] + 8004f60: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 + 8004f64: d03e beq.n 8004fe4 + 8004f66: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 + 8004f6a: f200 8087 bhi.w 800507c + 8004f6e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8004f72: f000 8086 beq.w 8005082 + 8004f76: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8004f7a: d87f bhi.n 800507c + 8004f7c: 2b70 cmp r3, #112 @ 0x70 + 8004f7e: d01a beq.n 8004fb6 + 8004f80: 2b70 cmp r3, #112 @ 0x70 + 8004f82: d87b bhi.n 800507c + 8004f84: 2b60 cmp r3, #96 @ 0x60 + 8004f86: d050 beq.n 800502a + 8004f88: 2b60 cmp r3, #96 @ 0x60 + 8004f8a: d877 bhi.n 800507c + 8004f8c: 2b50 cmp r3, #80 @ 0x50 + 8004f8e: d03c beq.n 800500a + 8004f90: 2b50 cmp r3, #80 @ 0x50 + 8004f92: d873 bhi.n 800507c + 8004f94: 2b40 cmp r3, #64 @ 0x40 + 8004f96: d058 beq.n 800504a + 8004f98: 2b40 cmp r3, #64 @ 0x40 + 8004f9a: d86f bhi.n 800507c + 8004f9c: 2b30 cmp r3, #48 @ 0x30 + 8004f9e: d064 beq.n 800506a + 8004fa0: 2b30 cmp r3, #48 @ 0x30 + 8004fa2: d86b bhi.n 800507c + 8004fa4: 2b20 cmp r3, #32 + 8004fa6: d060 beq.n 800506a + 8004fa8: 2b20 cmp r3, #32 + 8004faa: d867 bhi.n 800507c + 8004fac: 2b00 cmp r3, #0 + 8004fae: d05c beq.n 800506a + 8004fb0: 2b10 cmp r3, #16 + 8004fb2: d05a beq.n 800506a + 8004fb4: e062 b.n 800507c assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 8004e42: 687b ldr r3, [r7, #4] - 8004e44: 6818 ldr r0, [r3, #0] + 8004fb6: 687b ldr r3, [r7, #4] + 8004fb8: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, - 8004e46: 683b ldr r3, [r7, #0] - 8004e48: 6899 ldr r1, [r3, #8] + 8004fba: 683b ldr r3, [r7, #0] + 8004fbc: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, - 8004e4a: 683b ldr r3, [r7, #0] - 8004e4c: 685a ldr r2, [r3, #4] + 8004fbe: 683b ldr r3, [r7, #0] + 8004fc0: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); - 8004e4e: 683b ldr r3, [r7, #0] - 8004e50: 68db ldr r3, [r3, #12] + 8004fc2: 683b ldr r3, [r7, #0] + 8004fc4: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, - 8004e52: f000 f974 bl 800513e + 8004fc6: f000 f974 bl 80052b2 /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; - 8004e56: 687b ldr r3, [r7, #4] - 8004e58: 681b ldr r3, [r3, #0] - 8004e5a: 689b ldr r3, [r3, #8] - 8004e5c: 60bb str r3, [r7, #8] + 8004fca: 687b ldr r3, [r7, #4] + 8004fcc: 681b ldr r3, [r3, #0] + 8004fce: 689b ldr r3, [r3, #8] + 8004fd0: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 8004e5e: 68bb ldr r3, [r7, #8] - 8004e60: f043 0377 orr.w r3, r3, #119 @ 0x77 - 8004e64: 60bb str r3, [r7, #8] + 8004fd2: 68bb ldr r3, [r7, #8] + 8004fd4: f043 0377 orr.w r3, r3, #119 @ 0x77 + 8004fd8: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 8004e66: 687b ldr r3, [r7, #4] - 8004e68: 681b ldr r3, [r3, #0] - 8004e6a: 68ba ldr r2, [r7, #8] - 8004e6c: 609a str r2, [r3, #8] + 8004fda: 687b ldr r3, [r7, #4] + 8004fdc: 681b ldr r3, [r3, #0] + 8004fde: 68ba ldr r2, [r7, #8] + 8004fe0: 609a str r2, [r3, #8] break; - 8004e6e: e04f b.n 8004f10 + 8004fe2: e04f b.n 8005084 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 8004e70: 687b ldr r3, [r7, #4] - 8004e72: 6818 ldr r0, [r3, #0] + 8004fe4: 687b ldr r3, [r7, #4] + 8004fe6: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, - 8004e74: 683b ldr r3, [r7, #0] - 8004e76: 6899 ldr r1, [r3, #8] + 8004fe8: 683b ldr r3, [r7, #0] + 8004fea: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, - 8004e78: 683b ldr r3, [r7, #0] - 8004e7a: 685a ldr r2, [r3, #4] + 8004fec: 683b ldr r3, [r7, #0] + 8004fee: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); - 8004e7c: 683b ldr r3, [r7, #0] - 8004e7e: 68db ldr r3, [r3, #12] + 8004ff0: 683b ldr r3, [r7, #0] + 8004ff2: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, - 8004e80: f000 f95d bl 800513e + 8004ff4: f000 f95d bl 80052b2 /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; - 8004e84: 687b ldr r3, [r7, #4] - 8004e86: 681b ldr r3, [r3, #0] - 8004e88: 689a ldr r2, [r3, #8] - 8004e8a: 687b ldr r3, [r7, #4] - 8004e8c: 681b ldr r3, [r3, #0] - 8004e8e: f442 4280 orr.w r2, r2, #16384 @ 0x4000 - 8004e92: 609a str r2, [r3, #8] + 8004ff8: 687b ldr r3, [r7, #4] + 8004ffa: 681b ldr r3, [r3, #0] + 8004ffc: 689a ldr r2, [r3, #8] + 8004ffe: 687b ldr r3, [r7, #4] + 8005000: 681b ldr r3, [r3, #0] + 8005002: f442 4280 orr.w r2, r2, #16384 @ 0x4000 + 8005006: 609a str r2, [r3, #8] break; - 8004e94: e03c b.n 8004f10 + 8005008: e03c b.n 8005084 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 8004e96: 687b ldr r3, [r7, #4] - 8004e98: 6818 ldr r0, [r3, #0] + 800500a: 687b ldr r3, [r7, #4] + 800500c: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 8004e9a: 683b ldr r3, [r7, #0] - 8004e9c: 6859 ldr r1, [r3, #4] + 800500e: 683b ldr r3, [r7, #0] + 8005010: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 8004e9e: 683b ldr r3, [r7, #0] - 8004ea0: 68db ldr r3, [r3, #12] + 8005012: 683b ldr r3, [r7, #0] + 8005014: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, - 8004ea2: 461a mov r2, r3 - 8004ea4: f000 f8d4 bl 8005050 + 8005016: 461a mov r2, r3 + 8005018: f000 f8d4 bl 80051c4 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - 8004ea8: 687b ldr r3, [r7, #4] - 8004eaa: 681b ldr r3, [r3, #0] - 8004eac: 2150 movs r1, #80 @ 0x50 - 8004eae: 4618 mov r0, r3 - 8004eb0: f000 f92b bl 800510a + 800501c: 687b ldr r3, [r7, #4] + 800501e: 681b ldr r3, [r3, #0] + 8005020: 2150 movs r1, #80 @ 0x50 + 8005022: 4618 mov r0, r3 + 8005024: f000 f92b bl 800527e break; - 8004eb4: e02c b.n 8004f10 + 8005028: e02c b.n 8005084 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, - 8004eb6: 687b ldr r3, [r7, #4] - 8004eb8: 6818 ldr r0, [r3, #0] + 800502a: 687b ldr r3, [r7, #4] + 800502c: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 8004eba: 683b ldr r3, [r7, #0] - 8004ebc: 6859 ldr r1, [r3, #4] + 800502e: 683b ldr r3, [r7, #0] + 8005030: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 8004ebe: 683b ldr r3, [r7, #0] - 8004ec0: 68db ldr r3, [r3, #12] + 8005032: 683b ldr r3, [r7, #0] + 8005034: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, - 8004ec2: 461a mov r2, r3 - 8004ec4: f000 f8f2 bl 80050ac + 8005036: 461a mov r2, r3 + 8005038: f000 f8f2 bl 8005220 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - 8004ec8: 687b ldr r3, [r7, #4] - 8004eca: 681b ldr r3, [r3, #0] - 8004ecc: 2160 movs r1, #96 @ 0x60 - 8004ece: 4618 mov r0, r3 - 8004ed0: f000 f91b bl 800510a + 800503c: 687b ldr r3, [r7, #4] + 800503e: 681b ldr r3, [r3, #0] + 8005040: 2160 movs r1, #96 @ 0x60 + 8005042: 4618 mov r0, r3 + 8005044: f000 f91b bl 800527e break; - 8004ed4: e01c b.n 8004f10 + 8005048: e01c b.n 8005084 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 8004ed6: 687b ldr r3, [r7, #4] - 8004ed8: 6818 ldr r0, [r3, #0] + 800504a: 687b ldr r3, [r7, #4] + 800504c: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 8004eda: 683b ldr r3, [r7, #0] - 8004edc: 6859 ldr r1, [r3, #4] + 800504e: 683b ldr r3, [r7, #0] + 8005050: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 8004ede: 683b ldr r3, [r7, #0] - 8004ee0: 68db ldr r3, [r3, #12] + 8005052: 683b ldr r3, [r7, #0] + 8005054: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, - 8004ee2: 461a mov r2, r3 - 8004ee4: f000 f8b4 bl 8005050 + 8005056: 461a mov r2, r3 + 8005058: f000 f8b4 bl 80051c4 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - 8004ee8: 687b ldr r3, [r7, #4] - 8004eea: 681b ldr r3, [r3, #0] - 8004eec: 2140 movs r1, #64 @ 0x40 - 8004eee: 4618 mov r0, r3 - 8004ef0: f000 f90b bl 800510a + 800505c: 687b ldr r3, [r7, #4] + 800505e: 681b ldr r3, [r3, #0] + 8005060: 2140 movs r1, #64 @ 0x40 + 8005062: 4618 mov r0, r3 + 8005064: f000 f90b bl 800527e break; - 8004ef4: e00c b.n 8004f10 + 8005068: e00c b.n 8005084 case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - 8004ef6: 687b ldr r3, [r7, #4] - 8004ef8: 681a ldr r2, [r3, #0] - 8004efa: 683b ldr r3, [r7, #0] - 8004efc: 681b ldr r3, [r3, #0] - 8004efe: 4619 mov r1, r3 - 8004f00: 4610 mov r0, r2 - 8004f02: f000 f902 bl 800510a + 800506a: 687b ldr r3, [r7, #4] + 800506c: 681a ldr r2, [r3, #0] + 800506e: 683b ldr r3, [r7, #0] + 8005070: 681b ldr r3, [r3, #0] + 8005072: 4619 mov r1, r3 + 8005074: 4610 mov r0, r2 + 8005076: f000 f902 bl 800527e break; - 8004f06: e003 b.n 8004f10 + 800507a: e003 b.n 8005084 } default: status = HAL_ERROR; - 8004f08: 2301 movs r3, #1 - 8004f0a: 73fb strb r3, [r7, #15] + 800507c: 2301 movs r3, #1 + 800507e: 73fb strb r3, [r7, #15] break; - 8004f0c: e000 b.n 8004f10 + 8005080: e000 b.n 8005084 break; - 8004f0e: bf00 nop + 8005082: bf00 nop } htim->State = HAL_TIM_STATE_READY; - 8004f10: 687b ldr r3, [r7, #4] - 8004f12: 2201 movs r2, #1 - 8004f14: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005084: 687b ldr r3, [r7, #4] + 8005086: 2201 movs r2, #1 + 8005088: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); - 8004f18: 687b ldr r3, [r7, #4] - 8004f1a: 2200 movs r2, #0 - 8004f1c: f883 203c strb.w r2, [r3, #60] @ 0x3c + 800508c: 687b ldr r3, [r7, #4] + 800508e: 2200 movs r2, #0 + 8005090: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; - 8004f20: 7bfb ldrb r3, [r7, #15] + 8005094: 7bfb ldrb r3, [r7, #15] } - 8004f22: 4618 mov r0, r3 - 8004f24: 3710 adds r7, #16 - 8004f26: 46bd mov sp, r7 - 8004f28: bd80 pop {r7, pc} + 8005096: 4618 mov r0, r3 + 8005098: 3710 adds r7, #16 + 800509a: 46bd mov sp, r7 + 800509c: bd80 pop {r7, pc} -08004f2a : +0800509e : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { - 8004f2a: b480 push {r7} - 8004f2c: b083 sub sp, #12 - 8004f2e: af00 add r7, sp, #0 - 8004f30: 6078 str r0, [r7, #4] + 800509e: b480 push {r7} + 80050a0: b083 sub sp, #12 + 80050a2: af00 add r7, sp, #0 + 80050a4: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } - 8004f32: bf00 nop - 8004f34: 370c adds r7, #12 - 8004f36: 46bd mov sp, r7 - 8004f38: bc80 pop {r7} - 8004f3a: 4770 bx lr + 80050a6: bf00 nop + 80050a8: 370c adds r7, #12 + 80050aa: 46bd mov sp, r7 + 80050ac: bc80 pop {r7} + 80050ae: 4770 bx lr -08004f3c : +080050b0 : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { - 8004f3c: b480 push {r7} - 8004f3e: b083 sub sp, #12 - 8004f40: af00 add r7, sp, #0 - 8004f42: 6078 str r0, [r7, #4] + 80050b0: b480 push {r7} + 80050b2: b083 sub sp, #12 + 80050b4: af00 add r7, sp, #0 + 80050b6: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } - 8004f44: bf00 nop - 8004f46: 370c adds r7, #12 - 8004f48: 46bd mov sp, r7 - 8004f4a: bc80 pop {r7} - 8004f4c: 4770 bx lr + 80050b8: bf00 nop + 80050ba: 370c adds r7, #12 + 80050bc: 46bd mov sp, r7 + 80050be: bc80 pop {r7} + 80050c0: 4770 bx lr -08004f4e : +080050c2 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { - 8004f4e: b480 push {r7} - 8004f50: b083 sub sp, #12 - 8004f52: af00 add r7, sp, #0 - 8004f54: 6078 str r0, [r7, #4] + 80050c2: b480 push {r7} + 80050c4: b083 sub sp, #12 + 80050c6: af00 add r7, sp, #0 + 80050c8: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } - 8004f56: bf00 nop - 8004f58: 370c adds r7, #12 - 8004f5a: 46bd mov sp, r7 - 8004f5c: bc80 pop {r7} - 8004f5e: 4770 bx lr + 80050ca: bf00 nop + 80050cc: 370c adds r7, #12 + 80050ce: 46bd mov sp, r7 + 80050d0: bc80 pop {r7} + 80050d2: 4770 bx lr -08004f60 : +080050d4 : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { - 8004f60: b480 push {r7} - 8004f62: b083 sub sp, #12 - 8004f64: af00 add r7, sp, #0 - 8004f66: 6078 str r0, [r7, #4] + 80050d4: b480 push {r7} + 80050d6: b083 sub sp, #12 + 80050d8: af00 add r7, sp, #0 + 80050da: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } - 8004f68: bf00 nop - 8004f6a: 370c adds r7, #12 - 8004f6c: 46bd mov sp, r7 - 8004f6e: bc80 pop {r7} - 8004f70: 4770 bx lr + 80050dc: bf00 nop + 80050de: 370c adds r7, #12 + 80050e0: 46bd mov sp, r7 + 80050e2: bc80 pop {r7} + 80050e4: 4770 bx lr ... -08004f74 : +080050e8 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { - 8004f74: b480 push {r7} - 8004f76: b085 sub sp, #20 - 8004f78: af00 add r7, sp, #0 - 8004f7a: 6078 str r0, [r7, #4] - 8004f7c: 6039 str r1, [r7, #0] + 80050e8: b480 push {r7} + 80050ea: b085 sub sp, #20 + 80050ec: af00 add r7, sp, #0 + 80050ee: 6078 str r0, [r7, #4] + 80050f0: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; - 8004f7e: 687b ldr r3, [r7, #4] - 8004f80: 681b ldr r3, [r3, #0] - 8004f82: 60fb str r3, [r7, #12] + 80050f2: 687b ldr r3, [r7, #4] + 80050f4: 681b ldr r3, [r3, #0] + 80050f6: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 8004f84: 687b ldr r3, [r7, #4] - 8004f86: 4a2f ldr r2, [pc, #188] @ (8005044 ) - 8004f88: 4293 cmp r3, r2 - 8004f8a: d00b beq.n 8004fa4 - 8004f8c: 687b ldr r3, [r7, #4] - 8004f8e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 8004f92: d007 beq.n 8004fa4 - 8004f94: 687b ldr r3, [r7, #4] - 8004f96: 4a2c ldr r2, [pc, #176] @ (8005048 ) - 8004f98: 4293 cmp r3, r2 - 8004f9a: d003 beq.n 8004fa4 - 8004f9c: 687b ldr r3, [r7, #4] - 8004f9e: 4a2b ldr r2, [pc, #172] @ (800504c ) - 8004fa0: 4293 cmp r3, r2 - 8004fa2: d108 bne.n 8004fb6 + 80050f8: 687b ldr r3, [r7, #4] + 80050fa: 4a2f ldr r2, [pc, #188] @ (80051b8 ) + 80050fc: 4293 cmp r3, r2 + 80050fe: d00b beq.n 8005118 + 8005100: 687b ldr r3, [r7, #4] + 8005102: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005106: d007 beq.n 8005118 + 8005108: 687b ldr r3, [r7, #4] + 800510a: 4a2c ldr r2, [pc, #176] @ (80051bc ) + 800510c: 4293 cmp r3, r2 + 800510e: d003 beq.n 8005118 + 8005110: 687b ldr r3, [r7, #4] + 8005112: 4a2b ldr r2, [pc, #172] @ (80051c0 ) + 8005114: 4293 cmp r3, r2 + 8005116: d108 bne.n 800512a { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 8004fa4: 68fb ldr r3, [r7, #12] - 8004fa6: f023 0370 bic.w r3, r3, #112 @ 0x70 - 8004faa: 60fb str r3, [r7, #12] + 8005118: 68fb ldr r3, [r7, #12] + 800511a: f023 0370 bic.w r3, r3, #112 @ 0x70 + 800511e: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; - 8004fac: 683b ldr r3, [r7, #0] - 8004fae: 685b ldr r3, [r3, #4] - 8004fb0: 68fa ldr r2, [r7, #12] - 8004fb2: 4313 orrs r3, r2 - 8004fb4: 60fb str r3, [r7, #12] + 8005120: 683b ldr r3, [r7, #0] + 8005122: 685b ldr r3, [r3, #4] + 8005124: 68fa ldr r2, [r7, #12] + 8005126: 4313 orrs r3, r2 + 8005128: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 8004fb6: 687b ldr r3, [r7, #4] - 8004fb8: 4a22 ldr r2, [pc, #136] @ (8005044 ) - 8004fba: 4293 cmp r3, r2 - 8004fbc: d00b beq.n 8004fd6 - 8004fbe: 687b ldr r3, [r7, #4] - 8004fc0: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 8004fc4: d007 beq.n 8004fd6 - 8004fc6: 687b ldr r3, [r7, #4] - 8004fc8: 4a1f ldr r2, [pc, #124] @ (8005048 ) - 8004fca: 4293 cmp r3, r2 - 8004fcc: d003 beq.n 8004fd6 - 8004fce: 687b ldr r3, [r7, #4] - 8004fd0: 4a1e ldr r2, [pc, #120] @ (800504c ) - 8004fd2: 4293 cmp r3, r2 - 8004fd4: d108 bne.n 8004fe8 + 800512a: 687b ldr r3, [r7, #4] + 800512c: 4a22 ldr r2, [pc, #136] @ (80051b8 ) + 800512e: 4293 cmp r3, r2 + 8005130: d00b beq.n 800514a + 8005132: 687b ldr r3, [r7, #4] + 8005134: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005138: d007 beq.n 800514a + 800513a: 687b ldr r3, [r7, #4] + 800513c: 4a1f ldr r2, [pc, #124] @ (80051bc ) + 800513e: 4293 cmp r3, r2 + 8005140: d003 beq.n 800514a + 8005142: 687b ldr r3, [r7, #4] + 8005144: 4a1e ldr r2, [pc, #120] @ (80051c0 ) + 8005146: 4293 cmp r3, r2 + 8005148: d108 bne.n 800515c { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; - 8004fd6: 68fb ldr r3, [r7, #12] - 8004fd8: f423 7340 bic.w r3, r3, #768 @ 0x300 - 8004fdc: 60fb str r3, [r7, #12] + 800514a: 68fb ldr r3, [r7, #12] + 800514c: f423 7340 bic.w r3, r3, #768 @ 0x300 + 8005150: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; - 8004fde: 683b ldr r3, [r7, #0] - 8004fe0: 68db ldr r3, [r3, #12] - 8004fe2: 68fa ldr r2, [r7, #12] - 8004fe4: 4313 orrs r3, r2 - 8004fe6: 60fb str r3, [r7, #12] + 8005152: 683b ldr r3, [r7, #0] + 8005154: 68db ldr r3, [r3, #12] + 8005156: 68fa ldr r2, [r7, #12] + 8005158: 4313 orrs r3, r2 + 800515a: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 8004fe8: 68fb ldr r3, [r7, #12] - 8004fea: f023 0280 bic.w r2, r3, #128 @ 0x80 - 8004fee: 683b ldr r3, [r7, #0] - 8004ff0: 695b ldr r3, [r3, #20] - 8004ff2: 4313 orrs r3, r2 - 8004ff4: 60fb str r3, [r7, #12] + 800515c: 68fb ldr r3, [r7, #12] + 800515e: f023 0280 bic.w r2, r3, #128 @ 0x80 + 8005162: 683b ldr r3, [r7, #0] + 8005164: 695b ldr r3, [r3, #20] + 8005166: 4313 orrs r3, r2 + 8005168: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; - 8004ff6: 687b ldr r3, [r7, #4] - 8004ff8: 68fa ldr r2, [r7, #12] - 8004ffa: 601a str r2, [r3, #0] + 800516a: 687b ldr r3, [r7, #4] + 800516c: 68fa ldr r2, [r7, #12] + 800516e: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; - 8004ffc: 683b ldr r3, [r7, #0] - 8004ffe: 689a ldr r2, [r3, #8] - 8005000: 687b ldr r3, [r7, #4] - 8005002: 62da str r2, [r3, #44] @ 0x2c + 8005170: 683b ldr r3, [r7, #0] + 8005172: 689a ldr r2, [r3, #8] + 8005174: 687b ldr r3, [r7, #4] + 8005176: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; - 8005004: 683b ldr r3, [r7, #0] - 8005006: 681a ldr r2, [r3, #0] - 8005008: 687b ldr r3, [r7, #4] - 800500a: 629a str r2, [r3, #40] @ 0x28 + 8005178: 683b ldr r3, [r7, #0] + 800517a: 681a ldr r2, [r3, #0] + 800517c: 687b ldr r3, [r7, #4] + 800517e: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 800500c: 687b ldr r3, [r7, #4] - 800500e: 4a0d ldr r2, [pc, #52] @ (8005044 ) - 8005010: 4293 cmp r3, r2 - 8005012: d103 bne.n 800501c + 8005180: 687b ldr r3, [r7, #4] + 8005182: 4a0d ldr r2, [pc, #52] @ (80051b8 ) + 8005184: 4293 cmp r3, r2 + 8005186: d103 bne.n 8005190 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; - 8005014: 683b ldr r3, [r7, #0] - 8005016: 691a ldr r2, [r3, #16] - 8005018: 687b ldr r3, [r7, #4] - 800501a: 631a str r2, [r3, #48] @ 0x30 + 8005188: 683b ldr r3, [r7, #0] + 800518a: 691a ldr r2, [r3, #16] + 800518c: 687b ldr r3, [r7, #4] + 800518e: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - 800501c: 687b ldr r3, [r7, #4] - 800501e: 2201 movs r2, #1 - 8005020: 615a str r2, [r3, #20] + 8005190: 687b ldr r3, [r7, #4] + 8005192: 2201 movs r2, #1 + 8005194: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) - 8005022: 687b ldr r3, [r7, #4] - 8005024: 691b ldr r3, [r3, #16] - 8005026: f003 0301 and.w r3, r3, #1 - 800502a: 2b00 cmp r3, #0 - 800502c: d005 beq.n 800503a + 8005196: 687b ldr r3, [r7, #4] + 8005198: 691b ldr r3, [r3, #16] + 800519a: f003 0301 and.w r3, r3, #1 + 800519e: 2b00 cmp r3, #0 + 80051a0: d005 beq.n 80051ae { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); - 800502e: 687b ldr r3, [r7, #4] - 8005030: 691b ldr r3, [r3, #16] - 8005032: f023 0201 bic.w r2, r3, #1 - 8005036: 687b ldr r3, [r7, #4] - 8005038: 611a str r2, [r3, #16] + 80051a2: 687b ldr r3, [r7, #4] + 80051a4: 691b ldr r3, [r3, #16] + 80051a6: f023 0201 bic.w r2, r3, #1 + 80051aa: 687b ldr r3, [r7, #4] + 80051ac: 611a str r2, [r3, #16] } } - 800503a: bf00 nop - 800503c: 3714 adds r7, #20 - 800503e: 46bd mov sp, r7 - 8005040: bc80 pop {r7} - 8005042: 4770 bx lr - 8005044: 40012c00 .word 0x40012c00 - 8005048: 40000400 .word 0x40000400 - 800504c: 40000800 .word 0x40000800 + 80051ae: bf00 nop + 80051b0: 3714 adds r7, #20 + 80051b2: 46bd mov sp, r7 + 80051b4: bc80 pop {r7} + 80051b6: 4770 bx lr + 80051b8: 40012c00 .word 0x40012c00 + 80051bc: 40000400 .word 0x40000400 + 80051c0: 40000800 .word 0x40000800 -08005050 : +080051c4 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 8005050: b480 push {r7} - 8005052: b087 sub sp, #28 - 8005054: af00 add r7, sp, #0 - 8005056: 60f8 str r0, [r7, #12] - 8005058: 60b9 str r1, [r7, #8] - 800505a: 607a str r2, [r7, #4] + 80051c4: b480 push {r7} + 80051c6: b087 sub sp, #28 + 80051c8: af00 add r7, sp, #0 + 80051ca: 60f8 str r0, [r7, #12] + 80051cc: 60b9 str r1, [r7, #8] + 80051ce: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; - 800505c: 68fb ldr r3, [r7, #12] - 800505e: 6a1b ldr r3, [r3, #32] - 8005060: 617b str r3, [r7, #20] + 80051d0: 68fb ldr r3, [r7, #12] + 80051d2: 6a1b ldr r3, [r3, #32] + 80051d4: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; - 8005062: 68fb ldr r3, [r7, #12] - 8005064: 6a1b ldr r3, [r3, #32] - 8005066: f023 0201 bic.w r2, r3, #1 - 800506a: 68fb ldr r3, [r7, #12] - 800506c: 621a str r2, [r3, #32] + 80051d6: 68fb ldr r3, [r7, #12] + 80051d8: 6a1b ldr r3, [r3, #32] + 80051da: f023 0201 bic.w r2, r3, #1 + 80051de: 68fb ldr r3, [r7, #12] + 80051e0: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 800506e: 68fb ldr r3, [r7, #12] - 8005070: 699b ldr r3, [r3, #24] - 8005072: 613b str r3, [r7, #16] + 80051e2: 68fb ldr r3, [r7, #12] + 80051e4: 699b ldr r3, [r3, #24] + 80051e6: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; - 8005074: 693b ldr r3, [r7, #16] - 8005076: f023 03f0 bic.w r3, r3, #240 @ 0xf0 - 800507a: 613b str r3, [r7, #16] + 80051e8: 693b ldr r3, [r7, #16] + 80051ea: f023 03f0 bic.w r3, r3, #240 @ 0xf0 + 80051ee: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); - 800507c: 687b ldr r3, [r7, #4] - 800507e: 011b lsls r3, r3, #4 - 8005080: 693a ldr r2, [r7, #16] - 8005082: 4313 orrs r3, r2 - 8005084: 613b str r3, [r7, #16] + 80051f0: 687b ldr r3, [r7, #4] + 80051f2: 011b lsls r3, r3, #4 + 80051f4: 693a ldr r2, [r7, #16] + 80051f6: 4313 orrs r3, r2 + 80051f8: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 8005086: 697b ldr r3, [r7, #20] - 8005088: f023 030a bic.w r3, r3, #10 - 800508c: 617b str r3, [r7, #20] + 80051fa: 697b ldr r3, [r7, #20] + 80051fc: f023 030a bic.w r3, r3, #10 + 8005200: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; - 800508e: 697a ldr r2, [r7, #20] - 8005090: 68bb ldr r3, [r7, #8] - 8005092: 4313 orrs r3, r2 - 8005094: 617b str r3, [r7, #20] + 8005202: 697a ldr r2, [r7, #20] + 8005204: 68bb ldr r3, [r7, #8] + 8005206: 4313 orrs r3, r2 + 8005208: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; - 8005096: 68fb ldr r3, [r7, #12] - 8005098: 693a ldr r2, [r7, #16] - 800509a: 619a str r2, [r3, #24] + 800520a: 68fb ldr r3, [r7, #12] + 800520c: 693a ldr r2, [r7, #16] + 800520e: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 800509c: 68fb ldr r3, [r7, #12] - 800509e: 697a ldr r2, [r7, #20] - 80050a0: 621a str r2, [r3, #32] + 8005210: 68fb ldr r3, [r7, #12] + 8005212: 697a ldr r2, [r7, #20] + 8005214: 621a str r2, [r3, #32] } - 80050a2: bf00 nop - 80050a4: 371c adds r7, #28 - 80050a6: 46bd mov sp, r7 - 80050a8: bc80 pop {r7} - 80050aa: 4770 bx lr + 8005216: bf00 nop + 8005218: 371c adds r7, #28 + 800521a: 46bd mov sp, r7 + 800521c: bc80 pop {r7} + 800521e: 4770 bx lr -080050ac : +08005220 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 80050ac: b480 push {r7} - 80050ae: b087 sub sp, #28 - 80050b0: af00 add r7, sp, #0 - 80050b2: 60f8 str r0, [r7, #12] - 80050b4: 60b9 str r1, [r7, #8] - 80050b6: 607a str r2, [r7, #4] + 8005220: b480 push {r7} + 8005222: b087 sub sp, #28 + 8005224: af00 add r7, sp, #0 + 8005226: 60f8 str r0, [r7, #12] + 8005228: 60b9 str r1, [r7, #8] + 800522a: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; - 80050b8: 68fb ldr r3, [r7, #12] - 80050ba: 6a1b ldr r3, [r3, #32] - 80050bc: 617b str r3, [r7, #20] + 800522c: 68fb ldr r3, [r7, #12] + 800522e: 6a1b ldr r3, [r3, #32] + 8005230: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; - 80050be: 68fb ldr r3, [r7, #12] - 80050c0: 6a1b ldr r3, [r3, #32] - 80050c2: f023 0210 bic.w r2, r3, #16 - 80050c6: 68fb ldr r3, [r7, #12] - 80050c8: 621a str r2, [r3, #32] + 8005232: 68fb ldr r3, [r7, #12] + 8005234: 6a1b ldr r3, [r3, #32] + 8005236: f023 0210 bic.w r2, r3, #16 + 800523a: 68fb ldr r3, [r7, #12] + 800523c: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 80050ca: 68fb ldr r3, [r7, #12] - 80050cc: 699b ldr r3, [r3, #24] - 80050ce: 613b str r3, [r7, #16] + 800523e: 68fb ldr r3, [r7, #12] + 8005240: 699b ldr r3, [r3, #24] + 8005242: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; - 80050d0: 693b ldr r3, [r7, #16] - 80050d2: f423 4370 bic.w r3, r3, #61440 @ 0xf000 - 80050d6: 613b str r3, [r7, #16] + 8005244: 693b ldr r3, [r7, #16] + 8005246: f423 4370 bic.w r3, r3, #61440 @ 0xf000 + 800524a: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); - 80050d8: 687b ldr r3, [r7, #4] - 80050da: 031b lsls r3, r3, #12 - 80050dc: 693a ldr r2, [r7, #16] - 80050de: 4313 orrs r3, r2 - 80050e0: 613b str r3, [r7, #16] + 800524c: 687b ldr r3, [r7, #4] + 800524e: 031b lsls r3, r3, #12 + 8005250: 693a ldr r2, [r7, #16] + 8005252: 4313 orrs r3, r2 + 8005254: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 80050e2: 697b ldr r3, [r7, #20] - 80050e4: f023 03a0 bic.w r3, r3, #160 @ 0xa0 - 80050e8: 617b str r3, [r7, #20] + 8005256: 697b ldr r3, [r7, #20] + 8005258: f023 03a0 bic.w r3, r3, #160 @ 0xa0 + 800525c: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); - 80050ea: 68bb ldr r3, [r7, #8] - 80050ec: 011b lsls r3, r3, #4 - 80050ee: 697a ldr r2, [r7, #20] - 80050f0: 4313 orrs r3, r2 - 80050f2: 617b str r3, [r7, #20] + 800525e: 68bb ldr r3, [r7, #8] + 8005260: 011b lsls r3, r3, #4 + 8005262: 697a ldr r2, [r7, #20] + 8005264: 4313 orrs r3, r2 + 8005266: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; - 80050f4: 68fb ldr r3, [r7, #12] - 80050f6: 693a ldr r2, [r7, #16] - 80050f8: 619a str r2, [r3, #24] + 8005268: 68fb ldr r3, [r7, #12] + 800526a: 693a ldr r2, [r7, #16] + 800526c: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 80050fa: 68fb ldr r3, [r7, #12] - 80050fc: 697a ldr r2, [r7, #20] - 80050fe: 621a str r2, [r3, #32] + 800526e: 68fb ldr r3, [r7, #12] + 8005270: 697a ldr r2, [r7, #20] + 8005272: 621a str r2, [r3, #32] } - 8005100: bf00 nop - 8005102: 371c adds r7, #28 - 8005104: 46bd mov sp, r7 - 8005106: bc80 pop {r7} - 8005108: 4770 bx lr + 8005274: bf00 nop + 8005276: 371c adds r7, #28 + 8005278: 46bd mov sp, r7 + 800527a: bc80 pop {r7} + 800527c: 4770 bx lr -0800510a : +0800527e : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { - 800510a: b480 push {r7} - 800510c: b085 sub sp, #20 - 800510e: af00 add r7, sp, #0 - 8005110: 6078 str r0, [r7, #4] - 8005112: 6039 str r1, [r7, #0] + 800527e: b480 push {r7} + 8005280: b085 sub sp, #20 + 8005282: af00 add r7, sp, #0 + 8005284: 6078 str r0, [r7, #4] + 8005286: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; - 8005114: 687b ldr r3, [r7, #4] - 8005116: 689b ldr r3, [r3, #8] - 8005118: 60fb str r3, [r7, #12] + 8005288: 687b ldr r3, [r7, #4] + 800528a: 689b ldr r3, [r3, #8] + 800528c: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; - 800511a: 68fb ldr r3, [r7, #12] - 800511c: f023 0370 bic.w r3, r3, #112 @ 0x70 - 8005120: 60fb str r3, [r7, #12] + 800528e: 68fb ldr r3, [r7, #12] + 8005290: f023 0370 bic.w r3, r3, #112 @ 0x70 + 8005294: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 8005122: 683a ldr r2, [r7, #0] - 8005124: 68fb ldr r3, [r7, #12] - 8005126: 4313 orrs r3, r2 - 8005128: f043 0307 orr.w r3, r3, #7 - 800512c: 60fb str r3, [r7, #12] + 8005296: 683a ldr r2, [r7, #0] + 8005298: 68fb ldr r3, [r7, #12] + 800529a: 4313 orrs r3, r2 + 800529c: f043 0307 orr.w r3, r3, #7 + 80052a0: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 800512e: 687b ldr r3, [r7, #4] - 8005130: 68fa ldr r2, [r7, #12] - 8005132: 609a str r2, [r3, #8] + 80052a2: 687b ldr r3, [r7, #4] + 80052a4: 68fa ldr r2, [r7, #12] + 80052a6: 609a str r2, [r3, #8] } - 8005134: bf00 nop - 8005136: 3714 adds r7, #20 - 8005138: 46bd mov sp, r7 - 800513a: bc80 pop {r7} - 800513c: 4770 bx lr + 80052a8: bf00 nop + 80052aa: 3714 adds r7, #20 + 80052ac: 46bd mov sp, r7 + 80052ae: bc80 pop {r7} + 80052b0: 4770 bx lr -0800513e : +080052b2 : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { - 800513e: b480 push {r7} - 8005140: b087 sub sp, #28 - 8005142: af00 add r7, sp, #0 - 8005144: 60f8 str r0, [r7, #12] - 8005146: 60b9 str r1, [r7, #8] - 8005148: 607a str r2, [r7, #4] - 800514a: 603b str r3, [r7, #0] + 80052b2: b480 push {r7} + 80052b4: b087 sub sp, #28 + 80052b6: af00 add r7, sp, #0 + 80052b8: 60f8 str r0, [r7, #12] + 80052ba: 60b9 str r1, [r7, #8] + 80052bc: 607a str r2, [r7, #4] + 80052be: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; - 800514c: 68fb ldr r3, [r7, #12] - 800514e: 689b ldr r3, [r3, #8] - 8005150: 617b str r3, [r7, #20] + 80052c0: 68fb ldr r3, [r7, #12] + 80052c2: 689b ldr r3, [r3, #8] + 80052c4: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8005152: 697b ldr r3, [r7, #20] - 8005154: f423 437f bic.w r3, r3, #65280 @ 0xff00 - 8005158: 617b str r3, [r7, #20] + 80052c6: 697b ldr r3, [r7, #20] + 80052c8: f423 437f bic.w r3, r3, #65280 @ 0xff00 + 80052cc: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 800515a: 683b ldr r3, [r7, #0] - 800515c: 021a lsls r2, r3, #8 - 800515e: 687b ldr r3, [r7, #4] - 8005160: 431a orrs r2, r3 - 8005162: 68bb ldr r3, [r7, #8] - 8005164: 4313 orrs r3, r2 - 8005166: 697a ldr r2, [r7, #20] - 8005168: 4313 orrs r3, r2 - 800516a: 617b str r3, [r7, #20] + 80052ce: 683b ldr r3, [r7, #0] + 80052d0: 021a lsls r2, r3, #8 + 80052d2: 687b ldr r3, [r7, #4] + 80052d4: 431a orrs r2, r3 + 80052d6: 68bb ldr r3, [r7, #8] + 80052d8: 4313 orrs r3, r2 + 80052da: 697a ldr r2, [r7, #20] + 80052dc: 4313 orrs r3, r2 + 80052de: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 800516c: 68fb ldr r3, [r7, #12] - 800516e: 697a ldr r2, [r7, #20] - 8005170: 609a str r2, [r3, #8] + 80052e0: 68fb ldr r3, [r7, #12] + 80052e2: 697a ldr r2, [r7, #20] + 80052e4: 609a str r2, [r3, #8] } - 8005172: bf00 nop - 8005174: 371c adds r7, #28 - 8005176: 46bd mov sp, r7 - 8005178: bc80 pop {r7} - 800517a: 4770 bx lr + 80052e6: bf00 nop + 80052e8: 371c adds r7, #28 + 80052ea: 46bd mov sp, r7 + 80052ec: bc80 pop {r7} + 80052ee: 4770 bx lr -0800517c : +080052f0 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { - 800517c: b480 push {r7} - 800517e: b085 sub sp, #20 - 8005180: af00 add r7, sp, #0 - 8005182: 6078 str r0, [r7, #4] - 8005184: 6039 str r1, [r7, #0] + 80052f0: b480 push {r7} + 80052f2: b085 sub sp, #20 + 80052f4: af00 add r7, sp, #0 + 80052f6: 6078 str r0, [r7, #4] + 80052f8: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); - 8005186: 687b ldr r3, [r7, #4] - 8005188: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 800518c: 2b01 cmp r3, #1 - 800518e: d101 bne.n 8005194 - 8005190: 2302 movs r3, #2 - 8005192: e046 b.n 8005222 - 8005194: 687b ldr r3, [r7, #4] - 8005196: 2201 movs r2, #1 - 8005198: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80052fa: 687b ldr r3, [r7, #4] + 80052fc: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8005300: 2b01 cmp r3, #1 + 8005302: d101 bne.n 8005308 + 8005304: 2302 movs r3, #2 + 8005306: e046 b.n 8005396 + 8005308: 687b ldr r3, [r7, #4] + 800530a: 2201 movs r2, #1 + 800530c: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; - 800519c: 687b ldr r3, [r7, #4] - 800519e: 2202 movs r2, #2 - 80051a0: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005310: 687b ldr r3, [r7, #4] + 8005312: 2202 movs r2, #2 + 8005314: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; - 80051a4: 687b ldr r3, [r7, #4] - 80051a6: 681b ldr r3, [r3, #0] - 80051a8: 685b ldr r3, [r3, #4] - 80051aa: 60fb str r3, [r7, #12] + 8005318: 687b ldr r3, [r7, #4] + 800531a: 681b ldr r3, [r3, #0] + 800531c: 685b ldr r3, [r3, #4] + 800531e: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; - 80051ac: 687b ldr r3, [r7, #4] - 80051ae: 681b ldr r3, [r3, #0] - 80051b0: 689b ldr r3, [r3, #8] - 80051b2: 60bb str r3, [r7, #8] + 8005320: 687b ldr r3, [r7, #4] + 8005322: 681b ldr r3, [r3, #0] + 8005324: 689b ldr r3, [r3, #8] + 8005326: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; - 80051b4: 68fb ldr r3, [r7, #12] - 80051b6: f023 0370 bic.w r3, r3, #112 @ 0x70 - 80051ba: 60fb str r3, [r7, #12] + 8005328: 68fb ldr r3, [r7, #12] + 800532a: f023 0370 bic.w r3, r3, #112 @ 0x70 + 800532e: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 80051bc: 683b ldr r3, [r7, #0] - 80051be: 681b ldr r3, [r3, #0] - 80051c0: 68fa ldr r2, [r7, #12] - 80051c2: 4313 orrs r3, r2 - 80051c4: 60fb str r3, [r7, #12] + 8005330: 683b ldr r3, [r7, #0] + 8005332: 681b ldr r3, [r3, #0] + 8005334: 68fa ldr r2, [r7, #12] + 8005336: 4313 orrs r3, r2 + 8005338: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; - 80051c6: 687b ldr r3, [r7, #4] - 80051c8: 681b ldr r3, [r3, #0] - 80051ca: 68fa ldr r2, [r7, #12] - 80051cc: 605a str r2, [r3, #4] + 800533a: 687b ldr r3, [r7, #4] + 800533c: 681b ldr r3, [r3, #0] + 800533e: 68fa ldr r2, [r7, #12] + 8005340: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 80051ce: 687b ldr r3, [r7, #4] - 80051d0: 681b ldr r3, [r3, #0] - 80051d2: 4a16 ldr r2, [pc, #88] @ (800522c ) - 80051d4: 4293 cmp r3, r2 - 80051d6: d00e beq.n 80051f6 - 80051d8: 687b ldr r3, [r7, #4] - 80051da: 681b ldr r3, [r3, #0] - 80051dc: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 80051e0: d009 beq.n 80051f6 - 80051e2: 687b ldr r3, [r7, #4] - 80051e4: 681b ldr r3, [r3, #0] - 80051e6: 4a12 ldr r2, [pc, #72] @ (8005230 ) - 80051e8: 4293 cmp r3, r2 - 80051ea: d004 beq.n 80051f6 - 80051ec: 687b ldr r3, [r7, #4] - 80051ee: 681b ldr r3, [r3, #0] - 80051f0: 4a10 ldr r2, [pc, #64] @ (8005234 ) - 80051f2: 4293 cmp r3, r2 - 80051f4: d10c bne.n 8005210 + 8005342: 687b ldr r3, [r7, #4] + 8005344: 681b ldr r3, [r3, #0] + 8005346: 4a16 ldr r2, [pc, #88] @ (80053a0 ) + 8005348: 4293 cmp r3, r2 + 800534a: d00e beq.n 800536a + 800534c: 687b ldr r3, [r7, #4] + 800534e: 681b ldr r3, [r3, #0] + 8005350: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005354: d009 beq.n 800536a + 8005356: 687b ldr r3, [r7, #4] + 8005358: 681b ldr r3, [r3, #0] + 800535a: 4a12 ldr r2, [pc, #72] @ (80053a4 ) + 800535c: 4293 cmp r3, r2 + 800535e: d004 beq.n 800536a + 8005360: 687b ldr r3, [r7, #4] + 8005362: 681b ldr r3, [r3, #0] + 8005364: 4a10 ldr r2, [pc, #64] @ (80053a8 ) + 8005366: 4293 cmp r3, r2 + 8005368: d10c bne.n 8005384 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; - 80051f6: 68bb ldr r3, [r7, #8] - 80051f8: f023 0380 bic.w r3, r3, #128 @ 0x80 - 80051fc: 60bb str r3, [r7, #8] + 800536a: 68bb ldr r3, [r7, #8] + 800536c: f023 0380 bic.w r3, r3, #128 @ 0x80 + 8005370: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; - 80051fe: 683b ldr r3, [r7, #0] - 8005200: 685b ldr r3, [r3, #4] - 8005202: 68ba ldr r2, [r7, #8] - 8005204: 4313 orrs r3, r2 - 8005206: 60bb str r3, [r7, #8] + 8005372: 683b ldr r3, [r7, #0] + 8005374: 685b ldr r3, [r3, #4] + 8005376: 68ba ldr r2, [r7, #8] + 8005378: 4313 orrs r3, r2 + 800537a: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 8005208: 687b ldr r3, [r7, #4] - 800520a: 681b ldr r3, [r3, #0] - 800520c: 68ba ldr r2, [r7, #8] - 800520e: 609a str r2, [r3, #8] + 800537c: 687b ldr r3, [r7, #4] + 800537e: 681b ldr r3, [r3, #0] + 8005380: 68ba ldr r2, [r7, #8] + 8005382: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; - 8005210: 687b ldr r3, [r7, #4] - 8005212: 2201 movs r2, #1 - 8005214: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005384: 687b ldr r3, [r7, #4] + 8005386: 2201 movs r2, #1 + 8005388: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); - 8005218: 687b ldr r3, [r7, #4] - 800521a: 2200 movs r2, #0 - 800521c: f883 203c strb.w r2, [r3, #60] @ 0x3c + 800538c: 687b ldr r3, [r7, #4] + 800538e: 2200 movs r2, #0 + 8005390: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 8005220: 2300 movs r3, #0 + 8005394: 2300 movs r3, #0 } - 8005222: 4618 mov r0, r3 - 8005224: 3714 adds r7, #20 - 8005226: 46bd mov sp, r7 - 8005228: bc80 pop {r7} - 800522a: 4770 bx lr - 800522c: 40012c00 .word 0x40012c00 - 8005230: 40000400 .word 0x40000400 - 8005234: 40000800 .word 0x40000800 + 8005396: 4618 mov r0, r3 + 8005398: 3714 adds r7, #20 + 800539a: 46bd mov sp, r7 + 800539c: bc80 pop {r7} + 800539e: 4770 bx lr + 80053a0: 40012c00 .word 0x40012c00 + 80053a4: 40000400 .word 0x40000400 + 80053a8: 40000800 .word 0x40000800 -08005238 : +080053ac : * @brief Commutation callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { - 8005238: b480 push {r7} - 800523a: b083 sub sp, #12 - 800523c: af00 add r7, sp, #0 - 800523e: 6078 str r0, [r7, #4] + 80053ac: b480 push {r7} + 80053ae: b083 sub sp, #12 + 80053b0: af00 add r7, sp, #0 + 80053b2: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } - 8005240: bf00 nop - 8005242: 370c adds r7, #12 - 8005244: 46bd mov sp, r7 - 8005246: bc80 pop {r7} - 8005248: 4770 bx lr + 80053b4: bf00 nop + 80053b6: 370c adds r7, #12 + 80053b8: 46bd mov sp, r7 + 80053ba: bc80 pop {r7} + 80053bc: 4770 bx lr -0800524a : +080053be : * @brief Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { - 800524a: b480 push {r7} - 800524c: b083 sub sp, #12 - 800524e: af00 add r7, sp, #0 - 8005250: 6078 str r0, [r7, #4] + 80053be: b480 push {r7} + 80053c0: b083 sub sp, #12 + 80053c2: af00 add r7, sp, #0 + 80053c4: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } - 8005252: bf00 nop - 8005254: 370c adds r7, #12 - 8005256: 46bd mov sp, r7 - 8005258: bc80 pop {r7} - 800525a: 4770 bx lr + 80053c6: bf00 nop + 80053c8: 370c adds r7, #12 + 80053ca: 46bd mov sp, r7 + 80053cc: bc80 pop {r7} + 80053ce: 4770 bx lr -0800525c : +080053d0 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 800525c: b580 push {r7, lr} - 800525e: b082 sub sp, #8 - 8005260: af00 add r7, sp, #0 - 8005262: 6078 str r0, [r7, #4] + 80053d0: b580 push {r7, lr} + 80053d2: b082 sub sp, #8 + 80053d4: af00 add r7, sp, #0 + 80053d6: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8005264: 687b ldr r3, [r7, #4] - 8005266: 2b00 cmp r3, #0 - 8005268: d101 bne.n 800526e + 80053d8: 687b ldr r3, [r7, #4] + 80053da: 2b00 cmp r3, #0 + 80053dc: d101 bne.n 80053e2 { return HAL_ERROR; - 800526a: 2301 movs r3, #1 - 800526c: e042 b.n 80052f4 + 80053de: 2301 movs r3, #1 + 80053e0: e042 b.n 8005468 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) - 800526e: 687b ldr r3, [r7, #4] - 8005270: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 8005274: b2db uxtb r3, r3 - 8005276: 2b00 cmp r3, #0 - 8005278: d106 bne.n 8005288 + 80053e2: 687b ldr r3, [r7, #4] + 80053e4: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 80053e8: b2db uxtb r3, r3 + 80053ea: 2b00 cmp r3, #0 + 80053ec: d106 bne.n 80053fc { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 800527a: 687b ldr r3, [r7, #4] - 800527c: 2200 movs r2, #0 - 800527e: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 80053ee: 687b ldr r3, [r7, #4] + 80053f0: 2200 movs r2, #0 + 80053f2: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 8005282: 6878 ldr r0, [r7, #4] - 8005284: f7fd f882 bl 800238c + 80053f6: 6878 ldr r0, [r7, #4] + 80053f8: f7fd f882 bl 8002500 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 8005288: 687b ldr r3, [r7, #4] - 800528a: 2224 movs r2, #36 @ 0x24 - 800528c: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 80053fc: 687b ldr r3, [r7, #4] + 80053fe: 2224 movs r2, #36 @ 0x24 + 8005400: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); - 8005290: 687b ldr r3, [r7, #4] - 8005292: 681b ldr r3, [r3, #0] - 8005294: 68da ldr r2, [r3, #12] - 8005296: 687b ldr r3, [r7, #4] - 8005298: 681b ldr r3, [r3, #0] - 800529a: f422 5200 bic.w r2, r2, #8192 @ 0x2000 - 800529e: 60da str r2, [r3, #12] + 8005404: 687b ldr r3, [r7, #4] + 8005406: 681b ldr r3, [r3, #0] + 8005408: 68da ldr r2, [r3, #12] + 800540a: 687b ldr r3, [r7, #4] + 800540c: 681b ldr r3, [r3, #0] + 800540e: f422 5200 bic.w r2, r2, #8192 @ 0x2000 + 8005412: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); - 80052a0: 6878 ldr r0, [r7, #4] - 80052a2: f000 fd63 bl 8005d6c + 8005414: 6878 ldr r0, [r7, #4] + 8005416: f000 fd63 bl 8005ee0 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 80052a6: 687b ldr r3, [r7, #4] - 80052a8: 681b ldr r3, [r3, #0] - 80052aa: 691a ldr r2, [r3, #16] - 80052ac: 687b ldr r3, [r7, #4] - 80052ae: 681b ldr r3, [r3, #0] - 80052b0: f422 4290 bic.w r2, r2, #18432 @ 0x4800 - 80052b4: 611a str r2, [r3, #16] + 800541a: 687b ldr r3, [r7, #4] + 800541c: 681b ldr r3, [r3, #0] + 800541e: 691a ldr r2, [r3, #16] + 8005420: 687b ldr r3, [r7, #4] + 8005422: 681b ldr r3, [r3, #0] + 8005424: f422 4290 bic.w r2, r2, #18432 @ 0x4800 + 8005428: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 80052b6: 687b ldr r3, [r7, #4] - 80052b8: 681b ldr r3, [r3, #0] - 80052ba: 695a ldr r2, [r3, #20] - 80052bc: 687b ldr r3, [r7, #4] - 80052be: 681b ldr r3, [r3, #0] - 80052c0: f022 022a bic.w r2, r2, #42 @ 0x2a - 80052c4: 615a str r2, [r3, #20] + 800542a: 687b ldr r3, [r7, #4] + 800542c: 681b ldr r3, [r3, #0] + 800542e: 695a ldr r2, [r3, #20] + 8005430: 687b ldr r3, [r7, #4] + 8005432: 681b ldr r3, [r3, #0] + 8005434: f022 022a bic.w r2, r2, #42 @ 0x2a + 8005438: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); - 80052c6: 687b ldr r3, [r7, #4] - 80052c8: 681b ldr r3, [r3, #0] - 80052ca: 68da ldr r2, [r3, #12] - 80052cc: 687b ldr r3, [r7, #4] - 80052ce: 681b ldr r3, [r3, #0] - 80052d0: f442 5200 orr.w r2, r2, #8192 @ 0x2000 - 80052d4: 60da str r2, [r3, #12] + 800543a: 687b ldr r3, [r7, #4] + 800543c: 681b ldr r3, [r3, #0] + 800543e: 68da ldr r2, [r3, #12] + 8005440: 687b ldr r3, [r7, #4] + 8005442: 681b ldr r3, [r3, #0] + 8005444: f442 5200 orr.w r2, r2, #8192 @ 0x2000 + 8005448: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 80052d6: 687b ldr r3, [r7, #4] - 80052d8: 2200 movs r2, #0 - 80052da: 645a str r2, [r3, #68] @ 0x44 + 800544a: 687b ldr r3, [r7, #4] + 800544c: 2200 movs r2, #0 + 800544e: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; - 80052dc: 687b ldr r3, [r7, #4] - 80052de: 2220 movs r2, #32 - 80052e0: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005450: 687b ldr r3, [r7, #4] + 8005452: 2220 movs r2, #32 + 8005454: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; - 80052e4: 687b ldr r3, [r7, #4] - 80052e6: 2220 movs r2, #32 - 80052e8: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005458: 687b ldr r3, [r7, #4] + 800545a: 2220 movs r2, #32 + 800545c: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; - 80052ec: 687b ldr r3, [r7, #4] - 80052ee: 2200 movs r2, #0 - 80052f0: 635a str r2, [r3, #52] @ 0x34 + 8005460: 687b ldr r3, [r7, #4] + 8005462: 2200 movs r2, #0 + 8005464: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; - 80052f2: 2300 movs r3, #0 + 8005466: 2300 movs r3, #0 } - 80052f4: 4618 mov r0, r3 - 80052f6: 3708 adds r7, #8 - 80052f8: 46bd mov sp, r7 - 80052fa: bd80 pop {r7, pc} + 8005468: 4618 mov r0, r3 + 800546a: 3708 adds r7, #8 + 800546c: 46bd mov sp, r7 + 800546e: bd80 pop {r7, pc} -080052fc : +08005470 : * @param Size Amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 80052fc: b580 push {r7, lr} - 80052fe: b08a sub sp, #40 @ 0x28 - 8005300: af02 add r7, sp, #8 - 8005302: 60f8 str r0, [r7, #12] - 8005304: 60b9 str r1, [r7, #8] - 8005306: 603b str r3, [r7, #0] - 8005308: 4613 mov r3, r2 - 800530a: 80fb strh r3, [r7, #6] + 8005470: b580 push {r7, lr} + 8005472: b08a sub sp, #40 @ 0x28 + 8005474: af02 add r7, sp, #8 + 8005476: 60f8 str r0, [r7, #12] + 8005478: 60b9 str r1, [r7, #8] + 800547a: 603b str r3, [r7, #0] + 800547c: 4613 mov r3, r2 + 800547e: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart = 0U; - 800530c: 2300 movs r3, #0 - 800530e: 617b str r3, [r7, #20] + 8005480: 2300 movs r3, #0 + 8005482: 617b str r3, [r7, #20] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8005310: 68fb ldr r3, [r7, #12] - 8005312: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 8005316: b2db uxtb r3, r3 - 8005318: 2b20 cmp r3, #32 - 800531a: d175 bne.n 8005408 + 8005484: 68fb ldr r3, [r7, #12] + 8005486: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 800548a: b2db uxtb r3, r3 + 800548c: 2b20 cmp r3, #32 + 800548e: d175 bne.n 800557c { if ((pData == NULL) || (Size == 0U)) - 800531c: 68bb ldr r3, [r7, #8] - 800531e: 2b00 cmp r3, #0 - 8005320: d002 beq.n 8005328 - 8005322: 88fb ldrh r3, [r7, #6] - 8005324: 2b00 cmp r3, #0 - 8005326: d101 bne.n 800532c + 8005490: 68bb ldr r3, [r7, #8] + 8005492: 2b00 cmp r3, #0 + 8005494: d002 beq.n 800549c + 8005496: 88fb ldrh r3, [r7, #6] + 8005498: 2b00 cmp r3, #0 + 800549a: d101 bne.n 80054a0 { return HAL_ERROR; - 8005328: 2301 movs r3, #1 - 800532a: e06e b.n 800540a + 800549c: 2301 movs r3, #1 + 800549e: e06e b.n 800557e } huart->ErrorCode = HAL_UART_ERROR_NONE; - 800532c: 68fb ldr r3, [r7, #12] - 800532e: 2200 movs r2, #0 - 8005330: 645a str r2, [r3, #68] @ 0x44 + 80054a0: 68fb ldr r3, [r7, #12] + 80054a2: 2200 movs r2, #0 + 80054a4: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; - 8005332: 68fb ldr r3, [r7, #12] - 8005334: 2221 movs r2, #33 @ 0x21 - 8005336: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 80054a6: 68fb ldr r3, [r7, #12] + 80054a8: 2221 movs r2, #33 @ 0x21 + 80054aa: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 800533a: f7fd f8f9 bl 8002530 - 800533e: 6178 str r0, [r7, #20] + 80054ae: f7fd f8f9 bl 80026a4 + 80054b2: 6178 str r0, [r7, #20] huart->TxXferSize = Size; - 8005340: 68fb ldr r3, [r7, #12] - 8005342: 88fa ldrh r2, [r7, #6] - 8005344: 849a strh r2, [r3, #36] @ 0x24 + 80054b4: 68fb ldr r3, [r7, #12] + 80054b6: 88fa ldrh r2, [r7, #6] + 80054b8: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; - 8005346: 68fb ldr r3, [r7, #12] - 8005348: 88fa ldrh r2, [r7, #6] - 800534a: 84da strh r2, [r3, #38] @ 0x26 + 80054ba: 68fb ldr r3, [r7, #12] + 80054bc: 88fa ldrh r2, [r7, #6] + 80054be: 84da strh r2, [r3, #38] @ 0x26 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 800534c: 68fb ldr r3, [r7, #12] - 800534e: 689b ldr r3, [r3, #8] - 8005350: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8005354: d108 bne.n 8005368 - 8005356: 68fb ldr r3, [r7, #12] - 8005358: 691b ldr r3, [r3, #16] - 800535a: 2b00 cmp r3, #0 - 800535c: d104 bne.n 8005368 + 80054c0: 68fb ldr r3, [r7, #12] + 80054c2: 689b ldr r3, [r3, #8] + 80054c4: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 80054c8: d108 bne.n 80054dc + 80054ca: 68fb ldr r3, [r7, #12] + 80054cc: 691b ldr r3, [r3, #16] + 80054ce: 2b00 cmp r3, #0 + 80054d0: d104 bne.n 80054dc { pdata8bits = NULL; - 800535e: 2300 movs r3, #0 - 8005360: 61fb str r3, [r7, #28] + 80054d2: 2300 movs r3, #0 + 80054d4: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; - 8005362: 68bb ldr r3, [r7, #8] - 8005364: 61bb str r3, [r7, #24] - 8005366: e003 b.n 8005370 + 80054d6: 68bb ldr r3, [r7, #8] + 80054d8: 61bb str r3, [r7, #24] + 80054da: e003 b.n 80054e4 } else { pdata8bits = pData; - 8005368: 68bb ldr r3, [r7, #8] - 800536a: 61fb str r3, [r7, #28] + 80054dc: 68bb ldr r3, [r7, #8] + 80054de: 61fb str r3, [r7, #28] pdata16bits = NULL; - 800536c: 2300 movs r3, #0 - 800536e: 61bb str r3, [r7, #24] + 80054e0: 2300 movs r3, #0 + 80054e2: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) - 8005370: e02e b.n 80053d0 + 80054e4: e02e b.n 8005544 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 8005372: 683b ldr r3, [r7, #0] - 8005374: 9300 str r3, [sp, #0] - 8005376: 697b ldr r3, [r7, #20] - 8005378: 2200 movs r2, #0 - 800537a: 2180 movs r1, #128 @ 0x80 - 800537c: 68f8 ldr r0, [r7, #12] - 800537e: f000 fb01 bl 8005984 - 8005382: 4603 mov r3, r0 - 8005384: 2b00 cmp r3, #0 - 8005386: d005 beq.n 8005394 + 80054e6: 683b ldr r3, [r7, #0] + 80054e8: 9300 str r3, [sp, #0] + 80054ea: 697b ldr r3, [r7, #20] + 80054ec: 2200 movs r2, #0 + 80054ee: 2180 movs r1, #128 @ 0x80 + 80054f0: 68f8 ldr r0, [r7, #12] + 80054f2: f000 fb01 bl 8005af8 + 80054f6: 4603 mov r3, r0 + 80054f8: 2b00 cmp r3, #0 + 80054fa: d005 beq.n 8005508 { huart->gState = HAL_UART_STATE_READY; - 8005388: 68fb ldr r3, [r7, #12] - 800538a: 2220 movs r2, #32 - 800538c: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 80054fc: 68fb ldr r3, [r7, #12] + 80054fe: 2220 movs r2, #32 + 8005500: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; - 8005390: 2303 movs r3, #3 - 8005392: e03a b.n 800540a + 8005504: 2303 movs r3, #3 + 8005506: e03a b.n 800557e } if (pdata8bits == NULL) - 8005394: 69fb ldr r3, [r7, #28] - 8005396: 2b00 cmp r3, #0 - 8005398: d10b bne.n 80053b2 + 8005508: 69fb ldr r3, [r7, #28] + 800550a: 2b00 cmp r3, #0 + 800550c: d10b bne.n 8005526 { huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); - 800539a: 69bb ldr r3, [r7, #24] - 800539c: 881b ldrh r3, [r3, #0] - 800539e: 461a mov r2, r3 - 80053a0: 68fb ldr r3, [r7, #12] - 80053a2: 681b ldr r3, [r3, #0] - 80053a4: f3c2 0208 ubfx r2, r2, #0, #9 - 80053a8: 605a str r2, [r3, #4] + 800550e: 69bb ldr r3, [r7, #24] + 8005510: 881b ldrh r3, [r3, #0] + 8005512: 461a mov r2, r3 + 8005514: 68fb ldr r3, [r7, #12] + 8005516: 681b ldr r3, [r3, #0] + 8005518: f3c2 0208 ubfx r2, r2, #0, #9 + 800551c: 605a str r2, [r3, #4] pdata16bits++; - 80053aa: 69bb ldr r3, [r7, #24] - 80053ac: 3302 adds r3, #2 - 80053ae: 61bb str r3, [r7, #24] - 80053b0: e007 b.n 80053c2 + 800551e: 69bb ldr r3, [r7, #24] + 8005520: 3302 adds r3, #2 + 8005522: 61bb str r3, [r7, #24] + 8005524: e007 b.n 8005536 } else { huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); - 80053b2: 69fb ldr r3, [r7, #28] - 80053b4: 781a ldrb r2, [r3, #0] - 80053b6: 68fb ldr r3, [r7, #12] - 80053b8: 681b ldr r3, [r3, #0] - 80053ba: 605a str r2, [r3, #4] + 8005526: 69fb ldr r3, [r7, #28] + 8005528: 781a ldrb r2, [r3, #0] + 800552a: 68fb ldr r3, [r7, #12] + 800552c: 681b ldr r3, [r3, #0] + 800552e: 605a str r2, [r3, #4] pdata8bits++; - 80053bc: 69fb ldr r3, [r7, #28] - 80053be: 3301 adds r3, #1 - 80053c0: 61fb str r3, [r7, #28] + 8005530: 69fb ldr r3, [r7, #28] + 8005532: 3301 adds r3, #1 + 8005534: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 80053c2: 68fb ldr r3, [r7, #12] - 80053c4: 8cdb ldrh r3, [r3, #38] @ 0x26 - 80053c6: b29b uxth r3, r3 - 80053c8: 3b01 subs r3, #1 - 80053ca: b29a uxth r2, r3 - 80053cc: 68fb ldr r3, [r7, #12] - 80053ce: 84da strh r2, [r3, #38] @ 0x26 + 8005536: 68fb ldr r3, [r7, #12] + 8005538: 8cdb ldrh r3, [r3, #38] @ 0x26 + 800553a: b29b uxth r3, r3 + 800553c: 3b01 subs r3, #1 + 800553e: b29a uxth r2, r3 + 8005540: 68fb ldr r3, [r7, #12] + 8005542: 84da strh r2, [r3, #38] @ 0x26 while (huart->TxXferCount > 0U) - 80053d0: 68fb ldr r3, [r7, #12] - 80053d2: 8cdb ldrh r3, [r3, #38] @ 0x26 - 80053d4: b29b uxth r3, r3 - 80053d6: 2b00 cmp r3, #0 - 80053d8: d1cb bne.n 8005372 + 8005544: 68fb ldr r3, [r7, #12] + 8005546: 8cdb ldrh r3, [r3, #38] @ 0x26 + 8005548: b29b uxth r3, r3 + 800554a: 2b00 cmp r3, #0 + 800554c: d1cb bne.n 80054e6 } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 80053da: 683b ldr r3, [r7, #0] - 80053dc: 9300 str r3, [sp, #0] - 80053de: 697b ldr r3, [r7, #20] - 80053e0: 2200 movs r2, #0 - 80053e2: 2140 movs r1, #64 @ 0x40 - 80053e4: 68f8 ldr r0, [r7, #12] - 80053e6: f000 facd bl 8005984 - 80053ea: 4603 mov r3, r0 - 80053ec: 2b00 cmp r3, #0 - 80053ee: d005 beq.n 80053fc + 800554e: 683b ldr r3, [r7, #0] + 8005550: 9300 str r3, [sp, #0] + 8005552: 697b ldr r3, [r7, #20] + 8005554: 2200 movs r2, #0 + 8005556: 2140 movs r1, #64 @ 0x40 + 8005558: 68f8 ldr r0, [r7, #12] + 800555a: f000 facd bl 8005af8 + 800555e: 4603 mov r3, r0 + 8005560: 2b00 cmp r3, #0 + 8005562: d005 beq.n 8005570 { huart->gState = HAL_UART_STATE_READY; - 80053f0: 68fb ldr r3, [r7, #12] - 80053f2: 2220 movs r2, #32 - 80053f4: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005564: 68fb ldr r3, [r7, #12] + 8005566: 2220 movs r2, #32 + 8005568: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; - 80053f8: 2303 movs r3, #3 - 80053fa: e006 b.n 800540a + 800556c: 2303 movs r3, #3 + 800556e: e006 b.n 800557e } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 80053fc: 68fb ldr r3, [r7, #12] - 80053fe: 2220 movs r2, #32 - 8005400: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005570: 68fb ldr r3, [r7, #12] + 8005572: 2220 movs r2, #32 + 8005574: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_OK; - 8005404: 2300 movs r3, #0 - 8005406: e000 b.n 800540a + 8005578: 2300 movs r3, #0 + 800557a: e000 b.n 800557e } else { return HAL_BUSY; - 8005408: 2302 movs r3, #2 + 800557c: 2302 movs r3, #2 } } - 800540a: 4618 mov r0, r3 - 800540c: 3720 adds r7, #32 - 800540e: 46bd mov sp, r7 - 8005410: bd80 pop {r7, pc} + 800557e: 4618 mov r0, r3 + 8005580: 3720 adds r7, #32 + 8005582: 46bd mov sp, r7 + 8005584: bd80 pop {r7, pc} ... -08005414 : +08005588 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - 8005414: b580 push {r7, lr} - 8005416: b0ba sub sp, #232 @ 0xe8 - 8005418: af00 add r7, sp, #0 - 800541a: 6078 str r0, [r7, #4] + 8005588: b580 push {r7, lr} + 800558a: b0ba sub sp, #232 @ 0xe8 + 800558c: af00 add r7, sp, #0 + 800558e: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->SR); - 800541c: 687b ldr r3, [r7, #4] - 800541e: 681b ldr r3, [r3, #0] - 8005420: 681b ldr r3, [r3, #0] - 8005422: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 + 8005590: 687b ldr r3, [r7, #4] + 8005592: 681b ldr r3, [r3, #0] + 8005594: 681b ldr r3, [r3, #0] + 8005596: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8005426: 687b ldr r3, [r7, #4] - 8005428: 681b ldr r3, [r3, #0] - 800542a: 68db ldr r3, [r3, #12] - 800542c: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 + 800559a: 687b ldr r3, [r7, #4] + 800559c: 681b ldr r3, [r3, #0] + 800559e: 68db ldr r3, [r3, #12] + 80055a0: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8005430: 687b ldr r3, [r7, #4] - 8005432: 681b ldr r3, [r3, #0] - 8005434: 695b ldr r3, [r3, #20] - 8005436: f8c7 30dc str.w r3, [r7, #220] @ 0xdc + 80055a4: 687b ldr r3, [r7, #4] + 80055a6: 681b ldr r3, [r3, #0] + 80055a8: 695b ldr r3, [r3, #20] + 80055aa: f8c7 30dc str.w r3, [r7, #220] @ 0xdc uint32_t errorflags = 0x00U; - 800543a: 2300 movs r3, #0 - 800543c: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 + 80055ae: 2300 movs r3, #0 + 80055b0: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 uint32_t dmarequest = 0x00U; - 8005440: 2300 movs r3, #0 - 8005442: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 + 80055b4: 2300 movs r3, #0 + 80055b6: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); - 8005446: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 800544a: f003 030f and.w r3, r3, #15 - 800544e: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 + 80055ba: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80055be: f003 030f and.w r3, r3, #15 + 80055c2: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 if (errorflags == RESET) - 8005452: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 - 8005456: 2b00 cmp r3, #0 - 8005458: d10f bne.n 800547a + 80055c6: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 + 80055ca: 2b00 cmp r3, #0 + 80055cc: d10f bne.n 80055ee { /* UART in mode Receiver -------------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 800545a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 800545e: f003 0320 and.w r3, r3, #32 - 8005462: 2b00 cmp r3, #0 - 8005464: d009 beq.n 800547a - 8005466: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 800546a: f003 0320 and.w r3, r3, #32 - 800546e: 2b00 cmp r3, #0 - 8005470: d003 beq.n 800547a + 80055ce: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80055d2: f003 0320 and.w r3, r3, #32 + 80055d6: 2b00 cmp r3, #0 + 80055d8: d009 beq.n 80055ee + 80055da: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80055de: f003 0320 and.w r3, r3, #32 + 80055e2: 2b00 cmp r3, #0 + 80055e4: d003 beq.n 80055ee { UART_Receive_IT(huart); - 8005472: 6878 ldr r0, [r7, #4] - 8005474: f000 fbbc bl 8005bf0 + 80055e6: 6878 ldr r0, [r7, #4] + 80055e8: f000 fbbc bl 8005d64 return; - 8005478: e25b b.n 8005932 + 80055ec: e25b b.n 8005aa6 } } /* If some errors occur */ if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) - 800547a: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 - 800547e: 2b00 cmp r3, #0 - 8005480: f000 80de beq.w 8005640 - 8005484: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 8005488: f003 0301 and.w r3, r3, #1 - 800548c: 2b00 cmp r3, #0 - 800548e: d106 bne.n 800549e + 80055ee: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 + 80055f2: 2b00 cmp r3, #0 + 80055f4: f000 80de beq.w 80057b4 + 80055f8: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 80055fc: f003 0301 and.w r3, r3, #1 + 8005600: 2b00 cmp r3, #0 + 8005602: d106 bne.n 8005612 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) - 8005490: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005494: f403 7390 and.w r3, r3, #288 @ 0x120 - 8005498: 2b00 cmp r3, #0 - 800549a: f000 80d1 beq.w 8005640 + 8005604: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005608: f403 7390 and.w r3, r3, #288 @ 0x120 + 800560c: 2b00 cmp r3, #0 + 800560e: f000 80d1 beq.w 80057b4 { /* UART parity error interrupt occurred ----------------------------------*/ if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) - 800549e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 80054a2: f003 0301 and.w r3, r3, #1 - 80054a6: 2b00 cmp r3, #0 - 80054a8: d00b beq.n 80054c2 - 80054aa: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 80054ae: f403 7380 and.w r3, r3, #256 @ 0x100 - 80054b2: 2b00 cmp r3, #0 - 80054b4: d005 beq.n 80054c2 + 8005612: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005616: f003 0301 and.w r3, r3, #1 + 800561a: 2b00 cmp r3, #0 + 800561c: d00b beq.n 8005636 + 800561e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005622: f403 7380 and.w r3, r3, #256 @ 0x100 + 8005626: 2b00 cmp r3, #0 + 8005628: d005 beq.n 8005636 { huart->ErrorCode |= HAL_UART_ERROR_PE; - 80054b6: 687b ldr r3, [r7, #4] - 80054b8: 6c5b ldr r3, [r3, #68] @ 0x44 - 80054ba: f043 0201 orr.w r2, r3, #1 - 80054be: 687b ldr r3, [r7, #4] - 80054c0: 645a str r2, [r3, #68] @ 0x44 + 800562a: 687b ldr r3, [r7, #4] + 800562c: 6c5b ldr r3, [r3, #68] @ 0x44 + 800562e: f043 0201 orr.w r2, r3, #1 + 8005632: 687b ldr r3, [r7, #4] + 8005634: 645a str r2, [r3, #68] @ 0x44 } /* UART noise error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 80054c2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 80054c6: f003 0304 and.w r3, r3, #4 - 80054ca: 2b00 cmp r3, #0 - 80054cc: d00b beq.n 80054e6 - 80054ce: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 80054d2: f003 0301 and.w r3, r3, #1 - 80054d6: 2b00 cmp r3, #0 - 80054d8: d005 beq.n 80054e6 + 8005636: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 800563a: f003 0304 and.w r3, r3, #4 + 800563e: 2b00 cmp r3, #0 + 8005640: d00b beq.n 800565a + 8005642: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8005646: f003 0301 and.w r3, r3, #1 + 800564a: 2b00 cmp r3, #0 + 800564c: d005 beq.n 800565a { huart->ErrorCode |= HAL_UART_ERROR_NE; - 80054da: 687b ldr r3, [r7, #4] - 80054dc: 6c5b ldr r3, [r3, #68] @ 0x44 - 80054de: f043 0202 orr.w r2, r3, #2 - 80054e2: 687b ldr r3, [r7, #4] - 80054e4: 645a str r2, [r3, #68] @ 0x44 + 800564e: 687b ldr r3, [r7, #4] + 8005650: 6c5b ldr r3, [r3, #68] @ 0x44 + 8005652: f043 0202 orr.w r2, r3, #2 + 8005656: 687b ldr r3, [r7, #4] + 8005658: 645a str r2, [r3, #68] @ 0x44 } /* UART frame error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 80054e6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 80054ea: f003 0302 and.w r3, r3, #2 - 80054ee: 2b00 cmp r3, #0 - 80054f0: d00b beq.n 800550a - 80054f2: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 80054f6: f003 0301 and.w r3, r3, #1 - 80054fa: 2b00 cmp r3, #0 - 80054fc: d005 beq.n 800550a + 800565a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 800565e: f003 0302 and.w r3, r3, #2 + 8005662: 2b00 cmp r3, #0 + 8005664: d00b beq.n 800567e + 8005666: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 800566a: f003 0301 and.w r3, r3, #1 + 800566e: 2b00 cmp r3, #0 + 8005670: d005 beq.n 800567e { huart->ErrorCode |= HAL_UART_ERROR_FE; - 80054fe: 687b ldr r3, [r7, #4] - 8005500: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005502: f043 0204 orr.w r2, r3, #4 - 8005506: 687b ldr r3, [r7, #4] - 8005508: 645a str r2, [r3, #68] @ 0x44 + 8005672: 687b ldr r3, [r7, #4] + 8005674: 6c5b ldr r3, [r3, #68] @ 0x44 + 8005676: f043 0204 orr.w r2, r3, #4 + 800567a: 687b ldr r3, [r7, #4] + 800567c: 645a str r2, [r3, #68] @ 0x44 } /* UART Over-Run interrupt occurred --------------------------------------*/ if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) - 800550a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 800550e: f003 0308 and.w r3, r3, #8 - 8005512: 2b00 cmp r3, #0 - 8005514: d011 beq.n 800553a - 8005516: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 800551a: f003 0320 and.w r3, r3, #32 - 800551e: 2b00 cmp r3, #0 - 8005520: d105 bne.n 800552e + 800567e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005682: f003 0308 and.w r3, r3, #8 + 8005686: 2b00 cmp r3, #0 + 8005688: d011 beq.n 80056ae + 800568a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 800568e: f003 0320 and.w r3, r3, #32 + 8005692: 2b00 cmp r3, #0 + 8005694: d105 bne.n 80056a2 || ((cr3its & USART_CR3_EIE) != RESET))) - 8005522: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 8005526: f003 0301 and.w r3, r3, #1 - 800552a: 2b00 cmp r3, #0 - 800552c: d005 beq.n 800553a + 8005696: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 800569a: f003 0301 and.w r3, r3, #1 + 800569e: 2b00 cmp r3, #0 + 80056a0: d005 beq.n 80056ae { huart->ErrorCode |= HAL_UART_ERROR_ORE; - 800552e: 687b ldr r3, [r7, #4] - 8005530: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005532: f043 0208 orr.w r2, r3, #8 - 8005536: 687b ldr r3, [r7, #4] - 8005538: 645a str r2, [r3, #68] @ 0x44 + 80056a2: 687b ldr r3, [r7, #4] + 80056a4: 6c5b ldr r3, [r3, #68] @ 0x44 + 80056a6: f043 0208 orr.w r2, r3, #8 + 80056aa: 687b ldr r3, [r7, #4] + 80056ac: 645a str r2, [r3, #68] @ 0x44 } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 800553a: 687b ldr r3, [r7, #4] - 800553c: 6c5b ldr r3, [r3, #68] @ 0x44 - 800553e: 2b00 cmp r3, #0 - 8005540: f000 81f2 beq.w 8005928 + 80056ae: 687b ldr r3, [r7, #4] + 80056b0: 6c5b ldr r3, [r3, #68] @ 0x44 + 80056b2: 2b00 cmp r3, #0 + 80056b4: f000 81f2 beq.w 8005a9c { /* UART in mode Receiver -----------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 8005544: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005548: f003 0320 and.w r3, r3, #32 - 800554c: 2b00 cmp r3, #0 - 800554e: d008 beq.n 8005562 - 8005550: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005554: f003 0320 and.w r3, r3, #32 - 8005558: 2b00 cmp r3, #0 - 800555a: d002 beq.n 8005562 + 80056b8: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80056bc: f003 0320 and.w r3, r3, #32 + 80056c0: 2b00 cmp r3, #0 + 80056c2: d008 beq.n 80056d6 + 80056c4: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80056c8: f003 0320 and.w r3, r3, #32 + 80056cc: 2b00 cmp r3, #0 + 80056ce: d002 beq.n 80056d6 { UART_Receive_IT(huart); - 800555c: 6878 ldr r0, [r7, #4] - 800555e: f000 fb47 bl 8005bf0 + 80056d0: 6878 ldr r0, [r7, #4] + 80056d2: f000 fb47 bl 8005d64 } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - 8005562: 687b ldr r3, [r7, #4] - 8005564: 681b ldr r3, [r3, #0] - 8005566: 695b ldr r3, [r3, #20] - 8005568: f003 0340 and.w r3, r3, #64 @ 0x40 - 800556c: 2b00 cmp r3, #0 - 800556e: bf14 ite ne - 8005570: 2301 movne r3, #1 - 8005572: 2300 moveq r3, #0 - 8005574: b2db uxtb r3, r3 - 8005576: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 + 80056d6: 687b ldr r3, [r7, #4] + 80056d8: 681b ldr r3, [r3, #0] + 80056da: 695b ldr r3, [r3, #20] + 80056dc: f003 0340 and.w r3, r3, #64 @ 0x40 + 80056e0: 2b00 cmp r3, #0 + 80056e2: bf14 ite ne + 80056e4: 2301 movne r3, #1 + 80056e6: 2300 moveq r3, #0 + 80056e8: b2db uxtb r3, r3 + 80056ea: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) - 800557a: 687b ldr r3, [r7, #4] - 800557c: 6c5b ldr r3, [r3, #68] @ 0x44 - 800557e: f003 0308 and.w r3, r3, #8 - 8005582: 2b00 cmp r3, #0 - 8005584: d103 bne.n 800558e - 8005586: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 - 800558a: 2b00 cmp r3, #0 - 800558c: d04f beq.n 800562e + 80056ee: 687b ldr r3, [r7, #4] + 80056f0: 6c5b ldr r3, [r3, #68] @ 0x44 + 80056f2: f003 0308 and.w r3, r3, #8 + 80056f6: 2b00 cmp r3, #0 + 80056f8: d103 bne.n 8005702 + 80056fa: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 + 80056fe: 2b00 cmp r3, #0 + 8005700: d04f beq.n 80057a2 { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); - 800558e: 6878 ldr r0, [r7, #4] - 8005590: f000 fa51 bl 8005a36 + 8005702: 6878 ldr r0, [r7, #4] + 8005704: f000 fa51 bl 8005baa /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005594: 687b ldr r3, [r7, #4] - 8005596: 681b ldr r3, [r3, #0] - 8005598: 695b ldr r3, [r3, #20] - 800559a: f003 0340 and.w r3, r3, #64 @ 0x40 - 800559e: 2b00 cmp r3, #0 - 80055a0: d041 beq.n 8005626 + 8005708: 687b ldr r3, [r7, #4] + 800570a: 681b ldr r3, [r3, #0] + 800570c: 695b ldr r3, [r3, #20] + 800570e: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005712: 2b00 cmp r3, #0 + 8005714: d041 beq.n 800579a { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 80055a2: 687b ldr r3, [r7, #4] - 80055a4: 681b ldr r3, [r3, #0] - 80055a6: 3314 adds r3, #20 - 80055a8: f8c7 309c str.w r3, [r7, #156] @ 0x9c + 8005716: 687b ldr r3, [r7, #4] + 8005718: 681b ldr r3, [r3, #0] + 800571a: 3314 adds r3, #20 + 800571c: f8c7 309c str.w r3, [r7, #156] @ 0x9c */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80055ac: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c - 80055b0: e853 3f00 ldrex r3, [r3] - 80055b4: f8c7 3098 str.w r3, [r7, #152] @ 0x98 + 8005720: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c + 8005724: e853 3f00 ldrex r3, [r3] + 8005728: f8c7 3098 str.w r3, [r7, #152] @ 0x98 return(result); - 80055b8: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 - 80055bc: f023 0340 bic.w r3, r3, #64 @ 0x40 - 80055c0: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 - 80055c4: 687b ldr r3, [r7, #4] - 80055c6: 681b ldr r3, [r3, #0] - 80055c8: 3314 adds r3, #20 - 80055ca: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 - 80055ce: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 - 80055d2: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 + 800572c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 + 8005730: f023 0340 bic.w r3, r3, #64 @ 0x40 + 8005734: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 + 8005738: 687b ldr r3, [r7, #4] + 800573a: 681b ldr r3, [r3, #0] + 800573c: 3314 adds r3, #20 + 800573e: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 + 8005742: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 + 8005746: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80055d6: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 - 80055da: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 - 80055de: e841 2300 strex r3, r2, [r1] - 80055e2: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 + 800574a: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 + 800574e: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 + 8005752: e841 2300 strex r3, r2, [r1] + 8005756: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 return(result); - 80055e6: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 - 80055ea: 2b00 cmp r3, #0 - 80055ec: d1d9 bne.n 80055a2 + 800575a: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 + 800575e: 2b00 cmp r3, #0 + 8005760: d1d9 bne.n 8005716 /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) - 80055ee: 687b ldr r3, [r7, #4] - 80055f0: 6bdb ldr r3, [r3, #60] @ 0x3c - 80055f2: 2b00 cmp r3, #0 - 80055f4: d013 beq.n 800561e + 8005762: 687b ldr r3, [r7, #4] + 8005764: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005766: 2b00 cmp r3, #0 + 8005768: d013 beq.n 8005792 { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 80055f6: 687b ldr r3, [r7, #4] - 80055f8: 6bdb ldr r3, [r3, #60] @ 0x3c - 80055fa: 4a7e ldr r2, [pc, #504] @ (80057f4 ) - 80055fc: 635a str r2, [r3, #52] @ 0x34 + 800576a: 687b ldr r3, [r7, #4] + 800576c: 6bdb ldr r3, [r3, #60] @ 0x3c + 800576e: 4a7e ldr r2, [pc, #504] @ (8005968 ) + 8005770: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 80055fe: 687b ldr r3, [r7, #4] - 8005600: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005602: 4618 mov r0, r3 - 8005604: f7fd faf8 bl 8002bf8 - 8005608: 4603 mov r3, r0 - 800560a: 2b00 cmp r3, #0 - 800560c: d016 beq.n 800563c + 8005772: 687b ldr r3, [r7, #4] + 8005774: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005776: 4618 mov r0, r3 + 8005778: f7fd faf8 bl 8002d6c + 800577c: 4603 mov r3, r0 + 800577e: 2b00 cmp r3, #0 + 8005780: d016 beq.n 80057b0 { /* Call Directly XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); - 800560e: 687b ldr r3, [r7, #4] - 8005610: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005612: 6b5b ldr r3, [r3, #52] @ 0x34 - 8005614: 687a ldr r2, [r7, #4] - 8005616: 6bd2 ldr r2, [r2, #60] @ 0x3c - 8005618: 4610 mov r0, r2 - 800561a: 4798 blx r3 + 8005782: 687b ldr r3, [r7, #4] + 8005784: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005786: 6b5b ldr r3, [r3, #52] @ 0x34 + 8005788: 687a ldr r2, [r7, #4] + 800578a: 6bd2 ldr r2, [r2, #60] @ 0x3c + 800578c: 4610 mov r0, r2 + 800578e: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 800561c: e00e b.n 800563c + 8005790: e00e b.n 80057b0 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 800561e: 6878 ldr r0, [r7, #4] - 8005620: f000 f99c bl 800595c + 8005792: 6878 ldr r0, [r7, #4] + 8005794: f000 f99c bl 8005ad0 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005624: e00a b.n 800563c + 8005798: e00a b.n 80057b0 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005626: 6878 ldr r0, [r7, #4] - 8005628: f000 f998 bl 800595c + 800579a: 6878 ldr r0, [r7, #4] + 800579c: f000 f998 bl 8005ad0 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 800562c: e006 b.n 800563c + 80057a0: e006 b.n 80057b0 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 800562e: 6878 ldr r0, [r7, #4] - 8005630: f000 f994 bl 800595c + 80057a2: 6878 ldr r0, [r7, #4] + 80057a4: f000 f994 bl 8005ad0 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8005634: 687b ldr r3, [r7, #4] - 8005636: 2200 movs r2, #0 - 8005638: 645a str r2, [r3, #68] @ 0x44 + 80057a8: 687b ldr r3, [r7, #4] + 80057aa: 2200 movs r2, #0 + 80057ac: 645a str r2, [r3, #68] @ 0x44 } } return; - 800563a: e175 b.n 8005928 + 80057ae: e175 b.n 8005a9c if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 800563c: bf00 nop + 80057b0: bf00 nop return; - 800563e: e173 b.n 8005928 + 80057b2: e173 b.n 8005a9c } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8005640: 687b ldr r3, [r7, #4] - 8005642: 6b1b ldr r3, [r3, #48] @ 0x30 - 8005644: 2b01 cmp r3, #1 - 8005646: f040 814f bne.w 80058e8 + 80057b4: 687b ldr r3, [r7, #4] + 80057b6: 6b1b ldr r3, [r3, #48] @ 0x30 + 80057b8: 2b01 cmp r3, #1 + 80057ba: f040 814f bne.w 8005a5c && ((isrflags & USART_SR_IDLE) != 0U) - 800564a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 800564e: f003 0310 and.w r3, r3, #16 - 8005652: 2b00 cmp r3, #0 - 8005654: f000 8148 beq.w 80058e8 + 80057be: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80057c2: f003 0310 and.w r3, r3, #16 + 80057c6: 2b00 cmp r3, #0 + 80057c8: f000 8148 beq.w 8005a5c && ((cr1its & USART_SR_IDLE) != 0U)) - 8005658: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 800565c: f003 0310 and.w r3, r3, #16 - 8005660: 2b00 cmp r3, #0 - 8005662: f000 8141 beq.w 80058e8 + 80057cc: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80057d0: f003 0310 and.w r3, r3, #16 + 80057d4: 2b00 cmp r3, #0 + 80057d6: f000 8141 beq.w 8005a5c { __HAL_UART_CLEAR_IDLEFLAG(huart); - 8005666: 2300 movs r3, #0 - 8005668: 60bb str r3, [r7, #8] - 800566a: 687b ldr r3, [r7, #4] - 800566c: 681b ldr r3, [r3, #0] - 800566e: 681b ldr r3, [r3, #0] - 8005670: 60bb str r3, [r7, #8] - 8005672: 687b ldr r3, [r7, #4] - 8005674: 681b ldr r3, [r3, #0] - 8005676: 685b ldr r3, [r3, #4] - 8005678: 60bb str r3, [r7, #8] - 800567a: 68bb ldr r3, [r7, #8] + 80057da: 2300 movs r3, #0 + 80057dc: 60bb str r3, [r7, #8] + 80057de: 687b ldr r3, [r7, #4] + 80057e0: 681b ldr r3, [r3, #0] + 80057e2: 681b ldr r3, [r3, #0] + 80057e4: 60bb str r3, [r7, #8] + 80057e6: 687b ldr r3, [r7, #4] + 80057e8: 681b ldr r3, [r3, #0] + 80057ea: 685b ldr r3, [r3, #4] + 80057ec: 60bb str r3, [r7, #8] + 80057ee: 68bb ldr r3, [r7, #8] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 800567c: 687b ldr r3, [r7, #4] - 800567e: 681b ldr r3, [r3, #0] - 8005680: 695b ldr r3, [r3, #20] - 8005682: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005686: 2b00 cmp r3, #0 - 8005688: f000 80b6 beq.w 80057f8 + 80057f0: 687b ldr r3, [r7, #4] + 80057f2: 681b ldr r3, [r3, #0] + 80057f4: 695b ldr r3, [r3, #20] + 80057f6: f003 0340 and.w r3, r3, #64 @ 0x40 + 80057fa: 2b00 cmp r3, #0 + 80057fc: f000 80b6 beq.w 800596c { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 800568c: 687b ldr r3, [r7, #4] - 800568e: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005690: 681b ldr r3, [r3, #0] - 8005692: 685b ldr r3, [r3, #4] - 8005694: f8a7 30be strh.w r3, [r7, #190] @ 0xbe + 8005800: 687b ldr r3, [r7, #4] + 8005802: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005804: 681b ldr r3, [r3, #0] + 8005806: 685b ldr r3, [r3, #4] + 8005808: f8a7 30be strh.w r3, [r7, #190] @ 0xbe if ((nb_remaining_rx_data > 0U) - 8005698: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe - 800569c: 2b00 cmp r3, #0 - 800569e: f000 8145 beq.w 800592c + 800580c: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe + 8005810: 2b00 cmp r3, #0 + 8005812: f000 8145 beq.w 8005aa0 && (nb_remaining_rx_data < huart->RxXferSize)) - 80056a2: 687b ldr r3, [r7, #4] - 80056a4: 8d9b ldrh r3, [r3, #44] @ 0x2c - 80056a6: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe - 80056aa: 429a cmp r2, r3 - 80056ac: f080 813e bcs.w 800592c + 8005816: 687b ldr r3, [r7, #4] + 8005818: 8d9b ldrh r3, [r3, #44] @ 0x2c + 800581a: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe + 800581e: 429a cmp r2, r3 + 8005820: f080 813e bcs.w 8005aa0 { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; - 80056b0: 687b ldr r3, [r7, #4] - 80056b2: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe - 80056b6: 85da strh r2, [r3, #46] @ 0x2e + 8005824: 687b ldr r3, [r7, #4] + 8005826: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe + 800582a: 85da strh r2, [r3, #46] @ 0x2e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) - 80056b8: 687b ldr r3, [r7, #4] - 80056ba: 6bdb ldr r3, [r3, #60] @ 0x3c - 80056bc: 699b ldr r3, [r3, #24] - 80056be: 2b20 cmp r3, #32 - 80056c0: f000 8088 beq.w 80057d4 + 800582c: 687b ldr r3, [r7, #4] + 800582e: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005830: 699b ldr r3, [r3, #24] + 8005832: 2b20 cmp r3, #32 + 8005834: f000 8088 beq.w 8005948 { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 80056c4: 687b ldr r3, [r7, #4] - 80056c6: 681b ldr r3, [r3, #0] - 80056c8: 330c adds r3, #12 - 80056ca: f8c7 3088 str.w r3, [r7, #136] @ 0x88 + 8005838: 687b ldr r3, [r7, #4] + 800583a: 681b ldr r3, [r3, #0] + 800583c: 330c adds r3, #12 + 800583e: f8c7 3088 str.w r3, [r7, #136] @ 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80056ce: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 - 80056d2: e853 3f00 ldrex r3, [r3] - 80056d6: f8c7 3084 str.w r3, [r7, #132] @ 0x84 + 8005842: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 + 8005846: e853 3f00 ldrex r3, [r3] + 800584a: f8c7 3084 str.w r3, [r7, #132] @ 0x84 return(result); - 80056da: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 - 80056de: f423 7380 bic.w r3, r3, #256 @ 0x100 - 80056e2: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 - 80056e6: 687b ldr r3, [r7, #4] - 80056e8: 681b ldr r3, [r3, #0] - 80056ea: 330c adds r3, #12 - 80056ec: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 - 80056f0: f8c7 2094 str.w r2, [r7, #148] @ 0x94 - 80056f4: f8c7 3090 str.w r3, [r7, #144] @ 0x90 + 800584e: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 + 8005852: f423 7380 bic.w r3, r3, #256 @ 0x100 + 8005856: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 + 800585a: 687b ldr r3, [r7, #4] + 800585c: 681b ldr r3, [r3, #0] + 800585e: 330c adds r3, #12 + 8005860: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 + 8005864: f8c7 2094 str.w r2, [r7, #148] @ 0x94 + 8005868: f8c7 3090 str.w r3, [r7, #144] @ 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80056f8: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 - 80056fc: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 - 8005700: e841 2300 strex r3, r2, [r1] - 8005704: f8c7 308c str.w r3, [r7, #140] @ 0x8c + 800586c: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 + 8005870: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 + 8005874: e841 2300 strex r3, r2, [r1] + 8005878: f8c7 308c str.w r3, [r7, #140] @ 0x8c return(result); - 8005708: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c - 800570c: 2b00 cmp r3, #0 - 800570e: d1d9 bne.n 80056c4 + 800587c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c + 8005880: 2b00 cmp r3, #0 + 8005882: d1d9 bne.n 8005838 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005710: 687b ldr r3, [r7, #4] - 8005712: 681b ldr r3, [r3, #0] - 8005714: 3314 adds r3, #20 - 8005716: 677b str r3, [r7, #116] @ 0x74 + 8005884: 687b ldr r3, [r7, #4] + 8005886: 681b ldr r3, [r3, #0] + 8005888: 3314 adds r3, #20 + 800588a: 677b str r3, [r7, #116] @ 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005718: 6f7b ldr r3, [r7, #116] @ 0x74 - 800571a: e853 3f00 ldrex r3, [r3] - 800571e: 673b str r3, [r7, #112] @ 0x70 + 800588c: 6f7b ldr r3, [r7, #116] @ 0x74 + 800588e: e853 3f00 ldrex r3, [r3] + 8005892: 673b str r3, [r7, #112] @ 0x70 return(result); - 8005720: 6f3b ldr r3, [r7, #112] @ 0x70 - 8005722: f023 0301 bic.w r3, r3, #1 - 8005726: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 - 800572a: 687b ldr r3, [r7, #4] - 800572c: 681b ldr r3, [r3, #0] - 800572e: 3314 adds r3, #20 - 8005730: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 - 8005734: f8c7 2080 str.w r2, [r7, #128] @ 0x80 - 8005738: 67fb str r3, [r7, #124] @ 0x7c + 8005894: 6f3b ldr r3, [r7, #112] @ 0x70 + 8005896: f023 0301 bic.w r3, r3, #1 + 800589a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 + 800589e: 687b ldr r3, [r7, #4] + 80058a0: 681b ldr r3, [r3, #0] + 80058a2: 3314 adds r3, #20 + 80058a4: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 + 80058a8: f8c7 2080 str.w r2, [r7, #128] @ 0x80 + 80058ac: 67fb str r3, [r7, #124] @ 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800573a: 6ff9 ldr r1, [r7, #124] @ 0x7c - 800573c: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 - 8005740: e841 2300 strex r3, r2, [r1] - 8005744: 67bb str r3, [r7, #120] @ 0x78 + 80058ae: 6ff9 ldr r1, [r7, #124] @ 0x7c + 80058b0: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 + 80058b4: e841 2300 strex r3, r2, [r1] + 80058b8: 67bb str r3, [r7, #120] @ 0x78 return(result); - 8005746: 6fbb ldr r3, [r7, #120] @ 0x78 - 8005748: 2b00 cmp r3, #0 - 800574a: d1e1 bne.n 8005710 + 80058ba: 6fbb ldr r3, [r7, #120] @ 0x78 + 80058bc: 2b00 cmp r3, #0 + 80058be: d1e1 bne.n 8005884 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 800574c: 687b ldr r3, [r7, #4] - 800574e: 681b ldr r3, [r3, #0] - 8005750: 3314 adds r3, #20 - 8005752: 663b str r3, [r7, #96] @ 0x60 + 80058c0: 687b ldr r3, [r7, #4] + 80058c2: 681b ldr r3, [r3, #0] + 80058c4: 3314 adds r3, #20 + 80058c6: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005754: 6e3b ldr r3, [r7, #96] @ 0x60 - 8005756: e853 3f00 ldrex r3, [r3] - 800575a: 65fb str r3, [r7, #92] @ 0x5c + 80058c8: 6e3b ldr r3, [r7, #96] @ 0x60 + 80058ca: e853 3f00 ldrex r3, [r3] + 80058ce: 65fb str r3, [r7, #92] @ 0x5c return(result); - 800575c: 6dfb ldr r3, [r7, #92] @ 0x5c - 800575e: f023 0340 bic.w r3, r3, #64 @ 0x40 - 8005762: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 - 8005766: 687b ldr r3, [r7, #4] - 8005768: 681b ldr r3, [r3, #0] - 800576a: 3314 adds r3, #20 - 800576c: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 - 8005770: 66fa str r2, [r7, #108] @ 0x6c - 8005772: 66bb str r3, [r7, #104] @ 0x68 + 80058d0: 6dfb ldr r3, [r7, #92] @ 0x5c + 80058d2: f023 0340 bic.w r3, r3, #64 @ 0x40 + 80058d6: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 + 80058da: 687b ldr r3, [r7, #4] + 80058dc: 681b ldr r3, [r3, #0] + 80058de: 3314 adds r3, #20 + 80058e0: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 + 80058e4: 66fa str r2, [r7, #108] @ 0x6c + 80058e6: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005774: 6eb9 ldr r1, [r7, #104] @ 0x68 - 8005776: 6efa ldr r2, [r7, #108] @ 0x6c - 8005778: e841 2300 strex r3, r2, [r1] - 800577c: 667b str r3, [r7, #100] @ 0x64 + 80058e8: 6eb9 ldr r1, [r7, #104] @ 0x68 + 80058ea: 6efa ldr r2, [r7, #108] @ 0x6c + 80058ec: e841 2300 strex r3, r2, [r1] + 80058f0: 667b str r3, [r7, #100] @ 0x64 return(result); - 800577e: 6e7b ldr r3, [r7, #100] @ 0x64 - 8005780: 2b00 cmp r3, #0 - 8005782: d1e3 bne.n 800574c + 80058f2: 6e7b ldr r3, [r7, #100] @ 0x64 + 80058f4: 2b00 cmp r3, #0 + 80058f6: d1e3 bne.n 80058c0 /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8005784: 687b ldr r3, [r7, #4] - 8005786: 2220 movs r2, #32 - 8005788: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 80058f8: 687b ldr r3, [r7, #4] + 80058fa: 2220 movs r2, #32 + 80058fc: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 800578c: 687b ldr r3, [r7, #4] - 800578e: 2200 movs r2, #0 - 8005790: 631a str r2, [r3, #48] @ 0x30 + 8005900: 687b ldr r3, [r7, #4] + 8005902: 2200 movs r2, #0 + 8005904: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005792: 687b ldr r3, [r7, #4] - 8005794: 681b ldr r3, [r3, #0] - 8005796: 330c adds r3, #12 - 8005798: 64fb str r3, [r7, #76] @ 0x4c + 8005906: 687b ldr r3, [r7, #4] + 8005908: 681b ldr r3, [r3, #0] + 800590a: 330c adds r3, #12 + 800590c: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 800579a: 6cfb ldr r3, [r7, #76] @ 0x4c - 800579c: e853 3f00 ldrex r3, [r3] - 80057a0: 64bb str r3, [r7, #72] @ 0x48 + 800590e: 6cfb ldr r3, [r7, #76] @ 0x4c + 8005910: e853 3f00 ldrex r3, [r3] + 8005914: 64bb str r3, [r7, #72] @ 0x48 return(result); - 80057a2: 6cbb ldr r3, [r7, #72] @ 0x48 - 80057a4: f023 0310 bic.w r3, r3, #16 - 80057a8: f8c7 30ac str.w r3, [r7, #172] @ 0xac - 80057ac: 687b ldr r3, [r7, #4] - 80057ae: 681b ldr r3, [r3, #0] - 80057b0: 330c adds r3, #12 - 80057b2: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac - 80057b6: 65ba str r2, [r7, #88] @ 0x58 - 80057b8: 657b str r3, [r7, #84] @ 0x54 + 8005916: 6cbb ldr r3, [r7, #72] @ 0x48 + 8005918: f023 0310 bic.w r3, r3, #16 + 800591c: f8c7 30ac str.w r3, [r7, #172] @ 0xac + 8005920: 687b ldr r3, [r7, #4] + 8005922: 681b ldr r3, [r3, #0] + 8005924: 330c adds r3, #12 + 8005926: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac + 800592a: 65ba str r2, [r7, #88] @ 0x58 + 800592c: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80057ba: 6d79 ldr r1, [r7, #84] @ 0x54 - 80057bc: 6dba ldr r2, [r7, #88] @ 0x58 - 80057be: e841 2300 strex r3, r2, [r1] - 80057c2: 653b str r3, [r7, #80] @ 0x50 + 800592e: 6d79 ldr r1, [r7, #84] @ 0x54 + 8005930: 6dba ldr r2, [r7, #88] @ 0x58 + 8005932: e841 2300 strex r3, r2, [r1] + 8005936: 653b str r3, [r7, #80] @ 0x50 return(result); - 80057c4: 6d3b ldr r3, [r7, #80] @ 0x50 - 80057c6: 2b00 cmp r3, #0 - 80057c8: d1e3 bne.n 8005792 + 8005938: 6d3b ldr r3, [r7, #80] @ 0x50 + 800593a: 2b00 cmp r3, #0 + 800593c: d1e3 bne.n 8005906 /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); - 80057ca: 687b ldr r3, [r7, #4] - 80057cc: 6bdb ldr r3, [r3, #60] @ 0x3c - 80057ce: 4618 mov r0, r3 - 80057d0: f7fd f9d7 bl 8002b82 + 800593e: 687b ldr r3, [r7, #4] + 8005940: 6bdb ldr r3, [r3, #60] @ 0x3c + 8005942: 4618 mov r0, r3 + 8005944: f7fd f9d7 bl 8002cf6 } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 80057d4: 687b ldr r3, [r7, #4] - 80057d6: 2202 movs r2, #2 - 80057d8: 635a str r2, [r3, #52] @ 0x34 + 8005948: 687b ldr r3, [r7, #4] + 800594a: 2202 movs r2, #2 + 800594c: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 80057da: 687b ldr r3, [r7, #4] - 80057dc: 8d9a ldrh r2, [r3, #44] @ 0x2c - 80057de: 687b ldr r3, [r7, #4] - 80057e0: 8ddb ldrh r3, [r3, #46] @ 0x2e - 80057e2: b29b uxth r3, r3 - 80057e4: 1ad3 subs r3, r2, r3 - 80057e6: b29b uxth r3, r3 - 80057e8: 4619 mov r1, r3 - 80057ea: 6878 ldr r0, [r7, #4] - 80057ec: f000 f8bf bl 800596e + 800594e: 687b ldr r3, [r7, #4] + 8005950: 8d9a ldrh r2, [r3, #44] @ 0x2c + 8005952: 687b ldr r3, [r7, #4] + 8005954: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8005956: b29b uxth r3, r3 + 8005958: 1ad3 subs r3, r2, r3 + 800595a: b29b uxth r3, r3 + 800595c: 4619 mov r1, r3 + 800595e: 6878 ldr r0, [r7, #4] + 8005960: f000 f8bf bl 8005ae2 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; - 80057f0: e09c b.n 800592c - 80057f2: bf00 nop - 80057f4: 08005afb .word 0x08005afb + 8005964: e09c b.n 8005aa0 + 8005966: bf00 nop + 8005968: 08005c6f .word 0x08005c6f else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 80057f8: 687b ldr r3, [r7, #4] - 80057fa: 8d9a ldrh r2, [r3, #44] @ 0x2c - 80057fc: 687b ldr r3, [r7, #4] - 80057fe: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8005800: b29b uxth r3, r3 - 8005802: 1ad3 subs r3, r2, r3 - 8005804: f8a7 30ce strh.w r3, [r7, #206] @ 0xce + 800596c: 687b ldr r3, [r7, #4] + 800596e: 8d9a ldrh r2, [r3, #44] @ 0x2c + 8005970: 687b ldr r3, [r7, #4] + 8005972: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8005974: b29b uxth r3, r3 + 8005976: 1ad3 subs r3, r2, r3 + 8005978: f8a7 30ce strh.w r3, [r7, #206] @ 0xce if ((huart->RxXferCount > 0U) - 8005808: 687b ldr r3, [r7, #4] - 800580a: 8ddb ldrh r3, [r3, #46] @ 0x2e - 800580c: b29b uxth r3, r3 - 800580e: 2b00 cmp r3, #0 - 8005810: f000 808e beq.w 8005930 + 800597c: 687b ldr r3, [r7, #4] + 800597e: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8005980: b29b uxth r3, r3 + 8005982: 2b00 cmp r3, #0 + 8005984: f000 808e beq.w 8005aa4 && (nb_rx_data > 0U)) - 8005814: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce - 8005818: 2b00 cmp r3, #0 - 800581a: f000 8089 beq.w 8005930 + 8005988: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce + 800598c: 2b00 cmp r3, #0 + 800598e: f000 8089 beq.w 8005aa4 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 800581e: 687b ldr r3, [r7, #4] - 8005820: 681b ldr r3, [r3, #0] - 8005822: 330c adds r3, #12 - 8005824: 63bb str r3, [r7, #56] @ 0x38 + 8005992: 687b ldr r3, [r7, #4] + 8005994: 681b ldr r3, [r3, #0] + 8005996: 330c adds r3, #12 + 8005998: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005826: 6bbb ldr r3, [r7, #56] @ 0x38 - 8005828: e853 3f00 ldrex r3, [r3] - 800582c: 637b str r3, [r7, #52] @ 0x34 + 800599a: 6bbb ldr r3, [r7, #56] @ 0x38 + 800599c: e853 3f00 ldrex r3, [r3] + 80059a0: 637b str r3, [r7, #52] @ 0x34 return(result); - 800582e: 6b7b ldr r3, [r7, #52] @ 0x34 - 8005830: f423 7390 bic.w r3, r3, #288 @ 0x120 - 8005834: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 - 8005838: 687b ldr r3, [r7, #4] - 800583a: 681b ldr r3, [r3, #0] - 800583c: 330c adds r3, #12 - 800583e: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 - 8005842: 647a str r2, [r7, #68] @ 0x44 - 8005844: 643b str r3, [r7, #64] @ 0x40 + 80059a2: 6b7b ldr r3, [r7, #52] @ 0x34 + 80059a4: f423 7390 bic.w r3, r3, #288 @ 0x120 + 80059a8: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 + 80059ac: 687b ldr r3, [r7, #4] + 80059ae: 681b ldr r3, [r3, #0] + 80059b0: 330c adds r3, #12 + 80059b2: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 + 80059b6: 647a str r2, [r7, #68] @ 0x44 + 80059b8: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005846: 6c39 ldr r1, [r7, #64] @ 0x40 - 8005848: 6c7a ldr r2, [r7, #68] @ 0x44 - 800584a: e841 2300 strex r3, r2, [r1] - 800584e: 63fb str r3, [r7, #60] @ 0x3c + 80059ba: 6c39 ldr r1, [r7, #64] @ 0x40 + 80059bc: 6c7a ldr r2, [r7, #68] @ 0x44 + 80059be: e841 2300 strex r3, r2, [r1] + 80059c2: 63fb str r3, [r7, #60] @ 0x3c return(result); - 8005850: 6bfb ldr r3, [r7, #60] @ 0x3c - 8005852: 2b00 cmp r3, #0 - 8005854: d1e3 bne.n 800581e + 80059c4: 6bfb ldr r3, [r7, #60] @ 0x3c + 80059c6: 2b00 cmp r3, #0 + 80059c8: d1e3 bne.n 8005992 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005856: 687b ldr r3, [r7, #4] - 8005858: 681b ldr r3, [r3, #0] - 800585a: 3314 adds r3, #20 - 800585c: 627b str r3, [r7, #36] @ 0x24 + 80059ca: 687b ldr r3, [r7, #4] + 80059cc: 681b ldr r3, [r3, #0] + 80059ce: 3314 adds r3, #20 + 80059d0: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 800585e: 6a7b ldr r3, [r7, #36] @ 0x24 - 8005860: e853 3f00 ldrex r3, [r3] - 8005864: 623b str r3, [r7, #32] + 80059d2: 6a7b ldr r3, [r7, #36] @ 0x24 + 80059d4: e853 3f00 ldrex r3, [r3] + 80059d8: 623b str r3, [r7, #32] return(result); - 8005866: 6a3b ldr r3, [r7, #32] - 8005868: f023 0301 bic.w r3, r3, #1 - 800586c: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 - 8005870: 687b ldr r3, [r7, #4] - 8005872: 681b ldr r3, [r3, #0] - 8005874: 3314 adds r3, #20 - 8005876: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 - 800587a: 633a str r2, [r7, #48] @ 0x30 - 800587c: 62fb str r3, [r7, #44] @ 0x2c + 80059da: 6a3b ldr r3, [r7, #32] + 80059dc: f023 0301 bic.w r3, r3, #1 + 80059e0: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 + 80059e4: 687b ldr r3, [r7, #4] + 80059e6: 681b ldr r3, [r3, #0] + 80059e8: 3314 adds r3, #20 + 80059ea: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 + 80059ee: 633a str r2, [r7, #48] @ 0x30 + 80059f0: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 800587e: 6af9 ldr r1, [r7, #44] @ 0x2c - 8005880: 6b3a ldr r2, [r7, #48] @ 0x30 - 8005882: e841 2300 strex r3, r2, [r1] - 8005886: 62bb str r3, [r7, #40] @ 0x28 + 80059f2: 6af9 ldr r1, [r7, #44] @ 0x2c + 80059f4: 6b3a ldr r2, [r7, #48] @ 0x30 + 80059f6: e841 2300 strex r3, r2, [r1] + 80059fa: 62bb str r3, [r7, #40] @ 0x28 return(result); - 8005888: 6abb ldr r3, [r7, #40] @ 0x28 - 800588a: 2b00 cmp r3, #0 - 800588c: d1e3 bne.n 8005856 + 80059fc: 6abb ldr r3, [r7, #40] @ 0x28 + 80059fe: 2b00 cmp r3, #0 + 8005a00: d1e3 bne.n 80059ca /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 800588e: 687b ldr r3, [r7, #4] - 8005890: 2220 movs r2, #32 - 8005892: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005a02: 687b ldr r3, [r7, #4] + 8005a04: 2220 movs r2, #32 + 8005a06: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005896: 687b ldr r3, [r7, #4] - 8005898: 2200 movs r2, #0 - 800589a: 631a str r2, [r3, #48] @ 0x30 + 8005a0a: 687b ldr r3, [r7, #4] + 8005a0c: 2200 movs r2, #0 + 8005a0e: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 800589c: 687b ldr r3, [r7, #4] - 800589e: 681b ldr r3, [r3, #0] - 80058a0: 330c adds r3, #12 - 80058a2: 613b str r3, [r7, #16] + 8005a10: 687b ldr r3, [r7, #4] + 8005a12: 681b ldr r3, [r3, #0] + 8005a14: 330c adds r3, #12 + 8005a16: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 80058a4: 693b ldr r3, [r7, #16] - 80058a6: e853 3f00 ldrex r3, [r3] - 80058aa: 60fb str r3, [r7, #12] + 8005a18: 693b ldr r3, [r7, #16] + 8005a1a: e853 3f00 ldrex r3, [r3] + 8005a1e: 60fb str r3, [r7, #12] return(result); - 80058ac: 68fb ldr r3, [r7, #12] - 80058ae: f023 0310 bic.w r3, r3, #16 - 80058b2: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 - 80058b6: 687b ldr r3, [r7, #4] - 80058b8: 681b ldr r3, [r3, #0] - 80058ba: 330c adds r3, #12 - 80058bc: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 - 80058c0: 61fa str r2, [r7, #28] - 80058c2: 61bb str r3, [r7, #24] + 8005a20: 68fb ldr r3, [r7, #12] + 8005a22: f023 0310 bic.w r3, r3, #16 + 8005a26: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 + 8005a2a: 687b ldr r3, [r7, #4] + 8005a2c: 681b ldr r3, [r3, #0] + 8005a2e: 330c adds r3, #12 + 8005a30: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 + 8005a34: 61fa str r2, [r7, #28] + 8005a36: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80058c4: 69b9 ldr r1, [r7, #24] - 80058c6: 69fa ldr r2, [r7, #28] - 80058c8: e841 2300 strex r3, r2, [r1] - 80058cc: 617b str r3, [r7, #20] + 8005a38: 69b9 ldr r1, [r7, #24] + 8005a3a: 69fa ldr r2, [r7, #28] + 8005a3c: e841 2300 strex r3, r2, [r1] + 8005a40: 617b str r3, [r7, #20] return(result); - 80058ce: 697b ldr r3, [r7, #20] - 80058d0: 2b00 cmp r3, #0 - 80058d2: d1e3 bne.n 800589c + 8005a42: 697b ldr r3, [r7, #20] + 8005a44: 2b00 cmp r3, #0 + 8005a46: d1e3 bne.n 8005a10 /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 80058d4: 687b ldr r3, [r7, #4] - 80058d6: 2202 movs r2, #2 - 80058d8: 635a str r2, [r3, #52] @ 0x34 + 8005a48: 687b ldr r3, [r7, #4] + 8005a4a: 2202 movs r2, #2 + 8005a4c: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); - 80058da: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce - 80058de: 4619 mov r1, r3 - 80058e0: 6878 ldr r0, [r7, #4] - 80058e2: f000 f844 bl 800596e + 8005a4e: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce + 8005a52: 4619 mov r1, r3 + 8005a54: 6878 ldr r0, [r7, #4] + 8005a56: f000 f844 bl 8005ae2 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; - 80058e6: e023 b.n 8005930 + 8005a5a: e023 b.n 8005aa4 } } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) - 80058e8: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 80058ec: f003 0380 and.w r3, r3, #128 @ 0x80 - 80058f0: 2b00 cmp r3, #0 - 80058f2: d009 beq.n 8005908 - 80058f4: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 80058f8: f003 0380 and.w r3, r3, #128 @ 0x80 - 80058fc: 2b00 cmp r3, #0 - 80058fe: d003 beq.n 8005908 + 8005a5c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005a60: f003 0380 and.w r3, r3, #128 @ 0x80 + 8005a64: 2b00 cmp r3, #0 + 8005a66: d009 beq.n 8005a7c + 8005a68: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005a6c: f003 0380 and.w r3, r3, #128 @ 0x80 + 8005a70: 2b00 cmp r3, #0 + 8005a72: d003 beq.n 8005a7c { UART_Transmit_IT(huart); - 8005900: 6878 ldr r0, [r7, #4] - 8005902: f000 f90e bl 8005b22 + 8005a74: 6878 ldr r0, [r7, #4] + 8005a76: f000 f90e bl 8005c96 return; - 8005906: e014 b.n 8005932 + 8005a7a: e014 b.n 8005aa6 } /* UART in mode Transmitter end --------------------------------------------*/ if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) - 8005908: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 800590c: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005910: 2b00 cmp r3, #0 - 8005912: d00e beq.n 8005932 - 8005914: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005918: f003 0340 and.w r3, r3, #64 @ 0x40 - 800591c: 2b00 cmp r3, #0 - 800591e: d008 beq.n 8005932 + 8005a7c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8005a80: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005a84: 2b00 cmp r3, #0 + 8005a86: d00e beq.n 8005aa6 + 8005a88: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8005a8c: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005a90: 2b00 cmp r3, #0 + 8005a92: d008 beq.n 8005aa6 { UART_EndTransmit_IT(huart); - 8005920: 6878 ldr r0, [r7, #4] - 8005922: f000 f94d bl 8005bc0 + 8005a94: 6878 ldr r0, [r7, #4] + 8005a96: f000 f94d bl 8005d34 return; - 8005926: e004 b.n 8005932 + 8005a9a: e004 b.n 8005aa6 return; - 8005928: bf00 nop - 800592a: e002 b.n 8005932 + 8005a9c: bf00 nop + 8005a9e: e002 b.n 8005aa6 return; - 800592c: bf00 nop - 800592e: e000 b.n 8005932 + 8005aa0: bf00 nop + 8005aa2: e000 b.n 8005aa6 return; - 8005930: bf00 nop + 8005aa4: bf00 nop } } - 8005932: 37e8 adds r7, #232 @ 0xe8 - 8005934: 46bd mov sp, r7 - 8005936: bd80 pop {r7, pc} + 8005aa6: 37e8 adds r7, #232 @ 0xe8 + 8005aa8: 46bd mov sp, r7 + 8005aaa: bd80 pop {r7, pc} -08005938 : +08005aac : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { - 8005938: b480 push {r7} - 800593a: b083 sub sp, #12 - 800593c: af00 add r7, sp, #0 - 800593e: 6078 str r0, [r7, #4] + 8005aac: b480 push {r7} + 8005aae: b083 sub sp, #12 + 8005ab0: af00 add r7, sp, #0 + 8005ab2: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_TxCpltCallback could be implemented in the user file */ } - 8005940: bf00 nop - 8005942: 370c adds r7, #12 - 8005944: 46bd mov sp, r7 - 8005946: bc80 pop {r7} - 8005948: 4770 bx lr + 8005ab4: bf00 nop + 8005ab6: 370c adds r7, #12 + 8005ab8: 46bd mov sp, r7 + 8005aba: bc80 pop {r7} + 8005abc: 4770 bx lr -0800594a : +08005abe : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { - 800594a: b480 push {r7} - 800594c: b083 sub sp, #12 - 800594e: af00 add r7, sp, #0 - 8005950: 6078 str r0, [r7, #4] + 8005abe: b480 push {r7} + 8005ac0: b083 sub sp, #12 + 8005ac2: af00 add r7, sp, #0 + 8005ac4: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxCpltCallback could be implemented in the user file */ } - 8005952: bf00 nop - 8005954: 370c adds r7, #12 - 8005956: 46bd mov sp, r7 - 8005958: bc80 pop {r7} - 800595a: 4770 bx lr + 8005ac6: bf00 nop + 8005ac8: 370c adds r7, #12 + 8005aca: 46bd mov sp, r7 + 8005acc: bc80 pop {r7} + 8005ace: 4770 bx lr -0800595c : +08005ad0 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { - 800595c: b480 push {r7} - 800595e: b083 sub sp, #12 - 8005960: af00 add r7, sp, #0 - 8005962: 6078 str r0, [r7, #4] + 8005ad0: b480 push {r7} + 8005ad2: b083 sub sp, #12 + 8005ad4: af00 add r7, sp, #0 + 8005ad6: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback could be implemented in the user file */ } - 8005964: bf00 nop - 8005966: 370c adds r7, #12 - 8005968: 46bd mov sp, r7 - 800596a: bc80 pop {r7} - 800596c: 4770 bx lr + 8005ad8: bf00 nop + 8005ada: 370c adds r7, #12 + 8005adc: 46bd mov sp, r7 + 8005ade: bc80 pop {r7} + 8005ae0: 4770 bx lr -0800596e : +08005ae2 : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { - 800596e: b480 push {r7} - 8005970: b083 sub sp, #12 - 8005972: af00 add r7, sp, #0 - 8005974: 6078 str r0, [r7, #4] - 8005976: 460b mov r3, r1 - 8005978: 807b strh r3, [r7, #2] + 8005ae2: b480 push {r7} + 8005ae4: b083 sub sp, #12 + 8005ae6: af00 add r7, sp, #0 + 8005ae8: 6078 str r0, [r7, #4] + 8005aea: 460b mov r3, r1 + 8005aec: 807b strh r3, [r7, #2] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } - 800597a: bf00 nop - 800597c: 370c adds r7, #12 - 800597e: 46bd mov sp, r7 - 8005980: bc80 pop {r7} - 8005982: 4770 bx lr + 8005aee: bf00 nop + 8005af0: 370c adds r7, #12 + 8005af2: 46bd mov sp, r7 + 8005af4: bc80 pop {r7} + 8005af6: 4770 bx lr -08005984 : +08005af8 : * @param Timeout Timeout duration * @retval HAL status */ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 8005984: b580 push {r7, lr} - 8005986: b086 sub sp, #24 - 8005988: af00 add r7, sp, #0 - 800598a: 60f8 str r0, [r7, #12] - 800598c: 60b9 str r1, [r7, #8] - 800598e: 603b str r3, [r7, #0] - 8005990: 4613 mov r3, r2 - 8005992: 71fb strb r3, [r7, #7] + 8005af8: b580 push {r7, lr} + 8005afa: b086 sub sp, #24 + 8005afc: af00 add r7, sp, #0 + 8005afe: 60f8 str r0, [r7, #12] + 8005b00: 60b9 str r1, [r7, #8] + 8005b02: 603b str r3, [r7, #0] + 8005b04: 4613 mov r3, r2 + 8005b06: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8005994: e03b b.n 8005a0e + 8005b08: e03b b.n 8005b82 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8005996: 6a3b ldr r3, [r7, #32] - 8005998: f1b3 3fff cmp.w r3, #4294967295 - 800599c: d037 beq.n 8005a0e + 8005b0a: 6a3b ldr r3, [r7, #32] + 8005b0c: f1b3 3fff cmp.w r3, #4294967295 + 8005b10: d037 beq.n 8005b82 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 800599e: f7fc fdc7 bl 8002530 - 80059a2: 4602 mov r2, r0 - 80059a4: 683b ldr r3, [r7, #0] - 80059a6: 1ad3 subs r3, r2, r3 - 80059a8: 6a3a ldr r2, [r7, #32] - 80059aa: 429a cmp r2, r3 - 80059ac: d302 bcc.n 80059b4 - 80059ae: 6a3b ldr r3, [r7, #32] - 80059b0: 2b00 cmp r3, #0 - 80059b2: d101 bne.n 80059b8 + 8005b12: f7fc fdc7 bl 80026a4 + 8005b16: 4602 mov r2, r0 + 8005b18: 683b ldr r3, [r7, #0] + 8005b1a: 1ad3 subs r3, r2, r3 + 8005b1c: 6a3a ldr r2, [r7, #32] + 8005b1e: 429a cmp r2, r3 + 8005b20: d302 bcc.n 8005b28 + 8005b22: 6a3b ldr r3, [r7, #32] + 8005b24: 2b00 cmp r3, #0 + 8005b26: d101 bne.n 8005b2c { return HAL_TIMEOUT; - 80059b4: 2303 movs r3, #3 - 80059b6: e03a b.n 8005a2e + 8005b28: 2303 movs r3, #3 + 8005b2a: e03a b.n 8005ba2 } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) - 80059b8: 68fb ldr r3, [r7, #12] - 80059ba: 681b ldr r3, [r3, #0] - 80059bc: 68db ldr r3, [r3, #12] - 80059be: f003 0304 and.w r3, r3, #4 - 80059c2: 2b00 cmp r3, #0 - 80059c4: d023 beq.n 8005a0e - 80059c6: 68bb ldr r3, [r7, #8] - 80059c8: 2b80 cmp r3, #128 @ 0x80 - 80059ca: d020 beq.n 8005a0e - 80059cc: 68bb ldr r3, [r7, #8] - 80059ce: 2b40 cmp r3, #64 @ 0x40 - 80059d0: d01d beq.n 8005a0e + 8005b2c: 68fb ldr r3, [r7, #12] + 8005b2e: 681b ldr r3, [r3, #0] + 8005b30: 68db ldr r3, [r3, #12] + 8005b32: f003 0304 and.w r3, r3, #4 + 8005b36: 2b00 cmp r3, #0 + 8005b38: d023 beq.n 8005b82 + 8005b3a: 68bb ldr r3, [r7, #8] + 8005b3c: 2b80 cmp r3, #128 @ 0x80 + 8005b3e: d020 beq.n 8005b82 + 8005b40: 68bb ldr r3, [r7, #8] + 8005b42: 2b40 cmp r3, #64 @ 0x40 + 8005b44: d01d beq.n 8005b82 { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) - 80059d2: 68fb ldr r3, [r7, #12] - 80059d4: 681b ldr r3, [r3, #0] - 80059d6: 681b ldr r3, [r3, #0] - 80059d8: f003 0308 and.w r3, r3, #8 - 80059dc: 2b08 cmp r3, #8 - 80059de: d116 bne.n 8005a0e + 8005b46: 68fb ldr r3, [r7, #12] + 8005b48: 681b ldr r3, [r3, #0] + 8005b4a: 681b ldr r3, [r3, #0] + 8005b4c: f003 0308 and.w r3, r3, #8 + 8005b50: 2b08 cmp r3, #8 + 8005b52: d116 bne.n 8005b82 { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_OREFLAG(huart); - 80059e0: 2300 movs r3, #0 - 80059e2: 617b str r3, [r7, #20] - 80059e4: 68fb ldr r3, [r7, #12] - 80059e6: 681b ldr r3, [r3, #0] - 80059e8: 681b ldr r3, [r3, #0] - 80059ea: 617b str r3, [r7, #20] - 80059ec: 68fb ldr r3, [r7, #12] - 80059ee: 681b ldr r3, [r3, #0] - 80059f0: 685b ldr r3, [r3, #4] - 80059f2: 617b str r3, [r7, #20] - 80059f4: 697b ldr r3, [r7, #20] + 8005b54: 2300 movs r3, #0 + 8005b56: 617b str r3, [r7, #20] + 8005b58: 68fb ldr r3, [r7, #12] + 8005b5a: 681b ldr r3, [r3, #0] + 8005b5c: 681b ldr r3, [r3, #0] + 8005b5e: 617b str r3, [r7, #20] + 8005b60: 68fb ldr r3, [r7, #12] + 8005b62: 681b ldr r3, [r3, #0] + 8005b64: 685b ldr r3, [r3, #4] + 8005b66: 617b str r3, [r7, #20] + 8005b68: 697b ldr r3, [r7, #20] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); - 80059f6: 68f8 ldr r0, [r7, #12] - 80059f8: f000 f81d bl 8005a36 + 8005b6a: 68f8 ldr r0, [r7, #12] + 8005b6c: f000 f81d bl 8005baa huart->ErrorCode = HAL_UART_ERROR_ORE; - 80059fc: 68fb ldr r3, [r7, #12] - 80059fe: 2208 movs r2, #8 - 8005a00: 645a str r2, [r3, #68] @ 0x44 + 8005b70: 68fb ldr r3, [r7, #12] + 8005b72: 2208 movs r2, #8 + 8005b74: 645a str r2, [r3, #68] @ 0x44 /* Process Unlocked */ __HAL_UNLOCK(huart); - 8005a02: 68fb ldr r3, [r7, #12] - 8005a04: 2200 movs r2, #0 - 8005a06: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 8005b76: 68fb ldr r3, [r7, #12] + 8005b78: 2200 movs r2, #0 + 8005b7a: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; - 8005a0a: 2301 movs r3, #1 - 8005a0c: e00f b.n 8005a2e + 8005b7e: 2301 movs r3, #1 + 8005b80: e00f b.n 8005ba2 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8005a0e: 68fb ldr r3, [r7, #12] - 8005a10: 681b ldr r3, [r3, #0] - 8005a12: 681a ldr r2, [r3, #0] - 8005a14: 68bb ldr r3, [r7, #8] - 8005a16: 4013 ands r3, r2 - 8005a18: 68ba ldr r2, [r7, #8] - 8005a1a: 429a cmp r2, r3 - 8005a1c: bf0c ite eq - 8005a1e: 2301 moveq r3, #1 - 8005a20: 2300 movne r3, #0 - 8005a22: b2db uxtb r3, r3 - 8005a24: 461a mov r2, r3 - 8005a26: 79fb ldrb r3, [r7, #7] - 8005a28: 429a cmp r2, r3 - 8005a2a: d0b4 beq.n 8005996 + 8005b82: 68fb ldr r3, [r7, #12] + 8005b84: 681b ldr r3, [r3, #0] + 8005b86: 681a ldr r2, [r3, #0] + 8005b88: 68bb ldr r3, [r7, #8] + 8005b8a: 4013 ands r3, r2 + 8005b8c: 68ba ldr r2, [r7, #8] + 8005b8e: 429a cmp r2, r3 + 8005b90: bf0c ite eq + 8005b92: 2301 moveq r3, #1 + 8005b94: 2300 movne r3, #0 + 8005b96: b2db uxtb r3, r3 + 8005b98: 461a mov r2, r3 + 8005b9a: 79fb ldrb r3, [r7, #7] + 8005b9c: 429a cmp r2, r3 + 8005b9e: d0b4 beq.n 8005b0a } } } } return HAL_OK; - 8005a2c: 2300 movs r3, #0 + 8005ba0: 2300 movs r3, #0 } - 8005a2e: 4618 mov r0, r3 - 8005a30: 3718 adds r7, #24 - 8005a32: 46bd mov sp, r7 - 8005a34: bd80 pop {r7, pc} + 8005ba2: 4618 mov r0, r3 + 8005ba4: 3718 adds r7, #24 + 8005ba6: 46bd mov sp, r7 + 8005ba8: bd80 pop {r7, pc} -08005a36 : +08005baa : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 8005a36: b480 push {r7} - 8005a38: b095 sub sp, #84 @ 0x54 - 8005a3a: af00 add r7, sp, #0 - 8005a3c: 6078 str r0, [r7, #4] + 8005baa: b480 push {r7} + 8005bac: b095 sub sp, #84 @ 0x54 + 8005bae: af00 add r7, sp, #0 + 8005bb0: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8005a3e: 687b ldr r3, [r7, #4] - 8005a40: 681b ldr r3, [r3, #0] - 8005a42: 330c adds r3, #12 - 8005a44: 637b str r3, [r7, #52] @ 0x34 + 8005bb2: 687b ldr r3, [r7, #4] + 8005bb4: 681b ldr r3, [r3, #0] + 8005bb6: 330c adds r3, #12 + 8005bb8: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005a46: 6b7b ldr r3, [r7, #52] @ 0x34 - 8005a48: e853 3f00 ldrex r3, [r3] - 8005a4c: 633b str r3, [r7, #48] @ 0x30 + 8005bba: 6b7b ldr r3, [r7, #52] @ 0x34 + 8005bbc: e853 3f00 ldrex r3, [r3] + 8005bc0: 633b str r3, [r7, #48] @ 0x30 return(result); - 8005a4e: 6b3b ldr r3, [r7, #48] @ 0x30 - 8005a50: f423 7390 bic.w r3, r3, #288 @ 0x120 - 8005a54: 64fb str r3, [r7, #76] @ 0x4c - 8005a56: 687b ldr r3, [r7, #4] - 8005a58: 681b ldr r3, [r3, #0] - 8005a5a: 330c adds r3, #12 - 8005a5c: 6cfa ldr r2, [r7, #76] @ 0x4c - 8005a5e: 643a str r2, [r7, #64] @ 0x40 - 8005a60: 63fb str r3, [r7, #60] @ 0x3c + 8005bc2: 6b3b ldr r3, [r7, #48] @ 0x30 + 8005bc4: f423 7390 bic.w r3, r3, #288 @ 0x120 + 8005bc8: 64fb str r3, [r7, #76] @ 0x4c + 8005bca: 687b ldr r3, [r7, #4] + 8005bcc: 681b ldr r3, [r3, #0] + 8005bce: 330c adds r3, #12 + 8005bd0: 6cfa ldr r2, [r7, #76] @ 0x4c + 8005bd2: 643a str r2, [r7, #64] @ 0x40 + 8005bd4: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005a62: 6bf9 ldr r1, [r7, #60] @ 0x3c - 8005a64: 6c3a ldr r2, [r7, #64] @ 0x40 - 8005a66: e841 2300 strex r3, r2, [r1] - 8005a6a: 63bb str r3, [r7, #56] @ 0x38 + 8005bd6: 6bf9 ldr r1, [r7, #60] @ 0x3c + 8005bd8: 6c3a ldr r2, [r7, #64] @ 0x40 + 8005bda: e841 2300 strex r3, r2, [r1] + 8005bde: 63bb str r3, [r7, #56] @ 0x38 return(result); - 8005a6c: 6bbb ldr r3, [r7, #56] @ 0x38 - 8005a6e: 2b00 cmp r3, #0 - 8005a70: d1e5 bne.n 8005a3e + 8005be0: 6bbb ldr r3, [r7, #56] @ 0x38 + 8005be2: 2b00 cmp r3, #0 + 8005be4: d1e5 bne.n 8005bb2 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005a72: 687b ldr r3, [r7, #4] - 8005a74: 681b ldr r3, [r3, #0] - 8005a76: 3314 adds r3, #20 - 8005a78: 623b str r3, [r7, #32] + 8005be6: 687b ldr r3, [r7, #4] + 8005be8: 681b ldr r3, [r3, #0] + 8005bea: 3314 adds r3, #20 + 8005bec: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005a7a: 6a3b ldr r3, [r7, #32] - 8005a7c: e853 3f00 ldrex r3, [r3] - 8005a80: 61fb str r3, [r7, #28] + 8005bee: 6a3b ldr r3, [r7, #32] + 8005bf0: e853 3f00 ldrex r3, [r3] + 8005bf4: 61fb str r3, [r7, #28] return(result); - 8005a82: 69fb ldr r3, [r7, #28] - 8005a84: f023 0301 bic.w r3, r3, #1 - 8005a88: 64bb str r3, [r7, #72] @ 0x48 - 8005a8a: 687b ldr r3, [r7, #4] - 8005a8c: 681b ldr r3, [r3, #0] - 8005a8e: 3314 adds r3, #20 - 8005a90: 6cba ldr r2, [r7, #72] @ 0x48 - 8005a92: 62fa str r2, [r7, #44] @ 0x2c - 8005a94: 62bb str r3, [r7, #40] @ 0x28 + 8005bf6: 69fb ldr r3, [r7, #28] + 8005bf8: f023 0301 bic.w r3, r3, #1 + 8005bfc: 64bb str r3, [r7, #72] @ 0x48 + 8005bfe: 687b ldr r3, [r7, #4] + 8005c00: 681b ldr r3, [r3, #0] + 8005c02: 3314 adds r3, #20 + 8005c04: 6cba ldr r2, [r7, #72] @ 0x48 + 8005c06: 62fa str r2, [r7, #44] @ 0x2c + 8005c08: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005a96: 6ab9 ldr r1, [r7, #40] @ 0x28 - 8005a98: 6afa ldr r2, [r7, #44] @ 0x2c - 8005a9a: e841 2300 strex r3, r2, [r1] - 8005a9e: 627b str r3, [r7, #36] @ 0x24 + 8005c0a: 6ab9 ldr r1, [r7, #40] @ 0x28 + 8005c0c: 6afa ldr r2, [r7, #44] @ 0x2c + 8005c0e: e841 2300 strex r3, r2, [r1] + 8005c12: 627b str r3, [r7, #36] @ 0x24 return(result); - 8005aa0: 6a7b ldr r3, [r7, #36] @ 0x24 - 8005aa2: 2b00 cmp r3, #0 - 8005aa4: d1e5 bne.n 8005a72 + 8005c14: 6a7b ldr r3, [r7, #36] @ 0x24 + 8005c16: 2b00 cmp r3, #0 + 8005c18: d1e5 bne.n 8005be6 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8005aa6: 687b ldr r3, [r7, #4] - 8005aa8: 6b1b ldr r3, [r3, #48] @ 0x30 - 8005aaa: 2b01 cmp r3, #1 - 8005aac: d119 bne.n 8005ae2 + 8005c1a: 687b ldr r3, [r7, #4] + 8005c1c: 6b1b ldr r3, [r3, #48] @ 0x30 + 8005c1e: 2b01 cmp r3, #1 + 8005c20: d119 bne.n 8005c56 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005aae: 687b ldr r3, [r7, #4] - 8005ab0: 681b ldr r3, [r3, #0] - 8005ab2: 330c adds r3, #12 - 8005ab4: 60fb str r3, [r7, #12] + 8005c22: 687b ldr r3, [r7, #4] + 8005c24: 681b ldr r3, [r3, #0] + 8005c26: 330c adds r3, #12 + 8005c28: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005ab6: 68fb ldr r3, [r7, #12] - 8005ab8: e853 3f00 ldrex r3, [r3] - 8005abc: 60bb str r3, [r7, #8] + 8005c2a: 68fb ldr r3, [r7, #12] + 8005c2c: e853 3f00 ldrex r3, [r3] + 8005c30: 60bb str r3, [r7, #8] return(result); - 8005abe: 68bb ldr r3, [r7, #8] - 8005ac0: f023 0310 bic.w r3, r3, #16 - 8005ac4: 647b str r3, [r7, #68] @ 0x44 - 8005ac6: 687b ldr r3, [r7, #4] - 8005ac8: 681b ldr r3, [r3, #0] - 8005aca: 330c adds r3, #12 - 8005acc: 6c7a ldr r2, [r7, #68] @ 0x44 - 8005ace: 61ba str r2, [r7, #24] - 8005ad0: 617b str r3, [r7, #20] + 8005c32: 68bb ldr r3, [r7, #8] + 8005c34: f023 0310 bic.w r3, r3, #16 + 8005c38: 647b str r3, [r7, #68] @ 0x44 + 8005c3a: 687b ldr r3, [r7, #4] + 8005c3c: 681b ldr r3, [r3, #0] + 8005c3e: 330c adds r3, #12 + 8005c40: 6c7a ldr r2, [r7, #68] @ 0x44 + 8005c42: 61ba str r2, [r7, #24] + 8005c44: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005ad2: 6979 ldr r1, [r7, #20] - 8005ad4: 69ba ldr r2, [r7, #24] - 8005ad6: e841 2300 strex r3, r2, [r1] - 8005ada: 613b str r3, [r7, #16] + 8005c46: 6979 ldr r1, [r7, #20] + 8005c48: 69ba ldr r2, [r7, #24] + 8005c4a: e841 2300 strex r3, r2, [r1] + 8005c4e: 613b str r3, [r7, #16] return(result); - 8005adc: 693b ldr r3, [r7, #16] - 8005ade: 2b00 cmp r3, #0 - 8005ae0: d1e5 bne.n 8005aae + 8005c50: 693b ldr r3, [r7, #16] + 8005c52: 2b00 cmp r3, #0 + 8005c54: d1e5 bne.n 8005c22 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8005ae2: 687b ldr r3, [r7, #4] - 8005ae4: 2220 movs r2, #32 - 8005ae6: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005c56: 687b ldr r3, [r7, #4] + 8005c58: 2220 movs r2, #32 + 8005c5a: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005aea: 687b ldr r3, [r7, #4] - 8005aec: 2200 movs r2, #0 - 8005aee: 631a str r2, [r3, #48] @ 0x30 + 8005c5e: 687b ldr r3, [r7, #4] + 8005c60: 2200 movs r2, #0 + 8005c62: 631a str r2, [r3, #48] @ 0x30 } - 8005af0: bf00 nop - 8005af2: 3754 adds r7, #84 @ 0x54 - 8005af4: 46bd mov sp, r7 - 8005af6: bc80 pop {r7} - 8005af8: 4770 bx lr + 8005c64: bf00 nop + 8005c66: 3754 adds r7, #84 @ 0x54 + 8005c68: 46bd mov sp, r7 + 8005c6a: bc80 pop {r7} + 8005c6c: 4770 bx lr -08005afa : +08005c6e : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - 8005afa: b580 push {r7, lr} - 8005afc: b084 sub sp, #16 - 8005afe: af00 add r7, sp, #0 - 8005b00: 6078 str r0, [r7, #4] + 8005c6e: b580 push {r7, lr} + 8005c70: b084 sub sp, #16 + 8005c72: af00 add r7, sp, #0 + 8005c74: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 8005b02: 687b ldr r3, [r7, #4] - 8005b04: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005b06: 60fb str r3, [r7, #12] + 8005c76: 687b ldr r3, [r7, #4] + 8005c78: 6a5b ldr r3, [r3, #36] @ 0x24 + 8005c7a: 60fb str r3, [r7, #12] huart->RxXferCount = 0x00U; - 8005b08: 68fb ldr r3, [r7, #12] - 8005b0a: 2200 movs r2, #0 - 8005b0c: 85da strh r2, [r3, #46] @ 0x2e + 8005c7c: 68fb ldr r3, [r7, #12] + 8005c7e: 2200 movs r2, #0 + 8005c80: 85da strh r2, [r3, #46] @ 0x2e huart->TxXferCount = 0x00U; - 8005b0e: 68fb ldr r3, [r7, #12] - 8005b10: 2200 movs r2, #0 - 8005b12: 84da strh r2, [r3, #38] @ 0x26 + 8005c82: 68fb ldr r3, [r7, #12] + 8005c84: 2200 movs r2, #0 + 8005c86: 84da strh r2, [r3, #38] @ 0x26 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005b14: 68f8 ldr r0, [r7, #12] - 8005b16: f7ff ff21 bl 800595c + 8005c88: 68f8 ldr r0, [r7, #12] + 8005c8a: f7ff ff21 bl 8005ad0 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8005b1a: bf00 nop - 8005b1c: 3710 adds r7, #16 - 8005b1e: 46bd mov sp, r7 - 8005b20: bd80 pop {r7, pc} + 8005c8e: bf00 nop + 8005c90: 3710 adds r7, #16 + 8005c92: 46bd mov sp, r7 + 8005c94: bd80 pop {r7, pc} -08005b22 : +08005c96 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) { - 8005b22: b480 push {r7} - 8005b24: b085 sub sp, #20 - 8005b26: af00 add r7, sp, #0 - 8005b28: 6078 str r0, [r7, #4] + 8005c96: b480 push {r7} + 8005c98: b085 sub sp, #20 + 8005c9a: af00 add r7, sp, #0 + 8005c9c: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) - 8005b2a: 687b ldr r3, [r7, #4] - 8005b2c: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 8005b30: b2db uxtb r3, r3 - 8005b32: 2b21 cmp r3, #33 @ 0x21 - 8005b34: d13e bne.n 8005bb4 + 8005c9e: 687b ldr r3, [r7, #4] + 8005ca0: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 8005ca4: b2db uxtb r3, r3 + 8005ca6: 2b21 cmp r3, #33 @ 0x21 + 8005ca8: d13e bne.n 8005d28 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005b36: 687b ldr r3, [r7, #4] - 8005b38: 689b ldr r3, [r3, #8] - 8005b3a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8005b3e: d114 bne.n 8005b6a - 8005b40: 687b ldr r3, [r7, #4] - 8005b42: 691b ldr r3, [r3, #16] - 8005b44: 2b00 cmp r3, #0 - 8005b46: d110 bne.n 8005b6a + 8005caa: 687b ldr r3, [r7, #4] + 8005cac: 689b ldr r3, [r3, #8] + 8005cae: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8005cb2: d114 bne.n 8005cde + 8005cb4: 687b ldr r3, [r7, #4] + 8005cb6: 691b ldr r3, [r3, #16] + 8005cb8: 2b00 cmp r3, #0 + 8005cba: d110 bne.n 8005cde { tmp = (const uint16_t *) huart->pTxBuffPtr; - 8005b48: 687b ldr r3, [r7, #4] - 8005b4a: 6a1b ldr r3, [r3, #32] - 8005b4c: 60fb str r3, [r7, #12] + 8005cbc: 687b ldr r3, [r7, #4] + 8005cbe: 6a1b ldr r3, [r3, #32] + 8005cc0: 60fb str r3, [r7, #12] huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); - 8005b4e: 68fb ldr r3, [r7, #12] - 8005b50: 881b ldrh r3, [r3, #0] - 8005b52: 461a mov r2, r3 - 8005b54: 687b ldr r3, [r7, #4] - 8005b56: 681b ldr r3, [r3, #0] - 8005b58: f3c2 0208 ubfx r2, r2, #0, #9 - 8005b5c: 605a str r2, [r3, #4] + 8005cc2: 68fb ldr r3, [r7, #12] + 8005cc4: 881b ldrh r3, [r3, #0] + 8005cc6: 461a mov r2, r3 + 8005cc8: 687b ldr r3, [r7, #4] + 8005cca: 681b ldr r3, [r3, #0] + 8005ccc: f3c2 0208 ubfx r2, r2, #0, #9 + 8005cd0: 605a str r2, [r3, #4] huart->pTxBuffPtr += 2U; - 8005b5e: 687b ldr r3, [r7, #4] - 8005b60: 6a1b ldr r3, [r3, #32] - 8005b62: 1c9a adds r2, r3, #2 - 8005b64: 687b ldr r3, [r7, #4] - 8005b66: 621a str r2, [r3, #32] - 8005b68: e008 b.n 8005b7c + 8005cd2: 687b ldr r3, [r7, #4] + 8005cd4: 6a1b ldr r3, [r3, #32] + 8005cd6: 1c9a adds r2, r3, #2 + 8005cd8: 687b ldr r3, [r7, #4] + 8005cda: 621a str r2, [r3, #32] + 8005cdc: e008 b.n 8005cf0 } else { huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); - 8005b6a: 687b ldr r3, [r7, #4] - 8005b6c: 6a1b ldr r3, [r3, #32] - 8005b6e: 1c59 adds r1, r3, #1 - 8005b70: 687a ldr r2, [r7, #4] - 8005b72: 6211 str r1, [r2, #32] - 8005b74: 781a ldrb r2, [r3, #0] - 8005b76: 687b ldr r3, [r7, #4] - 8005b78: 681b ldr r3, [r3, #0] - 8005b7a: 605a str r2, [r3, #4] + 8005cde: 687b ldr r3, [r7, #4] + 8005ce0: 6a1b ldr r3, [r3, #32] + 8005ce2: 1c59 adds r1, r3, #1 + 8005ce4: 687a ldr r2, [r7, #4] + 8005ce6: 6211 str r1, [r2, #32] + 8005ce8: 781a ldrb r2, [r3, #0] + 8005cea: 687b ldr r3, [r7, #4] + 8005cec: 681b ldr r3, [r3, #0] + 8005cee: 605a str r2, [r3, #4] } if (--huart->TxXferCount == 0U) - 8005b7c: 687b ldr r3, [r7, #4] - 8005b7e: 8cdb ldrh r3, [r3, #38] @ 0x26 - 8005b80: b29b uxth r3, r3 - 8005b82: 3b01 subs r3, #1 - 8005b84: b29b uxth r3, r3 - 8005b86: 687a ldr r2, [r7, #4] - 8005b88: 4619 mov r1, r3 - 8005b8a: 84d1 strh r1, [r2, #38] @ 0x26 - 8005b8c: 2b00 cmp r3, #0 - 8005b8e: d10f bne.n 8005bb0 + 8005cf0: 687b ldr r3, [r7, #4] + 8005cf2: 8cdb ldrh r3, [r3, #38] @ 0x26 + 8005cf4: b29b uxth r3, r3 + 8005cf6: 3b01 subs r3, #1 + 8005cf8: b29b uxth r3, r3 + 8005cfa: 687a ldr r2, [r7, #4] + 8005cfc: 4619 mov r1, r3 + 8005cfe: 84d1 strh r1, [r2, #38] @ 0x26 + 8005d00: 2b00 cmp r3, #0 + 8005d02: d10f bne.n 8005d24 { /* Disable the UART Transmit Data Register Empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); - 8005b90: 687b ldr r3, [r7, #4] - 8005b92: 681b ldr r3, [r3, #0] - 8005b94: 68da ldr r2, [r3, #12] - 8005b96: 687b ldr r3, [r7, #4] - 8005b98: 681b ldr r3, [r3, #0] - 8005b9a: f022 0280 bic.w r2, r2, #128 @ 0x80 - 8005b9e: 60da str r2, [r3, #12] + 8005d04: 687b ldr r3, [r7, #4] + 8005d06: 681b ldr r3, [r3, #0] + 8005d08: 68da ldr r2, [r3, #12] + 8005d0a: 687b ldr r3, [r7, #4] + 8005d0c: 681b ldr r3, [r3, #0] + 8005d0e: f022 0280 bic.w r2, r2, #128 @ 0x80 + 8005d12: 60da str r2, [r3, #12] /* Enable the UART Transmit Complete Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TC); - 8005ba0: 687b ldr r3, [r7, #4] - 8005ba2: 681b ldr r3, [r3, #0] - 8005ba4: 68da ldr r2, [r3, #12] - 8005ba6: 687b ldr r3, [r7, #4] - 8005ba8: 681b ldr r3, [r3, #0] - 8005baa: f042 0240 orr.w r2, r2, #64 @ 0x40 - 8005bae: 60da str r2, [r3, #12] + 8005d14: 687b ldr r3, [r7, #4] + 8005d16: 681b ldr r3, [r3, #0] + 8005d18: 68da ldr r2, [r3, #12] + 8005d1a: 687b ldr r3, [r7, #4] + 8005d1c: 681b ldr r3, [r3, #0] + 8005d1e: f042 0240 orr.w r2, r2, #64 @ 0x40 + 8005d22: 60da str r2, [r3, #12] } return HAL_OK; - 8005bb0: 2300 movs r3, #0 - 8005bb2: e000 b.n 8005bb6 + 8005d24: 2300 movs r3, #0 + 8005d26: e000 b.n 8005d2a } else { return HAL_BUSY; - 8005bb4: 2302 movs r3, #2 + 8005d28: 2302 movs r3, #2 } } - 8005bb6: 4618 mov r0, r3 - 8005bb8: 3714 adds r7, #20 - 8005bba: 46bd mov sp, r7 - 8005bbc: bc80 pop {r7} - 8005bbe: 4770 bx lr + 8005d2a: 4618 mov r0, r3 + 8005d2c: 3714 adds r7, #20 + 8005d2e: 46bd mov sp, r7 + 8005d30: bc80 pop {r7} + 8005d32: 4770 bx lr -08005bc0 : +08005d34 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) { - 8005bc0: b580 push {r7, lr} - 8005bc2: b082 sub sp, #8 - 8005bc4: af00 add r7, sp, #0 - 8005bc6: 6078 str r0, [r7, #4] + 8005d34: b580 push {r7, lr} + 8005d36: b082 sub sp, #8 + 8005d38: af00 add r7, sp, #0 + 8005d3a: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TC); - 8005bc8: 687b ldr r3, [r7, #4] - 8005bca: 681b ldr r3, [r3, #0] - 8005bcc: 68da ldr r2, [r3, #12] - 8005bce: 687b ldr r3, [r7, #4] - 8005bd0: 681b ldr r3, [r3, #0] - 8005bd2: f022 0240 bic.w r2, r2, #64 @ 0x40 - 8005bd6: 60da str r2, [r3, #12] + 8005d3c: 687b ldr r3, [r7, #4] + 8005d3e: 681b ldr r3, [r3, #0] + 8005d40: 68da ldr r2, [r3, #12] + 8005d42: 687b ldr r3, [r7, #4] + 8005d44: 681b ldr r3, [r3, #0] + 8005d46: f022 0240 bic.w r2, r2, #64 @ 0x40 + 8005d4a: 60da str r2, [r3, #12] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8005bd8: 687b ldr r3, [r7, #4] - 8005bda: 2220 movs r2, #32 - 8005bdc: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8005d4c: 687b ldr r3, [r7, #4] + 8005d4e: 2220 movs r2, #32 + 8005d50: f883 2041 strb.w r2, [r3, #65] @ 0x41 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); - 8005be0: 6878 ldr r0, [r7, #4] - 8005be2: f7ff fea9 bl 8005938 + 8005d54: 6878 ldr r0, [r7, #4] + 8005d56: f7ff fea9 bl 8005aac #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return HAL_OK; - 8005be6: 2300 movs r3, #0 + 8005d5a: 2300 movs r3, #0 } - 8005be8: 4618 mov r0, r3 - 8005bea: 3708 adds r7, #8 - 8005bec: 46bd mov sp, r7 - 8005bee: bd80 pop {r7, pc} + 8005d5c: 4618 mov r0, r3 + 8005d5e: 3708 adds r7, #8 + 8005d60: 46bd mov sp, r7 + 8005d62: bd80 pop {r7, pc} -08005bf0 : +08005d64 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { - 8005bf0: b580 push {r7, lr} - 8005bf2: b08c sub sp, #48 @ 0x30 - 8005bf4: af00 add r7, sp, #0 - 8005bf6: 6078 str r0, [r7, #4] + 8005d64: b580 push {r7, lr} + 8005d66: b08c sub sp, #48 @ 0x30 + 8005d68: af00 add r7, sp, #0 + 8005d6a: 6078 str r0, [r7, #4] uint8_t *pdata8bits; uint16_t *pdata16bits; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 8005bf8: 687b ldr r3, [r7, #4] - 8005bfa: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 - 8005bfe: b2db uxtb r3, r3 - 8005c00: 2b22 cmp r3, #34 @ 0x22 - 8005c02: f040 80ae bne.w 8005d62 + 8005d6c: 687b ldr r3, [r7, #4] + 8005d6e: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 + 8005d72: b2db uxtb r3, r3 + 8005d74: 2b22 cmp r3, #34 @ 0x22 + 8005d76: f040 80ae bne.w 8005ed6 { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005c06: 687b ldr r3, [r7, #4] - 8005c08: 689b ldr r3, [r3, #8] - 8005c0a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8005c0e: d117 bne.n 8005c40 - 8005c10: 687b ldr r3, [r7, #4] - 8005c12: 691b ldr r3, [r3, #16] - 8005c14: 2b00 cmp r3, #0 - 8005c16: d113 bne.n 8005c40 + 8005d7a: 687b ldr r3, [r7, #4] + 8005d7c: 689b ldr r3, [r3, #8] + 8005d7e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8005d82: d117 bne.n 8005db4 + 8005d84: 687b ldr r3, [r7, #4] + 8005d86: 691b ldr r3, [r3, #16] + 8005d88: 2b00 cmp r3, #0 + 8005d8a: d113 bne.n 8005db4 { pdata8bits = NULL; - 8005c18: 2300 movs r3, #0 - 8005c1a: 62fb str r3, [r7, #44] @ 0x2c + 8005d8c: 2300 movs r3, #0 + 8005d8e: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = (uint16_t *) huart->pRxBuffPtr; - 8005c1c: 687b ldr r3, [r7, #4] - 8005c1e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8005c20: 62bb str r3, [r7, #40] @ 0x28 + 8005d90: 687b ldr r3, [r7, #4] + 8005d92: 6a9b ldr r3, [r3, #40] @ 0x28 + 8005d94: 62bb str r3, [r7, #40] @ 0x28 *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); - 8005c22: 687b ldr r3, [r7, #4] - 8005c24: 681b ldr r3, [r3, #0] - 8005c26: 685b ldr r3, [r3, #4] - 8005c28: b29b uxth r3, r3 - 8005c2a: f3c3 0308 ubfx r3, r3, #0, #9 - 8005c2e: b29a uxth r2, r3 - 8005c30: 6abb ldr r3, [r7, #40] @ 0x28 - 8005c32: 801a strh r2, [r3, #0] + 8005d96: 687b ldr r3, [r7, #4] + 8005d98: 681b ldr r3, [r3, #0] + 8005d9a: 685b ldr r3, [r3, #4] + 8005d9c: b29b uxth r3, r3 + 8005d9e: f3c3 0308 ubfx r3, r3, #0, #9 + 8005da2: b29a uxth r2, r3 + 8005da4: 6abb ldr r3, [r7, #40] @ 0x28 + 8005da6: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; - 8005c34: 687b ldr r3, [r7, #4] - 8005c36: 6a9b ldr r3, [r3, #40] @ 0x28 - 8005c38: 1c9a adds r2, r3, #2 - 8005c3a: 687b ldr r3, [r7, #4] - 8005c3c: 629a str r2, [r3, #40] @ 0x28 - 8005c3e: e026 b.n 8005c8e + 8005da8: 687b ldr r3, [r7, #4] + 8005daa: 6a9b ldr r3, [r3, #40] @ 0x28 + 8005dac: 1c9a adds r2, r3, #2 + 8005dae: 687b ldr r3, [r7, #4] + 8005db0: 629a str r2, [r3, #40] @ 0x28 + 8005db2: e026 b.n 8005e02 } else { pdata8bits = (uint8_t *) huart->pRxBuffPtr; - 8005c40: 687b ldr r3, [r7, #4] - 8005c42: 6a9b ldr r3, [r3, #40] @ 0x28 - 8005c44: 62fb str r3, [r7, #44] @ 0x2c + 8005db4: 687b ldr r3, [r7, #4] + 8005db6: 6a9b ldr r3, [r3, #40] @ 0x28 + 8005db8: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = NULL; - 8005c46: 2300 movs r3, #0 - 8005c48: 62bb str r3, [r7, #40] @ 0x28 + 8005dba: 2300 movs r3, #0 + 8005dbc: 62bb str r3, [r7, #40] @ 0x28 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) - 8005c4a: 687b ldr r3, [r7, #4] - 8005c4c: 689b ldr r3, [r3, #8] - 8005c4e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8005c52: d007 beq.n 8005c64 - 8005c54: 687b ldr r3, [r7, #4] - 8005c56: 689b ldr r3, [r3, #8] - 8005c58: 2b00 cmp r3, #0 - 8005c5a: d10a bne.n 8005c72 - 8005c5c: 687b ldr r3, [r7, #4] - 8005c5e: 691b ldr r3, [r3, #16] - 8005c60: 2b00 cmp r3, #0 - 8005c62: d106 bne.n 8005c72 + 8005dbe: 687b ldr r3, [r7, #4] + 8005dc0: 689b ldr r3, [r3, #8] + 8005dc2: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8005dc6: d007 beq.n 8005dd8 + 8005dc8: 687b ldr r3, [r7, #4] + 8005dca: 689b ldr r3, [r3, #8] + 8005dcc: 2b00 cmp r3, #0 + 8005dce: d10a bne.n 8005de6 + 8005dd0: 687b ldr r3, [r7, #4] + 8005dd2: 691b ldr r3, [r3, #16] + 8005dd4: 2b00 cmp r3, #0 + 8005dd6: d106 bne.n 8005de6 { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); - 8005c64: 687b ldr r3, [r7, #4] - 8005c66: 681b ldr r3, [r3, #0] - 8005c68: 685b ldr r3, [r3, #4] - 8005c6a: b2da uxtb r2, r3 - 8005c6c: 6afb ldr r3, [r7, #44] @ 0x2c - 8005c6e: 701a strb r2, [r3, #0] - 8005c70: e008 b.n 8005c84 + 8005dd8: 687b ldr r3, [r7, #4] + 8005dda: 681b ldr r3, [r3, #0] + 8005ddc: 685b ldr r3, [r3, #4] + 8005dde: b2da uxtb r2, r3 + 8005de0: 6afb ldr r3, [r7, #44] @ 0x2c + 8005de2: 701a strb r2, [r3, #0] + 8005de4: e008 b.n 8005df8 } else { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); - 8005c72: 687b ldr r3, [r7, #4] - 8005c74: 681b ldr r3, [r3, #0] - 8005c76: 685b ldr r3, [r3, #4] - 8005c78: b2db uxtb r3, r3 - 8005c7a: f003 037f and.w r3, r3, #127 @ 0x7f - 8005c7e: b2da uxtb r2, r3 - 8005c80: 6afb ldr r3, [r7, #44] @ 0x2c - 8005c82: 701a strb r2, [r3, #0] + 8005de6: 687b ldr r3, [r7, #4] + 8005de8: 681b ldr r3, [r3, #0] + 8005dea: 685b ldr r3, [r3, #4] + 8005dec: b2db uxtb r3, r3 + 8005dee: f003 037f and.w r3, r3, #127 @ 0x7f + 8005df2: b2da uxtb r2, r3 + 8005df4: 6afb ldr r3, [r7, #44] @ 0x2c + 8005df6: 701a strb r2, [r3, #0] } huart->pRxBuffPtr += 1U; - 8005c84: 687b ldr r3, [r7, #4] - 8005c86: 6a9b ldr r3, [r3, #40] @ 0x28 - 8005c88: 1c5a adds r2, r3, #1 - 8005c8a: 687b ldr r3, [r7, #4] - 8005c8c: 629a str r2, [r3, #40] @ 0x28 + 8005df8: 687b ldr r3, [r7, #4] + 8005dfa: 6a9b ldr r3, [r3, #40] @ 0x28 + 8005dfc: 1c5a adds r2, r3, #1 + 8005dfe: 687b ldr r3, [r7, #4] + 8005e00: 629a str r2, [r3, #40] @ 0x28 } if (--huart->RxXferCount == 0U) - 8005c8e: 687b ldr r3, [r7, #4] - 8005c90: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8005c92: b29b uxth r3, r3 - 8005c94: 3b01 subs r3, #1 - 8005c96: b29b uxth r3, r3 - 8005c98: 687a ldr r2, [r7, #4] - 8005c9a: 4619 mov r1, r3 - 8005c9c: 85d1 strh r1, [r2, #46] @ 0x2e - 8005c9e: 2b00 cmp r3, #0 - 8005ca0: d15d bne.n 8005d5e + 8005e02: 687b ldr r3, [r7, #4] + 8005e04: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8005e06: b29b uxth r3, r3 + 8005e08: 3b01 subs r3, #1 + 8005e0a: b29b uxth r3, r3 + 8005e0c: 687a ldr r2, [r7, #4] + 8005e0e: 4619 mov r1, r3 + 8005e10: 85d1 strh r1, [r2, #46] @ 0x2e + 8005e12: 2b00 cmp r3, #0 + 8005e14: d15d bne.n 8005ed2 { /* Disable the UART Data Register not empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); - 8005ca2: 687b ldr r3, [r7, #4] - 8005ca4: 681b ldr r3, [r3, #0] - 8005ca6: 68da ldr r2, [r3, #12] - 8005ca8: 687b ldr r3, [r7, #4] - 8005caa: 681b ldr r3, [r3, #0] - 8005cac: f022 0220 bic.w r2, r2, #32 - 8005cb0: 60da str r2, [r3, #12] + 8005e16: 687b ldr r3, [r7, #4] + 8005e18: 681b ldr r3, [r3, #0] + 8005e1a: 68da ldr r2, [r3, #12] + 8005e1c: 687b ldr r3, [r7, #4] + 8005e1e: 681b ldr r3, [r3, #0] + 8005e20: f022 0220 bic.w r2, r2, #32 + 8005e24: 60da str r2, [r3, #12] /* Disable the UART Parity Error Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_PE); - 8005cb2: 687b ldr r3, [r7, #4] - 8005cb4: 681b ldr r3, [r3, #0] - 8005cb6: 68da ldr r2, [r3, #12] - 8005cb8: 687b ldr r3, [r7, #4] - 8005cba: 681b ldr r3, [r3, #0] - 8005cbc: f422 7280 bic.w r2, r2, #256 @ 0x100 - 8005cc0: 60da str r2, [r3, #12] + 8005e26: 687b ldr r3, [r7, #4] + 8005e28: 681b ldr r3, [r3, #0] + 8005e2a: 68da ldr r2, [r3, #12] + 8005e2c: 687b ldr r3, [r7, #4] + 8005e2e: 681b ldr r3, [r3, #0] + 8005e30: f422 7280 bic.w r2, r2, #256 @ 0x100 + 8005e34: 60da str r2, [r3, #12] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); - 8005cc2: 687b ldr r3, [r7, #4] - 8005cc4: 681b ldr r3, [r3, #0] - 8005cc6: 695a ldr r2, [r3, #20] - 8005cc8: 687b ldr r3, [r7, #4] - 8005cca: 681b ldr r3, [r3, #0] - 8005ccc: f022 0201 bic.w r2, r2, #1 - 8005cd0: 615a str r2, [r3, #20] + 8005e36: 687b ldr r3, [r7, #4] + 8005e38: 681b ldr r3, [r3, #0] + 8005e3a: 695a ldr r2, [r3, #20] + 8005e3c: 687b ldr r3, [r7, #4] + 8005e3e: 681b ldr r3, [r3, #0] + 8005e40: f022 0201 bic.w r2, r2, #1 + 8005e44: 615a str r2, [r3, #20] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8005cd2: 687b ldr r3, [r7, #4] - 8005cd4: 2220 movs r2, #32 - 8005cd6: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005e46: 687b ldr r3, [r7, #4] + 8005e48: 2220 movs r2, #32 + 8005e4a: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Initialize type of RxEvent to Transfer Complete */ huart->RxEventType = HAL_UART_RXEVENT_TC; - 8005cda: 687b ldr r3, [r7, #4] - 8005cdc: 2200 movs r2, #0 - 8005cde: 635a str r2, [r3, #52] @ 0x34 + 8005e4e: 687b ldr r3, [r7, #4] + 8005e50: 2200 movs r2, #0 + 8005e52: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8005ce0: 687b ldr r3, [r7, #4] - 8005ce2: 6b1b ldr r3, [r3, #48] @ 0x30 - 8005ce4: 2b01 cmp r3, #1 - 8005ce6: d135 bne.n 8005d54 + 8005e54: 687b ldr r3, [r7, #4] + 8005e56: 6b1b ldr r3, [r3, #48] @ 0x30 + 8005e58: 2b01 cmp r3, #1 + 8005e5a: d135 bne.n 8005ec8 { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005ce8: 687b ldr r3, [r7, #4] - 8005cea: 2200 movs r2, #0 - 8005cec: 631a str r2, [r3, #48] @ 0x30 + 8005e5c: 687b ldr r3, [r7, #4] + 8005e5e: 2200 movs r2, #0 + 8005e60: 631a str r2, [r3, #48] @ 0x30 /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005cee: 687b ldr r3, [r7, #4] - 8005cf0: 681b ldr r3, [r3, #0] - 8005cf2: 330c adds r3, #12 - 8005cf4: 617b str r3, [r7, #20] + 8005e62: 687b ldr r3, [r7, #4] + 8005e64: 681b ldr r3, [r3, #0] + 8005e66: 330c adds r3, #12 + 8005e68: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005cf6: 697b ldr r3, [r7, #20] - 8005cf8: e853 3f00 ldrex r3, [r3] - 8005cfc: 613b str r3, [r7, #16] + 8005e6a: 697b ldr r3, [r7, #20] + 8005e6c: e853 3f00 ldrex r3, [r3] + 8005e70: 613b str r3, [r7, #16] return(result); - 8005cfe: 693b ldr r3, [r7, #16] - 8005d00: f023 0310 bic.w r3, r3, #16 - 8005d04: 627b str r3, [r7, #36] @ 0x24 - 8005d06: 687b ldr r3, [r7, #4] - 8005d08: 681b ldr r3, [r3, #0] - 8005d0a: 330c adds r3, #12 - 8005d0c: 6a7a ldr r2, [r7, #36] @ 0x24 - 8005d0e: 623a str r2, [r7, #32] - 8005d10: 61fb str r3, [r7, #28] + 8005e72: 693b ldr r3, [r7, #16] + 8005e74: f023 0310 bic.w r3, r3, #16 + 8005e78: 627b str r3, [r7, #36] @ 0x24 + 8005e7a: 687b ldr r3, [r7, #4] + 8005e7c: 681b ldr r3, [r3, #0] + 8005e7e: 330c adds r3, #12 + 8005e80: 6a7a ldr r2, [r7, #36] @ 0x24 + 8005e82: 623a str r2, [r7, #32] + 8005e84: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005d12: 69f9 ldr r1, [r7, #28] - 8005d14: 6a3a ldr r2, [r7, #32] - 8005d16: e841 2300 strex r3, r2, [r1] - 8005d1a: 61bb str r3, [r7, #24] + 8005e86: 69f9 ldr r1, [r7, #28] + 8005e88: 6a3a ldr r2, [r7, #32] + 8005e8a: e841 2300 strex r3, r2, [r1] + 8005e8e: 61bb str r3, [r7, #24] return(result); - 8005d1c: 69bb ldr r3, [r7, #24] - 8005d1e: 2b00 cmp r3, #0 - 8005d20: d1e5 bne.n 8005cee + 8005e90: 69bb ldr r3, [r7, #24] + 8005e92: 2b00 cmp r3, #0 + 8005e94: d1e5 bne.n 8005e62 /* Check if IDLE flag is set */ if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) - 8005d22: 687b ldr r3, [r7, #4] - 8005d24: 681b ldr r3, [r3, #0] - 8005d26: 681b ldr r3, [r3, #0] - 8005d28: f003 0310 and.w r3, r3, #16 - 8005d2c: 2b10 cmp r3, #16 - 8005d2e: d10a bne.n 8005d46 + 8005e96: 687b ldr r3, [r7, #4] + 8005e98: 681b ldr r3, [r3, #0] + 8005e9a: 681b ldr r3, [r3, #0] + 8005e9c: f003 0310 and.w r3, r3, #16 + 8005ea0: 2b10 cmp r3, #16 + 8005ea2: d10a bne.n 8005eba { /* Clear IDLE flag in ISR */ __HAL_UART_CLEAR_IDLEFLAG(huart); - 8005d30: 2300 movs r3, #0 - 8005d32: 60fb str r3, [r7, #12] - 8005d34: 687b ldr r3, [r7, #4] - 8005d36: 681b ldr r3, [r3, #0] - 8005d38: 681b ldr r3, [r3, #0] - 8005d3a: 60fb str r3, [r7, #12] - 8005d3c: 687b ldr r3, [r7, #4] - 8005d3e: 681b ldr r3, [r3, #0] - 8005d40: 685b ldr r3, [r3, #4] - 8005d42: 60fb str r3, [r7, #12] - 8005d44: 68fb ldr r3, [r7, #12] + 8005ea4: 2300 movs r3, #0 + 8005ea6: 60fb str r3, [r7, #12] + 8005ea8: 687b ldr r3, [r7, #4] + 8005eaa: 681b ldr r3, [r3, #0] + 8005eac: 681b ldr r3, [r3, #0] + 8005eae: 60fb str r3, [r7, #12] + 8005eb0: 687b ldr r3, [r7, #4] + 8005eb2: 681b ldr r3, [r3, #0] + 8005eb4: 685b ldr r3, [r3, #4] + 8005eb6: 60fb str r3, [r7, #12] + 8005eb8: 68fb ldr r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 8005d46: 687b ldr r3, [r7, #4] - 8005d48: 8d9b ldrh r3, [r3, #44] @ 0x2c - 8005d4a: 4619 mov r1, r3 - 8005d4c: 6878 ldr r0, [r7, #4] - 8005d4e: f7ff fe0e bl 800596e - 8005d52: e002 b.n 8005d5a + 8005eba: 687b ldr r3, [r7, #4] + 8005ebc: 8d9b ldrh r3, [r3, #44] @ 0x2c + 8005ebe: 4619 mov r1, r3 + 8005ec0: 6878 ldr r0, [r7, #4] + 8005ec2: f7ff fe0e bl 8005ae2 + 8005ec6: e002 b.n 8005ece #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); - 8005d54: 6878 ldr r0, [r7, #4] - 8005d56: f7ff fdf8 bl 800594a + 8005ec8: 6878 ldr r0, [r7, #4] + 8005eca: f7ff fdf8 bl 8005abe #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; - 8005d5a: 2300 movs r3, #0 - 8005d5c: e002 b.n 8005d64 + 8005ece: 2300 movs r3, #0 + 8005ed0: e002 b.n 8005ed8 } return HAL_OK; - 8005d5e: 2300 movs r3, #0 - 8005d60: e000 b.n 8005d64 + 8005ed2: 2300 movs r3, #0 + 8005ed4: e000 b.n 8005ed8 } else { return HAL_BUSY; - 8005d62: 2302 movs r3, #2 + 8005ed6: 2302 movs r3, #2 } } - 8005d64: 4618 mov r0, r3 - 8005d66: 3730 adds r7, #48 @ 0x30 - 8005d68: 46bd mov sp, r7 - 8005d6a: bd80 pop {r7, pc} + 8005ed8: 4618 mov r0, r3 + 8005eda: 3730 adds r7, #48 @ 0x30 + 8005edc: 46bd mov sp, r7 + 8005ede: bd80 pop {r7, pc} -08005d6c : +08005ee0 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { - 8005d6c: b580 push {r7, lr} - 8005d6e: b084 sub sp, #16 - 8005d70: af00 add r7, sp, #0 - 8005d72: 6078 str r0, [r7, #4] + 8005ee0: b580 push {r7, lr} + 8005ee2: b084 sub sp, #16 + 8005ee4: af00 add r7, sp, #0 + 8005ee6: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 8005d74: 687b ldr r3, [r7, #4] - 8005d76: 681b ldr r3, [r3, #0] - 8005d78: 691b ldr r3, [r3, #16] - 8005d7a: f423 5140 bic.w r1, r3, #12288 @ 0x3000 - 8005d7e: 687b ldr r3, [r7, #4] - 8005d80: 68da ldr r2, [r3, #12] - 8005d82: 687b ldr r3, [r7, #4] - 8005d84: 681b ldr r3, [r3, #0] - 8005d86: 430a orrs r2, r1 - 8005d88: 611a str r2, [r3, #16] + 8005ee8: 687b ldr r3, [r7, #4] + 8005eea: 681b ldr r3, [r3, #0] + 8005eec: 691b ldr r3, [r3, #16] + 8005eee: f423 5140 bic.w r1, r3, #12288 @ 0x3000 + 8005ef2: 687b ldr r3, [r7, #4] + 8005ef4: 68da ldr r2, [r3, #12] + 8005ef6: 687b ldr r3, [r7, #4] + 8005ef8: 681b ldr r3, [r3, #0] + 8005efa: 430a orrs r2, r1 + 8005efc: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; - 8005d8a: 687b ldr r3, [r7, #4] - 8005d8c: 689a ldr r2, [r3, #8] - 8005d8e: 687b ldr r3, [r7, #4] - 8005d90: 691b ldr r3, [r3, #16] - 8005d92: 431a orrs r2, r3 - 8005d94: 687b ldr r3, [r7, #4] - 8005d96: 695b ldr r3, [r3, #20] - 8005d98: 4313 orrs r3, r2 - 8005d9a: 60bb str r3, [r7, #8] + 8005efe: 687b ldr r3, [r7, #4] + 8005f00: 689a ldr r2, [r3, #8] + 8005f02: 687b ldr r3, [r7, #4] + 8005f04: 691b ldr r3, [r3, #16] + 8005f06: 431a orrs r2, r3 + 8005f08: 687b ldr r3, [r7, #4] + 8005f0a: 695b ldr r3, [r3, #20] + 8005f0c: 4313 orrs r3, r2 + 8005f0e: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, - 8005d9c: 687b ldr r3, [r7, #4] - 8005d9e: 681b ldr r3, [r3, #0] - 8005da0: 68db ldr r3, [r3, #12] - 8005da2: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 - 8005da6: f023 030c bic.w r3, r3, #12 - 8005daa: 687a ldr r2, [r7, #4] - 8005dac: 6812 ldr r2, [r2, #0] - 8005dae: 68b9 ldr r1, [r7, #8] - 8005db0: 430b orrs r3, r1 - 8005db2: 60d3 str r3, [r2, #12] + 8005f10: 687b ldr r3, [r7, #4] + 8005f12: 681b ldr r3, [r3, #0] + 8005f14: 68db ldr r3, [r3, #12] + 8005f16: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 + 8005f1a: f023 030c bic.w r3, r3, #12 + 8005f1e: 687a ldr r2, [r7, #4] + 8005f20: 6812 ldr r2, [r2, #0] + 8005f22: 68b9 ldr r1, [r7, #8] + 8005f24: 430b orrs r3, r1 + 8005f26: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); - 8005db4: 687b ldr r3, [r7, #4] - 8005db6: 681b ldr r3, [r3, #0] - 8005db8: 695b ldr r3, [r3, #20] - 8005dba: f423 7140 bic.w r1, r3, #768 @ 0x300 - 8005dbe: 687b ldr r3, [r7, #4] - 8005dc0: 699a ldr r2, [r3, #24] - 8005dc2: 687b ldr r3, [r7, #4] - 8005dc4: 681b ldr r3, [r3, #0] - 8005dc6: 430a orrs r2, r1 - 8005dc8: 615a str r2, [r3, #20] + 8005f28: 687b ldr r3, [r7, #4] + 8005f2a: 681b ldr r3, [r3, #0] + 8005f2c: 695b ldr r3, [r3, #20] + 8005f2e: f423 7140 bic.w r1, r3, #768 @ 0x300 + 8005f32: 687b ldr r3, [r7, #4] + 8005f34: 699a ldr r2, [r3, #24] + 8005f36: 687b ldr r3, [r7, #4] + 8005f38: 681b ldr r3, [r3, #0] + 8005f3a: 430a orrs r2, r1 + 8005f3c: 615a str r2, [r3, #20] if(huart->Instance == USART1) - 8005dca: 687b ldr r3, [r7, #4] - 8005dcc: 681b ldr r3, [r3, #0] - 8005dce: 4a2c ldr r2, [pc, #176] @ (8005e80 ) - 8005dd0: 4293 cmp r3, r2 - 8005dd2: d103 bne.n 8005ddc + 8005f3e: 687b ldr r3, [r7, #4] + 8005f40: 681b ldr r3, [r3, #0] + 8005f42: 4a2c ldr r2, [pc, #176] @ (8005ff4 ) + 8005f44: 4293 cmp r3, r2 + 8005f46: d103 bne.n 8005f50 { pclk = HAL_RCC_GetPCLK2Freq(); - 8005dd4: f7fe fd68 bl 80048a8 - 8005dd8: 60f8 str r0, [r7, #12] - 8005dda: e002 b.n 8005de2 + 8005f48: f7fe fd68 bl 8004a1c + 8005f4c: 60f8 str r0, [r7, #12] + 8005f4e: e002 b.n 8005f56 } else { pclk = HAL_RCC_GetPCLK1Freq(); - 8005ddc: f7fe fd50 bl 8004880 - 8005de0: 60f8 str r0, [r7, #12] + 8005f50: f7fe fd50 bl 80049f4 + 8005f54: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); - 8005de2: 68fa ldr r2, [r7, #12] - 8005de4: 4613 mov r3, r2 - 8005de6: 009b lsls r3, r3, #2 - 8005de8: 4413 add r3, r2 - 8005dea: 009a lsls r2, r3, #2 - 8005dec: 441a add r2, r3 - 8005dee: 687b ldr r3, [r7, #4] - 8005df0: 685b ldr r3, [r3, #4] - 8005df2: 009b lsls r3, r3, #2 - 8005df4: fbb2 f3f3 udiv r3, r2, r3 - 8005df8: 4a22 ldr r2, [pc, #136] @ (8005e84 ) - 8005dfa: fba2 2303 umull r2, r3, r2, r3 - 8005dfe: 095b lsrs r3, r3, #5 - 8005e00: 0119 lsls r1, r3, #4 - 8005e02: 68fa ldr r2, [r7, #12] - 8005e04: 4613 mov r3, r2 - 8005e06: 009b lsls r3, r3, #2 - 8005e08: 4413 add r3, r2 - 8005e0a: 009a lsls r2, r3, #2 - 8005e0c: 441a add r2, r3 - 8005e0e: 687b ldr r3, [r7, #4] - 8005e10: 685b ldr r3, [r3, #4] - 8005e12: 009b lsls r3, r3, #2 - 8005e14: fbb2 f2f3 udiv r2, r2, r3 - 8005e18: 4b1a ldr r3, [pc, #104] @ (8005e84 ) - 8005e1a: fba3 0302 umull r0, r3, r3, r2 - 8005e1e: 095b lsrs r3, r3, #5 - 8005e20: 2064 movs r0, #100 @ 0x64 - 8005e22: fb00 f303 mul.w r3, r0, r3 - 8005e26: 1ad3 subs r3, r2, r3 - 8005e28: 011b lsls r3, r3, #4 - 8005e2a: 3332 adds r3, #50 @ 0x32 - 8005e2c: 4a15 ldr r2, [pc, #84] @ (8005e84 ) - 8005e2e: fba2 2303 umull r2, r3, r2, r3 - 8005e32: 095b lsrs r3, r3, #5 - 8005e34: f003 03f0 and.w r3, r3, #240 @ 0xf0 - 8005e38: 4419 add r1, r3 - 8005e3a: 68fa ldr r2, [r7, #12] - 8005e3c: 4613 mov r3, r2 - 8005e3e: 009b lsls r3, r3, #2 - 8005e40: 4413 add r3, r2 - 8005e42: 009a lsls r2, r3, #2 - 8005e44: 441a add r2, r3 - 8005e46: 687b ldr r3, [r7, #4] - 8005e48: 685b ldr r3, [r3, #4] - 8005e4a: 009b lsls r3, r3, #2 - 8005e4c: fbb2 f2f3 udiv r2, r2, r3 - 8005e50: 4b0c ldr r3, [pc, #48] @ (8005e84 ) - 8005e52: fba3 0302 umull r0, r3, r3, r2 - 8005e56: 095b lsrs r3, r3, #5 - 8005e58: 2064 movs r0, #100 @ 0x64 - 8005e5a: fb00 f303 mul.w r3, r0, r3 - 8005e5e: 1ad3 subs r3, r2, r3 - 8005e60: 011b lsls r3, r3, #4 - 8005e62: 3332 adds r3, #50 @ 0x32 - 8005e64: 4a07 ldr r2, [pc, #28] @ (8005e84 ) - 8005e66: fba2 2303 umull r2, r3, r2, r3 - 8005e6a: 095b lsrs r3, r3, #5 - 8005e6c: f003 020f and.w r2, r3, #15 - 8005e70: 687b ldr r3, [r7, #4] - 8005e72: 681b ldr r3, [r3, #0] - 8005e74: 440a add r2, r1 - 8005e76: 609a str r2, [r3, #8] + 8005f56: 68fa ldr r2, [r7, #12] + 8005f58: 4613 mov r3, r2 + 8005f5a: 009b lsls r3, r3, #2 + 8005f5c: 4413 add r3, r2 + 8005f5e: 009a lsls r2, r3, #2 + 8005f60: 441a add r2, r3 + 8005f62: 687b ldr r3, [r7, #4] + 8005f64: 685b ldr r3, [r3, #4] + 8005f66: 009b lsls r3, r3, #2 + 8005f68: fbb2 f3f3 udiv r3, r2, r3 + 8005f6c: 4a22 ldr r2, [pc, #136] @ (8005ff8 ) + 8005f6e: fba2 2303 umull r2, r3, r2, r3 + 8005f72: 095b lsrs r3, r3, #5 + 8005f74: 0119 lsls r1, r3, #4 + 8005f76: 68fa ldr r2, [r7, #12] + 8005f78: 4613 mov r3, r2 + 8005f7a: 009b lsls r3, r3, #2 + 8005f7c: 4413 add r3, r2 + 8005f7e: 009a lsls r2, r3, #2 + 8005f80: 441a add r2, r3 + 8005f82: 687b ldr r3, [r7, #4] + 8005f84: 685b ldr r3, [r3, #4] + 8005f86: 009b lsls r3, r3, #2 + 8005f88: fbb2 f2f3 udiv r2, r2, r3 + 8005f8c: 4b1a ldr r3, [pc, #104] @ (8005ff8 ) + 8005f8e: fba3 0302 umull r0, r3, r3, r2 + 8005f92: 095b lsrs r3, r3, #5 + 8005f94: 2064 movs r0, #100 @ 0x64 + 8005f96: fb00 f303 mul.w r3, r0, r3 + 8005f9a: 1ad3 subs r3, r2, r3 + 8005f9c: 011b lsls r3, r3, #4 + 8005f9e: 3332 adds r3, #50 @ 0x32 + 8005fa0: 4a15 ldr r2, [pc, #84] @ (8005ff8 ) + 8005fa2: fba2 2303 umull r2, r3, r2, r3 + 8005fa6: 095b lsrs r3, r3, #5 + 8005fa8: f003 03f0 and.w r3, r3, #240 @ 0xf0 + 8005fac: 4419 add r1, r3 + 8005fae: 68fa ldr r2, [r7, #12] + 8005fb0: 4613 mov r3, r2 + 8005fb2: 009b lsls r3, r3, #2 + 8005fb4: 4413 add r3, r2 + 8005fb6: 009a lsls r2, r3, #2 + 8005fb8: 441a add r2, r3 + 8005fba: 687b ldr r3, [r7, #4] + 8005fbc: 685b ldr r3, [r3, #4] + 8005fbe: 009b lsls r3, r3, #2 + 8005fc0: fbb2 f2f3 udiv r2, r2, r3 + 8005fc4: 4b0c ldr r3, [pc, #48] @ (8005ff8 ) + 8005fc6: fba3 0302 umull r0, r3, r3, r2 + 8005fca: 095b lsrs r3, r3, #5 + 8005fcc: 2064 movs r0, #100 @ 0x64 + 8005fce: fb00 f303 mul.w r3, r0, r3 + 8005fd2: 1ad3 subs r3, r2, r3 + 8005fd4: 011b lsls r3, r3, #4 + 8005fd6: 3332 adds r3, #50 @ 0x32 + 8005fd8: 4a07 ldr r2, [pc, #28] @ (8005ff8 ) + 8005fda: fba2 2303 umull r2, r3, r2, r3 + 8005fde: 095b lsrs r3, r3, #5 + 8005fe0: f003 020f and.w r2, r3, #15 + 8005fe4: 687b ldr r3, [r7, #4] + 8005fe6: 681b ldr r3, [r3, #0] + 8005fe8: 440a add r2, r1 + 8005fea: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } - 8005e78: bf00 nop - 8005e7a: 3710 adds r7, #16 - 8005e7c: 46bd mov sp, r7 - 8005e7e: bd80 pop {r7, pc} - 8005e80: 40013800 .word 0x40013800 - 8005e84: 51eb851f .word 0x51eb851f + 8005fec: bf00 nop + 8005fee: 3710 adds r7, #16 + 8005ff0: 46bd mov sp, r7 + 8005ff2: bd80 pop {r7, pc} + 8005ff4: 40013800 .word 0x40013800 + 8005ff8: 51eb851f .word 0x51eb851f -08005e88 : - 8005e88: 4603 mov r3, r0 - 8005e8a: 4402 add r2, r0 - 8005e8c: 4293 cmp r3, r2 - 8005e8e: d100 bne.n 8005e92 - 8005e90: 4770 bx lr - 8005e92: f803 1b01 strb.w r1, [r3], #1 - 8005e96: e7f9 b.n 8005e8c +08005ffc : + 8005ffc: 4603 mov r3, r0 + 8005ffe: 4402 add r2, r0 + 8006000: 4293 cmp r3, r2 + 8006002: d100 bne.n 8006006 + 8006004: 4770 bx lr + 8006006: f803 1b01 strb.w r1, [r3], #1 + 800600a: e7f9 b.n 8006000 -08005e98 <__errno>: - 8005e98: 4b01 ldr r3, [pc, #4] @ (8005ea0 <__errno+0x8>) - 8005e9a: 6818 ldr r0, [r3, #0] - 8005e9c: 4770 bx lr - 8005e9e: bf00 nop - 8005ea0: 20000014 .word 0x20000014 +0800600c <__errno>: + 800600c: 4b01 ldr r3, [pc, #4] @ (8006014 <__errno+0x8>) + 800600e: 6818 ldr r0, [r3, #0] + 8006010: 4770 bx lr + 8006012: bf00 nop + 8006014: 20000010 .word 0x20000010 -08005ea4 <__libc_init_array>: - 8005ea4: b570 push {r4, r5, r6, lr} - 8005ea6: 2600 movs r6, #0 - 8005ea8: 4d0c ldr r5, [pc, #48] @ (8005edc <__libc_init_array+0x38>) - 8005eaa: 4b0d ldr r3, [pc, #52] @ (8005ee0 <__libc_init_array+0x3c>) - 8005eac: 1b5b subs r3, r3, r5 - 8005eae: 109c asrs r4, r3, #2 - 8005eb0: 42a6 cmp r6, r4 - 8005eb2: d109 bne.n 8005ec8 <__libc_init_array+0x24> - 8005eb4: 2600 movs r6, #0 - 8005eb6: f000 f8a9 bl 800600c <_init> - 8005eba: 4d0a ldr r5, [pc, #40] @ (8005ee4 <__libc_init_array+0x40>) - 8005ebc: 4b0a ldr r3, [pc, #40] @ (8005ee8 <__libc_init_array+0x44>) - 8005ebe: 1b5b subs r3, r3, r5 - 8005ec0: 109c asrs r4, r3, #2 - 8005ec2: 42a6 cmp r6, r4 - 8005ec4: d105 bne.n 8005ed2 <__libc_init_array+0x2e> - 8005ec6: bd70 pop {r4, r5, r6, pc} - 8005ec8: f855 3b04 ldr.w r3, [r5], #4 - 8005ecc: 4798 blx r3 - 8005ece: 3601 adds r6, #1 - 8005ed0: e7ee b.n 8005eb0 <__libc_init_array+0xc> - 8005ed2: f855 3b04 ldr.w r3, [r5], #4 - 8005ed6: 4798 blx r3 - 8005ed8: 3601 adds r6, #1 - 8005eda: e7f2 b.n 8005ec2 <__libc_init_array+0x1e> - 8005edc: 08006168 .word 0x08006168 - 8005ee0: 08006168 .word 0x08006168 - 8005ee4: 08006168 .word 0x08006168 - 8005ee8: 0800616c .word 0x0800616c +08006018 <__libc_init_array>: + 8006018: b570 push {r4, r5, r6, lr} + 800601a: 2600 movs r6, #0 + 800601c: 4d0c ldr r5, [pc, #48] @ (8006050 <__libc_init_array+0x38>) + 800601e: 4b0d ldr r3, [pc, #52] @ (8006054 <__libc_init_array+0x3c>) + 8006020: 1b5b subs r3, r3, r5 + 8006022: 109c asrs r4, r3, #2 + 8006024: 42a6 cmp r6, r4 + 8006026: d109 bne.n 800603c <__libc_init_array+0x24> + 8006028: 2600 movs r6, #0 + 800602a: f000 f8a9 bl 8006180 <_init> + 800602e: 4d0a ldr r5, [pc, #40] @ (8006058 <__libc_init_array+0x40>) + 8006030: 4b0a ldr r3, [pc, #40] @ (800605c <__libc_init_array+0x44>) + 8006032: 1b5b subs r3, r3, r5 + 8006034: 109c asrs r4, r3, #2 + 8006036: 42a6 cmp r6, r4 + 8006038: d105 bne.n 8006046 <__libc_init_array+0x2e> + 800603a: bd70 pop {r4, r5, r6, pc} + 800603c: f855 3b04 ldr.w r3, [r5], #4 + 8006040: 4798 blx r3 + 8006042: 3601 adds r6, #1 + 8006044: e7ee b.n 8006024 <__libc_init_array+0xc> + 8006046: f855 3b04 ldr.w r3, [r5], #4 + 800604a: 4798 blx r3 + 800604c: 3601 adds r6, #1 + 800604e: e7f2 b.n 8006036 <__libc_init_array+0x1e> + 8006050: 080062dc .word 0x080062dc + 8006054: 080062dc .word 0x080062dc + 8006058: 080062dc .word 0x080062dc + 800605c: 080062e0 .word 0x080062e0 -08005eec : - 8005eec: b538 push {r3, r4, r5, lr} - 8005eee: 4604 mov r4, r0 - 8005ef0: f000 f81a bl 8005f28 <__ieee754_sqrtf> - 8005ef4: 4621 mov r1, r4 - 8005ef6: 4605 mov r5, r0 - 8005ef8: 4620 mov r0, r4 - 8005efa: f7fa fc03 bl 8000704 <__aeabi_fcmpun> - 8005efe: b920 cbnz r0, 8005f0a - 8005f00: 4620 mov r0, r4 - 8005f02: 2100 movs r1, #0 - 8005f04: f7fa fbd6 bl 80006b4 <__aeabi_fcmplt> - 8005f08: b908 cbnz r0, 8005f0e - 8005f0a: 4628 mov r0, r5 - 8005f0c: bd38 pop {r3, r4, r5, pc} - 8005f0e: f7ff ffc3 bl 8005e98 <__errno> - 8005f12: 2221 movs r2, #33 @ 0x21 - 8005f14: 4603 mov r3, r0 - 8005f16: 2100 movs r1, #0 - 8005f18: 601a str r2, [r3, #0] - 8005f1a: 4608 mov r0, r1 - 8005f1c: f7fa fae0 bl 80004e0 <__aeabi_fdiv> - 8005f20: 4605 mov r5, r0 - 8005f22: 4628 mov r0, r5 - 8005f24: bd38 pop {r3, r4, r5, pc} - 8005f26: bf00 nop +08006060 : + 8006060: b538 push {r3, r4, r5, lr} + 8006062: 4604 mov r4, r0 + 8006064: f000 f81a bl 800609c <__ieee754_sqrtf> + 8006068: 4621 mov r1, r4 + 800606a: 4605 mov r5, r0 + 800606c: 4620 mov r0, r4 + 800606e: f7fa fb49 bl 8000704 <__aeabi_fcmpun> + 8006072: b920 cbnz r0, 800607e + 8006074: 4620 mov r0, r4 + 8006076: 2100 movs r1, #0 + 8006078: f7fa fb1c bl 80006b4 <__aeabi_fcmplt> + 800607c: b908 cbnz r0, 8006082 + 800607e: 4628 mov r0, r5 + 8006080: bd38 pop {r3, r4, r5, pc} + 8006082: f7ff ffc3 bl 800600c <__errno> + 8006086: 2221 movs r2, #33 @ 0x21 + 8006088: 4603 mov r3, r0 + 800608a: 2100 movs r1, #0 + 800608c: 601a str r2, [r3, #0] + 800608e: 4608 mov r0, r1 + 8006090: f7fa fa26 bl 80004e0 <__aeabi_fdiv> + 8006094: 4605 mov r5, r0 + 8006096: 4628 mov r0, r5 + 8006098: bd38 pop {r3, r4, r5, pc} + 800609a: bf00 nop -08005f28 <__ieee754_sqrtf>: - 8005f28: f020 4200 bic.w r2, r0, #2147483648 @ 0x80000000 - 8005f2c: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000 - 8005f30: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 8005f34: 4604 mov r4, r0 - 8005f36: d24f bcs.n 8005fd8 <__ieee754_sqrtf+0xb0> - 8005f38: 2a00 cmp r2, #0 - 8005f3a: d04b beq.n 8005fd4 <__ieee754_sqrtf+0xac> - 8005f3c: 2800 cmp r0, #0 - 8005f3e: 4603 mov r3, r0 - 8005f40: db54 blt.n 8005fec <__ieee754_sqrtf+0xc4> - 8005f42: f010 42ff ands.w r2, r0, #2139095040 @ 0x7f800000 - 8005f46: d14f bne.n 8005fe8 <__ieee754_sqrtf+0xc0> - 8005f48: 005b lsls r3, r3, #1 - 8005f4a: 0218 lsls r0, r3, #8 - 8005f4c: 4611 mov r1, r2 - 8005f4e: f102 0201 add.w r2, r2, #1 - 8005f52: d5f9 bpl.n 8005f48 <__ieee754_sqrtf+0x20> - 8005f54: 4249 negs r1, r1 - 8005f56: 2400 movs r4, #0 - 8005f58: f3c3 0216 ubfx r2, r3, #0, #23 - 8005f5c: f1a1 057f sub.w r5, r1, #127 @ 0x7f - 8005f60: 07cb lsls r3, r1, #31 - 8005f62: f04f 0e19 mov.w lr, #25 - 8005f66: f04f 7c80 mov.w ip, #16777216 @ 0x1000000 - 8005f6a: 4621 mov r1, r4 - 8005f6c: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 - 8005f70: bf58 it pl - 8005f72: 0052 lslpl r2, r2, #1 - 8005f74: 106d asrs r5, r5, #1 - 8005f76: 0052 lsls r2, r2, #1 - 8005f78: eb01 030c add.w r3, r1, ip - 8005f7c: 4293 cmp r3, r2 - 8005f7e: bfcf iteee gt - 8005f80: 4613 movgt r3, r2 - 8005f82: eb03 010c addle.w r1, r3, ip - 8005f86: 4464 addle r4, ip - 8005f88: 1ad3 suble r3, r2, r3 - 8005f8a: f1be 0e01 subs.w lr, lr, #1 - 8005f8e: ea4f 0243 mov.w r2, r3, lsl #1 - 8005f92: ea4f 0c5c mov.w ip, ip, lsr #1 - 8005f96: d1ef bne.n 8005f78 <__ieee754_sqrtf+0x50> - 8005f98: b1bb cbz r3, 8005fca <__ieee754_sqrtf+0xa2> - 8005f9a: 4e1a ldr r6, [pc, #104] @ (8006004 <__ieee754_sqrtf+0xdc>) - 8005f9c: 4f1a ldr r7, [pc, #104] @ (8006008 <__ieee754_sqrtf+0xe0>) - 8005f9e: 6830 ldr r0, [r6, #0] - 8005fa0: 6839 ldr r1, [r7, #0] - 8005fa2: f7fa f8df bl 8000164 <__aeabi_fsub> - 8005fa6: f8d6 8000 ldr.w r8, [r6] - 8005faa: 4601 mov r1, r0 - 8005fac: 4640 mov r0, r8 - 8005fae: f7fa fb8b bl 80006c8 <__aeabi_fcmple> - 8005fb2: b150 cbz r0, 8005fca <__ieee754_sqrtf+0xa2> - 8005fb4: 6830 ldr r0, [r6, #0] - 8005fb6: 6839 ldr r1, [r7, #0] - 8005fb8: f7fa f8d6 bl 8000168 <__addsf3> - 8005fbc: 6836 ldr r6, [r6, #0] - 8005fbe: 4601 mov r1, r0 - 8005fc0: 4630 mov r0, r6 - 8005fc2: f7fa fb77 bl 80006b4 <__aeabi_fcmplt> - 8005fc6: b1c8 cbz r0, 8005ffc <__ieee754_sqrtf+0xd4> - 8005fc8: 3402 adds r4, #2 - 8005fca: 1060 asrs r0, r4, #1 - 8005fcc: f100 507c add.w r0, r0, #1056964608 @ 0x3f000000 - 8005fd0: eb00 50c5 add.w r0, r0, r5, lsl #23 - 8005fd4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8005fd8: 4601 mov r1, r0 - 8005fda: f7fa f9cd bl 8000378 <__aeabi_fmul> - 8005fde: 4621 mov r1, r4 - 8005fe0: f7fa f8c2 bl 8000168 <__addsf3> - 8005fe4: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8005fe8: 15c1 asrs r1, r0, #23 - 8005fea: e7b4 b.n 8005f56 <__ieee754_sqrtf+0x2e> - 8005fec: 4601 mov r1, r0 - 8005fee: f7fa f8b9 bl 8000164 <__aeabi_fsub> - 8005ff2: 4601 mov r1, r0 - 8005ff4: f7fa fa74 bl 80004e0 <__aeabi_fdiv> - 8005ff8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8005ffc: 3401 adds r4, #1 - 8005ffe: f024 0401 bic.w r4, r4, #1 - 8006002: e7e2 b.n 8005fca <__ieee754_sqrtf+0xa2> - 8006004: 0800615c .word 0x0800615c - 8006008: 08006158 .word 0x08006158 +0800609c <__ieee754_sqrtf>: + 800609c: f020 4200 bic.w r2, r0, #2147483648 @ 0x80000000 + 80060a0: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000 + 80060a4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 80060a8: 4604 mov r4, r0 + 80060aa: d24f bcs.n 800614c <__ieee754_sqrtf+0xb0> + 80060ac: 2a00 cmp r2, #0 + 80060ae: d04b beq.n 8006148 <__ieee754_sqrtf+0xac> + 80060b0: 2800 cmp r0, #0 + 80060b2: 4603 mov r3, r0 + 80060b4: db54 blt.n 8006160 <__ieee754_sqrtf+0xc4> + 80060b6: f010 42ff ands.w r2, r0, #2139095040 @ 0x7f800000 + 80060ba: d14f bne.n 800615c <__ieee754_sqrtf+0xc0> + 80060bc: 005b lsls r3, r3, #1 + 80060be: 0218 lsls r0, r3, #8 + 80060c0: 4611 mov r1, r2 + 80060c2: f102 0201 add.w r2, r2, #1 + 80060c6: d5f9 bpl.n 80060bc <__ieee754_sqrtf+0x20> + 80060c8: 4249 negs r1, r1 + 80060ca: 2400 movs r4, #0 + 80060cc: f3c3 0216 ubfx r2, r3, #0, #23 + 80060d0: f1a1 057f sub.w r5, r1, #127 @ 0x7f + 80060d4: 07cb lsls r3, r1, #31 + 80060d6: f04f 0e19 mov.w lr, #25 + 80060da: f04f 7c80 mov.w ip, #16777216 @ 0x1000000 + 80060de: 4621 mov r1, r4 + 80060e0: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 + 80060e4: bf58 it pl + 80060e6: 0052 lslpl r2, r2, #1 + 80060e8: 106d asrs r5, r5, #1 + 80060ea: 0052 lsls r2, r2, #1 + 80060ec: eb01 030c add.w r3, r1, ip + 80060f0: 4293 cmp r3, r2 + 80060f2: bfcf iteee gt + 80060f4: 4613 movgt r3, r2 + 80060f6: eb03 010c addle.w r1, r3, ip + 80060fa: 4464 addle r4, ip + 80060fc: 1ad3 suble r3, r2, r3 + 80060fe: f1be 0e01 subs.w lr, lr, #1 + 8006102: ea4f 0243 mov.w r2, r3, lsl #1 + 8006106: ea4f 0c5c mov.w ip, ip, lsr #1 + 800610a: d1ef bne.n 80060ec <__ieee754_sqrtf+0x50> + 800610c: b1bb cbz r3, 800613e <__ieee754_sqrtf+0xa2> + 800610e: 4e1a ldr r6, [pc, #104] @ (8006178 <__ieee754_sqrtf+0xdc>) + 8006110: 4f1a ldr r7, [pc, #104] @ (800617c <__ieee754_sqrtf+0xe0>) + 8006112: 6830 ldr r0, [r6, #0] + 8006114: 6839 ldr r1, [r7, #0] + 8006116: f7fa f825 bl 8000164 <__aeabi_fsub> + 800611a: f8d6 8000 ldr.w r8, [r6] + 800611e: 4601 mov r1, r0 + 8006120: 4640 mov r0, r8 + 8006122: f7fa fad1 bl 80006c8 <__aeabi_fcmple> + 8006126: b150 cbz r0, 800613e <__ieee754_sqrtf+0xa2> + 8006128: 6830 ldr r0, [r6, #0] + 800612a: 6839 ldr r1, [r7, #0] + 800612c: f7fa f81c bl 8000168 <__addsf3> + 8006130: 6836 ldr r6, [r6, #0] + 8006132: 4601 mov r1, r0 + 8006134: 4630 mov r0, r6 + 8006136: f7fa fabd bl 80006b4 <__aeabi_fcmplt> + 800613a: b1c8 cbz r0, 8006170 <__ieee754_sqrtf+0xd4> + 800613c: 3402 adds r4, #2 + 800613e: 1060 asrs r0, r4, #1 + 8006140: f100 507c add.w r0, r0, #1056964608 @ 0x3f000000 + 8006144: eb00 50c5 add.w r0, r0, r5, lsl #23 + 8006148: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 800614c: 4601 mov r1, r0 + 800614e: f7fa f913 bl 8000378 <__aeabi_fmul> + 8006152: 4621 mov r1, r4 + 8006154: f7fa f808 bl 8000168 <__addsf3> + 8006158: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 800615c: 15c1 asrs r1, r0, #23 + 800615e: e7b4 b.n 80060ca <__ieee754_sqrtf+0x2e> + 8006160: 4601 mov r1, r0 + 8006162: f7f9 ffff bl 8000164 <__aeabi_fsub> + 8006166: 4601 mov r1, r0 + 8006168: f7fa f9ba bl 80004e0 <__aeabi_fdiv> + 800616c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006170: 3401 adds r4, #1 + 8006172: f024 0401 bic.w r4, r4, #1 + 8006176: e7e2 b.n 800613e <__ieee754_sqrtf+0xa2> + 8006178: 080062d0 .word 0x080062d0 + 800617c: 080062cc .word 0x080062cc -0800600c <_init>: - 800600c: b5f8 push {r3, r4, r5, r6, r7, lr} - 800600e: bf00 nop - 8006010: bcf8 pop {r3, r4, r5, r6, r7} - 8006012: bc08 pop {r3} - 8006014: 469e mov lr, r3 - 8006016: 4770 bx lr +08006180 <_init>: + 8006180: b5f8 push {r3, r4, r5, r6, r7, lr} + 8006182: bf00 nop + 8006184: bcf8 pop {r3, r4, r5, r6, r7} + 8006186: bc08 pop {r3} + 8006188: 469e mov lr, r3 + 800618a: 4770 bx lr -08006018 <_fini>: - 8006018: b5f8 push {r3, r4, r5, r6, r7, lr} - 800601a: bf00 nop - 800601c: bcf8 pop {r3, r4, r5, r6, r7} - 800601e: bc08 pop {r3} - 8006020: 469e mov lr, r3 - 8006022: 4770 bx lr +0800618c <_fini>: + 800618c: b5f8 push {r3, r4, r5, r6, r7, lr} + 800618e: bf00 nop + 8006190: bcf8 pop {r3, r4, r5, r6, r7} + 8006192: bc08 pop {r3} + 8006194: 469e mov lr, r3 + 8006196: 4770 bx lr diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.map b/Fertirrega_v6/Debug/Fertirrega_v6.map index bbdb321..f1b9b7c 100644 --- a/Fertirrega_v6/Debug/Fertirrega_v6.map +++ b/Fertirrega_v6/Debug/Fertirrega_v6.map @@ -145,10 +145,6 @@ Discarded input sections .text 0x00000000 0x0 ./Core/Src/ad5934_driver.o .data 0x00000000 0x0 ./Core/Src/ad5934_driver.o .bss 0x00000000 0x0 ./Core/Src/ad5934_driver.o - .text.AD5934_Calculate_Temperature - 0x00000000 0xcc ./Core/Src/ad5934_driver.o - .text.AD5934_EC_Compensate_Magnitude_To_25C - 0x00000000 0x5c ./Core/Src/ad5934_driver.o .rodata 0x00000000 0x60 ./Core/Src/ad5934_driver.o .text.AD5934_EC_Calibrate_Temperature 0x00000000 0x144 ./Core/Src/ad5934_driver.o @@ -956,26 +952,6 @@ Discarded input sections 0x00000000 0x1e ./Core/Src/main.o .rodata.AD5934_Scale_Out_Max 0x00000000 0x1e ./Core/Src/main.o - .data.doubleSpace - 0x00000000 0x3 ./Core/Src/main.o - .data.newline_ph - 0x00000000 0x5 ./Core/Src/main.o - .data.newline_admi - 0x00000000 0x5 ./Core/Src/main.o - .data.newline_temp - 0x00000000 0x5 ./Core/Src/main.o - .data.newline_imag - 0x00000000 0x6 ./Core/Src/main.o - .data.newline_485 - 0x00000000 0x5 ./Core/Src/main.o - .data.minus 0x00000000 0x2 ./Core/Src/main.o - .data.ad_t 0x00000000 0x5 ./Core/Src/main.o - .data.ph_t 0x00000000 0x5 ./Core/Src/main.o - .data.tm_t 0x00000000 0x5 ./Core/Src/main.o - .bss.main_state - 0x00000000 0x1 ./Core/Src/main.o - .bss.rs485_address - 0x00000000 0x1 ./Core/Src/main.o .text.FloatToString 0x00000000 0x228 ./Core/Src/main.o .debug_macro 0x00000000 0xacc ./Core/Src/main.o @@ -4415,7 +4391,7 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte 0x08000000 g_pfnVectors 0x0800010c . = ALIGN (0x4) -.text 0x0800010c 0x5f18 +.text 0x0800010c 0x608c 0x0800010c . = ALIGN (0x4) *(.text) .text 0x0800010c 0x40 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o @@ -4481,545 +4457,551 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .text.AD5934_StopSweep 0x080008ea 0x12 ./Core/Src/ad5934_driver.o 0x080008ea AD5934_StopSweep + .text.AD5934_Calculate_Temperature + 0x080008fc 0xb0 ./Core/Src/ad5934_driver.o + 0x080008fc AD5934_Calculate_Temperature + .text.AD5934_EC_Compensate_Magnitude_To_25C + 0x080009ac 0x5c ./Core/Src/ad5934_driver.o + 0x080009ac AD5934_EC_Compensate_Magnitude_To_25C .text.AD5934_GetMagnitude - 0x080008fc 0x80 ./Core/Src/ad5934_driver.o - 0x080008fc AD5934_GetMagnitude + 0x08000a08 0x80 ./Core/Src/ad5934_driver.o + 0x08000a08 AD5934_GetMagnitude .text.AD5934_Compress_To_IntScale - 0x0800097c 0x11c ./Core/Src/ad5934_driver.o - 0x0800097c AD5934_Compress_To_IntScale + 0x08000a88 0x11c ./Core/Src/ad5934_driver.o + 0x08000a88 AD5934_Compress_To_IntScale .text.AD5934_Process_System - 0x08000a98 0x214 ./Core/Src/ad5934_driver.o - 0x08000a98 AD5934_Process_System + 0x08000ba4 0x250 ./Core/Src/ad5934_driver.o + 0x08000ba4 AD5934_Process_System .text.AD5934_Sort_Array - 0x08000cac 0x98 ./Core/Src/ad5934_driver.o - 0x08000cac AD5934_Sort_Array + 0x08000df4 0x98 ./Core/Src/ad5934_driver.o + 0x08000df4 AD5934_Sort_Array .text.AD5934_Trimmed_Mean - 0x08000d44 0x8c ./Core/Src/ad5934_driver.o - 0x08000d44 AD5934_Trimmed_Mean + 0x08000e8c 0x8c ./Core/Src/ad5934_driver.o + 0x08000e8c AD5934_Trimmed_Mean .text.AD5934_History_Average - 0x08000dd0 0x58 ./Core/Src/ad5934_driver.o - 0x08000dd0 AD5934_History_Average + 0x08000f18 0x58 ./Core/Src/ad5934_driver.o + 0x08000f18 AD5934_History_Average .text.AD5934_Process_Sample - 0x08000e28 0x138 ./Core/Src/ad5934_driver.o - 0x08000e28 AD5934_Process_Sample + 0x08000f70 0x138 ./Core/Src/ad5934_driver.o + 0x08000f70 AD5934_Process_Sample .text.AD5934_RTD_NewSample - 0x08000f60 0x1c ./Core/Src/ad5934_driver.o - 0x08000f60 AD5934_RTD_NewSample + 0x080010a8 0x1c ./Core/Src/ad5934_driver.o + 0x080010a8 AD5934_RTD_NewSample .text.AD5934_EC_NewSample - 0x08000f7c 0x1c ./Core/Src/ad5934_driver.o - 0x08000f7c AD5934_EC_NewSample + 0x080010c4 0x1c ./Core/Src/ad5934_driver.o + 0x080010c4 AD5934_EC_NewSample .text.AD5934_Reference_NewSample - 0x08000f98 0x1c ./Core/Src/ad5934_driver.o - 0x08000f98 AD5934_Reference_NewSample + 0x080010e0 0x1c ./Core/Src/ad5934_driver.o + 0x080010e0 AD5934_Reference_NewSample .text.ADG715_SetRegisterValue - 0x08000fb4 0x30 ./Core/Src/ad5934_driver.o - 0x08000fb4 ADG715_SetRegisterValue + 0x080010fc 0x30 ./Core/Src/ad5934_driver.o + 0x080010fc ADG715_SetRegisterValue .text.ADG715_ResetChannels - 0x08000fe4 0xe ./Core/Src/ad5934_driver.o - 0x08000fe4 ADG715_ResetChannels - *fill* 0x08000ff2 0x2 + 0x0800112c 0xe ./Core/Src/ad5934_driver.o + 0x0800112c ADG715_ResetChannels + *fill* 0x0800113a 0x2 .text.ADG715_SetChannels - 0x08000ff4 0x2c ./Core/Src/ad5934_driver.o - 0x08000ff4 ADG715_SetChannels + 0x0800113c 0x2c ./Core/Src/ad5934_driver.o + 0x0800113c ADG715_SetChannels .text.MX_ADC1_Init - 0x08001020 0x7c ./Core/Src/adc.o - 0x08001020 MX_ADC1_Init + 0x08001168 0x7c ./Core/Src/adc.o + 0x08001168 MX_ADC1_Init .text.MX_ADC2_Init - 0x0800109c 0x7c ./Core/Src/adc.o - 0x0800109c MX_ADC2_Init + 0x080011e4 0x7c ./Core/Src/adc.o + 0x080011e4 MX_ADC2_Init .text.HAL_ADC_MspInit - 0x08001118 0xcc ./Core/Src/adc.o - 0x08001118 HAL_ADC_MspInit + 0x08001260 0xcc ./Core/Src/adc.o + 0x08001260 HAL_ADC_MspInit .text.writeRegister - 0x080011e4 0x42 ./Core/Src/ads1015_driver.o + 0x0800132c 0x42 ./Core/Src/ads1015_driver.o .text.readRegister - 0x08001226 0x54 ./Core/Src/ads1015_driver.o - *fill* 0x0800127a 0x2 + 0x0800136e 0x54 ./Core/Src/ads1015_driver.o + *fill* 0x080013c2 0x2 .text.ADS1015_Init - 0x0800127c 0x34 ./Core/Src/ads1015_driver.o - 0x0800127c ADS1015_Init + 0x080013c4 0x34 ./Core/Src/ads1015_driver.o + 0x080013c4 ADS1015_Init .text.ADS1015_Compress_To_IntScale - 0x080012b0 0x88 ./Core/Src/ads1015_driver.o - 0x080012b0 ADS1015_Compress_To_IntScale + 0x080013f8 0x88 ./Core/Src/ads1015_driver.o + 0x080013f8 ADS1015_Compress_To_IntScale .text.ADS1015_Process_System - 0x08001338 0x114 ./Core/Src/ads1015_driver.o - 0x08001338 ADS1015_Process_System + 0x08001480 0x114 ./Core/Src/ads1015_driver.o + 0x08001480 ADS1015_Process_System .text.ADS1015_Sort_Array - 0x0800144c 0x98 ./Core/Src/ads1015_driver.o - 0x0800144c ADS1015_Sort_Array + 0x08001594 0x98 ./Core/Src/ads1015_driver.o + 0x08001594 ADS1015_Sort_Array .text.ADS1015_Trimmed_Mean - 0x080014e4 0x8c ./Core/Src/ads1015_driver.o - 0x080014e4 ADS1015_Trimmed_Mean + 0x0800162c 0x8c ./Core/Src/ads1015_driver.o + 0x0800162c ADS1015_Trimmed_Mean .text.ADS1015_History_Average - 0x08001570 0x58 ./Core/Src/ads1015_driver.o - 0x08001570 ADS1015_History_Average + 0x080016b8 0x58 ./Core/Src/ads1015_driver.o + 0x080016b8 ADS1015_History_Average .text.ADS1015_Process_Sample - 0x080015c8 0x138 ./Core/Src/ads1015_driver.o - 0x080015c8 ADS1015_Process_Sample + 0x08001710 0x138 ./Core/Src/ads1015_driver.o + 0x08001710 ADS1015_Process_Sample .text.ADS1015_pH_NewSample - 0x08001700 0x1c ./Core/Src/ads1015_driver.o - 0x08001700 ADS1015_pH_NewSample + 0x08001848 0x1c ./Core/Src/ads1015_driver.o + 0x08001848 ADS1015_pH_NewSample .text.digital_outputs_init - 0x0800171c 0x84 ./Core/Src/digital_outputs_driver.o - 0x0800171c digital_outputs_init + 0x08001864 0x84 ./Core/Src/digital_outputs_driver.o + 0x08001864 digital_outputs_init .text.MX_GPIO_Init - 0x080017a0 0x140 ./Core/Src/gpio.o - 0x080017a0 MX_GPIO_Init + 0x080018e8 0x140 ./Core/Src/gpio.o + 0x080018e8 MX_GPIO_Init .text.MX_I2C1_Init - 0x080018e0 0x5c ./Core/Src/i2c.o - 0x080018e0 MX_I2C1_Init + 0x08001a28 0x5c ./Core/Src/i2c.o + 0x08001a28 MX_I2C1_Init .text.MX_I2C2_Init - 0x0800193c 0x5c ./Core/Src/i2c.o - 0x0800193c MX_I2C2_Init + 0x08001a84 0x5c ./Core/Src/i2c.o + 0x08001a84 MX_I2C2_Init .text.HAL_I2C_MspInit - 0x08001998 0xd8 ./Core/Src/i2c.o - 0x08001998 HAL_I2C_MspInit - .text.main 0x08001a70 0x294 ./Core/Src/main.o - 0x08001a70 main + 0x08001ae0 0xd8 ./Core/Src/i2c.o + 0x08001ae0 HAL_I2C_MspInit + .text.main 0x08001bb8 0x2c0 ./Core/Src/main.o + 0x08001bb8 main .text.SystemClock_Config - 0x08001d04 0xa0 ./Core/Src/main.o - 0x08001d04 SystemClock_Config + 0x08001e78 0xa0 ./Core/Src/main.o + 0x08001e78 SystemClock_Config .text.intToStr - 0x08001da4 0x198 ./Core/Src/main.o - 0x08001da4 intToStr + 0x08001f18 0x198 ./Core/Src/main.o + 0x08001f18 intToStr .text.HAL_TIM_PeriodElapsedCallback - 0x08001f3c 0x30 ./Core/Src/main.o - 0x08001f3c HAL_TIM_PeriodElapsedCallback + 0x080020b0 0x30 ./Core/Src/main.o + 0x080020b0 HAL_TIM_PeriodElapsedCallback .text.Error_Handler - 0x08001f6c 0xc ./Core/Src/main.o - 0x08001f6c Error_Handler + 0x080020e0 0xc ./Core/Src/main.o + 0x080020e0 Error_Handler .text.LL_GPIO_ReadInputPort - 0x08001f78 0x16 ./Core/Src/rs485_driver.o - *fill* 0x08001f8e 0x2 + 0x080020ec 0x16 ./Core/Src/rs485_driver.o + *fill* 0x08002102 0x2 .text.rs485_init - 0x08001f90 0x20 ./Core/Src/rs485_driver.o - 0x08001f90 rs485_init + 0x08002104 0x20 ./Core/Src/rs485_driver.o + 0x08002104 rs485_init .text.rs485_get_address - 0x08001fb0 0x38 ./Core/Src/rs485_driver.o - 0x08001fb0 rs485_get_address + 0x08002124 0x38 ./Core/Src/rs485_driver.o + 0x08002124 rs485_get_address .text.rs485_send_broadcast - 0x08001fe8 0x48 ./Core/Src/rs485_driver.o - 0x08001fe8 rs485_send_broadcast + 0x0800215c 0x48 ./Core/Src/rs485_driver.o + 0x0800215c rs485_send_broadcast .text.rs485_enable_tx - 0x08002030 0x18 ./Core/Src/rs485_driver.o - 0x08002030 rs485_enable_tx + 0x080021a4 0x18 ./Core/Src/rs485_driver.o + 0x080021a4 rs485_enable_tx .text.rs485_disable_tx - 0x08002048 0x18 ./Core/Src/rs485_driver.o - 0x08002048 rs485_disable_tx + 0x080021bc 0x18 ./Core/Src/rs485_driver.o + 0x080021bc rs485_disable_tx .text.rs485_configure_gpio_address - 0x08002060 0x8c ./Core/Src/rs485_driver.o + 0x080021d4 0x8c ./Core/Src/rs485_driver.o .text.rs485_configure_usart1 - 0x080020ec 0x74 ./Core/Src/rs485_driver.o + 0x08002260 0x74 ./Core/Src/rs485_driver.o .text.HAL_MspInit - 0x08002160 0x64 ./Core/Src/stm32f1xx_hal_msp.o - 0x08002160 HAL_MspInit + 0x080022d4 0x64 ./Core/Src/stm32f1xx_hal_msp.o + 0x080022d4 HAL_MspInit .text.NMI_Handler - 0x080021c4 0x8 ./Core/Src/stm32f1xx_it.o - 0x080021c4 NMI_Handler + 0x08002338 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002338 NMI_Handler .text.HardFault_Handler - 0x080021cc 0x8 ./Core/Src/stm32f1xx_it.o - 0x080021cc HardFault_Handler + 0x08002340 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002340 HardFault_Handler .text.MemManage_Handler - 0x080021d4 0x8 ./Core/Src/stm32f1xx_it.o - 0x080021d4 MemManage_Handler + 0x08002348 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002348 MemManage_Handler .text.BusFault_Handler - 0x080021dc 0x8 ./Core/Src/stm32f1xx_it.o - 0x080021dc BusFault_Handler + 0x08002350 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002350 BusFault_Handler .text.UsageFault_Handler - 0x080021e4 0x8 ./Core/Src/stm32f1xx_it.o - 0x080021e4 UsageFault_Handler + 0x08002358 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002358 UsageFault_Handler .text.SVC_Handler - 0x080021ec 0xc ./Core/Src/stm32f1xx_it.o - 0x080021ec SVC_Handler + 0x08002360 0xc ./Core/Src/stm32f1xx_it.o + 0x08002360 SVC_Handler .text.DebugMon_Handler - 0x080021f8 0xc ./Core/Src/stm32f1xx_it.o - 0x080021f8 DebugMon_Handler + 0x0800236c 0xc ./Core/Src/stm32f1xx_it.o + 0x0800236c DebugMon_Handler .text.PendSV_Handler - 0x08002204 0xc ./Core/Src/stm32f1xx_it.o - 0x08002204 PendSV_Handler + 0x08002378 0xc ./Core/Src/stm32f1xx_it.o + 0x08002378 PendSV_Handler .text.SysTick_Handler - 0x08002210 0xc ./Core/Src/stm32f1xx_it.o - 0x08002210 SysTick_Handler + 0x08002384 0xc ./Core/Src/stm32f1xx_it.o + 0x08002384 SysTick_Handler .text.TIM3_IRQHandler - 0x0800221c 0x14 ./Core/Src/stm32f1xx_it.o - 0x0800221c TIM3_IRQHandler + 0x08002390 0x14 ./Core/Src/stm32f1xx_it.o + 0x08002390 TIM3_IRQHandler .text.USART1_IRQHandler - 0x08002230 0x14 ./Core/Src/stm32f1xx_it.o - 0x08002230 USART1_IRQHandler + 0x080023a4 0x14 ./Core/Src/stm32f1xx_it.o + 0x080023a4 USART1_IRQHandler .text.SystemInit - 0x08002244 0xc ./Core/Src/system_stm32f1xx.o - 0x08002244 SystemInit + 0x080023b8 0xc ./Core/Src/system_stm32f1xx.o + 0x080023b8 SystemInit .text.MX_TIM3_Init - 0x08002250 0x9c ./Core/Src/tim.o - 0x08002250 MX_TIM3_Init + 0x080023c4 0x9c ./Core/Src/tim.o + 0x080023c4 MX_TIM3_Init .text.HAL_TIM_Base_MspInit - 0x080022ec 0x4c ./Core/Src/tim.o - 0x080022ec HAL_TIM_Base_MspInit + 0x08002460 0x4c ./Core/Src/tim.o + 0x08002460 HAL_TIM_Base_MspInit .text.MX_USART1_UART_Init - 0x08002338 0x54 ./Core/Src/usart.o - 0x08002338 MX_USART1_UART_Init + 0x080024ac 0x54 ./Core/Src/usart.o + 0x080024ac MX_USART1_UART_Init .text.HAL_UART_MspInit - 0x0800238c 0xa8 ./Core/Src/usart.o - 0x0800238c HAL_UART_MspInit + 0x08002500 0xa8 ./Core/Src/usart.o + 0x08002500 HAL_UART_MspInit .text.Reset_Handler - 0x08002434 0x48 ./Core/Startup/startup_stm32f103c8tx.o - 0x08002434 Reset_Handler + 0x080025a8 0x48 ./Core/Startup/startup_stm32f103c8tx.o + 0x080025a8 Reset_Handler .text.Default_Handler - 0x0800247c 0x2 ./Core/Startup/startup_stm32f103c8tx.o - 0x0800247c RTC_Alarm_IRQHandler - 0x0800247c EXTI2_IRQHandler - 0x0800247c TIM1_CC_IRQHandler - 0x0800247c PVD_IRQHandler - 0x0800247c EXTI3_IRQHandler - 0x0800247c EXTI0_IRQHandler - 0x0800247c I2C2_EV_IRQHandler - 0x0800247c ADC1_2_IRQHandler - 0x0800247c SPI1_IRQHandler - 0x0800247c TAMPER_IRQHandler - 0x0800247c DMA1_Channel4_IRQHandler - 0x0800247c USART3_IRQHandler - 0x0800247c RTC_IRQHandler - 0x0800247c DMA1_Channel7_IRQHandler - 0x0800247c CAN1_RX1_IRQHandler - 0x0800247c TIM4_IRQHandler - 0x0800247c I2C1_EV_IRQHandler - 0x0800247c DMA1_Channel6_IRQHandler - 0x0800247c RCC_IRQHandler - 0x0800247c TIM1_TRG_COM_IRQHandler - 0x0800247c DMA1_Channel1_IRQHandler - 0x0800247c Default_Handler - 0x0800247c EXTI15_10_IRQHandler - 0x0800247c EXTI9_5_IRQHandler - 0x0800247c SPI2_IRQHandler - 0x0800247c DMA1_Channel5_IRQHandler - 0x0800247c EXTI4_IRQHandler - 0x0800247c USB_LP_CAN1_RX0_IRQHandler - 0x0800247c USB_HP_CAN1_TX_IRQHandler - 0x0800247c DMA1_Channel3_IRQHandler - 0x0800247c TIM1_UP_IRQHandler - 0x0800247c WWDG_IRQHandler - 0x0800247c TIM2_IRQHandler - 0x0800247c TIM1_BRK_IRQHandler - 0x0800247c EXTI1_IRQHandler - 0x0800247c USART2_IRQHandler - 0x0800247c I2C2_ER_IRQHandler - 0x0800247c DMA1_Channel2_IRQHandler - 0x0800247c CAN1_SCE_IRQHandler - 0x0800247c FLASH_IRQHandler - 0x0800247c I2C1_ER_IRQHandler - 0x0800247c USBWakeUp_IRQHandler - *fill* 0x0800247e 0x2 + 0x080025f0 0x2 ./Core/Startup/startup_stm32f103c8tx.o + 0x080025f0 RTC_Alarm_IRQHandler + 0x080025f0 EXTI2_IRQHandler + 0x080025f0 TIM1_CC_IRQHandler + 0x080025f0 PVD_IRQHandler + 0x080025f0 EXTI3_IRQHandler + 0x080025f0 EXTI0_IRQHandler + 0x080025f0 I2C2_EV_IRQHandler + 0x080025f0 ADC1_2_IRQHandler + 0x080025f0 SPI1_IRQHandler + 0x080025f0 TAMPER_IRQHandler + 0x080025f0 DMA1_Channel4_IRQHandler + 0x080025f0 USART3_IRQHandler + 0x080025f0 RTC_IRQHandler + 0x080025f0 DMA1_Channel7_IRQHandler + 0x080025f0 CAN1_RX1_IRQHandler + 0x080025f0 TIM4_IRQHandler + 0x080025f0 I2C1_EV_IRQHandler + 0x080025f0 DMA1_Channel6_IRQHandler + 0x080025f0 RCC_IRQHandler + 0x080025f0 TIM1_TRG_COM_IRQHandler + 0x080025f0 DMA1_Channel1_IRQHandler + 0x080025f0 Default_Handler + 0x080025f0 EXTI15_10_IRQHandler + 0x080025f0 EXTI9_5_IRQHandler + 0x080025f0 SPI2_IRQHandler + 0x080025f0 DMA1_Channel5_IRQHandler + 0x080025f0 EXTI4_IRQHandler + 0x080025f0 USB_LP_CAN1_RX0_IRQHandler + 0x080025f0 USB_HP_CAN1_TX_IRQHandler + 0x080025f0 DMA1_Channel3_IRQHandler + 0x080025f0 TIM1_UP_IRQHandler + 0x080025f0 WWDG_IRQHandler + 0x080025f0 TIM2_IRQHandler + 0x080025f0 TIM1_BRK_IRQHandler + 0x080025f0 EXTI1_IRQHandler + 0x080025f0 USART2_IRQHandler + 0x080025f0 I2C2_ER_IRQHandler + 0x080025f0 DMA1_Channel2_IRQHandler + 0x080025f0 CAN1_SCE_IRQHandler + 0x080025f0 FLASH_IRQHandler + 0x080025f0 I2C1_ER_IRQHandler + 0x080025f0 USBWakeUp_IRQHandler + *fill* 0x080025f2 0x2 .text.HAL_Init - 0x08002480 0x2c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08002480 HAL_Init + 0x080025f4 0x2c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x080025f4 HAL_Init .text.HAL_InitTick - 0x080024ac 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x080024ac HAL_InitTick + 0x08002620 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002620 HAL_InitTick .text.HAL_IncTick - 0x0800250c 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x0800250c HAL_IncTick + 0x08002680 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08002680 HAL_IncTick .text.HAL_GetTick - 0x08002530 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08002530 HAL_GetTick + 0x080026a4 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x080026a4 HAL_GetTick .text.HAL_ADC_Init - 0x08002544 0x1b0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x08002544 HAL_ADC_Init + 0x080026b8 0x1b0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x080026b8 HAL_ADC_Init .text.HAL_ADC_ConfigChannel - 0x080026f4 0x1f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x080026f4 HAL_ADC_ConfigChannel + 0x08002868 0x1f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x08002868 HAL_ADC_ConfigChannel .text.ADC_ConversionStop_Disable - 0x080028e4 0x82 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x080028e4 ADC_ConversionStop_Disable - *fill* 0x08002966 0x2 + 0x08002a58 0x82 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x08002a58 ADC_ConversionStop_Disable + *fill* 0x08002ada 0x2 .text.__NVIC_SetPriorityGrouping - 0x08002968 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08002adc 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_GetPriorityGrouping - 0x080029b0 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08002b24 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_EnableIRQ - 0x080029cc 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08002b40 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_SetPriority - 0x08002a04 0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08002b78 0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.NVIC_EncodePriority - 0x08002a58 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08002bcc 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.SysTick_Config - 0x08002abc 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08002c30 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.HAL_NVIC_SetPriorityGrouping - 0x08002b00 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08002b00 HAL_NVIC_SetPriorityGrouping + 0x08002c74 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08002c74 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x08002b16 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08002b16 HAL_NVIC_SetPriority + 0x08002c8a 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08002c8a HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08002b4e 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08002b4e HAL_NVIC_EnableIRQ + 0x08002cc2 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08002cc2 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08002b6a 0x18 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08002b6a HAL_SYSTICK_Config + 0x08002cde 0x18 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08002cde HAL_SYSTICK_Config .text.HAL_DMA_Abort - 0x08002b82 0x76 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x08002b82 HAL_DMA_Abort + 0x08002cf6 0x76 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x08002cf6 HAL_DMA_Abort .text.HAL_DMA_Abort_IT - 0x08002bf8 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x08002bf8 HAL_DMA_Abort_IT + 0x08002d6c 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x08002d6c HAL_DMA_Abort_IT .text.HAL_GPIO_Init - 0x08002ce8 0x308 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08002ce8 HAL_GPIO_Init + 0x08002e5c 0x308 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08002e5c HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x08002ff0 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08002ff0 HAL_GPIO_ReadPin + 0x08003164 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003164 HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x0800301e 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x0800301e HAL_GPIO_WritePin + 0x08003192 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003192 HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x0800304e 0x32 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x0800304e HAL_GPIO_TogglePin + 0x080031c2 0x32 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x080031c2 HAL_GPIO_TogglePin .text.HAL_I2C_Init - 0x08003080 0x288 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x08003080 HAL_I2C_Init + 0x080031f4 0x288 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x080031f4 HAL_I2C_Init .text.HAL_I2C_Master_Transmit - 0x08003308 0x1fc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x08003308 HAL_I2C_Master_Transmit + 0x0800347c 0x1fc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x0800347c HAL_I2C_Master_Transmit .text.HAL_I2C_Master_Receive - 0x08003504 0x4d8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x08003504 HAL_I2C_Master_Receive + 0x08003678 0x4d8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08003678 HAL_I2C_Master_Receive .text.I2C_MasterRequestWrite - 0x080039dc 0x104 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08003b50 0x104 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_MasterRequestRead - 0x08003ae0 0x19c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08003c54 0x19c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnFlagUntilTimeout - 0x08003c7c 0xf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08003df0 0xf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnMasterAddressFlagUntilTimeout - 0x08003d70 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08003ee4 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnTXEFlagUntilTimeout - 0x08003eb0 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004024 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnBTFFlagUntilTimeout - 0x08003f40 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x080040b4 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnRXNEFlagUntilTimeout - 0x08003fd0 0xba ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004144 0xba ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_IsAcknowledgeFailed - 0x0800408a 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - *fill* 0x080040e6 0x2 + 0x080041fe 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + *fill* 0x0800425a 0x2 .text.HAL_RCC_OscConfig - 0x080040e8 0x504 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x080040e8 HAL_RCC_OscConfig + 0x0800425c 0x504 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x0800425c HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x080045ec 0x1d4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x080045ec HAL_RCC_ClockConfig + 0x08004760 0x1d4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08004760 HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x080047c0 0xac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x080047c0 HAL_RCC_GetSysClockFreq + 0x08004934 0xac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08004934 HAL_RCC_GetSysClockFreq .text.HAL_RCC_GetHCLKFreq - 0x0800486c 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x0800486c HAL_RCC_GetHCLKFreq + 0x080049e0 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x080049e0 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x08004880 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004880 HAL_RCC_GetPCLK1Freq + 0x080049f4 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x080049f4 HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x080048a8 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x080048a8 HAL_RCC_GetPCLK2Freq + 0x08004a1c 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08004a1c HAL_RCC_GetPCLK2Freq .text.RCC_Delay - 0x080048d0 0x3c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08004a44 0x3c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .text.HAL_RCCEx_PeriphCLKConfig - 0x0800490c 0x16c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - 0x0800490c HAL_RCCEx_PeriphCLKConfig + 0x08004a80 0x16c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + 0x08004a80 HAL_RCCEx_PeriphCLKConfig .text.HAL_TIM_Base_Init - 0x08004a78 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004a78 HAL_TIM_Base_Init - *fill* 0x08004b16 0x2 + 0x08004bec 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08004bec HAL_TIM_Base_Init + *fill* 0x08004c8a 0x2 .text.HAL_TIM_Base_Start_IT - 0x08004b18 0xa4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004b18 HAL_TIM_Base_Start_IT + 0x08004c8c 0xa4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08004c8c HAL_TIM_Base_Start_IT .text.HAL_TIM_IRQHandler - 0x08004bbc 0x1e0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004bbc HAL_TIM_IRQHandler + 0x08004d30 0x1e0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08004d30 HAL_TIM_IRQHandler .text.HAL_TIM_ConfigClockSource - 0x08004d9c 0x18e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004d9c HAL_TIM_ConfigClockSource + 0x08004f10 0x18e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08004f10 HAL_TIM_ConfigClockSource .text.HAL_TIM_OC_DelayElapsedCallback - 0x08004f2a 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004f2a HAL_TIM_OC_DelayElapsedCallback + 0x0800509e 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x0800509e HAL_TIM_OC_DelayElapsedCallback .text.HAL_TIM_IC_CaptureCallback - 0x08004f3c 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004f3c HAL_TIM_IC_CaptureCallback + 0x080050b0 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x080050b0 HAL_TIM_IC_CaptureCallback .text.HAL_TIM_PWM_PulseFinishedCallback - 0x08004f4e 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004f4e HAL_TIM_PWM_PulseFinishedCallback + 0x080050c2 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x080050c2 HAL_TIM_PWM_PulseFinishedCallback .text.HAL_TIM_TriggerCallback - 0x08004f60 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004f60 HAL_TIM_TriggerCallback - *fill* 0x08004f72 0x2 + 0x080050d4 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x080050d4 HAL_TIM_TriggerCallback + *fill* 0x080050e6 0x2 .text.TIM_Base_SetConfig - 0x08004f74 0xdc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004f74 TIM_Base_SetConfig + 0x080050e8 0xdc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x080050e8 TIM_Base_SetConfig .text.TIM_TI1_ConfigInputStage - 0x08005050 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x080051c4 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .text.TIM_TI2_ConfigInputStage - 0x080050ac 0x5e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005220 0x5e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .text.TIM_ITRx_SetConfig - 0x0800510a 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x0800527e 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .text.TIM_ETR_SetConfig - 0x0800513e 0x3e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x0800513e TIM_ETR_SetConfig + 0x080052b2 0x3e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x080052b2 TIM_ETR_SetConfig .text.HAL_TIMEx_MasterConfigSynchronization - 0x0800517c 0xbc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - 0x0800517c HAL_TIMEx_MasterConfigSynchronization + 0x080052f0 0xbc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x080052f0 HAL_TIMEx_MasterConfigSynchronization .text.HAL_TIMEx_CommutCallback - 0x08005238 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - 0x08005238 HAL_TIMEx_CommutCallback + 0x080053ac 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x080053ac HAL_TIMEx_CommutCallback .text.HAL_TIMEx_BreakCallback - 0x0800524a 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - 0x0800524a HAL_TIMEx_BreakCallback + 0x080053be 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x080053be HAL_TIMEx_BreakCallback .text.HAL_UART_Init - 0x0800525c 0xa0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x0800525c HAL_UART_Init + 0x080053d0 0xa0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x080053d0 HAL_UART_Init .text.HAL_UART_Transmit - 0x080052fc 0x116 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x080052fc HAL_UART_Transmit - *fill* 0x08005412 0x2 + 0x08005470 0x116 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005470 HAL_UART_Transmit + *fill* 0x08005586 0x2 .text.HAL_UART_IRQHandler - 0x08005414 0x524 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x08005414 HAL_UART_IRQHandler + 0x08005588 0x524 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005588 HAL_UART_IRQHandler .text.HAL_UART_TxCpltCallback - 0x08005938 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x08005938 HAL_UART_TxCpltCallback + 0x08005aac 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005aac HAL_UART_TxCpltCallback .text.HAL_UART_RxCpltCallback - 0x0800594a 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x0800594a HAL_UART_RxCpltCallback + 0x08005abe 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005abe HAL_UART_RxCpltCallback .text.HAL_UART_ErrorCallback - 0x0800595c 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x0800595c HAL_UART_ErrorCallback + 0x08005ad0 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005ad0 HAL_UART_ErrorCallback .text.HAL_UARTEx_RxEventCallback - 0x0800596e 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - 0x0800596e HAL_UARTEx_RxEventCallback + 0x08005ae2 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005ae2 HAL_UARTEx_RxEventCallback .text.UART_WaitOnFlagUntilTimeout - 0x08005984 0xb2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005af8 0xb2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text.UART_EndRxTransfer - 0x08005a36 0xc4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005baa 0xc4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text.UART_DMAAbortOnError - 0x08005afa 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005c6e 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text.UART_Transmit_IT - 0x08005b22 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x08005c96 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .text.UART_EndTransmit_IT - 0x08005bc0 0x30 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./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x080062b8 0x10 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .rodata.aPredivFactorTable.0 - 0x08006154 0x2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - *fill* 0x08006156 0x2 - .rodata.tiny 0x08006158 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) - .rodata.one 0x0800615c 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) - 0x08006160 . = ALIGN (0x4) + 0x080062c8 0x2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + *fill* 0x080062ca 0x2 + .rodata.tiny 0x080062cc 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) + .rodata.one 0x080062d0 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-ef_sqrt.o) + 0x080062d4 . = ALIGN (0x4) -.ARM.extab 0x08006160 0x0 - 0x08006160 . = ALIGN (0x4) +.ARM.extab 0x080062d4 0x0 + 0x080062d4 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x08006160 . = ALIGN (0x4) + 0x080062d4 . = ALIGN (0x4) -.ARM 0x08006160 0x8 - 0x08006160 . = ALIGN (0x4) - 0x08006160 __exidx_start = . +.ARM 0x080062d4 0x8 + 0x080062d4 . = ALIGN (0x4) + 0x080062d4 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x08006160 0x8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) - 0x08006168 __exidx_end = . - 0x08006168 . = ALIGN (0x4) + .ARM.exidx 0x080062d4 0x8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) + 0x080062dc __exidx_end = . + 0x080062dc . = ALIGN (0x4) -.preinit_array 0x08006168 0x0 - 0x08006168 . = ALIGN (0x4) - 0x08006168 PROVIDE (__preinit_array_start = .) +.preinit_array 0x080062dc 0x0 + 0x080062dc . = ALIGN (0x4) + 0x080062dc PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x08006168 PROVIDE (__preinit_array_end = .) - 0x08006168 . = ALIGN (0x4) + 0x080062dc PROVIDE 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C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o +.rel.dyn 0x080062e4 0x0 + .rel.iplt 0x080062e4 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o -.data 0x20000000 0x64 load address 0x08006170 +.data 0x20000000 0x60 load address 0x080062e4 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -5027,121 +5009,135 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .data.current_hw_mux_connection 0x20000000 0x1 ./Core/Src/ad5934_driver.o 0x20000000 current_hw_mux_connection - .data.is_new_channel + .data.current_ec_mux 0x20000001 0x1 ./Core/Src/ad5934_driver.o - 0x20000001 is_new_channel - *fill* 0x20000002 0x2 - .data.newline 0x20000004 0x2 ./Core/Src/main.o - 0x20000004 newline - *fill* 0x20000006 0x2 + 0x20000001 current_ec_mux + .data.current_rtd_mux + 0x20000002 0x1 ./Core/Src/ad5934_driver.o + 0x20000002 current_rtd_mux + .data.is_new_channel + 0x20000003 0x1 ./Core/Src/ad5934_driver.o + 0x20000003 is_new_channel .data.SystemCoreClock - 0x20000008 0x4 ./Core/Src/system_stm32f1xx.o - 0x20000008 SystemCoreClock + 0x20000004 0x4 ./Core/Src/system_stm32f1xx.o + 0x20000004 SystemCoreClock .data.uwTickPrio - 0x2000000c 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x2000000c uwTickPrio + 0x20000008 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x20000008 uwTickPrio .data.uwTickFreq - 0x20000010 0x1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x20000010 uwTickFreq - *fill* 0x20000011 0x3 + 0x2000000c 0x1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x2000000c uwTickFreq + *fill* 0x2000000d 0x3 .data._impure_ptr - 0x20000014 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) - 0x20000014 _impure_ptr + 0x20000010 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) + 0x20000010 _impure_ptr .data._impure_data - 0x20000018 0x4c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) - 0x20000018 _impure_data + 0x20000014 0x4c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-impure.o) + 0x20000014 _impure_data *(.RamFunc) *(.RamFunc*) - 0x20000064 . = ALIGN (0x4) - 0x20000064 _edata = . + 0x20000060 . = ALIGN (0x4) + 0x20000060 _edata = . -.igot.plt 0x20000064 0x0 load address 0x080061d4 - .igot.plt 0x20000064 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o - 0x20000064 . = ALIGN (0x4) +.igot.plt 0x20000060 0x0 load address 0x08006344 + .igot.plt 0x20000060 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + 0x20000060 . = ALIGN (0x4) -.bss 0x20000064 0x470 load address 0x080061d4 - 0x20000064 _sbss = . - 0x20000064 __bss_start__ = _sbss +.bss 0x20000060 0x47c load address 0x08006344 + 0x20000060 _sbss = . + 0x20000060 __bss_start__ = _sbss *(.bss) - .bss 0x20000064 0x1c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + .bss 0x20000060 0x1c C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o *(.bss*) .bss.ad5934_state - 0x20000080 0x1 ./Core/Src/ad5934_driver.o - 0x20000080 ad5934_state - *fill* 0x20000081 0x3 + 0x2000007c 0x1 ./Core/Src/ad5934_driver.o + 0x2000007c ad5934_state + *fill* 0x2000007d 0x3 .bss.g_ms_counter + 0x20000080 0x4 ./Core/Src/ad5934_driver.o + 0x20000080 g_ms_counter + .bss.reference_resistor 0x20000084 0x4 ./Core/Src/ad5934_driver.o - 0x20000084 g_ms_counter + 0x20000084 reference_resistor + .bss.temperature_RTD + 0x20000088 0x4 ./Core/Src/ad5934_driver.o + 0x20000088 temperature_RTD + .bss.thermal_compensaded_EC + 0x2000008c 0x4 ./Core/Src/ad5934_driver.o + 0x2000008c thermal_compensaded_EC .bss.current_mux_channel - 0x20000088 0x1 ./Core/Src/ad5934_driver.o - 0x20000088 current_mux_channel + 0x20000090 0x1 ./Core/Src/ad5934_driver.o + 0x20000090 current_mux_channel + .bss.current_ref_mux + 0x20000091 0x1 ./Core/Src/ad5934_driver.o + 0x20000091 current_ref_mux .bss.sweep_count - 0x20000089 0x1 ./Core/Src/ad5934_driver.o - 0x20000089 sweep_count - *fill* 0x2000008a 0x2 + 0x20000092 0x1 ./Core/Src/ad5934_driver.o + 0x20000092 sweep_count + *fill* 0x20000093 0x1 .bss.g_rtd_filter - 0x2000008c 0x40 ./Core/Src/ad5934_driver.o - 0x2000008c g_rtd_filter + 0x20000094 0x40 ./Core/Src/ad5934_driver.o + 0x20000094 g_rtd_filter .bss.g_ec_filter - 0x200000cc 0x40 ./Core/Src/ad5934_driver.o - 0x200000cc g_ec_filter + 0x200000d4 0x40 ./Core/Src/ad5934_driver.o + 0x200000d4 g_ec_filter .bss.g_ref_filter - 0x2000010c 0x40 ./Core/Src/ad5934_driver.o - 0x2000010c g_ref_filter + 0x20000114 0x40 ./Core/Src/ad5934_driver.o + 0x20000114 g_ref_filter .bss.state_timer.0 - 0x2000014c 0x4 ./Core/Src/ad5934_driver.o - .bss.hadc1 0x20000150 0x30 ./Core/Src/adc.o - 0x20000150 hadc1 - .bss.hadc2 0x20000180 0x30 ./Core/Src/adc.o - 0x20000180 hadc2 + 0x20000154 0x4 ./Core/Src/ad5934_driver.o + .bss.hadc1 0x20000158 0x30 ./Core/Src/adc.o + 0x20000158 hadc1 + .bss.hadc2 0x20000188 0x30 ./Core/Src/adc.o + 0x20000188 hadc2 .bss.i2c_ads1015 - 0x200001b0 0x10 ./Core/Src/ads1015_driver.o - 0x200001b0 i2c_ads1015 + 0x200001b8 0x10 ./Core/Src/ads1015_driver.o + 0x200001b8 i2c_ads1015 .bss.g_ph_filter - 0x200001c0 0x40 ./Core/Src/ads1015_driver.o - 0x200001c0 g_ph_filter + 0x200001c8 0x40 ./Core/Src/ads1015_driver.o + 0x200001c8 g_ph_filter .bss.ads1015_state - 0x20000200 0x1 ./Core/Src/ads1015_driver.o - 0x20000200 ads1015_state - *fill* 0x20000201 0x3 + 0x20000208 0x1 ./Core/Src/ads1015_driver.o + 0x20000208 ads1015_state + *fill* 0x20000209 0x3 .bss.sample_count.1 - 0x20000204 0x4 ./Core/Src/ads1015_driver.o + 0x2000020c 0x4 ./Core/Src/ads1015_driver.o .bss.state_timer.0 - 0x20000208 0x4 ./Core/Src/ads1015_driver.o + 0x20000210 0x4 ./Core/Src/ads1015_driver.o .bss.pin_states - 0x2000020c 0x8 ./Core/Src/digital_outputs_driver.o - .bss.hi2c1 0x20000214 0x54 ./Core/Src/i2c.o - 0x20000214 hi2c1 - .bss.hi2c2 0x20000268 0x54 ./Core/Src/i2c.o - 0x20000268 hi2c2 + 0x20000214 0x8 ./Core/Src/digital_outputs_driver.o + .bss.hi2c1 0x2000021c 0x54 ./Core/Src/i2c.o + 0x2000021c hi2c1 + .bss.hi2c2 0x20000270 0x54 ./Core/Src/i2c.o + 0x20000270 hi2c2 .bss.device_address - 0x200002bc 0x3 ./Core/Src/rs485_driver.o - *fill* 0x200002bf 0x1 - .bss.huart1 0x200002c0 0x48 ./Core/Src/rs485_driver.o - .bss.htim3 0x20000308 0x48 ./Core/Src/tim.o - 0x20000308 htim3 - .bss.huart1 0x20000350 0x48 ./Core/Src/usart.o - 0x20000350 huart1 - .bss.uwTick 0x20000398 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x20000398 uwTick - .bss.__sf 0x2000039c 0x138 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) - 0x2000039c __sf + 0x200002c4 0x3 ./Core/Src/rs485_driver.o + *fill* 0x200002c7 0x1 + .bss.huart1 0x200002c8 0x48 ./Core/Src/rs485_driver.o + .bss.htim3 0x20000310 0x48 ./Core/Src/tim.o + 0x20000310 htim3 + .bss.huart1 0x20000358 0x48 ./Core/Src/usart.o + 0x20000358 huart1 + .bss.uwTick 0x200003a0 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x200003a0 uwTick + .bss.__sf 0x200003a4 0x138 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) + 0x200003a4 __sf *(COMMON) - 0x200004d4 . = ALIGN (0x4) - 0x200004d4 _ebss = . - 0x200004d4 __bss_end__ = _ebss + 0x200004dc . = ALIGN (0x4) + 0x200004dc _ebss = . + 0x200004dc __bss_end__ = _ebss ._user_heap_stack - 0x200004d4 0x604 load address 0x080061d4 - 0x200004d8 . = ALIGN (0x8) - *fill* 0x200004d4 0x4 + 0x200004dc 0x604 load address 0x08006344 + 0x200004e0 . = ALIGN (0x8) + *fill* 0x200004dc 0x4 [!provide] PROVIDE (end = .) - 0x200004d8 PROVIDE (_end = .) - 0x200006d8 . = (. + _Min_Heap_Size) - *fill* 0x200004d8 0x200 - 0x20000ad8 . = (. + _Min_Stack_Size) - *fill* 0x200006d8 0x400 - 0x20000ad8 . = ALIGN (0x8) + 0x200004e0 PROVIDE (_end = .) + 0x200006e0 . = (. + _Min_Heap_Size) + *fill* 0x200004e0 0x200 + 0x20000ae0 . = (. + _Min_Stack_Size) + *fill* 0x200006e0 0x400 + 0x20000ae0 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -5239,59 +5235,59 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a -.debug_info 0x00000000 0x1381d - .debug_info 0x00000000 0x1232 ./Core/Src/ad5934_driver.o - .debug_info 0x00001232 0x825 ./Core/Src/adc.o - .debug_info 0x00001a57 0xb4a ./Core/Src/ads1015_driver.o - .debug_info 0x000025a1 0x3c2 ./Core/Src/digital_outputs_driver.o - .debug_info 0x00002963 0x396 ./Core/Src/gpio.o - .debug_info 0x00002cf9 0x83b ./Core/Src/i2c.o - .debug_info 0x00003534 0x10f0 ./Core/Src/main.o - .debug_info 0x00004624 0x993 ./Core/Src/rs485_driver.o - .debug_info 0x00004fb7 0x1f1 ./Core/Src/stm32f1xx_hal_msp.o - .debug_info 0x000051a8 0x94c ./Core/Src/stm32f1xx_it.o - .debug_info 0x00005af4 0x222 ./Core/Src/system_stm32f1xx.o - .debug_info 0x00005d16 0x9bb ./Core/Src/tim.o - .debug_info 0x000066d1 0x92a ./Core/Src/usart.o - .debug_info 0x00006ffb 0x30 ./Core/Startup/startup_stm32f103c8tx.o - .debug_info 0x0000702b 0x704 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_info 0x0000772f 0xc50 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_info 0x0000837f 0xa87 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_info 0x00008e06 0x6d2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_info 0x000094d8 0x5ab ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_info 0x00009a83 0x2524 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_info 0x0000bfa7 0x7d5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_info 0x0000c77c 0x3c0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_info 0x0000cb3c 0x2959 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_info 0x0000f495 0x149b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_info 0x00010930 0x2eed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o +.debug_info 0x00000000 0x13821 + .debug_info 0x00000000 0x12cd ./Core/Src/ad5934_driver.o + .debug_info 0x000012cd 0x825 ./Core/Src/adc.o + .debug_info 0x00001af2 0xb4a ./Core/Src/ads1015_driver.o + .debug_info 0x0000263c 0x3c2 ./Core/Src/digital_outputs_driver.o + .debug_info 0x000029fe 0x396 ./Core/Src/gpio.o + .debug_info 0x00002d94 0x83b ./Core/Src/i2c.o + .debug_info 0x000035cf 0x1059 ./Core/Src/main.o + .debug_info 0x00004628 0x993 ./Core/Src/rs485_driver.o + .debug_info 0x00004fbb 0x1f1 ./Core/Src/stm32f1xx_hal_msp.o + .debug_info 0x000051ac 0x94c ./Core/Src/stm32f1xx_it.o + .debug_info 0x00005af8 0x222 ./Core/Src/system_stm32f1xx.o + .debug_info 0x00005d1a 0x9bb ./Core/Src/tim.o + .debug_info 0x000066d5 0x92a ./Core/Src/usart.o + .debug_info 0x00006fff 0x30 ./Core/Startup/startup_stm32f103c8tx.o + .debug_info 0x0000702f 0x704 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_info 0x00007733 0xc50 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_info 0x00008383 0xa87 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_info 0x00008e0a 0x6d2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_info 0x000094dc 0x5ab ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_info 0x00009a87 0x2524 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_info 0x0000bfab 0x7d5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_info 0x0000c780 0x3c0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_info 0x0000cb40 0x2959 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_info 0x0000f499 0x149b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_info 0x00010934 0x2eed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_abbrev 0x00000000 0x3318 +.debug_abbrev 0x00000000 0x32e3 .debug_abbrev 0x00000000 0x2ca ./Core/Src/ad5934_driver.o .debug_abbrev 0x000002ca 0x1e5 ./Core/Src/adc.o .debug_abbrev 0x000004af 0x26c ./Core/Src/ads1015_driver.o .debug_abbrev 0x0000071b 0x1ba ./Core/Src/digital_outputs_driver.o .debug_abbrev 0x000008d5 0x1a1 ./Core/Src/gpio.o .debug_abbrev 0x00000a76 0x1e4 ./Core/Src/i2c.o - .debug_abbrev 0x00000c5a 0x2fb ./Core/Src/main.o - .debug_abbrev 0x00000f55 0x215 ./Core/Src/rs485_driver.o - .debug_abbrev 0x0000116a 0xdb ./Core/Src/stm32f1xx_hal_msp.o - .debug_abbrev 0x00001245 0x19b ./Core/Src/stm32f1xx_it.o - .debug_abbrev 0x000013e0 0x13f ./Core/Src/system_stm32f1xx.o - .debug_abbrev 0x0000151f 0x20e ./Core/Src/tim.o - .debug_abbrev 0x0000172d 0x205 ./Core/Src/usart.o - .debug_abbrev 0x00001932 0x24 ./Core/Startup/startup_stm32f103c8tx.o - .debug_abbrev 0x00001956 0x201 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_abbrev 0x00001b57 0x225 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_abbrev 0x00001d7c 0x2f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_abbrev 0x00002074 0x20b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_abbrev 0x0000227f 0x1ca ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_abbrev 0x00002449 0x2a3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_abbrev 0x000026ec 0x2b3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_abbrev 0x0000299f 0x188 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_abbrev 0x00002b27 0x277 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_abbrev 0x00002d9e 0x282 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_abbrev 0x00003020 0x2f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + .debug_abbrev 0x00000c5a 0x2c6 ./Core/Src/main.o + .debug_abbrev 0x00000f20 0x215 ./Core/Src/rs485_driver.o + .debug_abbrev 0x00001135 0xdb ./Core/Src/stm32f1xx_hal_msp.o + .debug_abbrev 0x00001210 0x19b ./Core/Src/stm32f1xx_it.o + .debug_abbrev 0x000013ab 0x13f ./Core/Src/system_stm32f1xx.o + .debug_abbrev 0x000014ea 0x20e ./Core/Src/tim.o + .debug_abbrev 0x000016f8 0x205 ./Core/Src/usart.o + .debug_abbrev 0x000018fd 0x24 ./Core/Startup/startup_stm32f103c8tx.o + .debug_abbrev 0x00001921 0x201 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_abbrev 0x00001b22 0x225 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_abbrev 0x00001d47 0x2f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_abbrev 0x0000203f 0x20b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_abbrev 0x0000224a 0x1ca ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_abbrev 0x00002414 0x2a3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_abbrev 0x000026b7 0x2b3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_abbrev 0x0000296a 0x188 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_abbrev 0x00002af2 0x277 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_abbrev 0x00002d69 0x282 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_abbrev 0x00002feb 0x2f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_aranges 0x00000000 0x1260 .debug_aranges @@ -5398,7 +5394,7 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .debug_rnglists 0x00000cbd 0x1bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_macro 0x00000000 0x1a55a +.debug_macro 0x00000000 0x1a53e .debug_macro 0x00000000 0x2b8 ./Core/Src/ad5934_driver.o .debug_macro 0x000002b8 0xacc ./Core/Src/ad5934_driver.o .debug_macro 0x00000d84 0x227 ./Core/Src/ad5934_driver.o @@ -5471,82 +5467,82 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .debug_macro 0x00017c4a 0x1df ./Core/Src/gpio.o .debug_macro 0x00017e29 0x16 ./Core/Src/gpio.o .debug_macro 0x00017e3f 0x1da ./Core/Src/i2c.o - .debug_macro 0x00018019 0x383 ./Core/Src/main.o - .debug_macro 0x0001839c 0x1c ./Core/Src/main.o - .debug_macro 0x000183b8 0x229 ./Core/Src/main.o - .debug_macro 0x000185e1 0x28 ./Core/Src/main.o - .debug_macro 0x00018609 0x1d9 ./Core/Src/rs485_driver.o - .debug_macro 0x000187e2 0x1d0 ./Core/Src/stm32f1xx_hal_msp.o - .debug_macro 0x000189b2 0x1da ./Core/Src/stm32f1xx_it.o - .debug_macro 0x00018b8c 0x1c1 ./Core/Src/system_stm32f1xx.o - .debug_macro 0x00018d4d 0x1da ./Core/Src/tim.o - .debug_macro 0x00018f27 0x1da ./Core/Src/usart.o - .debug_macro 0x00019101 0x1e5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_macro 0x000192e6 0x1de ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_macro 0x000194c4 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_macro 0x00019685 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_macro 0x00019846 0x22c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_macro 0x00019a72 0x20f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_macro 0x00019c81 0x1d3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_macro 0x00019e54 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_macro 0x0001a015 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_macro 0x0001a1d7 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x0001a398 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + .debug_macro 0x00018019 0x367 ./Core/Src/main.o + .debug_macro 0x00018380 0x1c ./Core/Src/main.o + .debug_macro 0x0001839c 0x229 ./Core/Src/main.o + .debug_macro 0x000185c5 0x28 ./Core/Src/main.o + .debug_macro 0x000185ed 0x1d9 ./Core/Src/rs485_driver.o + .debug_macro 0x000187c6 0x1d0 ./Core/Src/stm32f1xx_hal_msp.o + .debug_macro 0x00018996 0x1da ./Core/Src/stm32f1xx_it.o + .debug_macro 0x00018b70 0x1c1 ./Core/Src/system_stm32f1xx.o + .debug_macro 0x00018d31 0x1da ./Core/Src/tim.o + .debug_macro 0x00018f0b 0x1da ./Core/Src/usart.o + .debug_macro 0x000190e5 0x1e5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_macro 0x000192ca 0x1de ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_macro 0x000194a8 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_macro 0x00019669 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_macro 0x0001982a 0x22c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_macro 0x00019a56 0x20f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_macro 0x00019c65 0x1d3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_macro 0x00019e38 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_macro 0x00019ff9 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_macro 0x0001a1bb 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x0001a37c 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_line 0x00000000 0x17c7d - .debug_line 0x00000000 0xed4 ./Core/Src/ad5934_driver.o - .debug_line 0x00000ed4 0x83b ./Core/Src/adc.o - .debug_line 0x0000170f 0xb86 ./Core/Src/ads1015_driver.o - .debug_line 0x00002295 0x850 ./Core/Src/digital_outputs_driver.o - .debug_line 0x00002ae5 0x79d ./Core/Src/gpio.o - .debug_line 0x00003282 0x820 ./Core/Src/i2c.o - .debug_line 0x00003aa2 0xceb ./Core/Src/main.o - .debug_line 0x0000478d 0x8cd ./Core/Src/rs485_driver.o - .debug_line 0x0000505a 0x749 ./Core/Src/stm32f1xx_hal_msp.o - .debug_line 0x000057a3 0x827 ./Core/Src/stm32f1xx_it.o - .debug_line 0x00005fca 0x7c7 ./Core/Src/system_stm32f1xx.o - .debug_line 0x00006791 0x7c2 ./Core/Src/tim.o - .debug_line 0x00006f53 0x7bf ./Core/Src/usart.o - .debug_line 0x00007712 0x78 ./Core/Startup/startup_stm32f103c8tx.o - .debug_line 0x0000778a 0x9fb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_line 0x00008185 0x101d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_line 0x000091a2 0xbc2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_line 0x00009d64 0xe02 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_line 0x0000ab66 0xa52 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_line 0x0000b5b8 0x3bf5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_line 0x0000f1ad 0xeb1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_line 0x0001005e 0x963 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_line 0x000109c1 0x34ec ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_line 0x00013ead 0x18bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_line 0x00015769 0x2514 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o +.debug_line 0x00000000 0x17c73 + .debug_line 0x00000000 0xee0 ./Core/Src/ad5934_driver.o + .debug_line 0x00000ee0 0x83b ./Core/Src/adc.o + .debug_line 0x0000171b 0xb86 ./Core/Src/ads1015_driver.o + .debug_line 0x000022a1 0x850 ./Core/Src/digital_outputs_driver.o + .debug_line 0x00002af1 0x79d ./Core/Src/gpio.o + .debug_line 0x0000328e 0x820 ./Core/Src/i2c.o + .debug_line 0x00003aae 0xcd5 ./Core/Src/main.o + .debug_line 0x00004783 0x8cd ./Core/Src/rs485_driver.o + .debug_line 0x00005050 0x749 ./Core/Src/stm32f1xx_hal_msp.o + .debug_line 0x00005799 0x827 ./Core/Src/stm32f1xx_it.o + .debug_line 0x00005fc0 0x7c7 ./Core/Src/system_stm32f1xx.o + .debug_line 0x00006787 0x7c2 ./Core/Src/tim.o + .debug_line 0x00006f49 0x7bf ./Core/Src/usart.o + .debug_line 0x00007708 0x78 ./Core/Startup/startup_stm32f103c8tx.o + .debug_line 0x00007780 0x9fb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_line 0x0000817b 0x101d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_line 0x00009198 0xbc2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_line 0x00009d5a 0xe02 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_line 0x0000ab5c 0xa52 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_line 0x0000b5ae 0x3bf5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_line 0x0000f1a3 0xeb1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_line 0x00010054 0x963 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_line 0x000109b7 0x34ec ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_line 0x00013ea3 0x18bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_line 0x0001575f 0x2514 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_str 0x00000000 0x95855 - .debug_str 0x00000000 0x95855 ./Core/Src/ad5934_driver.o - 0x8f3e0 (size before relaxing) - .debug_str 0x00095855 0x8a614 ./Core/Src/adc.o - .debug_str 0x00095855 0x8eea8 ./Core/Src/ads1015_driver.o - .debug_str 0x00095855 0x8a38b ./Core/Src/digital_outputs_driver.o - .debug_str 0x00095855 0x8a31d ./Core/Src/gpio.o - .debug_str 0x00095855 0x8a729 ./Core/Src/i2c.o - .debug_str 0x00095855 0x910e3 ./Core/Src/main.o - .debug_str 0x00095855 0x8b0b6 ./Core/Src/rs485_driver.o - .debug_str 0x00095855 0x8a1e4 ./Core/Src/stm32f1xx_hal_msp.o - .debug_str 0x00095855 0x8a93a ./Core/Src/stm32f1xx_it.o - .debug_str 0x00095855 0x89a79 ./Core/Src/system_stm32f1xx.o - .debug_str 0x00095855 0x8ab05 ./Core/Src/tim.o - .debug_str 0x00095855 0x8a9bf ./Core/Src/usart.o - .debug_str 0x00095855 0x6e ./Core/Startup/startup_stm32f103c8tx.o - .debug_str 0x00095855 0x8a1ac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_str 0x00095855 0x8a15d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_str 0x00095855 0x8a0f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_str 0x00095855 0x89e22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_str 0x00095855 0x89dff ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_str 0x00095855 0x8ab40 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_str 0x00095855 0x89ea8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_str 0x00095855 0x89bf8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_str 0x00095855 0x8aeaa ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_str 0x00095855 0x8a6b6 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_str 0x00095855 0x8a519 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o +.debug_str 0x00000000 0x95804 + .debug_str 0x00000000 0x95804 ./Core/Src/ad5934_driver.o + 0x8f449 (size before relaxing) + .debug_str 0x00095804 0x8a614 ./Core/Src/adc.o + .debug_str 0x00095804 0x8eea8 ./Core/Src/ads1015_driver.o + .debug_str 0x00095804 0x8a38b ./Core/Src/digital_outputs_driver.o + .debug_str 0x00095804 0x8a31d ./Core/Src/gpio.o + .debug_str 0x00095804 0x8a729 ./Core/Src/i2c.o + .debug_str 0x00095804 0x910b0 ./Core/Src/main.o + .debug_str 0x00095804 0x8b0b6 ./Core/Src/rs485_driver.o + .debug_str 0x00095804 0x8a1e4 ./Core/Src/stm32f1xx_hal_msp.o + .debug_str 0x00095804 0x8a93a ./Core/Src/stm32f1xx_it.o + .debug_str 0x00095804 0x89a79 ./Core/Src/system_stm32f1xx.o + .debug_str 0x00095804 0x8ab05 ./Core/Src/tim.o + .debug_str 0x00095804 0x8a9bf ./Core/Src/usart.o + .debug_str 0x00095804 0x6e ./Core/Startup/startup_stm32f103c8tx.o + .debug_str 0x00095804 0x8a1ac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_str 0x00095804 0x8a15d ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_str 0x00095804 0x8a0f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_str 0x00095804 0x89e22 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_str 0x00095804 0x89dff ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_str 0x00095804 0x8ab40 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_str 0x00095804 0x89ea8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_str 0x00095804 0x89bf8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_str 0x00095804 0x8aeaa ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_str 0x00095804 0x8a6b6 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_str 0x00095804 0x8a519 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .comment 0x00000000 0x43 .comment 0x00000000 0x43 ./Core/Src/ad5934_driver.o @@ -5575,43 +5571,43 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o .comment 0x00000043 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_frame 0x00000000 0x4be0 - .debug_frame 0x00000000 0x388 ./Core/Src/ad5934_driver.o - .debug_frame 0x00000388 0xa0 ./Core/Src/adc.o - .debug_frame 0x00000428 0x174 ./Core/Src/ads1015_driver.o - .debug_frame 0x0000059c 0xc4 ./Core/Src/digital_outputs_driver.o - .debug_frame 0x00000660 0x58 ./Core/Src/gpio.o - .debug_frame 0x000006b8 0x90 ./Core/Src/i2c.o - .debug_frame 0x00000748 0xe0 ./Core/Src/main.o - .debug_frame 0x00000828 0x15c ./Core/Src/rs485_driver.o - .debug_frame 0x00000984 0x34 ./Core/Src/stm32f1xx_hal_msp.o - .debug_frame 0x000009b8 0x130 ./Core/Src/stm32f1xx_it.o - .debug_frame 0x00000ae8 0x50 ./Core/Src/system_stm32f1xx.o - .debug_frame 0x00000b38 0x7c ./Core/Src/tim.o - .debug_frame 0x00000bb4 0x74 ./Core/Src/usart.o - .debug_frame 0x00000c28 0x2e4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_frame 0x00000f0c 0x3e0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_frame 0x000012ec 0x3f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_frame 0x000016dc 0x1e8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_frame 0x000018c4 0x130 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_frame 0x000019f4 0xbf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_frame 0x000025e8 0x1f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_frame 0x000027e0 0x7c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_frame 0x0000285c 0x10e8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_frame 0x00003944 0x600 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_frame 0x00003f44 0x8dc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o - .debug_frame 0x00004820 0x144 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) - .debug_frame 0x00004964 0x20 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-memset.o) - .debug_frame 0x00004984 0x20 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-errno.o) - .debug_frame 0x000049a4 0x2c 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