diff --git a/Fertirrega_v6/Core/Inc/ad5934_driver.h b/Fertirrega_v6/Core/Inc/ad5934_driver.h index 379b0ce..126e6d4 100644 --- a/Fertirrega_v6/Core/Inc/ad5934_driver.h +++ b/Fertirrega_v6/Core/Inc/ad5934_driver.h @@ -156,8 +156,8 @@ extern "C" { #define AD5934_EC_1MS 0.001f // Ref 1K #define AD5934_EC_0_1MS 0.0001f // Ref 10k -#define AD5934_DRIFT_PT100 2.12f -#define AD5934_DRIFT_PT1000 0.22f +#define AD5934_DRIFT_PT100 2.92f +#define AD5934_DRIFT_PT1000 0.42f #define AD5934_GAIN_FACTOR_1413US 1413.0f #define AD5934_GAIN_FACTOR_12880US 12880.0f @@ -182,11 +182,10 @@ extern "C" { #define AD5934_ID_RTD 0 #define AD5934_ID_EC 1 #define AD5934_ID_REF_100R_LOWGAIN 2 -#define AD5934_ID_REF_100R_MIDGAIN 3 -#define AD5934_ID_REF_100R_HIGHGAIN 4 -#define AD5934_ID_REF_1K_MIDGAIN 5 -#define AD5934_ID_REF_1K_HIGHGAIN 6 -#define AD5934_ID_REF_10K_HIGHGAIN 7 +#define AD5934_ID_REF_100R_MIDGAIN 3 +#define AD5934_ID_REF_1K_MIDGAIN 4 +#define AD5934_ID_REF_1K_HIGHGAIN 5 +#define AD5934_ID_REF_10K_HIGHGAIN 6 /*****************************************************************************/ /**************************** Filtering Defines *****************************/ @@ -212,12 +211,12 @@ extern "C" { #define AD5934_RTD_OUT_SCALE_MAX 800 #define AD5934_EC5_FLOAT_SCALE_MIN 0.0f -#define AD5934_EC5_FLOAT_SCALE_MAX 7000.0f +#define AD5934_EC5_FLOAT_SCALE_MAX 5.5f #define AD5934_EC5_OUT_SCALE_MIN 0 #define AD5934_EC5_OUT_SCALE_MAX 4095 #define AD5934_EC10_FLOAT_SCALE_MIN 0.0f -#define AD5934_EC10_FLOAT_SCALE_MAX 14000.0f +#define AD5934_EC10_FLOAT_SCALE_MAX 15.0f #define AD5934_EC10_OUT_SCALE_MIN 0 #define AD5934_EC10_OUT_SCALE_MAX 4095 @@ -406,7 +405,7 @@ extern uint8_t current_ec_mux; extern uint8_t current_rtd_mux; extern uint8_t current_ref_mux; -extern AD5934_filter_t g_rtd_filter, g_ec_filter, g_ref_100R_LowGain_filter, g_ref_100R_MidGain_filter, g_ref_100R_HighGain_filter, g_ref_1K_MidGain_filter, g_ref_1K_HighGain_filter, g_ref_10K_HighGain_filter; +extern AD5934_filter_t g_rtd_filter, g_ec_filter, g_ref_100R_LowGain_filter, g_ref_100R_MidGain_filter, g_ref_1K_MidGain_filter, g_ref_1K_HighGain_filter, g_ref_10K_HighGain_filter; extern uint8_t is_startup; @@ -471,8 +470,6 @@ void AD5934_Reference_100R_LowGain_NewSample(float raw); void AD5934_Reference_100R_MidGain_NewSample(float raw); -void AD5934_Reference_100R_HighGain_NewSample(float raw); - void AD5934_Reference_1K_MidGain_NewSample(float raw); void AD5934_Reference_1K_HighGain_NewSample(float raw); diff --git a/Fertirrega_v6/Core/Inc/ads1015_driver.h b/Fertirrega_v6/Core/Inc/ads1015_driver.h index 6b58dab..882ef6b 100644 --- a/Fertirrega_v6/Core/Inc/ads1015_driver.h +++ b/Fertirrega_v6/Core/Inc/ads1015_driver.h @@ -128,10 +128,10 @@ extern "C" { #define ADS1015_CONFIG_START_SINGLE (ADS1015_REG_CONFIG_OS_SINGLE | ADS1015_REG_CONFIG_MUX_DIFF_0_1 | ADS1015_REG_CONFIG_PGA_1_024V | ADS1015_REG_CONFIG_MODE_SINGLE | ADS1015_REG_CONFIG_DR_128SPS | ADS1015_REG_CONFIG_CMODE_TRAD | ADS1015_REG_CONFIG_CPOL_ACTVLOW | ADS1015_REG_CONFIG_CLAT_NONLAT | ADS1015_REG_CONFIG_CQUE_NONE) // 0x8583 // valor de reset já tem OS=1, então só precisa garantir MODE=1b -#define ADS1015_BURST_SIZE 5 -#define ADS1015_TRIM_COUNT 1 -#define ADS1015_HISTORY_SIZE 5 -#define ADS1015_IIR_ALPHA 0.55f +#define ADS1015_BURST_SIZE 1 +#define ADS1015_TRIM_COUNT 0 +#define ADS1015_HISTORY_SIZE 16 +#define ADS1015_IIR_ALPHA 0.1f #define ADS1015_PH_FLOAT_SCALE_MIN 1000.0f #define ADS1015_PH_FLOAT_SCALE_MAX 3000.0f diff --git a/Fertirrega_v6/Core/Src/ad5934_driver.c b/Fertirrega_v6/Core/Src/ad5934_driver.c index 55a7cf2..09e7120 100644 --- a/Fertirrega_v6/Core/Src/ad5934_driver.c +++ b/Fertirrega_v6/Core/Src/ad5934_driver.c @@ -27,7 +27,6 @@ AD5934_filter_t g_rtd_filter = {0}; AD5934_filter_t g_ec_filter = {0}; AD5934_filter_t g_ref_100R_LowGain_filter = {0}; AD5934_filter_t g_ref_100R_MidGain_filter = {0}; -AD5934_filter_t g_ref_100R_HighGain_filter = {0}; AD5934_filter_t g_ref_1K_MidGain_filter = {0}; AD5934_filter_t g_ref_1K_HighGain_filter = {0}; AD5934_filter_t g_ref_10K_HighGain_filter = {0}; @@ -283,7 +282,7 @@ float AD5934_Calculate_Temperature(float mag_ref_pt100, float mag_ref_pt1000, fl temperature = (ratio - 1.0f) / AD5934_RTD_ALPHA; } - return AD5934_Round_Float_Precision((temperature-drift),2); + return AD5934_Round_Float_Precision((temperature-drift),1); } @@ -302,7 +301,7 @@ float AD5934_EC_Compensate_Magnitude_To_25C(float mag_dut, float temperature_dut if (factor < 0.1f) factor = 0.1f; - return (AD5934_Round_Float_Precision((mag_dut / (factor)),2)); + return (mag_dut/factor); } /** @@ -440,7 +439,9 @@ float AD5934_GetAdmittance(float mag_ref_10mS_MidGain, float mag_ref_1mS_MidGain float y_cell = admittance / (1 - (AD5934_EC_IN_SERIES_RESISTOR * admittance)); // Resistor in series with EC is 100 Ohms on PCB - return (y_cell*1000000); // in uS + //float y_cell = admittance; + + return (y_cell*1000); // in mS } /****************************************************************************** * @brief Get Real and Imag values from Magnitude. @@ -621,9 +622,6 @@ void AD5934_Process_System(void) case AD5934_ID_REF_100R_MIDGAIN: AD5934_Reference_100R_MidGain_NewSample(mag_float); break; - case AD5934_ID_REF_100R_HIGHGAIN: - AD5934_Reference_100R_HighGain_NewSample(mag_float); - break; case AD5934_ID_REF_1K_MIDGAIN: AD5934_Reference_1K_MidGain_NewSample(mag_float); break; @@ -650,7 +648,7 @@ void AD5934_Process_System(void) case AD5934_SWITCH_MUX: AD5934_StopSweep(); // Put AD5934 in Standby - current_mux_channel = (uint8_t)((current_mux_channel + 1) % 8); // Pointer to the next channel (Circular Buffer 0 to 7) + current_mux_channel = (uint8_t)((current_mux_channel + 1) % 7); // Pointer to the next channel (Circular Buffer 0 to 6) switch (current_mux_channel) { case AD5934_ID_RTD: @@ -673,9 +671,6 @@ void AD5934_Process_System(void) case AD5934_ID_REF_100R_MIDGAIN: current_ref_mux = current_hw_mux_connection = AD5934_CH_REF100R_MID_GAIN; // 100 Ohms Reference Resistor break; - case AD5934_ID_REF_100R_HIGHGAIN: - current_ref_mux = current_hw_mux_connection = AD5934_CH_REF100R_HIGH_GAIN; // 100 Ohms Reference Resistor - break; case AD5934_ID_REF_1K_MIDGAIN: current_ref_mux = current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor break; @@ -861,13 +856,6 @@ void AD5934_Reference_100R_MidGain_NewSample(float raw) AD5934_Process_Sample(&g_ref_100R_MidGain_filter, raw); } -/* Call this every time a sweep completes with the mux on the on-board - * precision reference resistor channel */ -void AD5934_Reference_100R_HighGain_NewSample(float raw) -{ - AD5934_Process_Sample(&g_ref_100R_HighGain_filter, raw); -} - /* Call this every time a sweep completes with the mux on the on-board * precision reference resistor channel */ void AD5934_Reference_1K_MidGain_NewSample(float raw) diff --git a/Fertirrega_v6/Core/Src/ads1015_driver.c b/Fertirrega_v6/Core/Src/ads1015_driver.c index a253eca..1c61fde 100644 --- a/Fertirrega_v6/Core/Src/ads1015_driver.c +++ b/Fertirrega_v6/Core/Src/ads1015_driver.c @@ -260,7 +260,7 @@ void ADS1015_Process_Sample(ADS1015_filter_t *ch, float raw) /* Final output: combines the IIR state (fast response to real drift) * with the window average (more stable, slower response). Adjust * the weighting per channel if needed. */ - ch->filtered_value = 0.5f * ch->iir_state + 0.5f * window_average; + ch->filtered_value = 0.7f * ch->iir_state + 0.3f * window_average; ch->value_valid = 1; } diff --git a/Fertirrega_v6/Core/Src/main.c b/Fertirrega_v6/Core/Src/main.c index eaf3a1b..59a45d7 100644 --- a/Fertirrega_v6/Core/Src/main.c +++ b/Fertirrega_v6/Core/Src/main.c @@ -142,14 +142,14 @@ int main(void) /* Infinite loop */ /* USER CODE BEGIN WHILE */ - while(averages<20) + while(averages<50) { AD5934_Process_System(); ADS1015_Process_System(); current_millis = g_ms_counter; - if((current_millis % 100) == 0) // Send data each 40ms + if((current_millis % 20) == 0) // Send data each 40ms { averages++; @@ -177,9 +177,9 @@ int main(void) { temperature_RTD = AD5934_Calculate_Temperature(g_ref_100R_LowGain_filter.filtered_value, g_ref_1K_MidGain_filter.filtered_value, g_rtd_filter.filtered_value);// AD5934_GetImpedance(mag_reference,mag_rtd);// //uint16_t rtd_final = AD5934_RTD_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_rtd_filter.filtered_value, current_rtd_mux); - uint16_t rtd_final = AD5934_Compress_To_IntScale(temperature_RTD, current_rtd_mux); - intToStr(rtd_final, tempString); - //FloatToString(tempString, temperature_RTD); + //uint16_t rtd_final = AD5934_Compress_To_IntScale(temperature_RTD, current_rtd_mux); + //intToStr(rtd_final, tempString); + FloatToString(tempString, temperature_RTD); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); rs485_send_broadcast(&newline, 1); @@ -188,9 +188,11 @@ int main(void) { mag_ec = AD5934_GetAdmittance(g_ref_100R_MidGain_filter.filtered_value, g_ref_1K_MidGain_filter.filtered_value, g_ref_1K_HighGain_filter.filtered_value, g_ref_10K_HighGain_filter.filtered_value, g_ec_filter.filtered_value); thermal_compensaded_EC = AD5934_EC_Compensate_Magnitude_To_25C(mag_ec, temperature_RTD); - uint16_t ec_final = AD5934_Compress_To_IntScale(mag_ec, current_ec_mux); - intToStr(ec_final, tempString); //FloatToString(tempString, thermal_compensaded_EC); + //rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); + //rs485_send_broadcast(&newline, 1); + uint16_t ec_final = AD5934_Compress_To_IntScale(thermal_compensaded_EC, current_ec_mux); + intToStr(ec_final, tempString); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); rs485_send_broadcast(&newline, 1); } diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo index e22ff88..7099161 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.cyclo @@ -1,36 +1,35 @@ -../Core/Src/ad5934_driver.c:53:6:AD5934_SetRegisterValue 2 -../Core/Src/ad5934_driver.c:81:10:AD5934_GetRegisterValue 3 -../Core/Src/ad5934_driver.c:115:10:AD5934_ReadRegister 3 -../Core/Src/ad5934_driver.c:153:6:AD5934_Init 1 -../Core/Src/ad5934_driver.c:184:6:AD5934_RestartSweep 1 -../Core/Src/ad5934_driver.c:207:6:AD5934_Repeat_Sweep 1 -../Core/Src/ad5934_driver.c:220:6:AD5934_StopSweep 1 -../Core/Src/ad5934_driver.c:240:7:AD5934_Calculate_Temperature 4 -../Core/Src/ad5934_driver.c:298:7:AD5934_EC_Compensate_Magnitude_To_25C 2 -../Core/Src/ad5934_driver.c:313:7:AD5934_EC_Calibrate_Temperature 5 -../Core/Src/ad5934_driver.c:359:7:AD5934_GetMagnitude 1 -../Core/Src/ad5934_driver.c:383:7:AD5934_GetImpedance 2 -../Core/Src/ad5934_driver.c:413:7:AD5934_GetAdmittance 2 -../Core/Src/ad5934_driver.c:452:10:AD5934_Get_Real_Imag_Numbers 1 -../Core/Src/ad5934_driver.c:471:10:AD5934_Compress_To_IntScale 5 -../Core/Src/ad5934_driver.c:504:7:AD5934_Round_Float_Precision 2 -../Core/Src/ad5934_driver.c:529:7:AD5934_Linear_Correction 1 -../Core/Src/ad5934_driver.c:548:7:AD5934_Calibrate 1 -../Core/Src/ad5934_driver.c:570:6:AD5934_Process_System 26 -../Core/Src/ad5934_driver.c:703:6:AD5934_Sort_Array 4 -../Core/Src/ad5934_driver.c:725:7:AD5934_Trimmed_Mean 3 -../Core/Src/ad5934_driver.c:751:7:AD5934_History_Average 2 -../Core/Src/ad5934_driver.c:765:6:AD5934_Process_Sample 4 -../Core/Src/ad5934_driver.c:805:6:AD5934_MovingAvg_Init 2 -../Core/Src/ad5934_driver.c:816:6:AD5934_MovingAvg_Process 3 -../Core/Src/ad5934_driver.c:836:6:AD5934_RTD_NewSample 1 -../Core/Src/ad5934_driver.c:844:6:AD5934_EC_NewSample 1 -../Core/Src/ad5934_driver.c:852:6:AD5934_Reference_100R_LowGain_NewSample 1 -../Core/Src/ad5934_driver.c:859:6:AD5934_Reference_100R_MidGain_NewSample 1 -../Core/Src/ad5934_driver.c:866:6:AD5934_Reference_100R_HighGain_NewSample 1 -../Core/Src/ad5934_driver.c:873:6:AD5934_Reference_1K_MidGain_NewSample 1 -../Core/Src/ad5934_driver.c:880:6:AD5934_Reference_1K_HighGain_NewSample 1 -../Core/Src/ad5934_driver.c:887:6:AD5934_Reference_10K_HighGain_NewSample 1 -../Core/Src/ad5934_driver.c:902:6:ADG715_SetRegisterValue 1 -../Core/Src/ad5934_driver.c:920:6:ADG715_ResetChannels 1 -../Core/Src/ad5934_driver.c:932:6:ADG715_SetChannels 2 +../Core/Src/ad5934_driver.c:52:6:AD5934_SetRegisterValue 2 +../Core/Src/ad5934_driver.c:80:10:AD5934_GetRegisterValue 3 +../Core/Src/ad5934_driver.c:114:10:AD5934_ReadRegister 3 +../Core/Src/ad5934_driver.c:152:6:AD5934_Init 1 +../Core/Src/ad5934_driver.c:183:6:AD5934_RestartSweep 1 +../Core/Src/ad5934_driver.c:206:6:AD5934_Repeat_Sweep 1 +../Core/Src/ad5934_driver.c:219:6:AD5934_StopSweep 1 +../Core/Src/ad5934_driver.c:239:7:AD5934_Calculate_Temperature 4 +../Core/Src/ad5934_driver.c:297:7:AD5934_EC_Compensate_Magnitude_To_25C 2 +../Core/Src/ad5934_driver.c:312:7:AD5934_EC_Calibrate_Temperature 5 +../Core/Src/ad5934_driver.c:358:7:AD5934_GetMagnitude 1 +../Core/Src/ad5934_driver.c:382:7:AD5934_GetImpedance 2 +../Core/Src/ad5934_driver.c:412:7:AD5934_GetAdmittance 2 +../Core/Src/ad5934_driver.c:453:10:AD5934_Get_Real_Imag_Numbers 1 +../Core/Src/ad5934_driver.c:472:10:AD5934_Compress_To_IntScale 5 +../Core/Src/ad5934_driver.c:505:7:AD5934_Round_Float_Precision 2 +../Core/Src/ad5934_driver.c:530:7:AD5934_Linear_Correction 1 +../Core/Src/ad5934_driver.c:549:7:AD5934_Calibrate 1 +../Core/Src/ad5934_driver.c:571:6:AD5934_Process_System 24 +../Core/Src/ad5934_driver.c:698:6:AD5934_Sort_Array 4 +../Core/Src/ad5934_driver.c:720:7:AD5934_Trimmed_Mean 3 +../Core/Src/ad5934_driver.c:746:7:AD5934_History_Average 2 +../Core/Src/ad5934_driver.c:760:6:AD5934_Process_Sample 4 +../Core/Src/ad5934_driver.c:800:6:AD5934_MovingAvg_Init 2 +../Core/Src/ad5934_driver.c:811:6:AD5934_MovingAvg_Process 3 +../Core/Src/ad5934_driver.c:831:6:AD5934_RTD_NewSample 1 +../Core/Src/ad5934_driver.c:839:6:AD5934_EC_NewSample 1 +../Core/Src/ad5934_driver.c:847:6:AD5934_Reference_100R_LowGain_NewSample 1 +../Core/Src/ad5934_driver.c:854:6:AD5934_Reference_100R_MidGain_NewSample 1 +../Core/Src/ad5934_driver.c:861:6:AD5934_Reference_1K_MidGain_NewSample 1 +../Core/Src/ad5934_driver.c:868:6:AD5934_Reference_1K_HighGain_NewSample 1 +../Core/Src/ad5934_driver.c:875:6:AD5934_Reference_10K_HighGain_NewSample 1 +../Core/Src/ad5934_driver.c:890:6:ADG715_SetRegisterValue 1 +../Core/Src/ad5934_driver.c:908:6:ADG715_ResetChannels 1 +../Core/Src/ad5934_driver.c:920:6:ADG715_SetChannels 2 diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o index c3ab306..0b13964 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o and b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su index 828c255..03dc7f8 100644 --- a/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su +++ b/Fertirrega_v6/Debug/Core/Src/ad5934_driver.su @@ -1,36 +1,35 @@ -../Core/Src/ad5934_driver.c:53:6:AD5934_SetRegisterValue 32 static -../Core/Src/ad5934_driver.c:81:10:AD5934_GetRegisterValue 40 static -../Core/Src/ad5934_driver.c:115:10:AD5934_ReadRegister 48 static -../Core/Src/ad5934_driver.c:153:6:AD5934_Init 8 static -../Core/Src/ad5934_driver.c:184:6:AD5934_RestartSweep 8 static -../Core/Src/ad5934_driver.c:207:6:AD5934_Repeat_Sweep 8 static -../Core/Src/ad5934_driver.c:220:6:AD5934_StopSweep 8 static -../Core/Src/ad5934_driver.c:240:7:AD5934_Calculate_Temperature 64 static -../Core/Src/ad5934_driver.c:298:7:AD5934_EC_Compensate_Magnitude_To_25C 24 static -../Core/Src/ad5934_driver.c:313:7:AD5934_EC_Calibrate_Temperature 152 static -../Core/Src/ad5934_driver.c:359:7:AD5934_GetMagnitude 24 static -../Core/Src/ad5934_driver.c:383:7:AD5934_GetImpedance 32 static -../Core/Src/ad5934_driver.c:413:7:AD5934_GetAdmittance 72 static -../Core/Src/ad5934_driver.c:452:10:AD5934_Get_Real_Imag_Numbers 16 static -../Core/Src/ad5934_driver.c:471:10:AD5934_Compress_To_IntScale 32 static -../Core/Src/ad5934_driver.c:504:7:AD5934_Round_Float_Precision 24 static -../Core/Src/ad5934_driver.c:529:7:AD5934_Linear_Correction 24 static -../Core/Src/ad5934_driver.c:548:7:AD5934_Calibrate 48 static -../Core/Src/ad5934_driver.c:570:6:AD5934_Process_System 32 static -../Core/Src/ad5934_driver.c:703:6:AD5934_Sort_Array 24 static -../Core/Src/ad5934_driver.c:725:7:AD5934_Trimmed_Mean 32 static -../Core/Src/ad5934_driver.c:751:7:AD5934_History_Average 24 static -../Core/Src/ad5934_driver.c:765:6:AD5934_Process_Sample 32 static -../Core/Src/ad5934_driver.c:805:6:AD5934_MovingAvg_Init 24 static -../Core/Src/ad5934_driver.c:816:6:AD5934_MovingAvg_Process 24 static -../Core/Src/ad5934_driver.c:836:6:AD5934_RTD_NewSample 16 static -../Core/Src/ad5934_driver.c:844:6:AD5934_EC_NewSample 16 static -../Core/Src/ad5934_driver.c:852:6:AD5934_Reference_100R_LowGain_NewSample 16 static -../Core/Src/ad5934_driver.c:859:6:AD5934_Reference_100R_MidGain_NewSample 16 static -../Core/Src/ad5934_driver.c:866:6:AD5934_Reference_100R_HighGain_NewSample 16 static -../Core/Src/ad5934_driver.c:873:6:AD5934_Reference_1K_MidGain_NewSample 16 static -../Core/Src/ad5934_driver.c:880:6:AD5934_Reference_1K_HighGain_NewSample 16 static -../Core/Src/ad5934_driver.c:887:6:AD5934_Reference_10K_HighGain_NewSample 16 static -../Core/Src/ad5934_driver.c:902:6:ADG715_SetRegisterValue 32 static -../Core/Src/ad5934_driver.c:920:6:ADG715_ResetChannels 8 static -../Core/Src/ad5934_driver.c:932:6:ADG715_SetChannels 16 static +../Core/Src/ad5934_driver.c:52:6:AD5934_SetRegisterValue 32 static +../Core/Src/ad5934_driver.c:80:10:AD5934_GetRegisterValue 40 static +../Core/Src/ad5934_driver.c:114:10:AD5934_ReadRegister 48 static +../Core/Src/ad5934_driver.c:152:6:AD5934_Init 8 static +../Core/Src/ad5934_driver.c:183:6:AD5934_RestartSweep 8 static +../Core/Src/ad5934_driver.c:206:6:AD5934_Repeat_Sweep 8 static +../Core/Src/ad5934_driver.c:219:6:AD5934_StopSweep 8 static +../Core/Src/ad5934_driver.c:239:7:AD5934_Calculate_Temperature 64 static +../Core/Src/ad5934_driver.c:297:7:AD5934_EC_Compensate_Magnitude_To_25C 24 static +../Core/Src/ad5934_driver.c:312:7:AD5934_EC_Calibrate_Temperature 152 static +../Core/Src/ad5934_driver.c:358:7:AD5934_GetMagnitude 24 static +../Core/Src/ad5934_driver.c:382:7:AD5934_GetImpedance 32 static +../Core/Src/ad5934_driver.c:412:7:AD5934_GetAdmittance 72 static +../Core/Src/ad5934_driver.c:453:10:AD5934_Get_Real_Imag_Numbers 16 static +../Core/Src/ad5934_driver.c:472:10:AD5934_Compress_To_IntScale 32 static +../Core/Src/ad5934_driver.c:505:7:AD5934_Round_Float_Precision 24 static +../Core/Src/ad5934_driver.c:530:7:AD5934_Linear_Correction 24 static +../Core/Src/ad5934_driver.c:549:7:AD5934_Calibrate 48 static +../Core/Src/ad5934_driver.c:571:6:AD5934_Process_System 32 static +../Core/Src/ad5934_driver.c:698:6:AD5934_Sort_Array 24 static +../Core/Src/ad5934_driver.c:720:7:AD5934_Trimmed_Mean 32 static +../Core/Src/ad5934_driver.c:746:7:AD5934_History_Average 24 static +../Core/Src/ad5934_driver.c:760:6:AD5934_Process_Sample 32 static +../Core/Src/ad5934_driver.c:800:6:AD5934_MovingAvg_Init 24 static +../Core/Src/ad5934_driver.c:811:6:AD5934_MovingAvg_Process 24 static +../Core/Src/ad5934_driver.c:831:6:AD5934_RTD_NewSample 16 static +../Core/Src/ad5934_driver.c:839:6:AD5934_EC_NewSample 16 static +../Core/Src/ad5934_driver.c:847:6:AD5934_Reference_100R_LowGain_NewSample 16 static +../Core/Src/ad5934_driver.c:854:6:AD5934_Reference_100R_MidGain_NewSample 16 static +../Core/Src/ad5934_driver.c:861:6:AD5934_Reference_1K_MidGain_NewSample 16 static +../Core/Src/ad5934_driver.c:868:6:AD5934_Reference_1K_HighGain_NewSample 16 static +../Core/Src/ad5934_driver.c:875:6:AD5934_Reference_10K_HighGain_NewSample 16 static +../Core/Src/ad5934_driver.c:890:6:ADG715_SetRegisterValue 32 static +../Core/Src/ad5934_driver.c:908:6:ADG715_ResetChannels 8 static +../Core/Src/ad5934_driver.c:920:6:ADG715_SetChannels 16 static diff --git a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o index e91cc45..15871d0 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o and b/Fertirrega_v6/Debug/Core/Src/ads1015_driver.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/main.cyclo b/Fertirrega_v6/Debug/Core/Src/main.cyclo index fd9e1e6..26a45d4 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.cyclo +++ b/Fertirrega_v6/Debug/Core/Src/main.cyclo @@ -1,7 +1,7 @@ ../Core/Src/main.c:79:5:main 8 -../Core/Src/main.c:250:6:SystemClock_Config 4 -../Core/Src/main.c:301:6:FloatToString 8 -../Core/Src/main.c:363:6:intToStr 12 -../Core/Src/main.c:429:6:Convert2Hex 2 -../Core/Src/main.c:443:6:HAL_TIM_PeriodElapsedCallback 2 -../Core/Src/main.c:459:6:Error_Handler 1 +../Core/Src/main.c:252:6:SystemClock_Config 4 +../Core/Src/main.c:303:6:FloatToString 8 +../Core/Src/main.c:365:6:intToStr 12 +../Core/Src/main.c:431:6:Convert2Hex 2 +../Core/Src/main.c:445:6:HAL_TIM_PeriodElapsedCallback 2 +../Core/Src/main.c:461:6:Error_Handler 1 diff --git a/Fertirrega_v6/Debug/Core/Src/main.o b/Fertirrega_v6/Debug/Core/Src/main.o index 91d2df8..1340ccd 100644 Binary files a/Fertirrega_v6/Debug/Core/Src/main.o and b/Fertirrega_v6/Debug/Core/Src/main.o differ diff --git a/Fertirrega_v6/Debug/Core/Src/main.su b/Fertirrega_v6/Debug/Core/Src/main.su index 3e44899..d31cb1c 100644 --- a/Fertirrega_v6/Debug/Core/Src/main.su +++ b/Fertirrega_v6/Debug/Core/Src/main.su @@ -1,7 +1,7 @@ -../Core/Src/main.c:79:5:main 104 static -../Core/Src/main.c:250:6:SystemClock_Config 88 static -../Core/Src/main.c:301:6:FloatToString 104 static -../Core/Src/main.c:363:6:intToStr 32 static -../Core/Src/main.c:429:6:Convert2Hex 48 static -../Core/Src/main.c:443:6:HAL_TIM_PeriodElapsedCallback 16 static -../Core/Src/main.c:459:6:Error_Handler 4 static,ignoring_inline_asm +../Core/Src/main.c:79:5:main 96 static +../Core/Src/main.c:252:6:SystemClock_Config 88 static +../Core/Src/main.c:303:6:FloatToString 104 static +../Core/Src/main.c:365:6:intToStr 32 static +../Core/Src/main.c:431:6:Convert2Hex 48 static +../Core/Src/main.c:445:6:HAL_TIM_PeriodElapsedCallback 16 static +../Core/Src/main.c:461:6:Error_Handler 4 static,ignoring_inline_asm diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.elf b/Fertirrega_v6/Debug/Fertirrega_v6.elf index 2270901..cbf59a5 100644 Binary files a/Fertirrega_v6/Debug/Fertirrega_v6.elf and b/Fertirrega_v6/Debug/Fertirrega_v6.elf differ diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.list b/Fertirrega_v6/Debug/Fertirrega_v6.list index abe227b..a949781 100644 --- a/Fertirrega_v6/Debug/Fertirrega_v6.list +++ b/Fertirrega_v6/Debug/Fertirrega_v6.list @@ -5,47 +5,47 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 0000010c 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00006408 0800010c 0800010c 0000110c 2**2 + 1 .text 00006cf8 0800010c 0800010c 0000110c 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 0000013c 08006514 08006514 00007514 2**2 + 2 .rodata 0000013c 08006e04 08006e04 00007e04 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08006650 08006650 00008060 2**0 + 3 .ARM.extab 00000000 08006f40 08006f40 00008060 2**0 CONTENTS, READONLY - 4 .ARM 00000008 08006650 08006650 00007650 2**2 + 4 .ARM 00000008 08006f40 08006f40 00007f40 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 08006658 08006658 00008060 2**0 + 5 .preinit_array 00000000 08006f48 08006f48 00008060 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08006658 08006658 00007658 2**2 + 6 .init_array 00000004 08006f48 08006f48 00007f48 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 7 .fini_array 00000004 0800665c 0800665c 0000765c 2**2 + 7 .fini_array 00000004 08006f4c 08006f4c 00007f4c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 8 .data 00000060 20000000 08006660 00008000 2**2 + 8 .data 00000060 20000000 08006f50 00008000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 00000690 20000060 080066c0 00008060 2**2 + 9 .bss 00000650 20000060 08006fb0 00008060 2**2 ALLOC - 10 ._user_heap_stack 00000600 200006f0 080066c0 000086f0 2**0 + 10 ._user_heap_stack 00000600 200006b0 08006fb0 000086b0 2**0 ALLOC 11 .ARM.attributes 00000029 00000000 00000000 00008060 2**0 CONTENTS, READONLY - 12 .debug_info 00013f39 00000000 00000000 00008089 2**0 + 12 .debug_info 00013ed4 00000000 00000000 00008089 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 13 .debug_abbrev 00003341 00000000 00000000 0001bfc2 2**0 + 13 .debug_abbrev 00003341 00000000 00000000 0001bf5d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_aranges 000012c0 00000000 00000000 0001f308 2**3 + 14 .debug_aranges 000012b8 00000000 00000000 0001f2a0 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_rnglists 00000eb7 00000000 00000000 000205c8 2**0 + 15 .debug_rnglists 00000eb1 00000000 00000000 00020558 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_macro 0001a5e6 00000000 00000000 0002147f 2**0 + 16 .debug_macro 0001a5df 00000000 00000000 00021409 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_line 00017e9c 00000000 00000000 0003ba65 2**0 + 17 .debug_line 00017e78 00000000 00000000 0003b9e8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_str 00095ea1 00000000 00000000 00053901 2**0 + 18 .debug_str 00095e2f 00000000 00000000 00053860 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .comment 00000043 00000000 00000000 000e97a2 2**0 + 19 .comment 00000043 00000000 00000000 000e968f 2**0 CONTENTS, READONLY - 20 .debug_frame 00004dd0 00000000 00000000 000e97e8 2**2 + 20 .debug_frame 00004f70 00000000 00000000 000e96d4 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 21 .debug_line_str 00000052 00000000 00000000 000ee5b8 2**0 + 21 .debug_line_str 00000052 00000000 00000000 000ee644 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -64,7 +64,7 @@ Disassembly of section .text: 8000122: bd10 pop {r4, pc} 8000124: 20000060 .word 0x20000060 8000128: 00000000 .word 0x00000000 - 800012c: 080064fc .word 0x080064fc + 800012c: 08006dec .word 0x08006dec 08000130 : 8000130: b508 push {r3, lr} @@ -76,7 +76,7 @@ Disassembly of section .text: 800013e: bd08 pop {r3, pc} 8000140: 00000000 .word 0x00000000 8000144: 20000064 .word 0x20000064 - 8000148: 080064fc .word 0x080064fc + 8000148: 08006dec .word 0x08006dec 0800014c : 800014c: 4603 mov r3, r0 @@ -87,16815 +87,17706 @@ Disassembly of section .text: 8000158: 3801 subs r0, #1 800015a: 4770 bx lr -0800015c <__aeabi_frsub>: - 800015c: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 - 8000160: e002 b.n 8000168 <__addsf3> - 8000162: bf00 nop - -08000164 <__aeabi_fsub>: - 8000164: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 - -08000168 <__addsf3>: - 8000168: 0042 lsls r2, r0, #1 - 800016a: bf1f itttt ne - 800016c: ea5f 0341 movsne.w r3, r1, lsl #1 - 8000170: ea92 0f03 teqne r2, r3 - 8000174: ea7f 6c22 mvnsne.w ip, r2, asr #24 - 8000178: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 800017c: d06a beq.n 8000254 <__addsf3+0xec> - 800017e: ea4f 6212 mov.w r2, r2, lsr #24 - 8000182: ebd2 6313 rsbs r3, r2, r3, lsr #24 - 8000186: bfc1 itttt gt - 8000188: 18d2 addgt r2, r2, r3 - 800018a: 4041 eorgt r1, r0 - 800018c: 4048 eorgt r0, r1 - 800018e: 4041 eorgt r1, r0 - 8000190: bfb8 it lt - 8000192: 425b neglt r3, r3 - 8000194: 2b19 cmp r3, #25 - 8000196: bf88 it hi - 8000198: 4770 bxhi lr - 800019a: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 - 800019e: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 80001a2: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 - 80001a6: bf18 it ne - 80001a8: 4240 negne r0, r0 - 80001aa: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 - 80001ae: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 - 80001b2: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 - 80001b6: bf18 it ne - 80001b8: 4249 negne r1, r1 - 80001ba: ea92 0f03 teq r2, r3 - 80001be: d03f beq.n 8000240 <__addsf3+0xd8> - 80001c0: f1a2 0201 sub.w r2, r2, #1 - 80001c4: fa41 fc03 asr.w ip, r1, r3 - 80001c8: eb10 000c adds.w r0, r0, ip - 80001cc: f1c3 0320 rsb r3, r3, #32 - 80001d0: fa01 f103 lsl.w r1, r1, r3 - 80001d4: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 - 80001d8: d502 bpl.n 80001e0 <__addsf3+0x78> - 80001da: 4249 negs r1, r1 - 80001dc: eb60 0040 sbc.w r0, r0, r0, lsl #1 - 80001e0: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 - 80001e4: d313 bcc.n 800020e <__addsf3+0xa6> - 80001e6: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 - 80001ea: d306 bcc.n 80001fa <__addsf3+0x92> - 80001ec: 0840 lsrs r0, r0, #1 - 80001ee: ea4f 0131 mov.w r1, r1, rrx - 80001f2: f102 0201 add.w r2, r2, #1 - 80001f6: 2afe cmp r2, #254 @ 0xfe - 80001f8: d251 bcs.n 800029e <__addsf3+0x136> - 80001fa: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 - 80001fe: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 8000202: bf08 it eq - 8000204: f020 0001 biceq.w r0, r0, #1 - 8000208: ea40 0003 orr.w r0, r0, r3 - 800020c: 4770 bx lr - 800020e: 0049 lsls r1, r1, #1 - 8000210: eb40 0000 adc.w r0, r0, r0 - 8000214: 3a01 subs r2, #1 - 8000216: bf28 it cs - 8000218: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 - 800021c: d2ed bcs.n 80001fa <__addsf3+0x92> - 800021e: fab0 fc80 clz ip, r0 - 8000222: f1ac 0c08 sub.w ip, ip, #8 - 8000226: ebb2 020c subs.w r2, r2, ip - 800022a: fa00 f00c lsl.w r0, r0, ip - 800022e: bfaa itet ge - 8000230: eb00 50c2 addge.w r0, r0, r2, lsl #23 - 8000234: 4252 neglt r2, r2 - 8000236: 4318 orrge r0, r3 - 8000238: bfbc itt lt - 800023a: 40d0 lsrlt r0, r2 - 800023c: 4318 orrlt r0, r3 - 800023e: 4770 bx lr - 8000240: f092 0f00 teq r2, #0 - 8000244: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 - 8000248: bf06 itte eq - 800024a: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 - 800024e: 3201 addeq r2, #1 - 8000250: 3b01 subne r3, #1 - 8000252: e7b5 b.n 80001c0 <__addsf3+0x58> - 8000254: ea4f 0341 mov.w r3, r1, lsl #1 - 8000258: ea7f 6c22 mvns.w ip, r2, asr #24 - 800025c: bf18 it ne - 800025e: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 8000262: d021 beq.n 80002a8 <__addsf3+0x140> - 8000264: ea92 0f03 teq r2, r3 - 8000268: d004 beq.n 8000274 <__addsf3+0x10c> - 800026a: f092 0f00 teq r2, #0 - 800026e: bf08 it eq - 8000270: 4608 moveq r0, r1 - 8000272: 4770 bx lr - 8000274: ea90 0f01 teq r0, r1 - 8000278: bf1c itt ne - 800027a: 2000 movne r0, #0 - 800027c: 4770 bxne lr - 800027e: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 - 8000282: d104 bne.n 800028e <__addsf3+0x126> - 8000284: 0040 lsls r0, r0, #1 - 8000286: bf28 it cs - 8000288: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 - 800028c: 4770 bx lr - 800028e: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 - 8000292: bf3c itt cc - 8000294: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 - 8000298: 4770 bxcc lr - 800029a: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 - 800029e: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 - 80002a2: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 80002a6: 4770 bx lr - 80002a8: ea7f 6222 mvns.w r2, r2, asr #24 - 80002ac: bf16 itet ne - 80002ae: 4608 movne r0, r1 - 80002b0: ea7f 6323 mvnseq.w r3, r3, asr #24 - 80002b4: 4601 movne r1, r0 - 80002b6: 0242 lsls r2, r0, #9 - 80002b8: bf06 itte eq - 80002ba: ea5f 2341 movseq.w r3, r1, lsl #9 - 80002be: ea90 0f01 teqeq r0, r1 - 80002c2: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 - 80002c6: 4770 bx lr - -080002c8 <__aeabi_ui2f>: - 80002c8: f04f 0300 mov.w r3, #0 - 80002cc: e004 b.n 80002d8 <__aeabi_i2f+0x8> - 80002ce: bf00 nop - -080002d0 <__aeabi_i2f>: - 80002d0: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 - 80002d4: bf48 it mi - 80002d6: 4240 negmi r0, r0 - 80002d8: ea5f 0c00 movs.w ip, r0 - 80002dc: bf08 it eq - 80002de: 4770 bxeq lr - 80002e0: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 - 80002e4: 4601 mov r1, r0 - 80002e6: f04f 0000 mov.w r0, #0 - 80002ea: e01c b.n 8000326 <__aeabi_l2f+0x2a> - -080002ec <__aeabi_ul2f>: - 80002ec: ea50 0201 orrs.w r2, r0, r1 +0800015c <__aeabi_dmul>: + 800015c: b570 push {r4, r5, r6, lr} + 800015e: f04f 0cff mov.w ip, #255 @ 0xff + 8000162: f44c 6ce0 orr.w ip, ip, #1792 @ 0x700 + 8000166: ea1c 5411 ands.w r4, ip, r1, lsr #20 + 800016a: bf1d ittte ne + 800016c: ea1c 5513 andsne.w r5, ip, r3, lsr #20 + 8000170: ea94 0f0c teqne r4, ip + 8000174: ea95 0f0c teqne r5, ip + 8000178: f000 f8de bleq 8000338 <__aeabi_dmul+0x1dc> + 800017c: 442c add r4, r5 + 800017e: ea81 0603 eor.w r6, r1, r3 + 8000182: ea21 514c bic.w r1, r1, ip, lsl #21 + 8000186: ea23 534c bic.w r3, r3, ip, lsl #21 + 800018a: ea50 3501 orrs.w r5, r0, r1, lsl #12 + 800018e: bf18 it ne + 8000190: ea52 3503 orrsne.w r5, r2, r3, lsl #12 + 8000194: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 + 8000198: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 + 800019c: d038 beq.n 8000210 <__aeabi_dmul+0xb4> + 800019e: fba0 ce02 umull ip, lr, r0, r2 + 80001a2: f04f 0500 mov.w r5, #0 + 80001a6: fbe1 e502 umlal lr, r5, r1, r2 + 80001aa: f006 4200 and.w r2, r6, #2147483648 @ 0x80000000 + 80001ae: fbe0 e503 umlal lr, r5, r0, r3 + 80001b2: f04f 0600 mov.w r6, #0 + 80001b6: fbe1 5603 umlal r5, r6, r1, r3 + 80001ba: f09c 0f00 teq ip, #0 + 80001be: bf18 it ne + 80001c0: f04e 0e01 orrne.w lr, lr, #1 + 80001c4: f1a4 04ff sub.w r4, r4, #255 @ 0xff + 80001c8: f5b6 7f00 cmp.w r6, #512 @ 0x200 + 80001cc: f564 7440 sbc.w r4, r4, #768 @ 0x300 + 80001d0: d204 bcs.n 80001dc <__aeabi_dmul+0x80> + 80001d2: ea5f 0e4e movs.w lr, lr, lsl #1 + 80001d6: 416d adcs r5, r5 + 80001d8: eb46 0606 adc.w r6, r6, r6 + 80001dc: ea42 21c6 orr.w r1, r2, r6, lsl #11 + 80001e0: ea41 5155 orr.w r1, r1, r5, lsr #21 + 80001e4: ea4f 20c5 mov.w r0, r5, lsl #11 + 80001e8: ea40 505e orr.w r0, r0, lr, lsr #21 + 80001ec: ea4f 2ece mov.w lr, lr, lsl #11 + 80001f0: f1b4 0cfd subs.w ip, r4, #253 @ 0xfd + 80001f4: bf88 it hi + 80001f6: f5bc 6fe0 cmphi.w ip, #1792 @ 0x700 + 80001fa: d81e bhi.n 800023a <__aeabi_dmul+0xde> + 80001fc: f1be 4f00 cmp.w lr, #2147483648 @ 0x80000000 + 8000200: bf08 it eq + 8000202: ea5f 0e50 movseq.w lr, r0, lsr #1 + 8000206: f150 0000 adcs.w r0, r0, #0 + 800020a: eb41 5104 adc.w r1, r1, r4, lsl #20 + 800020e: bd70 pop {r4, r5, r6, pc} + 8000210: f006 4600 and.w r6, r6, #2147483648 @ 0x80000000 + 8000214: ea46 0101 orr.w r1, r6, r1 + 8000218: ea40 0002 orr.w r0, r0, r2 + 800021c: ea81 0103 eor.w r1, r1, r3 + 8000220: ebb4 045c subs.w r4, r4, ip, lsr #1 + 8000224: bfc2 ittt gt + 8000226: ebd4 050c rsbsgt r5, r4, ip + 800022a: ea41 5104 orrgt.w r1, r1, r4, lsl #20 + 800022e: bd70 popgt {r4, r5, r6, pc} + 8000230: f441 1180 orr.w r1, r1, #1048576 @ 0x100000 + 8000234: f04f 0e00 mov.w lr, #0 + 8000238: 3c01 subs r4, #1 + 800023a: f300 80ab bgt.w 8000394 <__aeabi_dmul+0x238> + 800023e: f114 0f36 cmn.w r4, #54 @ 0x36 + 8000242: bfde ittt le + 8000244: 2000 movle r0, #0 + 8000246: f001 4100 andle.w r1, r1, #2147483648 @ 0x80000000 + 800024a: bd70 pople {r4, r5, r6, pc} + 800024c: f1c4 0400 rsb r4, r4, #0 + 8000250: 3c20 subs r4, #32 + 8000252: da35 bge.n 80002c0 <__aeabi_dmul+0x164> + 8000254: 340c adds r4, #12 + 8000256: dc1b bgt.n 8000290 <__aeabi_dmul+0x134> + 8000258: f104 0414 add.w r4, r4, #20 + 800025c: f1c4 0520 rsb r5, r4, #32 + 8000260: fa00 f305 lsl.w r3, r0, r5 + 8000264: fa20 f004 lsr.w r0, r0, r4 + 8000268: fa01 f205 lsl.w r2, r1, r5 + 800026c: ea40 0002 orr.w r0, r0, r2 + 8000270: f001 4200 and.w r2, r1, #2147483648 @ 0x80000000 + 8000274: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 + 8000278: eb10 70d3 adds.w r0, r0, r3, lsr #31 + 800027c: fa21 f604 lsr.w r6, r1, r4 + 8000280: eb42 0106 adc.w r1, r2, r6 + 8000284: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 8000288: bf08 it eq + 800028a: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 800028e: bd70 pop {r4, r5, r6, pc} + 8000290: f1c4 040c rsb r4, r4, #12 + 8000294: f1c4 0520 rsb r5, r4, #32 + 8000298: fa00 f304 lsl.w r3, r0, r4 + 800029c: fa20 f005 lsr.w r0, r0, r5 + 80002a0: fa01 f204 lsl.w r2, r1, r4 + 80002a4: ea40 0002 orr.w r0, r0, r2 + 80002a8: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 80002ac: eb10 70d3 adds.w r0, r0, r3, lsr #31 + 80002b0: f141 0100 adc.w r1, r1, #0 + 80002b4: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 + 80002b8: bf08 it eq + 80002ba: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 80002be: bd70 pop {r4, r5, r6, pc} + 80002c0: f1c4 0520 rsb r5, r4, #32 + 80002c4: fa00 f205 lsl.w r2, r0, r5 + 80002c8: ea4e 0e02 orr.w lr, lr, r2 + 80002cc: fa20 f304 lsr.w r3, r0, r4 + 80002d0: fa01 f205 lsl.w r2, r1, r5 + 80002d4: ea43 0302 orr.w r3, r3, r2 + 80002d8: fa21 f004 lsr.w r0, r1, r4 + 80002dc: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 80002e0: fa21 f204 lsr.w r2, r1, r4 + 80002e4: ea20 0002 bic.w r0, r0, r2 + 80002e8: eb00 70d3 add.w r0, r0, r3, lsr #31 + 80002ec: ea5e 0e43 orrs.w lr, lr, r3, lsl #1 80002f0: bf08 it eq - 80002f2: 4770 bxeq lr - 80002f4: f04f 0300 mov.w r3, #0 - 80002f8: e00a b.n 8000310 <__aeabi_l2f+0x14> - 80002fa: bf00 nop + 80002f2: ea20 70d3 biceq.w r0, r0, r3, lsr #31 + 80002f6: bd70 pop {r4, r5, r6, pc} + 80002f8: f094 0f00 teq r4, #0 + 80002fc: d10f bne.n 800031e <__aeabi_dmul+0x1c2> + 80002fe: f001 4600 and.w r6, r1, #2147483648 @ 0x80000000 + 8000302: 0040 lsls r0, r0, #1 + 8000304: eb41 0101 adc.w r1, r1, r1 + 8000308: f411 1f80 tst.w r1, #1048576 @ 0x100000 + 800030c: bf08 it eq + 800030e: 3c01 subeq r4, #1 + 8000310: d0f7 beq.n 8000302 <__aeabi_dmul+0x1a6> + 8000312: ea41 0106 orr.w r1, r1, r6 + 8000316: f095 0f00 teq r5, #0 + 800031a: bf18 it ne + 800031c: 4770 bxne lr + 800031e: f003 4600 and.w r6, r3, #2147483648 @ 0x80000000 + 8000322: 0052 lsls r2, r2, #1 + 8000324: eb43 0303 adc.w r3, r3, r3 + 8000328: f413 1f80 tst.w r3, #1048576 @ 0x100000 + 800032c: bf08 it eq + 800032e: 3d01 subeq r5, #1 + 8000330: d0f7 beq.n 8000322 <__aeabi_dmul+0x1c6> + 8000332: ea43 0306 orr.w r3, r3, r6 + 8000336: 4770 bx lr + 8000338: ea94 0f0c teq r4, ip + 800033c: ea0c 5513 and.w r5, ip, r3, lsr #20 + 8000340: bf18 it ne + 8000342: ea95 0f0c teqne r5, ip + 8000346: d00c beq.n 8000362 <__aeabi_dmul+0x206> + 8000348: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 800034c: bf18 it ne + 800034e: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 8000352: d1d1 bne.n 80002f8 <__aeabi_dmul+0x19c> + 8000354: ea81 0103 eor.w r1, r1, r3 + 8000358: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 800035c: f04f 0000 mov.w r0, #0 + 8000360: bd70 pop {r4, r5, r6, pc} + 8000362: ea50 0641 orrs.w r6, r0, r1, lsl #1 + 8000366: bf06 itte eq + 8000368: 4610 moveq r0, r2 + 800036a: 4619 moveq r1, r3 + 800036c: ea52 0643 orrsne.w r6, r2, r3, lsl #1 + 8000370: d019 beq.n 80003a6 <__aeabi_dmul+0x24a> + 8000372: ea94 0f0c teq r4, ip + 8000376: d102 bne.n 800037e <__aeabi_dmul+0x222> + 8000378: ea50 3601 orrs.w r6, r0, r1, lsl #12 + 800037c: d113 bne.n 80003a6 <__aeabi_dmul+0x24a> + 800037e: ea95 0f0c teq r5, ip + 8000382: d105 bne.n 8000390 <__aeabi_dmul+0x234> + 8000384: ea52 3603 orrs.w r6, r2, r3, lsl #12 + 8000388: bf1c itt ne + 800038a: 4610 movne r0, r2 + 800038c: 4619 movne r1, r3 + 800038e: d10a bne.n 80003a6 <__aeabi_dmul+0x24a> + 8000390: ea81 0103 eor.w r1, r1, r3 + 8000394: f001 4100 and.w r1, r1, #2147483648 @ 0x80000000 + 8000398: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 + 800039c: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 + 80003a0: f04f 0000 mov.w r0, #0 + 80003a4: bd70 pop {r4, r5, r6, pc} + 80003a6: f041 41fe orr.w r1, r1, #2130706432 @ 0x7f000000 + 80003aa: f441 0178 orr.w r1, r1, #16252928 @ 0xf80000 + 80003ae: bd70 pop {r4, r5, r6, pc} -080002fc <__aeabi_l2f>: - 80002fc: ea50 0201 orrs.w r2, r0, r1 - 8000300: bf08 it eq - 8000302: 4770 bxeq lr - 8000304: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 - 8000308: d502 bpl.n 8000310 <__aeabi_l2f+0x14> - 800030a: 4240 negs r0, r0 - 800030c: eb61 0141 sbc.w r1, r1, r1, lsl #1 - 8000310: ea5f 0c01 movs.w ip, r1 - 8000314: bf02 ittt eq - 8000316: 4684 moveq ip, r0 - 8000318: 4601 moveq r1, r0 - 800031a: 2000 moveq r0, #0 - 800031c: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 - 8000320: bf08 it eq - 8000322: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 - 8000326: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 - 800032a: fabc f28c clz r2, ip - 800032e: 3a08 subs r2, #8 - 8000330: eba3 53c2 sub.w r3, r3, r2, lsl #23 - 8000334: db10 blt.n 8000358 <__aeabi_l2f+0x5c> - 8000336: fa01 fc02 lsl.w ip, r1, r2 - 800033a: 4463 add r3, ip - 800033c: fa00 fc02 lsl.w ip, r0, r2 - 8000340: f1c2 0220 rsb r2, r2, #32 - 8000344: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 - 8000348: fa20 f202 lsr.w r2, r0, r2 - 800034c: eb43 0002 adc.w r0, r3, r2 - 8000350: bf08 it eq - 8000352: f020 0001 biceq.w r0, r0, #1 - 8000356: 4770 bx lr - 8000358: f102 0220 add.w r2, r2, #32 - 800035c: fa01 fc02 lsl.w ip, r1, r2 - 8000360: f1c2 0220 rsb r2, r2, #32 - 8000364: ea50 004c orrs.w r0, r0, ip, lsl #1 - 8000368: fa21 f202 lsr.w r2, r1, r2 - 800036c: eb43 0002 adc.w r0, r3, r2 - 8000370: bf08 it eq - 8000372: ea20 70dc biceq.w r0, r0, ip, lsr #31 - 8000376: 4770 bx lr +080003b0 <__aeabi_drsub>: + 80003b0: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 + 80003b4: e002 b.n 80003bc <__adddf3> + 80003b6: bf00 nop -08000378 <__aeabi_fmul>: - 8000378: f04f 0cff mov.w ip, #255 @ 0xff - 800037c: ea1c 52d0 ands.w r2, ip, r0, lsr #23 - 8000380: bf1e ittt ne - 8000382: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 - 8000386: ea92 0f0c teqne r2, ip - 800038a: ea93 0f0c teqne r3, ip - 800038e: d06f beq.n 8000470 <__aeabi_fmul+0xf8> - 8000390: 441a add r2, r3 - 8000392: ea80 0c01 eor.w ip, r0, r1 - 8000396: 0240 lsls r0, r0, #9 - 8000398: bf18 it ne - 800039a: ea5f 2141 movsne.w r1, r1, lsl #9 - 800039e: d01e beq.n 80003de <__aeabi_fmul+0x66> - 80003a0: f04f 6300 mov.w r3, #134217728 @ 0x8000000 - 80003a4: ea43 1050 orr.w r0, r3, r0, lsr #5 - 80003a8: ea43 1151 orr.w r1, r3, r1, lsr #5 - 80003ac: fba0 3101 umull r3, r1, r0, r1 - 80003b0: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 - 80003b4: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 - 80003b8: bf3e ittt cc - 80003ba: 0049 lslcc r1, r1, #1 - 80003bc: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 - 80003c0: 005b lslcc r3, r3, #1 - 80003c2: ea40 0001 orr.w r0, r0, r1 - 80003c6: f162 027f sbc.w r2, r2, #127 @ 0x7f - 80003ca: 2afd cmp r2, #253 @ 0xfd - 80003cc: d81d bhi.n 800040a <__aeabi_fmul+0x92> - 80003ce: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 - 80003d2: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 80003d6: bf08 it eq - 80003d8: f020 0001 biceq.w r0, r0, #1 - 80003dc: 4770 bx lr - 80003de: f090 0f00 teq r0, #0 - 80003e2: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 - 80003e6: bf08 it eq - 80003e8: 0249 lsleq r1, r1, #9 - 80003ea: ea4c 2050 orr.w r0, ip, r0, lsr #9 - 80003ee: ea40 2051 orr.w r0, r0, r1, lsr #9 - 80003f2: 3a7f subs r2, #127 @ 0x7f - 80003f4: bfc2 ittt gt - 80003f6: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff - 80003fa: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 - 80003fe: 4770 bxgt lr - 8000400: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 8000404: f04f 0300 mov.w r3, #0 - 8000408: 3a01 subs r2, #1 - 800040a: dc5d bgt.n 80004c8 <__aeabi_fmul+0x150> - 800040c: f112 0f19 cmn.w r2, #25 - 8000410: bfdc itt le - 8000412: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 - 8000416: 4770 bxle lr - 8000418: f1c2 0200 rsb r2, r2, #0 - 800041c: 0041 lsls r1, r0, #1 - 800041e: fa21 f102 lsr.w r1, r1, r2 - 8000422: f1c2 0220 rsb r2, r2, #32 - 8000426: fa00 fc02 lsl.w ip, r0, r2 - 800042a: ea5f 0031 movs.w r0, r1, rrx - 800042e: f140 0000 adc.w r0, r0, #0 - 8000432: ea53 034c orrs.w r3, r3, ip, lsl #1 - 8000436: bf08 it eq - 8000438: ea20 70dc biceq.w r0, r0, ip, lsr #31 - 800043c: 4770 bx lr - 800043e: f092 0f00 teq r2, #0 - 8000442: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 - 8000446: bf02 ittt eq - 8000448: 0040 lsleq r0, r0, #1 - 800044a: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 - 800044e: 3a01 subeq r2, #1 - 8000450: d0f9 beq.n 8000446 <__aeabi_fmul+0xce> - 8000452: ea40 000c orr.w r0, r0, ip - 8000456: f093 0f00 teq r3, #0 - 800045a: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 - 800045e: bf02 ittt eq - 8000460: 0049 lsleq r1, r1, #1 - 8000462: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 - 8000466: 3b01 subeq r3, #1 - 8000468: d0f9 beq.n 800045e <__aeabi_fmul+0xe6> - 800046a: ea41 010c orr.w r1, r1, ip - 800046e: e78f b.n 8000390 <__aeabi_fmul+0x18> - 8000470: ea0c 53d1 and.w r3, ip, r1, lsr #23 - 8000474: ea92 0f0c teq r2, ip - 8000478: bf18 it ne - 800047a: ea93 0f0c teqne r3, ip - 800047e: d00a beq.n 8000496 <__aeabi_fmul+0x11e> - 8000480: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 - 8000484: bf18 it ne - 8000486: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 - 800048a: d1d8 bne.n 800043e <__aeabi_fmul+0xc6> - 800048c: ea80 0001 eor.w r0, r0, r1 - 8000490: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 - 8000494: 4770 bx lr - 8000496: f090 0f00 teq r0, #0 - 800049a: bf17 itett ne - 800049c: f090 4f00 teqne r0, #2147483648 @ 0x80000000 - 80004a0: 4608 moveq r0, r1 - 80004a2: f091 0f00 teqne r1, #0 - 80004a6: f091 4f00 teqne r1, #2147483648 @ 0x80000000 - 80004aa: d014 beq.n 80004d6 <__aeabi_fmul+0x15e> - 80004ac: ea92 0f0c teq r2, ip - 80004b0: d101 bne.n 80004b6 <__aeabi_fmul+0x13e> - 80004b2: 0242 lsls r2, r0, #9 - 80004b4: d10f bne.n 80004d6 <__aeabi_fmul+0x15e> - 80004b6: ea93 0f0c teq r3, ip - 80004ba: d103 bne.n 80004c4 <__aeabi_fmul+0x14c> - 80004bc: 024b lsls r3, r1, #9 - 80004be: bf18 it ne - 80004c0: 4608 movne r0, r1 - 80004c2: d108 bne.n 80004d6 <__aeabi_fmul+0x15e> - 80004c4: ea80 0001 eor.w r0, r0, r1 - 80004c8: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 - 80004cc: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 - 80004d0: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 80004d4: 4770 bx lr - 80004d6: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 - 80004da: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 - 80004de: 4770 bx lr +080003b8 <__aeabi_dsub>: + 80003b8: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000 -080004e0 <__aeabi_fdiv>: - 80004e0: f04f 0cff mov.w ip, #255 @ 0xff - 80004e4: ea1c 52d0 ands.w r2, ip, r0, lsr #23 - 80004e8: bf1e ittt ne - 80004ea: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 - 80004ee: ea92 0f0c teqne r2, ip - 80004f2: ea93 0f0c teqne r3, ip - 80004f6: d069 beq.n 80005cc <__aeabi_fdiv+0xec> - 80004f8: eba2 0203 sub.w r2, r2, r3 - 80004fc: ea80 0c01 eor.w ip, r0, r1 - 8000500: 0249 lsls r1, r1, #9 - 8000502: ea4f 2040 mov.w r0, r0, lsl #9 - 8000506: d037 beq.n 8000578 <__aeabi_fdiv+0x98> - 8000508: f04f 5380 mov.w r3, #268435456 @ 0x10000000 - 800050c: ea43 1111 orr.w r1, r3, r1, lsr #4 - 8000510: ea43 1310 orr.w r3, r3, r0, lsr #4 - 8000514: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 - 8000518: 428b cmp r3, r1 - 800051a: bf38 it cc - 800051c: 005b lslcc r3, r3, #1 - 800051e: f142 027d adc.w r2, r2, #125 @ 0x7d - 8000522: f44f 0c00 mov.w ip, #8388608 @ 0x800000 - 8000526: 428b cmp r3, r1 - 8000528: bf24 itt cs - 800052a: 1a5b subcs r3, r3, r1 - 800052c: ea40 000c orrcs.w r0, r0, ip - 8000530: ebb3 0f51 cmp.w r3, r1, lsr #1 - 8000534: bf24 itt cs - 8000536: eba3 0351 subcs.w r3, r3, r1, lsr #1 - 800053a: ea40 005c orrcs.w r0, r0, ip, lsr #1 - 800053e: ebb3 0f91 cmp.w r3, r1, lsr #2 - 8000542: bf24 itt cs - 8000544: eba3 0391 subcs.w r3, r3, r1, lsr #2 - 8000548: ea40 009c orrcs.w r0, r0, ip, lsr #2 - 800054c: ebb3 0fd1 cmp.w r3, r1, lsr #3 - 8000550: bf24 itt cs - 8000552: eba3 03d1 subcs.w r3, r3, r1, lsr #3 - 8000556: ea40 00dc orrcs.w r0, r0, ip, lsr #3 - 800055a: 011b lsls r3, r3, #4 - 800055c: bf18 it ne - 800055e: ea5f 1c1c movsne.w ip, ip, lsr #4 - 8000562: d1e0 bne.n 8000526 <__aeabi_fdiv+0x46> - 8000564: 2afd cmp r2, #253 @ 0xfd - 8000566: f63f af50 bhi.w 800040a <__aeabi_fmul+0x92> - 800056a: 428b cmp r3, r1 - 800056c: eb40 50c2 adc.w r0, r0, r2, lsl #23 - 8000570: bf08 it eq - 8000572: f020 0001 biceq.w r0, r0, #1 - 8000576: 4770 bx lr - 8000578: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 - 800057c: ea4c 2050 orr.w r0, ip, r0, lsr #9 - 8000580: 327f adds r2, #127 @ 0x7f - 8000582: bfc2 ittt gt - 8000584: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff - 8000588: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 - 800058c: 4770 bxgt lr - 800058e: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 - 8000592: f04f 0300 mov.w r3, #0 - 8000596: 3a01 subs r2, #1 - 8000598: e737 b.n 800040a <__aeabi_fmul+0x92> - 800059a: f092 0f00 teq r2, #0 - 800059e: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 - 80005a2: bf02 ittt eq - 80005a4: 0040 lsleq r0, r0, #1 - 80005a6: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 - 80005aa: 3a01 subeq r2, #1 - 80005ac: d0f9 beq.n 80005a2 <__aeabi_fdiv+0xc2> - 80005ae: ea40 000c orr.w r0, r0, ip - 80005b2: f093 0f00 teq r3, #0 - 80005b6: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 - 80005ba: bf02 ittt eq - 80005bc: 0049 lsleq r1, r1, #1 - 80005be: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 - 80005c2: 3b01 subeq r3, #1 - 80005c4: d0f9 beq.n 80005ba <__aeabi_fdiv+0xda> - 80005c6: ea41 010c orr.w r1, r1, ip - 80005ca: e795 b.n 80004f8 <__aeabi_fdiv+0x18> - 80005cc: ea0c 53d1 and.w r3, ip, r1, lsr #23 - 80005d0: ea92 0f0c teq r2, ip - 80005d4: d108 bne.n 80005e8 <__aeabi_fdiv+0x108> - 80005d6: 0242 lsls r2, r0, #9 - 80005d8: f47f af7d bne.w 80004d6 <__aeabi_fmul+0x15e> - 80005dc: ea93 0f0c teq r3, ip - 80005e0: f47f af70 bne.w 80004c4 <__aeabi_fmul+0x14c> - 80005e4: 4608 mov r0, r1 - 80005e6: e776 b.n 80004d6 <__aeabi_fmul+0x15e> - 80005e8: ea93 0f0c teq r3, ip - 80005ec: d104 bne.n 80005f8 <__aeabi_fdiv+0x118> - 80005ee: 024b lsls r3, r1, #9 - 80005f0: f43f af4c beq.w 800048c <__aeabi_fmul+0x114> - 80005f4: 4608 mov r0, r1 - 80005f6: e76e b.n 80004d6 <__aeabi_fmul+0x15e> - 80005f8: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 - 80005fc: bf18 it ne - 80005fe: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 - 8000602: d1ca bne.n 800059a <__aeabi_fdiv+0xba> - 8000604: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 - 8000608: f47f af5c bne.w 80004c4 <__aeabi_fmul+0x14c> - 800060c: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 - 8000610: f47f af3c bne.w 800048c <__aeabi_fmul+0x114> - 8000614: e75f b.n 80004d6 <__aeabi_fmul+0x15e> - 8000616: bf00 nop +080003bc <__adddf3>: + 80003bc: b530 push {r4, r5, lr} + 80003be: ea4f 0441 mov.w r4, r1, lsl #1 + 80003c2: ea4f 0543 mov.w r5, r3, lsl #1 + 80003c6: ea94 0f05 teq r4, r5 + 80003ca: bf08 it eq + 80003cc: ea90 0f02 teqeq r0, r2 + 80003d0: bf1f itttt ne + 80003d2: ea54 0c00 orrsne.w ip, r4, r0 + 80003d6: ea55 0c02 orrsne.w ip, r5, r2 + 80003da: ea7f 5c64 mvnsne.w ip, r4, asr #21 + 80003de: ea7f 5c65 mvnsne.w ip, r5, asr #21 + 80003e2: f000 80e2 beq.w 80005aa <__adddf3+0x1ee> + 80003e6: ea4f 5454 mov.w r4, r4, lsr #21 + 80003ea: ebd4 5555 rsbs r5, r4, r5, lsr #21 + 80003ee: bfb8 it lt + 80003f0: 426d neglt r5, r5 + 80003f2: dd0c ble.n 800040e <__adddf3+0x52> + 80003f4: 442c add r4, r5 + 80003f6: ea80 0202 eor.w r2, r0, r2 + 80003fa: ea81 0303 eor.w r3, r1, r3 + 80003fe: ea82 0000 eor.w r0, r2, r0 + 8000402: ea83 0101 eor.w r1, r3, r1 + 8000406: ea80 0202 eor.w r2, r0, r2 + 800040a: ea81 0303 eor.w r3, r1, r3 + 800040e: 2d36 cmp r5, #54 @ 0x36 + 8000410: bf88 it hi + 8000412: bd30 pophi {r4, r5, pc} + 8000414: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 + 8000418: ea4f 3101 mov.w r1, r1, lsl #12 + 800041c: f44f 1c80 mov.w ip, #1048576 @ 0x100000 + 8000420: ea4c 3111 orr.w r1, ip, r1, lsr #12 + 8000424: d002 beq.n 800042c <__adddf3+0x70> + 8000426: 4240 negs r0, r0 + 8000428: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 800042c: f013 4f00 tst.w r3, #2147483648 @ 0x80000000 + 8000430: ea4f 3303 mov.w r3, r3, lsl #12 + 8000434: ea4c 3313 orr.w r3, ip, r3, lsr #12 + 8000438: d002 beq.n 8000440 <__adddf3+0x84> + 800043a: 4252 negs r2, r2 + 800043c: eb63 0343 sbc.w r3, r3, r3, lsl #1 + 8000440: ea94 0f05 teq r4, r5 + 8000444: f000 80a7 beq.w 8000596 <__adddf3+0x1da> + 8000448: f1a4 0401 sub.w r4, r4, #1 + 800044c: f1d5 0e20 rsbs lr, r5, #32 + 8000450: db0d blt.n 800046e <__adddf3+0xb2> + 8000452: fa02 fc0e lsl.w ip, r2, lr + 8000456: fa22 f205 lsr.w r2, r2, r5 + 800045a: 1880 adds r0, r0, r2 + 800045c: f141 0100 adc.w r1, r1, #0 + 8000460: fa03 f20e lsl.w r2, r3, lr + 8000464: 1880 adds r0, r0, r2 + 8000466: fa43 f305 asr.w r3, r3, r5 + 800046a: 4159 adcs r1, r3 + 800046c: e00e b.n 800048c <__adddf3+0xd0> + 800046e: f1a5 0520 sub.w r5, r5, #32 + 8000472: f10e 0e20 add.w lr, lr, #32 + 8000476: 2a01 cmp r2, #1 + 8000478: fa03 fc0e lsl.w ip, r3, lr + 800047c: bf28 it cs + 800047e: f04c 0c02 orrcs.w ip, ip, #2 + 8000482: fa43 f305 asr.w r3, r3, r5 + 8000486: 18c0 adds r0, r0, r3 + 8000488: eb51 71e3 adcs.w r1, r1, r3, asr #31 + 800048c: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 + 8000490: d507 bpl.n 80004a2 <__adddf3+0xe6> + 8000492: f04f 0e00 mov.w lr, #0 + 8000496: f1dc 0c00 rsbs ip, ip, #0 + 800049a: eb7e 0000 sbcs.w r0, lr, r0 + 800049e: eb6e 0101 sbc.w r1, lr, r1 + 80004a2: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000 + 80004a6: d31b bcc.n 80004e0 <__adddf3+0x124> + 80004a8: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000 + 80004ac: d30c bcc.n 80004c8 <__adddf3+0x10c> + 80004ae: 0849 lsrs r1, r1, #1 + 80004b0: ea5f 0030 movs.w r0, r0, rrx + 80004b4: ea4f 0c3c mov.w ip, ip, rrx + 80004b8: f104 0401 add.w r4, r4, #1 + 80004bc: ea4f 5244 mov.w r2, r4, lsl #21 + 80004c0: f512 0f80 cmn.w r2, #4194304 @ 0x400000 + 80004c4: f080 809a bcs.w 80005fc <__adddf3+0x240> + 80004c8: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 + 80004cc: bf08 it eq + 80004ce: ea5f 0c50 movseq.w ip, r0, lsr #1 + 80004d2: f150 0000 adcs.w r0, r0, #0 + 80004d6: eb41 5104 adc.w r1, r1, r4, lsl #20 + 80004da: ea41 0105 orr.w r1, r1, r5 + 80004de: bd30 pop {r4, r5, pc} + 80004e0: ea5f 0c4c movs.w ip, ip, lsl #1 + 80004e4: 4140 adcs r0, r0 + 80004e6: eb41 0101 adc.w r1, r1, r1 + 80004ea: 3c01 subs r4, #1 + 80004ec: bf28 it cs + 80004ee: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000 + 80004f2: d2e9 bcs.n 80004c8 <__adddf3+0x10c> + 80004f4: f091 0f00 teq r1, #0 + 80004f8: bf04 itt eq + 80004fa: 4601 moveq r1, r0 + 80004fc: 2000 moveq r0, #0 + 80004fe: fab1 f381 clz r3, r1 + 8000502: bf08 it eq + 8000504: 3320 addeq r3, #32 + 8000506: f1a3 030b sub.w r3, r3, #11 + 800050a: f1b3 0220 subs.w r2, r3, #32 + 800050e: da0c bge.n 800052a <__adddf3+0x16e> + 8000510: 320c adds r2, #12 + 8000512: dd08 ble.n 8000526 <__adddf3+0x16a> + 8000514: f102 0c14 add.w ip, r2, #20 + 8000518: f1c2 020c rsb r2, r2, #12 + 800051c: fa01 f00c lsl.w r0, r1, ip + 8000520: fa21 f102 lsr.w r1, r1, r2 + 8000524: e00c b.n 8000540 <__adddf3+0x184> + 8000526: f102 0214 add.w r2, r2, #20 + 800052a: bfd8 it le + 800052c: f1c2 0c20 rsble ip, r2, #32 + 8000530: fa01 f102 lsl.w r1, r1, r2 + 8000534: fa20 fc0c lsr.w ip, r0, ip + 8000538: bfdc itt le + 800053a: ea41 010c orrle.w r1, r1, ip + 800053e: 4090 lslle r0, r2 + 8000540: 1ae4 subs r4, r4, r3 + 8000542: bfa2 ittt ge + 8000544: eb01 5104 addge.w r1, r1, r4, lsl #20 + 8000548: 4329 orrge r1, r5 + 800054a: bd30 popge {r4, r5, pc} + 800054c: ea6f 0404 mvn.w r4, r4 + 8000550: 3c1f subs r4, #31 + 8000552: da1c bge.n 800058e <__adddf3+0x1d2> + 8000554: 340c adds r4, #12 + 8000556: dc0e bgt.n 8000576 <__adddf3+0x1ba> + 8000558: f104 0414 add.w r4, r4, #20 + 800055c: f1c4 0220 rsb r2, r4, #32 + 8000560: fa20 f004 lsr.w r0, r0, r4 + 8000564: fa01 f302 lsl.w r3, r1, r2 + 8000568: ea40 0003 orr.w r0, r0, r3 + 800056c: fa21 f304 lsr.w r3, r1, r4 + 8000570: ea45 0103 orr.w r1, r5, r3 + 8000574: bd30 pop {r4, r5, pc} + 8000576: f1c4 040c rsb r4, r4, #12 + 800057a: f1c4 0220 rsb r2, r4, #32 + 800057e: fa20 f002 lsr.w r0, r0, r2 + 8000582: fa01 f304 lsl.w r3, r1, r4 + 8000586: ea40 0003 orr.w r0, r0, r3 + 800058a: 4629 mov r1, r5 + 800058c: bd30 pop {r4, r5, pc} + 800058e: fa21 f004 lsr.w r0, r1, r4 + 8000592: 4629 mov r1, r5 + 8000594: bd30 pop {r4, r5, pc} + 8000596: f094 0f00 teq r4, #0 + 800059a: f483 1380 eor.w r3, r3, #1048576 @ 0x100000 + 800059e: bf06 itte eq + 80005a0: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000 + 80005a4: 3401 addeq r4, #1 + 80005a6: 3d01 subne r5, #1 + 80005a8: e74e b.n 8000448 <__adddf3+0x8c> + 80005aa: ea7f 5c64 mvns.w ip, r4, asr #21 + 80005ae: bf18 it ne + 80005b0: ea7f 5c65 mvnsne.w ip, r5, asr #21 + 80005b4: d029 beq.n 800060a <__adddf3+0x24e> + 80005b6: ea94 0f05 teq r4, r5 + 80005ba: bf08 it eq + 80005bc: ea90 0f02 teqeq r0, r2 + 80005c0: d005 beq.n 80005ce <__adddf3+0x212> + 80005c2: ea54 0c00 orrs.w ip, r4, r0 + 80005c6: bf04 itt eq + 80005c8: 4619 moveq r1, r3 + 80005ca: 4610 moveq r0, r2 + 80005cc: bd30 pop {r4, r5, pc} + 80005ce: ea91 0f03 teq r1, r3 + 80005d2: bf1e ittt ne + 80005d4: 2100 movne r1, #0 + 80005d6: 2000 movne r0, #0 + 80005d8: bd30 popne {r4, r5, pc} + 80005da: ea5f 5c54 movs.w ip, r4, lsr #21 + 80005de: d105 bne.n 80005ec <__adddf3+0x230> + 80005e0: 0040 lsls r0, r0, #1 + 80005e2: 4149 adcs r1, r1 + 80005e4: bf28 it cs + 80005e6: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000 + 80005ea: bd30 pop {r4, r5, pc} + 80005ec: f514 0480 adds.w r4, r4, #4194304 @ 0x400000 + 80005f0: bf3c itt cc + 80005f2: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000 + 80005f6: bd30 popcc {r4, r5, pc} + 80005f8: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 + 80005fc: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000 + 8000600: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 + 8000604: f04f 0000 mov.w r0, #0 + 8000608: bd30 pop {r4, r5, pc} + 800060a: ea7f 5c64 mvns.w ip, r4, asr #21 + 800060e: bf1a itte ne + 8000610: 4619 movne r1, r3 + 8000612: 4610 movne r0, r2 + 8000614: ea7f 5c65 mvnseq.w ip, r5, asr #21 + 8000618: bf1c itt ne + 800061a: 460b movne r3, r1 + 800061c: 4602 movne r2, r0 + 800061e: ea50 3401 orrs.w r4, r0, r1, lsl #12 + 8000622: bf06 itte eq + 8000624: ea52 3503 orrseq.w r5, r2, r3, lsl #12 + 8000628: ea91 0f03 teqeq r1, r3 + 800062c: f441 2100 orrne.w r1, r1, #524288 @ 0x80000 + 8000630: bd30 pop {r4, r5, pc} + 8000632: bf00 nop -08000618 <__gesf2>: - 8000618: f04f 3cff mov.w ip, #4294967295 - 800061c: e006 b.n 800062c <__cmpsf2+0x4> - 800061e: bf00 nop +08000634 <__aeabi_ui2d>: + 8000634: f090 0f00 teq r0, #0 + 8000638: bf04 itt eq + 800063a: 2100 moveq r1, #0 + 800063c: 4770 bxeq lr + 800063e: b530 push {r4, r5, lr} + 8000640: f44f 6480 mov.w r4, #1024 @ 0x400 + 8000644: f104 0432 add.w r4, r4, #50 @ 0x32 + 8000648: f04f 0500 mov.w r5, #0 + 800064c: f04f 0100 mov.w r1, #0 + 8000650: e750 b.n 80004f4 <__adddf3+0x138> + 8000652: bf00 nop -08000620 <__lesf2>: - 8000620: f04f 0c01 mov.w ip, #1 - 8000624: e002 b.n 800062c <__cmpsf2+0x4> - 8000626: bf00 nop +08000654 <__aeabi_i2d>: + 8000654: f090 0f00 teq r0, #0 + 8000658: bf04 itt eq + 800065a: 2100 moveq r1, #0 + 800065c: 4770 bxeq lr + 800065e: b530 push {r4, r5, lr} + 8000660: f44f 6480 mov.w r4, #1024 @ 0x400 + 8000664: f104 0432 add.w r4, r4, #50 @ 0x32 + 8000668: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000 + 800066c: bf48 it mi + 800066e: 4240 negmi r0, r0 + 8000670: f04f 0100 mov.w r1, #0 + 8000674: e73e b.n 80004f4 <__adddf3+0x138> + 8000676: bf00 nop -08000628 <__cmpsf2>: - 8000628: f04f 0c01 mov.w ip, #1 - 800062c: f84d cd04 str.w ip, [sp, #-4]! - 8000630: ea4f 0240 mov.w r2, r0, lsl #1 - 8000634: ea4f 0341 mov.w r3, r1, lsl #1 - 8000638: ea7f 6c22 mvns.w ip, r2, asr #24 - 800063c: bf18 it ne - 800063e: ea7f 6c23 mvnsne.w ip, r3, asr #24 - 8000642: d011 beq.n 8000668 <__cmpsf2+0x40> - 8000644: b001 add sp, #4 - 8000646: ea52 0c53 orrs.w ip, r2, r3, lsr #1 - 800064a: bf18 it ne - 800064c: ea90 0f01 teqne r0, r1 - 8000650: bf58 it pl - 8000652: ebb2 0003 subspl.w r0, r2, r3 - 8000656: bf88 it hi - 8000658: 17c8 asrhi r0, r1, #31 - 800065a: bf38 it cc - 800065c: ea6f 70e1 mvncc.w r0, r1, asr #31 - 8000660: bf18 it ne - 8000662: f040 0001 orrne.w r0, r0, #1 - 8000666: 4770 bx lr - 8000668: ea7f 6c22 mvns.w ip, r2, asr #24 - 800066c: d102 bne.n 8000674 <__cmpsf2+0x4c> - 800066e: ea5f 2c40 movs.w ip, r0, lsl #9 - 8000672: d105 bne.n 8000680 <__cmpsf2+0x58> - 8000674: ea7f 6c23 mvns.w ip, r3, asr #24 - 8000678: d1e4 bne.n 8000644 <__cmpsf2+0x1c> - 800067a: ea5f 2c41 movs.w ip, r1, lsl #9 - 800067e: d0e1 beq.n 8000644 <__cmpsf2+0x1c> - 8000680: f85d 0b04 ldr.w r0, [sp], #4 - 8000684: 4770 bx lr - 8000686: bf00 nop +08000678 <__aeabi_f2d>: + 8000678: 0042 lsls r2, r0, #1 + 800067a: ea4f 01e2 mov.w r1, r2, asr #3 + 800067e: ea4f 0131 mov.w r1, r1, rrx + 8000682: ea4f 7002 mov.w r0, r2, lsl #28 + 8000686: bf1f itttt ne + 8000688: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000 + 800068c: f093 4f7f teqne r3, #4278190080 @ 0xff000000 + 8000690: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000 + 8000694: 4770 bxne lr + 8000696: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000 + 800069a: bf08 it eq + 800069c: 4770 bxeq lr + 800069e: f093 4f7f teq r3, #4278190080 @ 0xff000000 + 80006a2: bf04 itt eq + 80006a4: f441 2100 orreq.w r1, r1, #524288 @ 0x80000 + 80006a8: 4770 bxeq lr + 80006aa: b530 push {r4, r5, lr} + 80006ac: f44f 7460 mov.w r4, #896 @ 0x380 + 80006b0: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000 + 80006b4: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000 + 80006b8: e71c b.n 80004f4 <__adddf3+0x138> + 80006ba: bf00 nop -08000688 <__aeabi_cfrcmple>: - 8000688: 4684 mov ip, r0 - 800068a: 4608 mov r0, r1 - 800068c: 4661 mov r1, ip - 800068e: e7ff b.n 8000690 <__aeabi_cfcmpeq> +080006bc <__aeabi_ul2d>: + 80006bc: ea50 0201 orrs.w r2, r0, r1 + 80006c0: bf08 it eq + 80006c2: 4770 bxeq lr + 80006c4: b530 push {r4, r5, lr} + 80006c6: f04f 0500 mov.w r5, #0 + 80006ca: e00a b.n 80006e2 <__aeabi_l2d+0x16> -08000690 <__aeabi_cfcmpeq>: - 8000690: b50f push {r0, r1, r2, r3, lr} - 8000692: f7ff ffc9 bl 8000628 <__cmpsf2> - 8000696: 2800 cmp r0, #0 - 8000698: bf48 it mi - 800069a: f110 0f00 cmnmi.w r0, #0 - 800069e: bd0f pop {r0, r1, r2, r3, pc} +080006cc <__aeabi_l2d>: + 80006cc: ea50 0201 orrs.w r2, r0, r1 + 80006d0: bf08 it eq + 80006d2: 4770 bxeq lr + 80006d4: b530 push {r4, r5, lr} + 80006d6: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000 + 80006da: d502 bpl.n 80006e2 <__aeabi_l2d+0x16> + 80006dc: 4240 negs r0, r0 + 80006de: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 80006e2: f44f 6480 mov.w r4, #1024 @ 0x400 + 80006e6: f104 0432 add.w r4, r4, #50 @ 0x32 + 80006ea: ea5f 5c91 movs.w ip, r1, lsr #22 + 80006ee: f43f aed8 beq.w 80004a2 <__adddf3+0xe6> + 80006f2: f04f 0203 mov.w r2, #3 + 80006f6: ea5f 0cdc movs.w ip, ip, lsr #3 + 80006fa: bf18 it ne + 80006fc: 3203 addne r2, #3 + 80006fe: ea5f 0cdc movs.w ip, ip, lsr #3 + 8000702: bf18 it ne + 8000704: 3203 addne r2, #3 + 8000706: eb02 02dc add.w r2, r2, ip, lsr #3 + 800070a: f1c2 0320 rsb r3, r2, #32 + 800070e: fa00 fc03 lsl.w ip, r0, r3 + 8000712: fa20 f002 lsr.w r0, r0, r2 + 8000716: fa01 fe03 lsl.w lr, r1, r3 + 800071a: ea40 000e orr.w r0, r0, lr + 800071e: fa21 f102 lsr.w r1, r1, r2 + 8000722: 4414 add r4, r2 + 8000724: e6bd b.n 80004a2 <__adddf3+0xe6> + 8000726: bf00 nop -080006a0 <__aeabi_fcmpeq>: - 80006a0: f84d ed08 str.w lr, [sp, #-8]! - 80006a4: f7ff fff4 bl 8000690 <__aeabi_cfcmpeq> - 80006a8: bf0c ite eq - 80006aa: 2001 moveq r0, #1 - 80006ac: 2000 movne r0, #0 - 80006ae: f85d fb08 ldr.w pc, [sp], #8 - 80006b2: bf00 nop +08000728 <__gedf2>: + 8000728: f04f 3cff mov.w ip, #4294967295 + 800072c: e006 b.n 800073c <__cmpdf2+0x4> + 800072e: bf00 nop -080006b4 <__aeabi_fcmplt>: - 80006b4: f84d ed08 str.w lr, [sp, #-8]! - 80006b8: f7ff ffea bl 8000690 <__aeabi_cfcmpeq> - 80006bc: bf34 ite cc - 80006be: 2001 movcc r0, #1 - 80006c0: 2000 movcs r0, #0 - 80006c2: f85d fb08 ldr.w pc, [sp], #8 - 80006c6: bf00 nop +08000730 <__ledf2>: + 8000730: f04f 0c01 mov.w ip, #1 + 8000734: e002 b.n 800073c <__cmpdf2+0x4> + 8000736: bf00 nop -080006c8 <__aeabi_fcmple>: - 80006c8: f84d ed08 str.w lr, [sp, #-8]! - 80006cc: f7ff ffe0 bl 8000690 <__aeabi_cfcmpeq> - 80006d0: bf94 ite ls - 80006d2: 2001 movls r0, #1 - 80006d4: 2000 movhi r0, #0 - 80006d6: f85d fb08 ldr.w pc, [sp], #8 - 80006da: bf00 nop +08000738 <__cmpdf2>: + 8000738: f04f 0c01 mov.w ip, #1 + 800073c: f84d cd04 str.w ip, [sp, #-4]! + 8000740: ea4f 0c41 mov.w ip, r1, lsl #1 + 8000744: ea7f 5c6c mvns.w ip, ip, asr #21 + 8000748: ea4f 0c43 mov.w ip, r3, lsl #1 + 800074c: bf18 it ne + 800074e: ea7f 5c6c mvnsne.w ip, ip, asr #21 + 8000752: d01b beq.n 800078c <__cmpdf2+0x54> + 8000754: b001 add sp, #4 + 8000756: ea50 0c41 orrs.w ip, r0, r1, lsl #1 + 800075a: bf0c ite eq + 800075c: ea52 0c43 orrseq.w ip, r2, r3, lsl #1 + 8000760: ea91 0f03 teqne r1, r3 + 8000764: bf02 ittt eq + 8000766: ea90 0f02 teqeq r0, r2 + 800076a: 2000 moveq r0, #0 + 800076c: 4770 bxeq lr + 800076e: f110 0f00 cmn.w r0, #0 + 8000772: ea91 0f03 teq r1, r3 + 8000776: bf58 it pl + 8000778: 4299 cmppl r1, r3 + 800077a: bf08 it eq + 800077c: 4290 cmpeq r0, r2 + 800077e: bf2c ite cs + 8000780: 17d8 asrcs r0, r3, #31 + 8000782: ea6f 70e3 mvncc.w r0, r3, asr #31 + 8000786: f040 0001 orr.w r0, r0, #1 + 800078a: 4770 bx lr + 800078c: ea4f 0c41 mov.w ip, r1, lsl #1 + 8000790: ea7f 5c6c mvns.w ip, ip, asr #21 + 8000794: d102 bne.n 800079c <__cmpdf2+0x64> + 8000796: ea50 3c01 orrs.w ip, r0, r1, lsl #12 + 800079a: d107 bne.n 80007ac <__cmpdf2+0x74> + 800079c: ea4f 0c43 mov.w ip, r3, lsl #1 + 80007a0: ea7f 5c6c mvns.w ip, ip, asr #21 + 80007a4: d1d6 bne.n 8000754 <__cmpdf2+0x1c> + 80007a6: ea52 3c03 orrs.w ip, r2, r3, lsl #12 + 80007aa: d0d3 beq.n 8000754 <__cmpdf2+0x1c> + 80007ac: f85d 0b04 ldr.w r0, [sp], #4 + 80007b0: 4770 bx lr + 80007b2: bf00 nop -080006dc <__aeabi_fcmpge>: - 80006dc: f84d ed08 str.w lr, [sp, #-8]! - 80006e0: f7ff ffd2 bl 8000688 <__aeabi_cfrcmple> - 80006e4: bf94 ite ls - 80006e6: 2001 movls r0, #1 - 80006e8: 2000 movhi r0, #0 - 80006ea: f85d fb08 ldr.w pc, [sp], #8 - 80006ee: bf00 nop +080007b4 <__aeabi_cdrcmple>: + 80007b4: 4684 mov ip, r0 + 80007b6: 4610 mov r0, r2 + 80007b8: 4662 mov r2, ip + 80007ba: 468c mov ip, r1 + 80007bc: 4619 mov r1, r3 + 80007be: 4663 mov r3, ip + 80007c0: e000 b.n 80007c4 <__aeabi_cdcmpeq> + 80007c2: bf00 nop -080006f0 <__aeabi_fcmpgt>: - 80006f0: f84d ed08 str.w lr, [sp, #-8]! - 80006f4: f7ff ffc8 bl 8000688 <__aeabi_cfrcmple> - 80006f8: bf34 ite cc - 80006fa: 2001 movcc r0, #1 - 80006fc: 2000 movcs r0, #0 - 80006fe: f85d fb08 ldr.w pc, [sp], #8 - 8000702: bf00 nop +080007c4 <__aeabi_cdcmpeq>: + 80007c4: b501 push {r0, lr} + 80007c6: f7ff ffb7 bl 8000738 <__cmpdf2> + 80007ca: 2800 cmp r0, #0 + 80007cc: bf48 it mi + 80007ce: f110 0f00 cmnmi.w r0, #0 + 80007d2: bd01 pop {r0, pc} -08000704 <__aeabi_fcmpun>: - 8000704: ea4f 0240 mov.w r2, r0, lsl #1 - 8000708: ea4f 0341 mov.w r3, r1, lsl #1 - 800070c: ea7f 6c22 mvns.w ip, r2, asr #24 - 8000710: d102 bne.n 8000718 <__aeabi_fcmpun+0x14> - 8000712: ea5f 2c40 movs.w ip, r0, lsl #9 - 8000716: d108 bne.n 800072a <__aeabi_fcmpun+0x26> - 8000718: ea7f 6c23 mvns.w ip, r3, asr #24 - 800071c: d102 bne.n 8000724 <__aeabi_fcmpun+0x20> - 800071e: ea5f 2c41 movs.w ip, r1, lsl #9 - 8000722: d102 bne.n 800072a <__aeabi_fcmpun+0x26> - 8000724: f04f 0000 mov.w r0, #0 - 8000728: 4770 bx lr - 800072a: f04f 0001 mov.w r0, #1 - 800072e: 4770 bx lr +080007d4 <__aeabi_dcmpeq>: + 80007d4: f84d ed08 str.w lr, [sp, #-8]! + 80007d8: f7ff fff4 bl 80007c4 <__aeabi_cdcmpeq> + 80007dc: bf0c ite eq + 80007de: 2001 moveq r0, #1 + 80007e0: 2000 movne r0, #0 + 80007e2: f85d fb08 ldr.w pc, [sp], #8 + 80007e6: bf00 nop -08000730 <__aeabi_f2uiz>: - 8000730: 0042 lsls r2, r0, #1 - 8000732: d20e bcs.n 8000752 <__aeabi_f2uiz+0x22> - 8000734: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 - 8000738: d30b bcc.n 8000752 <__aeabi_f2uiz+0x22> - 800073a: f04f 039e mov.w r3, #158 @ 0x9e - 800073e: ebb3 6212 subs.w r2, r3, r2, lsr #24 - 8000742: d409 bmi.n 8000758 <__aeabi_f2uiz+0x28> - 8000744: ea4f 2300 mov.w r3, r0, lsl #8 - 8000748: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 - 800074c: fa23 f002 lsr.w r0, r3, r2 - 8000750: 4770 bx lr - 8000752: f04f 0000 mov.w r0, #0 - 8000756: 4770 bx lr - 8000758: f112 0f61 cmn.w r2, #97 @ 0x61 - 800075c: d101 bne.n 8000762 <__aeabi_f2uiz+0x32> - 800075e: 0242 lsls r2, r0, #9 - 8000760: d102 bne.n 8000768 <__aeabi_f2uiz+0x38> - 8000762: f04f 30ff mov.w r0, #4294967295 - 8000766: 4770 bx lr - 8000768: f04f 0000 mov.w r0, #0 - 800076c: 4770 bx lr - 800076e: bf00 nop +080007e8 <__aeabi_dcmplt>: + 80007e8: f84d ed08 str.w lr, [sp, #-8]! + 80007ec: f7ff ffea bl 80007c4 <__aeabi_cdcmpeq> + 80007f0: bf34 ite cc + 80007f2: 2001 movcc r0, #1 + 80007f4: 2000 movcs r0, #0 + 80007f6: f85d fb08 ldr.w pc, [sp], #8 + 80007fa: bf00 nop -08000770 : +080007fc <__aeabi_dcmple>: + 80007fc: f84d ed08 str.w lr, [sp, #-8]! + 8000800: f7ff ffe0 bl 80007c4 <__aeabi_cdcmpeq> + 8000804: bf94 ite ls + 8000806: 2001 movls r0, #1 + 8000808: 2000 movhi r0, #0 + 800080a: f85d fb08 ldr.w pc, [sp], #8 + 800080e: bf00 nop + +08000810 <__aeabi_dcmpge>: + 8000810: f84d ed08 str.w lr, [sp, #-8]! + 8000814: f7ff ffce bl 80007b4 <__aeabi_cdrcmple> + 8000818: bf94 ite ls + 800081a: 2001 movls r0, #1 + 800081c: 2000 movhi r0, #0 + 800081e: f85d fb08 ldr.w pc, [sp], #8 + 8000822: bf00 nop + +08000824 <__aeabi_dcmpgt>: + 8000824: f84d ed08 str.w lr, [sp, #-8]! + 8000828: f7ff ffc4 bl 80007b4 <__aeabi_cdrcmple> + 800082c: bf34 ite cc + 800082e: 2001 movcc r0, #1 + 8000830: 2000 movcs r0, #0 + 8000832: f85d fb08 ldr.w pc, [sp], #8 + 8000836: bf00 nop + +08000838 <__aeabi_d2iz>: + 8000838: ea4f 0241 mov.w r2, r1, lsl #1 + 800083c: f512 1200 adds.w r2, r2, #2097152 @ 0x200000 + 8000840: d215 bcs.n 800086e <__aeabi_d2iz+0x36> + 8000842: d511 bpl.n 8000868 <__aeabi_d2iz+0x30> + 8000844: f46f 7378 mvn.w r3, #992 @ 0x3e0 + 8000848: ebb3 5262 subs.w r2, r3, r2, asr #21 + 800084c: d912 bls.n 8000874 <__aeabi_d2iz+0x3c> + 800084e: ea4f 23c1 mov.w r3, r1, lsl #11 + 8000852: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 + 8000856: ea43 5350 orr.w r3, r3, r0, lsr #21 + 800085a: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 + 800085e: fa23 f002 lsr.w r0, r3, r2 + 8000862: bf18 it ne + 8000864: 4240 negne r0, r0 + 8000866: 4770 bx lr + 8000868: f04f 0000 mov.w r0, #0 + 800086c: 4770 bx lr + 800086e: ea50 3001 orrs.w r0, r0, r1, lsl #12 + 8000872: d105 bne.n 8000880 <__aeabi_d2iz+0x48> + 8000874: f011 4000 ands.w r0, r1, #2147483648 @ 0x80000000 + 8000878: bf08 it eq + 800087a: f06f 4000 mvneq.w r0, #2147483648 @ 0x80000000 + 800087e: 4770 bx lr + 8000880: f04f 0000 mov.w r0, #0 + 8000884: 4770 bx lr + 8000886: bf00 nop + +08000888 <__aeabi_frsub>: + 8000888: f080 4000 eor.w r0, r0, #2147483648 @ 0x80000000 + 800088c: e002 b.n 8000894 <__addsf3> + 800088e: bf00 nop + +08000890 <__aeabi_fsub>: + 8000890: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000 + +08000894 <__addsf3>: + 8000894: 0042 lsls r2, r0, #1 + 8000896: bf1f itttt ne + 8000898: ea5f 0341 movsne.w r3, r1, lsl #1 + 800089c: ea92 0f03 teqne r2, r3 + 80008a0: ea7f 6c22 mvnsne.w ip, r2, asr #24 + 80008a4: ea7f 6c23 mvnsne.w ip, r3, asr #24 + 80008a8: d06a beq.n 8000980 <__addsf3+0xec> + 80008aa: ea4f 6212 mov.w r2, r2, lsr #24 + 80008ae: ebd2 6313 rsbs r3, r2, r3, lsr #24 + 80008b2: bfc1 itttt gt + 80008b4: 18d2 addgt r2, r2, r3 + 80008b6: 4041 eorgt r1, r0 + 80008b8: 4048 eorgt r0, r1 + 80008ba: 4041 eorgt r1, r0 + 80008bc: bfb8 it lt + 80008be: 425b neglt r3, r3 + 80008c0: 2b19 cmp r3, #25 + 80008c2: bf88 it hi + 80008c4: 4770 bxhi lr + 80008c6: f010 4f00 tst.w r0, #2147483648 @ 0x80000000 + 80008ca: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 80008ce: f020 407f bic.w r0, r0, #4278190080 @ 0xff000000 + 80008d2: bf18 it ne + 80008d4: 4240 negne r0, r0 + 80008d6: f011 4f00 tst.w r1, #2147483648 @ 0x80000000 + 80008da: f441 0100 orr.w r1, r1, #8388608 @ 0x800000 + 80008de: f021 417f bic.w r1, r1, #4278190080 @ 0xff000000 + 80008e2: bf18 it ne + 80008e4: 4249 negne r1, r1 + 80008e6: ea92 0f03 teq r2, r3 + 80008ea: d03f beq.n 800096c <__addsf3+0xd8> + 80008ec: f1a2 0201 sub.w r2, r2, #1 + 80008f0: fa41 fc03 asr.w ip, r1, r3 + 80008f4: eb10 000c adds.w r0, r0, ip + 80008f8: f1c3 0320 rsb r3, r3, #32 + 80008fc: fa01 f103 lsl.w r1, r1, r3 + 8000900: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 + 8000904: d502 bpl.n 800090c <__addsf3+0x78> + 8000906: 4249 negs r1, r1 + 8000908: eb60 0040 sbc.w r0, r0, r0, lsl #1 + 800090c: f5b0 0f00 cmp.w r0, #8388608 @ 0x800000 + 8000910: d313 bcc.n 800093a <__addsf3+0xa6> + 8000912: f1b0 7f80 cmp.w r0, #16777216 @ 0x1000000 + 8000916: d306 bcc.n 8000926 <__addsf3+0x92> + 8000918: 0840 lsrs r0, r0, #1 + 800091a: ea4f 0131 mov.w r1, r1, rrx + 800091e: f102 0201 add.w r2, r2, #1 + 8000922: 2afe cmp r2, #254 @ 0xfe + 8000924: d251 bcs.n 80009ca <__addsf3+0x136> + 8000926: f1b1 4f00 cmp.w r1, #2147483648 @ 0x80000000 + 800092a: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 800092e: bf08 it eq + 8000930: f020 0001 biceq.w r0, r0, #1 + 8000934: ea40 0003 orr.w r0, r0, r3 + 8000938: 4770 bx lr + 800093a: 0049 lsls r1, r1, #1 + 800093c: eb40 0000 adc.w r0, r0, r0 + 8000940: 3a01 subs r2, #1 + 8000942: bf28 it cs + 8000944: f5b0 0f00 cmpcs.w r0, #8388608 @ 0x800000 + 8000948: d2ed bcs.n 8000926 <__addsf3+0x92> + 800094a: fab0 fc80 clz ip, r0 + 800094e: f1ac 0c08 sub.w ip, ip, #8 + 8000952: ebb2 020c subs.w r2, r2, ip + 8000956: fa00 f00c lsl.w r0, r0, ip + 800095a: bfaa itet ge + 800095c: eb00 50c2 addge.w r0, r0, r2, lsl #23 + 8000960: 4252 neglt r2, r2 + 8000962: 4318 orrge r0, r3 + 8000964: bfbc itt lt + 8000966: 40d0 lsrlt r0, r2 + 8000968: 4318 orrlt r0, r3 + 800096a: 4770 bx lr + 800096c: f092 0f00 teq r2, #0 + 8000970: f481 0100 eor.w r1, r1, #8388608 @ 0x800000 + 8000974: bf06 itte eq + 8000976: f480 0000 eoreq.w r0, r0, #8388608 @ 0x800000 + 800097a: 3201 addeq r2, #1 + 800097c: 3b01 subne r3, #1 + 800097e: e7b5 b.n 80008ec <__addsf3+0x58> + 8000980: ea4f 0341 mov.w r3, r1, lsl #1 + 8000984: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000988: bf18 it ne + 800098a: ea7f 6c23 mvnsne.w ip, r3, asr #24 + 800098e: d021 beq.n 80009d4 <__addsf3+0x140> + 8000990: ea92 0f03 teq r2, r3 + 8000994: d004 beq.n 80009a0 <__addsf3+0x10c> + 8000996: f092 0f00 teq r2, #0 + 800099a: bf08 it eq + 800099c: 4608 moveq r0, r1 + 800099e: 4770 bx lr + 80009a0: ea90 0f01 teq r0, r1 + 80009a4: bf1c itt ne + 80009a6: 2000 movne r0, #0 + 80009a8: 4770 bxne lr + 80009aa: f012 4f7f tst.w r2, #4278190080 @ 0xff000000 + 80009ae: d104 bne.n 80009ba <__addsf3+0x126> + 80009b0: 0040 lsls r0, r0, #1 + 80009b2: bf28 it cs + 80009b4: f040 4000 orrcs.w r0, r0, #2147483648 @ 0x80000000 + 80009b8: 4770 bx lr + 80009ba: f112 7200 adds.w r2, r2, #33554432 @ 0x2000000 + 80009be: bf3c itt cc + 80009c0: f500 0000 addcc.w r0, r0, #8388608 @ 0x800000 + 80009c4: 4770 bxcc lr + 80009c6: f000 4300 and.w r3, r0, #2147483648 @ 0x80000000 + 80009ca: f043 40fe orr.w r0, r3, #2130706432 @ 0x7f000000 + 80009ce: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 80009d2: 4770 bx lr + 80009d4: ea7f 6222 mvns.w r2, r2, asr #24 + 80009d8: bf16 itet ne + 80009da: 4608 movne r0, r1 + 80009dc: ea7f 6323 mvnseq.w r3, r3, asr #24 + 80009e0: 4601 movne r1, r0 + 80009e2: 0242 lsls r2, r0, #9 + 80009e4: bf06 itte eq + 80009e6: ea5f 2341 movseq.w r3, r1, lsl #9 + 80009ea: ea90 0f01 teqeq r0, r1 + 80009ee: f440 0080 orrne.w r0, r0, #4194304 @ 0x400000 + 80009f2: 4770 bx lr + +080009f4 <__aeabi_ui2f>: + 80009f4: f04f 0300 mov.w r3, #0 + 80009f8: e004 b.n 8000a04 <__aeabi_i2f+0x8> + 80009fa: bf00 nop + +080009fc <__aeabi_i2f>: + 80009fc: f010 4300 ands.w r3, r0, #2147483648 @ 0x80000000 + 8000a00: bf48 it mi + 8000a02: 4240 negmi r0, r0 + 8000a04: ea5f 0c00 movs.w ip, r0 + 8000a08: bf08 it eq + 8000a0a: 4770 bxeq lr + 8000a0c: f043 4396 orr.w r3, r3, #1258291200 @ 0x4b000000 + 8000a10: 4601 mov r1, r0 + 8000a12: f04f 0000 mov.w r0, #0 + 8000a16: e01c b.n 8000a52 <__aeabi_l2f+0x2a> + +08000a18 <__aeabi_ul2f>: + 8000a18: ea50 0201 orrs.w r2, r0, r1 + 8000a1c: bf08 it eq + 8000a1e: 4770 bxeq lr + 8000a20: f04f 0300 mov.w r3, #0 + 8000a24: e00a b.n 8000a3c <__aeabi_l2f+0x14> + 8000a26: bf00 nop + +08000a28 <__aeabi_l2f>: + 8000a28: ea50 0201 orrs.w r2, r0, r1 + 8000a2c: bf08 it eq + 8000a2e: 4770 bxeq lr + 8000a30: f011 4300 ands.w r3, r1, #2147483648 @ 0x80000000 + 8000a34: d502 bpl.n 8000a3c <__aeabi_l2f+0x14> + 8000a36: 4240 negs r0, r0 + 8000a38: eb61 0141 sbc.w r1, r1, r1, lsl #1 + 8000a3c: ea5f 0c01 movs.w ip, r1 + 8000a40: bf02 ittt eq + 8000a42: 4684 moveq ip, r0 + 8000a44: 4601 moveq r1, r0 + 8000a46: 2000 moveq r0, #0 + 8000a48: f043 43b6 orr.w r3, r3, #1526726656 @ 0x5b000000 + 8000a4c: bf08 it eq + 8000a4e: f1a3 5380 subeq.w r3, r3, #268435456 @ 0x10000000 + 8000a52: f5a3 0300 sub.w r3, r3, #8388608 @ 0x800000 + 8000a56: fabc f28c clz r2, ip + 8000a5a: 3a08 subs r2, #8 + 8000a5c: eba3 53c2 sub.w r3, r3, r2, lsl #23 + 8000a60: db10 blt.n 8000a84 <__aeabi_l2f+0x5c> + 8000a62: fa01 fc02 lsl.w ip, r1, r2 + 8000a66: 4463 add r3, ip + 8000a68: fa00 fc02 lsl.w ip, r0, r2 + 8000a6c: f1c2 0220 rsb r2, r2, #32 + 8000a70: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000 + 8000a74: fa20 f202 lsr.w r2, r0, r2 + 8000a78: eb43 0002 adc.w r0, r3, r2 + 8000a7c: bf08 it eq + 8000a7e: f020 0001 biceq.w r0, r0, #1 + 8000a82: 4770 bx lr + 8000a84: f102 0220 add.w r2, r2, #32 + 8000a88: fa01 fc02 lsl.w ip, r1, r2 + 8000a8c: f1c2 0220 rsb r2, r2, #32 + 8000a90: ea50 004c orrs.w r0, r0, ip, lsl #1 + 8000a94: fa21 f202 lsr.w r2, r1, r2 + 8000a98: eb43 0002 adc.w r0, r3, r2 + 8000a9c: bf08 it eq + 8000a9e: ea20 70dc biceq.w r0, r0, ip, lsr #31 + 8000aa2: 4770 bx lr + +08000aa4 <__aeabi_fmul>: + 8000aa4: f04f 0cff mov.w ip, #255 @ 0xff + 8000aa8: ea1c 52d0 ands.w r2, ip, r0, lsr #23 + 8000aac: bf1e ittt ne + 8000aae: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 + 8000ab2: ea92 0f0c teqne r2, ip + 8000ab6: ea93 0f0c teqne r3, ip + 8000aba: d06f beq.n 8000b9c <__aeabi_fmul+0xf8> + 8000abc: 441a add r2, r3 + 8000abe: ea80 0c01 eor.w ip, r0, r1 + 8000ac2: 0240 lsls r0, r0, #9 + 8000ac4: bf18 it ne + 8000ac6: ea5f 2141 movsne.w r1, r1, lsl #9 + 8000aca: d01e beq.n 8000b0a <__aeabi_fmul+0x66> + 8000acc: f04f 6300 mov.w r3, #134217728 @ 0x8000000 + 8000ad0: ea43 1050 orr.w r0, r3, r0, lsr #5 + 8000ad4: ea43 1151 orr.w r1, r3, r1, lsr #5 + 8000ad8: fba0 3101 umull r3, r1, r0, r1 + 8000adc: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 + 8000ae0: f5b1 0f00 cmp.w r1, #8388608 @ 0x800000 + 8000ae4: bf3e ittt cc + 8000ae6: 0049 lslcc r1, r1, #1 + 8000ae8: ea41 71d3 orrcc.w r1, r1, r3, lsr #31 + 8000aec: 005b lslcc r3, r3, #1 + 8000aee: ea40 0001 orr.w r0, r0, r1 + 8000af2: f162 027f sbc.w r2, r2, #127 @ 0x7f + 8000af6: 2afd cmp r2, #253 @ 0xfd + 8000af8: d81d bhi.n 8000b36 <__aeabi_fmul+0x92> + 8000afa: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 + 8000afe: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 8000b02: bf08 it eq + 8000b04: f020 0001 biceq.w r0, r0, #1 + 8000b08: 4770 bx lr + 8000b0a: f090 0f00 teq r0, #0 + 8000b0e: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 + 8000b12: bf08 it eq + 8000b14: 0249 lsleq r1, r1, #9 + 8000b16: ea4c 2050 orr.w r0, ip, r0, lsr #9 + 8000b1a: ea40 2051 orr.w r0, r0, r1, lsr #9 + 8000b1e: 3a7f subs r2, #127 @ 0x7f + 8000b20: bfc2 ittt gt + 8000b22: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff + 8000b26: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 + 8000b2a: 4770 bxgt lr + 8000b2c: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000b30: f04f 0300 mov.w r3, #0 + 8000b34: 3a01 subs r2, #1 + 8000b36: dc5d bgt.n 8000bf4 <__aeabi_fmul+0x150> + 8000b38: f112 0f19 cmn.w r2, #25 + 8000b3c: bfdc itt le + 8000b3e: f000 4000 andle.w r0, r0, #2147483648 @ 0x80000000 + 8000b42: 4770 bxle lr + 8000b44: f1c2 0200 rsb r2, r2, #0 + 8000b48: 0041 lsls r1, r0, #1 + 8000b4a: fa21 f102 lsr.w r1, r1, r2 + 8000b4e: f1c2 0220 rsb r2, r2, #32 + 8000b52: fa00 fc02 lsl.w ip, r0, r2 + 8000b56: ea5f 0031 movs.w r0, r1, rrx + 8000b5a: f140 0000 adc.w r0, r0, #0 + 8000b5e: ea53 034c orrs.w r3, r3, ip, lsl #1 + 8000b62: bf08 it eq + 8000b64: ea20 70dc biceq.w r0, r0, ip, lsr #31 + 8000b68: 4770 bx lr + 8000b6a: f092 0f00 teq r2, #0 + 8000b6e: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 + 8000b72: bf02 ittt eq + 8000b74: 0040 lsleq r0, r0, #1 + 8000b76: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 + 8000b7a: 3a01 subeq r2, #1 + 8000b7c: d0f9 beq.n 8000b72 <__aeabi_fmul+0xce> + 8000b7e: ea40 000c orr.w r0, r0, ip + 8000b82: f093 0f00 teq r3, #0 + 8000b86: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 + 8000b8a: bf02 ittt eq + 8000b8c: 0049 lsleq r1, r1, #1 + 8000b8e: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 + 8000b92: 3b01 subeq r3, #1 + 8000b94: d0f9 beq.n 8000b8a <__aeabi_fmul+0xe6> + 8000b96: ea41 010c orr.w r1, r1, ip + 8000b9a: e78f b.n 8000abc <__aeabi_fmul+0x18> + 8000b9c: ea0c 53d1 and.w r3, ip, r1, lsr #23 + 8000ba0: ea92 0f0c teq r2, ip + 8000ba4: bf18 it ne + 8000ba6: ea93 0f0c teqne r3, ip + 8000baa: d00a beq.n 8000bc2 <__aeabi_fmul+0x11e> + 8000bac: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 + 8000bb0: bf18 it ne + 8000bb2: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 + 8000bb6: d1d8 bne.n 8000b6a <__aeabi_fmul+0xc6> + 8000bb8: ea80 0001 eor.w r0, r0, r1 + 8000bbc: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 + 8000bc0: 4770 bx lr + 8000bc2: f090 0f00 teq r0, #0 + 8000bc6: bf17 itett ne + 8000bc8: f090 4f00 teqne r0, #2147483648 @ 0x80000000 + 8000bcc: 4608 moveq r0, r1 + 8000bce: f091 0f00 teqne r1, #0 + 8000bd2: f091 4f00 teqne r1, #2147483648 @ 0x80000000 + 8000bd6: d014 beq.n 8000c02 <__aeabi_fmul+0x15e> + 8000bd8: ea92 0f0c teq r2, ip + 8000bdc: d101 bne.n 8000be2 <__aeabi_fmul+0x13e> + 8000bde: 0242 lsls r2, r0, #9 + 8000be0: d10f bne.n 8000c02 <__aeabi_fmul+0x15e> + 8000be2: ea93 0f0c teq r3, ip + 8000be6: d103 bne.n 8000bf0 <__aeabi_fmul+0x14c> + 8000be8: 024b lsls r3, r1, #9 + 8000bea: bf18 it ne + 8000bec: 4608 movne r0, r1 + 8000bee: d108 bne.n 8000c02 <__aeabi_fmul+0x15e> + 8000bf0: ea80 0001 eor.w r0, r0, r1 + 8000bf4: f000 4000 and.w r0, r0, #2147483648 @ 0x80000000 + 8000bf8: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 + 8000bfc: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000c00: 4770 bx lr + 8000c02: f040 40fe orr.w r0, r0, #2130706432 @ 0x7f000000 + 8000c06: f440 0040 orr.w r0, r0, #12582912 @ 0xc00000 + 8000c0a: 4770 bx lr + +08000c0c <__aeabi_fdiv>: + 8000c0c: f04f 0cff mov.w ip, #255 @ 0xff + 8000c10: ea1c 52d0 ands.w r2, ip, r0, lsr #23 + 8000c14: bf1e ittt ne + 8000c16: ea1c 53d1 andsne.w r3, ip, r1, lsr #23 + 8000c1a: ea92 0f0c teqne r2, ip + 8000c1e: ea93 0f0c teqne r3, ip + 8000c22: d069 beq.n 8000cf8 <__aeabi_fdiv+0xec> + 8000c24: eba2 0203 sub.w r2, r2, r3 + 8000c28: ea80 0c01 eor.w ip, r0, r1 + 8000c2c: 0249 lsls r1, r1, #9 + 8000c2e: ea4f 2040 mov.w r0, r0, lsl #9 + 8000c32: d037 beq.n 8000ca4 <__aeabi_fdiv+0x98> + 8000c34: f04f 5380 mov.w r3, #268435456 @ 0x10000000 + 8000c38: ea43 1111 orr.w r1, r3, r1, lsr #4 + 8000c3c: ea43 1310 orr.w r3, r3, r0, lsr #4 + 8000c40: f00c 4000 and.w r0, ip, #2147483648 @ 0x80000000 + 8000c44: 428b cmp r3, r1 + 8000c46: bf38 it cc + 8000c48: 005b lslcc r3, r3, #1 + 8000c4a: f142 027d adc.w r2, r2, #125 @ 0x7d + 8000c4e: f44f 0c00 mov.w ip, #8388608 @ 0x800000 + 8000c52: 428b cmp r3, r1 + 8000c54: bf24 itt cs + 8000c56: 1a5b subcs r3, r3, r1 + 8000c58: ea40 000c orrcs.w r0, r0, ip + 8000c5c: ebb3 0f51 cmp.w r3, r1, lsr #1 + 8000c60: bf24 itt cs + 8000c62: eba3 0351 subcs.w r3, r3, r1, lsr #1 + 8000c66: ea40 005c orrcs.w r0, r0, ip, lsr #1 + 8000c6a: ebb3 0f91 cmp.w r3, r1, lsr #2 + 8000c6e: bf24 itt cs + 8000c70: eba3 0391 subcs.w r3, r3, r1, lsr #2 + 8000c74: ea40 009c orrcs.w r0, r0, ip, lsr #2 + 8000c78: ebb3 0fd1 cmp.w r3, r1, lsr #3 + 8000c7c: bf24 itt cs + 8000c7e: eba3 03d1 subcs.w r3, r3, r1, lsr #3 + 8000c82: ea40 00dc orrcs.w r0, r0, ip, lsr #3 + 8000c86: 011b lsls r3, r3, #4 + 8000c88: bf18 it ne + 8000c8a: ea5f 1c1c movsne.w ip, ip, lsr #4 + 8000c8e: d1e0 bne.n 8000c52 <__aeabi_fdiv+0x46> + 8000c90: 2afd cmp r2, #253 @ 0xfd + 8000c92: f63f af50 bhi.w 8000b36 <__aeabi_fmul+0x92> + 8000c96: 428b cmp r3, r1 + 8000c98: eb40 50c2 adc.w r0, r0, r2, lsl #23 + 8000c9c: bf08 it eq + 8000c9e: f020 0001 biceq.w r0, r0, #1 + 8000ca2: 4770 bx lr + 8000ca4: f00c 4c00 and.w ip, ip, #2147483648 @ 0x80000000 + 8000ca8: ea4c 2050 orr.w r0, ip, r0, lsr #9 + 8000cac: 327f adds r2, #127 @ 0x7f + 8000cae: bfc2 ittt gt + 8000cb0: f1d2 03ff rsbsgt r3, r2, #255 @ 0xff + 8000cb4: ea40 50c2 orrgt.w r0, r0, r2, lsl #23 + 8000cb8: 4770 bxgt lr + 8000cba: f440 0000 orr.w r0, r0, #8388608 @ 0x800000 + 8000cbe: f04f 0300 mov.w r3, #0 + 8000cc2: 3a01 subs r2, #1 + 8000cc4: e737 b.n 8000b36 <__aeabi_fmul+0x92> + 8000cc6: f092 0f00 teq r2, #0 + 8000cca: f000 4c00 and.w ip, r0, #2147483648 @ 0x80000000 + 8000cce: bf02 ittt eq + 8000cd0: 0040 lsleq r0, r0, #1 + 8000cd2: f410 0f00 tsteq.w r0, #8388608 @ 0x800000 + 8000cd6: 3a01 subeq r2, #1 + 8000cd8: d0f9 beq.n 8000cce <__aeabi_fdiv+0xc2> + 8000cda: ea40 000c orr.w r0, r0, ip + 8000cde: f093 0f00 teq r3, #0 + 8000ce2: f001 4c00 and.w ip, r1, #2147483648 @ 0x80000000 + 8000ce6: bf02 ittt eq + 8000ce8: 0049 lsleq r1, r1, #1 + 8000cea: f411 0f00 tsteq.w r1, #8388608 @ 0x800000 + 8000cee: 3b01 subeq r3, #1 + 8000cf0: d0f9 beq.n 8000ce6 <__aeabi_fdiv+0xda> + 8000cf2: ea41 010c orr.w r1, r1, ip + 8000cf6: e795 b.n 8000c24 <__aeabi_fdiv+0x18> + 8000cf8: ea0c 53d1 and.w r3, ip, r1, lsr #23 + 8000cfc: ea92 0f0c teq r2, ip + 8000d00: d108 bne.n 8000d14 <__aeabi_fdiv+0x108> + 8000d02: 0242 lsls r2, r0, #9 + 8000d04: f47f af7d bne.w 8000c02 <__aeabi_fmul+0x15e> + 8000d08: ea93 0f0c teq r3, ip + 8000d0c: f47f af70 bne.w 8000bf0 <__aeabi_fmul+0x14c> + 8000d10: 4608 mov r0, r1 + 8000d12: e776 b.n 8000c02 <__aeabi_fmul+0x15e> + 8000d14: ea93 0f0c teq r3, ip + 8000d18: d104 bne.n 8000d24 <__aeabi_fdiv+0x118> + 8000d1a: 024b lsls r3, r1, #9 + 8000d1c: f43f af4c beq.w 8000bb8 <__aeabi_fmul+0x114> + 8000d20: 4608 mov r0, r1 + 8000d22: e76e b.n 8000c02 <__aeabi_fmul+0x15e> + 8000d24: f030 4c00 bics.w ip, r0, #2147483648 @ 0x80000000 + 8000d28: bf18 it ne + 8000d2a: f031 4c00 bicsne.w ip, r1, #2147483648 @ 0x80000000 + 8000d2e: d1ca bne.n 8000cc6 <__aeabi_fdiv+0xba> + 8000d30: f030 4200 bics.w r2, r0, #2147483648 @ 0x80000000 + 8000d34: f47f af5c bne.w 8000bf0 <__aeabi_fmul+0x14c> + 8000d38: f031 4300 bics.w r3, r1, #2147483648 @ 0x80000000 + 8000d3c: f47f af3c bne.w 8000bb8 <__aeabi_fmul+0x114> + 8000d40: e75f b.n 8000c02 <__aeabi_fmul+0x15e> + 8000d42: bf00 nop + +08000d44 <__gesf2>: + 8000d44: f04f 3cff mov.w ip, #4294967295 + 8000d48: e006 b.n 8000d58 <__cmpsf2+0x4> + 8000d4a: bf00 nop + +08000d4c <__lesf2>: + 8000d4c: f04f 0c01 mov.w ip, #1 + 8000d50: e002 b.n 8000d58 <__cmpsf2+0x4> + 8000d52: bf00 nop + +08000d54 <__cmpsf2>: + 8000d54: f04f 0c01 mov.w ip, #1 + 8000d58: f84d cd04 str.w ip, [sp, #-4]! + 8000d5c: ea4f 0240 mov.w r2, r0, lsl #1 + 8000d60: ea4f 0341 mov.w r3, r1, lsl #1 + 8000d64: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000d68: bf18 it ne + 8000d6a: ea7f 6c23 mvnsne.w ip, r3, asr #24 + 8000d6e: d011 beq.n 8000d94 <__cmpsf2+0x40> + 8000d70: b001 add sp, #4 + 8000d72: ea52 0c53 orrs.w ip, r2, r3, lsr #1 + 8000d76: bf18 it ne + 8000d78: ea90 0f01 teqne r0, r1 + 8000d7c: bf58 it pl + 8000d7e: ebb2 0003 subspl.w r0, r2, r3 + 8000d82: bf88 it hi + 8000d84: 17c8 asrhi r0, r1, #31 + 8000d86: bf38 it cc + 8000d88: ea6f 70e1 mvncc.w r0, r1, asr #31 + 8000d8c: bf18 it ne + 8000d8e: f040 0001 orrne.w r0, r0, #1 + 8000d92: 4770 bx lr + 8000d94: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000d98: d102 bne.n 8000da0 <__cmpsf2+0x4c> + 8000d9a: ea5f 2c40 movs.w ip, r0, lsl #9 + 8000d9e: d105 bne.n 8000dac <__cmpsf2+0x58> + 8000da0: ea7f 6c23 mvns.w ip, r3, asr #24 + 8000da4: d1e4 bne.n 8000d70 <__cmpsf2+0x1c> + 8000da6: ea5f 2c41 movs.w ip, r1, lsl #9 + 8000daa: d0e1 beq.n 8000d70 <__cmpsf2+0x1c> + 8000dac: f85d 0b04 ldr.w r0, [sp], #4 + 8000db0: 4770 bx lr + 8000db2: bf00 nop + +08000db4 <__aeabi_cfrcmple>: + 8000db4: 4684 mov ip, r0 + 8000db6: 4608 mov r0, r1 + 8000db8: 4661 mov r1, ip + 8000dba: e7ff b.n 8000dbc <__aeabi_cfcmpeq> + +08000dbc <__aeabi_cfcmpeq>: + 8000dbc: b50f push {r0, r1, r2, r3, lr} + 8000dbe: f7ff ffc9 bl 8000d54 <__cmpsf2> + 8000dc2: 2800 cmp r0, #0 + 8000dc4: bf48 it mi + 8000dc6: f110 0f00 cmnmi.w r0, #0 + 8000dca: bd0f pop {r0, r1, r2, r3, pc} + +08000dcc <__aeabi_fcmpeq>: + 8000dcc: f84d ed08 str.w lr, [sp, #-8]! + 8000dd0: f7ff fff4 bl 8000dbc <__aeabi_cfcmpeq> + 8000dd4: bf0c ite eq + 8000dd6: 2001 moveq r0, #1 + 8000dd8: 2000 movne r0, #0 + 8000dda: f85d fb08 ldr.w pc, [sp], #8 + 8000dde: bf00 nop + +08000de0 <__aeabi_fcmplt>: + 8000de0: f84d ed08 str.w lr, [sp, #-8]! + 8000de4: f7ff ffea bl 8000dbc <__aeabi_cfcmpeq> + 8000de8: bf34 ite cc + 8000dea: 2001 movcc r0, #1 + 8000dec: 2000 movcs r0, #0 + 8000dee: f85d fb08 ldr.w pc, [sp], #8 + 8000df2: bf00 nop + +08000df4 <__aeabi_fcmple>: + 8000df4: f84d ed08 str.w lr, [sp, #-8]! + 8000df8: f7ff ffe0 bl 8000dbc <__aeabi_cfcmpeq> + 8000dfc: bf94 ite ls + 8000dfe: 2001 movls r0, #1 + 8000e00: 2000 movhi r0, #0 + 8000e02: f85d fb08 ldr.w pc, [sp], #8 + 8000e06: bf00 nop + +08000e08 <__aeabi_fcmpge>: + 8000e08: f84d ed08 str.w lr, [sp, #-8]! + 8000e0c: f7ff ffd2 bl 8000db4 <__aeabi_cfrcmple> + 8000e10: bf94 ite ls + 8000e12: 2001 movls r0, #1 + 8000e14: 2000 movhi r0, #0 + 8000e16: f85d fb08 ldr.w pc, [sp], #8 + 8000e1a: bf00 nop + +08000e1c <__aeabi_fcmpgt>: + 8000e1c: f84d ed08 str.w lr, [sp, #-8]! + 8000e20: f7ff ffc8 bl 8000db4 <__aeabi_cfrcmple> + 8000e24: bf34 ite cc + 8000e26: 2001 movcc r0, #1 + 8000e28: 2000 movcs r0, #0 + 8000e2a: f85d fb08 ldr.w pc, [sp], #8 + 8000e2e: bf00 nop + +08000e30 <__aeabi_fcmpun>: + 8000e30: ea4f 0240 mov.w r2, r0, lsl #1 + 8000e34: ea4f 0341 mov.w r3, r1, lsl #1 + 8000e38: ea7f 6c22 mvns.w ip, r2, asr #24 + 8000e3c: d102 bne.n 8000e44 <__aeabi_fcmpun+0x14> + 8000e3e: ea5f 2c40 movs.w ip, r0, lsl #9 + 8000e42: d108 bne.n 8000e56 <__aeabi_fcmpun+0x26> + 8000e44: ea7f 6c23 mvns.w ip, r3, asr #24 + 8000e48: d102 bne.n 8000e50 <__aeabi_fcmpun+0x20> + 8000e4a: ea5f 2c41 movs.w ip, r1, lsl #9 + 8000e4e: d102 bne.n 8000e56 <__aeabi_fcmpun+0x26> + 8000e50: f04f 0000 mov.w r0, #0 + 8000e54: 4770 bx lr + 8000e56: f04f 0001 mov.w r0, #1 + 8000e5a: 4770 bx lr + +08000e5c <__aeabi_f2uiz>: + 8000e5c: 0042 lsls r2, r0, #1 + 8000e5e: d20e bcs.n 8000e7e <__aeabi_f2uiz+0x22> + 8000e60: f1b2 4ffe cmp.w r2, #2130706432 @ 0x7f000000 + 8000e64: d30b bcc.n 8000e7e <__aeabi_f2uiz+0x22> + 8000e66: f04f 039e mov.w r3, #158 @ 0x9e + 8000e6a: ebb3 6212 subs.w r2, r3, r2, lsr #24 + 8000e6e: d409 bmi.n 8000e84 <__aeabi_f2uiz+0x28> + 8000e70: ea4f 2300 mov.w r3, r0, lsl #8 + 8000e74: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000 + 8000e78: fa23 f002 lsr.w r0, r3, r2 + 8000e7c: 4770 bx lr + 8000e7e: f04f 0000 mov.w r0, #0 + 8000e82: 4770 bx lr + 8000e84: f112 0f61 cmn.w r2, #97 @ 0x61 + 8000e88: d101 bne.n 8000e8e <__aeabi_f2uiz+0x32> + 8000e8a: 0242 lsls r2, r0, #9 + 8000e8c: d102 bne.n 8000e94 <__aeabi_f2uiz+0x38> + 8000e8e: f04f 30ff mov.w r0, #4294967295 + 8000e92: 4770 bx lr + 8000e94: f04f 0000 mov.w r0, #0 + 8000e98: 4770 bx lr + 8000e9a: bf00 nop + +08000e9c : * @param numberOfBytes - Number of bytes to be written in the register * * @return None. ******************************************************************************/ void AD5934_SetRegisterValue(uint8_t registerAddress, uint32_t registerValue, uint8_t numberOfBytes) { - 8000770: b580 push {r7, lr} - 8000772: b086 sub sp, #24 - 8000774: af02 add r7, sp, #8 - 8000776: 4603 mov r3, r0 - 8000778: 6039 str r1, [r7, #0] - 800077a: 71fb strb r3, [r7, #7] - 800077c: 4613 mov r3, r2 - 800077e: 71bb strb r3, [r7, #6] + 8000e9c: b580 push {r7, lr} + 8000e9e: b086 sub sp, #24 + 8000ea0: af02 add r7, sp, #8 + 8000ea2: 4603 mov r3, r0 + 8000ea4: 6039 str r1, [r7, #0] + 8000ea6: 71fb strb r3, [r7, #7] + 8000ea8: 4613 mov r3, r2 + 8000eaa: 71bb strb r3, [r7, #6] uint8_t writeData[2] = {0, 0}; - 8000780: 2300 movs r3, #0 - 8000782: 81bb strh r3, [r7, #12] + 8000eac: 2300 movs r3, #0 + 8000eae: 81bb strh r3, [r7, #12] HAL_StatusTypeDef status; union Bytes2Long AD5934_reg; AD5934_reg.number = registerValue; - 8000784: 683b ldr r3, [r7, #0] - 8000786: 60bb str r3, [r7, #8] + 8000eb0: 683b ldr r3, [r7, #0] + 8000eb2: 60bb str r3, [r7, #8] for (uint8_t i = 0; i < numberOfBytes; i++) - 8000788: 2300 movs r3, #0 - 800078a: 73fb strb r3, [r7, #15] - 800078c: e018 b.n 80007c0 + 8000eb4: 2300 movs r3, #0 + 8000eb6: 73fb strb r3, [r7, #15] + 8000eb8: e018 b.n 8000eec { writeData[0] = registerAddress - i; - 800078e: 79fa ldrb r2, [r7, #7] - 8000790: 7bfb ldrb r3, [r7, #15] - 8000792: 1ad3 subs r3, r2, r3 - 8000794: b2db uxtb r3, r3 - 8000796: 733b strb r3, [r7, #12] + 8000eba: 79fa ldrb r2, [r7, #7] + 8000ebc: 7bfb ldrb r3, [r7, #15] + 8000ebe: 1ad3 subs r3, r2, r3 + 8000ec0: b2db uxtb r3, r3 + 8000ec2: 733b strb r3, [r7, #12] writeData[1] = AD5934_reg.bytes[i]; - 8000798: 7bfb ldrb r3, [r7, #15] - 800079a: 3310 adds r3, #16 - 800079c: 443b add r3, r7 - 800079e: f813 3c08 ldrb.w r3, [r3, #-8] - 80007a2: 737b strb r3, [r7, #13] + 8000ec4: 7bfb ldrb r3, [r7, #15] + 8000ec6: 3310 adds r3, #16 + 8000ec8: 443b add r3, r7 + 8000eca: f813 3c08 ldrb.w r3, [r3, #-8] + 8000ece: 737b strb r3, [r7, #13] status = HAL_I2C_Master_Transmit(&hi2c2, AD5934_I2C_ADDRESS, writeData, 2, 5); - 80007a4: f107 020c add.w r2, r7, #12 - 80007a8: 2305 movs r3, #5 - 80007aa: 9300 str r3, [sp, #0] - 80007ac: 2302 movs r3, #2 - 80007ae: 211a movs r1, #26 - 80007b0: 4807 ldr r0, [pc, #28] @ (80007d0 ) - 80007b2: f002 fffd bl 80037b0 - 80007b6: 4603 mov r3, r0 - 80007b8: 73bb strb r3, [r7, #14] + 8000ed0: f107 020c add.w r2, r7, #12 + 8000ed4: 2305 movs r3, #5 + 8000ed6: 9300 str r3, [sp, #0] + 8000ed8: 2302 movs r3, #2 + 8000eda: 211a movs r1, #26 + 8000edc: 4807 ldr r0, [pc, #28] @ (8000efc ) + 8000ede: f003 f8df bl 80040a0 + 8000ee2: 4603 mov r3, r0 + 8000ee4: 73bb strb r3, [r7, #14] for (uint8_t i = 0; i < numberOfBytes; i++) - 80007ba: 7bfb ldrb r3, [r7, #15] - 80007bc: 3301 adds r3, #1 - 80007be: 73fb strb r3, [r7, #15] - 80007c0: 7bfa ldrb r2, [r7, #15] - 80007c2: 79bb ldrb r3, [r7, #6] - 80007c4: 429a cmp r2, r3 - 80007c6: d3e2 bcc.n 800078e + 8000ee6: 7bfb ldrb r3, [r7, #15] + 8000ee8: 3301 adds r3, #1 + 8000eea: 73fb strb r3, [r7, #15] + 8000eec: 7bfa ldrb r2, [r7, #15] + 8000eee: 79bb ldrb r3, [r7, #6] + 8000ef0: 429a cmp r2, r3 + 8000ef2: d3e2 bcc.n 8000eba } return; - 80007c8: bf00 nop + 8000ef4: bf00 nop } - 80007ca: 3710 adds r7, #16 - 80007cc: 46bd mov sp, r7 - 80007ce: bd80 pop {r7, pc} - 80007d0: 20000484 .word 0x20000484 + 8000ef6: 3710 adds r7, #16 + 8000ef8: 46bd mov sp, r7 + 8000efa: bd80 pop {r7, pc} + 8000efc: 20000444 .word 0x20000444 -080007d4 : +08000f00 : * @param numberOfBytes - Number of bytes to be read from the register. * * @return Register value. ******************************************************************************/ uint32_t AD5934_GetRegisterValue(uint8_t registerAddress, uint8_t numberOfBytes) { - 80007d4: b580 push {r7, lr} - 80007d6: b088 sub sp, #32 - 80007d8: af02 add r7, sp, #8 - 80007da: 4603 mov r3, r0 - 80007dc: 460a mov r2, r1 - 80007de: 71fb strb r3, [r7, #7] - 80007e0: 4613 mov r3, r2 - 80007e2: 71bb strb r3, [r7, #6] + 8000f00: b580 push {r7, lr} + 8000f02: b088 sub sp, #32 + 8000f04: af02 add r7, sp, #8 + 8000f06: 4603 mov r3, r0 + 8000f08: 460a mov r2, r1 + 8000f0a: 71fb strb r3, [r7, #7] + 8000f0c: 4613 mov r3, r2 + 8000f0e: 71bb strb r3, [r7, #6] uint8_t readData[1] = {0}; - 80007e4: 2300 movs r3, #0 - 80007e6: 753b strb r3, [r7, #20] + 8000f10: 2300 movs r3, #0 + 8000f12: 753b strb r3, [r7, #20] uint8_t writeData[2]; //= {AD5934_ADDR_POINTER, registerAddress}; union Bytes2Long AD5934_reg; HAL_StatusTypeDef status; if(numberOfBytes > 4) - 80007e8: 79bb ldrb r3, [r7, #6] - 80007ea: 2b04 cmp r3, #4 - 80007ec: d902 bls.n 80007f4 + 8000f14: 79bb ldrb r3, [r7, #6] + 8000f16: 2b04 cmp r3, #4 + 8000f18: d902 bls.n 8000f20 return 0xFFFFFFFF; //Overflow - 80007ee: f04f 33ff mov.w r3, #4294967295 - 80007f2: e031 b.n 8000858 + 8000f1a: f04f 33ff mov.w r3, #4294967295 + 8000f1e: e031 b.n 8000f84 AD5934_reg.number = 0; - 80007f4: 2300 movs r3, #0 - 80007f6: 60fb str r3, [r7, #12] + 8000f20: 2300 movs r3, #0 + 8000f22: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < numberOfBytes; i++) - 80007f8: 2300 movs r3, #0 - 80007fa: 75fb strb r3, [r7, #23] - 80007fc: e027 b.n 800084e + 8000f24: 2300 movs r3, #0 + 8000f26: 75fb strb r3, [r7, #23] + 8000f28: e027 b.n 8000f7a { writeData[0] = AD5934_ADDR_POINTER; - 80007fe: 23b0 movs r3, #176 @ 0xb0 - 8000800: 743b strb r3, [r7, #16] + 8000f2a: 23b0 movs r3, #176 @ 0xb0 + 8000f2c: 743b strb r3, [r7, #16] writeData[1] = registerAddress - i; - 8000802: 79fa ldrb r2, [r7, #7] - 8000804: 7dfb ldrb r3, [r7, #23] - 8000806: 1ad3 subs r3, r2, r3 - 8000808: b2db uxtb r3, r3 - 800080a: 747b strb r3, [r7, #17] + 8000f2e: 79fa ldrb r2, [r7, #7] + 8000f30: 7dfb ldrb r3, [r7, #23] + 8000f32: 1ad3 subs r3, r2, r3 + 8000f34: b2db uxtb r3, r3 + 8000f36: 747b strb r3, [r7, #17] status = HAL_I2C_Master_Transmit(&hi2c2, AD5934_I2C_ADDRESS, writeData, 2, 5); - 800080c: f107 0210 add.w r2, r7, #16 - 8000810: 2305 movs r3, #5 - 8000812: 9300 str r3, [sp, #0] - 8000814: 2302 movs r3, #2 - 8000816: 211a movs r1, #26 - 8000818: 4811 ldr r0, [pc, #68] @ (8000860 ) - 800081a: f002 ffc9 bl 80037b0 - 800081e: 4603 mov r3, r0 - 8000820: 75bb strb r3, [r7, #22] + 8000f38: f107 0210 add.w r2, r7, #16 + 8000f3c: 2305 movs r3, #5 + 8000f3e: 9300 str r3, [sp, #0] + 8000f40: 2302 movs r3, #2 + 8000f42: 211a movs r1, #26 + 8000f44: 4811 ldr r0, [pc, #68] @ (8000f8c ) + 8000f46: f003 f8ab bl 80040a0 + 8000f4a: 4603 mov r3, r0 + 8000f4c: 75bb strb r3, [r7, #22] //HAL_Delay(1); readData[0] = 0; - 8000822: 2300 movs r3, #0 - 8000824: 753b strb r3, [r7, #20] + 8000f4e: 2300 movs r3, #0 + 8000f50: 753b strb r3, [r7, #20] status = HAL_I2C_Master_Receive(&hi2c2, AD5934_I2C_ADDRESS, readData, 1, 5); - 8000826: f107 0214 add.w r2, r7, #20 - 800082a: 2305 movs r3, #5 - 800082c: 9300 str r3, [sp, #0] - 800082e: 2301 movs r3, #1 - 8000830: 211a movs r1, #26 - 8000832: 480b ldr r0, [pc, #44] @ (8000860 ) - 8000834: f003 f8ba bl 80039ac - 8000838: 4603 mov r3, r0 - 800083a: 75bb strb r3, [r7, #22] + 8000f52: f107 0214 add.w r2, r7, #20 + 8000f56: 2305 movs r3, #5 + 8000f58: 9300 str r3, [sp, #0] + 8000f5a: 2301 movs r3, #1 + 8000f5c: 211a movs r1, #26 + 8000f5e: 480b ldr r0, [pc, #44] @ (8000f8c ) + 8000f60: f003 f99c bl 800429c + 8000f64: 4603 mov r3, r0 + 8000f66: 75bb strb r3, [r7, #22] AD5934_reg.bytes[i]=readData[0]; - 800083c: 7dfb ldrb r3, [r7, #23] - 800083e: 7d3a ldrb r2, [r7, #20] - 8000840: 3318 adds r3, #24 - 8000842: 443b add r3, r7 - 8000844: f803 2c0c strb.w r2, [r3, #-12] + 8000f68: 7dfb ldrb r3, [r7, #23] + 8000f6a: 7d3a ldrb r2, [r7, #20] + 8000f6c: 3318 adds r3, #24 + 8000f6e: 443b add r3, r7 + 8000f70: f803 2c0c strb.w r2, [r3, #-12] for (uint8_t i = 0; i < numberOfBytes; i++) - 8000848: 7dfb ldrb r3, [r7, #23] - 800084a: 3301 adds r3, #1 - 800084c: 75fb strb r3, [r7, #23] - 800084e: 7dfa ldrb r2, [r7, #23] - 8000850: 79bb ldrb r3, [r7, #6] - 8000852: 429a cmp r2, r3 - 8000854: d3d3 bcc.n 80007fe + 8000f74: 7dfb ldrb r3, [r7, #23] + 8000f76: 3301 adds r3, #1 + 8000f78: 75fb strb r3, [r7, #23] + 8000f7a: 7dfa ldrb r2, [r7, #23] + 8000f7c: 79bb ldrb r3, [r7, #6] + 8000f7e: 429a cmp r2, r3 + 8000f80: d3d3 bcc.n 8000f2a } return AD5934_reg.number; - 8000856: 68fb ldr r3, [r7, #12] + 8000f82: 68fb ldr r3, [r7, #12] } - 8000858: 4618 mov r0, r3 - 800085a: 3718 adds r7, #24 - 800085c: 46bd mov sp, r7 - 800085e: bd80 pop {r7, pc} - 8000860: 20000484 .word 0x20000484 + 8000f84: 4618 mov r0, r3 + 8000f86: 3718 adds r7, #24 + 8000f88: 46bd mov sp, r7 + 8000f8a: bd80 pop {r7, pc} + 8000f8c: 20000444 .word 0x20000444 -08000864 : +08000f90 : * @param None. * * @return None. ******************************************************************************/ void AD5934_Init(void) { - 8000864: b580 push {r7, lr} - 8000866: af00 add r7, sp, #0 + 8000f90: b580 push {r7, lr} + 8000f92: af00 add r7, sp, #0 ADG715_ResetChannels(); // Disconnects Analog Switch on the CE / RTD / Ref Resistor - 8000868: f000 fd90 bl 800138c + 8000f94: f000 fd72 bl 8001a7c /************ Config Sweep******************/ // Place AD5934 in reset AD5934_SetRegisterValue(AD5934_CONTROL_REG_LB, (AD5934_CONTROL_FUNCTION(AD5934_RESET)), 1); - 800086c: 2201 movs r2, #1 - 800086e: f44f 7180 mov.w r1, #256 @ 0x100 - 8000872: 2081 movs r0, #129 @ 0x81 - 8000874: f7ff ff7c bl 8000770 + 8000f98: 2201 movs r2, #1 + 8000f9a: f44f 7180 mov.w r1, #256 @ 0x100 + 8000f9e: 2081 movs r0, #129 @ 0x81 + 8000fa0: f7ff ff7c bl 8000e9c // Configure starting frequency AD5934_SetRegisterValue(AD5934_START_FREQ_REG_LB, AD5934_FREQ_2K293HZ, 3); - 8000878: 2203 movs r2, #3 - 800087a: 490a ldr r1, [pc, #40] @ (80008a4 ) - 800087c: 2084 movs r0, #132 @ 0x84 - 800087e: f7ff ff77 bl 8000770 + 8000fa4: 2203 movs r2, #3 + 8000fa6: 490a ldr r1, [pc, #40] @ (8000fd0 ) + 8000fa8: 2084 movs r0, #132 @ 0x84 + 8000faa: f7ff ff77 bl 8000e9c // Configure frequency increment step AD5934_SetRegisterValue(AD5934_FREQ_INCR_REG_LB, AD5934_FREQ_0HZ, 3); - 8000882: 2203 movs r2, #3 - 8000884: 2100 movs r1, #0 - 8000886: 2087 movs r0, #135 @ 0x87 - 8000888: f7ff ff72 bl 8000770 + 8000fae: 2203 movs r2, #3 + 8000fb0: 2100 movs r1, #0 + 8000fb2: 2087 movs r0, #135 @ 0x87 + 8000fb4: f7ff ff72 bl 8000e9c // Configure number of steps AD5934_SetRegisterValue(AD5934_NR_INCR_REG_LB, AD5934_STEP_FREQ_0, 2); - 800088c: 2202 movs r2, #2 - 800088e: 2100 movs r1, #0 - 8000890: 2089 movs r0, #137 @ 0x89 - 8000892: f7ff ff6d bl 8000770 + 8000fb8: 2202 movs r2, #2 + 8000fba: 2100 movs r1, #0 + 8000fbc: 2089 movs r0, #137 @ 0x89 + 8000fbe: f7ff ff6d bl 8000e9c // Set 128 Settling Time AD5934_SetRegisterValue(AD5934_NR_SETTLE_REG_LB, AD5934_SETTLING_TIME_90, 2); - 8000896: 2202 movs r2, #2 - 8000898: 2160 movs r1, #96 @ 0x60 - 800089a: 208b movs r0, #139 @ 0x8b - 800089c: f7ff ff68 bl 8000770 + 8000fc2: 2202 movs r2, #2 + 8000fc4: 2160 movs r1, #96 @ 0x60 + 8000fc6: 208b movs r0, #139 @ 0x8b + 8000fc8: f7ff ff68 bl 8000e9c } - 80008a0: bf00 nop - 80008a2: bd80 pop {r7, pc} - 80008a4: 004b2314 .word 0x004b2314 + 8000fcc: bf00 nop + 8000fce: bd80 pop {r7, pc} + 8000fd0: 004b2314 .word 0x004b2314 -080008a8 : +08000fd4 : * @param None. * * @return None. ******************************************************************************/ void AD5934_RestartSweep(void) { - 80008a8: b580 push {r7, lr} - 80008aa: af00 add r7, sp, #0 + 8000fd4: b580 push {r7, lr} + 8000fd6: af00 add r7, sp, #0 // Place AD5934 in standby AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_STANDBY) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 80008ac: 2201 movs r2, #1 - 80008ae: 21b5 movs r1, #181 @ 0xb5 - 80008b0: 2080 movs r0, #128 @ 0x80 - 80008b2: f7ff ff5d bl 8000770 + 8000fd8: 2201 movs r2, #1 + 8000fda: 21b5 movs r1, #181 @ 0xb5 + 8000fdc: 2080 movs r0, #128 @ 0x80 + 8000fde: f7ff ff5d bl 8000e9c // Initialize starting frequency, Start frequency sweep, standby AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, ((AD5934_CONTROL_FUNCTION(AD5934_INIT_START_FREQ)) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 80008b6: 2201 movs r2, #1 - 80008b8: 2115 movs r1, #21 - 80008ba: 2080 movs r0, #128 @ 0x80 - 80008bc: f7ff ff58 bl 8000770 + 8000fe2: 2201 movs r2, #1 + 8000fe4: 2115 movs r1, #21 + 8000fe6: 2080 movs r0, #128 @ 0x80 + 8000fe8: f7ff ff58 bl 8000e9c // Disable Internal Reset State AD5934_SetRegisterValue(AD5934_CONTROL_REG_LB, AD5934_CONTROL_FUNCTION(AD5934_RESERVED), 1); - 80008c0: 2201 movs r2, #1 - 80008c2: 2180 movs r1, #128 @ 0x80 - 80008c4: 2081 movs r0, #129 @ 0x81 - 80008c6: f7ff ff53 bl 8000770 + 8000fec: 2201 movs r2, #1 + 8000fee: 2180 movs r1, #128 @ 0x80 + 8000ff0: 2081 movs r0, #129 @ 0x81 + 8000ff2: f7ff ff53 bl 8000e9c // Configure Range Output, PGA gain andPlace AD5934 in sweep AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_START_FREQ_SWEEP) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 80008ca: 2201 movs r2, #1 - 80008cc: 2125 movs r1, #37 @ 0x25 - 80008ce: 2080 movs r0, #128 @ 0x80 - 80008d0: f7ff ff4e bl 8000770 + 8000ff6: 2201 movs r2, #1 + 8000ff8: 2125 movs r1, #37 @ 0x25 + 8000ffa: 2080 movs r0, #128 @ 0x80 + 8000ffc: f7ff ff4e bl 8000e9c } - 80008d4: bf00 nop - 80008d6: bd80 pop {r7, pc} + 8001000: bf00 nop + 8001002: bd80 pop {r7, pc} -080008d8 : +08001004 : * @param None. * * @return none. ******************************************************************************/ void AD5934_Repeat_Sweep(void) { - 80008d8: b580 push {r7, lr} - 80008da: af00 add r7, sp, #0 + 8001004: b580 push {r7, lr} + 8001006: af00 add r7, sp, #0 // Repeat AD5934 Sweep AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_REPEAT_FREQ) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 80008dc: 2201 movs r2, #1 - 80008de: 2145 movs r1, #69 @ 0x45 - 80008e0: 2080 movs r0, #128 @ 0x80 - 80008e2: f7ff ff45 bl 8000770 + 8001008: 2201 movs r2, #1 + 800100a: 2145 movs r1, #69 @ 0x45 + 800100c: 2080 movs r0, #128 @ 0x80 + 800100e: f7ff ff45 bl 8000e9c } - 80008e6: bf00 nop - 80008e8: bd80 pop {r7, pc} + 8001012: bf00 nop + 8001014: bd80 pop {r7, pc} -080008ea : +08001016 : * @param None. * * @return None. ******************************************************************************/ void AD5934_StopSweep(void) { - 80008ea: b580 push {r7, lr} - 80008ec: af00 add r7, sp, #0 + 8001016: b580 push {r7, lr} + 8001018: af00 add r7, sp, #0 // Power Down //AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_POWER_DOWN) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); // Place AD5934 in standby (instead of power down to save startup time) AD5934_SetRegisterValue(AD5934_CONTROL_REG_HB, (AD5934_CONTROL_FUNCTION(AD5934_STANDBY) | AD5934_CONTROL_RANGE(AD5934_400mVpp_RANGE) | AD5934_PGA_GAIN(AD5934_PGA_GAIN_X1)), 1); - 80008ee: 2201 movs r2, #1 - 80008f0: 21b5 movs r1, #181 @ 0xb5 - 80008f2: 2080 movs r0, #128 @ 0x80 - 80008f4: f7ff ff3c bl 8000770 + 800101a: 2201 movs r2, #1 + 800101c: 21b5 movs r1, #181 @ 0xb5 + 800101e: 2080 movs r0, #128 @ 0x80 + 8001020: f7ff ff3c bl 8000e9c } - 80008f8: bf00 nop - 80008fa: bd80 pop {r7, pc} + 8001024: bf00 nop + 8001026: bd80 pop {r7, pc} -080008fc : +08001028 : * @param mag_dut - Magnitude of the device under test. * * @return Temperature in Celsius. ******************************************************************************/ float AD5934_Calculate_Temperature(float mag_ref_pt100, float mag_ref_pt1000, float mag_dut) { - 80008fc: b580 push {r7, lr} - 80008fe: b08e sub sp, #56 @ 0x38 - 8000900: af00 add r7, sp, #0 - 8000902: 60f8 str r0, [r7, #12] - 8000904: 60b9 str r1, [r7, #8] - 8000906: 607a str r2, [r7, #4] + 8001028: b580 push {r7, lr} + 800102a: b08e sub sp, #56 @ 0x38 + 800102c: af00 add r7, sp, #0 + 800102e: 60f8 str r0, [r7, #12] + 8001030: 60b9 str r1, [r7, #8] + 8001032: 607a str r2, [r7, #4] uint8_t ch_ref; float gain_factor, temperature, drift, mag_ref; if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 8000908: 2180 movs r1, #128 @ 0x80 - 800090a: 483a ldr r0, [pc, #232] @ (80009f4 ) - 800090c: f002 fdc4 bl 8003498 - 8000910: 4603 mov r3, r0 - 8000912: 2b01 cmp r3, #1 - 8000914: d109 bne.n 800092a + 8001034: 2180 movs r1, #128 @ 0x80 + 8001036: 483a ldr r0, [pc, #232] @ (8001120 ) + 8001038: f002 fea6 bl 8003d88 + 800103c: 4603 mov r3, r0 + 800103e: 2b01 cmp r3, #1 + 8001040: d109 bne.n 8001056 { ch_ref = AD5934_CH_RTD_LOW_GAIN; //PT100 - 8000916: 2309 movs r3, #9 - 8000918: f887 3027 strb.w r3, [r7, #39] @ 0x27 + 8001042: 2309 movs r3, #9 + 8001044: f887 3027 strb.w r3, [r7, #39] @ 0x27 gain_factor = AD5934_GAIN_FACTOR_100R; - 800091c: 4b36 ldr r3, [pc, #216] @ (80009f8 ) - 800091e: 637b str r3, [r7, #52] @ 0x34 + 8001048: 4b36 ldr r3, [pc, #216] @ (8001124 ) + 800104a: 637b str r3, [r7, #52] @ 0x34 drift = AD5934_DRIFT_PT100; - 8000920: 4b36 ldr r3, [pc, #216] @ (80009fc ) - 8000922: 62fb str r3, [r7, #44] @ 0x2c + 800104c: 4b36 ldr r3, [pc, #216] @ (8001128 ) + 800104e: 62fb str r3, [r7, #44] @ 0x2c mag_ref = mag_ref_pt100; - 8000924: 68fb ldr r3, [r7, #12] - 8000926: 62bb str r3, [r7, #40] @ 0x28 - 8000928: e008 b.n 800093c + 8001050: 68fb ldr r3, [r7, #12] + 8001052: 62bb str r3, [r7, #40] @ 0x28 + 8001054: e008 b.n 8001068 } else { ch_ref = AD5934_CH_RTD_MID_GAIN; //PT1000 - 800092a: 230a movs r3, #10 - 800092c: f887 3027 strb.w r3, [r7, #39] @ 0x27 + 8001056: 230a movs r3, #10 + 8001058: f887 3027 strb.w r3, [r7, #39] @ 0x27 gain_factor = AD5934_GAIN_FACTOR_1K; - 8000930: 4b33 ldr r3, [pc, #204] @ (8000a00 ) - 8000932: 637b str r3, [r7, #52] @ 0x34 + 800105c: 4b33 ldr r3, [pc, #204] @ (800112c ) + 800105e: 637b str r3, [r7, #52] @ 0x34 drift = AD5934_DRIFT_PT1000; - 8000934: 4b33 ldr r3, [pc, #204] @ (8000a04 ) - 8000936: 62fb str r3, [r7, #44] @ 0x2c + 8001060: 4b33 ldr r3, [pc, #204] @ (8001130 ) + 8001062: 62fb str r3, [r7, #44] @ 0x2c mag_ref = mag_ref_pt1000; - 8000938: 68bb ldr r3, [r7, #8] - 800093a: 62bb str r3, [r7, #40] @ 0x28 + 8001064: 68bb ldr r3, [r7, #8] + 8001066: 62bb str r3, [r7, #40] @ 0x28 } float ratio_mag = mag_ref / mag_dut; - 800093c: 6879 ldr r1, [r7, #4] - 800093e: 6ab8 ldr r0, [r7, #40] @ 0x28 - 8000940: f7ff fdce bl 80004e0 <__aeabi_fdiv> - 8000944: 4603 mov r3, r0 - 8000946: 623b str r3, [r7, #32] + 8001068: 6879 ldr r1, [r7, #4] + 800106a: 6ab8 ldr r0, [r7, #40] @ 0x28 + 800106c: f7ff fdce bl 8000c0c <__aeabi_fdiv> + 8001070: 4603 mov r3, r0 + 8001072: 623b str r3, [r7, #32] // This correction isn't validated /*if(ch_ref==AD5934_CH_REF100R_LOW_GAIN) // only for PT100 impedance_dut = AD5934_Linear_Correction(gain_factor * ratio_mag); else*/ float impedance_dut = gain_factor * ratio_mag; - 8000948: 6a39 ldr r1, [r7, #32] - 800094a: 6b78 ldr r0, [r7, #52] @ 0x34 - 800094c: f7ff fd14 bl 8000378 <__aeabi_fmul> - 8000950: 4603 mov r3, r0 - 8000952: 61fb str r3, [r7, #28] + 8001074: 6a39 ldr r1, [r7, #32] + 8001076: 6b78 ldr r0, [r7, #52] @ 0x34 + 8001078: f7ff fd14 bl 8000aa4 <__aeabi_fmul> + 800107c: 4603 mov r3, r0 + 800107e: 61fb str r3, [r7, #28] // Calculate impedance ratio with the Reference Resistor float ratio = impedance_dut / gain_factor; - 8000954: 6b79 ldr r1, [r7, #52] @ 0x34 - 8000956: 69f8 ldr r0, [r7, #28] - 8000958: f7ff fdc2 bl 80004e0 <__aeabi_fdiv> - 800095c: 4603 mov r3, r0 - 800095e: 61bb str r3, [r7, #24] + 8001080: 6b79 ldr r1, [r7, #52] @ 0x34 + 8001082: 69f8 ldr r0, [r7, #28] + 8001084: f7ff fdc2 bl 8000c0c <__aeabi_fdiv> + 8001088: 4603 mov r3, r0 + 800108a: 61bb str r3, [r7, #24] // Calculate impedance discriminant with the ratio float discriminant = (AD5934_RTD_A*AD5934_RTD_A)-(4.0f * AD5934_RTD_B * (1.0f - ratio)); - 8000960: 69b9 ldr r1, [r7, #24] - 8000962: f04f 507e mov.w r0, #1065353216 @ 0x3f800000 - 8000966: f7ff fbfd bl 8000164 <__aeabi_fsub> - 800096a: 4603 mov r3, r0 - 800096c: 4926 ldr r1, [pc, #152] @ (8000a08 ) - 800096e: 4618 mov r0, r3 - 8000970: f7ff fd02 bl 8000378 <__aeabi_fmul> - 8000974: 4603 mov r3, r0 - 8000976: 4925 ldr r1, [pc, #148] @ (8000a0c ) - 8000978: 4618 mov r0, r3 - 800097a: f7ff fbf5 bl 8000168 <__addsf3> - 800097e: 4603 mov r3, r0 - 8000980: 617b str r3, [r7, #20] + 800108c: 69b9 ldr r1, [r7, #24] + 800108e: f04f 507e mov.w r0, #1065353216 @ 0x3f800000 + 8001092: f7ff fbfd bl 8000890 <__aeabi_fsub> + 8001096: 4603 mov r3, r0 + 8001098: 4926 ldr r1, [pc, #152] @ (8001134 ) + 800109a: 4618 mov r0, r3 + 800109c: f7ff fd02 bl 8000aa4 <__aeabi_fmul> + 80010a0: 4603 mov r3, r0 + 80010a2: 4925 ldr r1, [pc, #148] @ (8001138 ) + 80010a4: 4618 mov r0, r3 + 80010a6: f7ff fbf5 bl 8000894 <__addsf3> + 80010aa: 4603 mov r3, r0 + 80010ac: 617b str r3, [r7, #20] if (discriminant >= 0.0f && impedance_dut >= gain_factor) - 8000982: f04f 0100 mov.w r1, #0 - 8000986: 6978 ldr r0, [r7, #20] - 8000988: f7ff fea8 bl 80006dc <__aeabi_fcmpge> - 800098c: 4603 mov r3, r0 - 800098e: 2b00 cmp r3, #0 - 8000990: d016 beq.n 80009c0 - 8000992: 6b79 ldr r1, [r7, #52] @ 0x34 - 8000994: 69f8 ldr r0, [r7, #28] - 8000996: f7ff fea1 bl 80006dc <__aeabi_fcmpge> - 800099a: 4603 mov r3, r0 - 800099c: 2b00 cmp r3, #0 - 800099e: d00f beq.n 80009c0 + 80010ae: f04f 0100 mov.w r1, #0 + 80010b2: 6978 ldr r0, [r7, #20] + 80010b4: f7ff fea8 bl 8000e08 <__aeabi_fcmpge> + 80010b8: 4603 mov r3, r0 + 80010ba: 2b00 cmp r3, #0 + 80010bc: d016 beq.n 80010ec + 80010be: 6b79 ldr r1, [r7, #52] @ 0x34 + 80010c0: 69f8 ldr r0, [r7, #28] + 80010c2: f7ff fea1 bl 8000e08 <__aeabi_fcmpge> + 80010c6: 4603 mov r3, r0 + 80010c8: 2b00 cmp r3, #0 + 80010ca: d00f beq.n 80010ec { // Ramo T >= 0°C: solução quadrática exata temperature = (-AD5934_RTD_A + sqrtf(discriminant))/(2.0f * AD5934_RTD_B); - 80009a0: 6978 ldr r0, [r7, #20] - 80009a2: f005 fcf7 bl 8006394 - 80009a6: 4603 mov r3, r0 - 80009a8: 4919 ldr r1, [pc, #100] @ (8000a10 ) - 80009aa: 4618 mov r0, r3 - 80009ac: f7ff fbda bl 8000164 <__aeabi_fsub> - 80009b0: 4603 mov r3, r0 - 80009b2: 4918 ldr r1, [pc, #96] @ (8000a14 ) - 80009b4: 4618 mov r0, r3 - 80009b6: f7ff fd93 bl 80004e0 <__aeabi_fdiv> - 80009ba: 4603 mov r3, r0 - 80009bc: 633b str r3, [r7, #48] @ 0x30 - 80009be: e00b b.n 80009d8 + 80010cc: 6978 ldr r0, [r7, #20] + 80010ce: f005 fdd9 bl 8006c84 + 80010d2: 4603 mov r3, r0 + 80010d4: 4919 ldr r1, [pc, #100] @ (800113c ) + 80010d6: 4618 mov r0, r3 + 80010d8: f7ff fbda bl 8000890 <__aeabi_fsub> + 80010dc: 4603 mov r3, r0 + 80010de: 4918 ldr r1, [pc, #96] @ (8001140 ) + 80010e0: 4618 mov r0, r3 + 80010e2: f7ff fd93 bl 8000c0c <__aeabi_fdiv> + 80010e6: 4603 mov r3, r0 + 80010e8: 633b str r3, [r7, #48] @ 0x30 + 80010ea: e00b b.n 8001104 } else { // Ramo T < 0°C (ou discriminante inválido por ruído): aproximação linear temperature = (ratio - 1.0f) / AD5934_RTD_ALPHA; - 80009c0: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 - 80009c4: 69b8 ldr r0, [r7, #24] - 80009c6: f7ff fbcd bl 8000164 <__aeabi_fsub> - 80009ca: 4603 mov r3, r0 - 80009cc: 4912 ldr r1, [pc, #72] @ (8000a18 ) - 80009ce: 4618 mov r0, r3 - 80009d0: f7ff fd86 bl 80004e0 <__aeabi_fdiv> - 80009d4: 4603 mov r3, r0 - 80009d6: 633b str r3, [r7, #48] @ 0x30 + 80010ec: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 + 80010f0: 69b8 ldr r0, [r7, #24] + 80010f2: f7ff fbcd bl 8000890 <__aeabi_fsub> + 80010f6: 4603 mov r3, r0 + 80010f8: 4912 ldr r1, [pc, #72] @ (8001144 ) + 80010fa: 4618 mov r0, r3 + 80010fc: f7ff fd86 bl 8000c0c <__aeabi_fdiv> + 8001100: 4603 mov r3, r0 + 8001102: 633b str r3, [r7, #48] @ 0x30 } - return AD5934_Round_Float_Precision((temperature-drift),2); - 80009d8: 6af9 ldr r1, [r7, #44] @ 0x2c - 80009da: 6b38 ldr r0, [r7, #48] @ 0x30 - 80009dc: f7ff fbc2 bl 8000164 <__aeabi_fsub> - 80009e0: 4603 mov r3, r0 - 80009e2: 2102 movs r1, #2 - 80009e4: 4618 mov r0, r3 - 80009e6: f000 f95b bl 8000ca0 - 80009ea: 4603 mov r3, r0 + return AD5934_Round_Float_Precision((temperature-drift),1); + 8001104: 6af9 ldr r1, [r7, #44] @ 0x2c + 8001106: 6b38 ldr r0, [r7, #48] @ 0x30 + 8001108: f7ff fbc2 bl 8000890 <__aeabi_fsub> + 800110c: 4603 mov r3, r0 + 800110e: 2101 movs r1, #1 + 8001110: 4618 mov r0, r3 + 8001112: f000 f955 bl 80013c0 + 8001116: 4603 mov r3, r0 } - 80009ec: 4618 mov r0, r3 - 80009ee: 3738 adds r7, #56 @ 0x38 - 80009f0: 46bd mov sp, r7 - 80009f2: bd80 pop {r7, pc} - 80009f4: 40010800 .word 0x40010800 - 80009f8: 42c80000 .word 0x42c80000 - 80009fc: 4007ae14 .word 0x4007ae14 - 8000a00: 447a0000 .word 0x447a0000 - 8000a04: 3e6147ae .word 0x3e6147ae - 8000a08: 361b057f .word 0x361b057f - 8000a0c: 37802266 .word 0x37802266 - 8000a10: 3b801132 .word 0x3b801132 - 8000a14: b59b057f .word 0xb59b057f - 8000a18: 3b7c5048 .word 0x3b7c5048 + 8001118: 4618 mov r0, r3 + 800111a: 3738 adds r7, #56 @ 0x38 + 800111c: 46bd mov sp, r7 + 800111e: bd80 pop {r7, pc} + 8001120: 40010800 .word 0x40010800 + 8001124: 42c80000 .word 0x42c80000 + 8001128: 403ae148 .word 0x403ae148 + 800112c: 447a0000 .word 0x447a0000 + 8001130: 3ed70a3d .word 0x3ed70a3d + 8001134: 361b057f .word 0x361b057f + 8001138: 37802266 .word 0x37802266 + 800113c: 3b801132 .word 0x3b801132 + 8001140: b59b057f .word 0xb59b057f + 8001144: 3b7c5048 .word 0x3b7c5048 -08000a1c : +08001148 : * @param temperature_dut The current temperature of the DUT (Device Under Test). * * @return The value of the Magnitude of the dut when it in 25C. */ float AD5934_EC_Compensate_Magnitude_To_25C(float mag_dut, float temperature_dut) { - 8000a1c: b580 push {r7, lr} - 8000a1e: b084 sub sp, #16 - 8000a20: af00 add r7, sp, #0 - 8000a22: 6078 str r0, [r7, #4] - 8000a24: 6039 str r1, [r7, #0] + 8001148: b580 push {r7, lr} + 800114a: b084 sub sp, #16 + 800114c: af00 add r7, sp, #0 + 800114e: 6078 str r0, [r7, #4] + 8001150: 6039 str r1, [r7, #0] float factor = 1.0f + AD5934_EC_ALPHA_PER_C * (temperature_dut - AD5934_EC_TEMP_REF_C); - 8000a26: 4914 ldr r1, [pc, #80] @ (8000a78 ) - 8000a28: 6838 ldr r0, [r7, #0] - 8000a2a: f7ff fb9b bl 8000164 <__aeabi_fsub> - 8000a2e: 4603 mov r3, r0 - 8000a30: 4912 ldr r1, [pc, #72] @ (8000a7c ) - 8000a32: 4618 mov r0, r3 - 8000a34: f7ff fca0 bl 8000378 <__aeabi_fmul> - 8000a38: 4603 mov r3, r0 - 8000a3a: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 - 8000a3e: 4618 mov r0, r3 - 8000a40: f7ff fb92 bl 8000168 <__addsf3> - 8000a44: 4603 mov r3, r0 - 8000a46: 60fb str r3, [r7, #12] + 8001152: 4911 ldr r1, [pc, #68] @ (8001198 ) + 8001154: 6838 ldr r0, [r7, #0] + 8001156: f7ff fb9b bl 8000890 <__aeabi_fsub> + 800115a: 4603 mov r3, r0 + 800115c: 490f ldr r1, [pc, #60] @ (800119c ) + 800115e: 4618 mov r0, r3 + 8001160: f7ff fca0 bl 8000aa4 <__aeabi_fmul> + 8001164: 4603 mov r3, r0 + 8001166: f04f 517e mov.w r1, #1065353216 @ 0x3f800000 + 800116a: 4618 mov r0, r3 + 800116c: f7ff fb92 bl 8000894 <__addsf3> + 8001170: 4603 mov r3, r0 + 8001172: 60fb str r3, [r7, #12] if (factor < 0.1f) - 8000a48: 490d ldr r1, [pc, #52] @ (8000a80 ) - 8000a4a: 68f8 ldr r0, [r7, #12] - 8000a4c: f7ff fe32 bl 80006b4 <__aeabi_fcmplt> - 8000a50: 4603 mov r3, r0 - 8000a52: 2b00 cmp r3, #0 - 8000a54: d001 beq.n 8000a5a + 8001174: 490a ldr r1, [pc, #40] @ (80011a0 ) + 8001176: 68f8 ldr r0, [r7, #12] + 8001178: f7ff fe32 bl 8000de0 <__aeabi_fcmplt> + 800117c: 4603 mov r3, r0 + 800117e: 2b00 cmp r3, #0 + 8001180: d001 beq.n 8001186 factor = 0.1f; - 8000a56: 4b0a ldr r3, [pc, #40] @ (8000a80 ) - 8000a58: 60fb str r3, [r7, #12] + 8001182: 4b07 ldr r3, [pc, #28] @ (80011a0 ) + 8001184: 60fb str r3, [r7, #12] - return (AD5934_Round_Float_Precision((mag_dut / (factor)),2)); - 8000a5a: 68f9 ldr r1, [r7, #12] - 8000a5c: 6878 ldr r0, [r7, #4] - 8000a5e: f7ff fd3f bl 80004e0 <__aeabi_fdiv> - 8000a62: 4603 mov r3, r0 - 8000a64: 2102 movs r1, #2 - 8000a66: 4618 mov r0, r3 - 8000a68: f000 f91a bl 8000ca0 - 8000a6c: 4603 mov r3, r0 + return (mag_dut/factor); + 8001186: 68f9 ldr r1, [r7, #12] + 8001188: 6878 ldr r0, [r7, #4] + 800118a: f7ff fd3f bl 8000c0c <__aeabi_fdiv> + 800118e: 4603 mov r3, r0 } - 8000a6e: 4618 mov r0, r3 - 8000a70: 3710 adds r7, #16 - 8000a72: 46bd mov sp, r7 - 8000a74: bd80 pop {r7, pc} - 8000a76: bf00 nop - 8000a78: 41c80000 .word 0x41c80000 - 8000a7c: 3ca3d70a .word 0x3ca3d70a - 8000a80: 3dcccccd .word 0x3dcccccd + 8001190: 4618 mov r0, r3 + 8001192: 3710 adds r7, #16 + 8001194: 46bd mov sp, r7 + 8001196: bd80 pop {r7, pc} + 8001198: 41c80000 .word 0x41c80000 + 800119c: 3ca3d70a .word 0x3ca3d70a + 80011a0: 3dcccccd .word 0x3dcccccd -08000a84 : +080011a4 : * @param: none * * @return Magnitude (float). ******************************************************************************/ float AD5934_GetAdmittance(float mag_ref_10mS_MidGain, float mag_ref_1mS_MidGain, float mag_ref_1mS_HighGain, float mag_ref_0_1mS_HighGain, float mag_dut) { - 8000a84: b590 push {r4, r7, lr} - 8000a86: b08f sub sp, #60 @ 0x3c - 8000a88: af00 add r7, sp, #0 - 8000a8a: 60f8 str r0, [r7, #12] - 8000a8c: 60b9 str r1, [r7, #8] - 8000a8e: 607a str r2, [r7, #4] - 8000a90: 603b str r3, [r7, #0] + 80011a4: b590 push {r4, r7, lr} + 80011a6: b08f sub sp, #60 @ 0x3c + 80011a8: af00 add r7, sp, #0 + 80011aa: 60f8 str r0, [r7, #12] + 80011ac: 60b9 str r1, [r7, #8] + 80011ae: 607a str r2, [r7, #4] + 80011b0: 603b str r3, [r7, #0] uint8_t ch_ref; float mag_ref_Min, mag_ref_Max, res_ref_Min, res_ref_Max; if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) // Hardware Setup: Gain Selection (PA6) - 8000a92: 2140 movs r1, #64 @ 0x40 - 8000a94: 482e ldr r0, [pc, #184] @ (8000b50 ) - 8000a96: f002 fcff bl 8003498 - 8000a9a: 4603 mov r3, r0 - 8000a9c: 2b01 cmp r3, #1 - 8000a9e: d10b bne.n 8000ab8 + 80011b2: 2140 movs r1, #64 @ 0x40 + 80011b4: 482e ldr r0, [pc, #184] @ (8001270 ) + 80011b6: f002 fde7 bl 8003d88 + 80011ba: 4603 mov r3, r0 + 80011bc: 2b01 cmp r3, #1 + 80011be: d10b bne.n 80011d8 { ch_ref = AD5934_CH_EC_HIGH_GAIN; // 5mS - 8000aa0: 230e movs r3, #14 - 8000aa2: f887 3027 strb.w r3, [r7, #39] @ 0x27 + 80011c0: 230e movs r3, #14 + 80011c2: f887 3027 strb.w r3, [r7, #39] @ 0x27 mag_ref_Min = mag_ref_0_1mS_HighGain; // Ref 10k - 8000aa6: 683b ldr r3, [r7, #0] - 8000aa8: 637b str r3, [r7, #52] @ 0x34 + 80011c6: 683b ldr r3, [r7, #0] + 80011c8: 637b str r3, [r7, #52] @ 0x34 mag_ref_Max = mag_ref_1mS_HighGain; // Ref 1K - 8000aaa: 687b ldr r3, [r7, #4] - 8000aac: 633b str r3, [r7, #48] @ 0x30 + 80011ca: 687b ldr r3, [r7, #4] + 80011cc: 633b str r3, [r7, #48] @ 0x30 res_ref_Min = AD5934_EC_0_1MS; - 8000aae: 4b29 ldr r3, [pc, #164] @ (8000b54 ) - 8000ab0: 62fb str r3, [r7, #44] @ 0x2c + 80011ce: 4b29 ldr r3, [pc, #164] @ (8001274 ) + 80011d0: 62fb str r3, [r7, #44] @ 0x2c res_ref_Max = AD5934_EC_1MS; - 8000ab2: 4b29 ldr r3, [pc, #164] @ (8000b58 ) - 8000ab4: 62bb str r3, [r7, #40] @ 0x28 - 8000ab6: e00a b.n 8000ace + 80011d2: 4b29 ldr r3, [pc, #164] @ (8001278 ) + 80011d4: 62bb str r3, [r7, #40] @ 0x28 + 80011d6: e00a b.n 80011ee } else { ch_ref = AD5934_CH_EC_MID_GAIN; //10mS - 8000ab8: 230d movs r3, #13 - 8000aba: f887 3027 strb.w r3, [r7, #39] @ 0x27 + 80011d8: 230d movs r3, #13 + 80011da: f887 3027 strb.w r3, [r7, #39] @ 0x27 mag_ref_Min = mag_ref_1mS_MidGain; // Ref 1K - 8000abe: 68bb ldr r3, [r7, #8] - 8000ac0: 637b str r3, [r7, #52] @ 0x34 + 80011de: 68bb ldr r3, [r7, #8] + 80011e0: 637b str r3, [r7, #52] @ 0x34 mag_ref_Max = mag_ref_10mS_MidGain; // Ref 100R - 8000ac2: 68fb ldr r3, [r7, #12] - 8000ac4: 633b str r3, [r7, #48] @ 0x30 + 80011e2: 68fb ldr r3, [r7, #12] + 80011e4: 633b str r3, [r7, #48] @ 0x30 res_ref_Min = AD5934_EC_1MS; - 8000ac6: 4b24 ldr r3, [pc, #144] @ (8000b58 ) - 8000ac8: 62fb str r3, [r7, #44] @ 0x2c + 80011e6: 4b24 ldr r3, [pc, #144] @ (8001278 ) + 80011e8: 62fb str r3, [r7, #44] @ 0x2c res_ref_Max = AD5934_EC_10MS; - 8000aca: 4b24 ldr r3, [pc, #144] @ (8000b5c ) - 8000acc: 62bb str r3, [r7, #40] @ 0x28 + 80011ea: 4b24 ldr r3, [pc, #144] @ (800127c ) + 80011ec: 62bb str r3, [r7, #40] @ 0x28 } float gain_factor = (res_ref_Max - res_ref_Min)/(mag_ref_Max - mag_ref_Min); - 8000ace: 6af9 ldr r1, [r7, #44] @ 0x2c - 8000ad0: 6ab8 ldr r0, [r7, #40] @ 0x28 - 8000ad2: f7ff fb47 bl 8000164 <__aeabi_fsub> - 8000ad6: 4603 mov r3, r0 - 8000ad8: 461c mov r4, r3 - 8000ada: 6b79 ldr r1, [r7, #52] @ 0x34 - 8000adc: 6b38 ldr r0, [r7, #48] @ 0x30 - 8000ade: f7ff fb41 bl 8000164 <__aeabi_fsub> - 8000ae2: 4603 mov r3, r0 - 8000ae4: 4619 mov r1, r3 - 8000ae6: 4620 mov r0, r4 - 8000ae8: f7ff fcfa bl 80004e0 <__aeabi_fdiv> - 8000aec: 4603 mov r3, r0 - 8000aee: 623b str r3, [r7, #32] + 80011ee: 6af9 ldr r1, [r7, #44] @ 0x2c + 80011f0: 6ab8 ldr r0, [r7, #40] @ 0x28 + 80011f2: f7ff fb4d bl 8000890 <__aeabi_fsub> + 80011f6: 4603 mov r3, r0 + 80011f8: 461c mov r4, r3 + 80011fa: 6b79 ldr r1, [r7, #52] @ 0x34 + 80011fc: 6b38 ldr r0, [r7, #48] @ 0x30 + 80011fe: f7ff fb47 bl 8000890 <__aeabi_fsub> + 8001202: 4603 mov r3, r0 + 8001204: 4619 mov r1, r3 + 8001206: 4620 mov r0, r4 + 8001208: f7ff fd00 bl 8000c0c <__aeabi_fdiv> + 800120c: 4603 mov r3, r0 + 800120e: 623b str r3, [r7, #32] float offset = mag_ref_Max - (res_ref_Max/gain_factor); - 8000af0: 6a39 ldr r1, [r7, #32] - 8000af2: 6ab8 ldr r0, [r7, #40] @ 0x28 - 8000af4: f7ff fcf4 bl 80004e0 <__aeabi_fdiv> - 8000af8: 4603 mov r3, r0 - 8000afa: 4619 mov r1, r3 - 8000afc: 6b38 ldr r0, [r7, #48] @ 0x30 - 8000afe: f7ff fb31 bl 8000164 <__aeabi_fsub> - 8000b02: 4603 mov r3, r0 - 8000b04: 61fb str r3, [r7, #28] + 8001210: 6a39 ldr r1, [r7, #32] + 8001212: 6ab8 ldr r0, [r7, #40] @ 0x28 + 8001214: f7ff fcfa bl 8000c0c <__aeabi_fdiv> + 8001218: 4603 mov r3, r0 + 800121a: 4619 mov r1, r3 + 800121c: 6b38 ldr r0, [r7, #48] @ 0x30 + 800121e: f7ff fb37 bl 8000890 <__aeabi_fsub> + 8001222: 4603 mov r3, r0 + 8001224: 61fb str r3, [r7, #28] float admittance = (mag_dut - offset) * gain_factor; - 8000b06: 69f9 ldr r1, [r7, #28] - 8000b08: 6cb8 ldr r0, [r7, #72] @ 0x48 - 8000b0a: f7ff fb2b bl 8000164 <__aeabi_fsub> - 8000b0e: 4603 mov r3, r0 - 8000b10: 4619 mov r1, r3 - 8000b12: 6a38 ldr r0, [r7, #32] - 8000b14: f7ff fc30 bl 8000378 <__aeabi_fmul> - 8000b18: 4603 mov r3, r0 - 8000b1a: 61bb str r3, [r7, #24] + 8001226: 69f9 ldr r1, [r7, #28] + 8001228: 6cb8 ldr r0, [r7, #72] @ 0x48 + 800122a: f7ff fb31 bl 8000890 <__aeabi_fsub> + 800122e: 4603 mov r3, r0 + 8001230: 4619 mov r1, r3 + 8001232: 6a38 ldr r0, [r7, #32] + 8001234: f7ff fc36 bl 8000aa4 <__aeabi_fmul> + 8001238: 4603 mov r3, r0 + 800123a: 61bb str r3, [r7, #24] float y_cell = admittance / (1 - (AD5934_EC_IN_SERIES_RESISTOR * admittance)); // Resistor in series with EC is 100 Ohms on PCB - 8000b1c: 4910 ldr r1, [pc, #64] @ (8000b60 ) - 8000b1e: 69b8 ldr r0, [r7, #24] - 8000b20: f7ff fc2a bl 8000378 <__aeabi_fmul> - 8000b24: 4603 mov r3, r0 - 8000b26: 4619 mov r1, r3 - 8000b28: f04f 507e mov.w r0, #1065353216 @ 0x3f800000 - 8000b2c: f7ff fb1a bl 8000164 <__aeabi_fsub> - 8000b30: 4603 mov r3, r0 - 8000b32: 4619 mov r1, r3 - 8000b34: 69b8 ldr r0, [r7, #24] - 8000b36: f7ff fcd3 bl 80004e0 <__aeabi_fdiv> - 8000b3a: 4603 mov r3, r0 - 8000b3c: 617b str r3, [r7, #20] + 800123c: 4910 ldr r1, [pc, #64] @ (8001280 ) + 800123e: 69b8 ldr r0, [r7, #24] + 8001240: f7ff fc30 bl 8000aa4 <__aeabi_fmul> + 8001244: 4603 mov r3, r0 + 8001246: 4619 mov r1, r3 + 8001248: f04f 507e mov.w r0, #1065353216 @ 0x3f800000 + 800124c: f7ff fb20 bl 8000890 <__aeabi_fsub> + 8001250: 4603 mov r3, r0 + 8001252: 4619 mov r1, r3 + 8001254: 69b8 ldr r0, [r7, #24] + 8001256: f7ff fcd9 bl 8000c0c <__aeabi_fdiv> + 800125a: 4603 mov r3, r0 + 800125c: 617b str r3, [r7, #20] - return (y_cell*1000000); // in uS - 8000b3e: 4909 ldr r1, [pc, #36] @ (8000b64 ) - 8000b40: 6978 ldr r0, [r7, #20] - 8000b42: f7ff fc19 bl 8000378 <__aeabi_fmul> - 8000b46: 4603 mov r3, r0 + //float y_cell = admittance; + + return (y_cell*1000); // in mS + 800125e: 4909 ldr r1, [pc, #36] @ (8001284 ) + 8001260: 6978 ldr r0, [r7, #20] + 8001262: f7ff fc1f bl 8000aa4 <__aeabi_fmul> + 8001266: 4603 mov r3, r0 } - 8000b48: 4618 mov r0, r3 - 8000b4a: 373c adds r7, #60 @ 0x3c - 8000b4c: 46bd mov sp, r7 - 8000b4e: bd90 pop {r4, r7, pc} - 8000b50: 40010800 .word 0x40010800 - 8000b54: 38d1b717 .word 0x38d1b717 - 8000b58: 3a83126f .word 0x3a83126f - 8000b5c: 3c23d70a .word 0x3c23d70a - 8000b60: 42c80000 .word 0x42c80000 - 8000b64: 49742400 .word 0x49742400 + 8001268: 4618 mov r0, r3 + 800126a: 373c adds r7, #60 @ 0x3c + 800126c: 46bd mov sp, r7 + 800126e: bd90 pop {r4, r7, pc} + 8001270: 40010800 .word 0x40010800 + 8001274: 38d1b717 .word 0x38d1b717 + 8001278: 3a83126f .word 0x3a83126f + 800127c: 3c23d70a .word 0x3c23d70a + 8001280: 42c80000 .word 0x42c80000 + 8001284: 447a0000 .word 0x447a0000 -08000b68 : +08001288 : * @param: none * * @return Magnitude (int16). ******************************************************************************/ uint32_t AD5934_Get_Real_Imag_Numbers(void) { - 8000b68: b580 push {r7, lr} - 8000b6a: b082 sub sp, #8 - 8000b6c: af00 add r7, sp, #0 + 8001288: b580 push {r7, lr} + 800128a: b082 sub sp, #8 + 800128c: af00 add r7, sp, #0 uint32_t real_imag_reg = AD5934_GetRegisterValue(AD5934_IMG_REG_LB, 4); //AD5934_ReadRegister(AD5934_REAL_REG_LB, 4); // - 8000b6e: 2104 movs r1, #4 - 8000b70: 2097 movs r0, #151 @ 0x97 - 8000b72: f7ff fe2f bl 80007d4 - 8000b76: 6078 str r0, [r7, #4] + 800128e: 2104 movs r1, #4 + 8001290: 2097 movs r0, #151 @ 0x97 + 8001292: f7ff fe35 bl 8000f00 + 8001296: 6078 str r0, [r7, #4] return (real_imag_reg); - 8000b78: 687b ldr r3, [r7, #4] + 8001298: 687b ldr r3, [r7, #4] } - 8000b7a: 4618 mov r0, r3 - 8000b7c: 3708 adds r7, #8 - 8000b7e: 46bd mov sp, r7 - 8000b80: bd80 pop {r7, pc} + 800129a: 4618 mov r0, r3 + 800129c: 3708 adds r7, #8 + 800129e: 46bd mov sp, r7 + 80012a0: bd80 pop {r7, pc} ... -08000b84 : +080012a4 : * @param scale Escala de Ref Res, EC e RTD * * @return uint16_t Valor convertido na escala de UINT16_MIN a UINT16_MAX */ uint16_t AD5934_Compress_To_IntScale(float value, uint8_t scale) { - 8000b84: b590 push {r4, r7, lr} - 8000b86: b085 sub sp, #20 - 8000b88: af00 add r7, sp, #0 - 8000b8a: 6078 str r0, [r7, #4] - 8000b8c: 460b mov r3, r1 - 8000b8e: 70fb strb r3, [r7, #3] + 80012a4: b590 push {r4, r7, lr} + 80012a6: b085 sub sp, #20 + 80012a8: af00 add r7, sp, #0 + 80012aa: 6078 str r0, [r7, #4] + 80012ac: 460b mov r3, r1 + 80012ae: 70fb strb r3, [r7, #3] // Proteção contra índice inválido para evitar HardFault if (scale >= AD5934_CH_MAX) - 8000b90: 78fb ldrb r3, [r7, #3] - 8000b92: 2b0e cmp r3, #14 - 8000b94: d901 bls.n 8000b9a + 80012b0: 78fb ldrb r3, [r7, #3] + 80012b2: 2b0e cmp r3, #14 + 80012b4: d901 bls.n 80012ba return 0; - 8000b96: 2300 movs r3, #0 - 8000b98: e075 b.n 8000c86 + 80012b6: 2300 movs r3, #0 + 80012b8: e075 b.n 80013a6 // Verifica limites do valor de entrada if (value < AD5934_Scale_Float_Min[scale]) - 8000b9a: 78fb ldrb r3, [r7, #3] - 8000b9c: 4a3c ldr r2, [pc, #240] @ (8000c90 ) - 8000b9e: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8000ba2: 4619 mov r1, r3 - 8000ba4: 6878 ldr r0, [r7, #4] - 8000ba6: f7ff fd85 bl 80006b4 <__aeabi_fcmplt> - 8000baa: 4603 mov r3, r0 - 8000bac: 2b00 cmp r3, #0 - 8000bae: d004 beq.n 8000bba + 80012ba: 78fb ldrb r3, [r7, #3] + 80012bc: 4a3c ldr r2, [pc, #240] @ (80013b0 ) + 80012be: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 80012c2: 4619 mov r1, r3 + 80012c4: 6878 ldr r0, [r7, #4] + 80012c6: f7ff fd8b bl 8000de0 <__aeabi_fcmplt> + 80012ca: 4603 mov r3, r0 + 80012cc: 2b00 cmp r3, #0 + 80012ce: d004 beq.n 80012da return AD5934_Scale_Out_Min[scale]; - 8000bb0: 78fb ldrb r3, [r7, #3] - 8000bb2: 4a38 ldr r2, [pc, #224] @ (8000c94 ) - 8000bb4: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000bb8: e065 b.n 8000c86 + 80012d0: 78fb ldrb r3, [r7, #3] + 80012d2: 4a38 ldr r2, [pc, #224] @ (80013b4 ) + 80012d4: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 80012d8: e065 b.n 80013a6 else if (value > AD5934_Scale_Float_Max[scale]) - 8000bba: 78fb ldrb r3, [r7, #3] - 8000bbc: 4a36 ldr r2, [pc, #216] @ (8000c98 ) - 8000bbe: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8000bc2: 4619 mov r1, r3 - 8000bc4: 6878 ldr r0, [r7, #4] - 8000bc6: f7ff fd93 bl 80006f0 <__aeabi_fcmpgt> - 8000bca: 4603 mov r3, r0 - 8000bcc: 2b00 cmp r3, #0 - 8000bce: d004 beq.n 8000bda + 80012da: 78fb ldrb r3, [r7, #3] + 80012dc: 4a36 ldr r2, [pc, #216] @ (80013b8 ) + 80012de: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 80012e2: 4619 mov r1, r3 + 80012e4: 6878 ldr r0, [r7, #4] + 80012e6: f7ff fd99 bl 8000e1c <__aeabi_fcmpgt> + 80012ea: 4603 mov r3, r0 + 80012ec: 2b00 cmp r3, #0 + 80012ee: d004 beq.n 80012fa return AD5934_Scale_Out_Max[scale]; - 8000bd0: 78fb ldrb r3, [r7, #3] - 8000bd2: 4a32 ldr r2, [pc, #200] @ (8000c9c ) - 8000bd4: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000bd8: e055 b.n 8000c86 + 80012f0: 78fb ldrb r3, [r7, #3] + 80012f2: 4a32 ldr r2, [pc, #200] @ (80013bc ) + 80012f4: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 80012f8: e055 b.n 80013a6 // Converte o valor usando a fórmula: ((value - FLOAT_MIN) / (FLOAT_MAX - FLOAT_MIN)) * (UINT16_MAX - UINT16_MIN) + UINT16_MIN //uint16_t result = (uint16_t)(((value - AD5934_Scale_Float_Min[scale]) / (AD5934_Scale_Float_Max[scale] - AD5934_Scale_Float_Min[scale])) * ((float)AD5934_Scale_Out_Max[scale] - (float)AD5934_Scale_Out_Min[scale]) + (float)AD5934_Scale_Out_Min[scale]); float factor = ((float)AD5934_Scale_Out_Max[scale] - (float)AD5934_Scale_Out_Min[scale]) / (AD5934_Scale_Float_Max[scale] - AD5934_Scale_Float_Min[scale]); - 8000bda: 78fb ldrb r3, [r7, #3] - 8000bdc: 4a2f ldr r2, [pc, #188] @ (8000c9c ) - 8000bde: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000be2: 4618 mov r0, r3 - 8000be4: f7ff fb70 bl 80002c8 <__aeabi_ui2f> - 8000be8: 4604 mov r4, r0 - 8000bea: 78fb ldrb r3, [r7, #3] - 8000bec: 4a29 ldr r2, [pc, #164] @ (8000c94 ) - 8000bee: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000bf2: 4618 mov r0, r3 - 8000bf4: f7ff fb68 bl 80002c8 <__aeabi_ui2f> - 8000bf8: 4603 mov r3, r0 - 8000bfa: 4619 mov r1, r3 - 8000bfc: 4620 mov r0, r4 - 8000bfe: f7ff fab1 bl 8000164 <__aeabi_fsub> - 8000c02: 4603 mov r3, r0 - 8000c04: 461c mov r4, r3 - 8000c06: 78fb ldrb r3, [r7, #3] - 8000c08: 4a23 ldr r2, [pc, #140] @ (8000c98 ) - 8000c0a: f852 2023 ldr.w r2, [r2, r3, lsl #2] - 8000c0e: 78fb ldrb r3, [r7, #3] - 8000c10: 491f ldr r1, [pc, #124] @ (8000c90 ) - 8000c12: f851 3023 ldr.w r3, [r1, r3, lsl #2] - 8000c16: 4619 mov r1, r3 - 8000c18: 4610 mov r0, r2 - 8000c1a: f7ff faa3 bl 8000164 <__aeabi_fsub> - 8000c1e: 4603 mov r3, r0 - 8000c20: 4619 mov r1, r3 - 8000c22: 4620 mov r0, r4 - 8000c24: f7ff fc5c bl 80004e0 <__aeabi_fdiv> - 8000c28: 4603 mov r3, r0 - 8000c2a: 60fb str r3, [r7, #12] + 80012fa: 78fb ldrb r3, [r7, #3] + 80012fc: 4a2f ldr r2, [pc, #188] @ (80013bc ) + 80012fe: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8001302: 4618 mov r0, r3 + 8001304: f7ff fb76 bl 80009f4 <__aeabi_ui2f> + 8001308: 4604 mov r4, r0 + 800130a: 78fb ldrb r3, [r7, #3] + 800130c: 4a29 ldr r2, [pc, #164] @ (80013b4 ) + 800130e: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8001312: 4618 mov r0, r3 + 8001314: f7ff fb6e bl 80009f4 <__aeabi_ui2f> + 8001318: 4603 mov r3, r0 + 800131a: 4619 mov r1, r3 + 800131c: 4620 mov r0, r4 + 800131e: f7ff fab7 bl 8000890 <__aeabi_fsub> + 8001322: 4603 mov r3, r0 + 8001324: 461c mov r4, r3 + 8001326: 78fb ldrb r3, [r7, #3] + 8001328: 4a23 ldr r2, [pc, #140] @ (80013b8 ) + 800132a: f852 2023 ldr.w r2, [r2, r3, lsl #2] + 800132e: 78fb ldrb r3, [r7, #3] + 8001330: 491f ldr r1, [pc, #124] @ (80013b0 ) + 8001332: f851 3023 ldr.w r3, [r1, r3, lsl #2] + 8001336: 4619 mov r1, r3 + 8001338: 4610 mov r0, r2 + 800133a: f7ff faa9 bl 8000890 <__aeabi_fsub> + 800133e: 4603 mov r3, r0 + 8001340: 4619 mov r1, r3 + 8001342: 4620 mov r0, r4 + 8001344: f7ff fc62 bl 8000c0c <__aeabi_fdiv> + 8001348: 4603 mov r3, r0 + 800134a: 60fb str r3, [r7, #12] uint16_t result = (uint16_t)((float)AD5934_Scale_Out_Min[scale] + (value - AD5934_Scale_Float_Min[scale]) * factor); - 8000c2c: 78fb ldrb r3, [r7, #3] - 8000c2e: 4a19 ldr r2, [pc, #100] @ (8000c94 ) - 8000c30: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000c34: 4618 mov r0, r3 - 8000c36: f7ff fb47 bl 80002c8 <__aeabi_ui2f> - 8000c3a: 4604 mov r4, r0 - 8000c3c: 78fb ldrb r3, [r7, #3] - 8000c3e: 4a14 ldr r2, [pc, #80] @ (8000c90 ) - 8000c40: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8000c44: 4619 mov r1, r3 - 8000c46: 6878 ldr r0, [r7, #4] - 8000c48: f7ff fa8c bl 8000164 <__aeabi_fsub> - 8000c4c: 4603 mov r3, r0 - 8000c4e: 68f9 ldr r1, [r7, #12] - 8000c50: 4618 mov r0, r3 - 8000c52: f7ff fb91 bl 8000378 <__aeabi_fmul> - 8000c56: 4603 mov r3, r0 - 8000c58: 4619 mov r1, r3 - 8000c5a: 4620 mov r0, r4 - 8000c5c: f7ff fa84 bl 8000168 <__addsf3> - 8000c60: 4603 mov r3, r0 - 8000c62: 4618 mov r0, r3 - 8000c64: f7ff fd64 bl 8000730 <__aeabi_f2uiz> - 8000c68: 4603 mov r3, r0 - 8000c6a: 817b strh r3, [r7, #10] + 800134c: 78fb ldrb r3, [r7, #3] + 800134e: 4a19 ldr r2, [pc, #100] @ (80013b4 ) + 8001350: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8001354: 4618 mov r0, r3 + 8001356: f7ff fb4d bl 80009f4 <__aeabi_ui2f> + 800135a: 4604 mov r4, r0 + 800135c: 78fb ldrb r3, [r7, #3] + 800135e: 4a14 ldr r2, [pc, #80] @ (80013b0 ) + 8001360: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8001364: 4619 mov r1, r3 + 8001366: 6878 ldr r0, [r7, #4] + 8001368: f7ff fa92 bl 8000890 <__aeabi_fsub> + 800136c: 4603 mov r3, r0 + 800136e: 68f9 ldr r1, [r7, #12] + 8001370: 4618 mov r0, r3 + 8001372: f7ff fb97 bl 8000aa4 <__aeabi_fmul> + 8001376: 4603 mov r3, r0 + 8001378: 4619 mov r1, r3 + 800137a: 4620 mov r0, r4 + 800137c: f7ff fa8a bl 8000894 <__addsf3> + 8001380: 4603 mov r3, r0 + 8001382: 4618 mov r0, r3 + 8001384: f7ff fd6a bl 8000e5c <__aeabi_f2uiz> + 8001388: 4603 mov r3, r0 + 800138a: 817b strh r3, [r7, #10] // Garante que o resultado não exceda o limite superior if (result > AD5934_Scale_Out_Max[scale]) - 8000c6c: 78fb ldrb r3, [r7, #3] - 8000c6e: 4a0b ldr r2, [pc, #44] @ (8000c9c ) - 8000c70: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000c74: 897a ldrh r2, [r7, #10] - 8000c76: 429a cmp r2, r3 - 8000c78: d904 bls.n 8000c84 + 800138c: 78fb ldrb r3, [r7, #3] + 800138e: 4a0b ldr r2, [pc, #44] @ (80013bc ) + 8001390: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 8001394: 897a ldrh r2, [r7, #10] + 8001396: 429a cmp r2, r3 + 8001398: d904 bls.n 80013a4 return (AD5934_Scale_Out_Max[scale]); - 8000c7a: 78fb ldrb r3, [r7, #3] - 8000c7c: 4a07 ldr r2, [pc, #28] @ (8000c9c ) - 8000c7e: f832 3013 ldrh.w r3, [r2, r3, lsl #1] - 8000c82: e000 b.n 8000c86 + 800139a: 78fb ldrb r3, [r7, #3] + 800139c: 4a07 ldr r2, [pc, #28] @ (80013bc ) + 800139e: f832 3013 ldrh.w r3, [r2, r3, lsl #1] + 80013a2: e000 b.n 80013a6 return result; - 8000c84: 897b ldrh r3, [r7, #10] + 80013a4: 897b ldrh r3, [r7, #10] } - 8000c86: 4618 mov r0, r3 - 8000c88: 3714 adds r7, #20 - 8000c8a: 46bd mov sp, r7 - 8000c8c: bd90 pop {r4, r7, pc} - 8000c8e: bf00 nop - 8000c90: 08006524 .word 0x08006524 - 8000c94: 0800659c .word 0x0800659c - 8000c98: 08006560 .word 0x08006560 - 8000c9c: 080065bc .word 0x080065bc + 80013a6: 4618 mov r0, r3 + 80013a8: 3714 adds r7, #20 + 80013aa: 46bd mov sp, r7 + 80013ac: bd90 pop {r4, r7, pc} + 80013ae: bf00 nop + 80013b0: 08006e14 .word 0x08006e14 + 80013b4: 08006e8c .word 0x08006e8c + 80013b8: 08006e50 .word 0x08006e50 + 80013bc: 08006eac .word 0x08006eac -08000ca0 : +080013c0 : * @param valor O valor float original. * @param casas_decimais Quantidade de casas que devem permanecer após a vírgula. * @return float O valor com as casas decimais excedentes removidas. */ float AD5934_Round_Float_Precision(float value, uint8_t number_of_decimals) { - 8000ca0: b580 push {r7, lr} - 8000ca2: b084 sub sp, #16 - 8000ca4: af00 add r7, sp, #0 - 8000ca6: 6078 str r0, [r7, #4] - 8000ca8: 460b mov r3, r1 - 8000caa: 70fb strb r3, [r7, #3] + 80013c0: b580 push {r7, lr} + 80013c2: b084 sub sp, #16 + 80013c4: af00 add r7, sp, #0 + 80013c6: 6078 str r0, [r7, #4] + 80013c8: 460b mov r3, r1 + 80013ca: 70fb strb r3, [r7, #3] float multiply = 1.0f; - 8000cac: f04f 537e mov.w r3, #1065353216 @ 0x3f800000 - 8000cb0: 60fb str r3, [r7, #12] + 80013cc: f04f 537e mov.w r3, #1065353216 @ 0x3f800000 + 80013d0: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < number_of_decimals; i++) - 8000cb2: 2300 movs r3, #0 - 8000cb4: 72fb strb r3, [r7, #11] - 8000cb6: e008 b.n 8000cca + 80013d2: 2300 movs r3, #0 + 80013d4: 72fb strb r3, [r7, #11] + 80013d6: e008 b.n 80013ea multiply *= 10.0f; - 8000cb8: 490f ldr r1, [pc, #60] @ (8000cf8 ) - 8000cba: 68f8 ldr r0, [r7, #12] - 8000cbc: f7ff fb5c bl 8000378 <__aeabi_fmul> - 8000cc0: 4603 mov r3, r0 - 8000cc2: 60fb str r3, [r7, #12] + 80013d8: 490f ldr r1, [pc, #60] @ (8001418 ) + 80013da: 68f8 ldr r0, [r7, #12] + 80013dc: f7ff fb62 bl 8000aa4 <__aeabi_fmul> + 80013e0: 4603 mov r3, r0 + 80013e2: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < number_of_decimals; i++) - 8000cc4: 7afb ldrb r3, [r7, #11] - 8000cc6: 3301 adds r3, #1 - 8000cc8: 72fb strb r3, [r7, #11] - 8000cca: 7afa ldrb r2, [r7, #11] - 8000ccc: 78fb ldrb r3, [r7, #3] - 8000cce: 429a cmp r2, r3 - 8000cd0: d3f2 bcc.n 8000cb8 + 80013e4: 7afb ldrb r3, [r7, #11] + 80013e6: 3301 adds r3, #1 + 80013e8: 72fb strb r3, [r7, #11] + 80013ea: 7afa ldrb r2, [r7, #11] + 80013ec: 78fb ldrb r3, [r7, #3] + 80013ee: 429a cmp r2, r3 + 80013f0: d3f2 bcc.n 80013d8 return roundf(value * multiply) / multiply; - 8000cd2: 68f9 ldr r1, [r7, #12] - 8000cd4: 6878 ldr r0, [r7, #4] - 8000cd6: f7ff fb4f bl 8000378 <__aeabi_fmul> - 8000cda: 4603 mov r3, r0 - 8000cdc: 4618 mov r0, r3 - 8000cde: f005 fbe9 bl 80064b4 - 8000ce2: 4603 mov r3, r0 - 8000ce4: 68f9 ldr r1, [r7, #12] - 8000ce6: 4618 mov r0, r3 - 8000ce8: f7ff fbfa bl 80004e0 <__aeabi_fdiv> - 8000cec: 4603 mov r3, r0 + 80013f2: 68f9 ldr r1, [r7, #12] + 80013f4: 6878 ldr r0, [r7, #4] + 80013f6: f7ff fb55 bl 8000aa4 <__aeabi_fmul> + 80013fa: 4603 mov r3, r0 + 80013fc: 4618 mov r0, r3 + 80013fe: f005 fcd1 bl 8006da4 + 8001402: 4603 mov r3, r0 + 8001404: 68f9 ldr r1, [r7, #12] + 8001406: 4618 mov r0, r3 + 8001408: f7ff fc00 bl 8000c0c <__aeabi_fdiv> + 800140c: 4603 mov r3, r0 } - 8000cee: 4618 mov r0, r3 - 8000cf0: 3710 adds r7, #16 - 8000cf2: 46bd mov sp, r7 - 8000cf4: bd80 pop {r7, pc} - 8000cf6: bf00 nop - 8000cf8: 41200000 .word 0x41200000 + 800140e: 4618 mov r0, r3 + 8001410: 3710 adds r7, #16 + 8001412: 46bd mov sp, r7 + 8001414: bd80 pop {r7, pc} + 8001416: bf00 nop + 8001418: 41200000 .word 0x41200000 -08000cfc : +0800141c : * @param none * * @return none */ void AD5934_Process_System(void) { - 8000cfc: b5b0 push {r4, r5, r7, lr} - 8000cfe: b084 sub sp, #16 - 8000d00: af00 add r7, sp, #0 + 800141c: b5b0 push {r4, r5, r7, lr} + 800141e: b084 sub sp, #16 + 8001420: af00 add r7, sp, #0 switch (ad5934_state) - 8000d02: 4baa ldr r3, [pc, #680] @ (8000fac ) - 8000d04: 781b ldrb r3, [r3, #0] - 8000d06: b2db uxtb r3, r3 - 8000d08: 2b06 cmp r3, #6 - 8000d0a: f200 814b bhi.w 8000fa4 - 8000d0e: a201 add r2, pc, #4 @ (adr r2, 8000d14 ) - 8000d10: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8000d14: 08000d31 .word 0x08000d31 - 8000d18: 08000d51 .word 0x08000d51 - 8000d1c: 08000d5f .word 0x08000d5f - 8000d20: 08000d7f .word 0x08000d7f - 8000d24: 08000fa5 .word 0x08000fa5 - 8000d28: 08000fa5 .word 0x08000fa5 - 8000d2c: 08000e7b .word 0x08000e7b + 8001422: 4ba4 ldr r3, [pc, #656] @ (80016b4 ) + 8001424: 781b ldrb r3, [r3, #0] + 8001426: b2db uxtb r3, r3 + 8001428: 2b06 cmp r3, #6 + 800142a: f200 813f bhi.w 80016ac + 800142e: a201 add r2, pc, #4 @ (adr r2, 8001434 ) + 8001430: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8001434: 08001451 .word 0x08001451 + 8001438: 08001471 .word 0x08001471 + 800143c: 0800147f .word 0x0800147f + 8001440: 0800149f .word 0x0800149f + 8001444: 080016ad .word 0x080016ad + 8001448: 080016ad .word 0x080016ad + 800144c: 0800158f .word 0x0800158f { case AD5934_IDLE: ADG715_SetChannels(current_hw_mux_connection); // Starts changing the mux channel - 8000d30: 4b9f ldr r3, [pc, #636] @ (8000fb0 ) - 8000d32: 781b ldrb r3, [r3, #0] - 8000d34: 4618 mov r0, r3 - 8000d36: f000 fb31 bl 800139c + 8001450: 4b99 ldr r3, [pc, #612] @ (80016b8 ) + 8001452: 781b ldrb r3, [r3, #0] + 8001454: 4618 mov r0, r3 + 8001456: f000 fb19 bl 8001a8c is_new_channel = 1; // Forces first channel - 8000d3a: 4b9e ldr r3, [pc, #632] @ (8000fb4 ) - 8000d3c: 2201 movs r2, #1 - 8000d3e: 701a strb r2, [r3, #0] + 800145a: 4b98 ldr r3, [pc, #608] @ (80016bc ) + 800145c: 2201 movs r2, #1 + 800145e: 701a strb r2, [r3, #0] state_timer = g_ms_counter; - 8000d40: 4b9d ldr r3, [pc, #628] @ (8000fb8 ) - 8000d42: 681b ldr r3, [r3, #0] - 8000d44: 4a9d ldr r2, [pc, #628] @ (8000fbc ) - 8000d46: 6013 str r3, [r2, #0] + 8001460: 4b97 ldr r3, [pc, #604] @ (80016c0 ) + 8001462: 681b ldr r3, [r3, #0] + 8001464: 4a97 ldr r2, [pc, #604] @ (80016c4 ) + 8001466: 6013 str r3, [r2, #0] ad5934_state = AD5934_WAIT_MUX; - 8000d48: 4b98 ldr r3, [pc, #608] @ (8000fac ) - 8000d4a: 2201 movs r2, #1 - 8000d4c: 701a strb r2, [r3, #0] + 8001468: 4b92 ldr r3, [pc, #584] @ (80016b4 ) + 800146a: 2201 movs r2, #1 + 800146c: 701a strb r2, [r3, #0] break; - 8000d4e: e129 b.n 8000fa4 + 800146e: e11d b.n 80016ac case AD5934_WAIT_MUX: HAL_Delay(15); - 8000d50: 200f movs r0, #15 - 8000d52: f001 fe27 bl 80029a4 + 8001470: 200f movs r0, #15 + 8001472: f001 ff0f bl 8003294 ad5934_state = AD5934_START_CONVERSION; - 8000d56: 4b95 ldr r3, [pc, #596] @ (8000fac ) - 8000d58: 2202 movs r2, #2 - 8000d5a: 701a strb r2, [r3, #0] + 8001476: 4b8f ldr r3, [pc, #572] @ (80016b4 ) + 8001478: 2202 movs r2, #2 + 800147a: 701a strb r2, [r3, #0] break; - 8000d5c: e122 b.n 8000fa4 + 800147c: e116 b.n 80016ac case AD5934_START_CONVERSION: /* DECISÃO DE COMANDO: Novo canal vs Leituras sucessivas */ if (is_new_channel) // Decision: Channel Switched or Next Sample in the Burst ? - 8000d5e: 4b95 ldr r3, [pc, #596] @ (8000fb4 ) - 8000d60: 781b ldrb r3, [r3, #0] - 8000d62: 2b00 cmp r3, #0 - 8000d64: d005 beq.n 8000d72 + 800147e: 4b8f ldr r3, [pc, #572] @ (80016bc ) + 8001480: 781b ldrb r3, [r3, #0] + 8001482: 2b00 cmp r3, #0 + 8001484: d005 beq.n 8001492 { AD5934_RestartSweep(); // Clean some AD5934 internal registers to Re-Start Sweep - 8000d66: f7ff fd9f bl 80008a8 + 8001486: f7ff fda5 bl 8000fd4 is_new_channel = 0; // Resets the flag to read the next Sample Burst - 8000d6a: 4b92 ldr r3, [pc, #584] @ (8000fb4 ) - 8000d6c: 2200 movs r2, #0 - 8000d6e: 701a strb r2, [r3, #0] - 8000d70: e001 b.n 8000d76 + 800148a: 4b8c ldr r3, [pc, #560] @ (80016bc ) + 800148c: 2200 movs r2, #0 + 800148e: 701a strb r2, [r3, #0] + 8001490: e001 b.n 8001496 } else { AD5934_Repeat_Sweep(); // Get Sample and just repeat reading - 8000d72: f7ff fdb1 bl 80008d8 + 8001492: f7ff fdb7 bl 8001004 } ad5934_state = AD5934_WAIT_CONVERSION; // Next State - 8000d76: 4b8d ldr r3, [pc, #564] @ (8000fac ) - 8000d78: 2203 movs r2, #3 - 8000d7a: 701a strb r2, [r3, #0] + 8001496: 4b87 ldr r3, [pc, #540] @ (80016b4 ) + 8001498: 2203 movs r2, #3 + 800149a: 701a strb r2, [r3, #0] break; - 8000d7c: e112 b.n 8000fa4 + 800149c: e106 b.n 80016ac case AD5934_WAIT_CONVERSION: uint8_t status = (uint8_t)AD5934_GetRegisterValue(AD5934_STATUS_REG, 1); // Check if the current converion is ready in the AD5934 - 8000d7e: 2101 movs r1, #1 - 8000d80: 208f movs r0, #143 @ 0x8f - 8000d82: f7ff fd27 bl 80007d4 - 8000d86: 4603 mov r3, r0 - 8000d88: 73fb strb r3, [r7, #15] + 800149e: 2101 movs r1, #1 + 80014a0: 208f movs r0, #143 @ 0x8f + 80014a2: f7ff fd2d bl 8000f00 + 80014a6: 4603 mov r3, r0 + 80014a8: 73fb strb r3, [r7, #15] if ((status & AD5934_STATUS_DATA_VALID) != 0) - 8000d8a: 7bfb ldrb r3, [r7, #15] - 8000d8c: f003 0302 and.w r3, r3, #2 - 8000d90: 2b00 cmp r3, #0 - 8000d92: f000 8106 beq.w 8000fa2 + 80014aa: 7bfb ldrb r3, [r7, #15] + 80014ac: f003 0302 and.w r3, r3, #2 + 80014b0: 2b00 cmp r3, #0 + 80014b2: f000 80fa beq.w 80016aa { uint32_t magnitude_int = AD5934_Get_Real_Imag_Numbers(); - 8000d96: f7ff fee7 bl 8000b68 - 8000d9a: 60b8 str r0, [r7, #8] + 80014b6: f7ff fee7 bl 8001288 + 80014ba: 60b8 str r0, [r7, #8] int16_t mag_real = (int16_t)(magnitude_int>>16); - 8000d9c: 68bb ldr r3, [r7, #8] - 8000d9e: 0c1b lsrs r3, r3, #16 - 8000da0: 80fb strh r3, [r7, #6] + 80014bc: 68bb ldr r3, [r7, #8] + 80014be: 0c1b lsrs r3, r3, #16 + 80014c0: 80fb strh r3, [r7, #6] int16_t mag_imag = (int16_t)(magnitude_int & 0x0000FFFF); - 8000da2: 68bb ldr r3, [r7, #8] - 8000da4: 80bb strh r3, [r7, #4] + 80014c2: 68bb ldr r3, [r7, #8] + 80014c4: 80bb strh r3, [r7, #4] float mag_float = sqrtf(((float)mag_real * (float)mag_real) + ((float)mag_imag * (float)mag_imag)); - 8000da6: f9b7 3006 ldrsh.w r3, [r7, #6] - 8000daa: 4618 mov r0, r3 - 8000dac: f7ff fa90 bl 80002d0 <__aeabi_i2f> - 8000db0: 4604 mov r4, r0 - 8000db2: f9b7 3006 ldrsh.w r3, [r7, #6] - 8000db6: 4618 mov r0, r3 - 8000db8: f7ff fa8a bl 80002d0 <__aeabi_i2f> - 8000dbc: 4603 mov r3, r0 - 8000dbe: 4619 mov r1, r3 - 8000dc0: 4620 mov r0, r4 - 8000dc2: f7ff fad9 bl 8000378 <__aeabi_fmul> - 8000dc6: 4603 mov r3, r0 - 8000dc8: 461d mov r5, r3 - 8000dca: f9b7 3004 ldrsh.w r3, [r7, #4] - 8000dce: 4618 mov r0, r3 - 8000dd0: f7ff fa7e bl 80002d0 <__aeabi_i2f> - 8000dd4: 4604 mov r4, r0 - 8000dd6: f9b7 3004 ldrsh.w r3, [r7, #4] - 8000dda: 4618 mov r0, r3 - 8000ddc: f7ff fa78 bl 80002d0 <__aeabi_i2f> - 8000de0: 4603 mov r3, r0 - 8000de2: 4619 mov r1, r3 - 8000de4: 4620 mov r0, r4 - 8000de6: f7ff fac7 bl 8000378 <__aeabi_fmul> - 8000dea: 4603 mov r3, r0 - 8000dec: 4619 mov r1, r3 - 8000dee: 4628 mov r0, r5 - 8000df0: f7ff f9ba bl 8000168 <__addsf3> - 8000df4: 4603 mov r3, r0 - 8000df6: 4618 mov r0, r3 - 8000df8: f005 facc bl 8006394 - 8000dfc: 6038 str r0, [r7, #0] + 80014c6: f9b7 3006 ldrsh.w r3, [r7, #6] + 80014ca: 4618 mov r0, r3 + 80014cc: f7ff fa96 bl 80009fc <__aeabi_i2f> + 80014d0: 4604 mov r4, r0 + 80014d2: f9b7 3006 ldrsh.w r3, [r7, #6] + 80014d6: 4618 mov r0, r3 + 80014d8: f7ff fa90 bl 80009fc <__aeabi_i2f> + 80014dc: 4603 mov r3, r0 + 80014de: 4619 mov r1, r3 + 80014e0: 4620 mov r0, r4 + 80014e2: f7ff fadf bl 8000aa4 <__aeabi_fmul> + 80014e6: 4603 mov r3, r0 + 80014e8: 461d mov r5, r3 + 80014ea: f9b7 3004 ldrsh.w r3, [r7, #4] + 80014ee: 4618 mov r0, r3 + 80014f0: f7ff fa84 bl 80009fc <__aeabi_i2f> + 80014f4: 4604 mov r4, r0 + 80014f6: f9b7 3004 ldrsh.w r3, [r7, #4] + 80014fa: 4618 mov r0, r3 + 80014fc: f7ff fa7e bl 80009fc <__aeabi_i2f> + 8001500: 4603 mov r3, r0 + 8001502: 4619 mov r1, r3 + 8001504: 4620 mov r0, r4 + 8001506: f7ff facd bl 8000aa4 <__aeabi_fmul> + 800150a: 4603 mov r3, r0 + 800150c: 4619 mov r1, r3 + 800150e: 4628 mov r0, r5 + 8001510: f7ff f9c0 bl 8000894 <__addsf3> + 8001514: 4603 mov r3, r0 + 8001516: 4618 mov r0, r3 + 8001518: f005 fbb4 bl 8006c84 + 800151c: 6038 str r0, [r7, #0] switch (current_mux_channel) - 8000dfe: 4b70 ldr r3, [pc, #448] @ (8000fc0 ) - 8000e00: 781b ldrb r3, [r3, #0] - 8000e02: 2b07 cmp r3, #7 - 8000e04: d832 bhi.n 8000e6c - 8000e06: a201 add r2, pc, #4 @ (adr r2, 8000e0c ) - 8000e08: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8000e0c: 08000e2d .word 0x08000e2d - 8000e10: 08000e35 .word 0x08000e35 - 8000e14: 08000e3d .word 0x08000e3d - 8000e18: 08000e45 .word 0x08000e45 - 8000e1c: 08000e4d .word 0x08000e4d - 8000e20: 08000e55 .word 0x08000e55 - 8000e24: 08000e5d .word 0x08000e5d - 8000e28: 08000e65 .word 0x08000e65 + 800151e: 4b6a ldr r3, [pc, #424] @ (80016c8 ) + 8001520: 781b ldrb r3, [r3, #0] + 8001522: 2b06 cmp r3, #6 + 8001524: d82c bhi.n 8001580 + 8001526: a201 add r2, pc, #4 @ (adr r2, 800152c ) + 8001528: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 800152c: 08001549 .word 0x08001549 + 8001530: 08001551 .word 0x08001551 + 8001534: 08001559 .word 0x08001559 + 8001538: 08001561 .word 0x08001561 + 800153c: 08001569 .word 0x08001569 + 8001540: 08001571 .word 0x08001571 + 8001544: 08001579 .word 0x08001579 { case AD5934_ID_RTD: AD5934_RTD_NewSample(mag_float); - 8000e2c: 6838 ldr r0, [r7, #0] - 8000e2e: f000 fa25 bl 800127c + 8001548: 6838 ldr r0, [r7, #0] + 800154a: f000 fa1d bl 8001988 break; - 8000e32: e01b b.n 8000e6c + 800154e: e017 b.n 8001580 case AD5934_ID_EC: AD5934_EC_NewSample(mag_float); - 8000e34: 6838 ldr r0, [r7, #0] - 8000e36: f000 fa2f bl 8001298 + 8001550: 6838 ldr r0, [r7, #0] + 8001552: f000 fa27 bl 80019a4 break; - 8000e3a: e017 b.n 8000e6c + 8001556: e013 b.n 8001580 case AD5934_ID_REF_100R_LOWGAIN: AD5934_Reference_100R_LowGain_NewSample(mag_float); - 8000e3c: 6838 ldr r0, [r7, #0] - 8000e3e: f000 fa39 bl 80012b4 + 8001558: 6838 ldr r0, [r7, #0] + 800155a: f000 fa31 bl 80019c0 break; - 8000e42: e013 b.n 8000e6c + 800155e: e00f b.n 8001580 case AD5934_ID_REF_100R_MIDGAIN: AD5934_Reference_100R_MidGain_NewSample(mag_float); - 8000e44: 6838 ldr r0, [r7, #0] - 8000e46: f000 fa43 bl 80012d0 + 8001560: 6838 ldr r0, [r7, #0] + 8001562: f000 fa3b bl 80019dc break; - 8000e4a: e00f b.n 8000e6c - case AD5934_ID_REF_100R_HIGHGAIN: - AD5934_Reference_100R_HighGain_NewSample(mag_float); - 8000e4c: 6838 ldr r0, [r7, #0] - 8000e4e: f000 fa4d bl 80012ec - break; - 8000e52: e00b b.n 8000e6c + 8001566: e00b b.n 8001580 case AD5934_ID_REF_1K_MIDGAIN: AD5934_Reference_1K_MidGain_NewSample(mag_float); - 8000e54: 6838 ldr r0, [r7, #0] - 8000e56: f000 fa57 bl 8001308 + 8001568: 6838 ldr r0, [r7, #0] + 800156a: f000 fa45 bl 80019f8 break; - 8000e5a: e007 b.n 8000e6c + 800156e: e007 b.n 8001580 case AD5934_ID_REF_1K_HIGHGAIN: AD5934_Reference_1K_HighGain_NewSample(mag_float); - 8000e5c: 6838 ldr r0, [r7, #0] - 8000e5e: f000 fa61 bl 8001324 + 8001570: 6838 ldr r0, [r7, #0] + 8001572: f000 fa4f bl 8001a14 break; - 8000e62: e003 b.n 8000e6c + 8001576: e003 b.n 8001580 case AD5934_ID_REF_10K_HIGHGAIN: AD5934_Reference_10K_HighGain_NewSample(mag_float); - 8000e64: 6838 ldr r0, [r7, #0] - 8000e66: f000 fa6b bl 8001340 + 8001578: 6838 ldr r0, [r7, #0] + 800157a: f000 fa59 bl 8001a30 break; - 8000e6a: bf00 nop + 800157e: bf00 nop sweep_count++; ad5934_state = AD5934_START_CONVERSION; } else { sweep_count = 0; - 8000e6c: 4b55 ldr r3, [pc, #340] @ (8000fc4 ) - 8000e6e: 2200 movs r2, #0 - 8000e70: 701a strb r2, [r3, #0] + 8001580: 4b52 ldr r3, [pc, #328] @ (80016cc ) + 8001582: 2200 movs r2, #0 + 8001584: 701a strb r2, [r3, #0] ad5934_state = AD5934_SWITCH_MUX; - 8000e72: 4b4e ldr r3, [pc, #312] @ (8000fac ) - 8000e74: 2206 movs r2, #6 - 8000e76: 701a strb r2, [r3, #0] + 8001586: 4b4b ldr r3, [pc, #300] @ (80016b4 ) + 8001588: 2206 movs r2, #6 + 800158a: 701a strb r2, [r3, #0] } } break; - 8000e78: e093 b.n 8000fa2 + 800158c: e08d b.n 80016aa case AD5934_SWITCH_MUX: AD5934_StopSweep(); // Put AD5934 in Standby - 8000e7a: f7ff fd36 bl 80008ea - current_mux_channel = (uint8_t)((current_mux_channel + 1) % 8); // Pointer to the next channel (Circular Buffer 0 to 7) - 8000e7e: 4b50 ldr r3, [pc, #320] @ (8000fc0 ) - 8000e80: 781b ldrb r3, [r3, #0] - 8000e82: 3301 adds r3, #1 - 8000e84: 425a negs r2, r3 - 8000e86: f003 0307 and.w r3, r3, #7 - 8000e8a: f002 0207 and.w r2, r2, #7 - 8000e8e: bf58 it pl - 8000e90: 4253 negpl r3, r2 - 8000e92: b2da uxtb r2, r3 - 8000e94: 4b4a ldr r3, [pc, #296] @ (8000fc0 ) - 8000e96: 701a strb r2, [r3, #0] + 800158e: f7ff fd42 bl 8001016 + current_mux_channel = (uint8_t)((current_mux_channel + 1) % 7); // Pointer to the next channel (Circular Buffer 0 to 6) + 8001592: 4b4d ldr r3, [pc, #308] @ (80016c8 ) + 8001594: 781b ldrb r3, [r3, #0] + 8001596: 1c5a adds r2, r3, #1 + 8001598: 4b4d ldr r3, [pc, #308] @ (80016d0 ) + 800159a: fb83 1302 smull r1, r3, r3, r2 + 800159e: 4413 add r3, r2 + 80015a0: 1099 asrs r1, r3, #2 + 80015a2: 17d3 asrs r3, r2, #31 + 80015a4: 1ac9 subs r1, r1, r3 + 80015a6: 460b mov r3, r1 + 80015a8: 00db lsls r3, r3, #3 + 80015aa: 1a5b subs r3, r3, r1 + 80015ac: 1ad1 subs r1, r2, r3 + 80015ae: b2ca uxtb r2, r1 + 80015b0: 4b45 ldr r3, [pc, #276] @ (80016c8 ) + 80015b2: 701a strb r2, [r3, #0] switch (current_mux_channel) - 8000e98: 4b49 ldr r3, [pc, #292] @ (8000fc0 ) - 8000e9a: 781b ldrb r3, [r3, #0] - 8000e9c: 2b07 cmp r3, #7 - 8000e9e: d871 bhi.n 8000f84 - 8000ea0: a201 add r2, pc, #4 @ (adr r2, 8000ea8 ) - 8000ea2: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8000ea6: bf00 nop - 8000ea8: 08000ec9 .word 0x08000ec9 - 8000eac: 08000ef7 .word 0x08000ef7 - 8000eb0: 08000f25 .word 0x08000f25 - 8000eb4: 08000f35 .word 0x08000f35 - 8000eb8: 08000f45 .word 0x08000f45 - 8000ebc: 08000f55 .word 0x08000f55 - 8000ec0: 08000f65 .word 0x08000f65 - 8000ec4: 08000f75 .word 0x08000f75 + 80015b4: 4b44 ldr r3, [pc, #272] @ (80016c8 ) + 80015b6: 781b ldrb r3, [r3, #0] + 80015b8: 2b06 cmp r3, #6 + 80015ba: d867 bhi.n 800168c + 80015bc: a201 add r2, pc, #4 @ (adr r2, 80015c4 ) + 80015be: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 80015c2: bf00 nop + 80015c4: 080015e1 .word 0x080015e1 + 80015c8: 0800160f .word 0x0800160f + 80015cc: 0800163d .word 0x0800163d + 80015d0: 0800164d .word 0x0800164d + 80015d4: 0800165d .word 0x0800165d + 80015d8: 0800166d .word 0x0800166d + 80015dc: 0800167d .word 0x0800167d { case AD5934_ID_RTD: if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_7) == GPIO_PIN_SET) // OFF = PT1000, ON = PT100, PA7 has internal pull-up and switch connects to GND - 8000ec8: 2180 movs r1, #128 @ 0x80 - 8000eca: 483f ldr r0, [pc, #252] @ (8000fc8 ) - 8000ecc: f002 fae4 bl 8003498 - 8000ed0: 4603 mov r3, r0 - 8000ed2: 2b01 cmp r3, #1 - 8000ed4: d107 bne.n 8000ee6 + 80015e0: 2180 movs r1, #128 @ 0x80 + 80015e2: 483c ldr r0, [pc, #240] @ (80016d4 ) + 80015e4: f002 fbd0 bl 8003d88 + 80015e8: 4603 mov r3, r0 + 80015ea: 2b01 cmp r3, #1 + 80015ec: d107 bne.n 80015fe current_rtd_mux = current_hw_mux_connection = AD5934_CH_RTD_LOW_GAIN; //PT100 - 8000ed6: 4b36 ldr r3, [pc, #216] @ (8000fb0 ) - 8000ed8: 2209 movs r2, #9 - 8000eda: 701a strb r2, [r3, #0] - 8000edc: 4b34 ldr r3, [pc, #208] @ (8000fb0 ) - 8000ede: 781a ldrb r2, [r3, #0] - 8000ee0: 4b3a ldr r3, [pc, #232] @ (8000fcc ) - 8000ee2: 701a strb r2, [r3, #0] + 80015ee: 4b32 ldr r3, [pc, #200] @ (80016b8 ) + 80015f0: 2209 movs r2, #9 + 80015f2: 701a strb r2, [r3, #0] + 80015f4: 4b30 ldr r3, [pc, #192] @ (80016b8 ) + 80015f6: 781a ldrb r2, [r3, #0] + 80015f8: 4b37 ldr r3, [pc, #220] @ (80016d8 ) + 80015fa: 701a strb r2, [r3, #0] else current_rtd_mux = current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 break; - 8000ee4: e04e b.n 8000f84 + 80015fc: e046 b.n 800168c current_rtd_mux = current_hw_mux_connection = AD5934_CH_RTD_MID_GAIN; //PT1000 - 8000ee6: 4b32 ldr r3, [pc, #200] @ (8000fb0 ) - 8000ee8: 220a movs r2, #10 - 8000eea: 701a strb r2, [r3, #0] - 8000eec: 4b30 ldr r3, [pc, #192] @ (8000fb0 ) - 8000eee: 781a ldrb r2, [r3, #0] - 8000ef0: 4b36 ldr r3, [pc, #216] @ (8000fcc ) - 8000ef2: 701a strb r2, [r3, #0] + 80015fe: 4b2e ldr r3, [pc, #184] @ (80016b8 ) + 8001600: 220a movs r2, #10 + 8001602: 701a strb r2, [r3, #0] + 8001604: 4b2c ldr r3, [pc, #176] @ (80016b8 ) + 8001606: 781a ldrb r2, [r3, #0] + 8001608: 4b33 ldr r3, [pc, #204] @ (80016d8 ) + 800160a: 701a strb r2, [r3, #0] break; - 8000ef4: e046 b.n 8000f84 + 800160c: e03e b.n 800168c case AD5934_ID_EC: if(HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_6) == GPIO_PIN_SET) // Hardware Setup: Gain Selection (PA6) - 8000ef6: 2140 movs r1, #64 @ 0x40 - 8000ef8: 4833 ldr r0, [pc, #204] @ (8000fc8 ) - 8000efa: f002 facd bl 8003498 - 8000efe: 4603 mov r3, r0 - 8000f00: 2b01 cmp r3, #1 - 8000f02: d107 bne.n 8000f14 + 800160e: 2140 movs r1, #64 @ 0x40 + 8001610: 4830 ldr r0, [pc, #192] @ (80016d4 ) + 8001612: f002 fbb9 bl 8003d88 + 8001616: 4603 mov r3, r0 + 8001618: 2b01 cmp r3, #1 + 800161a: d107 bne.n 800162c current_ec_mux = current_hw_mux_connection = AD5934_CH_EC_HIGH_GAIN; - 8000f04: 4b2a ldr r3, [pc, #168] @ (8000fb0 ) - 8000f06: 220e movs r2, #14 - 8000f08: 701a strb r2, [r3, #0] - 8000f0a: 4b29 ldr r3, [pc, #164] @ (8000fb0 ) - 8000f0c: 781a ldrb r2, [r3, #0] - 8000f0e: 4b30 ldr r3, [pc, #192] @ (8000fd0 ) - 8000f10: 701a strb r2, [r3, #0] + 800161c: 4b26 ldr r3, [pc, #152] @ (80016b8 ) + 800161e: 220e movs r2, #14 + 8001620: 701a strb r2, [r3, #0] + 8001622: 4b25 ldr r3, [pc, #148] @ (80016b8 ) + 8001624: 781a ldrb r2, [r3, #0] + 8001626: 4b2d ldr r3, [pc, #180] @ (80016dc ) + 8001628: 701a strb r2, [r3, #0] else current_ec_mux = current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; break; - 8000f12: e037 b.n 8000f84 + 800162a: e02f b.n 800168c current_ec_mux = current_hw_mux_connection = AD5934_CH_EC_MID_GAIN; - 8000f14: 4b26 ldr r3, [pc, #152] @ (8000fb0 ) - 8000f16: 220d movs r2, #13 - 8000f18: 701a strb r2, [r3, #0] - 8000f1a: 4b25 ldr r3, [pc, #148] @ (8000fb0 ) - 8000f1c: 781a ldrb r2, [r3, #0] - 8000f1e: 4b2c ldr r3, [pc, #176] @ (8000fd0 ) - 8000f20: 701a strb r2, [r3, #0] + 800162c: 4b22 ldr r3, [pc, #136] @ (80016b8 ) + 800162e: 220d movs r2, #13 + 8001630: 701a strb r2, [r3, #0] + 8001632: 4b21 ldr r3, [pc, #132] @ (80016b8 ) + 8001634: 781a ldrb r2, [r3, #0] + 8001636: 4b29 ldr r3, [pc, #164] @ (80016dc ) + 8001638: 701a strb r2, [r3, #0] break; - 8000f22: e02f b.n 8000f84 + 800163a: e027 b.n 800168c case AD5934_ID_REF_100R_LOWGAIN: current_ref_mux = current_hw_mux_connection = AD5934_CH_REF100R_LOW_GAIN; // 100 Ohms Reference Resistor - 8000f24: 4b22 ldr r3, [pc, #136] @ (8000fb0 ) - 8000f26: 2200 movs r2, #0 - 8000f28: 701a strb r2, [r3, #0] - 8000f2a: 4b21 ldr r3, [pc, #132] @ (8000fb0 ) - 8000f2c: 781a ldrb r2, [r3, #0] - 8000f2e: 4b29 ldr r3, [pc, #164] @ (8000fd4 ) - 8000f30: 701a strb r2, [r3, #0] + 800163c: 4b1e ldr r3, [pc, #120] @ (80016b8 ) + 800163e: 2200 movs r2, #0 + 8001640: 701a strb r2, [r3, #0] + 8001642: 4b1d ldr r3, [pc, #116] @ (80016b8 ) + 8001644: 781a ldrb r2, [r3, #0] + 8001646: 4b26 ldr r3, [pc, #152] @ (80016e0 ) + 8001648: 701a strb r2, [r3, #0] break; - 8000f32: e027 b.n 8000f84 + 800164a: e01f b.n 800168c case AD5934_ID_REF_100R_MIDGAIN: current_ref_mux = current_hw_mux_connection = AD5934_CH_REF100R_MID_GAIN; // 100 Ohms Reference Resistor - 8000f34: 4b1e ldr r3, [pc, #120] @ (8000fb0 ) - 8000f36: 2201 movs r2, #1 - 8000f38: 701a strb r2, [r3, #0] - 8000f3a: 4b1d ldr r3, [pc, #116] @ (8000fb0 ) - 8000f3c: 781a ldrb r2, [r3, #0] - 8000f3e: 4b25 ldr r3, [pc, #148] @ (8000fd4 ) - 8000f40: 701a strb r2, [r3, #0] + 800164c: 4b1a ldr r3, [pc, #104] @ (80016b8 ) + 800164e: 2201 movs r2, #1 + 8001650: 701a strb r2, [r3, #0] + 8001652: 4b19 ldr r3, [pc, #100] @ (80016b8 ) + 8001654: 781a ldrb r2, [r3, #0] + 8001656: 4b22 ldr r3, [pc, #136] @ (80016e0 ) + 8001658: 701a strb r2, [r3, #0] break; - 8000f42: e01f b.n 8000f84 - case AD5934_ID_REF_100R_HIGHGAIN: - current_ref_mux = current_hw_mux_connection = AD5934_CH_REF100R_HIGH_GAIN; // 100 Ohms Reference Resistor - 8000f44: 4b1a ldr r3, [pc, #104] @ (8000fb0 ) - 8000f46: 2202 movs r2, #2 - 8000f48: 701a strb r2, [r3, #0] - 8000f4a: 4b19 ldr r3, [pc, #100] @ (8000fb0 ) - 8000f4c: 781a ldrb r2, [r3, #0] - 8000f4e: 4b21 ldr r3, [pc, #132] @ (8000fd4 ) - 8000f50: 701a strb r2, [r3, #0] - break; - 8000f52: e017 b.n 8000f84 + 800165a: e017 b.n 800168c case AD5934_ID_REF_1K_MIDGAIN: current_ref_mux = current_hw_mux_connection = AD5934_CH_REF1K_MID_GAIN; // 1K Reference Resistor - 8000f54: 4b16 ldr r3, [pc, #88] @ (8000fb0 ) - 8000f56: 2204 movs r2, #4 - 8000f58: 701a strb r2, [r3, #0] - 8000f5a: 4b15 ldr r3, [pc, #84] @ (8000fb0 ) - 8000f5c: 781a ldrb r2, [r3, #0] - 8000f5e: 4b1d ldr r3, [pc, #116] @ (8000fd4 ) - 8000f60: 701a strb r2, [r3, #0] + 800165c: 4b16 ldr r3, [pc, #88] @ (80016b8 ) + 800165e: 2204 movs r2, #4 + 8001660: 701a strb r2, [r3, #0] + 8001662: 4b15 ldr r3, [pc, #84] @ (80016b8 ) + 8001664: 781a ldrb r2, [r3, #0] + 8001666: 4b1e ldr r3, [pc, #120] @ (80016e0 ) + 8001668: 701a strb r2, [r3, #0] break; - 8000f62: e00f b.n 8000f84 + 800166a: e00f b.n 800168c case AD5934_ID_REF_1K_HIGHGAIN: current_ref_mux = current_hw_mux_connection = AD5934_CH_REF1K_HIGH_GAIN; // 1K Reference Resistor - 8000f64: 4b12 ldr r3, [pc, #72] @ (8000fb0 ) - 8000f66: 2205 movs r2, #5 - 8000f68: 701a strb r2, [r3, #0] - 8000f6a: 4b11 ldr r3, [pc, #68] @ (8000fb0 ) - 8000f6c: 781a ldrb r2, [r3, #0] - 8000f6e: 4b19 ldr r3, [pc, #100] @ (8000fd4 ) - 8000f70: 701a strb r2, [r3, #0] + 800166c: 4b12 ldr r3, [pc, #72] @ (80016b8 ) + 800166e: 2205 movs r2, #5 + 8001670: 701a strb r2, [r3, #0] + 8001672: 4b11 ldr r3, [pc, #68] @ (80016b8 ) + 8001674: 781a ldrb r2, [r3, #0] + 8001676: 4b1a ldr r3, [pc, #104] @ (80016e0 ) + 8001678: 701a strb r2, [r3, #0] break; - 8000f72: e007 b.n 8000f84 + 800167a: e007 b.n 800168c case AD5934_ID_REF_10K_HIGHGAIN: current_ref_mux = current_hw_mux_connection = AD5934_CH_REF10K_HIGH_GAIN; // 1K Reference Resistor - 8000f74: 4b0e ldr r3, [pc, #56] @ (8000fb0 ) - 8000f76: 2208 movs r2, #8 - 8000f78: 701a strb r2, [r3, #0] - 8000f7a: 4b0d ldr r3, [pc, #52] @ (8000fb0 ) - 8000f7c: 781a ldrb r2, [r3, #0] - 8000f7e: 4b15 ldr r3, [pc, #84] @ (8000fd4 ) - 8000f80: 701a strb r2, [r3, #0] + 800167c: 4b0e ldr r3, [pc, #56] @ (80016b8 ) + 800167e: 2208 movs r2, #8 + 8001680: 701a strb r2, [r3, #0] + 8001682: 4b0d ldr r3, [pc, #52] @ (80016b8 ) + 8001684: 781a ldrb r2, [r3, #0] + 8001686: 4b16 ldr r3, [pc, #88] @ (80016e0 ) + 8001688: 701a strb r2, [r3, #0] break; - 8000f82: bf00 nop + 800168a: bf00 nop } ADG715_SetChannels(current_hw_mux_connection); // Change the analog mux - 8000f84: 4b0a ldr r3, [pc, #40] @ (8000fb0 ) - 8000f86: 781b ldrb r3, [r3, #0] - 8000f88: 4618 mov r0, r3 - 8000f8a: f000 fa07 bl 800139c + 800168c: 4b0a ldr r3, [pc, #40] @ (80016b8 ) + 800168e: 781b ldrb r3, [r3, #0] + 8001690: 4618 mov r0, r3 + 8001692: f000 f9fb bl 8001a8c HAL_Delay(12); - 8000f8e: 200c movs r0, #12 - 8000f90: f001 fd08 bl 80029a4 + 8001696: 200c movs r0, #12 + 8001698: f001 fdfc bl 8003294 is_new_channel = 1; // Channel Switched - 8000f94: 4b07 ldr r3, [pc, #28] @ (8000fb4 ) - 8000f96: 2201 movs r2, #1 - 8000f98: 701a strb r2, [r3, #0] + 800169c: 4b07 ldr r3, [pc, #28] @ (80016bc ) + 800169e: 2201 movs r2, #1 + 80016a0: 701a strb r2, [r3, #0] ad5934_state = AD5934_START_CONVERSION; // Next State - 8000f9a: 4b04 ldr r3, [pc, #16] @ (8000fac ) - 8000f9c: 2202 movs r2, #2 - 8000f9e: 701a strb r2, [r3, #0] + 80016a2: 4b04 ldr r3, [pc, #16] @ (80016b4 ) + 80016a4: 2202 movs r2, #2 + 80016a6: 701a strb r2, [r3, #0] break; - 8000fa0: e000 b.n 8000fa4 + 80016a8: e000 b.n 80016ac break; - 8000fa2: bf00 nop + 80016aa: bf00 nop } } - 8000fa4: bf00 nop - 8000fa6: 3710 adds r7, #16 - 8000fa8: 46bd mov sp, r7 - 8000faa: bdb0 pop {r4, r5, r7, pc} - 8000fac: 2000007c .word 0x2000007c - 8000fb0: 20000089 .word 0x20000089 - 8000fb4: 20000002 .word 0x20000002 - 8000fb8: 20000084 .word 0x20000084 - 8000fbc: 20000080 .word 0x20000080 - 8000fc0: 20000088 .word 0x20000088 - 8000fc4: 2000008b .word 0x2000008b - 8000fc8: 40010800 .word 0x40010800 - 8000fcc: 20000001 .word 0x20000001 - 8000fd0: 20000000 .word 0x20000000 - 8000fd4: 2000008a .word 0x2000008a + 80016ac: bf00 nop + 80016ae: 3710 adds r7, #16 + 80016b0: 46bd mov sp, r7 + 80016b2: bdb0 pop {r4, r5, r7, pc} + 80016b4: 2000007c .word 0x2000007c + 80016b8: 20000089 .word 0x20000089 + 80016bc: 20000002 .word 0x20000002 + 80016c0: 20000084 .word 0x20000084 + 80016c4: 20000080 .word 0x20000080 + 80016c8: 20000088 .word 0x20000088 + 80016cc: 2000008b .word 0x2000008b + 80016d0: 92492493 .word 0x92492493 + 80016d4: 40010800 .word 0x40010800 + 80016d8: 20000001 .word 0x20000001 + 80016dc: 20000000 .word 0x20000000 + 80016e0: 2000008a .word 0x2000008a -08000fd8 : +080016e4 : /** * Simple insertion sort - BURST_SIZE is small, so the cost is negligible * and it avoids depending on qsort/heap allocation. **/ void AD5934_Sort_Array(float *v, uint8_t n) { - 8000fd8: b580 push {r7, lr} - 8000fda: b084 sub sp, #16 - 8000fdc: af00 add r7, sp, #0 - 8000fde: 6078 str r0, [r7, #4] - 8000fe0: 460b mov r3, r1 - 8000fe2: 70fb strb r3, [r7, #3] + 80016e4: b580 push {r7, lr} + 80016e6: b084 sub sp, #16 + 80016e8: af00 add r7, sp, #0 + 80016ea: 6078 str r0, [r7, #4] + 80016ec: 460b mov r3, r1 + 80016ee: 70fb strb r3, [r7, #3] for (uint8_t i = 1; i < n; i++) - 8000fe4: 2301 movs r3, #1 - 8000fe6: 73fb strb r3, [r7, #15] - 8000fe8: e039 b.n 800105e + 80016f0: 2301 movs r3, #1 + 80016f2: 73fb strb r3, [r7, #15] + 80016f4: e039 b.n 800176a { float key = v[i]; - 8000fea: 7bfb ldrb r3, [r7, #15] - 8000fec: 009b lsls r3, r3, #2 - 8000fee: 687a ldr r2, [r7, #4] - 8000ff0: 4413 add r3, r2 - 8000ff2: 681b ldr r3, [r3, #0] - 8000ff4: 60bb str r3, [r7, #8] + 80016f6: 7bfb ldrb r3, [r7, #15] + 80016f8: 009b lsls r3, r3, #2 + 80016fa: 687a ldr r2, [r7, #4] + 80016fc: 4413 add r3, r2 + 80016fe: 681b ldr r3, [r3, #0] + 8001700: 60bb str r3, [r7, #8] int8_t j = (int8_t)i - 1; - 8000ff6: 7bfb ldrb r3, [r7, #15] - 8000ff8: 3b01 subs r3, #1 - 8000ffa: b2db uxtb r3, r3 - 8000ffc: 73bb strb r3, [r7, #14] + 8001702: 7bfb ldrb r3, [r7, #15] + 8001704: 3b01 subs r3, #1 + 8001706: b2db uxtb r3, r3 + 8001708: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 8000ffe: e012 b.n 8001026 + 800170a: e012 b.n 8001732 { v[j + 1] = v[j]; - 8001000: f997 300e ldrsb.w r3, [r7, #14] - 8001004: 009b lsls r3, r3, #2 - 8001006: 687a ldr r2, [r7, #4] - 8001008: 441a add r2, r3 - 800100a: f997 300e ldrsb.w r3, [r7, #14] - 800100e: 3301 adds r3, #1 - 8001010: 009b lsls r3, r3, #2 - 8001012: 6879 ldr r1, [r7, #4] - 8001014: 440b add r3, r1 - 8001016: 6812 ldr r2, [r2, #0] - 8001018: 601a str r2, [r3, #0] + 800170c: f997 300e ldrsb.w r3, [r7, #14] + 8001710: 009b lsls r3, r3, #2 + 8001712: 687a ldr r2, [r7, #4] + 8001714: 441a add r2, r3 + 8001716: f997 300e ldrsb.w r3, [r7, #14] + 800171a: 3301 adds r3, #1 + 800171c: 009b lsls r3, r3, #2 + 800171e: 6879 ldr r1, [r7, #4] + 8001720: 440b add r3, r1 + 8001722: 6812 ldr r2, [r2, #0] + 8001724: 601a str r2, [r3, #0] j--; - 800101a: f997 300e ldrsb.w r3, [r7, #14] - 800101e: b2db uxtb r3, r3 - 8001020: 3b01 subs r3, #1 - 8001022: b2db uxtb r3, r3 - 8001024: 73bb strb r3, [r7, #14] + 8001726: f997 300e ldrsb.w r3, [r7, #14] + 800172a: b2db uxtb r3, r3 + 800172c: 3b01 subs r3, #1 + 800172e: b2db uxtb r3, r3 + 8001730: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 8001026: f997 300e ldrsb.w r3, [r7, #14] - 800102a: 2b00 cmp r3, #0 - 800102c: db0c blt.n 8001048 - 800102e: f997 300e ldrsb.w r3, [r7, #14] - 8001032: 009b lsls r3, r3, #2 - 8001034: 687a ldr r2, [r7, #4] - 8001036: 4413 add r3, r2 - 8001038: 681b ldr r3, [r3, #0] - 800103a: 4619 mov r1, r3 - 800103c: 68b8 ldr r0, [r7, #8] - 800103e: f7ff fb39 bl 80006b4 <__aeabi_fcmplt> - 8001042: 4603 mov r3, r0 - 8001044: 2b00 cmp r3, #0 - 8001046: d1db bne.n 8001000 + 8001732: f997 300e ldrsb.w r3, [r7, #14] + 8001736: 2b00 cmp r3, #0 + 8001738: db0c blt.n 8001754 + 800173a: f997 300e ldrsb.w r3, [r7, #14] + 800173e: 009b lsls r3, r3, #2 + 8001740: 687a ldr r2, [r7, #4] + 8001742: 4413 add r3, r2 + 8001744: 681b ldr r3, [r3, #0] + 8001746: 4619 mov r1, r3 + 8001748: 68b8 ldr r0, [r7, #8] + 800174a: f7ff fb49 bl 8000de0 <__aeabi_fcmplt> + 800174e: 4603 mov r3, r0 + 8001750: 2b00 cmp r3, #0 + 8001752: d1db bne.n 800170c } v[j + 1] = key; - 8001048: f997 300e ldrsb.w r3, [r7, #14] - 800104c: 3301 adds r3, #1 - 800104e: 009b lsls r3, r3, #2 - 8001050: 687a ldr r2, [r7, #4] - 8001052: 4413 add r3, r2 - 8001054: 68ba ldr r2, [r7, #8] - 8001056: 601a str r2, [r3, #0] + 8001754: f997 300e ldrsb.w r3, [r7, #14] + 8001758: 3301 adds r3, #1 + 800175a: 009b lsls r3, r3, #2 + 800175c: 687a ldr r2, [r7, #4] + 800175e: 4413 add r3, r2 + 8001760: 68ba ldr r2, [r7, #8] + 8001762: 601a str r2, [r3, #0] for (uint8_t i = 1; i < n; i++) - 8001058: 7bfb ldrb r3, [r7, #15] - 800105a: 3301 adds r3, #1 - 800105c: 73fb strb r3, [r7, #15] - 800105e: 7bfa ldrb r2, [r7, #15] - 8001060: 78fb ldrb r3, [r7, #3] - 8001062: 429a cmp r2, r3 - 8001064: d3c1 bcc.n 8000fea + 8001764: 7bfb ldrb r3, [r7, #15] + 8001766: 3301 adds r3, #1 + 8001768: 73fb strb r3, [r7, #15] + 800176a: 7bfa ldrb r2, [r7, #15] + 800176c: 78fb ldrb r3, [r7, #3] + 800176e: 429a cmp r2, r3 + 8001770: d3c1 bcc.n 80016f6 } } - 8001066: bf00 nop - 8001068: bf00 nop - 800106a: 3710 adds r7, #16 - 800106c: 46bd mov sp, r7 - 800106e: bd80 pop {r7, pc} + 8001772: bf00 nop + 8001774: bf00 nop + 8001776: 3710 adds r7, #16 + 8001778: 46bd mov sp, r7 + 800177a: bd80 pop {r7, pc} -08001070 : +0800177c : * original order is not needed), discards TRIM_COUNT values from each * end, and averages the remainder. Sorting in place avoids a temporary * array and removes the need for memcpy()/string.h entirely. **/ float AD5934_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim) { - 8001070: b580 push {r7, lr} - 8001072: b086 sub sp, #24 - 8001074: af00 add r7, sp, #0 - 8001076: 6078 str r0, [r7, #4] - 8001078: 460b mov r3, r1 - 800107a: 70fb strb r3, [r7, #3] - 800107c: 4613 mov r3, r2 - 800107e: 70bb strb r3, [r7, #2] + 800177c: b580 push {r7, lr} + 800177e: b086 sub sp, #24 + 8001780: af00 add r7, sp, #0 + 8001782: 6078 str r0, [r7, #4] + 8001784: 460b mov r3, r1 + 8001786: 70fb strb r3, [r7, #3] + 8001788: 4613 mov r3, r2 + 800178a: 70bb strb r3, [r7, #2] AD5934_Sort_Array(buffer, n); - 8001080: 78fb ldrb r3, [r7, #3] - 8001082: 4619 mov r1, r3 - 8001084: 6878 ldr r0, [r7, #4] - 8001086: f7ff ffa7 bl 8000fd8 + 800178c: 78fb ldrb r3, [r7, #3] + 800178e: 4619 mov r1, r3 + 8001790: 6878 ldr r0, [r7, #4] + 8001792: f7ff ffa7 bl 80016e4 uint8_t start = trim; - 800108a: 78bb ldrb r3, [r7, #2] - 800108c: 75fb strb r3, [r7, #23] + 8001796: 78bb ldrb r3, [r7, #2] + 8001798: 75fb strb r3, [r7, #23] uint8_t end = n - trim; /* exclusive */ - 800108e: 78fa ldrb r2, [r7, #3] - 8001090: 78bb ldrb r3, [r7, #2] - 8001092: 1ad3 subs r3, r2, r3 - 8001094: 75bb strb r3, [r7, #22] + 800179a: 78fa ldrb r2, [r7, #3] + 800179c: 78bb ldrb r3, [r7, #2] + 800179e: 1ad3 subs r3, r2, r3 + 80017a0: 75bb strb r3, [r7, #22] if (end <= start) /* guard against a misconfigured trim value */ - 8001096: 7dba ldrb r2, [r7, #22] - 8001098: 7dfb ldrb r3, [r7, #23] - 800109a: 429a cmp r2, r3 - 800109c: d803 bhi.n 80010a6 + 80017a2: 7dba ldrb r2, [r7, #22] + 80017a4: 7dfb ldrb r3, [r7, #23] + 80017a6: 429a cmp r2, r3 + 80017a8: d803 bhi.n 80017b2 { start = 0; - 800109e: 2300 movs r3, #0 - 80010a0: 75fb strb r3, [r7, #23] + 80017aa: 2300 movs r3, #0 + 80017ac: 75fb strb r3, [r7, #23] end = n; - 80010a2: 78fb ldrb r3, [r7, #3] - 80010a4: 75bb strb r3, [r7, #22] + 80017ae: 78fb ldrb r3, [r7, #3] + 80017b0: 75bb strb r3, [r7, #22] } float sum = 0.0f; - 80010a6: f04f 0300 mov.w r3, #0 - 80010aa: 613b str r3, [r7, #16] + 80017b2: f04f 0300 mov.w r3, #0 + 80017b6: 613b str r3, [r7, #16] uint8_t count = 0; - 80010ac: 2300 movs r3, #0 - 80010ae: 73fb strb r3, [r7, #15] + 80017b8: 2300 movs r3, #0 + 80017ba: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 80010b0: 7dfb ldrb r3, [r7, #23] - 80010b2: 73bb strb r3, [r7, #14] - 80010b4: e010 b.n 80010d8 + 80017bc: 7dfb ldrb r3, [r7, #23] + 80017be: 73bb strb r3, [r7, #14] + 80017c0: e010 b.n 80017e4 { sum += buffer[i]; - 80010b6: 7bbb ldrb r3, [r7, #14] - 80010b8: 009b lsls r3, r3, #2 - 80010ba: 687a ldr r2, [r7, #4] - 80010bc: 4413 add r3, r2 - 80010be: 681b ldr r3, [r3, #0] - 80010c0: 4619 mov r1, r3 - 80010c2: 6938 ldr r0, [r7, #16] - 80010c4: f7ff f850 bl 8000168 <__addsf3> - 80010c8: 4603 mov r3, r0 - 80010ca: 613b str r3, [r7, #16] + 80017c2: 7bbb ldrb r3, [r7, #14] + 80017c4: 009b lsls r3, r3, #2 + 80017c6: 687a ldr r2, [r7, #4] + 80017c8: 4413 add r3, r2 + 80017ca: 681b ldr r3, [r3, #0] + 80017cc: 4619 mov r1, r3 + 80017ce: 6938 ldr r0, [r7, #16] + 80017d0: f7ff f860 bl 8000894 <__addsf3> + 80017d4: 4603 mov r3, r0 + 80017d6: 613b str r3, [r7, #16] count++; - 80010cc: 7bfb ldrb r3, [r7, #15] - 80010ce: 3301 adds r3, #1 - 80010d0: 73fb strb r3, [r7, #15] + 80017d8: 7bfb ldrb r3, [r7, #15] + 80017da: 3301 adds r3, #1 + 80017dc: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 80010d2: 7bbb ldrb r3, [r7, #14] - 80010d4: 3301 adds r3, #1 - 80010d6: 73bb strb r3, [r7, #14] - 80010d8: 7bba ldrb r2, [r7, #14] - 80010da: 7dbb ldrb r3, [r7, #22] - 80010dc: 429a cmp r2, r3 - 80010de: d3ea bcc.n 80010b6 + 80017de: 7bbb ldrb r3, [r7, #14] + 80017e0: 3301 adds r3, #1 + 80017e2: 73bb strb r3, [r7, #14] + 80017e4: 7bba ldrb r2, [r7, #14] + 80017e6: 7dbb ldrb r3, [r7, #22] + 80017e8: 429a cmp r2, r3 + 80017ea: d3ea bcc.n 80017c2 } return sum / (float)count; - 80010e0: 7bfb ldrb r3, [r7, #15] - 80010e2: 4618 mov r0, r3 - 80010e4: f7ff f8f0 bl 80002c8 <__aeabi_ui2f> - 80010e8: 4603 mov r3, r0 - 80010ea: 4619 mov r1, r3 - 80010ec: 6938 ldr r0, [r7, #16] - 80010ee: f7ff f9f7 bl 80004e0 <__aeabi_fdiv> - 80010f2: 4603 mov r3, r0 + 80017ec: 7bfb ldrb r3, [r7, #15] + 80017ee: 4618 mov r0, r3 + 80017f0: f7ff f900 bl 80009f4 <__aeabi_ui2f> + 80017f4: 4603 mov r3, r0 + 80017f6: 4619 mov r1, r3 + 80017f8: 6938 ldr r0, [r7, #16] + 80017fa: f7ff fa07 bl 8000c0c <__aeabi_fdiv> + 80017fe: 4603 mov r3, r0 } - 80010f4: 4618 mov r0, r3 - 80010f6: 3718 adds r7, #24 - 80010f8: 46bd mov sp, r7 - 80010fa: bd80 pop {r7, pc} + 8001800: 4618 mov r0, r3 + 8001802: 3718 adds r7, #24 + 8001804: 46bd mov sp, r7 + 8001806: bd80 pop {r7, pc} -080010fc : +08001808 : /* * Simple average of the history buffer (stage-2 sliding window) */ float AD5934_History_Average(const float *hist, uint8_t n) { - 80010fc: b580 push {r7, lr} - 80010fe: b084 sub sp, #16 - 8001100: af00 add r7, sp, #0 - 8001102: 6078 str r0, [r7, #4] - 8001104: 460b mov r3, r1 - 8001106: 70fb strb r3, [r7, #3] + 8001808: b580 push {r7, lr} + 800180a: b084 sub sp, #16 + 800180c: af00 add r7, sp, #0 + 800180e: 6078 str r0, [r7, #4] + 8001810: 460b mov r3, r1 + 8001812: 70fb strb r3, [r7, #3] float sum = 0.0f; - 8001108: f04f 0300 mov.w r3, #0 - 800110c: 60fb str r3, [r7, #12] + 8001814: f04f 0300 mov.w r3, #0 + 8001818: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 800110e: 2300 movs r3, #0 - 8001110: 72fb strb r3, [r7, #11] - 8001112: e00d b.n 8001130 + 800181a: 2300 movs r3, #0 + 800181c: 72fb strb r3, [r7, #11] + 800181e: e00d b.n 800183c sum += hist[i]; - 8001114: 7afb ldrb r3, [r7, #11] - 8001116: 009b lsls r3, r3, #2 - 8001118: 687a ldr r2, [r7, #4] - 800111a: 4413 add r3, r2 - 800111c: 681b ldr r3, [r3, #0] - 800111e: 4619 mov r1, r3 - 8001120: 68f8 ldr r0, [r7, #12] - 8001122: f7ff f821 bl 8000168 <__addsf3> - 8001126: 4603 mov r3, r0 - 8001128: 60fb str r3, [r7, #12] + 8001820: 7afb ldrb r3, [r7, #11] + 8001822: 009b lsls r3, r3, #2 + 8001824: 687a ldr r2, [r7, #4] + 8001826: 4413 add r3, r2 + 8001828: 681b ldr r3, [r3, #0] + 800182a: 4619 mov r1, r3 + 800182c: 68f8 ldr r0, [r7, #12] + 800182e: f7ff f831 bl 8000894 <__addsf3> + 8001832: 4603 mov r3, r0 + 8001834: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 800112a: 7afb ldrb r3, [r7, #11] - 800112c: 3301 adds r3, #1 - 800112e: 72fb strb r3, [r7, #11] - 8001130: 7afa ldrb r2, [r7, #11] - 8001132: 78fb ldrb r3, [r7, #3] - 8001134: 429a cmp r2, r3 - 8001136: d3ed bcc.n 8001114 + 8001836: 7afb ldrb r3, [r7, #11] + 8001838: 3301 adds r3, #1 + 800183a: 72fb strb r3, [r7, #11] + 800183c: 7afa ldrb r2, [r7, #11] + 800183e: 78fb ldrb r3, [r7, #3] + 8001840: 429a cmp r2, r3 + 8001842: d3ed bcc.n 8001820 return sum / (float)n; - 8001138: 78fb ldrb r3, [r7, #3] - 800113a: 4618 mov r0, r3 - 800113c: f7ff f8c4 bl 80002c8 <__aeabi_ui2f> - 8001140: 4603 mov r3, r0 - 8001142: 4619 mov r1, r3 - 8001144: 68f8 ldr r0, [r7, #12] - 8001146: f7ff f9cb bl 80004e0 <__aeabi_fdiv> - 800114a: 4603 mov r3, r0 + 8001844: 78fb ldrb r3, [r7, #3] + 8001846: 4618 mov r0, r3 + 8001848: f7ff f8d4 bl 80009f4 <__aeabi_ui2f> + 800184c: 4603 mov r3, r0 + 800184e: 4619 mov r1, r3 + 8001850: 68f8 ldr r0, [r7, #12] + 8001852: f7ff f9db bl 8000c0c <__aeabi_fdiv> + 8001856: 4603 mov r3, r0 } - 800114c: 4618 mov r0, r3 - 800114e: 3710 adds r7, #16 - 8001150: 46bd mov sp, r7 - 8001152: bd80 pop {r7, pc} + 8001858: 4618 mov r0, r3 + 800185a: 3710 adds r7, #16 + 800185c: 46bd mov sp, r7 + 800185e: bd80 pop {r7, pc} -08001154 : +08001860 : * Common processing core: applied identically to all 3 channels. * Receives the current raw reading and the channel's state (global * arrays/struct). **/ void AD5934_Process_Sample(AD5934_filter_t *ch, float raw) { - 8001154: b590 push {r4, r7, lr} - 8001156: b085 sub sp, #20 - 8001158: af00 add r7, sp, #0 - 800115a: 6078 str r0, [r7, #4] - 800115c: 6039 str r1, [r7, #0] + 8001860: b590 push {r4, r7, lr} + 8001862: b085 sub sp, #20 + 8001864: af00 add r7, sp, #0 + 8001866: 6078 str r0, [r7, #4] + 8001868: 6039 str r1, [r7, #0] /* --- Stage 1: accumulate into the current burst --- */ ch->burst[ch->burst_index] = raw; - 800115e: 687b ldr r3, [r7, #4] - 8001160: 791b ldrb r3, [r3, #4] - 8001162: 4619 mov r1, r3 - 8001164: 687b ldr r3, [r7, #4] - 8001166: 683a ldr r2, [r7, #0] - 8001168: f843 2021 str.w r2, [r3, r1, lsl #2] + 800186a: 687b ldr r3, [r7, #4] + 800186c: 791b ldrb r3, [r3, #4] + 800186e: 4619 mov r1, r3 + 8001870: 687b ldr r3, [r7, #4] + 8001872: 683a ldr r2, [r7, #0] + 8001874: f843 2021 str.w r2, [r3, r1, lsl #2] ch->burst_index++; - 800116c: 687b ldr r3, [r7, #4] - 800116e: 791b ldrb r3, [r3, #4] - 8001170: 3301 adds r3, #1 - 8001172: b2da uxtb r2, r3 - 8001174: 687b ldr r3, [r7, #4] - 8001176: 711a strb r2, [r3, #4] + 8001878: 687b ldr r3, [r7, #4] + 800187a: 791b ldrb r3, [r3, #4] + 800187c: 3301 adds r3, #1 + 800187e: b2da uxtb r2, r3 + 8001880: 687b ldr r3, [r7, #4] + 8001882: 711a strb r2, [r3, #4] if (ch->burst_index < AD5934_BURST_SIZE) - 8001178: 687b ldr r3, [r7, #4] - 800117a: 791b ldrb r3, [r3, #4] - 800117c: 2b00 cmp r3, #0 - 800117e: d075 beq.n 800126c + 8001884: 687b ldr r3, [r7, #4] + 8001886: 791b ldrb r3, [r3, #4] + 8001888: 2b00 cmp r3, #0 + 800188a: d075 beq.n 8001978 return; /* still collecting the burst, nothing else to do */ /* Burst complete: compute the trimmed mean */ float burst_result = AD5934_Trimmed_Mean(ch->burst, AD5934_BURST_SIZE, AD5934_TRIM_COUNT); - 8001180: 687b ldr r3, [r7, #4] - 8001182: 2200 movs r2, #0 - 8001184: 2101 movs r1, #1 - 8001186: 4618 mov r0, r3 - 8001188: f7ff ff72 bl 8001070 - 800118c: 60f8 str r0, [r7, #12] + 800188c: 687b ldr r3, [r7, #4] + 800188e: 2200 movs r2, #0 + 8001890: 2101 movs r1, #1 + 8001892: 4618 mov r0, r3 + 8001894: f7ff ff72 bl 800177c + 8001898: 60f8 str r0, [r7, #12] ch->burst_index = 0; /* reset for the next burst */ - 800118e: 687b ldr r3, [r7, #4] - 8001190: 2200 movs r2, #0 - 8001192: 711a strb r2, [r3, #4] + 800189a: 687b ldr r3, [r7, #4] + 800189c: 2200 movs r2, #0 + 800189e: 711a strb r2, [r3, #4] /* --- Stage 2a: rolling history / sliding window --- */ ch->history[ch->history_index] = burst_result; - 8001194: 687b ldr r3, [r7, #4] - 8001196: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 - 800119a: 461a mov r2, r3 - 800119c: 687b ldr r3, [r7, #4] - 800119e: 3202 adds r2, #2 - 80011a0: 68f9 ldr r1, [r7, #12] - 80011a2: f843 1022 str.w r1, [r3, r2, lsl #2] + 80018a0: 687b ldr r3, [r7, #4] + 80018a2: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 + 80018a6: 461a mov r2, r3 + 80018a8: 687b ldr r3, [r7, #4] + 80018aa: 3202 adds r2, #2 + 80018ac: 68f9 ldr r1, [r7, #12] + 80018ae: f843 1022 str.w r1, [r3, r2, lsl #2] ch->history_index = (uint8_t)((ch->history_index + 1) % AD5934_HISTORY_SIZE); - 80011a6: 687b ldr r3, [r7, #4] - 80011a8: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 - 80011ac: 3301 adds r3, #1 - 80011ae: 425a negs r2, r3 - 80011b0: f003 030f and.w r3, r3, #15 - 80011b4: f002 020f and.w r2, r2, #15 - 80011b8: bf58 it pl - 80011ba: 4253 negpl r3, r2 - 80011bc: b2da uxtb r2, r3 - 80011be: 687b ldr r3, [r7, #4] - 80011c0: f883 2048 strb.w r2, [r3, #72] @ 0x48 + 80018b2: 687b ldr r3, [r7, #4] + 80018b4: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 + 80018b8: 3301 adds r3, #1 + 80018ba: 425a negs r2, r3 + 80018bc: f003 030f and.w r3, r3, #15 + 80018c0: f002 020f and.w r2, r2, #15 + 80018c4: bf58 it pl + 80018c6: 4253 negpl r3, r2 + 80018c8: b2da uxtb r2, r3 + 80018ca: 687b ldr r3, [r7, #4] + 80018cc: f883 2048 strb.w r2, [r3, #72] @ 0x48 if (ch->history_count < AD5934_HISTORY_SIZE) - 80011c4: 687b ldr r3, [r7, #4] - 80011c6: f893 3049 ldrb.w r3, [r3, #73] @ 0x49 - 80011ca: 2b0f cmp r3, #15 - 80011cc: d807 bhi.n 80011de + 80018d0: 687b ldr r3, [r7, #4] + 80018d2: f893 3049 ldrb.w r3, [r3, #73] @ 0x49 + 80018d6: 2b0f cmp r3, #15 + 80018d8: d807 bhi.n 80018ea ch->history_count++; - 80011ce: 687b ldr r3, [r7, #4] - 80011d0: f893 3049 ldrb.w r3, [r3, #73] @ 0x49 - 80011d4: 3301 adds r3, #1 - 80011d6: b2da uxtb r2, r3 - 80011d8: 687b ldr r3, [r7, #4] - 80011da: f883 2049 strb.w r2, [r3, #73] @ 0x49 + 80018da: 687b ldr r3, [r7, #4] + 80018dc: f893 3049 ldrb.w r3, [r3, #73] @ 0x49 + 80018e0: 3301 adds r3, #1 + 80018e2: b2da uxtb r2, r3 + 80018e4: 687b ldr r3, [r7, #4] + 80018e6: f883 2049 strb.w r2, [r3, #73] @ 0x49 float window_average = AD5934_History_Average(ch->history, ch->history_count); - 80011de: 687b ldr r3, [r7, #4] - 80011e0: f103 0208 add.w r2, r3, #8 - 80011e4: 687b ldr r3, [r7, #4] - 80011e6: f893 3049 ldrb.w r3, [r3, #73] @ 0x49 - 80011ea: 4619 mov r1, r3 - 80011ec: 4610 mov r0, r2 - 80011ee: f7ff ff85 bl 80010fc - 80011f2: 60b8 str r0, [r7, #8] + 80018ea: 687b ldr r3, [r7, #4] + 80018ec: f103 0208 add.w r2, r3, #8 + 80018f0: 687b ldr r3, [r7, #4] + 80018f2: f893 3049 ldrb.w r3, [r3, #73] @ 0x49 + 80018f6: 4619 mov r1, r3 + 80018f8: 4610 mov r0, r2 + 80018fa: f7ff ff85 bl 8001808 + 80018fe: 60b8 str r0, [r7, #8] /* --- Stage 2b: first-order IIR low-pass filter on the burst result --- */ if (!ch->iir_initialized) - 80011f4: 687b ldr r3, [r7, #4] - 80011f6: f893 3050 ldrb.w r3, [r3, #80] @ 0x50 - 80011fa: 2b00 cmp r3, #0 - 80011fc: d107 bne.n 800120e + 8001900: 687b ldr r3, [r7, #4] + 8001902: f893 3050 ldrb.w r3, [r3, #80] @ 0x50 + 8001906: 2b00 cmp r3, #0 + 8001908: d107 bne.n 800191a { ch->iir_state = burst_result; - 80011fe: 687b ldr r3, [r7, #4] - 8001200: 68fa ldr r2, [r7, #12] - 8001202: 64da str r2, [r3, #76] @ 0x4c + 800190a: 687b ldr r3, [r7, #4] + 800190c: 68fa ldr r2, [r7, #12] + 800190e: 64da str r2, [r3, #76] @ 0x4c ch->iir_initialized = 1; - 8001204: 687b ldr r3, [r7, #4] - 8001206: 2201 movs r2, #1 - 8001208: f883 2050 strb.w r2, [r3, #80] @ 0x50 - 800120c: e014 b.n 8001238 + 8001910: 687b ldr r3, [r7, #4] + 8001912: 2201 movs r2, #1 + 8001914: f883 2050 strb.w r2, [r3, #80] @ 0x50 + 8001918: e014 b.n 8001944 } else { ch->iir_state = AD5934_IIR_ALPHA * burst_result + (1.0f - AD5934_IIR_ALPHA) * ch->iir_state; - 800120e: 4919 ldr r1, [pc, #100] @ (8001274 ) - 8001210: 68f8 ldr r0, [r7, #12] - 8001212: f7ff f8b1 bl 8000378 <__aeabi_fmul> - 8001216: 4603 mov r3, r0 - 8001218: 461c mov r4, r3 - 800121a: 687b ldr r3, [r7, #4] - 800121c: 6cdb ldr r3, [r3, #76] @ 0x4c - 800121e: 4916 ldr r1, [pc, #88] @ (8001278 ) - 8001220: 4618 mov r0, r3 - 8001222: f7ff f8a9 bl 8000378 <__aeabi_fmul> - 8001226: 4603 mov r3, r0 - 8001228: 4619 mov r1, r3 - 800122a: 4620 mov r0, r4 - 800122c: f7fe ff9c bl 8000168 <__addsf3> - 8001230: 4603 mov r3, r0 - 8001232: 461a mov r2, r3 - 8001234: 687b ldr r3, [r7, #4] - 8001236: 64da str r2, [r3, #76] @ 0x4c + 800191a: 4919 ldr r1, [pc, #100] @ (8001980 ) + 800191c: 68f8 ldr r0, [r7, #12] + 800191e: f7ff f8c1 bl 8000aa4 <__aeabi_fmul> + 8001922: 4603 mov r3, r0 + 8001924: 461c mov r4, r3 + 8001926: 687b ldr r3, [r7, #4] + 8001928: 6cdb ldr r3, [r3, #76] @ 0x4c + 800192a: 4916 ldr r1, [pc, #88] @ (8001984 ) + 800192c: 4618 mov r0, r3 + 800192e: f7ff f8b9 bl 8000aa4 <__aeabi_fmul> + 8001932: 4603 mov r3, r0 + 8001934: 4619 mov r1, r3 + 8001936: 4620 mov r0, r4 + 8001938: f7fe ffac bl 8000894 <__addsf3> + 800193c: 4603 mov r3, r0 + 800193e: 461a mov r2, r3 + 8001940: 687b ldr r3, [r7, #4] + 8001942: 64da str r2, [r3, #76] @ 0x4c } /* Final output: combines the IIR state (fast response to real drift) * with the window average (more stable, slower response). Adjust * the weighting per channel if needed. */ ch->filtered_value = 0.9f * ch->iir_state + 0.1f * window_average; - 8001238: 687b ldr r3, [r7, #4] - 800123a: 6cdb ldr r3, [r3, #76] @ 0x4c - 800123c: 490e ldr r1, [pc, #56] @ (8001278 ) - 800123e: 4618 mov r0, r3 - 8001240: f7ff f89a bl 8000378 <__aeabi_fmul> - 8001244: 4603 mov r3, r0 - 8001246: 461c mov r4, r3 - 8001248: 490a ldr r1, [pc, #40] @ (8001274 ) - 800124a: 68b8 ldr r0, [r7, #8] - 800124c: f7ff f894 bl 8000378 <__aeabi_fmul> - 8001250: 4603 mov r3, r0 - 8001252: 4619 mov r1, r3 - 8001254: 4620 mov r0, r4 - 8001256: f7fe ff87 bl 8000168 <__addsf3> - 800125a: 4603 mov r3, r0 - 800125c: 461a mov r2, r3 - 800125e: 687b ldr r3, [r7, #4] - 8001260: 655a str r2, [r3, #84] @ 0x54 + 8001944: 687b ldr r3, [r7, #4] + 8001946: 6cdb ldr r3, [r3, #76] @ 0x4c + 8001948: 490e ldr r1, [pc, #56] @ (8001984 ) + 800194a: 4618 mov r0, r3 + 800194c: f7ff f8aa bl 8000aa4 <__aeabi_fmul> + 8001950: 4603 mov r3, r0 + 8001952: 461c mov r4, r3 + 8001954: 490a ldr r1, [pc, #40] @ (8001980 ) + 8001956: 68b8 ldr r0, [r7, #8] + 8001958: f7ff f8a4 bl 8000aa4 <__aeabi_fmul> + 800195c: 4603 mov r3, r0 + 800195e: 4619 mov r1, r3 + 8001960: 4620 mov r0, r4 + 8001962: f7fe ff97 bl 8000894 <__addsf3> + 8001966: 4603 mov r3, r0 + 8001968: 461a mov r2, r3 + 800196a: 687b ldr r3, [r7, #4] + 800196c: 655a str r2, [r3, #84] @ 0x54 //ch->filtered_value = window_average; ch->value_valid = 1; - 8001262: 687b ldr r3, [r7, #4] - 8001264: 2201 movs r2, #1 - 8001266: f883 2058 strb.w r2, [r3, #88] @ 0x58 - 800126a: e000 b.n 800126e + 800196e: 687b ldr r3, [r7, #4] + 8001970: 2201 movs r2, #1 + 8001972: f883 2058 strb.w r2, [r3, #88] @ 0x58 + 8001976: e000 b.n 800197a return; /* still collecting the burst, nothing else to do */ - 800126c: bf00 nop + 8001978: bf00 nop } - 800126e: 3714 adds r7, #20 - 8001270: 46bd mov sp, r7 - 8001272: bd90 pop {r4, r7, pc} - 8001274: 3dcccccd .word 0x3dcccccd - 8001278: 3f666666 .word 0x3f666666 + 800197a: 3714 adds r7, #20 + 800197c: 46bd mov sp, r7 + 800197e: bd90 pop {r4, r7, pc} + 8001980: 3dcccccd .word 0x3dcccccd + 8001984: 3f666666 .word 0x3f666666 -0800127c : +08001988 : /* ---------------------------------------------------------------------- */ /* Call this every time a sweep completes with the mux on the RTD * (PT100/PT1000) channel */ void AD5934_RTD_NewSample(float raw) { - 800127c: b580 push {r7, lr} - 800127e: b082 sub sp, #8 - 8001280: af00 add r7, sp, #0 - 8001282: 6078 str r0, [r7, #4] + 8001988: b580 push {r7, lr} + 800198a: b082 sub sp, #8 + 800198c: af00 add r7, sp, #0 + 800198e: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_rtd_filter, raw); - 8001284: 6879 ldr r1, [r7, #4] - 8001286: 4803 ldr r0, [pc, #12] @ (8001294 ) - 8001288: f7ff ff64 bl 8001154 + 8001990: 6879 ldr r1, [r7, #4] + 8001992: 4803 ldr r0, [pc, #12] @ (80019a0 ) + 8001994: f7ff ff64 bl 8001860 } - 800128c: bf00 nop - 800128e: 3708 adds r7, #8 - 8001290: 46bd mov sp, r7 - 8001292: bd80 pop {r7, pc} - 8001294: 2000008c .word 0x2000008c + 8001998: bf00 nop + 800199a: 3708 adds r7, #8 + 800199c: 46bd mov sp, r7 + 800199e: bd80 pop {r7, pc} + 80019a0: 2000008c .word 0x2000008c -08001298 : +080019a4 : /* Call this every time a sweep completes with the mux on the EC * (conductivity probe) channel */ void AD5934_EC_NewSample(float raw) { - 8001298: b580 push {r7, lr} - 800129a: b082 sub sp, #8 - 800129c: af00 add r7, sp, #0 - 800129e: 6078 str r0, [r7, #4] + 80019a4: b580 push {r7, lr} + 80019a6: b082 sub sp, #8 + 80019a8: af00 add r7, sp, #0 + 80019aa: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_ec_filter, raw); - 80012a0: 6879 ldr r1, [r7, #4] - 80012a2: 4803 ldr r0, [pc, #12] @ (80012b0 ) - 80012a4: f7ff ff56 bl 8001154 + 80019ac: 6879 ldr r1, [r7, #4] + 80019ae: 4803 ldr r0, [pc, #12] @ (80019bc ) + 80019b0: f7ff ff56 bl 8001860 } - 80012a8: bf00 nop - 80012aa: 3708 adds r7, #8 - 80012ac: 46bd mov sp, r7 - 80012ae: bd80 pop {r7, pc} - 80012b0: 200000e8 .word 0x200000e8 + 80019b4: bf00 nop + 80019b6: 3708 adds r7, #8 + 80019b8: 46bd mov sp, r7 + 80019ba: bd80 pop {r7, pc} + 80019bc: 200000e8 .word 0x200000e8 -080012b4 : +080019c0 : /* Call this every time a sweep completes with the mux on the on-board * precision reference resistor channel */ void AD5934_Reference_100R_LowGain_NewSample(float raw) { - 80012b4: b580 push {r7, lr} - 80012b6: b082 sub sp, #8 - 80012b8: af00 add r7, sp, #0 - 80012ba: 6078 str r0, [r7, #4] + 80019c0: b580 push {r7, lr} + 80019c2: b082 sub sp, #8 + 80019c4: af00 add r7, sp, #0 + 80019c6: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_ref_100R_LowGain_filter, raw); - 80012bc: 6879 ldr r1, [r7, #4] - 80012be: 4803 ldr r0, [pc, #12] @ (80012cc ) - 80012c0: f7ff ff48 bl 8001154 + 80019c8: 6879 ldr r1, [r7, #4] + 80019ca: 4803 ldr r0, [pc, #12] @ (80019d8 ) + 80019cc: f7ff ff48 bl 8001860 } - 80012c4: bf00 nop - 80012c6: 3708 adds r7, #8 - 80012c8: 46bd mov sp, r7 - 80012ca: bd80 pop {r7, pc} - 80012cc: 20000144 .word 0x20000144 + 80019d0: bf00 nop + 80019d2: 3708 adds r7, #8 + 80019d4: 46bd mov sp, r7 + 80019d6: bd80 pop {r7, pc} + 80019d8: 20000144 .word 0x20000144 -080012d0 : +080019dc : /* Call this every time a sweep completes with the mux on the on-board * precision reference resistor channel */ void AD5934_Reference_100R_MidGain_NewSample(float raw) { - 80012d0: b580 push {r7, lr} - 80012d2: b082 sub sp, #8 - 80012d4: af00 add r7, sp, #0 - 80012d6: 6078 str r0, [r7, #4] + 80019dc: b580 push {r7, lr} + 80019de: b082 sub sp, #8 + 80019e0: af00 add r7, sp, #0 + 80019e2: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_ref_100R_MidGain_filter, raw); - 80012d8: 6879 ldr r1, [r7, #4] - 80012da: 4803 ldr r0, [pc, #12] @ (80012e8 ) - 80012dc: f7ff ff3a bl 8001154 + 80019e4: 6879 ldr r1, [r7, #4] + 80019e6: 4803 ldr r0, [pc, #12] @ (80019f4 ) + 80019e8: f7ff ff3a bl 8001860 } - 80012e0: bf00 nop - 80012e2: 3708 adds r7, #8 - 80012e4: 46bd mov sp, r7 - 80012e6: bd80 pop {r7, pc} - 80012e8: 200001a0 .word 0x200001a0 + 80019ec: bf00 nop + 80019ee: 3708 adds r7, #8 + 80019f0: 46bd mov sp, r7 + 80019f2: bd80 pop {r7, pc} + 80019f4: 200001a0 .word 0x200001a0 -080012ec : - -/* Call this every time a sweep completes with the mux on the on-board - * precision reference resistor channel */ -void AD5934_Reference_100R_HighGain_NewSample(float raw) -{ - 80012ec: b580 push {r7, lr} - 80012ee: b082 sub sp, #8 - 80012f0: af00 add r7, sp, #0 - 80012f2: 6078 str r0, [r7, #4] - AD5934_Process_Sample(&g_ref_100R_HighGain_filter, raw); - 80012f4: 6879 ldr r1, [r7, #4] - 80012f6: 4803 ldr r0, [pc, #12] @ (8001304 ) - 80012f8: f7ff ff2c bl 8001154 -} - 80012fc: bf00 nop - 80012fe: 3708 adds r7, #8 - 8001300: 46bd mov sp, r7 - 8001302: bd80 pop {r7, pc} - 8001304: 200001fc .word 0x200001fc - -08001308 : +080019f8 : /* Call this every time a sweep completes with the mux on the on-board * precision reference resistor channel */ void AD5934_Reference_1K_MidGain_NewSample(float raw) { - 8001308: b580 push {r7, lr} - 800130a: b082 sub sp, #8 - 800130c: af00 add r7, sp, #0 - 800130e: 6078 str r0, [r7, #4] + 80019f8: b580 push {r7, lr} + 80019fa: b082 sub sp, #8 + 80019fc: af00 add r7, sp, #0 + 80019fe: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_ref_1K_MidGain_filter, raw); - 8001310: 6879 ldr r1, [r7, #4] - 8001312: 4803 ldr r0, [pc, #12] @ (8001320 ) - 8001314: f7ff ff1e bl 8001154 + 8001a00: 6879 ldr r1, [r7, #4] + 8001a02: 4803 ldr r0, [pc, #12] @ (8001a10 ) + 8001a04: f7ff ff2c bl 8001860 } - 8001318: bf00 nop - 800131a: 3708 adds r7, #8 - 800131c: 46bd mov sp, r7 - 800131e: bd80 pop {r7, pc} - 8001320: 20000258 .word 0x20000258 + 8001a08: bf00 nop + 8001a0a: 3708 adds r7, #8 + 8001a0c: 46bd mov sp, r7 + 8001a0e: bd80 pop {r7, pc} + 8001a10: 200001fc .word 0x200001fc -08001324 : +08001a14 : /* Call this every time a sweep completes with the mux on the on-board * precision reference resistor channel */ void AD5934_Reference_1K_HighGain_NewSample(float raw) { - 8001324: b580 push {r7, lr} - 8001326: b082 sub sp, #8 - 8001328: af00 add r7, sp, #0 - 800132a: 6078 str r0, [r7, #4] + 8001a14: b580 push {r7, lr} + 8001a16: b082 sub sp, #8 + 8001a18: af00 add r7, sp, #0 + 8001a1a: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_ref_1K_HighGain_filter, raw); - 800132c: 6879 ldr r1, [r7, #4] - 800132e: 4803 ldr r0, [pc, #12] @ (800133c ) - 8001330: f7ff ff10 bl 8001154 + 8001a1c: 6879 ldr r1, [r7, #4] + 8001a1e: 4803 ldr r0, [pc, #12] @ (8001a2c ) + 8001a20: f7ff ff1e bl 8001860 } - 8001334: bf00 nop - 8001336: 3708 adds r7, #8 - 8001338: 46bd mov sp, r7 - 800133a: bd80 pop {r7, pc} - 800133c: 200002b4 .word 0x200002b4 + 8001a24: bf00 nop + 8001a26: 3708 adds r7, #8 + 8001a28: 46bd mov sp, r7 + 8001a2a: bd80 pop {r7, pc} + 8001a2c: 20000258 .word 0x20000258 -08001340 : +08001a30 : /* Call this every time a sweep completes with the mux on the on-board * precision reference resistor channel */ void AD5934_Reference_10K_HighGain_NewSample(float raw) { - 8001340: b580 push {r7, lr} - 8001342: b082 sub sp, #8 - 8001344: af00 add r7, sp, #0 - 8001346: 6078 str r0, [r7, #4] + 8001a30: b580 push {r7, lr} + 8001a32: b082 sub sp, #8 + 8001a34: af00 add r7, sp, #0 + 8001a36: 6078 str r0, [r7, #4] AD5934_Process_Sample(&g_ref_10K_HighGain_filter, raw); - 8001348: 6879 ldr r1, [r7, #4] - 800134a: 4803 ldr r0, [pc, #12] @ (8001358 ) - 800134c: f7ff ff02 bl 8001154 + 8001a38: 6879 ldr r1, [r7, #4] + 8001a3a: 4803 ldr r0, [pc, #12] @ (8001a48 ) + 8001a3c: f7ff ff10 bl 8001860 } - 8001350: bf00 nop - 8001352: 3708 adds r7, #8 - 8001354: 46bd mov sp, r7 - 8001356: bd80 pop {r7, pc} - 8001358: 20000310 .word 0x20000310 + 8001a40: bf00 nop + 8001a42: 3708 adds r7, #8 + 8001a44: 46bd mov sp, r7 + 8001a46: bd80 pop {r7, pc} + 8001a48: 200002b4 .word 0x200002b4 -0800135c : +08001a4c : * * @return None. *******************************************************************************/ void ADG715_SetRegisterValue(char value) { - 800135c: b580 push {r7, lr} - 800135e: b086 sub sp, #24 - 8001360: af02 add r7, sp, #8 - 8001362: 4603 mov r3, r0 - 8001364: 71fb strb r3, [r7, #7] + 8001a4c: b580 push {r7, lr} + 8001a4e: b086 sub sp, #24 + 8001a50: af02 add r7, sp, #8 + 8001a52: 4603 mov r3, r0 + 8001a54: 71fb strb r3, [r7, #7] uint8_t writeData[1] = {value}; - 8001366: 79fb ldrb r3, [r7, #7] - 8001368: 733b strb r3, [r7, #12] + 8001a56: 79fb ldrb r3, [r7, #7] + 8001a58: 733b strb r3, [r7, #12] HAL_StatusTypeDef status; status = HAL_I2C_Master_Transmit(&hi2c2, ADG715_I2C_ADDRESS, writeData, 1, 1); - 800136a: f107 020c add.w r2, r7, #12 - 800136e: 2301 movs r3, #1 - 8001370: 9300 str r3, [sp, #0] - 8001372: 2301 movs r3, #1 - 8001374: 2190 movs r1, #144 @ 0x90 - 8001376: 4804 ldr r0, [pc, #16] @ (8001388 ) - 8001378: f002 fa1a bl 80037b0 - 800137c: 4603 mov r3, r0 - 800137e: 73fb strb r3, [r7, #15] + 8001a5a: f107 020c add.w r2, r7, #12 + 8001a5e: 2301 movs r3, #1 + 8001a60: 9300 str r3, [sp, #0] + 8001a62: 2301 movs r3, #1 + 8001a64: 2190 movs r1, #144 @ 0x90 + 8001a66: 4804 ldr r0, [pc, #16] @ (8001a78 ) + 8001a68: f002 fb1a bl 80040a0 + 8001a6c: 4603 mov r3, r0 + 8001a6e: 73fb strb r3, [r7, #15] return; - 8001380: bf00 nop + 8001a70: bf00 nop } - 8001382: 3710 adds r7, #16 - 8001384: 46bd mov sp, r7 - 8001386: bd80 pop {r7, pc} - 8001388: 20000484 .word 0x20000484 + 8001a72: 3710 adds r7, #16 + 8001a74: 46bd mov sp, r7 + 8001a76: bd80 pop {r7, pc} + 8001a78: 20000444 .word 0x20000444 -0800138c : +08001a7c : * * @return none. ******************************************************************************/ void ADG715_ResetChannels(void) { - 800138c: b580 push {r7, lr} - 800138e: af00 add r7, sp, #0 + 8001a7c: b580 push {r7, lr} + 8001a7e: af00 add r7, sp, #0 ADG715_SetRegisterValue(0); - 8001390: 2000 movs r0, #0 - 8001392: f7ff ffe3 bl 800135c + 8001a80: 2000 movs r0, #0 + 8001a82: f7ff ffe3 bl 8001a4c } - 8001396: bf00 nop - 8001398: bd80 pop {r7, pc} + 8001a86: bf00 nop + 8001a88: bd80 pop {r7, pc} ... -0800139c : +08001a8c : * @param: channel * * @return none. ******************************************************************************/ void ADG715_SetChannels(AD5934_Channel_t channel) { - 800139c: b580 push {r7, lr} - 800139e: b082 sub sp, #8 - 80013a0: af00 add r7, sp, #0 - 80013a2: 4603 mov r3, r0 - 80013a4: 71fb strb r3, [r7, #7] + 8001a8c: b580 push {r7, lr} + 8001a8e: b082 sub sp, #8 + 8001a90: af00 add r7, sp, #0 + 8001a92: 4603 mov r3, r0 + 8001a94: 71fb strb r3, [r7, #7] // Garante que o índice recebido não ultrapassa os limites do vetor if (channel >= AD5934_CH_MAX) - 80013a6: 79fb ldrb r3, [r7, #7] - 80013a8: 2b0e cmp r3, #14 - 80013aa: d806 bhi.n 80013ba + 8001a96: 79fb ldrb r3, [r7, #7] + 8001a98: 2b0e cmp r3, #14 + 8001a9a: d806 bhi.n 8001aaa return; // Envia o byte combinado via I2C (Make-before-break nativo por barramento) ADG715_SetRegisterValue(ADG715_Channel_Map[channel]); - 80013ac: 79fb ldrb r3, [r7, #7] - 80013ae: 4a05 ldr r2, [pc, #20] @ (80013c4 ) - 80013b0: 5cd3 ldrb r3, [r2, r3] - 80013b2: 4618 mov r0, r3 - 80013b4: f7ff ffd2 bl 800135c - 80013b8: e000 b.n 80013bc + 8001a9c: 79fb ldrb r3, [r7, #7] + 8001a9e: 4a05 ldr r2, [pc, #20] @ (8001ab4 ) + 8001aa0: 5cd3 ldrb r3, [r2, r3] + 8001aa2: 4618 mov r0, r3 + 8001aa4: f7ff ffd2 bl 8001a4c + 8001aa8: e000 b.n 8001aac return; - 80013ba: bf00 nop + 8001aaa: bf00 nop } - 80013bc: 3708 adds r7, #8 - 80013be: 46bd mov sp, r7 - 80013c0: bd80 pop {r7, pc} - 80013c2: bf00 nop - 80013c4: 08006514 .word 0x08006514 + 8001aac: 3708 adds r7, #8 + 8001aae: 46bd mov sp, r7 + 8001ab0: bd80 pop {r7, pc} + 8001ab2: bf00 nop + 8001ab4: 08006e04 .word 0x08006e04 -080013c8 : +08001ab8 : ADC_HandleTypeDef hadc1; ADC_HandleTypeDef hadc2; /* ADC1 init function */ void MX_ADC1_Init(void) { - 80013c8: b580 push {r7, lr} - 80013ca: b084 sub sp, #16 - 80013cc: af00 add r7, sp, #0 + 8001ab8: b580 push {r7, lr} + 8001aba: b084 sub sp, #16 + 8001abc: af00 add r7, sp, #0 /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 80013ce: 1d3b adds r3, r7, #4 - 80013d0: 2200 movs r2, #0 - 80013d2: 601a str r2, [r3, #0] - 80013d4: 605a str r2, [r3, #4] - 80013d6: 609a str r2, [r3, #8] + 8001abe: 1d3b adds r3, r7, #4 + 8001ac0: 2200 movs r2, #0 + 8001ac2: 601a str r2, [r3, #0] + 8001ac4: 605a str r2, [r3, #4] + 8001ac6: 609a str r2, [r3, #8] /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; - 80013d8: 4b18 ldr r3, [pc, #96] @ (800143c ) - 80013da: 4a19 ldr r2, [pc, #100] @ (8001440 ) - 80013dc: 601a str r2, [r3, #0] + 8001ac8: 4b18 ldr r3, [pc, #96] @ (8001b2c ) + 8001aca: 4a19 ldr r2, [pc, #100] @ (8001b30 ) + 8001acc: 601a str r2, [r3, #0] hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; - 80013de: 4b17 ldr r3, [pc, #92] @ (800143c ) - 80013e0: 2200 movs r2, #0 - 80013e2: 609a str r2, [r3, #8] + 8001ace: 4b17 ldr r3, [pc, #92] @ (8001b2c ) + 8001ad0: 2200 movs r2, #0 + 8001ad2: 609a str r2, [r3, #8] hadc1.Init.ContinuousConvMode = ENABLE; - 80013e4: 4b15 ldr r3, [pc, #84] @ (800143c ) - 80013e6: 2201 movs r2, #1 - 80013e8: 731a strb r2, [r3, #12] + 8001ad4: 4b15 ldr r3, [pc, #84] @ (8001b2c ) + 8001ad6: 2201 movs r2, #1 + 8001ad8: 731a strb r2, [r3, #12] hadc1.Init.DiscontinuousConvMode = DISABLE; - 80013ea: 4b14 ldr r3, [pc, #80] @ (800143c ) - 80013ec: 2200 movs r2, #0 - 80013ee: 751a strb r2, [r3, #20] + 8001ada: 4b14 ldr r3, [pc, #80] @ (8001b2c ) + 8001adc: 2200 movs r2, #0 + 8001ade: 751a strb r2, [r3, #20] hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 80013f0: 4b12 ldr r3, [pc, #72] @ (800143c ) - 80013f2: f44f 2260 mov.w r2, #917504 @ 0xe0000 - 80013f6: 61da str r2, [r3, #28] + 8001ae0: 4b12 ldr r3, [pc, #72] @ (8001b2c ) + 8001ae2: f44f 2260 mov.w r2, #917504 @ 0xe0000 + 8001ae6: 61da str r2, [r3, #28] hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 80013f8: 4b10 ldr r3, [pc, #64] @ (800143c ) - 80013fa: 2200 movs r2, #0 - 80013fc: 605a str r2, [r3, #4] + 8001ae8: 4b10 ldr r3, [pc, #64] @ (8001b2c ) + 8001aea: 2200 movs r2, #0 + 8001aec: 605a str r2, [r3, #4] hadc1.Init.NbrOfConversion = 1; - 80013fe: 4b0f ldr r3, [pc, #60] @ (800143c ) - 8001400: 2201 movs r2, #1 - 8001402: 611a str r2, [r3, #16] + 8001aee: 4b0f ldr r3, [pc, #60] @ (8001b2c ) + 8001af0: 2201 movs r2, #1 + 8001af2: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc1) != HAL_OK) - 8001404: 480d ldr r0, [pc, #52] @ (800143c ) - 8001406: f001 faf1 bl 80029ec - 800140a: 4603 mov r3, r0 - 800140c: 2b00 cmp r3, #0 - 800140e: d001 beq.n 8001414 + 8001af4: 480d ldr r0, [pc, #52] @ (8001b2c ) + 8001af6: f001 fbf1 bl 80032dc + 8001afa: 4603 mov r3, r0 + 8001afc: 2b00 cmp r3, #0 + 8001afe: d001 beq.n 8001b04 { Error_Handler(); - 8001410: f000 ffdc bl 80023cc + 8001b00: f001 f8dc bl 8002cbc } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_0; - 8001414: 2300 movs r3, #0 - 8001416: 607b str r3, [r7, #4] + 8001b04: 2300 movs r3, #0 + 8001b06: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; - 8001418: 2301 movs r3, #1 - 800141a: 60bb str r3, [r7, #8] + 8001b08: 2301 movs r3, #1 + 8001b0a: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; - 800141c: 2300 movs r3, #0 - 800141e: 60fb str r3, [r7, #12] + 8001b0c: 2300 movs r3, #0 + 8001b0e: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 8001420: 1d3b adds r3, r7, #4 - 8001422: 4619 mov r1, r3 - 8001424: 4805 ldr r0, [pc, #20] @ (800143c ) - 8001426: f001 fbb9 bl 8002b9c - 800142a: 4603 mov r3, r0 - 800142c: 2b00 cmp r3, #0 - 800142e: d001 beq.n 8001434 + 8001b10: 1d3b adds r3, r7, #4 + 8001b12: 4619 mov r1, r3 + 8001b14: 4805 ldr r0, [pc, #20] @ (8001b2c ) + 8001b16: f001 fcb9 bl 800348c + 8001b1a: 4603 mov r3, r0 + 8001b1c: 2b00 cmp r3, #0 + 8001b1e: d001 beq.n 8001b24 { Error_Handler(); - 8001430: f000 ffcc bl 80023cc + 8001b20: f001 f8cc bl 8002cbc } /* USER CODE BEGIN ADC1_Init 2 */ /* USER CODE END ADC1_Init 2 */ } - 8001434: bf00 nop - 8001436: 3710 adds r7, #16 - 8001438: 46bd mov sp, r7 - 800143a: bd80 pop {r7, pc} - 800143c: 2000036c .word 0x2000036c - 8001440: 40012400 .word 0x40012400 + 8001b24: bf00 nop + 8001b26: 3710 adds r7, #16 + 8001b28: 46bd mov sp, r7 + 8001b2a: bd80 pop {r7, pc} + 8001b2c: 20000310 .word 0x20000310 + 8001b30: 40012400 .word 0x40012400 -08001444 : +08001b34 : /* ADC2 init function */ void MX_ADC2_Init(void) { - 8001444: b580 push {r7, lr} - 8001446: b084 sub sp, #16 - 8001448: af00 add r7, sp, #0 + 8001b34: b580 push {r7, lr} + 8001b36: b084 sub sp, #16 + 8001b38: af00 add r7, sp, #0 /* USER CODE BEGIN ADC2_Init 0 */ /* USER CODE END ADC2_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 800144a: 1d3b adds r3, r7, #4 - 800144c: 2200 movs r2, #0 - 800144e: 601a str r2, [r3, #0] - 8001450: 605a str r2, [r3, #4] - 8001452: 609a str r2, [r3, #8] + 8001b3a: 1d3b adds r3, r7, #4 + 8001b3c: 2200 movs r2, #0 + 8001b3e: 601a str r2, [r3, #0] + 8001b40: 605a str r2, [r3, #4] + 8001b42: 609a str r2, [r3, #8] /* USER CODE END ADC2_Init 1 */ /** Common config */ hadc2.Instance = ADC2; - 8001454: 4b18 ldr r3, [pc, #96] @ (80014b8 ) - 8001456: 4a19 ldr r2, [pc, #100] @ (80014bc ) - 8001458: 601a str r2, [r3, #0] + 8001b44: 4b18 ldr r3, [pc, #96] @ (8001ba8 ) + 8001b46: 4a19 ldr r2, [pc, #100] @ (8001bac ) + 8001b48: 601a str r2, [r3, #0] hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE; - 800145a: 4b17 ldr r3, [pc, #92] @ (80014b8 ) - 800145c: 2200 movs r2, #0 - 800145e: 609a str r2, [r3, #8] + 8001b4a: 4b17 ldr r3, [pc, #92] @ (8001ba8 ) + 8001b4c: 2200 movs r2, #0 + 8001b4e: 609a str r2, [r3, #8] hadc2.Init.ContinuousConvMode = ENABLE; - 8001460: 4b15 ldr r3, [pc, #84] @ (80014b8 ) - 8001462: 2201 movs r2, #1 - 8001464: 731a strb r2, [r3, #12] + 8001b50: 4b15 ldr r3, [pc, #84] @ (8001ba8 ) + 8001b52: 2201 movs r2, #1 + 8001b54: 731a strb r2, [r3, #12] hadc2.Init.DiscontinuousConvMode = DISABLE; - 8001466: 4b14 ldr r3, [pc, #80] @ (80014b8 ) - 8001468: 2200 movs r2, #0 - 800146a: 751a strb r2, [r3, #20] + 8001b56: 4b14 ldr r3, [pc, #80] @ (8001ba8 ) + 8001b58: 2200 movs r2, #0 + 8001b5a: 751a strb r2, [r3, #20] hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 800146c: 4b12 ldr r3, [pc, #72] @ (80014b8 ) - 800146e: f44f 2260 mov.w r2, #917504 @ 0xe0000 - 8001472: 61da str r2, [r3, #28] + 8001b5c: 4b12 ldr r3, [pc, #72] @ (8001ba8 ) + 8001b5e: f44f 2260 mov.w r2, #917504 @ 0xe0000 + 8001b62: 61da str r2, [r3, #28] hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8001474: 4b10 ldr r3, [pc, #64] @ (80014b8 ) - 8001476: 2200 movs r2, #0 - 8001478: 605a str r2, [r3, #4] + 8001b64: 4b10 ldr r3, [pc, #64] @ (8001ba8 ) + 8001b66: 2200 movs r2, #0 + 8001b68: 605a str r2, [r3, #4] hadc2.Init.NbrOfConversion = 1; - 800147a: 4b0f ldr r3, [pc, #60] @ (80014b8 ) - 800147c: 2201 movs r2, #1 - 800147e: 611a str r2, [r3, #16] + 8001b6a: 4b0f ldr r3, [pc, #60] @ (8001ba8 ) + 8001b6c: 2201 movs r2, #1 + 8001b6e: 611a str r2, [r3, #16] if (HAL_ADC_Init(&hadc2) != HAL_OK) - 8001480: 480d ldr r0, [pc, #52] @ (80014b8 ) - 8001482: f001 fab3 bl 80029ec - 8001486: 4603 mov r3, r0 - 8001488: 2b00 cmp r3, #0 - 800148a: d001 beq.n 8001490 + 8001b70: 480d ldr r0, [pc, #52] @ (8001ba8 ) + 8001b72: f001 fbb3 bl 80032dc + 8001b76: 4603 mov r3, r0 + 8001b78: 2b00 cmp r3, #0 + 8001b7a: d001 beq.n 8001b80 { Error_Handler(); - 800148c: f000 ff9e bl 80023cc + 8001b7c: f001 f89e bl 8002cbc } /** Configure Regular Channel */ sConfig.Channel = ADC_CHANNEL_1; - 8001490: 2301 movs r3, #1 - 8001492: 607b str r3, [r7, #4] + 8001b80: 2301 movs r3, #1 + 8001b82: 607b str r3, [r7, #4] sConfig.Rank = ADC_REGULAR_RANK_1; - 8001494: 2301 movs r3, #1 - 8001496: 60bb str r3, [r7, #8] + 8001b84: 2301 movs r3, #1 + 8001b86: 60bb str r3, [r7, #8] sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; - 8001498: 2300 movs r3, #0 - 800149a: 60fb str r3, [r7, #12] + 8001b88: 2300 movs r3, #0 + 8001b8a: 60fb str r3, [r7, #12] if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK) - 800149c: 1d3b adds r3, r7, #4 - 800149e: 4619 mov r1, r3 - 80014a0: 4805 ldr r0, [pc, #20] @ (80014b8 ) - 80014a2: f001 fb7b bl 8002b9c - 80014a6: 4603 mov r3, r0 - 80014a8: 2b00 cmp r3, #0 - 80014aa: d001 beq.n 80014b0 + 8001b8c: 1d3b adds r3, r7, #4 + 8001b8e: 4619 mov r1, r3 + 8001b90: 4805 ldr r0, [pc, #20] @ (8001ba8 ) + 8001b92: f001 fc7b bl 800348c + 8001b96: 4603 mov r3, r0 + 8001b98: 2b00 cmp r3, #0 + 8001b9a: d001 beq.n 8001ba0 { Error_Handler(); - 80014ac: f000 ff8e bl 80023cc + 8001b9c: f001 f88e bl 8002cbc } /* USER CODE BEGIN ADC2_Init 2 */ /* USER CODE END ADC2_Init 2 */ } - 80014b0: bf00 nop - 80014b2: 3710 adds r7, #16 - 80014b4: 46bd mov sp, r7 - 80014b6: bd80 pop {r7, pc} - 80014b8: 2000039c .word 0x2000039c - 80014bc: 40012800 .word 0x40012800 + 8001ba0: bf00 nop + 8001ba2: 3710 adds r7, #16 + 8001ba4: 46bd mov sp, r7 + 8001ba6: bd80 pop {r7, pc} + 8001ba8: 20000340 .word 0x20000340 + 8001bac: 40012800 .word 0x40012800 -080014c0 : +08001bb0 : void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle) { - 80014c0: b580 push {r7, lr} - 80014c2: b08a sub sp, #40 @ 0x28 - 80014c4: af00 add r7, sp, #0 - 80014c6: 6078 str r0, [r7, #4] + 8001bb0: b580 push {r7, lr} + 8001bb2: b08a sub sp, #40 @ 0x28 + 8001bb4: af00 add r7, sp, #0 + 8001bb6: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80014c8: f107 0318 add.w r3, r7, #24 - 80014cc: 2200 movs r2, #0 - 80014ce: 601a str r2, [r3, #0] - 80014d0: 605a str r2, [r3, #4] - 80014d2: 609a str r2, [r3, #8] - 80014d4: 60da str r2, [r3, #12] + 8001bb8: f107 0318 add.w r3, r7, #24 + 8001bbc: 2200 movs r2, #0 + 8001bbe: 601a str r2, [r3, #0] + 8001bc0: 605a str r2, [r3, #4] + 8001bc2: 609a str r2, [r3, #8] + 8001bc4: 60da str r2, [r3, #12] if(adcHandle->Instance==ADC1) - 80014d6: 687b ldr r3, [r7, #4] - 80014d8: 681b ldr r3, [r3, #0] - 80014da: 4a28 ldr r2, [pc, #160] @ (800157c ) - 80014dc: 4293 cmp r3, r2 - 80014de: d122 bne.n 8001526 + 8001bc6: 687b ldr r3, [r7, #4] + 8001bc8: 681b ldr r3, [r3, #0] + 8001bca: 4a28 ldr r2, [pc, #160] @ (8001c6c ) + 8001bcc: 4293 cmp r3, r2 + 8001bce: d122 bne.n 8001c16 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* ADC1 clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); - 80014e0: 4b27 ldr r3, [pc, #156] @ (8001580 ) - 80014e2: 699b ldr r3, [r3, #24] - 80014e4: 4a26 ldr r2, [pc, #152] @ (8001580 ) - 80014e6: f443 7300 orr.w r3, r3, #512 @ 0x200 - 80014ea: 6193 str r3, [r2, #24] - 80014ec: 4b24 ldr r3, [pc, #144] @ (8001580 ) - 80014ee: 699b ldr r3, [r3, #24] - 80014f0: f403 7300 and.w r3, r3, #512 @ 0x200 - 80014f4: 617b str r3, [r7, #20] - 80014f6: 697b ldr r3, [r7, #20] + 8001bd0: 4b27 ldr r3, [pc, #156] @ (8001c70 ) + 8001bd2: 699b ldr r3, [r3, #24] + 8001bd4: 4a26 ldr r2, [pc, #152] @ (8001c70 ) + 8001bd6: f443 7300 orr.w r3, r3, #512 @ 0x200 + 8001bda: 6193 str r3, [r2, #24] + 8001bdc: 4b24 ldr r3, [pc, #144] @ (8001c70 ) + 8001bde: 699b ldr r3, [r3, #24] + 8001be0: f403 7300 and.w r3, r3, #512 @ 0x200 + 8001be4: 617b str r3, [r7, #20] + 8001be6: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); - 80014f8: 4b21 ldr r3, [pc, #132] @ (8001580 ) - 80014fa: 699b ldr r3, [r3, #24] - 80014fc: 4a20 ldr r2, [pc, #128] @ (8001580 ) - 80014fe: f043 0304 orr.w r3, r3, #4 - 8001502: 6193 str r3, [r2, #24] - 8001504: 4b1e ldr r3, [pc, #120] @ (8001580 ) - 8001506: 699b ldr r3, [r3, #24] - 8001508: f003 0304 and.w r3, r3, #4 - 800150c: 613b str r3, [r7, #16] - 800150e: 693b ldr r3, [r7, #16] + 8001be8: 4b21 ldr r3, [pc, #132] @ (8001c70 ) + 8001bea: 699b ldr r3, [r3, #24] + 8001bec: 4a20 ldr r2, [pc, #128] @ (8001c70 ) + 8001bee: f043 0304 orr.w r3, r3, #4 + 8001bf2: 6193 str r3, [r2, #24] + 8001bf4: 4b1e ldr r3, [pc, #120] @ (8001c70 ) + 8001bf6: 699b ldr r3, [r3, #24] + 8001bf8: f003 0304 and.w r3, r3, #4 + 8001bfc: 613b str r3, [r7, #16] + 8001bfe: 693b ldr r3, [r7, #16] /**ADC1 GPIO Configuration PA0-WKUP ------> ADC1_IN0 PA1 ------> ADC1_IN1 */ GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin; - 8001510: 2303 movs r3, #3 - 8001512: 61bb str r3, [r7, #24] + 8001c00: 2303 movs r3, #3 + 8001c02: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8001514: 2303 movs r3, #3 - 8001516: 61fb str r3, [r7, #28] + 8001c04: 2303 movs r3, #3 + 8001c06: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001518: f107 0318 add.w r3, r7, #24 - 800151c: 4619 mov r1, r3 - 800151e: 4819 ldr r0, [pc, #100] @ (8001584 ) - 8001520: f001 fe36 bl 8003190 + 8001c08: f107 0318 add.w r3, r7, #24 + 8001c0c: 4619 mov r1, r3 + 8001c0e: 4819 ldr r0, [pc, #100] @ (8001c74 ) + 8001c10: f001 ff36 bl 8003a80 /* USER CODE BEGIN ADC2_MspInit 1 */ /* USER CODE END ADC2_MspInit 1 */ } } - 8001524: e026 b.n 8001574 + 8001c14: e026 b.n 8001c64 else if(adcHandle->Instance==ADC2) - 8001526: 687b ldr r3, [r7, #4] - 8001528: 681b ldr r3, [r3, #0] - 800152a: 4a17 ldr r2, [pc, #92] @ (8001588 ) - 800152c: 4293 cmp r3, r2 - 800152e: d121 bne.n 8001574 + 8001c16: 687b ldr r3, [r7, #4] + 8001c18: 681b ldr r3, [r3, #0] + 8001c1a: 4a17 ldr r2, [pc, #92] @ (8001c78 ) + 8001c1c: 4293 cmp r3, r2 + 8001c1e: d121 bne.n 8001c64 __HAL_RCC_ADC2_CLK_ENABLE(); - 8001530: 4b13 ldr r3, [pc, #76] @ (8001580 ) - 8001532: 699b ldr r3, [r3, #24] - 8001534: 4a12 ldr r2, [pc, #72] @ (8001580 ) - 8001536: f443 6380 orr.w r3, r3, #1024 @ 0x400 - 800153a: 6193 str r3, [r2, #24] - 800153c: 4b10 ldr r3, [pc, #64] @ (8001580 ) - 800153e: 699b ldr r3, [r3, #24] - 8001540: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8001544: 60fb str r3, [r7, #12] - 8001546: 68fb ldr r3, [r7, #12] + 8001c20: 4b13 ldr r3, [pc, #76] @ (8001c70 ) + 8001c22: 699b ldr r3, [r3, #24] + 8001c24: 4a12 ldr r2, [pc, #72] @ (8001c70 ) + 8001c26: f443 6380 orr.w r3, r3, #1024 @ 0x400 + 8001c2a: 6193 str r3, [r2, #24] + 8001c2c: 4b10 ldr r3, [pc, #64] @ (8001c70 ) + 8001c2e: 699b ldr r3, [r3, #24] + 8001c30: f403 6380 and.w r3, r3, #1024 @ 0x400 + 8001c34: 60fb str r3, [r7, #12] + 8001c36: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001548: 4b0d ldr r3, [pc, #52] @ (8001580 ) - 800154a: 699b ldr r3, [r3, #24] - 800154c: 4a0c ldr r2, [pc, #48] @ (8001580 ) - 800154e: f043 0304 orr.w r3, r3, #4 - 8001552: 6193 str r3, [r2, #24] - 8001554: 4b0a ldr r3, [pc, #40] @ (8001580 ) - 8001556: 699b ldr r3, [r3, #24] - 8001558: f003 0304 and.w r3, r3, #4 - 800155c: 60bb str r3, [r7, #8] - 800155e: 68bb ldr r3, [r7, #8] + 8001c38: 4b0d ldr r3, [pc, #52] @ (8001c70 ) + 8001c3a: 699b ldr r3, [r3, #24] + 8001c3c: 4a0c ldr r2, [pc, #48] @ (8001c70 ) + 8001c3e: f043 0304 orr.w r3, r3, #4 + 8001c42: 6193 str r3, [r2, #24] + 8001c44: 4b0a ldr r3, [pc, #40] @ (8001c70 ) + 8001c46: 699b ldr r3, [r3, #24] + 8001c48: f003 0304 and.w r3, r3, #4 + 8001c4c: 60bb str r3, [r7, #8] + 8001c4e: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin; - 8001560: 2303 movs r3, #3 - 8001562: 61bb str r3, [r7, #24] + 8001c50: 2303 movs r3, #3 + 8001c52: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8001564: 2303 movs r3, #3 - 8001566: 61fb str r3, [r7, #28] + 8001c54: 2303 movs r3, #3 + 8001c56: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001568: f107 0318 add.w r3, r7, #24 - 800156c: 4619 mov r1, r3 - 800156e: 4805 ldr r0, [pc, #20] @ (8001584 ) - 8001570: f001 fe0e bl 8003190 + 8001c58: f107 0318 add.w r3, r7, #24 + 8001c5c: 4619 mov r1, r3 + 8001c5e: 4805 ldr r0, [pc, #20] @ (8001c74 ) + 8001c60: f001 ff0e bl 8003a80 } - 8001574: bf00 nop - 8001576: 3728 adds r7, #40 @ 0x28 - 8001578: 46bd mov sp, r7 - 800157a: bd80 pop {r7, pc} - 800157c: 40012400 .word 0x40012400 - 8001580: 40021000 .word 0x40021000 - 8001584: 40010800 .word 0x40010800 - 8001588: 40012800 .word 0x40012800 + 8001c64: bf00 nop + 8001c66: 3728 adds r7, #40 @ 0x28 + 8001c68: 46bd mov sp, r7 + 8001c6a: bd80 pop {r7, pc} + 8001c6c: 40012400 .word 0x40012400 + 8001c70: 40021000 .word 0x40021000 + 8001c74: 40010800 .word 0x40010800 + 8001c78: 40012800 .word 0x40012800 -0800158c : +08001c7c : ADS1015_filter_t g_ph_filter = {0}; volatile ADS1015_State_t ads1015_state = ADS1015_IDLE; // Write the register static void writeRegister(ADS1015_I2C *i2c, uint8_t reg, uint16_t value) { - 800158c: b580 push {r7, lr} - 800158e: b086 sub sp, #24 - 8001590: af02 add r7, sp, #8 - 8001592: 6078 str r0, [r7, #4] - 8001594: 460b mov r3, r1 - 8001596: 70fb strb r3, [r7, #3] - 8001598: 4613 mov r3, r2 - 800159a: 803b strh r3, [r7, #0] + 8001c7c: b580 push {r7, lr} + 8001c7e: b086 sub sp, #24 + 8001c80: af02 add r7, sp, #8 + 8001c82: 6078 str r0, [r7, #4] + 8001c84: 460b mov r3, r1 + 8001c86: 70fb strb r3, [r7, #3] + 8001c88: 4613 mov r3, r2 + 8001c8a: 803b strh r3, [r7, #0] uint8_t pData[3] = { reg, (uint8_t) (value >> 8), (uint8_t) (value & 0xFF) }; - 800159c: 78fb ldrb r3, [r7, #3] - 800159e: 733b strb r3, [r7, #12] - 80015a0: 883b ldrh r3, [r7, #0] - 80015a2: 0a1b lsrs r3, r3, #8 - 80015a4: b29b uxth r3, r3 - 80015a6: b2db uxtb r3, r3 - 80015a8: 737b strb r3, [r7, #13] - 80015aa: 883b ldrh r3, [r7, #0] - 80015ac: b2db uxtb r3, r3 - 80015ae: 73bb strb r3, [r7, #14] + 8001c8c: 78fb ldrb r3, [r7, #3] + 8001c8e: 733b strb r3, [r7, #12] + 8001c90: 883b ldrh r3, [r7, #0] + 8001c92: 0a1b lsrs r3, r3, #8 + 8001c94: b29b uxth r3, r3 + 8001c96: b2db uxtb r3, r3 + 8001c98: 737b strb r3, [r7, #13] + 8001c9a: 883b ldrh r3, [r7, #0] + 8001c9c: b2db uxtb r3, r3 + 8001c9e: 73bb strb r3, [r7, #14] HAL_I2C_Master_Transmit(i2c->hi2c, i2c->m_i2cAddress, pData, 3, 10); - 80015b0: 687b ldr r3, [r7, #4] - 80015b2: 68d8 ldr r0, [r3, #12] - 80015b4: 687b ldr r3, [r7, #4] - 80015b6: 8819 ldrh r1, [r3, #0] - 80015b8: f107 020c add.w r2, r7, #12 - 80015bc: 230a movs r3, #10 - 80015be: 9300 str r3, [sp, #0] - 80015c0: 2303 movs r3, #3 - 80015c2: f002 f8f5 bl 80037b0 + 8001ca0: 687b ldr r3, [r7, #4] + 8001ca2: 68d8 ldr r0, [r3, #12] + 8001ca4: 687b ldr r3, [r7, #4] + 8001ca6: 8819 ldrh r1, [r3, #0] + 8001ca8: f107 020c add.w r2, r7, #12 + 8001cac: 230a movs r3, #10 + 8001cae: 9300 str r3, [sp, #0] + 8001cb0: 2303 movs r3, #3 + 8001cb2: f002 f9f5 bl 80040a0 } - 80015c6: bf00 nop - 80015c8: 3710 adds r7, #16 - 80015ca: 46bd mov sp, r7 - 80015cc: bd80 pop {r7, pc} + 8001cb6: bf00 nop + 8001cb8: 3710 adds r7, #16 + 8001cba: 46bd mov sp, r7 + 8001cbc: bd80 pop {r7, pc} -080015ce : +08001cbe : // Read the register static uint16_t readRegister(ADS1015_I2C *i2c, uint8_t reg) { - 80015ce: b580 push {r7, lr} - 80015d0: b086 sub sp, #24 - 80015d2: af02 add r7, sp, #8 - 80015d4: 6078 str r0, [r7, #4] - 80015d6: 460b mov r3, r1 - 80015d8: 70fb strb r3, [r7, #3] + 8001cbe: b580 push {r7, lr} + 8001cc0: b086 sub sp, #24 + 8001cc2: af02 add r7, sp, #8 + 8001cc4: 6078 str r0, [r7, #4] + 8001cc6: 460b mov r3, r1 + 8001cc8: 70fb strb r3, [r7, #3] HAL_I2C_Master_Transmit(i2c->hi2c, i2c->m_i2cAddress, ®, 1, 10); - 80015da: 687b ldr r3, [r7, #4] - 80015dc: 68d8 ldr r0, [r3, #12] - 80015de: 687b ldr r3, [r7, #4] - 80015e0: 8819 ldrh r1, [r3, #0] - 80015e2: 1cfa adds r2, r7, #3 - 80015e4: 230a movs r3, #10 - 80015e6: 9300 str r3, [sp, #0] - 80015e8: 2301 movs r3, #1 - 80015ea: f002 f8e1 bl 80037b0 + 8001cca: 687b ldr r3, [r7, #4] + 8001ccc: 68d8 ldr r0, [r3, #12] + 8001cce: 687b ldr r3, [r7, #4] + 8001cd0: 8819 ldrh r1, [r3, #0] + 8001cd2: 1cfa adds r2, r7, #3 + 8001cd4: 230a movs r3, #10 + 8001cd6: 9300 str r3, [sp, #0] + 8001cd8: 2301 movs r3, #1 + 8001cda: f002 f9e1 bl 80040a0 uint8_t pData[2] = { 0, 0 }; - 80015ee: 2300 movs r3, #0 - 80015f0: 81bb strh r3, [r7, #12] + 8001cde: 2300 movs r3, #0 + 8001ce0: 81bb strh r3, [r7, #12] HAL_I2C_Master_Receive(i2c->hi2c, i2c->m_i2cAddress, pData, 2, 10); - 80015f2: 687b ldr r3, [r7, #4] - 80015f4: 68d8 ldr r0, [r3, #12] - 80015f6: 687b ldr r3, [r7, #4] - 80015f8: 8819 ldrh r1, [r3, #0] - 80015fa: f107 020c add.w r2, r7, #12 - 80015fe: 230a movs r3, #10 - 8001600: 9300 str r3, [sp, #0] - 8001602: 2302 movs r3, #2 - 8001604: f002 f9d2 bl 80039ac + 8001ce2: 687b ldr r3, [r7, #4] + 8001ce4: 68d8 ldr r0, [r3, #12] + 8001ce6: 687b ldr r3, [r7, #4] + 8001ce8: 8819 ldrh r1, [r3, #0] + 8001cea: f107 020c add.w r2, r7, #12 + 8001cee: 230a movs r3, #10 + 8001cf0: 9300 str r3, [sp, #0] + 8001cf2: 2302 movs r3, #2 + 8001cf4: f002 fad2 bl 800429c return ((pData[0] << 8) | pData[1]); - 8001608: 7b3b ldrb r3, [r7, #12] - 800160a: b21b sxth r3, r3 - 800160c: 021b lsls r3, r3, #8 - 800160e: b21a sxth r2, r3 - 8001610: 7b7b ldrb r3, [r7, #13] - 8001612: b21b sxth r3, r3 - 8001614: 4313 orrs r3, r2 - 8001616: b21b sxth r3, r3 - 8001618: b29b uxth r3, r3 + 8001cf8: 7b3b ldrb r3, [r7, #12] + 8001cfa: b21b sxth r3, r3 + 8001cfc: 021b lsls r3, r3, #8 + 8001cfe: b21a sxth r2, r3 + 8001d00: 7b7b ldrb r3, [r7, #13] + 8001d02: b21b sxth r3, r3 + 8001d04: 4313 orrs r3, r2 + 8001d06: b21b sxth r3, r3 + 8001d08: b29b uxth r3, r3 } - 800161a: 4618 mov r0, r3 - 800161c: 3710 adds r7, #16 - 800161e: 46bd mov sp, r7 - 8001620: bd80 pop {r7, pc} + 8001d0a: 4618 mov r0, r3 + 8001d0c: 3710 adds r7, #16 + 8001d0e: 46bd mov sp, r7 + 8001d10: bd80 pop {r7, pc} ... -08001624 : +08001d14 : // ADSsetGain(GAIN_EIGHT); // 8x gain +/- 0.512V 1 bit = 0.25mV 0.015625mV // ADSsetGain(GAIN_SIXTEEN); // 16x gain +/- 0.256V 1 bit = 0.125mV 0.0078125mV */ // Declare an ADS1015 structure void ADS1015_Init(void) { - 8001624: b480 push {r7} - 8001626: af00 add r7, sp, #0 + 8001d14: b480 push {r7} + 8001d16: af00 add r7, sp, #0 i2c_ads1015.hi2c = &hi2c1; - 8001628: 4b09 ldr r3, [pc, #36] @ (8001650 ) - 800162a: 4a0a ldr r2, [pc, #40] @ (8001654 ) - 800162c: 60da str r2, [r3, #12] + 8001d18: 4b09 ldr r3, [pc, #36] @ (8001d40 ) + 8001d1a: 4a0a ldr r2, [pc, #40] @ (8001d44 ) + 8001d1c: 60da str r2, [r3, #12] i2c_ads1015.m_i2cAddress = ADS1015_ADDR_GND; // It's Important to shift the address << 1 - 800162e: 4b08 ldr r3, [pc, #32] @ (8001650 ) - 8001630: 2290 movs r2, #144 @ 0x90 - 8001632: 801a strh r2, [r3, #0] + 8001d1e: 4b08 ldr r3, [pc, #32] @ (8001d40 ) + 8001d20: 2290 movs r2, #144 @ 0x90 + 8001d22: 801a strh r2, [r3, #0] i2c_ads1015.m_conversionDelay = ADS1015_CONVERSIONDELAY; - 8001634: 4b06 ldr r3, [pc, #24] @ (8001650 ) - 8001636: 2204 movs r2, #4 - 8001638: 605a str r2, [r3, #4] + 8001d24: 4b06 ldr r3, [pc, #24] @ (8001d40 ) + 8001d26: 2204 movs r2, #4 + 8001d28: 605a str r2, [r3, #4] i2c_ads1015.m_bitShift = 4; - 800163a: 4b05 ldr r3, [pc, #20] @ (8001650 ) - 800163c: 2204 movs r2, #4 - 800163e: 721a strb r2, [r3, #8] + 8001d2a: 4b05 ldr r3, [pc, #20] @ (8001d40 ) + 8001d2c: 2204 movs r2, #4 + 8001d2e: 721a strb r2, [r3, #8] i2c_ads1015.m_gain = GAIN_FOUR; /* 4x gain +/- 1.024V 1 bit = 0.5mV 0.03125mV */ - 8001640: 4b03 ldr r3, [pc, #12] @ (8001650 ) - 8001642: f44f 62c0 mov.w r2, #1536 @ 0x600 - 8001646: 815a strh r2, [r3, #10] + 8001d30: 4b03 ldr r3, [pc, #12] @ (8001d40 ) + 8001d32: f44f 62c0 mov.w r2, #1536 @ 0x600 + 8001d36: 815a strh r2, [r3, #10] } - 8001648: bf00 nop - 800164a: 46bd mov sp, r7 - 800164c: bc80 pop {r7} - 800164e: 4770 bx lr - 8001650: 200003cc .word 0x200003cc - 8001654: 20000430 .word 0x20000430 + 8001d38: bf00 nop + 8001d3a: 46bd mov sp, r7 + 8001d3c: bc80 pop {r7} + 8001d3e: 4770 bx lr + 8001d40: 20000370 .word 0x20000370 + 8001d44: 200003f0 .word 0x200003f0 -08001658 : +08001d48 : * @param value Valor float entre FLOAT_MIN e FLOAT_MAX * * @return uint16_t Valor convertido na escala de UINT16_MIN a UINT16_MAX */ uint16_t ADS1015_Compress_To_IntScale(float value) { - 8001658: b580 push {r7, lr} - 800165a: b084 sub sp, #16 - 800165c: af00 add r7, sp, #0 - 800165e: 6078 str r0, [r7, #4] + 8001d48: b580 push {r7, lr} + 8001d4a: b084 sub sp, #16 + 8001d4c: af00 add r7, sp, #0 + 8001d4e: 6078 str r0, [r7, #4] // Verifica limites do valor de entrada if (value < ADS1015_PH_FLOAT_SCALE_MIN) - 8001660: 491c ldr r1, [pc, #112] @ (80016d4 ) - 8001662: 6878 ldr r0, [r7, #4] - 8001664: f7ff f826 bl 80006b4 <__aeabi_fcmplt> - 8001668: 4603 mov r3, r0 - 800166a: 2b00 cmp r3, #0 - 800166c: d001 beq.n 8001672 + 8001d50: 491c ldr r1, [pc, #112] @ (8001dc4 ) + 8001d52: 6878 ldr r0, [r7, #4] + 8001d54: f7ff f844 bl 8000de0 <__aeabi_fcmplt> + 8001d58: 4603 mov r3, r0 + 8001d5a: 2b00 cmp r3, #0 + 8001d5c: d001 beq.n 8001d62 return ADS1015_PH_OUT_SCALE_MIN; - 800166e: 2300 movs r3, #0 - 8001670: e02c b.n 80016cc + 8001d5e: 2300 movs r3, #0 + 8001d60: e02c b.n 8001dbc else if (value > ADS1015_PH_FLOAT_SCALE_MAX) - 8001672: 4919 ldr r1, [pc, #100] @ (80016d8 ) - 8001674: 6878 ldr r0, [r7, #4] - 8001676: f7ff f83b bl 80006f0 <__aeabi_fcmpgt> - 800167a: 4603 mov r3, r0 - 800167c: 2b00 cmp r3, #0 - 800167e: d002 beq.n 8001686 + 8001d62: 4919 ldr r1, [pc, #100] @ (8001dc8 ) + 8001d64: 6878 ldr r0, [r7, #4] + 8001d66: f7ff f859 bl 8000e1c <__aeabi_fcmpgt> + 8001d6a: 4603 mov r3, r0 + 8001d6c: 2b00 cmp r3, #0 + 8001d6e: d002 beq.n 8001d76 return ADS1015_PH_OUT_SCALE_MAX; - 8001680: f44f 5380 mov.w r3, #4096 @ 0x1000 - 8001684: e022 b.n 80016cc + 8001d70: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8001d74: e022 b.n 8001dbc // Converte o valor usando a fórmula: ((value - FLOAT_MIN) / (FLOAT_MAX - FLOAT_MIN)) * (UINT16_MAX - UINT16_MIN) + UINT16_MIN uint16_t result = (uint16_t)(((value - ADS1015_PH_FLOAT_SCALE_MIN) / (ADS1015_PH_FLOAT_SCALE_MAX - ADS1015_PH_FLOAT_SCALE_MIN)) * ((float)ADS1015_PH_OUT_SCALE_MAX - (float)ADS1015_PH_OUT_SCALE_MIN) + (float)ADS1015_PH_OUT_SCALE_MIN); - 8001686: 4913 ldr r1, [pc, #76] @ (80016d4 ) - 8001688: 6878 ldr r0, [r7, #4] - 800168a: f7fe fd6b bl 8000164 <__aeabi_fsub> - 800168e: 4603 mov r3, r0 - 8001690: 4912 ldr r1, [pc, #72] @ (80016dc ) - 8001692: 4618 mov r0, r3 - 8001694: f7fe ff24 bl 80004e0 <__aeabi_fdiv> - 8001698: 4603 mov r3, r0 - 800169a: f04f 418b mov.w r1, #1166016512 @ 0x45800000 - 800169e: 4618 mov r0, r3 - 80016a0: f7fe fe6a bl 8000378 <__aeabi_fmul> - 80016a4: 4603 mov r3, r0 - 80016a6: f04f 0100 mov.w r1, #0 - 80016aa: 4618 mov r0, r3 - 80016ac: f7fe fd5c bl 8000168 <__addsf3> - 80016b0: 4603 mov r3, r0 - 80016b2: 4618 mov r0, r3 - 80016b4: f7ff f83c bl 8000730 <__aeabi_f2uiz> - 80016b8: 4603 mov r3, r0 - 80016ba: 81fb strh r3, [r7, #14] + 8001d76: 4913 ldr r1, [pc, #76] @ (8001dc4 ) + 8001d78: 6878 ldr r0, [r7, #4] + 8001d7a: f7fe fd89 bl 8000890 <__aeabi_fsub> + 8001d7e: 4603 mov r3, r0 + 8001d80: 4912 ldr r1, [pc, #72] @ (8001dcc ) + 8001d82: 4618 mov r0, r3 + 8001d84: f7fe ff42 bl 8000c0c <__aeabi_fdiv> + 8001d88: 4603 mov r3, r0 + 8001d8a: f04f 418b mov.w r1, #1166016512 @ 0x45800000 + 8001d8e: 4618 mov r0, r3 + 8001d90: f7fe fe88 bl 8000aa4 <__aeabi_fmul> + 8001d94: 4603 mov r3, r0 + 8001d96: f04f 0100 mov.w r1, #0 + 8001d9a: 4618 mov r0, r3 + 8001d9c: f7fe fd7a bl 8000894 <__addsf3> + 8001da0: 4603 mov r3, r0 + 8001da2: 4618 mov r0, r3 + 8001da4: f7ff f85a bl 8000e5c <__aeabi_f2uiz> + 8001da8: 4603 mov r3, r0 + 8001daa: 81fb strh r3, [r7, #14] // Garante que o resultado não exceda o limite superior if (result > ADS1015_PH_OUT_SCALE_MAX) - 80016bc: 89fb ldrh r3, [r7, #14] - 80016be: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 80016c2: d902 bls.n 80016ca + 8001dac: 89fb ldrh r3, [r7, #14] + 8001dae: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8001db2: d902 bls.n 8001dba return (ADS1015_PH_OUT_SCALE_MAX); - 80016c4: f44f 5380 mov.w r3, #4096 @ 0x1000 - 80016c8: e000 b.n 80016cc + 8001db4: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8001db8: e000 b.n 8001dbc return result; - 80016ca: 89fb ldrh r3, [r7, #14] + 8001dba: 89fb ldrh r3, [r7, #14] } - 80016cc: 4618 mov r0, r3 - 80016ce: 3710 adds r7, #16 - 80016d0: 46bd mov sp, r7 - 80016d2: bd80 pop {r7, pc} - 80016d4: 447a0000 .word 0x447a0000 - 80016d8: 453b8000 .word 0x453b8000 - 80016dc: 44fa0000 .word 0x44fa0000 + 8001dbc: 4618 mov r0, r3 + 8001dbe: 3710 adds r7, #16 + 8001dc0: 46bd mov sp, r7 + 8001dc2: bd80 pop {r7, pc} + 8001dc4: 447a0000 .word 0x447a0000 + 8001dc8: 453b8000 .word 0x453b8000 + 8001dcc: 44fa0000 .word 0x44fa0000 -080016e0 : +08001dd0 : void ADS1015_Process_System(void) { - 80016e0: b580 push {r7, lr} - 80016e2: b082 sub sp, #8 - 80016e4: af00 add r7, sp, #0 + 8001dd0: b580 push {r7, lr} + 8001dd2: b082 sub sp, #8 + 8001dd4: af00 add r7, sp, #0 static uint32_t state_timer = 0; static uint32_t sample_count = 0; uint16_t config_reg = 0; - 80016e6: 2300 movs r3, #0 - 80016e8: 80fb strh r3, [r7, #6] + 8001dd6: 2300 movs r3, #0 + 8001dd8: 80fb strh r3, [r7, #6] switch (ads1015_state) - 80016ea: 4b3d ldr r3, [pc, #244] @ (80017e0 ) - 80016ec: 781b ldrb r3, [r3, #0] - 80016ee: b2db uxtb r3, r3 - 80016f0: 2b04 cmp r3, #4 - 80016f2: d870 bhi.n 80017d6 - 80016f4: a201 add r2, pc, #4 @ (adr r2, 80016fc ) - 80016f6: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 80016fa: bf00 nop - 80016fc: 08001711 .word 0x08001711 - 8001700: 0800171f .word 0x0800171f - 8001704: 0800173b .word 0x0800173b - 8001708: 08001765 .word 0x08001765 - 800170c: 080017bb .word 0x080017bb + 8001dda: 4b3d ldr r3, [pc, #244] @ (8001ed0 ) + 8001ddc: 781b ldrb r3, [r3, #0] + 8001dde: b2db uxtb r3, r3 + 8001de0: 2b04 cmp r3, #4 + 8001de2: d870 bhi.n 8001ec6 + 8001de4: a201 add r2, pc, #4 @ (adr r2, 8001dec ) + 8001de6: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8001dea: bf00 nop + 8001dec: 08001e01 .word 0x08001e01 + 8001df0: 08001e0f .word 0x08001e0f + 8001df4: 08001e2b .word 0x08001e2b + 8001df8: 08001e55 .word 0x08001e55 + 8001dfc: 08001eab .word 0x08001eab { case ADS1015_IDLE: sample_count = 0; - 8001710: 4b34 ldr r3, [pc, #208] @ (80017e4 ) - 8001712: 2200 movs r2, #0 - 8001714: 601a str r2, [r3, #0] + 8001e00: 4b34 ldr r3, [pc, #208] @ (8001ed4 ) + 8001e02: 2200 movs r2, #0 + 8001e04: 601a str r2, [r3, #0] ads1015_state = ADS1015_START_CONVERSION; - 8001716: 4b32 ldr r3, [pc, #200] @ (80017e0 ) - 8001718: 2201 movs r2, #1 - 800171a: 701a strb r2, [r3, #0] + 8001e06: 4b32 ldr r3, [pc, #200] @ (8001ed0 ) + 8001e08: 2201 movs r2, #1 + 8001e0a: 701a strb r2, [r3, #0] break; - 800171c: e05b b.n 80017d6 + 8001e0c: e05b b.n 8001ec6 case ADS1015_START_CONVERSION: state_timer = g_ms_counter; - 800171e: 4b32 ldr r3, [pc, #200] @ (80017e8 ) - 8001720: 681b ldr r3, [r3, #0] - 8001722: 4a32 ldr r2, [pc, #200] @ (80017ec ) - 8001724: 6013 str r3, [r2, #0] + 8001e0e: 4b32 ldr r3, [pc, #200] @ (8001ed8 ) + 8001e10: 681b ldr r3, [r3, #0] + 8001e12: 4a32 ldr r2, [pc, #200] @ (8001edc ) + 8001e14: 6013 str r3, [r2, #0] /* Escreve no Config Register (P[1:0]=01b) com OS=1 para * iniciar a conversão single-shot. O bit OS só tem efeito * quando o dispositivo está em power-down (seção 7.4.2.1) */ // Write config register to the ADC writeRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONFIG, ADS1015_CONFIG_START_SINGLE); - 8001726: f248 7203 movw r2, #34563 @ 0x8703 - 800172a: 2101 movs r1, #1 - 800172c: 4830 ldr r0, [pc, #192] @ (80017f0 ) - 800172e: f7ff ff2d bl 800158c + 8001e16: f248 7203 movw r2, #34563 @ 0x8703 + 8001e1a: 2101 movs r1, #1 + 8001e1c: 4830 ldr r0, [pc, #192] @ (8001ee0 ) + 8001e1e: f7ff ff2d bl 8001c7c ads1015_state = ADS1015_WAIT_CONVERSION; - 8001732: 4b2b ldr r3, [pc, #172] @ (80017e0 ) - 8001734: 2202 movs r2, #2 - 8001736: 701a strb r2, [r3, #0] + 8001e22: 4b2b ldr r3, [pc, #172] @ (8001ed0 ) + 8001e24: 2202 movs r2, #2 + 8001e26: 701a strb r2, [r3, #0] break; - 8001738: e04d b.n 80017d6 + 8001e28: e04d b.n 8001ec6 * 0b = dispositivo ainda convertendo * 1b = conversão concluída, dado pronto no Conversion Register * (Tabela 8-4, descrição do bit OS) */ config_reg = readRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONFIG); - 800173a: 2101 movs r1, #1 - 800173c: 482c ldr r0, [pc, #176] @ (80017f0 ) - 800173e: f7ff ff46 bl 80015ce - 8001742: 4603 mov r3, r0 - 8001744: 80fb strh r3, [r7, #6] + 8001e2a: 2101 movs r1, #1 + 8001e2c: 482c ldr r0, [pc, #176] @ (8001ee0 ) + 8001e2e: f7ff ff46 bl 8001cbe + 8001e32: 4603 mov r3, r0 + 8001e34: 80fb strh r3, [r7, #6] if (((config_reg & ADS1015_REG_CONFIG_OS_SINGLE) != 0) && (g_ms_counter - state_timer)>ADS1015_TIME_PER_SAMPLE) - 8001746: f9b7 3006 ldrsh.w r3, [r7, #6] - 800174a: 2b00 cmp r3, #0 - 800174c: da40 bge.n 80017d0 - 800174e: 4b26 ldr r3, [pc, #152] @ (80017e8 ) - 8001750: 681a ldr r2, [r3, #0] - 8001752: 4b26 ldr r3, [pc, #152] @ (80017ec ) - 8001754: 681b ldr r3, [r3, #0] - 8001756: 1ad3 subs r3, r2, r3 - 8001758: 2b09 cmp r3, #9 - 800175a: d939 bls.n 80017d0 + 8001e36: f9b7 3006 ldrsh.w r3, [r7, #6] + 8001e3a: 2b00 cmp r3, #0 + 8001e3c: da40 bge.n 8001ec0 + 8001e3e: 4b26 ldr r3, [pc, #152] @ (8001ed8 ) + 8001e40: 681a ldr r2, [r3, #0] + 8001e42: 4b26 ldr r3, [pc, #152] @ (8001edc ) + 8001e44: 681b ldr r3, [r3, #0] + 8001e46: 1ad3 subs r3, r2, r3 + 8001e48: 2b09 cmp r3, #9 + 8001e4a: d939 bls.n 8001ec0 { ads1015_state = ADS1015_READ_DATA; - 800175c: 4b20 ldr r3, [pc, #128] @ (80017e0 ) - 800175e: 2203 movs r2, #3 - 8001760: 701a strb r2, [r3, #0] + 8001e4c: 4b20 ldr r3, [pc, #128] @ (8001ed0 ) + 8001e4e: 2203 movs r2, #3 + 8001e50: 701a strb r2, [r3, #0] } // (opcional) tratar timeout comparando g_ms_counter - state_timer // Datasheet: conversão single-cycle, tempo = 1/DR (ex: 1600SPS ≈ 625µs) break; - 8001762: e035 b.n 80017d0 + 8001e52: e035 b.n 8001ec0 case ADS1015_READ_DATA: { /* Muda o Address Pointer para o Conversion Register (P[1:0]=00b) * e lê os 16 bits. Dado é 12 bits em complemento de 2, * left-justified em D[15:4]; D[3:0] sempre lê 0h (Tabela 8-3) */ int16_t raw = (int16_t)readRegister(&i2c_ads1015, ADS1015_REG_POINTER_CONVERT); - 8001764: 2100 movs r1, #0 - 8001766: 4822 ldr r0, [pc, #136] @ (80017f0 ) - 8001768: f7ff ff31 bl 80015ce - 800176c: 4603 mov r3, r0 - 800176e: 80bb strh r3, [r7, #4] + 8001e54: 2100 movs r1, #0 + 8001e56: 4822 ldr r0, [pc, #136] @ (8001ee0 ) + 8001e58: f7ff ff31 bl 8001cbe + 8001e5c: 4603 mov r3, r0 + 8001e5e: 80bb strh r3, [r7, #4] raw >>= 4; // remove os 4 bits reservados (D[3:0]), resultado = 12 bits signed - 8001770: f9b7 3004 ldrsh.w r3, [r7, #4] - 8001774: 111b asrs r3, r3, #4 - 8001776: 80bb strh r3, [r7, #4] + 8001e60: f9b7 3004 ldrsh.w r3, [r7, #4] + 8001e64: 111b asrs r3, r3, #4 + 8001e66: 80bb strh r3, [r7, #4] float value = (float)(2048 - raw); // ((float)raw * ADS1015_ADC_VREF) / ADS1015_ADC_MAX; // usa FSR configurado no PGA - 8001778: f9b7 3004 ldrsh.w r3, [r7, #4] - 800177c: f5c3 6300 rsb r3, r3, #2048 @ 0x800 - 8001780: 4618 mov r0, r3 - 8001782: f7fe fda5 bl 80002d0 <__aeabi_i2f> - 8001786: 4603 mov r3, r0 - 8001788: 603b str r3, [r7, #0] + 8001e68: f9b7 3004 ldrsh.w r3, [r7, #4] + 8001e6c: f5c3 6300 rsb r3, r3, #2048 @ 0x800 + 8001e70: 4618 mov r0, r3 + 8001e72: f7fe fdc3 bl 80009fc <__aeabi_i2f> + 8001e76: 4603 mov r3, r0 + 8001e78: 603b str r3, [r7, #0] ADS1015_pH_NewSample(value); - 800178a: 6838 ldr r0, [r7, #0] - 800178c: f000 f98c bl 8001aa8 + 8001e7a: 6838 ldr r0, [r7, #0] + 8001e7c: f000 f988 bl 8002190 sample_count++; - 8001790: 4b14 ldr r3, [pc, #80] @ (80017e4 ) - 8001792: 681b ldr r3, [r3, #0] - 8001794: 3301 adds r3, #1 - 8001796: 4a13 ldr r2, [pc, #76] @ (80017e4 ) - 8001798: 6013 str r3, [r2, #0] + 8001e80: 4b14 ldr r3, [pc, #80] @ (8001ed4 ) + 8001e82: 681b ldr r3, [r3, #0] + 8001e84: 3301 adds r3, #1 + 8001e86: 4a13 ldr r2, [pc, #76] @ (8001ed4 ) + 8001e88: 6013 str r3, [r2, #0] if (sample_count >= ADS1015_BURST_SIZE) - 800179a: 4b12 ldr r3, [pc, #72] @ (80017e4 ) - 800179c: 681b ldr r3, [r3, #0] - 800179e: 2b04 cmp r3, #4 - 80017a0: d903 bls.n 80017aa + 8001e8a: 4b12 ldr r3, [pc, #72] @ (8001ed4 ) + 8001e8c: 681b ldr r3, [r3, #0] + 8001e8e: 2b00 cmp r3, #0 + 8001e90: d003 beq.n 8001e9a { ads1015_state = ADS1015_IDLE; - 80017a2: 4b0f ldr r3, [pc, #60] @ (80017e0 ) - 80017a4: 2200 movs r2, #0 - 80017a6: 701a strb r2, [r3, #0] + 8001e92: 4b0f ldr r3, [pc, #60] @ (8001ed0 ) + 8001e94: 2200 movs r2, #0 + 8001e96: 701a strb r2, [r3, #0] { state_timer = g_ms_counter; ads1015_state = ADS1015_WAIT_NEXT_SAMPLE; } } break; - 80017a8: e015 b.n 80017d6 + 8001e98: e015 b.n 8001ec6 state_timer = g_ms_counter; - 80017aa: 4b0f ldr r3, [pc, #60] @ (80017e8 ) - 80017ac: 681b ldr r3, [r3, #0] - 80017ae: 4a0f ldr r2, [pc, #60] @ (80017ec ) - 80017b0: 6013 str r3, [r2, #0] + 8001e9a: 4b0f ldr r3, [pc, #60] @ (8001ed8 ) + 8001e9c: 681b ldr r3, [r3, #0] + 8001e9e: 4a0f ldr r2, [pc, #60] @ (8001edc ) + 8001ea0: 6013 str r3, [r2, #0] ads1015_state = ADS1015_WAIT_NEXT_SAMPLE; - 80017b2: 4b0b ldr r3, [pc, #44] @ (80017e0 ) - 80017b4: 2204 movs r2, #4 - 80017b6: 701a strb r2, [r3, #0] + 8001ea2: 4b0b ldr r3, [pc, #44] @ (8001ed0 ) + 8001ea4: 2204 movs r2, #4 + 8001ea6: 701a strb r2, [r3, #0] break; - 80017b8: e00d b.n 80017d6 + 8001ea8: e00d b.n 8001ec6 case ADS1015_WAIT_NEXT_SAMPLE: if ((g_ms_counter - state_timer) >= ADS1015_TIME_PER_SAMPLE) - 80017ba: 4b0b ldr r3, [pc, #44] @ (80017e8 ) - 80017bc: 681a ldr r2, [r3, #0] - 80017be: 4b0b ldr r3, [pc, #44] @ (80017ec ) - 80017c0: 681b ldr r3, [r3, #0] - 80017c2: 1ad3 subs r3, r2, r3 - 80017c4: 2b08 cmp r3, #8 - 80017c6: d905 bls.n 80017d4 + 8001eaa: 4b0b ldr r3, [pc, #44] @ (8001ed8 ) + 8001eac: 681a ldr r2, [r3, #0] + 8001eae: 4b0b ldr r3, [pc, #44] @ (8001edc ) + 8001eb0: 681b ldr r3, [r3, #0] + 8001eb2: 1ad3 subs r3, r2, r3 + 8001eb4: 2b08 cmp r3, #8 + 8001eb6: d905 bls.n 8001ec4 { ads1015_state = ADS1015_START_CONVERSION; - 80017c8: 4b05 ldr r3, [pc, #20] @ (80017e0 ) - 80017ca: 2201 movs r2, #1 - 80017cc: 701a strb r2, [r3, #0] + 8001eb8: 4b05 ldr r3, [pc, #20] @ (8001ed0 ) + 8001eba: 2201 movs r2, #1 + 8001ebc: 701a strb r2, [r3, #0] } break; - 80017ce: e001 b.n 80017d4 + 8001ebe: e001 b.n 8001ec4 break; - 80017d0: bf00 nop - 80017d2: e000 b.n 80017d6 + 8001ec0: bf00 nop + 8001ec2: e000 b.n 8001ec6 break; - 80017d4: bf00 nop + 8001ec4: bf00 nop } } - 80017d6: bf00 nop - 80017d8: 3708 adds r7, #8 - 80017da: 46bd mov sp, r7 - 80017dc: bd80 pop {r7, pc} - 80017de: bf00 nop - 80017e0: 2000041c .word 0x2000041c - 80017e4: 20000420 .word 0x20000420 - 80017e8: 20000084 .word 0x20000084 - 80017ec: 20000424 .word 0x20000424 - 80017f0: 200003cc .word 0x200003cc + 8001ec6: bf00 nop + 8001ec8: 3708 adds r7, #8 + 8001eca: 46bd mov sp, r7 + 8001ecc: bd80 pop {r7, pc} + 8001ece: bf00 nop + 8001ed0: 200003dc .word 0x200003dc + 8001ed4: 200003e0 .word 0x200003e0 + 8001ed8: 20000084 .word 0x20000084 + 8001edc: 200003e4 .word 0x200003e4 + 8001ee0: 20000370 .word 0x20000370 -080017f4 : +08001ee4 : /** * Simple insertion sort - BURST_SIZE is small, so the cost is negligible * and it avoids depending on qsort/heap allocation. **/ void ADS1015_Sort_Array(float *v, uint8_t n) { - 80017f4: b580 push {r7, lr} - 80017f6: b084 sub sp, #16 - 80017f8: af00 add r7, sp, #0 - 80017fa: 6078 str r0, [r7, #4] - 80017fc: 460b mov r3, r1 - 80017fe: 70fb strb r3, [r7, #3] + 8001ee4: b580 push {r7, lr} + 8001ee6: b084 sub sp, #16 + 8001ee8: af00 add r7, sp, #0 + 8001eea: 6078 str r0, [r7, #4] + 8001eec: 460b mov r3, r1 + 8001eee: 70fb strb r3, [r7, #3] for (uint8_t i = 1; i < n; i++) - 8001800: 2301 movs r3, #1 - 8001802: 73fb strb r3, [r7, #15] - 8001804: e039 b.n 800187a + 8001ef0: 2301 movs r3, #1 + 8001ef2: 73fb strb r3, [r7, #15] + 8001ef4: e039 b.n 8001f6a { float key = v[i]; - 8001806: 7bfb ldrb r3, [r7, #15] - 8001808: 009b lsls r3, r3, #2 - 800180a: 687a ldr r2, [r7, #4] - 800180c: 4413 add r3, r2 - 800180e: 681b ldr r3, [r3, #0] - 8001810: 60bb str r3, [r7, #8] + 8001ef6: 7bfb ldrb r3, [r7, #15] + 8001ef8: 009b lsls r3, r3, #2 + 8001efa: 687a ldr r2, [r7, #4] + 8001efc: 4413 add r3, r2 + 8001efe: 681b ldr r3, [r3, #0] + 8001f00: 60bb str r3, [r7, #8] int8_t j = (int8_t)i - 1; - 8001812: 7bfb ldrb r3, [r7, #15] - 8001814: 3b01 subs r3, #1 - 8001816: b2db uxtb r3, r3 - 8001818: 73bb strb r3, [r7, #14] + 8001f02: 7bfb ldrb r3, [r7, #15] + 8001f04: 3b01 subs r3, #1 + 8001f06: b2db uxtb r3, r3 + 8001f08: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 800181a: e012 b.n 8001842 + 8001f0a: e012 b.n 8001f32 { v[j + 1] = v[j]; - 800181c: f997 300e ldrsb.w r3, [r7, #14] - 8001820: 009b lsls r3, r3, #2 - 8001822: 687a ldr r2, [r7, #4] - 8001824: 441a add r2, r3 - 8001826: f997 300e ldrsb.w r3, [r7, #14] - 800182a: 3301 adds r3, #1 - 800182c: 009b lsls r3, r3, #2 - 800182e: 6879 ldr r1, [r7, #4] - 8001830: 440b add r3, r1 - 8001832: 6812 ldr r2, [r2, #0] - 8001834: 601a str r2, [r3, #0] + 8001f0c: f997 300e ldrsb.w r3, [r7, #14] + 8001f10: 009b lsls r3, r3, #2 + 8001f12: 687a ldr r2, [r7, #4] + 8001f14: 441a add r2, r3 + 8001f16: f997 300e ldrsb.w r3, [r7, #14] + 8001f1a: 3301 adds r3, #1 + 8001f1c: 009b lsls r3, r3, #2 + 8001f1e: 6879 ldr r1, [r7, #4] + 8001f20: 440b add r3, r1 + 8001f22: 6812 ldr r2, [r2, #0] + 8001f24: 601a str r2, [r3, #0] j--; - 8001836: f997 300e ldrsb.w r3, [r7, #14] - 800183a: b2db uxtb r3, r3 - 800183c: 3b01 subs r3, #1 - 800183e: b2db uxtb r3, r3 - 8001840: 73bb strb r3, [r7, #14] + 8001f26: f997 300e ldrsb.w r3, [r7, #14] + 8001f2a: b2db uxtb r3, r3 + 8001f2c: 3b01 subs r3, #1 + 8001f2e: b2db uxtb r3, r3 + 8001f30: 73bb strb r3, [r7, #14] while (j >= 0 && v[j] > key) - 8001842: f997 300e ldrsb.w r3, [r7, #14] - 8001846: 2b00 cmp r3, #0 - 8001848: db0c blt.n 8001864 - 800184a: f997 300e ldrsb.w r3, [r7, #14] - 800184e: 009b lsls r3, r3, #2 - 8001850: 687a ldr r2, [r7, #4] - 8001852: 4413 add r3, r2 - 8001854: 681b ldr r3, [r3, #0] - 8001856: 4619 mov r1, r3 - 8001858: 68b8 ldr r0, [r7, #8] - 800185a: f7fe ff2b bl 80006b4 <__aeabi_fcmplt> - 800185e: 4603 mov r3, r0 - 8001860: 2b00 cmp r3, #0 - 8001862: d1db bne.n 800181c + 8001f32: f997 300e ldrsb.w r3, [r7, #14] + 8001f36: 2b00 cmp r3, #0 + 8001f38: db0c blt.n 8001f54 + 8001f3a: f997 300e ldrsb.w r3, [r7, #14] + 8001f3e: 009b lsls r3, r3, #2 + 8001f40: 687a ldr r2, [r7, #4] + 8001f42: 4413 add r3, r2 + 8001f44: 681b ldr r3, [r3, #0] + 8001f46: 4619 mov r1, r3 + 8001f48: 68b8 ldr r0, [r7, #8] + 8001f4a: f7fe ff49 bl 8000de0 <__aeabi_fcmplt> + 8001f4e: 4603 mov r3, r0 + 8001f50: 2b00 cmp r3, #0 + 8001f52: d1db bne.n 8001f0c } v[j + 1] = key; - 8001864: f997 300e ldrsb.w r3, [r7, #14] - 8001868: 3301 adds r3, #1 - 800186a: 009b lsls r3, r3, #2 - 800186c: 687a ldr r2, [r7, #4] - 800186e: 4413 add r3, r2 - 8001870: 68ba ldr r2, [r7, #8] - 8001872: 601a str r2, [r3, #0] + 8001f54: f997 300e ldrsb.w r3, [r7, #14] + 8001f58: 3301 adds r3, #1 + 8001f5a: 009b lsls r3, r3, #2 + 8001f5c: 687a ldr r2, [r7, #4] + 8001f5e: 4413 add r3, r2 + 8001f60: 68ba ldr r2, [r7, #8] + 8001f62: 601a str r2, [r3, #0] for (uint8_t i = 1; i < n; i++) - 8001874: 7bfb ldrb r3, [r7, #15] - 8001876: 3301 adds r3, #1 - 8001878: 73fb strb r3, [r7, #15] - 800187a: 7bfa ldrb r2, [r7, #15] - 800187c: 78fb ldrb r3, [r7, #3] - 800187e: 429a cmp r2, r3 - 8001880: d3c1 bcc.n 8001806 + 8001f64: 7bfb ldrb r3, [r7, #15] + 8001f66: 3301 adds r3, #1 + 8001f68: 73fb strb r3, [r7, #15] + 8001f6a: 7bfa ldrb r2, [r7, #15] + 8001f6c: 78fb ldrb r3, [r7, #3] + 8001f6e: 429a cmp r2, r3 + 8001f70: d3c1 bcc.n 8001ef6 } } - 8001882: bf00 nop - 8001884: bf00 nop - 8001886: 3710 adds r7, #16 - 8001888: 46bd mov sp, r7 - 800188a: bd80 pop {r7, pc} + 8001f72: bf00 nop + 8001f74: bf00 nop + 8001f76: 3710 adds r7, #16 + 8001f78: 46bd mov sp, r7 + 8001f7a: bd80 pop {r7, pc} -0800188c : +08001f7c : * original order is not needed), discards TRIM_COUNT values from each * end, and averages the remainder. Sorting in place avoids a temporary * array and removes the need for memcpy()/string.h entirely. **/ float ADS1015_Trimmed_Mean(float *buffer, uint8_t n, uint8_t trim) { - 800188c: b580 push {r7, lr} - 800188e: b086 sub sp, #24 - 8001890: af00 add r7, sp, #0 - 8001892: 6078 str r0, [r7, #4] - 8001894: 460b mov r3, r1 - 8001896: 70fb strb r3, [r7, #3] - 8001898: 4613 mov r3, r2 - 800189a: 70bb strb r3, [r7, #2] + 8001f7c: b580 push {r7, lr} + 8001f7e: b086 sub sp, #24 + 8001f80: af00 add r7, sp, #0 + 8001f82: 6078 str r0, [r7, #4] + 8001f84: 460b mov r3, r1 + 8001f86: 70fb strb r3, [r7, #3] + 8001f88: 4613 mov r3, r2 + 8001f8a: 70bb strb r3, [r7, #2] ADS1015_Sort_Array(buffer, n); - 800189c: 78fb ldrb r3, [r7, #3] - 800189e: 4619 mov r1, r3 - 80018a0: 6878 ldr r0, [r7, #4] - 80018a2: f7ff ffa7 bl 80017f4 + 8001f8c: 78fb ldrb r3, [r7, #3] + 8001f8e: 4619 mov r1, r3 + 8001f90: 6878 ldr r0, [r7, #4] + 8001f92: f7ff ffa7 bl 8001ee4 uint8_t start = trim; - 80018a6: 78bb ldrb r3, [r7, #2] - 80018a8: 75fb strb r3, [r7, #23] + 8001f96: 78bb ldrb r3, [r7, #2] + 8001f98: 75fb strb r3, [r7, #23] uint8_t end = n - trim; /* exclusive */ - 80018aa: 78fa ldrb r2, [r7, #3] - 80018ac: 78bb ldrb r3, [r7, #2] - 80018ae: 1ad3 subs r3, r2, r3 - 80018b0: 75bb strb r3, [r7, #22] + 8001f9a: 78fa ldrb r2, [r7, #3] + 8001f9c: 78bb ldrb r3, [r7, #2] + 8001f9e: 1ad3 subs r3, r2, r3 + 8001fa0: 75bb strb r3, [r7, #22] if (end <= start) /* guard against a misconfigured trim value */ - 80018b2: 7dba ldrb r2, [r7, #22] - 80018b4: 7dfb ldrb r3, [r7, #23] - 80018b6: 429a cmp r2, r3 - 80018b8: d803 bhi.n 80018c2 + 8001fa2: 7dba ldrb r2, [r7, #22] + 8001fa4: 7dfb ldrb r3, [r7, #23] + 8001fa6: 429a cmp r2, r3 + 8001fa8: d803 bhi.n 8001fb2 { start = 0; - 80018ba: 2300 movs r3, #0 - 80018bc: 75fb strb r3, [r7, #23] + 8001faa: 2300 movs r3, #0 + 8001fac: 75fb strb r3, [r7, #23] end = n; - 80018be: 78fb ldrb r3, [r7, #3] - 80018c0: 75bb strb r3, [r7, #22] + 8001fae: 78fb ldrb r3, [r7, #3] + 8001fb0: 75bb strb r3, [r7, #22] } float sum = 0.0f; - 80018c2: f04f 0300 mov.w r3, #0 - 80018c6: 613b str r3, [r7, #16] + 8001fb2: f04f 0300 mov.w r3, #0 + 8001fb6: 613b str r3, [r7, #16] uint8_t count = 0; - 80018c8: 2300 movs r3, #0 - 80018ca: 73fb strb r3, [r7, #15] + 8001fb8: 2300 movs r3, #0 + 8001fba: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 80018cc: 7dfb ldrb r3, [r7, #23] - 80018ce: 73bb strb r3, [r7, #14] - 80018d0: e010 b.n 80018f4 + 8001fbc: 7dfb ldrb r3, [r7, #23] + 8001fbe: 73bb strb r3, [r7, #14] + 8001fc0: e010 b.n 8001fe4 { sum += buffer[i]; - 80018d2: 7bbb ldrb r3, [r7, #14] - 80018d4: 009b lsls r3, r3, #2 - 80018d6: 687a ldr r2, [r7, #4] - 80018d8: 4413 add r3, r2 - 80018da: 681b ldr r3, [r3, #0] - 80018dc: 4619 mov r1, r3 - 80018de: 6938 ldr r0, [r7, #16] - 80018e0: f7fe fc42 bl 8000168 <__addsf3> - 80018e4: 4603 mov r3, r0 - 80018e6: 613b str r3, [r7, #16] + 8001fc2: 7bbb ldrb r3, [r7, #14] + 8001fc4: 009b lsls r3, r3, #2 + 8001fc6: 687a ldr r2, [r7, #4] + 8001fc8: 4413 add r3, r2 + 8001fca: 681b ldr r3, [r3, #0] + 8001fcc: 4619 mov r1, r3 + 8001fce: 6938 ldr r0, [r7, #16] + 8001fd0: f7fe fc60 bl 8000894 <__addsf3> + 8001fd4: 4603 mov r3, r0 + 8001fd6: 613b str r3, [r7, #16] count++; - 80018e8: 7bfb ldrb r3, [r7, #15] - 80018ea: 3301 adds r3, #1 - 80018ec: 73fb strb r3, [r7, #15] + 8001fd8: 7bfb ldrb r3, [r7, #15] + 8001fda: 3301 adds r3, #1 + 8001fdc: 73fb strb r3, [r7, #15] for (uint8_t i = start; i < end; i++) - 80018ee: 7bbb ldrb r3, [r7, #14] - 80018f0: 3301 adds r3, #1 - 80018f2: 73bb strb r3, [r7, #14] - 80018f4: 7bba ldrb r2, [r7, #14] - 80018f6: 7dbb ldrb r3, [r7, #22] - 80018f8: 429a cmp r2, r3 - 80018fa: d3ea bcc.n 80018d2 + 8001fde: 7bbb ldrb r3, [r7, #14] + 8001fe0: 3301 adds r3, #1 + 8001fe2: 73bb strb r3, [r7, #14] + 8001fe4: 7bba ldrb r2, [r7, #14] + 8001fe6: 7dbb ldrb r3, [r7, #22] + 8001fe8: 429a cmp r2, r3 + 8001fea: d3ea bcc.n 8001fc2 } return sum / (float)count; - 80018fc: 7bfb ldrb r3, [r7, #15] - 80018fe: 4618 mov r0, r3 - 8001900: f7fe fce2 bl 80002c8 <__aeabi_ui2f> - 8001904: 4603 mov r3, r0 - 8001906: 4619 mov r1, r3 - 8001908: 6938 ldr r0, [r7, #16] - 800190a: f7fe fde9 bl 80004e0 <__aeabi_fdiv> - 800190e: 4603 mov r3, r0 + 8001fec: 7bfb ldrb r3, [r7, #15] + 8001fee: 4618 mov r0, r3 + 8001ff0: f7fe fd00 bl 80009f4 <__aeabi_ui2f> + 8001ff4: 4603 mov r3, r0 + 8001ff6: 4619 mov r1, r3 + 8001ff8: 6938 ldr r0, [r7, #16] + 8001ffa: f7fe fe07 bl 8000c0c <__aeabi_fdiv> + 8001ffe: 4603 mov r3, r0 } - 8001910: 4618 mov r0, r3 - 8001912: 3718 adds r7, #24 - 8001914: 46bd mov sp, r7 - 8001916: bd80 pop {r7, pc} + 8002000: 4618 mov r0, r3 + 8002002: 3718 adds r7, #24 + 8002004: 46bd mov sp, r7 + 8002006: bd80 pop {r7, pc} -08001918 : +08002008 : /* * Simple average of the history buffer (stage-2 sliding window) */ float ADS1015_History_Average(const float *hist, uint8_t n) { - 8001918: b580 push {r7, lr} - 800191a: b084 sub sp, #16 - 800191c: af00 add r7, sp, #0 - 800191e: 6078 str r0, [r7, #4] - 8001920: 460b mov r3, r1 - 8001922: 70fb strb r3, [r7, #3] + 8002008: b580 push {r7, lr} + 800200a: b084 sub sp, #16 + 800200c: af00 add r7, sp, #0 + 800200e: 6078 str r0, [r7, #4] + 8002010: 460b mov r3, r1 + 8002012: 70fb strb r3, [r7, #3] float sum = 0.0f; - 8001924: f04f 0300 mov.w r3, #0 - 8001928: 60fb str r3, [r7, #12] + 8002014: f04f 0300 mov.w r3, #0 + 8002018: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 800192a: 2300 movs r3, #0 - 800192c: 72fb strb r3, [r7, #11] - 800192e: e00d b.n 800194c + 800201a: 2300 movs r3, #0 + 800201c: 72fb strb r3, [r7, #11] + 800201e: e00d b.n 800203c sum += hist[i]; - 8001930: 7afb ldrb r3, [r7, #11] - 8001932: 009b lsls r3, r3, #2 - 8001934: 687a ldr r2, [r7, #4] - 8001936: 4413 add r3, r2 - 8001938: 681b ldr r3, [r3, #0] - 800193a: 4619 mov r1, r3 - 800193c: 68f8 ldr r0, [r7, #12] - 800193e: f7fe fc13 bl 8000168 <__addsf3> - 8001942: 4603 mov r3, r0 - 8001944: 60fb str r3, [r7, #12] + 8002020: 7afb ldrb r3, [r7, #11] + 8002022: 009b lsls r3, r3, #2 + 8002024: 687a ldr r2, [r7, #4] + 8002026: 4413 add r3, r2 + 8002028: 681b ldr r3, [r3, #0] + 800202a: 4619 mov r1, r3 + 800202c: 68f8 ldr r0, [r7, #12] + 800202e: f7fe fc31 bl 8000894 <__addsf3> + 8002032: 4603 mov r3, r0 + 8002034: 60fb str r3, [r7, #12] for (uint8_t i = 0; i < n; i++) - 8001946: 7afb ldrb r3, [r7, #11] - 8001948: 3301 adds r3, #1 - 800194a: 72fb strb r3, [r7, #11] - 800194c: 7afa ldrb r2, [r7, #11] - 800194e: 78fb ldrb r3, [r7, #3] - 8001950: 429a cmp r2, r3 - 8001952: d3ed bcc.n 8001930 + 8002036: 7afb ldrb r3, [r7, #11] + 8002038: 3301 adds r3, #1 + 800203a: 72fb strb r3, [r7, #11] + 800203c: 7afa ldrb r2, [r7, #11] + 800203e: 78fb ldrb r3, [r7, #3] + 8002040: 429a cmp r2, r3 + 8002042: d3ed bcc.n 8002020 return sum / (float)n; - 8001954: 78fb ldrb r3, [r7, #3] - 8001956: 4618 mov r0, r3 - 8001958: f7fe fcb6 bl 80002c8 <__aeabi_ui2f> - 800195c: 4603 mov r3, r0 - 800195e: 4619 mov r1, r3 - 8001960: 68f8 ldr r0, [r7, #12] - 8001962: f7fe fdbd bl 80004e0 <__aeabi_fdiv> - 8001966: 4603 mov r3, r0 + 8002044: 78fb ldrb r3, [r7, #3] + 8002046: 4618 mov r0, r3 + 8002048: f7fe fcd4 bl 80009f4 <__aeabi_ui2f> + 800204c: 4603 mov r3, r0 + 800204e: 4619 mov r1, r3 + 8002050: 68f8 ldr r0, [r7, #12] + 8002052: f7fe fddb bl 8000c0c <__aeabi_fdiv> + 8002056: 4603 mov r3, r0 } - 8001968: 4618 mov r0, r3 - 800196a: 3710 adds r7, #16 - 800196c: 46bd mov sp, r7 - 800196e: bd80 pop {r7, pc} + 8002058: 4618 mov r0, r3 + 800205a: 3710 adds r7, #16 + 800205c: 46bd mov sp, r7 + 800205e: bd80 pop {r7, pc} -08001970 : +08002060 : * Common processing core: applied identically to all 3 channels. * Receives the current raw reading and the channel's state (global * arrays/struct). **/ void ADS1015_Process_Sample(ADS1015_filter_t *ch, float raw) { - 8001970: b590 push {r4, r7, lr} - 8001972: b085 sub sp, #20 - 8001974: af00 add r7, sp, #0 - 8001976: 6078 str r0, [r7, #4] - 8001978: 6039 str r1, [r7, #0] + 8002060: b590 push {r4, r7, lr} + 8002062: b085 sub sp, #20 + 8002064: af00 add r7, sp, #0 + 8002066: 6078 str r0, [r7, #4] + 8002068: 6039 str r1, [r7, #0] /* --- Stage 1: accumulate into the current burst --- */ ch->burst[ch->burst_index] = raw; - 800197a: 687b ldr r3, [r7, #4] - 800197c: 7d1b ldrb r3, [r3, #20] - 800197e: 4619 mov r1, r3 - 8001980: 687b ldr r3, [r7, #4] - 8001982: 683a ldr r2, [r7, #0] - 8001984: f843 2021 str.w r2, [r3, r1, lsl #2] + 800206a: 687b ldr r3, [r7, #4] + 800206c: 791b ldrb r3, [r3, #4] + 800206e: 4619 mov r1, r3 + 8002070: 687b ldr r3, [r7, #4] + 8002072: 683a ldr r2, [r7, #0] + 8002074: f843 2021 str.w r2, [r3, r1, lsl #2] ch->burst_index++; - 8001988: 687b ldr r3, [r7, #4] - 800198a: 7d1b ldrb r3, [r3, #20] - 800198c: 3301 adds r3, #1 - 800198e: b2da uxtb r2, r3 - 8001990: 687b ldr r3, [r7, #4] - 8001992: 751a strb r2, [r3, #20] + 8002078: 687b ldr r3, [r7, #4] + 800207a: 791b ldrb r3, [r3, #4] + 800207c: 3301 adds r3, #1 + 800207e: b2da uxtb r2, r3 + 8002080: 687b ldr r3, [r7, #4] + 8002082: 711a strb r2, [r3, #4] if (ch->burst_index < ADS1015_BURST_SIZE) - 8001994: 687b ldr r3, [r7, #4] - 8001996: 7d1b ldrb r3, [r3, #20] - 8001998: 2b04 cmp r3, #4 - 800199a: d97a bls.n 8001a92 + 8002084: 687b ldr r3, [r7, #4] + 8002086: 791b ldrb r3, [r3, #4] + 8002088: 2b00 cmp r3, #0 + 800208a: d075 beq.n 8002178 return; /* still collecting the burst, nothing else to do */ /* Burst complete: compute the trimmed mean */ float burst_result = ADS1015_Trimmed_Mean(ch->burst, ADS1015_BURST_SIZE, ADS1015_TRIM_COUNT); - 800199c: 687b ldr r3, [r7, #4] - 800199e: 2201 movs r2, #1 - 80019a0: 2105 movs r1, #5 - 80019a2: 4618 mov r0, r3 - 80019a4: f7ff ff72 bl 800188c - 80019a8: 60f8 str r0, [r7, #12] + 800208c: 687b ldr r3, [r7, #4] + 800208e: 2200 movs r2, #0 + 8002090: 2101 movs r1, #1 + 8002092: 4618 mov r0, r3 + 8002094: f7ff ff72 bl 8001f7c + 8002098: 60f8 str r0, [r7, #12] ch->burst_index = 0; /* reset for the next burst */ - 80019aa: 687b ldr r3, [r7, #4] - 80019ac: 2200 movs r2, #0 - 80019ae: 751a strb r2, [r3, #20] + 800209a: 687b ldr r3, [r7, #4] + 800209c: 2200 movs r2, #0 + 800209e: 711a strb r2, [r3, #4] /* --- Stage 2a: rolling history / sliding window --- */ ch->history[ch->history_index] = burst_result; - 80019b0: 687b ldr r3, [r7, #4] - 80019b2: f893 302c ldrb.w r3, [r3, #44] @ 0x2c - 80019b6: 461a mov r2, r3 - 80019b8: 687b ldr r3, [r7, #4] - 80019ba: 3206 adds r2, #6 - 80019bc: 68f9 ldr r1, [r7, #12] - 80019be: f843 1022 str.w r1, [r3, r2, lsl #2] + 80020a0: 687b ldr r3, [r7, #4] + 80020a2: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 + 80020a6: 461a mov r2, r3 + 80020a8: 687b ldr r3, [r7, #4] + 80020aa: 3202 adds r2, #2 + 80020ac: 68f9 ldr r1, [r7, #12] + 80020ae: f843 1022 str.w r1, [r3, r2, lsl #2] ch->history_index = (uint8_t)((ch->history_index + 1) % ADS1015_HISTORY_SIZE); - 80019c2: 687b ldr r3, [r7, #4] - 80019c4: f893 302c ldrb.w r3, [r3, #44] @ 0x2c - 80019c8: 1c5a adds r2, r3, #1 - 80019ca: 4b34 ldr r3, [pc, #208] @ (8001a9c ) - 80019cc: fb83 1302 smull r1, r3, r3, r2 - 80019d0: 1059 asrs r1, r3, #1 - 80019d2: 17d3 asrs r3, r2, #31 - 80019d4: 1ac9 subs r1, r1, r3 - 80019d6: 460b mov r3, r1 - 80019d8: 009b lsls r3, r3, #2 - 80019da: 440b add r3, r1 - 80019dc: 1ad1 subs r1, r2, r3 - 80019de: b2ca uxtb r2, r1 - 80019e0: 687b ldr r3, [r7, #4] - 80019e2: f883 202c strb.w r2, [r3, #44] @ 0x2c + 80020b2: 687b ldr r3, [r7, #4] + 80020b4: f893 3048 ldrb.w r3, [r3, #72] @ 0x48 + 80020b8: 3301 adds r3, #1 + 80020ba: 425a negs r2, r3 + 80020bc: f003 030f and.w r3, r3, #15 + 80020c0: f002 020f and.w r2, r2, #15 + 80020c4: bf58 it pl + 80020c6: 4253 negpl r3, r2 + 80020c8: b2da uxtb r2, r3 + 80020ca: 687b ldr r3, [r7, #4] + 80020cc: f883 2048 strb.w r2, [r3, #72] @ 0x48 if (ch->history_count < ADS1015_HISTORY_SIZE) - 80019e6: 687b ldr r3, [r7, #4] - 80019e8: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 80019ec: 2b04 cmp r3, #4 - 80019ee: d807 bhi.n 8001a00 + 80020d0: 687b ldr r3, [r7, #4] + 80020d2: f893 3049 ldrb.w r3, [r3, #73] @ 0x49 + 80020d6: 2b0f cmp r3, #15 + 80020d8: d807 bhi.n 80020ea ch->history_count++; - 80019f0: 687b ldr r3, [r7, #4] - 80019f2: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 80019f6: 3301 adds r3, #1 - 80019f8: b2da uxtb r2, r3 - 80019fa: 687b ldr r3, [r7, #4] - 80019fc: f883 202d strb.w r2, [r3, #45] @ 0x2d + 80020da: 687b ldr r3, [r7, #4] + 80020dc: f893 3049 ldrb.w r3, [r3, #73] @ 0x49 + 80020e0: 3301 adds r3, #1 + 80020e2: b2da uxtb r2, r3 + 80020e4: 687b ldr r3, [r7, #4] + 80020e6: f883 2049 strb.w r2, [r3, #73] @ 0x49 float window_average = ADS1015_History_Average(ch->history, ch->history_count); - 8001a00: 687b ldr r3, [r7, #4] - 8001a02: f103 0218 add.w r2, r3, #24 - 8001a06: 687b ldr r3, [r7, #4] - 8001a08: f893 302d ldrb.w r3, [r3, #45] @ 0x2d - 8001a0c: 4619 mov r1, r3 - 8001a0e: 4610 mov r0, r2 - 8001a10: f7ff ff82 bl 8001918 - 8001a14: 60b8 str r0, [r7, #8] + 80020ea: 687b ldr r3, [r7, #4] + 80020ec: f103 0208 add.w r2, r3, #8 + 80020f0: 687b ldr r3, [r7, #4] + 80020f2: f893 3049 ldrb.w r3, [r3, #73] @ 0x49 + 80020f6: 4619 mov r1, r3 + 80020f8: 4610 mov r0, r2 + 80020fa: f7ff ff85 bl 8002008 + 80020fe: 60b8 str r0, [r7, #8] /* --- Stage 2b: first-order IIR low-pass filter on the burst result --- */ if (!ch->iir_initialized) - 8001a16: 687b ldr r3, [r7, #4] - 8001a18: f893 3034 ldrb.w r3, [r3, #52] @ 0x34 - 8001a1c: 2b00 cmp r3, #0 - 8001a1e: d107 bne.n 8001a30 + 8002100: 687b ldr r3, [r7, #4] + 8002102: f893 3050 ldrb.w r3, [r3, #80] @ 0x50 + 8002106: 2b00 cmp r3, #0 + 8002108: d107 bne.n 800211a { ch->iir_state = burst_result; - 8001a20: 687b ldr r3, [r7, #4] - 8001a22: 68fa ldr r2, [r7, #12] - 8001a24: 631a str r2, [r3, #48] @ 0x30 + 800210a: 687b ldr r3, [r7, #4] + 800210c: 68fa ldr r2, [r7, #12] + 800210e: 64da str r2, [r3, #76] @ 0x4c ch->iir_initialized = 1; - 8001a26: 687b ldr r3, [r7, #4] - 8001a28: 2201 movs r2, #1 - 8001a2a: f883 2034 strb.w r2, [r3, #52] @ 0x34 - 8001a2e: e014 b.n 8001a5a + 8002110: 687b ldr r3, [r7, #4] + 8002112: 2201 movs r2, #1 + 8002114: f883 2050 strb.w r2, [r3, #80] @ 0x50 + 8002118: e014 b.n 8002144 } else { ch->iir_state = ADS1015_IIR_ALPHA * burst_result + (1.0f - ADS1015_IIR_ALPHA) * ch->iir_state; - 8001a30: 491b ldr r1, [pc, #108] @ (8001aa0 ) - 8001a32: 68f8 ldr r0, [r7, #12] - 8001a34: f7fe fca0 bl 8000378 <__aeabi_fmul> - 8001a38: 4603 mov r3, r0 - 8001a3a: 461c mov r4, r3 - 8001a3c: 687b ldr r3, [r7, #4] - 8001a3e: 6b1b ldr r3, [r3, #48] @ 0x30 - 8001a40: 4918 ldr r1, [pc, #96] @ (8001aa4 ) - 8001a42: 4618 mov r0, r3 - 8001a44: f7fe fc98 bl 8000378 <__aeabi_fmul> - 8001a48: 4603 mov r3, r0 - 8001a4a: 4619 mov r1, r3 - 8001a4c: 4620 mov r0, r4 - 8001a4e: f7fe fb8b bl 8000168 <__addsf3> - 8001a52: 4603 mov r3, r0 - 8001a54: 461a mov r2, r3 - 8001a56: 687b ldr r3, [r7, #4] - 8001a58: 631a str r2, [r3, #48] @ 0x30 + 800211a: 4919 ldr r1, [pc, #100] @ (8002180 ) + 800211c: 68f8 ldr r0, [r7, #12] + 800211e: f7fe fcc1 bl 8000aa4 <__aeabi_fmul> + 8002122: 4603 mov r3, r0 + 8002124: 461c mov r4, r3 + 8002126: 687b ldr r3, [r7, #4] + 8002128: 6cdb ldr r3, [r3, #76] @ 0x4c + 800212a: 4916 ldr r1, [pc, #88] @ (8002184 ) + 800212c: 4618 mov r0, r3 + 800212e: f7fe fcb9 bl 8000aa4 <__aeabi_fmul> + 8002132: 4603 mov r3, r0 + 8002134: 4619 mov r1, r3 + 8002136: 4620 mov r0, r4 + 8002138: f7fe fbac bl 8000894 <__addsf3> + 800213c: 4603 mov r3, r0 + 800213e: 461a mov r2, r3 + 8002140: 687b ldr r3, [r7, #4] + 8002142: 64da str r2, [r3, #76] @ 0x4c } /* Final output: combines the IIR state (fast response to real drift) * with the window average (more stable, slower response). Adjust * the weighting per channel if needed. */ - ch->filtered_value = 0.5f * ch->iir_state + 0.5f * window_average; - 8001a5a: 687b ldr r3, [r7, #4] - 8001a5c: 6b1b ldr r3, [r3, #48] @ 0x30 - 8001a5e: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 - 8001a62: 4618 mov r0, r3 - 8001a64: f7fe fc88 bl 8000378 <__aeabi_fmul> - 8001a68: 4603 mov r3, r0 - 8001a6a: 461c mov r4, r3 - 8001a6c: f04f 517c mov.w r1, #1056964608 @ 0x3f000000 - 8001a70: 68b8 ldr r0, [r7, #8] - 8001a72: f7fe fc81 bl 8000378 <__aeabi_fmul> - 8001a76: 4603 mov r3, r0 - 8001a78: 4619 mov r1, r3 - 8001a7a: 4620 mov r0, r4 - 8001a7c: f7fe fb74 bl 8000168 <__addsf3> - 8001a80: 4603 mov r3, r0 - 8001a82: 461a mov r2, r3 - 8001a84: 687b ldr r3, [r7, #4] - 8001a86: 639a str r2, [r3, #56] @ 0x38 + ch->filtered_value = 0.7f * ch->iir_state + 0.3f * window_average; + 8002144: 687b ldr r3, [r7, #4] + 8002146: 6cdb ldr r3, [r3, #76] @ 0x4c + 8002148: 490f ldr r1, [pc, #60] @ (8002188 ) + 800214a: 4618 mov r0, r3 + 800214c: f7fe fcaa bl 8000aa4 <__aeabi_fmul> + 8002150: 4603 mov r3, r0 + 8002152: 461c mov r4, r3 + 8002154: 490d ldr r1, [pc, #52] @ (800218c ) + 8002156: 68b8 ldr r0, [r7, #8] + 8002158: f7fe fca4 bl 8000aa4 <__aeabi_fmul> + 800215c: 4603 mov r3, r0 + 800215e: 4619 mov r1, r3 + 8002160: 4620 mov r0, r4 + 8002162: f7fe fb97 bl 8000894 <__addsf3> + 8002166: 4603 mov r3, r0 + 8002168: 461a mov r2, r3 + 800216a: 687b ldr r3, [r7, #4] + 800216c: 655a str r2, [r3, #84] @ 0x54 ch->value_valid = 1; - 8001a88: 687b ldr r3, [r7, #4] - 8001a8a: 2201 movs r2, #1 - 8001a8c: f883 203c strb.w r2, [r3, #60] @ 0x3c - 8001a90: e000 b.n 8001a94 + 800216e: 687b ldr r3, [r7, #4] + 8002170: 2201 movs r2, #1 + 8002172: f883 2058 strb.w r2, [r3, #88] @ 0x58 + 8002176: e000 b.n 800217a return; /* still collecting the burst, nothing else to do */ - 8001a92: bf00 nop + 8002178: bf00 nop } - 8001a94: 3714 adds r7, #20 - 8001a96: 46bd mov sp, r7 - 8001a98: bd90 pop {r4, r7, pc} - 8001a9a: bf00 nop - 8001a9c: 66666667 .word 0x66666667 - 8001aa0: 3f0ccccd .word 0x3f0ccccd - 8001aa4: 3ee66666 .word 0x3ee66666 + 800217a: 3714 adds r7, #20 + 800217c: 46bd mov sp, r7 + 800217e: bd90 pop {r4, r7, pc} + 8002180: 3dcccccd .word 0x3dcccccd + 8002184: 3f666666 .word 0x3f666666 + 8002188: 3f333333 .word 0x3f333333 + 800218c: 3e99999a .word 0x3e99999a -08001aa8 : +08002190 : /* PUBLIC FUNCTIONS - ONE PER CHANNEL */ /* ---------------------------------------------------------------------- */ void ADS1015_pH_NewSample(float raw) { - 8001aa8: b580 push {r7, lr} - 8001aaa: b082 sub sp, #8 - 8001aac: af00 add r7, sp, #0 - 8001aae: 6078 str r0, [r7, #4] + 8002190: b580 push {r7, lr} + 8002192: b082 sub sp, #8 + 8002194: af00 add r7, sp, #0 + 8002196: 6078 str r0, [r7, #4] ADS1015_Process_Sample(&g_ph_filter, raw); - 8001ab0: 6879 ldr r1, [r7, #4] - 8001ab2: 4803 ldr r0, [pc, #12] @ (8001ac0 ) - 8001ab4: f7ff ff5c bl 8001970 + 8002198: 6879 ldr r1, [r7, #4] + 800219a: 4803 ldr r0, [pc, #12] @ (80021a8 ) + 800219c: f7ff ff60 bl 8002060 } - 8001ab8: bf00 nop - 8001aba: 3708 adds r7, #8 - 8001abc: 46bd mov sp, r7 - 8001abe: bd80 pop {r7, pc} - 8001ac0: 200003dc .word 0x200003dc + 80021a0: bf00 nop + 80021a2: 3708 adds r7, #8 + 80021a4: 46bd mov sp, r7 + 80021a6: bd80 pop {r7, pc} + 80021a8: 20000380 .word 0x20000380 -08001ac4 : +080021ac : * @brief Initializes the GPIO hardware and sets initial states. * @note This function replaces the handle-based init. * @retval None */ void digital_outputs_init(void) { - 8001ac4: b580 push {r7, lr} - 8001ac6: b086 sub sp, #24 - 8001ac8: af00 add r7, sp, #0 + 80021ac: b580 push {r7, lr} + 80021ae: b086 sub sp, #24 + 80021b0: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001aca: 1d3b adds r3, r7, #4 - 8001acc: 2200 movs r2, #0 - 8001ace: 601a str r2, [r3, #0] - 8001ad0: 605a str r2, [r3, #4] - 8001ad2: 609a str r2, [r3, #8] - 8001ad4: 60da str r2, [r3, #12] + 80021b2: 1d3b adds r3, r7, #4 + 80021b4: 2200 movs r2, #0 + 80021b6: 601a str r2, [r3, #0] + 80021b8: 605a str r2, [r3, #4] + 80021ba: 609a str r2, [r3, #8] + 80021bc: 60da str r2, [r3, #12] for (int i = 0; i < OUTPUT_PINS_COUNT; i++) { - 8001ad6: 2300 movs r3, #0 - 8001ad8: 617b str r3, [r7, #20] - 8001ada: e029 b.n 8001b30 + 80021be: 2300 movs r3, #0 + 80021c0: 617b str r3, [r7, #20] + 80021c2: e029 b.n 8002218 GPIO_InitStruct.Pin = output_pins[i].pin; - 8001adc: 4a18 ldr r2, [pc, #96] @ (8001b40 ) - 8001ade: 697b ldr r3, [r7, #20] - 8001ae0: 00db lsls r3, r3, #3 - 8001ae2: 4413 add r3, r2 - 8001ae4: 889b ldrh r3, [r3, #4] - 8001ae6: 607b str r3, [r7, #4] + 80021c4: 4a18 ldr r2, [pc, #96] @ (8002228 ) + 80021c6: 697b ldr r3, [r7, #20] + 80021c8: 00db lsls r3, r3, #3 + 80021ca: 4413 add r3, r2 + 80021cc: 889b ldrh r3, [r3, #4] + 80021ce: 607b str r3, [r7, #4] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; // Open-drain - 8001ae8: 2311 movs r3, #17 - 8001aea: 60bb str r3, [r7, #8] + 80021d0: 2311 movs r3, #17 + 80021d2: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001aec: 2300 movs r3, #0 - 8001aee: 60fb str r3, [r7, #12] + 80021d4: 2300 movs r3, #0 + 80021d6: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001af0: 2302 movs r3, #2 - 8001af2: 613b str r3, [r7, #16] + 80021d8: 2302 movs r3, #2 + 80021da: 613b str r3, [r7, #16] HAL_GPIO_Init(output_pins[i].port, &GPIO_InitStruct); - 8001af4: 4a12 ldr r2, [pc, #72] @ (8001b40 ) - 8001af6: 697b ldr r3, [r7, #20] - 8001af8: f852 3033 ldr.w r3, [r2, r3, lsl #3] - 8001afc: 1d3a adds r2, r7, #4 - 8001afe: 4611 mov r1, r2 - 8001b00: 4618 mov r0, r3 - 8001b02: f001 fb45 bl 8003190 + 80021dc: 4a12 ldr r2, [pc, #72] @ (8002228 ) + 80021de: 697b ldr r3, [r7, #20] + 80021e0: f852 3033 ldr.w r3, [r2, r3, lsl #3] + 80021e4: 1d3a adds r2, r7, #4 + 80021e6: 4611 mov r1, r2 + 80021e8: 4618 mov r0, r3 + 80021ea: f001 fc49 bl 8003a80 // Force initial state to LOW (Reset) HAL_GPIO_WritePin(output_pins[i].port, output_pins[i].pin, GPIO_PIN_SET); - 8001b06: 4a0e ldr r2, [pc, #56] @ (8001b40 ) - 8001b08: 697b ldr r3, [r7, #20] - 8001b0a: f852 0033 ldr.w r0, [r2, r3, lsl #3] - 8001b0e: 4a0c ldr r2, [pc, #48] @ (8001b40 ) - 8001b10: 697b ldr r3, [r7, #20] - 8001b12: 00db lsls r3, r3, #3 - 8001b14: 4413 add r3, r2 - 8001b16: 889b ldrh r3, [r3, #4] - 8001b18: 2201 movs r2, #1 - 8001b1a: 4619 mov r1, r3 - 8001b1c: f001 fcd3 bl 80034c6 + 80021ee: 4a0e ldr r2, [pc, #56] @ (8002228 ) + 80021f0: 697b ldr r3, [r7, #20] + 80021f2: f852 0033 ldr.w r0, [r2, r3, lsl #3] + 80021f6: 4a0c ldr r2, [pc, #48] @ (8002228 ) + 80021f8: 697b ldr r3, [r7, #20] + 80021fa: 00db lsls r3, r3, #3 + 80021fc: 4413 add r3, r2 + 80021fe: 889b ldrh r3, [r3, #4] + 8002200: 2201 movs r2, #1 + 8002202: 4619 mov r1, r3 + 8002204: f001 fdd7 bl 8003db6 pin_states[i] = 0; - 8001b20: 4a08 ldr r2, [pc, #32] @ (8001b44 ) - 8001b22: 697b ldr r3, [r7, #20] - 8001b24: 4413 add r3, r2 - 8001b26: 2200 movs r2, #0 - 8001b28: 701a strb r2, [r3, #0] + 8002208: 4a08 ldr r2, [pc, #32] @ (800222c ) + 800220a: 697b ldr r3, [r7, #20] + 800220c: 4413 add r3, r2 + 800220e: 2200 movs r2, #0 + 8002210: 701a strb r2, [r3, #0] for (int i = 0; i < OUTPUT_PINS_COUNT; i++) { - 8001b2a: 697b ldr r3, [r7, #20] - 8001b2c: 3301 adds r3, #1 - 8001b2e: 617b str r3, [r7, #20] - 8001b30: 697b ldr r3, [r7, #20] - 8001b32: 2b07 cmp r3, #7 - 8001b34: ddd2 ble.n 8001adc + 8002212: 697b ldr r3, [r7, #20] + 8002214: 3301 adds r3, #1 + 8002216: 617b str r3, [r7, #20] + 8002218: 697b ldr r3, [r7, #20] + 800221a: 2b07 cmp r3, #7 + 800221c: ddd2 ble.n 80021c4 } } - 8001b36: bf00 nop - 8001b38: bf00 nop - 8001b3a: 3718 adds r7, #24 - 8001b3c: 46bd mov sp, r7 - 8001b3e: bd80 pop {r7, pc} - 8001b40: 080065dc .word 0x080065dc - 8001b44: 20000428 .word 0x20000428 + 800221e: bf00 nop + 8002220: bf00 nop + 8002222: 3718 adds r7, #24 + 8002224: 46bd mov sp, r7 + 8002226: bd80 pop {r7, pc} + 8002228: 08006ecc .word 0x08006ecc + 800222c: 200003e8 .word 0x200003e8 -08001b48 : +08002230 : * @param pin Index of the pin (0 to OUTPUT_PINS_COUNT-1) * @param state Desired state (0 = LOW, 1 = HIGH) * @retval None */ void digital_outputs_set_state(digital_output_pin_t pin, uint8_t state) { - 8001b48: b580 push {r7, lr} - 8001b4a: b084 sub sp, #16 - 8001b4c: af00 add r7, sp, #0 - 8001b4e: 4603 mov r3, r0 - 8001b50: 460a mov r2, r1 - 8001b52: 71fb strb r3, [r7, #7] - 8001b54: 4613 mov r3, r2 - 8001b56: 71bb strb r3, [r7, #6] + 8002230: b580 push {r7, lr} + 8002232: b084 sub sp, #16 + 8002234: af00 add r7, sp, #0 + 8002236: 4603 mov r3, r0 + 8002238: 460a mov r2, r1 + 800223a: 71fb strb r3, [r7, #7] + 800223c: 4613 mov r3, r2 + 800223e: 71bb strb r3, [r7, #6] if (pin >= OUTPUT_PINS_COUNT) { - 8001b58: 79fb ldrb r3, [r7, #7] - 8001b5a: 2b07 cmp r3, #7 - 8001b5c: d823 bhi.n 8001ba6 + 8002240: 79fb ldrb r3, [r7, #7] + 8002242: 2b07 cmp r3, #7 + 8002244: d823 bhi.n 800228e return; // Simple boundary protection } GPIO_TypeDef* port = output_pins[pin].port; - 8001b5e: 79fb ldrb r3, [r7, #7] - 8001b60: 4a13 ldr r2, [pc, #76] @ (8001bb0 ) - 8001b62: f852 3033 ldr.w r3, [r2, r3, lsl #3] - 8001b66: 60fb str r3, [r7, #12] + 8002246: 79fb ldrb r3, [r7, #7] + 8002248: 4a13 ldr r2, [pc, #76] @ (8002298 ) + 800224a: f852 3033 ldr.w r3, [r2, r3, lsl #3] + 800224e: 60fb str r3, [r7, #12] uint16_t pin_mask = output_pins[pin].pin; - 8001b68: 79fb ldrb r3, [r7, #7] - 8001b6a: 4a11 ldr r2, [pc, #68] @ (8001bb0 ) - 8001b6c: 00db lsls r3, r3, #3 - 8001b6e: 4413 add r3, r2 - 8001b70: 889b ldrh r3, [r3, #4] - 8001b72: 817b strh r3, [r7, #10] + 8002250: 79fb ldrb r3, [r7, #7] + 8002252: 4a11 ldr r2, [pc, #68] @ (8002298 ) + 8002254: 00db lsls r3, r3, #3 + 8002256: 4413 add r3, r2 + 8002258: 889b ldrh r3, [r3, #4] + 800225a: 817b strh r3, [r7, #10] if (state) { - 8001b74: 79bb ldrb r3, [r7, #6] - 8001b76: 2b00 cmp r3, #0 - 8001b78: d00a beq.n 8001b90 + 800225c: 79bb ldrb r3, [r7, #6] + 800225e: 2b00 cmp r3, #0 + 8002260: d00a beq.n 8002278 HAL_GPIO_WritePin(port, pin_mask, GPIO_PIN_RESET); - 8001b7a: 897b ldrh r3, [r7, #10] - 8001b7c: 2200 movs r2, #0 - 8001b7e: 4619 mov r1, r3 - 8001b80: 68f8 ldr r0, [r7, #12] - 8001b82: f001 fca0 bl 80034c6 + 8002262: 897b ldrh r3, [r7, #10] + 8002264: 2200 movs r2, #0 + 8002266: 4619 mov r1, r3 + 8002268: 68f8 ldr r0, [r7, #12] + 800226a: f001 fda4 bl 8003db6 pin_states[pin] = 1; - 8001b86: 79fb ldrb r3, [r7, #7] - 8001b88: 4a0a ldr r2, [pc, #40] @ (8001bb4 ) - 8001b8a: 2101 movs r1, #1 - 8001b8c: 54d1 strb r1, [r2, r3] - 8001b8e: e00b b.n 8001ba8 + 800226e: 79fb ldrb r3, [r7, #7] + 8002270: 4a0a ldr r2, [pc, #40] @ (800229c ) + 8002272: 2101 movs r1, #1 + 8002274: 54d1 strb r1, [r2, r3] + 8002276: e00b b.n 8002290 } else { HAL_GPIO_WritePin(port, pin_mask, GPIO_PIN_SET); - 8001b90: 897b ldrh r3, [r7, #10] - 8001b92: 2201 movs r2, #1 - 8001b94: 4619 mov r1, r3 - 8001b96: 68f8 ldr r0, [r7, #12] - 8001b98: f001 fc95 bl 80034c6 + 8002278: 897b ldrh r3, [r7, #10] + 800227a: 2201 movs r2, #1 + 800227c: 4619 mov r1, r3 + 800227e: 68f8 ldr r0, [r7, #12] + 8002280: f001 fd99 bl 8003db6 pin_states[pin] = 0; - 8001b9c: 79fb ldrb r3, [r7, #7] - 8001b9e: 4a05 ldr r2, [pc, #20] @ (8001bb4 ) - 8001ba0: 2100 movs r1, #0 - 8001ba2: 54d1 strb r1, [r2, r3] - 8001ba4: e000 b.n 8001ba8 + 8002284: 79fb ldrb r3, [r7, #7] + 8002286: 4a05 ldr r2, [pc, #20] @ (800229c ) + 8002288: 2100 movs r1, #0 + 800228a: 54d1 strb r1, [r2, r3] + 800228c: e000 b.n 8002290 return; // Simple boundary protection - 8001ba6: bf00 nop + 800228e: bf00 nop } } - 8001ba8: 3710 adds r7, #16 - 8001baa: 46bd mov sp, r7 - 8001bac: bd80 pop {r7, pc} - 8001bae: bf00 nop - 8001bb0: 080065dc .word 0x080065dc - 8001bb4: 20000428 .word 0x20000428 + 8002290: 3710 adds r7, #16 + 8002292: 46bd mov sp, r7 + 8002294: bd80 pop {r7, pc} + 8002296: bf00 nop + 8002298: 08006ecc .word 0x08006ecc + 800229c: 200003e8 .word 0x200003e8 -08001bb8 : +080022a0 : * @brief Toggles the state of a specific output pin. * @param pin Index of the pin * @retval None */ void digital_outputs_toggle(digital_output_pin_t pin) { - 8001bb8: b580 push {r7, lr} - 8001bba: b084 sub sp, #16 - 8001bbc: af00 add r7, sp, #0 - 8001bbe: 4603 mov r3, r0 - 8001bc0: 71fb strb r3, [r7, #7] + 80022a0: b580 push {r7, lr} + 80022a2: b084 sub sp, #16 + 80022a4: af00 add r7, sp, #0 + 80022a6: 4603 mov r3, r0 + 80022a8: 71fb strb r3, [r7, #7] if (pin < OUTPUT_PINS_COUNT) { - 8001bc2: 79fb ldrb r3, [r7, #7] - 8001bc4: 2b07 cmp r3, #7 - 8001bc6: d80e bhi.n 8001be6 + 80022aa: 79fb ldrb r3, [r7, #7] + 80022ac: 2b07 cmp r3, #7 + 80022ae: d80e bhi.n 80022ce // Simple toggle logic using the internal state array uint8_t new_state = !pin_states[pin]; - 8001bc8: 79fb ldrb r3, [r7, #7] - 8001bca: 4a09 ldr r2, [pc, #36] @ (8001bf0 ) - 8001bcc: 5cd3 ldrb r3, [r2, r3] - 8001bce: 2b00 cmp r3, #0 - 8001bd0: bf0c ite eq - 8001bd2: 2301 moveq r3, #1 - 8001bd4: 2300 movne r3, #0 - 8001bd6: b2db uxtb r3, r3 - 8001bd8: 73fb strb r3, [r7, #15] + 80022b0: 79fb ldrb r3, [r7, #7] + 80022b2: 4a09 ldr r2, [pc, #36] @ (80022d8 ) + 80022b4: 5cd3 ldrb r3, [r2, r3] + 80022b6: 2b00 cmp r3, #0 + 80022b8: bf0c ite eq + 80022ba: 2301 moveq r3, #1 + 80022bc: 2300 movne r3, #0 + 80022be: b2db uxtb r3, r3 + 80022c0: 73fb strb r3, [r7, #15] digital_outputs_set_state(pin, new_state); - 8001bda: 7bfa ldrb r2, [r7, #15] - 8001bdc: 79fb ldrb r3, [r7, #7] - 8001bde: 4611 mov r1, r2 - 8001be0: 4618 mov r0, r3 - 8001be2: f7ff ffb1 bl 8001b48 + 80022c2: 7bfa ldrb r2, [r7, #15] + 80022c4: 79fb ldrb r3, [r7, #7] + 80022c6: 4611 mov r1, r2 + 80022c8: 4618 mov r0, r3 + 80022ca: f7ff ffb1 bl 8002230 } } - 8001be6: bf00 nop - 8001be8: 3710 adds r7, #16 - 8001bea: 46bd mov sp, r7 - 8001bec: bd80 pop {r7, pc} - 8001bee: bf00 nop - 8001bf0: 20000428 .word 0x20000428 + 80022ce: bf00 nop + 80022d0: 3710 adds r7, #16 + 80022d2: 46bd mov sp, r7 + 80022d4: bd80 pop {r7, pc} + 80022d6: bf00 nop + 80022d8: 200003e8 .word 0x200003e8 -08001bf4 : +080022dc : * EXTI * Free pins are configured automatically as Analog (this feature is enabled through * the Code Generation settings) */ void MX_GPIO_Init(void) { - 8001bf4: b580 push {r7, lr} - 8001bf6: b088 sub sp, #32 - 8001bf8: af00 add r7, sp, #0 + 80022dc: b580 push {r7, lr} + 80022de: b088 sub sp, #32 + 80022e0: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001bfa: f107 0310 add.w r3, r7, #16 - 8001bfe: 2200 movs r2, #0 - 8001c00: 601a str r2, [r3, #0] - 8001c02: 605a str r2, [r3, #4] - 8001c04: 609a str r2, [r3, #8] - 8001c06: 60da str r2, [r3, #12] + 80022e2: f107 0310 add.w r3, r7, #16 + 80022e6: 2200 movs r2, #0 + 80022e8: 601a str r2, [r3, #0] + 80022ea: 605a str r2, [r3, #4] + 80022ec: 609a str r2, [r3, #8] + 80022ee: 60da str r2, [r3, #12] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); - 8001c08: 4b46 ldr r3, [pc, #280] @ (8001d24 ) - 8001c0a: 699b ldr r3, [r3, #24] - 8001c0c: 4a45 ldr r2, [pc, #276] @ (8001d24 ) - 8001c0e: f043 0310 orr.w r3, r3, #16 - 8001c12: 6193 str r3, [r2, #24] - 8001c14: 4b43 ldr r3, [pc, #268] @ (8001d24 ) - 8001c16: 699b ldr r3, [r3, #24] - 8001c18: f003 0310 and.w r3, r3, #16 - 8001c1c: 60fb str r3, [r7, #12] - 8001c1e: 68fb ldr r3, [r7, #12] + 80022f0: 4b46 ldr r3, [pc, #280] @ (800240c ) + 80022f2: 699b ldr r3, [r3, #24] + 80022f4: 4a45 ldr r2, [pc, #276] @ (800240c ) + 80022f6: f043 0310 orr.w r3, r3, #16 + 80022fa: 6193 str r3, [r2, #24] + 80022fc: 4b43 ldr r3, [pc, #268] @ (800240c ) + 80022fe: 699b ldr r3, [r3, #24] + 8002300: f003 0310 and.w r3, r3, #16 + 8002304: 60fb str r3, [r7, #12] + 8002306: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOD_CLK_ENABLE(); - 8001c20: 4b40 ldr r3, [pc, #256] @ (8001d24 ) - 8001c22: 699b ldr r3, [r3, #24] - 8001c24: 4a3f ldr r2, [pc, #252] @ (8001d24 ) - 8001c26: f043 0320 orr.w r3, r3, #32 - 8001c2a: 6193 str r3, [r2, #24] - 8001c2c: 4b3d ldr r3, [pc, #244] @ (8001d24 ) - 8001c2e: 699b ldr r3, [r3, #24] - 8001c30: f003 0320 and.w r3, r3, #32 - 8001c34: 60bb str r3, [r7, #8] - 8001c36: 68bb ldr r3, [r7, #8] + 8002308: 4b40 ldr r3, [pc, #256] @ (800240c ) + 800230a: 699b ldr r3, [r3, #24] + 800230c: 4a3f ldr r2, [pc, #252] @ (800240c ) + 800230e: f043 0320 orr.w r3, r3, #32 + 8002312: 6193 str r3, [r2, #24] + 8002314: 4b3d ldr r3, [pc, #244] @ (800240c ) + 8002316: 699b ldr r3, [r3, #24] + 8002318: f003 0320 and.w r3, r3, #32 + 800231c: 60bb str r3, [r7, #8] + 800231e: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8001c38: 4b3a ldr r3, [pc, #232] @ (8001d24 ) - 8001c3a: 699b ldr r3, [r3, #24] - 8001c3c: 4a39 ldr r2, [pc, #228] @ (8001d24 ) - 8001c3e: f043 0304 orr.w r3, r3, #4 - 8001c42: 6193 str r3, [r2, #24] - 8001c44: 4b37 ldr r3, [pc, #220] @ (8001d24 ) - 8001c46: 699b ldr r3, [r3, #24] - 8001c48: f003 0304 and.w r3, r3, #4 - 8001c4c: 607b str r3, [r7, #4] - 8001c4e: 687b ldr r3, [r7, #4] + 8002320: 4b3a ldr r3, [pc, #232] @ (800240c ) + 8002322: 699b ldr r3, [r3, #24] + 8002324: 4a39 ldr r2, [pc, #228] @ (800240c ) + 8002326: f043 0304 orr.w r3, r3, #4 + 800232a: 6193 str r3, [r2, #24] + 800232c: 4b37 ldr r3, [pc, #220] @ (800240c ) + 800232e: 699b ldr r3, [r3, #24] + 8002330: f003 0304 and.w r3, r3, #4 + 8002334: 607b str r3, [r7, #4] + 8002336: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8001c50: 4b34 ldr r3, [pc, #208] @ (8001d24 ) - 8001c52: 699b ldr r3, [r3, #24] - 8001c54: 4a33 ldr r2, [pc, #204] @ (8001d24 ) - 8001c56: f043 0308 orr.w r3, r3, #8 - 8001c5a: 6193 str r3, [r2, #24] - 8001c5c: 4b31 ldr r3, [pc, #196] @ (8001d24 ) - 8001c5e: 699b ldr r3, [r3, #24] - 8001c60: f003 0308 and.w r3, r3, #8 - 8001c64: 603b str r3, [r7, #0] - 8001c66: 683b ldr r3, [r7, #0] + 8002338: 4b34 ldr r3, [pc, #208] @ (800240c ) + 800233a: 699b ldr r3, [r3, #24] + 800233c: 4a33 ldr r2, [pc, #204] @ (800240c ) + 800233e: f043 0308 orr.w r3, r3, #8 + 8002342: 6193 str r3, [r2, #24] + 8002344: 4b31 ldr r3, [pc, #196] @ (800240c ) + 8002346: 699b ldr r3, [r3, #24] + 8002348: f003 0308 and.w r3, r3, #8 + 800234c: 603b str r3, [r7, #0] + 800234e: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, DIGI_OUT5_Pin|DIGI_OUT6_Pin|DIGI_OUT7_Pin, GPIO_PIN_RESET); - 8001c68: 2200 movs r2, #0 - 8001c6a: f44f 4160 mov.w r1, #57344 @ 0xe000 - 8001c6e: 482e ldr r0, [pc, #184] @ (8001d28 ) - 8001c70: f001 fc29 bl 80034c6 + 8002350: 2200 movs r2, #0 + 8002352: f44f 4160 mov.w r1, #57344 @ 0xe000 + 8002356: 482e ldr r0, [pc, #184] @ (8002410 ) + 8002358: f001 fd2d bl 8003db6 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, DIGI_OUT0_Pin|DIGI_OUT1_Pin|DIGI_OUT2_Pin|LED_Red_Pin - 8001c74: 2200 movs r2, #0 - 8001c76: f240 3137 movw r1, #823 @ 0x337 - 8001c7a: 482c ldr r0, [pc, #176] @ (8001d2c ) - 8001c7c: f001 fc23 bl 80034c6 + 800235c: 2200 movs r2, #0 + 800235e: f240 3137 movw r1, #823 @ 0x337 + 8002362: 482c ldr r0, [pc, #176] @ (8002414 ) + 8002364: f001 fd27 bl 8003db6 |LED_Green_Pin|DIGI_OUT3_Pin|DIGI_OUT4_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(TX_EN_RS485_GPIO_Port, TX_EN_RS485_Pin, GPIO_PIN_RESET); - 8001c80: 2200 movs r2, #0 - 8001c82: f44f 5180 mov.w r1, #4096 @ 0x1000 - 8001c86: 482a ldr r0, [pc, #168] @ (8001d30 ) - 8001c88: f001 fc1d bl 80034c6 + 8002368: 2200 movs r2, #0 + 800236a: f44f 5180 mov.w r1, #4096 @ 0x1000 + 800236e: 482a ldr r0, [pc, #168] @ (8002418 ) + 8002370: f001 fd21 bl 8003db6 /*Configure GPIO pins : DIGI_OUT5_Pin DIGI_OUT6_Pin DIGI_OUT7_Pin */ GPIO_InitStruct.Pin = DIGI_OUT5_Pin|DIGI_OUT6_Pin|DIGI_OUT7_Pin; - 8001c8c: f44f 4360 mov.w r3, #57344 @ 0xe000 - 8001c90: 613b str r3, [r7, #16] + 8002374: f44f 4360 mov.w r3, #57344 @ 0xe000 + 8002378: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 8001c92: 2311 movs r3, #17 - 8001c94: 617b str r3, [r7, #20] + 800237a: 2311 movs r3, #17 + 800237c: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001c96: 2300 movs r3, #0 - 8001c98: 61bb str r3, [r7, #24] + 800237e: 2300 movs r3, #0 + 8002380: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001c9a: 2302 movs r3, #2 - 8001c9c: 61fb str r3, [r7, #28] + 8002382: 2302 movs r3, #2 + 8002384: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8001c9e: f107 0310 add.w r3, r7, #16 - 8001ca2: 4619 mov r1, r3 - 8001ca4: 4820 ldr r0, [pc, #128] @ (8001d28 ) - 8001ca6: f001 fa73 bl 8003190 + 8002386: f107 0310 add.w r3, r7, #16 + 800238a: 4619 mov r1, r3 + 800238c: 4820 ldr r0, [pc, #128] @ (8002410 ) + 800238e: f001 fb77 bl 8003a80 /*Configure GPIO pins : RS485_Addr0_Pin RS485_Addr1_Pin RS485_Addr2_Pin RS485_Addr3_Pin SYS_CFG0_Pin SYS_CFG1_Pin PG_RS485_Pin PG_CE_Pin PG_PH_Pin */ GPIO_InitStruct.Pin = RS485_Addr0_Pin|RS485_Addr1_Pin|RS485_Addr2_Pin|RS485_Addr3_Pin - 8001caa: f648 13fc movw r3, #35324 @ 0x89fc - 8001cae: 613b str r3, [r7, #16] + 8002392: f648 13fc movw r3, #35324 @ 0x89fc + 8002396: 613b str r3, [r7, #16] |SYS_CFG0_Pin|SYS_CFG1_Pin|PG_RS485_Pin|PG_CE_Pin |PG_PH_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8001cb0: 2300 movs r3, #0 - 8001cb2: 617b str r3, [r7, #20] + 8002398: 2300 movs r3, #0 + 800239a: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8001cb4: 2301 movs r3, #1 - 8001cb6: 61bb str r3, [r7, #24] + 800239c: 2301 movs r3, #1 + 800239e: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8001cb8: f107 0310 add.w r3, r7, #16 - 8001cbc: 4619 mov r1, r3 - 8001cbe: 481c ldr r0, [pc, #112] @ (8001d30 ) - 8001cc0: f001 fa66 bl 8003190 + 80023a0: f107 0310 add.w r3, r7, #16 + 80023a4: 4619 mov r1, r3 + 80023a6: 481c ldr r0, [pc, #112] @ (8002418 ) + 80023a8: f001 fb6a bl 8003a80 /*Configure GPIO pins : DIGI_OUT0_Pin DIGI_OUT1_Pin DIGI_OUT2_Pin LED_Red_Pin LED_Green_Pin DIGI_OUT3_Pin DIGI_OUT4_Pin */ GPIO_InitStruct.Pin = DIGI_OUT0_Pin|DIGI_OUT1_Pin|DIGI_OUT2_Pin|LED_Red_Pin - 8001cc4: f240 3337 movw r3, #823 @ 0x337 - 8001cc8: 613b str r3, [r7, #16] + 80023ac: f240 3337 movw r3, #823 @ 0x337 + 80023b0: 613b str r3, [r7, #16] |LED_Green_Pin|DIGI_OUT3_Pin|DIGI_OUT4_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - 8001cca: 2311 movs r3, #17 - 8001ccc: 617b str r3, [r7, #20] + 80023b2: 2311 movs r3, #17 + 80023b4: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001cce: 2300 movs r3, #0 - 8001cd0: 61bb str r3, [r7, #24] + 80023b6: 2300 movs r3, #0 + 80023b8: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001cd2: 2302 movs r3, #2 - 8001cd4: 61fb str r3, [r7, #28] + 80023ba: 2302 movs r3, #2 + 80023bc: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001cd6: f107 0310 add.w r3, r7, #16 - 8001cda: 4619 mov r1, r3 - 8001cdc: 4813 ldr r0, [pc, #76] @ (8001d2c ) - 8001cde: f001 fa57 bl 8003190 + 80023be: f107 0310 add.w r3, r7, #16 + 80023c2: 4619 mov r1, r3 + 80023c4: 4813 ldr r0, [pc, #76] @ (8002414 ) + 80023c6: f001 fb5b bl 8003a80 /*Configure GPIO pins : RS485_Addr4_Pin RS485_Addr5_Pin RS485_Addr6_Pin RS485_Addr7_Pin Calib_PH_Pin */ GPIO_InitStruct.Pin = RS485_Addr4_Pin|RS485_Addr5_Pin|RS485_Addr6_Pin|RS485_Addr7_Pin - 8001ce2: f24f 0308 movw r3, #61448 @ 0xf008 - 8001ce6: 613b str r3, [r7, #16] + 80023ca: f24f 0308 movw r3, #61448 @ 0xf008 + 80023ce: 613b str r3, [r7, #16] |Calib_PH_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8001ce8: 2300 movs r3, #0 - 8001cea: 617b str r3, [r7, #20] + 80023d0: 2300 movs r3, #0 + 80023d2: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8001cec: 2301 movs r3, #1 - 8001cee: 61bb str r3, [r7, #24] + 80023d4: 2301 movs r3, #1 + 80023d6: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001cf0: f107 0310 add.w r3, r7, #16 - 8001cf4: 4619 mov r1, r3 - 8001cf6: 480d ldr r0, [pc, #52] @ (8001d2c ) - 8001cf8: f001 fa4a bl 8003190 + 80023d8: f107 0310 add.w r3, r7, #16 + 80023dc: 4619 mov r1, r3 + 80023de: 480d ldr r0, [pc, #52] @ (8002414 ) + 80023e0: f001 fb4e bl 8003a80 /*Configure GPIO pin : TX_EN_RS485_Pin */ GPIO_InitStruct.Pin = TX_EN_RS485_Pin; - 8001cfc: f44f 5380 mov.w r3, #4096 @ 0x1000 - 8001d00: 613b str r3, [r7, #16] + 80023e4: f44f 5380 mov.w r3, #4096 @ 0x1000 + 80023e8: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8001d02: 2301 movs r3, #1 - 8001d04: 617b str r3, [r7, #20] + 80023ea: 2301 movs r3, #1 + 80023ec: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8001d06: 2300 movs r3, #0 - 8001d08: 61bb str r3, [r7, #24] + 80023ee: 2300 movs r3, #0 + 80023f0: 61bb str r3, [r7, #24] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001d0a: 2302 movs r3, #2 - 8001d0c: 61fb str r3, [r7, #28] + 80023f2: 2302 movs r3, #2 + 80023f4: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_EN_RS485_GPIO_Port, &GPIO_InitStruct); - 8001d0e: f107 0310 add.w r3, r7, #16 - 8001d12: 4619 mov r1, r3 - 8001d14: 4806 ldr r0, [pc, #24] @ (8001d30 ) - 8001d16: f001 fa3b bl 8003190 + 80023f6: f107 0310 add.w r3, r7, #16 + 80023fa: 4619 mov r1, r3 + 80023fc: 4806 ldr r0, [pc, #24] @ (8002418 ) + 80023fe: f001 fb3f bl 8003a80 } - 8001d1a: bf00 nop - 8001d1c: 3720 adds r7, #32 - 8001d1e: 46bd mov sp, r7 - 8001d20: bd80 pop {r7, pc} - 8001d22: bf00 nop - 8001d24: 40021000 .word 0x40021000 - 8001d28: 40011000 .word 0x40011000 - 8001d2c: 40010c00 .word 0x40010c00 - 8001d30: 40010800 .word 0x40010800 + 8002402: bf00 nop + 8002404: 3720 adds r7, #32 + 8002406: 46bd mov sp, r7 + 8002408: bd80 pop {r7, pc} + 800240a: bf00 nop + 800240c: 40021000 .word 0x40021000 + 8002410: 40011000 .word 0x40011000 + 8002414: 40010c00 .word 0x40010c00 + 8002418: 40010800 .word 0x40010800 -08001d34 : +0800241c : I2C_HandleTypeDef hi2c1; I2C_HandleTypeDef hi2c2; /* I2C1 init function */ void MX_I2C1_Init(void) { - 8001d34: b580 push {r7, lr} - 8001d36: af00 add r7, sp, #0 + 800241c: b580 push {r7, lr} + 800241e: af00 add r7, sp, #0 /* USER CODE END I2C1_Init 0 */ /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ hi2c1.Instance = I2C1; - 8001d38: 4b12 ldr r3, [pc, #72] @ (8001d84 ) - 8001d3a: 4a13 ldr r2, [pc, #76] @ (8001d88 ) - 8001d3c: 601a str r2, [r3, #0] + 8002420: 4b12 ldr r3, [pc, #72] @ (800246c ) + 8002422: 4a13 ldr r2, [pc, #76] @ (8002470 ) + 8002424: 601a str r2, [r3, #0] hi2c1.Init.ClockSpeed = 100000; - 8001d3e: 4b11 ldr r3, [pc, #68] @ (8001d84 ) - 8001d40: 4a12 ldr r2, [pc, #72] @ (8001d8c ) - 8001d42: 605a str r2, [r3, #4] + 8002426: 4b11 ldr r3, [pc, #68] @ (800246c ) + 8002428: 4a12 ldr r2, [pc, #72] @ (8002474 ) + 800242a: 605a str r2, [r3, #4] hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2; - 8001d44: 4b0f ldr r3, [pc, #60] @ (8001d84 ) - 8001d46: 2200 movs r2, #0 - 8001d48: 609a str r2, [r3, #8] + 800242c: 4b0f ldr r3, [pc, #60] @ (800246c ) + 800242e: 2200 movs r2, #0 + 8002430: 609a str r2, [r3, #8] hi2c1.Init.OwnAddress1 = 0; - 8001d4a: 4b0e ldr r3, [pc, #56] @ (8001d84 ) - 8001d4c: 2200 movs r2, #0 - 8001d4e: 60da str r2, [r3, #12] + 8002432: 4b0e ldr r3, [pc, #56] @ (800246c ) + 8002434: 2200 movs r2, #0 + 8002436: 60da str r2, [r3, #12] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 8001d50: 4b0c ldr r3, [pc, #48] @ (8001d84 ) - 8001d52: f44f 4280 mov.w r2, #16384 @ 0x4000 - 8001d56: 611a str r2, [r3, #16] + 8002438: 4b0c ldr r3, [pc, #48] @ (800246c ) + 800243a: f44f 4280 mov.w r2, #16384 @ 0x4000 + 800243e: 611a str r2, [r3, #16] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 8001d58: 4b0a ldr r3, [pc, #40] @ (8001d84 ) - 8001d5a: 2200 movs r2, #0 - 8001d5c: 615a str r2, [r3, #20] + 8002440: 4b0a ldr r3, [pc, #40] @ (800246c ) + 8002442: 2200 movs r2, #0 + 8002444: 615a str r2, [r3, #20] hi2c1.Init.OwnAddress2 = 0; - 8001d5e: 4b09 ldr r3, [pc, #36] @ (8001d84 ) - 8001d60: 2200 movs r2, #0 - 8001d62: 619a str r2, [r3, #24] + 8002446: 4b09 ldr r3, [pc, #36] @ (800246c ) + 8002448: 2200 movs r2, #0 + 800244a: 619a str r2, [r3, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 8001d64: 4b07 ldr r3, [pc, #28] @ (8001d84 ) - 8001d66: 2200 movs r2, #0 - 8001d68: 61da str r2, [r3, #28] + 800244c: 4b07 ldr r3, [pc, #28] @ (800246c ) + 800244e: 2200 movs r2, #0 + 8002450: 61da str r2, [r3, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 8001d6a: 4b06 ldr r3, [pc, #24] @ (8001d84 ) - 8001d6c: 2200 movs r2, #0 - 8001d6e: 621a str r2, [r3, #32] + 8002452: 4b06 ldr r3, [pc, #24] @ (800246c ) + 8002454: 2200 movs r2, #0 + 8002456: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) - 8001d70: 4804 ldr r0, [pc, #16] @ (8001d84 ) - 8001d72: f001 fbd9 bl 8003528 - 8001d76: 4603 mov r3, r0 - 8001d78: 2b00 cmp r3, #0 - 8001d7a: d001 beq.n 8001d80 + 8002458: 4804 ldr r0, [pc, #16] @ (800246c ) + 800245a: f001 fcdd bl 8003e18 + 800245e: 4603 mov r3, r0 + 8002460: 2b00 cmp r3, #0 + 8002462: d001 beq.n 8002468 { Error_Handler(); - 8001d7c: f000 fb26 bl 80023cc + 8002464: f000 fc2a bl 8002cbc } /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } - 8001d80: bf00 nop - 8001d82: bd80 pop {r7, pc} - 8001d84: 20000430 .word 0x20000430 - 8001d88: 40005400 .word 0x40005400 - 8001d8c: 000186a0 .word 0x000186a0 + 8002468: bf00 nop + 800246a: bd80 pop {r7, pc} + 800246c: 200003f0 .word 0x200003f0 + 8002470: 40005400 .word 0x40005400 + 8002474: 000186a0 .word 0x000186a0 -08001d90 : +08002478 : /* I2C2 init function */ void MX_I2C2_Init(void) { - 8001d90: b580 push {r7, lr} - 8001d92: af00 add r7, sp, #0 + 8002478: b580 push {r7, lr} + 800247a: af00 add r7, sp, #0 /* USER CODE END I2C2_Init 0 */ /* USER CODE BEGIN I2C2_Init 1 */ /* USER CODE END I2C2_Init 1 */ hi2c2.Instance = I2C2; - 8001d94: 4b12 ldr r3, [pc, #72] @ (8001de0 ) - 8001d96: 4a13 ldr r2, [pc, #76] @ (8001de4 ) - 8001d98: 601a str r2, [r3, #0] + 800247c: 4b12 ldr r3, [pc, #72] @ (80024c8 ) + 800247e: 4a13 ldr r2, [pc, #76] @ (80024cc ) + 8002480: 601a str r2, [r3, #0] hi2c2.Init.ClockSpeed = 100000; - 8001d9a: 4b11 ldr r3, [pc, #68] @ (8001de0 ) - 8001d9c: 4a12 ldr r2, [pc, #72] @ (8001de8 ) - 8001d9e: 605a str r2, [r3, #4] + 8002482: 4b11 ldr r3, [pc, #68] @ (80024c8 ) + 8002484: 4a12 ldr r2, [pc, #72] @ (80024d0 ) + 8002486: 605a str r2, [r3, #4] hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2; - 8001da0: 4b0f ldr r3, [pc, #60] @ (8001de0 ) - 8001da2: 2200 movs r2, #0 - 8001da4: 609a str r2, [r3, #8] + 8002488: 4b0f ldr r3, [pc, #60] @ (80024c8 ) + 800248a: 2200 movs r2, #0 + 800248c: 609a str r2, [r3, #8] hi2c2.Init.OwnAddress1 = 0; - 8001da6: 4b0e ldr r3, [pc, #56] @ (8001de0 ) - 8001da8: 2200 movs r2, #0 - 8001daa: 60da str r2, [r3, #12] + 800248e: 4b0e ldr r3, [pc, #56] @ (80024c8 ) + 8002490: 2200 movs r2, #0 + 8002492: 60da str r2, [r3, #12] hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; - 8001dac: 4b0c ldr r3, [pc, #48] @ (8001de0 ) - 8001dae: f44f 4280 mov.w r2, #16384 @ 0x4000 - 8001db2: 611a str r2, [r3, #16] + 8002494: 4b0c ldr r3, [pc, #48] @ (80024c8 ) + 8002496: f44f 4280 mov.w r2, #16384 @ 0x4000 + 800249a: 611a str r2, [r3, #16] hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; - 8001db4: 4b0a ldr r3, [pc, #40] @ (8001de0 ) - 8001db6: 2200 movs r2, #0 - 8001db8: 615a str r2, [r3, #20] + 800249c: 4b0a ldr r3, [pc, #40] @ (80024c8 ) + 800249e: 2200 movs r2, #0 + 80024a0: 615a str r2, [r3, #20] hi2c2.Init.OwnAddress2 = 0; - 8001dba: 4b09 ldr r3, [pc, #36] @ (8001de0 ) - 8001dbc: 2200 movs r2, #0 - 8001dbe: 619a str r2, [r3, #24] + 80024a2: 4b09 ldr r3, [pc, #36] @ (80024c8 ) + 80024a4: 2200 movs r2, #0 + 80024a6: 619a str r2, [r3, #24] hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; - 8001dc0: 4b07 ldr r3, [pc, #28] @ (8001de0 ) - 8001dc2: 2200 movs r2, #0 - 8001dc4: 61da str r2, [r3, #28] + 80024a8: 4b07 ldr r3, [pc, #28] @ (80024c8 ) + 80024aa: 2200 movs r2, #0 + 80024ac: 61da str r2, [r3, #28] hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; - 8001dc6: 4b06 ldr r3, [pc, #24] @ (8001de0 ) - 8001dc8: 2200 movs r2, #0 - 8001dca: 621a str r2, [r3, #32] + 80024ae: 4b06 ldr r3, [pc, #24] @ (80024c8 ) + 80024b0: 2200 movs r2, #0 + 80024b2: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c2) != HAL_OK) - 8001dcc: 4804 ldr r0, [pc, #16] @ (8001de0 ) - 8001dce: f001 fbab bl 8003528 - 8001dd2: 4603 mov r3, r0 - 8001dd4: 2b00 cmp r3, #0 - 8001dd6: d001 beq.n 8001ddc + 80024b4: 4804 ldr r0, [pc, #16] @ (80024c8 ) + 80024b6: f001 fcaf bl 8003e18 + 80024ba: 4603 mov r3, r0 + 80024bc: 2b00 cmp r3, #0 + 80024be: d001 beq.n 80024c4 { Error_Handler(); - 8001dd8: f000 faf8 bl 80023cc + 80024c0: f000 fbfc bl 8002cbc } /* USER CODE BEGIN I2C2_Init 2 */ /* USER CODE END I2C2_Init 2 */ } - 8001ddc: bf00 nop - 8001dde: bd80 pop {r7, pc} - 8001de0: 20000484 .word 0x20000484 - 8001de4: 40005800 .word 0x40005800 - 8001de8: 000186a0 .word 0x000186a0 + 80024c4: bf00 nop + 80024c6: bd80 pop {r7, pc} + 80024c8: 20000444 .word 0x20000444 + 80024cc: 40005800 .word 0x40005800 + 80024d0: 000186a0 .word 0x000186a0 -08001dec : +080024d4 : void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle) { - 8001dec: b580 push {r7, lr} - 8001dee: b08a sub sp, #40 @ 0x28 - 8001df0: af00 add r7, sp, #0 - 8001df2: 6078 str r0, [r7, #4] + 80024d4: b580 push {r7, lr} + 80024d6: b08a sub sp, #40 @ 0x28 + 80024d8: af00 add r7, sp, #0 + 80024da: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8001df4: f107 0318 add.w r3, r7, #24 - 8001df8: 2200 movs r2, #0 - 8001dfa: 601a str r2, [r3, #0] - 8001dfc: 605a str r2, [r3, #4] - 8001dfe: 609a str r2, [r3, #8] - 8001e00: 60da str r2, [r3, #12] + 80024dc: f107 0318 add.w r3, r7, #24 + 80024e0: 2200 movs r2, #0 + 80024e2: 601a str r2, [r3, #0] + 80024e4: 605a str r2, [r3, #4] + 80024e6: 609a str r2, [r3, #8] + 80024e8: 60da str r2, [r3, #12] if(i2cHandle->Instance==I2C1) - 8001e02: 687b ldr r3, [r7, #4] - 8001e04: 681b ldr r3, [r3, #0] - 8001e06: 4a2b ldr r2, [pc, #172] @ (8001eb4 ) - 8001e08: 4293 cmp r3, r2 - 8001e0a: d124 bne.n 8001e56 + 80024ea: 687b ldr r3, [r7, #4] + 80024ec: 681b ldr r3, [r3, #0] + 80024ee: 4a2b ldr r2, [pc, #172] @ (800259c ) + 80024f0: 4293 cmp r3, r2 + 80024f2: d124 bne.n 800253e { /* USER CODE BEGIN I2C1_MspInit 0 */ /* USER CODE END I2C1_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); - 8001e0c: 4b2a ldr r3, [pc, #168] @ (8001eb8 ) - 8001e0e: 699b ldr r3, [r3, #24] - 8001e10: 4a29 ldr r2, [pc, #164] @ (8001eb8 ) - 8001e12: f043 0308 orr.w r3, r3, #8 - 8001e16: 6193 str r3, [r2, #24] - 8001e18: 4b27 ldr r3, [pc, #156] @ (8001eb8 ) - 8001e1a: 699b ldr r3, [r3, #24] - 8001e1c: f003 0308 and.w r3, r3, #8 - 8001e20: 617b str r3, [r7, #20] - 8001e22: 697b ldr r3, [r7, #20] + 80024f4: 4b2a ldr r3, [pc, #168] @ (80025a0 ) + 80024f6: 699b ldr r3, [r3, #24] + 80024f8: 4a29 ldr r2, [pc, #164] @ (80025a0 ) + 80024fa: f043 0308 orr.w r3, r3, #8 + 80024fe: 6193 str r3, [r2, #24] + 8002500: 4b27 ldr r3, [pc, #156] @ (80025a0 ) + 8002502: 699b ldr r3, [r3, #24] + 8002504: f003 0308 and.w r3, r3, #8 + 8002508: 617b str r3, [r7, #20] + 800250a: 697b ldr r3, [r7, #20] /**I2C1 GPIO Configuration PB6 ------> I2C1_SCL PB7 ------> I2C1_SDA */ GPIO_InitStruct.Pin = I2C1_SCL_PH_Pin|I2C1_SDA_PH_Pin; - 8001e24: 23c0 movs r3, #192 @ 0xc0 - 8001e26: 61bb str r3, [r7, #24] + 800250c: 23c0 movs r3, #192 @ 0xc0 + 800250e: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 8001e28: 2312 movs r3, #18 - 8001e2a: 61fb str r3, [r7, #28] + 8002510: 2312 movs r3, #18 + 8002512: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001e2c: 2302 movs r3, #2 - 8001e2e: 627b str r3, [r7, #36] @ 0x24 + 8002514: 2302 movs r3, #2 + 8002516: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001e30: f107 0318 add.w r3, r7, #24 - 8001e34: 4619 mov r1, r3 - 8001e36: 4821 ldr r0, [pc, #132] @ (8001ebc ) - 8001e38: f001 f9aa bl 8003190 + 8002518: f107 0318 add.w r3, r7, #24 + 800251c: 4619 mov r1, r3 + 800251e: 4821 ldr r0, [pc, #132] @ (80025a4 ) + 8002520: f001 faae bl 8003a80 /* I2C1 clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); - 8001e3c: 4b1e ldr r3, [pc, #120] @ (8001eb8 ) - 8001e3e: 69db ldr r3, [r3, #28] - 8001e40: 4a1d ldr r2, [pc, #116] @ (8001eb8 ) - 8001e42: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 - 8001e46: 61d3 str r3, [r2, #28] - 8001e48: 4b1b ldr r3, [pc, #108] @ (8001eb8 ) - 8001e4a: 69db ldr r3, [r3, #28] - 8001e4c: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 8001e50: 613b str r3, [r7, #16] - 8001e52: 693b ldr r3, [r7, #16] + 8002524: 4b1e ldr r3, [pc, #120] @ (80025a0 ) + 8002526: 69db ldr r3, [r3, #28] + 8002528: 4a1d ldr r2, [pc, #116] @ (80025a0 ) + 800252a: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 + 800252e: 61d3 str r3, [r2, #28] + 8002530: 4b1b ldr r3, [pc, #108] @ (80025a0 ) + 8002532: 69db ldr r3, [r3, #28] + 8002534: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 8002538: 613b str r3, [r7, #16] + 800253a: 693b ldr r3, [r7, #16] __HAL_RCC_I2C2_CLK_ENABLE(); /* USER CODE BEGIN I2C2_MspInit 1 */ /* USER CODE END I2C2_MspInit 1 */ } } - 8001e54: e029 b.n 8001eaa + 800253c: e029 b.n 8002592 else if(i2cHandle->Instance==I2C2) - 8001e56: 687b ldr r3, [r7, #4] - 8001e58: 681b ldr r3, [r3, #0] - 8001e5a: 4a19 ldr r2, [pc, #100] @ (8001ec0 ) - 8001e5c: 4293 cmp r3, r2 - 8001e5e: d124 bne.n 8001eaa + 800253e: 687b ldr r3, [r7, #4] + 8002540: 681b ldr r3, [r3, #0] + 8002542: 4a19 ldr r2, [pc, #100] @ (80025a8 ) + 8002544: 4293 cmp r3, r2 + 8002546: d124 bne.n 8002592 __HAL_RCC_GPIOB_CLK_ENABLE(); - 8001e60: 4b15 ldr r3, [pc, #84] @ (8001eb8 ) - 8001e62: 699b ldr r3, [r3, #24] - 8001e64: 4a14 ldr r2, [pc, #80] @ (8001eb8 ) - 8001e66: f043 0308 orr.w r3, r3, #8 - 8001e6a: 6193 str r3, [r2, #24] - 8001e6c: 4b12 ldr r3, [pc, #72] @ (8001eb8 ) - 8001e6e: 699b ldr r3, [r3, #24] - 8001e70: f003 0308 and.w r3, r3, #8 - 8001e74: 60fb str r3, [r7, #12] - 8001e76: 68fb ldr r3, [r7, #12] + 8002548: 4b15 ldr r3, [pc, #84] @ (80025a0 ) + 800254a: 699b ldr r3, [r3, #24] + 800254c: 4a14 ldr r2, [pc, #80] @ (80025a0 ) + 800254e: f043 0308 orr.w r3, r3, #8 + 8002552: 6193 str r3, [r2, #24] + 8002554: 4b12 ldr r3, [pc, #72] @ (80025a0 ) + 8002556: 699b ldr r3, [r3, #24] + 8002558: f003 0308 and.w r3, r3, #8 + 800255c: 60fb str r3, [r7, #12] + 800255e: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = I2C2_SCL_CE_Pin|I2C2_SDA_CE_Pin; - 8001e78: f44f 6340 mov.w r3, #3072 @ 0xc00 - 8001e7c: 61bb str r3, [r7, #24] + 8002560: f44f 6340 mov.w r3, #3072 @ 0xc00 + 8002564: 61bb str r3, [r7, #24] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - 8001e7e: 2312 movs r3, #18 - 8001e80: 61fb str r3, [r7, #28] + 8002566: 2312 movs r3, #18 + 8002568: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8001e82: 2302 movs r3, #2 - 8001e84: 627b str r3, [r7, #36] @ 0x24 + 800256a: 2302 movs r3, #2 + 800256c: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8001e86: f107 0318 add.w r3, r7, #24 - 8001e8a: 4619 mov r1, r3 - 8001e8c: 480b ldr r0, [pc, #44] @ (8001ebc ) - 8001e8e: f001 f97f bl 8003190 + 800256e: f107 0318 add.w r3, r7, #24 + 8002572: 4619 mov r1, r3 + 8002574: 480b ldr r0, [pc, #44] @ (80025a4 ) + 8002576: f001 fa83 bl 8003a80 __HAL_RCC_I2C2_CLK_ENABLE(); - 8001e92: 4b09 ldr r3, [pc, #36] @ (8001eb8 ) - 8001e94: 69db ldr r3, [r3, #28] - 8001e96: 4a08 ldr r2, [pc, #32] @ (8001eb8 ) - 8001e98: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 - 8001e9c: 61d3 str r3, [r2, #28] - 8001e9e: 4b06 ldr r3, [pc, #24] @ (8001eb8 ) - 8001ea0: 69db ldr r3, [r3, #28] - 8001ea2: f403 0380 and.w r3, r3, #4194304 @ 0x400000 - 8001ea6: 60bb str r3, [r7, #8] - 8001ea8: 68bb ldr r3, [r7, #8] + 800257a: 4b09 ldr r3, [pc, #36] @ (80025a0 ) + 800257c: 69db ldr r3, [r3, #28] + 800257e: 4a08 ldr r2, [pc, #32] @ (80025a0 ) + 8002580: f443 0380 orr.w r3, r3, #4194304 @ 0x400000 + 8002584: 61d3 str r3, [r2, #28] + 8002586: 4b06 ldr r3, [pc, #24] @ (80025a0 ) + 8002588: 69db ldr r3, [r3, #28] + 800258a: f403 0380 and.w r3, r3, #4194304 @ 0x400000 + 800258e: 60bb str r3, [r7, #8] + 8002590: 68bb ldr r3, [r7, #8] } - 8001eaa: bf00 nop - 8001eac: 3728 adds r7, #40 @ 0x28 - 8001eae: 46bd mov sp, r7 - 8001eb0: bd80 pop {r7, pc} - 8001eb2: bf00 nop - 8001eb4: 40005400 .word 0x40005400 - 8001eb8: 40021000 .word 0x40021000 - 8001ebc: 40010c00 .word 0x40010c00 - 8001ec0: 40005800 .word 0x40005800 + 8002592: bf00 nop + 8002594: 3728 adds r7, #40 @ 0x28 + 8002596: 46bd mov sp, r7 + 8002598: bd80 pop {r7, pc} + 800259a: bf00 nop + 800259c: 40005400 .word 0x40005400 + 80025a0: 40021000 .word 0x40021000 + 80025a4: 40010c00 .word 0x40010c00 + 80025a8: 40005800 .word 0x40005800 -08001ec4
: +080025ac
: /** * @brief The application entry point. * @retval int */ int main(void) { - 8001ec4: b590 push {r4, r7, lr} - 8001ec6: b097 sub sp, #92 @ 0x5c - 8001ec8: af02 add r7, sp, #8 + 80025ac: b590 push {r4, r7, lr} + 80025ae: b095 sub sp, #84 @ 0x54 + 80025b0: af02 add r7, sp, #8 /* USER CODE BEGIN 1 */ uint8_t tempString[15] = {0}; - 8001eca: f107 0308 add.w r3, r7, #8 - 8001ece: 2200 movs r2, #0 - 8001ed0: 601a str r2, [r3, #0] - 8001ed2: 605a str r2, [r3, #4] - 8001ed4: 609a str r2, [r3, #8] - 8001ed6: f8c3 200b str.w r2, [r3, #11] + 80025b2: 1d3b adds r3, r7, #4 + 80025b4: 2200 movs r2, #0 + 80025b6: 601a str r2, [r3, #0] + 80025b8: 605a str r2, [r3, #4] + 80025ba: 609a str r2, [r3, #8] + 80025bc: f8c3 200b str.w r2, [r3, #11] uint8_t averages = 0; - 8001eda: 2300 movs r3, #0 - 8001edc: f887 304f strb.w r3, [r7, #79] @ 0x4f + 80025c0: 2300 movs r3, #0 + 80025c2: f887 3047 strb.w r3, [r7, #71] @ 0x47 uint8_t newline = '\n'; - 8001ee0: 230a movs r3, #10 - 8001ee2: 71fb strb r3, [r7, #7] + 80025c6: 230a movs r3, #10 + 80025c8: 70fb strb r3, [r7, #3] // Variables for timing uint32_t previous_millis_green = 0; - 8001ee4: 2300 movs r3, #0 - 8001ee6: 64bb str r3, [r7, #72] @ 0x48 + 80025ca: 2300 movs r3, #0 + 80025cc: 643b str r3, [r7, #64] @ 0x40 uint32_t previous_millis_red = 0; - 8001ee8: 2300 movs r3, #0 - 8001eea: 643b str r3, [r7, #64] @ 0x40 + 80025ce: 2300 movs r3, #0 + 80025d0: 63bb str r3, [r7, #56] @ 0x38 uint32_t current_millis; float reference_resistor_100R = 0, reference_resistor_1K = 0, temperature_RTD = 0, thermal_compensaded_EC = 0; - 8001eec: f04f 0300 mov.w r3, #0 - 8001ef0: 63fb str r3, [r7, #60] @ 0x3c - 8001ef2: f04f 0300 mov.w r3, #0 - 8001ef6: 63bb str r3, [r7, #56] @ 0x38 - 8001ef8: f04f 0300 mov.w r3, #0 - 8001efc: 647b str r3, [r7, #68] @ 0x44 - 8001efe: f04f 0300 mov.w r3, #0 - 8001f02: 637b str r3, [r7, #52] @ 0x34 + 80025d2: f04f 0300 mov.w r3, #0 + 80025d6: 637b str r3, [r7, #52] @ 0x34 + 80025d8: f04f 0300 mov.w r3, #0 + 80025dc: 633b str r3, [r7, #48] @ 0x30 + 80025de: f04f 0300 mov.w r3, #0 + 80025e2: 63fb str r3, [r7, #60] @ 0x3c + 80025e4: f04f 0300 mov.w r3, #0 + 80025e8: 62fb str r3, [r7, #44] @ 0x2c float mag_rtd_reference = 0, mag_ec_reference = 0, mag_rtd = 0, mag_ec = 0; - 8001f04: f04f 0300 mov.w r3, #0 - 8001f08: 633b str r3, [r7, #48] @ 0x30 - 8001f0a: f04f 0300 mov.w r3, #0 - 8001f0e: 62fb str r3, [r7, #44] @ 0x2c - 8001f10: f04f 0300 mov.w r3, #0 - 8001f14: 62bb str r3, [r7, #40] @ 0x28 - 8001f16: f04f 0300 mov.w r3, #0 - 8001f1a: 627b str r3, [r7, #36] @ 0x24 + 80025ea: f04f 0300 mov.w r3, #0 + 80025ee: 62bb str r3, [r7, #40] @ 0x28 + 80025f0: f04f 0300 mov.w r3, #0 + 80025f4: 627b str r3, [r7, #36] @ 0x24 + 80025f6: f04f 0300 mov.w r3, #0 + 80025fa: 623b str r3, [r7, #32] + 80025fc: f04f 0300 mov.w r3, #0 + 8002600: 61fb str r3, [r7, #28] /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 8001f1c: f000 fce0 bl 80028e0 + 8002602: f000 fde5 bl 80031d0 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 8001f20: f000 f920 bl 8002164 + 8002606: f000 f911 bl 800282c /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 8001f24: f7ff fe66 bl 8001bf4 + 800260a: f7ff fe67 bl 80022dc MX_ADC1_Init(); - 8001f28: f7ff fa4e bl 80013c8 + 800260e: f7ff fa53 bl 8001ab8 MX_ADC2_Init(); - 8001f2c: f7ff fa8a bl 8001444 + 8002612: f7ff fa8f bl 8001b34 MX_I2C1_Init(); - 8001f30: f7ff ff00 bl 8001d34 + 8002616: f7ff ff01 bl 800241c MX_I2C2_Init(); - 8001f34: f7ff ff2c bl 8001d90 + 800261a: f7ff ff2d bl 8002478 MX_USART1_UART_Init(); - 8001f38: f000 fc2e bl 8002798 + 800261e: f000 fd33 bl 8003088 MX_TIM3_Init(); - 8001f3c: f000 fbb8 bl 80026b0 + 8002622: f000 fcbd bl 8002fa0 /* USER CODE BEGIN 2 */ HAL_TIM_Base_Start_IT(&htim3); - 8001f40: 4879 ldr r0, [pc, #484] @ (8002128 ) - 8001f42: f003 f83d bl 8004fc0 + 8002626: 4873 ldr r0, [pc, #460] @ (80027f4 ) + 8002628: f003 f942 bl 80058b0 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET); // LED Green Off - 8001f46: 2201 movs r2, #1 - 8001f48: 2110 movs r1, #16 - 8001f4a: 4878 ldr r0, [pc, #480] @ (800212c ) - 8001f4c: f001 fabb bl 80034c6 + 800262c: 2201 movs r2, #1 + 800262e: 2110 movs r1, #16 + 8002630: 4871 ldr r0, [pc, #452] @ (80027f8 ) + 8002632: f001 fbc0 bl 8003db6 HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET); // LED Red Off - 8001f50: 2201 movs r2, #1 - 8001f52: 2120 movs r1, #32 - 8001f54: 4875 ldr r0, [pc, #468] @ (800212c ) - 8001f56: f001 fab6 bl 80034c6 + 8002636: 2201 movs r2, #1 + 8002638: 2120 movs r1, #32 + 800263a: 486f ldr r0, [pc, #444] @ (80027f8 ) + 800263c: f001 fbbb bl 8003db6 digital_outputs_init(); - 8001f5a: f7ff fdb3 bl 8001ac4 + 8002640: f7ff fdb4 bl 80021ac rs485_init(); - 8001f5e: f000 fa47 bl 80023f0 + 8002644: f000 fb4c bl 8002ce0 ADG715_ResetChannels(); - 8001f62: f7ff fa13 bl 800138c + 8002648: f7ff fa18 bl 8001a7c ADS1015_Init(); // Initializes pH Measurement - 8001f66: f7ff fb5d bl 8001624 + 800264c: f7ff fb62 bl 8001d14 AD5934_Init(); // Initializes CE and RTD Measurement - 8001f6a: f7fe fc7b bl 8000864 + 8002650: f7fe fc9e bl 8000f90 /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ - while(averages<20) - 8001f6e: e016 b.n 8001f9e + while(averages<50) + 8002654: e017 b.n 8002686 { AD5934_Process_System(); - 8001f70: f7fe fec4 bl 8000cfc + 8002656: f7fe fee1 bl 800141c ADS1015_Process_System(); - 8001f74: f7ff fbb4 bl 80016e0 + 800265a: f7ff fbb9 bl 8001dd0 current_millis = g_ms_counter; - 8001f78: 4b6d ldr r3, [pc, #436] @ (8002130 ) - 8001f7a: 681b ldr r3, [r3, #0] - 8001f7c: 623b str r3, [r7, #32] + 800265e: 4b67 ldr r3, [pc, #412] @ (80027fc ) + 8002660: 681b ldr r3, [r3, #0] + 8002662: 61bb str r3, [r7, #24] - if((current_millis % 100) == 0) // Send data each 40ms - 8001f7e: 6a3a ldr r2, [r7, #32] - 8001f80: 4b6c ldr r3, [pc, #432] @ (8002134 ) - 8001f82: fba3 1302 umull r1, r3, r3, r2 - 8001f86: 095b lsrs r3, r3, #5 - 8001f88: 2164 movs r1, #100 @ 0x64 - 8001f8a: fb01 f303 mul.w r3, r1, r3 - 8001f8e: 1ad3 subs r3, r2, r3 - 8001f90: 2b00 cmp r3, #0 - 8001f92: d104 bne.n 8001f9e + if((current_millis % 20) == 0) // Send data each 40ms + 8002664: 69b9 ldr r1, [r7, #24] + 8002666: 4b66 ldr r3, [pc, #408] @ (8002800 ) + 8002668: fba3 2301 umull r2, r3, r3, r1 + 800266c: 091a lsrs r2, r3, #4 + 800266e: 4613 mov r3, r2 + 8002670: 009b lsls r3, r3, #2 + 8002672: 4413 add r3, r2 + 8002674: 009b lsls r3, r3, #2 + 8002676: 1aca subs r2, r1, r3 + 8002678: 2a00 cmp r2, #0 + 800267a: d104 bne.n 8002686 { averages++; - 8001f94: f897 304f ldrb.w r3, [r7, #79] @ 0x4f - 8001f98: 3301 adds r3, #1 - 8001f9a: f887 304f strb.w r3, [r7, #79] @ 0x4f - while(averages<20) - 8001f9e: f897 304f ldrb.w r3, [r7, #79] @ 0x4f - 8001fa2: 2b13 cmp r3, #19 - 8001fa4: d9e4 bls.n 8001f70 + 800267c: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 8002680: 3301 adds r3, #1 + 8002682: f887 3047 strb.w r3, [r7, #71] @ 0x47 + while(averages<50) + 8002686: f897 3047 ldrb.w r3, [r7, #71] @ 0x47 + 800268a: 2b31 cmp r3, #49 @ 0x31 + 800268c: d9e3 bls.n 8002656 } } digital_outputs_toggle(0); - 8001fa6: 2000 movs r0, #0 - 8001fa8: f7ff fe06 bl 8001bb8 + 800268e: 2000 movs r0, #0 + 8002690: f7ff fe06 bl 80022a0 while (1) { AD5934_Process_System(); - 8001fac: f7fe fea6 bl 8000cfc + 8002694: f7fe fec2 bl 800141c ADS1015_Process_System(); - 8001fb0: f7ff fb96 bl 80016e0 + 8002698: f7ff fb9a bl 8001dd0 current_millis = g_ms_counter; - 8001fb4: 4b5e ldr r3, [pc, #376] @ (8002130 ) - 8001fb6: 681b ldr r3, [r3, #0] - 8001fb8: 623b str r3, [r7, #32] + 800269c: 4b57 ldr r3, [pc, #348] @ (80027fc ) + 800269e: 681b ldr r3, [r3, #0] + 80026a0: 61bb str r3, [r7, #24] if((current_millis % 500) == 0) // Send data each 100ms - 8001fba: 6a3a ldr r2, [r7, #32] - 8001fbc: 4b5e ldr r3, [pc, #376] @ (8002138 ) - 8001fbe: fba3 1302 umull r1, r3, r3, r2 - 8001fc2: 095b lsrs r3, r3, #5 - 8001fc4: f44f 71fa mov.w r1, #500 @ 0x1f4 - 8001fc8: fb01 f303 mul.w r3, r1, r3 - 8001fcc: 1ad3 subs r3, r2, r3 - 8001fce: 2b00 cmp r3, #0 - 8001fd0: f040 809c bne.w 800210c + 80026a2: 69ba ldr r2, [r7, #24] + 80026a4: 4b57 ldr r3, [pc, #348] @ (8002804 ) + 80026a6: fba3 1302 umull r1, r3, r3, r2 + 80026aa: 095b lsrs r3, r3, #5 + 80026ac: f44f 71fa mov.w r1, #500 @ 0x1f4 + 80026b0: fb01 f303 mul.w r3, r1, r3 + 80026b4: 1ad3 subs r3, r2, r3 + 80026b6: 2b00 cmp r3, #0 + 80026b8: f040 808d bne.w 80027d6 { if (g_rtd_filter.value_valid) // PT100 or PT1000 in °C - 8001fd4: 4b59 ldr r3, [pc, #356] @ (800213c ) - 8001fd6: f893 3058 ldrb.w r3, [r3, #88] @ 0x58 - 8001fda: 2b00 cmp r3, #0 - 8001fdc: d02b beq.n 8002036 + 80026bc: 4b52 ldr r3, [pc, #328] @ (8002808 ) + 80026be: f893 3058 ldrb.w r3, [r3, #88] @ 0x58 + 80026c2: 2b00 cmp r3, #0 + 80026c4: d022 beq.n 800270c { temperature_RTD = AD5934_Calculate_Temperature(g_ref_100R_LowGain_filter.filtered_value, g_ref_1K_MidGain_filter.filtered_value, g_rtd_filter.filtered_value);// AD5934_GetImpedance(mag_reference,mag_rtd);// - 8001fde: 4b58 ldr r3, [pc, #352] @ (8002140 ) - 8001fe0: 6d5b ldr r3, [r3, #84] @ 0x54 - 8001fe2: 4a58 ldr r2, [pc, #352] @ (8002144 ) - 8001fe4: 6d51 ldr r1, [r2, #84] @ 0x54 - 8001fe6: 4a55 ldr r2, [pc, #340] @ (800213c ) - 8001fe8: 6d52 ldr r2, [r2, #84] @ 0x54 - 8001fea: 4618 mov r0, r3 - 8001fec: f7fe fc86 bl 80008fc - 8001ff0: 6478 str r0, [r7, #68] @ 0x44 + 80026c6: 4b51 ldr r3, [pc, #324] @ (800280c ) + 80026c8: 6d5b ldr r3, [r3, #84] @ 0x54 + 80026ca: 4a51 ldr r2, [pc, #324] @ (8002810 ) + 80026cc: 6d51 ldr r1, [r2, #84] @ 0x54 + 80026ce: 4a4e ldr r2, [pc, #312] @ (8002808 ) + 80026d0: 6d52 ldr r2, [r2, #84] @ 0x54 + 80026d2: 4618 mov r0, r3 + 80026d4: f7fe fca8 bl 8001028 + 80026d8: 63f8 str r0, [r7, #60] @ 0x3c //uint16_t rtd_final = AD5934_RTD_OUT_SCALE_MAX - AD5934_Compress_To_IntScale(g_rtd_filter.filtered_value, current_rtd_mux); - uint16_t rtd_final = AD5934_Compress_To_IntScale(temperature_RTD, current_rtd_mux); - 8001ff2: 4b55 ldr r3, [pc, #340] @ (8002148 ) - 8001ff4: 781b ldrb r3, [r3, #0] - 8001ff6: 4619 mov r1, r3 - 8001ff8: 6c78 ldr r0, [r7, #68] @ 0x44 - 8001ffa: f7fe fdc3 bl 8000b84 - 8001ffe: 4603 mov r3, r0 - 8002000: 83fb strh r3, [r7, #30] - intToStr(rtd_final, tempString); - 8002002: f9b7 301e ldrsh.w r3, [r7, #30] - 8002006: f107 0208 add.w r2, r7, #8 - 800200a: 4611 mov r1, r2 - 800200c: 4618 mov r0, r3 - 800200e: f000 f8f9 bl 8002204 - //FloatToString(tempString, temperature_RTD); + //uint16_t rtd_final = AD5934_Compress_To_IntScale(temperature_RTD, current_rtd_mux); + //intToStr(rtd_final, tempString); + FloatToString(tempString, temperature_RTD); + 80026da: 6bf8 ldr r0, [r7, #60] @ 0x3c + 80026dc: f7fd ffcc bl 8000678 <__aeabi_f2d> + 80026e0: 4602 mov r2, r0 + 80026e2: 460b mov r3, r1 + 80026e4: 1d39 adds r1, r7, #4 + 80026e6: 4608 mov r0, r1 + 80026e8: f000 f8f0 bl 80028cc rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); - 8002012: f107 0308 add.w r3, r7, #8 - 8002016: 4618 mov r0, r3 - 8002018: f7fe f898 bl 800014c - 800201c: 4603 mov r3, r0 - 800201e: b29a uxth r2, r3 - 8002020: f107 0308 add.w r3, r7, #8 - 8002024: 4611 mov r1, r2 - 8002026: 4618 mov r0, r3 - 8002028: f000 fa0e bl 8002448 + 80026ec: 1d3b adds r3, r7, #4 + 80026ee: 4618 mov r0, r3 + 80026f0: f7fd fd2c bl 800014c + 80026f4: 4603 mov r3, r0 + 80026f6: b29a uxth r2, r3 + 80026f8: 1d3b adds r3, r7, #4 + 80026fa: 4611 mov r1, r2 + 80026fc: 4618 mov r0, r3 + 80026fe: f000 fb1b bl 8002d38 rs485_send_broadcast(&newline, 1); - 800202c: 1dfb adds r3, r7, #7 - 800202e: 2101 movs r1, #1 - 8002030: 4618 mov r0, r3 - 8002032: f000 fa09 bl 8002448 + 8002702: 1cfb adds r3, r7, #3 + 8002704: 2101 movs r1, #1 + 8002706: 4618 mov r0, r3 + 8002708: f000 fb16 bl 8002d38 } if (g_ec_filter.value_valid) // EC - 8002036: 4b45 ldr r3, [pc, #276] @ (800214c ) - 8002038: f893 3058 ldrb.w r3, [r3, #88] @ 0x58 - 800203c: 2b00 cmp r3, #0 - 800203e: d035 beq.n 80020ac + 800270c: 4b41 ldr r3, [pc, #260] @ (8002814 ) + 800270e: f893 3058 ldrb.w r3, [r3, #88] @ 0x58 + 8002712: 2b00 cmp r3, #0 + 8002714: d032 beq.n 800277c { mag_ec = AD5934_GetAdmittance(g_ref_100R_MidGain_filter.filtered_value, g_ref_1K_MidGain_filter.filtered_value, g_ref_1K_HighGain_filter.filtered_value, g_ref_10K_HighGain_filter.filtered_value, g_ec_filter.filtered_value); - 8002040: 4b43 ldr r3, [pc, #268] @ (8002150 ) - 8002042: 6d58 ldr r0, [r3, #84] @ 0x54 - 8002044: 4b3f ldr r3, [pc, #252] @ (8002144 ) - 8002046: 6d59 ldr r1, [r3, #84] @ 0x54 - 8002048: 4b42 ldr r3, [pc, #264] @ (8002154 ) - 800204a: 6d5a ldr r2, [r3, #84] @ 0x54 - 800204c: 4b42 ldr r3, [pc, #264] @ (8002158 ) - 800204e: 6d5c ldr r4, [r3, #84] @ 0x54 - 8002050: 4b3e ldr r3, [pc, #248] @ (800214c ) - 8002052: 6d5b ldr r3, [r3, #84] @ 0x54 - 8002054: 9300 str r3, [sp, #0] - 8002056: 4623 mov r3, r4 - 8002058: f7fe fd14 bl 8000a84 - 800205c: 6278 str r0, [r7, #36] @ 0x24 + 8002716: 4b40 ldr r3, [pc, #256] @ (8002818 ) + 8002718: 6d58 ldr r0, [r3, #84] @ 0x54 + 800271a: 4b3d ldr r3, [pc, #244] @ (8002810 ) + 800271c: 6d59 ldr r1, [r3, #84] @ 0x54 + 800271e: 4b3f ldr r3, [pc, #252] @ (800281c ) + 8002720: 6d5a ldr r2, [r3, #84] @ 0x54 + 8002722: 4b3f ldr r3, [pc, #252] @ (8002820 ) + 8002724: 6d5c ldr r4, [r3, #84] @ 0x54 + 8002726: 4b3b ldr r3, [pc, #236] @ (8002814 ) + 8002728: 6d5b ldr r3, [r3, #84] @ 0x54 + 800272a: 9300 str r3, [sp, #0] + 800272c: 4623 mov r3, r4 + 800272e: f7fe fd39 bl 80011a4 + 8002732: 61f8 str r0, [r7, #28] thermal_compensaded_EC = AD5934_EC_Compensate_Magnitude_To_25C(mag_ec, temperature_RTD); - 800205e: 6c79 ldr r1, [r7, #68] @ 0x44 - 8002060: 6a78 ldr r0, [r7, #36] @ 0x24 - 8002062: f7fe fcdb bl 8000a1c - 8002066: 6378 str r0, [r7, #52] @ 0x34 - uint16_t ec_final = AD5934_Compress_To_IntScale(mag_ec, current_ec_mux); - 8002068: 4b3c ldr r3, [pc, #240] @ (800215c ) - 800206a: 781b ldrb r3, [r3, #0] - 800206c: 4619 mov r1, r3 - 800206e: 6a78 ldr r0, [r7, #36] @ 0x24 - 8002070: f7fe fd88 bl 8000b84 - 8002074: 4603 mov r3, r0 - 8002076: 83bb strh r3, [r7, #28] - intToStr(ec_final, tempString); - 8002078: f9b7 301c ldrsh.w r3, [r7, #28] - 800207c: f107 0208 add.w r2, r7, #8 - 8002080: 4611 mov r1, r2 - 8002082: 4618 mov r0, r3 - 8002084: f000 f8be bl 8002204 + 8002734: 6bf9 ldr r1, [r7, #60] @ 0x3c + 8002736: 69f8 ldr r0, [r7, #28] + 8002738: f7fe fd06 bl 8001148 + 800273c: 62f8 str r0, [r7, #44] @ 0x2c //FloatToString(tempString, thermal_compensaded_EC); + //rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); + //rs485_send_broadcast(&newline, 1); + uint16_t ec_final = AD5934_Compress_To_IntScale(thermal_compensaded_EC, current_ec_mux); + 800273e: 4b39 ldr r3, [pc, #228] @ (8002824 ) + 8002740: 781b ldrb r3, [r3, #0] + 8002742: 4619 mov r1, r3 + 8002744: 6af8 ldr r0, [r7, #44] @ 0x2c + 8002746: f7fe fdad bl 80012a4 + 800274a: 4603 mov r3, r0 + 800274c: 82fb strh r3, [r7, #22] + intToStr(ec_final, tempString); + 800274e: f9b7 3016 ldrsh.w r3, [r7, #22] + 8002752: 1d3a adds r2, r7, #4 + 8002754: 4611 mov r1, r2 + 8002756: 4618 mov r0, r3 + 8002758: f000 f9cc bl 8002af4 rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); - 8002088: f107 0308 add.w r3, r7, #8 - 800208c: 4618 mov r0, r3 - 800208e: f7fe f85d bl 800014c - 8002092: 4603 mov r3, r0 - 8002094: b29a uxth r2, r3 - 8002096: f107 0308 add.w r3, r7, #8 - 800209a: 4611 mov r1, r2 - 800209c: 4618 mov r0, r3 - 800209e: f000 f9d3 bl 8002448 + 800275c: 1d3b adds r3, r7, #4 + 800275e: 4618 mov r0, r3 + 8002760: f7fd fcf4 bl 800014c + 8002764: 4603 mov r3, r0 + 8002766: b29a uxth r2, r3 + 8002768: 1d3b adds r3, r7, #4 + 800276a: 4611 mov r1, r2 + 800276c: 4618 mov r0, r3 + 800276e: f000 fae3 bl 8002d38 rs485_send_broadcast(&newline, 1); - 80020a2: 1dfb adds r3, r7, #7 - 80020a4: 2101 movs r1, #1 - 80020a6: 4618 mov r0, r3 - 80020a8: f000 f9ce bl 8002448 + 8002772: 1cfb adds r3, r7, #3 + 8002774: 2101 movs r1, #1 + 8002776: 4618 mov r0, r3 + 8002778: f000 fade bl 8002d38 } if (g_ph_filter.value_valid) // pH - 80020ac: 4b2c ldr r3, [pc, #176] @ (8002160 ) - 80020ae: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 80020b2: 2b00 cmp r3, #0 - 80020b4: d025 beq.n 8002102 + 800277c: 4b2a ldr r3, [pc, #168] @ (8002828 ) + 800277e: f893 3058 ldrb.w r3, [r3, #88] @ 0x58 + 8002782: 2b00 cmp r3, #0 + 8002784: d022 beq.n 80027cc { uint16_t ph_final = ADS1015_Compress_To_IntScale(g_ph_filter.filtered_value); - 80020b6: 4b2a ldr r3, [pc, #168] @ (8002160 ) - 80020b8: 6b9b ldr r3, [r3, #56] @ 0x38 - 80020ba: 4618 mov r0, r3 - 80020bc: f7ff facc bl 8001658 - 80020c0: 4603 mov r3, r0 - 80020c2: 837b strh r3, [r7, #26] + 8002786: 4b28 ldr r3, [pc, #160] @ (8002828 ) + 8002788: 6d5b ldr r3, [r3, #84] @ 0x54 + 800278a: 4618 mov r0, r3 + 800278c: f7ff fadc bl 8001d48 + 8002790: 4603 mov r3, r0 + 8002792: 82bb strh r3, [r7, #20] intToStr(ph_final, tempString); - 80020c4: f9b7 301a ldrsh.w r3, [r7, #26] - 80020c8: f107 0208 add.w r2, r7, #8 - 80020cc: 4611 mov r1, r2 - 80020ce: 4618 mov r0, r3 - 80020d0: f000 f898 bl 8002204 + 8002794: f9b7 3014 ldrsh.w r3, [r7, #20] + 8002798: 1d3a adds r2, r7, #4 + 800279a: 4611 mov r1, r2 + 800279c: 4618 mov r0, r3 + 800279e: f000 f9a9 bl 8002af4 //float ph_final = g_ph_filter.filtered_value; //FloatToString(tempString, ph_final); rs485_send_broadcast(tempString, (strlen((uint8_t*)tempString))); - 80020d4: f107 0308 add.w r3, r7, #8 - 80020d8: 4618 mov r0, r3 - 80020da: f7fe f837 bl 800014c - 80020de: 4603 mov r3, r0 - 80020e0: b29a uxth r2, r3 - 80020e2: f107 0308 add.w r3, r7, #8 - 80020e6: 4611 mov r1, r2 - 80020e8: 4618 mov r0, r3 - 80020ea: f000 f9ad bl 8002448 + 80027a2: 1d3b adds r3, r7, #4 + 80027a4: 4618 mov r0, r3 + 80027a6: f7fd fcd1 bl 800014c + 80027aa: 4603 mov r3, r0 + 80027ac: b29a uxth r2, r3 + 80027ae: 1d3b adds r3, r7, #4 + 80027b0: 4611 mov r1, r2 + 80027b2: 4618 mov r0, r3 + 80027b4: f000 fac0 bl 8002d38 rs485_send_broadcast(&newline, 1); - 80020ee: 1dfb adds r3, r7, #7 - 80020f0: 2101 movs r1, #1 - 80020f2: 4618 mov r0, r3 - 80020f4: f000 f9a8 bl 8002448 + 80027b8: 1cfb adds r3, r7, #3 + 80027ba: 2101 movs r1, #1 + 80027bc: 4618 mov r0, r3 + 80027be: f000 fabb bl 8002d38 rs485_send_broadcast(&newline, 1); - 80020f8: 1dfb adds r3, r7, #7 - 80020fa: 2101 movs r1, #1 - 80020fc: 4618 mov r0, r3 - 80020fe: f000 f9a3 bl 8002448 + 80027c2: 1cfb adds r3, r7, #3 + 80027c4: 2101 movs r1, #1 + 80027c6: 4618 mov r0, r3 + 80027c8: f000 fab6 bl 8002d38 } rs485_send_broadcast(&newline, 1); - 8002102: 1dfb adds r3, r7, #7 - 8002104: 2101 movs r1, #1 - 8002106: 4618 mov r0, r3 - 8002108: f000 f99e bl 8002448 + 80027cc: 1cfb adds r3, r7, #3 + 80027ce: 2101 movs r1, #1 + 80027d0: 4618 mov r0, r3 + 80027d2: f000 fab1 bl 8002d38 } // Piscar LED verde em PB4 a cada 1 segundo if ((current_millis - previous_millis_green) >= 1000) - 800210c: 6a3a ldr r2, [r7, #32] - 800210e: 6cbb ldr r3, [r7, #72] @ 0x48 - 8002110: 1ad3 subs r3, r2, r3 - 8002112: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 - 8002116: f4ff af49 bcc.w 8001fac + 80027d6: 69ba ldr r2, [r7, #24] + 80027d8: 6c3b ldr r3, [r7, #64] @ 0x40 + 80027da: 1ad3 subs r3, r2, r3 + 80027dc: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 + 80027e0: f4ff af58 bcc.w 8002694 { previous_millis_green = current_millis; - 800211a: 6a3b ldr r3, [r7, #32] - 800211c: 64bb str r3, [r7, #72] @ 0x48 + 80027e4: 69bb ldr r3, [r7, #24] + 80027e6: 643b str r3, [r7, #64] @ 0x40 HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_4); - 800211e: 2110 movs r1, #16 - 8002120: 4802 ldr r0, [pc, #8] @ (800212c ) - 8002122: f001 f9e8 bl 80034f6 + 80027e8: 2110 movs r1, #16 + 80027ea: 4803 ldr r0, [pc, #12] @ (80027f8 ) + 80027ec: f001 fafb bl 8003de6 AD5934_Process_System(); - 8002126: e741 b.n 8001fac - 8002128: 20000524 .word 0x20000524 - 800212c: 40010c00 .word 0x40010c00 - 8002130: 20000084 .word 0x20000084 - 8002134: 51eb851f .word 0x51eb851f - 8002138: 10624dd3 .word 0x10624dd3 - 800213c: 2000008c .word 0x2000008c - 8002140: 20000144 .word 0x20000144 - 8002144: 20000258 .word 0x20000258 - 8002148: 20000001 .word 0x20000001 - 800214c: 200000e8 .word 0x200000e8 - 8002150: 200001a0 .word 0x200001a0 - 8002154: 200002b4 .word 0x200002b4 - 8002158: 20000310 .word 0x20000310 - 800215c: 20000000 .word 0x20000000 - 8002160: 200003dc .word 0x200003dc + 80027f0: e750 b.n 8002694 + 80027f2: bf00 nop + 80027f4: 200004e4 .word 0x200004e4 + 80027f8: 40010c00 .word 0x40010c00 + 80027fc: 20000084 .word 0x20000084 + 8002800: cccccccd .word 0xcccccccd + 8002804: 10624dd3 .word 0x10624dd3 + 8002808: 2000008c .word 0x2000008c + 800280c: 20000144 .word 0x20000144 + 8002810: 200001fc .word 0x200001fc + 8002814: 200000e8 .word 0x200000e8 + 8002818: 200001a0 .word 0x200001a0 + 800281c: 20000258 .word 0x20000258 + 8002820: 200002b4 .word 0x200002b4 + 8002824: 20000000 .word 0x20000000 + 8002828: 20000380 .word 0x20000380 -08002164 : +0800282c : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 8002164: b580 push {r7, lr} - 8002166: b094 sub sp, #80 @ 0x50 - 8002168: af00 add r7, sp, #0 + 800282c: b580 push {r7, lr} + 800282e: b094 sub sp, #80 @ 0x50 + 8002830: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 800216a: f107 0328 add.w r3, r7, #40 @ 0x28 - 800216e: 2228 movs r2, #40 @ 0x28 - 8002170: 2100 movs r1, #0 - 8002172: 4618 mov r0, r3 - 8002174: f004 f8dc bl 8006330 + 8002832: f107 0328 add.w r3, r7, #40 @ 0x28 + 8002836: 2228 movs r2, #40 @ 0x28 + 8002838: 2100 movs r1, #0 + 800283a: 4618 mov r0, r3 + 800283c: f004 f9f0 bl 8006c20 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 8002178: f107 0314 add.w r3, r7, #20 - 800217c: 2200 movs r2, #0 - 800217e: 601a str r2, [r3, #0] - 8002180: 605a str r2, [r3, #4] - 8002182: 609a str r2, [r3, #8] - 8002184: 60da str r2, [r3, #12] - 8002186: 611a str r2, [r3, #16] + 8002840: f107 0314 add.w r3, r7, #20 + 8002844: 2200 movs r2, #0 + 8002846: 601a str r2, [r3, #0] + 8002848: 605a str r2, [r3, #4] + 800284a: 609a str r2, [r3, #8] + 800284c: 60da str r2, [r3, #12] + 800284e: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 8002188: 1d3b adds r3, r7, #4 - 800218a: 2200 movs r2, #0 - 800218c: 601a str r2, [r3, #0] - 800218e: 605a str r2, [r3, #4] - 8002190: 609a str r2, [r3, #8] - 8002192: 60da str r2, [r3, #12] + 8002850: 1d3b adds r3, r7, #4 + 8002852: 2200 movs r2, #0 + 8002854: 601a str r2, [r3, #0] + 8002856: 605a str r2, [r3, #4] + 8002858: 609a str r2, [r3, #8] + 800285a: 60da str r2, [r3, #12] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 8002194: 2301 movs r3, #1 - 8002196: 62bb str r3, [r7, #40] @ 0x28 + 800285c: 2301 movs r3, #1 + 800285e: 62bb str r3, [r7, #40] @ 0x28 RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 8002198: f44f 3380 mov.w r3, #65536 @ 0x10000 - 800219c: 62fb str r3, [r7, #44] @ 0x2c + 8002860: f44f 3380 mov.w r3, #65536 @ 0x10000 + 8002864: 62fb str r3, [r7, #44] @ 0x2c RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; - 800219e: 2300 movs r3, #0 - 80021a0: 647b str r3, [r7, #68] @ 0x44 + 8002866: 2300 movs r3, #0 + 8002868: 647b str r3, [r7, #68] @ 0x44 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 80021a2: f107 0328 add.w r3, r7, #40 @ 0x28 - 80021a6: 4618 mov r0, r3 - 80021a8: f002 f9f2 bl 8004590 - 80021ac: 4603 mov r3, r0 - 80021ae: 2b00 cmp r3, #0 - 80021b0: d001 beq.n 80021b6 + 800286a: f107 0328 add.w r3, r7, #40 @ 0x28 + 800286e: 4618 mov r0, r3 + 8002870: f002 fb06 bl 8004e80 + 8002874: 4603 mov r3, r0 + 8002876: 2b00 cmp r3, #0 + 8002878: d001 beq.n 800287e { Error_Handler(); - 80021b2: f000 f90b bl 80023cc + 800287a: f000 fa1f bl 8002cbc } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 80021b6: 230f movs r3, #15 - 80021b8: 617b str r3, [r7, #20] + 800287e: 230f movs r3, #15 + 8002880: 617b str r3, [r7, #20] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE; - 80021ba: 2301 movs r3, #1 - 80021bc: 61bb str r3, [r7, #24] + 8002882: 2301 movs r3, #1 + 8002884: 61bb str r3, [r7, #24] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 80021be: 2300 movs r3, #0 - 80021c0: 61fb str r3, [r7, #28] + 8002886: 2300 movs r3, #0 + 8002888: 61fb str r3, [r7, #28] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 80021c2: 2300 movs r3, #0 - 80021c4: 623b str r3, [r7, #32] + 800288a: 2300 movs r3, #0 + 800288c: 623b str r3, [r7, #32] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 80021c6: 2300 movs r3, #0 - 80021c8: 627b str r3, [r7, #36] @ 0x24 + 800288e: 2300 movs r3, #0 + 8002890: 627b str r3, [r7, #36] @ 0x24 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - 80021ca: f107 0314 add.w r3, r7, #20 - 80021ce: 2100 movs r1, #0 - 80021d0: 4618 mov r0, r3 - 80021d2: f002 fc5f bl 8004a94 - 80021d6: 4603 mov r3, r0 - 80021d8: 2b00 cmp r3, #0 - 80021da: d001 beq.n 80021e0 + 8002892: f107 0314 add.w r3, r7, #20 + 8002896: 2100 movs r1, #0 + 8002898: 4618 mov r0, r3 + 800289a: f002 fd73 bl 8005384 + 800289e: 4603 mov r3, r0 + 80028a0: 2b00 cmp r3, #0 + 80028a2: d001 beq.n 80028a8 { Error_Handler(); - 80021dc: f000 f8f6 bl 80023cc + 80028a4: f000 fa0a bl 8002cbc } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC; - 80021e0: 2302 movs r3, #2 - 80021e2: 607b str r3, [r7, #4] + 80028a8: 2302 movs r3, #2 + 80028aa: 607b str r3, [r7, #4] PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV8; - 80021e4: f44f 4340 mov.w r3, #49152 @ 0xc000 - 80021e8: 60fb str r3, [r7, #12] + 80028ac: f44f 4340 mov.w r3, #49152 @ 0xc000 + 80028b0: 60fb str r3, [r7, #12] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 80021ea: 1d3b adds r3, r7, #4 - 80021ec: 4618 mov r0, r3 - 80021ee: f002 fde1 bl 8004db4 - 80021f2: 4603 mov r3, r0 - 80021f4: 2b00 cmp r3, #0 - 80021f6: d001 beq.n 80021fc + 80028b2: 1d3b adds r3, r7, #4 + 80028b4: 4618 mov r0, r3 + 80028b6: f002 fef5 bl 80056a4 + 80028ba: 4603 mov r3, r0 + 80028bc: 2b00 cmp r3, #0 + 80028be: d001 beq.n 80028c4 { Error_Handler(); - 80021f8: f000 f8e8 bl 80023cc + 80028c0: f000 f9fc bl 8002cbc } } - 80021fc: bf00 nop - 80021fe: 3750 adds r7, #80 @ 0x50 - 8002200: 46bd mov sp, r7 - 8002202: bd80 pop {r7, pc} + 80028c4: bf00 nop + 80028c6: 3750 adds r7, #80 @ 0x50 + 80028c8: 46bd mov sp, r7 + 80028ca: bd80 pop {r7, pc} -08002204 : +080028cc : + * @param val - value to be converted + * + * @return None. +*******************************************************************************/ +void FloatToString(uint8_t *buf, double val) +{ + 80028cc: b5b0 push {r4, r5, r7, lr} + 80028ce: b096 sub sp, #88 @ 0x58 + 80028d0: af00 add r7, sp, #0 + 80028d2: 60f8 str r0, [r7, #12] + 80028d4: e9c7 2300 strd r2, r3, [r7] + char temp[20]; // Buffer auxiliar para construção segura + int i = 0; + 80028d8: 2300 movs r3, #0 + 80028da: 657b str r3, [r7, #84] @ 0x54 + + // 1. Tratar sinal negativo + if (val < 0) { + 80028dc: f04f 0200 mov.w r2, #0 + 80028e0: f04f 0300 mov.w r3, #0 + 80028e4: e9d7 0100 ldrd r0, r1, [r7] + 80028e8: f7fd ff7e bl 80007e8 <__aeabi_dcmplt> + 80028ec: 4603 mov r3, r0 + 80028ee: 2b00 cmp r3, #0 + 80028f0: d00d beq.n 800290e + temp[i++] = '-'; + 80028f2: 6d7b ldr r3, [r7, #84] @ 0x54 + 80028f4: 1c5a adds r2, r3, #1 + 80028f6: 657a str r2, [r7, #84] @ 0x54 + 80028f8: 3358 adds r3, #88 @ 0x58 + 80028fa: 443b add r3, r7 + 80028fc: 222d movs r2, #45 @ 0x2d + 80028fe: f803 2c30 strb.w r2, [r3, #-48] + val = -val; + 8002902: 683c ldr r4, [r7, #0] + 8002904: 687b ldr r3, [r7, #4] + 8002906: f083 4500 eor.w r5, r3, #2147483648 @ 0x80000000 + 800290a: e9c7 4500 strd r4, r5, [r7] + } + + // 2. Separar parte inteira e fracionária + long intPart = (long)val; + 800290e: e9d7 0100 ldrd r0, r1, [r7] + 8002912: f7fd ff91 bl 8000838 <__aeabi_d2iz> + 8002916: 4603 mov r3, r0 + 8002918: 653b str r3, [r7, #80] @ 0x50 + // Multiplicamos por 1000 para obter 3 casas decimais fixas + int fracPart = (int)((val - (double)intPart) * 1000.0 + 0.5); + 800291a: 6d38 ldr r0, [r7, #80] @ 0x50 + 800291c: f7fd fe9a bl 8000654 <__aeabi_i2d> + 8002920: 4602 mov r2, r0 + 8002922: 460b mov r3, r1 + 8002924: e9d7 0100 ldrd r0, r1, [r7] + 8002928: f7fd fd46 bl 80003b8 <__aeabi_dsub> + 800292c: 4602 mov r2, r0 + 800292e: 460b mov r3, r1 + 8002930: 4610 mov r0, r2 + 8002932: 4619 mov r1, r3 + 8002934: f04f 0200 mov.w r2, #0 + 8002938: 4b6a ldr r3, [pc, #424] @ (8002ae4 ) + 800293a: f7fd fc0f bl 800015c <__aeabi_dmul> + 800293e: 4602 mov r2, r0 + 8002940: 460b mov r3, r1 + 8002942: 4610 mov r0, r2 + 8002944: 4619 mov r1, r3 + 8002946: f04f 0200 mov.w r2, #0 + 800294a: 4b67 ldr r3, [pc, #412] @ (8002ae8 ) + 800294c: f7fd fd36 bl 80003bc <__adddf3> + 8002950: 4602 mov r2, r0 + 8002952: 460b mov r3, r1 + 8002954: 4610 mov r0, r2 + 8002956: 4619 mov r1, r3 + 8002958: f7fd ff6e bl 8000838 <__aeabi_d2iz> + 800295c: 4603 mov r3, r0 + 800295e: 63fb str r3, [r7, #60] @ 0x3c + + // 3. Converter a parte inteira para o buffer temp + // Usamos um buffer temporário de inversão para não precisar de lógica complexa de ponteiro + char intRev[12]; + int j = 0; + 8002960: 2300 movs r3, #0 + 8002962: 64fb str r3, [r7, #76] @ 0x4c + + if (intPart == 0) { + 8002964: 6d3b ldr r3, [r7, #80] @ 0x50 + 8002966: 2b00 cmp r3, #0 + 8002968: d126 bne.n 80029b8 + intRev[j++] = '0'; + 800296a: 6cfb ldr r3, [r7, #76] @ 0x4c + 800296c: 1c5a adds r2, r3, #1 + 800296e: 64fa str r2, [r7, #76] @ 0x4c + 8002970: 3358 adds r3, #88 @ 0x58 + 8002972: 443b add r3, r7 + 8002974: 2230 movs r2, #48 @ 0x30 + 8002976: f803 2c3c strb.w r2, [r3, #-60] + 800297a: e020 b.n 80029be + } else { + while (intPart > 0) { + intRev[j++] = (intPart % 10) + '0'; + 800297c: 6d3a ldr r2, [r7, #80] @ 0x50 + 800297e: 4b5b ldr r3, [pc, #364] @ (8002aec ) + 8002980: fb83 1302 smull r1, r3, r3, r2 + 8002984: 1099 asrs r1, r3, #2 + 8002986: 17d3 asrs r3, r2, #31 + 8002988: 1ac9 subs r1, r1, r3 + 800298a: 460b mov r3, r1 + 800298c: 009b lsls r3, r3, #2 + 800298e: 440b add r3, r1 + 8002990: 005b lsls r3, r3, #1 + 8002992: 1ad1 subs r1, r2, r3 + 8002994: b2ca uxtb r2, r1 + 8002996: 6cfb ldr r3, [r7, #76] @ 0x4c + 8002998: 1c59 adds r1, r3, #1 + 800299a: 64f9 str r1, [r7, #76] @ 0x4c + 800299c: 3230 adds r2, #48 @ 0x30 + 800299e: b2d2 uxtb r2, r2 + 80029a0: 3358 adds r3, #88 @ 0x58 + 80029a2: 443b add r3, r7 + 80029a4: f803 2c3c strb.w r2, [r3, #-60] + intPart /= 10; + 80029a8: 6d3b ldr r3, [r7, #80] @ 0x50 + 80029aa: 4a50 ldr r2, [pc, #320] @ (8002aec ) + 80029ac: fb82 1203 smull r1, r2, r2, r3 + 80029b0: 1092 asrs r2, r2, #2 + 80029b2: 17db asrs r3, r3, #31 + 80029b4: 1ad3 subs r3, r2, r3 + 80029b6: 653b str r3, [r7, #80] @ 0x50 + while (intPart > 0) { + 80029b8: 6d3b ldr r3, [r7, #80] @ 0x50 + 80029ba: 2b00 cmp r3, #0 + 80029bc: dcde bgt.n 800297c + } + } + + // Inverter a parte inteira de volta para o buffer principal + for (int k = j - 1; k >= 0; k--) { + 80029be: 6cfb ldr r3, [r7, #76] @ 0x4c + 80029c0: 3b01 subs r3, #1 + 80029c2: 64bb str r3, [r7, #72] @ 0x48 + 80029c4: e00e b.n 80029e4 + temp[i++] = intRev[k]; + 80029c6: 6d7b ldr r3, [r7, #84] @ 0x54 + 80029c8: 1c5a adds r2, r3, #1 + 80029ca: 657a str r2, [r7, #84] @ 0x54 + 80029cc: f107 011c add.w r1, r7, #28 + 80029d0: 6cba ldr r2, [r7, #72] @ 0x48 + 80029d2: 440a add r2, r1 + 80029d4: 7812 ldrb r2, [r2, #0] + 80029d6: 3358 adds r3, #88 @ 0x58 + 80029d8: 443b add r3, r7 + 80029da: f803 2c30 strb.w r2, [r3, #-48] + for (int k = j - 1; k >= 0; k--) { + 80029de: 6cbb ldr r3, [r7, #72] @ 0x48 + 80029e0: 3b01 subs r3, #1 + 80029e2: 64bb str r3, [r7, #72] @ 0x48 + 80029e4: 6cbb ldr r3, [r7, #72] @ 0x48 + 80029e6: 2b00 cmp r3, #0 + 80029e8: daed bge.n 80029c6 + } + + // 4. Adicionar o ponto decimal e a parte fracionária (sempre 3 casas) + temp[i++] = '.'; + 80029ea: 6d7b ldr r3, [r7, #84] @ 0x54 + 80029ec: 1c5a adds r2, r3, #1 + 80029ee: 657a str r2, [r7, #84] @ 0x54 + 80029f0: 3358 adds r3, #88 @ 0x58 + 80029f2: 443b add r3, r7 + 80029f4: 222e movs r2, #46 @ 0x2e + 80029f6: f803 2c30 strb.w r2, [r3, #-48] + + // Garantir que a parte fracionária tenha sempre 3 dígitos (ex: .005 em vez de .5) + int fracBuffer[3]; + fracBuffer[2] = fracPart % 10; // Unidade + 80029fa: 6bf9 ldr r1, [r7, #60] @ 0x3c + 80029fc: 4b3b ldr r3, [pc, #236] @ (8002aec ) + 80029fe: fb83 2301 smull r2, r3, r3, r1 + 8002a02: 109a asrs r2, r3, #2 + 8002a04: 17cb asrs r3, r1, #31 + 8002a06: 1ad2 subs r2, r2, r3 + 8002a08: 4613 mov r3, r2 + 8002a0a: 009b lsls r3, r3, #2 + 8002a0c: 4413 add r3, r2 + 8002a0e: 005b lsls r3, r3, #1 + 8002a10: 1aca subs r2, r1, r3 + 8002a12: 61ba str r2, [r7, #24] + fracBuffer[1] = (fracPart / 10) % 10; // Dezena + 8002a14: 6bfb ldr r3, [r7, #60] @ 0x3c + 8002a16: 4a35 ldr r2, [pc, #212] @ (8002aec ) + 8002a18: fb82 1203 smull r1, r2, r2, r3 + 8002a1c: 1092 asrs r2, r2, #2 + 8002a1e: 17db asrs r3, r3, #31 + 8002a20: 1ad1 subs r1, r2, r3 + 8002a22: 4b32 ldr r3, [pc, #200] @ (8002aec ) + 8002a24: fb83 2301 smull r2, r3, r3, r1 + 8002a28: 109a asrs r2, r3, #2 + 8002a2a: 17cb asrs r3, r1, #31 + 8002a2c: 1ad2 subs r2, r2, r3 + 8002a2e: 4613 mov r3, r2 + 8002a30: 009b lsls r3, r3, #2 + 8002a32: 4413 add r3, r2 + 8002a34: 005b lsls r3, r3, #1 + 8002a36: 1aca subs r2, r1, r3 + 8002a38: 617a str r2, [r7, #20] + fracBuffer[0] = (fracPart / 100) % 10; // Centena + 8002a3a: 6bfb ldr r3, [r7, #60] @ 0x3c + 8002a3c: 4a2c ldr r2, [pc, #176] @ (8002af0 ) + 8002a3e: fb82 1203 smull r1, r2, r2, r3 + 8002a42: 1152 asrs r2, r2, #5 + 8002a44: 17db asrs r3, r3, #31 + 8002a46: 1ad1 subs r1, r2, r3 + 8002a48: 4b28 ldr r3, [pc, #160] @ (8002aec ) + 8002a4a: fb83 2301 smull r2, r3, r3, r1 + 8002a4e: 109a asrs r2, r3, #2 + 8002a50: 17cb asrs r3, r1, #31 + 8002a52: 1ad2 subs r2, r2, r3 + 8002a54: 4613 mov r3, r2 + 8002a56: 009b lsls r3, r3, #2 + 8002a58: 4413 add r3, r2 + 8002a5a: 005b lsls r3, r3, #1 + 8002a5c: 1aca subs r2, r1, r3 + 8002a5e: 613a str r2, [r7, #16] + + for (int k = 0; k <= 2; k++) { + 8002a60: 2300 movs r3, #0 + 8002a62: 647b str r3, [r7, #68] @ 0x44 + 8002a64: e012 b.n 8002a8c + temp[i++] = fracBuffer[k] + '0'; + 8002a66: 6c7b ldr r3, [r7, #68] @ 0x44 + 8002a68: 009b lsls r3, r3, #2 + 8002a6a: 3358 adds r3, #88 @ 0x58 + 8002a6c: 443b add r3, r7 + 8002a6e: f853 3c48 ldr.w r3, [r3, #-72] + 8002a72: b2da uxtb r2, r3 + 8002a74: 6d7b ldr r3, [r7, #84] @ 0x54 + 8002a76: 1c59 adds r1, r3, #1 + 8002a78: 6579 str r1, [r7, #84] @ 0x54 + 8002a7a: 3230 adds r2, #48 @ 0x30 + 8002a7c: b2d2 uxtb r2, r2 + 8002a7e: 3358 adds r3, #88 @ 0x58 + 8002a80: 443b add r3, r7 + 8002a82: f803 2c30 strb.w r2, [r3, #-48] + for (int k = 0; k <= 2; k++) { + 8002a86: 6c7b ldr r3, [r7, #68] @ 0x44 + 8002a88: 3301 adds r3, #1 + 8002a8a: 647b str r3, [r7, #68] @ 0x44 + 8002a8c: 6c7b ldr r3, [r7, #68] @ 0x44 + 8002a8e: 2b02 cmp r3, #2 + 8002a90: dde9 ble.n 8002a66 + } + + // 5. Finalizar a string com o caractere nulo + temp[i] = '\0'; + 8002a92: f107 0228 add.w r2, r7, #40 @ 0x28 + 8002a96: 6d7b ldr r3, [r7, #84] @ 0x54 + 8002a98: 4413 add r3, r2 + 8002a9a: 2200 movs r2, #0 + 8002a9c: 701a strb r2, [r3, #0] + + // 6. Copiar para o buffer de destino final (sem risco de lixo) + int destIdx = 0; + 8002a9e: 2300 movs r3, #0 + 8002aa0: 643b str r3, [r7, #64] @ 0x40 + while (temp[destIdx] != '\0' && destIdx < 15) { // Limite de segurança + 8002aa2: e00b b.n 8002abc + buf[destIdx] = temp[destIdx]; + 8002aa4: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002aa6: 68fa ldr r2, [r7, #12] + 8002aa8: 4413 add r3, r2 + 8002aaa: f107 0128 add.w r1, r7, #40 @ 0x28 + 8002aae: 6c3a ldr r2, [r7, #64] @ 0x40 + 8002ab0: 440a add r2, r1 + 8002ab2: 7812 ldrb r2, [r2, #0] + 8002ab4: 701a strb r2, [r3, #0] + destIdx++; + 8002ab6: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002ab8: 3301 adds r3, #1 + 8002aba: 643b str r3, [r7, #64] @ 0x40 + while (temp[destIdx] != '\0' && destIdx < 15) { // Limite de segurança + 8002abc: f107 0228 add.w r2, r7, #40 @ 0x28 + 8002ac0: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002ac2: 4413 add r3, r2 + 8002ac4: 781b ldrb r3, [r3, #0] + 8002ac6: 2b00 cmp r3, #0 + 8002ac8: d002 beq.n 8002ad0 + 8002aca: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002acc: 2b0e cmp r3, #14 + 8002ace: dde9 ble.n 8002aa4 + } + buf[destIdx] = '\0'; + 8002ad0: 6c3b ldr r3, [r7, #64] @ 0x40 + 8002ad2: 68fa ldr r2, [r7, #12] + 8002ad4: 4413 add r3, r2 + 8002ad6: 2200 movs r2, #0 + 8002ad8: 701a strb r2, [r3, #0] } + 8002ada: bf00 nop + 8002adc: 3758 adds r7, #88 @ 0x58 + 8002ade: 46bd mov sp, r7 + 8002ae0: bdb0 pop {r4, r5, r7, pc} + 8002ae2: bf00 nop + 8002ae4: 408f4000 .word 0x408f4000 + 8002ae8: 3fe00000 .word 0x3fe00000 + 8002aec: 66666667 .word 0x66666667 + 8002af0: 51eb851f .word 0x51eb851f + +08002af4 : void intToStr(int16_t N, uint8_t *str) { - 8002204: b480 push {r7} - 8002206: b087 sub sp, #28 - 8002208: af00 add r7, sp, #0 - 800220a: 4603 mov r3, r0 - 800220c: 6039 str r1, [r7, #0] - 800220e: 80fb strh r3, [r7, #6] + 8002af4: b480 push {r7} + 8002af6: b087 sub sp, #28 + 8002af8: af00 add r7, sp, #0 + 8002afa: 4603 mov r3, r0 + 8002afc: 6039 str r1, [r7, #0] + 8002afe: 80fb strh r3, [r7, #6] int16_t i = 0; - 8002210: 2300 movs r3, #0 - 8002212: 82fb strh r3, [r7, #22] + 8002b00: 2300 movs r3, #0 + 8002b02: 82fb strh r3, [r7, #22] int16_t sign = N; - 8002214: 88fb ldrh r3, [r7, #6] - 8002216: 823b strh r3, [r7, #16] + 8002b04: 88fb ldrh r3, [r7, #6] + 8002b06: 823b strh r3, [r7, #16] uint8_t max_len = 15; // Tamanho máximo do buffer - 8002218: 230f movs r3, #15 - 800221a: 73fb strb r3, [r7, #15] + 8002b08: 230f movs r3, #15 + 8002b0a: 73fb strb r3, [r7, #15] uint8_t width = 4; // mínimo 4 caracteres - 800221c: 2304 movs r3, #4 - 800221e: 757b strb r3, [r7, #21] + 8002b0c: 2304 movs r3, #4 + 8002b0e: 757b strb r3, [r7, #21] // Trata o caso do número zero isoladamente if (N == 0) - 8002220: f9b7 3006 ldrsh.w r3, [r7, #6] - 8002224: 2b00 cmp r3, #0 - 8002226: d127 bne.n 8002278 + 8002b10: f9b7 3006 ldrsh.w r3, [r7, #6] + 8002b14: 2b00 cmp r3, #0 + 8002b16: d127 bne.n 8002b68 { // Preenche com zeros à esquerda até atingir a largura desejada while (width > 1 && i < (max_len - 1)) - 8002228: e00c b.n 8002244 + 8002b18: e00c b.n 8002b34 { str[i++] = '0'; - 800222a: f9b7 2016 ldrsh.w r2, [r7, #22] - 800222e: b293 uxth r3, r2 - 8002230: 3301 adds r3, #1 - 8002232: b29b uxth r3, r3 - 8002234: 82fb strh r3, [r7, #22] - 8002236: 683b ldr r3, [r7, #0] - 8002238: 4413 add r3, r2 - 800223a: 2230 movs r2, #48 @ 0x30 - 800223c: 701a strb r2, [r3, #0] + 8002b1a: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002b1e: b293 uxth r3, r2 + 8002b20: 3301 adds r3, #1 + 8002b22: b29b uxth r3, r3 + 8002b24: 82fb strh r3, [r7, #22] + 8002b26: 683b ldr r3, [r7, #0] + 8002b28: 4413 add r3, r2 + 8002b2a: 2230 movs r2, #48 @ 0x30 + 8002b2c: 701a strb r2, [r3, #0] width--; - 800223e: 7d7b ldrb r3, [r7, #21] - 8002240: 3b01 subs r3, #1 - 8002242: 757b strb r3, [r7, #21] + 8002b2e: 7d7b ldrb r3, [r7, #21] + 8002b30: 3b01 subs r3, #1 + 8002b32: 757b strb r3, [r7, #21] while (width > 1 && i < (max_len - 1)) - 8002244: 7d7b ldrb r3, [r7, #21] - 8002246: 2b01 cmp r3, #1 - 8002248: d905 bls.n 8002256 - 800224a: f9b7 2016 ldrsh.w r2, [r7, #22] - 800224e: 7bfb ldrb r3, [r7, #15] - 8002250: 3b01 subs r3, #1 - 8002252: 429a cmp r2, r3 - 8002254: dbe9 blt.n 800222a + 8002b34: 7d7b ldrb r3, [r7, #21] + 8002b36: 2b01 cmp r3, #1 + 8002b38: d905 bls.n 8002b46 + 8002b3a: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002b3e: 7bfb ldrb r3, [r7, #15] + 8002b40: 3b01 subs r3, #1 + 8002b42: 429a cmp r2, r3 + 8002b44: dbe9 blt.n 8002b1a } str[i++] = '0'; - 8002256: f9b7 2016 ldrsh.w r2, [r7, #22] - 800225a: b293 uxth r3, r2 - 800225c: 3301 adds r3, #1 - 800225e: b29b uxth r3, r3 - 8002260: 82fb strh r3, [r7, #22] - 8002262: 683b ldr r3, [r7, #0] - 8002264: 4413 add r3, r2 - 8002266: 2230 movs r2, #48 @ 0x30 - 8002268: 701a strb r2, [r3, #0] + 8002b46: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002b4a: b293 uxth r3, r2 + 8002b4c: 3301 adds r3, #1 + 8002b4e: b29b uxth r3, r3 + 8002b50: 82fb strh r3, [r7, #22] + 8002b52: 683b ldr r3, [r7, #0] + 8002b54: 4413 add r3, r2 + 8002b56: 2230 movs r2, #48 @ 0x30 + 8002b58: 701a strb r2, [r3, #0] str[i] = '\0'; - 800226a: f9b7 3016 ldrsh.w r3, [r7, #22] - 800226e: 683a ldr r2, [r7, #0] - 8002270: 4413 add r3, r2 - 8002272: 2200 movs r2, #0 - 8002274: 701a strb r2, [r3, #0] + 8002b5a: f9b7 3016 ldrsh.w r3, [r7, #22] + 8002b5e: 683a ldr r2, [r7, #0] + 8002b60: 4413 add r3, r2 + 8002b62: 2200 movs r2, #0 + 8002b64: 701a strb r2, [r3, #0] return; - 8002276: e08a b.n 800238e + 8002b66: e08a b.n 8002c7e } if (N < 0) - 8002278: f9b7 3006 ldrsh.w r3, [r7, #6] - 800227c: 2b00 cmp r3, #0 - 800227e: da2d bge.n 80022dc + 8002b68: f9b7 3006 ldrsh.w r3, [r7, #6] + 8002b6c: 2b00 cmp r3, #0 + 8002b6e: da2d bge.n 8002bcc N = -N; - 8002280: 88fb ldrh r3, [r7, #6] - 8002282: 425b negs r3, r3 - 8002284: b29b uxth r3, r3 - 8002286: 80fb strh r3, [r7, #6] + 8002b70: 88fb ldrh r3, [r7, #6] + 8002b72: 425b negs r3, r3 + 8002b74: b29b uxth r3, r3 + 8002b76: 80fb strh r3, [r7, #6] // Extração dos dígitos while (N > 0) - 8002288: e028 b.n 80022dc + 8002b78: e028 b.n 8002bcc { if (i >= (max_len - 1)) - 800228a: f9b7 2016 ldrsh.w r2, [r7, #22] - 800228e: 7bfb ldrb r3, [r7, #15] - 8002290: 3b01 subs r3, #1 - 8002292: 429a cmp r2, r3 - 8002294: da27 bge.n 80022e6 + 8002b7a: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002b7e: 7bfb ldrb r3, [r7, #15] + 8002b80: 3b01 subs r3, #1 + 8002b82: 429a cmp r2, r3 + 8002b84: da27 bge.n 8002bd6 break; // Proteção de estouro str[i++] = (N % 10) + '0'; - 8002296: f9b7 2006 ldrsh.w r2, [r7, #6] - 800229a: 4b3f ldr r3, [pc, #252] @ (8002398 ) - 800229c: fb83 1302 smull r1, r3, r3, r2 - 80022a0: 1099 asrs r1, r3, #2 - 80022a2: 17d3 asrs r3, r2, #31 - 80022a4: 1ac9 subs r1, r1, r3 - 80022a6: 460b mov r3, r1 - 80022a8: 009b lsls r3, r3, #2 - 80022aa: 440b add r3, r1 - 80022ac: 005b lsls r3, r3, #1 - 80022ae: 1ad3 subs r3, r2, r3 - 80022b0: b21b sxth r3, r3 - 80022b2: b2da uxtb r2, r3 - 80022b4: f9b7 1016 ldrsh.w r1, [r7, #22] - 80022b8: b28b uxth r3, r1 - 80022ba: 3301 adds r3, #1 - 80022bc: b29b uxth r3, r3 - 80022be: 82fb strh r3, [r7, #22] - 80022c0: 683b ldr r3, [r7, #0] - 80022c2: 440b add r3, r1 - 80022c4: 3230 adds r2, #48 @ 0x30 - 80022c6: b2d2 uxtb r2, r2 - 80022c8: 701a strb r2, [r3, #0] + 8002b86: f9b7 2006 ldrsh.w r2, [r7, #6] + 8002b8a: 4b3f ldr r3, [pc, #252] @ (8002c88 ) + 8002b8c: fb83 1302 smull r1, r3, r3, r2 + 8002b90: 1099 asrs r1, r3, #2 + 8002b92: 17d3 asrs r3, r2, #31 + 8002b94: 1ac9 subs r1, r1, r3 + 8002b96: 460b mov r3, r1 + 8002b98: 009b lsls r3, r3, #2 + 8002b9a: 440b add r3, r1 + 8002b9c: 005b lsls r3, r3, #1 + 8002b9e: 1ad3 subs r3, r2, r3 + 8002ba0: b21b sxth r3, r3 + 8002ba2: b2da uxtb r2, r3 + 8002ba4: f9b7 1016 ldrsh.w r1, [r7, #22] + 8002ba8: b28b uxth r3, r1 + 8002baa: 3301 adds r3, #1 + 8002bac: b29b uxth r3, r3 + 8002bae: 82fb strh r3, [r7, #22] + 8002bb0: 683b ldr r3, [r7, #0] + 8002bb2: 440b add r3, r1 + 8002bb4: 3230 adds r2, #48 @ 0x30 + 8002bb6: b2d2 uxtb r2, r2 + 8002bb8: 701a strb r2, [r3, #0] N /= 10; - 80022ca: f9b7 3006 ldrsh.w r3, [r7, #6] - 80022ce: 4a32 ldr r2, [pc, #200] @ (8002398 ) - 80022d0: fb82 1203 smull r1, r2, r2, r3 - 80022d4: 1092 asrs r2, r2, #2 - 80022d6: 17db asrs r3, r3, #31 - 80022d8: 1ad3 subs r3, r2, r3 - 80022da: 80fb strh r3, [r7, #6] + 8002bba: f9b7 3006 ldrsh.w r3, [r7, #6] + 8002bbe: 4a32 ldr r2, [pc, #200] @ (8002c88 ) + 8002bc0: fb82 1203 smull r1, r2, r2, r3 + 8002bc4: 1092 asrs r2, r2, #2 + 8002bc6: 17db asrs r3, r3, #31 + 8002bc8: 1ad3 subs r3, r2, r3 + 8002bca: 80fb strh r3, [r7, #6] while (N > 0) - 80022dc: f9b7 3006 ldrsh.w r3, [r7, #6] - 80022e0: 2b00 cmp r3, #0 - 80022e2: dcd2 bgt.n 800228a - 80022e4: e000 b.n 80022e8 + 8002bcc: f9b7 3006 ldrsh.w r3, [r7, #6] + 8002bd0: 2b00 cmp r3, #0 + 8002bd2: dcd2 bgt.n 8002b7a + 8002bd4: e000 b.n 8002bd8 break; // Proteção de estouro - 80022e6: bf00 nop + 8002bd6: bf00 nop } // Adiciona o sinal de menos se necessário if (sign < 0) - 80022e8: f9b7 3010 ldrsh.w r3, [r7, #16] - 80022ec: 2b00 cmp r3, #0 - 80022ee: da1a bge.n 8002326 + 8002bd8: f9b7 3010 ldrsh.w r3, [r7, #16] + 8002bdc: 2b00 cmp r3, #0 + 8002bde: da1a bge.n 8002c16 { if (i < (max_len - 1)) - 80022f0: f9b7 2016 ldrsh.w r2, [r7, #22] - 80022f4: 7bfb ldrb r3, [r7, #15] - 80022f6: 3b01 subs r3, #1 - 80022f8: 429a cmp r2, r3 - 80022fa: da14 bge.n 8002326 + 8002be0: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002be4: 7bfb ldrb r3, [r7, #15] + 8002be6: 3b01 subs r3, #1 + 8002be8: 429a cmp r2, r3 + 8002bea: da14 bge.n 8002c16 str[i++] = '-'; - 80022fc: f9b7 2016 ldrsh.w r2, [r7, #22] - 8002300: b293 uxth r3, r2 - 8002302: 3301 adds r3, #1 - 8002304: b29b uxth r3, r3 - 8002306: 82fb strh r3, [r7, #22] - 8002308: 683b ldr r3, [r7, #0] - 800230a: 4413 add r3, r2 - 800230c: 222d movs r2, #45 @ 0x2d - 800230e: 701a strb r2, [r3, #0] + 8002bec: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002bf0: b293 uxth r3, r2 + 8002bf2: 3301 adds r3, #1 + 8002bf4: b29b uxth r3, r3 + 8002bf6: 82fb strh r3, [r7, #22] + 8002bf8: 683b ldr r3, [r7, #0] + 8002bfa: 4413 add r3, r2 + 8002bfc: 222d movs r2, #45 @ 0x2d + 8002bfe: 701a strb r2, [r3, #0] } // Preenche com zeros à esquerda (considerando o espaço ocupado pelos dígitos e sinal) while (i < width && i < (max_len - 1)) - 8002310: e009 b.n 8002326 + 8002c00: e009 b.n 8002c16 { str[i++] = '0'; - 8002312: f9b7 2016 ldrsh.w r2, [r7, #22] - 8002316: b293 uxth r3, r2 - 8002318: 3301 adds r3, #1 - 800231a: b29b uxth r3, r3 - 800231c: 82fb strh r3, [r7, #22] - 800231e: 683b ldr r3, [r7, #0] - 8002320: 4413 add r3, r2 - 8002322: 2230 movs r2, #48 @ 0x30 - 8002324: 701a strb r2, [r3, #0] + 8002c02: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002c06: b293 uxth r3, r2 + 8002c08: 3301 adds r3, #1 + 8002c0a: b29b uxth r3, r3 + 8002c0c: 82fb strh r3, [r7, #22] + 8002c0e: 683b ldr r3, [r7, #0] + 8002c10: 4413 add r3, r2 + 8002c12: 2230 movs r2, #48 @ 0x30 + 8002c14: 701a strb r2, [r3, #0] while (i < width && i < (max_len - 1)) - 8002326: f9b7 2016 ldrsh.w r2, [r7, #22] - 800232a: 7d7b ldrb r3, [r7, #21] - 800232c: 429a cmp r2, r3 - 800232e: da05 bge.n 800233c - 8002330: f9b7 2016 ldrsh.w r2, [r7, #22] - 8002334: 7bfb ldrb r3, [r7, #15] - 8002336: 3b01 subs r3, #1 - 8002338: 429a cmp r2, r3 - 800233a: dbea blt.n 8002312 + 8002c16: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002c1a: 7d7b ldrb r3, [r7, #21] + 8002c1c: 429a cmp r2, r3 + 8002c1e: da05 bge.n 8002c2c + 8002c20: f9b7 2016 ldrsh.w r2, [r7, #22] + 8002c24: 7bfb ldrb r3, [r7, #15] + 8002c26: 3b01 subs r3, #1 + 8002c28: 429a cmp r2, r3 + 8002c2a: dbea blt.n 8002c02 } str[i] = '\0'; - 800233c: f9b7 3016 ldrsh.w r3, [r7, #22] - 8002340: 683a ldr r2, [r7, #0] - 8002342: 4413 add r3, r2 - 8002344: 2200 movs r2, #0 - 8002346: 701a strb r2, [r3, #0] + 8002c2c: f9b7 3016 ldrsh.w r3, [r7, #22] + 8002c30: 683a ldr r2, [r7, #0] + 8002c32: 4413 add r3, r2 + 8002c34: 2200 movs r2, #0 + 8002c36: 701a strb r2, [r3, #0] // Inverte a string para colocar na ordem correta for (uint8_t j = 0, k = i - 1; j < k; j++, k--) - 8002348: 2300 movs r3, #0 - 800234a: 753b strb r3, [r7, #20] - 800234c: 8afb ldrh r3, [r7, #22] - 800234e: b2db uxtb r3, r3 - 8002350: 3b01 subs r3, #1 - 8002352: 74fb strb r3, [r7, #19] - 8002354: e017 b.n 8002386 + 8002c38: 2300 movs r3, #0 + 8002c3a: 753b strb r3, [r7, #20] + 8002c3c: 8afb ldrh r3, [r7, #22] + 8002c3e: b2db uxtb r3, r3 + 8002c40: 3b01 subs r3, #1 + 8002c42: 74fb strb r3, [r7, #19] + 8002c44: e017 b.n 8002c76 { uint8_t temp = str[j]; - 8002356: 7d3b ldrb r3, [r7, #20] - 8002358: 683a ldr r2, [r7, #0] - 800235a: 4413 add r3, r2 - 800235c: 781b ldrb r3, [r3, #0] - 800235e: 73bb strb r3, [r7, #14] + 8002c46: 7d3b ldrb r3, [r7, #20] + 8002c48: 683a ldr r2, [r7, #0] + 8002c4a: 4413 add r3, r2 + 8002c4c: 781b ldrb r3, [r3, #0] + 8002c4e: 73bb strb r3, [r7, #14] str[j] = str[k]; - 8002360: 7cfb ldrb r3, [r7, #19] - 8002362: 683a ldr r2, [r7, #0] - 8002364: 441a add r2, r3 - 8002366: 7d3b ldrb r3, [r7, #20] - 8002368: 6839 ldr r1, [r7, #0] - 800236a: 440b add r3, r1 - 800236c: 7812 ldrb r2, [r2, #0] - 800236e: 701a strb r2, [r3, #0] + 8002c50: 7cfb ldrb r3, [r7, #19] + 8002c52: 683a ldr r2, [r7, #0] + 8002c54: 441a add r2, r3 + 8002c56: 7d3b ldrb r3, [r7, #20] + 8002c58: 6839 ldr r1, [r7, #0] + 8002c5a: 440b add r3, r1 + 8002c5c: 7812 ldrb r2, [r2, #0] + 8002c5e: 701a strb r2, [r3, #0] str[k] = temp; - 8002370: 7cfb ldrb r3, [r7, #19] - 8002372: 683a ldr r2, [r7, #0] - 8002374: 4413 add r3, r2 - 8002376: 7bba ldrb r2, [r7, #14] - 8002378: 701a strb r2, [r3, #0] + 8002c60: 7cfb ldrb r3, [r7, #19] + 8002c62: 683a ldr r2, [r7, #0] + 8002c64: 4413 add r3, r2 + 8002c66: 7bba ldrb r2, [r7, #14] + 8002c68: 701a strb r2, [r3, #0] for (uint8_t j = 0, k = i - 1; j < k; j++, k--) - 800237a: 7d3b ldrb r3, [r7, #20] - 800237c: 3301 adds r3, #1 - 800237e: 753b strb r3, [r7, #20] - 8002380: 7cfb ldrb r3, [r7, #19] - 8002382: 3b01 subs r3, #1 - 8002384: 74fb strb r3, [r7, #19] - 8002386: 7d3a ldrb r2, [r7, #20] - 8002388: 7cfb ldrb r3, [r7, #19] - 800238a: 429a cmp r2, r3 - 800238c: d3e3 bcc.n 8002356 + 8002c6a: 7d3b ldrb r3, [r7, #20] + 8002c6c: 3301 adds r3, #1 + 8002c6e: 753b strb r3, [r7, #20] + 8002c70: 7cfb ldrb r3, [r7, #19] + 8002c72: 3b01 subs r3, #1 + 8002c74: 74fb strb r3, [r7, #19] + 8002c76: 7d3a ldrb r2, [r7, #20] + 8002c78: 7cfb ldrb r3, [r7, #19] + 8002c7a: 429a cmp r2, r3 + 8002c7c: d3e3 bcc.n 8002c46 } } - 800238e: 371c adds r7, #28 - 8002390: 46bd mov sp, r7 - 8002392: bc80 pop {r7} - 8002394: 4770 bx lr - 8002396: bf00 nop - 8002398: 66666667 .word 0x66666667 + 8002c7e: 371c adds r7, #28 + 8002c80: 46bd mov sp, r7 + 8002c82: bc80 pop {r7} + 8002c84: 4770 bx lr + 8002c86: bf00 nop + 8002c88: 66666667 .word 0x66666667 -0800239c : +08002c8c : } /* TIM3 Timer Interrupt */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - 800239c: b480 push {r7} - 800239e: b083 sub sp, #12 - 80023a0: af00 add r7, sp, #0 - 80023a2: 6078 str r0, [r7, #4] + 8002c8c: b480 push {r7} + 8002c8e: b083 sub sp, #12 + 8002c90: af00 add r7, sp, #0 + 8002c92: 6078 str r0, [r7, #4] if (htim->Instance == TIM3) - 80023a4: 687b ldr r3, [r7, #4] - 80023a6: 681b ldr r3, [r3, #0] - 80023a8: 4a06 ldr r2, [pc, #24] @ (80023c4 ) - 80023aa: 4293 cmp r3, r2 - 80023ac: d104 bne.n 80023b8 + 8002c94: 687b ldr r3, [r7, #4] + 8002c96: 681b ldr r3, [r3, #0] + 8002c98: 4a06 ldr r2, [pc, #24] @ (8002cb4 ) + 8002c9a: 4293 cmp r3, r2 + 8002c9c: d104 bne.n 8002ca8 { g_ms_counter++; /* Relógio global do sistema */ - 80023ae: 4b06 ldr r3, [pc, #24] @ (80023c8 ) - 80023b0: 681b ldr r3, [r3, #0] - 80023b2: 3301 adds r3, #1 - 80023b4: 4a04 ldr r2, [pc, #16] @ (80023c8 ) - 80023b6: 6013 str r3, [r2, #0] + 8002c9e: 4b06 ldr r3, [pc, #24] @ (8002cb8 ) + 8002ca0: 681b ldr r3, [r3, #0] + 8002ca2: 3301 adds r3, #1 + 8002ca4: 4a04 ldr r2, [pc, #16] @ (8002cb8 ) + 8002ca6: 6013 str r3, [r2, #0] } } - 80023b8: bf00 nop - 80023ba: 370c adds r7, #12 - 80023bc: 46bd mov sp, r7 - 80023be: bc80 pop {r7} - 80023c0: 4770 bx lr - 80023c2: bf00 nop - 80023c4: 40000400 .word 0x40000400 - 80023c8: 20000084 .word 0x20000084 + 8002ca8: bf00 nop + 8002caa: 370c adds r7, #12 + 8002cac: 46bd mov sp, r7 + 8002cae: bc80 pop {r7} + 8002cb0: 4770 bx lr + 8002cb2: bf00 nop + 8002cb4: 40000400 .word 0x40000400 + 8002cb8: 20000084 .word 0x20000084 -080023cc : +08002cbc : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 80023cc: b480 push {r7} - 80023ce: af00 add r7, sp, #0 + 8002cbc: b480 push {r7} + 8002cbe: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 80023d0: b672 cpsid i + 8002cc0: b672 cpsid i } - 80023d2: bf00 nop + 8002cc2: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 80023d4: bf00 nop - 80023d6: e7fd b.n 80023d4 + 8002cc4: bf00 nop + 8002cc6: e7fd b.n 8002cc4 -080023d8 : +08002cc8 : * @rmtoll IDR IDy LL_GPIO_ReadInputPort * @param GPIOx GPIO Port * @retval Input data register value of port */ __STATIC_INLINE uint32_t LL_GPIO_ReadInputPort(GPIO_TypeDef *GPIOx) { - 80023d8: b480 push {r7} - 80023da: b083 sub sp, #12 - 80023dc: af00 add r7, sp, #0 - 80023de: 6078 str r0, [r7, #4] + 8002cc8: b480 push {r7} + 8002cca: b083 sub sp, #12 + 8002ccc: af00 add r7, sp, #0 + 8002cce: 6078 str r0, [r7, #4] return (READ_REG(GPIOx->IDR)); - 80023e0: 687b ldr r3, [r7, #4] - 80023e2: 689b ldr r3, [r3, #8] + 8002cd0: 687b ldr r3, [r7, #4] + 8002cd2: 689b ldr r3, [r3, #8] } - 80023e4: 4618 mov r0, r3 - 80023e6: 370c adds r7, #12 - 80023e8: 46bd mov sp, r7 - 80023ea: bc80 pop {r7} - 80023ec: 4770 bx lr + 8002cd4: 4618 mov r0, r3 + 8002cd6: 370c adds r7, #12 + 8002cd8: 46bd mov sp, r7 + 8002cda: bc80 pop {r7} + 8002cdc: 4770 bx lr ... -080023f0 : +08002ce0 : /** * @brief Initializes the RS-485 driver. * @note This function configures GPIOs for address detection and USART1 for communication. */ void rs485_init(void) { - 80023f0: b580 push {r7, lr} - 80023f2: af00 add r7, sp, #0 + 8002ce0: b580 push {r7, lr} + 8002ce2: af00 add r7, sp, #0 /* Configure GPIOs for address detection */ rs485_configure_gpio_address(); - 80023f4: f000 f864 bl 80024c0 + 8002ce4: f000 f864 bl 8002db0 /* Configure USART1 for RS-485 communication */ rs485_configure_usart1(); - 80023f8: f000 f8a8 bl 800254c + 8002ce8: f000 f8a8 bl 8002e3c /* Get the current device address from GPIOs */ device_address.full_address = rs485_get_address(); - 80023fc: f000 f808 bl 8002410 - 8002400: 4603 mov r3, r0 - 8002402: 461a mov r2, r3 - 8002404: 4b01 ldr r3, [pc, #4] @ (800240c ) - 8002406: 709a strb r2, [r3, #2] + 8002cec: f000 f808 bl 8002d00 + 8002cf0: 4603 mov r3, r0 + 8002cf2: 461a mov r2, r3 + 8002cf4: 4b01 ldr r3, [pc, #4] @ (8002cfc ) + 8002cf6: 709a strb r2, [r3, #2] } - 8002408: bf00 nop - 800240a: bd80 pop {r7, pc} - 800240c: 200004d8 .word 0x200004d8 + 8002cf8: bf00 nop + 8002cfa: bd80 pop {r7, pc} + 8002cfc: 20000498 .word 0x20000498 -08002410 : +08002d00 : /** * @brief Gets the current device address from GPIOs. * @return The 8-bit device address. */ uint8_t rs485_get_address(void) { - 8002410: b598 push {r3, r4, r7, lr} - 8002412: af00 add r7, sp, #0 + 8002d00: b598 push {r3, r4, r7, lr} + 8002d02: af00 add r7, sp, #0 return ((uint8_t) ((((LL_GPIO_ReadInputPort(GPIOB) & RS485_ADDR_MASK_HIGH)>>RS485_ADDR_BIT_SET_HIGH) | (LL_GPIO_ReadInputPort(GPIOA) & RS485_ADDR_MASK_LOW)>>RS485_ADDR_BIT_SET_LOW))); - 8002414: 480a ldr r0, [pc, #40] @ (8002440 ) - 8002416: f7ff ffdf bl 80023d8 - 800241a: 4603 mov r3, r0 - 800241c: 0a1b lsrs r3, r3, #8 - 800241e: b2db uxtb r3, r3 - 8002420: f023 030f bic.w r3, r3, #15 - 8002424: b2dc uxtb r4, r3 - 8002426: 4807 ldr r0, [pc, #28] @ (8002444 ) - 8002428: f7ff ffd6 bl 80023d8 - 800242c: 4603 mov r3, r0 - 800242e: 089b lsrs r3, r3, #2 - 8002430: b2db uxtb r3, r3 - 8002432: f003 030f and.w r3, r3, #15 - 8002436: b2db uxtb r3, r3 - 8002438: 4323 orrs r3, r4 - 800243a: b2db uxtb r3, r3 + 8002d04: 480a ldr r0, [pc, #40] @ (8002d30 ) + 8002d06: f7ff ffdf bl 8002cc8 + 8002d0a: 4603 mov r3, r0 + 8002d0c: 0a1b lsrs r3, r3, #8 + 8002d0e: b2db uxtb r3, r3 + 8002d10: f023 030f bic.w r3, r3, #15 + 8002d14: b2dc uxtb r4, r3 + 8002d16: 4807 ldr r0, [pc, #28] @ (8002d34 ) + 8002d18: f7ff ffd6 bl 8002cc8 + 8002d1c: 4603 mov r3, r0 + 8002d1e: 089b lsrs r3, r3, #2 + 8002d20: b2db uxtb r3, r3 + 8002d22: f003 030f and.w r3, r3, #15 + 8002d26: b2db uxtb r3, r3 + 8002d28: 4323 orrs r3, r4 + 8002d2a: b2db uxtb r3, r3 } - 800243c: 4618 mov r0, r3 - 800243e: bd98 pop {r3, r4, r7, pc} - 8002440: 40010c00 .word 0x40010c00 - 8002444: 40010800 .word 0x40010800 + 8002d2c: 4618 mov r0, r3 + 8002d2e: bd98 pop {r3, r4, r7, pc} + 8002d30: 40010c00 .word 0x40010c00 + 8002d34: 40010800 .word 0x40010800 -08002448 : +08002d38 : * @param data Pointer to the data buffer. * @param length Number of bytes to send. * @retval HAL_OK on success, otherwise error code. */ HAL_StatusTypeDef rs485_send_broadcast(uint8_t* data, uint16_t length) { - 8002448: b580 push {r7, lr} - 800244a: b084 sub sp, #16 - 800244c: af00 add r7, sp, #0 - 800244e: 6078 str r0, [r7, #4] - 8002450: 460b mov r3, r1 - 8002452: 807b strh r3, [r7, #2] + 8002d38: b580 push {r7, lr} + 8002d3a: b084 sub sp, #16 + 8002d3c: af00 add r7, sp, #0 + 8002d3e: 6078 str r0, [r7, #4] + 8002d40: 460b mov r3, r1 + 8002d42: 807b strh r3, [r7, #2] /* Enable transmission mode */ rs485_enable_tx(); - 8002454: f000 f81c bl 8002490 + 8002d44: f000 f81c bl 8002d80 /* Send the broadcast address (0x00) first */ uint8_t broadcast_address = 0x00; - 8002458: 2300 movs r3, #0 - 800245a: 73bb strb r3, [r7, #14] + 8002d48: 2300 movs r3, #0 + 8002d4a: 73bb strb r3, [r7, #14] HAL_UART_Transmit(&huart1, &broadcast_address, 1, HAL_MAX_DELAY); - 800245c: f107 010e add.w r1, r7, #14 - 8002460: f04f 33ff mov.w r3, #4294967295 - 8002464: 2201 movs r2, #1 - 8002466: 4809 ldr r0, [pc, #36] @ (800248c ) - 8002468: f003 f99c bl 80057a4 + 8002d4c: f107 010e add.w r1, r7, #14 + 8002d50: f04f 33ff mov.w r3, #4294967295 + 8002d54: 2201 movs r2, #1 + 8002d56: 4809 ldr r0, [pc, #36] @ (8002d7c ) + 8002d58: f003 f99c bl 8006094 /* Send the data */ HAL_StatusTypeDef status = HAL_UART_Transmit(&huart1, data, length, HAL_MAX_DELAY); - 800246c: 887a ldrh r2, [r7, #2] - 800246e: f04f 33ff mov.w r3, #4294967295 - 8002472: 6879 ldr r1, [r7, #4] - 8002474: 4805 ldr r0, [pc, #20] @ (800248c ) - 8002476: f003 f995 bl 80057a4 - 800247a: 4603 mov r3, r0 - 800247c: 73fb strb r3, [r7, #15] + 8002d5c: 887a ldrh r2, [r7, #2] + 8002d5e: f04f 33ff mov.w r3, #4294967295 + 8002d62: 6879 ldr r1, [r7, #4] + 8002d64: 4805 ldr r0, [pc, #20] @ (8002d7c ) + 8002d66: f003 f995 bl 8006094 + 8002d6a: 4603 mov r3, r0 + 8002d6c: 73fb strb r3, [r7, #15] /* Disable transmission mode after sending */ rs485_disable_tx(); - 800247e: f000 f813 bl 80024a8 + 8002d6e: f000 f813 bl 8002d98 return status; - 8002482: 7bfb ldrb r3, [r7, #15] + 8002d72: 7bfb ldrb r3, [r7, #15] } - 8002484: 4618 mov r0, r3 - 8002486: 3710 adds r7, #16 - 8002488: 46bd mov sp, r7 - 800248a: bd80 pop {r7, pc} - 800248c: 200004dc .word 0x200004dc + 8002d74: 4618 mov r0, r3 + 8002d76: 3710 adds r7, #16 + 8002d78: 46bd mov sp, r7 + 8002d7a: bd80 pop {r7, pc} + 8002d7c: 2000049c .word 0x2000049c -08002490 : +08002d80 : /** * @brief Enables transmission mode on RS-485 transceiver. */ void rs485_enable_tx(void) { - 8002490: b580 push {r7, lr} - 8002492: af00 add r7, sp, #0 + 8002d80: b580 push {r7, lr} + 8002d82: af00 add r7, sp, #0 /* Set TX EN pin high to enable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_SET); - 8002494: 2201 movs r2, #1 - 8002496: f44f 5180 mov.w r1, #4096 @ 0x1000 - 800249a: 4802 ldr r0, [pc, #8] @ (80024a4 ) - 800249c: f001 f813 bl 80034c6 + 8002d84: 2201 movs r2, #1 + 8002d86: f44f 5180 mov.w r1, #4096 @ 0x1000 + 8002d8a: 4802 ldr r0, [pc, #8] @ (8002d94 ) + 8002d8c: f001 f813 bl 8003db6 } - 80024a0: bf00 nop - 80024a2: bd80 pop {r7, pc} - 80024a4: 40010800 .word 0x40010800 + 8002d90: bf00 nop + 8002d92: bd80 pop {r7, pc} + 8002d94: 40010800 .word 0x40010800 -080024a8 : +08002d98 : /** * @brief Disables transmission mode on RS-485 transceiver. */ void rs485_disable_tx(void) { - 80024a8: b580 push {r7, lr} - 80024aa: af00 add r7, sp, #0 + 8002d98: b580 push {r7, lr} + 8002d9a: af00 add r7, sp, #0 /* Set TX EN pin low to disable transmitter */ HAL_GPIO_WritePin(RS485_TX_EN_PORT, RS485_TX_EN_PIN, GPIO_PIN_RESET); - 80024ac: 2200 movs r2, #0 - 80024ae: f44f 5180 mov.w r1, #4096 @ 0x1000 - 80024b2: 4802 ldr r0, [pc, #8] @ (80024bc ) - 80024b4: f001 f807 bl 80034c6 + 8002d9c: 2200 movs r2, #0 + 8002d9e: f44f 5180 mov.w r1, #4096 @ 0x1000 + 8002da2: 4802 ldr r0, [pc, #8] @ (8002dac ) + 8002da4: f001 f807 bl 8003db6 } - 80024b8: bf00 nop - 80024ba: bd80 pop {r7, pc} - 80024bc: 40010800 .word 0x40010800 + 8002da8: bf00 nop + 8002daa: bd80 pop {r7, pc} + 8002dac: 40010800 .word 0x40010800 -080024c0 : +08002db0 : /** * @brief Configures GPIOs for address detection. */ static void rs485_configure_gpio_address(void) { - 80024c0: b580 push {r7, lr} - 80024c2: b086 sub sp, #24 - 80024c4: af00 add r7, sp, #0 + 8002db0: b580 push {r7, lr} + 8002db2: b086 sub sp, #24 + 8002db4: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80024c6: f107 0308 add.w r3, r7, #8 - 80024ca: 2200 movs r2, #0 - 80024cc: 601a str r2, [r3, #0] - 80024ce: 605a str r2, [r3, #4] - 80024d0: 609a str r2, [r3, #8] - 80024d2: 60da str r2, [r3, #12] + 8002db6: f107 0308 add.w r3, r7, #8 + 8002dba: 2200 movs r2, #0 + 8002dbc: 601a str r2, [r3, #0] + 8002dbe: 605a str r2, [r3, #4] + 8002dc0: 609a str r2, [r3, #8] + 8002dc2: 60da str r2, [r3, #12] /* Enable clock for GPIOA and GPIOB */ __HAL_RCC_GPIOA_CLK_ENABLE(); - 80024d4: 4b1a ldr r3, [pc, #104] @ (8002540 ) - 80024d6: 699b ldr r3, [r3, #24] - 80024d8: 4a19 ldr r2, [pc, #100] @ (8002540 ) - 80024da: f043 0304 orr.w r3, r3, #4 - 80024de: 6193 str r3, [r2, #24] - 80024e0: 4b17 ldr r3, [pc, #92] @ (8002540 ) - 80024e2: 699b ldr r3, [r3, #24] - 80024e4: f003 0304 and.w r3, r3, #4 - 80024e8: 607b str r3, [r7, #4] - 80024ea: 687b ldr r3, [r7, #4] + 8002dc4: 4b1a ldr r3, [pc, #104] @ (8002e30 ) + 8002dc6: 699b ldr r3, [r3, #24] + 8002dc8: 4a19 ldr r2, [pc, #100] @ (8002e30 ) + 8002dca: f043 0304 orr.w r3, r3, #4 + 8002dce: 6193 str r3, [r2, #24] + 8002dd0: 4b17 ldr r3, [pc, #92] @ (8002e30 ) + 8002dd2: 699b ldr r3, [r3, #24] + 8002dd4: f003 0304 and.w r3, r3, #4 + 8002dd8: 607b str r3, [r7, #4] + 8002dda: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOB_CLK_ENABLE(); - 80024ec: 4b14 ldr r3, [pc, #80] @ (8002540 ) - 80024ee: 699b ldr r3, [r3, #24] - 80024f0: 4a13 ldr r2, [pc, #76] @ (8002540 ) - 80024f2: f043 0308 orr.w r3, r3, #8 - 80024f6: 6193 str r3, [r2, #24] - 80024f8: 4b11 ldr r3, [pc, #68] @ (8002540 ) - 80024fa: 699b ldr r3, [r3, #24] - 80024fc: f003 0308 and.w r3, r3, #8 - 8002500: 603b str r3, [r7, #0] - 8002502: 683b ldr r3, [r7, #0] + 8002ddc: 4b14 ldr r3, [pc, #80] @ (8002e30 ) + 8002dde: 699b ldr r3, [r3, #24] + 8002de0: 4a13 ldr r2, [pc, #76] @ (8002e30 ) + 8002de2: f043 0308 orr.w r3, r3, #8 + 8002de6: 6193 str r3, [r2, #24] + 8002de8: 4b11 ldr r3, [pc, #68] @ (8002e30 ) + 8002dea: 699b ldr r3, [r3, #24] + 8002dec: f003 0308 and.w r3, r3, #8 + 8002df0: 603b str r3, [r7, #0] + 8002df2: 683b ldr r3, [r7, #0] /* Configure PA2-PA5 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; - 8002504: 233c movs r3, #60 @ 0x3c - 8002506: 60bb str r3, [r7, #8] + 8002df4: 233c movs r3, #60 @ 0x3c + 8002df6: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002508: 2300 movs r3, #0 - 800250a: 60fb str r3, [r7, #12] + 8002df8: 2300 movs r3, #0 + 8002dfa: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; - 800250c: 2301 movs r3, #1 - 800250e: 613b str r3, [r7, #16] + 8002dfc: 2301 movs r3, #1 + 8002dfe: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8002510: f107 0308 add.w r3, r7, #8 - 8002514: 4619 mov r1, r3 - 8002516: 480b ldr r0, [pc, #44] @ (8002544 ) - 8002518: f000 fe3a bl 8003190 + 8002e00: f107 0308 add.w r3, r7, #8 + 8002e04: 4619 mov r1, r3 + 8002e06: 480b ldr r0, [pc, #44] @ (8002e34 ) + 8002e08: f000 fe3a bl 8003a80 /* Configure PB12-PB15 as input with pull-up */ GPIO_InitStruct.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15; - 800251c: f44f 4370 mov.w r3, #61440 @ 0xf000 - 8002520: 60bb str r3, [r7, #8] + 8002e0c: f44f 4370 mov.w r3, #61440 @ 0xf000 + 8002e10: 60bb str r3, [r7, #8] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8002522: 2300 movs r3, #0 - 8002524: 60fb str r3, [r7, #12] + 8002e12: 2300 movs r3, #0 + 8002e14: 60fb str r3, [r7, #12] GPIO_InitStruct.Pull = GPIO_PULLUP; - 8002526: 2301 movs r3, #1 - 8002528: 613b str r3, [r7, #16] + 8002e16: 2301 movs r3, #1 + 8002e18: 613b str r3, [r7, #16] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 800252a: f107 0308 add.w r3, r7, #8 - 800252e: 4619 mov r1, r3 - 8002530: 4805 ldr r0, [pc, #20] @ (8002548 ) - 8002532: f000 fe2d bl 8003190 + 8002e1a: f107 0308 add.w r3, r7, #8 + 8002e1e: 4619 mov r1, r3 + 8002e20: 4805 ldr r0, [pc, #20] @ (8002e38 ) + 8002e22: f000 fe2d bl 8003a80 } - 8002536: bf00 nop - 8002538: 3718 adds r7, #24 - 800253a: 46bd mov sp, r7 - 800253c: bd80 pop {r7, pc} - 800253e: bf00 nop - 8002540: 40021000 .word 0x40021000 - 8002544: 40010800 .word 0x40010800 - 8002548: 40010c00 .word 0x40010c00 + 8002e26: bf00 nop + 8002e28: 3718 adds r7, #24 + 8002e2a: 46bd mov sp, r7 + 8002e2c: bd80 pop {r7, pc} + 8002e2e: bf00 nop + 8002e30: 40021000 .word 0x40021000 + 8002e34: 40010800 .word 0x40010800 + 8002e38: 40010c00 .word 0x40010c00 -0800254c : +08002e3c : /** * @brief Configures USART1 for RS-485 communication. */ static void rs485_configure_usart1(void) { - 800254c: b580 push {r7, lr} - 800254e: b082 sub sp, #8 - 8002550: af00 add r7, sp, #0 + 8002e3c: b580 push {r7, lr} + 8002e3e: b082 sub sp, #8 + 8002e40: af00 add r7, sp, #0 /* Enable clock for USART1 */ __HAL_RCC_USART1_CLK_ENABLE(); - 8002552: 4b18 ldr r3, [pc, #96] @ (80025b4 ) - 8002554: 699b ldr r3, [r3, #24] - 8002556: 4a17 ldr r2, [pc, #92] @ (80025b4 ) - 8002558: f443 4380 orr.w r3, r3, #16384 @ 0x4000 - 800255c: 6193 str r3, [r2, #24] - 800255e: 4b15 ldr r3, [pc, #84] @ (80025b4 ) - 8002560: 699b ldr r3, [r3, #24] - 8002562: f403 4380 and.w r3, r3, #16384 @ 0x4000 - 8002566: 607b str r3, [r7, #4] - 8002568: 687b ldr r3, [r7, #4] + 8002e42: 4b18 ldr r3, [pc, #96] @ (8002ea4 ) + 8002e44: 699b ldr r3, [r3, #24] + 8002e46: 4a17 ldr r2, [pc, #92] @ (8002ea4 ) + 8002e48: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 8002e4c: 6193 str r3, [r2, #24] + 8002e4e: 4b15 ldr r3, [pc, #84] @ (8002ea4 ) + 8002e50: 699b ldr r3, [r3, #24] + 8002e52: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 8002e56: 607b str r3, [r7, #4] + 8002e58: 687b ldr r3, [r7, #4] huart1.Instance = USART1; - 800256a: 4b13 ldr r3, [pc, #76] @ (80025b8 ) - 800256c: 4a13 ldr r2, [pc, #76] @ (80025bc ) - 800256e: 601a str r2, [r3, #0] + 8002e5a: 4b13 ldr r3, [pc, #76] @ (8002ea8 ) + 8002e5c: 4a13 ldr r2, [pc, #76] @ (8002eac ) + 8002e5e: 601a str r2, [r3, #0] huart1.Init.BaudRate = 9600; /*!< Default baud rate for RS-485 */ - 8002570: 4b11 ldr r3, [pc, #68] @ (80025b8 ) - 8002572: f44f 5216 mov.w r2, #9600 @ 0x2580 - 8002576: 605a str r2, [r3, #4] + 8002e60: 4b11 ldr r3, [pc, #68] @ (8002ea8 ) + 8002e62: f44f 5216 mov.w r2, #9600 @ 0x2580 + 8002e66: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8002578: 4b0f ldr r3, [pc, #60] @ (80025b8 ) - 800257a: 2200 movs r2, #0 - 800257c: 609a str r2, [r3, #8] + 8002e68: 4b0f ldr r3, [pc, #60] @ (8002ea8 ) + 8002e6a: 2200 movs r2, #0 + 8002e6c: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 800257e: 4b0e ldr r3, [pc, #56] @ (80025b8 ) - 8002580: 2200 movs r2, #0 - 8002582: 60da str r2, [r3, #12] + 8002e6e: 4b0e ldr r3, [pc, #56] @ (8002ea8 ) + 8002e70: 2200 movs r2, #0 + 8002e72: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 8002584: 4b0c ldr r3, [pc, #48] @ (80025b8 ) - 8002586: 2200 movs r2, #0 - 8002588: 611a str r2, [r3, #16] + 8002e74: 4b0c ldr r3, [pc, #48] @ (8002ea8 ) + 8002e76: 2200 movs r2, #0 + 8002e78: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 800258a: 4b0b ldr r3, [pc, #44] @ (80025b8 ) - 800258c: 220c movs r2, #12 - 800258e: 615a str r2, [r3, #20] + 8002e7a: 4b0b ldr r3, [pc, #44] @ (8002ea8 ) + 8002e7c: 220c movs r2, #12 + 8002e7e: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; /*!< Use NONE as TX enable */ - 8002590: 4b09 ldr r3, [pc, #36] @ (80025b8 ) - 8002592: 2200 movs r2, #0 - 8002594: 619a str r2, [r3, #24] + 8002e80: 4b09 ldr r3, [pc, #36] @ (8002ea8 ) + 8002e82: 2200 movs r2, #0 + 8002e84: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8002596: 4b08 ldr r3, [pc, #32] @ (80025b8 ) - 8002598: 2200 movs r2, #0 - 800259a: 61da str r2, [r3, #28] + 8002e86: 4b08 ldr r3, [pc, #32] @ (8002ea8 ) + 8002e88: 2200 movs r2, #0 + 8002e8a: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) - 800259c: 4806 ldr r0, [pc, #24] @ (80025b8 ) - 800259e: f003 f8b1 bl 8005704 - 80025a2: 4603 mov r3, r0 - 80025a4: 2b00 cmp r3, #0 - 80025a6: d001 beq.n 80025ac + 8002e8c: 4806 ldr r0, [pc, #24] @ (8002ea8 ) + 8002e8e: f003 f8b1 bl 8005ff4 + 8002e92: 4603 mov r3, r0 + 8002e94: 2b00 cmp r3, #0 + 8002e96: d001 beq.n 8002e9c { /* Initialization Error */ while(1); - 80025a8: bf00 nop - 80025aa: e7fd b.n 80025a8 + 8002e98: bf00 nop + 8002e9a: e7fd b.n 8002e98 } } - 80025ac: bf00 nop - 80025ae: 3708 adds r7, #8 - 80025b0: 46bd mov sp, r7 - 80025b2: bd80 pop {r7, pc} - 80025b4: 40021000 .word 0x40021000 - 80025b8: 200004dc .word 0x200004dc - 80025bc: 40013800 .word 0x40013800 + 8002e9c: bf00 nop + 8002e9e: 3708 adds r7, #8 + 8002ea0: 46bd mov sp, r7 + 8002ea2: bd80 pop {r7, pc} + 8002ea4: 40021000 .word 0x40021000 + 8002ea8: 2000049c .word 0x2000049c + 8002eac: 40013800 .word 0x40013800 -080025c0 : +08002eb0 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 80025c0: b480 push {r7} - 80025c2: b085 sub sp, #20 - 80025c4: af00 add r7, sp, #0 + 8002eb0: b480 push {r7} + 8002eb2: b085 sub sp, #20 + 8002eb4: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_AFIO_CLK_ENABLE(); - 80025c6: 4b15 ldr r3, [pc, #84] @ (800261c ) - 80025c8: 699b ldr r3, [r3, #24] - 80025ca: 4a14 ldr r2, [pc, #80] @ (800261c ) - 80025cc: f043 0301 orr.w r3, r3, #1 - 80025d0: 6193 str r3, [r2, #24] - 80025d2: 4b12 ldr r3, [pc, #72] @ (800261c ) - 80025d4: 699b ldr r3, [r3, #24] - 80025d6: f003 0301 and.w r3, r3, #1 - 80025da: 60bb str r3, [r7, #8] - 80025dc: 68bb ldr r3, [r7, #8] + 8002eb6: 4b15 ldr r3, [pc, #84] @ (8002f0c ) + 8002eb8: 699b ldr r3, [r3, #24] + 8002eba: 4a14 ldr r2, [pc, #80] @ (8002f0c ) + 8002ebc: f043 0301 orr.w r3, r3, #1 + 8002ec0: 6193 str r3, [r2, #24] + 8002ec2: 4b12 ldr r3, [pc, #72] @ (8002f0c ) + 8002ec4: 699b ldr r3, [r3, #24] + 8002ec6: f003 0301 and.w r3, r3, #1 + 8002eca: 60bb str r3, [r7, #8] + 8002ecc: 68bb ldr r3, [r7, #8] __HAL_RCC_PWR_CLK_ENABLE(); - 80025de: 4b0f ldr r3, [pc, #60] @ (800261c ) - 80025e0: 69db ldr r3, [r3, #28] - 80025e2: 4a0e ldr r2, [pc, #56] @ (800261c ) - 80025e4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 80025e8: 61d3 str r3, [r2, #28] - 80025ea: 4b0c ldr r3, [pc, #48] @ (800261c ) - 80025ec: 69db ldr r3, [r3, #28] - 80025ee: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 80025f2: 607b str r3, [r7, #4] - 80025f4: 687b ldr r3, [r7, #4] + 8002ece: 4b0f ldr r3, [pc, #60] @ (8002f0c ) + 8002ed0: 69db ldr r3, [r3, #28] + 8002ed2: 4a0e ldr r2, [pc, #56] @ (8002f0c ) + 8002ed4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8002ed8: 61d3 str r3, [r2, #28] + 8002eda: 4b0c ldr r3, [pc, #48] @ (8002f0c ) + 8002edc: 69db ldr r3, [r3, #28] + 8002ede: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8002ee2: 607b str r3, [r7, #4] + 8002ee4: 687b ldr r3, [r7, #4] /* System interrupt init*/ /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled */ __HAL_AFIO_REMAP_SWJ_NOJTAG(); - 80025f6: 4b0a ldr r3, [pc, #40] @ (8002620 ) - 80025f8: 685b ldr r3, [r3, #4] - 80025fa: 60fb str r3, [r7, #12] - 80025fc: 68fb ldr r3, [r7, #12] - 80025fe: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 - 8002602: 60fb str r3, [r7, #12] - 8002604: 68fb ldr r3, [r7, #12] - 8002606: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 - 800260a: 60fb str r3, [r7, #12] - 800260c: 4a04 ldr r2, [pc, #16] @ (8002620 ) - 800260e: 68fb ldr r3, [r7, #12] - 8002610: 6053 str r3, [r2, #4] + 8002ee6: 4b0a ldr r3, [pc, #40] @ (8002f10 ) + 8002ee8: 685b ldr r3, [r3, #4] + 8002eea: 60fb str r3, [r7, #12] + 8002eec: 68fb ldr r3, [r7, #12] + 8002eee: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000 + 8002ef2: 60fb str r3, [r7, #12] + 8002ef4: 68fb ldr r3, [r7, #12] + 8002ef6: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000 + 8002efa: 60fb str r3, [r7, #12] + 8002efc: 4a04 ldr r2, [pc, #16] @ (8002f10 ) + 8002efe: 68fb ldr r3, [r7, #12] + 8002f00: 6053 str r3, [r2, #4] /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 8002612: bf00 nop - 8002614: 3714 adds r7, #20 - 8002616: 46bd mov sp, r7 - 8002618: bc80 pop {r7} - 800261a: 4770 bx lr - 800261c: 40021000 .word 0x40021000 - 8002620: 40010000 .word 0x40010000 + 8002f02: bf00 nop + 8002f04: 3714 adds r7, #20 + 8002f06: 46bd mov sp, r7 + 8002f08: bc80 pop {r7} + 8002f0a: 4770 bx lr + 8002f0c: 40021000 .word 0x40021000 + 8002f10: 40010000 .word 0x40010000 -08002624 : +08002f14 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 8002624: b480 push {r7} - 8002626: af00 add r7, sp, #0 + 8002f14: b480 push {r7} + 8002f16: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8002628: bf00 nop - 800262a: e7fd b.n 8002628 + 8002f18: bf00 nop + 8002f1a: e7fd b.n 8002f18 -0800262c : +08002f1c : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 800262c: b480 push {r7} - 800262e: af00 add r7, sp, #0 + 8002f1c: b480 push {r7} + 8002f1e: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 8002630: bf00 nop - 8002632: e7fd b.n 8002630 + 8002f20: bf00 nop + 8002f22: e7fd b.n 8002f20 -08002634 : +08002f24 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { - 8002634: b480 push {r7} - 8002636: af00 add r7, sp, #0 + 8002f24: b480 push {r7} + 8002f26: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) - 8002638: bf00 nop - 800263a: e7fd b.n 8002638 + 8002f28: bf00 nop + 8002f2a: e7fd b.n 8002f28 -0800263c : +08002f2c : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { - 800263c: b480 push {r7} - 800263e: af00 add r7, sp, #0 + 8002f2c: b480 push {r7} + 8002f2e: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) - 8002640: bf00 nop - 8002642: e7fd b.n 8002640 + 8002f30: bf00 nop + 8002f32: e7fd b.n 8002f30 -08002644 : +08002f34 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { - 8002644: b480 push {r7} - 8002646: af00 add r7, sp, #0 + 8002f34: b480 push {r7} + 8002f36: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) - 8002648: bf00 nop - 800264a: e7fd b.n 8002648 + 8002f38: bf00 nop + 8002f3a: e7fd b.n 8002f38 -0800264c : +08002f3c : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 800264c: b480 push {r7} - 800264e: af00 add r7, sp, #0 + 8002f3c: b480 push {r7} + 8002f3e: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } - 8002650: bf00 nop - 8002652: 46bd mov sp, r7 - 8002654: bc80 pop {r7} - 8002656: 4770 bx lr + 8002f40: bf00 nop + 8002f42: 46bd mov sp, r7 + 8002f44: bc80 pop {r7} + 8002f46: 4770 bx lr -08002658 : +08002f48 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { - 8002658: b480 push {r7} - 800265a: af00 add r7, sp, #0 + 8002f48: b480 push {r7} + 8002f4a: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } - 800265c: bf00 nop - 800265e: 46bd mov sp, r7 - 8002660: bc80 pop {r7} - 8002662: 4770 bx lr + 8002f4c: bf00 nop + 8002f4e: 46bd mov sp, r7 + 8002f50: bc80 pop {r7} + 8002f52: 4770 bx lr -08002664 : +08002f54 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 8002664: b480 push {r7} - 8002666: af00 add r7, sp, #0 + 8002f54: b480 push {r7} + 8002f56: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8002668: bf00 nop - 800266a: 46bd mov sp, r7 - 800266c: bc80 pop {r7} - 800266e: 4770 bx lr + 8002f58: bf00 nop + 8002f5a: 46bd mov sp, r7 + 8002f5c: bc80 pop {r7} + 8002f5e: 4770 bx lr -08002670 : +08002f60 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8002670: b580 push {r7, lr} - 8002672: af00 add r7, sp, #0 + 8002f60: b580 push {r7, lr} + 8002f62: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 8002674: f000 f97a bl 800296c + 8002f64: f000 f97a bl 800325c /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8002678: bf00 nop - 800267a: bd80 pop {r7, pc} + 8002f68: bf00 nop + 8002f6a: bd80 pop {r7, pc} -0800267c : +08002f6c : /** * @brief This function handles TIM3 global interrupt. */ void TIM3_IRQHandler(void) { - 800267c: b580 push {r7, lr} - 800267e: af00 add r7, sp, #0 + 8002f6c: b580 push {r7, lr} + 8002f6e: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_IRQn 0 */ /* USER CODE END TIM3_IRQn 0 */ HAL_TIM_IRQHandler(&htim3); - 8002680: 4802 ldr r0, [pc, #8] @ (800268c ) - 8002682: f002 fcef bl 8005064 + 8002f70: 4802 ldr r0, [pc, #8] @ (8002f7c ) + 8002f72: f002 fcef bl 8005954 /* USER CODE BEGIN TIM3_IRQn 1 */ /* USER CODE END TIM3_IRQn 1 */ } - 8002686: bf00 nop - 8002688: bd80 pop {r7, pc} - 800268a: bf00 nop - 800268c: 20000524 .word 0x20000524 + 8002f76: bf00 nop + 8002f78: bd80 pop {r7, pc} + 8002f7a: bf00 nop + 8002f7c: 200004e4 .word 0x200004e4 -08002690 : +08002f80 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { - 8002690: b580 push {r7, lr} - 8002692: af00 add r7, sp, #0 + 8002f80: b580 push {r7, lr} + 8002f82: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); - 8002694: 4802 ldr r0, [pc, #8] @ (80026a0 ) - 8002696: f003 f911 bl 80058bc + 8002f84: 4802 ldr r0, [pc, #8] @ (8002f90 ) + 8002f86: f003 f911 bl 80061ac /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } - 800269a: bf00 nop - 800269c: bd80 pop {r7, pc} - 800269e: bf00 nop - 80026a0: 2000056c .word 0x2000056c + 8002f8a: bf00 nop + 8002f8c: bd80 pop {r7, pc} + 8002f8e: bf00 nop + 8002f90: 2000052c .word 0x2000052c -080026a4 : +08002f94 : * @note This function should be used only after reset. * @param None * @retval None */ void SystemInit (void) { - 80026a4: b480 push {r7} - 80026a6: af00 add r7, sp, #0 + 8002f94: b480 push {r7} + 8002f96: af00 add r7, sp, #0 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ #endif /* USER_VECT_TAB_ADDRESS */ } - 80026a8: bf00 nop - 80026aa: 46bd mov sp, r7 - 80026ac: bc80 pop {r7} - 80026ae: 4770 bx lr + 8002f98: bf00 nop + 8002f9a: 46bd mov sp, r7 + 8002f9c: bc80 pop {r7} + 8002f9e: 4770 bx lr -080026b0 : +08002fa0 : TIM_HandleTypeDef htim3; /* TIM3 init function */ void MX_TIM3_Init(void) { - 80026b0: b580 push {r7, lr} - 80026b2: b086 sub sp, #24 - 80026b4: af00 add r7, sp, #0 + 8002fa0: b580 push {r7, lr} + 8002fa2: b086 sub sp, #24 + 8002fa4: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_Init 0 */ /* USER CODE END TIM3_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 80026b6: f107 0308 add.w r3, r7, #8 - 80026ba: 2200 movs r2, #0 - 80026bc: 601a str r2, [r3, #0] - 80026be: 605a str r2, [r3, #4] - 80026c0: 609a str r2, [r3, #8] - 80026c2: 60da str r2, [r3, #12] + 8002fa6: f107 0308 add.w r3, r7, #8 + 8002faa: 2200 movs r2, #0 + 8002fac: 601a str r2, [r3, #0] + 8002fae: 605a str r2, [r3, #4] + 8002fb0: 609a str r2, [r3, #8] + 8002fb2: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; - 80026c4: 463b mov r3, r7 - 80026c6: 2200 movs r2, #0 - 80026c8: 601a str r2, [r3, #0] - 80026ca: 605a str r2, [r3, #4] + 8002fb4: 463b mov r3, r7 + 8002fb6: 2200 movs r2, #0 + 8002fb8: 601a str r2, [r3, #0] + 8002fba: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM3_Init 1 */ /* USER CODE END TIM3_Init 1 */ htim3.Instance = TIM3; - 80026cc: 4b1d ldr r3, [pc, #116] @ (8002744 ) - 80026ce: 4a1e ldr r2, [pc, #120] @ (8002748 ) - 80026d0: 601a str r2, [r3, #0] + 8002fbc: 4b1d ldr r3, [pc, #116] @ (8003034 ) + 8002fbe: 4a1e ldr r2, [pc, #120] @ (8003038 ) + 8002fc0: 601a str r2, [r3, #0] htim3.Init.Prescaler = 2; - 80026d2: 4b1c ldr r3, [pc, #112] @ (8002744 ) - 80026d4: 2202 movs r2, #2 - 80026d6: 605a str r2, [r3, #4] + 8002fc2: 4b1c ldr r3, [pc, #112] @ (8003034 ) + 8002fc4: 2202 movs r2, #2 + 8002fc6: 605a str r2, [r3, #4] htim3.Init.CounterMode = TIM_COUNTERMODE_UP; - 80026d8: 4b1a ldr r3, [pc, #104] @ (8002744 ) - 80026da: 2200 movs r2, #0 - 80026dc: 609a str r2, [r3, #8] + 8002fc8: 4b1a ldr r3, [pc, #104] @ (8003034 ) + 8002fca: 2200 movs r2, #0 + 8002fcc: 609a str r2, [r3, #8] htim3.Init.Period = 999; - 80026de: 4b19 ldr r3, [pc, #100] @ (8002744 ) - 80026e0: f240 32e7 movw r2, #999 @ 0x3e7 - 80026e4: 60da str r2, [r3, #12] + 8002fce: 4b19 ldr r3, [pc, #100] @ (8003034 ) + 8002fd0: f240 32e7 movw r2, #999 @ 0x3e7 + 8002fd4: 60da str r2, [r3, #12] htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 80026e6: 4b17 ldr r3, [pc, #92] @ (8002744 ) - 80026e8: 2200 movs r2, #0 - 80026ea: 611a str r2, [r3, #16] + 8002fd6: 4b17 ldr r3, [pc, #92] @ (8003034 ) + 8002fd8: 2200 movs r2, #0 + 8002fda: 611a str r2, [r3, #16] htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 80026ec: 4b15 ldr r3, [pc, #84] @ (8002744 ) - 80026ee: 2280 movs r2, #128 @ 0x80 - 80026f0: 619a str r2, [r3, #24] + 8002fdc: 4b15 ldr r3, [pc, #84] @ (8003034 ) + 8002fde: 2280 movs r2, #128 @ 0x80 + 8002fe0: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim3) != HAL_OK) - 80026f2: 4814 ldr r0, [pc, #80] @ (8002744 ) - 80026f4: f002 fc14 bl 8004f20 - 80026f8: 4603 mov r3, r0 - 80026fa: 2b00 cmp r3, #0 - 80026fc: d001 beq.n 8002702 + 8002fe2: 4814 ldr r0, [pc, #80] @ (8003034 ) + 8002fe4: f002 fc14 bl 8005810 + 8002fe8: 4603 mov r3, r0 + 8002fea: 2b00 cmp r3, #0 + 8002fec: d001 beq.n 8002ff2 { Error_Handler(); - 80026fe: f7ff fe65 bl 80023cc + 8002fee: f7ff fe65 bl 8002cbc } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8002702: f44f 5380 mov.w r3, #4096 @ 0x1000 - 8002706: 60bb str r3, [r7, #8] + 8002ff2: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8002ff6: 60bb str r3, [r7, #8] if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) - 8002708: f107 0308 add.w r3, r7, #8 - 800270c: 4619 mov r1, r3 - 800270e: 480d ldr r0, [pc, #52] @ (8002744 ) - 8002710: f002 fd98 bl 8005244 - 8002714: 4603 mov r3, r0 - 8002716: 2b00 cmp r3, #0 - 8002718: d001 beq.n 800271e + 8002ff8: f107 0308 add.w r3, r7, #8 + 8002ffc: 4619 mov r1, r3 + 8002ffe: 480d ldr r0, [pc, #52] @ (8003034 ) + 8003000: f002 fd98 bl 8005b34 + 8003004: 4603 mov r3, r0 + 8003006: 2b00 cmp r3, #0 + 8003008: d001 beq.n 800300e { Error_Handler(); - 800271a: f7ff fe57 bl 80023cc + 800300a: f7ff fe57 bl 8002cbc } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 800271e: 2300 movs r3, #0 - 8002720: 603b str r3, [r7, #0] + 800300e: 2300 movs r3, #0 + 8003010: 603b str r3, [r7, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8002722: 2300 movs r3, #0 - 8002724: 607b str r3, [r7, #4] + 8003012: 2300 movs r3, #0 + 8003014: 607b str r3, [r7, #4] if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) - 8002726: 463b mov r3, r7 - 8002728: 4619 mov r1, r3 - 800272a: 4806 ldr r0, [pc, #24] @ (8002744 ) - 800272c: f002 ff7a bl 8005624 - 8002730: 4603 mov r3, r0 - 8002732: 2b00 cmp r3, #0 - 8002734: d001 beq.n 800273a + 8003016: 463b mov r3, r7 + 8003018: 4619 mov r1, r3 + 800301a: 4806 ldr r0, [pc, #24] @ (8003034 ) + 800301c: f002 ff7a bl 8005f14 + 8003020: 4603 mov r3, r0 + 8003022: 2b00 cmp r3, #0 + 8003024: d001 beq.n 800302a { Error_Handler(); - 8002736: f7ff fe49 bl 80023cc + 8003026: f7ff fe49 bl 8002cbc } /* USER CODE BEGIN TIM3_Init 2 */ /* USER CODE END TIM3_Init 2 */ } - 800273a: bf00 nop - 800273c: 3718 adds r7, #24 - 800273e: 46bd mov sp, r7 - 8002740: bd80 pop {r7, pc} - 8002742: bf00 nop - 8002744: 20000524 .word 0x20000524 - 8002748: 40000400 .word 0x40000400 + 800302a: bf00 nop + 800302c: 3718 adds r7, #24 + 800302e: 46bd mov sp, r7 + 8003030: bd80 pop {r7, pc} + 8003032: bf00 nop + 8003034: 200004e4 .word 0x200004e4 + 8003038: 40000400 .word 0x40000400 -0800274c : +0800303c : void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) { - 800274c: b580 push {r7, lr} - 800274e: b084 sub sp, #16 - 8002750: af00 add r7, sp, #0 - 8002752: 6078 str r0, [r7, #4] + 800303c: b580 push {r7, lr} + 800303e: b084 sub sp, #16 + 8003040: af00 add r7, sp, #0 + 8003042: 6078 str r0, [r7, #4] if(tim_baseHandle->Instance==TIM3) - 8002754: 687b ldr r3, [r7, #4] - 8002756: 681b ldr r3, [r3, #0] - 8002758: 4a0d ldr r2, [pc, #52] @ (8002790 ) - 800275a: 4293 cmp r3, r2 - 800275c: d113 bne.n 8002786 + 8003044: 687b ldr r3, [r7, #4] + 8003046: 681b ldr r3, [r3, #0] + 8003048: 4a0d ldr r2, [pc, #52] @ (8003080 ) + 800304a: 4293 cmp r3, r2 + 800304c: d113 bne.n 8003076 { /* USER CODE BEGIN TIM3_MspInit 0 */ /* USER CODE END TIM3_MspInit 0 */ /* TIM3 clock enable */ __HAL_RCC_TIM3_CLK_ENABLE(); - 800275e: 4b0d ldr r3, [pc, #52] @ (8002794 ) - 8002760: 69db ldr r3, [r3, #28] - 8002762: 4a0c ldr r2, [pc, #48] @ (8002794 ) - 8002764: f043 0302 orr.w r3, r3, #2 - 8002768: 61d3 str r3, [r2, #28] - 800276a: 4b0a ldr r3, [pc, #40] @ (8002794 ) - 800276c: 69db ldr r3, [r3, #28] - 800276e: f003 0302 and.w r3, r3, #2 - 8002772: 60fb str r3, [r7, #12] - 8002774: 68fb ldr r3, [r7, #12] + 800304e: 4b0d ldr r3, [pc, #52] @ (8003084 ) + 8003050: 69db ldr r3, [r3, #28] + 8003052: 4a0c ldr r2, [pc, #48] @ (8003084 ) + 8003054: f043 0302 orr.w r3, r3, #2 + 8003058: 61d3 str r3, [r2, #28] + 800305a: 4b0a ldr r3, [pc, #40] @ (8003084 ) + 800305c: 69db ldr r3, [r3, #28] + 800305e: f003 0302 and.w r3, r3, #2 + 8003062: 60fb str r3, [r7, #12] + 8003064: 68fb ldr r3, [r7, #12] /* TIM3 interrupt Init */ HAL_NVIC_SetPriority(TIM3_IRQn, 0, 0); - 8002776: 2200 movs r2, #0 - 8002778: 2100 movs r1, #0 - 800277a: 201d movs r0, #29 - 800277c: f000 fc1f bl 8002fbe + 8003066: 2200 movs r2, #0 + 8003068: 2100 movs r1, #0 + 800306a: 201d movs r0, #29 + 800306c: f000 fc1f bl 80038ae HAL_NVIC_EnableIRQ(TIM3_IRQn); - 8002780: 201d movs r0, #29 - 8002782: f000 fc38 bl 8002ff6 + 8003070: 201d movs r0, #29 + 8003072: f000 fc38 bl 80038e6 /* USER CODE BEGIN TIM3_MspInit 1 */ /* USER CODE END TIM3_MspInit 1 */ } } - 8002786: bf00 nop - 8002788: 3710 adds r7, #16 - 800278a: 46bd mov sp, r7 - 800278c: bd80 pop {r7, pc} - 800278e: bf00 nop - 8002790: 40000400 .word 0x40000400 - 8002794: 40021000 .word 0x40021000 + 8003076: bf00 nop + 8003078: 3710 adds r7, #16 + 800307a: 46bd mov sp, r7 + 800307c: bd80 pop {r7, pc} + 800307e: bf00 nop + 8003080: 40000400 .word 0x40000400 + 8003084: 40021000 .word 0x40021000 -08002798 : +08003088 : UART_HandleTypeDef huart1; /* USART1 init function */ void MX_USART1_UART_Init(void) { - 8002798: b580 push {r7, lr} - 800279a: af00 add r7, sp, #0 + 8003088: b580 push {r7, lr} + 800308a: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; - 800279c: 4b11 ldr r3, [pc, #68] @ (80027e4 ) - 800279e: 4a12 ldr r2, [pc, #72] @ (80027e8 ) - 80027a0: 601a str r2, [r3, #0] + 800308c: 4b11 ldr r3, [pc, #68] @ (80030d4 ) + 800308e: 4a12 ldr r2, [pc, #72] @ (80030d8 ) + 8003090: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; - 80027a2: 4b10 ldr r3, [pc, #64] @ (80027e4 ) - 80027a4: f44f 32e1 mov.w r2, #115200 @ 0x1c200 - 80027a8: 605a str r2, [r3, #4] + 8003092: 4b10 ldr r3, [pc, #64] @ (80030d4 ) + 8003094: f44f 32e1 mov.w r2, #115200 @ 0x1c200 + 8003098: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 80027aa: 4b0e ldr r3, [pc, #56] @ (80027e4 ) - 80027ac: 2200 movs r2, #0 - 80027ae: 609a str r2, [r3, #8] + 800309a: 4b0e ldr r3, [pc, #56] @ (80030d4 ) + 800309c: 2200 movs r2, #0 + 800309e: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 80027b0: 4b0c ldr r3, [pc, #48] @ (80027e4 ) - 80027b2: 2200 movs r2, #0 - 80027b4: 60da str r2, [r3, #12] + 80030a0: 4b0c ldr r3, [pc, #48] @ (80030d4 ) + 80030a2: 2200 movs r2, #0 + 80030a4: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 80027b6: 4b0b ldr r3, [pc, #44] @ (80027e4 ) - 80027b8: 2200 movs r2, #0 - 80027ba: 611a str r2, [r3, #16] + 80030a6: 4b0b ldr r3, [pc, #44] @ (80030d4 ) + 80030a8: 2200 movs r2, #0 + 80030aa: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 80027bc: 4b09 ldr r3, [pc, #36] @ (80027e4 ) - 80027be: 220c movs r2, #12 - 80027c0: 615a str r2, [r3, #20] + 80030ac: 4b09 ldr r3, [pc, #36] @ (80030d4 ) + 80030ae: 220c movs r2, #12 + 80030b0: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 80027c2: 4b08 ldr r3, [pc, #32] @ (80027e4 ) - 80027c4: 2200 movs r2, #0 - 80027c6: 619a str r2, [r3, #24] + 80030b2: 4b08 ldr r3, [pc, #32] @ (80030d4 ) + 80030b4: 2200 movs r2, #0 + 80030b6: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 80027c8: 4b06 ldr r3, [pc, #24] @ (80027e4 ) - 80027ca: 2200 movs r2, #0 - 80027cc: 61da str r2, [r3, #28] + 80030b8: 4b06 ldr r3, [pc, #24] @ (80030d4 ) + 80030ba: 2200 movs r2, #0 + 80030bc: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) - 80027ce: 4805 ldr r0, [pc, #20] @ (80027e4 ) - 80027d0: f002 ff98 bl 8005704 - 80027d4: 4603 mov r3, r0 - 80027d6: 2b00 cmp r3, #0 - 80027d8: d001 beq.n 80027de + 80030be: 4805 ldr r0, [pc, #20] @ (80030d4 ) + 80030c0: f002 ff98 bl 8005ff4 + 80030c4: 4603 mov r3, r0 + 80030c6: 2b00 cmp r3, #0 + 80030c8: d001 beq.n 80030ce { Error_Handler(); - 80027da: f7ff fdf7 bl 80023cc + 80030ca: f7ff fdf7 bl 8002cbc } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } - 80027de: bf00 nop - 80027e0: bd80 pop {r7, pc} - 80027e2: bf00 nop - 80027e4: 2000056c .word 0x2000056c - 80027e8: 40013800 .word 0x40013800 + 80030ce: bf00 nop + 80030d0: bd80 pop {r7, pc} + 80030d2: bf00 nop + 80030d4: 2000052c .word 0x2000052c + 80030d8: 40013800 .word 0x40013800 -080027ec : +080030dc : void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) { - 80027ec: b580 push {r7, lr} - 80027ee: b088 sub sp, #32 - 80027f0: af00 add r7, sp, #0 - 80027f2: 6078 str r0, [r7, #4] + 80030dc: b580 push {r7, lr} + 80030de: b088 sub sp, #32 + 80030e0: af00 add r7, sp, #0 + 80030e2: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 80027f4: f107 0310 add.w r3, r7, #16 - 80027f8: 2200 movs r2, #0 - 80027fa: 601a str r2, [r3, #0] - 80027fc: 605a str r2, [r3, #4] - 80027fe: 609a str r2, [r3, #8] - 8002800: 60da str r2, [r3, #12] + 80030e4: f107 0310 add.w r3, r7, #16 + 80030e8: 2200 movs r2, #0 + 80030ea: 601a str r2, [r3, #0] + 80030ec: 605a str r2, [r3, #4] + 80030ee: 609a str r2, [r3, #8] + 80030f0: 60da str r2, [r3, #12] if(uartHandle->Instance==USART1) - 8002802: 687b ldr r3, [r7, #4] - 8002804: 681b ldr r3, [r3, #0] - 8002806: 4a20 ldr r2, [pc, #128] @ (8002888 ) - 8002808: 4293 cmp r3, r2 - 800280a: d139 bne.n 8002880 + 80030f2: 687b ldr r3, [r7, #4] + 80030f4: 681b ldr r3, [r3, #0] + 80030f6: 4a20 ldr r2, [pc, #128] @ (8003178 ) + 80030f8: 4293 cmp r3, r2 + 80030fa: d139 bne.n 8003170 { /* USER CODE BEGIN USART1_MspInit 0 */ /* USER CODE END USART1_MspInit 0 */ /* USART1 clock enable */ __HAL_RCC_USART1_CLK_ENABLE(); - 800280c: 4b1f ldr r3, [pc, #124] @ (800288c ) - 800280e: 699b ldr r3, [r3, #24] - 8002810: 4a1e ldr r2, [pc, #120] @ (800288c ) - 8002812: f443 4380 orr.w r3, r3, #16384 @ 0x4000 - 8002816: 6193 str r3, [r2, #24] - 8002818: 4b1c ldr r3, [pc, #112] @ (800288c ) - 800281a: 699b ldr r3, [r3, #24] - 800281c: f403 4380 and.w r3, r3, #16384 @ 0x4000 - 8002820: 60fb str r3, [r7, #12] - 8002822: 68fb ldr r3, [r7, #12] + 80030fc: 4b1f ldr r3, [pc, #124] @ (800317c ) + 80030fe: 699b ldr r3, [r3, #24] + 8003100: 4a1e ldr r2, [pc, #120] @ (800317c ) + 8003102: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 8003106: 6193 str r3, [r2, #24] + 8003108: 4b1c ldr r3, [pc, #112] @ (800317c ) + 800310a: 699b ldr r3, [r3, #24] + 800310c: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 8003110: 60fb str r3, [r7, #12] + 8003112: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8002824: 4b19 ldr r3, [pc, #100] @ (800288c ) - 8002826: 699b ldr r3, [r3, #24] - 8002828: 4a18 ldr r2, [pc, #96] @ (800288c ) - 800282a: f043 0304 orr.w r3, r3, #4 - 800282e: 6193 str r3, [r2, #24] - 8002830: 4b16 ldr r3, [pc, #88] @ (800288c ) - 8002832: 699b ldr r3, [r3, #24] - 8002834: f003 0304 and.w r3, r3, #4 - 8002838: 60bb str r3, [r7, #8] - 800283a: 68bb ldr r3, [r7, #8] + 8003114: 4b19 ldr r3, [pc, #100] @ (800317c ) + 8003116: 699b ldr r3, [r3, #24] + 8003118: 4a18 ldr r2, [pc, #96] @ (800317c ) + 800311a: f043 0304 orr.w r3, r3, #4 + 800311e: 6193 str r3, [r2, #24] + 8003120: 4b16 ldr r3, [pc, #88] @ (800317c ) + 8003122: 699b ldr r3, [r3, #24] + 8003124: f003 0304 and.w r3, r3, #4 + 8003128: 60bb str r3, [r7, #8] + 800312a: 68bb ldr r3, [r7, #8] /**USART1 GPIO Configuration PA9 ------> USART1_TX PA10 ------> USART1_RX */ GPIO_InitStruct.Pin = TX_RS485_Pin; - 800283c: f44f 7300 mov.w r3, #512 @ 0x200 - 8002840: 613b str r3, [r7, #16] + 800312c: f44f 7300 mov.w r3, #512 @ 0x200 + 8003130: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8002842: 2302 movs r3, #2 - 8002844: 617b str r3, [r7, #20] + 8003132: 2302 movs r3, #2 + 8003134: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM; - 8002846: 2301 movs r3, #1 - 8002848: 61fb str r3, [r7, #28] + 8003136: 2301 movs r3, #1 + 8003138: 61fb str r3, [r7, #28] HAL_GPIO_Init(TX_RS485_GPIO_Port, &GPIO_InitStruct); - 800284a: f107 0310 add.w r3, r7, #16 - 800284e: 4619 mov r1, r3 - 8002850: 480f ldr r0, [pc, #60] @ (8002890 ) - 8002852: f000 fc9d bl 8003190 + 800313a: f107 0310 add.w r3, r7, #16 + 800313e: 4619 mov r1, r3 + 8003140: 480f ldr r0, [pc, #60] @ (8003180 ) + 8003142: f000 fc9d bl 8003a80 GPIO_InitStruct.Pin = RX_RS485_Pin; - 8002856: f44f 6380 mov.w r3, #1024 @ 0x400 - 800285a: 613b str r3, [r7, #16] + 8003146: f44f 6380 mov.w r3, #1024 @ 0x400 + 800314a: 613b str r3, [r7, #16] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 800285c: 2300 movs r3, #0 - 800285e: 617b str r3, [r7, #20] + 800314c: 2300 movs r3, #0 + 800314e: 617b str r3, [r7, #20] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8002860: 2300 movs r3, #0 - 8002862: 61bb str r3, [r7, #24] + 8003150: 2300 movs r3, #0 + 8003152: 61bb str r3, [r7, #24] HAL_GPIO_Init(RX_RS485_GPIO_Port, &GPIO_InitStruct); - 8002864: f107 0310 add.w r3, r7, #16 - 8002868: 4619 mov r1, r3 - 800286a: 4809 ldr r0, [pc, #36] @ (8002890 ) - 800286c: f000 fc90 bl 8003190 + 8003154: f107 0310 add.w r3, r7, #16 + 8003158: 4619 mov r1, r3 + 800315a: 4809 ldr r0, [pc, #36] @ (8003180 ) + 800315c: f000 fc90 bl 8003a80 /* USART1 interrupt Init */ HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); - 8002870: 2200 movs r2, #0 - 8002872: 2100 movs r1, #0 - 8002874: 2025 movs r0, #37 @ 0x25 - 8002876: f000 fba2 bl 8002fbe + 8003160: 2200 movs r2, #0 + 8003162: 2100 movs r1, #0 + 8003164: 2025 movs r0, #37 @ 0x25 + 8003166: f000 fba2 bl 80038ae HAL_NVIC_EnableIRQ(USART1_IRQn); - 800287a: 2025 movs r0, #37 @ 0x25 - 800287c: f000 fbbb bl 8002ff6 + 800316a: 2025 movs r0, #37 @ 0x25 + 800316c: f000 fbbb bl 80038e6 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } - 8002880: bf00 nop - 8002882: 3720 adds r7, #32 - 8002884: 46bd mov sp, r7 - 8002886: bd80 pop {r7, pc} - 8002888: 40013800 .word 0x40013800 - 800288c: 40021000 .word 0x40021000 - 8002890: 40010800 .word 0x40010800 + 8003170: bf00 nop + 8003172: 3720 adds r7, #32 + 8003174: 46bd mov sp, r7 + 8003176: bd80 pop {r7, pc} + 8003178: 40013800 .word 0x40013800 + 800317c: 40021000 .word 0x40021000 + 8003180: 40010800 .word 0x40010800 -08002894 : +08003184 : .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: /* Call the clock system initialization function.*/ bl SystemInit - 8002894: f7ff ff06 bl 80026a4 + 8003184: f7ff ff06 bl 8002f94 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8002898: 480b ldr r0, [pc, #44] @ (80028c8 ) + 8003188: 480b ldr r0, [pc, #44] @ (80031b8 ) ldr r1, =_edata - 800289a: 490c ldr r1, [pc, #48] @ (80028cc ) + 800318a: 490c ldr r1, [pc, #48] @ (80031bc ) ldr r2, =_sidata - 800289c: 4a0c ldr r2, [pc, #48] @ (80028d0 ) + 800318c: 4a0c ldr r2, [pc, #48] @ (80031c0 ) movs r3, #0 - 800289e: 2300 movs r3, #0 + 800318e: 2300 movs r3, #0 b LoopCopyDataInit - 80028a0: e002 b.n 80028a8 + 8003190: e002 b.n 8003198 -080028a2 : +08003192 : CopyDataInit: ldr r4, [r2, r3] - 80028a2: 58d4 ldr r4, [r2, r3] + 8003192: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 80028a4: 50c4 str r4, [r0, r3] + 8003194: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 80028a6: 3304 adds r3, #4 + 8003196: 3304 adds r3, #4 -080028a8 : +08003198 : LoopCopyDataInit: adds r4, r0, r3 - 80028a8: 18c4 adds r4, r0, r3 + 8003198: 18c4 adds r4, r0, r3 cmp r4, r1 - 80028aa: 428c cmp r4, r1 + 800319a: 428c cmp r4, r1 bcc CopyDataInit - 80028ac: d3f9 bcc.n 80028a2 + 800319c: d3f9 bcc.n 8003192 /* Zero fill the bss segment. */ ldr r2, =_sbss - 80028ae: 4a09 ldr r2, [pc, #36] @ (80028d4 ) + 800319e: 4a09 ldr r2, [pc, #36] @ (80031c4 ) ldr r4, =_ebss - 80028b0: 4c09 ldr r4, [pc, #36] @ (80028d8 ) + 80031a0: 4c09 ldr r4, [pc, #36] @ (80031c8 ) movs r3, #0 - 80028b2: 2300 movs r3, #0 + 80031a2: 2300 movs r3, #0 b LoopFillZerobss - 80028b4: e001 b.n 80028ba + 80031a4: e001 b.n 80031aa -080028b6 : +080031a6 : FillZerobss: str r3, [r2] - 80028b6: 6013 str r3, [r2, #0] + 80031a6: 6013 str r3, [r2, #0] adds r2, r2, #4 - 80028b8: 3204 adds r2, #4 + 80031a8: 3204 adds r2, #4 -080028ba : +080031aa : LoopFillZerobss: cmp r2, r4 - 80028ba: 42a2 cmp r2, r4 + 80031aa: 42a2 cmp r2, r4 bcc FillZerobss - 80028bc: d3fb bcc.n 80028b6 + 80031ac: d3fb bcc.n 80031a6 /* Call static constructors */ bl __libc_init_array - 80028be: f003 fd45 bl 800634c <__libc_init_array> + 80031ae: f003 fd45 bl 8006c3c <__libc_init_array> /* Call the application's entry point.*/ bl main - 80028c2: f7ff faff bl 8001ec4
+ 80031b2: f7ff f9fb bl 80025ac
bx lr - 80028c6: 4770 bx lr + 80031b6: 4770 bx lr ldr r0, =_sdata - 80028c8: 20000000 .word 0x20000000 + 80031b8: 20000000 .word 0x20000000 ldr r1, =_edata - 80028cc: 20000060 .word 0x20000060 + 80031bc: 20000060 .word 0x20000060 ldr r2, =_sidata - 80028d0: 08006660 .word 0x08006660 + 80031c0: 08006f50 .word 0x08006f50 ldr r2, =_sbss - 80028d4: 20000060 .word 0x20000060 + 80031c4: 20000060 .word 0x20000060 ldr r4, =_ebss - 80028d8: 200006f0 .word 0x200006f0 + 80031c8: 200006b0 .word 0x200006b0 -080028dc : +080031cc : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 80028dc: e7fe b.n 80028dc + 80031cc: e7fe b.n 80031cc ... -080028e0 : +080031d0 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 80028e0: b580 push {r7, lr} - 80028e2: af00 add r7, sp, #0 + 80031d0: b580 push {r7, lr} + 80031d2: af00 add r7, sp, #0 defined(STM32F102x6) || defined(STM32F102xB) || \ defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \ defined(STM32F105xC) || defined(STM32F107xC) /* Prefetch buffer is not available on value line devices */ __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); - 80028e4: 4b08 ldr r3, [pc, #32] @ (8002908 ) - 80028e6: 681b ldr r3, [r3, #0] - 80028e8: 4a07 ldr r2, [pc, #28] @ (8002908 ) - 80028ea: f043 0310 orr.w r3, r3, #16 - 80028ee: 6013 str r3, [r2, #0] + 80031d4: 4b08 ldr r3, [pc, #32] @ (80031f8 ) + 80031d6: 681b ldr r3, [r3, #0] + 80031d8: 4a07 ldr r2, [pc, #28] @ (80031f8 ) + 80031da: f043 0310 orr.w r3, r3, #16 + 80031de: 6013 str r3, [r2, #0] #endif #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - 80028f0: 2003 movs r0, #3 - 80028f2: f000 fb59 bl 8002fa8 + 80031e0: 2003 movs r0, #3 + 80031e2: f000 fb59 bl 8003898 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); - 80028f6: 200f movs r0, #15 - 80028f8: f000 f808 bl 800290c + 80031e6: 200f movs r0, #15 + 80031e8: f000 f808 bl 80031fc /* Init the low level hardware */ HAL_MspInit(); - 80028fc: f7ff fe60 bl 80025c0 + 80031ec: f7ff fe60 bl 8002eb0 /* Return function status */ return HAL_OK; - 8002900: 2300 movs r3, #0 + 80031f0: 2300 movs r3, #0 } - 8002902: 4618 mov r0, r3 - 8002904: bd80 pop {r7, pc} - 8002906: bf00 nop - 8002908: 40022000 .word 0x40022000 + 80031f2: 4618 mov r0, r3 + 80031f4: bd80 pop {r7, pc} + 80031f6: bf00 nop + 80031f8: 40022000 .word 0x40022000 -0800290c : +080031fc : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 800290c: b580 push {r7, lr} - 800290e: b082 sub sp, #8 - 8002910: af00 add r7, sp, #0 - 8002912: 6078 str r0, [r7, #4] + 80031fc: b580 push {r7, lr} + 80031fe: b082 sub sp, #8 + 8003200: af00 add r7, sp, #0 + 8003202: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 8002914: 4b12 ldr r3, [pc, #72] @ (8002960 ) - 8002916: 681a ldr r2, [r3, #0] - 8002918: 4b12 ldr r3, [pc, #72] @ (8002964 ) - 800291a: 781b ldrb r3, [r3, #0] - 800291c: 4619 mov r1, r3 - 800291e: f44f 737a mov.w r3, #1000 @ 0x3e8 - 8002922: fbb3 f3f1 udiv r3, r3, r1 - 8002926: fbb2 f3f3 udiv r3, r2, r3 - 800292a: 4618 mov r0, r3 - 800292c: f000 fb71 bl 8003012 - 8002930: 4603 mov r3, r0 - 8002932: 2b00 cmp r3, #0 - 8002934: d001 beq.n 800293a + 8003204: 4b12 ldr r3, [pc, #72] @ (8003250 ) + 8003206: 681a ldr r2, [r3, #0] + 8003208: 4b12 ldr r3, [pc, #72] @ (8003254 ) + 800320a: 781b ldrb r3, [r3, #0] + 800320c: 4619 mov r1, r3 + 800320e: f44f 737a mov.w r3, #1000 @ 0x3e8 + 8003212: fbb3 f3f1 udiv r3, r3, r1 + 8003216: fbb2 f3f3 udiv r3, r2, r3 + 800321a: 4618 mov r0, r3 + 800321c: f000 fb71 bl 8003902 + 8003220: 4603 mov r3, r0 + 8003222: 2b00 cmp r3, #0 + 8003224: d001 beq.n 800322a { return HAL_ERROR; - 8002936: 2301 movs r3, #1 - 8002938: e00e b.n 8002958 + 8003226: 2301 movs r3, #1 + 8003228: e00e b.n 8003248 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 800293a: 687b ldr r3, [r7, #4] - 800293c: 2b0f cmp r3, #15 - 800293e: d80a bhi.n 8002956 + 800322a: 687b ldr r3, [r7, #4] + 800322c: 2b0f cmp r3, #15 + 800322e: d80a bhi.n 8003246 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 8002940: 2200 movs r2, #0 - 8002942: 6879 ldr r1, [r7, #4] - 8002944: f04f 30ff mov.w r0, #4294967295 - 8002948: f000 fb39 bl 8002fbe + 8003230: 2200 movs r2, #0 + 8003232: 6879 ldr r1, [r7, #4] + 8003234: f04f 30ff mov.w r0, #4294967295 + 8003238: f000 fb39 bl 80038ae uwTickPrio = TickPriority; - 800294c: 4a06 ldr r2, [pc, #24] @ (8002968 ) - 800294e: 687b ldr r3, [r7, #4] - 8002950: 6013 str r3, [r2, #0] + 800323c: 4a06 ldr r2, [pc, #24] @ (8003258 ) + 800323e: 687b ldr r3, [r7, #4] + 8003240: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 8002952: 2300 movs r3, #0 - 8002954: e000 b.n 8002958 + 8003242: 2300 movs r3, #0 + 8003244: e000 b.n 8003248 return HAL_ERROR; - 8002956: 2301 movs r3, #1 + 8003246: 2301 movs r3, #1 } - 8002958: 4618 mov r0, r3 - 800295a: 3708 adds r7, #8 - 800295c: 46bd mov sp, r7 - 800295e: bd80 pop {r7, pc} - 8002960: 20000004 .word 0x20000004 - 8002964: 2000000c .word 0x2000000c - 8002968: 20000008 .word 0x20000008 + 8003248: 4618 mov r0, r3 + 800324a: 3708 adds r7, #8 + 800324c: 46bd mov sp, r7 + 800324e: bd80 pop {r7, pc} + 8003250: 20000004 .word 0x20000004 + 8003254: 2000000c .word 0x2000000c + 8003258: 20000008 .word 0x20000008 -0800296c : +0800325c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 800296c: b480 push {r7} - 800296e: af00 add r7, sp, #0 + 800325c: b480 push {r7} + 800325e: af00 add r7, sp, #0 uwTick += uwTickFreq; - 8002970: 4b05 ldr r3, [pc, #20] @ (8002988 ) - 8002972: 781b ldrb r3, [r3, #0] - 8002974: 461a mov r2, r3 - 8002976: 4b05 ldr r3, [pc, #20] @ (800298c ) - 8002978: 681b ldr r3, [r3, #0] - 800297a: 4413 add r3, r2 - 800297c: 4a03 ldr r2, [pc, #12] @ (800298c ) - 800297e: 6013 str r3, [r2, #0] + 8003260: 4b05 ldr r3, [pc, #20] @ (8003278 ) + 8003262: 781b ldrb r3, [r3, #0] + 8003264: 461a mov r2, r3 + 8003266: 4b05 ldr r3, [pc, #20] @ (800327c ) + 8003268: 681b ldr r3, [r3, #0] + 800326a: 4413 add r3, r2 + 800326c: 4a03 ldr r2, [pc, #12] @ (800327c ) + 800326e: 6013 str r3, [r2, #0] } - 8002980: bf00 nop - 8002982: 46bd mov sp, r7 - 8002984: bc80 pop {r7} - 8002986: 4770 bx lr - 8002988: 2000000c .word 0x2000000c - 800298c: 200005b4 .word 0x200005b4 + 8003270: bf00 nop + 8003272: 46bd mov sp, r7 + 8003274: bc80 pop {r7} + 8003276: 4770 bx lr + 8003278: 2000000c .word 0x2000000c + 800327c: 20000574 .word 0x20000574 -08002990 : +08003280 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 8002990: b480 push {r7} - 8002992: af00 add r7, sp, #0 + 8003280: b480 push {r7} + 8003282: af00 add r7, sp, #0 return uwTick; - 8002994: 4b02 ldr r3, [pc, #8] @ (80029a0 ) - 8002996: 681b ldr r3, [r3, #0] + 8003284: 4b02 ldr r3, [pc, #8] @ (8003290 ) + 8003286: 681b ldr r3, [r3, #0] } - 8002998: 4618 mov r0, r3 - 800299a: 46bd mov sp, r7 - 800299c: bc80 pop {r7} - 800299e: 4770 bx lr - 80029a0: 200005b4 .word 0x200005b4 + 8003288: 4618 mov r0, r3 + 800328a: 46bd mov sp, r7 + 800328c: bc80 pop {r7} + 800328e: 4770 bx lr + 8003290: 20000574 .word 0x20000574 -080029a4 : +08003294 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 80029a4: b580 push {r7, lr} - 80029a6: b084 sub sp, #16 - 80029a8: af00 add r7, sp, #0 - 80029aa: 6078 str r0, [r7, #4] + 8003294: b580 push {r7, lr} + 8003296: b084 sub sp, #16 + 8003298: af00 add r7, sp, #0 + 800329a: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 80029ac: f7ff fff0 bl 8002990 - 80029b0: 60b8 str r0, [r7, #8] + 800329c: f7ff fff0 bl 8003280 + 80032a0: 60b8 str r0, [r7, #8] uint32_t wait = Delay; - 80029b2: 687b ldr r3, [r7, #4] - 80029b4: 60fb str r3, [r7, #12] + 80032a2: 687b ldr r3, [r7, #4] + 80032a4: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 80029b6: 68fb ldr r3, [r7, #12] - 80029b8: f1b3 3fff cmp.w r3, #4294967295 - 80029bc: d005 beq.n 80029ca + 80032a6: 68fb ldr r3, [r7, #12] + 80032a8: f1b3 3fff cmp.w r3, #4294967295 + 80032ac: d005 beq.n 80032ba { wait += (uint32_t)(uwTickFreq); - 80029be: 4b0a ldr r3, [pc, #40] @ (80029e8 ) - 80029c0: 781b ldrb r3, [r3, #0] - 80029c2: 461a mov r2, r3 - 80029c4: 68fb ldr r3, [r7, #12] - 80029c6: 4413 add r3, r2 - 80029c8: 60fb str r3, [r7, #12] + 80032ae: 4b0a ldr r3, [pc, #40] @ (80032d8 ) + 80032b0: 781b ldrb r3, [r3, #0] + 80032b2: 461a mov r2, r3 + 80032b4: 68fb ldr r3, [r7, #12] + 80032b6: 4413 add r3, r2 + 80032b8: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) - 80029ca: bf00 nop - 80029cc: f7ff ffe0 bl 8002990 - 80029d0: 4602 mov r2, r0 - 80029d2: 68bb ldr r3, [r7, #8] - 80029d4: 1ad3 subs r3, r2, r3 - 80029d6: 68fa ldr r2, [r7, #12] - 80029d8: 429a cmp r2, r3 - 80029da: d8f7 bhi.n 80029cc + 80032ba: bf00 nop + 80032bc: f7ff ffe0 bl 8003280 + 80032c0: 4602 mov r2, r0 + 80032c2: 68bb ldr r3, [r7, #8] + 80032c4: 1ad3 subs r3, r2, r3 + 80032c6: 68fa ldr r2, [r7, #12] + 80032c8: 429a cmp r2, r3 + 80032ca: d8f7 bhi.n 80032bc { } } - 80029dc: bf00 nop - 80029de: bf00 nop - 80029e0: 3710 adds r7, #16 - 80029e2: 46bd mov sp, r7 - 80029e4: bd80 pop {r7, pc} - 80029e6: bf00 nop - 80029e8: 2000000c .word 0x2000000c + 80032cc: bf00 nop + 80032ce: bf00 nop + 80032d0: 3710 adds r7, #16 + 80032d2: 46bd mov sp, r7 + 80032d4: bd80 pop {r7, pc} + 80032d6: bf00 nop + 80032d8: 2000000c .word 0x2000000c -080029ec : +080032dc : * of structure "ADC_InitTypeDef". * @param hadc: ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { - 80029ec: b580 push {r7, lr} - 80029ee: b086 sub sp, #24 - 80029f0: af00 add r7, sp, #0 - 80029f2: 6078 str r0, [r7, #4] + 80032dc: b580 push {r7, lr} + 80032de: b086 sub sp, #24 + 80032e0: af00 add r7, sp, #0 + 80032e2: 6078 str r0, [r7, #4] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 80029f4: 2300 movs r3, #0 - 80029f6: 75fb strb r3, [r7, #23] + 80032e4: 2300 movs r3, #0 + 80032e6: 75fb strb r3, [r7, #23] uint32_t tmp_cr1 = 0U; - 80029f8: 2300 movs r3, #0 - 80029fa: 613b str r3, [r7, #16] + 80032e8: 2300 movs r3, #0 + 80032ea: 613b str r3, [r7, #16] uint32_t tmp_cr2 = 0U; - 80029fc: 2300 movs r3, #0 - 80029fe: 60bb str r3, [r7, #8] + 80032ec: 2300 movs r3, #0 + 80032ee: 60bb str r3, [r7, #8] uint32_t tmp_sqr1 = 0U; - 8002a00: 2300 movs r3, #0 - 8002a02: 60fb str r3, [r7, #12] + 80032f0: 2300 movs r3, #0 + 80032f2: 60fb str r3, [r7, #12] /* Check ADC handle */ if(hadc == NULL) - 8002a04: 687b ldr r3, [r7, #4] - 8002a06: 2b00 cmp r3, #0 - 8002a08: d101 bne.n 8002a0e + 80032f4: 687b ldr r3, [r7, #4] + 80032f6: 2b00 cmp r3, #0 + 80032f8: d101 bne.n 80032fe { return HAL_ERROR; - 8002a0a: 2301 movs r3, #1 - 8002a0c: e0be b.n 8002b8c + 80032fa: 2301 movs r3, #1 + 80032fc: e0be b.n 800347c assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) - 8002a0e: 687b ldr r3, [r7, #4] - 8002a10: 689b ldr r3, [r3, #8] - 8002a12: 2b00 cmp r3, #0 + 80032fe: 687b ldr r3, [r7, #4] + 8003300: 689b ldr r3, [r3, #8] + 8003302: 2b00 cmp r3, #0 /* Refer to header of this file for more details on clock enabling */ /* procedure. */ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ if (hadc->State == HAL_ADC_STATE_RESET) - 8002a14: 687b ldr r3, [r7, #4] - 8002a16: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002a18: 2b00 cmp r3, #0 - 8002a1a: d109 bne.n 8002a30 + 8003304: 687b ldr r3, [r7, #4] + 8003306: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003308: 2b00 cmp r3, #0 + 800330a: d109 bne.n 8003320 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); - 8002a1c: 687b ldr r3, [r7, #4] - 8002a1e: 2200 movs r2, #0 - 8002a20: 62da str r2, [r3, #44] @ 0x2c + 800330c: 687b ldr r3, [r7, #4] + 800330e: 2200 movs r2, #0 + 8003310: 62da str r2, [r3, #44] @ 0x2c /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; - 8002a22: 687b ldr r3, [r7, #4] - 8002a24: 2200 movs r2, #0 - 8002a26: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 8003312: 687b ldr r3, [r7, #4] + 8003314: 2200 movs r2, #0 + 8003316: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); - 8002a2a: 6878 ldr r0, [r7, #4] - 8002a2c: f7fe fd48 bl 80014c0 + 800331a: 6878 ldr r0, [r7, #4] + 800331c: f7fe fc48 bl 8001bb0 /* Stop potential conversion on going, on regular and injected groups */ /* Disable ADC peripheral */ /* Note: In case of ADC already enabled, precaution to not launch an */ /* unwanted conversion while modifying register CR2 by writing 1 to */ /* bit ADON. */ tmp_hal_status = ADC_ConversionStop_Disable(hadc); - 8002a30: 6878 ldr r0, [r7, #4] - 8002a32: f000 f9ab bl 8002d8c - 8002a36: 4603 mov r3, r0 - 8002a38: 75fb strb r3, [r7, #23] + 8003320: 6878 ldr r0, [r7, #4] + 8003322: f000 f9ab bl 800367c + 8003326: 4603 mov r3, r0 + 8003328: 75fb strb r3, [r7, #23] /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && - 8002a3a: 687b ldr r3, [r7, #4] - 8002a3c: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002a3e: f003 0310 and.w r3, r3, #16 - 8002a42: 2b00 cmp r3, #0 - 8002a44: f040 8099 bne.w 8002b7a - 8002a48: 7dfb ldrb r3, [r7, #23] - 8002a4a: 2b00 cmp r3, #0 - 8002a4c: f040 8095 bne.w 8002b7a + 800332a: 687b ldr r3, [r7, #4] + 800332c: 6a9b ldr r3, [r3, #40] @ 0x28 + 800332e: f003 0310 and.w r3, r3, #16 + 8003332: 2b00 cmp r3, #0 + 8003334: f040 8099 bne.w 800346a + 8003338: 7dfb ldrb r3, [r7, #23] + 800333a: 2b00 cmp r3, #0 + 800333c: f040 8095 bne.w 800346a (tmp_hal_status == HAL_OK) ) { /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8002a50: 687b ldr r3, [r7, #4] - 8002a52: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002a54: f423 5388 bic.w r3, r3, #4352 @ 0x1100 - 8002a58: f023 0302 bic.w r3, r3, #2 - 8002a5c: f043 0202 orr.w r2, r3, #2 - 8002a60: 687b ldr r3, [r7, #4] - 8002a62: 629a str r2, [r3, #40] @ 0x28 + 8003340: 687b ldr r3, [r7, #4] + 8003342: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003344: f423 5388 bic.w r3, r3, #4352 @ 0x1100 + 8003348: f023 0302 bic.w r3, r3, #2 + 800334c: f043 0202 orr.w r2, r3, #2 + 8003350: 687b ldr r3, [r7, #4] + 8003352: 629a str r2, [r3, #40] @ 0x28 /* - continuous conversion mode */ /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */ /* HAL_ADC_Start_xxx functions because if set in this function, */ /* a conversion on injected group would start a conversion also on */ /* regular group after ADC enabling. */ tmp_cr2 |= (hadc->Init.DataAlign | - 8002a64: 687b ldr r3, [r7, #4] - 8002a66: 685a ldr r2, [r3, #4] + 8003354: 687b ldr r3, [r7, #4] + 8003356: 685a ldr r2, [r3, #4] ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | - 8002a68: 687b ldr r3, [r7, #4] - 8002a6a: 69db ldr r3, [r3, #28] + 8003358: 687b ldr r3, [r7, #4] + 800335a: 69db ldr r3, [r3, #28] tmp_cr2 |= (hadc->Init.DataAlign | - 8002a6c: 431a orrs r2, r3 + 800335c: 431a orrs r2, r3 ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) ); - 8002a6e: 687b ldr r3, [r7, #4] - 8002a70: 7b1b ldrb r3, [r3, #12] - 8002a72: 005b lsls r3, r3, #1 + 800335e: 687b ldr r3, [r7, #4] + 8003360: 7b1b ldrb r3, [r3, #12] + 8003362: 005b lsls r3, r3, #1 ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) | - 8002a74: 4313 orrs r3, r2 + 8003364: 4313 orrs r3, r2 tmp_cr2 |= (hadc->Init.DataAlign | - 8002a76: 68ba ldr r2, [r7, #8] - 8002a78: 4313 orrs r3, r2 - 8002a7a: 60bb str r3, [r7, #8] + 8003366: 68ba ldr r2, [r7, #8] + 8003368: 4313 orrs r3, r2 + 800336a: 60bb str r3, [r7, #8] /* Configuration of ADC: */ /* - scan mode */ /* - discontinuous mode disable/enable */ /* - discontinuous mode number of conversions */ tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)); - 8002a7c: 687b ldr r3, [r7, #4] - 8002a7e: 689b ldr r3, [r3, #8] - 8002a80: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8002a84: d003 beq.n 8002a8e - 8002a86: 687b ldr r3, [r7, #4] - 8002a88: 689b ldr r3, [r3, #8] - 8002a8a: 2b01 cmp r3, #1 - 8002a8c: d102 bne.n 8002a94 - 8002a8e: f44f 7380 mov.w r3, #256 @ 0x100 - 8002a92: e000 b.n 8002a96 - 8002a94: 2300 movs r3, #0 - 8002a96: 693a ldr r2, [r7, #16] - 8002a98: 4313 orrs r3, r2 - 8002a9a: 613b str r3, [r7, #16] + 800336c: 687b ldr r3, [r7, #4] + 800336e: 689b ldr r3, [r3, #8] + 8003370: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8003374: d003 beq.n 800337e + 8003376: 687b ldr r3, [r7, #4] + 8003378: 689b ldr r3, [r3, #8] + 800337a: 2b01 cmp r3, #1 + 800337c: d102 bne.n 8003384 + 800337e: f44f 7380 mov.w r3, #256 @ 0x100 + 8003382: e000 b.n 8003386 + 8003384: 2300 movs r3, #0 + 8003386: 693a ldr r2, [r7, #16] + 8003388: 4313 orrs r3, r2 + 800338a: 613b str r3, [r7, #16] /* Enable discontinuous mode only if continuous mode is disabled */ /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */ /* discontinuous is set anyway, but will have no effect on ADC HW. */ if (hadc->Init.DiscontinuousConvMode == ENABLE) - 8002a9c: 687b ldr r3, [r7, #4] - 8002a9e: 7d1b ldrb r3, [r3, #20] - 8002aa0: 2b01 cmp r3, #1 - 8002aa2: d119 bne.n 8002ad8 + 800338c: 687b ldr r3, [r7, #4] + 800338e: 7d1b ldrb r3, [r3, #20] + 8003390: 2b01 cmp r3, #1 + 8003392: d119 bne.n 80033c8 { if (hadc->Init.ContinuousConvMode == DISABLE) - 8002aa4: 687b ldr r3, [r7, #4] - 8002aa6: 7b1b ldrb r3, [r3, #12] - 8002aa8: 2b00 cmp r3, #0 - 8002aaa: d109 bne.n 8002ac0 + 8003394: 687b ldr r3, [r7, #4] + 8003396: 7b1b ldrb r3, [r3, #12] + 8003398: 2b00 cmp r3, #0 + 800339a: d109 bne.n 80033b0 { /* Enable the selected ADC regular discontinuous mode */ /* Set the number of channels to be converted in discontinuous mode */ SET_BIT(tmp_cr1, ADC_CR1_DISCEN | - 8002aac: 687b ldr r3, [r7, #4] - 8002aae: 699b ldr r3, [r3, #24] - 8002ab0: 3b01 subs r3, #1 - 8002ab2: 035a lsls r2, r3, #13 - 8002ab4: 693b ldr r3, [r7, #16] - 8002ab6: 4313 orrs r3, r2 - 8002ab8: f443 6300 orr.w r3, r3, #2048 @ 0x800 - 8002abc: 613b str r3, [r7, #16] - 8002abe: e00b b.n 8002ad8 + 800339c: 687b ldr r3, [r7, #4] + 800339e: 699b ldr r3, [r3, #24] + 80033a0: 3b01 subs r3, #1 + 80033a2: 035a lsls r2, r3, #13 + 80033a4: 693b ldr r3, [r7, #16] + 80033a6: 4313 orrs r3, r2 + 80033a8: f443 6300 orr.w r3, r3, #2048 @ 0x800 + 80033ac: 613b str r3, [r7, #16] + 80033ae: e00b b.n 80033c8 { /* ADC regular group settings continuous and sequencer discontinuous*/ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8002ac0: 687b ldr r3, [r7, #4] - 8002ac2: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002ac4: f043 0220 orr.w r2, r3, #32 - 8002ac8: 687b ldr r3, [r7, #4] - 8002aca: 629a str r2, [r3, #40] @ 0x28 + 80033b0: 687b ldr r3, [r7, #4] + 80033b2: 6a9b ldr r3, [r3, #40] @ 0x28 + 80033b4: f043 0220 orr.w r2, r3, #32 + 80033b8: 687b ldr r3, [r7, #4] + 80033ba: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8002acc: 687b ldr r3, [r7, #4] - 8002ace: 6adb ldr r3, [r3, #44] @ 0x2c - 8002ad0: f043 0201 orr.w r2, r3, #1 - 8002ad4: 687b ldr r3, [r7, #4] - 8002ad6: 62da str r2, [r3, #44] @ 0x2c + 80033bc: 687b ldr r3, [r7, #4] + 80033be: 6adb ldr r3, [r3, #44] @ 0x2c + 80033c0: f043 0201 orr.w r2, r3, #1 + 80033c4: 687b ldr r3, [r7, #4] + 80033c6: 62da str r2, [r3, #44] @ 0x2c } } /* Update ADC configuration register CR1 with previous settings */ MODIFY_REG(hadc->Instance->CR1, - 8002ad8: 687b ldr r3, [r7, #4] - 8002ada: 681b ldr r3, [r3, #0] - 8002adc: 685b ldr r3, [r3, #4] - 8002ade: f423 4169 bic.w r1, r3, #59648 @ 0xe900 - 8002ae2: 687b ldr r3, [r7, #4] - 8002ae4: 681b ldr r3, [r3, #0] - 8002ae6: 693a ldr r2, [r7, #16] - 8002ae8: 430a orrs r2, r1 - 8002aea: 605a str r2, [r3, #4] + 80033c8: 687b ldr r3, [r7, #4] + 80033ca: 681b ldr r3, [r3, #0] + 80033cc: 685b ldr r3, [r3, #4] + 80033ce: f423 4169 bic.w r1, r3, #59648 @ 0xe900 + 80033d2: 687b ldr r3, [r7, #4] + 80033d4: 681b ldr r3, [r3, #0] + 80033d6: 693a ldr r2, [r7, #16] + 80033d8: 430a orrs r2, r1 + 80033da: 605a str r2, [r3, #4] ADC_CR1_DISCEN | ADC_CR1_DISCNUM , tmp_cr1 ); /* Update ADC configuration register CR2 with previous settings */ MODIFY_REG(hadc->Instance->CR2, - 8002aec: 687b ldr r3, [r7, #4] - 8002aee: 681b ldr r3, [r3, #0] - 8002af0: 689a ldr r2, [r3, #8] - 8002af2: 4b28 ldr r3, [pc, #160] @ (8002b94 ) - 8002af4: 4013 ands r3, r2 - 8002af6: 687a ldr r2, [r7, #4] - 8002af8: 6812 ldr r2, [r2, #0] - 8002afa: 68b9 ldr r1, [r7, #8] - 8002afc: 430b orrs r3, r1 - 8002afe: 6093 str r3, [r2, #8] + 80033dc: 687b ldr r3, [r7, #4] + 80033de: 681b ldr r3, [r3, #0] + 80033e0: 689a ldr r2, [r3, #8] + 80033e2: 4b28 ldr r3, [pc, #160] @ (8003484 ) + 80033e4: 4013 ands r3, r2 + 80033e6: 687a ldr r2, [r7, #4] + 80033e8: 6812 ldr r2, [r2, #0] + 80033ea: 68b9 ldr r1, [r7, #8] + 80033ec: 430b orrs r3, r1 + 80033ee: 6093 str r3, [r2, #8] /* Note: Scan mode is present by hardware on this device and, if */ /* disabled, discards automatically nb of conversions. Anyway, nb of */ /* conversions is forced to 0x00 for alignment over all STM32 devices. */ /* - if scan mode is enabled, regular channels sequence length is set to */ /* parameter "NbrOfConversion" */ if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE) - 8002b00: 687b ldr r3, [r7, #4] - 8002b02: 689b ldr r3, [r3, #8] - 8002b04: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8002b08: d003 beq.n 8002b12 - 8002b0a: 687b ldr r3, [r7, #4] - 8002b0c: 689b ldr r3, [r3, #8] - 8002b0e: 2b01 cmp r3, #1 - 8002b10: d104 bne.n 8002b1c + 80033f0: 687b ldr r3, [r7, #4] + 80033f2: 689b ldr r3, [r3, #8] + 80033f4: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80033f8: d003 beq.n 8003402 + 80033fa: 687b ldr r3, [r7, #4] + 80033fc: 689b ldr r3, [r3, #8] + 80033fe: 2b01 cmp r3, #1 + 8003400: d104 bne.n 800340c { tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion); - 8002b12: 687b ldr r3, [r7, #4] - 8002b14: 691b ldr r3, [r3, #16] - 8002b16: 3b01 subs r3, #1 - 8002b18: 051b lsls r3, r3, #20 - 8002b1a: 60fb str r3, [r7, #12] + 8003402: 687b ldr r3, [r7, #4] + 8003404: 691b ldr r3, [r3, #16] + 8003406: 3b01 subs r3, #1 + 8003408: 051b lsls r3, r3, #20 + 800340a: 60fb str r3, [r7, #12] } MODIFY_REG(hadc->Instance->SQR1, - 8002b1c: 687b ldr r3, [r7, #4] - 8002b1e: 681b ldr r3, [r3, #0] - 8002b20: 6adb ldr r3, [r3, #44] @ 0x2c - 8002b22: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 - 8002b26: 687b ldr r3, [r7, #4] - 8002b28: 681b ldr r3, [r3, #0] - 8002b2a: 68fa ldr r2, [r7, #12] - 8002b2c: 430a orrs r2, r1 - 8002b2e: 62da str r2, [r3, #44] @ 0x2c + 800340c: 687b ldr r3, [r7, #4] + 800340e: 681b ldr r3, [r3, #0] + 8003410: 6adb ldr r3, [r3, #44] @ 0x2c + 8003412: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000 + 8003416: 687b ldr r3, [r7, #4] + 8003418: 681b ldr r3, [r3, #0] + 800341a: 68fa ldr r2, [r7, #12] + 800341c: 430a orrs r2, r1 + 800341e: 62da str r2, [r3, #44] @ 0x2c /* ensure of no potential problem of ADC core IP clocking. */ /* Check through register CR2 (excluding bits set in other functions: */ /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */ /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */ /* measurement path bit (TSVREFE). */ if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 8002b30: 687b ldr r3, [r7, #4] - 8002b32: 681b ldr r3, [r3, #0] - 8002b34: 689a ldr r2, [r3, #8] - 8002b36: 4b18 ldr r3, [pc, #96] @ (8002b98 ) - 8002b38: 4013 ands r3, r2 - 8002b3a: 68ba ldr r2, [r7, #8] - 8002b3c: 429a cmp r2, r3 - 8002b3e: d10b bne.n 8002b58 + 8003420: 687b ldr r3, [r7, #4] + 8003422: 681b ldr r3, [r3, #0] + 8003424: 689a ldr r2, [r3, #8] + 8003426: 4b18 ldr r3, [pc, #96] @ (8003488 ) + 8003428: 4013 ands r3, r2 + 800342a: 68ba ldr r2, [r7, #8] + 800342c: 429a cmp r2, r3 + 800342e: d10b bne.n 8003448 ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL | ADC_CR2_TSVREFE )) == tmp_cr2) { /* Set ADC error code to none */ ADC_CLEAR_ERRORCODE(hadc); - 8002b40: 687b ldr r3, [r7, #4] - 8002b42: 2200 movs r2, #0 - 8002b44: 62da str r2, [r3, #44] @ 0x2c + 8003430: 687b ldr r3, [r7, #4] + 8003432: 2200 movs r2, #0 + 8003434: 62da str r2, [r3, #44] @ 0x2c /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8002b46: 687b ldr r3, [r7, #4] - 8002b48: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002b4a: f023 0303 bic.w r3, r3, #3 - 8002b4e: f043 0201 orr.w r2, r3, #1 - 8002b52: 687b ldr r3, [r7, #4] - 8002b54: 629a str r2, [r3, #40] @ 0x28 + 8003436: 687b ldr r3, [r7, #4] + 8003438: 6a9b ldr r3, [r3, #40] @ 0x28 + 800343a: f023 0303 bic.w r3, r3, #3 + 800343e: f043 0201 orr.w r2, r3, #1 + 8003442: 687b ldr r3, [r7, #4] + 8003444: 629a str r2, [r3, #40] @ 0x28 if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 8002b56: e018 b.n 8002b8a + 8003446: e018 b.n 800347a HAL_ADC_STATE_READY); } else { /* Update ADC state machine to error */ ADC_STATE_CLR_SET(hadc->State, - 8002b58: 687b ldr r3, [r7, #4] - 8002b5a: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002b5c: f023 0312 bic.w r3, r3, #18 - 8002b60: f043 0210 orr.w r2, r3, #16 - 8002b64: 687b ldr r3, [r7, #4] - 8002b66: 629a str r2, [r3, #40] @ 0x28 + 8003448: 687b ldr r3, [r7, #4] + 800344a: 6a9b ldr r3, [r3, #40] @ 0x28 + 800344c: f023 0312 bic.w r3, r3, #18 + 8003450: f043 0210 orr.w r2, r3, #16 + 8003454: 687b ldr r3, [r7, #4] + 8003456: 629a str r2, [r3, #40] @ 0x28 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8002b68: 687b ldr r3, [r7, #4] - 8002b6a: 6adb ldr r3, [r3, #44] @ 0x2c - 8002b6c: f043 0201 orr.w r2, r3, #1 - 8002b70: 687b ldr r3, [r7, #4] - 8002b72: 62da str r2, [r3, #44] @ 0x2c + 8003458: 687b ldr r3, [r7, #4] + 800345a: 6adb ldr r3, [r3, #44] @ 0x2c + 800345c: f043 0201 orr.w r2, r3, #1 + 8003460: 687b ldr r3, [r7, #4] + 8003462: 62da str r2, [r3, #44] @ 0x2c tmp_hal_status = HAL_ERROR; - 8002b74: 2301 movs r3, #1 - 8002b76: 75fb strb r3, [r7, #23] + 8003464: 2301 movs r3, #1 + 8003466: 75fb strb r3, [r7, #23] if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA | - 8002b78: e007 b.n 8002b8a + 8003468: e007 b.n 800347a } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8002b7a: 687b ldr r3, [r7, #4] - 8002b7c: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002b7e: f043 0210 orr.w r2, r3, #16 - 8002b82: 687b ldr r3, [r7, #4] - 8002b84: 629a str r2, [r3, #40] @ 0x28 + 800346a: 687b ldr r3, [r7, #4] + 800346c: 6a9b ldr r3, [r3, #40] @ 0x28 + 800346e: f043 0210 orr.w r2, r3, #16 + 8003472: 687b ldr r3, [r7, #4] + 8003474: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; - 8002b86: 2301 movs r3, #1 - 8002b88: 75fb strb r3, [r7, #23] + 8003476: 2301 movs r3, #1 + 8003478: 75fb strb r3, [r7, #23] } /* Return function status */ return tmp_hal_status; - 8002b8a: 7dfb ldrb r3, [r7, #23] + 800347a: 7dfb ldrb r3, [r7, #23] } - 8002b8c: 4618 mov r0, r3 - 8002b8e: 3718 adds r7, #24 - 8002b90: 46bd mov sp, r7 - 8002b92: bd80 pop {r7, pc} - 8002b94: ffe1f7fd .word 0xffe1f7fd - 8002b98: ff1f0efe .word 0xff1f0efe + 800347c: 4618 mov r0, r3 + 800347e: 3718 adds r7, #24 + 8003480: 46bd mov sp, r7 + 8003482: bd80 pop {r7, pc} + 8003484: ffe1f7fd .word 0xffe1f7fd + 8003488: ff1f0efe .word 0xff1f0efe -08002b9c : +0800348c : * @param hadc: ADC handle * @param sConfig: Structure of ADC channel for regular group. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) { - 8002b9c: b480 push {r7} - 8002b9e: b085 sub sp, #20 - 8002ba0: af00 add r7, sp, #0 - 8002ba2: 6078 str r0, [r7, #4] - 8002ba4: 6039 str r1, [r7, #0] + 800348c: b480 push {r7} + 800348e: b085 sub sp, #20 + 8003490: af00 add r7, sp, #0 + 8003492: 6078 str r0, [r7, #4] + 8003494: 6039 str r1, [r7, #0] HAL_StatusTypeDef tmp_hal_status = HAL_OK; - 8002ba6: 2300 movs r3, #0 - 8002ba8: 73fb strb r3, [r7, #15] + 8003496: 2300 movs r3, #0 + 8003498: 73fb strb r3, [r7, #15] __IO uint32_t wait_loop_index = 0U; - 8002baa: 2300 movs r3, #0 - 8002bac: 60bb str r3, [r7, #8] + 800349a: 2300 movs r3, #0 + 800349c: 60bb str r3, [r7, #8] assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); /* Process locked */ __HAL_LOCK(hadc); - 8002bae: 687b ldr r3, [r7, #4] - 8002bb0: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 - 8002bb4: 2b01 cmp r3, #1 - 8002bb6: d101 bne.n 8002bbc - 8002bb8: 2302 movs r3, #2 - 8002bba: e0dc b.n 8002d76 - 8002bbc: 687b ldr r3, [r7, #4] - 8002bbe: 2201 movs r2, #1 - 8002bc0: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 800349e: 687b ldr r3, [r7, #4] + 80034a0: f893 3024 ldrb.w r3, [r3, #36] @ 0x24 + 80034a4: 2b01 cmp r3, #1 + 80034a6: d101 bne.n 80034ac + 80034a8: 2302 movs r3, #2 + 80034aa: e0dc b.n 8003666 + 80034ac: 687b ldr r3, [r7, #4] + 80034ae: 2201 movs r2, #1 + 80034b0: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Regular sequence configuration */ /* For Rank 1 to 6 */ if (sConfig->Rank < 7U) - 8002bc4: 683b ldr r3, [r7, #0] - 8002bc6: 685b ldr r3, [r3, #4] - 8002bc8: 2b06 cmp r3, #6 - 8002bca: d81c bhi.n 8002c06 + 80034b4: 683b ldr r3, [r7, #0] + 80034b6: 685b ldr r3, [r3, #4] + 80034b8: 2b06 cmp r3, #6 + 80034ba: d81c bhi.n 80034f6 { MODIFY_REG(hadc->Instance->SQR3 , - 8002bcc: 687b ldr r3, [r7, #4] - 8002bce: 681b ldr r3, [r3, #0] - 8002bd0: 6b59 ldr r1, [r3, #52] @ 0x34 - 8002bd2: 683b ldr r3, [r7, #0] - 8002bd4: 685a ldr r2, [r3, #4] - 8002bd6: 4613 mov r3, r2 - 8002bd8: 009b lsls r3, r3, #2 - 8002bda: 4413 add r3, r2 - 8002bdc: 3b05 subs r3, #5 - 8002bde: 221f movs r2, #31 - 8002be0: fa02 f303 lsl.w r3, r2, r3 - 8002be4: 43db mvns r3, r3 - 8002be6: 4019 ands r1, r3 - 8002be8: 683b ldr r3, [r7, #0] - 8002bea: 6818 ldr r0, [r3, #0] - 8002bec: 683b ldr r3, [r7, #0] - 8002bee: 685a ldr r2, [r3, #4] - 8002bf0: 4613 mov r3, r2 - 8002bf2: 009b lsls r3, r3, #2 - 8002bf4: 4413 add r3, r2 - 8002bf6: 3b05 subs r3, #5 - 8002bf8: fa00 f203 lsl.w r2, r0, r3 - 8002bfc: 687b ldr r3, [r7, #4] - 8002bfe: 681b ldr r3, [r3, #0] - 8002c00: 430a orrs r2, r1 - 8002c02: 635a str r2, [r3, #52] @ 0x34 - 8002c04: e03c b.n 8002c80 + 80034bc: 687b ldr r3, [r7, #4] + 80034be: 681b ldr r3, [r3, #0] + 80034c0: 6b59 ldr r1, [r3, #52] @ 0x34 + 80034c2: 683b ldr r3, [r7, #0] + 80034c4: 685a ldr r2, [r3, #4] + 80034c6: 4613 mov r3, r2 + 80034c8: 009b lsls r3, r3, #2 + 80034ca: 4413 add r3, r2 + 80034cc: 3b05 subs r3, #5 + 80034ce: 221f movs r2, #31 + 80034d0: fa02 f303 lsl.w r3, r2, r3 + 80034d4: 43db mvns r3, r3 + 80034d6: 4019 ands r1, r3 + 80034d8: 683b ldr r3, [r7, #0] + 80034da: 6818 ldr r0, [r3, #0] + 80034dc: 683b ldr r3, [r7, #0] + 80034de: 685a ldr r2, [r3, #4] + 80034e0: 4613 mov r3, r2 + 80034e2: 009b lsls r3, r3, #2 + 80034e4: 4413 add r3, r2 + 80034e6: 3b05 subs r3, #5 + 80034e8: fa00 f203 lsl.w r2, r0, r3 + 80034ec: 687b ldr r3, [r7, #4] + 80034ee: 681b ldr r3, [r3, #0] + 80034f0: 430a orrs r2, r1 + 80034f2: 635a str r2, [r3, #52] @ 0x34 + 80034f4: e03c b.n 8003570 ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) , ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 7 to 12 */ else if (sConfig->Rank < 13U) - 8002c06: 683b ldr r3, [r7, #0] - 8002c08: 685b ldr r3, [r3, #4] - 8002c0a: 2b0c cmp r3, #12 - 8002c0c: d81c bhi.n 8002c48 + 80034f6: 683b ldr r3, [r7, #0] + 80034f8: 685b ldr r3, [r3, #4] + 80034fa: 2b0c cmp r3, #12 + 80034fc: d81c bhi.n 8003538 { MODIFY_REG(hadc->Instance->SQR2 , - 8002c0e: 687b ldr r3, [r7, #4] - 8002c10: 681b ldr r3, [r3, #0] - 8002c12: 6b19 ldr r1, [r3, #48] @ 0x30 - 8002c14: 683b ldr r3, [r7, #0] - 8002c16: 685a ldr r2, [r3, #4] - 8002c18: 4613 mov r3, r2 - 8002c1a: 009b lsls r3, r3, #2 - 8002c1c: 4413 add r3, r2 - 8002c1e: 3b23 subs r3, #35 @ 0x23 - 8002c20: 221f movs r2, #31 - 8002c22: fa02 f303 lsl.w r3, r2, r3 - 8002c26: 43db mvns r3, r3 - 8002c28: 4019 ands r1, r3 - 8002c2a: 683b ldr r3, [r7, #0] - 8002c2c: 6818 ldr r0, [r3, #0] - 8002c2e: 683b ldr r3, [r7, #0] - 8002c30: 685a ldr r2, [r3, #4] - 8002c32: 4613 mov r3, r2 - 8002c34: 009b lsls r3, r3, #2 - 8002c36: 4413 add r3, r2 - 8002c38: 3b23 subs r3, #35 @ 0x23 - 8002c3a: fa00 f203 lsl.w r2, r0, r3 - 8002c3e: 687b ldr r3, [r7, #4] - 8002c40: 681b ldr r3, [r3, #0] - 8002c42: 430a orrs r2, r1 - 8002c44: 631a str r2, [r3, #48] @ 0x30 - 8002c46: e01b b.n 8002c80 + 80034fe: 687b ldr r3, [r7, #4] + 8003500: 681b ldr r3, [r3, #0] + 8003502: 6b19 ldr r1, [r3, #48] @ 0x30 + 8003504: 683b ldr r3, [r7, #0] + 8003506: 685a ldr r2, [r3, #4] + 8003508: 4613 mov r3, r2 + 800350a: 009b lsls r3, r3, #2 + 800350c: 4413 add r3, r2 + 800350e: 3b23 subs r3, #35 @ 0x23 + 8003510: 221f movs r2, #31 + 8003512: fa02 f303 lsl.w r3, r2, r3 + 8003516: 43db mvns r3, r3 + 8003518: 4019 ands r1, r3 + 800351a: 683b ldr r3, [r7, #0] + 800351c: 6818 ldr r0, [r3, #0] + 800351e: 683b ldr r3, [r7, #0] + 8003520: 685a ldr r2, [r3, #4] + 8003522: 4613 mov r3, r2 + 8003524: 009b lsls r3, r3, #2 + 8003526: 4413 add r3, r2 + 8003528: 3b23 subs r3, #35 @ 0x23 + 800352a: fa00 f203 lsl.w r2, r0, r3 + 800352e: 687b ldr r3, [r7, #4] + 8003530: 681b ldr r3, [r3, #0] + 8003532: 430a orrs r2, r1 + 8003534: 631a str r2, [r3, #48] @ 0x30 + 8003536: e01b b.n 8003570 ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) ); } /* For Rank 13 to 16 */ else { MODIFY_REG(hadc->Instance->SQR1 , - 8002c48: 687b ldr r3, [r7, #4] - 8002c4a: 681b ldr r3, [r3, #0] - 8002c4c: 6ad9 ldr r1, [r3, #44] @ 0x2c - 8002c4e: 683b ldr r3, [r7, #0] - 8002c50: 685a ldr r2, [r3, #4] - 8002c52: 4613 mov r3, r2 - 8002c54: 009b lsls r3, r3, #2 - 8002c56: 4413 add r3, r2 - 8002c58: 3b41 subs r3, #65 @ 0x41 - 8002c5a: 221f movs r2, #31 - 8002c5c: fa02 f303 lsl.w r3, r2, r3 - 8002c60: 43db mvns r3, r3 - 8002c62: 4019 ands r1, r3 - 8002c64: 683b ldr r3, [r7, #0] - 8002c66: 6818 ldr r0, [r3, #0] - 8002c68: 683b ldr r3, [r7, #0] - 8002c6a: 685a ldr r2, [r3, #4] - 8002c6c: 4613 mov r3, r2 - 8002c6e: 009b lsls r3, r3, #2 - 8002c70: 4413 add r3, r2 - 8002c72: 3b41 subs r3, #65 @ 0x41 - 8002c74: fa00 f203 lsl.w r2, r0, r3 - 8002c78: 687b ldr r3, [r7, #4] - 8002c7a: 681b ldr r3, [r3, #0] - 8002c7c: 430a orrs r2, r1 - 8002c7e: 62da str r2, [r3, #44] @ 0x2c + 8003538: 687b ldr r3, [r7, #4] + 800353a: 681b ldr r3, [r3, #0] + 800353c: 6ad9 ldr r1, [r3, #44] @ 0x2c + 800353e: 683b ldr r3, [r7, #0] + 8003540: 685a ldr r2, [r3, #4] + 8003542: 4613 mov r3, r2 + 8003544: 009b lsls r3, r3, #2 + 8003546: 4413 add r3, r2 + 8003548: 3b41 subs r3, #65 @ 0x41 + 800354a: 221f movs r2, #31 + 800354c: fa02 f303 lsl.w r3, r2, r3 + 8003550: 43db mvns r3, r3 + 8003552: 4019 ands r1, r3 + 8003554: 683b ldr r3, [r7, #0] + 8003556: 6818 ldr r0, [r3, #0] + 8003558: 683b ldr r3, [r7, #0] + 800355a: 685a ldr r2, [r3, #4] + 800355c: 4613 mov r3, r2 + 800355e: 009b lsls r3, r3, #2 + 8003560: 4413 add r3, r2 + 8003562: 3b41 subs r3, #65 @ 0x41 + 8003564: fa00 f203 lsl.w r2, r0, r3 + 8003568: 687b ldr r3, [r7, #4] + 800356a: 681b ldr r3, [r3, #0] + 800356c: 430a orrs r2, r1 + 800356e: 62da str r2, [r3, #44] @ 0x2c } /* Channel sampling time configuration */ /* For channels 10 to 17 */ if (sConfig->Channel >= ADC_CHANNEL_10) - 8002c80: 683b ldr r3, [r7, #0] - 8002c82: 681b ldr r3, [r3, #0] - 8002c84: 2b09 cmp r3, #9 - 8002c86: d91c bls.n 8002cc2 + 8003570: 683b ldr r3, [r7, #0] + 8003572: 681b ldr r3, [r3, #0] + 8003574: 2b09 cmp r3, #9 + 8003576: d91c bls.n 80035b2 { MODIFY_REG(hadc->Instance->SMPR1 , - 8002c88: 687b ldr r3, [r7, #4] - 8002c8a: 681b ldr r3, [r3, #0] - 8002c8c: 68d9 ldr r1, [r3, #12] - 8002c8e: 683b ldr r3, [r7, #0] - 8002c90: 681a ldr r2, [r3, #0] - 8002c92: 4613 mov r3, r2 - 8002c94: 005b lsls r3, r3, #1 - 8002c96: 4413 add r3, r2 - 8002c98: 3b1e subs r3, #30 - 8002c9a: 2207 movs r2, #7 - 8002c9c: fa02 f303 lsl.w r3, r2, r3 - 8002ca0: 43db mvns r3, r3 - 8002ca2: 4019 ands r1, r3 - 8002ca4: 683b ldr r3, [r7, #0] - 8002ca6: 6898 ldr r0, [r3, #8] - 8002ca8: 683b ldr r3, [r7, #0] - 8002caa: 681a ldr r2, [r3, #0] - 8002cac: 4613 mov r3, r2 - 8002cae: 005b lsls r3, r3, #1 - 8002cb0: 4413 add r3, r2 - 8002cb2: 3b1e subs r3, #30 - 8002cb4: fa00 f203 lsl.w r2, r0, r3 - 8002cb8: 687b ldr r3, [r7, #4] - 8002cba: 681b ldr r3, [r3, #0] - 8002cbc: 430a orrs r2, r1 - 8002cbe: 60da str r2, [r3, #12] - 8002cc0: e019 b.n 8002cf6 + 8003578: 687b ldr r3, [r7, #4] + 800357a: 681b ldr r3, [r3, #0] + 800357c: 68d9 ldr r1, [r3, #12] + 800357e: 683b ldr r3, [r7, #0] + 8003580: 681a ldr r2, [r3, #0] + 8003582: 4613 mov r3, r2 + 8003584: 005b lsls r3, r3, #1 + 8003586: 4413 add r3, r2 + 8003588: 3b1e subs r3, #30 + 800358a: 2207 movs r2, #7 + 800358c: fa02 f303 lsl.w r3, r2, r3 + 8003590: 43db mvns r3, r3 + 8003592: 4019 ands r1, r3 + 8003594: 683b ldr r3, [r7, #0] + 8003596: 6898 ldr r0, [r3, #8] + 8003598: 683b ldr r3, [r7, #0] + 800359a: 681a ldr r2, [r3, #0] + 800359c: 4613 mov r3, r2 + 800359e: 005b lsls r3, r3, #1 + 80035a0: 4413 add r3, r2 + 80035a2: 3b1e subs r3, #30 + 80035a4: fa00 f203 lsl.w r2, r0, r3 + 80035a8: 687b ldr r3, [r7, #4] + 80035aa: 681b ldr r3, [r3, #0] + 80035ac: 430a orrs r2, r1 + 80035ae: 60da str r2, [r3, #12] + 80035b0: e019 b.n 80035e6 ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) , ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) ); } else /* For channels 0 to 9 */ { MODIFY_REG(hadc->Instance->SMPR2 , - 8002cc2: 687b ldr r3, [r7, #4] - 8002cc4: 681b ldr r3, [r3, #0] - 8002cc6: 6919 ldr r1, [r3, #16] - 8002cc8: 683b ldr r3, [r7, #0] - 8002cca: 681a ldr r2, [r3, #0] - 8002ccc: 4613 mov r3, r2 - 8002cce: 005b lsls r3, r3, #1 - 8002cd0: 4413 add r3, r2 - 8002cd2: 2207 movs r2, #7 - 8002cd4: fa02 f303 lsl.w r3, r2, r3 - 8002cd8: 43db mvns r3, r3 - 8002cda: 4019 ands r1, r3 - 8002cdc: 683b ldr r3, [r7, #0] - 8002cde: 6898 ldr r0, [r3, #8] - 8002ce0: 683b ldr r3, [r7, #0] - 8002ce2: 681a ldr r2, [r3, #0] - 8002ce4: 4613 mov r3, r2 - 8002ce6: 005b lsls r3, r3, #1 - 8002ce8: 4413 add r3, r2 - 8002cea: fa00 f203 lsl.w r2, r0, r3 - 8002cee: 687b ldr r3, [r7, #4] - 8002cf0: 681b ldr r3, [r3, #0] - 8002cf2: 430a orrs r2, r1 - 8002cf4: 611a str r2, [r3, #16] + 80035b2: 687b ldr r3, [r7, #4] + 80035b4: 681b ldr r3, [r3, #0] + 80035b6: 6919 ldr r1, [r3, #16] + 80035b8: 683b ldr r3, [r7, #0] + 80035ba: 681a ldr r2, [r3, #0] + 80035bc: 4613 mov r3, r2 + 80035be: 005b lsls r3, r3, #1 + 80035c0: 4413 add r3, r2 + 80035c2: 2207 movs r2, #7 + 80035c4: fa02 f303 lsl.w r3, r2, r3 + 80035c8: 43db mvns r3, r3 + 80035ca: 4019 ands r1, r3 + 80035cc: 683b ldr r3, [r7, #0] + 80035ce: 6898 ldr r0, [r3, #8] + 80035d0: 683b ldr r3, [r7, #0] + 80035d2: 681a ldr r2, [r3, #0] + 80035d4: 4613 mov r3, r2 + 80035d6: 005b lsls r3, r3, #1 + 80035d8: 4413 add r3, r2 + 80035da: fa00 f203 lsl.w r2, r0, r3 + 80035de: 687b ldr r3, [r7, #4] + 80035e0: 681b ldr r3, [r3, #0] + 80035e2: 430a orrs r2, r1 + 80035e4: 611a str r2, [r3, #16] ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) ); } /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */ /* and VREFINT measurement path. */ if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 8002cf6: 683b ldr r3, [r7, #0] - 8002cf8: 681b ldr r3, [r3, #0] - 8002cfa: 2b10 cmp r3, #16 - 8002cfc: d003 beq.n 8002d06 + 80035e6: 683b ldr r3, [r7, #0] + 80035e8: 681b ldr r3, [r3, #0] + 80035ea: 2b10 cmp r3, #16 + 80035ec: d003 beq.n 80035f6 (sConfig->Channel == ADC_CHANNEL_VREFINT) ) - 8002cfe: 683b ldr r3, [r7, #0] - 8002d00: 681b ldr r3, [r3, #0] + 80035ee: 683b ldr r3, [r7, #0] + 80035f0: 681b ldr r3, [r3, #0] if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || - 8002d02: 2b11 cmp r3, #17 - 8002d04: d132 bne.n 8002d6c + 80035f2: 2b11 cmp r3, #17 + 80035f4: d132 bne.n 800365c { /* For STM32F1 devices with several ADC: Only ADC1 can access internal */ /* measurement channels (VrefInt/TempSensor). If these channels are */ /* intended to be set on other ADC instances, an error is reported. */ if (hadc->Instance == ADC1) - 8002d06: 687b ldr r3, [r7, #4] - 8002d08: 681b ldr r3, [r3, #0] - 8002d0a: 4a1d ldr r2, [pc, #116] @ (8002d80 ) - 8002d0c: 4293 cmp r3, r2 - 8002d0e: d125 bne.n 8002d5c + 80035f6: 687b ldr r3, [r7, #4] + 80035f8: 681b ldr r3, [r3, #0] + 80035fa: 4a1d ldr r2, [pc, #116] @ (8003670 ) + 80035fc: 4293 cmp r3, r2 + 80035fe: d125 bne.n 800364c { if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET) - 8002d10: 687b ldr r3, [r7, #4] - 8002d12: 681b ldr r3, [r3, #0] - 8002d14: 689b ldr r3, [r3, #8] - 8002d16: f403 0300 and.w r3, r3, #8388608 @ 0x800000 - 8002d1a: 2b00 cmp r3, #0 - 8002d1c: d126 bne.n 8002d6c + 8003600: 687b ldr r3, [r7, #4] + 8003602: 681b ldr r3, [r3, #0] + 8003604: 689b ldr r3, [r3, #8] + 8003606: f403 0300 and.w r3, r3, #8388608 @ 0x800000 + 800360a: 2b00 cmp r3, #0 + 800360c: d126 bne.n 800365c { SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE); - 8002d1e: 687b ldr r3, [r7, #4] - 8002d20: 681b ldr r3, [r3, #0] - 8002d22: 689a ldr r2, [r3, #8] - 8002d24: 687b ldr r3, [r7, #4] - 8002d26: 681b ldr r3, [r3, #0] - 8002d28: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 - 8002d2c: 609a str r2, [r3, #8] + 800360e: 687b ldr r3, [r7, #4] + 8003610: 681b ldr r3, [r3, #0] + 8003612: 689a ldr r2, [r3, #8] + 8003614: 687b ldr r3, [r7, #4] + 8003616: 681b ldr r3, [r3, #0] + 8003618: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 + 800361c: 609a str r2, [r3, #8] if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) - 8002d2e: 683b ldr r3, [r7, #0] - 8002d30: 681b ldr r3, [r3, #0] - 8002d32: 2b10 cmp r3, #16 - 8002d34: d11a bne.n 8002d6c + 800361e: 683b ldr r3, [r7, #0] + 8003620: 681b ldr r3, [r3, #0] + 8003622: 2b10 cmp r3, #16 + 8003624: d11a bne.n 800365c { /* Delay for temperature sensor stabilization time */ /* Compute number of CPU cycles to wait for */ wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); - 8002d36: 4b13 ldr r3, [pc, #76] @ (8002d84 ) - 8002d38: 681b ldr r3, [r3, #0] - 8002d3a: 4a13 ldr r2, [pc, #76] @ (8002d88 ) - 8002d3c: fba2 2303 umull r2, r3, r2, r3 - 8002d40: 0c9a lsrs r2, r3, #18 - 8002d42: 4613 mov r3, r2 - 8002d44: 009b lsls r3, r3, #2 - 8002d46: 4413 add r3, r2 - 8002d48: 005b lsls r3, r3, #1 - 8002d4a: 60bb str r3, [r7, #8] + 8003626: 4b13 ldr r3, [pc, #76] @ (8003674 ) + 8003628: 681b ldr r3, [r3, #0] + 800362a: 4a13 ldr r2, [pc, #76] @ (8003678 ) + 800362c: fba2 2303 umull r2, r3, r2, r3 + 8003630: 0c9a lsrs r2, r3, #18 + 8003632: 4613 mov r3, r2 + 8003634: 009b lsls r3, r3, #2 + 8003636: 4413 add r3, r2 + 8003638: 005b lsls r3, r3, #1 + 800363a: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 8002d4c: e002 b.n 8002d54 + 800363c: e002 b.n 8003644 { wait_loop_index--; - 8002d4e: 68bb ldr r3, [r7, #8] - 8002d50: 3b01 subs r3, #1 - 8002d52: 60bb str r3, [r7, #8] + 800363e: 68bb ldr r3, [r7, #8] + 8003640: 3b01 subs r3, #1 + 8003642: 60bb str r3, [r7, #8] while(wait_loop_index != 0U) - 8002d54: 68bb ldr r3, [r7, #8] - 8002d56: 2b00 cmp r3, #0 - 8002d58: d1f9 bne.n 8002d4e - 8002d5a: e007 b.n 8002d6c + 8003644: 68bb ldr r3, [r7, #8] + 8003646: 2b00 cmp r3, #0 + 8003648: d1f9 bne.n 800363e + 800364a: e007 b.n 800365c } } else { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8002d5c: 687b ldr r3, [r7, #4] - 8002d5e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002d60: f043 0220 orr.w r2, r3, #32 - 8002d64: 687b ldr r3, [r7, #4] - 8002d66: 629a str r2, [r3, #40] @ 0x28 + 800364c: 687b ldr r3, [r7, #4] + 800364e: 6a9b ldr r3, [r3, #40] @ 0x28 + 8003650: f043 0220 orr.w r2, r3, #32 + 8003654: 687b ldr r3, [r7, #4] + 8003656: 629a str r2, [r3, #40] @ 0x28 tmp_hal_status = HAL_ERROR; - 8002d68: 2301 movs r3, #1 - 8002d6a: 73fb strb r3, [r7, #15] + 8003658: 2301 movs r3, #1 + 800365a: 73fb strb r3, [r7, #15] } } /* Process unlocked */ __HAL_UNLOCK(hadc); - 8002d6c: 687b ldr r3, [r7, #4] - 8002d6e: 2200 movs r2, #0 - 8002d70: f883 2024 strb.w r2, [r3, #36] @ 0x24 + 800365c: 687b ldr r3, [r7, #4] + 800365e: 2200 movs r2, #0 + 8003660: f883 2024 strb.w r2, [r3, #36] @ 0x24 /* Return function status */ return tmp_hal_status; - 8002d74: 7bfb ldrb r3, [r7, #15] + 8003664: 7bfb ldrb r3, [r7, #15] } - 8002d76: 4618 mov r0, r3 - 8002d78: 3714 adds r7, #20 - 8002d7a: 46bd mov sp, r7 - 8002d7c: bc80 pop {r7} - 8002d7e: 4770 bx lr - 8002d80: 40012400 .word 0x40012400 - 8002d84: 20000004 .word 0x20000004 - 8002d88: 431bde83 .word 0x431bde83 + 8003666: 4618 mov r0, r3 + 8003668: 3714 adds r7, #20 + 800366a: 46bd mov sp, r7 + 800366c: bc80 pop {r7} + 800366e: 4770 bx lr + 8003670: 40012400 .word 0x40012400 + 8003674: 20000004 .word 0x20000004 + 8003678: 431bde83 .word 0x431bde83 -08002d8c : +0800367c : * stopped to disable the ADC. * @param hadc: ADC handle * @retval HAL status. */ HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc) { - 8002d8c: b580 push {r7, lr} - 8002d8e: b084 sub sp, #16 - 8002d90: af00 add r7, sp, #0 - 8002d92: 6078 str r0, [r7, #4] + 800367c: b580 push {r7, lr} + 800367e: b084 sub sp, #16 + 8003680: af00 add r7, sp, #0 + 8003682: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; - 8002d94: 2300 movs r3, #0 - 8002d96: 60fb str r3, [r7, #12] + 8003684: 2300 movs r3, #0 + 8003686: 60fb str r3, [r7, #12] /* Verification if ADC is not already disabled */ if (ADC_IS_ENABLE(hadc) != RESET) - 8002d98: 687b ldr r3, [r7, #4] - 8002d9a: 681b ldr r3, [r3, #0] - 8002d9c: 689b ldr r3, [r3, #8] - 8002d9e: f003 0301 and.w r3, r3, #1 - 8002da2: 2b01 cmp r3, #1 - 8002da4: d12e bne.n 8002e04 + 8003688: 687b ldr r3, [r7, #4] + 800368a: 681b ldr r3, [r3, #0] + 800368c: 689b ldr r3, [r3, #8] + 800368e: f003 0301 and.w r3, r3, #1 + 8003692: 2b01 cmp r3, #1 + 8003694: d12e bne.n 80036f4 { /* Disable the ADC peripheral */ __HAL_ADC_DISABLE(hadc); - 8002da6: 687b ldr r3, [r7, #4] - 8002da8: 681b ldr r3, [r3, #0] - 8002daa: 689a ldr r2, [r3, #8] - 8002dac: 687b ldr r3, [r7, #4] - 8002dae: 681b ldr r3, [r3, #0] - 8002db0: f022 0201 bic.w r2, r2, #1 - 8002db4: 609a str r2, [r3, #8] + 8003696: 687b ldr r3, [r7, #4] + 8003698: 681b ldr r3, [r3, #0] + 800369a: 689a ldr r2, [r3, #8] + 800369c: 687b ldr r3, [r7, #4] + 800369e: 681b ldr r3, [r3, #0] + 80036a0: f022 0201 bic.w r2, r2, #1 + 80036a4: 609a str r2, [r3, #8] /* Get tick count */ tickstart = HAL_GetTick(); - 8002db6: f7ff fdeb bl 8002990 - 8002dba: 60f8 str r0, [r7, #12] + 80036a6: f7ff fdeb bl 8003280 + 80036aa: 60f8 str r0, [r7, #12] /* Wait for ADC effectively disabled */ while(ADC_IS_ENABLE(hadc) != RESET) - 8002dbc: e01b b.n 8002df6 + 80036ac: e01b b.n 80036e6 { if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) - 8002dbe: f7ff fde7 bl 8002990 - 8002dc2: 4602 mov r2, r0 - 8002dc4: 68fb ldr r3, [r7, #12] - 8002dc6: 1ad3 subs r3, r2, r3 - 8002dc8: 2b02 cmp r3, #2 - 8002dca: d914 bls.n 8002df6 + 80036ae: f7ff fde7 bl 8003280 + 80036b2: 4602 mov r2, r0 + 80036b4: 68fb ldr r3, [r7, #12] + 80036b6: 1ad3 subs r3, r2, r3 + 80036b8: 2b02 cmp r3, #2 + 80036ba: d914 bls.n 80036e6 { /* New check to avoid false timeout detection in case of preemption */ if(ADC_IS_ENABLE(hadc) != RESET) - 8002dcc: 687b ldr r3, [r7, #4] - 8002dce: 681b ldr r3, [r3, #0] - 8002dd0: 689b ldr r3, [r3, #8] - 8002dd2: f003 0301 and.w r3, r3, #1 - 8002dd6: 2b01 cmp r3, #1 - 8002dd8: d10d bne.n 8002df6 + 80036bc: 687b ldr r3, [r7, #4] + 80036be: 681b ldr r3, [r3, #0] + 80036c0: 689b ldr r3, [r3, #8] + 80036c2: f003 0301 and.w r3, r3, #1 + 80036c6: 2b01 cmp r3, #1 + 80036c8: d10d bne.n 80036e6 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8002dda: 687b ldr r3, [r7, #4] - 8002ddc: 6a9b ldr r3, [r3, #40] @ 0x28 - 8002dde: f043 0210 orr.w r2, r3, #16 - 8002de2: 687b ldr r3, [r7, #4] - 8002de4: 629a str r2, [r3, #40] @ 0x28 + 80036ca: 687b ldr r3, [r7, #4] + 80036cc: 6a9b ldr r3, [r3, #40] @ 0x28 + 80036ce: f043 0210 orr.w r2, r3, #16 + 80036d2: 687b ldr r3, [r7, #4] + 80036d4: 629a str r2, [r3, #40] @ 0x28 /* Set ADC error code to ADC IP internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8002de6: 687b ldr r3, [r7, #4] - 8002de8: 6adb ldr r3, [r3, #44] @ 0x2c - 8002dea: f043 0201 orr.w r2, r3, #1 - 8002dee: 687b ldr r3, [r7, #4] - 8002df0: 62da str r2, [r3, #44] @ 0x2c + 80036d6: 687b ldr r3, [r7, #4] + 80036d8: 6adb ldr r3, [r3, #44] @ 0x2c + 80036da: f043 0201 orr.w r2, r3, #1 + 80036de: 687b ldr r3, [r7, #4] + 80036e0: 62da str r2, [r3, #44] @ 0x2c return HAL_ERROR; - 8002df2: 2301 movs r3, #1 - 8002df4: e007 b.n 8002e06 + 80036e2: 2301 movs r3, #1 + 80036e4: e007 b.n 80036f6 while(ADC_IS_ENABLE(hadc) != RESET) - 8002df6: 687b ldr r3, [r7, #4] - 8002df8: 681b ldr r3, [r3, #0] - 8002dfa: 689b ldr r3, [r3, #8] - 8002dfc: f003 0301 and.w r3, r3, #1 - 8002e00: 2b01 cmp r3, #1 - 8002e02: d0dc beq.n 8002dbe + 80036e6: 687b ldr r3, [r7, #4] + 80036e8: 681b ldr r3, [r3, #0] + 80036ea: 689b ldr r3, [r3, #8] + 80036ec: f003 0301 and.w r3, r3, #1 + 80036f0: 2b01 cmp r3, #1 + 80036f2: d0dc beq.n 80036ae } } } /* Return HAL status */ return HAL_OK; - 8002e04: 2300 movs r3, #0 + 80036f4: 2300 movs r3, #0 } - 8002e06: 4618 mov r0, r3 - 8002e08: 3710 adds r7, #16 - 8002e0a: 46bd mov sp, r7 - 8002e0c: bd80 pop {r7, pc} + 80036f6: 4618 mov r0, r3 + 80036f8: 3710 adds r7, #16 + 80036fa: 46bd mov sp, r7 + 80036fc: bd80 pop {r7, pc} ... -08002e10 <__NVIC_SetPriorityGrouping>: +08003700 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8002e10: b480 push {r7} - 8002e12: b085 sub sp, #20 - 8002e14: af00 add r7, sp, #0 - 8002e16: 6078 str r0, [r7, #4] + 8003700: b480 push {r7} + 8003702: b085 sub sp, #20 + 8003704: af00 add r7, sp, #0 + 8003706: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8002e18: 687b ldr r3, [r7, #4] - 8002e1a: f003 0307 and.w r3, r3, #7 - 8002e1e: 60fb str r3, [r7, #12] + 8003708: 687b ldr r3, [r7, #4] + 800370a: f003 0307 and.w r3, r3, #7 + 800370e: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ - 8002e20: 4b0c ldr r3, [pc, #48] @ (8002e54 <__NVIC_SetPriorityGrouping+0x44>) - 8002e22: 68db ldr r3, [r3, #12] - 8002e24: 60bb str r3, [r7, #8] + 8003710: 4b0c ldr r3, [pc, #48] @ (8003744 <__NVIC_SetPriorityGrouping+0x44>) + 8003712: 68db ldr r3, [r3, #12] + 8003714: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ - 8002e26: 68ba ldr r2, [r7, #8] - 8002e28: f64f 03ff movw r3, #63743 @ 0xf8ff - 8002e2c: 4013 ands r3, r2 - 8002e2e: 60bb str r3, [r7, #8] + 8003716: 68ba ldr r2, [r7, #8] + 8003718: f64f 03ff movw r3, #63743 @ 0xf8ff + 800371c: 4013 ands r3, r2 + 800371e: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ - 8002e30: 68fb ldr r3, [r7, #12] - 8002e32: 021a lsls r2, r3, #8 + 8003720: 68fb ldr r3, [r7, #12] + 8003722: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | - 8002e34: 68bb ldr r3, [r7, #8] - 8002e36: 4313 orrs r3, r2 + 8003724: 68bb ldr r3, [r7, #8] + 8003726: 4313 orrs r3, r2 reg_value = (reg_value | - 8002e38: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 - 8002e3c: f443 3300 orr.w r3, r3, #131072 @ 0x20000 - 8002e40: 60bb str r3, [r7, #8] + 8003728: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 + 800372c: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 8003730: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; - 8002e42: 4a04 ldr r2, [pc, #16] @ (8002e54 <__NVIC_SetPriorityGrouping+0x44>) - 8002e44: 68bb ldr r3, [r7, #8] - 8002e46: 60d3 str r3, [r2, #12] + 8003732: 4a04 ldr r2, [pc, #16] @ (8003744 <__NVIC_SetPriorityGrouping+0x44>) + 8003734: 68bb ldr r3, [r7, #8] + 8003736: 60d3 str r3, [r2, #12] } - 8002e48: bf00 nop - 8002e4a: 3714 adds r7, #20 - 8002e4c: 46bd mov sp, r7 - 8002e4e: bc80 pop {r7} - 8002e50: 4770 bx lr - 8002e52: bf00 nop - 8002e54: e000ed00 .word 0xe000ed00 + 8003738: bf00 nop + 800373a: 3714 adds r7, #20 + 800373c: 46bd mov sp, r7 + 800373e: bc80 pop {r7} + 8003740: 4770 bx lr + 8003742: bf00 nop + 8003744: e000ed00 .word 0xe000ed00 -08002e58 <__NVIC_GetPriorityGrouping>: +08003748 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { - 8002e58: b480 push {r7} - 8002e5a: af00 add r7, sp, #0 + 8003748: b480 push {r7} + 800374a: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); - 8002e5c: 4b04 ldr r3, [pc, #16] @ (8002e70 <__NVIC_GetPriorityGrouping+0x18>) - 8002e5e: 68db ldr r3, [r3, #12] - 8002e60: 0a1b lsrs r3, r3, #8 - 8002e62: f003 0307 and.w r3, r3, #7 + 800374c: 4b04 ldr r3, [pc, #16] @ (8003760 <__NVIC_GetPriorityGrouping+0x18>) + 800374e: 68db ldr r3, [r3, #12] + 8003750: 0a1b lsrs r3, r3, #8 + 8003752: f003 0307 and.w r3, r3, #7 } - 8002e66: 4618 mov r0, r3 - 8002e68: 46bd mov sp, r7 - 8002e6a: bc80 pop {r7} - 8002e6c: 4770 bx lr - 8002e6e: bf00 nop - 8002e70: e000ed00 .word 0xe000ed00 + 8003756: 4618 mov r0, r3 + 8003758: 46bd mov sp, r7 + 800375a: bc80 pop {r7} + 800375c: 4770 bx lr + 800375e: bf00 nop + 8003760: e000ed00 .word 0xe000ed00 -08002e74 <__NVIC_EnableIRQ>: +08003764 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { - 8002e74: b480 push {r7} - 8002e76: b083 sub sp, #12 - 8002e78: af00 add r7, sp, #0 - 8002e7a: 4603 mov r3, r0 - 8002e7c: 71fb strb r3, [r7, #7] + 8003764: b480 push {r7} + 8003766: b083 sub sp, #12 + 8003768: af00 add r7, sp, #0 + 800376a: 4603 mov r3, r0 + 800376c: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8002e7e: f997 3007 ldrsb.w r3, [r7, #7] - 8002e82: 2b00 cmp r3, #0 - 8002e84: db0b blt.n 8002e9e <__NVIC_EnableIRQ+0x2a> + 800376e: f997 3007 ldrsb.w r3, [r7, #7] + 8003772: 2b00 cmp r3, #0 + 8003774: db0b blt.n 800378e <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8002e86: 79fb ldrb r3, [r7, #7] - 8002e88: f003 021f and.w r2, r3, #31 - 8002e8c: 4906 ldr r1, [pc, #24] @ (8002ea8 <__NVIC_EnableIRQ+0x34>) - 8002e8e: f997 3007 ldrsb.w r3, [r7, #7] - 8002e92: 095b lsrs r3, r3, #5 - 8002e94: 2001 movs r0, #1 - 8002e96: fa00 f202 lsl.w r2, r0, r2 - 8002e9a: f841 2023 str.w r2, [r1, r3, lsl #2] + 8003776: 79fb ldrb r3, [r7, #7] + 8003778: f003 021f and.w r2, r3, #31 + 800377c: 4906 ldr r1, [pc, #24] @ (8003798 <__NVIC_EnableIRQ+0x34>) + 800377e: f997 3007 ldrsb.w r3, [r7, #7] + 8003782: 095b lsrs r3, r3, #5 + 8003784: 2001 movs r0, #1 + 8003786: fa00 f202 lsl.w r2, r0, r2 + 800378a: f841 2023 str.w r2, [r1, r3, lsl #2] } } - 8002e9e: bf00 nop - 8002ea0: 370c adds r7, #12 - 8002ea2: 46bd mov sp, r7 - 8002ea4: bc80 pop {r7} - 8002ea6: 4770 bx lr - 8002ea8: e000e100 .word 0xe000e100 + 800378e: bf00 nop + 8003790: 370c adds r7, #12 + 8003792: 46bd mov sp, r7 + 8003794: bc80 pop {r7} + 8003796: 4770 bx lr + 8003798: e000e100 .word 0xe000e100 -08002eac <__NVIC_SetPriority>: +0800379c <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8002eac: b480 push {r7} - 8002eae: b083 sub sp, #12 - 8002eb0: af00 add r7, sp, #0 - 8002eb2: 4603 mov r3, r0 - 8002eb4: 6039 str r1, [r7, #0] - 8002eb6: 71fb strb r3, [r7, #7] + 800379c: b480 push {r7} + 800379e: b083 sub sp, #12 + 80037a0: af00 add r7, sp, #0 + 80037a2: 4603 mov r3, r0 + 80037a4: 6039 str r1, [r7, #0] + 80037a6: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) - 8002eb8: f997 3007 ldrsb.w r3, [r7, #7] - 8002ebc: 2b00 cmp r3, #0 - 8002ebe: db0a blt.n 8002ed6 <__NVIC_SetPriority+0x2a> + 80037a8: f997 3007 ldrsb.w r3, [r7, #7] + 80037ac: 2b00 cmp r3, #0 + 80037ae: db0a blt.n 80037c6 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8002ec0: 683b ldr r3, [r7, #0] - 8002ec2: b2da uxtb r2, r3 - 8002ec4: 490c ldr r1, [pc, #48] @ (8002ef8 <__NVIC_SetPriority+0x4c>) - 8002ec6: f997 3007 ldrsb.w r3, [r7, #7] - 8002eca: 0112 lsls r2, r2, #4 - 8002ecc: b2d2 uxtb r2, r2 - 8002ece: 440b add r3, r1 - 8002ed0: f883 2300 strb.w r2, [r3, #768] @ 0x300 + 80037b0: 683b ldr r3, [r7, #0] + 80037b2: b2da uxtb r2, r3 + 80037b4: 490c ldr r1, [pc, #48] @ (80037e8 <__NVIC_SetPriority+0x4c>) + 80037b6: f997 3007 ldrsb.w r3, [r7, #7] + 80037ba: 0112 lsls r2, r2, #4 + 80037bc: b2d2 uxtb r2, r2 + 80037be: 440b add r3, r1 + 80037c0: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } - 8002ed4: e00a b.n 8002eec <__NVIC_SetPriority+0x40> + 80037c4: e00a b.n 80037dc <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); - 8002ed6: 683b ldr r3, [r7, #0] - 8002ed8: b2da uxtb r2, r3 - 8002eda: 4908 ldr r1, [pc, #32] @ (8002efc <__NVIC_SetPriority+0x50>) - 8002edc: 79fb ldrb r3, [r7, #7] - 8002ede: f003 030f and.w r3, r3, #15 - 8002ee2: 3b04 subs r3, #4 - 8002ee4: 0112 lsls r2, r2, #4 - 8002ee6: b2d2 uxtb r2, r2 - 8002ee8: 440b add r3, r1 - 8002eea: 761a strb r2, [r3, #24] + 80037c6: 683b ldr r3, [r7, #0] + 80037c8: b2da uxtb r2, r3 + 80037ca: 4908 ldr r1, [pc, #32] @ (80037ec <__NVIC_SetPriority+0x50>) + 80037cc: 79fb ldrb r3, [r7, #7] + 80037ce: f003 030f and.w r3, r3, #15 + 80037d2: 3b04 subs r3, #4 + 80037d4: 0112 lsls r2, r2, #4 + 80037d6: b2d2 uxtb r2, r2 + 80037d8: 440b add r3, r1 + 80037da: 761a strb r2, [r3, #24] } - 8002eec: bf00 nop - 8002eee: 370c adds r7, #12 - 8002ef0: 46bd mov sp, r7 - 8002ef2: bc80 pop {r7} - 8002ef4: 4770 bx lr - 8002ef6: bf00 nop - 8002ef8: e000e100 .word 0xe000e100 - 8002efc: e000ed00 .word 0xe000ed00 + 80037dc: bf00 nop + 80037de: 370c adds r7, #12 + 80037e0: 46bd mov sp, r7 + 80037e2: bc80 pop {r7} + 80037e4: 4770 bx lr + 80037e6: bf00 nop + 80037e8: e000e100 .word 0xe000e100 + 80037ec: e000ed00 .word 0xe000ed00 -08002f00 : +080037f0 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { - 8002f00: b480 push {r7} - 8002f02: b089 sub sp, #36 @ 0x24 - 8002f04: af00 add r7, sp, #0 - 8002f06: 60f8 str r0, [r7, #12] - 8002f08: 60b9 str r1, [r7, #8] - 8002f0a: 607a str r2, [r7, #4] + 80037f0: b480 push {r7} + 80037f2: b089 sub sp, #36 @ 0x24 + 80037f4: af00 add r7, sp, #0 + 80037f6: 60f8 str r0, [r7, #12] + 80037f8: 60b9 str r1, [r7, #8] + 80037fa: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ - 8002f0c: 68fb ldr r3, [r7, #12] - 8002f0e: f003 0307 and.w r3, r3, #7 - 8002f12: 61fb str r3, [r7, #28] + 80037fc: 68fb ldr r3, [r7, #12] + 80037fe: f003 0307 and.w r3, r3, #7 + 8003802: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); - 8002f14: 69fb ldr r3, [r7, #28] - 8002f16: f1c3 0307 rsb r3, r3, #7 - 8002f1a: 2b04 cmp r3, #4 - 8002f1c: bf28 it cs - 8002f1e: 2304 movcs r3, #4 - 8002f20: 61bb str r3, [r7, #24] + 8003804: 69fb ldr r3, [r7, #28] + 8003806: f1c3 0307 rsb r3, r3, #7 + 800380a: 2b04 cmp r3, #4 + 800380c: bf28 it cs + 800380e: 2304 movcs r3, #4 + 8003810: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); - 8002f22: 69fb ldr r3, [r7, #28] - 8002f24: 3304 adds r3, #4 - 8002f26: 2b06 cmp r3, #6 - 8002f28: d902 bls.n 8002f30 - 8002f2a: 69fb ldr r3, [r7, #28] - 8002f2c: 3b03 subs r3, #3 - 8002f2e: e000 b.n 8002f32 - 8002f30: 2300 movs r3, #0 - 8002f32: 617b str r3, [r7, #20] + 8003812: 69fb ldr r3, [r7, #28] + 8003814: 3304 adds r3, #4 + 8003816: 2b06 cmp r3, #6 + 8003818: d902 bls.n 8003820 + 800381a: 69fb ldr r3, [r7, #28] + 800381c: 3b03 subs r3, #3 + 800381e: e000 b.n 8003822 + 8003820: 2300 movs r3, #0 + 8003822: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8002f34: f04f 32ff mov.w r2, #4294967295 - 8002f38: 69bb ldr r3, [r7, #24] - 8002f3a: fa02 f303 lsl.w r3, r2, r3 - 8002f3e: 43da mvns r2, r3 - 8002f40: 68bb ldr r3, [r7, #8] - 8002f42: 401a ands r2, r3 - 8002f44: 697b ldr r3, [r7, #20] - 8002f46: 409a lsls r2, r3 + 8003824: f04f 32ff mov.w r2, #4294967295 + 8003828: 69bb ldr r3, [r7, #24] + 800382a: fa02 f303 lsl.w r3, r2, r3 + 800382e: 43da mvns r2, r3 + 8003830: 68bb ldr r3, [r7, #8] + 8003832: 401a ands r2, r3 + 8003834: 697b ldr r3, [r7, #20] + 8003836: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) - 8002f48: f04f 31ff mov.w r1, #4294967295 - 8002f4c: 697b ldr r3, [r7, #20] - 8002f4e: fa01 f303 lsl.w r3, r1, r3 - 8002f52: 43d9 mvns r1, r3 - 8002f54: 687b ldr r3, [r7, #4] - 8002f56: 400b ands r3, r1 + 8003838: f04f 31ff mov.w r1, #4294967295 + 800383c: 697b ldr r3, [r7, #20] + 800383e: fa01 f303 lsl.w r3, r1, r3 + 8003842: 43d9 mvns r1, r3 + 8003844: 687b ldr r3, [r7, #4] + 8003846: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | - 8002f58: 4313 orrs r3, r2 + 8003848: 4313 orrs r3, r2 ); } - 8002f5a: 4618 mov r0, r3 - 8002f5c: 3724 adds r7, #36 @ 0x24 - 8002f5e: 46bd mov sp, r7 - 8002f60: bc80 pop {r7} - 8002f62: 4770 bx lr + 800384a: 4618 mov r0, r3 + 800384c: 3724 adds r7, #36 @ 0x24 + 800384e: 46bd mov sp, r7 + 8003850: bc80 pop {r7} + 8003852: 4770 bx lr -08002f64 : +08003854 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 8002f64: b580 push {r7, lr} - 8002f66: b082 sub sp, #8 - 8002f68: af00 add r7, sp, #0 - 8002f6a: 6078 str r0, [r7, #4] + 8003854: b580 push {r7, lr} + 8003856: b082 sub sp, #8 + 8003858: af00 add r7, sp, #0 + 800385a: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8002f6c: 687b ldr r3, [r7, #4] - 8002f6e: 3b01 subs r3, #1 - 8002f70: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 - 8002f74: d301 bcc.n 8002f7a + 800385c: 687b ldr r3, [r7, #4] + 800385e: 3b01 subs r3, #1 + 8003860: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 + 8003864: d301 bcc.n 800386a { return (1UL); /* Reload value impossible */ - 8002f76: 2301 movs r3, #1 - 8002f78: e00f b.n 8002f9a + 8003866: 2301 movs r3, #1 + 8003868: e00f b.n 800388a } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8002f7a: 4a0a ldr r2, [pc, #40] @ (8002fa4 ) - 8002f7c: 687b ldr r3, [r7, #4] - 8002f7e: 3b01 subs r3, #1 - 8002f80: 6053 str r3, [r2, #4] + 800386a: 4a0a ldr r2, [pc, #40] @ (8003894 ) + 800386c: 687b ldr r3, [r7, #4] + 800386e: 3b01 subs r3, #1 + 8003870: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 8002f82: 210f movs r1, #15 - 8002f84: f04f 30ff mov.w r0, #4294967295 - 8002f88: f7ff ff90 bl 8002eac <__NVIC_SetPriority> + 8003872: 210f movs r1, #15 + 8003874: f04f 30ff mov.w r0, #4294967295 + 8003878: f7ff ff90 bl 800379c <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8002f8c: 4b05 ldr r3, [pc, #20] @ (8002fa4 ) - 8002f8e: 2200 movs r2, #0 - 8002f90: 609a str r2, [r3, #8] + 800387c: 4b05 ldr r3, [pc, #20] @ (8003894 ) + 800387e: 2200 movs r2, #0 + 8003880: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 8002f92: 4b04 ldr r3, [pc, #16] @ (8002fa4 ) - 8002f94: 2207 movs r2, #7 - 8002f96: 601a str r2, [r3, #0] + 8003882: 4b04 ldr r3, [pc, #16] @ (8003894 ) + 8003884: 2207 movs r2, #7 + 8003886: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8002f98: 2300 movs r3, #0 + 8003888: 2300 movs r3, #0 } - 8002f9a: 4618 mov r0, r3 - 8002f9c: 3708 adds r7, #8 - 8002f9e: 46bd mov sp, r7 - 8002fa0: bd80 pop {r7, pc} - 8002fa2: bf00 nop - 8002fa4: e000e010 .word 0xe000e010 + 800388a: 4618 mov r0, r3 + 800388c: 3708 adds r7, #8 + 800388e: 46bd mov sp, r7 + 8003890: bd80 pop {r7, pc} + 8003892: bf00 nop + 8003894: e000e010 .word 0xe000e010 -08002fa8 : +08003898 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { - 8002fa8: b580 push {r7, lr} - 8002faa: b082 sub sp, #8 - 8002fac: af00 add r7, sp, #0 - 8002fae: 6078 str r0, [r7, #4] + 8003898: b580 push {r7, lr} + 800389a: b082 sub sp, #8 + 800389c: af00 add r7, sp, #0 + 800389e: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); - 8002fb0: 6878 ldr r0, [r7, #4] - 8002fb2: f7ff ff2d bl 8002e10 <__NVIC_SetPriorityGrouping> + 80038a0: 6878 ldr r0, [r7, #4] + 80038a2: f7ff ff2d bl 8003700 <__NVIC_SetPriorityGrouping> } - 8002fb6: bf00 nop - 8002fb8: 3708 adds r7, #8 - 8002fba: 46bd mov sp, r7 - 8002fbc: bd80 pop {r7, pc} + 80038a6: bf00 nop + 80038a8: 3708 adds r7, #8 + 80038aa: 46bd mov sp, r7 + 80038ac: bd80 pop {r7, pc} -08002fbe : +080038ae : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8002fbe: b580 push {r7, lr} - 8002fc0: b086 sub sp, #24 - 8002fc2: af00 add r7, sp, #0 - 8002fc4: 4603 mov r3, r0 - 8002fc6: 60b9 str r1, [r7, #8] - 8002fc8: 607a str r2, [r7, #4] - 8002fca: 73fb strb r3, [r7, #15] + 80038ae: b580 push {r7, lr} + 80038b0: b086 sub sp, #24 + 80038b2: af00 add r7, sp, #0 + 80038b4: 4603 mov r3, r0 + 80038b6: 60b9 str r1, [r7, #8] + 80038b8: 607a str r2, [r7, #4] + 80038ba: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; - 8002fcc: 2300 movs r3, #0 - 8002fce: 617b str r3, [r7, #20] + 80038bc: 2300 movs r3, #0 + 80038be: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); - 8002fd0: f7ff ff42 bl 8002e58 <__NVIC_GetPriorityGrouping> - 8002fd4: 6178 str r0, [r7, #20] + 80038c0: f7ff ff42 bl 8003748 <__NVIC_GetPriorityGrouping> + 80038c4: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); - 8002fd6: 687a ldr r2, [r7, #4] - 8002fd8: 68b9 ldr r1, [r7, #8] - 8002fda: 6978 ldr r0, [r7, #20] - 8002fdc: f7ff ff90 bl 8002f00 - 8002fe0: 4602 mov r2, r0 - 8002fe2: f997 300f ldrsb.w r3, [r7, #15] - 8002fe6: 4611 mov r1, r2 - 8002fe8: 4618 mov r0, r3 - 8002fea: f7ff ff5f bl 8002eac <__NVIC_SetPriority> + 80038c6: 687a ldr r2, [r7, #4] + 80038c8: 68b9 ldr r1, [r7, #8] + 80038ca: 6978 ldr r0, [r7, #20] + 80038cc: f7ff ff90 bl 80037f0 + 80038d0: 4602 mov r2, r0 + 80038d2: f997 300f ldrsb.w r3, [r7, #15] + 80038d6: 4611 mov r1, r2 + 80038d8: 4618 mov r0, r3 + 80038da: f7ff ff5f bl 800379c <__NVIC_SetPriority> } - 8002fee: bf00 nop - 8002ff0: 3718 adds r7, #24 - 8002ff2: 46bd mov sp, r7 - 8002ff4: bd80 pop {r7, pc} + 80038de: bf00 nop + 80038e0: 3718 adds r7, #24 + 80038e2: 46bd mov sp, r7 + 80038e4: bd80 pop {r7, pc} -08002ff6 : +080038e6 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 8002ff6: b580 push {r7, lr} - 8002ff8: b082 sub sp, #8 - 8002ffa: af00 add r7, sp, #0 - 8002ffc: 4603 mov r3, r0 - 8002ffe: 71fb strb r3, [r7, #7] + 80038e6: b580 push {r7, lr} + 80038e8: b082 sub sp, #8 + 80038ea: af00 add r7, sp, #0 + 80038ec: 4603 mov r3, r0 + 80038ee: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 8003000: f997 3007 ldrsb.w r3, [r7, #7] - 8003004: 4618 mov r0, r3 - 8003006: f7ff ff35 bl 8002e74 <__NVIC_EnableIRQ> + 80038f0: f997 3007 ldrsb.w r3, [r7, #7] + 80038f4: 4618 mov r0, r3 + 80038f6: f7ff ff35 bl 8003764 <__NVIC_EnableIRQ> } - 800300a: bf00 nop - 800300c: 3708 adds r7, #8 - 800300e: 46bd mov sp, r7 - 8003010: bd80 pop {r7, pc} + 80038fa: bf00 nop + 80038fc: 3708 adds r7, #8 + 80038fe: 46bd mov sp, r7 + 8003900: bd80 pop {r7, pc} -08003012 : +08003902 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 8003012: b580 push {r7, lr} - 8003014: b082 sub sp, #8 - 8003016: af00 add r7, sp, #0 - 8003018: 6078 str r0, [r7, #4] + 8003902: b580 push {r7, lr} + 8003904: b082 sub sp, #8 + 8003906: af00 add r7, sp, #0 + 8003908: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 800301a: 6878 ldr r0, [r7, #4] - 800301c: f7ff ffa2 bl 8002f64 - 8003020: 4603 mov r3, r0 + 800390a: 6878 ldr r0, [r7, #4] + 800390c: f7ff ffa2 bl 8003854 + 8003910: 4603 mov r3, r0 } - 8003022: 4618 mov r0, r3 - 8003024: 3708 adds r7, #8 - 8003026: 46bd mov sp, r7 - 8003028: bd80 pop {r7, pc} + 8003912: 4618 mov r0, r3 + 8003914: 3708 adds r7, #8 + 8003916: 46bd mov sp, r7 + 8003918: bd80 pop {r7, pc} -0800302a : +0800391a : * @param hdma: pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { - 800302a: b480 push {r7} - 800302c: b085 sub sp, #20 - 800302e: af00 add r7, sp, #0 - 8003030: 6078 str r0, [r7, #4] + 800391a: b480 push {r7} + 800391c: b085 sub sp, #20 + 800391e: af00 add r7, sp, #0 + 8003920: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8003032: 2300 movs r3, #0 - 8003034: 73fb strb r3, [r7, #15] + 8003922: 2300 movs r3, #0 + 8003924: 73fb strb r3, [r7, #15] if(hdma->State != HAL_DMA_STATE_BUSY) - 8003036: 687b ldr r3, [r7, #4] - 8003038: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 - 800303c: b2db uxtb r3, r3 - 800303e: 2b02 cmp r3, #2 - 8003040: d008 beq.n 8003054 + 8003926: 687b ldr r3, [r7, #4] + 8003928: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 + 800392c: b2db uxtb r3, r3 + 800392e: 2b02 cmp r3, #2 + 8003930: d008 beq.n 8003944 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8003042: 687b ldr r3, [r7, #4] - 8003044: 2204 movs r2, #4 - 8003046: 639a str r2, [r3, #56] @ 0x38 + 8003932: 687b ldr r3, [r7, #4] + 8003934: 2204 movs r2, #4 + 8003936: 639a str r2, [r3, #56] @ 0x38 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8003048: 687b ldr r3, [r7, #4] - 800304a: 2200 movs r2, #0 - 800304c: f883 2020 strb.w r2, [r3, #32] + 8003938: 687b ldr r3, [r7, #4] + 800393a: 2200 movs r2, #0 + 800393c: f883 2020 strb.w r2, [r3, #32] return HAL_ERROR; - 8003050: 2301 movs r3, #1 - 8003052: e020 b.n 8003096 + 8003940: 2301 movs r3, #1 + 8003942: e020 b.n 8003986 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8003054: 687b ldr r3, [r7, #4] - 8003056: 681b ldr r3, [r3, #0] - 8003058: 681a ldr r2, [r3, #0] - 800305a: 687b ldr r3, [r7, #4] - 800305c: 681b ldr r3, [r3, #0] - 800305e: f022 020e bic.w r2, r2, #14 - 8003062: 601a str r2, [r3, #0] + 8003944: 687b ldr r3, [r7, #4] + 8003946: 681b ldr r3, [r3, #0] + 8003948: 681a ldr r2, [r3, #0] + 800394a: 687b ldr r3, [r7, #4] + 800394c: 681b ldr r3, [r3, #0] + 800394e: f022 020e bic.w r2, r2, #14 + 8003952: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 8003064: 687b ldr r3, [r7, #4] - 8003066: 681b ldr r3, [r3, #0] - 8003068: 681a ldr r2, [r3, #0] - 800306a: 687b ldr r3, [r7, #4] - 800306c: 681b ldr r3, [r3, #0] - 800306e: f022 0201 bic.w r2, r2, #1 - 8003072: 601a str r2, [r3, #0] + 8003954: 687b ldr r3, [r7, #4] + 8003956: 681b ldr r3, [r3, #0] + 8003958: 681a ldr r2, [r3, #0] + 800395a: 687b ldr r3, [r7, #4] + 800395c: 681b ldr r3, [r3, #0] + 800395e: f022 0201 bic.w r2, r2, #1 + 8003962: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex); - 8003074: 687b ldr r3, [r7, #4] - 8003076: 6c1a ldr r2, [r3, #64] @ 0x40 - 8003078: 687b ldr r3, [r7, #4] - 800307a: 6bdb ldr r3, [r3, #60] @ 0x3c - 800307c: 2101 movs r1, #1 - 800307e: fa01 f202 lsl.w r2, r1, r2 - 8003082: 605a str r2, [r3, #4] + 8003964: 687b ldr r3, [r7, #4] + 8003966: 6c1a ldr r2, [r3, #64] @ 0x40 + 8003968: 687b ldr r3, [r7, #4] + 800396a: 6bdb ldr r3, [r3, #60] @ 0x3c + 800396c: 2101 movs r1, #1 + 800396e: fa01 f202 lsl.w r2, r1, r2 + 8003972: 605a str r2, [r3, #4] } /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8003084: 687b ldr r3, [r7, #4] - 8003086: 2201 movs r2, #1 - 8003088: f883 2021 strb.w r2, [r3, #33] @ 0x21 + 8003974: 687b ldr r3, [r7, #4] + 8003976: 2201 movs r2, #1 + 8003978: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 800308c: 687b ldr r3, [r7, #4] - 800308e: 2200 movs r2, #0 - 8003090: f883 2020 strb.w r2, [r3, #32] + 800397c: 687b ldr r3, [r7, #4] + 800397e: 2200 movs r2, #0 + 8003980: f883 2020 strb.w r2, [r3, #32] return status; - 8003094: 7bfb ldrb r3, [r7, #15] + 8003984: 7bfb ldrb r3, [r7, #15] } - 8003096: 4618 mov r0, r3 - 8003098: 3714 adds r7, #20 - 800309a: 46bd mov sp, r7 - 800309c: bc80 pop {r7} - 800309e: 4770 bx lr + 8003986: 4618 mov r0, r3 + 8003988: 3714 adds r7, #20 + 800398a: 46bd mov sp, r7 + 800398c: bc80 pop {r7} + 800398e: 4770 bx lr -080030a0 : +08003990 : * @param hdma : pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { - 80030a0: b580 push {r7, lr} - 80030a2: b084 sub sp, #16 - 80030a4: af00 add r7, sp, #0 - 80030a6: 6078 str r0, [r7, #4] + 8003990: b580 push {r7, lr} + 8003992: b084 sub sp, #16 + 8003994: af00 add r7, sp, #0 + 8003996: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 80030a8: 2300 movs r3, #0 - 80030aa: 73fb strb r3, [r7, #15] + 8003998: 2300 movs r3, #0 + 800399a: 73fb strb r3, [r7, #15] if(HAL_DMA_STATE_BUSY != hdma->State) - 80030ac: 687b ldr r3, [r7, #4] - 80030ae: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 - 80030b2: b2db uxtb r3, r3 - 80030b4: 2b02 cmp r3, #2 - 80030b6: d005 beq.n 80030c4 + 800399c: 687b ldr r3, [r7, #4] + 800399e: f893 3021 ldrb.w r3, [r3, #33] @ 0x21 + 80039a2: b2db uxtb r3, r3 + 80039a4: 2b02 cmp r3, #2 + 80039a6: d005 beq.n 80039b4 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 80030b8: 687b ldr r3, [r7, #4] - 80030ba: 2204 movs r2, #4 - 80030bc: 639a str r2, [r3, #56] @ 0x38 + 80039a8: 687b ldr r3, [r7, #4] + 80039aa: 2204 movs r2, #4 + 80039ac: 639a str r2, [r3, #56] @ 0x38 status = HAL_ERROR; - 80030be: 2301 movs r3, #1 - 80030c0: 73fb strb r3, [r7, #15] - 80030c2: e051 b.n 8003168 + 80039ae: 2301 movs r3, #1 + 80039b0: 73fb strb r3, [r7, #15] + 80039b2: e051 b.n 8003a58 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 80030c4: 687b ldr r3, [r7, #4] - 80030c6: 681b ldr r3, [r3, #0] - 80030c8: 681a ldr r2, [r3, #0] - 80030ca: 687b ldr r3, [r7, #4] - 80030cc: 681b ldr r3, [r3, #0] - 80030ce: f022 020e bic.w r2, r2, #14 - 80030d2: 601a str r2, [r3, #0] + 80039b4: 687b ldr r3, [r7, #4] + 80039b6: 681b ldr r3, [r3, #0] + 80039b8: 681a ldr r2, [r3, #0] + 80039ba: 687b ldr r3, [r7, #4] + 80039bc: 681b ldr r3, [r3, #0] + 80039be: f022 020e bic.w r2, r2, #14 + 80039c2: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 80030d4: 687b ldr r3, [r7, #4] - 80030d6: 681b ldr r3, [r3, #0] - 80030d8: 681a ldr r2, [r3, #0] - 80030da: 687b ldr r3, [r7, #4] - 80030dc: 681b ldr r3, [r3, #0] - 80030de: f022 0201 bic.w r2, r2, #1 - 80030e2: 601a str r2, [r3, #0] + 80039c4: 687b ldr r3, [r7, #4] + 80039c6: 681b ldr r3, [r3, #0] + 80039c8: 681a ldr r2, [r3, #0] + 80039ca: 687b ldr r3, [r7, #4] + 80039cc: 681b ldr r3, [r3, #0] + 80039ce: f022 0201 bic.w r2, r2, #1 + 80039d2: 601a str r2, [r3, #0] /* Clear all flags */ __HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma)); - 80030e4: 687b ldr r3, [r7, #4] - 80030e6: 681b ldr r3, [r3, #0] - 80030e8: 4a22 ldr r2, [pc, #136] @ (8003174 ) - 80030ea: 4293 cmp r3, r2 - 80030ec: d029 beq.n 8003142 - 80030ee: 687b ldr r3, [r7, #4] - 80030f0: 681b ldr r3, [r3, #0] - 80030f2: 4a21 ldr r2, [pc, #132] @ (8003178 ) - 80030f4: 4293 cmp r3, r2 - 80030f6: d022 beq.n 800313e - 80030f8: 687b ldr r3, [r7, #4] - 80030fa: 681b ldr r3, [r3, #0] - 80030fc: 4a1f ldr r2, [pc, #124] @ (800317c ) - 80030fe: 4293 cmp r3, r2 - 8003100: d01a beq.n 8003138 - 8003102: 687b ldr r3, [r7, #4] - 8003104: 681b ldr r3, [r3, #0] - 8003106: 4a1e ldr r2, [pc, #120] @ (8003180 ) - 8003108: 4293 cmp r3, r2 - 800310a: d012 beq.n 8003132 - 800310c: 687b ldr r3, [r7, #4] - 800310e: 681b ldr r3, [r3, #0] - 8003110: 4a1c ldr r2, [pc, #112] @ (8003184 ) - 8003112: 4293 cmp r3, r2 - 8003114: d00a beq.n 800312c - 8003116: 687b ldr r3, [r7, #4] - 8003118: 681b ldr r3, [r3, #0] - 800311a: 4a1b ldr r2, [pc, #108] @ (8003188 ) - 800311c: 4293 cmp r3, r2 - 800311e: d102 bne.n 8003126 - 8003120: f44f 1380 mov.w r3, #1048576 @ 0x100000 - 8003124: e00e b.n 8003144 - 8003126: f04f 7380 mov.w r3, #16777216 @ 0x1000000 - 800312a: e00b b.n 8003144 - 800312c: f44f 3380 mov.w r3, #65536 @ 0x10000 - 8003130: e008 b.n 8003144 - 8003132: f44f 5380 mov.w r3, #4096 @ 0x1000 - 8003136: e005 b.n 8003144 - 8003138: f44f 7380 mov.w r3, #256 @ 0x100 - 800313c: e002 b.n 8003144 - 800313e: 2310 movs r3, #16 - 8003140: e000 b.n 8003144 - 8003142: 2301 movs r3, #1 - 8003144: 4a11 ldr r2, [pc, #68] @ (800318c ) - 8003146: 6053 str r3, [r2, #4] + 80039d4: 687b ldr r3, [r7, #4] + 80039d6: 681b ldr r3, [r3, #0] + 80039d8: 4a22 ldr r2, [pc, #136] @ (8003a64 ) + 80039da: 4293 cmp r3, r2 + 80039dc: d029 beq.n 8003a32 + 80039de: 687b ldr r3, [r7, #4] + 80039e0: 681b ldr r3, [r3, #0] + 80039e2: 4a21 ldr r2, [pc, #132] @ (8003a68 ) + 80039e4: 4293 cmp r3, r2 + 80039e6: d022 beq.n 8003a2e + 80039e8: 687b ldr r3, [r7, #4] + 80039ea: 681b ldr r3, [r3, #0] + 80039ec: 4a1f ldr r2, [pc, #124] @ (8003a6c ) + 80039ee: 4293 cmp r3, r2 + 80039f0: d01a beq.n 8003a28 + 80039f2: 687b ldr r3, [r7, #4] + 80039f4: 681b ldr r3, [r3, #0] + 80039f6: 4a1e ldr r2, [pc, #120] @ (8003a70 ) + 80039f8: 4293 cmp r3, r2 + 80039fa: d012 beq.n 8003a22 + 80039fc: 687b ldr r3, [r7, #4] + 80039fe: 681b ldr r3, [r3, #0] + 8003a00: 4a1c ldr r2, [pc, #112] @ (8003a74 ) + 8003a02: 4293 cmp r3, r2 + 8003a04: d00a beq.n 8003a1c + 8003a06: 687b ldr r3, [r7, #4] + 8003a08: 681b ldr r3, [r3, #0] + 8003a0a: 4a1b ldr r2, [pc, #108] @ (8003a78 ) + 8003a0c: 4293 cmp r3, r2 + 8003a0e: d102 bne.n 8003a16 + 8003a10: f44f 1380 mov.w r3, #1048576 @ 0x100000 + 8003a14: e00e b.n 8003a34 + 8003a16: f04f 7380 mov.w r3, #16777216 @ 0x1000000 + 8003a1a: e00b b.n 8003a34 + 8003a1c: f44f 3380 mov.w r3, #65536 @ 0x10000 + 8003a20: e008 b.n 8003a34 + 8003a22: f44f 5380 mov.w r3, #4096 @ 0x1000 + 8003a26: e005 b.n 8003a34 + 8003a28: f44f 7380 mov.w r3, #256 @ 0x100 + 8003a2c: e002 b.n 8003a34 + 8003a2e: 2310 movs r3, #16 + 8003a30: e000 b.n 8003a34 + 8003a32: 2301 movs r3, #1 + 8003a34: 4a11 ldr r2, [pc, #68] @ (8003a7c ) + 8003a36: 6053 str r3, [r2, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8003148: 687b ldr r3, [r7, #4] - 800314a: 2201 movs r2, #1 - 800314c: f883 2021 strb.w r2, [r3, #33] @ 0x21 + 8003a38: 687b ldr r3, [r7, #4] + 8003a3a: 2201 movs r2, #1 + 8003a3c: f883 2021 strb.w r2, [r3, #33] @ 0x21 /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8003150: 687b ldr r3, [r7, #4] - 8003152: 2200 movs r2, #0 - 8003154: f883 2020 strb.w r2, [r3, #32] + 8003a40: 687b ldr r3, [r7, #4] + 8003a42: 2200 movs r2, #0 + 8003a44: f883 2020 strb.w r2, [r3, #32] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) - 8003158: 687b ldr r3, [r7, #4] - 800315a: 6b5b ldr r3, [r3, #52] @ 0x34 - 800315c: 2b00 cmp r3, #0 - 800315e: d003 beq.n 8003168 + 8003a48: 687b ldr r3, [r7, #4] + 8003a4a: 6b5b ldr r3, [r3, #52] @ 0x34 + 8003a4c: 2b00 cmp r3, #0 + 8003a4e: d003 beq.n 8003a58 { hdma->XferAbortCallback(hdma); - 8003160: 687b ldr r3, [r7, #4] - 8003162: 6b5b ldr r3, [r3, #52] @ 0x34 - 8003164: 6878 ldr r0, [r7, #4] - 8003166: 4798 blx r3 + 8003a50: 687b ldr r3, [r7, #4] + 8003a52: 6b5b ldr r3, [r3, #52] @ 0x34 + 8003a54: 6878 ldr r0, [r7, #4] + 8003a56: 4798 blx r3 } } return status; - 8003168: 7bfb ldrb r3, [r7, #15] + 8003a58: 7bfb ldrb r3, [r7, #15] } - 800316a: 4618 mov r0, r3 - 800316c: 3710 adds r7, #16 - 800316e: 46bd mov sp, r7 - 8003170: bd80 pop {r7, pc} - 8003172: bf00 nop - 8003174: 40020008 .word 0x40020008 - 8003178: 4002001c .word 0x4002001c - 800317c: 40020030 .word 0x40020030 - 8003180: 40020044 .word 0x40020044 - 8003184: 40020058 .word 0x40020058 - 8003188: 4002006c .word 0x4002006c - 800318c: 40020000 .word 0x40020000 + 8003a5a: 4618 mov r0, r3 + 8003a5c: 3710 adds r7, #16 + 8003a5e: 46bd mov sp, r7 + 8003a60: bd80 pop {r7, pc} + 8003a62: bf00 nop + 8003a64: 40020008 .word 0x40020008 + 8003a68: 4002001c .word 0x4002001c + 8003a6c: 40020030 .word 0x40020030 + 8003a70: 40020044 .word 0x40020044 + 8003a74: 40020058 .word 0x40020058 + 8003a78: 4002006c .word 0x4002006c + 8003a7c: 40020000 .word 0x40020000 -08003190 : +08003a80 : * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8003190: b480 push {r7} - 8003192: b08b sub sp, #44 @ 0x2c - 8003194: af00 add r7, sp, #0 - 8003196: 6078 str r0, [r7, #4] - 8003198: 6039 str r1, [r7, #0] + 8003a80: b480 push {r7} + 8003a82: b08b sub sp, #44 @ 0x2c + 8003a84: af00 add r7, sp, #0 + 8003a86: 6078 str r0, [r7, #4] + 8003a88: 6039 str r1, [r7, #0] uint32_t position = 0x00u; - 800319a: 2300 movs r3, #0 - 800319c: 627b str r3, [r7, #36] @ 0x24 + 8003a8a: 2300 movs r3, #0 + 8003a8c: 627b str r3, [r7, #36] @ 0x24 uint32_t ioposition; uint32_t iocurrent; uint32_t temp; uint32_t config = 0x00u; - 800319e: 2300 movs r3, #0 - 80031a0: 623b str r3, [r7, #32] + 8003a8e: 2300 movs r3, #0 + 8003a90: 623b str r3, [r7, #32] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) - 80031a2: e169 b.n 8003478 + 8003a92: e169 b.n 8003d68 { /* Get the IO position */ ioposition = (0x01uL << position); - 80031a4: 2201 movs r2, #1 - 80031a6: 6a7b ldr r3, [r7, #36] @ 0x24 - 80031a8: fa02 f303 lsl.w r3, r2, r3 - 80031ac: 61fb str r3, [r7, #28] + 8003a94: 2201 movs r2, #1 + 8003a96: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003a98: fa02 f303 lsl.w r3, r2, r3 + 8003a9c: 61fb str r3, [r7, #28] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; - 80031ae: 683b ldr r3, [r7, #0] - 80031b0: 681b ldr r3, [r3, #0] - 80031b2: 69fa ldr r2, [r7, #28] - 80031b4: 4013 ands r3, r2 - 80031b6: 61bb str r3, [r7, #24] + 8003a9e: 683b ldr r3, [r7, #0] + 8003aa0: 681b ldr r3, [r3, #0] + 8003aa2: 69fa ldr r2, [r7, #28] + 8003aa4: 4013 ands r3, r2 + 8003aa6: 61bb str r3, [r7, #24] if (iocurrent == ioposition) - 80031b8: 69ba ldr r2, [r7, #24] - 80031ba: 69fb ldr r3, [r7, #28] - 80031bc: 429a cmp r2, r3 - 80031be: f040 8158 bne.w 8003472 + 8003aa8: 69ba ldr r2, [r7, #24] + 8003aaa: 69fb ldr r3, [r7, #28] + 8003aac: 429a cmp r2, r3 + 8003aae: f040 8158 bne.w 8003d62 { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */ switch (GPIO_Init->Mode) - 80031c2: 683b ldr r3, [r7, #0] - 80031c4: 685b ldr r3, [r3, #4] - 80031c6: 4a9a ldr r2, [pc, #616] @ (8003430 ) - 80031c8: 4293 cmp r3, r2 - 80031ca: d05e beq.n 800328a - 80031cc: 4a98 ldr r2, [pc, #608] @ (8003430 ) - 80031ce: 4293 cmp r3, r2 - 80031d0: d875 bhi.n 80032be - 80031d2: 4a98 ldr r2, [pc, #608] @ (8003434 ) - 80031d4: 4293 cmp r3, r2 - 80031d6: d058 beq.n 800328a - 80031d8: 4a96 ldr r2, [pc, #600] @ (8003434 ) - 80031da: 4293 cmp r3, r2 - 80031dc: d86f bhi.n 80032be - 80031de: 4a96 ldr r2, [pc, #600] @ (8003438 ) - 80031e0: 4293 cmp r3, r2 - 80031e2: d052 beq.n 800328a - 80031e4: 4a94 ldr r2, [pc, #592] @ (8003438 ) - 80031e6: 4293 cmp r3, r2 - 80031e8: d869 bhi.n 80032be - 80031ea: 4a94 ldr r2, [pc, #592] @ (800343c ) - 80031ec: 4293 cmp r3, r2 - 80031ee: d04c beq.n 800328a - 80031f0: 4a92 ldr r2, [pc, #584] @ (800343c ) - 80031f2: 4293 cmp r3, r2 - 80031f4: d863 bhi.n 80032be - 80031f6: 4a92 ldr r2, [pc, #584] @ (8003440 ) - 80031f8: 4293 cmp r3, r2 - 80031fa: d046 beq.n 800328a - 80031fc: 4a90 ldr r2, [pc, #576] @ (8003440 ) - 80031fe: 4293 cmp r3, r2 - 8003200: d85d bhi.n 80032be - 8003202: 2b12 cmp r3, #18 - 8003204: d82a bhi.n 800325c - 8003206: 2b12 cmp r3, #18 - 8003208: d859 bhi.n 80032be - 800320a: a201 add r2, pc, #4 @ (adr r2, 8003210 ) - 800320c: f852 f023 ldr.w pc, [r2, r3, lsl #2] - 8003210: 0800328b .word 0x0800328b - 8003214: 08003265 .word 0x08003265 - 8003218: 08003277 .word 0x08003277 - 800321c: 080032b9 .word 0x080032b9 - 8003220: 080032bf .word 0x080032bf - 8003224: 080032bf .word 0x080032bf - 8003228: 080032bf .word 0x080032bf - 800322c: 080032bf .word 0x080032bf - 8003230: 080032bf .word 0x080032bf - 8003234: 080032bf .word 0x080032bf - 8003238: 080032bf .word 0x080032bf - 800323c: 080032bf .word 0x080032bf - 8003240: 080032bf .word 0x080032bf - 8003244: 080032bf .word 0x080032bf - 8003248: 080032bf .word 0x080032bf - 800324c: 080032bf .word 0x080032bf - 8003250: 080032bf .word 0x080032bf - 8003254: 0800326d .word 0x0800326d - 8003258: 08003281 .word 0x08003281 - 800325c: 4a79 ldr r2, [pc, #484] @ (8003444 ) - 800325e: 4293 cmp r3, r2 - 8003260: d013 beq.n 800328a + 8003ab2: 683b ldr r3, [r7, #0] + 8003ab4: 685b ldr r3, [r3, #4] + 8003ab6: 4a9a ldr r2, [pc, #616] @ (8003d20 ) + 8003ab8: 4293 cmp r3, r2 + 8003aba: d05e beq.n 8003b7a + 8003abc: 4a98 ldr r2, [pc, #608] @ (8003d20 ) + 8003abe: 4293 cmp r3, r2 + 8003ac0: d875 bhi.n 8003bae + 8003ac2: 4a98 ldr r2, [pc, #608] @ (8003d24 ) + 8003ac4: 4293 cmp r3, r2 + 8003ac6: d058 beq.n 8003b7a + 8003ac8: 4a96 ldr r2, [pc, #600] @ (8003d24 ) + 8003aca: 4293 cmp r3, r2 + 8003acc: d86f bhi.n 8003bae + 8003ace: 4a96 ldr r2, [pc, #600] @ (8003d28 ) + 8003ad0: 4293 cmp r3, r2 + 8003ad2: d052 beq.n 8003b7a + 8003ad4: 4a94 ldr r2, [pc, #592] @ (8003d28 ) + 8003ad6: 4293 cmp r3, r2 + 8003ad8: d869 bhi.n 8003bae + 8003ada: 4a94 ldr r2, [pc, #592] @ (8003d2c ) + 8003adc: 4293 cmp r3, r2 + 8003ade: d04c beq.n 8003b7a + 8003ae0: 4a92 ldr r2, [pc, #584] @ (8003d2c ) + 8003ae2: 4293 cmp r3, r2 + 8003ae4: d863 bhi.n 8003bae + 8003ae6: 4a92 ldr r2, [pc, #584] @ (8003d30 ) + 8003ae8: 4293 cmp r3, r2 + 8003aea: d046 beq.n 8003b7a + 8003aec: 4a90 ldr r2, [pc, #576] @ (8003d30 ) + 8003aee: 4293 cmp r3, r2 + 8003af0: d85d bhi.n 8003bae + 8003af2: 2b12 cmp r3, #18 + 8003af4: d82a bhi.n 8003b4c + 8003af6: 2b12 cmp r3, #18 + 8003af8: d859 bhi.n 8003bae + 8003afa: a201 add r2, pc, #4 @ (adr r2, 8003b00 ) + 8003afc: f852 f023 ldr.w pc, [r2, r3, lsl #2] + 8003b00: 08003b7b .word 0x08003b7b + 8003b04: 08003b55 .word 0x08003b55 + 8003b08: 08003b67 .word 0x08003b67 + 8003b0c: 08003ba9 .word 0x08003ba9 + 8003b10: 08003baf .word 0x08003baf + 8003b14: 08003baf .word 0x08003baf + 8003b18: 08003baf .word 0x08003baf + 8003b1c: 08003baf .word 0x08003baf + 8003b20: 08003baf .word 0x08003baf + 8003b24: 08003baf .word 0x08003baf + 8003b28: 08003baf .word 0x08003baf + 8003b2c: 08003baf .word 0x08003baf + 8003b30: 08003baf .word 0x08003baf + 8003b34: 08003baf .word 0x08003baf + 8003b38: 08003baf .word 0x08003baf + 8003b3c: 08003baf .word 0x08003baf + 8003b40: 08003baf .word 0x08003baf + 8003b44: 08003b5d .word 0x08003b5d + 8003b48: 08003b71 .word 0x08003b71 + 8003b4c: 4a79 ldr r2, [pc, #484] @ (8003d34 ) + 8003b4e: 4293 cmp r3, r2 + 8003b50: d013 beq.n 8003b7a config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; break; /* Parameters are checked with assert_param */ default: break; - 8003262: e02c b.n 80032be + 8003b52: e02c b.n 8003bae config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP; - 8003264: 683b ldr r3, [r7, #0] - 8003266: 68db ldr r3, [r3, #12] - 8003268: 623b str r3, [r7, #32] + 8003b54: 683b ldr r3, [r7, #0] + 8003b56: 68db ldr r3, [r3, #12] + 8003b58: 623b str r3, [r7, #32] break; - 800326a: e029 b.n 80032c0 + 8003b5a: e029 b.n 8003bb0 config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD; - 800326c: 683b ldr r3, [r7, #0] - 800326e: 68db ldr r3, [r3, #12] - 8003270: 3304 adds r3, #4 - 8003272: 623b str r3, [r7, #32] + 8003b5c: 683b ldr r3, [r7, #0] + 8003b5e: 68db ldr r3, [r3, #12] + 8003b60: 3304 adds r3, #4 + 8003b62: 623b str r3, [r7, #32] break; - 8003274: e024 b.n 80032c0 + 8003b64: e024 b.n 8003bb0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP; - 8003276: 683b ldr r3, [r7, #0] - 8003278: 68db ldr r3, [r3, #12] - 800327a: 3308 adds r3, #8 - 800327c: 623b str r3, [r7, #32] + 8003b66: 683b ldr r3, [r7, #0] + 8003b68: 68db ldr r3, [r3, #12] + 8003b6a: 3308 adds r3, #8 + 8003b6c: 623b str r3, [r7, #32] break; - 800327e: e01f b.n 80032c0 + 8003b6e: e01f b.n 8003bb0 config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD; - 8003280: 683b ldr r3, [r7, #0] - 8003282: 68db ldr r3, [r3, #12] - 8003284: 330c adds r3, #12 - 8003286: 623b str r3, [r7, #32] + 8003b70: 683b ldr r3, [r7, #0] + 8003b72: 68db ldr r3, [r3, #12] + 8003b74: 330c adds r3, #12 + 8003b76: 623b str r3, [r7, #32] break; - 8003288: e01a b.n 80032c0 + 8003b78: e01a b.n 8003bb0 if (GPIO_Init->Pull == GPIO_NOPULL) - 800328a: 683b ldr r3, [r7, #0] - 800328c: 689b ldr r3, [r3, #8] - 800328e: 2b00 cmp r3, #0 - 8003290: d102 bne.n 8003298 + 8003b7a: 683b ldr r3, [r7, #0] + 8003b7c: 689b ldr r3, [r3, #8] + 8003b7e: 2b00 cmp r3, #0 + 8003b80: d102 bne.n 8003b88 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING; - 8003292: 2304 movs r3, #4 - 8003294: 623b str r3, [r7, #32] + 8003b82: 2304 movs r3, #4 + 8003b84: 623b str r3, [r7, #32] break; - 8003296: e013 b.n 80032c0 + 8003b86: e013 b.n 8003bb0 else if (GPIO_Init->Pull == GPIO_PULLUP) - 8003298: 683b ldr r3, [r7, #0] - 800329a: 689b ldr r3, [r3, #8] - 800329c: 2b01 cmp r3, #1 - 800329e: d105 bne.n 80032ac + 8003b88: 683b ldr r3, [r7, #0] + 8003b8a: 689b ldr r3, [r3, #8] + 8003b8c: 2b01 cmp r3, #1 + 8003b8e: d105 bne.n 8003b9c config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 80032a0: 2308 movs r3, #8 - 80032a2: 623b str r3, [r7, #32] + 8003b90: 2308 movs r3, #8 + 8003b92: 623b str r3, [r7, #32] GPIOx->BSRR = ioposition; - 80032a4: 687b ldr r3, [r7, #4] - 80032a6: 69fa ldr r2, [r7, #28] - 80032a8: 611a str r2, [r3, #16] + 8003b94: 687b ldr r3, [r7, #4] + 8003b96: 69fa ldr r2, [r7, #28] + 8003b98: 611a str r2, [r3, #16] break; - 80032aa: e009 b.n 80032c0 + 8003b9a: e009 b.n 8003bb0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD; - 80032ac: 2308 movs r3, #8 - 80032ae: 623b str r3, [r7, #32] + 8003b9c: 2308 movs r3, #8 + 8003b9e: 623b str r3, [r7, #32] GPIOx->BRR = ioposition; - 80032b0: 687b ldr r3, [r7, #4] - 80032b2: 69fa ldr r2, [r7, #28] - 80032b4: 615a str r2, [r3, #20] + 8003ba0: 687b ldr r3, [r7, #4] + 8003ba2: 69fa ldr r2, [r7, #28] + 8003ba4: 615a str r2, [r3, #20] break; - 80032b6: e003 b.n 80032c0 + 8003ba6: e003 b.n 8003bb0 config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG; - 80032b8: 2300 movs r3, #0 - 80032ba: 623b str r3, [r7, #32] + 8003ba8: 2300 movs r3, #0 + 8003baa: 623b str r3, [r7, #32] break; - 80032bc: e000 b.n 80032c0 + 8003bac: e000 b.n 8003bb0 break; - 80032be: bf00 nop + 8003bae: bf00 nop } /* Check if the current bit belongs to first half or last half of the pin count number in order to address CRH or CRL register*/ configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH; - 80032c0: 69bb ldr r3, [r7, #24] - 80032c2: 2bff cmp r3, #255 @ 0xff - 80032c4: d801 bhi.n 80032ca - 80032c6: 687b ldr r3, [r7, #4] - 80032c8: e001 b.n 80032ce - 80032ca: 687b ldr r3, [r7, #4] - 80032cc: 3304 adds r3, #4 - 80032ce: 617b str r3, [r7, #20] + 8003bb0: 69bb ldr r3, [r7, #24] + 8003bb2: 2bff cmp r3, #255 @ 0xff + 8003bb4: d801 bhi.n 8003bba + 8003bb6: 687b ldr r3, [r7, #4] + 8003bb8: e001 b.n 8003bbe + 8003bba: 687b ldr r3, [r7, #4] + 8003bbc: 3304 adds r3, #4 + 8003bbe: 617b str r3, [r7, #20] registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u); - 80032d0: 69bb ldr r3, [r7, #24] - 80032d2: 2bff cmp r3, #255 @ 0xff - 80032d4: d802 bhi.n 80032dc - 80032d6: 6a7b ldr r3, [r7, #36] @ 0x24 - 80032d8: 009b lsls r3, r3, #2 - 80032da: e002 b.n 80032e2 - 80032dc: 6a7b ldr r3, [r7, #36] @ 0x24 - 80032de: 3b08 subs r3, #8 - 80032e0: 009b lsls r3, r3, #2 - 80032e2: 613b str r3, [r7, #16] + 8003bc0: 69bb ldr r3, [r7, #24] + 8003bc2: 2bff cmp r3, #255 @ 0xff + 8003bc4: d802 bhi.n 8003bcc + 8003bc6: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003bc8: 009b lsls r3, r3, #2 + 8003bca: e002 b.n 8003bd2 + 8003bcc: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003bce: 3b08 subs r3, #8 + 8003bd0: 009b lsls r3, r3, #2 + 8003bd2: 613b str r3, [r7, #16] /* Apply the new configuration of the pin to the register */ MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset)); - 80032e4: 697b ldr r3, [r7, #20] - 80032e6: 681a ldr r2, [r3, #0] - 80032e8: 210f movs r1, #15 - 80032ea: 693b ldr r3, [r7, #16] - 80032ec: fa01 f303 lsl.w r3, r1, r3 - 80032f0: 43db mvns r3, r3 - 80032f2: 401a ands r2, r3 - 80032f4: 6a39 ldr r1, [r7, #32] - 80032f6: 693b ldr r3, [r7, #16] - 80032f8: fa01 f303 lsl.w r3, r1, r3 - 80032fc: 431a orrs r2, r3 - 80032fe: 697b ldr r3, [r7, #20] - 8003300: 601a str r2, [r3, #0] + 8003bd4: 697b ldr r3, [r7, #20] + 8003bd6: 681a ldr r2, [r3, #0] + 8003bd8: 210f movs r1, #15 + 8003bda: 693b ldr r3, [r7, #16] + 8003bdc: fa01 f303 lsl.w r3, r1, r3 + 8003be0: 43db mvns r3, r3 + 8003be2: 401a ands r2, r3 + 8003be4: 6a39 ldr r1, [r7, #32] + 8003be6: 693b ldr r3, [r7, #16] + 8003be8: fa01 f303 lsl.w r3, r1, r3 + 8003bec: 431a orrs r2, r3 + 8003bee: 697b ldr r3, [r7, #20] + 8003bf0: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) - 8003302: 683b ldr r3, [r7, #0] - 8003304: 685b ldr r3, [r3, #4] - 8003306: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 800330a: 2b00 cmp r3, #0 - 800330c: f000 80b1 beq.w 8003472 + 8003bf2: 683b ldr r3, [r7, #0] + 8003bf4: 685b ldr r3, [r3, #4] + 8003bf6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8003bfa: 2b00 cmp r3, #0 + 8003bfc: f000 80b1 beq.w 8003d62 { /* Enable AFIO Clock */ __HAL_RCC_AFIO_CLK_ENABLE(); - 8003310: 4b4d ldr r3, [pc, #308] @ (8003448 ) - 8003312: 699b ldr r3, [r3, #24] - 8003314: 4a4c ldr r2, [pc, #304] @ (8003448 ) - 8003316: f043 0301 orr.w r3, r3, #1 - 800331a: 6193 str r3, [r2, #24] - 800331c: 4b4a ldr r3, [pc, #296] @ (8003448 ) - 800331e: 699b ldr r3, [r3, #24] - 8003320: f003 0301 and.w r3, r3, #1 - 8003324: 60bb str r3, [r7, #8] - 8003326: 68bb ldr r3, [r7, #8] + 8003c00: 4b4d ldr r3, [pc, #308] @ (8003d38 ) + 8003c02: 699b ldr r3, [r3, #24] + 8003c04: 4a4c ldr r2, [pc, #304] @ (8003d38 ) + 8003c06: f043 0301 orr.w r3, r3, #1 + 8003c0a: 6193 str r3, [r2, #24] + 8003c0c: 4b4a ldr r3, [pc, #296] @ (8003d38 ) + 8003c0e: 699b ldr r3, [r3, #24] + 8003c10: f003 0301 and.w r3, r3, #1 + 8003c14: 60bb str r3, [r7, #8] + 8003c16: 68bb ldr r3, [r7, #8] temp = AFIO->EXTICR[position >> 2u]; - 8003328: 4a48 ldr r2, [pc, #288] @ (800344c ) - 800332a: 6a7b ldr r3, [r7, #36] @ 0x24 - 800332c: 089b lsrs r3, r3, #2 - 800332e: 3302 adds r3, #2 - 8003330: f852 3023 ldr.w r3, [r2, r3, lsl #2] - 8003334: 60fb str r3, [r7, #12] + 8003c18: 4a48 ldr r2, [pc, #288] @ (8003d3c ) + 8003c1a: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003c1c: 089b lsrs r3, r3, #2 + 8003c1e: 3302 adds r3, #2 + 8003c20: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8003c24: 60fb str r3, [r7, #12] CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u))); - 8003336: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003338: f003 0303 and.w r3, r3, #3 - 800333c: 009b lsls r3, r3, #2 - 800333e: 220f movs r2, #15 - 8003340: fa02 f303 lsl.w r3, r2, r3 - 8003344: 43db mvns r3, r3 - 8003346: 68fa ldr r2, [r7, #12] - 8003348: 4013 ands r3, r2 - 800334a: 60fb str r3, [r7, #12] + 8003c26: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003c28: f003 0303 and.w r3, r3, #3 + 8003c2c: 009b lsls r3, r3, #2 + 8003c2e: 220f movs r2, #15 + 8003c30: fa02 f303 lsl.w r3, r2, r3 + 8003c34: 43db mvns r3, r3 + 8003c36: 68fa ldr r2, [r7, #12] + 8003c38: 4013 ands r3, r2 + 8003c3a: 60fb str r3, [r7, #12] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u))); - 800334c: 687b ldr r3, [r7, #4] - 800334e: 4a40 ldr r2, [pc, #256] @ (8003450 ) - 8003350: 4293 cmp r3, r2 - 8003352: d013 beq.n 800337c - 8003354: 687b ldr r3, [r7, #4] - 8003356: 4a3f ldr r2, [pc, #252] @ (8003454 ) - 8003358: 4293 cmp r3, r2 - 800335a: d00d beq.n 8003378 - 800335c: 687b ldr r3, [r7, #4] - 800335e: 4a3e ldr r2, [pc, #248] @ (8003458 ) - 8003360: 4293 cmp r3, r2 - 8003362: d007 beq.n 8003374 - 8003364: 687b ldr r3, [r7, #4] - 8003366: 4a3d ldr r2, [pc, #244] @ (800345c ) - 8003368: 4293 cmp r3, r2 - 800336a: d101 bne.n 8003370 - 800336c: 2303 movs r3, #3 - 800336e: e006 b.n 800337e - 8003370: 2304 movs r3, #4 - 8003372: e004 b.n 800337e - 8003374: 2302 movs r3, #2 - 8003376: e002 b.n 800337e - 8003378: 2301 movs r3, #1 - 800337a: e000 b.n 800337e - 800337c: 2300 movs r3, #0 - 800337e: 6a7a ldr r2, [r7, #36] @ 0x24 - 8003380: f002 0203 and.w r2, r2, #3 - 8003384: 0092 lsls r2, r2, #2 - 8003386: 4093 lsls r3, r2 - 8003388: 68fa ldr r2, [r7, #12] - 800338a: 4313 orrs r3, r2 - 800338c: 60fb str r3, [r7, #12] + 8003c3c: 687b ldr r3, [r7, #4] + 8003c3e: 4a40 ldr r2, [pc, #256] @ (8003d40 ) + 8003c40: 4293 cmp r3, r2 + 8003c42: d013 beq.n 8003c6c + 8003c44: 687b ldr r3, [r7, #4] + 8003c46: 4a3f ldr r2, [pc, #252] @ (8003d44 ) + 8003c48: 4293 cmp r3, r2 + 8003c4a: d00d beq.n 8003c68 + 8003c4c: 687b ldr r3, [r7, #4] + 8003c4e: 4a3e ldr r2, [pc, #248] @ (8003d48 ) + 8003c50: 4293 cmp r3, r2 + 8003c52: d007 beq.n 8003c64 + 8003c54: 687b ldr r3, [r7, #4] + 8003c56: 4a3d ldr r2, [pc, #244] @ (8003d4c ) + 8003c58: 4293 cmp r3, r2 + 8003c5a: d101 bne.n 8003c60 + 8003c5c: 2303 movs r3, #3 + 8003c5e: e006 b.n 8003c6e + 8003c60: 2304 movs r3, #4 + 8003c62: e004 b.n 8003c6e + 8003c64: 2302 movs r3, #2 + 8003c66: e002 b.n 8003c6e + 8003c68: 2301 movs r3, #1 + 8003c6a: e000 b.n 8003c6e + 8003c6c: 2300 movs r3, #0 + 8003c6e: 6a7a ldr r2, [r7, #36] @ 0x24 + 8003c70: f002 0203 and.w r2, r2, #3 + 8003c74: 0092 lsls r2, r2, #2 + 8003c76: 4093 lsls r3, r2 + 8003c78: 68fa ldr r2, [r7, #12] + 8003c7a: 4313 orrs r3, r2 + 8003c7c: 60fb str r3, [r7, #12] AFIO->EXTICR[position >> 2u] = temp; - 800338e: 492f ldr r1, [pc, #188] @ (800344c ) - 8003390: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003392: 089b lsrs r3, r3, #2 - 8003394: 3302 adds r3, #2 - 8003396: 68fa ldr r2, [r7, #12] - 8003398: f841 2023 str.w r2, [r1, r3, lsl #2] + 8003c7e: 492f ldr r1, [pc, #188] @ (8003d3c ) + 8003c80: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003c82: 089b lsrs r3, r3, #2 + 8003c84: 3302 adds r3, #2 + 8003c86: 68fa ldr r2, [r7, #12] + 8003c88: f841 2023 str.w r2, [r1, r3, lsl #2] /* Enable or disable the rising trigger */ if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) - 800339c: 683b ldr r3, [r7, #0] - 800339e: 685b ldr r3, [r3, #4] - 80033a0: f403 1380 and.w r3, r3, #1048576 @ 0x100000 - 80033a4: 2b00 cmp r3, #0 - 80033a6: d006 beq.n 80033b6 + 8003c8c: 683b ldr r3, [r7, #0] + 8003c8e: 685b ldr r3, [r3, #4] + 8003c90: f403 1380 and.w r3, r3, #1048576 @ 0x100000 + 8003c94: 2b00 cmp r3, #0 + 8003c96: d006 beq.n 8003ca6 { SET_BIT(EXTI->RTSR, iocurrent); - 80033a8: 4b2d ldr r3, [pc, #180] @ (8003460 ) - 80033aa: 689a ldr r2, [r3, #8] - 80033ac: 492c ldr r1, [pc, #176] @ (8003460 ) - 80033ae: 69bb ldr r3, [r7, #24] - 80033b0: 4313 orrs r3, r2 - 80033b2: 608b str r3, [r1, #8] - 80033b4: e006 b.n 80033c4 + 8003c98: 4b2d ldr r3, [pc, #180] @ (8003d50 ) + 8003c9a: 689a ldr r2, [r3, #8] + 8003c9c: 492c ldr r1, [pc, #176] @ (8003d50 ) + 8003c9e: 69bb ldr r3, [r7, #24] + 8003ca0: 4313 orrs r3, r2 + 8003ca2: 608b str r3, [r1, #8] + 8003ca4: e006 b.n 8003cb4 } else { CLEAR_BIT(EXTI->RTSR, iocurrent); - 80033b6: 4b2a ldr r3, [pc, #168] @ (8003460 ) - 80033b8: 689a ldr r2, [r3, #8] - 80033ba: 69bb ldr r3, [r7, #24] - 80033bc: 43db mvns r3, r3 - 80033be: 4928 ldr r1, [pc, #160] @ (8003460 ) - 80033c0: 4013 ands r3, r2 - 80033c2: 608b str r3, [r1, #8] + 8003ca6: 4b2a ldr r3, [pc, #168] @ (8003d50 ) + 8003ca8: 689a ldr r2, [r3, #8] + 8003caa: 69bb ldr r3, [r7, #24] + 8003cac: 43db mvns r3, r3 + 8003cae: 4928 ldr r1, [pc, #160] @ (8003d50 ) + 8003cb0: 4013 ands r3, r2 + 8003cb2: 608b str r3, [r1, #8] } /* Enable or disable the falling trigger */ if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) - 80033c4: 683b ldr r3, [r7, #0] - 80033c6: 685b ldr r3, [r3, #4] - 80033c8: f403 1300 and.w r3, r3, #2097152 @ 0x200000 - 80033cc: 2b00 cmp r3, #0 - 80033ce: d006 beq.n 80033de + 8003cb4: 683b ldr r3, [r7, #0] + 8003cb6: 685b ldr r3, [r3, #4] + 8003cb8: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 8003cbc: 2b00 cmp r3, #0 + 8003cbe: d006 beq.n 8003cce { SET_BIT(EXTI->FTSR, iocurrent); - 80033d0: 4b23 ldr r3, [pc, #140] @ (8003460 ) - 80033d2: 68da ldr r2, [r3, #12] - 80033d4: 4922 ldr r1, [pc, #136] @ (8003460 ) - 80033d6: 69bb ldr r3, [r7, #24] - 80033d8: 4313 orrs r3, r2 - 80033da: 60cb str r3, [r1, #12] - 80033dc: e006 b.n 80033ec + 8003cc0: 4b23 ldr r3, [pc, #140] @ (8003d50 ) + 8003cc2: 68da ldr r2, [r3, #12] + 8003cc4: 4922 ldr r1, [pc, #136] @ (8003d50 ) + 8003cc6: 69bb ldr r3, [r7, #24] + 8003cc8: 4313 orrs r3, r2 + 8003cca: 60cb str r3, [r1, #12] + 8003ccc: e006 b.n 8003cdc } else { CLEAR_BIT(EXTI->FTSR, iocurrent); - 80033de: 4b20 ldr r3, [pc, #128] @ (8003460 ) - 80033e0: 68da ldr r2, [r3, #12] - 80033e2: 69bb ldr r3, [r7, #24] - 80033e4: 43db mvns r3, r3 - 80033e6: 491e ldr r1, [pc, #120] @ (8003460 ) - 80033e8: 4013 ands r3, r2 - 80033ea: 60cb str r3, [r1, #12] + 8003cce: 4b20 ldr r3, [pc, #128] @ (8003d50 ) + 8003cd0: 68da ldr r2, [r3, #12] + 8003cd2: 69bb ldr r3, [r7, #24] + 8003cd4: 43db mvns r3, r3 + 8003cd6: 491e ldr r1, [pc, #120] @ (8003d50 ) + 8003cd8: 4013 ands r3, r2 + 8003cda: 60cb str r3, [r1, #12] } /* Configure the event mask */ if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - 80033ec: 683b ldr r3, [r7, #0] - 80033ee: 685b ldr r3, [r3, #4] - 80033f0: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 80033f4: 2b00 cmp r3, #0 - 80033f6: d006 beq.n 8003406 + 8003cdc: 683b ldr r3, [r7, #0] + 8003cde: 685b ldr r3, [r3, #4] + 8003ce0: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8003ce4: 2b00 cmp r3, #0 + 8003ce6: d006 beq.n 8003cf6 { SET_BIT(EXTI->EMR, iocurrent); - 80033f8: 4b19 ldr r3, [pc, #100] @ (8003460 ) - 80033fa: 685a ldr r2, [r3, #4] - 80033fc: 4918 ldr r1, [pc, #96] @ (8003460 ) - 80033fe: 69bb ldr r3, [r7, #24] - 8003400: 4313 orrs r3, r2 - 8003402: 604b str r3, [r1, #4] - 8003404: e006 b.n 8003414 + 8003ce8: 4b19 ldr r3, [pc, #100] @ (8003d50 ) + 8003cea: 685a ldr r2, [r3, #4] + 8003cec: 4918 ldr r1, [pc, #96] @ (8003d50 ) + 8003cee: 69bb ldr r3, [r7, #24] + 8003cf0: 4313 orrs r3, r2 + 8003cf2: 604b str r3, [r1, #4] + 8003cf4: e006 b.n 8003d04 } else { CLEAR_BIT(EXTI->EMR, iocurrent); - 8003406: 4b16 ldr r3, [pc, #88] @ (8003460 ) - 8003408: 685a ldr r2, [r3, #4] - 800340a: 69bb ldr r3, [r7, #24] - 800340c: 43db mvns r3, r3 - 800340e: 4914 ldr r1, [pc, #80] @ (8003460 ) - 8003410: 4013 ands r3, r2 - 8003412: 604b str r3, [r1, #4] + 8003cf6: 4b16 ldr r3, [pc, #88] @ (8003d50 ) + 8003cf8: 685a ldr r2, [r3, #4] + 8003cfa: 69bb ldr r3, [r7, #24] + 8003cfc: 43db mvns r3, r3 + 8003cfe: 4914 ldr r1, [pc, #80] @ (8003d50 ) + 8003d00: 4013 ands r3, r2 + 8003d02: 604b str r3, [r1, #4] } /* Configure the interrupt mask */ if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - 8003414: 683b ldr r3, [r7, #0] - 8003416: 685b ldr r3, [r3, #4] - 8003418: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 800341c: 2b00 cmp r3, #0 - 800341e: d021 beq.n 8003464 + 8003d04: 683b ldr r3, [r7, #0] + 8003d06: 685b ldr r3, [r3, #4] + 8003d08: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8003d0c: 2b00 cmp r3, #0 + 8003d0e: d021 beq.n 8003d54 { SET_BIT(EXTI->IMR, iocurrent); - 8003420: 4b0f ldr r3, [pc, #60] @ (8003460 ) - 8003422: 681a ldr r2, [r3, #0] - 8003424: 490e ldr r1, [pc, #56] @ (8003460 ) - 8003426: 69bb ldr r3, [r7, #24] - 8003428: 4313 orrs r3, r2 - 800342a: 600b str r3, [r1, #0] - 800342c: e021 b.n 8003472 - 800342e: bf00 nop - 8003430: 10320000 .word 0x10320000 - 8003434: 10310000 .word 0x10310000 - 8003438: 10220000 .word 0x10220000 - 800343c: 10210000 .word 0x10210000 - 8003440: 10120000 .word 0x10120000 - 8003444: 10110000 .word 0x10110000 - 8003448: 40021000 .word 0x40021000 - 800344c: 40010000 .word 0x40010000 - 8003450: 40010800 .word 0x40010800 - 8003454: 40010c00 .word 0x40010c00 - 8003458: 40011000 .word 0x40011000 - 800345c: 40011400 .word 0x40011400 - 8003460: 40010400 .word 0x40010400 + 8003d10: 4b0f ldr r3, [pc, #60] @ (8003d50 ) + 8003d12: 681a ldr r2, [r3, #0] + 8003d14: 490e ldr r1, [pc, #56] @ (8003d50 ) + 8003d16: 69bb ldr r3, [r7, #24] + 8003d18: 4313 orrs r3, r2 + 8003d1a: 600b str r3, [r1, #0] + 8003d1c: e021 b.n 8003d62 + 8003d1e: bf00 nop + 8003d20: 10320000 .word 0x10320000 + 8003d24: 10310000 .word 0x10310000 + 8003d28: 10220000 .word 0x10220000 + 8003d2c: 10210000 .word 0x10210000 + 8003d30: 10120000 .word 0x10120000 + 8003d34: 10110000 .word 0x10110000 + 8003d38: 40021000 .word 0x40021000 + 8003d3c: 40010000 .word 0x40010000 + 8003d40: 40010800 .word 0x40010800 + 8003d44: 40010c00 .word 0x40010c00 + 8003d48: 40011000 .word 0x40011000 + 8003d4c: 40011400 .word 0x40011400 + 8003d50: 40010400 .word 0x40010400 } else { CLEAR_BIT(EXTI->IMR, iocurrent); - 8003464: 4b0b ldr r3, [pc, #44] @ (8003494 ) - 8003466: 681a ldr r2, [r3, #0] - 8003468: 69bb ldr r3, [r7, #24] - 800346a: 43db mvns r3, r3 - 800346c: 4909 ldr r1, [pc, #36] @ (8003494 ) - 800346e: 4013 ands r3, r2 - 8003470: 600b str r3, [r1, #0] + 8003d54: 4b0b ldr r3, [pc, #44] @ (8003d84 ) + 8003d56: 681a ldr r2, [r3, #0] + 8003d58: 69bb ldr r3, [r7, #24] + 8003d5a: 43db mvns r3, r3 + 8003d5c: 4909 ldr r1, [pc, #36] @ (8003d84 ) + 8003d5e: 4013 ands r3, r2 + 8003d60: 600b str r3, [r1, #0] } } } position++; - 8003472: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003474: 3301 adds r3, #1 - 8003476: 627b str r3, [r7, #36] @ 0x24 + 8003d62: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003d64: 3301 adds r3, #1 + 8003d66: 627b str r3, [r7, #36] @ 0x24 while (((GPIO_Init->Pin) >> position) != 0x00u) - 8003478: 683b ldr r3, [r7, #0] - 800347a: 681a ldr r2, [r3, #0] - 800347c: 6a7b ldr r3, [r7, #36] @ 0x24 - 800347e: fa22 f303 lsr.w r3, r2, r3 - 8003482: 2b00 cmp r3, #0 - 8003484: f47f ae8e bne.w 80031a4 + 8003d68: 683b ldr r3, [r7, #0] + 8003d6a: 681a ldr r2, [r3, #0] + 8003d6c: 6a7b ldr r3, [r7, #36] @ 0x24 + 8003d6e: fa22 f303 lsr.w r3, r2, r3 + 8003d72: 2b00 cmp r3, #0 + 8003d74: f47f ae8e bne.w 8003a94 } } - 8003488: bf00 nop - 800348a: bf00 nop - 800348c: 372c adds r7, #44 @ 0x2c - 800348e: 46bd mov sp, r7 - 8003490: bc80 pop {r7} - 8003492: 4770 bx lr - 8003494: 40010400 .word 0x40010400 + 8003d78: bf00 nop + 8003d7a: bf00 nop + 8003d7c: 372c adds r7, #44 @ 0x2c + 8003d7e: 46bd mov sp, r7 + 8003d80: bc80 pop {r7} + 8003d82: 4770 bx lr + 8003d84: 40010400 .word 0x40010400 -08003498 : +08003d88 : * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 8003498: b480 push {r7} - 800349a: b085 sub sp, #20 - 800349c: af00 add r7, sp, #0 - 800349e: 6078 str r0, [r7, #4] - 80034a0: 460b mov r3, r1 - 80034a2: 807b strh r3, [r7, #2] + 8003d88: b480 push {r7} + 8003d8a: b085 sub sp, #20 + 8003d8c: af00 add r7, sp, #0 + 8003d8e: 6078 str r0, [r7, #4] + 8003d90: 460b mov r3, r1 + 8003d92: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) - 80034a4: 687b ldr r3, [r7, #4] - 80034a6: 689a ldr r2, [r3, #8] - 80034a8: 887b ldrh r3, [r7, #2] - 80034aa: 4013 ands r3, r2 - 80034ac: 2b00 cmp r3, #0 - 80034ae: d002 beq.n 80034b6 + 8003d94: 687b ldr r3, [r7, #4] + 8003d96: 689a ldr r2, [r3, #8] + 8003d98: 887b ldrh r3, [r7, #2] + 8003d9a: 4013 ands r3, r2 + 8003d9c: 2b00 cmp r3, #0 + 8003d9e: d002 beq.n 8003da6 { bitstatus = GPIO_PIN_SET; - 80034b0: 2301 movs r3, #1 - 80034b2: 73fb strb r3, [r7, #15] - 80034b4: e001 b.n 80034ba + 8003da0: 2301 movs r3, #1 + 8003da2: 73fb strb r3, [r7, #15] + 8003da4: e001 b.n 8003daa } else { bitstatus = GPIO_PIN_RESET; - 80034b6: 2300 movs r3, #0 - 80034b8: 73fb strb r3, [r7, #15] + 8003da6: 2300 movs r3, #0 + 8003da8: 73fb strb r3, [r7, #15] } return bitstatus; - 80034ba: 7bfb ldrb r3, [r7, #15] + 8003daa: 7bfb ldrb r3, [r7, #15] } - 80034bc: 4618 mov r0, r3 - 80034be: 3714 adds r7, #20 - 80034c0: 46bd mov sp, r7 - 80034c2: bc80 pop {r7} - 80034c4: 4770 bx lr + 8003dac: 4618 mov r0, r3 + 8003dae: 3714 adds r7, #20 + 8003db0: 46bd mov sp, r7 + 8003db2: bc80 pop {r7} + 8003db4: 4770 bx lr -080034c6 : +08003db6 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 80034c6: b480 push {r7} - 80034c8: b083 sub sp, #12 - 80034ca: af00 add r7, sp, #0 - 80034cc: 6078 str r0, [r7, #4] - 80034ce: 460b mov r3, r1 - 80034d0: 807b strh r3, [r7, #2] - 80034d2: 4613 mov r3, r2 - 80034d4: 707b strb r3, [r7, #1] + 8003db6: b480 push {r7} + 8003db8: b083 sub sp, #12 + 8003dba: af00 add r7, sp, #0 + 8003dbc: 6078 str r0, [r7, #4] + 8003dbe: 460b mov r3, r1 + 8003dc0: 807b strh r3, [r7, #2] + 8003dc2: 4613 mov r3, r2 + 8003dc4: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 80034d6: 787b ldrb r3, [r7, #1] - 80034d8: 2b00 cmp r3, #0 - 80034da: d003 beq.n 80034e4 + 8003dc6: 787b ldrb r3, [r7, #1] + 8003dc8: 2b00 cmp r3, #0 + 8003dca: d003 beq.n 8003dd4 { GPIOx->BSRR = GPIO_Pin; - 80034dc: 887a ldrh r2, [r7, #2] - 80034de: 687b ldr r3, [r7, #4] - 80034e0: 611a str r2, [r3, #16] + 8003dcc: 887a ldrh r2, [r7, #2] + 8003dce: 687b ldr r3, [r7, #4] + 8003dd0: 611a str r2, [r3, #16] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; } } - 80034e2: e003 b.n 80034ec + 8003dd2: e003 b.n 8003ddc GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u; - 80034e4: 887b ldrh r3, [r7, #2] - 80034e6: 041a lsls r2, r3, #16 - 80034e8: 687b ldr r3, [r7, #4] - 80034ea: 611a str r2, [r3, #16] + 8003dd4: 887b ldrh r3, [r7, #2] + 8003dd6: 041a lsls r2, r3, #16 + 8003dd8: 687b ldr r3, [r7, #4] + 8003dda: 611a str r2, [r3, #16] } - 80034ec: bf00 nop - 80034ee: 370c adds r7, #12 - 80034f0: 46bd mov sp, r7 - 80034f2: bc80 pop {r7} - 80034f4: 4770 bx lr + 8003ddc: bf00 nop + 8003dde: 370c adds r7, #12 + 8003de0: 46bd mov sp, r7 + 8003de2: bc80 pop {r7} + 8003de4: 4770 bx lr -080034f6 : +08003de6 : * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral * @param GPIO_Pin: Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 80034f6: b480 push {r7} - 80034f8: b085 sub sp, #20 - 80034fa: af00 add r7, sp, #0 - 80034fc: 6078 str r0, [r7, #4] - 80034fe: 460b mov r3, r1 - 8003500: 807b strh r3, [r7, #2] + 8003de6: b480 push {r7} + 8003de8: b085 sub sp, #20 + 8003dea: af00 add r7, sp, #0 + 8003dec: 6078 str r0, [r7, #4] + 8003dee: 460b mov r3, r1 + 8003df0: 807b strh r3, [r7, #2] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; - 8003502: 687b ldr r3, [r7, #4] - 8003504: 68db ldr r3, [r3, #12] - 8003506: 60fb str r3, [r7, #12] + 8003df2: 687b ldr r3, [r7, #4] + 8003df4: 68db ldr r3, [r3, #12] + 8003df6: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); - 8003508: 887a ldrh r2, [r7, #2] - 800350a: 68fb ldr r3, [r7, #12] - 800350c: 4013 ands r3, r2 - 800350e: 041a lsls r2, r3, #16 - 8003510: 68fb ldr r3, [r7, #12] - 8003512: 43d9 mvns r1, r3 - 8003514: 887b ldrh r3, [r7, #2] - 8003516: 400b ands r3, r1 - 8003518: 431a orrs r2, r3 - 800351a: 687b ldr r3, [r7, #4] - 800351c: 611a str r2, [r3, #16] + 8003df8: 887a ldrh r2, [r7, #2] + 8003dfa: 68fb ldr r3, [r7, #12] + 8003dfc: 4013 ands r3, r2 + 8003dfe: 041a lsls r2, r3, #16 + 8003e00: 68fb ldr r3, [r7, #12] + 8003e02: 43d9 mvns r1, r3 + 8003e04: 887b ldrh r3, [r7, #2] + 8003e06: 400b ands r3, r1 + 8003e08: 431a orrs r2, r3 + 8003e0a: 687b ldr r3, [r7, #4] + 8003e0c: 611a str r2, [r3, #16] } - 800351e: bf00 nop - 8003520: 3714 adds r7, #20 - 8003522: 46bd mov sp, r7 - 8003524: bc80 pop {r7} - 8003526: 4770 bx lr + 8003e0e: bf00 nop + 8003e10: 3714 adds r7, #20 + 8003e12: 46bd mov sp, r7 + 8003e14: bc80 pop {r7} + 8003e16: 4770 bx lr -08003528 : +08003e18 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { - 8003528: b580 push {r7, lr} - 800352a: b084 sub sp, #16 - 800352c: af00 add r7, sp, #0 - 800352e: 6078 str r0, [r7, #4] + 8003e18: b580 push {r7, lr} + 8003e1a: b084 sub sp, #16 + 8003e1c: af00 add r7, sp, #0 + 8003e1e: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) - 8003530: 687b ldr r3, [r7, #4] - 8003532: 2b00 cmp r3, #0 - 8003534: d101 bne.n 800353a + 8003e20: 687b ldr r3, [r7, #4] + 8003e22: 2b00 cmp r3, #0 + 8003e24: d101 bne.n 8003e2a { return HAL_ERROR; - 8003536: 2301 movs r3, #1 - 8003538: e12b b.n 8003792 + 8003e26: 2301 movs r3, #1 + 8003e28: e12b b.n 8004082 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) - 800353a: 687b ldr r3, [r7, #4] - 800353c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8003540: b2db uxtb r3, r3 - 8003542: 2b00 cmp r3, #0 - 8003544: d106 bne.n 8003554 + 8003e2a: 687b ldr r3, [r7, #4] + 8003e2c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8003e30: b2db uxtb r3, r3 + 8003e32: 2b00 cmp r3, #0 + 8003e34: d106 bne.n 8003e44 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; - 8003546: 687b ldr r3, [r7, #4] - 8003548: 2200 movs r2, #0 - 800354a: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8003e36: 687b ldr r3, [r7, #4] + 8003e38: 2200 movs r2, #0 + 8003e3a: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); - 800354e: 6878 ldr r0, [r7, #4] - 8003550: f7fe fc4c bl 8001dec + 8003e3e: 6878 ldr r0, [r7, #4] + 8003e40: f7fe fb48 bl 80024d4 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; - 8003554: 687b ldr r3, [r7, #4] - 8003556: 2224 movs r2, #36 @ 0x24 - 8003558: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8003e44: 687b ldr r3, [r7, #4] + 8003e46: 2224 movs r2, #36 @ 0x24 + 8003e48: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); - 800355c: 687b ldr r3, [r7, #4] - 800355e: 681b ldr r3, [r3, #0] - 8003560: 681a ldr r2, [r3, #0] - 8003562: 687b ldr r3, [r7, #4] - 8003564: 681b ldr r3, [r3, #0] - 8003566: f022 0201 bic.w r2, r2, #1 - 800356a: 601a str r2, [r3, #0] + 8003e4c: 687b ldr r3, [r7, #4] + 8003e4e: 681b ldr r3, [r3, #0] + 8003e50: 681a ldr r2, [r3, #0] + 8003e52: 687b ldr r3, [r7, #4] + 8003e54: 681b ldr r3, [r3, #0] + 8003e56: f022 0201 bic.w r2, r2, #1 + 8003e5a: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; - 800356c: 687b ldr r3, [r7, #4] - 800356e: 681b ldr r3, [r3, #0] - 8003570: 681a ldr r2, [r3, #0] - 8003572: 687b ldr r3, [r7, #4] - 8003574: 681b ldr r3, [r3, #0] - 8003576: f442 4200 orr.w r2, r2, #32768 @ 0x8000 - 800357a: 601a str r2, [r3, #0] + 8003e5c: 687b ldr r3, [r7, #4] + 8003e5e: 681b ldr r3, [r3, #0] + 8003e60: 681a ldr r2, [r3, #0] + 8003e62: 687b ldr r3, [r7, #4] + 8003e64: 681b ldr r3, [r3, #0] + 8003e66: f442 4200 orr.w r2, r2, #32768 @ 0x8000 + 8003e6a: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; - 800357c: 687b ldr r3, [r7, #4] - 800357e: 681b ldr r3, [r3, #0] - 8003580: 681a ldr r2, [r3, #0] - 8003582: 687b ldr r3, [r7, #4] - 8003584: 681b ldr r3, [r3, #0] - 8003586: f422 4200 bic.w r2, r2, #32768 @ 0x8000 - 800358a: 601a str r2, [r3, #0] + 8003e6c: 687b ldr r3, [r7, #4] + 8003e6e: 681b ldr r3, [r3, #0] + 8003e70: 681a ldr r2, [r3, #0] + 8003e72: 687b ldr r3, [r7, #4] + 8003e74: 681b ldr r3, [r3, #0] + 8003e76: f422 4200 bic.w r2, r2, #32768 @ 0x8000 + 8003e7a: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); - 800358c: f001 fbcc bl 8004d28 - 8003590: 60f8 str r0, [r7, #12] + 8003e7c: f001 fbcc bl 8005618 + 8003e80: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) - 8003592: 687b ldr r3, [r7, #4] - 8003594: 685b ldr r3, [r3, #4] - 8003596: 4a81 ldr r2, [pc, #516] @ (800379c ) - 8003598: 4293 cmp r3, r2 - 800359a: d807 bhi.n 80035ac - 800359c: 68fb ldr r3, [r7, #12] - 800359e: 4a80 ldr r2, [pc, #512] @ (80037a0 ) - 80035a0: 4293 cmp r3, r2 - 80035a2: bf94 ite ls - 80035a4: 2301 movls r3, #1 - 80035a6: 2300 movhi r3, #0 - 80035a8: b2db uxtb r3, r3 - 80035aa: e006 b.n 80035ba - 80035ac: 68fb ldr r3, [r7, #12] - 80035ae: 4a7d ldr r2, [pc, #500] @ (80037a4 ) - 80035b0: 4293 cmp r3, r2 - 80035b2: bf94 ite ls - 80035b4: 2301 movls r3, #1 - 80035b6: 2300 movhi r3, #0 - 80035b8: b2db uxtb r3, r3 - 80035ba: 2b00 cmp r3, #0 - 80035bc: d001 beq.n 80035c2 + 8003e82: 687b ldr r3, [r7, #4] + 8003e84: 685b ldr r3, [r3, #4] + 8003e86: 4a81 ldr r2, [pc, #516] @ (800408c ) + 8003e88: 4293 cmp r3, r2 + 8003e8a: d807 bhi.n 8003e9c + 8003e8c: 68fb ldr r3, [r7, #12] + 8003e8e: 4a80 ldr r2, [pc, #512] @ (8004090 ) + 8003e90: 4293 cmp r3, r2 + 8003e92: bf94 ite ls + 8003e94: 2301 movls r3, #1 + 8003e96: 2300 movhi r3, #0 + 8003e98: b2db uxtb r3, r3 + 8003e9a: e006 b.n 8003eaa + 8003e9c: 68fb ldr r3, [r7, #12] + 8003e9e: 4a7d ldr r2, [pc, #500] @ (8004094 ) + 8003ea0: 4293 cmp r3, r2 + 8003ea2: bf94 ite ls + 8003ea4: 2301 movls r3, #1 + 8003ea6: 2300 movhi r3, #0 + 8003ea8: b2db uxtb r3, r3 + 8003eaa: 2b00 cmp r3, #0 + 8003eac: d001 beq.n 8003eb2 { return HAL_ERROR; - 80035be: 2301 movs r3, #1 - 80035c0: e0e7 b.n 8003792 + 8003eae: 2301 movs r3, #1 + 8003eb0: e0e7 b.n 8004082 } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); - 80035c2: 68fb ldr r3, [r7, #12] - 80035c4: 4a78 ldr r2, [pc, #480] @ (80037a8 ) - 80035c6: fba2 2303 umull r2, r3, r2, r3 - 80035ca: 0c9b lsrs r3, r3, #18 - 80035cc: 60bb str r3, [r7, #8] + 8003eb2: 68fb ldr r3, [r7, #12] + 8003eb4: 4a78 ldr r2, [pc, #480] @ (8004098 ) + 8003eb6: fba2 2303 umull r2, r3, r2, r3 + 8003eba: 0c9b lsrs r3, r3, #18 + 8003ebc: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); - 80035ce: 687b ldr r3, [r7, #4] - 80035d0: 681b ldr r3, [r3, #0] - 80035d2: 685b ldr r3, [r3, #4] - 80035d4: f023 013f bic.w r1, r3, #63 @ 0x3f - 80035d8: 687b ldr r3, [r7, #4] - 80035da: 681b ldr r3, [r3, #0] - 80035dc: 68ba ldr r2, [r7, #8] - 80035de: 430a orrs r2, r1 - 80035e0: 605a str r2, [r3, #4] + 8003ebe: 687b ldr r3, [r7, #4] + 8003ec0: 681b ldr r3, [r3, #0] + 8003ec2: 685b ldr r3, [r3, #4] + 8003ec4: f023 013f bic.w r1, r3, #63 @ 0x3f + 8003ec8: 687b ldr r3, [r7, #4] + 8003eca: 681b ldr r3, [r3, #0] + 8003ecc: 68ba ldr r2, [r7, #8] + 8003ece: 430a orrs r2, r1 + 8003ed0: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); - 80035e2: 687b ldr r3, [r7, #4] - 80035e4: 681b ldr r3, [r3, #0] - 80035e6: 6a1b ldr r3, [r3, #32] - 80035e8: f023 013f bic.w r1, r3, #63 @ 0x3f - 80035ec: 687b ldr r3, [r7, #4] - 80035ee: 685b ldr r3, [r3, #4] - 80035f0: 4a6a ldr r2, [pc, #424] @ (800379c ) - 80035f2: 4293 cmp r3, r2 - 80035f4: d802 bhi.n 80035fc - 80035f6: 68bb ldr r3, [r7, #8] - 80035f8: 3301 adds r3, #1 - 80035fa: e009 b.n 8003610 - 80035fc: 68bb ldr r3, [r7, #8] - 80035fe: f44f 7296 mov.w r2, #300 @ 0x12c - 8003602: fb02 f303 mul.w r3, r2, r3 - 8003606: 4a69 ldr r2, [pc, #420] @ (80037ac ) - 8003608: fba2 2303 umull r2, r3, r2, r3 - 800360c: 099b lsrs r3, r3, #6 - 800360e: 3301 adds r3, #1 - 8003610: 687a ldr r2, [r7, #4] - 8003612: 6812 ldr r2, [r2, #0] - 8003614: 430b orrs r3, r1 - 8003616: 6213 str r3, [r2, #32] + 8003ed2: 687b ldr r3, [r7, #4] + 8003ed4: 681b ldr r3, [r3, #0] + 8003ed6: 6a1b ldr r3, [r3, #32] + 8003ed8: f023 013f bic.w r1, r3, #63 @ 0x3f + 8003edc: 687b ldr r3, [r7, #4] + 8003ede: 685b ldr r3, [r3, #4] + 8003ee0: 4a6a ldr r2, [pc, #424] @ (800408c ) + 8003ee2: 4293 cmp r3, r2 + 8003ee4: d802 bhi.n 8003eec + 8003ee6: 68bb ldr r3, [r7, #8] + 8003ee8: 3301 adds r3, #1 + 8003eea: e009 b.n 8003f00 + 8003eec: 68bb ldr r3, [r7, #8] + 8003eee: f44f 7296 mov.w r2, #300 @ 0x12c + 8003ef2: fb02 f303 mul.w r3, r2, r3 + 8003ef6: 4a69 ldr r2, [pc, #420] @ (800409c ) + 8003ef8: fba2 2303 umull r2, r3, r2, r3 + 8003efc: 099b lsrs r3, r3, #6 + 8003efe: 3301 adds r3, #1 + 8003f00: 687a ldr r2, [r7, #4] + 8003f02: 6812 ldr r2, [r2, #0] + 8003f04: 430b orrs r3, r1 + 8003f06: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); - 8003618: 687b ldr r3, [r7, #4] - 800361a: 681b ldr r3, [r3, #0] - 800361c: 69db ldr r3, [r3, #28] - 800361e: f423 424f bic.w r2, r3, #52992 @ 0xcf00 - 8003622: f022 02ff bic.w r2, r2, #255 @ 0xff - 8003626: 687b ldr r3, [r7, #4] - 8003628: 685b ldr r3, [r3, #4] - 800362a: 495c ldr r1, [pc, #368] @ (800379c ) - 800362c: 428b cmp r3, r1 - 800362e: d819 bhi.n 8003664 - 8003630: 68fb ldr r3, [r7, #12] - 8003632: 1e59 subs r1, r3, #1 - 8003634: 687b ldr r3, [r7, #4] - 8003636: 685b ldr r3, [r3, #4] - 8003638: 005b lsls r3, r3, #1 - 800363a: fbb1 f3f3 udiv r3, r1, r3 - 800363e: 1c59 adds r1, r3, #1 - 8003640: f640 73fc movw r3, #4092 @ 0xffc - 8003644: 400b ands r3, r1 - 8003646: 2b00 cmp r3, #0 - 8003648: d00a beq.n 8003660 - 800364a: 68fb ldr r3, [r7, #12] - 800364c: 1e59 subs r1, r3, #1 - 800364e: 687b ldr r3, [r7, #4] - 8003650: 685b ldr r3, [r3, #4] - 8003652: 005b lsls r3, r3, #1 - 8003654: fbb1 f3f3 udiv r3, r1, r3 - 8003658: 3301 adds r3, #1 - 800365a: f3c3 030b ubfx r3, r3, #0, #12 - 800365e: e051 b.n 8003704 - 8003660: 2304 movs r3, #4 - 8003662: e04f b.n 8003704 - 8003664: 687b ldr r3, [r7, #4] - 8003666: 689b ldr r3, [r3, #8] - 8003668: 2b00 cmp r3, #0 - 800366a: d111 bne.n 8003690 - 800366c: 68fb ldr r3, [r7, #12] - 800366e: 1e58 subs r0, r3, #1 - 8003670: 687b ldr r3, [r7, #4] - 8003672: 6859 ldr r1, [r3, #4] - 8003674: 460b mov r3, r1 - 8003676: 005b lsls r3, r3, #1 - 8003678: 440b add r3, r1 - 800367a: fbb0 f3f3 udiv r3, r0, r3 - 800367e: 3301 adds r3, #1 - 8003680: f3c3 030b ubfx r3, r3, #0, #12 - 8003684: 2b00 cmp r3, #0 - 8003686: bf0c ite eq - 8003688: 2301 moveq r3, #1 - 800368a: 2300 movne r3, #0 - 800368c: b2db uxtb r3, r3 - 800368e: e012 b.n 80036b6 - 8003690: 68fb ldr r3, [r7, #12] - 8003692: 1e58 subs r0, r3, #1 - 8003694: 687b ldr r3, [r7, #4] - 8003696: 6859 ldr r1, [r3, #4] - 8003698: 460b mov r3, r1 - 800369a: 009b lsls r3, r3, #2 - 800369c: 440b add r3, r1 - 800369e: 0099 lsls r1, r3, #2 - 80036a0: 440b add r3, r1 - 80036a2: fbb0 f3f3 udiv r3, r0, r3 - 80036a6: 3301 adds r3, #1 - 80036a8: f3c3 030b ubfx r3, r3, #0, #12 - 80036ac: 2b00 cmp r3, #0 - 80036ae: bf0c ite eq - 80036b0: 2301 moveq r3, #1 - 80036b2: 2300 movne r3, #0 - 80036b4: b2db uxtb r3, r3 - 80036b6: 2b00 cmp r3, #0 - 80036b8: d001 beq.n 80036be - 80036ba: 2301 movs r3, #1 - 80036bc: e022 b.n 8003704 - 80036be: 687b ldr r3, [r7, #4] - 80036c0: 689b ldr r3, [r3, #8] - 80036c2: 2b00 cmp r3, #0 - 80036c4: d10e bne.n 80036e4 - 80036c6: 68fb ldr r3, [r7, #12] - 80036c8: 1e58 subs r0, r3, #1 - 80036ca: 687b ldr r3, [r7, #4] - 80036cc: 6859 ldr r1, [r3, #4] - 80036ce: 460b mov r3, r1 - 80036d0: 005b lsls r3, r3, #1 - 80036d2: 440b add r3, r1 - 80036d4: fbb0 f3f3 udiv r3, r0, r3 - 80036d8: 3301 adds r3, #1 - 80036da: f3c3 030b ubfx r3, r3, #0, #12 - 80036de: f443 4300 orr.w r3, r3, #32768 @ 0x8000 - 80036e2: e00f b.n 8003704 - 80036e4: 68fb ldr r3, [r7, #12] - 80036e6: 1e58 subs r0, r3, #1 - 80036e8: 687b ldr r3, [r7, #4] - 80036ea: 6859 ldr r1, [r3, #4] - 80036ec: 460b mov r3, r1 - 80036ee: 009b lsls r3, r3, #2 - 80036f0: 440b add r3, r1 - 80036f2: 0099 lsls r1, r3, #2 - 80036f4: 440b add r3, r1 - 80036f6: fbb0 f3f3 udiv r3, r0, r3 - 80036fa: 3301 adds r3, #1 - 80036fc: f3c3 030b ubfx r3, r3, #0, #12 - 8003700: f443 4340 orr.w r3, r3, #49152 @ 0xc000 - 8003704: 6879 ldr r1, [r7, #4] - 8003706: 6809 ldr r1, [r1, #0] - 8003708: 4313 orrs r3, r2 - 800370a: 61cb str r3, [r1, #28] + 8003f08: 687b ldr r3, [r7, #4] + 8003f0a: 681b ldr r3, [r3, #0] + 8003f0c: 69db ldr r3, [r3, #28] + 8003f0e: f423 424f bic.w r2, r3, #52992 @ 0xcf00 + 8003f12: f022 02ff bic.w r2, r2, #255 @ 0xff + 8003f16: 687b ldr r3, [r7, #4] + 8003f18: 685b ldr r3, [r3, #4] + 8003f1a: 495c ldr r1, [pc, #368] @ (800408c ) + 8003f1c: 428b cmp r3, r1 + 8003f1e: d819 bhi.n 8003f54 + 8003f20: 68fb ldr r3, [r7, #12] + 8003f22: 1e59 subs r1, r3, #1 + 8003f24: 687b ldr r3, [r7, #4] + 8003f26: 685b ldr r3, [r3, #4] + 8003f28: 005b lsls r3, r3, #1 + 8003f2a: fbb1 f3f3 udiv r3, r1, r3 + 8003f2e: 1c59 adds r1, r3, #1 + 8003f30: f640 73fc movw r3, #4092 @ 0xffc + 8003f34: 400b ands r3, r1 + 8003f36: 2b00 cmp r3, #0 + 8003f38: d00a beq.n 8003f50 + 8003f3a: 68fb ldr r3, [r7, #12] + 8003f3c: 1e59 subs r1, r3, #1 + 8003f3e: 687b ldr r3, [r7, #4] + 8003f40: 685b ldr r3, [r3, #4] + 8003f42: 005b lsls r3, r3, #1 + 8003f44: fbb1 f3f3 udiv r3, r1, r3 + 8003f48: 3301 adds r3, #1 + 8003f4a: f3c3 030b ubfx r3, r3, #0, #12 + 8003f4e: e051 b.n 8003ff4 + 8003f50: 2304 movs r3, #4 + 8003f52: e04f b.n 8003ff4 + 8003f54: 687b ldr r3, [r7, #4] + 8003f56: 689b ldr r3, [r3, #8] + 8003f58: 2b00 cmp r3, #0 + 8003f5a: d111 bne.n 8003f80 + 8003f5c: 68fb ldr r3, [r7, #12] + 8003f5e: 1e58 subs r0, r3, #1 + 8003f60: 687b ldr r3, [r7, #4] + 8003f62: 6859 ldr r1, [r3, #4] + 8003f64: 460b mov r3, r1 + 8003f66: 005b lsls r3, r3, #1 + 8003f68: 440b add r3, r1 + 8003f6a: fbb0 f3f3 udiv r3, r0, r3 + 8003f6e: 3301 adds r3, #1 + 8003f70: f3c3 030b ubfx r3, r3, #0, #12 + 8003f74: 2b00 cmp r3, #0 + 8003f76: bf0c ite eq + 8003f78: 2301 moveq r3, #1 + 8003f7a: 2300 movne r3, #0 + 8003f7c: b2db uxtb r3, r3 + 8003f7e: e012 b.n 8003fa6 + 8003f80: 68fb ldr r3, [r7, #12] + 8003f82: 1e58 subs r0, r3, #1 + 8003f84: 687b ldr r3, [r7, #4] + 8003f86: 6859 ldr r1, [r3, #4] + 8003f88: 460b mov r3, r1 + 8003f8a: 009b lsls r3, r3, #2 + 8003f8c: 440b add r3, r1 + 8003f8e: 0099 lsls r1, r3, #2 + 8003f90: 440b add r3, r1 + 8003f92: fbb0 f3f3 udiv r3, r0, r3 + 8003f96: 3301 adds r3, #1 + 8003f98: f3c3 030b ubfx r3, r3, #0, #12 + 8003f9c: 2b00 cmp r3, #0 + 8003f9e: bf0c ite eq + 8003fa0: 2301 moveq r3, #1 + 8003fa2: 2300 movne r3, #0 + 8003fa4: b2db uxtb r3, r3 + 8003fa6: 2b00 cmp r3, #0 + 8003fa8: d001 beq.n 8003fae + 8003faa: 2301 movs r3, #1 + 8003fac: e022 b.n 8003ff4 + 8003fae: 687b ldr r3, [r7, #4] + 8003fb0: 689b ldr r3, [r3, #8] + 8003fb2: 2b00 cmp r3, #0 + 8003fb4: d10e bne.n 8003fd4 + 8003fb6: 68fb ldr r3, [r7, #12] + 8003fb8: 1e58 subs r0, r3, #1 + 8003fba: 687b ldr r3, [r7, #4] + 8003fbc: 6859 ldr r1, [r3, #4] + 8003fbe: 460b mov r3, r1 + 8003fc0: 005b lsls r3, r3, #1 + 8003fc2: 440b add r3, r1 + 8003fc4: fbb0 f3f3 udiv r3, r0, r3 + 8003fc8: 3301 adds r3, #1 + 8003fca: f3c3 030b ubfx r3, r3, #0, #12 + 8003fce: f443 4300 orr.w r3, r3, #32768 @ 0x8000 + 8003fd2: e00f b.n 8003ff4 + 8003fd4: 68fb ldr r3, [r7, #12] + 8003fd6: 1e58 subs r0, r3, #1 + 8003fd8: 687b ldr r3, [r7, #4] + 8003fda: 6859 ldr r1, [r3, #4] + 8003fdc: 460b mov r3, r1 + 8003fde: 009b lsls r3, r3, #2 + 8003fe0: 440b add r3, r1 + 8003fe2: 0099 lsls r1, r3, #2 + 8003fe4: 440b add r3, r1 + 8003fe6: fbb0 f3f3 udiv r3, r0, r3 + 8003fea: 3301 adds r3, #1 + 8003fec: f3c3 030b ubfx r3, r3, #0, #12 + 8003ff0: f443 4340 orr.w r3, r3, #49152 @ 0xc000 + 8003ff4: 6879 ldr r1, [r7, #4] + 8003ff6: 6809 ldr r1, [r1, #0] + 8003ff8: 4313 orrs r3, r2 + 8003ffa: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); - 800370c: 687b ldr r3, [r7, #4] - 800370e: 681b ldr r3, [r3, #0] - 8003710: 681b ldr r3, [r3, #0] - 8003712: f023 01c0 bic.w r1, r3, #192 @ 0xc0 - 8003716: 687b ldr r3, [r7, #4] - 8003718: 69da ldr r2, [r3, #28] - 800371a: 687b ldr r3, [r7, #4] - 800371c: 6a1b ldr r3, [r3, #32] - 800371e: 431a orrs r2, r3 - 8003720: 687b ldr r3, [r7, #4] - 8003722: 681b ldr r3, [r3, #0] - 8003724: 430a orrs r2, r1 - 8003726: 601a str r2, [r3, #0] + 8003ffc: 687b ldr r3, [r7, #4] + 8003ffe: 681b ldr r3, [r3, #0] + 8004000: 681b ldr r3, [r3, #0] + 8004002: f023 01c0 bic.w r1, r3, #192 @ 0xc0 + 8004006: 687b ldr r3, [r7, #4] + 8004008: 69da ldr r2, [r3, #28] + 800400a: 687b ldr r3, [r7, #4] + 800400c: 6a1b ldr r3, [r3, #32] + 800400e: 431a orrs r2, r3 + 8004010: 687b ldr r3, [r7, #4] + 8004012: 681b ldr r3, [r3, #0] + 8004014: 430a orrs r2, r1 + 8004016: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); - 8003728: 687b ldr r3, [r7, #4] - 800372a: 681b ldr r3, [r3, #0] - 800372c: 689b ldr r3, [r3, #8] - 800372e: f423 4303 bic.w r3, r3, #33536 @ 0x8300 - 8003732: f023 03ff bic.w r3, r3, #255 @ 0xff - 8003736: 687a ldr r2, [r7, #4] - 8003738: 6911 ldr r1, [r2, #16] - 800373a: 687a ldr r2, [r7, #4] - 800373c: 68d2 ldr r2, [r2, #12] - 800373e: 4311 orrs r1, r2 - 8003740: 687a ldr r2, [r7, #4] - 8003742: 6812 ldr r2, [r2, #0] - 8003744: 430b orrs r3, r1 - 8003746: 6093 str r3, [r2, #8] + 8004018: 687b ldr r3, [r7, #4] + 800401a: 681b ldr r3, [r3, #0] + 800401c: 689b ldr r3, [r3, #8] + 800401e: f423 4303 bic.w r3, r3, #33536 @ 0x8300 + 8004022: f023 03ff bic.w r3, r3, #255 @ 0xff + 8004026: 687a ldr r2, [r7, #4] + 8004028: 6911 ldr r1, [r2, #16] + 800402a: 687a ldr r2, [r7, #4] + 800402c: 68d2 ldr r2, [r2, #12] + 800402e: 4311 orrs r1, r2 + 8004030: 687a ldr r2, [r7, #4] + 8004032: 6812 ldr r2, [r2, #0] + 8004034: 430b orrs r3, r1 + 8004036: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); - 8003748: 687b ldr r3, [r7, #4] - 800374a: 681b ldr r3, [r3, #0] - 800374c: 68db ldr r3, [r3, #12] - 800374e: f023 01ff bic.w r1, r3, #255 @ 0xff - 8003752: 687b ldr r3, [r7, #4] - 8003754: 695a ldr r2, [r3, #20] - 8003756: 687b ldr r3, [r7, #4] - 8003758: 699b ldr r3, [r3, #24] - 800375a: 431a orrs r2, r3 - 800375c: 687b ldr r3, [r7, #4] - 800375e: 681b ldr r3, [r3, #0] - 8003760: 430a orrs r2, r1 - 8003762: 60da str r2, [r3, #12] + 8004038: 687b ldr r3, [r7, #4] + 800403a: 681b ldr r3, [r3, #0] + 800403c: 68db ldr r3, [r3, #12] + 800403e: f023 01ff bic.w r1, r3, #255 @ 0xff + 8004042: 687b ldr r3, [r7, #4] + 8004044: 695a ldr r2, [r3, #20] + 8004046: 687b ldr r3, [r7, #4] + 8004048: 699b ldr r3, [r3, #24] + 800404a: 431a orrs r2, r3 + 800404c: 687b ldr r3, [r7, #4] + 800404e: 681b ldr r3, [r3, #0] + 8004050: 430a orrs r2, r1 + 8004052: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 8003764: 687b ldr r3, [r7, #4] - 8003766: 681b ldr r3, [r3, #0] - 8003768: 681a ldr r2, [r3, #0] - 800376a: 687b ldr r3, [r7, #4] - 800376c: 681b ldr r3, [r3, #0] - 800376e: f042 0201 orr.w r2, r2, #1 - 8003772: 601a str r2, [r3, #0] + 8004054: 687b ldr r3, [r7, #4] + 8004056: 681b ldr r3, [r3, #0] + 8004058: 681a ldr r2, [r3, #0] + 800405a: 687b ldr r3, [r7, #4] + 800405c: 681b ldr r3, [r3, #0] + 800405e: f042 0201 orr.w r2, r2, #1 + 8004062: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 8003774: 687b ldr r3, [r7, #4] - 8003776: 2200 movs r2, #0 - 8003778: 641a str r2, [r3, #64] @ 0x40 + 8004064: 687b ldr r3, [r7, #4] + 8004066: 2200 movs r2, #0 + 8004068: 641a str r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_READY; - 800377a: 687b ldr r3, [r7, #4] - 800377c: 2220 movs r2, #32 - 800377e: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800406a: 687b ldr r3, [r7, #4] + 800406c: 2220 movs r2, #32 + 800406e: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->PreviousState = I2C_STATE_NONE; - 8003782: 687b ldr r3, [r7, #4] - 8003784: 2200 movs r2, #0 - 8003786: 631a str r2, [r3, #48] @ 0x30 + 8004072: 687b ldr r3, [r7, #4] + 8004074: 2200 movs r2, #0 + 8004076: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; - 8003788: 687b ldr r3, [r7, #4] - 800378a: 2200 movs r2, #0 - 800378c: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004078: 687b ldr r3, [r7, #4] + 800407a: 2200 movs r2, #0 + 800407c: f883 203e strb.w r2, [r3, #62] @ 0x3e return HAL_OK; - 8003790: 2300 movs r3, #0 + 8004080: 2300 movs r3, #0 } - 8003792: 4618 mov r0, r3 - 8003794: 3710 adds r7, #16 - 8003796: 46bd mov sp, r7 - 8003798: bd80 pop {r7, pc} - 800379a: bf00 nop - 800379c: 000186a0 .word 0x000186a0 - 80037a0: 001e847f .word 0x001e847f - 80037a4: 003d08ff .word 0x003d08ff - 80037a8: 431bde83 .word 0x431bde83 - 80037ac: 10624dd3 .word 0x10624dd3 + 8004082: 4618 mov r0, r3 + 8004084: 3710 adds r7, #16 + 8004086: 46bd mov sp, r7 + 8004088: bd80 pop {r7, pc} + 800408a: bf00 nop + 800408c: 000186a0 .word 0x000186a0 + 8004090: 001e847f .word 0x001e847f + 8004094: 003d08ff .word 0x003d08ff + 8004098: 431bde83 .word 0x431bde83 + 800409c: 10624dd3 .word 0x10624dd3 -080037b0 : +080040a0 : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 80037b0: b580 push {r7, lr} - 80037b2: b088 sub sp, #32 - 80037b4: af02 add r7, sp, #8 - 80037b6: 60f8 str r0, [r7, #12] - 80037b8: 607a str r2, [r7, #4] - 80037ba: 461a mov r2, r3 - 80037bc: 460b mov r3, r1 - 80037be: 817b strh r3, [r7, #10] - 80037c0: 4613 mov r3, r2 - 80037c2: 813b strh r3, [r7, #8] + 80040a0: b580 push {r7, lr} + 80040a2: b088 sub sp, #32 + 80040a4: af02 add r7, sp, #8 + 80040a6: 60f8 str r0, [r7, #12] + 80040a8: 607a str r2, [r7, #4] + 80040aa: 461a mov r2, r3 + 80040ac: 460b mov r3, r1 + 80040ae: 817b strh r3, [r7, #10] + 80040b0: 4613 mov r3, r2 + 80040b2: 813b strh r3, [r7, #8] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); - 80037c4: f7ff f8e4 bl 8002990 - 80037c8: 6178 str r0, [r7, #20] + 80040b4: f7ff f8e4 bl 8003280 + 80040b8: 6178 str r0, [r7, #20] if (hi2c->State == HAL_I2C_STATE_READY) - 80037ca: 68fb ldr r3, [r7, #12] - 80037cc: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 80037d0: b2db uxtb r3, r3 - 80037d2: 2b20 cmp r3, #32 - 80037d4: f040 80e0 bne.w 8003998 + 80040ba: 68fb ldr r3, [r7, #12] + 80040bc: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 80040c0: b2db uxtb r3, r3 + 80040c2: 2b20 cmp r3, #32 + 80040c4: f040 80e0 bne.w 8004288 { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) - 80037d8: 697b ldr r3, [r7, #20] - 80037da: 9300 str r3, [sp, #0] - 80037dc: 2319 movs r3, #25 - 80037de: 2201 movs r2, #1 - 80037e0: 4970 ldr r1, [pc, #448] @ (80039a4 ) - 80037e2: 68f8 ldr r0, [r7, #12] - 80037e4: f000 fc9e bl 8004124 - 80037e8: 4603 mov r3, r0 - 80037ea: 2b00 cmp r3, #0 - 80037ec: d001 beq.n 80037f2 + 80040c8: 697b ldr r3, [r7, #20] + 80040ca: 9300 str r3, [sp, #0] + 80040cc: 2319 movs r3, #25 + 80040ce: 2201 movs r2, #1 + 80040d0: 4970 ldr r1, [pc, #448] @ (8004294 ) + 80040d2: 68f8 ldr r0, [r7, #12] + 80040d4: f000 fc9e bl 8004a14 + 80040d8: 4603 mov r3, r0 + 80040da: 2b00 cmp r3, #0 + 80040dc: d001 beq.n 80040e2 { return HAL_BUSY; - 80037ee: 2302 movs r3, #2 - 80037f0: e0d3 b.n 800399a + 80040de: 2302 movs r3, #2 + 80040e0: e0d3 b.n 800428a } /* Process Locked */ __HAL_LOCK(hi2c); - 80037f2: 68fb ldr r3, [r7, #12] - 80037f4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 80037f8: 2b01 cmp r3, #1 - 80037fa: d101 bne.n 8003800 - 80037fc: 2302 movs r3, #2 - 80037fe: e0cc b.n 800399a - 8003800: 68fb ldr r3, [r7, #12] - 8003802: 2201 movs r2, #1 - 8003804: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80040e2: 68fb ldr r3, [r7, #12] + 80040e4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 80040e8: 2b01 cmp r3, #1 + 80040ea: d101 bne.n 80040f0 + 80040ec: 2302 movs r3, #2 + 80040ee: e0cc b.n 800428a + 80040f0: 68fb ldr r3, [r7, #12] + 80040f2: 2201 movs r2, #1 + 80040f4: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) - 8003808: 68fb ldr r3, [r7, #12] - 800380a: 681b ldr r3, [r3, #0] - 800380c: 681b ldr r3, [r3, #0] - 800380e: f003 0301 and.w r3, r3, #1 - 8003812: 2b01 cmp r3, #1 - 8003814: d007 beq.n 8003826 + 80040f8: 68fb ldr r3, [r7, #12] + 80040fa: 681b ldr r3, [r3, #0] + 80040fc: 681b ldr r3, [r3, #0] + 80040fe: f003 0301 and.w r3, r3, #1 + 8004102: 2b01 cmp r3, #1 + 8004104: d007 beq.n 8004116 { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 8003816: 68fb ldr r3, [r7, #12] - 8003818: 681b ldr r3, [r3, #0] - 800381a: 681a ldr r2, [r3, #0] - 800381c: 68fb ldr r3, [r7, #12] - 800381e: 681b ldr r3, [r3, #0] - 8003820: f042 0201 orr.w r2, r2, #1 - 8003824: 601a str r2, [r3, #0] + 8004106: 68fb ldr r3, [r7, #12] + 8004108: 681b ldr r3, [r3, #0] + 800410a: 681a ldr r2, [r3, #0] + 800410c: 68fb ldr r3, [r7, #12] + 800410e: 681b ldr r3, [r3, #0] + 8004110: f042 0201 orr.w r2, r2, #1 + 8004114: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 8003826: 68fb ldr r3, [r7, #12] - 8003828: 681b ldr r3, [r3, #0] - 800382a: 681a ldr r2, [r3, #0] - 800382c: 68fb ldr r3, [r7, #12] - 800382e: 681b ldr r3, [r3, #0] - 8003830: f422 6200 bic.w r2, r2, #2048 @ 0x800 - 8003834: 601a str r2, [r3, #0] + 8004116: 68fb ldr r3, [r7, #12] + 8004118: 681b ldr r3, [r3, #0] + 800411a: 681a ldr r2, [r3, #0] + 800411c: 68fb ldr r3, [r7, #12] + 800411e: 681b ldr r3, [r3, #0] + 8004120: f422 6200 bic.w r2, r2, #2048 @ 0x800 + 8004124: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_TX; - 8003836: 68fb ldr r3, [r7, #12] - 8003838: 2221 movs r2, #33 @ 0x21 - 800383a: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004126: 68fb ldr r3, [r7, #12] + 8004128: 2221 movs r2, #33 @ 0x21 + 800412a: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_MASTER; - 800383e: 68fb ldr r3, [r7, #12] - 8003840: 2210 movs r2, #16 - 8003842: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800412e: 68fb ldr r3, [r7, #12] + 8004130: 2210 movs r2, #16 + 8004132: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 8003846: 68fb ldr r3, [r7, #12] - 8003848: 2200 movs r2, #0 - 800384a: 641a str r2, [r3, #64] @ 0x40 + 8004136: 68fb ldr r3, [r7, #12] + 8004138: 2200 movs r2, #0 + 800413a: 641a str r2, [r3, #64] @ 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; - 800384c: 68fb ldr r3, [r7, #12] - 800384e: 687a ldr r2, [r7, #4] - 8003850: 625a str r2, [r3, #36] @ 0x24 + 800413c: 68fb ldr r3, [r7, #12] + 800413e: 687a ldr r2, [r7, #4] + 8004140: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; - 8003852: 68fb ldr r3, [r7, #12] - 8003854: 893a ldrh r2, [r7, #8] - 8003856: 855a strh r2, [r3, #42] @ 0x2a + 8004142: 68fb ldr r3, [r7, #12] + 8004144: 893a ldrh r2, [r7, #8] + 8004146: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize = hi2c->XferCount; - 8003858: 68fb ldr r3, [r7, #12] - 800385a: 8d5b ldrh r3, [r3, #42] @ 0x2a - 800385c: b29a uxth r2, r3 - 800385e: 68fb ldr r3, [r7, #12] - 8003860: 851a strh r2, [r3, #40] @ 0x28 + 8004148: 68fb ldr r3, [r7, #12] + 800414a: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800414c: b29a uxth r2, r3 + 800414e: 68fb ldr r3, [r7, #12] + 8004150: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 8003862: 68fb ldr r3, [r7, #12] - 8003864: 4a50 ldr r2, [pc, #320] @ (80039a8 ) - 8003866: 62da str r2, [r3, #44] @ 0x2c + 8004152: 68fb ldr r3, [r7, #12] + 8004154: 4a50 ldr r2, [pc, #320] @ (8004298 ) + 8004156: 62da str r2, [r3, #44] @ 0x2c /* Send Slave Address */ if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) - 8003868: 8979 ldrh r1, [r7, #10] - 800386a: 697b ldr r3, [r7, #20] - 800386c: 6a3a ldr r2, [r7, #32] - 800386e: 68f8 ldr r0, [r7, #12] - 8003870: f000 fb08 bl 8003e84 - 8003874: 4603 mov r3, r0 - 8003876: 2b00 cmp r3, #0 - 8003878: d001 beq.n 800387e + 8004158: 8979 ldrh r1, [r7, #10] + 800415a: 697b ldr r3, [r7, #20] + 800415c: 6a3a ldr r2, [r7, #32] + 800415e: 68f8 ldr r0, [r7, #12] + 8004160: f000 fb08 bl 8004774 + 8004164: 4603 mov r3, r0 + 8004166: 2b00 cmp r3, #0 + 8004168: d001 beq.n 800416e { return HAL_ERROR; - 800387a: 2301 movs r3, #1 - 800387c: e08d b.n 800399a + 800416a: 2301 movs r3, #1 + 800416c: e08d b.n 800428a } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 800387e: 2300 movs r3, #0 - 8003880: 613b str r3, [r7, #16] - 8003882: 68fb ldr r3, [r7, #12] - 8003884: 681b ldr r3, [r3, #0] - 8003886: 695b ldr r3, [r3, #20] - 8003888: 613b str r3, [r7, #16] - 800388a: 68fb ldr r3, [r7, #12] - 800388c: 681b ldr r3, [r3, #0] - 800388e: 699b ldr r3, [r3, #24] - 8003890: 613b str r3, [r7, #16] - 8003892: 693b ldr r3, [r7, #16] + 800416e: 2300 movs r3, #0 + 8004170: 613b str r3, [r7, #16] + 8004172: 68fb ldr r3, [r7, #12] + 8004174: 681b ldr r3, [r3, #0] + 8004176: 695b ldr r3, [r3, #20] + 8004178: 613b str r3, [r7, #16] + 800417a: 68fb ldr r3, [r7, #12] + 800417c: 681b ldr r3, [r3, #0] + 800417e: 699b ldr r3, [r3, #24] + 8004180: 613b str r3, [r7, #16] + 8004182: 693b ldr r3, [r7, #16] while (hi2c->XferSize > 0U) - 8003894: e066 b.n 8003964 + 8004184: e066 b.n 8004254 { /* Wait until TXE flag is set */ if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8003896: 697a ldr r2, [r7, #20] - 8003898: 6a39 ldr r1, [r7, #32] - 800389a: 68f8 ldr r0, [r7, #12] - 800389c: f000 fd5c bl 8004358 - 80038a0: 4603 mov r3, r0 - 80038a2: 2b00 cmp r3, #0 - 80038a4: d00d beq.n 80038c2 + 8004186: 697a ldr r2, [r7, #20] + 8004188: 6a39 ldr r1, [r7, #32] + 800418a: 68f8 ldr r0, [r7, #12] + 800418c: f000 fd5c bl 8004c48 + 8004190: 4603 mov r3, r0 + 8004192: 2b00 cmp r3, #0 + 8004194: d00d beq.n 80041b2 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 80038a6: 68fb ldr r3, [r7, #12] - 80038a8: 6c1b ldr r3, [r3, #64] @ 0x40 - 80038aa: 2b04 cmp r3, #4 - 80038ac: d107 bne.n 80038be + 8004196: 68fb ldr r3, [r7, #12] + 8004198: 6c1b ldr r3, [r3, #64] @ 0x40 + 800419a: 2b04 cmp r3, #4 + 800419c: d107 bne.n 80041ae { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 80038ae: 68fb ldr r3, [r7, #12] - 80038b0: 681b ldr r3, [r3, #0] - 80038b2: 681a ldr r2, [r3, #0] - 80038b4: 68fb ldr r3, [r7, #12] - 80038b6: 681b ldr r3, [r3, #0] - 80038b8: f442 7200 orr.w r2, r2, #512 @ 0x200 - 80038bc: 601a str r2, [r3, #0] + 800419e: 68fb ldr r3, [r7, #12] + 80041a0: 681b ldr r3, [r3, #0] + 80041a2: 681a ldr r2, [r3, #0] + 80041a4: 68fb ldr r3, [r7, #12] + 80041a6: 681b ldr r3, [r3, #0] + 80041a8: f442 7200 orr.w r2, r2, #512 @ 0x200 + 80041ac: 601a str r2, [r3, #0] } return HAL_ERROR; - 80038be: 2301 movs r3, #1 - 80038c0: e06b b.n 800399a + 80041ae: 2301 movs r3, #1 + 80041b0: e06b b.n 800428a } /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; - 80038c2: 68fb ldr r3, [r7, #12] - 80038c4: 6a5b ldr r3, [r3, #36] @ 0x24 - 80038c6: 781a ldrb r2, [r3, #0] - 80038c8: 68fb ldr r3, [r7, #12] - 80038ca: 681b ldr r3, [r3, #0] - 80038cc: 611a str r2, [r3, #16] + 80041b2: 68fb ldr r3, [r7, #12] + 80041b4: 6a5b ldr r3, [r3, #36] @ 0x24 + 80041b6: 781a ldrb r2, [r3, #0] + 80041b8: 68fb ldr r3, [r7, #12] + 80041ba: 681b ldr r3, [r3, #0] + 80041bc: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 80038ce: 68fb ldr r3, [r7, #12] - 80038d0: 6a5b ldr r3, [r3, #36] @ 0x24 - 80038d2: 1c5a adds r2, r3, #1 - 80038d4: 68fb ldr r3, [r7, #12] - 80038d6: 625a str r2, [r3, #36] @ 0x24 + 80041be: 68fb ldr r3, [r7, #12] + 80041c0: 6a5b ldr r3, [r3, #36] @ 0x24 + 80041c2: 1c5a adds r2, r3, #1 + 80041c4: 68fb ldr r3, [r7, #12] + 80041c6: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; - 80038d8: 68fb ldr r3, [r7, #12] - 80038da: 8d5b ldrh r3, [r3, #42] @ 0x2a - 80038dc: b29b uxth r3, r3 - 80038de: 3b01 subs r3, #1 - 80038e0: b29a uxth r2, r3 - 80038e2: 68fb ldr r3, [r7, #12] - 80038e4: 855a strh r2, [r3, #42] @ 0x2a + 80041c8: 68fb ldr r3, [r7, #12] + 80041ca: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80041cc: b29b uxth r3, r3 + 80041ce: 3b01 subs r3, #1 + 80041d0: b29a uxth r2, r3 + 80041d2: 68fb ldr r3, [r7, #12] + 80041d4: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; - 80038e6: 68fb ldr r3, [r7, #12] - 80038e8: 8d1b ldrh r3, [r3, #40] @ 0x28 - 80038ea: 3b01 subs r3, #1 - 80038ec: b29a uxth r2, r3 - 80038ee: 68fb ldr r3, [r7, #12] - 80038f0: 851a strh r2, [r3, #40] @ 0x28 + 80041d6: 68fb ldr r3, [r7, #12] + 80041d8: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80041da: 3b01 subs r3, #1 + 80041dc: b29a uxth r2, r3 + 80041de: 68fb ldr r3, [r7, #12] + 80041e0: 851a strh r2, [r3, #40] @ 0x28 if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U)) - 80038f2: 68fb ldr r3, [r7, #12] - 80038f4: 681b ldr r3, [r3, #0] - 80038f6: 695b ldr r3, [r3, #20] - 80038f8: f003 0304 and.w r3, r3, #4 - 80038fc: 2b04 cmp r3, #4 - 80038fe: d11b bne.n 8003938 - 8003900: 68fb ldr r3, [r7, #12] - 8003902: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003904: 2b00 cmp r3, #0 - 8003906: d017 beq.n 8003938 + 80041e2: 68fb ldr r3, [r7, #12] + 80041e4: 681b ldr r3, [r3, #0] + 80041e6: 695b ldr r3, [r3, #20] + 80041e8: f003 0304 and.w r3, r3, #4 + 80041ec: 2b04 cmp r3, #4 + 80041ee: d11b bne.n 8004228 + 80041f0: 68fb ldr r3, [r7, #12] + 80041f2: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80041f4: 2b00 cmp r3, #0 + 80041f6: d017 beq.n 8004228 { /* Write data to DR */ hi2c->Instance->DR = *hi2c->pBuffPtr; - 8003908: 68fb ldr r3, [r7, #12] - 800390a: 6a5b ldr r3, [r3, #36] @ 0x24 - 800390c: 781a ldrb r2, [r3, #0] - 800390e: 68fb ldr r3, [r7, #12] - 8003910: 681b ldr r3, [r3, #0] - 8003912: 611a str r2, [r3, #16] + 80041f8: 68fb ldr r3, [r7, #12] + 80041fa: 6a5b ldr r3, [r3, #36] @ 0x24 + 80041fc: 781a ldrb r2, [r3, #0] + 80041fe: 68fb ldr r3, [r7, #12] + 8004200: 681b ldr r3, [r3, #0] + 8004202: 611a str r2, [r3, #16] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003914: 68fb ldr r3, [r7, #12] - 8003916: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003918: 1c5a adds r2, r3, #1 - 800391a: 68fb ldr r3, [r7, #12] - 800391c: 625a str r2, [r3, #36] @ 0x24 + 8004204: 68fb ldr r3, [r7, #12] + 8004206: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004208: 1c5a adds r2, r3, #1 + 800420a: 68fb ldr r3, [r7, #12] + 800420c: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferCount--; - 800391e: 68fb ldr r3, [r7, #12] - 8003920: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003922: b29b uxth r3, r3 - 8003924: 3b01 subs r3, #1 - 8003926: b29a uxth r2, r3 - 8003928: 68fb ldr r3, [r7, #12] - 800392a: 855a strh r2, [r3, #42] @ 0x2a + 800420e: 68fb ldr r3, [r7, #12] + 8004210: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004212: b29b uxth r3, r3 + 8004214: 3b01 subs r3, #1 + 8004216: b29a uxth r2, r3 + 8004218: 68fb ldr r3, [r7, #12] + 800421a: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize--; - 800392c: 68fb ldr r3, [r7, #12] - 800392e: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003930: 3b01 subs r3, #1 - 8003932: b29a uxth r2, r3 - 8003934: 68fb ldr r3, [r7, #12] - 8003936: 851a strh r2, [r3, #40] @ 0x28 + 800421c: 68fb ldr r3, [r7, #12] + 800421e: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004220: 3b01 subs r3, #1 + 8004222: b29a uxth r2, r3 + 8004224: 68fb ldr r3, [r7, #12] + 8004226: 851a strh r2, [r3, #40] @ 0x28 } /* Wait until BTF flag is set */ if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8003938: 697a ldr r2, [r7, #20] - 800393a: 6a39 ldr r1, [r7, #32] - 800393c: 68f8 ldr r0, [r7, #12] - 800393e: f000 fd53 bl 80043e8 - 8003942: 4603 mov r3, r0 - 8003944: 2b00 cmp r3, #0 - 8003946: d00d beq.n 8003964 + 8004228: 697a ldr r2, [r7, #20] + 800422a: 6a39 ldr r1, [r7, #32] + 800422c: 68f8 ldr r0, [r7, #12] + 800422e: f000 fd53 bl 8004cd8 + 8004232: 4603 mov r3, r0 + 8004234: 2b00 cmp r3, #0 + 8004236: d00d beq.n 8004254 { if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - 8003948: 68fb ldr r3, [r7, #12] - 800394a: 6c1b ldr r3, [r3, #64] @ 0x40 - 800394c: 2b04 cmp r3, #4 - 800394e: d107 bne.n 8003960 + 8004238: 68fb ldr r3, [r7, #12] + 800423a: 6c1b ldr r3, [r3, #64] @ 0x40 + 800423c: 2b04 cmp r3, #4 + 800423e: d107 bne.n 8004250 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003950: 68fb ldr r3, [r7, #12] - 8003952: 681b ldr r3, [r3, #0] - 8003954: 681a ldr r2, [r3, #0] - 8003956: 68fb ldr r3, [r7, #12] - 8003958: 681b ldr r3, [r3, #0] - 800395a: f442 7200 orr.w r2, r2, #512 @ 0x200 - 800395e: 601a str r2, [r3, #0] + 8004240: 68fb ldr r3, [r7, #12] + 8004242: 681b ldr r3, [r3, #0] + 8004244: 681a ldr r2, [r3, #0] + 8004246: 68fb ldr r3, [r7, #12] + 8004248: 681b ldr r3, [r3, #0] + 800424a: f442 7200 orr.w r2, r2, #512 @ 0x200 + 800424e: 601a str r2, [r3, #0] } return HAL_ERROR; - 8003960: 2301 movs r3, #1 - 8003962: e01a b.n 800399a + 8004250: 2301 movs r3, #1 + 8004252: e01a b.n 800428a while (hi2c->XferSize > 0U) - 8003964: 68fb ldr r3, [r7, #12] - 8003966: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003968: 2b00 cmp r3, #0 - 800396a: d194 bne.n 8003896 + 8004254: 68fb ldr r3, [r7, #12] + 8004256: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004258: 2b00 cmp r3, #0 + 800425a: d194 bne.n 8004186 } } /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 800396c: 68fb ldr r3, [r7, #12] - 800396e: 681b ldr r3, [r3, #0] - 8003970: 681a ldr r2, [r3, #0] - 8003972: 68fb ldr r3, [r7, #12] - 8003974: 681b ldr r3, [r3, #0] - 8003976: f442 7200 orr.w r2, r2, #512 @ 0x200 - 800397a: 601a str r2, [r3, #0] + 800425c: 68fb ldr r3, [r7, #12] + 800425e: 681b ldr r3, [r3, #0] + 8004260: 681a ldr r2, [r3, #0] + 8004262: 68fb ldr r3, [r7, #12] + 8004264: 681b ldr r3, [r3, #0] + 8004266: f442 7200 orr.w r2, r2, #512 @ 0x200 + 800426a: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; - 800397c: 68fb ldr r3, [r7, #12] - 800397e: 2220 movs r2, #32 - 8003980: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800426c: 68fb ldr r3, [r7, #12] + 800426e: 2220 movs r2, #32 + 8004270: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003984: 68fb ldr r3, [r7, #12] - 8003986: 2200 movs r2, #0 - 8003988: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004274: 68fb ldr r3, [r7, #12] + 8004276: 2200 movs r2, #0 + 8004278: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 800398c: 68fb ldr r3, [r7, #12] - 800398e: 2200 movs r2, #0 - 8003990: f883 203c strb.w r2, [r3, #60] @ 0x3c + 800427c: 68fb ldr r3, [r7, #12] + 800427e: 2200 movs r2, #0 + 8004280: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 8003994: 2300 movs r3, #0 - 8003996: e000 b.n 800399a + 8004284: 2300 movs r3, #0 + 8004286: e000 b.n 800428a } else { return HAL_BUSY; - 8003998: 2302 movs r3, #2 + 8004288: 2302 movs r3, #2 } } - 800399a: 4618 mov r0, r3 - 800399c: 3718 adds r7, #24 - 800399e: 46bd mov sp, r7 - 80039a0: bd80 pop {r7, pc} - 80039a2: bf00 nop - 80039a4: 00100002 .word 0x00100002 - 80039a8: ffff0000 .word 0xffff0000 + 800428a: 4618 mov r0, r3 + 800428c: 3718 adds r7, #24 + 800428e: 46bd mov sp, r7 + 8004290: bd80 pop {r7, pc} + 8004292: bf00 nop + 8004294: 00100002 .word 0x00100002 + 8004298: ffff0000 .word 0xffff0000 -080039ac : +0800429c : * @param Size Amount of data to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 80039ac: b580 push {r7, lr} - 80039ae: b08c sub sp, #48 @ 0x30 - 80039b0: af02 add r7, sp, #8 - 80039b2: 60f8 str r0, [r7, #12] - 80039b4: 607a str r2, [r7, #4] - 80039b6: 461a mov r2, r3 - 80039b8: 460b mov r3, r1 - 80039ba: 817b strh r3, [r7, #10] - 80039bc: 4613 mov r3, r2 - 80039be: 813b strh r3, [r7, #8] + 800429c: b580 push {r7, lr} + 800429e: b08c sub sp, #48 @ 0x30 + 80042a0: af02 add r7, sp, #8 + 80042a2: 60f8 str r0, [r7, #12] + 80042a4: 607a str r2, [r7, #4] + 80042a6: 461a mov r2, r3 + 80042a8: 460b mov r3, r1 + 80042aa: 817b strh r3, [r7, #10] + 80042ac: 4613 mov r3, r2 + 80042ae: 813b strh r3, [r7, #8] __IO uint32_t count = 0U; - 80039c0: 2300 movs r3, #0 - 80039c2: 623b str r3, [r7, #32] + 80042b0: 2300 movs r3, #0 + 80042b2: 623b str r3, [r7, #32] /* Init tickstart for timeout management*/ uint32_t tickstart = HAL_GetTick(); - 80039c4: f7fe ffe4 bl 8002990 - 80039c8: 6278 str r0, [r7, #36] @ 0x24 + 80042b4: f7fe ffe4 bl 8003280 + 80042b8: 6278 str r0, [r7, #36] @ 0x24 if (hi2c->State == HAL_I2C_STATE_READY) - 80039ca: 68fb ldr r3, [r7, #12] - 80039cc: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 80039d0: b2db uxtb r3, r3 - 80039d2: 2b20 cmp r3, #32 - 80039d4: f040 824b bne.w 8003e6e + 80042ba: 68fb ldr r3, [r7, #12] + 80042bc: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 80042c0: b2db uxtb r3, r3 + 80042c2: 2b20 cmp r3, #32 + 80042c4: f040 824b bne.w 800475e { /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK) - 80039d8: 6a7b ldr r3, [r7, #36] @ 0x24 - 80039da: 9300 str r3, [sp, #0] - 80039dc: 2319 movs r3, #25 - 80039de: 2201 movs r2, #1 - 80039e0: 497f ldr r1, [pc, #508] @ (8003be0 ) - 80039e2: 68f8 ldr r0, [r7, #12] - 80039e4: f000 fb9e bl 8004124 - 80039e8: 4603 mov r3, r0 - 80039ea: 2b00 cmp r3, #0 - 80039ec: d001 beq.n 80039f2 + 80042c8: 6a7b ldr r3, [r7, #36] @ 0x24 + 80042ca: 9300 str r3, [sp, #0] + 80042cc: 2319 movs r3, #25 + 80042ce: 2201 movs r2, #1 + 80042d0: 497f ldr r1, [pc, #508] @ (80044d0 ) + 80042d2: 68f8 ldr r0, [r7, #12] + 80042d4: f000 fb9e bl 8004a14 + 80042d8: 4603 mov r3, r0 + 80042da: 2b00 cmp r3, #0 + 80042dc: d001 beq.n 80042e2 { return HAL_BUSY; - 80039ee: 2302 movs r3, #2 - 80039f0: e23e b.n 8003e70 + 80042de: 2302 movs r3, #2 + 80042e0: e23e b.n 8004760 } /* Process Locked */ __HAL_LOCK(hi2c); - 80039f2: 68fb ldr r3, [r7, #12] - 80039f4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 80039f8: 2b01 cmp r3, #1 - 80039fa: d101 bne.n 8003a00 - 80039fc: 2302 movs r3, #2 - 80039fe: e237 b.n 8003e70 - 8003a00: 68fb ldr r3, [r7, #12] - 8003a02: 2201 movs r2, #1 - 8003a04: f883 203c strb.w r2, [r3, #60] @ 0x3c + 80042e2: 68fb ldr r3, [r7, #12] + 80042e4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 80042e8: 2b01 cmp r3, #1 + 80042ea: d101 bne.n 80042f0 + 80042ec: 2302 movs r3, #2 + 80042ee: e237 b.n 8004760 + 80042f0: 68fb ldr r3, [r7, #12] + 80042f2: 2201 movs r2, #1 + 80042f4: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Check if the I2C is already enabled */ if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE) - 8003a08: 68fb ldr r3, [r7, #12] - 8003a0a: 681b ldr r3, [r3, #0] - 8003a0c: 681b ldr r3, [r3, #0] - 8003a0e: f003 0301 and.w r3, r3, #1 - 8003a12: 2b01 cmp r3, #1 - 8003a14: d007 beq.n 8003a26 + 80042f8: 68fb ldr r3, [r7, #12] + 80042fa: 681b ldr r3, [r3, #0] + 80042fc: 681b ldr r3, [r3, #0] + 80042fe: f003 0301 and.w r3, r3, #1 + 8004302: 2b01 cmp r3, #1 + 8004304: d007 beq.n 8004316 { /* Enable I2C peripheral */ __HAL_I2C_ENABLE(hi2c); - 8003a16: 68fb ldr r3, [r7, #12] - 8003a18: 681b ldr r3, [r3, #0] - 8003a1a: 681a ldr r2, [r3, #0] - 8003a1c: 68fb ldr r3, [r7, #12] - 8003a1e: 681b ldr r3, [r3, #0] - 8003a20: f042 0201 orr.w r2, r2, #1 - 8003a24: 601a str r2, [r3, #0] + 8004306: 68fb ldr r3, [r7, #12] + 8004308: 681b ldr r3, [r3, #0] + 800430a: 681a ldr r2, [r3, #0] + 800430c: 68fb ldr r3, [r7, #12] + 800430e: 681b ldr r3, [r3, #0] + 8004310: f042 0201 orr.w r2, r2, #1 + 8004314: 601a str r2, [r3, #0] } /* Disable Pos */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 8003a26: 68fb ldr r3, [r7, #12] - 8003a28: 681b ldr r3, [r3, #0] - 8003a2a: 681a ldr r2, [r3, #0] - 8003a2c: 68fb ldr r3, [r7, #12] - 8003a2e: 681b ldr r3, [r3, #0] - 8003a30: f422 6200 bic.w r2, r2, #2048 @ 0x800 - 8003a34: 601a str r2, [r3, #0] + 8004316: 68fb ldr r3, [r7, #12] + 8004318: 681b ldr r3, [r3, #0] + 800431a: 681a ldr r2, [r3, #0] + 800431c: 68fb ldr r3, [r7, #12] + 800431e: 681b ldr r3, [r3, #0] + 8004320: f422 6200 bic.w r2, r2, #2048 @ 0x800 + 8004324: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_BUSY_RX; - 8003a36: 68fb ldr r3, [r7, #12] - 8003a38: 2222 movs r2, #34 @ 0x22 - 8003a3a: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004326: 68fb ldr r3, [r7, #12] + 8004328: 2222 movs r2, #34 @ 0x22 + 800432a: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_MASTER; - 8003a3e: 68fb ldr r3, [r7, #12] - 8003a40: 2210 movs r2, #16 - 8003a42: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800432e: 68fb ldr r3, [r7, #12] + 8004330: 2210 movs r2, #16 + 8004332: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - 8003a46: 68fb ldr r3, [r7, #12] - 8003a48: 2200 movs r2, #0 - 8003a4a: 641a str r2, [r3, #64] @ 0x40 + 8004336: 68fb ldr r3, [r7, #12] + 8004338: 2200 movs r2, #0 + 800433a: 641a str r2, [r3, #64] @ 0x40 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; - 8003a4c: 68fb ldr r3, [r7, #12] - 8003a4e: 687a ldr r2, [r7, #4] - 8003a50: 625a str r2, [r3, #36] @ 0x24 + 800433c: 68fb ldr r3, [r7, #12] + 800433e: 687a ldr r2, [r7, #4] + 8004340: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; - 8003a52: 68fb ldr r3, [r7, #12] - 8003a54: 893a ldrh r2, [r7, #8] - 8003a56: 855a strh r2, [r3, #42] @ 0x2a + 8004342: 68fb ldr r3, [r7, #12] + 8004344: 893a ldrh r2, [r7, #8] + 8004346: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferSize = hi2c->XferCount; - 8003a58: 68fb ldr r3, [r7, #12] - 8003a5a: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003a5c: b29a uxth r2, r3 - 8003a5e: 68fb ldr r3, [r7, #12] - 8003a60: 851a strh r2, [r3, #40] @ 0x28 + 8004348: 68fb ldr r3, [r7, #12] + 800434a: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800434c: b29a uxth r2, r3 + 800434e: 68fb ldr r3, [r7, #12] + 8004350: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferOptions = I2C_NO_OPTION_FRAME; - 8003a62: 68fb ldr r3, [r7, #12] - 8003a64: 4a5f ldr r2, [pc, #380] @ (8003be4 ) - 8003a66: 62da str r2, [r3, #44] @ 0x2c + 8004352: 68fb ldr r3, [r7, #12] + 8004354: 4a5f ldr r2, [pc, #380] @ (80044d4 ) + 8004356: 62da str r2, [r3, #44] @ 0x2c /* Send Slave Address */ if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK) - 8003a68: 8979 ldrh r1, [r7, #10] - 8003a6a: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003a6c: 6b3a ldr r2, [r7, #48] @ 0x30 - 8003a6e: 68f8 ldr r0, [r7, #12] - 8003a70: f000 fa8a bl 8003f88 - 8003a74: 4603 mov r3, r0 - 8003a76: 2b00 cmp r3, #0 - 8003a78: d001 beq.n 8003a7e + 8004358: 8979 ldrh r1, [r7, #10] + 800435a: 6a7b ldr r3, [r7, #36] @ 0x24 + 800435c: 6b3a ldr r2, [r7, #48] @ 0x30 + 800435e: 68f8 ldr r0, [r7, #12] + 8004360: f000 fa8a bl 8004878 + 8004364: 4603 mov r3, r0 + 8004366: 2b00 cmp r3, #0 + 8004368: d001 beq.n 800436e { return HAL_ERROR; - 8003a7a: 2301 movs r3, #1 - 8003a7c: e1f8 b.n 8003e70 + 800436a: 2301 movs r3, #1 + 800436c: e1f8 b.n 8004760 } if (hi2c->XferSize == 0U) - 8003a7e: 68fb ldr r3, [r7, #12] - 8003a80: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003a82: 2b00 cmp r3, #0 - 8003a84: d113 bne.n 8003aae + 800436e: 68fb ldr r3, [r7, #12] + 8004370: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004372: 2b00 cmp r3, #0 + 8004374: d113 bne.n 800439e { /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8003a86: 2300 movs r3, #0 - 8003a88: 61fb str r3, [r7, #28] - 8003a8a: 68fb ldr r3, [r7, #12] - 8003a8c: 681b ldr r3, [r3, #0] - 8003a8e: 695b ldr r3, [r3, #20] - 8003a90: 61fb str r3, [r7, #28] - 8003a92: 68fb ldr r3, [r7, #12] - 8003a94: 681b ldr r3, [r3, #0] - 8003a96: 699b ldr r3, [r3, #24] - 8003a98: 61fb str r3, [r7, #28] - 8003a9a: 69fb ldr r3, [r7, #28] + 8004376: 2300 movs r3, #0 + 8004378: 61fb str r3, [r7, #28] + 800437a: 68fb ldr r3, [r7, #12] + 800437c: 681b ldr r3, [r3, #0] + 800437e: 695b ldr r3, [r3, #20] + 8004380: 61fb str r3, [r7, #28] + 8004382: 68fb ldr r3, [r7, #12] + 8004384: 681b ldr r3, [r3, #0] + 8004386: 699b ldr r3, [r3, #24] + 8004388: 61fb str r3, [r7, #28] + 800438a: 69fb ldr r3, [r7, #28] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003a9c: 68fb ldr r3, [r7, #12] - 8003a9e: 681b ldr r3, [r3, #0] - 8003aa0: 681a ldr r2, [r3, #0] - 8003aa2: 68fb ldr r3, [r7, #12] - 8003aa4: 681b ldr r3, [r3, #0] - 8003aa6: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8003aaa: 601a str r2, [r3, #0] - 8003aac: e1cc b.n 8003e48 + 800438c: 68fb ldr r3, [r7, #12] + 800438e: 681b ldr r3, [r3, #0] + 8004390: 681a ldr r2, [r3, #0] + 8004392: 68fb ldr r3, [r7, #12] + 8004394: 681b ldr r3, [r3, #0] + 8004396: f442 7200 orr.w r2, r2, #512 @ 0x200 + 800439a: 601a str r2, [r3, #0] + 800439c: e1cc b.n 8004738 } else if (hi2c->XferSize == 1U) - 8003aae: 68fb ldr r3, [r7, #12] - 8003ab0: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003ab2: 2b01 cmp r3, #1 - 8003ab4: d11e bne.n 8003af4 + 800439e: 68fb ldr r3, [r7, #12] + 80043a0: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80043a2: 2b01 cmp r3, #1 + 80043a4: d11e bne.n 80043e4 { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003ab6: 68fb ldr r3, [r7, #12] - 8003ab8: 681b ldr r3, [r3, #0] - 8003aba: 681a ldr r2, [r3, #0] - 8003abc: 68fb ldr r3, [r7, #12] - 8003abe: 681b ldr r3, [r3, #0] - 8003ac0: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 8003ac4: 601a str r2, [r3, #0] + 80043a6: 68fb ldr r3, [r7, #12] + 80043a8: 681b ldr r3, [r3, #0] + 80043aa: 681a ldr r2, [r3, #0] + 80043ac: 68fb ldr r3, [r7, #12] + 80043ae: 681b ldr r3, [r3, #0] + 80043b0: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 80043b4: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 8003ac6: b672 cpsid i + 80043b6: b672 cpsid i } - 8003ac8: bf00 nop + 80043b8: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8003aca: 2300 movs r3, #0 - 8003acc: 61bb str r3, [r7, #24] - 8003ace: 68fb ldr r3, [r7, #12] - 8003ad0: 681b ldr r3, [r3, #0] - 8003ad2: 695b ldr r3, [r3, #20] - 8003ad4: 61bb str r3, [r7, #24] - 8003ad6: 68fb ldr r3, [r7, #12] - 8003ad8: 681b ldr r3, [r3, #0] - 8003ada: 699b ldr r3, [r3, #24] - 8003adc: 61bb str r3, [r7, #24] - 8003ade: 69bb ldr r3, [r7, #24] + 80043ba: 2300 movs r3, #0 + 80043bc: 61bb str r3, [r7, #24] + 80043be: 68fb ldr r3, [r7, #12] + 80043c0: 681b ldr r3, [r3, #0] + 80043c2: 695b ldr r3, [r3, #20] + 80043c4: 61bb str r3, [r7, #24] + 80043c6: 68fb ldr r3, [r7, #12] + 80043c8: 681b ldr r3, [r3, #0] + 80043ca: 699b ldr r3, [r3, #24] + 80043cc: 61bb str r3, [r7, #24] + 80043ce: 69bb ldr r3, [r7, #24] /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003ae0: 68fb ldr r3, [r7, #12] - 8003ae2: 681b ldr r3, [r3, #0] - 8003ae4: 681a ldr r2, [r3, #0] - 8003ae6: 68fb ldr r3, [r7, #12] - 8003ae8: 681b ldr r3, [r3, #0] - 8003aea: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8003aee: 601a str r2, [r3, #0] + 80043d0: 68fb ldr r3, [r7, #12] + 80043d2: 681b ldr r3, [r3, #0] + 80043d4: 681a ldr r2, [r3, #0] + 80043d6: 68fb ldr r3, [r7, #12] + 80043d8: 681b ldr r3, [r3, #0] + 80043da: f442 7200 orr.w r2, r2, #512 @ 0x200 + 80043de: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); - 8003af0: b662 cpsie i + 80043e0: b662 cpsie i } - 8003af2: e035 b.n 8003b60 + 80043e2: e035 b.n 8004450 /* Re-enable IRQs */ __enable_irq(); } else if (hi2c->XferSize == 2U) - 8003af4: 68fb ldr r3, [r7, #12] - 8003af6: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003af8: 2b02 cmp r3, #2 - 8003afa: d11e bne.n 8003b3a + 80043e4: 68fb ldr r3, [r7, #12] + 80043e6: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80043e8: 2b02 cmp r3, #2 + 80043ea: d11e bne.n 800442a { /* Enable Pos */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); - 8003afc: 68fb ldr r3, [r7, #12] - 8003afe: 681b ldr r3, [r3, #0] - 8003b00: 681a ldr r2, [r3, #0] - 8003b02: 68fb ldr r3, [r7, #12] - 8003b04: 681b ldr r3, [r3, #0] - 8003b06: f442 6200 orr.w r2, r2, #2048 @ 0x800 - 8003b0a: 601a str r2, [r3, #0] + 80043ec: 68fb ldr r3, [r7, #12] + 80043ee: 681b ldr r3, [r3, #0] + 80043f0: 681a ldr r2, [r3, #0] + 80043f2: 68fb ldr r3, [r7, #12] + 80043f4: 681b ldr r3, [r3, #0] + 80043f6: f442 6200 orr.w r2, r2, #2048 @ 0x800 + 80043fa: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 8003b0c: b672 cpsid i + 80043fc: b672 cpsid i } - 8003b0e: bf00 nop + 80043fe: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8003b10: 2300 movs r3, #0 - 8003b12: 617b str r3, [r7, #20] - 8003b14: 68fb ldr r3, [r7, #12] - 8003b16: 681b ldr r3, [r3, #0] - 8003b18: 695b ldr r3, [r3, #20] - 8003b1a: 617b str r3, [r7, #20] - 8003b1c: 68fb ldr r3, [r7, #12] - 8003b1e: 681b ldr r3, [r3, #0] - 8003b20: 699b ldr r3, [r3, #24] - 8003b22: 617b str r3, [r7, #20] - 8003b24: 697b ldr r3, [r7, #20] + 8004400: 2300 movs r3, #0 + 8004402: 617b str r3, [r7, #20] + 8004404: 68fb ldr r3, [r7, #12] + 8004406: 681b ldr r3, [r3, #0] + 8004408: 695b ldr r3, [r3, #20] + 800440a: 617b str r3, [r7, #20] + 800440c: 68fb ldr r3, [r7, #12] + 800440e: 681b ldr r3, [r3, #0] + 8004410: 699b ldr r3, [r3, #24] + 8004412: 617b str r3, [r7, #20] + 8004414: 697b ldr r3, [r7, #20] /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003b26: 68fb ldr r3, [r7, #12] - 8003b28: 681b ldr r3, [r3, #0] - 8003b2a: 681a ldr r2, [r3, #0] - 8003b2c: 68fb ldr r3, [r7, #12] - 8003b2e: 681b ldr r3, [r3, #0] - 8003b30: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 8003b34: 601a str r2, [r3, #0] + 8004416: 68fb ldr r3, [r7, #12] + 8004418: 681b ldr r3, [r3, #0] + 800441a: 681a ldr r2, [r3, #0] + 800441c: 68fb ldr r3, [r7, #12] + 800441e: 681b ldr r3, [r3, #0] + 8004420: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8004424: 601a str r2, [r3, #0] __ASM volatile ("cpsie i" : : : "memory"); - 8003b36: b662 cpsie i + 8004426: b662 cpsie i } - 8003b38: e012 b.n 8003b60 + 8004428: e012 b.n 8004450 __enable_irq(); } else { /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003b3a: 68fb ldr r3, [r7, #12] - 8003b3c: 681b ldr r3, [r3, #0] - 8003b3e: 681a ldr r2, [r3, #0] - 8003b40: 68fb ldr r3, [r7, #12] - 8003b42: 681b ldr r3, [r3, #0] - 8003b44: f442 6280 orr.w r2, r2, #1024 @ 0x400 - 8003b48: 601a str r2, [r3, #0] + 800442a: 68fb ldr r3, [r7, #12] + 800442c: 681b ldr r3, [r3, #0] + 800442e: 681a ldr r2, [r3, #0] + 8004430: 68fb ldr r3, [r7, #12] + 8004432: 681b ldr r3, [r3, #0] + 8004434: f442 6280 orr.w r2, r2, #1024 @ 0x400 + 8004438: 601a str r2, [r3, #0] /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 8003b4a: 2300 movs r3, #0 - 8003b4c: 613b str r3, [r7, #16] - 8003b4e: 68fb ldr r3, [r7, #12] - 8003b50: 681b ldr r3, [r3, #0] - 8003b52: 695b ldr r3, [r3, #20] - 8003b54: 613b str r3, [r7, #16] - 8003b56: 68fb ldr r3, [r7, #12] - 8003b58: 681b ldr r3, [r3, #0] - 8003b5a: 699b ldr r3, [r3, #24] - 8003b5c: 613b str r3, [r7, #16] - 8003b5e: 693b ldr r3, [r7, #16] + 800443a: 2300 movs r3, #0 + 800443c: 613b str r3, [r7, #16] + 800443e: 68fb ldr r3, [r7, #12] + 8004440: 681b ldr r3, [r3, #0] + 8004442: 695b ldr r3, [r3, #20] + 8004444: 613b str r3, [r7, #16] + 8004446: 68fb ldr r3, [r7, #12] + 8004448: 681b ldr r3, [r3, #0] + 800444a: 699b ldr r3, [r3, #24] + 800444c: 613b str r3, [r7, #16] + 800444e: 693b ldr r3, [r7, #16] } while (hi2c->XferSize > 0U) - 8003b60: e172 b.n 8003e48 + 8004450: e172 b.n 8004738 { if (hi2c->XferSize <= 3U) - 8003b62: 68fb ldr r3, [r7, #12] - 8003b64: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003b66: 2b03 cmp r3, #3 - 8003b68: f200 811f bhi.w 8003daa + 8004452: 68fb ldr r3, [r7, #12] + 8004454: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004456: 2b03 cmp r3, #3 + 8004458: f200 811f bhi.w 800469a { /* One byte */ if (hi2c->XferSize == 1U) - 8003b6c: 68fb ldr r3, [r7, #12] - 8003b6e: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003b70: 2b01 cmp r3, #1 - 8003b72: d123 bne.n 8003bbc + 800445c: 68fb ldr r3, [r7, #12] + 800445e: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004460: 2b01 cmp r3, #1 + 8004462: d123 bne.n 80044ac { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8003b74: 6a7a ldr r2, [r7, #36] @ 0x24 - 8003b76: 6b39 ldr r1, [r7, #48] @ 0x30 - 8003b78: 68f8 ldr r0, [r7, #12] - 8003b7a: f000 fc7d bl 8004478 - 8003b7e: 4603 mov r3, r0 - 8003b80: 2b00 cmp r3, #0 - 8003b82: d001 beq.n 8003b88 + 8004464: 6a7a ldr r2, [r7, #36] @ 0x24 + 8004466: 6b39 ldr r1, [r7, #48] @ 0x30 + 8004468: 68f8 ldr r0, [r7, #12] + 800446a: f000 fc7d bl 8004d68 + 800446e: 4603 mov r3, r0 + 8004470: 2b00 cmp r3, #0 + 8004472: d001 beq.n 8004478 { return HAL_ERROR; - 8003b84: 2301 movs r3, #1 - 8003b86: e173 b.n 8003e70 + 8004474: 2301 movs r3, #1 + 8004476: e173 b.n 8004760 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003b88: 68fb ldr r3, [r7, #12] - 8003b8a: 681b ldr r3, [r3, #0] - 8003b8c: 691a ldr r2, [r3, #16] - 8003b8e: 68fb ldr r3, [r7, #12] - 8003b90: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003b92: b2d2 uxtb r2, r2 - 8003b94: 701a strb r2, [r3, #0] + 8004478: 68fb ldr r3, [r7, #12] + 800447a: 681b ldr r3, [r3, #0] + 800447c: 691a ldr r2, [r3, #16] + 800447e: 68fb ldr r3, [r7, #12] + 8004480: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004482: b2d2 uxtb r2, r2 + 8004484: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003b96: 68fb ldr r3, [r7, #12] - 8003b98: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003b9a: 1c5a adds r2, r3, #1 - 8003b9c: 68fb ldr r3, [r7, #12] - 8003b9e: 625a str r2, [r3, #36] @ 0x24 + 8004486: 68fb ldr r3, [r7, #12] + 8004488: 6a5b ldr r3, [r3, #36] @ 0x24 + 800448a: 1c5a adds r2, r3, #1 + 800448c: 68fb ldr r3, [r7, #12] + 800448e: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003ba0: 68fb ldr r3, [r7, #12] - 8003ba2: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003ba4: 3b01 subs r3, #1 - 8003ba6: b29a uxth r2, r3 - 8003ba8: 68fb ldr r3, [r7, #12] - 8003baa: 851a strh r2, [r3, #40] @ 0x28 + 8004490: 68fb ldr r3, [r7, #12] + 8004492: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004494: 3b01 subs r3, #1 + 8004496: b29a uxth r2, r3 + 8004498: 68fb ldr r3, [r7, #12] + 800449a: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003bac: 68fb ldr r3, [r7, #12] - 8003bae: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003bb0: b29b uxth r3, r3 - 8003bb2: 3b01 subs r3, #1 - 8003bb4: b29a uxth r2, r3 - 8003bb6: 68fb ldr r3, [r7, #12] - 8003bb8: 855a strh r2, [r3, #42] @ 0x2a - 8003bba: e145 b.n 8003e48 + 800449c: 68fb ldr r3, [r7, #12] + 800449e: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80044a0: b29b uxth r3, r3 + 80044a2: 3b01 subs r3, #1 + 80044a4: b29a uxth r2, r3 + 80044a6: 68fb ldr r3, [r7, #12] + 80044a8: 855a strh r2, [r3, #42] @ 0x2a + 80044aa: e145 b.n 8004738 } /* Two bytes */ else if (hi2c->XferSize == 2U) - 8003bbc: 68fb ldr r3, [r7, #12] - 8003bbe: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003bc0: 2b02 cmp r3, #2 - 8003bc2: d152 bne.n 8003c6a + 80044ac: 68fb ldr r3, [r7, #12] + 80044ae: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80044b0: 2b02 cmp r3, #2 + 80044b2: d152 bne.n 800455a { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) - 8003bc4: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003bc6: 9300 str r3, [sp, #0] - 8003bc8: 6b3b ldr r3, [r7, #48] @ 0x30 - 8003bca: 2200 movs r2, #0 - 8003bcc: 4906 ldr r1, [pc, #24] @ (8003be8 ) - 8003bce: 68f8 ldr r0, [r7, #12] - 8003bd0: f000 faa8 bl 8004124 - 8003bd4: 4603 mov r3, r0 - 8003bd6: 2b00 cmp r3, #0 - 8003bd8: d008 beq.n 8003bec + 80044b4: 6a7b ldr r3, [r7, #36] @ 0x24 + 80044b6: 9300 str r3, [sp, #0] + 80044b8: 6b3b ldr r3, [r7, #48] @ 0x30 + 80044ba: 2200 movs r2, #0 + 80044bc: 4906 ldr r1, [pc, #24] @ (80044d8 ) + 80044be: 68f8 ldr r0, [r7, #12] + 80044c0: f000 faa8 bl 8004a14 + 80044c4: 4603 mov r3, r0 + 80044c6: 2b00 cmp r3, #0 + 80044c8: d008 beq.n 80044dc { return HAL_ERROR; - 8003bda: 2301 movs r3, #1 - 8003bdc: e148 b.n 8003e70 - 8003bde: bf00 nop - 8003be0: 00100002 .word 0x00100002 - 8003be4: ffff0000 .word 0xffff0000 - 8003be8: 00010004 .word 0x00010004 + 80044ca: 2301 movs r3, #1 + 80044cc: e148 b.n 8004760 + 80044ce: bf00 nop + 80044d0: 00100002 .word 0x00100002 + 80044d4: ffff0000 .word 0xffff0000 + 80044d8: 00010004 .word 0x00010004 __ASM volatile ("cpsid i" : : : "memory"); - 8003bec: b672 cpsid i + 80044dc: b672 cpsid i } - 8003bee: bf00 nop + 80044de: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003bf0: 68fb ldr r3, [r7, #12] - 8003bf2: 681b ldr r3, [r3, #0] - 8003bf4: 681a ldr r2, [r3, #0] - 8003bf6: 68fb ldr r3, [r7, #12] - 8003bf8: 681b ldr r3, [r3, #0] - 8003bfa: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8003bfe: 601a str r2, [r3, #0] + 80044e0: 68fb ldr r3, [r7, #12] + 80044e2: 681b ldr r3, [r3, #0] + 80044e4: 681a ldr r2, [r3, #0] + 80044e6: 68fb ldr r3, [r7, #12] + 80044e8: 681b ldr r3, [r3, #0] + 80044ea: f442 7200 orr.w r2, r2, #512 @ 0x200 + 80044ee: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003c00: 68fb ldr r3, [r7, #12] - 8003c02: 681b ldr r3, [r3, #0] - 8003c04: 691a ldr r2, [r3, #16] - 8003c06: 68fb ldr r3, [r7, #12] - 8003c08: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003c0a: b2d2 uxtb r2, r2 - 8003c0c: 701a strb r2, [r3, #0] + 80044f0: 68fb ldr r3, [r7, #12] + 80044f2: 681b ldr r3, [r3, #0] + 80044f4: 691a ldr r2, [r3, #16] + 80044f6: 68fb ldr r3, [r7, #12] + 80044f8: 6a5b ldr r3, [r3, #36] @ 0x24 + 80044fa: b2d2 uxtb r2, r2 + 80044fc: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003c0e: 68fb ldr r3, [r7, #12] - 8003c10: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003c12: 1c5a adds r2, r3, #1 - 8003c14: 68fb ldr r3, [r7, #12] - 8003c16: 625a str r2, [r3, #36] @ 0x24 + 80044fe: 68fb ldr r3, [r7, #12] + 8004500: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004502: 1c5a adds r2, r3, #1 + 8004504: 68fb ldr r3, [r7, #12] + 8004506: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003c18: 68fb ldr r3, [r7, #12] - 8003c1a: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003c1c: 3b01 subs r3, #1 - 8003c1e: b29a uxth r2, r3 - 8003c20: 68fb ldr r3, [r7, #12] - 8003c22: 851a strh r2, [r3, #40] @ 0x28 + 8004508: 68fb ldr r3, [r7, #12] + 800450a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800450c: 3b01 subs r3, #1 + 800450e: b29a uxth r2, r3 + 8004510: 68fb ldr r3, [r7, #12] + 8004512: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003c24: 68fb ldr r3, [r7, #12] - 8003c26: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003c28: b29b uxth r3, r3 - 8003c2a: 3b01 subs r3, #1 - 8003c2c: b29a uxth r2, r3 - 8003c2e: 68fb ldr r3, [r7, #12] - 8003c30: 855a strh r2, [r3, #42] @ 0x2a + 8004514: 68fb ldr r3, [r7, #12] + 8004516: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004518: b29b uxth r3, r3 + 800451a: 3b01 subs r3, #1 + 800451c: b29a uxth r2, r3 + 800451e: 68fb ldr r3, [r7, #12] + 8004520: 855a strh r2, [r3, #42] @ 0x2a __ASM volatile ("cpsie i" : : : "memory"); - 8003c32: b662 cpsie i + 8004522: b662 cpsie i } - 8003c34: bf00 nop + 8004524: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003c36: 68fb ldr r3, [r7, #12] - 8003c38: 681b ldr r3, [r3, #0] - 8003c3a: 691a ldr r2, [r3, #16] - 8003c3c: 68fb ldr r3, [r7, #12] - 8003c3e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003c40: b2d2 uxtb r2, r2 - 8003c42: 701a strb r2, [r3, #0] + 8004526: 68fb ldr r3, [r7, #12] + 8004528: 681b ldr r3, [r3, #0] + 800452a: 691a ldr r2, [r3, #16] + 800452c: 68fb ldr r3, [r7, #12] + 800452e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004530: b2d2 uxtb r2, r2 + 8004532: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003c44: 68fb ldr r3, [r7, #12] - 8003c46: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003c48: 1c5a adds r2, r3, #1 - 8003c4a: 68fb ldr r3, [r7, #12] - 8003c4c: 625a str r2, [r3, #36] @ 0x24 + 8004534: 68fb ldr r3, [r7, #12] + 8004536: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004538: 1c5a adds r2, r3, #1 + 800453a: 68fb ldr r3, [r7, #12] + 800453c: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003c4e: 68fb ldr r3, [r7, #12] - 8003c50: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003c52: 3b01 subs r3, #1 - 8003c54: b29a uxth r2, r3 - 8003c56: 68fb ldr r3, [r7, #12] - 8003c58: 851a strh r2, [r3, #40] @ 0x28 + 800453e: 68fb ldr r3, [r7, #12] + 8004540: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004542: 3b01 subs r3, #1 + 8004544: b29a uxth r2, r3 + 8004546: 68fb ldr r3, [r7, #12] + 8004548: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003c5a: 68fb ldr r3, [r7, #12] - 8003c5c: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003c5e: b29b uxth r3, r3 - 8003c60: 3b01 subs r3, #1 - 8003c62: b29a uxth r2, r3 - 8003c64: 68fb ldr r3, [r7, #12] - 8003c66: 855a strh r2, [r3, #42] @ 0x2a - 8003c68: e0ee b.n 8003e48 + 800454a: 68fb ldr r3, [r7, #12] + 800454c: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800454e: b29b uxth r3, r3 + 8004550: 3b01 subs r3, #1 + 8004552: b29a uxth r2, r3 + 8004554: 68fb ldr r3, [r7, #12] + 8004556: 855a strh r2, [r3, #42] @ 0x2a + 8004558: e0ee b.n 8004738 } /* 3 Last bytes */ else { /* Wait until BTF flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK) - 8003c6a: 6a7b ldr r3, [r7, #36] @ 0x24 - 8003c6c: 9300 str r3, [sp, #0] - 8003c6e: 6b3b ldr r3, [r7, #48] @ 0x30 - 8003c70: 2200 movs r2, #0 - 8003c72: 4981 ldr r1, [pc, #516] @ (8003e78 ) - 8003c74: 68f8 ldr r0, [r7, #12] - 8003c76: f000 fa55 bl 8004124 - 8003c7a: 4603 mov r3, r0 - 8003c7c: 2b00 cmp r3, #0 - 8003c7e: d001 beq.n 8003c84 + 800455a: 6a7b ldr r3, [r7, #36] @ 0x24 + 800455c: 9300 str r3, [sp, #0] + 800455e: 6b3b ldr r3, [r7, #48] @ 0x30 + 8004560: 2200 movs r2, #0 + 8004562: 4981 ldr r1, [pc, #516] @ (8004768 ) + 8004564: 68f8 ldr r0, [r7, #12] + 8004566: f000 fa55 bl 8004a14 + 800456a: 4603 mov r3, r0 + 800456c: 2b00 cmp r3, #0 + 800456e: d001 beq.n 8004574 { return HAL_ERROR; - 8003c80: 2301 movs r3, #1 - 8003c82: e0f5 b.n 8003e70 + 8004570: 2301 movs r3, #1 + 8004572: e0f5 b.n 8004760 } /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003c84: 68fb ldr r3, [r7, #12] - 8003c86: 681b ldr r3, [r3, #0] - 8003c88: 681a ldr r2, [r3, #0] - 8003c8a: 68fb ldr r3, [r7, #12] - 8003c8c: 681b ldr r3, [r3, #0] - 8003c8e: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 8003c92: 601a str r2, [r3, #0] + 8004574: 68fb ldr r3, [r7, #12] + 8004576: 681b ldr r3, [r3, #0] + 8004578: 681a ldr r2, [r3, #0] + 800457a: 68fb ldr r3, [r7, #12] + 800457c: 681b ldr r3, [r3, #0] + 800457e: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8004582: 601a str r2, [r3, #0] __ASM volatile ("cpsid i" : : : "memory"); - 8003c94: b672 cpsid i + 8004584: b672 cpsid i } - 8003c96: bf00 nop + 8004586: bf00 nop /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 software sequence must complete before the current byte end of transfer */ __disable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003c98: 68fb ldr r3, [r7, #12] - 8003c9a: 681b ldr r3, [r3, #0] - 8003c9c: 691a ldr r2, [r3, #16] - 8003c9e: 68fb ldr r3, [r7, #12] - 8003ca0: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003ca2: b2d2 uxtb r2, r2 - 8003ca4: 701a strb r2, [r3, #0] + 8004588: 68fb ldr r3, [r7, #12] + 800458a: 681b ldr r3, [r3, #0] + 800458c: 691a ldr r2, [r3, #16] + 800458e: 68fb ldr r3, [r7, #12] + 8004590: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004592: b2d2 uxtb r2, r2 + 8004594: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003ca6: 68fb ldr r3, [r7, #12] - 8003ca8: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003caa: 1c5a adds r2, r3, #1 - 8003cac: 68fb ldr r3, [r7, #12] - 8003cae: 625a str r2, [r3, #36] @ 0x24 + 8004596: 68fb ldr r3, [r7, #12] + 8004598: 6a5b ldr r3, [r3, #36] @ 0x24 + 800459a: 1c5a adds r2, r3, #1 + 800459c: 68fb ldr r3, [r7, #12] + 800459e: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003cb0: 68fb ldr r3, [r7, #12] - 8003cb2: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003cb4: 3b01 subs r3, #1 - 8003cb6: b29a uxth r2, r3 - 8003cb8: 68fb ldr r3, [r7, #12] - 8003cba: 851a strh r2, [r3, #40] @ 0x28 + 80045a0: 68fb ldr r3, [r7, #12] + 80045a2: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80045a4: 3b01 subs r3, #1 + 80045a6: b29a uxth r2, r3 + 80045a8: 68fb ldr r3, [r7, #12] + 80045aa: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003cbc: 68fb ldr r3, [r7, #12] - 8003cbe: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003cc0: b29b uxth r3, r3 - 8003cc2: 3b01 subs r3, #1 - 8003cc4: b29a uxth r2, r3 - 8003cc6: 68fb ldr r3, [r7, #12] - 8003cc8: 855a strh r2, [r3, #42] @ 0x2a + 80045ac: 68fb ldr r3, [r7, #12] + 80045ae: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80045b0: b29b uxth r3, r3 + 80045b2: 3b01 subs r3, #1 + 80045b4: b29a uxth r2, r3 + 80045b6: 68fb ldr r3, [r7, #12] + 80045b8: 855a strh r2, [r3, #42] @ 0x2a /* Wait until BTF flag is set */ count = I2C_TIMEOUT_FLAG * (SystemCoreClock / 25U / 1000U); - 8003cca: 4b6c ldr r3, [pc, #432] @ (8003e7c ) - 8003ccc: 681b ldr r3, [r3, #0] - 8003cce: 08db lsrs r3, r3, #3 - 8003cd0: 4a6b ldr r2, [pc, #428] @ (8003e80 ) - 8003cd2: fba2 2303 umull r2, r3, r2, r3 - 8003cd6: 0a1a lsrs r2, r3, #8 - 8003cd8: 4613 mov r3, r2 - 8003cda: 009b lsls r3, r3, #2 - 8003cdc: 4413 add r3, r2 - 8003cde: 00da lsls r2, r3, #3 - 8003ce0: 1ad3 subs r3, r2, r3 - 8003ce2: 623b str r3, [r7, #32] + 80045ba: 4b6c ldr r3, [pc, #432] @ (800476c ) + 80045bc: 681b ldr r3, [r3, #0] + 80045be: 08db lsrs r3, r3, #3 + 80045c0: 4a6b ldr r2, [pc, #428] @ (8004770 ) + 80045c2: fba2 2303 umull r2, r3, r2, r3 + 80045c6: 0a1a lsrs r2, r3, #8 + 80045c8: 4613 mov r3, r2 + 80045ca: 009b lsls r3, r3, #2 + 80045cc: 4413 add r3, r2 + 80045ce: 00da lsls r2, r3, #3 + 80045d0: 1ad3 subs r3, r2, r3 + 80045d2: 623b str r3, [r7, #32] do { count--; - 8003ce4: 6a3b ldr r3, [r7, #32] - 8003ce6: 3b01 subs r3, #1 - 8003ce8: 623b str r3, [r7, #32] + 80045d4: 6a3b ldr r3, [r7, #32] + 80045d6: 3b01 subs r3, #1 + 80045d8: 623b str r3, [r7, #32] if (count == 0U) - 8003cea: 6a3b ldr r3, [r7, #32] - 8003cec: 2b00 cmp r3, #0 - 8003cee: d118 bne.n 8003d22 + 80045da: 6a3b ldr r3, [r7, #32] + 80045dc: 2b00 cmp r3, #0 + 80045de: d118 bne.n 8004612 { hi2c->PreviousState = I2C_STATE_NONE; - 8003cf0: 68fb ldr r3, [r7, #12] - 8003cf2: 2200 movs r2, #0 - 8003cf4: 631a str r2, [r3, #48] @ 0x30 + 80045e0: 68fb ldr r3, [r7, #12] + 80045e2: 2200 movs r2, #0 + 80045e4: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8003cf6: 68fb ldr r3, [r7, #12] - 8003cf8: 2220 movs r2, #32 - 8003cfa: f883 203d strb.w r2, [r3, #61] @ 0x3d + 80045e6: 68fb ldr r3, [r7, #12] + 80045e8: 2220 movs r2, #32 + 80045ea: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003cfe: 68fb ldr r3, [r7, #12] - 8003d00: 2200 movs r2, #0 - 8003d02: f883 203e strb.w r2, [r3, #62] @ 0x3e + 80045ee: 68fb ldr r3, [r7, #12] + 80045f0: 2200 movs r2, #0 + 80045f2: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8003d06: 68fb ldr r3, [r7, #12] - 8003d08: 6c1b ldr r3, [r3, #64] @ 0x40 - 8003d0a: f043 0220 orr.w r2, r3, #32 - 8003d0e: 68fb ldr r3, [r7, #12] - 8003d10: 641a str r2, [r3, #64] @ 0x40 + 80045f6: 68fb ldr r3, [r7, #12] + 80045f8: 6c1b ldr r3, [r3, #64] @ 0x40 + 80045fa: f043 0220 orr.w r2, r3, #32 + 80045fe: 68fb ldr r3, [r7, #12] + 8004600: 641a str r2, [r3, #64] @ 0x40 __ASM volatile ("cpsie i" : : : "memory"); - 8003d12: b662 cpsie i + 8004602: b662 cpsie i } - 8003d14: bf00 nop + 8004604: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003d16: 68fb ldr r3, [r7, #12] - 8003d18: 2200 movs r2, #0 - 8003d1a: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004606: 68fb ldr r3, [r7, #12] + 8004608: 2200 movs r2, #0 + 800460a: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8003d1e: 2301 movs r3, #1 - 8003d20: e0a6 b.n 8003e70 + 800460e: 2301 movs r3, #1 + 8004610: e0a6 b.n 8004760 } } while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET); - 8003d22: 68fb ldr r3, [r7, #12] - 8003d24: 681b ldr r3, [r3, #0] - 8003d26: 695b ldr r3, [r3, #20] - 8003d28: f003 0304 and.w r3, r3, #4 - 8003d2c: 2b04 cmp r3, #4 - 8003d2e: d1d9 bne.n 8003ce4 + 8004612: 68fb ldr r3, [r7, #12] + 8004614: 681b ldr r3, [r3, #0] + 8004616: 695b ldr r3, [r3, #20] + 8004618: f003 0304 and.w r3, r3, #4 + 800461c: 2b04 cmp r3, #4 + 800461e: d1d9 bne.n 80045d4 /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8003d30: 68fb ldr r3, [r7, #12] - 8003d32: 681b ldr r3, [r3, #0] - 8003d34: 681a ldr r2, [r3, #0] - 8003d36: 68fb ldr r3, [r7, #12] - 8003d38: 681b ldr r3, [r3, #0] - 8003d3a: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8003d3e: 601a str r2, [r3, #0] + 8004620: 68fb ldr r3, [r7, #12] + 8004622: 681b ldr r3, [r3, #0] + 8004624: 681a ldr r2, [r3, #0] + 8004626: 68fb ldr r3, [r7, #12] + 8004628: 681b ldr r3, [r3, #0] + 800462a: f442 7200 orr.w r2, r2, #512 @ 0x200 + 800462e: 601a str r2, [r3, #0] /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003d40: 68fb ldr r3, [r7, #12] - 8003d42: 681b ldr r3, [r3, #0] - 8003d44: 691a ldr r2, [r3, #16] - 8003d46: 68fb ldr r3, [r7, #12] - 8003d48: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003d4a: b2d2 uxtb r2, r2 - 8003d4c: 701a strb r2, [r3, #0] + 8004630: 68fb ldr r3, [r7, #12] + 8004632: 681b ldr r3, [r3, #0] + 8004634: 691a ldr r2, [r3, #16] + 8004636: 68fb ldr r3, [r7, #12] + 8004638: 6a5b ldr r3, [r3, #36] @ 0x24 + 800463a: b2d2 uxtb r2, r2 + 800463c: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003d4e: 68fb ldr r3, [r7, #12] - 8003d50: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003d52: 1c5a adds r2, r3, #1 - 8003d54: 68fb ldr r3, [r7, #12] - 8003d56: 625a str r2, [r3, #36] @ 0x24 + 800463e: 68fb ldr r3, [r7, #12] + 8004640: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004642: 1c5a adds r2, r3, #1 + 8004644: 68fb ldr r3, [r7, #12] + 8004646: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003d58: 68fb ldr r3, [r7, #12] - 8003d5a: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003d5c: 3b01 subs r3, #1 - 8003d5e: b29a uxth r2, r3 - 8003d60: 68fb ldr r3, [r7, #12] - 8003d62: 851a strh r2, [r3, #40] @ 0x28 + 8004648: 68fb ldr r3, [r7, #12] + 800464a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800464c: 3b01 subs r3, #1 + 800464e: b29a uxth r2, r3 + 8004650: 68fb ldr r3, [r7, #12] + 8004652: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003d64: 68fb ldr r3, [r7, #12] - 8003d66: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003d68: b29b uxth r3, r3 - 8003d6a: 3b01 subs r3, #1 - 8003d6c: b29a uxth r2, r3 - 8003d6e: 68fb ldr r3, [r7, #12] - 8003d70: 855a strh r2, [r3, #42] @ 0x2a + 8004654: 68fb ldr r3, [r7, #12] + 8004656: 8d5b ldrh r3, [r3, #42] @ 0x2a + 8004658: b29b uxth r3, r3 + 800465a: 3b01 subs r3, #1 + 800465c: b29a uxth r2, r3 + 800465e: 68fb ldr r3, [r7, #12] + 8004660: 855a strh r2, [r3, #42] @ 0x2a __ASM volatile ("cpsie i" : : : "memory"); - 8003d72: b662 cpsie i + 8004662: b662 cpsie i } - 8003d74: bf00 nop + 8004664: bf00 nop /* Re-enable IRQs */ __enable_irq(); /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003d76: 68fb ldr r3, [r7, #12] - 8003d78: 681b ldr r3, [r3, #0] - 8003d7a: 691a ldr r2, [r3, #16] - 8003d7c: 68fb ldr r3, [r7, #12] - 8003d7e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003d80: b2d2 uxtb r2, r2 - 8003d82: 701a strb r2, [r3, #0] + 8004666: 68fb ldr r3, [r7, #12] + 8004668: 681b ldr r3, [r3, #0] + 800466a: 691a ldr r2, [r3, #16] + 800466c: 68fb ldr r3, [r7, #12] + 800466e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004670: b2d2 uxtb r2, r2 + 8004672: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003d84: 68fb ldr r3, [r7, #12] - 8003d86: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003d88: 1c5a adds r2, r3, #1 - 8003d8a: 68fb ldr r3, [r7, #12] - 8003d8c: 625a str r2, [r3, #36] @ 0x24 + 8004674: 68fb ldr r3, [r7, #12] + 8004676: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004678: 1c5a adds r2, r3, #1 + 800467a: 68fb ldr r3, [r7, #12] + 800467c: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003d8e: 68fb ldr r3, [r7, #12] - 8003d90: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003d92: 3b01 subs r3, #1 - 8003d94: b29a uxth r2, r3 - 8003d96: 68fb ldr r3, [r7, #12] - 8003d98: 851a strh r2, [r3, #40] @ 0x28 + 800467e: 68fb ldr r3, [r7, #12] + 8004680: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004682: 3b01 subs r3, #1 + 8004684: b29a uxth r2, r3 + 8004686: 68fb ldr r3, [r7, #12] + 8004688: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003d9a: 68fb ldr r3, [r7, #12] - 8003d9c: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003d9e: b29b uxth r3, r3 - 8003da0: 3b01 subs r3, #1 - 8003da2: b29a uxth r2, r3 - 8003da4: 68fb ldr r3, [r7, #12] - 8003da6: 855a strh r2, [r3, #42] @ 0x2a - 8003da8: e04e b.n 8003e48 + 800468a: 68fb ldr r3, [r7, #12] + 800468c: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800468e: b29b uxth r3, r3 + 8004690: 3b01 subs r3, #1 + 8004692: b29a uxth r2, r3 + 8004694: 68fb ldr r3, [r7, #12] + 8004696: 855a strh r2, [r3, #42] @ 0x2a + 8004698: e04e b.n 8004738 } } else { /* Wait until RXNE flag is set */ if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) - 8003daa: 6a7a ldr r2, [r7, #36] @ 0x24 - 8003dac: 6b39 ldr r1, [r7, #48] @ 0x30 - 8003dae: 68f8 ldr r0, [r7, #12] - 8003db0: f000 fb62 bl 8004478 - 8003db4: 4603 mov r3, r0 - 8003db6: 2b00 cmp r3, #0 - 8003db8: d001 beq.n 8003dbe + 800469a: 6a7a ldr r2, [r7, #36] @ 0x24 + 800469c: 6b39 ldr r1, [r7, #48] @ 0x30 + 800469e: 68f8 ldr r0, [r7, #12] + 80046a0: f000 fb62 bl 8004d68 + 80046a4: 4603 mov r3, r0 + 80046a6: 2b00 cmp r3, #0 + 80046a8: d001 beq.n 80046ae { return HAL_ERROR; - 8003dba: 2301 movs r3, #1 - 8003dbc: e058 b.n 8003e70 + 80046aa: 2301 movs r3, #1 + 80046ac: e058 b.n 8004760 } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003dbe: 68fb ldr r3, [r7, #12] - 8003dc0: 681b ldr r3, [r3, #0] - 8003dc2: 691a ldr r2, [r3, #16] - 8003dc4: 68fb ldr r3, [r7, #12] - 8003dc6: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003dc8: b2d2 uxtb r2, r2 - 8003dca: 701a strb r2, [r3, #0] + 80046ae: 68fb ldr r3, [r7, #12] + 80046b0: 681b ldr r3, [r3, #0] + 80046b2: 691a ldr r2, [r3, #16] + 80046b4: 68fb ldr r3, [r7, #12] + 80046b6: 6a5b ldr r3, [r3, #36] @ 0x24 + 80046b8: b2d2 uxtb r2, r2 + 80046ba: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003dcc: 68fb ldr r3, [r7, #12] - 8003dce: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003dd0: 1c5a adds r2, r3, #1 - 8003dd2: 68fb ldr r3, [r7, #12] - 8003dd4: 625a str r2, [r3, #36] @ 0x24 + 80046bc: 68fb ldr r3, [r7, #12] + 80046be: 6a5b ldr r3, [r3, #36] @ 0x24 + 80046c0: 1c5a adds r2, r3, #1 + 80046c2: 68fb ldr r3, [r7, #12] + 80046c4: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003dd6: 68fb ldr r3, [r7, #12] - 8003dd8: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003dda: 3b01 subs r3, #1 - 8003ddc: b29a uxth r2, r3 - 8003dde: 68fb ldr r3, [r7, #12] - 8003de0: 851a strh r2, [r3, #40] @ 0x28 + 80046c6: 68fb ldr r3, [r7, #12] + 80046c8: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80046ca: 3b01 subs r3, #1 + 80046cc: b29a uxth r2, r3 + 80046ce: 68fb ldr r3, [r7, #12] + 80046d0: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003de2: 68fb ldr r3, [r7, #12] - 8003de4: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003de6: b29b uxth r3, r3 - 8003de8: 3b01 subs r3, #1 - 8003dea: b29a uxth r2, r3 - 8003dec: 68fb ldr r3, [r7, #12] - 8003dee: 855a strh r2, [r3, #42] @ 0x2a + 80046d2: 68fb ldr r3, [r7, #12] + 80046d4: 8d5b ldrh r3, [r3, #42] @ 0x2a + 80046d6: b29b uxth r3, r3 + 80046d8: 3b01 subs r3, #1 + 80046da: b29a uxth r2, r3 + 80046dc: 68fb ldr r3, [r7, #12] + 80046de: 855a strh r2, [r3, #42] @ 0x2a if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) - 8003df0: 68fb ldr r3, [r7, #12] - 8003df2: 681b ldr r3, [r3, #0] - 8003df4: 695b ldr r3, [r3, #20] - 8003df6: f003 0304 and.w r3, r3, #4 - 8003dfa: 2b04 cmp r3, #4 - 8003dfc: d124 bne.n 8003e48 + 80046e0: 68fb ldr r3, [r7, #12] + 80046e2: 681b ldr r3, [r3, #0] + 80046e4: 695b ldr r3, [r3, #20] + 80046e6: f003 0304 and.w r3, r3, #4 + 80046ea: 2b04 cmp r3, #4 + 80046ec: d124 bne.n 8004738 { if (hi2c->XferSize == 3U) - 8003dfe: 68fb ldr r3, [r7, #12] - 8003e00: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003e02: 2b03 cmp r3, #3 - 8003e04: d107 bne.n 8003e16 + 80046ee: 68fb ldr r3, [r7, #12] + 80046f0: 8d1b ldrh r3, [r3, #40] @ 0x28 + 80046f2: 2b03 cmp r3, #3 + 80046f4: d107 bne.n 8004706 { /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003e06: 68fb ldr r3, [r7, #12] - 8003e08: 681b ldr r3, [r3, #0] - 8003e0a: 681a ldr r2, [r3, #0] - 8003e0c: 68fb ldr r3, [r7, #12] - 8003e0e: 681b ldr r3, [r3, #0] - 8003e10: f422 6280 bic.w r2, r2, #1024 @ 0x400 - 8003e14: 601a str r2, [r3, #0] + 80046f6: 68fb ldr r3, [r7, #12] + 80046f8: 681b ldr r3, [r3, #0] + 80046fa: 681a ldr r2, [r3, #0] + 80046fc: 68fb ldr r3, [r7, #12] + 80046fe: 681b ldr r3, [r3, #0] + 8004700: f422 6280 bic.w r2, r2, #1024 @ 0x400 + 8004704: 601a str r2, [r3, #0] } /* Read data from DR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR; - 8003e16: 68fb ldr r3, [r7, #12] - 8003e18: 681b ldr r3, [r3, #0] - 8003e1a: 691a ldr r2, [r3, #16] - 8003e1c: 68fb ldr r3, [r7, #12] - 8003e1e: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003e20: b2d2 uxtb r2, r2 - 8003e22: 701a strb r2, [r3, #0] + 8004706: 68fb ldr r3, [r7, #12] + 8004708: 681b ldr r3, [r3, #0] + 800470a: 691a ldr r2, [r3, #16] + 800470c: 68fb ldr r3, [r7, #12] + 800470e: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004710: b2d2 uxtb r2, r2 + 8004712: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; - 8003e24: 68fb ldr r3, [r7, #12] - 8003e26: 6a5b ldr r3, [r3, #36] @ 0x24 - 8003e28: 1c5a adds r2, r3, #1 - 8003e2a: 68fb ldr r3, [r7, #12] - 8003e2c: 625a str r2, [r3, #36] @ 0x24 + 8004714: 68fb ldr r3, [r7, #12] + 8004716: 6a5b ldr r3, [r3, #36] @ 0x24 + 8004718: 1c5a adds r2, r3, #1 + 800471a: 68fb ldr r3, [r7, #12] + 800471c: 625a str r2, [r3, #36] @ 0x24 /* Update counter */ hi2c->XferSize--; - 8003e2e: 68fb ldr r3, [r7, #12] - 8003e30: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003e32: 3b01 subs r3, #1 - 8003e34: b29a uxth r2, r3 - 8003e36: 68fb ldr r3, [r7, #12] - 8003e38: 851a strh r2, [r3, #40] @ 0x28 + 800471e: 68fb ldr r3, [r7, #12] + 8004720: 8d1b ldrh r3, [r3, #40] @ 0x28 + 8004722: 3b01 subs r3, #1 + 8004724: b29a uxth r2, r3 + 8004726: 68fb ldr r3, [r7, #12] + 8004728: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; - 8003e3a: 68fb ldr r3, [r7, #12] - 8003e3c: 8d5b ldrh r3, [r3, #42] @ 0x2a - 8003e3e: b29b uxth r3, r3 - 8003e40: 3b01 subs r3, #1 - 8003e42: b29a uxth r2, r3 - 8003e44: 68fb ldr r3, [r7, #12] - 8003e46: 855a strh r2, [r3, #42] @ 0x2a + 800472a: 68fb ldr r3, [r7, #12] + 800472c: 8d5b ldrh r3, [r3, #42] @ 0x2a + 800472e: b29b uxth r3, r3 + 8004730: 3b01 subs r3, #1 + 8004732: b29a uxth r2, r3 + 8004734: 68fb ldr r3, [r7, #12] + 8004736: 855a strh r2, [r3, #42] @ 0x2a while (hi2c->XferSize > 0U) - 8003e48: 68fb ldr r3, [r7, #12] - 8003e4a: 8d1b ldrh r3, [r3, #40] @ 0x28 - 8003e4c: 2b00 cmp r3, #0 - 8003e4e: f47f ae88 bne.w 8003b62 + 8004738: 68fb ldr r3, [r7, #12] + 800473a: 8d1b ldrh r3, [r3, #40] @ 0x28 + 800473c: 2b00 cmp r3, #0 + 800473e: f47f ae88 bne.w 8004452 } } } hi2c->State = HAL_I2C_STATE_READY; - 8003e52: 68fb ldr r3, [r7, #12] - 8003e54: 2220 movs r2, #32 - 8003e56: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004742: 68fb ldr r3, [r7, #12] + 8004744: 2220 movs r2, #32 + 8004746: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8003e5a: 68fb ldr r3, [r7, #12] - 8003e5c: 2200 movs r2, #0 - 8003e5e: f883 203e strb.w r2, [r3, #62] @ 0x3e + 800474a: 68fb ldr r3, [r7, #12] + 800474c: 2200 movs r2, #0 + 800474e: f883 203e strb.w r2, [r3, #62] @ 0x3e /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8003e62: 68fb ldr r3, [r7, #12] - 8003e64: 2200 movs r2, #0 - 8003e66: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004752: 68fb ldr r3, [r7, #12] + 8004754: 2200 movs r2, #0 + 8004756: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 8003e6a: 2300 movs r3, #0 - 8003e6c: e000 b.n 8003e70 + 800475a: 2300 movs r3, #0 + 800475c: e000 b.n 8004760 } else { return HAL_BUSY; - 8003e6e: 2302 movs r3, #2 + 800475e: 2302 movs r3, #2 } } - 8003e70: 4618 mov r0, r3 - 8003e72: 3728 adds r7, #40 @ 0x28 - 8003e74: 46bd mov sp, r7 - 8003e76: bd80 pop {r7, pc} - 8003e78: 00010004 .word 0x00010004 - 8003e7c: 20000004 .word 0x20000004 - 8003e80: 14f8b589 .word 0x14f8b589 + 8004760: 4618 mov r0, r3 + 8004762: 3728 adds r7, #40 @ 0x28 + 8004764: 46bd mov sp, r7 + 8004766: bd80 pop {r7, pc} + 8004768: 00010004 .word 0x00010004 + 800476c: 20000004 .word 0x20000004 + 8004770: 14f8b589 .word 0x14f8b589 -08003e84 : +08004774 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) { - 8003e84: b580 push {r7, lr} - 8003e86: b088 sub sp, #32 - 8003e88: af02 add r7, sp, #8 - 8003e8a: 60f8 str r0, [r7, #12] - 8003e8c: 607a str r2, [r7, #4] - 8003e8e: 603b str r3, [r7, #0] - 8003e90: 460b mov r3, r1 - 8003e92: 817b strh r3, [r7, #10] + 8004774: b580 push {r7, lr} + 8004776: b088 sub sp, #32 + 8004778: af02 add r7, sp, #8 + 800477a: 60f8 str r0, [r7, #12] + 800477c: 607a str r2, [r7, #4] + 800477e: 603b str r3, [r7, #0] + 8004780: 460b mov r3, r1 + 8004782: 817b strh r3, [r7, #10] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; - 8003e94: 68fb ldr r3, [r7, #12] - 8003e96: 6adb ldr r3, [r3, #44] @ 0x2c - 8003e98: 617b str r3, [r7, #20] + 8004784: 68fb ldr r3, [r7, #12] + 8004786: 6adb ldr r3, [r3, #44] @ 0x2c + 8004788: 617b str r3, [r7, #20] /* Generate Start condition if first transfer */ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) - 8003e9a: 697b ldr r3, [r7, #20] - 8003e9c: 2b08 cmp r3, #8 - 8003e9e: d006 beq.n 8003eae - 8003ea0: 697b ldr r3, [r7, #20] - 8003ea2: 2b01 cmp r3, #1 - 8003ea4: d003 beq.n 8003eae - 8003ea6: 697b ldr r3, [r7, #20] - 8003ea8: f513 3f80 cmn.w r3, #65536 @ 0x10000 - 8003eac: d108 bne.n 8003ec0 + 800478a: 697b ldr r3, [r7, #20] + 800478c: 2b08 cmp r3, #8 + 800478e: d006 beq.n 800479e + 8004790: 697b ldr r3, [r7, #20] + 8004792: 2b01 cmp r3, #1 + 8004794: d003 beq.n 800479e + 8004796: 697b ldr r3, [r7, #20] + 8004798: f513 3f80 cmn.w r3, #65536 @ 0x10000 + 800479c: d108 bne.n 80047b0 { /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003eae: 68fb ldr r3, [r7, #12] - 8003eb0: 681b ldr r3, [r3, #0] - 8003eb2: 681a ldr r2, [r3, #0] - 8003eb4: 68fb ldr r3, [r7, #12] - 8003eb6: 681b ldr r3, [r3, #0] - 8003eb8: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003ebc: 601a str r2, [r3, #0] - 8003ebe: e00b b.n 8003ed8 + 800479e: 68fb ldr r3, [r7, #12] + 80047a0: 681b ldr r3, [r3, #0] + 80047a2: 681a ldr r2, [r3, #0] + 80047a4: 68fb ldr r3, [r7, #12] + 80047a6: 681b ldr r3, [r3, #0] + 80047a8: f442 7280 orr.w r2, r2, #256 @ 0x100 + 80047ac: 601a str r2, [r3, #0] + 80047ae: e00b b.n 80047c8 } else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) - 8003ec0: 68fb ldr r3, [r7, #12] - 8003ec2: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003ec4: 2b12 cmp r3, #18 - 8003ec6: d107 bne.n 8003ed8 + 80047b0: 68fb ldr r3, [r7, #12] + 80047b2: 6b1b ldr r3, [r3, #48] @ 0x30 + 80047b4: 2b12 cmp r3, #18 + 80047b6: d107 bne.n 80047c8 { /* Generate ReStart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003ec8: 68fb ldr r3, [r7, #12] - 8003eca: 681b ldr r3, [r3, #0] - 8003ecc: 681a ldr r2, [r3, #0] - 8003ece: 68fb ldr r3, [r7, #12] - 8003ed0: 681b ldr r3, [r3, #0] - 8003ed2: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003ed6: 601a str r2, [r3, #0] + 80047b8: 68fb ldr r3, [r7, #12] + 80047ba: 681b ldr r3, [r3, #0] + 80047bc: 681a ldr r2, [r3, #0] + 80047be: 68fb ldr r3, [r7, #12] + 80047c0: 681b ldr r3, [r3, #0] + 80047c2: f442 7280 orr.w r2, r2, #256 @ 0x100 + 80047c6: 601a str r2, [r3, #0] { /* Do nothing */ } /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8003ed8: 683b ldr r3, [r7, #0] - 8003eda: 9300 str r3, [sp, #0] - 8003edc: 687b ldr r3, [r7, #4] - 8003ede: 2200 movs r2, #0 - 8003ee0: f04f 1101 mov.w r1, #65537 @ 0x10001 - 8003ee4: 68f8 ldr r0, [r7, #12] - 8003ee6: f000 f91d bl 8004124 - 8003eea: 4603 mov r3, r0 - 8003eec: 2b00 cmp r3, #0 - 8003eee: d00d beq.n 8003f0c + 80047c8: 683b ldr r3, [r7, #0] + 80047ca: 9300 str r3, [sp, #0] + 80047cc: 687b ldr r3, [r7, #4] + 80047ce: 2200 movs r2, #0 + 80047d0: f04f 1101 mov.w r1, #65537 @ 0x10001 + 80047d4: 68f8 ldr r0, [r7, #12] + 80047d6: f000 f91d bl 8004a14 + 80047da: 4603 mov r3, r0 + 80047dc: 2b00 cmp r3, #0 + 80047de: d00d beq.n 80047fc { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 8003ef0: 68fb ldr r3, [r7, #12] - 8003ef2: 681b ldr r3, [r3, #0] - 8003ef4: 681b ldr r3, [r3, #0] - 8003ef6: f403 7380 and.w r3, r3, #256 @ 0x100 - 8003efa: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8003efe: d103 bne.n 8003f08 + 80047e0: 68fb ldr r3, [r7, #12] + 80047e2: 681b ldr r3, [r3, #0] + 80047e4: 681b ldr r3, [r3, #0] + 80047e6: f403 7380 and.w r3, r3, #256 @ 0x100 + 80047ea: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80047ee: d103 bne.n 80047f8 { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 8003f00: 68fb ldr r3, [r7, #12] - 8003f02: f44f 7200 mov.w r2, #512 @ 0x200 - 8003f06: 641a str r2, [r3, #64] @ 0x40 + 80047f0: 68fb ldr r3, [r7, #12] + 80047f2: f44f 7200 mov.w r2, #512 @ 0x200 + 80047f6: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 8003f08: 2303 movs r3, #3 - 8003f0a: e035 b.n 8003f78 + 80047f8: 2303 movs r3, #3 + 80047fa: e035 b.n 8004868 } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 8003f0c: 68fb ldr r3, [r7, #12] - 8003f0e: 691b ldr r3, [r3, #16] - 8003f10: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 - 8003f14: d108 bne.n 8003f28 + 80047fc: 68fb ldr r3, [r7, #12] + 80047fe: 691b ldr r3, [r3, #16] + 8004800: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 + 8004804: d108 bne.n 8004818 { /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress); - 8003f16: 897b ldrh r3, [r7, #10] - 8003f18: b2db uxtb r3, r3 - 8003f1a: 461a mov r2, r3 - 8003f1c: 68fb ldr r3, [r7, #12] - 8003f1e: 681b ldr r3, [r3, #0] - 8003f20: f002 02fe and.w r2, r2, #254 @ 0xfe - 8003f24: 611a str r2, [r3, #16] - 8003f26: e01b b.n 8003f60 + 8004806: 897b ldrh r3, [r7, #10] + 8004808: b2db uxtb r3, r3 + 800480a: 461a mov r2, r3 + 800480c: 68fb ldr r3, [r7, #12] + 800480e: 681b ldr r3, [r3, #0] + 8004810: f002 02fe and.w r2, r2, #254 @ 0xfe + 8004814: 611a str r2, [r3, #16] + 8004816: e01b b.n 8004850 } else { /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); - 8003f28: 897b ldrh r3, [r7, #10] - 8003f2a: 11db asrs r3, r3, #7 - 8003f2c: b2db uxtb r3, r3 - 8003f2e: f003 0306 and.w r3, r3, #6 - 8003f32: b2db uxtb r3, r3 - 8003f34: f063 030f orn r3, r3, #15 - 8003f38: b2da uxtb r2, r3 - 8003f3a: 68fb ldr r3, [r7, #12] - 8003f3c: 681b ldr r3, [r3, #0] - 8003f3e: 611a str r2, [r3, #16] + 8004818: 897b ldrh r3, [r7, #10] + 800481a: 11db asrs r3, r3, #7 + 800481c: b2db uxtb r3, r3 + 800481e: f003 0306 and.w r3, r3, #6 + 8004822: b2db uxtb r3, r3 + 8004824: f063 030f orn r3, r3, #15 + 8004828: b2da uxtb r2, r3 + 800482a: 68fb ldr r3, [r7, #12] + 800482c: 681b ldr r3, [r3, #0] + 800482e: 611a str r2, [r3, #16] /* Wait until ADD10 flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) - 8003f40: 683b ldr r3, [r7, #0] - 8003f42: 687a ldr r2, [r7, #4] - 8003f44: 490e ldr r1, [pc, #56] @ (8003f80 ) - 8003f46: 68f8 ldr r0, [r7, #12] - 8003f48: f000 f966 bl 8004218 - 8003f4c: 4603 mov r3, r0 - 8003f4e: 2b00 cmp r3, #0 - 8003f50: d001 beq.n 8003f56 + 8004830: 683b ldr r3, [r7, #0] + 8004832: 687a ldr r2, [r7, #4] + 8004834: 490e ldr r1, [pc, #56] @ (8004870 ) + 8004836: 68f8 ldr r0, [r7, #12] + 8004838: f000 f966 bl 8004b08 + 800483c: 4603 mov r3, r0 + 800483e: 2b00 cmp r3, #0 + 8004840: d001 beq.n 8004846 { return HAL_ERROR; - 8003f52: 2301 movs r3, #1 - 8003f54: e010 b.n 8003f78 + 8004842: 2301 movs r3, #1 + 8004844: e010 b.n 8004868 } /* Send slave address */ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); - 8003f56: 897b ldrh r3, [r7, #10] - 8003f58: b2da uxtb r2, r3 - 8003f5a: 68fb ldr r3, [r7, #12] - 8003f5c: 681b ldr r3, [r3, #0] - 8003f5e: 611a str r2, [r3, #16] + 8004846: 897b ldrh r3, [r7, #10] + 8004848: b2da uxtb r2, r3 + 800484a: 68fb ldr r3, [r7, #12] + 800484c: 681b ldr r3, [r3, #0] + 800484e: 611a str r2, [r3, #16] } /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 8003f60: 683b ldr r3, [r7, #0] - 8003f62: 687a ldr r2, [r7, #4] - 8003f64: 4907 ldr r1, [pc, #28] @ (8003f84 ) - 8003f66: 68f8 ldr r0, [r7, #12] - 8003f68: f000 f956 bl 8004218 - 8003f6c: 4603 mov r3, r0 - 8003f6e: 2b00 cmp r3, #0 - 8003f70: d001 beq.n 8003f76 + 8004850: 683b ldr r3, [r7, #0] + 8004852: 687a ldr r2, [r7, #4] + 8004854: 4907 ldr r1, [pc, #28] @ (8004874 ) + 8004856: 68f8 ldr r0, [r7, #12] + 8004858: f000 f956 bl 8004b08 + 800485c: 4603 mov r3, r0 + 800485e: 2b00 cmp r3, #0 + 8004860: d001 beq.n 8004866 { return HAL_ERROR; - 8003f72: 2301 movs r3, #1 - 8003f74: e000 b.n 8003f78 + 8004862: 2301 movs r3, #1 + 8004864: e000 b.n 8004868 } return HAL_OK; - 8003f76: 2300 movs r3, #0 + 8004866: 2300 movs r3, #0 } - 8003f78: 4618 mov r0, r3 - 8003f7a: 3718 adds r7, #24 - 8003f7c: 46bd mov sp, r7 - 8003f7e: bd80 pop {r7, pc} - 8003f80: 00010008 .word 0x00010008 - 8003f84: 00010002 .word 0x00010002 + 8004868: 4618 mov r0, r3 + 800486a: 3718 adds r7, #24 + 800486c: 46bd mov sp, r7 + 800486e: bd80 pop {r7, pc} + 8004870: 00010008 .word 0x00010008 + 8004874: 00010002 .word 0x00010002 -08003f88 : +08004878 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart) { - 8003f88: b580 push {r7, lr} - 8003f8a: b088 sub sp, #32 - 8003f8c: af02 add r7, sp, #8 - 8003f8e: 60f8 str r0, [r7, #12] - 8003f90: 607a str r2, [r7, #4] - 8003f92: 603b str r3, [r7, #0] - 8003f94: 460b mov r3, r1 - 8003f96: 817b strh r3, [r7, #10] + 8004878: b580 push {r7, lr} + 800487a: b088 sub sp, #32 + 800487c: af02 add r7, sp, #8 + 800487e: 60f8 str r0, [r7, #12] + 8004880: 607a str r2, [r7, #4] + 8004882: 603b str r3, [r7, #0] + 8004884: 460b mov r3, r1 + 8004886: 817b strh r3, [r7, #10] /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ uint32_t CurrentXferOptions = hi2c->XferOptions; - 8003f98: 68fb ldr r3, [r7, #12] - 8003f9a: 6adb ldr r3, [r3, #44] @ 0x2c - 8003f9c: 617b str r3, [r7, #20] + 8004888: 68fb ldr r3, [r7, #12] + 800488a: 6adb ldr r3, [r3, #44] @ 0x2c + 800488c: 617b str r3, [r7, #20] /* Enable Acknowledge */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); - 8003f9e: 68fb ldr r3, [r7, #12] - 8003fa0: 681b ldr r3, [r3, #0] - 8003fa2: 681a ldr r2, [r3, #0] - 8003fa4: 68fb ldr r3, [r7, #12] - 8003fa6: 681b ldr r3, [r3, #0] - 8003fa8: f442 6280 orr.w r2, r2, #1024 @ 0x400 - 8003fac: 601a str r2, [r3, #0] + 800488e: 68fb ldr r3, [r7, #12] + 8004890: 681b ldr r3, [r3, #0] + 8004892: 681a ldr r2, [r3, #0] + 8004894: 68fb ldr r3, [r7, #12] + 8004896: 681b ldr r3, [r3, #0] + 8004898: f442 6280 orr.w r2, r2, #1024 @ 0x400 + 800489c: 601a str r2, [r3, #0] /* Generate Start condition if first transfer */ if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME)) - 8003fae: 697b ldr r3, [r7, #20] - 8003fb0: 2b08 cmp r3, #8 - 8003fb2: d006 beq.n 8003fc2 - 8003fb4: 697b ldr r3, [r7, #20] - 8003fb6: 2b01 cmp r3, #1 - 8003fb8: d003 beq.n 8003fc2 - 8003fba: 697b ldr r3, [r7, #20] - 8003fbc: f513 3f80 cmn.w r3, #65536 @ 0x10000 - 8003fc0: d108 bne.n 8003fd4 + 800489e: 697b ldr r3, [r7, #20] + 80048a0: 2b08 cmp r3, #8 + 80048a2: d006 beq.n 80048b2 + 80048a4: 697b ldr r3, [r7, #20] + 80048a6: 2b01 cmp r3, #1 + 80048a8: d003 beq.n 80048b2 + 80048aa: 697b ldr r3, [r7, #20] + 80048ac: f513 3f80 cmn.w r3, #65536 @ 0x10000 + 80048b0: d108 bne.n 80048c4 { /* Generate Start */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003fc2: 68fb ldr r3, [r7, #12] - 8003fc4: 681b ldr r3, [r3, #0] - 8003fc6: 681a ldr r2, [r3, #0] - 8003fc8: 68fb ldr r3, [r7, #12] - 8003fca: 681b ldr r3, [r3, #0] - 8003fcc: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003fd0: 601a str r2, [r3, #0] - 8003fd2: e00b b.n 8003fec + 80048b2: 68fb ldr r3, [r7, #12] + 80048b4: 681b ldr r3, [r3, #0] + 80048b6: 681a ldr r2, [r3, #0] + 80048b8: 68fb ldr r3, [r7, #12] + 80048ba: 681b ldr r3, [r3, #0] + 80048bc: f442 7280 orr.w r2, r2, #256 @ 0x100 + 80048c0: 601a str r2, [r3, #0] + 80048c2: e00b b.n 80048dc } else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) - 8003fd4: 68fb ldr r3, [r7, #12] - 8003fd6: 6b1b ldr r3, [r3, #48] @ 0x30 - 8003fd8: 2b11 cmp r3, #17 - 8003fda: d107 bne.n 8003fec + 80048c4: 68fb ldr r3, [r7, #12] + 80048c6: 6b1b ldr r3, [r3, #48] @ 0x30 + 80048c8: 2b11 cmp r3, #17 + 80048ca: d107 bne.n 80048dc { /* Generate ReStart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 8003fdc: 68fb ldr r3, [r7, #12] - 8003fde: 681b ldr r3, [r3, #0] - 8003fe0: 681a ldr r2, [r3, #0] - 8003fe2: 68fb ldr r3, [r7, #12] - 8003fe4: 681b ldr r3, [r3, #0] - 8003fe6: f442 7280 orr.w r2, r2, #256 @ 0x100 - 8003fea: 601a str r2, [r3, #0] + 80048cc: 68fb ldr r3, [r7, #12] + 80048ce: 681b ldr r3, [r3, #0] + 80048d0: 681a ldr r2, [r3, #0] + 80048d2: 68fb ldr r3, [r7, #12] + 80048d4: 681b ldr r3, [r3, #0] + 80048d6: f442 7280 orr.w r2, r2, #256 @ 0x100 + 80048da: 601a str r2, [r3, #0] { /* Do nothing */ } /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 8003fec: 683b ldr r3, [r7, #0] - 8003fee: 9300 str r3, [sp, #0] - 8003ff0: 687b ldr r3, [r7, #4] - 8003ff2: 2200 movs r2, #0 - 8003ff4: f04f 1101 mov.w r1, #65537 @ 0x10001 - 8003ff8: 68f8 ldr r0, [r7, #12] - 8003ffa: f000 f893 bl 8004124 - 8003ffe: 4603 mov r3, r0 - 8004000: 2b00 cmp r3, #0 - 8004002: d00d beq.n 8004020 + 80048dc: 683b ldr r3, [r7, #0] + 80048de: 9300 str r3, [sp, #0] + 80048e0: 687b ldr r3, [r7, #4] + 80048e2: 2200 movs r2, #0 + 80048e4: f04f 1101 mov.w r1, #65537 @ 0x10001 + 80048e8: 68f8 ldr r0, [r7, #12] + 80048ea: f000 f893 bl 8004a14 + 80048ee: 4603 mov r3, r0 + 80048f0: 2b00 cmp r3, #0 + 80048f2: d00d beq.n 8004910 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 8004004: 68fb ldr r3, [r7, #12] - 8004006: 681b ldr r3, [r3, #0] - 8004008: 681b ldr r3, [r3, #0] - 800400a: f403 7380 and.w r3, r3, #256 @ 0x100 - 800400e: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 8004012: d103 bne.n 800401c + 80048f4: 68fb ldr r3, [r7, #12] + 80048f6: 681b ldr r3, [r3, #0] + 80048f8: 681b ldr r3, [r3, #0] + 80048fa: f403 7380 and.w r3, r3, #256 @ 0x100 + 80048fe: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 8004902: d103 bne.n 800490c { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 8004014: 68fb ldr r3, [r7, #12] - 8004016: f44f 7200 mov.w r2, #512 @ 0x200 - 800401a: 641a str r2, [r3, #64] @ 0x40 + 8004904: 68fb ldr r3, [r7, #12] + 8004906: f44f 7200 mov.w r2, #512 @ 0x200 + 800490a: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 800401c: 2303 movs r3, #3 - 800401e: e079 b.n 8004114 + 800490c: 2303 movs r3, #3 + 800490e: e079 b.n 8004a04 } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) - 8004020: 68fb ldr r3, [r7, #12] - 8004022: 691b ldr r3, [r3, #16] - 8004024: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 - 8004028: d108 bne.n 800403c + 8004910: 68fb ldr r3, [r7, #12] + 8004912: 691b ldr r3, [r3, #16] + 8004914: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 + 8004918: d108 bne.n 800492c { /* Send slave address */ hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress); - 800402a: 897b ldrh r3, [r7, #10] - 800402c: b2db uxtb r3, r3 - 800402e: f043 0301 orr.w r3, r3, #1 - 8004032: b2da uxtb r2, r3 - 8004034: 68fb ldr r3, [r7, #12] - 8004036: 681b ldr r3, [r3, #0] - 8004038: 611a str r2, [r3, #16] - 800403a: e05f b.n 80040fc + 800491a: 897b ldrh r3, [r7, #10] + 800491c: b2db uxtb r3, r3 + 800491e: f043 0301 orr.w r3, r3, #1 + 8004922: b2da uxtb r2, r3 + 8004924: 68fb ldr r3, [r7, #12] + 8004926: 681b ldr r3, [r3, #0] + 8004928: 611a str r2, [r3, #16] + 800492a: e05f b.n 80049ec } else { /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress); - 800403c: 897b ldrh r3, [r7, #10] - 800403e: 11db asrs r3, r3, #7 - 8004040: b2db uxtb r3, r3 - 8004042: f003 0306 and.w r3, r3, #6 - 8004046: b2db uxtb r3, r3 - 8004048: f063 030f orn r3, r3, #15 - 800404c: b2da uxtb r2, r3 - 800404e: 68fb ldr r3, [r7, #12] - 8004050: 681b ldr r3, [r3, #0] - 8004052: 611a str r2, [r3, #16] + 800492c: 897b ldrh r3, [r7, #10] + 800492e: 11db asrs r3, r3, #7 + 8004930: b2db uxtb r3, r3 + 8004932: f003 0306 and.w r3, r3, #6 + 8004936: b2db uxtb r3, r3 + 8004938: f063 030f orn r3, r3, #15 + 800493c: b2da uxtb r2, r3 + 800493e: 68fb ldr r3, [r7, #12] + 8004940: 681b ldr r3, [r3, #0] + 8004942: 611a str r2, [r3, #16] /* Wait until ADD10 flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK) - 8004054: 683b ldr r3, [r7, #0] - 8004056: 687a ldr r2, [r7, #4] - 8004058: 4930 ldr r1, [pc, #192] @ (800411c ) - 800405a: 68f8 ldr r0, [r7, #12] - 800405c: f000 f8dc bl 8004218 - 8004060: 4603 mov r3, r0 - 8004062: 2b00 cmp r3, #0 - 8004064: d001 beq.n 800406a + 8004944: 683b ldr r3, [r7, #0] + 8004946: 687a ldr r2, [r7, #4] + 8004948: 4930 ldr r1, [pc, #192] @ (8004a0c ) + 800494a: 68f8 ldr r0, [r7, #12] + 800494c: f000 f8dc bl 8004b08 + 8004950: 4603 mov r3, r0 + 8004952: 2b00 cmp r3, #0 + 8004954: d001 beq.n 800495a { return HAL_ERROR; - 8004066: 2301 movs r3, #1 - 8004068: e054 b.n 8004114 + 8004956: 2301 movs r3, #1 + 8004958: e054 b.n 8004a04 } /* Send slave address */ hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress); - 800406a: 897b ldrh r3, [r7, #10] - 800406c: b2da uxtb r2, r3 - 800406e: 68fb ldr r3, [r7, #12] - 8004070: 681b ldr r3, [r3, #0] - 8004072: 611a str r2, [r3, #16] + 800495a: 897b ldrh r3, [r7, #10] + 800495c: b2da uxtb r2, r3 + 800495e: 68fb ldr r3, [r7, #12] + 8004960: 681b ldr r3, [r3, #0] + 8004962: 611a str r2, [r3, #16] /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 8004074: 683b ldr r3, [r7, #0] - 8004076: 687a ldr r2, [r7, #4] - 8004078: 4929 ldr r1, [pc, #164] @ (8004120 ) - 800407a: 68f8 ldr r0, [r7, #12] - 800407c: f000 f8cc bl 8004218 - 8004080: 4603 mov r3, r0 - 8004082: 2b00 cmp r3, #0 - 8004084: d001 beq.n 800408a + 8004964: 683b ldr r3, [r7, #0] + 8004966: 687a ldr r2, [r7, #4] + 8004968: 4929 ldr r1, [pc, #164] @ (8004a10 ) + 800496a: 68f8 ldr r0, [r7, #12] + 800496c: f000 f8cc bl 8004b08 + 8004970: 4603 mov r3, r0 + 8004972: 2b00 cmp r3, #0 + 8004974: d001 beq.n 800497a { return HAL_ERROR; - 8004086: 2301 movs r3, #1 - 8004088: e044 b.n 8004114 + 8004976: 2301 movs r3, #1 + 8004978: e044 b.n 8004a04 } /* Clear ADDR flag */ __HAL_I2C_CLEAR_ADDRFLAG(hi2c); - 800408a: 2300 movs r3, #0 - 800408c: 613b str r3, [r7, #16] - 800408e: 68fb ldr r3, [r7, #12] - 8004090: 681b ldr r3, [r3, #0] - 8004092: 695b ldr r3, [r3, #20] - 8004094: 613b str r3, [r7, #16] - 8004096: 68fb ldr r3, [r7, #12] - 8004098: 681b ldr r3, [r3, #0] - 800409a: 699b ldr r3, [r3, #24] - 800409c: 613b str r3, [r7, #16] - 800409e: 693b ldr r3, [r7, #16] + 800497a: 2300 movs r3, #0 + 800497c: 613b str r3, [r7, #16] + 800497e: 68fb ldr r3, [r7, #12] + 8004980: 681b ldr r3, [r3, #0] + 8004982: 695b ldr r3, [r3, #20] + 8004984: 613b str r3, [r7, #16] + 8004986: 68fb ldr r3, [r7, #12] + 8004988: 681b ldr r3, [r3, #0] + 800498a: 699b ldr r3, [r3, #24] + 800498c: 613b str r3, [r7, #16] + 800498e: 693b ldr r3, [r7, #16] /* Generate Restart */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); - 80040a0: 68fb ldr r3, [r7, #12] - 80040a2: 681b ldr r3, [r3, #0] - 80040a4: 681a ldr r2, [r3, #0] - 80040a6: 68fb ldr r3, [r7, #12] - 80040a8: 681b ldr r3, [r3, #0] - 80040aa: f442 7280 orr.w r2, r2, #256 @ 0x100 - 80040ae: 601a str r2, [r3, #0] + 8004990: 68fb ldr r3, [r7, #12] + 8004992: 681b ldr r3, [r3, #0] + 8004994: 681a ldr r2, [r3, #0] + 8004996: 68fb ldr r3, [r7, #12] + 8004998: 681b ldr r3, [r3, #0] + 800499a: f442 7280 orr.w r2, r2, #256 @ 0x100 + 800499e: 601a str r2, [r3, #0] /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) - 80040b0: 683b ldr r3, [r7, #0] - 80040b2: 9300 str r3, [sp, #0] - 80040b4: 687b ldr r3, [r7, #4] - 80040b6: 2200 movs r2, #0 - 80040b8: f04f 1101 mov.w r1, #65537 @ 0x10001 - 80040bc: 68f8 ldr r0, [r7, #12] - 80040be: f000 f831 bl 8004124 - 80040c2: 4603 mov r3, r0 - 80040c4: 2b00 cmp r3, #0 - 80040c6: d00d beq.n 80040e4 + 80049a0: 683b ldr r3, [r7, #0] + 80049a2: 9300 str r3, [sp, #0] + 80049a4: 687b ldr r3, [r7, #4] + 80049a6: 2200 movs r2, #0 + 80049a8: f04f 1101 mov.w r1, #65537 @ 0x10001 + 80049ac: 68f8 ldr r0, [r7, #12] + 80049ae: f000 f831 bl 8004a14 + 80049b2: 4603 mov r3, r0 + 80049b4: 2b00 cmp r3, #0 + 80049b6: d00d beq.n 80049d4 { if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START) - 80040c8: 68fb ldr r3, [r7, #12] - 80040ca: 681b ldr r3, [r3, #0] - 80040cc: 681b ldr r3, [r3, #0] - 80040ce: f403 7380 and.w r3, r3, #256 @ 0x100 - 80040d2: f5b3 7f80 cmp.w r3, #256 @ 0x100 - 80040d6: d103 bne.n 80040e0 + 80049b8: 68fb ldr r3, [r7, #12] + 80049ba: 681b ldr r3, [r3, #0] + 80049bc: 681b ldr r3, [r3, #0] + 80049be: f403 7380 and.w r3, r3, #256 @ 0x100 + 80049c2: f5b3 7f80 cmp.w r3, #256 @ 0x100 + 80049c6: d103 bne.n 80049d0 { hi2c->ErrorCode = HAL_I2C_WRONG_START; - 80040d8: 68fb ldr r3, [r7, #12] - 80040da: f44f 7200 mov.w r2, #512 @ 0x200 - 80040de: 641a str r2, [r3, #64] @ 0x40 + 80049c8: 68fb ldr r3, [r7, #12] + 80049ca: f44f 7200 mov.w r2, #512 @ 0x200 + 80049ce: 641a str r2, [r3, #64] @ 0x40 } return HAL_TIMEOUT; - 80040e0: 2303 movs r3, #3 - 80040e2: e017 b.n 8004114 + 80049d0: 2303 movs r3, #3 + 80049d2: e017 b.n 8004a04 } /* Send header of slave address */ hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress); - 80040e4: 897b ldrh r3, [r7, #10] - 80040e6: 11db asrs r3, r3, #7 - 80040e8: b2db uxtb r3, r3 - 80040ea: f003 0306 and.w r3, r3, #6 - 80040ee: b2db uxtb r3, r3 - 80040f0: f063 030e orn r3, r3, #14 - 80040f4: b2da uxtb r2, r3 - 80040f6: 68fb ldr r3, [r7, #12] - 80040f8: 681b ldr r3, [r3, #0] - 80040fa: 611a str r2, [r3, #16] + 80049d4: 897b ldrh r3, [r7, #10] + 80049d6: 11db asrs r3, r3, #7 + 80049d8: b2db uxtb r3, r3 + 80049da: f003 0306 and.w r3, r3, #6 + 80049de: b2db uxtb r3, r3 + 80049e0: f063 030e orn r3, r3, #14 + 80049e4: b2da uxtb r2, r3 + 80049e6: 68fb ldr r3, [r7, #12] + 80049e8: 681b ldr r3, [r3, #0] + 80049ea: 611a str r2, [r3, #16] } /* Wait until ADDR flag is set */ if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK) - 80040fc: 683b ldr r3, [r7, #0] - 80040fe: 687a ldr r2, [r7, #4] - 8004100: 4907 ldr r1, [pc, #28] @ (8004120 ) - 8004102: 68f8 ldr r0, [r7, #12] - 8004104: f000 f888 bl 8004218 - 8004108: 4603 mov r3, r0 - 800410a: 2b00 cmp r3, #0 - 800410c: d001 beq.n 8004112 + 80049ec: 683b ldr r3, [r7, #0] + 80049ee: 687a ldr r2, [r7, #4] + 80049f0: 4907 ldr r1, [pc, #28] @ (8004a10 ) + 80049f2: 68f8 ldr r0, [r7, #12] + 80049f4: f000 f888 bl 8004b08 + 80049f8: 4603 mov r3, r0 + 80049fa: 2b00 cmp r3, #0 + 80049fc: d001 beq.n 8004a02 { return HAL_ERROR; - 800410e: 2301 movs r3, #1 - 8004110: e000 b.n 8004114 + 80049fe: 2301 movs r3, #1 + 8004a00: e000 b.n 8004a04 } return HAL_OK; - 8004112: 2300 movs r3, #0 + 8004a02: 2300 movs r3, #0 } - 8004114: 4618 mov r0, r3 - 8004116: 3718 adds r7, #24 - 8004118: 46bd mov sp, r7 - 800411a: bd80 pop {r7, pc} - 800411c: 00010008 .word 0x00010008 - 8004120: 00010002 .word 0x00010002 + 8004a04: 4618 mov r0, r3 + 8004a06: 3718 adds r7, #24 + 8004a08: 46bd mov sp, r7 + 8004a0a: bd80 pop {r7, pc} + 8004a0c: 00010008 .word 0x00010008 + 8004a10: 00010002 .word 0x00010002 -08004124 : +08004a14 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { - 8004124: b580 push {r7, lr} - 8004126: b084 sub sp, #16 - 8004128: af00 add r7, sp, #0 - 800412a: 60f8 str r0, [r7, #12] - 800412c: 60b9 str r1, [r7, #8] - 800412e: 603b str r3, [r7, #0] - 8004130: 4613 mov r3, r2 - 8004132: 71fb strb r3, [r7, #7] + 8004a14: b580 push {r7, lr} + 8004a16: b084 sub sp, #16 + 8004a18: af00 add r7, sp, #0 + 8004a1a: 60f8 str r0, [r7, #12] + 8004a1c: 60b9 str r1, [r7, #8] + 8004a1e: 603b str r3, [r7, #0] + 8004a20: 4613 mov r3, r2 + 8004a22: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - 8004134: e048 b.n 80041c8 + 8004a24: e048 b.n 8004ab8 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8004136: 683b ldr r3, [r7, #0] - 8004138: f1b3 3fff cmp.w r3, #4294967295 - 800413c: d044 beq.n 80041c8 + 8004a26: 683b ldr r3, [r7, #0] + 8004a28: f1b3 3fff cmp.w r3, #4294967295 + 8004a2c: d044 beq.n 8004ab8 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 800413e: f7fe fc27 bl 8002990 - 8004142: 4602 mov r2, r0 - 8004144: 69bb ldr r3, [r7, #24] - 8004146: 1ad3 subs r3, r2, r3 - 8004148: 683a ldr r2, [r7, #0] - 800414a: 429a cmp r2, r3 - 800414c: d302 bcc.n 8004154 - 800414e: 683b ldr r3, [r7, #0] - 8004150: 2b00 cmp r3, #0 - 8004152: d139 bne.n 80041c8 + 8004a2e: f7fe fc27 bl 8003280 + 8004a32: 4602 mov r2, r0 + 8004a34: 69bb ldr r3, [r7, #24] + 8004a36: 1ad3 subs r3, r2, r3 + 8004a38: 683a ldr r2, [r7, #0] + 8004a3a: 429a cmp r2, r3 + 8004a3c: d302 bcc.n 8004a44 + 8004a3e: 683b ldr r3, [r7, #0] + 8004a40: 2b00 cmp r3, #0 + 8004a42: d139 bne.n 8004ab8 { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)) - 8004154: 68bb ldr r3, [r7, #8] - 8004156: 0c1b lsrs r3, r3, #16 - 8004158: b2db uxtb r3, r3 - 800415a: 2b01 cmp r3, #1 - 800415c: d10d bne.n 800417a - 800415e: 68fb ldr r3, [r7, #12] - 8004160: 681b ldr r3, [r3, #0] - 8004162: 695b ldr r3, [r3, #20] - 8004164: 43da mvns r2, r3 - 8004166: 68bb ldr r3, [r7, #8] - 8004168: 4013 ands r3, r2 - 800416a: b29b uxth r3, r3 - 800416c: 2b00 cmp r3, #0 - 800416e: bf0c ite eq - 8004170: 2301 moveq r3, #1 - 8004172: 2300 movne r3, #0 - 8004174: b2db uxtb r3, r3 - 8004176: 461a mov r2, r3 - 8004178: e00c b.n 8004194 - 800417a: 68fb ldr r3, [r7, #12] - 800417c: 681b ldr r3, [r3, #0] - 800417e: 699b ldr r3, [r3, #24] - 8004180: 43da mvns r2, r3 - 8004182: 68bb ldr r3, [r7, #8] - 8004184: 4013 ands r3, r2 - 8004186: b29b uxth r3, r3 - 8004188: 2b00 cmp r3, #0 - 800418a: bf0c ite eq - 800418c: 2301 moveq r3, #1 - 800418e: 2300 movne r3, #0 - 8004190: b2db uxtb r3, r3 - 8004192: 461a mov r2, r3 - 8004194: 79fb ldrb r3, [r7, #7] - 8004196: 429a cmp r2, r3 - 8004198: d116 bne.n 80041c8 + 8004a44: 68bb ldr r3, [r7, #8] + 8004a46: 0c1b lsrs r3, r3, #16 + 8004a48: b2db uxtb r3, r3 + 8004a4a: 2b01 cmp r3, #1 + 8004a4c: d10d bne.n 8004a6a + 8004a4e: 68fb ldr r3, [r7, #12] + 8004a50: 681b ldr r3, [r3, #0] + 8004a52: 695b ldr r3, [r3, #20] + 8004a54: 43da mvns r2, r3 + 8004a56: 68bb ldr r3, [r7, #8] + 8004a58: 4013 ands r3, r2 + 8004a5a: b29b uxth r3, r3 + 8004a5c: 2b00 cmp r3, #0 + 8004a5e: bf0c ite eq + 8004a60: 2301 moveq r3, #1 + 8004a62: 2300 movne r3, #0 + 8004a64: b2db uxtb r3, r3 + 8004a66: 461a mov r2, r3 + 8004a68: e00c b.n 8004a84 + 8004a6a: 68fb ldr r3, [r7, #12] + 8004a6c: 681b ldr r3, [r3, #0] + 8004a6e: 699b ldr r3, [r3, #24] + 8004a70: 43da mvns r2, r3 + 8004a72: 68bb ldr r3, [r7, #8] + 8004a74: 4013 ands r3, r2 + 8004a76: b29b uxth r3, r3 + 8004a78: 2b00 cmp r3, #0 + 8004a7a: bf0c ite eq + 8004a7c: 2301 moveq r3, #1 + 8004a7e: 2300 movne r3, #0 + 8004a80: b2db uxtb r3, r3 + 8004a82: 461a mov r2, r3 + 8004a84: 79fb ldrb r3, [r7, #7] + 8004a86: 429a cmp r2, r3 + 8004a88: d116 bne.n 8004ab8 { hi2c->PreviousState = I2C_STATE_NONE; - 800419a: 68fb ldr r3, [r7, #12] - 800419c: 2200 movs r2, #0 - 800419e: 631a str r2, [r3, #48] @ 0x30 + 8004a8a: 68fb ldr r3, [r7, #12] + 8004a8c: 2200 movs r2, #0 + 8004a8e: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 80041a0: 68fb ldr r3, [r7, #12] - 80041a2: 2220 movs r2, #32 - 80041a4: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004a90: 68fb ldr r3, [r7, #12] + 8004a92: 2220 movs r2, #32 + 8004a94: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80041a8: 68fb ldr r3, [r7, #12] - 80041aa: 2200 movs r2, #0 - 80041ac: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004a98: 68fb ldr r3, [r7, #12] + 8004a9a: 2200 movs r2, #0 + 8004a9c: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 80041b0: 68fb ldr r3, [r7, #12] - 80041b2: 6c1b ldr r3, [r3, #64] @ 0x40 - 80041b4: f043 0220 orr.w r2, r3, #32 - 80041b8: 68fb ldr r3, [r7, #12] - 80041ba: 641a str r2, [r3, #64] @ 0x40 + 8004aa0: 68fb ldr r3, [r7, #12] + 8004aa2: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004aa4: f043 0220 orr.w r2, r3, #32 + 8004aa8: 68fb ldr r3, [r7, #12] + 8004aaa: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80041bc: 68fb ldr r3, [r7, #12] - 80041be: 2200 movs r2, #0 - 80041c0: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004aac: 68fb ldr r3, [r7, #12] + 8004aae: 2200 movs r2, #0 + 8004ab0: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 80041c4: 2301 movs r3, #1 - 80041c6: e023 b.n 8004210 + 8004ab4: 2301 movs r3, #1 + 8004ab6: e023 b.n 8004b00 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) - 80041c8: 68bb ldr r3, [r7, #8] - 80041ca: 0c1b lsrs r3, r3, #16 - 80041cc: b2db uxtb r3, r3 - 80041ce: 2b01 cmp r3, #1 - 80041d0: d10d bne.n 80041ee - 80041d2: 68fb ldr r3, [r7, #12] - 80041d4: 681b ldr r3, [r3, #0] - 80041d6: 695b ldr r3, [r3, #20] - 80041d8: 43da mvns r2, r3 - 80041da: 68bb ldr r3, [r7, #8] - 80041dc: 4013 ands r3, r2 - 80041de: b29b uxth r3, r3 - 80041e0: 2b00 cmp r3, #0 - 80041e2: bf0c ite eq - 80041e4: 2301 moveq r3, #1 - 80041e6: 2300 movne r3, #0 - 80041e8: b2db uxtb r3, r3 - 80041ea: 461a mov r2, r3 - 80041ec: e00c b.n 8004208 - 80041ee: 68fb ldr r3, [r7, #12] - 80041f0: 681b ldr r3, [r3, #0] - 80041f2: 699b ldr r3, [r3, #24] - 80041f4: 43da mvns r2, r3 - 80041f6: 68bb ldr r3, [r7, #8] - 80041f8: 4013 ands r3, r2 - 80041fa: b29b uxth r3, r3 - 80041fc: 2b00 cmp r3, #0 - 80041fe: bf0c ite eq - 8004200: 2301 moveq r3, #1 - 8004202: 2300 movne r3, #0 - 8004204: b2db uxtb r3, r3 - 8004206: 461a mov r2, r3 - 8004208: 79fb ldrb r3, [r7, #7] - 800420a: 429a cmp r2, r3 - 800420c: d093 beq.n 8004136 + 8004ab8: 68bb ldr r3, [r7, #8] + 8004aba: 0c1b lsrs r3, r3, #16 + 8004abc: b2db uxtb r3, r3 + 8004abe: 2b01 cmp r3, #1 + 8004ac0: d10d bne.n 8004ade + 8004ac2: 68fb ldr r3, [r7, #12] + 8004ac4: 681b ldr r3, [r3, #0] + 8004ac6: 695b ldr r3, [r3, #20] + 8004ac8: 43da mvns r2, r3 + 8004aca: 68bb ldr r3, [r7, #8] + 8004acc: 4013 ands r3, r2 + 8004ace: b29b uxth r3, r3 + 8004ad0: 2b00 cmp r3, #0 + 8004ad2: bf0c ite eq + 8004ad4: 2301 moveq r3, #1 + 8004ad6: 2300 movne r3, #0 + 8004ad8: b2db uxtb r3, r3 + 8004ada: 461a mov r2, r3 + 8004adc: e00c b.n 8004af8 + 8004ade: 68fb ldr r3, [r7, #12] + 8004ae0: 681b ldr r3, [r3, #0] + 8004ae2: 699b ldr r3, [r3, #24] + 8004ae4: 43da mvns r2, r3 + 8004ae6: 68bb ldr r3, [r7, #8] + 8004ae8: 4013 ands r3, r2 + 8004aea: b29b uxth r3, r3 + 8004aec: 2b00 cmp r3, #0 + 8004aee: bf0c ite eq + 8004af0: 2301 moveq r3, #1 + 8004af2: 2300 movne r3, #0 + 8004af4: b2db uxtb r3, r3 + 8004af6: 461a mov r2, r3 + 8004af8: 79fb ldrb r3, [r7, #7] + 8004afa: 429a cmp r2, r3 + 8004afc: d093 beq.n 8004a26 } } } } return HAL_OK; - 800420e: 2300 movs r3, #0 + 8004afe: 2300 movs r3, #0 } - 8004210: 4618 mov r0, r3 - 8004212: 3710 adds r7, #16 - 8004214: 46bd mov sp, r7 - 8004216: bd80 pop {r7, pc} + 8004b00: 4618 mov r0, r3 + 8004b02: 3710 adds r7, #16 + 8004b04: 46bd mov sp, r7 + 8004b06: bd80 pop {r7, pc} -08004218 : +08004b08 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart) { - 8004218: b580 push {r7, lr} - 800421a: b084 sub sp, #16 - 800421c: af00 add r7, sp, #0 - 800421e: 60f8 str r0, [r7, #12] - 8004220: 60b9 str r1, [r7, #8] - 8004222: 607a str r2, [r7, #4] - 8004224: 603b str r3, [r7, #0] + 8004b08: b580 push {r7, lr} + 8004b0a: b084 sub sp, #16 + 8004b0c: af00 add r7, sp, #0 + 8004b0e: 60f8 str r0, [r7, #12] + 8004b10: 60b9 str r1, [r7, #8] + 8004b12: 607a str r2, [r7, #4] + 8004b14: 603b str r3, [r7, #0] while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) - 8004226: e071 b.n 800430c + 8004b16: e071 b.n 8004bfc { if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 8004228: 68fb ldr r3, [r7, #12] - 800422a: 681b ldr r3, [r3, #0] - 800422c: 695b ldr r3, [r3, #20] - 800422e: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8004232: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 8004236: d123 bne.n 8004280 + 8004b18: 68fb ldr r3, [r7, #12] + 8004b1a: 681b ldr r3, [r3, #0] + 8004b1c: 695b ldr r3, [r3, #20] + 8004b1e: f403 6380 and.w r3, r3, #1024 @ 0x400 + 8004b22: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 8004b26: d123 bne.n 8004b70 { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); - 8004238: 68fb ldr r3, [r7, #12] - 800423a: 681b ldr r3, [r3, #0] - 800423c: 681a ldr r2, [r3, #0] - 800423e: 68fb ldr r3, [r7, #12] - 8004240: 681b ldr r3, [r3, #0] - 8004242: f442 7200 orr.w r2, r2, #512 @ 0x200 - 8004246: 601a str r2, [r3, #0] + 8004b28: 68fb ldr r3, [r7, #12] + 8004b2a: 681b ldr r3, [r3, #0] + 8004b2c: 681a ldr r2, [r3, #0] + 8004b2e: 68fb ldr r3, [r7, #12] + 8004b30: 681b ldr r3, [r3, #0] + 8004b32: f442 7200 orr.w r2, r2, #512 @ 0x200 + 8004b36: 601a str r2, [r3, #0] /* Clear AF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 8004248: 68fb ldr r3, [r7, #12] - 800424a: 681b ldr r3, [r3, #0] - 800424c: f46f 6280 mvn.w r2, #1024 @ 0x400 - 8004250: 615a str r2, [r3, #20] + 8004b38: 68fb ldr r3, [r7, #12] + 8004b3a: 681b ldr r3, [r3, #0] + 8004b3c: f46f 6280 mvn.w r2, #1024 @ 0x400 + 8004b40: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 8004252: 68fb ldr r3, [r7, #12] - 8004254: 2200 movs r2, #0 - 8004256: 631a str r2, [r3, #48] @ 0x30 + 8004b42: 68fb ldr r3, [r7, #12] + 8004b44: 2200 movs r2, #0 + 8004b46: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004258: 68fb ldr r3, [r7, #12] - 800425a: 2220 movs r2, #32 - 800425c: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004b48: 68fb ldr r3, [r7, #12] + 8004b4a: 2220 movs r2, #32 + 8004b4c: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004260: 68fb ldr r3, [r7, #12] - 8004262: 2200 movs r2, #0 - 8004264: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004b50: 68fb ldr r3, [r7, #12] + 8004b52: 2200 movs r2, #0 + 8004b54: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 8004268: 68fb ldr r3, [r7, #12] - 800426a: 6c1b ldr r3, [r3, #64] @ 0x40 - 800426c: f043 0204 orr.w r2, r3, #4 - 8004270: 68fb ldr r3, [r7, #12] - 8004272: 641a str r2, [r3, #64] @ 0x40 + 8004b58: 68fb ldr r3, [r7, #12] + 8004b5a: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004b5c: f043 0204 orr.w r2, r3, #4 + 8004b60: 68fb ldr r3, [r7, #12] + 8004b62: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004274: 68fb ldr r3, [r7, #12] - 8004276: 2200 movs r2, #0 - 8004278: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004b64: 68fb ldr r3, [r7, #12] + 8004b66: 2200 movs r2, #0 + 8004b68: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 800427c: 2301 movs r3, #1 - 800427e: e067 b.n 8004350 + 8004b6c: 2301 movs r3, #1 + 8004b6e: e067 b.n 8004c40 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8004280: 687b ldr r3, [r7, #4] - 8004282: f1b3 3fff cmp.w r3, #4294967295 - 8004286: d041 beq.n 800430c + 8004b70: 687b ldr r3, [r7, #4] + 8004b72: f1b3 3fff cmp.w r3, #4294967295 + 8004b76: d041 beq.n 8004bfc { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8004288: f7fe fb82 bl 8002990 - 800428c: 4602 mov r2, r0 - 800428e: 683b ldr r3, [r7, #0] - 8004290: 1ad3 subs r3, r2, r3 - 8004292: 687a ldr r2, [r7, #4] - 8004294: 429a cmp r2, r3 - 8004296: d302 bcc.n 800429e - 8004298: 687b ldr r3, [r7, #4] - 800429a: 2b00 cmp r3, #0 - 800429c: d136 bne.n 800430c + 8004b78: f7fe fb82 bl 8003280 + 8004b7c: 4602 mov r2, r0 + 8004b7e: 683b ldr r3, [r7, #0] + 8004b80: 1ad3 subs r3, r2, r3 + 8004b82: 687a ldr r2, [r7, #4] + 8004b84: 429a cmp r2, r3 + 8004b86: d302 bcc.n 8004b8e + 8004b88: 687b ldr r3, [r7, #4] + 8004b8a: 2b00 cmp r3, #0 + 8004b8c: d136 bne.n 8004bfc { if ((__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)) - 800429e: 68bb ldr r3, [r7, #8] - 80042a0: 0c1b lsrs r3, r3, #16 - 80042a2: b2db uxtb r3, r3 - 80042a4: 2b01 cmp r3, #1 - 80042a6: d10c bne.n 80042c2 - 80042a8: 68fb ldr r3, [r7, #12] - 80042aa: 681b ldr r3, [r3, #0] - 80042ac: 695b ldr r3, [r3, #20] - 80042ae: 43da mvns r2, r3 - 80042b0: 68bb ldr r3, [r7, #8] - 80042b2: 4013 ands r3, r2 - 80042b4: b29b uxth r3, r3 - 80042b6: 2b00 cmp r3, #0 - 80042b8: bf14 ite ne - 80042ba: 2301 movne r3, #1 - 80042bc: 2300 moveq r3, #0 - 80042be: b2db uxtb r3, r3 - 80042c0: e00b b.n 80042da - 80042c2: 68fb ldr r3, [r7, #12] - 80042c4: 681b ldr r3, [r3, #0] - 80042c6: 699b ldr r3, [r3, #24] - 80042c8: 43da mvns r2, r3 - 80042ca: 68bb ldr r3, [r7, #8] - 80042cc: 4013 ands r3, r2 - 80042ce: b29b uxth r3, r3 - 80042d0: 2b00 cmp r3, #0 - 80042d2: bf14 ite ne - 80042d4: 2301 movne r3, #1 - 80042d6: 2300 moveq r3, #0 - 80042d8: b2db uxtb r3, r3 - 80042da: 2b00 cmp r3, #0 - 80042dc: d016 beq.n 800430c + 8004b8e: 68bb ldr r3, [r7, #8] + 8004b90: 0c1b lsrs r3, r3, #16 + 8004b92: b2db uxtb r3, r3 + 8004b94: 2b01 cmp r3, #1 + 8004b96: d10c bne.n 8004bb2 + 8004b98: 68fb ldr r3, [r7, #12] + 8004b9a: 681b ldr r3, [r3, #0] + 8004b9c: 695b ldr r3, [r3, #20] + 8004b9e: 43da mvns r2, r3 + 8004ba0: 68bb ldr r3, [r7, #8] + 8004ba2: 4013 ands r3, r2 + 8004ba4: b29b uxth r3, r3 + 8004ba6: 2b00 cmp r3, #0 + 8004ba8: bf14 ite ne + 8004baa: 2301 movne r3, #1 + 8004bac: 2300 moveq r3, #0 + 8004bae: b2db uxtb r3, r3 + 8004bb0: e00b b.n 8004bca + 8004bb2: 68fb ldr r3, [r7, #12] + 8004bb4: 681b ldr r3, [r3, #0] + 8004bb6: 699b ldr r3, [r3, #24] + 8004bb8: 43da mvns r2, r3 + 8004bba: 68bb ldr r3, [r7, #8] + 8004bbc: 4013 ands r3, r2 + 8004bbe: b29b uxth r3, r3 + 8004bc0: 2b00 cmp r3, #0 + 8004bc2: bf14 ite ne + 8004bc4: 2301 movne r3, #1 + 8004bc6: 2300 moveq r3, #0 + 8004bc8: b2db uxtb r3, r3 + 8004bca: 2b00 cmp r3, #0 + 8004bcc: d016 beq.n 8004bfc { hi2c->PreviousState = I2C_STATE_NONE; - 80042de: 68fb ldr r3, [r7, #12] - 80042e0: 2200 movs r2, #0 - 80042e2: 631a str r2, [r3, #48] @ 0x30 + 8004bce: 68fb ldr r3, [r7, #12] + 8004bd0: 2200 movs r2, #0 + 8004bd2: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 80042e4: 68fb ldr r3, [r7, #12] - 80042e6: 2220 movs r2, #32 - 80042e8: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004bd4: 68fb ldr r3, [r7, #12] + 8004bd6: 2220 movs r2, #32 + 8004bd8: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80042ec: 68fb ldr r3, [r7, #12] - 80042ee: 2200 movs r2, #0 - 80042f0: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004bdc: 68fb ldr r3, [r7, #12] + 8004bde: 2200 movs r2, #0 + 8004be0: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 80042f4: 68fb ldr r3, [r7, #12] - 80042f6: 6c1b ldr r3, [r3, #64] @ 0x40 - 80042f8: f043 0220 orr.w r2, r3, #32 - 80042fc: 68fb ldr r3, [r7, #12] - 80042fe: 641a str r2, [r3, #64] @ 0x40 + 8004be4: 68fb ldr r3, [r7, #12] + 8004be6: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004be8: f043 0220 orr.w r2, r3, #32 + 8004bec: 68fb ldr r3, [r7, #12] + 8004bee: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004300: 68fb ldr r3, [r7, #12] - 8004302: 2200 movs r2, #0 - 8004304: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004bf0: 68fb ldr r3, [r7, #12] + 8004bf2: 2200 movs r2, #0 + 8004bf4: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004308: 2301 movs r3, #1 - 800430a: e021 b.n 8004350 + 8004bf8: 2301 movs r3, #1 + 8004bfa: e021 b.n 8004c40 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET) - 800430c: 68bb ldr r3, [r7, #8] - 800430e: 0c1b lsrs r3, r3, #16 - 8004310: b2db uxtb r3, r3 - 8004312: 2b01 cmp r3, #1 - 8004314: d10c bne.n 8004330 - 8004316: 68fb ldr r3, [r7, #12] - 8004318: 681b ldr r3, [r3, #0] - 800431a: 695b ldr r3, [r3, #20] - 800431c: 43da mvns r2, r3 - 800431e: 68bb ldr r3, [r7, #8] - 8004320: 4013 ands r3, r2 - 8004322: b29b uxth r3, r3 - 8004324: 2b00 cmp r3, #0 - 8004326: bf14 ite ne - 8004328: 2301 movne r3, #1 - 800432a: 2300 moveq r3, #0 - 800432c: b2db uxtb r3, r3 - 800432e: e00b b.n 8004348 - 8004330: 68fb ldr r3, [r7, #12] - 8004332: 681b ldr r3, [r3, #0] - 8004334: 699b ldr r3, [r3, #24] - 8004336: 43da mvns r2, r3 - 8004338: 68bb ldr r3, [r7, #8] - 800433a: 4013 ands r3, r2 - 800433c: b29b uxth r3, r3 - 800433e: 2b00 cmp r3, #0 - 8004340: bf14 ite ne - 8004342: 2301 movne r3, #1 - 8004344: 2300 moveq r3, #0 - 8004346: b2db uxtb r3, r3 - 8004348: 2b00 cmp r3, #0 - 800434a: f47f af6d bne.w 8004228 + 8004bfc: 68bb ldr r3, [r7, #8] + 8004bfe: 0c1b lsrs r3, r3, #16 + 8004c00: b2db uxtb r3, r3 + 8004c02: 2b01 cmp r3, #1 + 8004c04: d10c bne.n 8004c20 + 8004c06: 68fb ldr r3, [r7, #12] + 8004c08: 681b ldr r3, [r3, #0] + 8004c0a: 695b ldr r3, [r3, #20] + 8004c0c: 43da mvns r2, r3 + 8004c0e: 68bb ldr r3, [r7, #8] + 8004c10: 4013 ands r3, r2 + 8004c12: b29b uxth r3, r3 + 8004c14: 2b00 cmp r3, #0 + 8004c16: bf14 ite ne + 8004c18: 2301 movne r3, #1 + 8004c1a: 2300 moveq r3, #0 + 8004c1c: b2db uxtb r3, r3 + 8004c1e: e00b b.n 8004c38 + 8004c20: 68fb ldr r3, [r7, #12] + 8004c22: 681b ldr r3, [r3, #0] + 8004c24: 699b ldr r3, [r3, #24] + 8004c26: 43da mvns r2, r3 + 8004c28: 68bb ldr r3, [r7, #8] + 8004c2a: 4013 ands r3, r2 + 8004c2c: b29b uxth r3, r3 + 8004c2e: 2b00 cmp r3, #0 + 8004c30: bf14 ite ne + 8004c32: 2301 movne r3, #1 + 8004c34: 2300 moveq r3, #0 + 8004c36: b2db uxtb r3, r3 + 8004c38: 2b00 cmp r3, #0 + 8004c3a: f47f af6d bne.w 8004b18 } } } } return HAL_OK; - 800434e: 2300 movs r3, #0 + 8004c3e: 2300 movs r3, #0 } - 8004350: 4618 mov r0, r3 - 8004352: 3710 adds r7, #16 - 8004354: 46bd mov sp, r7 - 8004356: bd80 pop {r7, pc} + 8004c40: 4618 mov r0, r3 + 8004c42: 3710 adds r7, #16 + 8004c44: 46bd mov sp, r7 + 8004c46: bd80 pop {r7, pc} -08004358 : +08004c48 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 8004358: b580 push {r7, lr} - 800435a: b084 sub sp, #16 - 800435c: af00 add r7, sp, #0 - 800435e: 60f8 str r0, [r7, #12] - 8004360: 60b9 str r1, [r7, #8] - 8004362: 607a str r2, [r7, #4] + 8004c48: b580 push {r7, lr} + 8004c4a: b084 sub sp, #16 + 8004c4c: af00 add r7, sp, #0 + 8004c4e: 60f8 str r0, [r7, #12] + 8004c50: 60b9 str r1, [r7, #8] + 8004c52: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 8004364: e034 b.n 80043d0 + 8004c54: e034 b.n 8004cc0 { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) - 8004366: 68f8 ldr r0, [r7, #12] - 8004368: f000 f8e3 bl 8004532 - 800436c: 4603 mov r3, r0 - 800436e: 2b00 cmp r3, #0 - 8004370: d001 beq.n 8004376 + 8004c56: 68f8 ldr r0, [r7, #12] + 8004c58: f000 f8e3 bl 8004e22 + 8004c5c: 4603 mov r3, r0 + 8004c5e: 2b00 cmp r3, #0 + 8004c60: d001 beq.n 8004c66 { return HAL_ERROR; - 8004372: 2301 movs r3, #1 - 8004374: e034 b.n 80043e0 + 8004c62: 2301 movs r3, #1 + 8004c64: e034 b.n 8004cd0 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8004376: 68bb ldr r3, [r7, #8] - 8004378: f1b3 3fff cmp.w r3, #4294967295 - 800437c: d028 beq.n 80043d0 + 8004c66: 68bb ldr r3, [r7, #8] + 8004c68: f1b3 3fff cmp.w r3, #4294967295 + 8004c6c: d028 beq.n 8004cc0 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 800437e: f7fe fb07 bl 8002990 - 8004382: 4602 mov r2, r0 - 8004384: 687b ldr r3, [r7, #4] - 8004386: 1ad3 subs r3, r2, r3 - 8004388: 68ba ldr r2, [r7, #8] - 800438a: 429a cmp r2, r3 - 800438c: d302 bcc.n 8004394 - 800438e: 68bb ldr r3, [r7, #8] - 8004390: 2b00 cmp r3, #0 - 8004392: d11d bne.n 80043d0 + 8004c6e: f7fe fb07 bl 8003280 + 8004c72: 4602 mov r2, r0 + 8004c74: 687b ldr r3, [r7, #4] + 8004c76: 1ad3 subs r3, r2, r3 + 8004c78: 68ba ldr r2, [r7, #8] + 8004c7a: 429a cmp r2, r3 + 8004c7c: d302 bcc.n 8004c84 + 8004c7e: 68bb ldr r3, [r7, #8] + 8004c80: 2b00 cmp r3, #0 + 8004c82: d11d bne.n 8004cc0 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)) - 8004394: 68fb ldr r3, [r7, #12] - 8004396: 681b ldr r3, [r3, #0] - 8004398: 695b ldr r3, [r3, #20] - 800439a: f003 0380 and.w r3, r3, #128 @ 0x80 - 800439e: 2b80 cmp r3, #128 @ 0x80 - 80043a0: d016 beq.n 80043d0 + 8004c84: 68fb ldr r3, [r7, #12] + 8004c86: 681b ldr r3, [r3, #0] + 8004c88: 695b ldr r3, [r3, #20] + 8004c8a: f003 0380 and.w r3, r3, #128 @ 0x80 + 8004c8e: 2b80 cmp r3, #128 @ 0x80 + 8004c90: d016 beq.n 8004cc0 { hi2c->PreviousState = I2C_STATE_NONE; - 80043a2: 68fb ldr r3, [r7, #12] - 80043a4: 2200 movs r2, #0 - 80043a6: 631a str r2, [r3, #48] @ 0x30 + 8004c92: 68fb ldr r3, [r7, #12] + 8004c94: 2200 movs r2, #0 + 8004c96: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 80043a8: 68fb ldr r3, [r7, #12] - 80043aa: 2220 movs r2, #32 - 80043ac: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004c98: 68fb ldr r3, [r7, #12] + 8004c9a: 2220 movs r2, #32 + 8004c9c: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80043b0: 68fb ldr r3, [r7, #12] - 80043b2: 2200 movs r2, #0 - 80043b4: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004ca0: 68fb ldr r3, [r7, #12] + 8004ca2: 2200 movs r2, #0 + 8004ca4: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 80043b8: 68fb ldr r3, [r7, #12] - 80043ba: 6c1b ldr r3, [r3, #64] @ 0x40 - 80043bc: f043 0220 orr.w r2, r3, #32 - 80043c0: 68fb ldr r3, [r7, #12] - 80043c2: 641a str r2, [r3, #64] @ 0x40 + 8004ca8: 68fb ldr r3, [r7, #12] + 8004caa: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004cac: f043 0220 orr.w r2, r3, #32 + 8004cb0: 68fb ldr r3, [r7, #12] + 8004cb2: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80043c4: 68fb ldr r3, [r7, #12] - 80043c6: 2200 movs r2, #0 - 80043c8: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004cb4: 68fb ldr r3, [r7, #12] + 8004cb6: 2200 movs r2, #0 + 8004cb8: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 80043cc: 2301 movs r3, #1 - 80043ce: e007 b.n 80043e0 + 8004cbc: 2301 movs r3, #1 + 8004cbe: e007 b.n 8004cd0 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) - 80043d0: 68fb ldr r3, [r7, #12] - 80043d2: 681b ldr r3, [r3, #0] - 80043d4: 695b ldr r3, [r3, #20] - 80043d6: f003 0380 and.w r3, r3, #128 @ 0x80 - 80043da: 2b80 cmp r3, #128 @ 0x80 - 80043dc: d1c3 bne.n 8004366 + 8004cc0: 68fb ldr r3, [r7, #12] + 8004cc2: 681b ldr r3, [r3, #0] + 8004cc4: 695b ldr r3, [r3, #20] + 8004cc6: f003 0380 and.w r3, r3, #128 @ 0x80 + 8004cca: 2b80 cmp r3, #128 @ 0x80 + 8004ccc: d1c3 bne.n 8004c56 } } } } return HAL_OK; - 80043de: 2300 movs r3, #0 + 8004cce: 2300 movs r3, #0 } - 80043e0: 4618 mov r0, r3 - 80043e2: 3710 adds r7, #16 - 80043e4: 46bd mov sp, r7 - 80043e6: bd80 pop {r7, pc} + 8004cd0: 4618 mov r0, r3 + 8004cd2: 3710 adds r7, #16 + 8004cd4: 46bd mov sp, r7 + 8004cd6: bd80 pop {r7, pc} -080043e8 : +08004cd8 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 80043e8: b580 push {r7, lr} - 80043ea: b084 sub sp, #16 - 80043ec: af00 add r7, sp, #0 - 80043ee: 60f8 str r0, [r7, #12] - 80043f0: 60b9 str r1, [r7, #8] - 80043f2: 607a str r2, [r7, #4] + 8004cd8: b580 push {r7, lr} + 8004cda: b084 sub sp, #16 + 8004cdc: af00 add r7, sp, #0 + 8004cde: 60f8 str r0, [r7, #12] + 8004ce0: 60b9 str r1, [r7, #8] + 8004ce2: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) - 80043f4: e034 b.n 8004460 + 8004ce4: e034 b.n 8004d50 { /* Check if a NACK is detected */ if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) - 80043f6: 68f8 ldr r0, [r7, #12] - 80043f8: f000 f89b bl 8004532 - 80043fc: 4603 mov r3, r0 - 80043fe: 2b00 cmp r3, #0 - 8004400: d001 beq.n 8004406 + 8004ce6: 68f8 ldr r0, [r7, #12] + 8004ce8: f000 f89b bl 8004e22 + 8004cec: 4603 mov r3, r0 + 8004cee: 2b00 cmp r3, #0 + 8004cf0: d001 beq.n 8004cf6 { return HAL_ERROR; - 8004402: 2301 movs r3, #1 - 8004404: e034 b.n 8004470 + 8004cf2: 2301 movs r3, #1 + 8004cf4: e034 b.n 8004d60 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8004406: 68bb ldr r3, [r7, #8] - 8004408: f1b3 3fff cmp.w r3, #4294967295 - 800440c: d028 beq.n 8004460 + 8004cf6: 68bb ldr r3, [r7, #8] + 8004cf8: f1b3 3fff cmp.w r3, #4294967295 + 8004cfc: d028 beq.n 8004d50 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 800440e: f7fe fabf bl 8002990 - 8004412: 4602 mov r2, r0 - 8004414: 687b ldr r3, [r7, #4] - 8004416: 1ad3 subs r3, r2, r3 - 8004418: 68ba ldr r2, [r7, #8] - 800441a: 429a cmp r2, r3 - 800441c: d302 bcc.n 8004424 - 800441e: 68bb ldr r3, [r7, #8] - 8004420: 2b00 cmp r3, #0 - 8004422: d11d bne.n 8004460 + 8004cfe: f7fe fabf bl 8003280 + 8004d02: 4602 mov r2, r0 + 8004d04: 687b ldr r3, [r7, #4] + 8004d06: 1ad3 subs r3, r2, r3 + 8004d08: 68ba ldr r2, [r7, #8] + 8004d0a: 429a cmp r2, r3 + 8004d0c: d302 bcc.n 8004d14 + 8004d0e: 68bb ldr r3, [r7, #8] + 8004d10: 2b00 cmp r3, #0 + 8004d12: d11d bne.n 8004d50 { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)) - 8004424: 68fb ldr r3, [r7, #12] - 8004426: 681b ldr r3, [r3, #0] - 8004428: 695b ldr r3, [r3, #20] - 800442a: f003 0304 and.w r3, r3, #4 - 800442e: 2b04 cmp r3, #4 - 8004430: d016 beq.n 8004460 + 8004d14: 68fb ldr r3, [r7, #12] + 8004d16: 681b ldr r3, [r3, #0] + 8004d18: 695b ldr r3, [r3, #20] + 8004d1a: f003 0304 and.w r3, r3, #4 + 8004d1e: 2b04 cmp r3, #4 + 8004d20: d016 beq.n 8004d50 { hi2c->PreviousState = I2C_STATE_NONE; - 8004432: 68fb ldr r3, [r7, #12] - 8004434: 2200 movs r2, #0 - 8004436: 631a str r2, [r3, #48] @ 0x30 + 8004d22: 68fb ldr r3, [r7, #12] + 8004d24: 2200 movs r2, #0 + 8004d26: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 8004438: 68fb ldr r3, [r7, #12] - 800443a: 2220 movs r2, #32 - 800443c: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004d28: 68fb ldr r3, [r7, #12] + 8004d2a: 2220 movs r2, #32 + 8004d2c: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004440: 68fb ldr r3, [r7, #12] - 8004442: 2200 movs r2, #0 - 8004444: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004d30: 68fb ldr r3, [r7, #12] + 8004d32: 2200 movs r2, #0 + 8004d34: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8004448: 68fb ldr r3, [r7, #12] - 800444a: 6c1b ldr r3, [r3, #64] @ 0x40 - 800444c: f043 0220 orr.w r2, r3, #32 - 8004450: 68fb ldr r3, [r7, #12] - 8004452: 641a str r2, [r3, #64] @ 0x40 + 8004d38: 68fb ldr r3, [r7, #12] + 8004d3a: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004d3c: f043 0220 orr.w r2, r3, #32 + 8004d40: 68fb ldr r3, [r7, #12] + 8004d42: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004454: 68fb ldr r3, [r7, #12] - 8004456: 2200 movs r2, #0 - 8004458: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004d44: 68fb ldr r3, [r7, #12] + 8004d46: 2200 movs r2, #0 + 8004d48: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 800445c: 2301 movs r3, #1 - 800445e: e007 b.n 8004470 + 8004d4c: 2301 movs r3, #1 + 8004d4e: e007 b.n 8004d60 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) - 8004460: 68fb ldr r3, [r7, #12] - 8004462: 681b ldr r3, [r3, #0] - 8004464: 695b ldr r3, [r3, #20] - 8004466: f003 0304 and.w r3, r3, #4 - 800446a: 2b04 cmp r3, #4 - 800446c: d1c3 bne.n 80043f6 + 8004d50: 68fb ldr r3, [r7, #12] + 8004d52: 681b ldr r3, [r3, #0] + 8004d54: 695b ldr r3, [r3, #20] + 8004d56: f003 0304 and.w r3, r3, #4 + 8004d5a: 2b04 cmp r3, #4 + 8004d5c: d1c3 bne.n 8004ce6 } } } } return HAL_OK; - 800446e: 2300 movs r3, #0 + 8004d5e: 2300 movs r3, #0 } - 8004470: 4618 mov r0, r3 - 8004472: 3710 adds r7, #16 - 8004474: 46bd mov sp, r7 - 8004476: bd80 pop {r7, pc} + 8004d60: 4618 mov r0, r3 + 8004d62: 3710 adds r7, #16 + 8004d64: 46bd mov sp, r7 + 8004d66: bd80 pop {r7, pc} -08004478 : +08004d68 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - 8004478: b580 push {r7, lr} - 800447a: b084 sub sp, #16 - 800447c: af00 add r7, sp, #0 - 800447e: 60f8 str r0, [r7, #12] - 8004480: 60b9 str r1, [r7, #8] - 8004482: 607a str r2, [r7, #4] + 8004d68: b580 push {r7, lr} + 8004d6a: b084 sub sp, #16 + 8004d6c: af00 add r7, sp, #0 + 8004d6e: 60f8 str r0, [r7, #12] + 8004d70: 60b9 str r1, [r7, #8] + 8004d72: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - 8004484: e049 b.n 800451a + 8004d74: e049 b.n 8004e0a { /* Check if a STOPF is detected */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) - 8004486: 68fb ldr r3, [r7, #12] - 8004488: 681b ldr r3, [r3, #0] - 800448a: 695b ldr r3, [r3, #20] - 800448c: f003 0310 and.w r3, r3, #16 - 8004490: 2b10 cmp r3, #16 - 8004492: d119 bne.n 80044c8 + 8004d76: 68fb ldr r3, [r7, #12] + 8004d78: 681b ldr r3, [r3, #0] + 8004d7a: 695b ldr r3, [r3, #20] + 8004d7c: f003 0310 and.w r3, r3, #16 + 8004d80: 2b10 cmp r3, #16 + 8004d82: d119 bne.n 8004db8 { /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - 8004494: 68fb ldr r3, [r7, #12] - 8004496: 681b ldr r3, [r3, #0] - 8004498: f06f 0210 mvn.w r2, #16 - 800449c: 615a str r2, [r3, #20] + 8004d84: 68fb ldr r3, [r7, #12] + 8004d86: 681b ldr r3, [r3, #0] + 8004d88: f06f 0210 mvn.w r2, #16 + 8004d8c: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 800449e: 68fb ldr r3, [r7, #12] - 80044a0: 2200 movs r2, #0 - 80044a2: 631a str r2, [r3, #48] @ 0x30 + 8004d8e: 68fb ldr r3, [r7, #12] + 8004d90: 2200 movs r2, #0 + 8004d92: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 80044a4: 68fb ldr r3, [r7, #12] - 80044a6: 2220 movs r2, #32 - 80044a8: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004d94: 68fb ldr r3, [r7, #12] + 8004d96: 2220 movs r2, #32 + 8004d98: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80044ac: 68fb ldr r3, [r7, #12] - 80044ae: 2200 movs r2, #0 - 80044b0: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004d9c: 68fb ldr r3, [r7, #12] + 8004d9e: 2200 movs r2, #0 + 8004da0: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_NONE; - 80044b4: 68fb ldr r3, [r7, #12] - 80044b6: 6c1a ldr r2, [r3, #64] @ 0x40 - 80044b8: 68fb ldr r3, [r7, #12] - 80044ba: 641a str r2, [r3, #64] @ 0x40 + 8004da4: 68fb ldr r3, [r7, #12] + 8004da6: 6c1a ldr r2, [r3, #64] @ 0x40 + 8004da8: 68fb ldr r3, [r7, #12] + 8004daa: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 80044bc: 68fb ldr r3, [r7, #12] - 80044be: 2200 movs r2, #0 - 80044c0: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004dac: 68fb ldr r3, [r7, #12] + 8004dae: 2200 movs r2, #0 + 8004db0: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 80044c4: 2301 movs r3, #1 - 80044c6: e030 b.n 800452a + 8004db4: 2301 movs r3, #1 + 8004db6: e030 b.n 8004e1a } /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 80044c8: f7fe fa62 bl 8002990 - 80044cc: 4602 mov r2, r0 - 80044ce: 687b ldr r3, [r7, #4] - 80044d0: 1ad3 subs r3, r2, r3 - 80044d2: 68ba ldr r2, [r7, #8] - 80044d4: 429a cmp r2, r3 - 80044d6: d302 bcc.n 80044de - 80044d8: 68bb ldr r3, [r7, #8] - 80044da: 2b00 cmp r3, #0 - 80044dc: d11d bne.n 800451a + 8004db8: f7fe fa62 bl 8003280 + 8004dbc: 4602 mov r2, r0 + 8004dbe: 687b ldr r3, [r7, #4] + 8004dc0: 1ad3 subs r3, r2, r3 + 8004dc2: 68ba ldr r2, [r7, #8] + 8004dc4: 429a cmp r2, r3 + 8004dc6: d302 bcc.n 8004dce + 8004dc8: 68bb ldr r3, [r7, #8] + 8004dca: 2b00 cmp r3, #0 + 8004dcc: d11d bne.n 8004e0a { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) - 80044de: 68fb ldr r3, [r7, #12] - 80044e0: 681b ldr r3, [r3, #0] - 80044e2: 695b ldr r3, [r3, #20] - 80044e4: f003 0340 and.w r3, r3, #64 @ 0x40 - 80044e8: 2b40 cmp r3, #64 @ 0x40 - 80044ea: d016 beq.n 800451a + 8004dce: 68fb ldr r3, [r7, #12] + 8004dd0: 681b ldr r3, [r3, #0] + 8004dd2: 695b ldr r3, [r3, #20] + 8004dd4: f003 0340 and.w r3, r3, #64 @ 0x40 + 8004dd8: 2b40 cmp r3, #64 @ 0x40 + 8004dda: d016 beq.n 8004e0a { hi2c->PreviousState = I2C_STATE_NONE; - 80044ec: 68fb ldr r3, [r7, #12] - 80044ee: 2200 movs r2, #0 - 80044f0: 631a str r2, [r3, #48] @ 0x30 + 8004ddc: 68fb ldr r3, [r7, #12] + 8004dde: 2200 movs r2, #0 + 8004de0: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 80044f2: 68fb ldr r3, [r7, #12] - 80044f4: 2220 movs r2, #32 - 80044f6: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004de2: 68fb ldr r3, [r7, #12] + 8004de4: 2220 movs r2, #32 + 8004de6: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 80044fa: 68fb ldr r3, [r7, #12] - 80044fc: 2200 movs r2, #0 - 80044fe: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004dea: 68fb ldr r3, [r7, #12] + 8004dec: 2200 movs r2, #0 + 8004dee: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - 8004502: 68fb ldr r3, [r7, #12] - 8004504: 6c1b ldr r3, [r3, #64] @ 0x40 - 8004506: f043 0220 orr.w r2, r3, #32 - 800450a: 68fb ldr r3, [r7, #12] - 800450c: 641a str r2, [r3, #64] @ 0x40 + 8004df2: 68fb ldr r3, [r7, #12] + 8004df4: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004df6: f043 0220 orr.w r2, r3, #32 + 8004dfa: 68fb ldr r3, [r7, #12] + 8004dfc: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 800450e: 68fb ldr r3, [r7, #12] - 8004510: 2200 movs r2, #0 - 8004512: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004dfe: 68fb ldr r3, [r7, #12] + 8004e00: 2200 movs r2, #0 + 8004e02: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 8004516: 2301 movs r3, #1 - 8004518: e007 b.n 800452a + 8004e06: 2301 movs r3, #1 + 8004e08: e007 b.n 8004e1a while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) - 800451a: 68fb ldr r3, [r7, #12] - 800451c: 681b ldr r3, [r3, #0] - 800451e: 695b ldr r3, [r3, #20] - 8004520: f003 0340 and.w r3, r3, #64 @ 0x40 - 8004524: 2b40 cmp r3, #64 @ 0x40 - 8004526: d1ae bne.n 8004486 + 8004e0a: 68fb ldr r3, [r7, #12] + 8004e0c: 681b ldr r3, [r3, #0] + 8004e0e: 695b ldr r3, [r3, #20] + 8004e10: f003 0340 and.w r3, r3, #64 @ 0x40 + 8004e14: 2b40 cmp r3, #64 @ 0x40 + 8004e16: d1ae bne.n 8004d76 } } } return HAL_OK; - 8004528: 2300 movs r3, #0 + 8004e18: 2300 movs r3, #0 } - 800452a: 4618 mov r0, r3 - 800452c: 3710 adds r7, #16 - 800452e: 46bd mov sp, r7 - 8004530: bd80 pop {r7, pc} + 8004e1a: 4618 mov r0, r3 + 8004e1c: 3710 adds r7, #16 + 8004e1e: 46bd mov sp, r7 + 8004e20: bd80 pop {r7, pc} -08004532 : +08004e22 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) { - 8004532: b480 push {r7} - 8004534: b083 sub sp, #12 - 8004536: af00 add r7, sp, #0 - 8004538: 6078 str r0, [r7, #4] + 8004e22: b480 push {r7} + 8004e24: b083 sub sp, #12 + 8004e26: af00 add r7, sp, #0 + 8004e28: 6078 str r0, [r7, #4] if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - 800453a: 687b ldr r3, [r7, #4] - 800453c: 681b ldr r3, [r3, #0] - 800453e: 695b ldr r3, [r3, #20] - 8004540: f403 6380 and.w r3, r3, #1024 @ 0x400 - 8004544: f5b3 6f80 cmp.w r3, #1024 @ 0x400 - 8004548: d11b bne.n 8004582 + 8004e2a: 687b ldr r3, [r7, #4] + 8004e2c: 681b ldr r3, [r3, #0] + 8004e2e: 695b ldr r3, [r3, #20] + 8004e30: f403 6380 and.w r3, r3, #1024 @ 0x400 + 8004e34: f5b3 6f80 cmp.w r3, #1024 @ 0x400 + 8004e38: d11b bne.n 8004e72 { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - 800454a: 687b ldr r3, [r7, #4] - 800454c: 681b ldr r3, [r3, #0] - 800454e: f46f 6280 mvn.w r2, #1024 @ 0x400 - 8004552: 615a str r2, [r3, #20] + 8004e3a: 687b ldr r3, [r7, #4] + 8004e3c: 681b ldr r3, [r3, #0] + 8004e3e: f46f 6280 mvn.w r2, #1024 @ 0x400 + 8004e42: 615a str r2, [r3, #20] hi2c->PreviousState = I2C_STATE_NONE; - 8004554: 687b ldr r3, [r7, #4] - 8004556: 2200 movs r2, #0 - 8004558: 631a str r2, [r3, #48] @ 0x30 + 8004e44: 687b ldr r3, [r7, #4] + 8004e46: 2200 movs r2, #0 + 8004e48: 631a str r2, [r3, #48] @ 0x30 hi2c->State = HAL_I2C_STATE_READY; - 800455a: 687b ldr r3, [r7, #4] - 800455c: 2220 movs r2, #32 - 800455e: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8004e4a: 687b ldr r3, [r7, #4] + 8004e4c: 2220 movs r2, #32 + 8004e4e: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->Mode = HAL_I2C_MODE_NONE; - 8004562: 687b ldr r3, [r7, #4] - 8004564: 2200 movs r2, #0 - 8004566: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8004e52: 687b ldr r3, [r7, #4] + 8004e54: 2200 movs r2, #0 + 8004e56: f883 203e strb.w r2, [r3, #62] @ 0x3e hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - 800456a: 687b ldr r3, [r7, #4] - 800456c: 6c1b ldr r3, [r3, #64] @ 0x40 - 800456e: f043 0204 orr.w r2, r3, #4 - 8004572: 687b ldr r3, [r7, #4] - 8004574: 641a str r2, [r3, #64] @ 0x40 + 8004e5a: 687b ldr r3, [r7, #4] + 8004e5c: 6c1b ldr r3, [r3, #64] @ 0x40 + 8004e5e: f043 0204 orr.w r2, r3, #4 + 8004e62: 687b ldr r3, [r7, #4] + 8004e64: 641a str r2, [r3, #64] @ 0x40 /* Process Unlocked */ __HAL_UNLOCK(hi2c); - 8004576: 687b ldr r3, [r7, #4] - 8004578: 2200 movs r2, #0 - 800457a: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8004e66: 687b ldr r3, [r7, #4] + 8004e68: 2200 movs r2, #0 + 8004e6a: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_ERROR; - 800457e: 2301 movs r3, #1 - 8004580: e000 b.n 8004584 + 8004e6e: 2301 movs r3, #1 + 8004e70: e000 b.n 8004e74 } return HAL_OK; - 8004582: 2300 movs r3, #0 + 8004e72: 2300 movs r3, #0 } - 8004584: 4618 mov r0, r3 - 8004586: 370c adds r7, #12 - 8004588: 46bd mov sp, r7 - 800458a: bc80 pop {r7} - 800458c: 4770 bx lr + 8004e74: 4618 mov r0, r3 + 8004e76: 370c adds r7, #12 + 8004e78: 46bd mov sp, r7 + 8004e7a: bc80 pop {r7} + 8004e7c: 4770 bx lr ... -08004590 : +08004e80 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8004590: b580 push {r7, lr} - 8004592: b086 sub sp, #24 - 8004594: af00 add r7, sp, #0 - 8004596: 6078 str r0, [r7, #4] + 8004e80: b580 push {r7, lr} + 8004e82: b086 sub sp, #24 + 8004e84: af00 add r7, sp, #0 + 8004e86: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) - 8004598: 687b ldr r3, [r7, #4] - 800459a: 2b00 cmp r3, #0 - 800459c: d101 bne.n 80045a2 + 8004e88: 687b ldr r3, [r7, #4] + 8004e8a: 2b00 cmp r3, #0 + 8004e8c: d101 bne.n 8004e92 { return HAL_ERROR; - 800459e: 2301 movs r3, #1 - 80045a0: e272 b.n 8004a88 + 8004e8e: 2301 movs r3, #1 + 8004e90: e272 b.n 8005378 /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 80045a2: 687b ldr r3, [r7, #4] - 80045a4: 681b ldr r3, [r3, #0] - 80045a6: f003 0301 and.w r3, r3, #1 - 80045aa: 2b00 cmp r3, #0 - 80045ac: f000 8087 beq.w 80046be + 8004e92: 687b ldr r3, [r7, #4] + 8004e94: 681b ldr r3, [r3, #0] + 8004e96: f003 0301 and.w r3, r3, #1 + 8004e9a: 2b00 cmp r3, #0 + 8004e9c: f000 8087 beq.w 8004fae { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) - 80045b0: 4b92 ldr r3, [pc, #584] @ (80047fc ) - 80045b2: 685b ldr r3, [r3, #4] - 80045b4: f003 030c and.w r3, r3, #12 - 80045b8: 2b04 cmp r3, #4 - 80045ba: d00c beq.n 80045d6 + 8004ea0: 4b92 ldr r3, [pc, #584] @ (80050ec ) + 8004ea2: 685b ldr r3, [r3, #4] + 8004ea4: f003 030c and.w r3, r3, #12 + 8004ea8: 2b04 cmp r3, #4 + 8004eaa: d00c beq.n 8004ec6 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE))) - 80045bc: 4b8f ldr r3, [pc, #572] @ (80047fc ) - 80045be: 685b ldr r3, [r3, #4] - 80045c0: f003 030c and.w r3, r3, #12 - 80045c4: 2b08 cmp r3, #8 - 80045c6: d112 bne.n 80045ee - 80045c8: 4b8c ldr r3, [pc, #560] @ (80047fc ) - 80045ca: 685b ldr r3, [r3, #4] - 80045cc: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 80045d0: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 80045d4: d10b bne.n 80045ee + 8004eac: 4b8f ldr r3, [pc, #572] @ (80050ec ) + 8004eae: 685b ldr r3, [r3, #4] + 8004eb0: f003 030c and.w r3, r3, #12 + 8004eb4: 2b08 cmp r3, #8 + 8004eb6: d112 bne.n 8004ede + 8004eb8: 4b8c ldr r3, [pc, #560] @ (80050ec ) + 8004eba: 685b ldr r3, [r3, #4] + 8004ebc: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8004ec0: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8004ec4: d10b bne.n 8004ede { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 80045d6: 4b89 ldr r3, [pc, #548] @ (80047fc ) - 80045d8: 681b ldr r3, [r3, #0] - 80045da: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 80045de: 2b00 cmp r3, #0 - 80045e0: d06c beq.n 80046bc - 80045e2: 687b ldr r3, [r7, #4] - 80045e4: 685b ldr r3, [r3, #4] - 80045e6: 2b00 cmp r3, #0 - 80045e8: d168 bne.n 80046bc + 8004ec6: 4b89 ldr r3, [pc, #548] @ (80050ec ) + 8004ec8: 681b ldr r3, [r3, #0] + 8004eca: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004ece: 2b00 cmp r3, #0 + 8004ed0: d06c beq.n 8004fac + 8004ed2: 687b ldr r3, [r7, #4] + 8004ed4: 685b ldr r3, [r3, #4] + 8004ed6: 2b00 cmp r3, #0 + 8004ed8: d168 bne.n 8004fac { return HAL_ERROR; - 80045ea: 2301 movs r3, #1 - 80045ec: e24c b.n 8004a88 + 8004eda: 2301 movs r3, #1 + 8004edc: e24c b.n 8005378 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 80045ee: 687b ldr r3, [r7, #4] - 80045f0: 685b ldr r3, [r3, #4] - 80045f2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 80045f6: d106 bne.n 8004606 - 80045f8: 4b80 ldr r3, [pc, #512] @ (80047fc ) - 80045fa: 681b ldr r3, [r3, #0] - 80045fc: 4a7f ldr r2, [pc, #508] @ (80047fc ) - 80045fe: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 8004602: 6013 str r3, [r2, #0] - 8004604: e02e b.n 8004664 - 8004606: 687b ldr r3, [r7, #4] - 8004608: 685b ldr r3, [r3, #4] - 800460a: 2b00 cmp r3, #0 - 800460c: d10c bne.n 8004628 - 800460e: 4b7b ldr r3, [pc, #492] @ (80047fc ) - 8004610: 681b ldr r3, [r3, #0] - 8004612: 4a7a ldr r2, [pc, #488] @ (80047fc ) - 8004614: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 8004618: 6013 str r3, [r2, #0] - 800461a: 4b78 ldr r3, [pc, #480] @ (80047fc ) - 800461c: 681b ldr r3, [r3, #0] - 800461e: 4a77 ldr r2, [pc, #476] @ (80047fc ) - 8004620: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 8004624: 6013 str r3, [r2, #0] - 8004626: e01d b.n 8004664 - 8004628: 687b ldr r3, [r7, #4] - 800462a: 685b ldr r3, [r3, #4] - 800462c: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 - 8004630: d10c bne.n 800464c - 8004632: 4b72 ldr r3, [pc, #456] @ (80047fc ) - 8004634: 681b ldr r3, [r3, #0] - 8004636: 4a71 ldr r2, [pc, #452] @ (80047fc ) - 8004638: f443 2380 orr.w r3, r3, #262144 @ 0x40000 - 800463c: 6013 str r3, [r2, #0] - 800463e: 4b6f ldr r3, [pc, #444] @ (80047fc ) - 8004640: 681b ldr r3, [r3, #0] - 8004642: 4a6e ldr r2, [pc, #440] @ (80047fc ) - 8004644: f443 3380 orr.w r3, r3, #65536 @ 0x10000 - 8004648: 6013 str r3, [r2, #0] - 800464a: e00b b.n 8004664 - 800464c: 4b6b ldr r3, [pc, #428] @ (80047fc ) - 800464e: 681b ldr r3, [r3, #0] - 8004650: 4a6a ldr r2, [pc, #424] @ (80047fc ) - 8004652: f423 3380 bic.w r3, r3, #65536 @ 0x10000 - 8004656: 6013 str r3, [r2, #0] - 8004658: 4b68 ldr r3, [pc, #416] @ (80047fc ) - 800465a: 681b ldr r3, [r3, #0] - 800465c: 4a67 ldr r2, [pc, #412] @ (80047fc ) - 800465e: f423 2380 bic.w r3, r3, #262144 @ 0x40000 - 8004662: 6013 str r3, [r2, #0] + 8004ede: 687b ldr r3, [r7, #4] + 8004ee0: 685b ldr r3, [r3, #4] + 8004ee2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8004ee6: d106 bne.n 8004ef6 + 8004ee8: 4b80 ldr r3, [pc, #512] @ (80050ec ) + 8004eea: 681b ldr r3, [r3, #0] + 8004eec: 4a7f ldr r2, [pc, #508] @ (80050ec ) + 8004eee: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8004ef2: 6013 str r3, [r2, #0] + 8004ef4: e02e b.n 8004f54 + 8004ef6: 687b ldr r3, [r7, #4] + 8004ef8: 685b ldr r3, [r3, #4] + 8004efa: 2b00 cmp r3, #0 + 8004efc: d10c bne.n 8004f18 + 8004efe: 4b7b ldr r3, [pc, #492] @ (80050ec ) + 8004f00: 681b ldr r3, [r3, #0] + 8004f02: 4a7a ldr r2, [pc, #488] @ (80050ec ) + 8004f04: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 8004f08: 6013 str r3, [r2, #0] + 8004f0a: 4b78 ldr r3, [pc, #480] @ (80050ec ) + 8004f0c: 681b ldr r3, [r3, #0] + 8004f0e: 4a77 ldr r2, [pc, #476] @ (80050ec ) + 8004f10: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 8004f14: 6013 str r3, [r2, #0] + 8004f16: e01d b.n 8004f54 + 8004f18: 687b ldr r3, [r7, #4] + 8004f1a: 685b ldr r3, [r3, #4] + 8004f1c: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 + 8004f20: d10c bne.n 8004f3c + 8004f22: 4b72 ldr r3, [pc, #456] @ (80050ec ) + 8004f24: 681b ldr r3, [r3, #0] + 8004f26: 4a71 ldr r2, [pc, #452] @ (80050ec ) + 8004f28: f443 2380 orr.w r3, r3, #262144 @ 0x40000 + 8004f2c: 6013 str r3, [r2, #0] + 8004f2e: 4b6f ldr r3, [pc, #444] @ (80050ec ) + 8004f30: 681b ldr r3, [r3, #0] + 8004f32: 4a6e ldr r2, [pc, #440] @ (80050ec ) + 8004f34: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8004f38: 6013 str r3, [r2, #0] + 8004f3a: e00b b.n 8004f54 + 8004f3c: 4b6b ldr r3, [pc, #428] @ (80050ec ) + 8004f3e: 681b ldr r3, [r3, #0] + 8004f40: 4a6a ldr r2, [pc, #424] @ (80050ec ) + 8004f42: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 8004f46: 6013 str r3, [r2, #0] + 8004f48: 4b68 ldr r3, [pc, #416] @ (80050ec ) + 8004f4a: 681b ldr r3, [r3, #0] + 8004f4c: 4a67 ldr r2, [pc, #412] @ (80050ec ) + 8004f4e: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 8004f52: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 8004664: 687b ldr r3, [r7, #4] - 8004666: 685b ldr r3, [r3, #4] - 8004668: 2b00 cmp r3, #0 - 800466a: d013 beq.n 8004694 + 8004f54: 687b ldr r3, [r7, #4] + 8004f56: 685b ldr r3, [r3, #4] + 8004f58: 2b00 cmp r3, #0 + 8004f5a: d013 beq.n 8004f84 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 800466c: f7fe f990 bl 8002990 - 8004670: 6138 str r0, [r7, #16] + 8004f5c: f7fe f990 bl 8003280 + 8004f60: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8004672: e008 b.n 8004686 + 8004f62: e008 b.n 8004f76 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 8004674: f7fe f98c bl 8002990 - 8004678: 4602 mov r2, r0 - 800467a: 693b ldr r3, [r7, #16] - 800467c: 1ad3 subs r3, r2, r3 - 800467e: 2b64 cmp r3, #100 @ 0x64 - 8004680: d901 bls.n 8004686 + 8004f64: f7fe f98c bl 8003280 + 8004f68: 4602 mov r2, r0 + 8004f6a: 693b ldr r3, [r7, #16] + 8004f6c: 1ad3 subs r3, r2, r3 + 8004f6e: 2b64 cmp r3, #100 @ 0x64 + 8004f70: d901 bls.n 8004f76 { return HAL_TIMEOUT; - 8004682: 2303 movs r3, #3 - 8004684: e200 b.n 8004a88 + 8004f72: 2303 movs r3, #3 + 8004f74: e200 b.n 8005378 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8004686: 4b5d ldr r3, [pc, #372] @ (80047fc ) - 8004688: 681b ldr r3, [r3, #0] - 800468a: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 800468e: 2b00 cmp r3, #0 - 8004690: d0f0 beq.n 8004674 - 8004692: e014 b.n 80046be + 8004f76: 4b5d ldr r3, [pc, #372] @ (80050ec ) + 8004f78: 681b ldr r3, [r3, #0] + 8004f7a: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004f7e: 2b00 cmp r3, #0 + 8004f80: d0f0 beq.n 8004f64 + 8004f82: e014 b.n 8004fae } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004694: f7fe f97c bl 8002990 - 8004698: 6138 str r0, [r7, #16] + 8004f84: f7fe f97c bl 8003280 + 8004f88: 6138 str r0, [r7, #16] /* Wait till HSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 800469a: e008 b.n 80046ae + 8004f8a: e008 b.n 8004f9e { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) - 800469c: f7fe f978 bl 8002990 - 80046a0: 4602 mov r2, r0 - 80046a2: 693b ldr r3, [r7, #16] - 80046a4: 1ad3 subs r3, r2, r3 - 80046a6: 2b64 cmp r3, #100 @ 0x64 - 80046a8: d901 bls.n 80046ae + 8004f8c: f7fe f978 bl 8003280 + 8004f90: 4602 mov r2, r0 + 8004f92: 693b ldr r3, [r7, #16] + 8004f94: 1ad3 subs r3, r2, r3 + 8004f96: 2b64 cmp r3, #100 @ 0x64 + 8004f98: d901 bls.n 8004f9e { return HAL_TIMEOUT; - 80046aa: 2303 movs r3, #3 - 80046ac: e1ec b.n 8004a88 + 8004f9a: 2303 movs r3, #3 + 8004f9c: e1ec b.n 8005378 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) - 80046ae: 4b53 ldr r3, [pc, #332] @ (80047fc ) - 80046b0: 681b ldr r3, [r3, #0] - 80046b2: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 80046b6: 2b00 cmp r3, #0 - 80046b8: d1f0 bne.n 800469c - 80046ba: e000 b.n 80046be + 8004f9e: 4b53 ldr r3, [pc, #332] @ (80050ec ) + 8004fa0: 681b ldr r3, [r3, #0] + 8004fa2: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8004fa6: 2b00 cmp r3, #0 + 8004fa8: d1f0 bne.n 8004f8c + 8004faa: e000 b.n 8004fae if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 80046bc: bf00 nop + 8004fac: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 80046be: 687b ldr r3, [r7, #4] - 80046c0: 681b ldr r3, [r3, #0] - 80046c2: f003 0302 and.w r3, r3, #2 - 80046c6: 2b00 cmp r3, #0 - 80046c8: d063 beq.n 8004792 + 8004fae: 687b ldr r3, [r7, #4] + 8004fb0: 681b ldr r3, [r3, #0] + 8004fb2: f003 0302 and.w r3, r3, #2 + 8004fb6: 2b00 cmp r3, #0 + 8004fb8: d063 beq.n 8005082 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) - 80046ca: 4b4c ldr r3, [pc, #304] @ (80047fc ) - 80046cc: 685b ldr r3, [r3, #4] - 80046ce: f003 030c and.w r3, r3, #12 - 80046d2: 2b00 cmp r3, #0 - 80046d4: d00b beq.n 80046ee + 8004fba: 4b4c ldr r3, [pc, #304] @ (80050ec ) + 8004fbc: 685b ldr r3, [r3, #4] + 8004fbe: f003 030c and.w r3, r3, #12 + 8004fc2: 2b00 cmp r3, #0 + 8004fc4: d00b beq.n 8004fde || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2))) - 80046d6: 4b49 ldr r3, [pc, #292] @ (80047fc ) - 80046d8: 685b ldr r3, [r3, #4] - 80046da: f003 030c and.w r3, r3, #12 - 80046de: 2b08 cmp r3, #8 - 80046e0: d11c bne.n 800471c - 80046e2: 4b46 ldr r3, [pc, #280] @ (80047fc ) - 80046e4: 685b ldr r3, [r3, #4] - 80046e6: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 80046ea: 2b00 cmp r3, #0 - 80046ec: d116 bne.n 800471c + 8004fc6: 4b49 ldr r3, [pc, #292] @ (80050ec ) + 8004fc8: 685b ldr r3, [r3, #4] + 8004fca: f003 030c and.w r3, r3, #12 + 8004fce: 2b08 cmp r3, #8 + 8004fd0: d11c bne.n 800500c + 8004fd2: 4b46 ldr r3, [pc, #280] @ (80050ec ) + 8004fd4: 685b ldr r3, [r3, #4] + 8004fd6: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8004fda: 2b00 cmp r3, #0 + 8004fdc: d116 bne.n 800500c { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 80046ee: 4b43 ldr r3, [pc, #268] @ (80047fc ) - 80046f0: 681b ldr r3, [r3, #0] - 80046f2: f003 0302 and.w r3, r3, #2 - 80046f6: 2b00 cmp r3, #0 - 80046f8: d005 beq.n 8004706 - 80046fa: 687b ldr r3, [r7, #4] - 80046fc: 691b ldr r3, [r3, #16] - 80046fe: 2b01 cmp r3, #1 - 8004700: d001 beq.n 8004706 + 8004fde: 4b43 ldr r3, [pc, #268] @ (80050ec ) + 8004fe0: 681b ldr r3, [r3, #0] + 8004fe2: f003 0302 and.w r3, r3, #2 + 8004fe6: 2b00 cmp r3, #0 + 8004fe8: d005 beq.n 8004ff6 + 8004fea: 687b ldr r3, [r7, #4] + 8004fec: 691b ldr r3, [r3, #16] + 8004fee: 2b01 cmp r3, #1 + 8004ff0: d001 beq.n 8004ff6 { return HAL_ERROR; - 8004702: 2301 movs r3, #1 - 8004704: e1c0 b.n 8004a88 + 8004ff2: 2301 movs r3, #1 + 8004ff4: e1c0 b.n 8005378 } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8004706: 4b3d ldr r3, [pc, #244] @ (80047fc ) - 8004708: 681b ldr r3, [r3, #0] - 800470a: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 800470e: 687b ldr r3, [r7, #4] - 8004710: 695b ldr r3, [r3, #20] - 8004712: 00db lsls r3, r3, #3 - 8004714: 4939 ldr r1, [pc, #228] @ (80047fc ) - 8004716: 4313 orrs r3, r2 - 8004718: 600b str r3, [r1, #0] + 8004ff6: 4b3d ldr r3, [pc, #244] @ (80050ec ) + 8004ff8: 681b ldr r3, [r3, #0] + 8004ffa: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 8004ffe: 687b ldr r3, [r7, #4] + 8005000: 695b ldr r3, [r3, #20] + 8005002: 00db lsls r3, r3, #3 + 8005004: 4939 ldr r1, [pc, #228] @ (80050ec ) + 8005006: 4313 orrs r3, r2 + 8005008: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) - 800471a: e03a b.n 8004792 + 800500a: e03a b.n 8005082 } } else { /* Check the HSI State */ if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) - 800471c: 687b ldr r3, [r7, #4] - 800471e: 691b ldr r3, [r3, #16] - 8004720: 2b00 cmp r3, #0 - 8004722: d020 beq.n 8004766 + 800500c: 687b ldr r3, [r7, #4] + 800500e: 691b ldr r3, [r3, #16] + 8005010: 2b00 cmp r3, #0 + 8005012: d020 beq.n 8005056 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); - 8004724: 4b36 ldr r3, [pc, #216] @ (8004800 ) - 8004726: 2201 movs r2, #1 - 8004728: 601a str r2, [r3, #0] + 8005014: 4b36 ldr r3, [pc, #216] @ (80050f0 ) + 8005016: 2201 movs r2, #1 + 8005018: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800472a: f7fe f931 bl 8002990 - 800472e: 6138 str r0, [r7, #16] + 800501a: f7fe f931 bl 8003280 + 800501e: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8004730: e008 b.n 8004744 + 8005020: e008 b.n 8005034 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 8004732: f7fe f92d bl 8002990 - 8004736: 4602 mov r2, r0 - 8004738: 693b ldr r3, [r7, #16] - 800473a: 1ad3 subs r3, r2, r3 - 800473c: 2b02 cmp r3, #2 - 800473e: d901 bls.n 8004744 + 8005022: f7fe f92d bl 8003280 + 8005026: 4602 mov r2, r0 + 8005028: 693b ldr r3, [r7, #16] + 800502a: 1ad3 subs r3, r2, r3 + 800502c: 2b02 cmp r3, #2 + 800502e: d901 bls.n 8005034 { return HAL_TIMEOUT; - 8004740: 2303 movs r3, #3 - 8004742: e1a1 b.n 8004a88 + 8005030: 2303 movs r3, #3 + 8005032: e1a1 b.n 8005378 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8004744: 4b2d ldr r3, [pc, #180] @ (80047fc ) - 8004746: 681b ldr r3, [r3, #0] - 8004748: f003 0302 and.w r3, r3, #2 - 800474c: 2b00 cmp r3, #0 - 800474e: d0f0 beq.n 8004732 + 8005034: 4b2d ldr r3, [pc, #180] @ (80050ec ) + 8005036: 681b ldr r3, [r3, #0] + 8005038: f003 0302 and.w r3, r3, #2 + 800503c: 2b00 cmp r3, #0 + 800503e: d0f0 beq.n 8005022 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8004750: 4b2a ldr r3, [pc, #168] @ (80047fc ) - 8004752: 681b ldr r3, [r3, #0] - 8004754: f023 02f8 bic.w r2, r3, #248 @ 0xf8 - 8004758: 687b ldr r3, [r7, #4] - 800475a: 695b ldr r3, [r3, #20] - 800475c: 00db lsls r3, r3, #3 - 800475e: 4927 ldr r1, [pc, #156] @ (80047fc ) - 8004760: 4313 orrs r3, r2 - 8004762: 600b str r3, [r1, #0] - 8004764: e015 b.n 8004792 + 8005040: 4b2a ldr r3, [pc, #168] @ (80050ec ) + 8005042: 681b ldr r3, [r3, #0] + 8005044: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 8005048: 687b ldr r3, [r7, #4] + 800504a: 695b ldr r3, [r3, #20] + 800504c: 00db lsls r3, r3, #3 + 800504e: 4927 ldr r1, [pc, #156] @ (80050ec ) + 8005050: 4313 orrs r3, r2 + 8005052: 600b str r3, [r1, #0] + 8005054: e015 b.n 8005082 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 8004766: 4b26 ldr r3, [pc, #152] @ (8004800 ) - 8004768: 2200 movs r2, #0 - 800476a: 601a str r2, [r3, #0] + 8005056: 4b26 ldr r3, [pc, #152] @ (80050f0 ) + 8005058: 2200 movs r2, #0 + 800505a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800476c: f7fe f910 bl 8002990 - 8004770: 6138 str r0, [r7, #16] + 800505c: f7fe f910 bl 8003280 + 8005060: 6138 str r0, [r7, #16] /* Wait till HSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8004772: e008 b.n 8004786 + 8005062: e008 b.n 8005076 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) - 8004774: f7fe f90c bl 8002990 - 8004778: 4602 mov r2, r0 - 800477a: 693b ldr r3, [r7, #16] - 800477c: 1ad3 subs r3, r2, r3 - 800477e: 2b02 cmp r3, #2 - 8004780: d901 bls.n 8004786 + 8005064: f7fe f90c bl 8003280 + 8005068: 4602 mov r2, r0 + 800506a: 693b ldr r3, [r7, #16] + 800506c: 1ad3 subs r3, r2, r3 + 800506e: 2b02 cmp r3, #2 + 8005070: d901 bls.n 8005076 { return HAL_TIMEOUT; - 8004782: 2303 movs r3, #3 - 8004784: e180 b.n 8004a88 + 8005072: 2303 movs r3, #3 + 8005074: e180 b.n 8005378 while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) - 8004786: 4b1d ldr r3, [pc, #116] @ (80047fc ) - 8004788: 681b ldr r3, [r3, #0] - 800478a: f003 0302 and.w r3, r3, #2 - 800478e: 2b00 cmp r3, #0 - 8004790: d1f0 bne.n 8004774 + 8005076: 4b1d ldr r3, [pc, #116] @ (80050ec ) + 8005078: 681b ldr r3, [r3, #0] + 800507a: f003 0302 and.w r3, r3, #2 + 800507e: 2b00 cmp r3, #0 + 8005080: d1f0 bne.n 8005064 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8004792: 687b ldr r3, [r7, #4] - 8004794: 681b ldr r3, [r3, #0] - 8004796: f003 0308 and.w r3, r3, #8 - 800479a: 2b00 cmp r3, #0 - 800479c: d03a beq.n 8004814 + 8005082: 687b ldr r3, [r7, #4] + 8005084: 681b ldr r3, [r3, #0] + 8005086: f003 0308 and.w r3, r3, #8 + 800508a: 2b00 cmp r3, #0 + 800508c: d03a beq.n 8005104 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 800479e: 687b ldr r3, [r7, #4] - 80047a0: 699b ldr r3, [r3, #24] - 80047a2: 2b00 cmp r3, #0 - 80047a4: d019 beq.n 80047da + 800508e: 687b ldr r3, [r7, #4] + 8005090: 699b ldr r3, [r3, #24] + 8005092: 2b00 cmp r3, #0 + 8005094: d019 beq.n 80050ca { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 80047a6: 4b17 ldr r3, [pc, #92] @ (8004804 ) - 80047a8: 2201 movs r2, #1 - 80047aa: 601a str r2, [r3, #0] + 8005096: 4b17 ldr r3, [pc, #92] @ (80050f4 ) + 8005098: 2201 movs r2, #1 + 800509a: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80047ac: f7fe f8f0 bl 8002990 - 80047b0: 6138 str r0, [r7, #16] + 800509c: f7fe f8f0 bl 8003280 + 80050a0: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 80047b2: e008 b.n 80047c6 + 80050a2: e008 b.n 80050b6 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 80047b4: f7fe f8ec bl 8002990 - 80047b8: 4602 mov r2, r0 - 80047ba: 693b ldr r3, [r7, #16] - 80047bc: 1ad3 subs r3, r2, r3 - 80047be: 2b02 cmp r3, #2 - 80047c0: d901 bls.n 80047c6 + 80050a4: f7fe f8ec bl 8003280 + 80050a8: 4602 mov r2, r0 + 80050aa: 693b ldr r3, [r7, #16] + 80050ac: 1ad3 subs r3, r2, r3 + 80050ae: 2b02 cmp r3, #2 + 80050b0: d901 bls.n 80050b6 { return HAL_TIMEOUT; - 80047c2: 2303 movs r3, #3 - 80047c4: e160 b.n 8004a88 + 80050b2: 2303 movs r3, #3 + 80050b4: e160 b.n 8005378 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) - 80047c6: 4b0d ldr r3, [pc, #52] @ (80047fc ) - 80047c8: 6a5b ldr r3, [r3, #36] @ 0x24 - 80047ca: f003 0302 and.w r3, r3, #2 - 80047ce: 2b00 cmp r3, #0 - 80047d0: d0f0 beq.n 80047b4 + 80050b6: 4b0d ldr r3, [pc, #52] @ (80050ec ) + 80050b8: 6a5b ldr r3, [r3, #36] @ 0x24 + 80050ba: f003 0302 and.w r3, r3, #2 + 80050be: 2b00 cmp r3, #0 + 80050c0: d0f0 beq.n 80050a4 } } /* To have a fully stabilized clock in the specified range, a software delay of 1ms should be added.*/ RCC_Delay(1); - 80047d2: 2001 movs r0, #1 - 80047d4: f000 fad0 bl 8004d78 - 80047d8: e01c b.n 8004814 + 80050c2: 2001 movs r0, #1 + 80050c4: f000 fad0 bl 8005668 + 80050c8: e01c b.n 8005104 } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 80047da: 4b0a ldr r3, [pc, #40] @ (8004804 ) - 80047dc: 2200 movs r2, #0 - 80047de: 601a str r2, [r3, #0] + 80050ca: 4b0a ldr r3, [pc, #40] @ (80050f4 ) + 80050cc: 2200 movs r2, #0 + 80050ce: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80047e0: f7fe f8d6 bl 8002990 - 80047e4: 6138 str r0, [r7, #16] + 80050d0: f7fe f8d6 bl 8003280 + 80050d4: 6138 str r0, [r7, #16] /* Wait till LSI is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 80047e6: e00f b.n 8004808 + 80050d6: e00f b.n 80050f8 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) - 80047e8: f7fe f8d2 bl 8002990 - 80047ec: 4602 mov r2, r0 - 80047ee: 693b ldr r3, [r7, #16] - 80047f0: 1ad3 subs r3, r2, r3 - 80047f2: 2b02 cmp r3, #2 - 80047f4: d908 bls.n 8004808 + 80050d8: f7fe f8d2 bl 8003280 + 80050dc: 4602 mov r2, r0 + 80050de: 693b ldr r3, [r7, #16] + 80050e0: 1ad3 subs r3, r2, r3 + 80050e2: 2b02 cmp r3, #2 + 80050e4: d908 bls.n 80050f8 { return HAL_TIMEOUT; - 80047f6: 2303 movs r3, #3 - 80047f8: e146 b.n 8004a88 - 80047fa: bf00 nop - 80047fc: 40021000 .word 0x40021000 - 8004800: 42420000 .word 0x42420000 - 8004804: 42420480 .word 0x42420480 + 80050e6: 2303 movs r3, #3 + 80050e8: e146 b.n 8005378 + 80050ea: bf00 nop + 80050ec: 40021000 .word 0x40021000 + 80050f0: 42420000 .word 0x42420000 + 80050f4: 42420480 .word 0x42420480 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) - 8004808: 4b92 ldr r3, [pc, #584] @ (8004a54 ) - 800480a: 6a5b ldr r3, [r3, #36] @ 0x24 - 800480c: f003 0302 and.w r3, r3, #2 - 8004810: 2b00 cmp r3, #0 - 8004812: d1e9 bne.n 80047e8 + 80050f8: 4b92 ldr r3, [pc, #584] @ (8005344 ) + 80050fa: 6a5b ldr r3, [r3, #36] @ 0x24 + 80050fc: f003 0302 and.w r3, r3, #2 + 8005100: 2b00 cmp r3, #0 + 8005102: d1e9 bne.n 80050d8 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 8004814: 687b ldr r3, [r7, #4] - 8004816: 681b ldr r3, [r3, #0] - 8004818: f003 0304 and.w r3, r3, #4 - 800481c: 2b00 cmp r3, #0 - 800481e: f000 80a6 beq.w 800496e + 8005104: 687b ldr r3, [r7, #4] + 8005106: 681b ldr r3, [r3, #0] + 8005108: f003 0304 and.w r3, r3, #4 + 800510c: 2b00 cmp r3, #0 + 800510e: f000 80a6 beq.w 800525e { FlagStatus pwrclkchanged = RESET; - 8004822: 2300 movs r3, #0 - 8004824: 75fb strb r3, [r7, #23] + 8005112: 2300 movs r3, #0 + 8005114: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8004826: 4b8b ldr r3, [pc, #556] @ (8004a54 ) - 8004828: 69db ldr r3, [r3, #28] - 800482a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 800482e: 2b00 cmp r3, #0 - 8004830: d10d bne.n 800484e + 8005116: 4b8b ldr r3, [pc, #556] @ (8005344 ) + 8005118: 69db ldr r3, [r3, #28] + 800511a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 800511e: 2b00 cmp r3, #0 + 8005120: d10d bne.n 800513e { __HAL_RCC_PWR_CLK_ENABLE(); - 8004832: 4b88 ldr r3, [pc, #544] @ (8004a54 ) - 8004834: 69db ldr r3, [r3, #28] - 8004836: 4a87 ldr r2, [pc, #540] @ (8004a54 ) - 8004838: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 800483c: 61d3 str r3, [r2, #28] - 800483e: 4b85 ldr r3, [pc, #532] @ (8004a54 ) - 8004840: 69db ldr r3, [r3, #28] - 8004842: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8004846: 60bb str r3, [r7, #8] - 8004848: 68bb ldr r3, [r7, #8] + 8005122: 4b88 ldr r3, [pc, #544] @ (8005344 ) + 8005124: 69db ldr r3, [r3, #28] + 8005126: 4a87 ldr r2, [pc, #540] @ (8005344 ) + 8005128: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 800512c: 61d3 str r3, [r2, #28] + 800512e: 4b85 ldr r3, [pc, #532] @ (8005344 ) + 8005130: 69db ldr r3, [r3, #28] + 8005132: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 8005136: 60bb str r3, [r7, #8] + 8005138: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 800484a: 2301 movs r3, #1 - 800484c: 75fb strb r3, [r7, #23] + 800513a: 2301 movs r3, #1 + 800513c: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800484e: 4b82 ldr r3, [pc, #520] @ (8004a58 ) - 8004850: 681b ldr r3, [r3, #0] - 8004852: f403 7380 and.w r3, r3, #256 @ 0x100 - 8004856: 2b00 cmp r3, #0 - 8004858: d118 bne.n 800488c + 800513e: 4b82 ldr r3, [pc, #520] @ (8005348 ) + 8005140: 681b ldr r3, [r3, #0] + 8005142: f403 7380 and.w r3, r3, #256 @ 0x100 + 8005146: 2b00 cmp r3, #0 + 8005148: d118 bne.n 800517c { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 800485a: 4b7f ldr r3, [pc, #508] @ (8004a58 ) - 800485c: 681b ldr r3, [r3, #0] - 800485e: 4a7e ldr r2, [pc, #504] @ (8004a58 ) - 8004860: f443 7380 orr.w r3, r3, #256 @ 0x100 - 8004864: 6013 str r3, [r2, #0] + 800514a: 4b7f ldr r3, [pc, #508] @ (8005348 ) + 800514c: 681b ldr r3, [r3, #0] + 800514e: 4a7e ldr r2, [pc, #504] @ (8005348 ) + 8005150: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8005154: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8004866: f7fe f893 bl 8002990 - 800486a: 6138 str r0, [r7, #16] + 8005156: f7fe f893 bl 8003280 + 800515a: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 800486c: e008 b.n 8004880 + 800515c: e008 b.n 8005170 { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 800486e: f7fe f88f bl 8002990 - 8004872: 4602 mov r2, r0 - 8004874: 693b ldr r3, [r7, #16] - 8004876: 1ad3 subs r3, r2, r3 - 8004878: 2b64 cmp r3, #100 @ 0x64 - 800487a: d901 bls.n 8004880 + 800515e: f7fe f88f bl 8003280 + 8005162: 4602 mov r2, r0 + 8005164: 693b ldr r3, [r7, #16] + 8005166: 1ad3 subs r3, r2, r3 + 8005168: 2b64 cmp r3, #100 @ 0x64 + 800516a: d901 bls.n 8005170 { return HAL_TIMEOUT; - 800487c: 2303 movs r3, #3 - 800487e: e103 b.n 8004a88 + 800516c: 2303 movs r3, #3 + 800516e: e103 b.n 8005378 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004880: 4b75 ldr r3, [pc, #468] @ (8004a58 ) - 8004882: 681b ldr r3, [r3, #0] - 8004884: f403 7380 and.w r3, r3, #256 @ 0x100 - 8004888: 2b00 cmp r3, #0 - 800488a: d0f0 beq.n 800486e + 8005170: 4b75 ldr r3, [pc, #468] @ (8005348 ) + 8005172: 681b ldr r3, [r3, #0] + 8005174: f403 7380 and.w r3, r3, #256 @ 0x100 + 8005178: 2b00 cmp r3, #0 + 800517a: d0f0 beq.n 800515e } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 800488c: 687b ldr r3, [r7, #4] - 800488e: 68db ldr r3, [r3, #12] - 8004890: 2b01 cmp r3, #1 - 8004892: d106 bne.n 80048a2 - 8004894: 4b6f ldr r3, [pc, #444] @ (8004a54 ) - 8004896: 6a1b ldr r3, [r3, #32] - 8004898: 4a6e ldr r2, [pc, #440] @ (8004a54 ) - 800489a: f043 0301 orr.w r3, r3, #1 - 800489e: 6213 str r3, [r2, #32] - 80048a0: e02d b.n 80048fe - 80048a2: 687b ldr r3, [r7, #4] - 80048a4: 68db ldr r3, [r3, #12] - 80048a6: 2b00 cmp r3, #0 - 80048a8: d10c bne.n 80048c4 - 80048aa: 4b6a ldr r3, [pc, #424] @ (8004a54 ) - 80048ac: 6a1b ldr r3, [r3, #32] - 80048ae: 4a69 ldr r2, [pc, #420] @ (8004a54 ) - 80048b0: f023 0301 bic.w r3, r3, #1 - 80048b4: 6213 str r3, [r2, #32] - 80048b6: 4b67 ldr r3, [pc, #412] @ (8004a54 ) - 80048b8: 6a1b ldr r3, [r3, #32] - 80048ba: 4a66 ldr r2, [pc, #408] @ (8004a54 ) - 80048bc: f023 0304 bic.w r3, r3, #4 - 80048c0: 6213 str r3, [r2, #32] - 80048c2: e01c b.n 80048fe - 80048c4: 687b ldr r3, [r7, #4] - 80048c6: 68db ldr r3, [r3, #12] - 80048c8: 2b05 cmp r3, #5 - 80048ca: d10c bne.n 80048e6 - 80048cc: 4b61 ldr r3, [pc, #388] @ (8004a54 ) - 80048ce: 6a1b ldr r3, [r3, #32] - 80048d0: 4a60 ldr r2, [pc, #384] @ (8004a54 ) - 80048d2: f043 0304 orr.w r3, r3, #4 - 80048d6: 6213 str r3, [r2, #32] - 80048d8: 4b5e ldr r3, [pc, #376] @ (8004a54 ) - 80048da: 6a1b ldr r3, [r3, #32] - 80048dc: 4a5d ldr r2, [pc, #372] @ (8004a54 ) - 80048de: f043 0301 orr.w r3, r3, #1 - 80048e2: 6213 str r3, [r2, #32] - 80048e4: e00b b.n 80048fe - 80048e6: 4b5b ldr r3, [pc, #364] @ (8004a54 ) - 80048e8: 6a1b ldr r3, [r3, #32] - 80048ea: 4a5a ldr r2, [pc, #360] @ (8004a54 ) - 80048ec: f023 0301 bic.w r3, r3, #1 - 80048f0: 6213 str r3, [r2, #32] - 80048f2: 4b58 ldr r3, [pc, #352] @ (8004a54 ) - 80048f4: 6a1b ldr r3, [r3, #32] - 80048f6: 4a57 ldr r2, [pc, #348] @ (8004a54 ) - 80048f8: f023 0304 bic.w r3, r3, #4 - 80048fc: 6213 str r3, [r2, #32] + 800517c: 687b ldr r3, [r7, #4] + 800517e: 68db ldr r3, [r3, #12] + 8005180: 2b01 cmp r3, #1 + 8005182: d106 bne.n 8005192 + 8005184: 4b6f ldr r3, [pc, #444] @ (8005344 ) + 8005186: 6a1b ldr r3, [r3, #32] + 8005188: 4a6e ldr r2, [pc, #440] @ (8005344 ) + 800518a: f043 0301 orr.w r3, r3, #1 + 800518e: 6213 str r3, [r2, #32] + 8005190: e02d b.n 80051ee + 8005192: 687b ldr r3, [r7, #4] + 8005194: 68db ldr r3, [r3, #12] + 8005196: 2b00 cmp r3, #0 + 8005198: d10c bne.n 80051b4 + 800519a: 4b6a ldr r3, [pc, #424] @ (8005344 ) + 800519c: 6a1b ldr r3, [r3, #32] + 800519e: 4a69 ldr r2, [pc, #420] @ (8005344 ) + 80051a0: f023 0301 bic.w r3, r3, #1 + 80051a4: 6213 str r3, [r2, #32] + 80051a6: 4b67 ldr r3, [pc, #412] @ (8005344 ) + 80051a8: 6a1b ldr r3, [r3, #32] + 80051aa: 4a66 ldr r2, [pc, #408] @ (8005344 ) + 80051ac: f023 0304 bic.w r3, r3, #4 + 80051b0: 6213 str r3, [r2, #32] + 80051b2: e01c b.n 80051ee + 80051b4: 687b ldr r3, [r7, #4] + 80051b6: 68db ldr r3, [r3, #12] + 80051b8: 2b05 cmp r3, #5 + 80051ba: d10c bne.n 80051d6 + 80051bc: 4b61 ldr r3, [pc, #388] @ (8005344 ) + 80051be: 6a1b ldr r3, [r3, #32] + 80051c0: 4a60 ldr r2, [pc, #384] @ (8005344 ) + 80051c2: f043 0304 orr.w r3, r3, #4 + 80051c6: 6213 str r3, [r2, #32] + 80051c8: 4b5e ldr r3, [pc, #376] @ (8005344 ) + 80051ca: 6a1b ldr r3, [r3, #32] + 80051cc: 4a5d ldr r2, [pc, #372] @ (8005344 ) + 80051ce: f043 0301 orr.w r3, r3, #1 + 80051d2: 6213 str r3, [r2, #32] + 80051d4: e00b b.n 80051ee + 80051d6: 4b5b ldr r3, [pc, #364] @ (8005344 ) + 80051d8: 6a1b ldr r3, [r3, #32] + 80051da: 4a5a ldr r2, [pc, #360] @ (8005344 ) + 80051dc: f023 0301 bic.w r3, r3, #1 + 80051e0: 6213 str r3, [r2, #32] + 80051e2: 4b58 ldr r3, [pc, #352] @ (8005344 ) + 80051e4: 6a1b ldr r3, [r3, #32] + 80051e6: 4a57 ldr r2, [pc, #348] @ (8005344 ) + 80051e8: f023 0304 bic.w r3, r3, #4 + 80051ec: 6213 str r3, [r2, #32] /* Check the LSE State */ if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 80048fe: 687b ldr r3, [r7, #4] - 8004900: 68db ldr r3, [r3, #12] - 8004902: 2b00 cmp r3, #0 - 8004904: d015 beq.n 8004932 + 80051ee: 687b ldr r3, [r7, #4] + 80051f0: 68db ldr r3, [r3, #12] + 80051f2: 2b00 cmp r3, #0 + 80051f4: d015 beq.n 8005222 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004906: f7fe f843 bl 8002990 - 800490a: 6138 str r0, [r7, #16] + 80051f6: f7fe f843 bl 8003280 + 80051fa: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 800490c: e00a b.n 8004924 + 80051fc: e00a b.n 8005214 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 800490e: f7fe f83f bl 8002990 - 8004912: 4602 mov r2, r0 - 8004914: 693b ldr r3, [r7, #16] - 8004916: 1ad3 subs r3, r2, r3 - 8004918: f241 3288 movw r2, #5000 @ 0x1388 - 800491c: 4293 cmp r3, r2 - 800491e: d901 bls.n 8004924 + 80051fe: f7fe f83f bl 8003280 + 8005202: 4602 mov r2, r0 + 8005204: 693b ldr r3, [r7, #16] + 8005206: 1ad3 subs r3, r2, r3 + 8005208: f241 3288 movw r2, #5000 @ 0x1388 + 800520c: 4293 cmp r3, r2 + 800520e: d901 bls.n 8005214 { return HAL_TIMEOUT; - 8004920: 2303 movs r3, #3 - 8004922: e0b1 b.n 8004a88 + 8005210: 2303 movs r3, #3 + 8005212: e0b1 b.n 8005378 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8004924: 4b4b ldr r3, [pc, #300] @ (8004a54 ) - 8004926: 6a1b ldr r3, [r3, #32] - 8004928: f003 0302 and.w r3, r3, #2 - 800492c: 2b00 cmp r3, #0 - 800492e: d0ee beq.n 800490e - 8004930: e014 b.n 800495c + 8005214: 4b4b ldr r3, [pc, #300] @ (8005344 ) + 8005216: 6a1b ldr r3, [r3, #32] + 8005218: f003 0302 and.w r3, r3, #2 + 800521c: 2b00 cmp r3, #0 + 800521e: d0ee beq.n 80051fe + 8005220: e014 b.n 800524c } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004932: f7fe f82d bl 8002990 - 8004936: 6138 str r0, [r7, #16] + 8005222: f7fe f82d bl 8003280 + 8005226: 6138 str r0, [r7, #16] /* Wait till LSE is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8004938: e00a b.n 8004950 + 8005228: e00a b.n 8005240 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 800493a: f7fe f829 bl 8002990 - 800493e: 4602 mov r2, r0 - 8004940: 693b ldr r3, [r7, #16] - 8004942: 1ad3 subs r3, r2, r3 - 8004944: f241 3288 movw r2, #5000 @ 0x1388 - 8004948: 4293 cmp r3, r2 - 800494a: d901 bls.n 8004950 + 800522a: f7fe f829 bl 8003280 + 800522e: 4602 mov r2, r0 + 8005230: 693b ldr r3, [r7, #16] + 8005232: 1ad3 subs r3, r2, r3 + 8005234: f241 3288 movw r2, #5000 @ 0x1388 + 8005238: 4293 cmp r3, r2 + 800523a: d901 bls.n 8005240 { return HAL_TIMEOUT; - 800494c: 2303 movs r3, #3 - 800494e: e09b b.n 8004a88 + 800523c: 2303 movs r3, #3 + 800523e: e09b b.n 8005378 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) - 8004950: 4b40 ldr r3, [pc, #256] @ (8004a54 ) - 8004952: 6a1b ldr r3, [r3, #32] - 8004954: f003 0302 and.w r3, r3, #2 - 8004958: 2b00 cmp r3, #0 - 800495a: d1ee bne.n 800493a + 8005240: 4b40 ldr r3, [pc, #256] @ (8005344 ) + 8005242: 6a1b ldr r3, [r3, #32] + 8005244: f003 0302 and.w r3, r3, #2 + 8005248: 2b00 cmp r3, #0 + 800524a: d1ee bne.n 800522a } } } /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) - 800495c: 7dfb ldrb r3, [r7, #23] - 800495e: 2b01 cmp r3, #1 - 8004960: d105 bne.n 800496e + 800524c: 7dfb ldrb r3, [r7, #23] + 800524e: 2b01 cmp r3, #1 + 8005250: d105 bne.n 800525e { __HAL_RCC_PWR_CLK_DISABLE(); - 8004962: 4b3c ldr r3, [pc, #240] @ (8004a54 ) - 8004964: 69db ldr r3, [r3, #28] - 8004966: 4a3b ldr r2, [pc, #236] @ (8004a54 ) - 8004968: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 800496c: 61d3 str r3, [r2, #28] + 8005252: 4b3c ldr r3, [pc, #240] @ (8005344 ) + 8005254: 69db ldr r3, [r3, #28] + 8005256: 4a3b ldr r2, [pc, #236] @ (8005344 ) + 8005258: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 800525c: 61d3 str r3, [r2, #28] #endif /* RCC_CR_PLL2ON */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 800496e: 687b ldr r3, [r7, #4] - 8004970: 69db ldr r3, [r3, #28] - 8004972: 2b00 cmp r3, #0 - 8004974: f000 8087 beq.w 8004a86 + 800525e: 687b ldr r3, [r7, #4] + 8005260: 69db ldr r3, [r3, #28] + 8005262: 2b00 cmp r3, #0 + 8005264: f000 8087 beq.w 8005376 { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8004978: 4b36 ldr r3, [pc, #216] @ (8004a54 ) - 800497a: 685b ldr r3, [r3, #4] - 800497c: f003 030c and.w r3, r3, #12 - 8004980: 2b08 cmp r3, #8 - 8004982: d061 beq.n 8004a48 + 8005268: 4b36 ldr r3, [pc, #216] @ (8005344 ) + 800526a: 685b ldr r3, [r3, #4] + 800526c: f003 030c and.w r3, r3, #12 + 8005270: 2b08 cmp r3, #8 + 8005272: d061 beq.n 8005338 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 8004984: 687b ldr r3, [r7, #4] - 8004986: 69db ldr r3, [r3, #28] - 8004988: 2b02 cmp r3, #2 - 800498a: d146 bne.n 8004a1a + 8005274: 687b ldr r3, [r7, #4] + 8005276: 69db ldr r3, [r3, #28] + 8005278: 2b02 cmp r3, #2 + 800527a: d146 bne.n 800530a /* Check the parameters */ assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 800498c: 4b33 ldr r3, [pc, #204] @ (8004a5c ) - 800498e: 2200 movs r2, #0 - 8004990: 601a str r2, [r3, #0] + 800527c: 4b33 ldr r3, [pc, #204] @ (800534c ) + 800527e: 2200 movs r2, #0 + 8005280: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004992: f7fd fffd bl 8002990 - 8004996: 6138 str r0, [r7, #16] + 8005282: f7fd fffd bl 8003280 + 8005286: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8004998: e008 b.n 80049ac + 8005288: e008 b.n 800529c { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 800499a: f7fd fff9 bl 8002990 - 800499e: 4602 mov r2, r0 - 80049a0: 693b ldr r3, [r7, #16] - 80049a2: 1ad3 subs r3, r2, r3 - 80049a4: 2b02 cmp r3, #2 - 80049a6: d901 bls.n 80049ac + 800528a: f7fd fff9 bl 8003280 + 800528e: 4602 mov r2, r0 + 8005290: 693b ldr r3, [r7, #16] + 8005292: 1ad3 subs r3, r2, r3 + 8005294: 2b02 cmp r3, #2 + 8005296: d901 bls.n 800529c { return HAL_TIMEOUT; - 80049a8: 2303 movs r3, #3 - 80049aa: e06d b.n 8004a88 + 8005298: 2303 movs r3, #3 + 800529a: e06d b.n 8005378 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 80049ac: 4b29 ldr r3, [pc, #164] @ (8004a54 ) - 80049ae: 681b ldr r3, [r3, #0] - 80049b0: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 80049b4: 2b00 cmp r3, #0 - 80049b6: d1f0 bne.n 800499a + 800529c: 4b29 ldr r3, [pc, #164] @ (8005344 ) + 800529e: 681b ldr r3, [r3, #0] + 80052a0: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 80052a4: 2b00 cmp r3, #0 + 80052a6: d1f0 bne.n 800528a } } /* Configure the HSE prediv factor --------------------------------*/ /* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */ if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE) - 80049b8: 687b ldr r3, [r7, #4] - 80049ba: 6a1b ldr r3, [r3, #32] - 80049bc: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 - 80049c0: d108 bne.n 80049d4 + 80052a8: 687b ldr r3, [r7, #4] + 80052aa: 6a1b ldr r3, [r3, #32] + 80052ac: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 80052b0: d108 bne.n 80052c4 /* Set PREDIV1 source */ SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source); #endif /* RCC_CFGR2_PREDIV1SRC */ /* Set PREDIV1 Value */ __HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue); - 80049c2: 4b24 ldr r3, [pc, #144] @ (8004a54 ) - 80049c4: 685b ldr r3, [r3, #4] - 80049c6: f423 3200 bic.w r2, r3, #131072 @ 0x20000 - 80049ca: 687b ldr r3, [r7, #4] - 80049cc: 689b ldr r3, [r3, #8] - 80049ce: 4921 ldr r1, [pc, #132] @ (8004a54 ) - 80049d0: 4313 orrs r3, r2 - 80049d2: 604b str r3, [r1, #4] + 80052b2: 4b24 ldr r3, [pc, #144] @ (8005344 ) + 80052b4: 685b ldr r3, [r3, #4] + 80052b6: f423 3200 bic.w r2, r3, #131072 @ 0x20000 + 80052ba: 687b ldr r3, [r7, #4] + 80052bc: 689b ldr r3, [r3, #8] + 80052be: 4921 ldr r1, [pc, #132] @ (8005344 ) + 80052c0: 4313 orrs r3, r2 + 80052c2: 604b str r3, [r1, #4] } /* Configure the main PLL clock source and multiplication factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 80049d4: 4b1f ldr r3, [pc, #124] @ (8004a54 ) - 80049d6: 685b ldr r3, [r3, #4] - 80049d8: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 - 80049dc: 687b ldr r3, [r7, #4] - 80049de: 6a19 ldr r1, [r3, #32] - 80049e0: 687b ldr r3, [r7, #4] - 80049e2: 6a5b ldr r3, [r3, #36] @ 0x24 - 80049e4: 430b orrs r3, r1 - 80049e6: 491b ldr r1, [pc, #108] @ (8004a54 ) - 80049e8: 4313 orrs r3, r2 - 80049ea: 604b str r3, [r1, #4] + 80052c4: 4b1f ldr r3, [pc, #124] @ (8005344 ) + 80052c6: 685b ldr r3, [r3, #4] + 80052c8: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000 + 80052cc: 687b ldr r3, [r7, #4] + 80052ce: 6a19 ldr r1, [r3, #32] + 80052d0: 687b ldr r3, [r7, #4] + 80052d2: 6a5b ldr r3, [r3, #36] @ 0x24 + 80052d4: 430b orrs r3, r1 + 80052d6: 491b ldr r1, [pc, #108] @ (8005344 ) + 80052d8: 4313 orrs r3, r2 + 80052da: 604b str r3, [r1, #4] RCC_OscInitStruct->PLL.PLLMUL); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 80049ec: 4b1b ldr r3, [pc, #108] @ (8004a5c ) - 80049ee: 2201 movs r2, #1 - 80049f0: 601a str r2, [r3, #0] + 80052dc: 4b1b ldr r3, [pc, #108] @ (800534c ) + 80052de: 2201 movs r2, #1 + 80052e0: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80049f2: f7fd ffcd bl 8002990 - 80049f6: 6138 str r0, [r7, #16] + 80052e2: f7fd ffcd bl 8003280 + 80052e6: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 80049f8: e008 b.n 8004a0c + 80052e8: e008 b.n 80052fc { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 80049fa: f7fd ffc9 bl 8002990 - 80049fe: 4602 mov r2, r0 - 8004a00: 693b ldr r3, [r7, #16] - 8004a02: 1ad3 subs r3, r2, r3 - 8004a04: 2b02 cmp r3, #2 - 8004a06: d901 bls.n 8004a0c + 80052ea: f7fd ffc9 bl 8003280 + 80052ee: 4602 mov r2, r0 + 80052f0: 693b ldr r3, [r7, #16] + 80052f2: 1ad3 subs r3, r2, r3 + 80052f4: 2b02 cmp r3, #2 + 80052f6: d901 bls.n 80052fc { return HAL_TIMEOUT; - 8004a08: 2303 movs r3, #3 - 8004a0a: e03d b.n 8004a88 + 80052f8: 2303 movs r3, #3 + 80052fa: e03d b.n 8005378 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8004a0c: 4b11 ldr r3, [pc, #68] @ (8004a54 ) - 8004a0e: 681b ldr r3, [r3, #0] - 8004a10: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8004a14: 2b00 cmp r3, #0 - 8004a16: d0f0 beq.n 80049fa - 8004a18: e035 b.n 8004a86 + 80052fc: 4b11 ldr r3, [pc, #68] @ (8005344 ) + 80052fe: 681b ldr r3, [r3, #0] + 8005300: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8005304: 2b00 cmp r3, #0 + 8005306: d0f0 beq.n 80052ea + 8005308: e035 b.n 8005376 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 8004a1a: 4b10 ldr r3, [pc, #64] @ (8004a5c ) - 8004a1c: 2200 movs r2, #0 - 8004a1e: 601a str r2, [r3, #0] + 800530a: 4b10 ldr r3, [pc, #64] @ (800534c ) + 800530c: 2200 movs r2, #0 + 800530e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004a20: f7fd ffb6 bl 8002990 - 8004a24: 6138 str r0, [r7, #16] + 8005310: f7fd ffb6 bl 8003280 + 8005314: 6138 str r0, [r7, #16] /* Wait till PLL is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8004a26: e008 b.n 8004a3a + 8005316: e008 b.n 800532a { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - 8004a28: f7fd ffb2 bl 8002990 - 8004a2c: 4602 mov r2, r0 - 8004a2e: 693b ldr r3, [r7, #16] - 8004a30: 1ad3 subs r3, r2, r3 - 8004a32: 2b02 cmp r3, #2 - 8004a34: d901 bls.n 8004a3a + 8005318: f7fd ffb2 bl 8003280 + 800531c: 4602 mov r2, r0 + 800531e: 693b ldr r3, [r7, #16] + 8005320: 1ad3 subs r3, r2, r3 + 8005322: 2b02 cmp r3, #2 + 8005324: d901 bls.n 800532a { return HAL_TIMEOUT; - 8004a36: 2303 movs r3, #3 - 8004a38: e026 b.n 8004a88 + 8005326: 2303 movs r3, #3 + 8005328: e026 b.n 8005378 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - 8004a3a: 4b06 ldr r3, [pc, #24] @ (8004a54 ) - 8004a3c: 681b ldr r3, [r3, #0] - 8004a3e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8004a42: 2b00 cmp r3, #0 - 8004a44: d1f0 bne.n 8004a28 - 8004a46: e01e b.n 8004a86 + 800532a: 4b06 ldr r3, [pc, #24] @ (8005344 ) + 800532c: 681b ldr r3, [r3, #0] + 800532e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8005332: 2b00 cmp r3, #0 + 8005334: d1f0 bne.n 8005318 + 8005336: e01e b.n 8005376 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8004a48: 687b ldr r3, [r7, #4] - 8004a4a: 69db ldr r3, [r3, #28] - 8004a4c: 2b01 cmp r3, #1 - 8004a4e: d107 bne.n 8004a60 + 8005338: 687b ldr r3, [r7, #4] + 800533a: 69db ldr r3, [r3, #28] + 800533c: 2b01 cmp r3, #1 + 800533e: d107 bne.n 8005350 { return HAL_ERROR; - 8004a50: 2301 movs r3, #1 - 8004a52: e019 b.n 8004a88 - 8004a54: 40021000 .word 0x40021000 - 8004a58: 40007000 .word 0x40007000 - 8004a5c: 42420060 .word 0x42420060 + 8005340: 2301 movs r3, #1 + 8005342: e019 b.n 8005378 + 8005344: 40021000 .word 0x40021000 + 8005348: 40007000 .word 0x40007000 + 800534c: 42420060 .word 0x42420060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 8004a60: 4b0b ldr r3, [pc, #44] @ (8004a90 ) - 8004a62: 685b ldr r3, [r3, #4] - 8004a64: 60fb str r3, [r7, #12] + 8005350: 4b0b ldr r3, [pc, #44] @ (8005380 ) + 8005352: 685b ldr r3, [r3, #4] + 8005354: 60fb str r3, [r7, #12] if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8004a66: 68fb ldr r3, [r7, #12] - 8004a68: f403 3280 and.w r2, r3, #65536 @ 0x10000 - 8004a6c: 687b ldr r3, [r7, #4] - 8004a6e: 6a1b ldr r3, [r3, #32] - 8004a70: 429a cmp r2, r3 - 8004a72: d106 bne.n 8004a82 + 8005356: 68fb ldr r3, [r7, #12] + 8005358: f403 3280 and.w r2, r3, #65536 @ 0x10000 + 800535c: 687b ldr r3, [r7, #4] + 800535e: 6a1b ldr r3, [r3, #32] + 8005360: 429a cmp r2, r3 + 8005362: d106 bne.n 8005372 (READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL)) - 8004a74: 68fb ldr r3, [r7, #12] - 8004a76: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 - 8004a7a: 687b ldr r3, [r7, #4] - 8004a7c: 6a5b ldr r3, [r3, #36] @ 0x24 + 8005364: 68fb ldr r3, [r7, #12] + 8005366: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000 + 800536a: 687b ldr r3, [r7, #4] + 800536c: 6a5b ldr r3, [r3, #36] @ 0x24 if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8004a7e: 429a cmp r2, r3 - 8004a80: d001 beq.n 8004a86 + 800536e: 429a cmp r2, r3 + 8005370: d001 beq.n 8005376 { return HAL_ERROR; - 8004a82: 2301 movs r3, #1 - 8004a84: e000 b.n 8004a88 + 8005372: 2301 movs r3, #1 + 8005374: e000 b.n 8005378 } } } } return HAL_OK; - 8004a86: 2300 movs r3, #0 + 8005376: 2300 movs r3, #0 } - 8004a88: 4618 mov r0, r3 - 8004a8a: 3718 adds r7, #24 - 8004a8c: 46bd mov sp, r7 - 8004a8e: bd80 pop {r7, pc} - 8004a90: 40021000 .word 0x40021000 + 8005378: 4618 mov r0, r3 + 800537a: 3718 adds r7, #24 + 800537c: 46bd mov sp, r7 + 800537e: bd80 pop {r7, pc} + 8005380: 40021000 .word 0x40021000 -08004a94 : +08005384 : * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is * currently used as system clock source. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8004a94: b580 push {r7, lr} - 8004a96: b084 sub sp, #16 - 8004a98: af00 add r7, sp, #0 - 8004a9a: 6078 str r0, [r7, #4] - 8004a9c: 6039 str r1, [r7, #0] + 8005384: b580 push {r7, lr} + 8005386: b084 sub sp, #16 + 8005388: af00 add r7, sp, #0 + 800538a: 6078 str r0, [r7, #4] + 800538c: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) - 8004a9e: 687b ldr r3, [r7, #4] - 8004aa0: 2b00 cmp r3, #0 - 8004aa2: d101 bne.n 8004aa8 + 800538e: 687b ldr r3, [r7, #4] + 8005390: 2b00 cmp r3, #0 + 8005392: d101 bne.n 8005398 { return HAL_ERROR; - 8004aa4: 2301 movs r3, #1 - 8004aa6: e0d0 b.n 8004c4a + 8005394: 2301 movs r3, #1 + 8005396: e0d0 b.n 800553a must be correctly programmed according to the frequency of the CPU clock (HCLK) of the device. */ #if defined(FLASH_ACR_LATENCY) /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) - 8004aa8: 4b6a ldr r3, [pc, #424] @ (8004c54 ) - 8004aaa: 681b ldr r3, [r3, #0] - 8004aac: f003 0307 and.w r3, r3, #7 - 8004ab0: 683a ldr r2, [r7, #0] - 8004ab2: 429a cmp r2, r3 - 8004ab4: d910 bls.n 8004ad8 + 8005398: 4b6a ldr r3, [pc, #424] @ (8005544 ) + 800539a: 681b ldr r3, [r3, #0] + 800539c: f003 0307 and.w r3, r3, #7 + 80053a0: 683a ldr r2, [r7, #0] + 80053a2: 429a cmp r2, r3 + 80053a4: d910 bls.n 80053c8 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8004ab6: 4b67 ldr r3, [pc, #412] @ (8004c54 ) - 8004ab8: 681b ldr r3, [r3, #0] - 8004aba: f023 0207 bic.w r2, r3, #7 - 8004abe: 4965 ldr r1, [pc, #404] @ (8004c54 ) - 8004ac0: 683b ldr r3, [r7, #0] - 8004ac2: 4313 orrs r3, r2 - 8004ac4: 600b str r3, [r1, #0] + 80053a6: 4b67 ldr r3, [pc, #412] @ (8005544 ) + 80053a8: 681b ldr r3, [r3, #0] + 80053aa: f023 0207 bic.w r2, r3, #7 + 80053ae: 4965 ldr r1, [pc, #404] @ (8005544 ) + 80053b0: 683b ldr r3, [r7, #0] + 80053b2: 4313 orrs r3, r2 + 80053b4: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 8004ac6: 4b63 ldr r3, [pc, #396] @ (8004c54 ) - 8004ac8: 681b ldr r3, [r3, #0] - 8004aca: f003 0307 and.w r3, r3, #7 - 8004ace: 683a ldr r2, [r7, #0] - 8004ad0: 429a cmp r2, r3 - 8004ad2: d001 beq.n 8004ad8 + 80053b6: 4b63 ldr r3, [pc, #396] @ (8005544 ) + 80053b8: 681b ldr r3, [r3, #0] + 80053ba: f003 0307 and.w r3, r3, #7 + 80053be: 683a ldr r2, [r7, #0] + 80053c0: 429a cmp r2, r3 + 80053c2: d001 beq.n 80053c8 { return HAL_ERROR; - 8004ad4: 2301 movs r3, #1 - 8004ad6: e0b8 b.n 8004c4a + 80053c4: 2301 movs r3, #1 + 80053c6: e0b8 b.n 800553a } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 8004ad8: 687b ldr r3, [r7, #4] - 8004ada: 681b ldr r3, [r3, #0] - 8004adc: f003 0302 and.w r3, r3, #2 - 8004ae0: 2b00 cmp r3, #0 - 8004ae2: d020 beq.n 8004b26 + 80053c8: 687b ldr r3, [r7, #4] + 80053ca: 681b ldr r3, [r3, #0] + 80053cc: f003 0302 and.w r3, r3, #2 + 80053d0: 2b00 cmp r3, #0 + 80053d2: d020 beq.n 8005416 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8004ae4: 687b ldr r3, [r7, #4] - 8004ae6: 681b ldr r3, [r3, #0] - 8004ae8: f003 0304 and.w r3, r3, #4 - 8004aec: 2b00 cmp r3, #0 - 8004aee: d005 beq.n 8004afc + 80053d4: 687b ldr r3, [r7, #4] + 80053d6: 681b ldr r3, [r3, #0] + 80053d8: f003 0304 and.w r3, r3, #4 + 80053dc: 2b00 cmp r3, #0 + 80053de: d005 beq.n 80053ec { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); - 8004af0: 4b59 ldr r3, [pc, #356] @ (8004c58 ) - 8004af2: 685b ldr r3, [r3, #4] - 8004af4: 4a58 ldr r2, [pc, #352] @ (8004c58 ) - 8004af6: f443 63e0 orr.w r3, r3, #1792 @ 0x700 - 8004afa: 6053 str r3, [r2, #4] + 80053e0: 4b59 ldr r3, [pc, #356] @ (8005548 ) + 80053e2: 685b ldr r3, [r3, #4] + 80053e4: 4a58 ldr r2, [pc, #352] @ (8005548 ) + 80053e6: f443 63e0 orr.w r3, r3, #1792 @ 0x700 + 80053ea: 6053 str r3, [r2, #4] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8004afc: 687b ldr r3, [r7, #4] - 8004afe: 681b ldr r3, [r3, #0] - 8004b00: f003 0308 and.w r3, r3, #8 - 8004b04: 2b00 cmp r3, #0 - 8004b06: d005 beq.n 8004b14 + 80053ec: 687b ldr r3, [r7, #4] + 80053ee: 681b ldr r3, [r3, #0] + 80053f0: f003 0308 and.w r3, r3, #8 + 80053f4: 2b00 cmp r3, #0 + 80053f6: d005 beq.n 8005404 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); - 8004b08: 4b53 ldr r3, [pc, #332] @ (8004c58 ) - 8004b0a: 685b ldr r3, [r3, #4] - 8004b0c: 4a52 ldr r2, [pc, #328] @ (8004c58 ) - 8004b0e: f443 5360 orr.w r3, r3, #14336 @ 0x3800 - 8004b12: 6053 str r3, [r2, #4] + 80053f8: 4b53 ldr r3, [pc, #332] @ (8005548 ) + 80053fa: 685b ldr r3, [r3, #4] + 80053fc: 4a52 ldr r2, [pc, #328] @ (8005548 ) + 80053fe: f443 5360 orr.w r3, r3, #14336 @ 0x3800 + 8005402: 6053 str r3, [r2, #4] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 8004b14: 4b50 ldr r3, [pc, #320] @ (8004c58 ) - 8004b16: 685b ldr r3, [r3, #4] - 8004b18: f023 02f0 bic.w r2, r3, #240 @ 0xf0 - 8004b1c: 687b ldr r3, [r7, #4] - 8004b1e: 689b ldr r3, [r3, #8] - 8004b20: 494d ldr r1, [pc, #308] @ (8004c58 ) - 8004b22: 4313 orrs r3, r2 - 8004b24: 604b str r3, [r1, #4] + 8005404: 4b50 ldr r3, [pc, #320] @ (8005548 ) + 8005406: 685b ldr r3, [r3, #4] + 8005408: f023 02f0 bic.w r2, r3, #240 @ 0xf0 + 800540c: 687b ldr r3, [r7, #4] + 800540e: 689b ldr r3, [r3, #8] + 8005410: 494d ldr r1, [pc, #308] @ (8005548 ) + 8005412: 4313 orrs r3, r2 + 8005414: 604b str r3, [r1, #4] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 8004b26: 687b ldr r3, [r7, #4] - 8004b28: 681b ldr r3, [r3, #0] - 8004b2a: f003 0301 and.w r3, r3, #1 - 8004b2e: 2b00 cmp r3, #0 - 8004b30: d040 beq.n 8004bb4 + 8005416: 687b ldr r3, [r7, #4] + 8005418: 681b ldr r3, [r3, #0] + 800541a: f003 0301 and.w r3, r3, #1 + 800541e: 2b00 cmp r3, #0 + 8005420: d040 beq.n 80054a4 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8004b32: 687b ldr r3, [r7, #4] - 8004b34: 685b ldr r3, [r3, #4] - 8004b36: 2b01 cmp r3, #1 - 8004b38: d107 bne.n 8004b4a + 8005422: 687b ldr r3, [r7, #4] + 8005424: 685b ldr r3, [r3, #4] + 8005426: 2b01 cmp r3, #1 + 8005428: d107 bne.n 800543a { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) - 8004b3a: 4b47 ldr r3, [pc, #284] @ (8004c58 ) - 8004b3c: 681b ldr r3, [r3, #0] - 8004b3e: f403 3300 and.w r3, r3, #131072 @ 0x20000 - 8004b42: 2b00 cmp r3, #0 - 8004b44: d115 bne.n 8004b72 + 800542a: 4b47 ldr r3, [pc, #284] @ (8005548 ) + 800542c: 681b ldr r3, [r3, #0] + 800542e: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8005432: 2b00 cmp r3, #0 + 8005434: d115 bne.n 8005462 { return HAL_ERROR; - 8004b46: 2301 movs r3, #1 - 8004b48: e07f b.n 8004c4a + 8005436: 2301 movs r3, #1 + 8005438: e07f b.n 800553a } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 8004b4a: 687b ldr r3, [r7, #4] - 8004b4c: 685b ldr r3, [r3, #4] - 8004b4e: 2b02 cmp r3, #2 - 8004b50: d107 bne.n 8004b62 + 800543a: 687b ldr r3, [r7, #4] + 800543c: 685b ldr r3, [r3, #4] + 800543e: 2b02 cmp r3, #2 + 8005440: d107 bne.n 8005452 { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) - 8004b52: 4b41 ldr r3, [pc, #260] @ (8004c58 ) - 8004b54: 681b ldr r3, [r3, #0] - 8004b56: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 - 8004b5a: 2b00 cmp r3, #0 - 8004b5c: d109 bne.n 8004b72 + 8005442: 4b41 ldr r3, [pc, #260] @ (8005548 ) + 8005444: 681b ldr r3, [r3, #0] + 8005446: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 800544a: 2b00 cmp r3, #0 + 800544c: d109 bne.n 8005462 { return HAL_ERROR; - 8004b5e: 2301 movs r3, #1 - 8004b60: e073 b.n 8004c4a + 800544e: 2301 movs r3, #1 + 8005450: e073 b.n 800553a } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) - 8004b62: 4b3d ldr r3, [pc, #244] @ (8004c58 ) - 8004b64: 681b ldr r3, [r3, #0] - 8004b66: f003 0302 and.w r3, r3, #2 - 8004b6a: 2b00 cmp r3, #0 - 8004b6c: d101 bne.n 8004b72 + 8005452: 4b3d ldr r3, [pc, #244] @ (8005548 ) + 8005454: 681b ldr r3, [r3, #0] + 8005456: f003 0302 and.w r3, r3, #2 + 800545a: 2b00 cmp r3, #0 + 800545c: d101 bne.n 8005462 { return HAL_ERROR; - 8004b6e: 2301 movs r3, #1 - 8004b70: e06b b.n 8004c4a + 800545e: 2301 movs r3, #1 + 8005460: e06b b.n 800553a } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 8004b72: 4b39 ldr r3, [pc, #228] @ (8004c58 ) - 8004b74: 685b ldr r3, [r3, #4] - 8004b76: f023 0203 bic.w r2, r3, #3 - 8004b7a: 687b ldr r3, [r7, #4] - 8004b7c: 685b ldr r3, [r3, #4] - 8004b7e: 4936 ldr r1, [pc, #216] @ (8004c58 ) - 8004b80: 4313 orrs r3, r2 - 8004b82: 604b str r3, [r1, #4] + 8005462: 4b39 ldr r3, [pc, #228] @ (8005548 ) + 8005464: 685b ldr r3, [r3, #4] + 8005466: f023 0203 bic.w r2, r3, #3 + 800546a: 687b ldr r3, [r7, #4] + 800546c: 685b ldr r3, [r3, #4] + 800546e: 4936 ldr r1, [pc, #216] @ (8005548 ) + 8005470: 4313 orrs r3, r2 + 8005472: 604b str r3, [r1, #4] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004b84: f7fd ff04 bl 8002990 - 8004b88: 60f8 str r0, [r7, #12] + 8005474: f7fd ff04 bl 8003280 + 8005478: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8004b8a: e00a b.n 8004ba2 + 800547a: e00a b.n 8005492 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 8004b8c: f7fd ff00 bl 8002990 - 8004b90: 4602 mov r2, r0 - 8004b92: 68fb ldr r3, [r7, #12] - 8004b94: 1ad3 subs r3, r2, r3 - 8004b96: f241 3288 movw r2, #5000 @ 0x1388 - 8004b9a: 4293 cmp r3, r2 - 8004b9c: d901 bls.n 8004ba2 + 800547c: f7fd ff00 bl 8003280 + 8005480: 4602 mov r2, r0 + 8005482: 68fb ldr r3, [r7, #12] + 8005484: 1ad3 subs r3, r2, r3 + 8005486: f241 3288 movw r2, #5000 @ 0x1388 + 800548a: 4293 cmp r3, r2 + 800548c: d901 bls.n 8005492 { return HAL_TIMEOUT; - 8004b9e: 2303 movs r3, #3 - 8004ba0: e053 b.n 8004c4a + 800548e: 2303 movs r3, #3 + 8005490: e053 b.n 800553a while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) - 8004ba2: 4b2d ldr r3, [pc, #180] @ (8004c58 ) - 8004ba4: 685b ldr r3, [r3, #4] - 8004ba6: f003 020c and.w r2, r3, #12 - 8004baa: 687b ldr r3, [r7, #4] - 8004bac: 685b ldr r3, [r3, #4] - 8004bae: 009b lsls r3, r3, #2 - 8004bb0: 429a cmp r2, r3 - 8004bb2: d1eb bne.n 8004b8c + 8005492: 4b2d ldr r3, [pc, #180] @ (8005548 ) + 8005494: 685b ldr r3, [r3, #4] + 8005496: f003 020c and.w r2, r3, #12 + 800549a: 687b ldr r3, [r7, #4] + 800549c: 685b ldr r3, [r3, #4] + 800549e: 009b lsls r3, r3, #2 + 80054a0: 429a cmp r2, r3 + 80054a2: d1eb bne.n 800547c } } #if defined(FLASH_ACR_LATENCY) /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) - 8004bb4: 4b27 ldr r3, [pc, #156] @ (8004c54 ) - 8004bb6: 681b ldr r3, [r3, #0] - 8004bb8: f003 0307 and.w r3, r3, #7 - 8004bbc: 683a ldr r2, [r7, #0] - 8004bbe: 429a cmp r2, r3 - 8004bc0: d210 bcs.n 8004be4 + 80054a4: 4b27 ldr r3, [pc, #156] @ (8005544 ) + 80054a6: 681b ldr r3, [r3, #0] + 80054a8: f003 0307 and.w r3, r3, #7 + 80054ac: 683a ldr r2, [r7, #0] + 80054ae: 429a cmp r2, r3 + 80054b0: d210 bcs.n 80054d4 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8004bc2: 4b24 ldr r3, [pc, #144] @ (8004c54 ) - 8004bc4: 681b ldr r3, [r3, #0] - 8004bc6: f023 0207 bic.w r2, r3, #7 - 8004bca: 4922 ldr r1, [pc, #136] @ (8004c54 ) - 8004bcc: 683b ldr r3, [r7, #0] - 8004bce: 4313 orrs r3, r2 - 8004bd0: 600b str r3, [r1, #0] + 80054b2: 4b24 ldr r3, [pc, #144] @ (8005544 ) + 80054b4: 681b ldr r3, [r3, #0] + 80054b6: f023 0207 bic.w r2, r3, #7 + 80054ba: 4922 ldr r1, [pc, #136] @ (8005544 ) + 80054bc: 683b ldr r3, [r7, #0] + 80054be: 4313 orrs r3, r2 + 80054c0: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) - 8004bd2: 4b20 ldr r3, [pc, #128] @ (8004c54 ) - 8004bd4: 681b ldr r3, [r3, #0] - 8004bd6: f003 0307 and.w r3, r3, #7 - 8004bda: 683a ldr r2, [r7, #0] - 8004bdc: 429a cmp r2, r3 - 8004bde: d001 beq.n 8004be4 + 80054c2: 4b20 ldr r3, [pc, #128] @ (8005544 ) + 80054c4: 681b ldr r3, [r3, #0] + 80054c6: f003 0307 and.w r3, r3, #7 + 80054ca: 683a ldr r2, [r7, #0] + 80054cc: 429a cmp r2, r3 + 80054ce: d001 beq.n 80054d4 { return HAL_ERROR; - 8004be0: 2301 movs r3, #1 - 8004be2: e032 b.n 8004c4a + 80054d0: 2301 movs r3, #1 + 80054d2: e032 b.n 800553a } } #endif /* FLASH_ACR_LATENCY */ /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 8004be4: 687b ldr r3, [r7, #4] - 8004be6: 681b ldr r3, [r3, #0] - 8004be8: f003 0304 and.w r3, r3, #4 - 8004bec: 2b00 cmp r3, #0 - 8004bee: d008 beq.n 8004c02 + 80054d4: 687b ldr r3, [r7, #4] + 80054d6: 681b ldr r3, [r3, #0] + 80054d8: f003 0304 and.w r3, r3, #4 + 80054dc: 2b00 cmp r3, #0 + 80054de: d008 beq.n 80054f2 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8004bf0: 4b19 ldr r3, [pc, #100] @ (8004c58 ) - 8004bf2: 685b ldr r3, [r3, #4] - 8004bf4: f423 62e0 bic.w r2, r3, #1792 @ 0x700 - 8004bf8: 687b ldr r3, [r7, #4] - 8004bfa: 68db ldr r3, [r3, #12] - 8004bfc: 4916 ldr r1, [pc, #88] @ (8004c58 ) - 8004bfe: 4313 orrs r3, r2 - 8004c00: 604b str r3, [r1, #4] + 80054e0: 4b19 ldr r3, [pc, #100] @ (8005548 ) + 80054e2: 685b ldr r3, [r3, #4] + 80054e4: f423 62e0 bic.w r2, r3, #1792 @ 0x700 + 80054e8: 687b ldr r3, [r7, #4] + 80054ea: 68db ldr r3, [r3, #12] + 80054ec: 4916 ldr r1, [pc, #88] @ (8005548 ) + 80054ee: 4313 orrs r3, r2 + 80054f0: 604b str r3, [r1, #4] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 8004c02: 687b ldr r3, [r7, #4] - 8004c04: 681b ldr r3, [r3, #0] - 8004c06: f003 0308 and.w r3, r3, #8 - 8004c0a: 2b00 cmp r3, #0 - 8004c0c: d009 beq.n 8004c22 + 80054f2: 687b ldr r3, [r7, #4] + 80054f4: 681b ldr r3, [r3, #0] + 80054f6: f003 0308 and.w r3, r3, #8 + 80054fa: 2b00 cmp r3, #0 + 80054fc: d009 beq.n 8005512 { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); - 8004c0e: 4b12 ldr r3, [pc, #72] @ (8004c58 ) - 8004c10: 685b ldr r3, [r3, #4] - 8004c12: f423 5260 bic.w r2, r3, #14336 @ 0x3800 - 8004c16: 687b ldr r3, [r7, #4] - 8004c18: 691b ldr r3, [r3, #16] - 8004c1a: 00db lsls r3, r3, #3 - 8004c1c: 490e ldr r1, [pc, #56] @ (8004c58 ) - 8004c1e: 4313 orrs r3, r2 - 8004c20: 604b str r3, [r1, #4] + 80054fe: 4b12 ldr r3, [pc, #72] @ (8005548 ) + 8005500: 685b ldr r3, [r3, #4] + 8005502: f423 5260 bic.w r2, r3, #14336 @ 0x3800 + 8005506: 687b ldr r3, [r7, #4] + 8005508: 691b ldr r3, [r3, #16] + 800550a: 00db lsls r3, r3, #3 + 800550c: 490e ldr r1, [pc, #56] @ (8005548 ) + 800550e: 4313 orrs r3, r2 + 8005510: 604b str r3, [r1, #4] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; - 8004c22: f000 f821 bl 8004c68 - 8004c26: 4602 mov r2, r0 - 8004c28: 4b0b ldr r3, [pc, #44] @ (8004c58 ) - 8004c2a: 685b ldr r3, [r3, #4] - 8004c2c: 091b lsrs r3, r3, #4 - 8004c2e: f003 030f and.w r3, r3, #15 - 8004c32: 490a ldr r1, [pc, #40] @ (8004c5c ) - 8004c34: 5ccb ldrb r3, [r1, r3] - 8004c36: fa22 f303 lsr.w r3, r2, r3 - 8004c3a: 4a09 ldr r2, [pc, #36] @ (8004c60 ) - 8004c3c: 6013 str r3, [r2, #0] + 8005512: f000 f821 bl 8005558 + 8005516: 4602 mov r2, r0 + 8005518: 4b0b ldr r3, [pc, #44] @ (8005548 ) + 800551a: 685b ldr r3, [r3, #4] + 800551c: 091b lsrs r3, r3, #4 + 800551e: f003 030f and.w r3, r3, #15 + 8005522: 490a ldr r1, [pc, #40] @ (800554c ) + 8005524: 5ccb ldrb r3, [r1, r3] + 8005526: fa22 f303 lsr.w r3, r2, r3 + 800552a: 4a09 ldr r2, [pc, #36] @ (8005550 ) + 800552c: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); - 8004c3e: 4b09 ldr r3, [pc, #36] @ (8004c64 ) - 8004c40: 681b ldr r3, [r3, #0] - 8004c42: 4618 mov r0, r3 - 8004c44: f7fd fe62 bl 800290c + 800552e: 4b09 ldr r3, [pc, #36] @ (8005554 ) + 8005530: 681b ldr r3, [r3, #0] + 8005532: 4618 mov r0, r3 + 8005534: f7fd fe62 bl 80031fc return HAL_OK; - 8004c48: 2300 movs r3, #0 + 8005538: 2300 movs r3, #0 } - 8004c4a: 4618 mov r0, r3 - 8004c4c: 3710 adds r7, #16 - 8004c4e: 46bd mov sp, r7 - 8004c50: bd80 pop {r7, pc} - 8004c52: bf00 nop - 8004c54: 40022000 .word 0x40022000 - 8004c58: 40021000 .word 0x40021000 - 8004c5c: 0800661c .word 0x0800661c - 8004c60: 20000004 .word 0x20000004 - 8004c64: 20000008 .word 0x20000008 + 800553a: 4618 mov r0, r3 + 800553c: 3710 adds r7, #16 + 800553e: 46bd mov sp, r7 + 8005540: bd80 pop {r7, pc} + 8005542: bf00 nop + 8005544: 40022000 .word 0x40022000 + 8005548: 40021000 .word 0x40021000 + 800554c: 08006f0c .word 0x08006f0c + 8005550: 20000004 .word 0x20000004 + 8005554: 20000008 .word 0x20000008 -08004c68 : +08005558 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 8004c68: b480 push {r7} - 8004c6a: b087 sub sp, #28 - 8004c6c: af00 add r7, sp, #0 + 8005558: b480 push {r7} + 800555a: b087 sub sp, #28 + 800555c: af00 add r7, sp, #0 #else static const uint8_t aPredivFactorTable[2U] = {1, 2}; #endif /*RCC_CFGR2_PREDIV1*/ #endif uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; - 8004c6e: 2300 movs r3, #0 - 8004c70: 60fb str r3, [r7, #12] - 8004c72: 2300 movs r3, #0 - 8004c74: 60bb str r3, [r7, #8] - 8004c76: 2300 movs r3, #0 - 8004c78: 617b str r3, [r7, #20] - 8004c7a: 2300 movs r3, #0 - 8004c7c: 607b str r3, [r7, #4] + 800555e: 2300 movs r3, #0 + 8005560: 60fb str r3, [r7, #12] + 8005562: 2300 movs r3, #0 + 8005564: 60bb str r3, [r7, #8] + 8005566: 2300 movs r3, #0 + 8005568: 617b str r3, [r7, #20] + 800556a: 2300 movs r3, #0 + 800556c: 607b str r3, [r7, #4] uint32_t sysclockfreq = 0U; - 8004c7e: 2300 movs r3, #0 - 8004c80: 613b str r3, [r7, #16] + 800556e: 2300 movs r3, #0 + 8005570: 613b str r3, [r7, #16] #if defined(RCC_CFGR2_PREDIV1SRC) uint32_t prediv2 = 0U, pll2mul = 0U; #endif /*RCC_CFGR2_PREDIV1SRC*/ tmpreg = RCC->CFGR; - 8004c82: 4b1e ldr r3, [pc, #120] @ (8004cfc ) - 8004c84: 685b ldr r3, [r3, #4] - 8004c86: 60fb str r3, [r7, #12] + 8005572: 4b1e ldr r3, [pc, #120] @ (80055ec ) + 8005574: 685b ldr r3, [r3, #4] + 8005576: 60fb str r3, [r7, #12] /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 8004c88: 68fb ldr r3, [r7, #12] - 8004c8a: f003 030c and.w r3, r3, #12 - 8004c8e: 2b04 cmp r3, #4 - 8004c90: d002 beq.n 8004c98 - 8004c92: 2b08 cmp r3, #8 - 8004c94: d003 beq.n 8004c9e - 8004c96: e027 b.n 8004ce8 + 8005578: 68fb ldr r3, [r7, #12] + 800557a: f003 030c and.w r3, r3, #12 + 800557e: 2b04 cmp r3, #4 + 8005580: d002 beq.n 8005588 + 8005582: 2b08 cmp r3, #8 + 8005584: d003 beq.n 800558e + 8005586: e027 b.n 80055d8 { case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 8004c98: 4b19 ldr r3, [pc, #100] @ (8004d00 ) - 8004c9a: 613b str r3, [r7, #16] + 8005588: 4b19 ldr r3, [pc, #100] @ (80055f0 ) + 800558a: 613b str r3, [r7, #16] break; - 8004c9c: e027 b.n 8004cee + 800558c: e027 b.n 80055de } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos]; - 8004c9e: 68fb ldr r3, [r7, #12] - 8004ca0: 0c9b lsrs r3, r3, #18 - 8004ca2: f003 030f and.w r3, r3, #15 - 8004ca6: 4a17 ldr r2, [pc, #92] @ (8004d04 ) - 8004ca8: 5cd3 ldrb r3, [r2, r3] - 8004caa: 607b str r3, [r7, #4] + 800558e: 68fb ldr r3, [r7, #12] + 8005590: 0c9b lsrs r3, r3, #18 + 8005592: f003 030f and.w r3, r3, #15 + 8005596: 4a17 ldr r2, [pc, #92] @ (80055f4 ) + 8005598: 5cd3 ldrb r3, [r2, r3] + 800559a: 607b str r3, [r7, #4] if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) - 8004cac: 68fb ldr r3, [r7, #12] - 8004cae: f403 3380 and.w r3, r3, #65536 @ 0x10000 - 8004cb2: 2b00 cmp r3, #0 - 8004cb4: d010 beq.n 8004cd8 + 800559c: 68fb ldr r3, [r7, #12] + 800559e: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 80055a2: 2b00 cmp r3, #0 + 80055a4: d010 beq.n 80055c8 { #if defined(RCC_CFGR2_PREDIV1) prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos]; #else prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos]; - 8004cb6: 4b11 ldr r3, [pc, #68] @ (8004cfc ) - 8004cb8: 685b ldr r3, [r3, #4] - 8004cba: 0c5b lsrs r3, r3, #17 - 8004cbc: f003 0301 and.w r3, r3, #1 - 8004cc0: 4a11 ldr r2, [pc, #68] @ (8004d08 ) - 8004cc2: 5cd3 ldrb r3, [r2, r3] - 8004cc4: 60bb str r3, [r7, #8] + 80055a6: 4b11 ldr r3, [pc, #68] @ (80055ec ) + 80055a8: 685b ldr r3, [r3, #4] + 80055aa: 0c5b lsrs r3, r3, #17 + 80055ac: f003 0301 and.w r3, r3, #1 + 80055b0: 4a11 ldr r2, [pc, #68] @ (80055f8 ) + 80055b2: 5cd3 ldrb r3, [r2, r3] + 80055b4: 60bb str r3, [r7, #8] { pllclk = pllclk / 2; } #else /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv); - 8004cc6: 687b ldr r3, [r7, #4] - 8004cc8: 4a0d ldr r2, [pc, #52] @ (8004d00 ) - 8004cca: fb03 f202 mul.w r2, r3, r2 - 8004cce: 68bb ldr r3, [r7, #8] - 8004cd0: fbb2 f3f3 udiv r3, r2, r3 - 8004cd4: 617b str r3, [r7, #20] - 8004cd6: e004 b.n 8004ce2 + 80055b6: 687b ldr r3, [r7, #4] + 80055b8: 4a0d ldr r2, [pc, #52] @ (80055f0 ) + 80055ba: fb03 f202 mul.w r2, r3, r2 + 80055be: 68bb ldr r3, [r7, #8] + 80055c0: fbb2 f3f3 udiv r3, r2, r3 + 80055c4: 617b str r3, [r7, #20] + 80055c6: e004 b.n 80055d2 #endif /*RCC_CFGR2_PREDIV1SRC*/ } else { /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); - 8004cd8: 687b ldr r3, [r7, #4] - 8004cda: 4a0c ldr r2, [pc, #48] @ (8004d0c ) - 8004cdc: fb02 f303 mul.w r3, r2, r3 - 8004ce0: 617b str r3, [r7, #20] + 80055c8: 687b ldr r3, [r7, #4] + 80055ca: 4a0c ldr r2, [pc, #48] @ (80055fc ) + 80055cc: fb02 f303 mul.w r3, r2, r3 + 80055d0: 617b str r3, [r7, #20] } sysclockfreq = pllclk; - 8004ce2: 697b ldr r3, [r7, #20] - 8004ce4: 613b str r3, [r7, #16] + 80055d2: 697b ldr r3, [r7, #20] + 80055d4: 613b str r3, [r7, #16] break; - 8004ce6: e002 b.n 8004cee + 80055d6: e002 b.n 80055de } case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ default: /* HSI used as system clock */ { sysclockfreq = HSI_VALUE; - 8004ce8: 4b09 ldr r3, [pc, #36] @ (8004d10 ) - 8004cea: 613b str r3, [r7, #16] + 80055d8: 4b09 ldr r3, [pc, #36] @ (8005600 ) + 80055da: 613b str r3, [r7, #16] break; - 8004cec: bf00 nop + 80055dc: bf00 nop } } return sysclockfreq; - 8004cee: 693b ldr r3, [r7, #16] + 80055de: 693b ldr r3, [r7, #16] } - 8004cf0: 4618 mov r0, r3 - 8004cf2: 371c adds r7, #28 - 8004cf4: 46bd mov sp, r7 - 8004cf6: bc80 pop {r7} - 8004cf8: 4770 bx lr - 8004cfa: bf00 nop - 8004cfc: 40021000 .word 0x40021000 - 8004d00: 00b71b00 .word 0x00b71b00 - 8004d04: 08006634 .word 0x08006634 - 8004d08: 08006644 .word 0x08006644 - 8004d0c: 003d0900 .word 0x003d0900 - 8004d10: 007a1200 .word 0x007a1200 + 80055e0: 4618 mov r0, r3 + 80055e2: 371c adds r7, #28 + 80055e4: 46bd mov sp, r7 + 80055e6: bc80 pop {r7} + 80055e8: 4770 bx lr + 80055ea: bf00 nop + 80055ec: 40021000 .word 0x40021000 + 80055f0: 00b71b00 .word 0x00b71b00 + 80055f4: 08006f24 .word 0x08006f24 + 80055f8: 08006f34 .word 0x08006f34 + 80055fc: 003d0900 .word 0x003d0900 + 8005600: 007a1200 .word 0x007a1200 -08004d14 : +08005604 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 8004d14: b480 push {r7} - 8004d16: af00 add r7, sp, #0 + 8005604: b480 push {r7} + 8005606: af00 add r7, sp, #0 return SystemCoreClock; - 8004d18: 4b02 ldr r3, [pc, #8] @ (8004d24 ) - 8004d1a: 681b ldr r3, [r3, #0] + 8005608: 4b02 ldr r3, [pc, #8] @ (8005614 ) + 800560a: 681b ldr r3, [r3, #0] } - 8004d1c: 4618 mov r0, r3 - 8004d1e: 46bd mov sp, r7 - 8004d20: bc80 pop {r7} - 8004d22: 4770 bx lr - 8004d24: 20000004 .word 0x20000004 + 800560c: 4618 mov r0, r3 + 800560e: 46bd mov sp, r7 + 8005610: bc80 pop {r7} + 8005612: 4770 bx lr + 8005614: 20000004 .word 0x20000004 -08004d28 : +08005618 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 8004d28: b580 push {r7, lr} - 8004d2a: af00 add r7, sp, #0 + 8005618: b580 push {r7, lr} + 800561a: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); - 8004d2c: f7ff fff2 bl 8004d14 - 8004d30: 4602 mov r2, r0 - 8004d32: 4b05 ldr r3, [pc, #20] @ (8004d48 ) - 8004d34: 685b ldr r3, [r3, #4] - 8004d36: 0a1b lsrs r3, r3, #8 - 8004d38: f003 0307 and.w r3, r3, #7 - 8004d3c: 4903 ldr r1, [pc, #12] @ (8004d4c ) - 8004d3e: 5ccb ldrb r3, [r1, r3] - 8004d40: fa22 f303 lsr.w r3, r2, r3 + 800561c: f7ff fff2 bl 8005604 + 8005620: 4602 mov r2, r0 + 8005622: 4b05 ldr r3, [pc, #20] @ (8005638 ) + 8005624: 685b ldr r3, [r3, #4] + 8005626: 0a1b lsrs r3, r3, #8 + 8005628: f003 0307 and.w r3, r3, #7 + 800562c: 4903 ldr r1, [pc, #12] @ (800563c ) + 800562e: 5ccb ldrb r3, [r1, r3] + 8005630: fa22 f303 lsr.w r3, r2, r3 } - 8004d44: 4618 mov r0, r3 - 8004d46: bd80 pop {r7, pc} - 8004d48: 40021000 .word 0x40021000 - 8004d4c: 0800662c .word 0x0800662c + 8005634: 4618 mov r0, r3 + 8005636: bd80 pop {r7, pc} + 8005638: 40021000 .word 0x40021000 + 800563c: 08006f1c .word 0x08006f1c -08004d50 : +08005640 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 8004d50: b580 push {r7, lr} - 8004d52: af00 add r7, sp, #0 + 8005640: b580 push {r7, lr} + 8005642: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); - 8004d54: f7ff ffde bl 8004d14 - 8004d58: 4602 mov r2, r0 - 8004d5a: 4b05 ldr r3, [pc, #20] @ (8004d70 ) - 8004d5c: 685b ldr r3, [r3, #4] - 8004d5e: 0adb lsrs r3, r3, #11 - 8004d60: f003 0307 and.w r3, r3, #7 - 8004d64: 4903 ldr r1, [pc, #12] @ (8004d74 ) - 8004d66: 5ccb ldrb r3, [r1, r3] - 8004d68: fa22 f303 lsr.w r3, r2, r3 + 8005644: f7ff ffde bl 8005604 + 8005648: 4602 mov r2, r0 + 800564a: 4b05 ldr r3, [pc, #20] @ (8005660 ) + 800564c: 685b ldr r3, [r3, #4] + 800564e: 0adb lsrs r3, r3, #11 + 8005650: f003 0307 and.w r3, r3, #7 + 8005654: 4903 ldr r1, [pc, #12] @ (8005664 ) + 8005656: 5ccb ldrb r3, [r1, r3] + 8005658: fa22 f303 lsr.w r3, r2, r3 } - 8004d6c: 4618 mov r0, r3 - 8004d6e: bd80 pop {r7, pc} - 8004d70: 40021000 .word 0x40021000 - 8004d74: 0800662c .word 0x0800662c + 800565c: 4618 mov r0, r3 + 800565e: bd80 pop {r7, pc} + 8005660: 40021000 .word 0x40021000 + 8005664: 08006f1c .word 0x08006f1c -08004d78 : +08005668 : * @brief This function provides delay (in milliseconds) based on CPU cycles method. * @param mdelay: specifies the delay time length, in milliseconds. * @retval None */ static void RCC_Delay(uint32_t mdelay) { - 8004d78: b480 push {r7} - 8004d7a: b085 sub sp, #20 - 8004d7c: af00 add r7, sp, #0 - 8004d7e: 6078 str r0, [r7, #4] + 8005668: b480 push {r7} + 800566a: b085 sub sp, #20 + 800566c: af00 add r7, sp, #0 + 800566e: 6078 str r0, [r7, #4] __IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U); - 8004d80: 4b0a ldr r3, [pc, #40] @ (8004dac ) - 8004d82: 681b ldr r3, [r3, #0] - 8004d84: 4a0a ldr r2, [pc, #40] @ (8004db0 ) - 8004d86: fba2 2303 umull r2, r3, r2, r3 - 8004d8a: 0a5b lsrs r3, r3, #9 - 8004d8c: 687a ldr r2, [r7, #4] - 8004d8e: fb02 f303 mul.w r3, r2, r3 - 8004d92: 60fb str r3, [r7, #12] + 8005670: 4b0a ldr r3, [pc, #40] @ (800569c ) + 8005672: 681b ldr r3, [r3, #0] + 8005674: 4a0a ldr r2, [pc, #40] @ (80056a0 ) + 8005676: fba2 2303 umull r2, r3, r2, r3 + 800567a: 0a5b lsrs r3, r3, #9 + 800567c: 687a ldr r2, [r7, #4] + 800567e: fb02 f303 mul.w r3, r2, r3 + 8005682: 60fb str r3, [r7, #12] do { __NOP(); - 8004d94: bf00 nop + 8005684: bf00 nop } while (Delay --); - 8004d96: 68fb ldr r3, [r7, #12] - 8004d98: 1e5a subs r2, r3, #1 - 8004d9a: 60fa str r2, [r7, #12] - 8004d9c: 2b00 cmp r3, #0 - 8004d9e: d1f9 bne.n 8004d94 + 8005686: 68fb ldr r3, [r7, #12] + 8005688: 1e5a subs r2, r3, #1 + 800568a: 60fa str r2, [r7, #12] + 800568c: 2b00 cmp r3, #0 + 800568e: d1f9 bne.n 8005684 } - 8004da0: bf00 nop - 8004da2: bf00 nop - 8004da4: 3714 adds r7, #20 - 8004da6: 46bd mov sp, r7 - 8004da8: bc80 pop {r7} - 8004daa: 4770 bx lr - 8004dac: 20000004 .word 0x20000004 - 8004db0: 10624dd3 .word 0x10624dd3 + 8005690: bf00 nop + 8005692: bf00 nop + 8005694: 3714 adds r7, #20 + 8005696: 46bd mov sp, r7 + 8005698: bc80 pop {r7} + 800569a: 4770 bx lr + 800569c: 20000004 .word 0x20000004 + 80056a0: 10624dd3 .word 0x10624dd3 -08004db4 : +080056a4 : * manually disable it. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 8004db4: b580 push {r7, lr} - 8004db6: b086 sub sp, #24 - 8004db8: af00 add r7, sp, #0 - 8004dba: 6078 str r0, [r7, #4] + 80056a4: b580 push {r7, lr} + 80056a6: b086 sub sp, #24 + 80056a8: af00 add r7, sp, #0 + 80056aa: 6078 str r0, [r7, #4] uint32_t tickstart = 0U, temp_reg = 0U; - 8004dbc: 2300 movs r3, #0 - 8004dbe: 613b str r3, [r7, #16] - 8004dc0: 2300 movs r3, #0 - 8004dc2: 60fb str r3, [r7, #12] + 80056ac: 2300 movs r3, #0 + 80056ae: 613b str r3, [r7, #16] + 80056b0: 2300 movs r3, #0 + 80056b2: 60fb str r3, [r7, #12] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) - 8004dc4: 687b ldr r3, [r7, #4] - 8004dc6: 681b ldr r3, [r3, #0] - 8004dc8: f003 0301 and.w r3, r3, #1 - 8004dcc: 2b00 cmp r3, #0 - 8004dce: d07d beq.n 8004ecc + 80056b4: 687b ldr r3, [r7, #4] + 80056b6: 681b ldr r3, [r3, #0] + 80056b8: f003 0301 and.w r3, r3, #1 + 80056bc: 2b00 cmp r3, #0 + 80056be: d07d beq.n 80057bc { FlagStatus pwrclkchanged = RESET; - 8004dd0: 2300 movs r3, #0 - 8004dd2: 75fb strb r3, [r7, #23] + 80056c0: 2300 movs r3, #0 + 80056c2: 75fb strb r3, [r7, #23] assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8004dd4: 4b4f ldr r3, [pc, #316] @ (8004f14 ) - 8004dd6: 69db ldr r3, [r3, #28] - 8004dd8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8004ddc: 2b00 cmp r3, #0 - 8004dde: d10d bne.n 8004dfc + 80056c4: 4b4f ldr r3, [pc, #316] @ (8005804 ) + 80056c6: 69db ldr r3, [r3, #28] + 80056c8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80056cc: 2b00 cmp r3, #0 + 80056ce: d10d bne.n 80056ec { __HAL_RCC_PWR_CLK_ENABLE(); - 8004de0: 4b4c ldr r3, [pc, #304] @ (8004f14 ) - 8004de2: 69db ldr r3, [r3, #28] - 8004de4: 4a4b ldr r2, [pc, #300] @ (8004f14 ) - 8004de6: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 - 8004dea: 61d3 str r3, [r2, #28] - 8004dec: 4b49 ldr r3, [pc, #292] @ (8004f14 ) - 8004dee: 69db ldr r3, [r3, #28] - 8004df0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 - 8004df4: 60bb str r3, [r7, #8] - 8004df6: 68bb ldr r3, [r7, #8] + 80056d0: 4b4c ldr r3, [pc, #304] @ (8005804 ) + 80056d2: 69db ldr r3, [r3, #28] + 80056d4: 4a4b ldr r2, [pc, #300] @ (8005804 ) + 80056d6: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 80056da: 61d3 str r3, [r2, #28] + 80056dc: 4b49 ldr r3, [pc, #292] @ (8005804 ) + 80056de: 69db ldr r3, [r3, #28] + 80056e0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80056e4: 60bb str r3, [r7, #8] + 80056e6: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; - 8004df8: 2301 movs r3, #1 - 8004dfa: 75fb strb r3, [r7, #23] + 80056e8: 2301 movs r3, #1 + 80056ea: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004dfc: 4b46 ldr r3, [pc, #280] @ (8004f18 ) - 8004dfe: 681b ldr r3, [r3, #0] - 8004e00: f403 7380 and.w r3, r3, #256 @ 0x100 - 8004e04: 2b00 cmp r3, #0 - 8004e06: d118 bne.n 8004e3a + 80056ec: 4b46 ldr r3, [pc, #280] @ (8005808 ) + 80056ee: 681b ldr r3, [r3, #0] + 80056f0: f403 7380 and.w r3, r3, #256 @ 0x100 + 80056f4: 2b00 cmp r3, #0 + 80056f6: d118 bne.n 800572a { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 8004e08: 4b43 ldr r3, [pc, #268] @ (8004f18 ) - 8004e0a: 681b ldr r3, [r3, #0] - 8004e0c: 4a42 ldr r2, [pc, #264] @ (8004f18 ) - 8004e0e: f443 7380 orr.w r3, r3, #256 @ 0x100 - 8004e12: 6013 str r3, [r2, #0] + 80056f8: 4b43 ldr r3, [pc, #268] @ (8005808 ) + 80056fa: 681b ldr r3, [r3, #0] + 80056fc: 4a42 ldr r2, [pc, #264] @ (8005808 ) + 80056fe: f443 7380 orr.w r3, r3, #256 @ 0x100 + 8005702: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8004e14: f7fd fdbc bl 8002990 - 8004e18: 6138 str r0, [r7, #16] + 8005704: f7fd fdbc bl 8003280 + 8005708: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004e1a: e008 b.n 8004e2e + 800570a: e008 b.n 800571e { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8004e1c: f7fd fdb8 bl 8002990 - 8004e20: 4602 mov r2, r0 - 8004e22: 693b ldr r3, [r7, #16] - 8004e24: 1ad3 subs r3, r2, r3 - 8004e26: 2b64 cmp r3, #100 @ 0x64 - 8004e28: d901 bls.n 8004e2e + 800570c: f7fd fdb8 bl 8003280 + 8005710: 4602 mov r2, r0 + 8005712: 693b ldr r3, [r7, #16] + 8005714: 1ad3 subs r3, r2, r3 + 8005716: 2b64 cmp r3, #100 @ 0x64 + 8005718: d901 bls.n 800571e { return HAL_TIMEOUT; - 8004e2a: 2303 movs r3, #3 - 8004e2c: e06d b.n 8004f0a + 800571a: 2303 movs r3, #3 + 800571c: e06d b.n 80057fa while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8004e2e: 4b3a ldr r3, [pc, #232] @ (8004f18 ) - 8004e30: 681b ldr r3, [r3, #0] - 8004e32: f403 7380 and.w r3, r3, #256 @ 0x100 - 8004e36: 2b00 cmp r3, #0 - 8004e38: d0f0 beq.n 8004e1c + 800571e: 4b3a ldr r3, [pc, #232] @ (8005808 ) + 8005720: 681b ldr r3, [r3, #0] + 8005722: f403 7380 and.w r3, r3, #256 @ 0x100 + 8005726: 2b00 cmp r3, #0 + 8005728: d0f0 beq.n 800570c } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); - 8004e3a: 4b36 ldr r3, [pc, #216] @ (8004f14 ) - 8004e3c: 6a1b ldr r3, [r3, #32] - 8004e3e: f403 7340 and.w r3, r3, #768 @ 0x300 - 8004e42: 60fb str r3, [r7, #12] + 800572a: 4b36 ldr r3, [pc, #216] @ (8005804 ) + 800572c: 6a1b ldr r3, [r3, #32] + 800572e: f403 7340 and.w r3, r3, #768 @ 0x300 + 8005732: 60fb str r3, [r7, #12] if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) - 8004e44: 68fb ldr r3, [r7, #12] - 8004e46: 2b00 cmp r3, #0 - 8004e48: d02e beq.n 8004ea8 - 8004e4a: 687b ldr r3, [r7, #4] - 8004e4c: 685b ldr r3, [r3, #4] - 8004e4e: f403 7340 and.w r3, r3, #768 @ 0x300 - 8004e52: 68fa ldr r2, [r7, #12] - 8004e54: 429a cmp r2, r3 - 8004e56: d027 beq.n 8004ea8 + 8005734: 68fb ldr r3, [r7, #12] + 8005736: 2b00 cmp r3, #0 + 8005738: d02e beq.n 8005798 + 800573a: 687b ldr r3, [r7, #4] + 800573c: 685b ldr r3, [r3, #4] + 800573e: f403 7340 and.w r3, r3, #768 @ 0x300 + 8005742: 68fa ldr r2, [r7, #12] + 8005744: 429a cmp r2, r3 + 8005746: d027 beq.n 8005798 { /* Store the content of BDCR register before the reset of Backup Domain */ temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); - 8004e58: 4b2e ldr r3, [pc, #184] @ (8004f14 ) - 8004e5a: 6a1b ldr r3, [r3, #32] - 8004e5c: f423 7340 bic.w r3, r3, #768 @ 0x300 - 8004e60: 60fb str r3, [r7, #12] + 8005748: 4b2e ldr r3, [pc, #184] @ (8005804 ) + 800574a: 6a1b ldr r3, [r3, #32] + 800574c: f423 7340 bic.w r3, r3, #768 @ 0x300 + 8005750: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); - 8004e62: 4b2e ldr r3, [pc, #184] @ (8004f1c ) - 8004e64: 2201 movs r2, #1 - 8004e66: 601a str r2, [r3, #0] + 8005752: 4b2e ldr r3, [pc, #184] @ (800580c ) + 8005754: 2201 movs r2, #1 + 8005756: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); - 8004e68: 4b2c ldr r3, [pc, #176] @ (8004f1c ) - 8004e6a: 2200 movs r2, #0 - 8004e6c: 601a str r2, [r3, #0] + 8005758: 4b2c ldr r3, [pc, #176] @ (800580c ) + 800575a: 2200 movs r2, #0 + 800575c: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = temp_reg; - 8004e6e: 4a29 ldr r2, [pc, #164] @ (8004f14 ) - 8004e70: 68fb ldr r3, [r7, #12] - 8004e72: 6213 str r3, [r2, #32] + 800575e: 4a29 ldr r2, [pc, #164] @ (8005804 ) + 8005760: 68fb ldr r3, [r7, #12] + 8005762: 6213 str r3, [r2, #32] /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) - 8004e74: 68fb ldr r3, [r7, #12] - 8004e76: f003 0301 and.w r3, r3, #1 - 8004e7a: 2b00 cmp r3, #0 - 8004e7c: d014 beq.n 8004ea8 + 8005764: 68fb ldr r3, [r7, #12] + 8005766: f003 0301 and.w r3, r3, #1 + 800576a: 2b00 cmp r3, #0 + 800576c: d014 beq.n 8005798 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8004e7e: f7fd fd87 bl 8002990 - 8004e82: 6138 str r0, [r7, #16] + 800576e: f7fd fd87 bl 8003280 + 8005772: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8004e84: e00a b.n 8004e9c + 8005774: e00a b.n 800578c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) - 8004e86: f7fd fd83 bl 8002990 - 8004e8a: 4602 mov r2, r0 - 8004e8c: 693b ldr r3, [r7, #16] - 8004e8e: 1ad3 subs r3, r2, r3 - 8004e90: f241 3288 movw r2, #5000 @ 0x1388 - 8004e94: 4293 cmp r3, r2 - 8004e96: d901 bls.n 8004e9c + 8005776: f7fd fd83 bl 8003280 + 800577a: 4602 mov r2, r0 + 800577c: 693b ldr r3, [r7, #16] + 800577e: 1ad3 subs r3, r2, r3 + 8005780: f241 3288 movw r2, #5000 @ 0x1388 + 8005784: 4293 cmp r3, r2 + 8005786: d901 bls.n 800578c { return HAL_TIMEOUT; - 8004e98: 2303 movs r3, #3 - 8004e9a: e036 b.n 8004f0a + 8005788: 2303 movs r3, #3 + 800578a: e036 b.n 80057fa while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) - 8004e9c: 4b1d ldr r3, [pc, #116] @ (8004f14 ) - 8004e9e: 6a1b ldr r3, [r3, #32] - 8004ea0: f003 0302 and.w r3, r3, #2 - 8004ea4: 2b00 cmp r3, #0 - 8004ea6: d0ee beq.n 8004e86 + 800578c: 4b1d ldr r3, [pc, #116] @ (8005804 ) + 800578e: 6a1b ldr r3, [r3, #32] + 8005790: f003 0302 and.w r3, r3, #2 + 8005794: 2b00 cmp r3, #0 + 8005796: d0ee beq.n 8005776 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 8004ea8: 4b1a ldr r3, [pc, #104] @ (8004f14 ) - 8004eaa: 6a1b ldr r3, [r3, #32] - 8004eac: f423 7240 bic.w r2, r3, #768 @ 0x300 - 8004eb0: 687b ldr r3, [r7, #4] - 8004eb2: 685b ldr r3, [r3, #4] - 8004eb4: 4917 ldr r1, [pc, #92] @ (8004f14 ) - 8004eb6: 4313 orrs r3, r2 - 8004eb8: 620b str r3, [r1, #32] + 8005798: 4b1a ldr r3, [pc, #104] @ (8005804 ) + 800579a: 6a1b ldr r3, [r3, #32] + 800579c: f423 7240 bic.w r2, r3, #768 @ 0x300 + 80057a0: 687b ldr r3, [r7, #4] + 80057a2: 685b ldr r3, [r3, #4] + 80057a4: 4917 ldr r1, [pc, #92] @ (8005804 ) + 80057a6: 4313 orrs r3, r2 + 80057a8: 620b str r3, [r1, #32] /* Require to disable power clock if necessary */ if (pwrclkchanged == SET) - 8004eba: 7dfb ldrb r3, [r7, #23] - 8004ebc: 2b01 cmp r3, #1 - 8004ebe: d105 bne.n 8004ecc + 80057aa: 7dfb ldrb r3, [r7, #23] + 80057ac: 2b01 cmp r3, #1 + 80057ae: d105 bne.n 80057bc { __HAL_RCC_PWR_CLK_DISABLE(); - 8004ec0: 4b14 ldr r3, [pc, #80] @ (8004f14 ) - 8004ec2: 69db ldr r3, [r3, #28] - 8004ec4: 4a13 ldr r2, [pc, #76] @ (8004f14 ) - 8004ec6: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 - 8004eca: 61d3 str r3, [r2, #28] + 80057b0: 4b14 ldr r3, [pc, #80] @ (8005804 ) + 80057b2: 69db ldr r3, [r3, #28] + 80057b4: 4a13 ldr r2, [pc, #76] @ (8005804 ) + 80057b6: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 80057ba: 61d3 str r3, [r2, #28] } } /*------------------------------ ADC clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) - 8004ecc: 687b ldr r3, [r7, #4] - 8004ece: 681b ldr r3, [r3, #0] - 8004ed0: f003 0302 and.w r3, r3, #2 - 8004ed4: 2b00 cmp r3, #0 - 8004ed6: d008 beq.n 8004eea + 80057bc: 687b ldr r3, [r7, #4] + 80057be: 681b ldr r3, [r3, #0] + 80057c0: f003 0302 and.w r3, r3, #2 + 80057c4: 2b00 cmp r3, #0 + 80057c6: d008 beq.n 80057da { /* Check the parameters */ assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); /* Configure the ADC clock source */ __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); - 8004ed8: 4b0e ldr r3, [pc, #56] @ (8004f14 ) - 8004eda: 685b ldr r3, [r3, #4] - 8004edc: f423 4240 bic.w r2, r3, #49152 @ 0xc000 - 8004ee0: 687b ldr r3, [r7, #4] - 8004ee2: 689b ldr r3, [r3, #8] - 8004ee4: 490b ldr r1, [pc, #44] @ (8004f14 ) - 8004ee6: 4313 orrs r3, r2 - 8004ee8: 604b str r3, [r1, #4] + 80057c8: 4b0e ldr r3, [pc, #56] @ (8005804 ) + 80057ca: 685b ldr r3, [r3, #4] + 80057cc: f423 4240 bic.w r2, r3, #49152 @ 0xc000 + 80057d0: 687b ldr r3, [r7, #4] + 80057d2: 689b ldr r3, [r3, #8] + 80057d4: 490b ldr r1, [pc, #44] @ (8005804 ) + 80057d6: 4313 orrs r3, r2 + 80057d8: 604b str r3, [r1, #4] #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ || defined(STM32F105xC) || defined(STM32F107xC) /*------------------------------ USB clock Configuration ------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) - 8004eea: 687b ldr r3, [r7, #4] - 8004eec: 681b ldr r3, [r3, #0] - 8004eee: f003 0310 and.w r3, r3, #16 - 8004ef2: 2b00 cmp r3, #0 - 8004ef4: d008 beq.n 8004f08 + 80057da: 687b ldr r3, [r7, #4] + 80057dc: 681b ldr r3, [r3, #0] + 80057de: f003 0310 and.w r3, r3, #16 + 80057e2: 2b00 cmp r3, #0 + 80057e4: d008 beq.n 80057f8 { /* Check the parameters */ assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); /* Configure the USB clock source */ __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); - 8004ef6: 4b07 ldr r3, [pc, #28] @ (8004f14 ) - 8004ef8: 685b ldr r3, [r3, #4] - 8004efa: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 - 8004efe: 687b ldr r3, [r7, #4] - 8004f00: 68db ldr r3, [r3, #12] - 8004f02: 4904 ldr r1, [pc, #16] @ (8004f14 ) - 8004f04: 4313 orrs r3, r2 - 8004f06: 604b str r3, [r1, #4] + 80057e6: 4b07 ldr r3, [pc, #28] @ (8005804 ) + 80057e8: 685b ldr r3, [r3, #4] + 80057ea: f423 0280 bic.w r2, r3, #4194304 @ 0x400000 + 80057ee: 687b ldr r3, [r7, #4] + 80057f0: 68db ldr r3, [r3, #12] + 80057f2: 4904 ldr r1, [pc, #16] @ (8005804 ) + 80057f4: 4313 orrs r3, r2 + 80057f6: 604b str r3, [r1, #4] } #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ return HAL_OK; - 8004f08: 2300 movs r3, #0 + 80057f8: 2300 movs r3, #0 } - 8004f0a: 4618 mov r0, r3 - 8004f0c: 3718 adds r7, #24 - 8004f0e: 46bd mov sp, r7 - 8004f10: bd80 pop {r7, pc} - 8004f12: bf00 nop - 8004f14: 40021000 .word 0x40021000 - 8004f18: 40007000 .word 0x40007000 - 8004f1c: 42420440 .word 0x42420440 + 80057fa: 4618 mov r0, r3 + 80057fc: 3718 adds r7, #24 + 80057fe: 46bd mov sp, r7 + 8005800: bd80 pop {r7, pc} + 8005802: bf00 nop + 8005804: 40021000 .word 0x40021000 + 8005808: 40007000 .word 0x40007000 + 800580c: 42420440 .word 0x42420440 -08004f20 : +08005810 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { - 8004f20: b580 push {r7, lr} - 8004f22: b082 sub sp, #8 - 8004f24: af00 add r7, sp, #0 - 8004f26: 6078 str r0, [r7, #4] + 8005810: b580 push {r7, lr} + 8005812: b082 sub sp, #8 + 8005814: af00 add r7, sp, #0 + 8005816: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) - 8004f28: 687b ldr r3, [r7, #4] - 8004f2a: 2b00 cmp r3, #0 - 8004f2c: d101 bne.n 8004f32 + 8005818: 687b ldr r3, [r7, #4] + 800581a: 2b00 cmp r3, #0 + 800581c: d101 bne.n 8005822 { return HAL_ERROR; - 8004f2e: 2301 movs r3, #1 - 8004f30: e041 b.n 8004fb6 + 800581e: 2301 movs r3, #1 + 8005820: e041 b.n 80058a6 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) - 8004f32: 687b ldr r3, [r7, #4] - 8004f34: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8004f38: b2db uxtb r3, r3 - 8004f3a: 2b00 cmp r3, #0 - 8004f3c: d106 bne.n 8004f4c + 8005822: 687b ldr r3, [r7, #4] + 8005824: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 8005828: b2db uxtb r3, r3 + 800582a: 2b00 cmp r3, #0 + 800582c: d106 bne.n 800583c { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; - 8004f3e: 687b ldr r3, [r7, #4] - 8004f40: 2200 movs r2, #0 - 8004f42: f883 203c strb.w r2, [r3, #60] @ 0x3c + 800582e: 687b ldr r3, [r7, #4] + 8005830: 2200 movs r2, #0 + 8005832: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); - 8004f46: 6878 ldr r0, [r7, #4] - 8004f48: f7fd fc00 bl 800274c + 8005836: 6878 ldr r0, [r7, #4] + 8005838: f7fd fc00 bl 800303c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8004f4c: 687b ldr r3, [r7, #4] - 8004f4e: 2202 movs r2, #2 - 8004f50: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800583c: 687b ldr r3, [r7, #4] + 800583e: 2202 movs r2, #2 + 8005840: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8004f54: 687b ldr r3, [r7, #4] - 8004f56: 681a ldr r2, [r3, #0] - 8004f58: 687b ldr r3, [r7, #4] - 8004f5a: 3304 adds r3, #4 - 8004f5c: 4619 mov r1, r3 - 8004f5e: 4610 mov r0, r2 - 8004f60: f000 fa5c bl 800541c + 8005844: 687b ldr r3, [r7, #4] + 8005846: 681a ldr r2, [r3, #0] + 8005848: 687b ldr r3, [r7, #4] + 800584a: 3304 adds r3, #4 + 800584c: 4619 mov r1, r3 + 800584e: 4610 mov r0, r2 + 8005850: f000 fa5c bl 8005d0c /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8004f64: 687b ldr r3, [r7, #4] - 8004f66: 2201 movs r2, #1 - 8004f68: f883 2046 strb.w r2, [r3, #70] @ 0x46 + 8005854: 687b ldr r3, [r7, #4] + 8005856: 2201 movs r2, #1 + 8005858: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8004f6c: 687b ldr r3, [r7, #4] - 8004f6e: 2201 movs r2, #1 - 8004f70: f883 203e strb.w r2, [r3, #62] @ 0x3e - 8004f74: 687b ldr r3, [r7, #4] - 8004f76: 2201 movs r2, #1 - 8004f78: f883 203f strb.w r2, [r3, #63] @ 0x3f - 8004f7c: 687b ldr r3, [r7, #4] - 8004f7e: 2201 movs r2, #1 - 8004f80: f883 2040 strb.w r2, [r3, #64] @ 0x40 - 8004f84: 687b ldr r3, [r7, #4] - 8004f86: 2201 movs r2, #1 - 8004f88: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 800585c: 687b ldr r3, [r7, #4] + 800585e: 2201 movs r2, #1 + 8005860: f883 203e strb.w r2, [r3, #62] @ 0x3e + 8005864: 687b ldr r3, [r7, #4] + 8005866: 2201 movs r2, #1 + 8005868: f883 203f strb.w r2, [r3, #63] @ 0x3f + 800586c: 687b ldr r3, [r7, #4] + 800586e: 2201 movs r2, #1 + 8005870: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 8005874: 687b ldr r3, [r7, #4] + 8005876: 2201 movs r2, #1 + 8005878: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8004f8c: 687b ldr r3, [r7, #4] - 8004f8e: 2201 movs r2, #1 - 8004f90: f883 2042 strb.w r2, [r3, #66] @ 0x42 - 8004f94: 687b ldr r3, [r7, #4] - 8004f96: 2201 movs r2, #1 - 8004f98: f883 2043 strb.w r2, [r3, #67] @ 0x43 - 8004f9c: 687b ldr r3, [r7, #4] - 8004f9e: 2201 movs r2, #1 - 8004fa0: f883 2044 strb.w r2, [r3, #68] @ 0x44 - 8004fa4: 687b ldr r3, [r7, #4] - 8004fa6: 2201 movs r2, #1 - 8004fa8: f883 2045 strb.w r2, [r3, #69] @ 0x45 + 800587c: 687b ldr r3, [r7, #4] + 800587e: 2201 movs r2, #1 + 8005880: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8005884: 687b ldr r3, [r7, #4] + 8005886: 2201 movs r2, #1 + 8005888: f883 2043 strb.w r2, [r3, #67] @ 0x43 + 800588c: 687b ldr r3, [r7, #4] + 800588e: 2201 movs r2, #1 + 8005890: f883 2044 strb.w r2, [r3, #68] @ 0x44 + 8005894: 687b ldr r3, [r7, #4] + 8005896: 2201 movs r2, #1 + 8005898: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; - 8004fac: 687b ldr r3, [r7, #4] - 8004fae: 2201 movs r2, #1 - 8004fb0: f883 203d strb.w r2, [r3, #61] @ 0x3d + 800589c: 687b ldr r3, [r7, #4] + 800589e: 2201 movs r2, #1 + 80058a0: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; - 8004fb4: 2300 movs r3, #0 + 80058a4: 2300 movs r3, #0 } - 8004fb6: 4618 mov r0, r3 - 8004fb8: 3708 adds r7, #8 - 8004fba: 46bd mov sp, r7 - 8004fbc: bd80 pop {r7, pc} + 80058a6: 4618 mov r0, r3 + 80058a8: 3708 adds r7, #8 + 80058aa: 46bd mov sp, r7 + 80058ac: bd80 pop {r7, pc} ... -08004fc0 : +080058b0 : * @brief Starts the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) { - 8004fc0: b480 push {r7} - 8004fc2: b085 sub sp, #20 - 8004fc4: af00 add r7, sp, #0 - 8004fc6: 6078 str r0, [r7, #4] + 80058b0: b480 push {r7} + 80058b2: b085 sub sp, #20 + 80058b4: af00 add r7, sp, #0 + 80058b6: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Check the TIM state */ if (htim->State != HAL_TIM_STATE_READY) - 8004fc8: 687b ldr r3, [r7, #4] - 8004fca: f893 303d ldrb.w r3, [r3, #61] @ 0x3d - 8004fce: b2db uxtb r3, r3 - 8004fd0: 2b01 cmp r3, #1 - 8004fd2: d001 beq.n 8004fd8 + 80058b8: 687b ldr r3, [r7, #4] + 80058ba: f893 303d ldrb.w r3, [r3, #61] @ 0x3d + 80058be: b2db uxtb r3, r3 + 80058c0: 2b01 cmp r3, #1 + 80058c2: d001 beq.n 80058c8 { return HAL_ERROR; - 8004fd4: 2301 movs r3, #1 - 8004fd6: e03a b.n 800504e + 80058c4: 2301 movs r3, #1 + 80058c6: e03a b.n 800593e } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8004fd8: 687b ldr r3, [r7, #4] - 8004fda: 2202 movs r2, #2 - 8004fdc: f883 203d strb.w r2, [r3, #61] @ 0x3d + 80058c8: 687b ldr r3, [r7, #4] + 80058ca: 2202 movs r2, #2 + 80058cc: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - 8004fe0: 687b ldr r3, [r7, #4] - 8004fe2: 681b ldr r3, [r3, #0] - 8004fe4: 68da ldr r2, [r3, #12] - 8004fe6: 687b ldr r3, [r7, #4] - 8004fe8: 681b ldr r3, [r3, #0] - 8004fea: f042 0201 orr.w r2, r2, #1 - 8004fee: 60da str r2, [r3, #12] + 80058d0: 687b ldr r3, [r7, #4] + 80058d2: 681b ldr r3, [r3, #0] + 80058d4: 68da ldr r2, [r3, #12] + 80058d6: 687b ldr r3, [r7, #4] + 80058d8: 681b ldr r3, [r3, #0] + 80058da: f042 0201 orr.w r2, r2, #1 + 80058de: 60da str r2, [r3, #12] /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8004ff0: 687b ldr r3, [r7, #4] - 8004ff2: 681b ldr r3, [r3, #0] - 8004ff4: 4a18 ldr r2, [pc, #96] @ (8005058 ) - 8004ff6: 4293 cmp r3, r2 - 8004ff8: d00e beq.n 8005018 - 8004ffa: 687b ldr r3, [r7, #4] - 8004ffc: 681b ldr r3, [r3, #0] - 8004ffe: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 8005002: d009 beq.n 8005018 - 8005004: 687b ldr r3, [r7, #4] - 8005006: 681b ldr r3, [r3, #0] - 8005008: 4a14 ldr r2, [pc, #80] @ (800505c ) - 800500a: 4293 cmp r3, r2 - 800500c: d004 beq.n 8005018 - 800500e: 687b ldr r3, [r7, #4] - 8005010: 681b ldr r3, [r3, #0] - 8005012: 4a13 ldr r2, [pc, #76] @ (8005060 ) - 8005014: 4293 cmp r3, r2 - 8005016: d111 bne.n 800503c + 80058e0: 687b ldr r3, [r7, #4] + 80058e2: 681b ldr r3, [r3, #0] + 80058e4: 4a18 ldr r2, [pc, #96] @ (8005948 ) + 80058e6: 4293 cmp r3, r2 + 80058e8: d00e beq.n 8005908 + 80058ea: 687b ldr r3, [r7, #4] + 80058ec: 681b ldr r3, [r3, #0] + 80058ee: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 80058f2: d009 beq.n 8005908 + 80058f4: 687b ldr r3, [r7, #4] + 80058f6: 681b ldr r3, [r3, #0] + 80058f8: 4a14 ldr r2, [pc, #80] @ (800594c ) + 80058fa: 4293 cmp r3, r2 + 80058fc: d004 beq.n 8005908 + 80058fe: 687b ldr r3, [r7, #4] + 8005900: 681b ldr r3, [r3, #0] + 8005902: 4a13 ldr r2, [pc, #76] @ (8005950 ) + 8005904: 4293 cmp r3, r2 + 8005906: d111 bne.n 800592c { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - 8005018: 687b ldr r3, [r7, #4] - 800501a: 681b ldr r3, [r3, #0] - 800501c: 689b ldr r3, [r3, #8] - 800501e: f003 0307 and.w r3, r3, #7 - 8005022: 60fb str r3, [r7, #12] + 8005908: 687b ldr r3, [r7, #4] + 800590a: 681b ldr r3, [r3, #0] + 800590c: 689b ldr r3, [r3, #8] + 800590e: f003 0307 and.w r3, r3, #7 + 8005912: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 8005024: 68fb ldr r3, [r7, #12] - 8005026: 2b06 cmp r3, #6 - 8005028: d010 beq.n 800504c + 8005914: 68fb ldr r3, [r7, #12] + 8005916: 2b06 cmp r3, #6 + 8005918: d010 beq.n 800593c { __HAL_TIM_ENABLE(htim); - 800502a: 687b ldr r3, [r7, #4] - 800502c: 681b ldr r3, [r3, #0] - 800502e: 681a ldr r2, [r3, #0] - 8005030: 687b ldr r3, [r7, #4] - 8005032: 681b ldr r3, [r3, #0] - 8005034: f042 0201 orr.w r2, r2, #1 - 8005038: 601a str r2, [r3, #0] + 800591a: 687b ldr r3, [r7, #4] + 800591c: 681b ldr r3, [r3, #0] + 800591e: 681a ldr r2, [r3, #0] + 8005920: 687b ldr r3, [r7, #4] + 8005922: 681b ldr r3, [r3, #0] + 8005924: f042 0201 orr.w r2, r2, #1 + 8005928: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - 800503a: e007 b.n 800504c + 800592a: e007 b.n 800593c } } else { __HAL_TIM_ENABLE(htim); - 800503c: 687b ldr r3, [r7, #4] - 800503e: 681b ldr r3, [r3, #0] - 8005040: 681a ldr r2, [r3, #0] - 8005042: 687b ldr r3, [r7, #4] - 8005044: 681b ldr r3, [r3, #0] - 8005046: f042 0201 orr.w r2, r2, #1 - 800504a: 601a str r2, [r3, #0] + 800592c: 687b ldr r3, [r7, #4] + 800592e: 681b ldr r3, [r3, #0] + 8005930: 681a ldr r2, [r3, #0] + 8005932: 687b ldr r3, [r7, #4] + 8005934: 681b ldr r3, [r3, #0] + 8005936: f042 0201 orr.w r2, r2, #1 + 800593a: 601a str r2, [r3, #0] } /* Return function status */ return HAL_OK; - 800504c: 2300 movs r3, #0 + 800593c: 2300 movs r3, #0 } - 800504e: 4618 mov r0, r3 - 8005050: 3714 adds r7, #20 - 8005052: 46bd mov sp, r7 - 8005054: bc80 pop {r7} - 8005056: 4770 bx lr - 8005058: 40012c00 .word 0x40012c00 - 800505c: 40000400 .word 0x40000400 - 8005060: 40000800 .word 0x40000800 + 800593e: 4618 mov r0, r3 + 8005940: 3714 adds r7, #20 + 8005942: 46bd mov sp, r7 + 8005944: bc80 pop {r7} + 8005946: 4770 bx lr + 8005948: 40012c00 .word 0x40012c00 + 800594c: 40000400 .word 0x40000400 + 8005950: 40000800 .word 0x40000800 -08005064 : +08005954 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { - 8005064: b580 push {r7, lr} - 8005066: b084 sub sp, #16 - 8005068: af00 add r7, sp, #0 - 800506a: 6078 str r0, [r7, #4] + 8005954: b580 push {r7, lr} + 8005956: b084 sub sp, #16 + 8005958: af00 add r7, sp, #0 + 800595a: 6078 str r0, [r7, #4] uint32_t itsource = htim->Instance->DIER; - 800506c: 687b ldr r3, [r7, #4] - 800506e: 681b ldr r3, [r3, #0] - 8005070: 68db ldr r3, [r3, #12] - 8005072: 60fb str r3, [r7, #12] + 800595c: 687b ldr r3, [r7, #4] + 800595e: 681b ldr r3, [r3, #0] + 8005960: 68db ldr r3, [r3, #12] + 8005962: 60fb str r3, [r7, #12] uint32_t itflag = htim->Instance->SR; - 8005074: 687b ldr r3, [r7, #4] - 8005076: 681b ldr r3, [r3, #0] - 8005078: 691b ldr r3, [r3, #16] - 800507a: 60bb str r3, [r7, #8] + 8005964: 687b ldr r3, [r7, #4] + 8005966: 681b ldr r3, [r3, #0] + 8005968: 691b ldr r3, [r3, #16] + 800596a: 60bb str r3, [r7, #8] /* Capture compare 1 event */ if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) - 800507c: 68bb ldr r3, [r7, #8] - 800507e: f003 0302 and.w r3, r3, #2 - 8005082: 2b00 cmp r3, #0 - 8005084: d020 beq.n 80050c8 + 800596c: 68bb ldr r3, [r7, #8] + 800596e: f003 0302 and.w r3, r3, #2 + 8005972: 2b00 cmp r3, #0 + 8005974: d020 beq.n 80059b8 { if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) - 8005086: 68fb ldr r3, [r7, #12] - 8005088: f003 0302 and.w r3, r3, #2 - 800508c: 2b00 cmp r3, #0 - 800508e: d01b beq.n 80050c8 + 8005976: 68fb ldr r3, [r7, #12] + 8005978: f003 0302 and.w r3, r3, #2 + 800597c: 2b00 cmp r3, #0 + 800597e: d01b beq.n 80059b8 { { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); - 8005090: 687b ldr r3, [r7, #4] - 8005092: 681b ldr r3, [r3, #0] - 8005094: f06f 0202 mvn.w r2, #2 - 8005098: 611a str r2, [r3, #16] + 8005980: 687b ldr r3, [r7, #4] + 8005982: 681b ldr r3, [r3, #0] + 8005984: f06f 0202 mvn.w r2, #2 + 8005988: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 800509a: 687b ldr r3, [r7, #4] - 800509c: 2201 movs r2, #1 - 800509e: 771a strb r2, [r3, #28] + 800598a: 687b ldr r3, [r7, #4] + 800598c: 2201 movs r2, #1 + 800598e: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 80050a0: 687b ldr r3, [r7, #4] - 80050a2: 681b ldr r3, [r3, #0] - 80050a4: 699b ldr r3, [r3, #24] - 80050a6: f003 0303 and.w r3, r3, #3 - 80050aa: 2b00 cmp r3, #0 - 80050ac: d003 beq.n 80050b6 + 8005990: 687b ldr r3, [r7, #4] + 8005992: 681b ldr r3, [r3, #0] + 8005994: 699b ldr r3, [r3, #24] + 8005996: f003 0303 and.w r3, r3, #3 + 800599a: 2b00 cmp r3, #0 + 800599c: d003 beq.n 80059a6 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 80050ae: 6878 ldr r0, [r7, #4] - 80050b0: f000 f998 bl 80053e4 - 80050b4: e005 b.n 80050c2 + 800599e: 6878 ldr r0, [r7, #4] + 80059a0: f000 f998 bl 8005cd4 + 80059a4: e005 b.n 80059b2 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 80050b6: 6878 ldr r0, [r7, #4] - 80050b8: f000 f98b bl 80053d2 + 80059a6: 6878 ldr r0, [r7, #4] + 80059a8: f000 f98b bl 8005cc2 HAL_TIM_PWM_PulseFinishedCallback(htim); - 80050bc: 6878 ldr r0, [r7, #4] - 80050be: f000 f99a bl 80053f6 + 80059ac: 6878 ldr r0, [r7, #4] + 80059ae: f000 f99a bl 8005ce6 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 80050c2: 687b ldr r3, [r7, #4] - 80050c4: 2200 movs r2, #0 - 80050c6: 771a strb r2, [r3, #28] + 80059b2: 687b ldr r3, [r7, #4] + 80059b4: 2200 movs r2, #0 + 80059b6: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) - 80050c8: 68bb ldr r3, [r7, #8] - 80050ca: f003 0304 and.w r3, r3, #4 - 80050ce: 2b00 cmp r3, #0 - 80050d0: d020 beq.n 8005114 + 80059b8: 68bb ldr r3, [r7, #8] + 80059ba: f003 0304 and.w r3, r3, #4 + 80059be: 2b00 cmp r3, #0 + 80059c0: d020 beq.n 8005a04 { if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) - 80050d2: 68fb ldr r3, [r7, #12] - 80050d4: f003 0304 and.w r3, r3, #4 - 80050d8: 2b00 cmp r3, #0 - 80050da: d01b beq.n 8005114 + 80059c2: 68fb ldr r3, [r7, #12] + 80059c4: f003 0304 and.w r3, r3, #4 + 80059c8: 2b00 cmp r3, #0 + 80059ca: d01b beq.n 8005a04 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); - 80050dc: 687b ldr r3, [r7, #4] - 80050de: 681b ldr r3, [r3, #0] - 80050e0: f06f 0204 mvn.w r2, #4 - 80050e4: 611a str r2, [r3, #16] + 80059cc: 687b ldr r3, [r7, #4] + 80059ce: 681b ldr r3, [r3, #0] + 80059d0: f06f 0204 mvn.w r2, #4 + 80059d4: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 80050e6: 687b ldr r3, [r7, #4] - 80050e8: 2202 movs r2, #2 - 80050ea: 771a strb r2, [r3, #28] + 80059d6: 687b ldr r3, [r7, #4] + 80059d8: 2202 movs r2, #2 + 80059da: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 80050ec: 687b ldr r3, [r7, #4] - 80050ee: 681b ldr r3, [r3, #0] - 80050f0: 699b ldr r3, [r3, #24] - 80050f2: f403 7340 and.w r3, r3, #768 @ 0x300 - 80050f6: 2b00 cmp r3, #0 - 80050f8: d003 beq.n 8005102 + 80059dc: 687b ldr r3, [r7, #4] + 80059de: 681b ldr r3, [r3, #0] + 80059e0: 699b ldr r3, [r3, #24] + 80059e2: f403 7340 and.w r3, r3, #768 @ 0x300 + 80059e6: 2b00 cmp r3, #0 + 80059e8: d003 beq.n 80059f2 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 80050fa: 6878 ldr r0, [r7, #4] - 80050fc: f000 f972 bl 80053e4 - 8005100: e005 b.n 800510e + 80059ea: 6878 ldr r0, [r7, #4] + 80059ec: f000 f972 bl 8005cd4 + 80059f0: e005 b.n 80059fe { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8005102: 6878 ldr r0, [r7, #4] - 8005104: f000 f965 bl 80053d2 + 80059f2: 6878 ldr r0, [r7, #4] + 80059f4: f000 f965 bl 8005cc2 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8005108: 6878 ldr r0, [r7, #4] - 800510a: f000 f974 bl 80053f6 + 80059f8: 6878 ldr r0, [r7, #4] + 80059fa: f000 f974 bl 8005ce6 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 800510e: 687b ldr r3, [r7, #4] - 8005110: 2200 movs r2, #0 - 8005112: 771a strb r2, [r3, #28] + 80059fe: 687b ldr r3, [r7, #4] + 8005a00: 2200 movs r2, #0 + 8005a02: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) - 8005114: 68bb ldr r3, [r7, #8] - 8005116: f003 0308 and.w r3, r3, #8 - 800511a: 2b00 cmp r3, #0 - 800511c: d020 beq.n 8005160 + 8005a04: 68bb ldr r3, [r7, #8] + 8005a06: f003 0308 and.w r3, r3, #8 + 8005a0a: 2b00 cmp r3, #0 + 8005a0c: d020 beq.n 8005a50 { if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) - 800511e: 68fb ldr r3, [r7, #12] - 8005120: f003 0308 and.w r3, r3, #8 - 8005124: 2b00 cmp r3, #0 - 8005126: d01b beq.n 8005160 + 8005a0e: 68fb ldr r3, [r7, #12] + 8005a10: f003 0308 and.w r3, r3, #8 + 8005a14: 2b00 cmp r3, #0 + 8005a16: d01b beq.n 8005a50 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); - 8005128: 687b ldr r3, [r7, #4] - 800512a: 681b ldr r3, [r3, #0] - 800512c: f06f 0208 mvn.w r2, #8 - 8005130: 611a str r2, [r3, #16] + 8005a18: 687b ldr r3, [r7, #4] + 8005a1a: 681b ldr r3, [r3, #0] + 8005a1c: f06f 0208 mvn.w r2, #8 + 8005a20: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 8005132: 687b ldr r3, [r7, #4] - 8005134: 2204 movs r2, #4 - 8005136: 771a strb r2, [r3, #28] + 8005a22: 687b ldr r3, [r7, #4] + 8005a24: 2204 movs r2, #4 + 8005a26: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 8005138: 687b ldr r3, [r7, #4] - 800513a: 681b ldr r3, [r3, #0] - 800513c: 69db ldr r3, [r3, #28] - 800513e: f003 0303 and.w r3, r3, #3 - 8005142: 2b00 cmp r3, #0 - 8005144: d003 beq.n 800514e + 8005a28: 687b ldr r3, [r7, #4] + 8005a2a: 681b ldr r3, [r3, #0] + 8005a2c: 69db ldr r3, [r3, #28] + 8005a2e: f003 0303 and.w r3, r3, #3 + 8005a32: 2b00 cmp r3, #0 + 8005a34: d003 beq.n 8005a3e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8005146: 6878 ldr r0, [r7, #4] - 8005148: f000 f94c bl 80053e4 - 800514c: e005 b.n 800515a + 8005a36: 6878 ldr r0, [r7, #4] + 8005a38: f000 f94c bl 8005cd4 + 8005a3c: e005 b.n 8005a4a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 800514e: 6878 ldr r0, [r7, #4] - 8005150: f000 f93f bl 80053d2 + 8005a3e: 6878 ldr r0, [r7, #4] + 8005a40: f000 f93f bl 8005cc2 HAL_TIM_PWM_PulseFinishedCallback(htim); - 8005154: 6878 ldr r0, [r7, #4] - 8005156: f000 f94e bl 80053f6 + 8005a44: 6878 ldr r0, [r7, #4] + 8005a46: f000 f94e bl 8005ce6 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 800515a: 687b ldr r3, [r7, #4] - 800515c: 2200 movs r2, #0 - 800515e: 771a strb r2, [r3, #28] + 8005a4a: 687b ldr r3, [r7, #4] + 8005a4c: 2200 movs r2, #0 + 8005a4e: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) - 8005160: 68bb ldr r3, [r7, #8] - 8005162: f003 0310 and.w r3, r3, #16 - 8005166: 2b00 cmp r3, #0 - 8005168: d020 beq.n 80051ac + 8005a50: 68bb ldr r3, [r7, #8] + 8005a52: f003 0310 and.w r3, r3, #16 + 8005a56: 2b00 cmp r3, #0 + 8005a58: d020 beq.n 8005a9c { if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) - 800516a: 68fb ldr r3, [r7, #12] - 800516c: f003 0310 and.w r3, r3, #16 - 8005170: 2b00 cmp r3, #0 - 8005172: d01b beq.n 80051ac + 8005a5a: 68fb ldr r3, [r7, #12] + 8005a5c: f003 0310 and.w r3, r3, #16 + 8005a60: 2b00 cmp r3, #0 + 8005a62: d01b beq.n 8005a9c { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); - 8005174: 687b ldr r3, [r7, #4] - 8005176: 681b ldr r3, [r3, #0] - 8005178: f06f 0210 mvn.w r2, #16 - 800517c: 611a str r2, [r3, #16] + 8005a64: 687b ldr r3, [r7, #4] + 8005a66: 681b ldr r3, [r3, #0] + 8005a68: f06f 0210 mvn.w r2, #16 + 8005a6c: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 800517e: 687b ldr r3, [r7, #4] - 8005180: 2208 movs r2, #8 - 8005182: 771a strb r2, [r3, #28] + 8005a6e: 687b ldr r3, [r7, #4] + 8005a70: 2208 movs r2, #8 + 8005a72: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8005184: 687b ldr r3, [r7, #4] - 8005186: 681b ldr r3, [r3, #0] - 8005188: 69db ldr r3, [r3, #28] - 800518a: f403 7340 and.w r3, r3, #768 @ 0x300 - 800518e: 2b00 cmp r3, #0 - 8005190: d003 beq.n 800519a + 8005a74: 687b ldr r3, [r7, #4] + 8005a76: 681b ldr r3, [r3, #0] + 8005a78: 69db ldr r3, [r3, #28] + 8005a7a: f403 7340 and.w r3, r3, #768 @ 0x300 + 8005a7e: 2b00 cmp r3, #0 + 8005a80: d003 beq.n 8005a8a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8005192: 6878 ldr r0, [r7, #4] - 8005194: f000 f926 bl 80053e4 - 8005198: e005 b.n 80051a6 + 8005a82: 6878 ldr r0, [r7, #4] + 8005a84: f000 f926 bl 8005cd4 + 8005a88: e005 b.n 8005a96 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 800519a: 6878 ldr r0, [r7, #4] - 800519c: f000 f919 bl 80053d2 + 8005a8a: 6878 ldr r0, [r7, #4] + 8005a8c: f000 f919 bl 8005cc2 HAL_TIM_PWM_PulseFinishedCallback(htim); - 80051a0: 6878 ldr r0, [r7, #4] - 80051a2: f000 f928 bl 80053f6 + 8005a90: 6878 ldr r0, [r7, #4] + 8005a92: f000 f928 bl 8005ce6 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 80051a6: 687b ldr r3, [r7, #4] - 80051a8: 2200 movs r2, #0 - 80051aa: 771a strb r2, [r3, #28] + 8005a96: 687b ldr r3, [r7, #4] + 8005a98: 2200 movs r2, #0 + 8005a9a: 771a strb r2, [r3, #28] } } /* TIM Update event */ if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) - 80051ac: 68bb ldr r3, [r7, #8] - 80051ae: f003 0301 and.w r3, r3, #1 - 80051b2: 2b00 cmp r3, #0 - 80051b4: d00c beq.n 80051d0 + 8005a9c: 68bb ldr r3, [r7, #8] + 8005a9e: f003 0301 and.w r3, r3, #1 + 8005aa2: 2b00 cmp r3, #0 + 8005aa4: d00c beq.n 8005ac0 { if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) - 80051b6: 68fb ldr r3, [r7, #12] - 80051b8: f003 0301 and.w r3, r3, #1 - 80051bc: 2b00 cmp r3, #0 - 80051be: d007 beq.n 80051d0 + 8005aa6: 68fb ldr r3, [r7, #12] + 8005aa8: f003 0301 and.w r3, r3, #1 + 8005aac: 2b00 cmp r3, #0 + 8005aae: d007 beq.n 8005ac0 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); - 80051c0: 687b ldr r3, [r7, #4] - 80051c2: 681b ldr r3, [r3, #0] - 80051c4: f06f 0201 mvn.w r2, #1 - 80051c8: 611a str r2, [r3, #16] + 8005ab0: 687b ldr r3, [r7, #4] + 8005ab2: 681b ldr r3, [r3, #0] + 8005ab4: f06f 0201 mvn.w r2, #1 + 8005ab8: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); - 80051ca: 6878 ldr r0, [r7, #4] - 80051cc: f7fd f8e6 bl 800239c + 8005aba: 6878 ldr r0, [r7, #4] + 8005abc: f7fd f8e6 bl 8002c8c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) - 80051d0: 68bb ldr r3, [r7, #8] - 80051d2: f003 0380 and.w r3, r3, #128 @ 0x80 - 80051d6: 2b00 cmp r3, #0 - 80051d8: d00c beq.n 80051f4 + 8005ac0: 68bb ldr r3, [r7, #8] + 8005ac2: f003 0380 and.w r3, r3, #128 @ 0x80 + 8005ac6: 2b00 cmp r3, #0 + 8005ac8: d00c beq.n 8005ae4 { if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) - 80051da: 68fb ldr r3, [r7, #12] - 80051dc: f003 0380 and.w r3, r3, #128 @ 0x80 - 80051e0: 2b00 cmp r3, #0 - 80051e2: d007 beq.n 80051f4 + 8005aca: 68fb ldr r3, [r7, #12] + 8005acc: f003 0380 and.w r3, r3, #128 @ 0x80 + 8005ad0: 2b00 cmp r3, #0 + 8005ad2: d007 beq.n 8005ae4 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK); - 80051e4: 687b ldr r3, [r7, #4] - 80051e6: 681b ldr r3, [r3, #0] - 80051e8: f06f 0280 mvn.w r2, #128 @ 0x80 - 80051ec: 611a str r2, [r3, #16] + 8005ad4: 687b ldr r3, [r7, #4] + 8005ad6: 681b ldr r3, [r3, #0] + 8005ad8: f06f 0280 mvn.w r2, #128 @ 0x80 + 8005adc: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); - 80051ee: 6878 ldr r0, [r7, #4] - 80051f0: f000 fa7f bl 80056f2 + 8005ade: 6878 ldr r0, [r7, #4] + 8005ae0: f000 fa7f bl 8005fe2 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) - 80051f4: 68bb ldr r3, [r7, #8] - 80051f6: f003 0340 and.w r3, r3, #64 @ 0x40 - 80051fa: 2b00 cmp r3, #0 - 80051fc: d00c beq.n 8005218 + 8005ae4: 68bb ldr r3, [r7, #8] + 8005ae6: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005aea: 2b00 cmp r3, #0 + 8005aec: d00c beq.n 8005b08 { if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) - 80051fe: 68fb ldr r3, [r7, #12] - 8005200: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005204: 2b00 cmp r3, #0 - 8005206: d007 beq.n 8005218 + 8005aee: 68fb ldr r3, [r7, #12] + 8005af0: f003 0340 and.w r3, r3, #64 @ 0x40 + 8005af4: 2b00 cmp r3, #0 + 8005af6: d007 beq.n 8005b08 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); - 8005208: 687b ldr r3, [r7, #4] - 800520a: 681b ldr r3, [r3, #0] - 800520c: f06f 0240 mvn.w r2, #64 @ 0x40 - 8005210: 611a str r2, [r3, #16] + 8005af8: 687b ldr r3, [r7, #4] + 8005afa: 681b ldr r3, [r3, #0] + 8005afc: f06f 0240 mvn.w r2, #64 @ 0x40 + 8005b00: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); - 8005212: 6878 ldr r0, [r7, #4] - 8005214: f000 f8f8 bl 8005408 + 8005b02: 6878 ldr r0, [r7, #4] + 8005b04: f000 f8f8 bl 8005cf8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM)) - 8005218: 68bb ldr r3, [r7, #8] - 800521a: f003 0320 and.w r3, r3, #32 - 800521e: 2b00 cmp r3, #0 - 8005220: d00c beq.n 800523c + 8005b08: 68bb ldr r3, [r7, #8] + 8005b0a: f003 0320 and.w r3, r3, #32 + 8005b0e: 2b00 cmp r3, #0 + 8005b10: d00c beq.n 8005b2c { if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM)) - 8005222: 68fb ldr r3, [r7, #12] - 8005224: f003 0320 and.w r3, r3, #32 - 8005228: 2b00 cmp r3, #0 - 800522a: d007 beq.n 800523c + 8005b12: 68fb ldr r3, [r7, #12] + 8005b14: f003 0320 and.w r3, r3, #32 + 8005b18: 2b00 cmp r3, #0 + 8005b1a: d007 beq.n 8005b2c { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); - 800522c: 687b ldr r3, [r7, #4] - 800522e: 681b ldr r3, [r3, #0] - 8005230: f06f 0220 mvn.w r2, #32 - 8005234: 611a str r2, [r3, #16] + 8005b1c: 687b ldr r3, [r7, #4] + 8005b1e: 681b ldr r3, [r3, #0] + 8005b20: f06f 0220 mvn.w r2, #32 + 8005b24: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); - 8005236: 6878 ldr r0, [r7, #4] - 8005238: f000 fa52 bl 80056e0 + 8005b26: 6878 ldr r0, [r7, #4] + 8005b28: f000 fa52 bl 8005fd0 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } - 800523c: bf00 nop - 800523e: 3710 adds r7, #16 - 8005240: 46bd mov sp, r7 - 8005242: bd80 pop {r7, pc} + 8005b2c: bf00 nop + 8005b2e: 3710 adds r7, #16 + 8005b30: 46bd mov sp, r7 + 8005b32: bd80 pop {r7, pc} -08005244 : +08005b34 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { - 8005244: b580 push {r7, lr} - 8005246: b084 sub sp, #16 - 8005248: af00 add r7, sp, #0 - 800524a: 6078 str r0, [r7, #4] - 800524c: 6039 str r1, [r7, #0] + 8005b34: b580 push {r7, lr} + 8005b36: b084 sub sp, #16 + 8005b38: af00 add r7, sp, #0 + 8005b3a: 6078 str r0, [r7, #4] + 8005b3c: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; - 800524e: 2300 movs r3, #0 - 8005250: 73fb strb r3, [r7, #15] + 8005b3e: 2300 movs r3, #0 + 8005b40: 73fb strb r3, [r7, #15] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); - 8005252: 687b ldr r3, [r7, #4] - 8005254: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8005258: 2b01 cmp r3, #1 - 800525a: d101 bne.n 8005260 - 800525c: 2302 movs r3, #2 - 800525e: e0b4 b.n 80053ca - 8005260: 687b ldr r3, [r7, #4] - 8005262: 2201 movs r2, #1 - 8005264: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8005b42: 687b ldr r3, [r7, #4] + 8005b44: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8005b48: 2b01 cmp r3, #1 + 8005b4a: d101 bne.n 8005b50 + 8005b4c: 2302 movs r3, #2 + 8005b4e: e0b4 b.n 8005cba + 8005b50: 687b ldr r3, [r7, #4] + 8005b52: 2201 movs r2, #1 + 8005b54: f883 203c strb.w r2, [r3, #60] @ 0x3c htim->State = HAL_TIM_STATE_BUSY; - 8005268: 687b ldr r3, [r7, #4] - 800526a: 2202 movs r2, #2 - 800526c: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005b58: 687b ldr r3, [r7, #4] + 8005b5a: 2202 movs r2, #2 + 8005b5c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; - 8005270: 687b ldr r3, [r7, #4] - 8005272: 681b ldr r3, [r3, #0] - 8005274: 689b ldr r3, [r3, #8] - 8005276: 60bb str r3, [r7, #8] + 8005b60: 687b ldr r3, [r7, #4] + 8005b62: 681b ldr r3, [r3, #0] + 8005b64: 689b ldr r3, [r3, #8] + 8005b66: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - 8005278: 68bb ldr r3, [r7, #8] - 800527a: f023 0377 bic.w r3, r3, #119 @ 0x77 - 800527e: 60bb str r3, [r7, #8] + 8005b68: 68bb ldr r3, [r7, #8] + 8005b6a: f023 0377 bic.w r3, r3, #119 @ 0x77 + 8005b6e: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8005280: 68bb ldr r3, [r7, #8] - 8005282: f423 437f bic.w r3, r3, #65280 @ 0xff00 - 8005286: 60bb str r3, [r7, #8] + 8005b70: 68bb ldr r3, [r7, #8] + 8005b72: f423 437f bic.w r3, r3, #65280 @ 0xff00 + 8005b76: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; - 8005288: 687b ldr r3, [r7, #4] - 800528a: 681b ldr r3, [r3, #0] - 800528c: 68ba ldr r2, [r7, #8] - 800528e: 609a str r2, [r3, #8] + 8005b78: 687b ldr r3, [r7, #4] + 8005b7a: 681b ldr r3, [r3, #0] + 8005b7c: 68ba ldr r2, [r7, #8] + 8005b7e: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) - 8005290: 683b ldr r3, [r7, #0] - 8005292: 681b ldr r3, [r3, #0] - 8005294: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 - 8005298: d03e beq.n 8005318 - 800529a: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 - 800529e: f200 8087 bhi.w 80053b0 - 80052a2: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 80052a6: f000 8086 beq.w 80053b6 - 80052aa: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 80052ae: d87f bhi.n 80053b0 - 80052b0: 2b70 cmp r3, #112 @ 0x70 - 80052b2: d01a beq.n 80052ea - 80052b4: 2b70 cmp r3, #112 @ 0x70 - 80052b6: d87b bhi.n 80053b0 - 80052b8: 2b60 cmp r3, #96 @ 0x60 - 80052ba: d050 beq.n 800535e - 80052bc: 2b60 cmp r3, #96 @ 0x60 - 80052be: d877 bhi.n 80053b0 - 80052c0: 2b50 cmp r3, #80 @ 0x50 - 80052c2: d03c beq.n 800533e - 80052c4: 2b50 cmp r3, #80 @ 0x50 - 80052c6: d873 bhi.n 80053b0 - 80052c8: 2b40 cmp r3, #64 @ 0x40 - 80052ca: d058 beq.n 800537e - 80052cc: 2b40 cmp r3, #64 @ 0x40 - 80052ce: d86f bhi.n 80053b0 - 80052d0: 2b30 cmp r3, #48 @ 0x30 - 80052d2: d064 beq.n 800539e - 80052d4: 2b30 cmp r3, #48 @ 0x30 - 80052d6: d86b bhi.n 80053b0 - 80052d8: 2b20 cmp r3, #32 - 80052da: d060 beq.n 800539e - 80052dc: 2b20 cmp r3, #32 - 80052de: d867 bhi.n 80053b0 - 80052e0: 2b00 cmp r3, #0 - 80052e2: d05c beq.n 800539e - 80052e4: 2b10 cmp r3, #16 - 80052e6: d05a beq.n 800539e - 80052e8: e062 b.n 80053b0 + 8005b80: 683b ldr r3, [r7, #0] + 8005b82: 681b ldr r3, [r3, #0] + 8005b84: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 + 8005b88: d03e beq.n 8005c08 + 8005b8a: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 + 8005b8e: f200 8087 bhi.w 8005ca0 + 8005b92: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8005b96: f000 8086 beq.w 8005ca6 + 8005b9a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 8005b9e: d87f bhi.n 8005ca0 + 8005ba0: 2b70 cmp r3, #112 @ 0x70 + 8005ba2: d01a beq.n 8005bda + 8005ba4: 2b70 cmp r3, #112 @ 0x70 + 8005ba6: d87b bhi.n 8005ca0 + 8005ba8: 2b60 cmp r3, #96 @ 0x60 + 8005baa: d050 beq.n 8005c4e + 8005bac: 2b60 cmp r3, #96 @ 0x60 + 8005bae: d877 bhi.n 8005ca0 + 8005bb0: 2b50 cmp r3, #80 @ 0x50 + 8005bb2: d03c beq.n 8005c2e + 8005bb4: 2b50 cmp r3, #80 @ 0x50 + 8005bb6: d873 bhi.n 8005ca0 + 8005bb8: 2b40 cmp r3, #64 @ 0x40 + 8005bba: d058 beq.n 8005c6e + 8005bbc: 2b40 cmp r3, #64 @ 0x40 + 8005bbe: d86f bhi.n 8005ca0 + 8005bc0: 2b30 cmp r3, #48 @ 0x30 + 8005bc2: d064 beq.n 8005c8e + 8005bc4: 2b30 cmp r3, #48 @ 0x30 + 8005bc6: d86b bhi.n 8005ca0 + 8005bc8: 2b20 cmp r3, #32 + 8005bca: d060 beq.n 8005c8e + 8005bcc: 2b20 cmp r3, #32 + 8005bce: d867 bhi.n 8005ca0 + 8005bd0: 2b00 cmp r3, #0 + 8005bd2: d05c beq.n 8005c8e + 8005bd4: 2b10 cmp r3, #16 + 8005bd6: d05a beq.n 8005c8e + 8005bd8: e062 b.n 8005ca0 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 80052ea: 687b ldr r3, [r7, #4] - 80052ec: 6818 ldr r0, [r3, #0] + 8005bda: 687b ldr r3, [r7, #4] + 8005bdc: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, - 80052ee: 683b ldr r3, [r7, #0] - 80052f0: 6899 ldr r1, [r3, #8] + 8005bde: 683b ldr r3, [r7, #0] + 8005be0: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, - 80052f2: 683b ldr r3, [r7, #0] - 80052f4: 685a ldr r2, [r3, #4] + 8005be2: 683b ldr r3, [r7, #0] + 8005be4: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); - 80052f6: 683b ldr r3, [r7, #0] - 80052f8: 68db ldr r3, [r3, #12] + 8005be6: 683b ldr r3, [r7, #0] + 8005be8: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, - 80052fa: f000 f974 bl 80055e6 + 8005bea: f000 f974 bl 8005ed6 /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; - 80052fe: 687b ldr r3, [r7, #4] - 8005300: 681b ldr r3, [r3, #0] - 8005302: 689b ldr r3, [r3, #8] - 8005304: 60bb str r3, [r7, #8] + 8005bee: 687b ldr r3, [r7, #4] + 8005bf0: 681b ldr r3, [r3, #0] + 8005bf2: 689b ldr r3, [r3, #8] + 8005bf4: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 8005306: 68bb ldr r3, [r7, #8] - 8005308: f043 0377 orr.w r3, r3, #119 @ 0x77 - 800530c: 60bb str r3, [r7, #8] + 8005bf6: 68bb ldr r3, [r7, #8] + 8005bf8: f043 0377 orr.w r3, r3, #119 @ 0x77 + 8005bfc: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 800530e: 687b ldr r3, [r7, #4] - 8005310: 681b ldr r3, [r3, #0] - 8005312: 68ba ldr r2, [r7, #8] - 8005314: 609a str r2, [r3, #8] + 8005bfe: 687b ldr r3, [r7, #4] + 8005c00: 681b ldr r3, [r3, #0] + 8005c02: 68ba ldr r2, [r7, #8] + 8005c04: 609a str r2, [r3, #8] break; - 8005316: e04f b.n 80053b8 + 8005c06: e04f b.n 8005ca8 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 8005318: 687b ldr r3, [r7, #4] - 800531a: 6818 ldr r0, [r3, #0] + 8005c08: 687b ldr r3, [r7, #4] + 8005c0a: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, - 800531c: 683b ldr r3, [r7, #0] - 800531e: 6899 ldr r1, [r3, #8] + 8005c0c: 683b ldr r3, [r7, #0] + 8005c0e: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, - 8005320: 683b ldr r3, [r7, #0] - 8005322: 685a ldr r2, [r3, #4] + 8005c10: 683b ldr r3, [r7, #0] + 8005c12: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); - 8005324: 683b ldr r3, [r7, #0] - 8005326: 68db ldr r3, [r3, #12] + 8005c14: 683b ldr r3, [r7, #0] + 8005c16: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, - 8005328: f000 f95d bl 80055e6 + 8005c18: f000 f95d bl 8005ed6 /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; - 800532c: 687b ldr r3, [r7, #4] - 800532e: 681b ldr r3, [r3, #0] - 8005330: 689a ldr r2, [r3, #8] - 8005332: 687b ldr r3, [r7, #4] - 8005334: 681b ldr r3, [r3, #0] - 8005336: f442 4280 orr.w r2, r2, #16384 @ 0x4000 - 800533a: 609a str r2, [r3, #8] + 8005c1c: 687b ldr r3, [r7, #4] + 8005c1e: 681b ldr r3, [r3, #0] + 8005c20: 689a ldr r2, [r3, #8] + 8005c22: 687b ldr r3, [r7, #4] + 8005c24: 681b ldr r3, [r3, #0] + 8005c26: f442 4280 orr.w r2, r2, #16384 @ 0x4000 + 8005c2a: 609a str r2, [r3, #8] break; - 800533c: e03c b.n 80053b8 + 8005c2c: e03c b.n 8005ca8 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 800533e: 687b ldr r3, [r7, #4] - 8005340: 6818 ldr r0, [r3, #0] + 8005c2e: 687b ldr r3, [r7, #4] + 8005c30: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 8005342: 683b ldr r3, [r7, #0] - 8005344: 6859 ldr r1, [r3, #4] + 8005c32: 683b ldr r3, [r7, #0] + 8005c34: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 8005346: 683b ldr r3, [r7, #0] - 8005348: 68db ldr r3, [r3, #12] + 8005c36: 683b ldr r3, [r7, #0] + 8005c38: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, - 800534a: 461a mov r2, r3 - 800534c: f000 f8d4 bl 80054f8 + 8005c3a: 461a mov r2, r3 + 8005c3c: f000 f8d4 bl 8005de8 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - 8005350: 687b ldr r3, [r7, #4] - 8005352: 681b ldr r3, [r3, #0] - 8005354: 2150 movs r1, #80 @ 0x50 - 8005356: 4618 mov r0, r3 - 8005358: f000 f92b bl 80055b2 + 8005c40: 687b ldr r3, [r7, #4] + 8005c42: 681b ldr r3, [r3, #0] + 8005c44: 2150 movs r1, #80 @ 0x50 + 8005c46: 4618 mov r0, r3 + 8005c48: f000 f92b bl 8005ea2 break; - 800535c: e02c b.n 80053b8 + 8005c4c: e02c b.n 8005ca8 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, - 800535e: 687b ldr r3, [r7, #4] - 8005360: 6818 ldr r0, [r3, #0] + 8005c4e: 687b ldr r3, [r7, #4] + 8005c50: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 8005362: 683b ldr r3, [r7, #0] - 8005364: 6859 ldr r1, [r3, #4] + 8005c52: 683b ldr r3, [r7, #0] + 8005c54: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 8005366: 683b ldr r3, [r7, #0] - 8005368: 68db ldr r3, [r3, #12] + 8005c56: 683b ldr r3, [r7, #0] + 8005c58: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, - 800536a: 461a mov r2, r3 - 800536c: f000 f8f2 bl 8005554 + 8005c5a: 461a mov r2, r3 + 8005c5c: f000 f8f2 bl 8005e44 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - 8005370: 687b ldr r3, [r7, #4] - 8005372: 681b ldr r3, [r3, #0] - 8005374: 2160 movs r1, #96 @ 0x60 - 8005376: 4618 mov r0, r3 - 8005378: f000 f91b bl 80055b2 + 8005c60: 687b ldr r3, [r7, #4] + 8005c62: 681b ldr r3, [r3, #0] + 8005c64: 2160 movs r1, #96 @ 0x60 + 8005c66: 4618 mov r0, r3 + 8005c68: f000 f91b bl 8005ea2 break; - 800537c: e01c b.n 80053b8 + 8005c6c: e01c b.n 8005ca8 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 800537e: 687b ldr r3, [r7, #4] - 8005380: 6818 ldr r0, [r3, #0] + 8005c6e: 687b ldr r3, [r7, #4] + 8005c70: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 8005382: 683b ldr r3, [r7, #0] - 8005384: 6859 ldr r1, [r3, #4] + 8005c72: 683b ldr r3, [r7, #0] + 8005c74: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 8005386: 683b ldr r3, [r7, #0] - 8005388: 68db ldr r3, [r3, #12] + 8005c76: 683b ldr r3, [r7, #0] + 8005c78: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, - 800538a: 461a mov r2, r3 - 800538c: f000 f8b4 bl 80054f8 + 8005c7a: 461a mov r2, r3 + 8005c7c: f000 f8b4 bl 8005de8 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - 8005390: 687b ldr r3, [r7, #4] - 8005392: 681b ldr r3, [r3, #0] - 8005394: 2140 movs r1, #64 @ 0x40 - 8005396: 4618 mov r0, r3 - 8005398: f000 f90b bl 80055b2 + 8005c80: 687b ldr r3, [r7, #4] + 8005c82: 681b ldr r3, [r3, #0] + 8005c84: 2140 movs r1, #64 @ 0x40 + 8005c86: 4618 mov r0, r3 + 8005c88: f000 f90b bl 8005ea2 break; - 800539c: e00c b.n 80053b8 + 8005c8c: e00c b.n 8005ca8 case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - 800539e: 687b ldr r3, [r7, #4] - 80053a0: 681a ldr r2, [r3, #0] - 80053a2: 683b ldr r3, [r7, #0] - 80053a4: 681b ldr r3, [r3, #0] - 80053a6: 4619 mov r1, r3 - 80053a8: 4610 mov r0, r2 - 80053aa: f000 f902 bl 80055b2 + 8005c8e: 687b ldr r3, [r7, #4] + 8005c90: 681a ldr r2, [r3, #0] + 8005c92: 683b ldr r3, [r7, #0] + 8005c94: 681b ldr r3, [r3, #0] + 8005c96: 4619 mov r1, r3 + 8005c98: 4610 mov r0, r2 + 8005c9a: f000 f902 bl 8005ea2 break; - 80053ae: e003 b.n 80053b8 + 8005c9e: e003 b.n 8005ca8 } default: status = HAL_ERROR; - 80053b0: 2301 movs r3, #1 - 80053b2: 73fb strb r3, [r7, #15] + 8005ca0: 2301 movs r3, #1 + 8005ca2: 73fb strb r3, [r7, #15] break; - 80053b4: e000 b.n 80053b8 + 8005ca4: e000 b.n 8005ca8 break; - 80053b6: bf00 nop + 8005ca6: bf00 nop } htim->State = HAL_TIM_STATE_READY; - 80053b8: 687b ldr r3, [r7, #4] - 80053ba: 2201 movs r2, #1 - 80053bc: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005ca8: 687b ldr r3, [r7, #4] + 8005caa: 2201 movs r2, #1 + 8005cac: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); - 80053c0: 687b ldr r3, [r7, #4] - 80053c2: 2200 movs r2, #0 - 80053c4: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8005cb0: 687b ldr r3, [r7, #4] + 8005cb2: 2200 movs r2, #0 + 8005cb4: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; - 80053c8: 7bfb ldrb r3, [r7, #15] + 8005cb8: 7bfb ldrb r3, [r7, #15] } - 80053ca: 4618 mov r0, r3 - 80053cc: 3710 adds r7, #16 - 80053ce: 46bd mov sp, r7 - 80053d0: bd80 pop {r7, pc} + 8005cba: 4618 mov r0, r3 + 8005cbc: 3710 adds r7, #16 + 8005cbe: 46bd mov sp, r7 + 8005cc0: bd80 pop {r7, pc} -080053d2 : +08005cc2 : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { - 80053d2: b480 push {r7} - 80053d4: b083 sub sp, #12 - 80053d6: af00 add r7, sp, #0 - 80053d8: 6078 str r0, [r7, #4] + 8005cc2: b480 push {r7} + 8005cc4: b083 sub sp, #12 + 8005cc6: af00 add r7, sp, #0 + 8005cc8: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } - 80053da: bf00 nop - 80053dc: 370c adds r7, #12 - 80053de: 46bd mov sp, r7 - 80053e0: bc80 pop {r7} - 80053e2: 4770 bx lr + 8005cca: bf00 nop + 8005ccc: 370c adds r7, #12 + 8005cce: 46bd mov sp, r7 + 8005cd0: bc80 pop {r7} + 8005cd2: 4770 bx lr -080053e4 : +08005cd4 : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { - 80053e4: b480 push {r7} - 80053e6: b083 sub sp, #12 - 80053e8: af00 add r7, sp, #0 - 80053ea: 6078 str r0, [r7, #4] + 8005cd4: b480 push {r7} + 8005cd6: b083 sub sp, #12 + 8005cd8: af00 add r7, sp, #0 + 8005cda: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } - 80053ec: bf00 nop - 80053ee: 370c adds r7, #12 - 80053f0: 46bd mov sp, r7 - 80053f2: bc80 pop {r7} - 80053f4: 4770 bx lr + 8005cdc: bf00 nop + 8005cde: 370c adds r7, #12 + 8005ce0: 46bd mov sp, r7 + 8005ce2: bc80 pop {r7} + 8005ce4: 4770 bx lr -080053f6 : +08005ce6 : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { - 80053f6: b480 push {r7} - 80053f8: b083 sub sp, #12 - 80053fa: af00 add r7, sp, #0 - 80053fc: 6078 str r0, [r7, #4] + 8005ce6: b480 push {r7} + 8005ce8: b083 sub sp, #12 + 8005cea: af00 add r7, sp, #0 + 8005cec: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } - 80053fe: bf00 nop - 8005400: 370c adds r7, #12 - 8005402: 46bd mov sp, r7 - 8005404: bc80 pop {r7} - 8005406: 4770 bx lr + 8005cee: bf00 nop + 8005cf0: 370c adds r7, #12 + 8005cf2: 46bd mov sp, r7 + 8005cf4: bc80 pop {r7} + 8005cf6: 4770 bx lr -08005408 : +08005cf8 : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { - 8005408: b480 push {r7} - 800540a: b083 sub sp, #12 - 800540c: af00 add r7, sp, #0 - 800540e: 6078 str r0, [r7, #4] + 8005cf8: b480 push {r7} + 8005cfa: b083 sub sp, #12 + 8005cfc: af00 add r7, sp, #0 + 8005cfe: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } - 8005410: bf00 nop - 8005412: 370c adds r7, #12 - 8005414: 46bd mov sp, r7 - 8005416: bc80 pop {r7} - 8005418: 4770 bx lr + 8005d00: bf00 nop + 8005d02: 370c adds r7, #12 + 8005d04: 46bd mov sp, r7 + 8005d06: bc80 pop {r7} + 8005d08: 4770 bx lr ... -0800541c : +08005d0c : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { - 800541c: b480 push {r7} - 800541e: b085 sub sp, #20 - 8005420: af00 add r7, sp, #0 - 8005422: 6078 str r0, [r7, #4] - 8005424: 6039 str r1, [r7, #0] + 8005d0c: b480 push {r7} + 8005d0e: b085 sub sp, #20 + 8005d10: af00 add r7, sp, #0 + 8005d12: 6078 str r0, [r7, #4] + 8005d14: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; - 8005426: 687b ldr r3, [r7, #4] - 8005428: 681b ldr r3, [r3, #0] - 800542a: 60fb str r3, [r7, #12] + 8005d16: 687b ldr r3, [r7, #4] + 8005d18: 681b ldr r3, [r3, #0] + 8005d1a: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 800542c: 687b ldr r3, [r7, #4] - 800542e: 4a2f ldr r2, [pc, #188] @ (80054ec ) - 8005430: 4293 cmp r3, r2 - 8005432: d00b beq.n 800544c - 8005434: 687b ldr r3, [r7, #4] - 8005436: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 800543a: d007 beq.n 800544c - 800543c: 687b ldr r3, [r7, #4] - 800543e: 4a2c ldr r2, [pc, #176] @ (80054f0 ) - 8005440: 4293 cmp r3, r2 - 8005442: d003 beq.n 800544c - 8005444: 687b ldr r3, [r7, #4] - 8005446: 4a2b ldr r2, [pc, #172] @ (80054f4 ) - 8005448: 4293 cmp r3, r2 - 800544a: d108 bne.n 800545e + 8005d1c: 687b ldr r3, [r7, #4] + 8005d1e: 4a2f ldr r2, [pc, #188] @ (8005ddc ) + 8005d20: 4293 cmp r3, r2 + 8005d22: d00b beq.n 8005d3c + 8005d24: 687b ldr r3, [r7, #4] + 8005d26: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005d2a: d007 beq.n 8005d3c + 8005d2c: 687b ldr r3, [r7, #4] + 8005d2e: 4a2c ldr r2, [pc, #176] @ (8005de0 ) + 8005d30: 4293 cmp r3, r2 + 8005d32: d003 beq.n 8005d3c + 8005d34: 687b ldr r3, [r7, #4] + 8005d36: 4a2b ldr r2, [pc, #172] @ (8005de4 ) + 8005d38: 4293 cmp r3, r2 + 8005d3a: d108 bne.n 8005d4e { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 800544c: 68fb ldr r3, [r7, #12] - 800544e: f023 0370 bic.w r3, r3, #112 @ 0x70 - 8005452: 60fb str r3, [r7, #12] + 8005d3c: 68fb ldr r3, [r7, #12] + 8005d3e: f023 0370 bic.w r3, r3, #112 @ 0x70 + 8005d42: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; - 8005454: 683b ldr r3, [r7, #0] - 8005456: 685b ldr r3, [r3, #4] - 8005458: 68fa ldr r2, [r7, #12] - 800545a: 4313 orrs r3, r2 - 800545c: 60fb str r3, [r7, #12] + 8005d44: 683b ldr r3, [r7, #0] + 8005d46: 685b ldr r3, [r3, #4] + 8005d48: 68fa ldr r2, [r7, #12] + 8005d4a: 4313 orrs r3, r2 + 8005d4c: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 800545e: 687b ldr r3, [r7, #4] - 8005460: 4a22 ldr r2, [pc, #136] @ (80054ec ) - 8005462: 4293 cmp r3, r2 - 8005464: d00b beq.n 800547e - 8005466: 687b ldr r3, [r7, #4] - 8005468: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 800546c: d007 beq.n 800547e - 800546e: 687b ldr r3, [r7, #4] - 8005470: 4a1f ldr r2, [pc, #124] @ (80054f0 ) - 8005472: 4293 cmp r3, r2 - 8005474: d003 beq.n 800547e - 8005476: 687b ldr r3, [r7, #4] - 8005478: 4a1e ldr r2, [pc, #120] @ (80054f4 ) - 800547a: 4293 cmp r3, r2 - 800547c: d108 bne.n 8005490 + 8005d4e: 687b ldr r3, [r7, #4] + 8005d50: 4a22 ldr r2, [pc, #136] @ (8005ddc ) + 8005d52: 4293 cmp r3, r2 + 8005d54: d00b beq.n 8005d6e + 8005d56: 687b ldr r3, [r7, #4] + 8005d58: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005d5c: d007 beq.n 8005d6e + 8005d5e: 687b ldr r3, [r7, #4] + 8005d60: 4a1f ldr r2, [pc, #124] @ (8005de0 ) + 8005d62: 4293 cmp r3, r2 + 8005d64: d003 beq.n 8005d6e + 8005d66: 687b ldr r3, [r7, #4] + 8005d68: 4a1e ldr r2, [pc, #120] @ (8005de4 ) + 8005d6a: 4293 cmp r3, r2 + 8005d6c: d108 bne.n 8005d80 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; - 800547e: 68fb ldr r3, [r7, #12] - 8005480: f423 7340 bic.w r3, r3, #768 @ 0x300 - 8005484: 60fb str r3, [r7, #12] + 8005d6e: 68fb ldr r3, [r7, #12] + 8005d70: f423 7340 bic.w r3, r3, #768 @ 0x300 + 8005d74: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; - 8005486: 683b ldr r3, [r7, #0] - 8005488: 68db ldr r3, [r3, #12] - 800548a: 68fa ldr r2, [r7, #12] - 800548c: 4313 orrs r3, r2 - 800548e: 60fb str r3, [r7, #12] + 8005d76: 683b ldr r3, [r7, #0] + 8005d78: 68db ldr r3, [r3, #12] + 8005d7a: 68fa ldr r2, [r7, #12] + 8005d7c: 4313 orrs r3, r2 + 8005d7e: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 8005490: 68fb ldr r3, [r7, #12] - 8005492: f023 0280 bic.w r2, r3, #128 @ 0x80 - 8005496: 683b ldr r3, [r7, #0] - 8005498: 695b ldr r3, [r3, #20] - 800549a: 4313 orrs r3, r2 - 800549c: 60fb str r3, [r7, #12] + 8005d80: 68fb ldr r3, [r7, #12] + 8005d82: f023 0280 bic.w r2, r3, #128 @ 0x80 + 8005d86: 683b ldr r3, [r7, #0] + 8005d88: 695b ldr r3, [r3, #20] + 8005d8a: 4313 orrs r3, r2 + 8005d8c: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; - 800549e: 687b ldr r3, [r7, #4] - 80054a0: 68fa ldr r2, [r7, #12] - 80054a2: 601a str r2, [r3, #0] + 8005d8e: 687b ldr r3, [r7, #4] + 8005d90: 68fa ldr r2, [r7, #12] + 8005d92: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; - 80054a4: 683b ldr r3, [r7, #0] - 80054a6: 689a ldr r2, [r3, #8] - 80054a8: 687b ldr r3, [r7, #4] - 80054aa: 62da str r2, [r3, #44] @ 0x2c + 8005d94: 683b ldr r3, [r7, #0] + 8005d96: 689a ldr r2, [r3, #8] + 8005d98: 687b ldr r3, [r7, #4] + 8005d9a: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; - 80054ac: 683b ldr r3, [r7, #0] - 80054ae: 681a ldr r2, [r3, #0] - 80054b0: 687b ldr r3, [r7, #4] - 80054b2: 629a str r2, [r3, #40] @ 0x28 + 8005d9c: 683b ldr r3, [r7, #0] + 8005d9e: 681a ldr r2, [r3, #0] + 8005da0: 687b ldr r3, [r7, #4] + 8005da2: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - 80054b4: 687b ldr r3, [r7, #4] - 80054b6: 4a0d ldr r2, [pc, #52] @ (80054ec ) - 80054b8: 4293 cmp r3, r2 - 80054ba: d103 bne.n 80054c4 + 8005da4: 687b ldr r3, [r7, #4] + 8005da6: 4a0d ldr r2, [pc, #52] @ (8005ddc ) + 8005da8: 4293 cmp r3, r2 + 8005daa: d103 bne.n 8005db4 { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; - 80054bc: 683b ldr r3, [r7, #0] - 80054be: 691a ldr r2, [r3, #16] - 80054c0: 687b ldr r3, [r7, #4] - 80054c2: 631a str r2, [r3, #48] @ 0x30 + 8005dac: 683b ldr r3, [r7, #0] + 8005dae: 691a ldr r2, [r3, #16] + 8005db0: 687b ldr r3, [r7, #4] + 8005db2: 631a str r2, [r3, #48] @ 0x30 } /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - 80054c4: 687b ldr r3, [r7, #4] - 80054c6: 2201 movs r2, #1 - 80054c8: 615a str r2, [r3, #20] + 8005db4: 687b ldr r3, [r7, #4] + 8005db6: 2201 movs r2, #1 + 8005db8: 615a str r2, [r3, #20] /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) - 80054ca: 687b ldr r3, [r7, #4] - 80054cc: 691b ldr r3, [r3, #16] - 80054ce: f003 0301 and.w r3, r3, #1 - 80054d2: 2b00 cmp r3, #0 - 80054d4: d005 beq.n 80054e2 + 8005dba: 687b ldr r3, [r7, #4] + 8005dbc: 691b ldr r3, [r3, #16] + 8005dbe: f003 0301 and.w r3, r3, #1 + 8005dc2: 2b00 cmp r3, #0 + 8005dc4: d005 beq.n 8005dd2 { /* Clear the update flag */ CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); - 80054d6: 687b ldr r3, [r7, #4] - 80054d8: 691b ldr r3, [r3, #16] - 80054da: f023 0201 bic.w r2, r3, #1 - 80054de: 687b ldr r3, [r7, #4] - 80054e0: 611a str r2, [r3, #16] + 8005dc6: 687b ldr r3, [r7, #4] + 8005dc8: 691b ldr r3, [r3, #16] + 8005dca: f023 0201 bic.w r2, r3, #1 + 8005dce: 687b ldr r3, [r7, #4] + 8005dd0: 611a str r2, [r3, #16] } } - 80054e2: bf00 nop - 80054e4: 3714 adds r7, #20 - 80054e6: 46bd mov sp, r7 - 80054e8: bc80 pop {r7} - 80054ea: 4770 bx lr - 80054ec: 40012c00 .word 0x40012c00 - 80054f0: 40000400 .word 0x40000400 - 80054f4: 40000800 .word 0x40000800 + 8005dd2: bf00 nop + 8005dd4: 3714 adds r7, #20 + 8005dd6: 46bd mov sp, r7 + 8005dd8: bc80 pop {r7} + 8005dda: 4770 bx lr + 8005ddc: 40012c00 .word 0x40012c00 + 8005de0: 40000400 .word 0x40000400 + 8005de4: 40000800 .word 0x40000800 -080054f8 : +08005de8 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 80054f8: b480 push {r7} - 80054fa: b087 sub sp, #28 - 80054fc: af00 add r7, sp, #0 - 80054fe: 60f8 str r0, [r7, #12] - 8005500: 60b9 str r1, [r7, #8] - 8005502: 607a str r2, [r7, #4] + 8005de8: b480 push {r7} + 8005dea: b087 sub sp, #28 + 8005dec: af00 add r7, sp, #0 + 8005dee: 60f8 str r0, [r7, #12] + 8005df0: 60b9 str r1, [r7, #8] + 8005df2: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; - 8005504: 68fb ldr r3, [r7, #12] - 8005506: 6a1b ldr r3, [r3, #32] - 8005508: 617b str r3, [r7, #20] + 8005df4: 68fb ldr r3, [r7, #12] + 8005df6: 6a1b ldr r3, [r3, #32] + 8005df8: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; - 800550a: 68fb ldr r3, [r7, #12] - 800550c: 6a1b ldr r3, [r3, #32] - 800550e: f023 0201 bic.w r2, r3, #1 - 8005512: 68fb ldr r3, [r7, #12] - 8005514: 621a str r2, [r3, #32] + 8005dfa: 68fb ldr r3, [r7, #12] + 8005dfc: 6a1b ldr r3, [r3, #32] + 8005dfe: f023 0201 bic.w r2, r3, #1 + 8005e02: 68fb ldr r3, [r7, #12] + 8005e04: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 8005516: 68fb ldr r3, [r7, #12] - 8005518: 699b ldr r3, [r3, #24] - 800551a: 613b str r3, [r7, #16] + 8005e06: 68fb ldr r3, [r7, #12] + 8005e08: 699b ldr r3, [r3, #24] + 8005e0a: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; - 800551c: 693b ldr r3, [r7, #16] - 800551e: f023 03f0 bic.w r3, r3, #240 @ 0xf0 - 8005522: 613b str r3, [r7, #16] + 8005e0c: 693b ldr r3, [r7, #16] + 8005e0e: f023 03f0 bic.w r3, r3, #240 @ 0xf0 + 8005e12: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); - 8005524: 687b ldr r3, [r7, #4] - 8005526: 011b lsls r3, r3, #4 - 8005528: 693a ldr r2, [r7, #16] - 800552a: 4313 orrs r3, r2 - 800552c: 613b str r3, [r7, #16] + 8005e14: 687b ldr r3, [r7, #4] + 8005e16: 011b lsls r3, r3, #4 + 8005e18: 693a ldr r2, [r7, #16] + 8005e1a: 4313 orrs r3, r2 + 8005e1c: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 800552e: 697b ldr r3, [r7, #20] - 8005530: f023 030a bic.w r3, r3, #10 - 8005534: 617b str r3, [r7, #20] + 8005e1e: 697b ldr r3, [r7, #20] + 8005e20: f023 030a bic.w r3, r3, #10 + 8005e24: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; - 8005536: 697a ldr r2, [r7, #20] - 8005538: 68bb ldr r3, [r7, #8] - 800553a: 4313 orrs r3, r2 - 800553c: 617b str r3, [r7, #20] + 8005e26: 697a ldr r2, [r7, #20] + 8005e28: 68bb ldr r3, [r7, #8] + 8005e2a: 4313 orrs r3, r2 + 8005e2c: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; - 800553e: 68fb ldr r3, [r7, #12] - 8005540: 693a ldr r2, [r7, #16] - 8005542: 619a str r2, [r3, #24] + 8005e2e: 68fb ldr r3, [r7, #12] + 8005e30: 693a ldr r2, [r7, #16] + 8005e32: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 8005544: 68fb ldr r3, [r7, #12] - 8005546: 697a ldr r2, [r7, #20] - 8005548: 621a str r2, [r3, #32] + 8005e34: 68fb ldr r3, [r7, #12] + 8005e36: 697a ldr r2, [r7, #20] + 8005e38: 621a str r2, [r3, #32] } - 800554a: bf00 nop - 800554c: 371c adds r7, #28 - 800554e: 46bd mov sp, r7 - 8005550: bc80 pop {r7} - 8005552: 4770 bx lr + 8005e3a: bf00 nop + 8005e3c: 371c adds r7, #28 + 8005e3e: 46bd mov sp, r7 + 8005e40: bc80 pop {r7} + 8005e42: 4770 bx lr -08005554 : +08005e44 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 8005554: b480 push {r7} - 8005556: b087 sub sp, #28 - 8005558: af00 add r7, sp, #0 - 800555a: 60f8 str r0, [r7, #12] - 800555c: 60b9 str r1, [r7, #8] - 800555e: 607a str r2, [r7, #4] + 8005e44: b480 push {r7} + 8005e46: b087 sub sp, #28 + 8005e48: af00 add r7, sp, #0 + 8005e4a: 60f8 str r0, [r7, #12] + 8005e4c: 60b9 str r1, [r7, #8] + 8005e4e: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ tmpccer = TIMx->CCER; - 8005560: 68fb ldr r3, [r7, #12] - 8005562: 6a1b ldr r3, [r3, #32] - 8005564: 617b str r3, [r7, #20] + 8005e50: 68fb ldr r3, [r7, #12] + 8005e52: 6a1b ldr r3, [r3, #32] + 8005e54: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC2E; - 8005566: 68fb ldr r3, [r7, #12] - 8005568: 6a1b ldr r3, [r3, #32] - 800556a: f023 0210 bic.w r2, r3, #16 - 800556e: 68fb ldr r3, [r7, #12] - 8005570: 621a str r2, [r3, #32] + 8005e56: 68fb ldr r3, [r7, #12] + 8005e58: 6a1b ldr r3, [r3, #32] + 8005e5a: f023 0210 bic.w r2, r3, #16 + 8005e5e: 68fb ldr r3, [r7, #12] + 8005e60: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 8005572: 68fb ldr r3, [r7, #12] - 8005574: 699b ldr r3, [r3, #24] - 8005576: 613b str r3, [r7, #16] + 8005e62: 68fb ldr r3, [r7, #12] + 8005e64: 699b ldr r3, [r3, #24] + 8005e66: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; - 8005578: 693b ldr r3, [r7, #16] - 800557a: f423 4370 bic.w r3, r3, #61440 @ 0xf000 - 800557e: 613b str r3, [r7, #16] + 8005e68: 693b ldr r3, [r7, #16] + 8005e6a: f423 4370 bic.w r3, r3, #61440 @ 0xf000 + 8005e6e: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 12U); - 8005580: 687b ldr r3, [r7, #4] - 8005582: 031b lsls r3, r3, #12 - 8005584: 693a ldr r2, [r7, #16] - 8005586: 4313 orrs r3, r2 - 8005588: 613b str r3, [r7, #16] + 8005e70: 687b ldr r3, [r7, #4] + 8005e72: 031b lsls r3, r3, #12 + 8005e74: 693a ldr r2, [r7, #16] + 8005e76: 4313 orrs r3, r2 + 8005e78: 613b str r3, [r7, #16] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 800558a: 697b ldr r3, [r7, #20] - 800558c: f023 03a0 bic.w r3, r3, #160 @ 0xa0 - 8005590: 617b str r3, [r7, #20] + 8005e7a: 697b ldr r3, [r7, #20] + 8005e7c: f023 03a0 bic.w r3, r3, #160 @ 0xa0 + 8005e80: 617b str r3, [r7, #20] tmpccer |= (TIM_ICPolarity << 4U); - 8005592: 68bb ldr r3, [r7, #8] - 8005594: 011b lsls r3, r3, #4 - 8005596: 697a ldr r2, [r7, #20] - 8005598: 4313 orrs r3, r2 - 800559a: 617b str r3, [r7, #20] + 8005e82: 68bb ldr r3, [r7, #8] + 8005e84: 011b lsls r3, r3, #4 + 8005e86: 697a ldr r2, [r7, #20] + 8005e88: 4313 orrs r3, r2 + 8005e8a: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; - 800559c: 68fb ldr r3, [r7, #12] - 800559e: 693a ldr r2, [r7, #16] - 80055a0: 619a str r2, [r3, #24] + 8005e8c: 68fb ldr r3, [r7, #12] + 8005e8e: 693a ldr r2, [r7, #16] + 8005e90: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 80055a2: 68fb ldr r3, [r7, #12] - 80055a4: 697a ldr r2, [r7, #20] - 80055a6: 621a str r2, [r3, #32] + 8005e92: 68fb ldr r3, [r7, #12] + 8005e94: 697a ldr r2, [r7, #20] + 8005e96: 621a str r2, [r3, #32] } - 80055a8: bf00 nop - 80055aa: 371c adds r7, #28 - 80055ac: 46bd mov sp, r7 - 80055ae: bc80 pop {r7} - 80055b0: 4770 bx lr + 8005e98: bf00 nop + 8005e9a: 371c adds r7, #28 + 8005e9c: 46bd mov sp, r7 + 8005e9e: bc80 pop {r7} + 8005ea0: 4770 bx lr -080055b2 : +08005ea2 : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { - 80055b2: b480 push {r7} - 80055b4: b085 sub sp, #20 - 80055b6: af00 add r7, sp, #0 - 80055b8: 6078 str r0, [r7, #4] - 80055ba: 6039 str r1, [r7, #0] + 8005ea2: b480 push {r7} + 8005ea4: b085 sub sp, #20 + 8005ea6: af00 add r7, sp, #0 + 8005ea8: 6078 str r0, [r7, #4] + 8005eaa: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; - 80055bc: 687b ldr r3, [r7, #4] - 80055be: 689b ldr r3, [r3, #8] - 80055c0: 60fb str r3, [r7, #12] + 8005eac: 687b ldr r3, [r7, #4] + 8005eae: 689b ldr r3, [r3, #8] + 8005eb0: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; - 80055c2: 68fb ldr r3, [r7, #12] - 80055c4: f023 0370 bic.w r3, r3, #112 @ 0x70 - 80055c8: 60fb str r3, [r7, #12] + 8005eb2: 68fb ldr r3, [r7, #12] + 8005eb4: f023 0370 bic.w r3, r3, #112 @ 0x70 + 8005eb8: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 80055ca: 683a ldr r2, [r7, #0] - 80055cc: 68fb ldr r3, [r7, #12] - 80055ce: 4313 orrs r3, r2 - 80055d0: f043 0307 orr.w r3, r3, #7 - 80055d4: 60fb str r3, [r7, #12] + 8005eba: 683a ldr r2, [r7, #0] + 8005ebc: 68fb ldr r3, [r7, #12] + 8005ebe: 4313 orrs r3, r2 + 8005ec0: f043 0307 orr.w r3, r3, #7 + 8005ec4: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 80055d6: 687b ldr r3, [r7, #4] - 80055d8: 68fa ldr r2, [r7, #12] - 80055da: 609a str r2, [r3, #8] + 8005ec6: 687b ldr r3, [r7, #4] + 8005ec8: 68fa ldr r2, [r7, #12] + 8005eca: 609a str r2, [r3, #8] } - 80055dc: bf00 nop - 80055de: 3714 adds r7, #20 - 80055e0: 46bd mov sp, r7 - 80055e2: bc80 pop {r7} - 80055e4: 4770 bx lr + 8005ecc: bf00 nop + 8005ece: 3714 adds r7, #20 + 8005ed0: 46bd mov sp, r7 + 8005ed2: bc80 pop {r7} + 8005ed4: 4770 bx lr -080055e6 : +08005ed6 : * This parameter must be a value between 0x00 and 0x0F * @retval None */ void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { - 80055e6: b480 push {r7} - 80055e8: b087 sub sp, #28 - 80055ea: af00 add r7, sp, #0 - 80055ec: 60f8 str r0, [r7, #12] - 80055ee: 60b9 str r1, [r7, #8] - 80055f0: 607a str r2, [r7, #4] - 80055f2: 603b str r3, [r7, #0] + 8005ed6: b480 push {r7} + 8005ed8: b087 sub sp, #28 + 8005eda: af00 add r7, sp, #0 + 8005edc: 60f8 str r0, [r7, #12] + 8005ede: 60b9 str r1, [r7, #8] + 8005ee0: 607a str r2, [r7, #4] + 8005ee2: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; - 80055f4: 68fb ldr r3, [r7, #12] - 80055f6: 689b ldr r3, [r3, #8] - 80055f8: 617b str r3, [r7, #20] + 8005ee4: 68fb ldr r3, [r7, #12] + 8005ee6: 689b ldr r3, [r3, #8] + 8005ee8: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 80055fa: 697b ldr r3, [r7, #20] - 80055fc: f423 437f bic.w r3, r3, #65280 @ 0xff00 - 8005600: 617b str r3, [r7, #20] + 8005eea: 697b ldr r3, [r7, #20] + 8005eec: f423 437f bic.w r3, r3, #65280 @ 0xff00 + 8005ef0: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 8005602: 683b ldr r3, [r7, #0] - 8005604: 021a lsls r2, r3, #8 - 8005606: 687b ldr r3, [r7, #4] - 8005608: 431a orrs r2, r3 - 800560a: 68bb ldr r3, [r7, #8] - 800560c: 4313 orrs r3, r2 - 800560e: 697a ldr r2, [r7, #20] - 8005610: 4313 orrs r3, r2 - 8005612: 617b str r3, [r7, #20] + 8005ef2: 683b ldr r3, [r7, #0] + 8005ef4: 021a lsls r2, r3, #8 + 8005ef6: 687b ldr r3, [r7, #4] + 8005ef8: 431a orrs r2, r3 + 8005efa: 68bb ldr r3, [r7, #8] + 8005efc: 4313 orrs r3, r2 + 8005efe: 697a ldr r2, [r7, #20] + 8005f00: 4313 orrs r3, r2 + 8005f02: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 8005614: 68fb ldr r3, [r7, #12] - 8005616: 697a ldr r2, [r7, #20] - 8005618: 609a str r2, [r3, #8] + 8005f04: 68fb ldr r3, [r7, #12] + 8005f06: 697a ldr r2, [r7, #20] + 8005f08: 609a str r2, [r3, #8] } - 800561a: bf00 nop - 800561c: 371c adds r7, #28 - 800561e: 46bd mov sp, r7 - 8005620: bc80 pop {r7} - 8005622: 4770 bx lr + 8005f0a: bf00 nop + 8005f0c: 371c adds r7, #28 + 8005f0e: 46bd mov sp, r7 + 8005f10: bc80 pop {r7} + 8005f12: 4770 bx lr -08005624 : +08005f14 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { - 8005624: b480 push {r7} - 8005626: b085 sub sp, #20 - 8005628: af00 add r7, sp, #0 - 800562a: 6078 str r0, [r7, #4] - 800562c: 6039 str r1, [r7, #0] + 8005f14: b480 push {r7} + 8005f16: b085 sub sp, #20 + 8005f18: af00 add r7, sp, #0 + 8005f1a: 6078 str r0, [r7, #4] + 8005f1c: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); - 800562e: 687b ldr r3, [r7, #4] - 8005630: f893 303c ldrb.w r3, [r3, #60] @ 0x3c - 8005634: 2b01 cmp r3, #1 - 8005636: d101 bne.n 800563c - 8005638: 2302 movs r3, #2 - 800563a: e046 b.n 80056ca - 800563c: 687b ldr r3, [r7, #4] - 800563e: 2201 movs r2, #1 - 8005640: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8005f1e: 687b ldr r3, [r7, #4] + 8005f20: f893 303c ldrb.w r3, [r3, #60] @ 0x3c + 8005f24: 2b01 cmp r3, #1 + 8005f26: d101 bne.n 8005f2c + 8005f28: 2302 movs r3, #2 + 8005f2a: e046 b.n 8005fba + 8005f2c: 687b ldr r3, [r7, #4] + 8005f2e: 2201 movs r2, #1 + 8005f30: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; - 8005644: 687b ldr r3, [r7, #4] - 8005646: 2202 movs r2, #2 - 8005648: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005f34: 687b ldr r3, [r7, #4] + 8005f36: 2202 movs r2, #2 + 8005f38: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; - 800564c: 687b ldr r3, [r7, #4] - 800564e: 681b ldr r3, [r3, #0] - 8005650: 685b ldr r3, [r3, #4] - 8005652: 60fb str r3, [r7, #12] + 8005f3c: 687b ldr r3, [r7, #4] + 8005f3e: 681b ldr r3, [r3, #0] + 8005f40: 685b ldr r3, [r3, #4] + 8005f42: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; - 8005654: 687b ldr r3, [r7, #4] - 8005656: 681b ldr r3, [r3, #0] - 8005658: 689b ldr r3, [r3, #8] - 800565a: 60bb str r3, [r7, #8] + 8005f44: 687b ldr r3, [r7, #4] + 8005f46: 681b ldr r3, [r3, #0] + 8005f48: 689b ldr r3, [r3, #8] + 8005f4a: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; - 800565c: 68fb ldr r3, [r7, #12] - 800565e: f023 0370 bic.w r3, r3, #112 @ 0x70 - 8005662: 60fb str r3, [r7, #12] + 8005f4c: 68fb ldr r3, [r7, #12] + 8005f4e: f023 0370 bic.w r3, r3, #112 @ 0x70 + 8005f52: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 8005664: 683b ldr r3, [r7, #0] - 8005666: 681b ldr r3, [r3, #0] - 8005668: 68fa ldr r2, [r7, #12] - 800566a: 4313 orrs r3, r2 - 800566c: 60fb str r3, [r7, #12] + 8005f54: 683b ldr r3, [r7, #0] + 8005f56: 681b ldr r3, [r3, #0] + 8005f58: 68fa ldr r2, [r7, #12] + 8005f5a: 4313 orrs r3, r2 + 8005f5c: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; - 800566e: 687b ldr r3, [r7, #4] - 8005670: 681b ldr r3, [r3, #0] - 8005672: 68fa ldr r2, [r7, #12] - 8005674: 605a str r2, [r3, #4] + 8005f5e: 687b ldr r3, [r7, #4] + 8005f60: 681b ldr r3, [r3, #0] + 8005f62: 68fa ldr r2, [r7, #12] + 8005f64: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 8005676: 687b ldr r3, [r7, #4] - 8005678: 681b ldr r3, [r3, #0] - 800567a: 4a16 ldr r2, [pc, #88] @ (80056d4 ) - 800567c: 4293 cmp r3, r2 - 800567e: d00e beq.n 800569e - 8005680: 687b ldr r3, [r7, #4] - 8005682: 681b ldr r3, [r3, #0] - 8005684: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 - 8005688: d009 beq.n 800569e - 800568a: 687b ldr r3, [r7, #4] - 800568c: 681b ldr r3, [r3, #0] - 800568e: 4a12 ldr r2, [pc, #72] @ (80056d8 ) - 8005690: 4293 cmp r3, r2 - 8005692: d004 beq.n 800569e - 8005694: 687b ldr r3, [r7, #4] - 8005696: 681b ldr r3, [r3, #0] - 8005698: 4a10 ldr r2, [pc, #64] @ (80056dc ) - 800569a: 4293 cmp r3, r2 - 800569c: d10c bne.n 80056b8 + 8005f66: 687b ldr r3, [r7, #4] + 8005f68: 681b ldr r3, [r3, #0] + 8005f6a: 4a16 ldr r2, [pc, #88] @ (8005fc4 ) + 8005f6c: 4293 cmp r3, r2 + 8005f6e: d00e beq.n 8005f8e + 8005f70: 687b ldr r3, [r7, #4] + 8005f72: 681b ldr r3, [r3, #0] + 8005f74: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 + 8005f78: d009 beq.n 8005f8e + 8005f7a: 687b ldr r3, [r7, #4] + 8005f7c: 681b ldr r3, [r3, #0] + 8005f7e: 4a12 ldr r2, [pc, #72] @ (8005fc8 ) + 8005f80: 4293 cmp r3, r2 + 8005f82: d004 beq.n 8005f8e + 8005f84: 687b ldr r3, [r7, #4] + 8005f86: 681b ldr r3, [r3, #0] + 8005f88: 4a10 ldr r2, [pc, #64] @ (8005fcc ) + 8005f8a: 4293 cmp r3, r2 + 8005f8c: d10c bne.n 8005fa8 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; - 800569e: 68bb ldr r3, [r7, #8] - 80056a0: f023 0380 bic.w r3, r3, #128 @ 0x80 - 80056a4: 60bb str r3, [r7, #8] + 8005f8e: 68bb ldr r3, [r7, #8] + 8005f90: f023 0380 bic.w r3, r3, #128 @ 0x80 + 8005f94: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; - 80056a6: 683b ldr r3, [r7, #0] - 80056a8: 685b ldr r3, [r3, #4] - 80056aa: 68ba ldr r2, [r7, #8] - 80056ac: 4313 orrs r3, r2 - 80056ae: 60bb str r3, [r7, #8] + 8005f96: 683b ldr r3, [r7, #0] + 8005f98: 685b ldr r3, [r3, #4] + 8005f9a: 68ba ldr r2, [r7, #8] + 8005f9c: 4313 orrs r3, r2 + 8005f9e: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 80056b0: 687b ldr r3, [r7, #4] - 80056b2: 681b ldr r3, [r3, #0] - 80056b4: 68ba ldr r2, [r7, #8] - 80056b6: 609a str r2, [r3, #8] + 8005fa0: 687b ldr r3, [r7, #4] + 8005fa2: 681b ldr r3, [r3, #0] + 8005fa4: 68ba ldr r2, [r7, #8] + 8005fa6: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; - 80056b8: 687b ldr r3, [r7, #4] - 80056ba: 2201 movs r2, #1 - 80056bc: f883 203d strb.w r2, [r3, #61] @ 0x3d + 8005fa8: 687b ldr r3, [r7, #4] + 8005faa: 2201 movs r2, #1 + 8005fac: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); - 80056c0: 687b ldr r3, [r7, #4] - 80056c2: 2200 movs r2, #0 - 80056c4: f883 203c strb.w r2, [r3, #60] @ 0x3c + 8005fb0: 687b ldr r3, [r7, #4] + 8005fb2: 2200 movs r2, #0 + 8005fb4: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; - 80056c8: 2300 movs r3, #0 + 8005fb8: 2300 movs r3, #0 } - 80056ca: 4618 mov r0, r3 - 80056cc: 3714 adds r7, #20 - 80056ce: 46bd mov sp, r7 - 80056d0: bc80 pop {r7} - 80056d2: 4770 bx lr - 80056d4: 40012c00 .word 0x40012c00 - 80056d8: 40000400 .word 0x40000400 - 80056dc: 40000800 .word 0x40000800 + 8005fba: 4618 mov r0, r3 + 8005fbc: 3714 adds r7, #20 + 8005fbe: 46bd mov sp, r7 + 8005fc0: bc80 pop {r7} + 8005fc2: 4770 bx lr + 8005fc4: 40012c00 .word 0x40012c00 + 8005fc8: 40000400 .word 0x40000400 + 8005fcc: 40000800 .word 0x40000800 -080056e0 : +08005fd0 : * @brief Commutation callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { - 80056e0: b480 push {r7} - 80056e2: b083 sub sp, #12 - 80056e4: af00 add r7, sp, #0 - 80056e6: 6078 str r0, [r7, #4] + 8005fd0: b480 push {r7} + 8005fd2: b083 sub sp, #12 + 8005fd4: af00 add r7, sp, #0 + 8005fd6: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } - 80056e8: bf00 nop - 80056ea: 370c adds r7, #12 - 80056ec: 46bd mov sp, r7 - 80056ee: bc80 pop {r7} - 80056f0: 4770 bx lr + 8005fd8: bf00 nop + 8005fda: 370c adds r7, #12 + 8005fdc: 46bd mov sp, r7 + 8005fde: bc80 pop {r7} + 8005fe0: 4770 bx lr -080056f2 : +08005fe2 : * @brief Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { - 80056f2: b480 push {r7} - 80056f4: b083 sub sp, #12 - 80056f6: af00 add r7, sp, #0 - 80056f8: 6078 str r0, [r7, #4] + 8005fe2: b480 push {r7} + 8005fe4: b083 sub sp, #12 + 8005fe6: af00 add r7, sp, #0 + 8005fe8: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } - 80056fa: bf00 nop - 80056fc: 370c adds r7, #12 - 80056fe: 46bd mov sp, r7 - 8005700: bc80 pop {r7} - 8005702: 4770 bx lr + 8005fea: bf00 nop + 8005fec: 370c adds r7, #12 + 8005fee: 46bd mov sp, r7 + 8005ff0: bc80 pop {r7} + 8005ff2: 4770 bx lr -08005704 : +08005ff4 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8005704: b580 push {r7, lr} - 8005706: b082 sub sp, #8 - 8005708: af00 add r7, sp, #0 - 800570a: 6078 str r0, [r7, #4] + 8005ff4: b580 push {r7, lr} + 8005ff6: b082 sub sp, #8 + 8005ff8: af00 add r7, sp, #0 + 8005ffa: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 800570c: 687b ldr r3, [r7, #4] - 800570e: 2b00 cmp r3, #0 - 8005710: d101 bne.n 8005716 + 8005ffc: 687b ldr r3, [r7, #4] + 8005ffe: 2b00 cmp r3, #0 + 8006000: d101 bne.n 8006006 { return HAL_ERROR; - 8005712: 2301 movs r3, #1 - 8005714: e042 b.n 800579c + 8006002: 2301 movs r3, #1 + 8006004: e042 b.n 800608c assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); #if defined(USART_CR1_OVER8) assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); #endif /* USART_CR1_OVER8 */ if (huart->gState == HAL_UART_STATE_RESET) - 8005716: 687b ldr r3, [r7, #4] - 8005718: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 800571c: b2db uxtb r3, r3 - 800571e: 2b00 cmp r3, #0 - 8005720: d106 bne.n 8005730 + 8006006: 687b ldr r3, [r7, #4] + 8006008: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 800600c: b2db uxtb r3, r3 + 800600e: 2b00 cmp r3, #0 + 8006010: d106 bne.n 8006020 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 8005722: 687b ldr r3, [r7, #4] - 8005724: 2200 movs r2, #0 - 8005726: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 8006012: 687b ldr r3, [r7, #4] + 8006014: 2200 movs r2, #0 + 8006016: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 800572a: 6878 ldr r0, [r7, #4] - 800572c: f7fd f85e bl 80027ec + 800601a: 6878 ldr r0, [r7, #4] + 800601c: f7fd f85e bl 80030dc #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 8005730: 687b ldr r3, [r7, #4] - 8005732: 2224 movs r2, #36 @ 0x24 - 8005734: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8006020: 687b ldr r3, [r7, #4] + 8006022: 2224 movs r2, #36 @ 0x24 + 8006024: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); - 8005738: 687b ldr r3, [r7, #4] - 800573a: 681b ldr r3, [r3, #0] - 800573c: 68da ldr r2, [r3, #12] - 800573e: 687b ldr r3, [r7, #4] - 8005740: 681b ldr r3, [r3, #0] - 8005742: f422 5200 bic.w r2, r2, #8192 @ 0x2000 - 8005746: 60da str r2, [r3, #12] + 8006028: 687b ldr r3, [r7, #4] + 800602a: 681b ldr r3, [r3, #0] + 800602c: 68da ldr r2, [r3, #12] + 800602e: 687b ldr r3, [r7, #4] + 8006030: 681b ldr r3, [r3, #0] + 8006032: f422 5200 bic.w r2, r2, #8192 @ 0x2000 + 8006036: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); - 8005748: 6878 ldr r0, [r7, #4] - 800574a: f000 fd63 bl 8006214 + 8006038: 6878 ldr r0, [r7, #4] + 800603a: f000 fd63 bl 8006b04 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 800574e: 687b ldr r3, [r7, #4] - 8005750: 681b ldr r3, [r3, #0] - 8005752: 691a ldr r2, [r3, #16] - 8005754: 687b ldr r3, [r7, #4] - 8005756: 681b ldr r3, [r3, #0] - 8005758: f422 4290 bic.w r2, r2, #18432 @ 0x4800 - 800575c: 611a str r2, [r3, #16] + 800603e: 687b ldr r3, [r7, #4] + 8006040: 681b ldr r3, [r3, #0] + 8006042: 691a ldr r2, [r3, #16] + 8006044: 687b ldr r3, [r7, #4] + 8006046: 681b ldr r3, [r3, #0] + 8006048: f422 4290 bic.w r2, r2, #18432 @ 0x4800 + 800604c: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 800575e: 687b ldr r3, [r7, #4] - 8005760: 681b ldr r3, [r3, #0] - 8005762: 695a ldr r2, [r3, #20] - 8005764: 687b ldr r3, [r7, #4] - 8005766: 681b ldr r3, [r3, #0] - 8005768: f022 022a bic.w r2, r2, #42 @ 0x2a - 800576c: 615a str r2, [r3, #20] + 800604e: 687b ldr r3, [r7, #4] + 8006050: 681b ldr r3, [r3, #0] + 8006052: 695a ldr r2, [r3, #20] + 8006054: 687b ldr r3, [r7, #4] + 8006056: 681b ldr r3, [r3, #0] + 8006058: f022 022a bic.w r2, r2, #42 @ 0x2a + 800605c: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); - 800576e: 687b ldr r3, [r7, #4] - 8005770: 681b ldr r3, [r3, #0] - 8005772: 68da ldr r2, [r3, #12] - 8005774: 687b ldr r3, [r7, #4] - 8005776: 681b ldr r3, [r3, #0] - 8005778: f442 5200 orr.w r2, r2, #8192 @ 0x2000 - 800577c: 60da str r2, [r3, #12] + 800605e: 687b ldr r3, [r7, #4] + 8006060: 681b ldr r3, [r3, #0] + 8006062: 68da ldr r2, [r3, #12] + 8006064: 687b ldr r3, [r7, #4] + 8006066: 681b ldr r3, [r3, #0] + 8006068: f442 5200 orr.w r2, r2, #8192 @ 0x2000 + 800606c: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 800577e: 687b ldr r3, [r7, #4] - 8005780: 2200 movs r2, #0 - 8005782: 645a str r2, [r3, #68] @ 0x44 + 800606e: 687b ldr r3, [r7, #4] + 8006070: 2200 movs r2, #0 + 8006072: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; - 8005784: 687b ldr r3, [r7, #4] - 8005786: 2220 movs r2, #32 - 8005788: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8006074: 687b ldr r3, [r7, #4] + 8006076: 2220 movs r2, #32 + 8006078: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; - 800578c: 687b ldr r3, [r7, #4] - 800578e: 2220 movs r2, #32 - 8005790: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 800607c: 687b ldr r3, [r7, #4] + 800607e: 2220 movs r2, #32 + 8006080: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; - 8005794: 687b ldr r3, [r7, #4] - 8005796: 2200 movs r2, #0 - 8005798: 635a str r2, [r3, #52] @ 0x34 + 8006084: 687b ldr r3, [r7, #4] + 8006086: 2200 movs r2, #0 + 8006088: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; - 800579a: 2300 movs r3, #0 + 800608a: 2300 movs r3, #0 } - 800579c: 4618 mov r0, r3 - 800579e: 3708 adds r7, #8 - 80057a0: 46bd mov sp, r7 - 80057a2: bd80 pop {r7, pc} + 800608c: 4618 mov r0, r3 + 800608e: 3708 adds r7, #8 + 8006090: 46bd mov sp, r7 + 8006092: bd80 pop {r7, pc} -080057a4 : +08006094 : * @param Size Amount of data elements (u8 or u16) to be sent * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 80057a4: b580 push {r7, lr} - 80057a6: b08a sub sp, #40 @ 0x28 - 80057a8: af02 add r7, sp, #8 - 80057aa: 60f8 str r0, [r7, #12] - 80057ac: 60b9 str r1, [r7, #8] - 80057ae: 603b str r3, [r7, #0] - 80057b0: 4613 mov r3, r2 - 80057b2: 80fb strh r3, [r7, #6] + 8006094: b580 push {r7, lr} + 8006096: b08a sub sp, #40 @ 0x28 + 8006098: af02 add r7, sp, #8 + 800609a: 60f8 str r0, [r7, #12] + 800609c: 60b9 str r1, [r7, #8] + 800609e: 603b str r3, [r7, #0] + 80060a0: 4613 mov r3, r2 + 80060a2: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart = 0U; - 80057b4: 2300 movs r3, #0 - 80057b6: 617b str r3, [r7, #20] + 80060a4: 2300 movs r3, #0 + 80060a6: 617b str r3, [r7, #20] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 80057b8: 68fb ldr r3, [r7, #12] - 80057ba: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 80057be: b2db uxtb r3, r3 - 80057c0: 2b20 cmp r3, #32 - 80057c2: d175 bne.n 80058b0 + 80060a8: 68fb ldr r3, [r7, #12] + 80060aa: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 80060ae: b2db uxtb r3, r3 + 80060b0: 2b20 cmp r3, #32 + 80060b2: d175 bne.n 80061a0 { if ((pData == NULL) || (Size == 0U)) - 80057c4: 68bb ldr r3, [r7, #8] - 80057c6: 2b00 cmp r3, #0 - 80057c8: d002 beq.n 80057d0 - 80057ca: 88fb ldrh r3, [r7, #6] - 80057cc: 2b00 cmp r3, #0 - 80057ce: d101 bne.n 80057d4 + 80060b4: 68bb ldr r3, [r7, #8] + 80060b6: 2b00 cmp r3, #0 + 80060b8: d002 beq.n 80060c0 + 80060ba: 88fb ldrh r3, [r7, #6] + 80060bc: 2b00 cmp r3, #0 + 80060be: d101 bne.n 80060c4 { return HAL_ERROR; - 80057d0: 2301 movs r3, #1 - 80057d2: e06e b.n 80058b2 + 80060c0: 2301 movs r3, #1 + 80060c2: e06e b.n 80061a2 } huart->ErrorCode = HAL_UART_ERROR_NONE; - 80057d4: 68fb ldr r3, [r7, #12] - 80057d6: 2200 movs r2, #0 - 80057d8: 645a str r2, [r3, #68] @ 0x44 + 80060c4: 68fb ldr r3, [r7, #12] + 80060c6: 2200 movs r2, #0 + 80060c8: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; - 80057da: 68fb ldr r3, [r7, #12] - 80057dc: 2221 movs r2, #33 @ 0x21 - 80057de: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 80060ca: 68fb ldr r3, [r7, #12] + 80060cc: 2221 movs r2, #33 @ 0x21 + 80060ce: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 80057e2: f7fd f8d5 bl 8002990 - 80057e6: 6178 str r0, [r7, #20] + 80060d2: f7fd f8d5 bl 8003280 + 80060d6: 6178 str r0, [r7, #20] huart->TxXferSize = Size; - 80057e8: 68fb ldr r3, [r7, #12] - 80057ea: 88fa ldrh r2, [r7, #6] - 80057ec: 849a strh r2, [r3, #36] @ 0x24 + 80060d8: 68fb ldr r3, [r7, #12] + 80060da: 88fa ldrh r2, [r7, #6] + 80060dc: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; - 80057ee: 68fb ldr r3, [r7, #12] - 80057f0: 88fa ldrh r2, [r7, #6] - 80057f2: 84da strh r2, [r3, #38] @ 0x26 + 80060de: 68fb ldr r3, [r7, #12] + 80060e0: 88fa ldrh r2, [r7, #6] + 80060e2: 84da strh r2, [r3, #38] @ 0x26 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 80057f4: 68fb ldr r3, [r7, #12] - 80057f6: 689b ldr r3, [r3, #8] - 80057f8: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 80057fc: d108 bne.n 8005810 - 80057fe: 68fb ldr r3, [r7, #12] - 8005800: 691b ldr r3, [r3, #16] - 8005802: 2b00 cmp r3, #0 - 8005804: d104 bne.n 8005810 + 80060e4: 68fb ldr r3, [r7, #12] + 80060e6: 689b ldr r3, [r3, #8] + 80060e8: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 80060ec: d108 bne.n 8006100 + 80060ee: 68fb ldr r3, [r7, #12] + 80060f0: 691b ldr r3, [r3, #16] + 80060f2: 2b00 cmp r3, #0 + 80060f4: d104 bne.n 8006100 { pdata8bits = NULL; - 8005806: 2300 movs r3, #0 - 8005808: 61fb str r3, [r7, #28] + 80060f6: 2300 movs r3, #0 + 80060f8: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; - 800580a: 68bb ldr r3, [r7, #8] - 800580c: 61bb str r3, [r7, #24] - 800580e: e003 b.n 8005818 + 80060fa: 68bb ldr r3, [r7, #8] + 80060fc: 61bb str r3, [r7, #24] + 80060fe: e003 b.n 8006108 } else { pdata8bits = pData; - 8005810: 68bb ldr r3, [r7, #8] - 8005812: 61fb str r3, [r7, #28] + 8006100: 68bb ldr r3, [r7, #8] + 8006102: 61fb str r3, [r7, #28] pdata16bits = NULL; - 8005814: 2300 movs r3, #0 - 8005816: 61bb str r3, [r7, #24] + 8006104: 2300 movs r3, #0 + 8006106: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) - 8005818: e02e b.n 8005878 + 8006108: e02e b.n 8006168 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 800581a: 683b ldr r3, [r7, #0] - 800581c: 9300 str r3, [sp, #0] - 800581e: 697b ldr r3, [r7, #20] - 8005820: 2200 movs r2, #0 - 8005822: 2180 movs r1, #128 @ 0x80 - 8005824: 68f8 ldr r0, [r7, #12] - 8005826: f000 fb01 bl 8005e2c - 800582a: 4603 mov r3, r0 - 800582c: 2b00 cmp r3, #0 - 800582e: d005 beq.n 800583c + 800610a: 683b ldr r3, [r7, #0] + 800610c: 9300 str r3, [sp, #0] + 800610e: 697b ldr r3, [r7, #20] + 8006110: 2200 movs r2, #0 + 8006112: 2180 movs r1, #128 @ 0x80 + 8006114: 68f8 ldr r0, [r7, #12] + 8006116: f000 fb01 bl 800671c + 800611a: 4603 mov r3, r0 + 800611c: 2b00 cmp r3, #0 + 800611e: d005 beq.n 800612c { huart->gState = HAL_UART_STATE_READY; - 8005830: 68fb ldr r3, [r7, #12] - 8005832: 2220 movs r2, #32 - 8005834: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8006120: 68fb ldr r3, [r7, #12] + 8006122: 2220 movs r2, #32 + 8006124: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; - 8005838: 2303 movs r3, #3 - 800583a: e03a b.n 80058b2 + 8006128: 2303 movs r3, #3 + 800612a: e03a b.n 80061a2 } if (pdata8bits == NULL) - 800583c: 69fb ldr r3, [r7, #28] - 800583e: 2b00 cmp r3, #0 - 8005840: d10b bne.n 800585a + 800612c: 69fb ldr r3, [r7, #28] + 800612e: 2b00 cmp r3, #0 + 8006130: d10b bne.n 800614a { huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU); - 8005842: 69bb ldr r3, [r7, #24] - 8005844: 881b ldrh r3, [r3, #0] - 8005846: 461a mov r2, r3 - 8005848: 68fb ldr r3, [r7, #12] - 800584a: 681b ldr r3, [r3, #0] - 800584c: f3c2 0208 ubfx r2, r2, #0, #9 - 8005850: 605a str r2, [r3, #4] + 8006132: 69bb ldr r3, [r7, #24] + 8006134: 881b ldrh r3, [r3, #0] + 8006136: 461a mov r2, r3 + 8006138: 68fb ldr r3, [r7, #12] + 800613a: 681b ldr r3, [r3, #0] + 800613c: f3c2 0208 ubfx r2, r2, #0, #9 + 8006140: 605a str r2, [r3, #4] pdata16bits++; - 8005852: 69bb ldr r3, [r7, #24] - 8005854: 3302 adds r3, #2 - 8005856: 61bb str r3, [r7, #24] - 8005858: e007 b.n 800586a + 8006142: 69bb ldr r3, [r7, #24] + 8006144: 3302 adds r3, #2 + 8006146: 61bb str r3, [r7, #24] + 8006148: e007 b.n 800615a } else { huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU); - 800585a: 69fb ldr r3, [r7, #28] - 800585c: 781a ldrb r2, [r3, #0] - 800585e: 68fb ldr r3, [r7, #12] - 8005860: 681b ldr r3, [r3, #0] - 8005862: 605a str r2, [r3, #4] + 800614a: 69fb ldr r3, [r7, #28] + 800614c: 781a ldrb r2, [r3, #0] + 800614e: 68fb ldr r3, [r7, #12] + 8006150: 681b ldr r3, [r3, #0] + 8006152: 605a str r2, [r3, #4] pdata8bits++; - 8005864: 69fb ldr r3, [r7, #28] - 8005866: 3301 adds r3, #1 - 8005868: 61fb str r3, [r7, #28] + 8006154: 69fb ldr r3, [r7, #28] + 8006156: 3301 adds r3, #1 + 8006158: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 800586a: 68fb ldr r3, [r7, #12] - 800586c: 8cdb ldrh r3, [r3, #38] @ 0x26 - 800586e: b29b uxth r3, r3 - 8005870: 3b01 subs r3, #1 - 8005872: b29a uxth r2, r3 - 8005874: 68fb ldr r3, [r7, #12] - 8005876: 84da strh r2, [r3, #38] @ 0x26 + 800615a: 68fb ldr r3, [r7, #12] + 800615c: 8cdb ldrh r3, [r3, #38] @ 0x26 + 800615e: b29b uxth r3, r3 + 8006160: 3b01 subs r3, #1 + 8006162: b29a uxth r2, r3 + 8006164: 68fb ldr r3, [r7, #12] + 8006166: 84da strh r2, [r3, #38] @ 0x26 while (huart->TxXferCount > 0U) - 8005878: 68fb ldr r3, [r7, #12] - 800587a: 8cdb ldrh r3, [r3, #38] @ 0x26 - 800587c: b29b uxth r3, r3 - 800587e: 2b00 cmp r3, #0 - 8005880: d1cb bne.n 800581a + 8006168: 68fb ldr r3, [r7, #12] + 800616a: 8cdb ldrh r3, [r3, #38] @ 0x26 + 800616c: b29b uxth r3, r3 + 800616e: 2b00 cmp r3, #0 + 8006170: d1cb bne.n 800610a } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 8005882: 683b ldr r3, [r7, #0] - 8005884: 9300 str r3, [sp, #0] - 8005886: 697b ldr r3, [r7, #20] - 8005888: 2200 movs r2, #0 - 800588a: 2140 movs r1, #64 @ 0x40 - 800588c: 68f8 ldr r0, [r7, #12] - 800588e: f000 facd bl 8005e2c - 8005892: 4603 mov r3, r0 - 8005894: 2b00 cmp r3, #0 - 8005896: d005 beq.n 80058a4 + 8006172: 683b ldr r3, [r7, #0] + 8006174: 9300 str r3, [sp, #0] + 8006176: 697b ldr r3, [r7, #20] + 8006178: 2200 movs r2, #0 + 800617a: 2140 movs r1, #64 @ 0x40 + 800617c: 68f8 ldr r0, [r7, #12] + 800617e: f000 facd bl 800671c + 8006182: 4603 mov r3, r0 + 8006184: 2b00 cmp r3, #0 + 8006186: d005 beq.n 8006194 { huart->gState = HAL_UART_STATE_READY; - 8005898: 68fb ldr r3, [r7, #12] - 800589a: 2220 movs r2, #32 - 800589c: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8006188: 68fb ldr r3, [r7, #12] + 800618a: 2220 movs r2, #32 + 800618c: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_TIMEOUT; - 80058a0: 2303 movs r3, #3 - 80058a2: e006 b.n 80058b2 + 8006190: 2303 movs r3, #3 + 8006192: e006 b.n 80061a2 } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 80058a4: 68fb ldr r3, [r7, #12] - 80058a6: 2220 movs r2, #32 - 80058a8: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8006194: 68fb ldr r3, [r7, #12] + 8006196: 2220 movs r2, #32 + 8006198: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_OK; - 80058ac: 2300 movs r3, #0 - 80058ae: e000 b.n 80058b2 + 800619c: 2300 movs r3, #0 + 800619e: e000 b.n 80061a2 } else { return HAL_BUSY; - 80058b0: 2302 movs r3, #2 + 80061a0: 2302 movs r3, #2 } } - 80058b2: 4618 mov r0, r3 - 80058b4: 3720 adds r7, #32 - 80058b6: 46bd mov sp, r7 - 80058b8: bd80 pop {r7, pc} + 80061a2: 4618 mov r0, r3 + 80061a4: 3720 adds r7, #32 + 80061a6: 46bd mov sp, r7 + 80061a8: bd80 pop {r7, pc} ... -080058bc : +080061ac : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - 80058bc: b580 push {r7, lr} - 80058be: b0ba sub sp, #232 @ 0xe8 - 80058c0: af00 add r7, sp, #0 - 80058c2: 6078 str r0, [r7, #4] + 80061ac: b580 push {r7, lr} + 80061ae: b0ba sub sp, #232 @ 0xe8 + 80061b0: af00 add r7, sp, #0 + 80061b2: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->SR); - 80058c4: 687b ldr r3, [r7, #4] - 80058c6: 681b ldr r3, [r3, #0] - 80058c8: 681b ldr r3, [r3, #0] - 80058ca: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 + 80061b4: 687b ldr r3, [r7, #4] + 80061b6: 681b ldr r3, [r3, #0] + 80061b8: 681b ldr r3, [r3, #0] + 80061ba: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 uint32_t cr1its = READ_REG(huart->Instance->CR1); - 80058ce: 687b ldr r3, [r7, #4] - 80058d0: 681b ldr r3, [r3, #0] - 80058d2: 68db ldr r3, [r3, #12] - 80058d4: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 + 80061be: 687b ldr r3, [r7, #4] + 80061c0: 681b ldr r3, [r3, #0] + 80061c2: 68db ldr r3, [r3, #12] + 80061c4: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 uint32_t cr3its = READ_REG(huart->Instance->CR3); - 80058d8: 687b ldr r3, [r7, #4] - 80058da: 681b ldr r3, [r3, #0] - 80058dc: 695b ldr r3, [r3, #20] - 80058de: f8c7 30dc str.w r3, [r7, #220] @ 0xdc + 80061c8: 687b ldr r3, [r7, #4] + 80061ca: 681b ldr r3, [r3, #0] + 80061cc: 695b ldr r3, [r3, #20] + 80061ce: f8c7 30dc str.w r3, [r7, #220] @ 0xdc uint32_t errorflags = 0x00U; - 80058e2: 2300 movs r3, #0 - 80058e4: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 + 80061d2: 2300 movs r3, #0 + 80061d4: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 uint32_t dmarequest = 0x00U; - 80058e8: 2300 movs r3, #0 - 80058ea: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 + 80061d8: 2300 movs r3, #0 + 80061da: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE)); - 80058ee: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 80058f2: f003 030f and.w r3, r3, #15 - 80058f6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 + 80061de: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80061e2: f003 030f and.w r3, r3, #15 + 80061e6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 if (errorflags == RESET) - 80058fa: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 - 80058fe: 2b00 cmp r3, #0 - 8005900: d10f bne.n 8005922 + 80061ea: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 + 80061ee: 2b00 cmp r3, #0 + 80061f0: d10f bne.n 8006212 { /* UART in mode Receiver -------------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 8005902: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005906: f003 0320 and.w r3, r3, #32 - 800590a: 2b00 cmp r3, #0 - 800590c: d009 beq.n 8005922 - 800590e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005912: f003 0320 and.w r3, r3, #32 - 8005916: 2b00 cmp r3, #0 - 8005918: d003 beq.n 8005922 + 80061f2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80061f6: f003 0320 and.w r3, r3, #32 + 80061fa: 2b00 cmp r3, #0 + 80061fc: d009 beq.n 8006212 + 80061fe: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8006202: f003 0320 and.w r3, r3, #32 + 8006206: 2b00 cmp r3, #0 + 8006208: d003 beq.n 8006212 { UART_Receive_IT(huart); - 800591a: 6878 ldr r0, [r7, #4] - 800591c: f000 fbbc bl 8006098 + 800620a: 6878 ldr r0, [r7, #4] + 800620c: f000 fbbc bl 8006988 return; - 8005920: e25b b.n 8005dda + 8006210: e25b b.n 80066ca } } /* If some errors occur */ if ((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) - 8005922: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 - 8005926: 2b00 cmp r3, #0 - 8005928: f000 80de beq.w 8005ae8 - 800592c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 8005930: f003 0301 and.w r3, r3, #1 - 8005934: 2b00 cmp r3, #0 - 8005936: d106 bne.n 8005946 + 8006212: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8 + 8006216: 2b00 cmp r3, #0 + 8006218: f000 80de beq.w 80063d8 + 800621c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 8006220: f003 0301 and.w r3, r3, #1 + 8006224: 2b00 cmp r3, #0 + 8006226: d106 bne.n 8006236 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET))) - 8005938: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 800593c: f403 7390 and.w r3, r3, #288 @ 0x120 - 8005940: 2b00 cmp r3, #0 - 8005942: f000 80d1 beq.w 8005ae8 + 8006228: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 800622c: f403 7390 and.w r3, r3, #288 @ 0x120 + 8006230: 2b00 cmp r3, #0 + 8006232: f000 80d1 beq.w 80063d8 { /* UART parity error interrupt occurred ----------------------------------*/ if (((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET)) - 8005946: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 800594a: f003 0301 and.w r3, r3, #1 - 800594e: 2b00 cmp r3, #0 - 8005950: d00b beq.n 800596a - 8005952: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005956: f403 7380 and.w r3, r3, #256 @ 0x100 - 800595a: 2b00 cmp r3, #0 - 800595c: d005 beq.n 800596a + 8006236: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 800623a: f003 0301 and.w r3, r3, #1 + 800623e: 2b00 cmp r3, #0 + 8006240: d00b beq.n 800625a + 8006242: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8006246: f403 7380 and.w r3, r3, #256 @ 0x100 + 800624a: 2b00 cmp r3, #0 + 800624c: d005 beq.n 800625a { huart->ErrorCode |= HAL_UART_ERROR_PE; - 800595e: 687b ldr r3, [r7, #4] - 8005960: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005962: f043 0201 orr.w r2, r3, #1 - 8005966: 687b ldr r3, [r7, #4] - 8005968: 645a str r2, [r3, #68] @ 0x44 + 800624e: 687b ldr r3, [r7, #4] + 8006250: 6c5b ldr r3, [r3, #68] @ 0x44 + 8006252: f043 0201 orr.w r2, r3, #1 + 8006256: 687b ldr r3, [r7, #4] + 8006258: 645a str r2, [r3, #68] @ 0x44 } /* UART noise error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 800596a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 800596e: f003 0304 and.w r3, r3, #4 - 8005972: 2b00 cmp r3, #0 - 8005974: d00b beq.n 800598e - 8005976: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 800597a: f003 0301 and.w r3, r3, #1 - 800597e: 2b00 cmp r3, #0 - 8005980: d005 beq.n 800598e + 800625a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 800625e: f003 0304 and.w r3, r3, #4 + 8006262: 2b00 cmp r3, #0 + 8006264: d00b beq.n 800627e + 8006266: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 800626a: f003 0301 and.w r3, r3, #1 + 800626e: 2b00 cmp r3, #0 + 8006270: d005 beq.n 800627e { huart->ErrorCode |= HAL_UART_ERROR_NE; - 8005982: 687b ldr r3, [r7, #4] - 8005984: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005986: f043 0202 orr.w r2, r3, #2 - 800598a: 687b ldr r3, [r7, #4] - 800598c: 645a str r2, [r3, #68] @ 0x44 + 8006272: 687b ldr r3, [r7, #4] + 8006274: 6c5b ldr r3, [r3, #68] @ 0x44 + 8006276: f043 0202 orr.w r2, r3, #2 + 800627a: 687b ldr r3, [r7, #4] + 800627c: 645a str r2, [r3, #68] @ 0x44 } /* UART frame error interrupt occurred -----------------------------------*/ if (((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) - 800598e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005992: f003 0302 and.w r3, r3, #2 - 8005996: 2b00 cmp r3, #0 - 8005998: d00b beq.n 80059b2 - 800599a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 800599e: f003 0301 and.w r3, r3, #1 - 80059a2: 2b00 cmp r3, #0 - 80059a4: d005 beq.n 80059b2 + 800627e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8006282: f003 0302 and.w r3, r3, #2 + 8006286: 2b00 cmp r3, #0 + 8006288: d00b beq.n 80062a2 + 800628a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 800628e: f003 0301 and.w r3, r3, #1 + 8006292: 2b00 cmp r3, #0 + 8006294: d005 beq.n 80062a2 { huart->ErrorCode |= HAL_UART_ERROR_FE; - 80059a6: 687b ldr r3, [r7, #4] - 80059a8: 6c5b ldr r3, [r3, #68] @ 0x44 - 80059aa: f043 0204 orr.w r2, r3, #4 - 80059ae: 687b ldr r3, [r7, #4] - 80059b0: 645a str r2, [r3, #68] @ 0x44 + 8006296: 687b ldr r3, [r7, #4] + 8006298: 6c5b ldr r3, [r3, #68] @ 0x44 + 800629a: f043 0204 orr.w r2, r3, #4 + 800629e: 687b ldr r3, [r7, #4] + 80062a0: 645a str r2, [r3, #68] @ 0x44 } /* UART Over-Run interrupt occurred --------------------------------------*/ if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) - 80059b2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 80059b6: f003 0308 and.w r3, r3, #8 - 80059ba: 2b00 cmp r3, #0 - 80059bc: d011 beq.n 80059e2 - 80059be: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 80059c2: f003 0320 and.w r3, r3, #32 - 80059c6: 2b00 cmp r3, #0 - 80059c8: d105 bne.n 80059d6 + 80062a2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80062a6: f003 0308 and.w r3, r3, #8 + 80062aa: 2b00 cmp r3, #0 + 80062ac: d011 beq.n 80062d2 + 80062ae: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80062b2: f003 0320 and.w r3, r3, #32 + 80062b6: 2b00 cmp r3, #0 + 80062b8: d105 bne.n 80062c6 || ((cr3its & USART_CR3_EIE) != RESET))) - 80059ca: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc - 80059ce: f003 0301 and.w r3, r3, #1 - 80059d2: 2b00 cmp r3, #0 - 80059d4: d005 beq.n 80059e2 + 80062ba: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc + 80062be: f003 0301 and.w r3, r3, #1 + 80062c2: 2b00 cmp r3, #0 + 80062c4: d005 beq.n 80062d2 { huart->ErrorCode |= HAL_UART_ERROR_ORE; - 80059d6: 687b ldr r3, [r7, #4] - 80059d8: 6c5b ldr r3, [r3, #68] @ 0x44 - 80059da: f043 0208 orr.w r2, r3, #8 - 80059de: 687b ldr r3, [r7, #4] - 80059e0: 645a str r2, [r3, #68] @ 0x44 + 80062c6: 687b ldr r3, [r7, #4] + 80062c8: 6c5b ldr r3, [r3, #68] @ 0x44 + 80062ca: f043 0208 orr.w r2, r3, #8 + 80062ce: 687b ldr r3, [r7, #4] + 80062d0: 645a str r2, [r3, #68] @ 0x44 } /* Call UART Error Call back function if need be --------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 80059e2: 687b ldr r3, [r7, #4] - 80059e4: 6c5b ldr r3, [r3, #68] @ 0x44 - 80059e6: 2b00 cmp r3, #0 - 80059e8: f000 81f2 beq.w 8005dd0 + 80062d2: 687b ldr r3, [r7, #4] + 80062d4: 6c5b ldr r3, [r3, #68] @ 0x44 + 80062d6: 2b00 cmp r3, #0 + 80062d8: f000 81f2 beq.w 80066c0 { /* UART in mode Receiver -----------------------------------------------*/ if (((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET)) - 80059ec: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 80059f0: f003 0320 and.w r3, r3, #32 - 80059f4: 2b00 cmp r3, #0 - 80059f6: d008 beq.n 8005a0a - 80059f8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 80059fc: f003 0320 and.w r3, r3, #32 - 8005a00: 2b00 cmp r3, #0 - 8005a02: d002 beq.n 8005a0a + 80062dc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80062e0: f003 0320 and.w r3, r3, #32 + 80062e4: 2b00 cmp r3, #0 + 80062e6: d008 beq.n 80062fa + 80062e8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80062ec: f003 0320 and.w r3, r3, #32 + 80062f0: 2b00 cmp r3, #0 + 80062f2: d002 beq.n 80062fa { UART_Receive_IT(huart); - 8005a04: 6878 ldr r0, [r7, #4] - 8005a06: f000 fb47 bl 8006098 + 80062f4: 6878 ldr r0, [r7, #4] + 80062f6: f000 fb47 bl 8006988 } /* If Overrun error occurs, or if any error occurs in DMA mode reception, consider error as blocking */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); - 8005a0a: 687b ldr r3, [r7, #4] - 8005a0c: 681b ldr r3, [r3, #0] - 8005a0e: 695b ldr r3, [r3, #20] - 8005a10: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005a14: 2b00 cmp r3, #0 - 8005a16: bf14 ite ne - 8005a18: 2301 movne r3, #1 - 8005a1a: 2300 moveq r3, #0 - 8005a1c: b2db uxtb r3, r3 - 8005a1e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 + 80062fa: 687b ldr r3, [r7, #4] + 80062fc: 681b ldr r3, [r3, #0] + 80062fe: 695b ldr r3, [r3, #20] + 8006300: f003 0340 and.w r3, r3, #64 @ 0x40 + 8006304: 2b00 cmp r3, #0 + 8006306: bf14 ite ne + 8006308: 2301 movne r3, #1 + 800630a: 2300 moveq r3, #0 + 800630c: b2db uxtb r3, r3 + 800630e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4 if (((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest) - 8005a22: 687b ldr r3, [r7, #4] - 8005a24: 6c5b ldr r3, [r3, #68] @ 0x44 - 8005a26: f003 0308 and.w r3, r3, #8 - 8005a2a: 2b00 cmp r3, #0 - 8005a2c: d103 bne.n 8005a36 - 8005a2e: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 - 8005a32: 2b00 cmp r3, #0 - 8005a34: d04f beq.n 8005ad6 + 8006312: 687b ldr r3, [r7, #4] + 8006314: 6c5b ldr r3, [r3, #68] @ 0x44 + 8006316: f003 0308 and.w r3, r3, #8 + 800631a: 2b00 cmp r3, #0 + 800631c: d103 bne.n 8006326 + 800631e: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4 + 8006322: 2b00 cmp r3, #0 + 8006324: d04f beq.n 80063c6 { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); - 8005a36: 6878 ldr r0, [r7, #4] - 8005a38: f000 fa51 bl 8005ede + 8006326: 6878 ldr r0, [r7, #4] + 8006328: f000 fa51 bl 80067ce /* Disable the UART DMA Rx request if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005a3c: 687b ldr r3, [r7, #4] - 8005a3e: 681b ldr r3, [r3, #0] - 8005a40: 695b ldr r3, [r3, #20] - 8005a42: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005a46: 2b00 cmp r3, #0 - 8005a48: d041 beq.n 8005ace + 800632c: 687b ldr r3, [r7, #4] + 800632e: 681b ldr r3, [r3, #0] + 8006330: 695b ldr r3, [r3, #20] + 8006332: f003 0340 and.w r3, r3, #64 @ 0x40 + 8006336: 2b00 cmp r3, #0 + 8006338: d041 beq.n 80063be { ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8005a4a: 687b ldr r3, [r7, #4] - 8005a4c: 681b ldr r3, [r3, #0] - 8005a4e: 3314 adds r3, #20 - 8005a50: f8c7 309c str.w r3, [r7, #156] @ 0x9c + 800633a: 687b ldr r3, [r7, #4] + 800633c: 681b ldr r3, [r3, #0] + 800633e: 3314 adds r3, #20 + 8006340: f8c7 309c str.w r3, [r7, #156] @ 0x9c */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005a54: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c - 8005a58: e853 3f00 ldrex r3, [r3] - 8005a5c: f8c7 3098 str.w r3, [r7, #152] @ 0x98 + 8006344: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c + 8006348: e853 3f00 ldrex r3, [r3] + 800634c: f8c7 3098 str.w r3, [r7, #152] @ 0x98 return(result); - 8005a60: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 - 8005a64: f023 0340 bic.w r3, r3, #64 @ 0x40 - 8005a68: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 - 8005a6c: 687b ldr r3, [r7, #4] - 8005a6e: 681b ldr r3, [r3, #0] - 8005a70: 3314 adds r3, #20 - 8005a72: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 - 8005a76: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 - 8005a7a: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 + 8006350: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 + 8006354: f023 0340 bic.w r3, r3, #64 @ 0x40 + 8006358: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 + 800635c: 687b ldr r3, [r7, #4] + 800635e: 681b ldr r3, [r3, #0] + 8006360: 3314 adds r3, #20 + 8006362: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0 + 8006366: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8 + 800636a: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005a7e: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 - 8005a82: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 - 8005a86: e841 2300 strex r3, r2, [r1] - 8005a8a: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 + 800636e: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4 + 8006372: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8 + 8006376: e841 2300 strex r3, r2, [r1] + 800637a: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 return(result); - 8005a8e: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 - 8005a92: 2b00 cmp r3, #0 - 8005a94: d1d9 bne.n 8005a4a + 800637e: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0 + 8006382: 2b00 cmp r3, #0 + 8006384: d1d9 bne.n 800633a /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) - 8005a96: 687b ldr r3, [r7, #4] - 8005a98: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005a9a: 2b00 cmp r3, #0 - 8005a9c: d013 beq.n 8005ac6 + 8006386: 687b ldr r3, [r7, #4] + 8006388: 6bdb ldr r3, [r3, #60] @ 0x3c + 800638a: 2b00 cmp r3, #0 + 800638c: d013 beq.n 80063b6 { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 8005a9e: 687b ldr r3, [r7, #4] - 8005aa0: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005aa2: 4a7e ldr r2, [pc, #504] @ (8005c9c ) - 8005aa4: 635a str r2, [r3, #52] @ 0x34 + 800638e: 687b ldr r3, [r7, #4] + 8006390: 6bdb ldr r3, [r3, #60] @ 0x3c + 8006392: 4a7e ldr r2, [pc, #504] @ (800658c ) + 8006394: 635a str r2, [r3, #52] @ 0x34 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 8005aa6: 687b ldr r3, [r7, #4] - 8005aa8: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005aaa: 4618 mov r0, r3 - 8005aac: f7fd faf8 bl 80030a0 - 8005ab0: 4603 mov r3, r0 - 8005ab2: 2b00 cmp r3, #0 - 8005ab4: d016 beq.n 8005ae4 + 8006396: 687b ldr r3, [r7, #4] + 8006398: 6bdb ldr r3, [r3, #60] @ 0x3c + 800639a: 4618 mov r0, r3 + 800639c: f7fd faf8 bl 8003990 + 80063a0: 4603 mov r3, r0 + 80063a2: 2b00 cmp r3, #0 + 80063a4: d016 beq.n 80063d4 { /* Call Directly XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); - 8005ab6: 687b ldr r3, [r7, #4] - 8005ab8: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005aba: 6b5b ldr r3, [r3, #52] @ 0x34 - 8005abc: 687a ldr r2, [r7, #4] - 8005abe: 6bd2 ldr r2, [r2, #60] @ 0x3c - 8005ac0: 4610 mov r0, r2 - 8005ac2: 4798 blx r3 + 80063a6: 687b ldr r3, [r7, #4] + 80063a8: 6bdb ldr r3, [r3, #60] @ 0x3c + 80063aa: 6b5b ldr r3, [r3, #52] @ 0x34 + 80063ac: 687a ldr r2, [r7, #4] + 80063ae: 6bd2 ldr r2, [r2, #60] @ 0x3c + 80063b0: 4610 mov r0, r2 + 80063b2: 4798 blx r3 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005ac4: e00e b.n 8005ae4 + 80063b4: e00e b.n 80063d4 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005ac6: 6878 ldr r0, [r7, #4] - 8005ac8: f000 f99c bl 8005e04 + 80063b6: 6878 ldr r0, [r7, #4] + 80063b8: f000 f99c bl 80066f4 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005acc: e00a b.n 8005ae4 + 80063bc: e00a b.n 80063d4 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005ace: 6878 ldr r0, [r7, #4] - 8005ad0: f000 f998 bl 8005e04 + 80063be: 6878 ldr r0, [r7, #4] + 80063c0: f000 f998 bl 80066f4 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005ad4: e006 b.n 8005ae4 + 80063c4: e006 b.n 80063d4 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005ad6: 6878 ldr r0, [r7, #4] - 8005ad8: f000 f994 bl 8005e04 + 80063c6: 6878 ldr r0, [r7, #4] + 80063c8: f000 f994 bl 80066f4 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8005adc: 687b ldr r3, [r7, #4] - 8005ade: 2200 movs r2, #0 - 8005ae0: 645a str r2, [r3, #68] @ 0x44 + 80063cc: 687b ldr r3, [r7, #4] + 80063ce: 2200 movs r2, #0 + 80063d0: 645a str r2, [r3, #68] @ 0x44 } } return; - 8005ae2: e175 b.n 8005dd0 + 80063d2: e175 b.n 80066c0 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005ae4: bf00 nop + 80063d4: bf00 nop return; - 8005ae6: e173 b.n 8005dd0 + 80063d6: e173 b.n 80066c0 } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8005ae8: 687b ldr r3, [r7, #4] - 8005aea: 6b1b ldr r3, [r3, #48] @ 0x30 - 8005aec: 2b01 cmp r3, #1 - 8005aee: f040 814f bne.w 8005d90 + 80063d8: 687b ldr r3, [r7, #4] + 80063da: 6b1b ldr r3, [r3, #48] @ 0x30 + 80063dc: 2b01 cmp r3, #1 + 80063de: f040 814f bne.w 8006680 && ((isrflags & USART_SR_IDLE) != 0U) - 8005af2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005af6: f003 0310 and.w r3, r3, #16 - 8005afa: 2b00 cmp r3, #0 - 8005afc: f000 8148 beq.w 8005d90 + 80063e2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80063e6: f003 0310 and.w r3, r3, #16 + 80063ea: 2b00 cmp r3, #0 + 80063ec: f000 8148 beq.w 8006680 && ((cr1its & USART_SR_IDLE) != 0U)) - 8005b00: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005b04: f003 0310 and.w r3, r3, #16 - 8005b08: 2b00 cmp r3, #0 - 8005b0a: f000 8141 beq.w 8005d90 + 80063f0: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80063f4: f003 0310 and.w r3, r3, #16 + 80063f8: 2b00 cmp r3, #0 + 80063fa: f000 8141 beq.w 8006680 { __HAL_UART_CLEAR_IDLEFLAG(huart); - 8005b0e: 2300 movs r3, #0 - 8005b10: 60bb str r3, [r7, #8] - 8005b12: 687b ldr r3, [r7, #4] - 8005b14: 681b ldr r3, [r3, #0] - 8005b16: 681b ldr r3, [r3, #0] - 8005b18: 60bb str r3, [r7, #8] - 8005b1a: 687b ldr r3, [r7, #4] - 8005b1c: 681b ldr r3, [r3, #0] - 8005b1e: 685b ldr r3, [r3, #4] - 8005b20: 60bb str r3, [r7, #8] - 8005b22: 68bb ldr r3, [r7, #8] + 80063fe: 2300 movs r3, #0 + 8006400: 60bb str r3, [r7, #8] + 8006402: 687b ldr r3, [r7, #4] + 8006404: 681b ldr r3, [r3, #0] + 8006406: 681b ldr r3, [r3, #0] + 8006408: 60bb str r3, [r7, #8] + 800640a: 687b ldr r3, [r7, #4] + 800640c: 681b ldr r3, [r3, #0] + 800640e: 685b ldr r3, [r3, #4] + 8006410: 60bb str r3, [r7, #8] + 8006412: 68bb ldr r3, [r7, #8] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8005b24: 687b ldr r3, [r7, #4] - 8005b26: 681b ldr r3, [r3, #0] - 8005b28: 695b ldr r3, [r3, #20] - 8005b2a: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005b2e: 2b00 cmp r3, #0 - 8005b30: f000 80b6 beq.w 8005ca0 + 8006414: 687b ldr r3, [r7, #4] + 8006416: 681b ldr r3, [r3, #0] + 8006418: 695b ldr r3, [r3, #20] + 800641a: f003 0340 and.w r3, r3, #64 @ 0x40 + 800641e: 2b00 cmp r3, #0 + 8006420: f000 80b6 beq.w 8006590 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 8005b34: 687b ldr r3, [r7, #4] - 8005b36: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005b38: 681b ldr r3, [r3, #0] - 8005b3a: 685b ldr r3, [r3, #4] - 8005b3c: f8a7 30be strh.w r3, [r7, #190] @ 0xbe + 8006424: 687b ldr r3, [r7, #4] + 8006426: 6bdb ldr r3, [r3, #60] @ 0x3c + 8006428: 681b ldr r3, [r3, #0] + 800642a: 685b ldr r3, [r3, #4] + 800642c: f8a7 30be strh.w r3, [r7, #190] @ 0xbe if ((nb_remaining_rx_data > 0U) - 8005b40: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe - 8005b44: 2b00 cmp r3, #0 - 8005b46: f000 8145 beq.w 8005dd4 + 8006430: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe + 8006434: 2b00 cmp r3, #0 + 8006436: f000 8145 beq.w 80066c4 && (nb_remaining_rx_data < huart->RxXferSize)) - 8005b4a: 687b ldr r3, [r7, #4] - 8005b4c: 8d9b ldrh r3, [r3, #44] @ 0x2c - 8005b4e: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe - 8005b52: 429a cmp r2, r3 - 8005b54: f080 813e bcs.w 8005dd4 + 800643a: 687b ldr r3, [r7, #4] + 800643c: 8d9b ldrh r3, [r3, #44] @ 0x2c + 800643e: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe + 8006442: 429a cmp r2, r3 + 8006444: f080 813e bcs.w 80066c4 { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; - 8005b58: 687b ldr r3, [r7, #4] - 8005b5a: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe - 8005b5e: 85da strh r2, [r3, #46] @ 0x2e + 8006448: 687b ldr r3, [r7, #4] + 800644a: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe + 800644e: 85da strh r2, [r3, #46] @ 0x2e /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) - 8005b60: 687b ldr r3, [r7, #4] - 8005b62: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005b64: 699b ldr r3, [r3, #24] - 8005b66: 2b20 cmp r3, #32 - 8005b68: f000 8088 beq.w 8005c7c + 8006450: 687b ldr r3, [r7, #4] + 8006452: 6bdb ldr r3, [r3, #60] @ 0x3c + 8006454: 699b ldr r3, [r3, #24] + 8006456: 2b20 cmp r3, #32 + 8006458: f000 8088 beq.w 800656c { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8005b6c: 687b ldr r3, [r7, #4] - 8005b6e: 681b ldr r3, [r3, #0] - 8005b70: 330c adds r3, #12 - 8005b72: f8c7 3088 str.w r3, [r7, #136] @ 0x88 + 800645c: 687b ldr r3, [r7, #4] + 800645e: 681b ldr r3, [r3, #0] + 8006460: 330c adds r3, #12 + 8006462: f8c7 3088 str.w r3, [r7, #136] @ 0x88 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005b76: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 - 8005b7a: e853 3f00 ldrex r3, [r3] - 8005b7e: f8c7 3084 str.w r3, [r7, #132] @ 0x84 + 8006466: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88 + 800646a: e853 3f00 ldrex r3, [r3] + 800646e: f8c7 3084 str.w r3, [r7, #132] @ 0x84 return(result); - 8005b82: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 - 8005b86: f423 7380 bic.w r3, r3, #256 @ 0x100 - 8005b8a: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 - 8005b8e: 687b ldr r3, [r7, #4] - 8005b90: 681b ldr r3, [r3, #0] - 8005b92: 330c adds r3, #12 - 8005b94: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 - 8005b98: f8c7 2094 str.w r2, [r7, #148] @ 0x94 - 8005b9c: f8c7 3090 str.w r3, [r7, #144] @ 0x90 + 8006472: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84 + 8006476: f423 7380 bic.w r3, r3, #256 @ 0x100 + 800647a: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 + 800647e: 687b ldr r3, [r7, #4] + 8006480: 681b ldr r3, [r3, #0] + 8006482: 330c adds r3, #12 + 8006484: f8d7 20b8 ldr.w r2, [r7, #184] @ 0xb8 + 8006488: f8c7 2094 str.w r2, [r7, #148] @ 0x94 + 800648c: f8c7 3090 str.w r3, [r7, #144] @ 0x90 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005ba0: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 - 8005ba4: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 - 8005ba8: e841 2300 strex r3, r2, [r1] - 8005bac: f8c7 308c str.w r3, [r7, #140] @ 0x8c + 8006490: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90 + 8006494: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94 + 8006498: e841 2300 strex r3, r2, [r1] + 800649c: f8c7 308c str.w r3, [r7, #140] @ 0x8c return(result); - 8005bb0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c - 8005bb4: 2b00 cmp r3, #0 - 8005bb6: d1d9 bne.n 8005b6c + 80064a0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c + 80064a4: 2b00 cmp r3, #0 + 80064a6: d1d9 bne.n 800645c ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005bb8: 687b ldr r3, [r7, #4] - 8005bba: 681b ldr r3, [r3, #0] - 8005bbc: 3314 adds r3, #20 - 8005bbe: 677b str r3, [r7, #116] @ 0x74 + 80064a8: 687b ldr r3, [r7, #4] + 80064aa: 681b ldr r3, [r3, #0] + 80064ac: 3314 adds r3, #20 + 80064ae: 677b str r3, [r7, #116] @ 0x74 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005bc0: 6f7b ldr r3, [r7, #116] @ 0x74 - 8005bc2: e853 3f00 ldrex r3, [r3] - 8005bc6: 673b str r3, [r7, #112] @ 0x70 + 80064b0: 6f7b ldr r3, [r7, #116] @ 0x74 + 80064b2: e853 3f00 ldrex r3, [r3] + 80064b6: 673b str r3, [r7, #112] @ 0x70 return(result); - 8005bc8: 6f3b ldr r3, [r7, #112] @ 0x70 - 8005bca: f023 0301 bic.w r3, r3, #1 - 8005bce: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 - 8005bd2: 687b ldr r3, [r7, #4] - 8005bd4: 681b ldr r3, [r3, #0] - 8005bd6: 3314 adds r3, #20 - 8005bd8: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 - 8005bdc: f8c7 2080 str.w r2, [r7, #128] @ 0x80 - 8005be0: 67fb str r3, [r7, #124] @ 0x7c + 80064b8: 6f3b ldr r3, [r7, #112] @ 0x70 + 80064ba: f023 0301 bic.w r3, r3, #1 + 80064be: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 + 80064c2: 687b ldr r3, [r7, #4] + 80064c4: 681b ldr r3, [r3, #0] + 80064c6: 3314 adds r3, #20 + 80064c8: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 + 80064cc: f8c7 2080 str.w r2, [r7, #128] @ 0x80 + 80064d0: 67fb str r3, [r7, #124] @ 0x7c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005be2: 6ff9 ldr r1, [r7, #124] @ 0x7c - 8005be4: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 - 8005be8: e841 2300 strex r3, r2, [r1] - 8005bec: 67bb str r3, [r7, #120] @ 0x78 + 80064d2: 6ff9 ldr r1, [r7, #124] @ 0x7c + 80064d4: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80 + 80064d8: e841 2300 strex r3, r2, [r1] + 80064dc: 67bb str r3, [r7, #120] @ 0x78 return(result); - 8005bee: 6fbb ldr r3, [r7, #120] @ 0x78 - 8005bf0: 2b00 cmp r3, #0 - 8005bf2: d1e1 bne.n 8005bb8 + 80064de: 6fbb ldr r3, [r7, #120] @ 0x78 + 80064e0: 2b00 cmp r3, #0 + 80064e2: d1e1 bne.n 80064a8 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8005bf4: 687b ldr r3, [r7, #4] - 8005bf6: 681b ldr r3, [r3, #0] - 8005bf8: 3314 adds r3, #20 - 8005bfa: 663b str r3, [r7, #96] @ 0x60 + 80064e4: 687b ldr r3, [r7, #4] + 80064e6: 681b ldr r3, [r3, #0] + 80064e8: 3314 adds r3, #20 + 80064ea: 663b str r3, [r7, #96] @ 0x60 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005bfc: 6e3b ldr r3, [r7, #96] @ 0x60 - 8005bfe: e853 3f00 ldrex r3, [r3] - 8005c02: 65fb str r3, [r7, #92] @ 0x5c + 80064ec: 6e3b ldr r3, [r7, #96] @ 0x60 + 80064ee: e853 3f00 ldrex r3, [r3] + 80064f2: 65fb str r3, [r7, #92] @ 0x5c return(result); - 8005c04: 6dfb ldr r3, [r7, #92] @ 0x5c - 8005c06: f023 0340 bic.w r3, r3, #64 @ 0x40 - 8005c0a: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 - 8005c0e: 687b ldr r3, [r7, #4] - 8005c10: 681b ldr r3, [r3, #0] - 8005c12: 3314 adds r3, #20 - 8005c14: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 - 8005c18: 66fa str r2, [r7, #108] @ 0x6c - 8005c1a: 66bb str r3, [r7, #104] @ 0x68 + 80064f4: 6dfb ldr r3, [r7, #92] @ 0x5c + 80064f6: f023 0340 bic.w r3, r3, #64 @ 0x40 + 80064fa: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 + 80064fe: 687b ldr r3, [r7, #4] + 8006500: 681b ldr r3, [r3, #0] + 8006502: 3314 adds r3, #20 + 8006504: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0 + 8006508: 66fa str r2, [r7, #108] @ 0x6c + 800650a: 66bb str r3, [r7, #104] @ 0x68 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005c1c: 6eb9 ldr r1, [r7, #104] @ 0x68 - 8005c1e: 6efa ldr r2, [r7, #108] @ 0x6c - 8005c20: e841 2300 strex r3, r2, [r1] - 8005c24: 667b str r3, [r7, #100] @ 0x64 + 800650c: 6eb9 ldr r1, [r7, #104] @ 0x68 + 800650e: 6efa ldr r2, [r7, #108] @ 0x6c + 8006510: e841 2300 strex r3, r2, [r1] + 8006514: 667b str r3, [r7, #100] @ 0x64 return(result); - 8005c26: 6e7b ldr r3, [r7, #100] @ 0x64 - 8005c28: 2b00 cmp r3, #0 - 8005c2a: d1e3 bne.n 8005bf4 + 8006516: 6e7b ldr r3, [r7, #100] @ 0x64 + 8006518: 2b00 cmp r3, #0 + 800651a: d1e3 bne.n 80064e4 /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8005c2c: 687b ldr r3, [r7, #4] - 8005c2e: 2220 movs r2, #32 - 8005c30: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 800651c: 687b ldr r3, [r7, #4] + 800651e: 2220 movs r2, #32 + 8006520: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005c34: 687b ldr r3, [r7, #4] - 8005c36: 2200 movs r2, #0 - 8005c38: 631a str r2, [r3, #48] @ 0x30 + 8006524: 687b ldr r3, [r7, #4] + 8006526: 2200 movs r2, #0 + 8006528: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005c3a: 687b ldr r3, [r7, #4] - 8005c3c: 681b ldr r3, [r3, #0] - 8005c3e: 330c adds r3, #12 - 8005c40: 64fb str r3, [r7, #76] @ 0x4c + 800652a: 687b ldr r3, [r7, #4] + 800652c: 681b ldr r3, [r3, #0] + 800652e: 330c adds r3, #12 + 8006530: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005c42: 6cfb ldr r3, [r7, #76] @ 0x4c - 8005c44: e853 3f00 ldrex r3, [r3] - 8005c48: 64bb str r3, [r7, #72] @ 0x48 + 8006532: 6cfb ldr r3, [r7, #76] @ 0x4c + 8006534: e853 3f00 ldrex r3, [r3] + 8006538: 64bb str r3, [r7, #72] @ 0x48 return(result); - 8005c4a: 6cbb ldr r3, [r7, #72] @ 0x48 - 8005c4c: f023 0310 bic.w r3, r3, #16 - 8005c50: f8c7 30ac str.w r3, [r7, #172] @ 0xac - 8005c54: 687b ldr r3, [r7, #4] - 8005c56: 681b ldr r3, [r3, #0] - 8005c58: 330c adds r3, #12 - 8005c5a: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac - 8005c5e: 65ba str r2, [r7, #88] @ 0x58 - 8005c60: 657b str r3, [r7, #84] @ 0x54 + 800653a: 6cbb ldr r3, [r7, #72] @ 0x48 + 800653c: f023 0310 bic.w r3, r3, #16 + 8006540: f8c7 30ac str.w r3, [r7, #172] @ 0xac + 8006544: 687b ldr r3, [r7, #4] + 8006546: 681b ldr r3, [r3, #0] + 8006548: 330c adds r3, #12 + 800654a: f8d7 20ac ldr.w r2, [r7, #172] @ 0xac + 800654e: 65ba str r2, [r7, #88] @ 0x58 + 8006550: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005c62: 6d79 ldr r1, [r7, #84] @ 0x54 - 8005c64: 6dba ldr r2, [r7, #88] @ 0x58 - 8005c66: e841 2300 strex r3, r2, [r1] - 8005c6a: 653b str r3, [r7, #80] @ 0x50 + 8006552: 6d79 ldr r1, [r7, #84] @ 0x54 + 8006554: 6dba ldr r2, [r7, #88] @ 0x58 + 8006556: e841 2300 strex r3, r2, [r1] + 800655a: 653b str r3, [r7, #80] @ 0x50 return(result); - 8005c6c: 6d3b ldr r3, [r7, #80] @ 0x50 - 8005c6e: 2b00 cmp r3, #0 - 8005c70: d1e3 bne.n 8005c3a + 800655c: 6d3b ldr r3, [r7, #80] @ 0x50 + 800655e: 2b00 cmp r3, #0 + 8006560: d1e3 bne.n 800652a /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); - 8005c72: 687b ldr r3, [r7, #4] - 8005c74: 6bdb ldr r3, [r3, #60] @ 0x3c - 8005c76: 4618 mov r0, r3 - 8005c78: f7fd f9d7 bl 800302a + 8006562: 687b ldr r3, [r7, #4] + 8006564: 6bdb ldr r3, [r3, #60] @ 0x3c + 8006566: 4618 mov r0, r3 + 8006568: f7fd f9d7 bl 800391a } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 8005c7c: 687b ldr r3, [r7, #4] - 8005c7e: 2202 movs r2, #2 - 8005c80: 635a str r2, [r3, #52] @ 0x34 + 800656c: 687b ldr r3, [r7, #4] + 800656e: 2202 movs r2, #2 + 8006570: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 8005c82: 687b ldr r3, [r7, #4] - 8005c84: 8d9a ldrh r2, [r3, #44] @ 0x2c - 8005c86: 687b ldr r3, [r7, #4] - 8005c88: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8005c8a: b29b uxth r3, r3 - 8005c8c: 1ad3 subs r3, r2, r3 - 8005c8e: b29b uxth r3, r3 - 8005c90: 4619 mov r1, r3 - 8005c92: 6878 ldr r0, [r7, #4] - 8005c94: f000 f8bf bl 8005e16 + 8006572: 687b ldr r3, [r7, #4] + 8006574: 8d9a ldrh r2, [r3, #44] @ 0x2c + 8006576: 687b ldr r3, [r7, #4] + 8006578: 8ddb ldrh r3, [r3, #46] @ 0x2e + 800657a: b29b uxth r3, r3 + 800657c: 1ad3 subs r3, r2, r3 + 800657e: b29b uxth r3, r3 + 8006580: 4619 mov r1, r3 + 8006582: 6878 ldr r0, [r7, #4] + 8006584: f000 f8bf bl 8006706 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; - 8005c98: e09c b.n 8005dd4 - 8005c9a: bf00 nop - 8005c9c: 08005fa3 .word 0x08005fa3 + 8006588: e09c b.n 80066c4 + 800658a: bf00 nop + 800658c: 08006893 .word 0x08006893 else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 8005ca0: 687b ldr r3, [r7, #4] - 8005ca2: 8d9a ldrh r2, [r3, #44] @ 0x2c - 8005ca4: 687b ldr r3, [r7, #4] - 8005ca6: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8005ca8: b29b uxth r3, r3 - 8005caa: 1ad3 subs r3, r2, r3 - 8005cac: f8a7 30ce strh.w r3, [r7, #206] @ 0xce + 8006590: 687b ldr r3, [r7, #4] + 8006592: 8d9a ldrh r2, [r3, #44] @ 0x2c + 8006594: 687b ldr r3, [r7, #4] + 8006596: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8006598: b29b uxth r3, r3 + 800659a: 1ad3 subs r3, r2, r3 + 800659c: f8a7 30ce strh.w r3, [r7, #206] @ 0xce if ((huart->RxXferCount > 0U) - 8005cb0: 687b ldr r3, [r7, #4] - 8005cb2: 8ddb ldrh r3, [r3, #46] @ 0x2e - 8005cb4: b29b uxth r3, r3 - 8005cb6: 2b00 cmp r3, #0 - 8005cb8: f000 808e beq.w 8005dd8 + 80065a0: 687b ldr r3, [r7, #4] + 80065a2: 8ddb ldrh r3, [r3, #46] @ 0x2e + 80065a4: b29b uxth r3, r3 + 80065a6: 2b00 cmp r3, #0 + 80065a8: f000 808e beq.w 80066c8 && (nb_rx_data > 0U)) - 8005cbc: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce - 8005cc0: 2b00 cmp r3, #0 - 8005cc2: f000 8089 beq.w 8005dd8 + 80065ac: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce + 80065b0: 2b00 cmp r3, #0 + 80065b2: f000 8089 beq.w 80066c8 { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8005cc6: 687b ldr r3, [r7, #4] - 8005cc8: 681b ldr r3, [r3, #0] - 8005cca: 330c adds r3, #12 - 8005ccc: 63bb str r3, [r7, #56] @ 0x38 + 80065b6: 687b ldr r3, [r7, #4] + 80065b8: 681b ldr r3, [r3, #0] + 80065ba: 330c adds r3, #12 + 80065bc: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005cce: 6bbb ldr r3, [r7, #56] @ 0x38 - 8005cd0: e853 3f00 ldrex r3, [r3] - 8005cd4: 637b str r3, [r7, #52] @ 0x34 + 80065be: 6bbb ldr r3, [r7, #56] @ 0x38 + 80065c0: e853 3f00 ldrex r3, [r3] + 80065c4: 637b str r3, [r7, #52] @ 0x34 return(result); - 8005cd6: 6b7b ldr r3, [r7, #52] @ 0x34 - 8005cd8: f423 7390 bic.w r3, r3, #288 @ 0x120 - 8005cdc: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 - 8005ce0: 687b ldr r3, [r7, #4] - 8005ce2: 681b ldr r3, [r3, #0] - 8005ce4: 330c adds r3, #12 - 8005ce6: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 - 8005cea: 647a str r2, [r7, #68] @ 0x44 - 8005cec: 643b str r3, [r7, #64] @ 0x40 + 80065c6: 6b7b ldr r3, [r7, #52] @ 0x34 + 80065c8: f423 7390 bic.w r3, r3, #288 @ 0x120 + 80065cc: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 + 80065d0: 687b ldr r3, [r7, #4] + 80065d2: 681b ldr r3, [r3, #0] + 80065d4: 330c adds r3, #12 + 80065d6: f8d7 20c8 ldr.w r2, [r7, #200] @ 0xc8 + 80065da: 647a str r2, [r7, #68] @ 0x44 + 80065dc: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005cee: 6c39 ldr r1, [r7, #64] @ 0x40 - 8005cf0: 6c7a ldr r2, [r7, #68] @ 0x44 - 8005cf2: e841 2300 strex r3, r2, [r1] - 8005cf6: 63fb str r3, [r7, #60] @ 0x3c + 80065de: 6c39 ldr r1, [r7, #64] @ 0x40 + 80065e0: 6c7a ldr r2, [r7, #68] @ 0x44 + 80065e2: e841 2300 strex r3, r2, [r1] + 80065e6: 63fb str r3, [r7, #60] @ 0x3c return(result); - 8005cf8: 6bfb ldr r3, [r7, #60] @ 0x3c - 8005cfa: 2b00 cmp r3, #0 - 8005cfc: d1e3 bne.n 8005cc6 + 80065e8: 6bfb ldr r3, [r7, #60] @ 0x3c + 80065ea: 2b00 cmp r3, #0 + 80065ec: d1e3 bne.n 80065b6 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005cfe: 687b ldr r3, [r7, #4] - 8005d00: 681b ldr r3, [r3, #0] - 8005d02: 3314 adds r3, #20 - 8005d04: 627b str r3, [r7, #36] @ 0x24 + 80065ee: 687b ldr r3, [r7, #4] + 80065f0: 681b ldr r3, [r3, #0] + 80065f2: 3314 adds r3, #20 + 80065f4: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005d06: 6a7b ldr r3, [r7, #36] @ 0x24 - 8005d08: e853 3f00 ldrex r3, [r3] - 8005d0c: 623b str r3, [r7, #32] + 80065f6: 6a7b ldr r3, [r7, #36] @ 0x24 + 80065f8: e853 3f00 ldrex r3, [r3] + 80065fc: 623b str r3, [r7, #32] return(result); - 8005d0e: 6a3b ldr r3, [r7, #32] - 8005d10: f023 0301 bic.w r3, r3, #1 - 8005d14: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 - 8005d18: 687b ldr r3, [r7, #4] - 8005d1a: 681b ldr r3, [r3, #0] - 8005d1c: 3314 adds r3, #20 - 8005d1e: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 - 8005d22: 633a str r2, [r7, #48] @ 0x30 - 8005d24: 62fb str r3, [r7, #44] @ 0x2c + 80065fe: 6a3b ldr r3, [r7, #32] + 8006600: f023 0301 bic.w r3, r3, #1 + 8006604: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4 + 8006608: 687b ldr r3, [r7, #4] + 800660a: 681b ldr r3, [r3, #0] + 800660c: 3314 adds r3, #20 + 800660e: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4 + 8006612: 633a str r2, [r7, #48] @ 0x30 + 8006614: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005d26: 6af9 ldr r1, [r7, #44] @ 0x2c - 8005d28: 6b3a ldr r2, [r7, #48] @ 0x30 - 8005d2a: e841 2300 strex r3, r2, [r1] - 8005d2e: 62bb str r3, [r7, #40] @ 0x28 + 8006616: 6af9 ldr r1, [r7, #44] @ 0x2c + 8006618: 6b3a ldr r2, [r7, #48] @ 0x30 + 800661a: e841 2300 strex r3, r2, [r1] + 800661e: 62bb str r3, [r7, #40] @ 0x28 return(result); - 8005d30: 6abb ldr r3, [r7, #40] @ 0x28 - 8005d32: 2b00 cmp r3, #0 - 8005d34: d1e3 bne.n 8005cfe + 8006620: 6abb ldr r3, [r7, #40] @ 0x28 + 8006622: 2b00 cmp r3, #0 + 8006624: d1e3 bne.n 80065ee /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8005d36: 687b ldr r3, [r7, #4] - 8005d38: 2220 movs r2, #32 - 8005d3a: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8006626: 687b ldr r3, [r7, #4] + 8006628: 2220 movs r2, #32 + 800662a: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005d3e: 687b ldr r3, [r7, #4] - 8005d40: 2200 movs r2, #0 - 8005d42: 631a str r2, [r3, #48] @ 0x30 + 800662e: 687b ldr r3, [r7, #4] + 8006630: 2200 movs r2, #0 + 8006632: 631a str r2, [r3, #48] @ 0x30 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005d44: 687b ldr r3, [r7, #4] - 8005d46: 681b ldr r3, [r3, #0] - 8005d48: 330c adds r3, #12 - 8005d4a: 613b str r3, [r7, #16] + 8006634: 687b ldr r3, [r7, #4] + 8006636: 681b ldr r3, [r3, #0] + 8006638: 330c adds r3, #12 + 800663a: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005d4c: 693b ldr r3, [r7, #16] - 8005d4e: e853 3f00 ldrex r3, [r3] - 8005d52: 60fb str r3, [r7, #12] + 800663c: 693b ldr r3, [r7, #16] + 800663e: e853 3f00 ldrex r3, [r3] + 8006642: 60fb str r3, [r7, #12] return(result); - 8005d54: 68fb ldr r3, [r7, #12] - 8005d56: f023 0310 bic.w r3, r3, #16 - 8005d5a: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 - 8005d5e: 687b ldr r3, [r7, #4] - 8005d60: 681b ldr r3, [r3, #0] - 8005d62: 330c adds r3, #12 - 8005d64: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 - 8005d68: 61fa str r2, [r7, #28] - 8005d6a: 61bb str r3, [r7, #24] + 8006644: 68fb ldr r3, [r7, #12] + 8006646: f023 0310 bic.w r3, r3, #16 + 800664a: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 + 800664e: 687b ldr r3, [r7, #4] + 8006650: 681b ldr r3, [r3, #0] + 8006652: 330c adds r3, #12 + 8006654: f8d7 20c0 ldr.w r2, [r7, #192] @ 0xc0 + 8006658: 61fa str r2, [r7, #28] + 800665a: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005d6c: 69b9 ldr r1, [r7, #24] - 8005d6e: 69fa ldr r2, [r7, #28] - 8005d70: e841 2300 strex r3, r2, [r1] - 8005d74: 617b str r3, [r7, #20] + 800665c: 69b9 ldr r1, [r7, #24] + 800665e: 69fa ldr r2, [r7, #28] + 8006660: e841 2300 strex r3, r2, [r1] + 8006664: 617b str r3, [r7, #20] return(result); - 8005d76: 697b ldr r3, [r7, #20] - 8005d78: 2b00 cmp r3, #0 - 8005d7a: d1e3 bne.n 8005d44 + 8006666: 697b ldr r3, [r7, #20] + 8006668: 2b00 cmp r3, #0 + 800666a: d1e3 bne.n 8006634 /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 8005d7c: 687b ldr r3, [r7, #4] - 8005d7e: 2202 movs r2, #2 - 8005d80: 635a str r2, [r3, #52] @ 0x34 + 800666c: 687b ldr r3, [r7, #4] + 800666e: 2202 movs r2, #2 + 8006670: 635a str r2, [r3, #52] @ 0x34 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); - 8005d82: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce - 8005d86: 4619 mov r1, r3 - 8005d88: 6878 ldr r0, [r7, #4] - 8005d8a: f000 f844 bl 8005e16 + 8006672: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce + 8006676: 4619 mov r1, r3 + 8006678: 6878 ldr r0, [r7, #4] + 800667a: f000 f844 bl 8006706 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return; - 8005d8e: e023 b.n 8005dd8 + 800667e: e023 b.n 80066c8 } } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET)) - 8005d90: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005d94: f003 0380 and.w r3, r3, #128 @ 0x80 - 8005d98: 2b00 cmp r3, #0 - 8005d9a: d009 beq.n 8005db0 - 8005d9c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005da0: f003 0380 and.w r3, r3, #128 @ 0x80 - 8005da4: 2b00 cmp r3, #0 - 8005da6: d003 beq.n 8005db0 + 8006680: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 8006684: f003 0380 and.w r3, r3, #128 @ 0x80 + 8006688: 2b00 cmp r3, #0 + 800668a: d009 beq.n 80066a0 + 800668c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 8006690: f003 0380 and.w r3, r3, #128 @ 0x80 + 8006694: 2b00 cmp r3, #0 + 8006696: d003 beq.n 80066a0 { UART_Transmit_IT(huart); - 8005da8: 6878 ldr r0, [r7, #4] - 8005daa: f000 f90e bl 8005fca + 8006698: 6878 ldr r0, [r7, #4] + 800669a: f000 f90e bl 80068ba return; - 8005dae: e014 b.n 8005dda + 800669e: e014 b.n 80066ca } /* UART in mode Transmitter end --------------------------------------------*/ if (((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET)) - 8005db0: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 - 8005db4: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005db8: 2b00 cmp r3, #0 - 8005dba: d00e beq.n 8005dda - 8005dbc: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 - 8005dc0: f003 0340 and.w r3, r3, #64 @ 0x40 - 8005dc4: 2b00 cmp r3, #0 - 8005dc6: d008 beq.n 8005dda + 80066a0: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4 + 80066a4: f003 0340 and.w r3, r3, #64 @ 0x40 + 80066a8: 2b00 cmp r3, #0 + 80066aa: d00e beq.n 80066ca + 80066ac: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0 + 80066b0: f003 0340 and.w r3, r3, #64 @ 0x40 + 80066b4: 2b00 cmp r3, #0 + 80066b6: d008 beq.n 80066ca { UART_EndTransmit_IT(huart); - 8005dc8: 6878 ldr r0, [r7, #4] - 8005dca: f000 f94d bl 8006068 + 80066b8: 6878 ldr r0, [r7, #4] + 80066ba: f000 f94d bl 8006958 return; - 8005dce: e004 b.n 8005dda + 80066be: e004 b.n 80066ca return; - 8005dd0: bf00 nop - 8005dd2: e002 b.n 8005dda + 80066c0: bf00 nop + 80066c2: e002 b.n 80066ca return; - 8005dd4: bf00 nop - 8005dd6: e000 b.n 8005dda + 80066c4: bf00 nop + 80066c6: e000 b.n 80066ca return; - 8005dd8: bf00 nop + 80066c8: bf00 nop } } - 8005dda: 37e8 adds r7, #232 @ 0xe8 - 8005ddc: 46bd mov sp, r7 - 8005dde: bd80 pop {r7, pc} + 80066ca: 37e8 adds r7, #232 @ 0xe8 + 80066cc: 46bd mov sp, r7 + 80066ce: bd80 pop {r7, pc} -08005de0 : +080066d0 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { - 8005de0: b480 push {r7} - 8005de2: b083 sub sp, #12 - 8005de4: af00 add r7, sp, #0 - 8005de6: 6078 str r0, [r7, #4] + 80066d0: b480 push {r7} + 80066d2: b083 sub sp, #12 + 80066d4: af00 add r7, sp, #0 + 80066d6: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_TxCpltCallback could be implemented in the user file */ } - 8005de8: bf00 nop - 8005dea: 370c adds r7, #12 - 8005dec: 46bd mov sp, r7 - 8005dee: bc80 pop {r7} - 8005df0: 4770 bx lr + 80066d8: bf00 nop + 80066da: 370c adds r7, #12 + 80066dc: 46bd mov sp, r7 + 80066de: bc80 pop {r7} + 80066e0: 4770 bx lr -08005df2 : +080066e2 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { - 8005df2: b480 push {r7} - 8005df4: b083 sub sp, #12 - 8005df6: af00 add r7, sp, #0 - 8005df8: 6078 str r0, [r7, #4] + 80066e2: b480 push {r7} + 80066e4: b083 sub sp, #12 + 80066e6: af00 add r7, sp, #0 + 80066e8: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxCpltCallback could be implemented in the user file */ } - 8005dfa: bf00 nop - 8005dfc: 370c adds r7, #12 - 8005dfe: 46bd mov sp, r7 - 8005e00: bc80 pop {r7} - 8005e02: 4770 bx lr + 80066ea: bf00 nop + 80066ec: 370c adds r7, #12 + 80066ee: 46bd mov sp, r7 + 80066f0: bc80 pop {r7} + 80066f2: 4770 bx lr -08005e04 : +080066f4 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { - 8005e04: b480 push {r7} - 8005e06: b083 sub sp, #12 - 8005e08: af00 add r7, sp, #0 - 8005e0a: 6078 str r0, [r7, #4] + 80066f4: b480 push {r7} + 80066f6: b083 sub sp, #12 + 80066f8: af00 add r7, sp, #0 + 80066fa: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback could be implemented in the user file */ } - 8005e0c: bf00 nop - 8005e0e: 370c adds r7, #12 - 8005e10: 46bd mov sp, r7 - 8005e12: bc80 pop {r7} - 8005e14: 4770 bx lr + 80066fc: bf00 nop + 80066fe: 370c adds r7, #12 + 8006700: 46bd mov sp, r7 + 8006702: bc80 pop {r7} + 8006704: 4770 bx lr -08005e16 : +08006706 : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { - 8005e16: b480 push {r7} - 8005e18: b083 sub sp, #12 - 8005e1a: af00 add r7, sp, #0 - 8005e1c: 6078 str r0, [r7, #4] - 8005e1e: 460b mov r3, r1 - 8005e20: 807b strh r3, [r7, #2] + 8006706: b480 push {r7} + 8006708: b083 sub sp, #12 + 800670a: af00 add r7, sp, #0 + 800670c: 6078 str r0, [r7, #4] + 800670e: 460b mov r3, r1 + 8006710: 807b strh r3, [r7, #2] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } - 8005e22: bf00 nop - 8005e24: 370c adds r7, #12 - 8005e26: 46bd mov sp, r7 - 8005e28: bc80 pop {r7} - 8005e2a: 4770 bx lr + 8006712: bf00 nop + 8006714: 370c adds r7, #12 + 8006716: 46bd mov sp, r7 + 8006718: bc80 pop {r7} + 800671a: 4770 bx lr -08005e2c : +0800671c : * @param Timeout Timeout duration * @retval HAL status */ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 8005e2c: b580 push {r7, lr} - 8005e2e: b086 sub sp, #24 - 8005e30: af00 add r7, sp, #0 - 8005e32: 60f8 str r0, [r7, #12] - 8005e34: 60b9 str r1, [r7, #8] - 8005e36: 603b str r3, [r7, #0] - 8005e38: 4613 mov r3, r2 - 8005e3a: 71fb strb r3, [r7, #7] + 800671c: b580 push {r7, lr} + 800671e: b086 sub sp, #24 + 8006720: af00 add r7, sp, #0 + 8006722: 60f8 str r0, [r7, #12] + 8006724: 60b9 str r1, [r7, #8] + 8006726: 603b str r3, [r7, #0] + 8006728: 4613 mov r3, r2 + 800672a: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8005e3c: e03b b.n 8005eb6 + 800672c: e03b b.n 80067a6 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 8005e3e: 6a3b ldr r3, [r7, #32] - 8005e40: f1b3 3fff cmp.w r3, #4294967295 - 8005e44: d037 beq.n 8005eb6 + 800672e: 6a3b ldr r3, [r7, #32] + 8006730: f1b3 3fff cmp.w r3, #4294967295 + 8006734: d037 beq.n 80067a6 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 8005e46: f7fc fda3 bl 8002990 - 8005e4a: 4602 mov r2, r0 - 8005e4c: 683b ldr r3, [r7, #0] - 8005e4e: 1ad3 subs r3, r2, r3 - 8005e50: 6a3a ldr r2, [r7, #32] - 8005e52: 429a cmp r2, r3 - 8005e54: d302 bcc.n 8005e5c - 8005e56: 6a3b ldr r3, [r7, #32] - 8005e58: 2b00 cmp r3, #0 - 8005e5a: d101 bne.n 8005e60 + 8006736: f7fc fda3 bl 8003280 + 800673a: 4602 mov r2, r0 + 800673c: 683b ldr r3, [r7, #0] + 800673e: 1ad3 subs r3, r2, r3 + 8006740: 6a3a ldr r2, [r7, #32] + 8006742: 429a cmp r2, r3 + 8006744: d302 bcc.n 800674c + 8006746: 6a3b ldr r3, [r7, #32] + 8006748: 2b00 cmp r3, #0 + 800674a: d101 bne.n 8006750 { return HAL_TIMEOUT; - 8005e5c: 2303 movs r3, #3 - 8005e5e: e03a b.n 8005ed6 + 800674c: 2303 movs r3, #3 + 800674e: e03a b.n 80067c6 } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) - 8005e60: 68fb ldr r3, [r7, #12] - 8005e62: 681b ldr r3, [r3, #0] - 8005e64: 68db ldr r3, [r3, #12] - 8005e66: f003 0304 and.w r3, r3, #4 - 8005e6a: 2b00 cmp r3, #0 - 8005e6c: d023 beq.n 8005eb6 - 8005e6e: 68bb ldr r3, [r7, #8] - 8005e70: 2b80 cmp r3, #128 @ 0x80 - 8005e72: d020 beq.n 8005eb6 - 8005e74: 68bb ldr r3, [r7, #8] - 8005e76: 2b40 cmp r3, #64 @ 0x40 - 8005e78: d01d beq.n 8005eb6 + 8006750: 68fb ldr r3, [r7, #12] + 8006752: 681b ldr r3, [r3, #0] + 8006754: 68db ldr r3, [r3, #12] + 8006756: f003 0304 and.w r3, r3, #4 + 800675a: 2b00 cmp r3, #0 + 800675c: d023 beq.n 80067a6 + 800675e: 68bb ldr r3, [r7, #8] + 8006760: 2b80 cmp r3, #128 @ 0x80 + 8006762: d020 beq.n 80067a6 + 8006764: 68bb ldr r3, [r7, #8] + 8006766: 2b40 cmp r3, #64 @ 0x40 + 8006768: d01d beq.n 80067a6 { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) - 8005e7a: 68fb ldr r3, [r7, #12] - 8005e7c: 681b ldr r3, [r3, #0] - 8005e7e: 681b ldr r3, [r3, #0] - 8005e80: f003 0308 and.w r3, r3, #8 - 8005e84: 2b08 cmp r3, #8 - 8005e86: d116 bne.n 8005eb6 + 800676a: 68fb ldr r3, [r7, #12] + 800676c: 681b ldr r3, [r3, #0] + 800676e: 681b ldr r3, [r3, #0] + 8006770: f003 0308 and.w r3, r3, #8 + 8006774: 2b08 cmp r3, #8 + 8006776: d116 bne.n 80067a6 { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_OREFLAG(huart); - 8005e88: 2300 movs r3, #0 - 8005e8a: 617b str r3, [r7, #20] - 8005e8c: 68fb ldr r3, [r7, #12] - 8005e8e: 681b ldr r3, [r3, #0] - 8005e90: 681b ldr r3, [r3, #0] - 8005e92: 617b str r3, [r7, #20] - 8005e94: 68fb ldr r3, [r7, #12] - 8005e96: 681b ldr r3, [r3, #0] - 8005e98: 685b ldr r3, [r3, #4] - 8005e9a: 617b str r3, [r7, #20] - 8005e9c: 697b ldr r3, [r7, #20] + 8006778: 2300 movs r3, #0 + 800677a: 617b str r3, [r7, #20] + 800677c: 68fb ldr r3, [r7, #12] + 800677e: 681b ldr r3, [r3, #0] + 8006780: 681b ldr r3, [r3, #0] + 8006782: 617b str r3, [r7, #20] + 8006784: 68fb ldr r3, [r7, #12] + 8006786: 681b ldr r3, [r3, #0] + 8006788: 685b ldr r3, [r3, #4] + 800678a: 617b str r3, [r7, #20] + 800678c: 697b ldr r3, [r7, #20] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); - 8005e9e: 68f8 ldr r0, [r7, #12] - 8005ea0: f000 f81d bl 8005ede + 800678e: 68f8 ldr r0, [r7, #12] + 8006790: f000 f81d bl 80067ce huart->ErrorCode = HAL_UART_ERROR_ORE; - 8005ea4: 68fb ldr r3, [r7, #12] - 8005ea6: 2208 movs r2, #8 - 8005ea8: 645a str r2, [r3, #68] @ 0x44 + 8006794: 68fb ldr r3, [r7, #12] + 8006796: 2208 movs r2, #8 + 8006798: 645a str r2, [r3, #68] @ 0x44 /* Process Unlocked */ __HAL_UNLOCK(huart); - 8005eaa: 68fb ldr r3, [r7, #12] - 8005eac: 2200 movs r2, #0 - 8005eae: f883 2040 strb.w r2, [r3, #64] @ 0x40 + 800679a: 68fb ldr r3, [r7, #12] + 800679c: 2200 movs r2, #0 + 800679e: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; - 8005eb2: 2301 movs r3, #1 - 8005eb4: e00f b.n 8005ed6 + 80067a2: 2301 movs r3, #1 + 80067a4: e00f b.n 80067c6 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8005eb6: 68fb ldr r3, [r7, #12] - 8005eb8: 681b ldr r3, [r3, #0] - 8005eba: 681a ldr r2, [r3, #0] - 8005ebc: 68bb ldr r3, [r7, #8] - 8005ebe: 4013 ands r3, r2 - 8005ec0: 68ba ldr r2, [r7, #8] - 8005ec2: 429a cmp r2, r3 - 8005ec4: bf0c ite eq - 8005ec6: 2301 moveq r3, #1 - 8005ec8: 2300 movne r3, #0 - 8005eca: b2db uxtb r3, r3 - 8005ecc: 461a mov r2, r3 - 8005ece: 79fb ldrb r3, [r7, #7] - 8005ed0: 429a cmp r2, r3 - 8005ed2: d0b4 beq.n 8005e3e + 80067a6: 68fb ldr r3, [r7, #12] + 80067a8: 681b ldr r3, [r3, #0] + 80067aa: 681a ldr r2, [r3, #0] + 80067ac: 68bb ldr r3, [r7, #8] + 80067ae: 4013 ands r3, r2 + 80067b0: 68ba ldr r2, [r7, #8] + 80067b2: 429a cmp r2, r3 + 80067b4: bf0c ite eq + 80067b6: 2301 moveq r3, #1 + 80067b8: 2300 movne r3, #0 + 80067ba: b2db uxtb r3, r3 + 80067bc: 461a mov r2, r3 + 80067be: 79fb ldrb r3, [r7, #7] + 80067c0: 429a cmp r2, r3 + 80067c2: d0b4 beq.n 800672e } } } } return HAL_OK; - 8005ed4: 2300 movs r3, #0 + 80067c4: 2300 movs r3, #0 } - 8005ed6: 4618 mov r0, r3 - 8005ed8: 3718 adds r7, #24 - 8005eda: 46bd mov sp, r7 - 8005edc: bd80 pop {r7, pc} + 80067c6: 4618 mov r0, r3 + 80067c8: 3718 adds r7, #24 + 80067ca: 46bd mov sp, r7 + 80067cc: bd80 pop {r7, pc} -08005ede : +080067ce : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 8005ede: b480 push {r7} - 8005ee0: b095 sub sp, #84 @ 0x54 - 8005ee2: af00 add r7, sp, #0 - 8005ee4: 6078 str r0, [r7, #4] + 80067ce: b480 push {r7} + 80067d0: b095 sub sp, #84 @ 0x54 + 80067d2: af00 add r7, sp, #0 + 80067d4: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8005ee6: 687b ldr r3, [r7, #4] - 8005ee8: 681b ldr r3, [r3, #0] - 8005eea: 330c adds r3, #12 - 8005eec: 637b str r3, [r7, #52] @ 0x34 + 80067d6: 687b ldr r3, [r7, #4] + 80067d8: 681b ldr r3, [r3, #0] + 80067da: 330c adds r3, #12 + 80067dc: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005eee: 6b7b ldr r3, [r7, #52] @ 0x34 - 8005ef0: e853 3f00 ldrex r3, [r3] - 8005ef4: 633b str r3, [r7, #48] @ 0x30 + 80067de: 6b7b ldr r3, [r7, #52] @ 0x34 + 80067e0: e853 3f00 ldrex r3, [r3] + 80067e4: 633b str r3, [r7, #48] @ 0x30 return(result); - 8005ef6: 6b3b ldr r3, [r7, #48] @ 0x30 - 8005ef8: f423 7390 bic.w r3, r3, #288 @ 0x120 - 8005efc: 64fb str r3, [r7, #76] @ 0x4c - 8005efe: 687b ldr r3, [r7, #4] - 8005f00: 681b ldr r3, [r3, #0] - 8005f02: 330c adds r3, #12 - 8005f04: 6cfa ldr r2, [r7, #76] @ 0x4c - 8005f06: 643a str r2, [r7, #64] @ 0x40 - 8005f08: 63fb str r3, [r7, #60] @ 0x3c + 80067e6: 6b3b ldr r3, [r7, #48] @ 0x30 + 80067e8: f423 7390 bic.w r3, r3, #288 @ 0x120 + 80067ec: 64fb str r3, [r7, #76] @ 0x4c + 80067ee: 687b ldr r3, [r7, #4] + 80067f0: 681b ldr r3, [r3, #0] + 80067f2: 330c adds r3, #12 + 80067f4: 6cfa ldr r2, [r7, #76] @ 0x4c + 80067f6: 643a str r2, [r7, #64] @ 0x40 + 80067f8: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005f0a: 6bf9 ldr r1, [r7, #60] @ 0x3c - 8005f0c: 6c3a ldr r2, [r7, #64] @ 0x40 - 8005f0e: e841 2300 strex r3, r2, [r1] - 8005f12: 63bb str r3, [r7, #56] @ 0x38 + 80067fa: 6bf9 ldr r1, [r7, #60] @ 0x3c + 80067fc: 6c3a ldr r2, [r7, #64] @ 0x40 + 80067fe: e841 2300 strex r3, r2, [r1] + 8006802: 63bb str r3, [r7, #56] @ 0x38 return(result); - 8005f14: 6bbb ldr r3, [r7, #56] @ 0x38 - 8005f16: 2b00 cmp r3, #0 - 8005f18: d1e5 bne.n 8005ee6 + 8006804: 6bbb ldr r3, [r7, #56] @ 0x38 + 8006806: 2b00 cmp r3, #0 + 8006808: d1e5 bne.n 80067d6 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8005f1a: 687b ldr r3, [r7, #4] - 8005f1c: 681b ldr r3, [r3, #0] - 8005f1e: 3314 adds r3, #20 - 8005f20: 623b str r3, [r7, #32] + 800680a: 687b ldr r3, [r7, #4] + 800680c: 681b ldr r3, [r3, #0] + 800680e: 3314 adds r3, #20 + 8006810: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005f22: 6a3b ldr r3, [r7, #32] - 8005f24: e853 3f00 ldrex r3, [r3] - 8005f28: 61fb str r3, [r7, #28] + 8006812: 6a3b ldr r3, [r7, #32] + 8006814: e853 3f00 ldrex r3, [r3] + 8006818: 61fb str r3, [r7, #28] return(result); - 8005f2a: 69fb ldr r3, [r7, #28] - 8005f2c: f023 0301 bic.w r3, r3, #1 - 8005f30: 64bb str r3, [r7, #72] @ 0x48 - 8005f32: 687b ldr r3, [r7, #4] - 8005f34: 681b ldr r3, [r3, #0] - 8005f36: 3314 adds r3, #20 - 8005f38: 6cba ldr r2, [r7, #72] @ 0x48 - 8005f3a: 62fa str r2, [r7, #44] @ 0x2c - 8005f3c: 62bb str r3, [r7, #40] @ 0x28 + 800681a: 69fb ldr r3, [r7, #28] + 800681c: f023 0301 bic.w r3, r3, #1 + 8006820: 64bb str r3, [r7, #72] @ 0x48 + 8006822: 687b ldr r3, [r7, #4] + 8006824: 681b ldr r3, [r3, #0] + 8006826: 3314 adds r3, #20 + 8006828: 6cba ldr r2, [r7, #72] @ 0x48 + 800682a: 62fa str r2, [r7, #44] @ 0x2c + 800682c: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005f3e: 6ab9 ldr r1, [r7, #40] @ 0x28 - 8005f40: 6afa ldr r2, [r7, #44] @ 0x2c - 8005f42: e841 2300 strex r3, r2, [r1] - 8005f46: 627b str r3, [r7, #36] @ 0x24 + 800682e: 6ab9 ldr r1, [r7, #40] @ 0x28 + 8006830: 6afa ldr r2, [r7, #44] @ 0x2c + 8006832: e841 2300 strex r3, r2, [r1] + 8006836: 627b str r3, [r7, #36] @ 0x24 return(result); - 8005f48: 6a7b ldr r3, [r7, #36] @ 0x24 - 8005f4a: 2b00 cmp r3, #0 - 8005f4c: d1e5 bne.n 8005f1a + 8006838: 6a7b ldr r3, [r7, #36] @ 0x24 + 800683a: 2b00 cmp r3, #0 + 800683c: d1e5 bne.n 800680a /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8005f4e: 687b ldr r3, [r7, #4] - 8005f50: 6b1b ldr r3, [r3, #48] @ 0x30 - 8005f52: 2b01 cmp r3, #1 - 8005f54: d119 bne.n 8005f8a + 800683e: 687b ldr r3, [r7, #4] + 8006840: 6b1b ldr r3, [r3, #48] @ 0x30 + 8006842: 2b01 cmp r3, #1 + 8006844: d119 bne.n 800687a { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8005f56: 687b ldr r3, [r7, #4] - 8005f58: 681b ldr r3, [r3, #0] - 8005f5a: 330c adds r3, #12 - 8005f5c: 60fb str r3, [r7, #12] + 8006846: 687b ldr r3, [r7, #4] + 8006848: 681b ldr r3, [r3, #0] + 800684a: 330c adds r3, #12 + 800684c: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 8005f5e: 68fb ldr r3, [r7, #12] - 8005f60: e853 3f00 ldrex r3, [r3] - 8005f64: 60bb str r3, [r7, #8] + 800684e: 68fb ldr r3, [r7, #12] + 8006850: e853 3f00 ldrex r3, [r3] + 8006854: 60bb str r3, [r7, #8] return(result); - 8005f66: 68bb ldr r3, [r7, #8] - 8005f68: f023 0310 bic.w r3, r3, #16 - 8005f6c: 647b str r3, [r7, #68] @ 0x44 - 8005f6e: 687b ldr r3, [r7, #4] - 8005f70: 681b ldr r3, [r3, #0] - 8005f72: 330c adds r3, #12 - 8005f74: 6c7a ldr r2, [r7, #68] @ 0x44 - 8005f76: 61ba str r2, [r7, #24] - 8005f78: 617b str r3, [r7, #20] + 8006856: 68bb ldr r3, [r7, #8] + 8006858: f023 0310 bic.w r3, r3, #16 + 800685c: 647b str r3, [r7, #68] @ 0x44 + 800685e: 687b ldr r3, [r7, #4] + 8006860: 681b ldr r3, [r3, #0] + 8006862: 330c adds r3, #12 + 8006864: 6c7a ldr r2, [r7, #68] @ 0x44 + 8006866: 61ba str r2, [r7, #24] + 8006868: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 8005f7a: 6979 ldr r1, [r7, #20] - 8005f7c: 69ba ldr r2, [r7, #24] - 8005f7e: e841 2300 strex r3, r2, [r1] - 8005f82: 613b str r3, [r7, #16] + 800686a: 6979 ldr r1, [r7, #20] + 800686c: 69ba ldr r2, [r7, #24] + 800686e: e841 2300 strex r3, r2, [r1] + 8006872: 613b str r3, [r7, #16] return(result); - 8005f84: 693b ldr r3, [r7, #16] - 8005f86: 2b00 cmp r3, #0 - 8005f88: d1e5 bne.n 8005f56 + 8006874: 693b ldr r3, [r7, #16] + 8006876: 2b00 cmp r3, #0 + 8006878: d1e5 bne.n 8006846 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8005f8a: 687b ldr r3, [r7, #4] - 8005f8c: 2220 movs r2, #32 - 8005f8e: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 800687a: 687b ldr r3, [r7, #4] + 800687c: 2220 movs r2, #32 + 800687e: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8005f92: 687b ldr r3, [r7, #4] - 8005f94: 2200 movs r2, #0 - 8005f96: 631a str r2, [r3, #48] @ 0x30 + 8006882: 687b ldr r3, [r7, #4] + 8006884: 2200 movs r2, #0 + 8006886: 631a str r2, [r3, #48] @ 0x30 } - 8005f98: bf00 nop - 8005f9a: 3754 adds r7, #84 @ 0x54 - 8005f9c: 46bd mov sp, r7 - 8005f9e: bc80 pop {r7} - 8005fa0: 4770 bx lr + 8006888: bf00 nop + 800688a: 3754 adds r7, #84 @ 0x54 + 800688c: 46bd mov sp, r7 + 800688e: bc80 pop {r7} + 8006890: 4770 bx lr -08005fa2 : +08006892 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - 8005fa2: b580 push {r7, lr} - 8005fa4: b084 sub sp, #16 - 8005fa6: af00 add r7, sp, #0 - 8005fa8: 6078 str r0, [r7, #4] + 8006892: b580 push {r7, lr} + 8006894: b084 sub sp, #16 + 8006896: af00 add r7, sp, #0 + 8006898: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; - 8005faa: 687b ldr r3, [r7, #4] - 8005fac: 6a5b ldr r3, [r3, #36] @ 0x24 - 8005fae: 60fb str r3, [r7, #12] + 800689a: 687b ldr r3, [r7, #4] + 800689c: 6a5b ldr r3, [r3, #36] @ 0x24 + 800689e: 60fb str r3, [r7, #12] huart->RxXferCount = 0x00U; - 8005fb0: 68fb ldr r3, [r7, #12] - 8005fb2: 2200 movs r2, #0 - 8005fb4: 85da strh r2, [r3, #46] @ 0x2e + 80068a0: 68fb ldr r3, [r7, #12] + 80068a2: 2200 movs r2, #0 + 80068a4: 85da strh r2, [r3, #46] @ 0x2e huart->TxXferCount = 0x00U; - 8005fb6: 68fb ldr r3, [r7, #12] - 8005fb8: 2200 movs r2, #0 - 8005fba: 84da strh r2, [r3, #38] @ 0x26 + 80068a6: 68fb ldr r3, [r7, #12] + 80068a8: 2200 movs r2, #0 + 80068aa: 84da strh r2, [r3, #38] @ 0x26 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8005fbc: 68f8 ldr r0, [r7, #12] - 8005fbe: f7ff ff21 bl 8005e04 + 80068ac: 68f8 ldr r0, [r7, #12] + 80068ae: f7ff ff21 bl 80066f4 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8005fc2: bf00 nop - 8005fc4: 3710 adds r7, #16 - 8005fc6: 46bd mov sp, r7 - 8005fc8: bd80 pop {r7, pc} + 80068b2: bf00 nop + 80068b4: 3710 adds r7, #16 + 80068b6: 46bd mov sp, r7 + 80068b8: bd80 pop {r7, pc} -08005fca : +080068ba : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart) { - 8005fca: b480 push {r7} - 8005fcc: b085 sub sp, #20 - 8005fce: af00 add r7, sp, #0 - 8005fd0: 6078 str r0, [r7, #4] + 80068ba: b480 push {r7} + 80068bc: b085 sub sp, #20 + 80068be: af00 add r7, sp, #0 + 80068c0: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) - 8005fd2: 687b ldr r3, [r7, #4] - 8005fd4: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 - 8005fd8: b2db uxtb r3, r3 - 8005fda: 2b21 cmp r3, #33 @ 0x21 - 8005fdc: d13e bne.n 800605c + 80068c2: 687b ldr r3, [r7, #4] + 80068c4: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 + 80068c8: b2db uxtb r3, r3 + 80068ca: 2b21 cmp r3, #33 @ 0x21 + 80068cc: d13e bne.n 800694c { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8005fde: 687b ldr r3, [r7, #4] - 8005fe0: 689b ldr r3, [r3, #8] - 8005fe2: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 8005fe6: d114 bne.n 8006012 - 8005fe8: 687b ldr r3, [r7, #4] - 8005fea: 691b ldr r3, [r3, #16] - 8005fec: 2b00 cmp r3, #0 - 8005fee: d110 bne.n 8006012 + 80068ce: 687b ldr r3, [r7, #4] + 80068d0: 689b ldr r3, [r3, #8] + 80068d2: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 80068d6: d114 bne.n 8006902 + 80068d8: 687b ldr r3, [r7, #4] + 80068da: 691b ldr r3, [r3, #16] + 80068dc: 2b00 cmp r3, #0 + 80068de: d110 bne.n 8006902 { tmp = (const uint16_t *) huart->pTxBuffPtr; - 8005ff0: 687b ldr r3, [r7, #4] - 8005ff2: 6a1b ldr r3, [r3, #32] - 8005ff4: 60fb str r3, [r7, #12] + 80068e0: 687b ldr r3, [r7, #4] + 80068e2: 6a1b ldr r3, [r3, #32] + 80068e4: 60fb str r3, [r7, #12] huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF); - 8005ff6: 68fb ldr r3, [r7, #12] - 8005ff8: 881b ldrh r3, [r3, #0] - 8005ffa: 461a mov r2, r3 - 8005ffc: 687b ldr r3, [r7, #4] - 8005ffe: 681b ldr r3, [r3, #0] - 8006000: f3c2 0208 ubfx r2, r2, #0, #9 - 8006004: 605a str r2, [r3, #4] + 80068e6: 68fb ldr r3, [r7, #12] + 80068e8: 881b ldrh r3, [r3, #0] + 80068ea: 461a mov r2, r3 + 80068ec: 687b ldr r3, [r7, #4] + 80068ee: 681b ldr r3, [r3, #0] + 80068f0: f3c2 0208 ubfx r2, r2, #0, #9 + 80068f4: 605a str r2, [r3, #4] huart->pTxBuffPtr += 2U; - 8006006: 687b ldr r3, [r7, #4] - 8006008: 6a1b ldr r3, [r3, #32] - 800600a: 1c9a adds r2, r3, #2 - 800600c: 687b ldr r3, [r7, #4] - 800600e: 621a str r2, [r3, #32] - 8006010: e008 b.n 8006024 + 80068f6: 687b ldr r3, [r7, #4] + 80068f8: 6a1b ldr r3, [r3, #32] + 80068fa: 1c9a adds r2, r3, #2 + 80068fc: 687b ldr r3, [r7, #4] + 80068fe: 621a str r2, [r3, #32] + 8006900: e008 b.n 8006914 } else { huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF); - 8006012: 687b ldr r3, [r7, #4] - 8006014: 6a1b ldr r3, [r3, #32] - 8006016: 1c59 adds r1, r3, #1 - 8006018: 687a ldr r2, [r7, #4] - 800601a: 6211 str r1, [r2, #32] - 800601c: 781a ldrb r2, [r3, #0] - 800601e: 687b ldr r3, [r7, #4] - 8006020: 681b ldr r3, [r3, #0] - 8006022: 605a str r2, [r3, #4] + 8006902: 687b ldr r3, [r7, #4] + 8006904: 6a1b ldr r3, [r3, #32] + 8006906: 1c59 adds r1, r3, #1 + 8006908: 687a ldr r2, [r7, #4] + 800690a: 6211 str r1, [r2, #32] + 800690c: 781a ldrb r2, [r3, #0] + 800690e: 687b ldr r3, [r7, #4] + 8006910: 681b ldr r3, [r3, #0] + 8006912: 605a str r2, [r3, #4] } if (--huart->TxXferCount == 0U) - 8006024: 687b ldr r3, [r7, #4] - 8006026: 8cdb ldrh r3, [r3, #38] @ 0x26 - 8006028: b29b uxth r3, r3 - 800602a: 3b01 subs r3, #1 - 800602c: b29b uxth r3, r3 - 800602e: 687a ldr r2, [r7, #4] - 8006030: 4619 mov r1, r3 - 8006032: 84d1 strh r1, [r2, #38] @ 0x26 - 8006034: 2b00 cmp r3, #0 - 8006036: d10f bne.n 8006058 + 8006914: 687b ldr r3, [r7, #4] + 8006916: 8cdb ldrh r3, [r3, #38] @ 0x26 + 8006918: b29b uxth r3, r3 + 800691a: 3b01 subs r3, #1 + 800691c: b29b uxth r3, r3 + 800691e: 687a ldr r2, [r7, #4] + 8006920: 4619 mov r1, r3 + 8006922: 84d1 strh r1, [r2, #38] @ 0x26 + 8006924: 2b00 cmp r3, #0 + 8006926: d10f bne.n 8006948 { /* Disable the UART Transmit Data Register Empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TXE); - 8006038: 687b ldr r3, [r7, #4] - 800603a: 681b ldr r3, [r3, #0] - 800603c: 68da ldr r2, [r3, #12] - 800603e: 687b ldr r3, [r7, #4] - 8006040: 681b ldr r3, [r3, #0] - 8006042: f022 0280 bic.w r2, r2, #128 @ 0x80 - 8006046: 60da str r2, [r3, #12] + 8006928: 687b ldr r3, [r7, #4] + 800692a: 681b ldr r3, [r3, #0] + 800692c: 68da ldr r2, [r3, #12] + 800692e: 687b ldr r3, [r7, #4] + 8006930: 681b ldr r3, [r3, #0] + 8006932: f022 0280 bic.w r2, r2, #128 @ 0x80 + 8006936: 60da str r2, [r3, #12] /* Enable the UART Transmit Complete Interrupt */ __HAL_UART_ENABLE_IT(huart, UART_IT_TC); - 8006048: 687b ldr r3, [r7, #4] - 800604a: 681b ldr r3, [r3, #0] - 800604c: 68da ldr r2, [r3, #12] - 800604e: 687b ldr r3, [r7, #4] - 8006050: 681b ldr r3, [r3, #0] - 8006052: f042 0240 orr.w r2, r2, #64 @ 0x40 - 8006056: 60da str r2, [r3, #12] + 8006938: 687b ldr r3, [r7, #4] + 800693a: 681b ldr r3, [r3, #0] + 800693c: 68da ldr r2, [r3, #12] + 800693e: 687b ldr r3, [r7, #4] + 8006940: 681b ldr r3, [r3, #0] + 8006942: f042 0240 orr.w r2, r2, #64 @ 0x40 + 8006946: 60da str r2, [r3, #12] } return HAL_OK; - 8006058: 2300 movs r3, #0 - 800605a: e000 b.n 800605e + 8006948: 2300 movs r3, #0 + 800694a: e000 b.n 800694e } else { return HAL_BUSY; - 800605c: 2302 movs r3, #2 + 800694c: 2302 movs r3, #2 } } - 800605e: 4618 mov r0, r3 - 8006060: 3714 adds r7, #20 - 8006062: 46bd mov sp, r7 - 8006064: bc80 pop {r7} - 8006066: 4770 bx lr + 800694e: 4618 mov r0, r3 + 8006950: 3714 adds r7, #20 + 8006952: 46bd mov sp, r7 + 8006954: bc80 pop {r7} + 8006956: 4770 bx lr -08006068 : +08006958 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart) { - 8006068: b580 push {r7, lr} - 800606a: b082 sub sp, #8 - 800606c: af00 add r7, sp, #0 - 800606e: 6078 str r0, [r7, #4] + 8006958: b580 push {r7, lr} + 800695a: b082 sub sp, #8 + 800695c: af00 add r7, sp, #0 + 800695e: 6078 str r0, [r7, #4] /* Disable the UART Transmit Complete Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_TC); - 8006070: 687b ldr r3, [r7, #4] - 8006072: 681b ldr r3, [r3, #0] - 8006074: 68da ldr r2, [r3, #12] - 8006076: 687b ldr r3, [r7, #4] - 8006078: 681b ldr r3, [r3, #0] - 800607a: f022 0240 bic.w r2, r2, #64 @ 0x40 - 800607e: 60da str r2, [r3, #12] + 8006960: 687b ldr r3, [r7, #4] + 8006962: 681b ldr r3, [r3, #0] + 8006964: 68da ldr r2, [r3, #12] + 8006966: 687b ldr r3, [r7, #4] + 8006968: 681b ldr r3, [r3, #0] + 800696a: f022 0240 bic.w r2, r2, #64 @ 0x40 + 800696e: 60da str r2, [r3, #12] /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8006080: 687b ldr r3, [r7, #4] - 8006082: 2220 movs r2, #32 - 8006084: f883 2041 strb.w r2, [r3, #65] @ 0x41 + 8006970: 687b ldr r3, [r7, #4] + 8006972: 2220 movs r2, #32 + 8006974: f883 2041 strb.w r2, [r3, #65] @ 0x41 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); - 8006088: 6878 ldr r0, [r7, #4] - 800608a: f7ff fea9 bl 8005de0 + 8006978: 6878 ldr r0, [r7, #4] + 800697a: f7ff fea9 bl 80066d0 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return HAL_OK; - 800608e: 2300 movs r3, #0 + 800697e: 2300 movs r3, #0 } - 8006090: 4618 mov r0, r3 - 8006092: 3708 adds r7, #8 - 8006094: 46bd mov sp, r7 - 8006096: bd80 pop {r7, pc} + 8006980: 4618 mov r0, r3 + 8006982: 3708 adds r7, #8 + 8006984: 46bd mov sp, r7 + 8006986: bd80 pop {r7, pc} -08006098 : +08006988 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart) { - 8006098: b580 push {r7, lr} - 800609a: b08c sub sp, #48 @ 0x30 - 800609c: af00 add r7, sp, #0 - 800609e: 6078 str r0, [r7, #4] + 8006988: b580 push {r7, lr} + 800698a: b08c sub sp, #48 @ 0x30 + 800698c: af00 add r7, sp, #0 + 800698e: 6078 str r0, [r7, #4] uint8_t *pdata8bits; uint16_t *pdata16bits; /* Check that a Rx process is ongoing */ if (huart->RxState == HAL_UART_STATE_BUSY_RX) - 80060a0: 687b ldr r3, [r7, #4] - 80060a2: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 - 80060a6: b2db uxtb r3, r3 - 80060a8: 2b22 cmp r3, #34 @ 0x22 - 80060aa: f040 80ae bne.w 800620a + 8006990: 687b ldr r3, [r7, #4] + 8006992: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 + 8006996: b2db uxtb r3, r3 + 8006998: 2b22 cmp r3, #34 @ 0x22 + 800699a: f040 80ae bne.w 8006afa { if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 80060ae: 687b ldr r3, [r7, #4] - 80060b0: 689b ldr r3, [r3, #8] - 80060b2: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 80060b6: d117 bne.n 80060e8 - 80060b8: 687b ldr r3, [r7, #4] - 80060ba: 691b ldr r3, [r3, #16] - 80060bc: 2b00 cmp r3, #0 - 80060be: d113 bne.n 80060e8 + 800699e: 687b ldr r3, [r7, #4] + 80069a0: 689b ldr r3, [r3, #8] + 80069a2: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 80069a6: d117 bne.n 80069d8 + 80069a8: 687b ldr r3, [r7, #4] + 80069aa: 691b ldr r3, [r3, #16] + 80069ac: 2b00 cmp r3, #0 + 80069ae: d113 bne.n 80069d8 { pdata8bits = NULL; - 80060c0: 2300 movs r3, #0 - 80060c2: 62fb str r3, [r7, #44] @ 0x2c + 80069b0: 2300 movs r3, #0 + 80069b2: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = (uint16_t *) huart->pRxBuffPtr; - 80060c4: 687b ldr r3, [r7, #4] - 80060c6: 6a9b ldr r3, [r3, #40] @ 0x28 - 80060c8: 62bb str r3, [r7, #40] @ 0x28 + 80069b4: 687b ldr r3, [r7, #4] + 80069b6: 6a9b ldr r3, [r3, #40] @ 0x28 + 80069b8: 62bb str r3, [r7, #40] @ 0x28 *pdata16bits = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF); - 80060ca: 687b ldr r3, [r7, #4] - 80060cc: 681b ldr r3, [r3, #0] - 80060ce: 685b ldr r3, [r3, #4] - 80060d0: b29b uxth r3, r3 - 80060d2: f3c3 0308 ubfx r3, r3, #0, #9 - 80060d6: b29a uxth r2, r3 - 80060d8: 6abb ldr r3, [r7, #40] @ 0x28 - 80060da: 801a strh r2, [r3, #0] + 80069ba: 687b ldr r3, [r7, #4] + 80069bc: 681b ldr r3, [r3, #0] + 80069be: 685b ldr r3, [r3, #4] + 80069c0: b29b uxth r3, r3 + 80069c2: f3c3 0308 ubfx r3, r3, #0, #9 + 80069c6: b29a uxth r2, r3 + 80069c8: 6abb ldr r3, [r7, #40] @ 0x28 + 80069ca: 801a strh r2, [r3, #0] huart->pRxBuffPtr += 2U; - 80060dc: 687b ldr r3, [r7, #4] - 80060de: 6a9b ldr r3, [r3, #40] @ 0x28 - 80060e0: 1c9a adds r2, r3, #2 - 80060e2: 687b ldr r3, [r7, #4] - 80060e4: 629a str r2, [r3, #40] @ 0x28 - 80060e6: e026 b.n 8006136 + 80069cc: 687b ldr r3, [r7, #4] + 80069ce: 6a9b ldr r3, [r3, #40] @ 0x28 + 80069d0: 1c9a adds r2, r3, #2 + 80069d2: 687b ldr r3, [r7, #4] + 80069d4: 629a str r2, [r3, #40] @ 0x28 + 80069d6: e026 b.n 8006a26 } else { pdata8bits = (uint8_t *) huart->pRxBuffPtr; - 80060e8: 687b ldr r3, [r7, #4] - 80060ea: 6a9b ldr r3, [r3, #40] @ 0x28 - 80060ec: 62fb str r3, [r7, #44] @ 0x2c + 80069d8: 687b ldr r3, [r7, #4] + 80069da: 6a9b ldr r3, [r3, #40] @ 0x28 + 80069dc: 62fb str r3, [r7, #44] @ 0x2c pdata16bits = NULL; - 80060ee: 2300 movs r3, #0 - 80060f0: 62bb str r3, [r7, #40] @ 0x28 + 80069de: 2300 movs r3, #0 + 80069e0: 62bb str r3, [r7, #40] @ 0x28 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) || ((huart->Init.WordLength == UART_WORDLENGTH_8B) && (huart->Init.Parity == UART_PARITY_NONE))) - 80060f2: 687b ldr r3, [r7, #4] - 80060f4: 689b ldr r3, [r3, #8] - 80060f6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 - 80060fa: d007 beq.n 800610c - 80060fc: 687b ldr r3, [r7, #4] - 80060fe: 689b ldr r3, [r3, #8] - 8006100: 2b00 cmp r3, #0 - 8006102: d10a bne.n 800611a - 8006104: 687b ldr r3, [r7, #4] - 8006106: 691b ldr r3, [r3, #16] - 8006108: 2b00 cmp r3, #0 - 800610a: d106 bne.n 800611a + 80069e2: 687b ldr r3, [r7, #4] + 80069e4: 689b ldr r3, [r3, #8] + 80069e6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 + 80069ea: d007 beq.n 80069fc + 80069ec: 687b ldr r3, [r7, #4] + 80069ee: 689b ldr r3, [r3, #8] + 80069f0: 2b00 cmp r3, #0 + 80069f2: d10a bne.n 8006a0a + 80069f4: 687b ldr r3, [r7, #4] + 80069f6: 691b ldr r3, [r3, #16] + 80069f8: 2b00 cmp r3, #0 + 80069fa: d106 bne.n 8006a0a { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF); - 800610c: 687b ldr r3, [r7, #4] - 800610e: 681b ldr r3, [r3, #0] - 8006110: 685b ldr r3, [r3, #4] - 8006112: b2da uxtb r2, r3 - 8006114: 6afb ldr r3, [r7, #44] @ 0x2c - 8006116: 701a strb r2, [r3, #0] - 8006118: e008 b.n 800612c + 80069fc: 687b ldr r3, [r7, #4] + 80069fe: 681b ldr r3, [r3, #0] + 8006a00: 685b ldr r3, [r3, #4] + 8006a02: b2da uxtb r2, r3 + 8006a04: 6afb ldr r3, [r7, #44] @ 0x2c + 8006a06: 701a strb r2, [r3, #0] + 8006a08: e008 b.n 8006a1c } else { *pdata8bits = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F); - 800611a: 687b ldr r3, [r7, #4] - 800611c: 681b ldr r3, [r3, #0] - 800611e: 685b ldr r3, [r3, #4] - 8006120: b2db uxtb r3, r3 - 8006122: f003 037f and.w r3, r3, #127 @ 0x7f - 8006126: b2da uxtb r2, r3 - 8006128: 6afb ldr r3, [r7, #44] @ 0x2c - 800612a: 701a strb r2, [r3, #0] + 8006a0a: 687b ldr r3, [r7, #4] + 8006a0c: 681b ldr r3, [r3, #0] + 8006a0e: 685b ldr r3, [r3, #4] + 8006a10: b2db uxtb r3, r3 + 8006a12: f003 037f and.w r3, r3, #127 @ 0x7f + 8006a16: b2da uxtb r2, r3 + 8006a18: 6afb ldr r3, [r7, #44] @ 0x2c + 8006a1a: 701a strb r2, [r3, #0] } huart->pRxBuffPtr += 1U; - 800612c: 687b ldr r3, [r7, #4] - 800612e: 6a9b ldr r3, [r3, #40] @ 0x28 - 8006130: 1c5a adds r2, r3, #1 - 8006132: 687b ldr r3, [r7, #4] - 8006134: 629a str r2, [r3, #40] @ 0x28 + 8006a1c: 687b ldr r3, [r7, #4] + 8006a1e: 6a9b ldr r3, [r3, #40] @ 0x28 + 8006a20: 1c5a adds r2, r3, #1 + 8006a22: 687b ldr r3, [r7, #4] + 8006a24: 629a str r2, [r3, #40] @ 0x28 } if (--huart->RxXferCount == 0U) - 8006136: 687b ldr r3, [r7, #4] - 8006138: 8ddb ldrh r3, [r3, #46] @ 0x2e - 800613a: b29b uxth r3, r3 - 800613c: 3b01 subs r3, #1 - 800613e: b29b uxth r3, r3 - 8006140: 687a ldr r2, [r7, #4] - 8006142: 4619 mov r1, r3 - 8006144: 85d1 strh r1, [r2, #46] @ 0x2e - 8006146: 2b00 cmp r3, #0 - 8006148: d15d bne.n 8006206 + 8006a26: 687b ldr r3, [r7, #4] + 8006a28: 8ddb ldrh r3, [r3, #46] @ 0x2e + 8006a2a: b29b uxth r3, r3 + 8006a2c: 3b01 subs r3, #1 + 8006a2e: b29b uxth r3, r3 + 8006a30: 687a ldr r2, [r7, #4] + 8006a32: 4619 mov r1, r3 + 8006a34: 85d1 strh r1, [r2, #46] @ 0x2e + 8006a36: 2b00 cmp r3, #0 + 8006a38: d15d bne.n 8006af6 { /* Disable the UART Data Register not empty Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); - 800614a: 687b ldr r3, [r7, #4] - 800614c: 681b ldr r3, [r3, #0] - 800614e: 68da ldr r2, [r3, #12] - 8006150: 687b ldr r3, [r7, #4] - 8006152: 681b ldr r3, [r3, #0] - 8006154: f022 0220 bic.w r2, r2, #32 - 8006158: 60da str r2, [r3, #12] + 8006a3a: 687b ldr r3, [r7, #4] + 8006a3c: 681b ldr r3, [r3, #0] + 8006a3e: 68da ldr r2, [r3, #12] + 8006a40: 687b ldr r3, [r7, #4] + 8006a42: 681b ldr r3, [r3, #0] + 8006a44: f022 0220 bic.w r2, r2, #32 + 8006a48: 60da str r2, [r3, #12] /* Disable the UART Parity Error Interrupt */ __HAL_UART_DISABLE_IT(huart, UART_IT_PE); - 800615a: 687b ldr r3, [r7, #4] - 800615c: 681b ldr r3, [r3, #0] - 800615e: 68da ldr r2, [r3, #12] - 8006160: 687b ldr r3, [r7, #4] - 8006162: 681b ldr r3, [r3, #0] - 8006164: f422 7280 bic.w r2, r2, #256 @ 0x100 - 8006168: 60da str r2, [r3, #12] + 8006a4a: 687b ldr r3, [r7, #4] + 8006a4c: 681b ldr r3, [r3, #0] + 8006a4e: 68da ldr r2, [r3, #12] + 8006a50: 687b ldr r3, [r7, #4] + 8006a52: 681b ldr r3, [r3, #0] + 8006a54: f422 7280 bic.w r2, r2, #256 @ 0x100 + 8006a58: 60da str r2, [r3, #12] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ __HAL_UART_DISABLE_IT(huart, UART_IT_ERR); - 800616a: 687b ldr r3, [r7, #4] - 800616c: 681b ldr r3, [r3, #0] - 800616e: 695a ldr r2, [r3, #20] - 8006170: 687b ldr r3, [r7, #4] - 8006172: 681b ldr r3, [r3, #0] - 8006174: f022 0201 bic.w r2, r2, #1 - 8006178: 615a str r2, [r3, #20] + 8006a5a: 687b ldr r3, [r7, #4] + 8006a5c: 681b ldr r3, [r3, #0] + 8006a5e: 695a ldr r2, [r3, #20] + 8006a60: 687b ldr r3, [r7, #4] + 8006a62: 681b ldr r3, [r3, #0] + 8006a64: f022 0201 bic.w r2, r2, #1 + 8006a68: 615a str r2, [r3, #20] /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 800617a: 687b ldr r3, [r7, #4] - 800617c: 2220 movs r2, #32 - 800617e: f883 2042 strb.w r2, [r3, #66] @ 0x42 + 8006a6a: 687b ldr r3, [r7, #4] + 8006a6c: 2220 movs r2, #32 + 8006a6e: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Initialize type of RxEvent to Transfer Complete */ huart->RxEventType = HAL_UART_RXEVENT_TC; - 8006182: 687b ldr r3, [r7, #4] - 8006184: 2200 movs r2, #0 - 8006186: 635a str r2, [r3, #52] @ 0x34 + 8006a72: 687b ldr r3, [r7, #4] + 8006a74: 2200 movs r2, #0 + 8006a76: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8006188: 687b ldr r3, [r7, #4] - 800618a: 6b1b ldr r3, [r3, #48] @ 0x30 - 800618c: 2b01 cmp r3, #1 - 800618e: d135 bne.n 80061fc + 8006a78: 687b ldr r3, [r7, #4] + 8006a7a: 6b1b ldr r3, [r3, #48] @ 0x30 + 8006a7c: 2b01 cmp r3, #1 + 8006a7e: d135 bne.n 8006aec { /* Set reception type to Standard */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8006190: 687b ldr r3, [r7, #4] - 8006192: 2200 movs r2, #0 - 8006194: 631a str r2, [r3, #48] @ 0x30 + 8006a80: 687b ldr r3, [r7, #4] + 8006a82: 2200 movs r2, #0 + 8006a84: 631a str r2, [r3, #48] @ 0x30 /* Disable IDLE interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8006196: 687b ldr r3, [r7, #4] - 8006198: 681b ldr r3, [r3, #0] - 800619a: 330c adds r3, #12 - 800619c: 617b str r3, [r7, #20] + 8006a86: 687b ldr r3, [r7, #4] + 8006a88: 681b ldr r3, [r3, #0] + 8006a8a: 330c adds r3, #12 + 8006a8c: 617b str r3, [r7, #20] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 800619e: 697b ldr r3, [r7, #20] - 80061a0: e853 3f00 ldrex r3, [r3] - 80061a4: 613b str r3, [r7, #16] + 8006a8e: 697b ldr r3, [r7, #20] + 8006a90: e853 3f00 ldrex r3, [r3] + 8006a94: 613b str r3, [r7, #16] return(result); - 80061a6: 693b ldr r3, [r7, #16] - 80061a8: f023 0310 bic.w r3, r3, #16 - 80061ac: 627b str r3, [r7, #36] @ 0x24 - 80061ae: 687b ldr r3, [r7, #4] - 80061b0: 681b ldr r3, [r3, #0] - 80061b2: 330c adds r3, #12 - 80061b4: 6a7a ldr r2, [r7, #36] @ 0x24 - 80061b6: 623a str r2, [r7, #32] - 80061b8: 61fb str r3, [r7, #28] + 8006a96: 693b ldr r3, [r7, #16] + 8006a98: f023 0310 bic.w r3, r3, #16 + 8006a9c: 627b str r3, [r7, #36] @ 0x24 + 8006a9e: 687b ldr r3, [r7, #4] + 8006aa0: 681b ldr r3, [r3, #0] + 8006aa2: 330c adds r3, #12 + 8006aa4: 6a7a ldr r2, [r7, #36] @ 0x24 + 8006aa6: 623a str r2, [r7, #32] + 8006aa8: 61fb str r3, [r7, #28] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 80061ba: 69f9 ldr r1, [r7, #28] - 80061bc: 6a3a ldr r2, [r7, #32] - 80061be: e841 2300 strex r3, r2, [r1] - 80061c2: 61bb str r3, [r7, #24] + 8006aaa: 69f9 ldr r1, [r7, #28] + 8006aac: 6a3a ldr r2, [r7, #32] + 8006aae: e841 2300 strex r3, r2, [r1] + 8006ab2: 61bb str r3, [r7, #24] return(result); - 80061c4: 69bb ldr r3, [r7, #24] - 80061c6: 2b00 cmp r3, #0 - 80061c8: d1e5 bne.n 8006196 + 8006ab4: 69bb ldr r3, [r7, #24] + 8006ab6: 2b00 cmp r3, #0 + 8006ab8: d1e5 bne.n 8006a86 /* Check if IDLE flag is set */ if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) - 80061ca: 687b ldr r3, [r7, #4] - 80061cc: 681b ldr r3, [r3, #0] - 80061ce: 681b ldr r3, [r3, #0] - 80061d0: f003 0310 and.w r3, r3, #16 - 80061d4: 2b10 cmp r3, #16 - 80061d6: d10a bne.n 80061ee + 8006aba: 687b ldr r3, [r7, #4] + 8006abc: 681b ldr r3, [r3, #0] + 8006abe: 681b ldr r3, [r3, #0] + 8006ac0: f003 0310 and.w r3, r3, #16 + 8006ac4: 2b10 cmp r3, #16 + 8006ac6: d10a bne.n 8006ade { /* Clear IDLE flag in ISR */ __HAL_UART_CLEAR_IDLEFLAG(huart); - 80061d8: 2300 movs r3, #0 - 80061da: 60fb str r3, [r7, #12] - 80061dc: 687b ldr r3, [r7, #4] - 80061de: 681b ldr r3, [r3, #0] - 80061e0: 681b ldr r3, [r3, #0] - 80061e2: 60fb str r3, [r7, #12] - 80061e4: 687b ldr r3, [r7, #4] - 80061e6: 681b ldr r3, [r3, #0] - 80061e8: 685b ldr r3, [r3, #4] - 80061ea: 60fb str r3, [r7, #12] - 80061ec: 68fb ldr r3, [r7, #12] + 8006ac8: 2300 movs r3, #0 + 8006aca: 60fb str r3, [r7, #12] + 8006acc: 687b ldr r3, [r7, #4] + 8006ace: 681b ldr r3, [r3, #0] + 8006ad0: 681b ldr r3, [r3, #0] + 8006ad2: 60fb str r3, [r7, #12] + 8006ad4: 687b ldr r3, [r7, #4] + 8006ad6: 681b ldr r3, [r3, #0] + 8006ad8: 685b ldr r3, [r3, #4] + 8006ada: 60fb str r3, [r7, #12] + 8006adc: 68fb ldr r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); - 80061ee: 687b ldr r3, [r7, #4] - 80061f0: 8d9b ldrh r3, [r3, #44] @ 0x2c - 80061f2: 4619 mov r1, r3 - 80061f4: 6878 ldr r0, [r7, #4] - 80061f6: f7ff fe0e bl 8005e16 - 80061fa: e002 b.n 8006202 + 8006ade: 687b ldr r3, [r7, #4] + 8006ae0: 8d9b ldrh r3, [r3, #44] @ 0x2c + 8006ae2: 4619 mov r1, r3 + 8006ae4: 6878 ldr r0, [r7, #4] + 8006ae6: f7ff fe0e bl 8006706 + 8006aea: e002 b.n 8006af2 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxCpltCallback(huart); #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); - 80061fc: 6878 ldr r0, [r7, #4] - 80061fe: f7ff fdf8 bl 8005df2 + 8006aec: 6878 ldr r0, [r7, #4] + 8006aee: f7ff fdf8 bl 80066e2 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } return HAL_OK; - 8006202: 2300 movs r3, #0 - 8006204: e002 b.n 800620c + 8006af2: 2300 movs r3, #0 + 8006af4: e002 b.n 8006afc } return HAL_OK; - 8006206: 2300 movs r3, #0 - 8006208: e000 b.n 800620c + 8006af6: 2300 movs r3, #0 + 8006af8: e000 b.n 8006afc } else { return HAL_BUSY; - 800620a: 2302 movs r3, #2 + 8006afa: 2302 movs r3, #2 } } - 800620c: 4618 mov r0, r3 - 800620e: 3730 adds r7, #48 @ 0x30 - 8006210: 46bd mov sp, r7 - 8006212: bd80 pop {r7, pc} + 8006afc: 4618 mov r0, r3 + 8006afe: 3730 adds r7, #48 @ 0x30 + 8006b00: 46bd mov sp, r7 + 8006b02: bd80 pop {r7, pc} -08006214 : +08006b04 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { - 8006214: b580 push {r7, lr} - 8006216: b084 sub sp, #16 - 8006218: af00 add r7, sp, #0 - 800621a: 6078 str r0, [r7, #4] + 8006b04: b580 push {r7, lr} + 8006b06: b084 sub sp, #16 + 8006b08: af00 add r7, sp, #0 + 8006b0a: 6078 str r0, [r7, #4] assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 800621c: 687b ldr r3, [r7, #4] - 800621e: 681b ldr r3, [r3, #0] - 8006220: 691b ldr r3, [r3, #16] - 8006222: f423 5140 bic.w r1, r3, #12288 @ 0x3000 - 8006226: 687b ldr r3, [r7, #4] - 8006228: 68da ldr r2, [r3, #12] - 800622a: 687b ldr r3, [r7, #4] - 800622c: 681b ldr r3, [r3, #0] - 800622e: 430a orrs r2, r1 - 8006230: 611a str r2, [r3, #16] + 8006b0c: 687b ldr r3, [r7, #4] + 8006b0e: 681b ldr r3, [r3, #0] + 8006b10: 691b ldr r3, [r3, #16] + 8006b12: f423 5140 bic.w r1, r3, #12288 @ 0x3000 + 8006b16: 687b ldr r3, [r7, #4] + 8006b18: 68da ldr r2, [r3, #12] + 8006b1a: 687b ldr r3, [r7, #4] + 8006b1c: 681b ldr r3, [r3, #0] + 8006b1e: 430a orrs r2, r1 + 8006b20: 611a str r2, [r3, #16] tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; MODIFY_REG(huart->Instance->CR1, (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); #else tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode; - 8006232: 687b ldr r3, [r7, #4] - 8006234: 689a ldr r2, [r3, #8] - 8006236: 687b ldr r3, [r7, #4] - 8006238: 691b ldr r3, [r3, #16] - 800623a: 431a orrs r2, r3 - 800623c: 687b ldr r3, [r7, #4] - 800623e: 695b ldr r3, [r3, #20] - 8006240: 4313 orrs r3, r2 - 8006242: 60bb str r3, [r7, #8] + 8006b22: 687b ldr r3, [r7, #4] + 8006b24: 689a ldr r2, [r3, #8] + 8006b26: 687b ldr r3, [r7, #4] + 8006b28: 691b ldr r3, [r3, #16] + 8006b2a: 431a orrs r2, r3 + 8006b2c: 687b ldr r3, [r7, #4] + 8006b2e: 695b ldr r3, [r3, #20] + 8006b30: 4313 orrs r3, r2 + 8006b32: 60bb str r3, [r7, #8] MODIFY_REG(huart->Instance->CR1, - 8006244: 687b ldr r3, [r7, #4] - 8006246: 681b ldr r3, [r3, #0] - 8006248: 68db ldr r3, [r3, #12] - 800624a: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 - 800624e: f023 030c bic.w r3, r3, #12 - 8006252: 687a ldr r2, [r7, #4] - 8006254: 6812 ldr r2, [r2, #0] - 8006256: 68b9 ldr r1, [r7, #8] - 8006258: 430b orrs r3, r1 - 800625a: 60d3 str r3, [r2, #12] + 8006b34: 687b ldr r3, [r7, #4] + 8006b36: 681b ldr r3, [r3, #0] + 8006b38: 68db ldr r3, [r3, #12] + 8006b3a: f423 53b0 bic.w r3, r3, #5632 @ 0x1600 + 8006b3e: f023 030c bic.w r3, r3, #12 + 8006b42: 687a ldr r2, [r7, #4] + 8006b44: 6812 ldr r2, [r2, #0] + 8006b46: 68b9 ldr r1, [r7, #8] + 8006b48: 430b orrs r3, r1 + 8006b4a: 60d3 str r3, [r2, #12] tmpreg); #endif /* USART_CR1_OVER8 */ /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); - 800625c: 687b ldr r3, [r7, #4] - 800625e: 681b ldr r3, [r3, #0] - 8006260: 695b ldr r3, [r3, #20] - 8006262: f423 7140 bic.w r1, r3, #768 @ 0x300 - 8006266: 687b ldr r3, [r7, #4] - 8006268: 699a ldr r2, [r3, #24] - 800626a: 687b ldr r3, [r7, #4] - 800626c: 681b ldr r3, [r3, #0] - 800626e: 430a orrs r2, r1 - 8006270: 615a str r2, [r3, #20] + 8006b4c: 687b ldr r3, [r7, #4] + 8006b4e: 681b ldr r3, [r3, #0] + 8006b50: 695b ldr r3, [r3, #20] + 8006b52: f423 7140 bic.w r1, r3, #768 @ 0x300 + 8006b56: 687b ldr r3, [r7, #4] + 8006b58: 699a ldr r2, [r3, #24] + 8006b5a: 687b ldr r3, [r7, #4] + 8006b5c: 681b ldr r3, [r3, #0] + 8006b5e: 430a orrs r2, r1 + 8006b60: 615a str r2, [r3, #20] if(huart->Instance == USART1) - 8006272: 687b ldr r3, [r7, #4] - 8006274: 681b ldr r3, [r3, #0] - 8006276: 4a2c ldr r2, [pc, #176] @ (8006328 ) - 8006278: 4293 cmp r3, r2 - 800627a: d103 bne.n 8006284 + 8006b62: 687b ldr r3, [r7, #4] + 8006b64: 681b ldr r3, [r3, #0] + 8006b66: 4a2c ldr r2, [pc, #176] @ (8006c18 ) + 8006b68: 4293 cmp r3, r2 + 8006b6a: d103 bne.n 8006b74 { pclk = HAL_RCC_GetPCLK2Freq(); - 800627c: f7fe fd68 bl 8004d50 - 8006280: 60f8 str r0, [r7, #12] - 8006282: e002 b.n 800628a + 8006b6c: f7fe fd68 bl 8005640 + 8006b70: 60f8 str r0, [r7, #12] + 8006b72: e002 b.n 8006b7a } else { pclk = HAL_RCC_GetPCLK1Freq(); - 8006284: f7fe fd50 bl 8004d28 - 8006288: 60f8 str r0, [r7, #12] + 8006b74: f7fe fd50 bl 8005618 + 8006b78: 60f8 str r0, [r7, #12] else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } #else huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); - 800628a: 68fa ldr r2, [r7, #12] - 800628c: 4613 mov r3, r2 - 800628e: 009b lsls r3, r3, #2 - 8006290: 4413 add r3, r2 - 8006292: 009a lsls r2, r3, #2 - 8006294: 441a add r2, r3 - 8006296: 687b ldr r3, [r7, #4] - 8006298: 685b ldr r3, [r3, #4] - 800629a: 009b lsls r3, r3, #2 - 800629c: fbb2 f3f3 udiv r3, r2, r3 - 80062a0: 4a22 ldr r2, [pc, #136] @ (800632c ) - 80062a2: fba2 2303 umull r2, r3, r2, r3 - 80062a6: 095b lsrs r3, r3, #5 - 80062a8: 0119 lsls r1, r3, #4 - 80062aa: 68fa ldr r2, [r7, #12] - 80062ac: 4613 mov r3, r2 - 80062ae: 009b lsls r3, r3, #2 - 80062b0: 4413 add r3, r2 - 80062b2: 009a lsls r2, r3, #2 - 80062b4: 441a add r2, r3 - 80062b6: 687b ldr r3, [r7, #4] - 80062b8: 685b ldr r3, [r3, #4] - 80062ba: 009b lsls r3, r3, #2 - 80062bc: fbb2 f2f3 udiv r2, r2, r3 - 80062c0: 4b1a ldr r3, [pc, #104] @ (800632c ) - 80062c2: fba3 0302 umull r0, r3, r3, r2 - 80062c6: 095b lsrs r3, r3, #5 - 80062c8: 2064 movs r0, #100 @ 0x64 - 80062ca: fb00 f303 mul.w r3, r0, r3 - 80062ce: 1ad3 subs r3, r2, r3 - 80062d0: 011b lsls r3, r3, #4 - 80062d2: 3332 adds r3, #50 @ 0x32 - 80062d4: 4a15 ldr r2, [pc, #84] @ (800632c ) - 80062d6: fba2 2303 umull r2, r3, r2, r3 - 80062da: 095b lsrs r3, r3, #5 - 80062dc: f003 03f0 and.w r3, r3, #240 @ 0xf0 - 80062e0: 4419 add r1, r3 - 80062e2: 68fa ldr r2, [r7, #12] - 80062e4: 4613 mov r3, r2 - 80062e6: 009b lsls r3, r3, #2 - 80062e8: 4413 add r3, r2 - 80062ea: 009a lsls r2, r3, #2 - 80062ec: 441a add r2, r3 - 80062ee: 687b ldr r3, [r7, #4] - 80062f0: 685b ldr r3, [r3, #4] - 80062f2: 009b lsls r3, r3, #2 - 80062f4: fbb2 f2f3 udiv r2, r2, r3 - 80062f8: 4b0c ldr r3, [pc, #48] @ (800632c ) - 80062fa: fba3 0302 umull r0, r3, r3, r2 - 80062fe: 095b lsrs r3, r3, #5 - 8006300: 2064 movs r0, #100 @ 0x64 - 8006302: fb00 f303 mul.w r3, r0, r3 - 8006306: 1ad3 subs r3, r2, r3 - 8006308: 011b lsls r3, r3, #4 - 800630a: 3332 adds r3, #50 @ 0x32 - 800630c: 4a07 ldr r2, [pc, #28] @ (800632c ) - 800630e: fba2 2303 umull r2, r3, r2, r3 - 8006312: 095b lsrs r3, r3, #5 - 8006314: f003 020f and.w r2, r3, #15 - 8006318: 687b ldr r3, [r7, #4] - 800631a: 681b ldr r3, [r3, #0] - 800631c: 440a add r2, r1 - 800631e: 609a str r2, [r3, #8] + 8006b7a: 68fa ldr r2, [r7, #12] + 8006b7c: 4613 mov r3, r2 + 8006b7e: 009b lsls r3, r3, #2 + 8006b80: 4413 add r3, r2 + 8006b82: 009a lsls r2, r3, #2 + 8006b84: 441a add r2, r3 + 8006b86: 687b ldr r3, [r7, #4] + 8006b88: 685b ldr r3, [r3, #4] + 8006b8a: 009b lsls r3, r3, #2 + 8006b8c: fbb2 f3f3 udiv r3, r2, r3 + 8006b90: 4a22 ldr r2, [pc, #136] @ (8006c1c ) + 8006b92: fba2 2303 umull r2, r3, r2, r3 + 8006b96: 095b lsrs r3, r3, #5 + 8006b98: 0119 lsls r1, r3, #4 + 8006b9a: 68fa ldr r2, [r7, #12] + 8006b9c: 4613 mov r3, r2 + 8006b9e: 009b lsls r3, r3, #2 + 8006ba0: 4413 add r3, r2 + 8006ba2: 009a lsls r2, r3, #2 + 8006ba4: 441a add r2, r3 + 8006ba6: 687b ldr r3, [r7, #4] + 8006ba8: 685b ldr r3, [r3, #4] + 8006baa: 009b lsls r3, r3, #2 + 8006bac: fbb2 f2f3 udiv r2, r2, r3 + 8006bb0: 4b1a ldr r3, [pc, #104] @ (8006c1c ) + 8006bb2: fba3 0302 umull r0, r3, r3, r2 + 8006bb6: 095b lsrs r3, r3, #5 + 8006bb8: 2064 movs r0, #100 @ 0x64 + 8006bba: fb00 f303 mul.w r3, r0, r3 + 8006bbe: 1ad3 subs r3, r2, r3 + 8006bc0: 011b lsls r3, r3, #4 + 8006bc2: 3332 adds r3, #50 @ 0x32 + 8006bc4: 4a15 ldr r2, [pc, #84] @ (8006c1c ) + 8006bc6: fba2 2303 umull r2, r3, r2, r3 + 8006bca: 095b lsrs r3, r3, #5 + 8006bcc: f003 03f0 and.w r3, r3, #240 @ 0xf0 + 8006bd0: 4419 add r1, r3 + 8006bd2: 68fa ldr r2, [r7, #12] + 8006bd4: 4613 mov r3, r2 + 8006bd6: 009b lsls r3, r3, #2 + 8006bd8: 4413 add r3, r2 + 8006bda: 009a lsls r2, r3, #2 + 8006bdc: 441a add r2, r3 + 8006bde: 687b ldr r3, [r7, #4] + 8006be0: 685b ldr r3, [r3, #4] + 8006be2: 009b lsls r3, r3, #2 + 8006be4: fbb2 f2f3 udiv r2, r2, r3 + 8006be8: 4b0c ldr r3, [pc, #48] @ (8006c1c ) + 8006bea: fba3 0302 umull r0, r3, r3, r2 + 8006bee: 095b lsrs r3, r3, #5 + 8006bf0: 2064 movs r0, #100 @ 0x64 + 8006bf2: fb00 f303 mul.w r3, r0, r3 + 8006bf6: 1ad3 subs r3, r2, r3 + 8006bf8: 011b lsls r3, r3, #4 + 8006bfa: 3332 adds r3, #50 @ 0x32 + 8006bfc: 4a07 ldr r2, [pc, #28] @ (8006c1c ) + 8006bfe: fba2 2303 umull r2, r3, r2, r3 + 8006c02: 095b lsrs r3, r3, #5 + 8006c04: f003 020f and.w r2, r3, #15 + 8006c08: 687b ldr r3, [r7, #4] + 8006c0a: 681b ldr r3, [r3, #0] + 8006c0c: 440a add r2, r1 + 8006c0e: 609a str r2, [r3, #8] #endif /* USART_CR1_OVER8 */ } - 8006320: bf00 nop - 8006322: 3710 adds r7, #16 - 8006324: 46bd mov sp, r7 - 8006326: bd80 pop {r7, pc} - 8006328: 40013800 .word 0x40013800 - 800632c: 51eb851f .word 0x51eb851f + 8006c10: bf00 nop + 8006c12: 3710 adds r7, #16 + 8006c14: 46bd mov sp, r7 + 8006c16: bd80 pop {r7, pc} + 8006c18: 40013800 .word 0x40013800 + 8006c1c: 51eb851f .word 0x51eb851f -08006330 : - 8006330: 4603 mov r3, r0 - 8006332: 4402 add r2, r0 - 8006334: 4293 cmp r3, r2 - 8006336: d100 bne.n 800633a - 8006338: 4770 bx lr - 800633a: f803 1b01 strb.w r1, [r3], #1 - 800633e: e7f9 b.n 8006334 +08006c20 : + 8006c20: 4603 mov r3, r0 + 8006c22: 4402 add r2, r0 + 8006c24: 4293 cmp r3, r2 + 8006c26: d100 bne.n 8006c2a + 8006c28: 4770 bx lr + 8006c2a: f803 1b01 strb.w r1, [r3], #1 + 8006c2e: e7f9 b.n 8006c24 -08006340 <__errno>: - 8006340: 4b01 ldr r3, [pc, #4] @ (8006348 <__errno+0x8>) - 8006342: 6818 ldr r0, [r3, #0] - 8006344: 4770 bx lr - 8006346: bf00 nop - 8006348: 20000010 .word 0x20000010 +08006c30 <__errno>: + 8006c30: 4b01 ldr r3, [pc, #4] @ (8006c38 <__errno+0x8>) + 8006c32: 6818 ldr r0, [r3, #0] + 8006c34: 4770 bx lr + 8006c36: bf00 nop + 8006c38: 20000010 .word 0x20000010 -0800634c <__libc_init_array>: - 800634c: b570 push {r4, r5, r6, lr} - 800634e: 2600 movs r6, #0 - 8006350: 4d0c ldr r5, [pc, #48] @ (8006384 <__libc_init_array+0x38>) - 8006352: 4b0d ldr r3, [pc, #52] @ (8006388 <__libc_init_array+0x3c>) - 8006354: 1b5b subs r3, r3, r5 - 8006356: 109c asrs r4, r3, #2 - 8006358: 42a6 cmp r6, r4 - 800635a: d109 bne.n 8006370 <__libc_init_array+0x24> - 800635c: 2600 movs r6, #0 - 800635e: f000 f8cd bl 80064fc <_init> - 8006362: 4d0a ldr r5, [pc, #40] @ (800638c <__libc_init_array+0x40>) - 8006364: 4b0a ldr r3, [pc, #40] @ (8006390 <__libc_init_array+0x44>) - 8006366: 1b5b subs r3, r3, r5 - 8006368: 109c asrs r4, r3, #2 - 800636a: 42a6 cmp r6, r4 - 800636c: d105 bne.n 800637a <__libc_init_array+0x2e> - 800636e: bd70 pop {r4, r5, r6, pc} - 8006370: f855 3b04 ldr.w r3, [r5], #4 - 8006374: 4798 blx r3 - 8006376: 3601 adds r6, #1 - 8006378: e7ee b.n 8006358 <__libc_init_array+0xc> - 800637a: f855 3b04 ldr.w r3, [r5], #4 - 800637e: 4798 blx r3 - 8006380: 3601 adds r6, #1 - 8006382: e7f2 b.n 800636a <__libc_init_array+0x1e> - 8006384: 08006658 .word 0x08006658 - 8006388: 08006658 .word 0x08006658 - 800638c: 08006658 .word 0x08006658 - 8006390: 0800665c .word 0x0800665c +08006c3c <__libc_init_array>: + 8006c3c: b570 push {r4, r5, r6, lr} + 8006c3e: 2600 movs r6, #0 + 8006c40: 4d0c ldr r5, [pc, #48] @ (8006c74 <__libc_init_array+0x38>) + 8006c42: 4b0d ldr r3, [pc, #52] @ (8006c78 <__libc_init_array+0x3c>) + 8006c44: 1b5b subs r3, r3, r5 + 8006c46: 109c asrs r4, r3, #2 + 8006c48: 42a6 cmp r6, r4 + 8006c4a: d109 bne.n 8006c60 <__libc_init_array+0x24> + 8006c4c: 2600 movs r6, #0 + 8006c4e: f000 f8cd bl 8006dec <_init> + 8006c52: 4d0a ldr r5, [pc, #40] @ (8006c7c <__libc_init_array+0x40>) + 8006c54: 4b0a ldr r3, [pc, #40] @ (8006c80 <__libc_init_array+0x44>) + 8006c56: 1b5b subs r3, r3, r5 + 8006c58: 109c asrs r4, r3, #2 + 8006c5a: 42a6 cmp r6, r4 + 8006c5c: d105 bne.n 8006c6a <__libc_init_array+0x2e> + 8006c5e: bd70 pop {r4, r5, r6, pc} + 8006c60: f855 3b04 ldr.w r3, [r5], #4 + 8006c64: 4798 blx r3 + 8006c66: 3601 adds r6, #1 + 8006c68: e7ee b.n 8006c48 <__libc_init_array+0xc> + 8006c6a: f855 3b04 ldr.w r3, [r5], #4 + 8006c6e: 4798 blx r3 + 8006c70: 3601 adds r6, #1 + 8006c72: e7f2 b.n 8006c5a <__libc_init_array+0x1e> + 8006c74: 08006f48 .word 0x08006f48 + 8006c78: 08006f48 .word 0x08006f48 + 8006c7c: 08006f48 .word 0x08006f48 + 8006c80: 08006f4c .word 0x08006f4c -08006394 : - 8006394: b538 push {r3, r4, r5, lr} - 8006396: 4604 mov r4, r0 - 8006398: f000 f81a bl 80063d0 <__ieee754_sqrtf> - 800639c: 4621 mov r1, r4 - 800639e: 4605 mov r5, r0 - 80063a0: 4620 mov r0, r4 - 80063a2: f7fa f9af bl 8000704 <__aeabi_fcmpun> - 80063a6: b920 cbnz r0, 80063b2 - 80063a8: 4620 mov r0, r4 - 80063aa: 2100 movs r1, #0 - 80063ac: f7fa f982 bl 80006b4 <__aeabi_fcmplt> - 80063b0: b908 cbnz r0, 80063b6 - 80063b2: 4628 mov r0, r5 - 80063b4: bd38 pop {r3, r4, r5, pc} - 80063b6: f7ff ffc3 bl 8006340 <__errno> - 80063ba: 2221 movs r2, #33 @ 0x21 - 80063bc: 4603 mov r3, r0 - 80063be: 2100 movs r1, #0 - 80063c0: 601a str r2, [r3, #0] - 80063c2: 4608 mov r0, r1 - 80063c4: f7fa f88c bl 80004e0 <__aeabi_fdiv> - 80063c8: 4605 mov r5, r0 - 80063ca: 4628 mov r0, r5 - 80063cc: bd38 pop {r3, r4, r5, pc} - 80063ce: bf00 nop +08006c84 : + 8006c84: b538 push {r3, r4, r5, lr} + 8006c86: 4604 mov r4, r0 + 8006c88: f000 f81a bl 8006cc0 <__ieee754_sqrtf> + 8006c8c: 4621 mov r1, r4 + 8006c8e: 4605 mov r5, r0 + 8006c90: 4620 mov r0, r4 + 8006c92: f7fa f8cd bl 8000e30 <__aeabi_fcmpun> + 8006c96: b920 cbnz r0, 8006ca2 + 8006c98: 4620 mov r0, r4 + 8006c9a: 2100 movs r1, #0 + 8006c9c: f7fa f8a0 bl 8000de0 <__aeabi_fcmplt> + 8006ca0: b908 cbnz r0, 8006ca6 + 8006ca2: 4628 mov r0, r5 + 8006ca4: bd38 pop {r3, r4, r5, pc} + 8006ca6: f7ff ffc3 bl 8006c30 <__errno> + 8006caa: 2221 movs r2, #33 @ 0x21 + 8006cac: 4603 mov r3, r0 + 8006cae: 2100 movs r1, #0 + 8006cb0: 601a str r2, [r3, #0] + 8006cb2: 4608 mov r0, r1 + 8006cb4: f7f9 ffaa bl 8000c0c <__aeabi_fdiv> + 8006cb8: 4605 mov r5, r0 + 8006cba: 4628 mov r0, r5 + 8006cbc: bd38 pop {r3, r4, r5, pc} + 8006cbe: bf00 nop -080063d0 <__ieee754_sqrtf>: - 80063d0: f020 4200 bic.w r2, r0, #2147483648 @ 0x80000000 - 80063d4: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000 - 80063d8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} - 80063dc: 4604 mov r4, r0 - 80063de: d24f bcs.n 8006480 <__ieee754_sqrtf+0xb0> - 80063e0: 2a00 cmp r2, #0 - 80063e2: d04b beq.n 800647c <__ieee754_sqrtf+0xac> - 80063e4: 2800 cmp r0, #0 - 80063e6: 4603 mov r3, r0 - 80063e8: db54 blt.n 8006494 <__ieee754_sqrtf+0xc4> - 80063ea: f010 42ff ands.w r2, r0, #2139095040 @ 0x7f800000 - 80063ee: d14f bne.n 8006490 <__ieee754_sqrtf+0xc0> - 80063f0: 005b lsls r3, r3, #1 - 80063f2: 0218 lsls r0, r3, #8 - 80063f4: 4611 mov r1, r2 - 80063f6: f102 0201 add.w r2, r2, #1 - 80063fa: d5f9 bpl.n 80063f0 <__ieee754_sqrtf+0x20> - 80063fc: 4249 negs r1, r1 - 80063fe: 2400 movs r4, #0 - 8006400: f3c3 0216 ubfx r2, r3, #0, #23 - 8006404: f1a1 057f sub.w r5, r1, #127 @ 0x7f - 8006408: 07cb lsls r3, r1, #31 - 800640a: f04f 0e19 mov.w lr, #25 - 800640e: f04f 7c80 mov.w ip, #16777216 @ 0x1000000 - 8006412: 4621 mov r1, r4 - 8006414: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 - 8006418: bf58 it pl - 800641a: 0052 lslpl r2, r2, #1 - 800641c: 106d asrs r5, r5, #1 - 800641e: 0052 lsls r2, r2, #1 - 8006420: eb01 030c add.w r3, r1, ip - 8006424: 4293 cmp r3, r2 - 8006426: bfcf iteee gt - 8006428: 4613 movgt r3, r2 - 800642a: eb03 010c addle.w r1, r3, ip - 800642e: 4464 addle r4, ip - 8006430: 1ad3 suble r3, r2, r3 - 8006432: f1be 0e01 subs.w lr, lr, #1 - 8006436: ea4f 0243 mov.w r2, r3, lsl #1 - 800643a: ea4f 0c5c mov.w ip, ip, lsr #1 - 800643e: d1ef bne.n 8006420 <__ieee754_sqrtf+0x50> - 8006440: b1bb cbz r3, 8006472 <__ieee754_sqrtf+0xa2> - 8006442: 4e1a ldr r6, [pc, #104] @ (80064ac <__ieee754_sqrtf+0xdc>) - 8006444: 4f1a ldr r7, [pc, #104] @ (80064b0 <__ieee754_sqrtf+0xe0>) - 8006446: 6830 ldr r0, [r6, #0] - 8006448: 6839 ldr r1, [r7, #0] - 800644a: f7f9 fe8b bl 8000164 <__aeabi_fsub> - 800644e: f8d6 8000 ldr.w r8, [r6] - 8006452: 4601 mov r1, r0 - 8006454: 4640 mov r0, r8 - 8006456: f7fa f937 bl 80006c8 <__aeabi_fcmple> - 800645a: b150 cbz r0, 8006472 <__ieee754_sqrtf+0xa2> - 800645c: 6830 ldr r0, [r6, #0] - 800645e: 6839 ldr r1, [r7, #0] - 8006460: f7f9 fe82 bl 8000168 <__addsf3> - 8006464: 6836 ldr r6, [r6, #0] - 8006466: 4601 mov r1, r0 - 8006468: 4630 mov r0, r6 - 800646a: f7fa f923 bl 80006b4 <__aeabi_fcmplt> - 800646e: b1c8 cbz r0, 80064a4 <__ieee754_sqrtf+0xd4> - 8006470: 3402 adds r4, #2 - 8006472: 1060 asrs r0, r4, #1 - 8006474: f100 507c add.w r0, r0, #1056964608 @ 0x3f000000 - 8006478: eb00 50c5 add.w r0, r0, r5, lsl #23 - 800647c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8006480: 4601 mov r1, r0 - 8006482: f7f9 ff79 bl 8000378 <__aeabi_fmul> - 8006486: 4621 mov r1, r4 - 8006488: f7f9 fe6e bl 8000168 <__addsf3> - 800648c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 8006490: 15c1 asrs r1, r0, #23 - 8006492: e7b4 b.n 80063fe <__ieee754_sqrtf+0x2e> - 8006494: 4601 mov r1, r0 - 8006496: f7f9 fe65 bl 8000164 <__aeabi_fsub> - 800649a: 4601 mov r1, r0 - 800649c: f7fa f820 bl 80004e0 <__aeabi_fdiv> - 80064a0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} - 80064a4: 3401 adds r4, #1 - 80064a6: f024 0401 bic.w r4, r4, #1 - 80064aa: e7e2 b.n 8006472 <__ieee754_sqrtf+0xa2> - 80064ac: 0800664c .word 0x0800664c - 80064b0: 08006648 .word 0x08006648 +08006cc0 <__ieee754_sqrtf>: + 8006cc0: f020 4200 bic.w r2, r0, #2147483648 @ 0x80000000 + 8006cc4: f1b2 4fff cmp.w r2, #2139095040 @ 0x7f800000 + 8006cc8: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} + 8006ccc: 4604 mov r4, r0 + 8006cce: d24f bcs.n 8006d70 <__ieee754_sqrtf+0xb0> + 8006cd0: 2a00 cmp r2, #0 + 8006cd2: d04b beq.n 8006d6c <__ieee754_sqrtf+0xac> + 8006cd4: 2800 cmp r0, #0 + 8006cd6: 4603 mov r3, r0 + 8006cd8: db54 blt.n 8006d84 <__ieee754_sqrtf+0xc4> + 8006cda: f010 42ff ands.w r2, r0, #2139095040 @ 0x7f800000 + 8006cde: d14f bne.n 8006d80 <__ieee754_sqrtf+0xc0> + 8006ce0: 005b lsls r3, r3, #1 + 8006ce2: 0218 lsls r0, r3, #8 + 8006ce4: 4611 mov r1, r2 + 8006ce6: f102 0201 add.w r2, r2, #1 + 8006cea: d5f9 bpl.n 8006ce0 <__ieee754_sqrtf+0x20> + 8006cec: 4249 negs r1, r1 + 8006cee: 2400 movs r4, #0 + 8006cf0: f3c3 0216 ubfx r2, r3, #0, #23 + 8006cf4: f1a1 057f sub.w r5, r1, #127 @ 0x7f + 8006cf8: 07cb lsls r3, r1, #31 + 8006cfa: f04f 0e19 mov.w lr, #25 + 8006cfe: f04f 7c80 mov.w ip, #16777216 @ 0x1000000 + 8006d02: 4621 mov r1, r4 + 8006d04: f442 0200 orr.w r2, r2, #8388608 @ 0x800000 + 8006d08: bf58 it pl + 8006d0a: 0052 lslpl r2, r2, #1 + 8006d0c: 106d asrs r5, r5, #1 + 8006d0e: 0052 lsls r2, r2, #1 + 8006d10: eb01 030c add.w r3, r1, ip + 8006d14: 4293 cmp r3, r2 + 8006d16: bfcf iteee gt + 8006d18: 4613 movgt r3, r2 + 8006d1a: eb03 010c addle.w r1, r3, ip + 8006d1e: 4464 addle r4, ip + 8006d20: 1ad3 suble r3, r2, r3 + 8006d22: f1be 0e01 subs.w lr, lr, #1 + 8006d26: ea4f 0243 mov.w r2, r3, lsl #1 + 8006d2a: ea4f 0c5c mov.w ip, ip, lsr #1 + 8006d2e: d1ef bne.n 8006d10 <__ieee754_sqrtf+0x50> + 8006d30: b1bb cbz r3, 8006d62 <__ieee754_sqrtf+0xa2> + 8006d32: 4e1a ldr r6, [pc, #104] @ (8006d9c <__ieee754_sqrtf+0xdc>) + 8006d34: 4f1a ldr r7, [pc, #104] @ (8006da0 <__ieee754_sqrtf+0xe0>) + 8006d36: 6830 ldr r0, [r6, #0] + 8006d38: 6839 ldr r1, [r7, #0] + 8006d3a: f7f9 fda9 bl 8000890 <__aeabi_fsub> + 8006d3e: f8d6 8000 ldr.w r8, [r6] + 8006d42: 4601 mov r1, r0 + 8006d44: 4640 mov r0, r8 + 8006d46: f7fa f855 bl 8000df4 <__aeabi_fcmple> + 8006d4a: b150 cbz r0, 8006d62 <__ieee754_sqrtf+0xa2> + 8006d4c: 6830 ldr r0, [r6, #0] + 8006d4e: 6839 ldr r1, [r7, #0] + 8006d50: f7f9 fda0 bl 8000894 <__addsf3> + 8006d54: 6836 ldr r6, [r6, #0] + 8006d56: 4601 mov r1, r0 + 8006d58: 4630 mov r0, r6 + 8006d5a: f7fa f841 bl 8000de0 <__aeabi_fcmplt> + 8006d5e: b1c8 cbz r0, 8006d94 <__ieee754_sqrtf+0xd4> + 8006d60: 3402 adds r4, #2 + 8006d62: 1060 asrs r0, r4, #1 + 8006d64: f100 507c add.w r0, r0, #1056964608 @ 0x3f000000 + 8006d68: eb00 50c5 add.w r0, r0, r5, lsl #23 + 8006d6c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006d70: 4601 mov r1, r0 + 8006d72: f7f9 fe97 bl 8000aa4 <__aeabi_fmul> + 8006d76: 4621 mov r1, r4 + 8006d78: f7f9 fd8c bl 8000894 <__addsf3> + 8006d7c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006d80: 15c1 asrs r1, r0, #23 + 8006d82: e7b4 b.n 8006cee <__ieee754_sqrtf+0x2e> + 8006d84: 4601 mov r1, r0 + 8006d86: f7f9 fd83 bl 8000890 <__aeabi_fsub> + 8006d8a: 4601 mov r1, r0 + 8006d8c: f7f9 ff3e bl 8000c0c <__aeabi_fdiv> + 8006d90: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} + 8006d94: 3401 adds r4, #1 + 8006d96: f024 0401 bic.w r4, r4, #1 + 8006d9a: e7e2 b.n 8006d62 <__ieee754_sqrtf+0xa2> + 8006d9c: 08006f3c .word 0x08006f3c + 8006da0: 08006f38 .word 0x08006f38 -080064b4 : - 80064b4: b508 push {r3, lr} - 80064b6: f3c0 53c7 ubfx r3, r0, #23, #8 - 80064ba: 3b7f subs r3, #127 @ 0x7f - 80064bc: 2b16 cmp r3, #22 - 80064be: 4601 mov r1, r0 - 80064c0: dc0e bgt.n 80064e0 - 80064c2: 2b00 cmp r3, #0 - 80064c4: 4602 mov r2, r0 - 80064c6: db10 blt.n 80064ea - 80064c8: 480b ldr r0, [pc, #44] @ (80064f8 ) - 80064ca: 4118 asrs r0, r3 - 80064cc: 4201 tst r1, r0 - 80064ce: d005 beq.n 80064dc - 80064d0: f44f 0180 mov.w r1, #4194304 @ 0x400000 - 80064d4: 4119 asrs r1, r3 - 80064d6: 4411 add r1, r2 - 80064d8: ea21 0100 bic.w r1, r1, r0 - 80064dc: 4608 mov r0, r1 - 80064de: bd08 pop {r3, pc} - 80064e0: 2b80 cmp r3, #128 @ 0x80 - 80064e2: d1fb bne.n 80064dc - 80064e4: f7f9 fe40 bl 8000168 <__addsf3> - 80064e8: bd08 pop {r3, pc} - 80064ea: 3301 adds r3, #1 - 80064ec: f000 4100 and.w r1, r0, #2147483648 @ 0x80000000 - 80064f0: d1f4 bne.n 80064dc - 80064f2: f041 517e orr.w r1, r1, #1065353216 @ 0x3f800000 - 80064f6: e7f1 b.n 80064dc - 80064f8: 007fffff .word 0x007fffff +08006da4 : + 8006da4: b508 push {r3, lr} + 8006da6: f3c0 53c7 ubfx r3, r0, #23, #8 + 8006daa: 3b7f subs r3, #127 @ 0x7f + 8006dac: 2b16 cmp r3, #22 + 8006dae: 4601 mov r1, r0 + 8006db0: dc0e bgt.n 8006dd0 + 8006db2: 2b00 cmp r3, #0 + 8006db4: 4602 mov r2, r0 + 8006db6: db10 blt.n 8006dda + 8006db8: 480b ldr r0, [pc, #44] @ (8006de8 ) + 8006dba: 4118 asrs r0, r3 + 8006dbc: 4201 tst r1, r0 + 8006dbe: d005 beq.n 8006dcc + 8006dc0: f44f 0180 mov.w r1, #4194304 @ 0x400000 + 8006dc4: 4119 asrs r1, r3 + 8006dc6: 4411 add r1, r2 + 8006dc8: ea21 0100 bic.w r1, r1, r0 + 8006dcc: 4608 mov r0, r1 + 8006dce: bd08 pop {r3, pc} + 8006dd0: 2b80 cmp r3, #128 @ 0x80 + 8006dd2: d1fb bne.n 8006dcc + 8006dd4: f7f9 fd5e bl 8000894 <__addsf3> + 8006dd8: bd08 pop {r3, pc} + 8006dda: 3301 adds r3, #1 + 8006ddc: f000 4100 and.w r1, r0, #2147483648 @ 0x80000000 + 8006de0: d1f4 bne.n 8006dcc + 8006de2: f041 517e orr.w r1, r1, #1065353216 @ 0x3f800000 + 8006de6: e7f1 b.n 8006dcc + 8006de8: 007fffff .word 0x007fffff -080064fc <_init>: - 80064fc: b5f8 push {r3, r4, r5, r6, r7, lr} - 80064fe: bf00 nop - 8006500: bcf8 pop {r3, r4, r5, r6, r7} - 8006502: bc08 pop {r3} - 8006504: 469e mov lr, r3 - 8006506: 4770 bx lr +08006dec <_init>: + 8006dec: b5f8 push {r3, r4, r5, r6, r7, lr} + 8006dee: bf00 nop + 8006df0: bcf8 pop {r3, r4, r5, r6, r7} + 8006df2: bc08 pop {r3} + 8006df4: 469e mov lr, r3 + 8006df6: 4770 bx lr -08006508 <_fini>: - 8006508: b5f8 push {r3, r4, r5, r6, r7, lr} - 800650a: bf00 nop - 800650c: bcf8 pop {r3, r4, r5, r6, r7} - 800650e: bc08 pop {r3} - 8006510: 469e mov lr, r3 - 8006512: 4770 bx lr +08006df8 <_fini>: + 8006df8: b5f8 push {r3, r4, r5, r6, r7, lr} + 8006dfa: bf00 nop + 8006dfc: bcf8 pop {r3, r4, r5, r6, r7} + 8006dfe: bc08 pop {r3} + 8006e00: 469e mov lr, r3 + 8006e02: 4770 bx lr diff --git a/Fertirrega_v6/Debug/Fertirrega_v6.map b/Fertirrega_v6/Debug/Fertirrega_v6.map index fdbcb74..49592eb 100644 --- a/Fertirrega_v6/Debug/Fertirrega_v6.map +++ b/Fertirrega_v6/Debug/Fertirrega_v6.map @@ -966,8 +966,6 @@ Discarded input sections 0x00000000 0x1e ./Core/Src/main.o .rodata.AD5934_Scale_Out_Max 0x00000000 0x1e ./Core/Src/main.o - .text.FloatToString - 0x00000000 0x228 ./Core/Src/main.o .rodata 0x00000000 0x11 ./Core/Src/main.o .text.Convert2Hex 0x00000000 0x64 ./Core/Src/main.o @@ -1033,7 +1031,7 @@ Discarded input sections .debug_macro 0x00000000 0x16 ./Core/Src/main.o .debug_macro 0x00000000 0x16 ./Core/Src/main.o .debug_macro 0x00000000 0x29 ./Core/Src/main.o - .debug_macro 0x00000000 0x35a ./Core/Src/main.o + .debug_macro 0x00000000 0x353 ./Core/Src/main.o .group 0x00000000 0xc ./Core/Src/rs485_driver.o .group 0x00000000 0xc ./Core/Src/rs485_driver.o .group 0x00000000 0xc ./Core/Src/rs485_driver.o @@ -4273,36 +4271,20 @@ Discarded input sections .text 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) .data 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) .bss 0x00000000 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) - .text 0x00000000 0x254 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AD5934_EC_Compensate_Magnitude_To_25C + 0x08001148 0x5c ./Core/Src/ad5934_driver.o + 0x08001148 AD5934_EC_Compensate_Magnitude_To_25C .text.AD5934_GetAdmittance - 0x08000a84 0xe4 ./Core/Src/ad5934_driver.o - 0x08000a84 AD5934_GetAdmittance + 0x080011a4 0xe4 ./Core/Src/ad5934_driver.o + 0x080011a4 AD5934_GetAdmittance .text.AD5934_Get_Real_Imag_Numbers - 0x08000b68 0x1a ./Core/Src/ad5934_driver.o - 0x08000b68 AD5934_Get_Real_Imag_Numbers - *fill* 0x08000b82 0x2 + 0x08001288 0x1a ./Core/Src/ad5934_driver.o + 0x08001288 AD5934_Get_Real_Imag_Numbers + *fill* 0x080012a2 0x2 .text.AD5934_Compress_To_IntScale - 0x08000b84 0x11c ./Core/Src/ad5934_driver.o - 0x08000b84 AD5934_Compress_To_IntScale + 0x080012a4 0x11c ./Core/Src/ad5934_driver.o + 0x080012a4 AD5934_Compress_To_IntScale .text.AD5934_Round_Float_Precision - 0x08000ca0 0x5c ./Core/Src/ad5934_driver.o - 0x08000ca0 AD5934_Round_Float_Precision + 0x080013c0 0x5c ./Core/Src/ad5934_driver.o + 0x080013c0 AD5934_Round_Float_Precision .text.AD5934_Process_System - 0x08000cfc 0x2dc ./Core/Src/ad5934_driver.o - 0x08000cfc AD5934_Process_System + 0x0800141c 0x2c8 ./Core/Src/ad5934_driver.o + 0x0800141c AD5934_Process_System .text.AD5934_Sort_Array - 0x08000fd8 0x98 ./Core/Src/ad5934_driver.o - 0x08000fd8 AD5934_Sort_Array + 0x080016e4 0x98 ./Core/Src/ad5934_driver.o + 0x080016e4 AD5934_Sort_Array .text.AD5934_Trimmed_Mean - 0x08001070 0x8c ./Core/Src/ad5934_driver.o - 0x08001070 AD5934_Trimmed_Mean + 0x0800177c 0x8c ./Core/Src/ad5934_driver.o + 0x0800177c AD5934_Trimmed_Mean .text.AD5934_History_Average - 0x080010fc 0x58 ./Core/Src/ad5934_driver.o - 0x080010fc AD5934_History_Average + 0x08001808 0x58 ./Core/Src/ad5934_driver.o + 0x08001808 AD5934_History_Average .text.AD5934_Process_Sample - 0x08001154 0x128 ./Core/Src/ad5934_driver.o - 0x08001154 AD5934_Process_Sample + 0x08001860 0x128 ./Core/Src/ad5934_driver.o + 0x08001860 AD5934_Process_Sample .text.AD5934_RTD_NewSample - 0x0800127c 0x1c ./Core/Src/ad5934_driver.o - 0x0800127c AD5934_RTD_NewSample + 0x08001988 0x1c ./Core/Src/ad5934_driver.o + 0x08001988 AD5934_RTD_NewSample .text.AD5934_EC_NewSample - 0x08001298 0x1c ./Core/Src/ad5934_driver.o - 0x08001298 AD5934_EC_NewSample + 0x080019a4 0x1c ./Core/Src/ad5934_driver.o + 0x080019a4 AD5934_EC_NewSample .text.AD5934_Reference_100R_LowGain_NewSample - 0x080012b4 0x1c ./Core/Src/ad5934_driver.o - 0x080012b4 AD5934_Reference_100R_LowGain_NewSample + 0x080019c0 0x1c ./Core/Src/ad5934_driver.o + 0x080019c0 AD5934_Reference_100R_LowGain_NewSample .text.AD5934_Reference_100R_MidGain_NewSample - 0x080012d0 0x1c ./Core/Src/ad5934_driver.o - 0x080012d0 AD5934_Reference_100R_MidGain_NewSample - .text.AD5934_Reference_100R_HighGain_NewSample - 0x080012ec 0x1c ./Core/Src/ad5934_driver.o - 0x080012ec AD5934_Reference_100R_HighGain_NewSample + 0x080019dc 0x1c ./Core/Src/ad5934_driver.o + 0x080019dc AD5934_Reference_100R_MidGain_NewSample .text.AD5934_Reference_1K_MidGain_NewSample - 0x08001308 0x1c ./Core/Src/ad5934_driver.o - 0x08001308 AD5934_Reference_1K_MidGain_NewSample + 0x080019f8 0x1c ./Core/Src/ad5934_driver.o + 0x080019f8 AD5934_Reference_1K_MidGain_NewSample .text.AD5934_Reference_1K_HighGain_NewSample - 0x08001324 0x1c ./Core/Src/ad5934_driver.o - 0x08001324 AD5934_Reference_1K_HighGain_NewSample + 0x08001a14 0x1c ./Core/Src/ad5934_driver.o + 0x08001a14 AD5934_Reference_1K_HighGain_NewSample .text.AD5934_Reference_10K_HighGain_NewSample - 0x08001340 0x1c ./Core/Src/ad5934_driver.o - 0x08001340 AD5934_Reference_10K_HighGain_NewSample + 0x08001a30 0x1c ./Core/Src/ad5934_driver.o + 0x08001a30 AD5934_Reference_10K_HighGain_NewSample .text.ADG715_SetRegisterValue - 0x0800135c 0x30 ./Core/Src/ad5934_driver.o - 0x0800135c ADG715_SetRegisterValue + 0x08001a4c 0x30 ./Core/Src/ad5934_driver.o + 0x08001a4c ADG715_SetRegisterValue .text.ADG715_ResetChannels - 0x0800138c 0xe ./Core/Src/ad5934_driver.o - 0x0800138c ADG715_ResetChannels - *fill* 0x0800139a 0x2 + 0x08001a7c 0xe ./Core/Src/ad5934_driver.o + 0x08001a7c ADG715_ResetChannels + *fill* 0x08001a8a 0x2 .text.ADG715_SetChannels - 0x0800139c 0x2c ./Core/Src/ad5934_driver.o - 0x0800139c ADG715_SetChannels + 0x08001a8c 0x2c ./Core/Src/ad5934_driver.o + 0x08001a8c ADG715_SetChannels .text.MX_ADC1_Init - 0x080013c8 0x7c ./Core/Src/adc.o - 0x080013c8 MX_ADC1_Init + 0x08001ab8 0x7c ./Core/Src/adc.o + 0x08001ab8 MX_ADC1_Init .text.MX_ADC2_Init - 0x08001444 0x7c ./Core/Src/adc.o - 0x08001444 MX_ADC2_Init + 0x08001b34 0x7c ./Core/Src/adc.o + 0x08001b34 MX_ADC2_Init .text.HAL_ADC_MspInit - 0x080014c0 0xcc ./Core/Src/adc.o - 0x080014c0 HAL_ADC_MspInit + 0x08001bb0 0xcc ./Core/Src/adc.o + 0x08001bb0 HAL_ADC_MspInit .text.writeRegister - 0x0800158c 0x42 ./Core/Src/ads1015_driver.o + 0x08001c7c 0x42 ./Core/Src/ads1015_driver.o .text.readRegister - 0x080015ce 0x54 ./Core/Src/ads1015_driver.o - *fill* 0x08001622 0x2 + 0x08001cbe 0x54 ./Core/Src/ads1015_driver.o + *fill* 0x08001d12 0x2 .text.ADS1015_Init - 0x08001624 0x34 ./Core/Src/ads1015_driver.o - 0x08001624 ADS1015_Init + 0x08001d14 0x34 ./Core/Src/ads1015_driver.o + 0x08001d14 ADS1015_Init .text.ADS1015_Compress_To_IntScale - 0x08001658 0x88 ./Core/Src/ads1015_driver.o - 0x08001658 ADS1015_Compress_To_IntScale + 0x08001d48 0x88 ./Core/Src/ads1015_driver.o + 0x08001d48 ADS1015_Compress_To_IntScale .text.ADS1015_Process_System - 0x080016e0 0x114 ./Core/Src/ads1015_driver.o - 0x080016e0 ADS1015_Process_System + 0x08001dd0 0x114 ./Core/Src/ads1015_driver.o + 0x08001dd0 ADS1015_Process_System .text.ADS1015_Sort_Array - 0x080017f4 0x98 ./Core/Src/ads1015_driver.o - 0x080017f4 ADS1015_Sort_Array + 0x08001ee4 0x98 ./Core/Src/ads1015_driver.o + 0x08001ee4 ADS1015_Sort_Array .text.ADS1015_Trimmed_Mean - 0x0800188c 0x8c ./Core/Src/ads1015_driver.o - 0x0800188c ADS1015_Trimmed_Mean + 0x08001f7c 0x8c ./Core/Src/ads1015_driver.o + 0x08001f7c ADS1015_Trimmed_Mean .text.ADS1015_History_Average - 0x08001918 0x58 ./Core/Src/ads1015_driver.o - 0x08001918 ADS1015_History_Average + 0x08002008 0x58 ./Core/Src/ads1015_driver.o + 0x08002008 ADS1015_History_Average .text.ADS1015_Process_Sample - 0x08001970 0x138 ./Core/Src/ads1015_driver.o - 0x08001970 ADS1015_Process_Sample + 0x08002060 0x130 ./Core/Src/ads1015_driver.o + 0x08002060 ADS1015_Process_Sample .text.ADS1015_pH_NewSample - 0x08001aa8 0x1c ./Core/Src/ads1015_driver.o - 0x08001aa8 ADS1015_pH_NewSample + 0x08002190 0x1c ./Core/Src/ads1015_driver.o + 0x08002190 ADS1015_pH_NewSample .text.digital_outputs_init - 0x08001ac4 0x84 ./Core/Src/digital_outputs_driver.o - 0x08001ac4 digital_outputs_init + 0x080021ac 0x84 ./Core/Src/digital_outputs_driver.o + 0x080021ac digital_outputs_init .text.digital_outputs_set_state - 0x08001b48 0x70 ./Core/Src/digital_outputs_driver.o - 0x08001b48 digital_outputs_set_state + 0x08002230 0x70 ./Core/Src/digital_outputs_driver.o + 0x08002230 digital_outputs_set_state .text.digital_outputs_toggle - 0x08001bb8 0x3c ./Core/Src/digital_outputs_driver.o - 0x08001bb8 digital_outputs_toggle + 0x080022a0 0x3c ./Core/Src/digital_outputs_driver.o + 0x080022a0 digital_outputs_toggle .text.MX_GPIO_Init - 0x08001bf4 0x140 ./Core/Src/gpio.o - 0x08001bf4 MX_GPIO_Init + 0x080022dc 0x140 ./Core/Src/gpio.o + 0x080022dc MX_GPIO_Init .text.MX_I2C1_Init - 0x08001d34 0x5c ./Core/Src/i2c.o - 0x08001d34 MX_I2C1_Init + 0x0800241c 0x5c ./Core/Src/i2c.o + 0x0800241c MX_I2C1_Init .text.MX_I2C2_Init - 0x08001d90 0x5c ./Core/Src/i2c.o - 0x08001d90 MX_I2C2_Init + 0x08002478 0x5c ./Core/Src/i2c.o + 0x08002478 MX_I2C2_Init .text.HAL_I2C_MspInit - 0x08001dec 0xd8 ./Core/Src/i2c.o - 0x08001dec HAL_I2C_MspInit - .text.main 0x08001ec4 0x2a0 ./Core/Src/main.o - 0x08001ec4 main + 0x080024d4 0xd8 ./Core/Src/i2c.o + 0x080024d4 HAL_I2C_MspInit + .text.main 0x080025ac 0x280 ./Core/Src/main.o + 0x080025ac main .text.SystemClock_Config - 0x08002164 0xa0 ./Core/Src/main.o - 0x08002164 SystemClock_Config + 0x0800282c 0xa0 ./Core/Src/main.o + 0x0800282c SystemClock_Config + .text.FloatToString + 0x080028cc 0x228 ./Core/Src/main.o + 0x080028cc FloatToString .text.intToStr - 0x08002204 0x198 ./Core/Src/main.o - 0x08002204 intToStr + 0x08002af4 0x198 ./Core/Src/main.o + 0x08002af4 intToStr .text.HAL_TIM_PeriodElapsedCallback - 0x0800239c 0x30 ./Core/Src/main.o - 0x0800239c HAL_TIM_PeriodElapsedCallback + 0x08002c8c 0x30 ./Core/Src/main.o + 0x08002c8c HAL_TIM_PeriodElapsedCallback .text.Error_Handler - 0x080023cc 0xc ./Core/Src/main.o - 0x080023cc Error_Handler + 0x08002cbc 0xc ./Core/Src/main.o + 0x08002cbc Error_Handler .text.LL_GPIO_ReadInputPort - 0x080023d8 0x16 ./Core/Src/rs485_driver.o - *fill* 0x080023ee 0x2 + 0x08002cc8 0x16 ./Core/Src/rs485_driver.o + *fill* 0x08002cde 0x2 .text.rs485_init - 0x080023f0 0x20 ./Core/Src/rs485_driver.o - 0x080023f0 rs485_init + 0x08002ce0 0x20 ./Core/Src/rs485_driver.o + 0x08002ce0 rs485_init .text.rs485_get_address - 0x08002410 0x38 ./Core/Src/rs485_driver.o - 0x08002410 rs485_get_address + 0x08002d00 0x38 ./Core/Src/rs485_driver.o + 0x08002d00 rs485_get_address .text.rs485_send_broadcast - 0x08002448 0x48 ./Core/Src/rs485_driver.o - 0x08002448 rs485_send_broadcast + 0x08002d38 0x48 ./Core/Src/rs485_driver.o + 0x08002d38 rs485_send_broadcast .text.rs485_enable_tx - 0x08002490 0x18 ./Core/Src/rs485_driver.o - 0x08002490 rs485_enable_tx + 0x08002d80 0x18 ./Core/Src/rs485_driver.o + 0x08002d80 rs485_enable_tx .text.rs485_disable_tx - 0x080024a8 0x18 ./Core/Src/rs485_driver.o - 0x080024a8 rs485_disable_tx + 0x08002d98 0x18 ./Core/Src/rs485_driver.o + 0x08002d98 rs485_disable_tx .text.rs485_configure_gpio_address - 0x080024c0 0x8c ./Core/Src/rs485_driver.o + 0x08002db0 0x8c ./Core/Src/rs485_driver.o .text.rs485_configure_usart1 - 0x0800254c 0x74 ./Core/Src/rs485_driver.o + 0x08002e3c 0x74 ./Core/Src/rs485_driver.o .text.HAL_MspInit - 0x080025c0 0x64 ./Core/Src/stm32f1xx_hal_msp.o - 0x080025c0 HAL_MspInit + 0x08002eb0 0x64 ./Core/Src/stm32f1xx_hal_msp.o + 0x08002eb0 HAL_MspInit .text.NMI_Handler - 0x08002624 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002624 NMI_Handler + 0x08002f14 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002f14 NMI_Handler .text.HardFault_Handler - 0x0800262c 0x8 ./Core/Src/stm32f1xx_it.o - 0x0800262c HardFault_Handler + 0x08002f1c 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002f1c HardFault_Handler .text.MemManage_Handler - 0x08002634 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002634 MemManage_Handler + 0x08002f24 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002f24 MemManage_Handler .text.BusFault_Handler - 0x0800263c 0x8 ./Core/Src/stm32f1xx_it.o - 0x0800263c BusFault_Handler + 0x08002f2c 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002f2c BusFault_Handler .text.UsageFault_Handler - 0x08002644 0x8 ./Core/Src/stm32f1xx_it.o - 0x08002644 UsageFault_Handler + 0x08002f34 0x8 ./Core/Src/stm32f1xx_it.o + 0x08002f34 UsageFault_Handler .text.SVC_Handler - 0x0800264c 0xc ./Core/Src/stm32f1xx_it.o - 0x0800264c SVC_Handler + 0x08002f3c 0xc ./Core/Src/stm32f1xx_it.o + 0x08002f3c SVC_Handler .text.DebugMon_Handler - 0x08002658 0xc ./Core/Src/stm32f1xx_it.o - 0x08002658 DebugMon_Handler + 0x08002f48 0xc ./Core/Src/stm32f1xx_it.o + 0x08002f48 DebugMon_Handler .text.PendSV_Handler - 0x08002664 0xc ./Core/Src/stm32f1xx_it.o - 0x08002664 PendSV_Handler + 0x08002f54 0xc ./Core/Src/stm32f1xx_it.o + 0x08002f54 PendSV_Handler .text.SysTick_Handler - 0x08002670 0xc ./Core/Src/stm32f1xx_it.o - 0x08002670 SysTick_Handler + 0x08002f60 0xc ./Core/Src/stm32f1xx_it.o + 0x08002f60 SysTick_Handler .text.TIM3_IRQHandler - 0x0800267c 0x14 ./Core/Src/stm32f1xx_it.o - 0x0800267c TIM3_IRQHandler + 0x08002f6c 0x14 ./Core/Src/stm32f1xx_it.o + 0x08002f6c TIM3_IRQHandler .text.USART1_IRQHandler - 0x08002690 0x14 ./Core/Src/stm32f1xx_it.o - 0x08002690 USART1_IRQHandler + 0x08002f80 0x14 ./Core/Src/stm32f1xx_it.o + 0x08002f80 USART1_IRQHandler .text.SystemInit - 0x080026a4 0xc ./Core/Src/system_stm32f1xx.o - 0x080026a4 SystemInit + 0x08002f94 0xc ./Core/Src/system_stm32f1xx.o + 0x08002f94 SystemInit .text.MX_TIM3_Init - 0x080026b0 0x9c ./Core/Src/tim.o - 0x080026b0 MX_TIM3_Init + 0x08002fa0 0x9c ./Core/Src/tim.o + 0x08002fa0 MX_TIM3_Init .text.HAL_TIM_Base_MspInit - 0x0800274c 0x4c ./Core/Src/tim.o - 0x0800274c HAL_TIM_Base_MspInit + 0x0800303c 0x4c ./Core/Src/tim.o + 0x0800303c HAL_TIM_Base_MspInit .text.MX_USART1_UART_Init - 0x08002798 0x54 ./Core/Src/usart.o - 0x08002798 MX_USART1_UART_Init + 0x08003088 0x54 ./Core/Src/usart.o + 0x08003088 MX_USART1_UART_Init .text.HAL_UART_MspInit - 0x080027ec 0xa8 ./Core/Src/usart.o - 0x080027ec HAL_UART_MspInit + 0x080030dc 0xa8 ./Core/Src/usart.o + 0x080030dc HAL_UART_MspInit .text.Reset_Handler - 0x08002894 0x48 ./Core/Startup/startup_stm32f103c8tx.o - 0x08002894 Reset_Handler + 0x08003184 0x48 ./Core/Startup/startup_stm32f103c8tx.o + 0x08003184 Reset_Handler .text.Default_Handler - 0x080028dc 0x2 ./Core/Startup/startup_stm32f103c8tx.o - 0x080028dc RTC_Alarm_IRQHandler - 0x080028dc EXTI2_IRQHandler - 0x080028dc TIM1_CC_IRQHandler - 0x080028dc PVD_IRQHandler - 0x080028dc EXTI3_IRQHandler - 0x080028dc EXTI0_IRQHandler - 0x080028dc I2C2_EV_IRQHandler - 0x080028dc ADC1_2_IRQHandler - 0x080028dc SPI1_IRQHandler - 0x080028dc TAMPER_IRQHandler - 0x080028dc DMA1_Channel4_IRQHandler - 0x080028dc USART3_IRQHandler - 0x080028dc RTC_IRQHandler - 0x080028dc DMA1_Channel7_IRQHandler - 0x080028dc CAN1_RX1_IRQHandler - 0x080028dc TIM4_IRQHandler - 0x080028dc I2C1_EV_IRQHandler - 0x080028dc DMA1_Channel6_IRQHandler - 0x080028dc RCC_IRQHandler - 0x080028dc TIM1_TRG_COM_IRQHandler - 0x080028dc DMA1_Channel1_IRQHandler - 0x080028dc Default_Handler - 0x080028dc EXTI15_10_IRQHandler - 0x080028dc EXTI9_5_IRQHandler - 0x080028dc SPI2_IRQHandler - 0x080028dc DMA1_Channel5_IRQHandler - 0x080028dc EXTI4_IRQHandler - 0x080028dc USB_LP_CAN1_RX0_IRQHandler - 0x080028dc USB_HP_CAN1_TX_IRQHandler - 0x080028dc DMA1_Channel3_IRQHandler - 0x080028dc TIM1_UP_IRQHandler - 0x080028dc WWDG_IRQHandler - 0x080028dc TIM2_IRQHandler - 0x080028dc TIM1_BRK_IRQHandler - 0x080028dc EXTI1_IRQHandler - 0x080028dc USART2_IRQHandler - 0x080028dc I2C2_ER_IRQHandler - 0x080028dc DMA1_Channel2_IRQHandler - 0x080028dc CAN1_SCE_IRQHandler - 0x080028dc FLASH_IRQHandler - 0x080028dc I2C1_ER_IRQHandler - 0x080028dc USBWakeUp_IRQHandler - *fill* 0x080028de 0x2 + 0x080031cc 0x2 ./Core/Startup/startup_stm32f103c8tx.o + 0x080031cc RTC_Alarm_IRQHandler + 0x080031cc EXTI2_IRQHandler + 0x080031cc TIM1_CC_IRQHandler + 0x080031cc PVD_IRQHandler + 0x080031cc EXTI3_IRQHandler + 0x080031cc EXTI0_IRQHandler + 0x080031cc I2C2_EV_IRQHandler + 0x080031cc ADC1_2_IRQHandler + 0x080031cc SPI1_IRQHandler + 0x080031cc TAMPER_IRQHandler + 0x080031cc DMA1_Channel4_IRQHandler + 0x080031cc USART3_IRQHandler + 0x080031cc RTC_IRQHandler + 0x080031cc DMA1_Channel7_IRQHandler + 0x080031cc CAN1_RX1_IRQHandler + 0x080031cc TIM4_IRQHandler + 0x080031cc I2C1_EV_IRQHandler + 0x080031cc DMA1_Channel6_IRQHandler + 0x080031cc RCC_IRQHandler + 0x080031cc TIM1_TRG_COM_IRQHandler + 0x080031cc DMA1_Channel1_IRQHandler + 0x080031cc Default_Handler + 0x080031cc EXTI15_10_IRQHandler + 0x080031cc EXTI9_5_IRQHandler + 0x080031cc SPI2_IRQHandler + 0x080031cc DMA1_Channel5_IRQHandler + 0x080031cc EXTI4_IRQHandler + 0x080031cc USB_LP_CAN1_RX0_IRQHandler + 0x080031cc USB_HP_CAN1_TX_IRQHandler + 0x080031cc DMA1_Channel3_IRQHandler + 0x080031cc TIM1_UP_IRQHandler + 0x080031cc WWDG_IRQHandler + 0x080031cc TIM2_IRQHandler + 0x080031cc TIM1_BRK_IRQHandler + 0x080031cc EXTI1_IRQHandler + 0x080031cc USART2_IRQHandler + 0x080031cc I2C2_ER_IRQHandler + 0x080031cc DMA1_Channel2_IRQHandler + 0x080031cc CAN1_SCE_IRQHandler + 0x080031cc FLASH_IRQHandler + 0x080031cc I2C1_ER_IRQHandler + 0x080031cc USBWakeUp_IRQHandler + *fill* 0x080031ce 0x2 .text.HAL_Init - 0x080028e0 0x2c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x080028e0 HAL_Init + 0x080031d0 0x2c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x080031d0 HAL_Init .text.HAL_InitTick - 0x0800290c 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x0800290c HAL_InitTick + 0x080031fc 0x60 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x080031fc HAL_InitTick .text.HAL_IncTick - 0x0800296c 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x0800296c HAL_IncTick + 0x0800325c 0x24 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x0800325c HAL_IncTick .text.HAL_GetTick - 0x08002990 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x08002990 HAL_GetTick + 0x08003280 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08003280 HAL_GetTick .text.HAL_Delay - 0x080029a4 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x080029a4 HAL_Delay + 0x08003294 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x08003294 HAL_Delay .text.HAL_ADC_Init - 0x080029ec 0x1b0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x080029ec HAL_ADC_Init + 0x080032dc 0x1b0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x080032dc HAL_ADC_Init .text.HAL_ADC_ConfigChannel - 0x08002b9c 0x1f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x08002b9c HAL_ADC_ConfigChannel + 0x0800348c 0x1f0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x0800348c HAL_ADC_ConfigChannel .text.ADC_ConversionStop_Disable - 0x08002d8c 0x82 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - 0x08002d8c ADC_ConversionStop_Disable - *fill* 0x08002e0e 0x2 + 0x0800367c 0x82 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x0800367c ADC_ConversionStop_Disable + *fill* 0x080036fe 0x2 .text.__NVIC_SetPriorityGrouping - 0x08002e10 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003700 0x48 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_GetPriorityGrouping - 0x08002e58 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003748 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_EnableIRQ - 0x08002e74 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003764 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.__NVIC_SetPriority - 0x08002eac 0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x0800379c 0x54 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.NVIC_EncodePriority - 0x08002f00 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080037f0 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.SysTick_Config - 0x08002f64 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003854 0x44 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .text.HAL_NVIC_SetPriorityGrouping - 0x08002fa8 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08002fa8 HAL_NVIC_SetPriorityGrouping + 0x08003898 0x16 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003898 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x08002fbe 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08002fbe HAL_NVIC_SetPriority + 0x080038ae 0x38 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080038ae HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08002ff6 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08002ff6 HAL_NVIC_EnableIRQ + 0x080038e6 0x1c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x080038e6 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08003012 0x18 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - 0x08003012 HAL_SYSTICK_Config + 0x08003902 0x18 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x08003902 HAL_SYSTICK_Config .text.HAL_DMA_Abort - 0x0800302a 0x76 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x0800302a HAL_DMA_Abort + 0x0800391a 0x76 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x0800391a HAL_DMA_Abort .text.HAL_DMA_Abort_IT - 0x080030a0 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - 0x080030a0 HAL_DMA_Abort_IT + 0x08003990 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x08003990 HAL_DMA_Abort_IT .text.HAL_GPIO_Init - 0x08003190 0x308 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08003190 HAL_GPIO_Init + 0x08003a80 0x308 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003a80 HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x08003498 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x08003498 HAL_GPIO_ReadPin + 0x08003d88 0x2e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003d88 HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x080034c6 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x080034c6 HAL_GPIO_WritePin + 0x08003db6 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003db6 HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x080034f6 0x32 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - 0x080034f6 HAL_GPIO_TogglePin + 0x08003de6 0x32 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x08003de6 HAL_GPIO_TogglePin .text.HAL_I2C_Init - 0x08003528 0x288 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x08003528 HAL_I2C_Init + 0x08003e18 0x288 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08003e18 HAL_I2C_Init .text.HAL_I2C_Master_Transmit - 0x080037b0 0x1fc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x080037b0 HAL_I2C_Master_Transmit + 0x080040a0 0x1fc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x080040a0 HAL_I2C_Master_Transmit .text.HAL_I2C_Master_Receive - 0x080039ac 0x4d8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - 0x080039ac HAL_I2C_Master_Receive + 0x0800429c 0x4d8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x0800429c HAL_I2C_Master_Receive .text.I2C_MasterRequestWrite - 0x08003e84 0x104 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004774 0x104 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_MasterRequestRead - 0x08003f88 0x19c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004878 0x19c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnFlagUntilTimeout - 0x08004124 0xf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004a14 0xf4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnMasterAddressFlagUntilTimeout - 0x08004218 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004b08 0x140 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnTXEFlagUntilTimeout - 0x08004358 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004c48 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnBTFFlagUntilTimeout - 0x080043e8 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004cd8 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_WaitOnRXNEFlagUntilTimeout - 0x08004478 0xba ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x08004d68 0xba ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .text.I2C_IsAcknowledgeFailed - 0x08004532 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - *fill* 0x0800458e 0x2 + 0x08004e22 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + *fill* 0x08004e7e 0x2 .text.HAL_RCC_OscConfig - 0x08004590 0x504 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004590 HAL_RCC_OscConfig + 0x08004e80 0x504 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08004e80 HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x08004a94 0x1d4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004a94 HAL_RCC_ClockConfig + 0x08005384 0x1d4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005384 HAL_RCC_ClockConfig .text.HAL_RCC_GetSysClockFreq - 0x08004c68 0xac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004c68 HAL_RCC_GetSysClockFreq + 0x08005558 0xac ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005558 HAL_RCC_GetSysClockFreq .text.HAL_RCC_GetHCLKFreq - 0x08004d14 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004d14 HAL_RCC_GetHCLKFreq + 0x08005604 0x14 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005604 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x08004d28 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004d28 HAL_RCC_GetPCLK1Freq + 0x08005618 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005618 HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x08004d50 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - 0x08004d50 HAL_RCC_GetPCLK2Freq + 0x08005640 0x28 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005640 HAL_RCC_GetPCLK2Freq .text.RCC_Delay - 0x08004d78 0x3c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x08005668 0x3c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .text.HAL_RCCEx_PeriphCLKConfig - 0x08004db4 0x16c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - 0x08004db4 HAL_RCCEx_PeriphCLKConfig + 0x080056a4 0x16c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + 0x080056a4 HAL_RCCEx_PeriphCLKConfig .text.HAL_TIM_Base_Init - 0x08004f20 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004f20 HAL_TIM_Base_Init - *fill* 0x08004fbe 0x2 + 0x08005810 0x9e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005810 HAL_TIM_Base_Init + *fill* 0x080058ae 0x2 .text.HAL_TIM_Base_Start_IT - 0x08004fc0 0xa4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08004fc0 HAL_TIM_Base_Start_IT + 0x080058b0 0xa4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x080058b0 HAL_TIM_Base_Start_IT .text.HAL_TIM_IRQHandler - 0x08005064 0x1e0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08005064 HAL_TIM_IRQHandler + 0x08005954 0x1e0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005954 HAL_TIM_IRQHandler .text.HAL_TIM_ConfigClockSource - 0x08005244 0x18e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08005244 HAL_TIM_ConfigClockSource + 0x08005b34 0x18e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005b34 HAL_TIM_ConfigClockSource .text.HAL_TIM_OC_DelayElapsedCallback - 0x080053d2 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x080053d2 HAL_TIM_OC_DelayElapsedCallback + 0x08005cc2 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005cc2 HAL_TIM_OC_DelayElapsedCallback .text.HAL_TIM_IC_CaptureCallback - 0x080053e4 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x080053e4 HAL_TIM_IC_CaptureCallback + 0x08005cd4 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005cd4 HAL_TIM_IC_CaptureCallback .text.HAL_TIM_PWM_PulseFinishedCallback - 0x080053f6 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x080053f6 HAL_TIM_PWM_PulseFinishedCallback + 0x08005ce6 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005ce6 HAL_TIM_PWM_PulseFinishedCallback .text.HAL_TIM_TriggerCallback - 0x08005408 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x08005408 HAL_TIM_TriggerCallback - *fill* 0x0800541a 0x2 + 0x08005cf8 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005cf8 HAL_TIM_TriggerCallback + *fill* 0x08005d0a 0x2 .text.TIM_Base_SetConfig - 0x0800541c 0xdc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x0800541c TIM_Base_SetConfig + 0x08005d0c 0xdc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005d0c TIM_Base_SetConfig .text.TIM_TI1_ConfigInputStage - 0x080054f8 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005de8 0x5c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .text.TIM_TI2_ConfigInputStage - 0x08005554 0x5e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005e44 0x5e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .text.TIM_ITRx_SetConfig - 0x080055b2 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005ea2 0x34 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .text.TIM_ETR_SetConfig - 0x080055e6 0x3e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - 0x080055e6 TIM_ETR_SetConfig + 0x08005ed6 0x3e ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x08005ed6 TIM_ETR_SetConfig .text.HAL_TIMEx_MasterConfigSynchronization - 0x08005624 0xbc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - 0x08005624 HAL_TIMEx_MasterConfigSynchronization + 0x08005f14 0xbc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x08005f14 HAL_TIMEx_MasterConfigSynchronization .text.HAL_TIMEx_CommutCallback - 0x080056e0 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - 0x080056e0 HAL_TIMEx_CommutCallback + 0x08005fd0 0x12 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x08005fd0 HAL_TIMEx_CommutCallback .text.HAL_TIMEx_BreakCallback - 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0x0 - 0x08006650 . = ALIGN (0x4) +.ARM.extab 0x08006f40 0x0 + 0x08006f40 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x08006650 . = ALIGN (0x4) + 0x08006f40 . = ALIGN (0x4) -.ARM 0x08006650 0x8 - 0x08006650 . = ALIGN (0x4) - 0x08006650 __exidx_start = . +.ARM 0x08006f40 0x8 + 0x08006f40 . = ALIGN (0x4) + 0x08006f40 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x08006650 0x8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) - 0x08006658 __exidx_end = . - 0x08006658 . = ALIGN (0x4) + .ARM.exidx 0x08006f40 0x8 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-strlen.o) + 0x08006f48 __exidx_end = . + 0x08006f48 . = ALIGN (0x4) -.preinit_array 0x08006658 0x0 - 0x08006658 . = ALIGN (0x4) - 0x08006658 PROVIDE (__preinit_array_start = .) +.preinit_array 0x08006f48 0x0 + 0x08006f48 . = ALIGN (0x4) + 0x08006f48 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x08006658 PROVIDE (__preinit_array_end = .) - 0x08006658 . = ALIGN (0x4) + 0x08006f48 PROVIDE (__preinit_array_end = .) + 0x08006f48 . = ALIGN (0x4) -.init_array 0x08006658 0x4 - 0x08006658 . = ALIGN (0x4) - 0x08006658 PROVIDE (__init_array_start = .) +.init_array 0x08006f48 0x4 + 0x08006f48 . = ALIGN (0x4) + 0x08006f48 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x08006658 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o - 0x0800665c PROVIDE (__init_array_end = .) - 0x0800665c . = ALIGN (0x4) + .init_array 0x08006f48 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + 0x08006f4c PROVIDE (__init_array_end = .) + 0x08006f4c . = ALIGN (0x4) -.fini_array 0x0800665c 0x4 - 0x0800665c . = ALIGN (0x4) +.fini_array 0x08006f4c 0x4 + 0x08006f4c . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0800665c 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o + .fini_array 0x08006f4c 0x4 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x08006660 . = ALIGN (0x4) - 0x08006660 _sidata = LOADADDR (.data) + 0x08006f50 . = ALIGN (0x4) + 0x08006f50 _sidata = LOADADDR (.data) -.rel.dyn 0x08006660 0x0 - .rel.iplt 0x08006660 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o +.rel.dyn 0x08006f50 0x0 + .rel.iplt 0x08006f50 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o -.data 0x20000000 0x60 load address 0x08006660 +.data 0x20000000 0x60 load address 0x08006f50 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -5081,11 +5101,11 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte 0x20000060 . = ALIGN (0x4) 0x20000060 _edata = . -.igot.plt 0x20000060 0x0 load address 0x080066c0 +.igot.plt 0x20000060 0x0 load address 0x08006fb0 .igot.plt 0x20000060 0x0 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtbegin.o 0x20000060 . = ALIGN (0x4) -.bss 0x20000060 0x690 load address 0x080066c0 +.bss 0x20000060 0x650 load address 0x08006fb0 0x20000060 _sbss = . 0x20000060 __bss_start__ = _sbss *(.bss) @@ -5125,69 +5145,66 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .bss.g_ref_100R_MidGain_filter 0x200001a0 0x5c ./Core/Src/ad5934_driver.o 0x200001a0 g_ref_100R_MidGain_filter - .bss.g_ref_100R_HighGain_filter - 0x200001fc 0x5c ./Core/Src/ad5934_driver.o - 0x200001fc g_ref_100R_HighGain_filter .bss.g_ref_1K_MidGain_filter - 0x20000258 0x5c ./Core/Src/ad5934_driver.o - 0x20000258 g_ref_1K_MidGain_filter + 0x200001fc 0x5c ./Core/Src/ad5934_driver.o + 0x200001fc g_ref_1K_MidGain_filter .bss.g_ref_1K_HighGain_filter - 0x200002b4 0x5c ./Core/Src/ad5934_driver.o - 0x200002b4 g_ref_1K_HighGain_filter + 0x20000258 0x5c ./Core/Src/ad5934_driver.o + 0x20000258 g_ref_1K_HighGain_filter .bss.g_ref_10K_HighGain_filter - 0x20000310 0x5c ./Core/Src/ad5934_driver.o - 0x20000310 g_ref_10K_HighGain_filter - .bss.hadc1 0x2000036c 0x30 ./Core/Src/adc.o - 0x2000036c hadc1 - .bss.hadc2 0x2000039c 0x30 ./Core/Src/adc.o - 0x2000039c hadc2 + 0x200002b4 0x5c ./Core/Src/ad5934_driver.o + 0x200002b4 g_ref_10K_HighGain_filter + .bss.hadc1 0x20000310 0x30 ./Core/Src/adc.o + 0x20000310 hadc1 + .bss.hadc2 0x20000340 0x30 ./Core/Src/adc.o + 0x20000340 hadc2 .bss.i2c_ads1015 - 0x200003cc 0x10 ./Core/Src/ads1015_driver.o - 0x200003cc i2c_ads1015 + 0x20000370 0x10 ./Core/Src/ads1015_driver.o + 0x20000370 i2c_ads1015 .bss.g_ph_filter - 0x200003dc 0x40 ./Core/Src/ads1015_driver.o - 0x200003dc g_ph_filter + 0x20000380 0x5c ./Core/Src/ads1015_driver.o + 0x20000380 g_ph_filter .bss.ads1015_state - 0x2000041c 0x1 ./Core/Src/ads1015_driver.o - 0x2000041c ads1015_state - *fill* 0x2000041d 0x3 + 0x200003dc 0x1 ./Core/Src/ads1015_driver.o + 0x200003dc ads1015_state + *fill* 0x200003dd 0x3 .bss.sample_count.1 - 0x20000420 0x4 ./Core/Src/ads1015_driver.o + 0x200003e0 0x4 ./Core/Src/ads1015_driver.o .bss.state_timer.0 - 0x20000424 0x4 ./Core/Src/ads1015_driver.o + 0x200003e4 0x4 ./Core/Src/ads1015_driver.o .bss.pin_states - 0x20000428 0x8 ./Core/Src/digital_outputs_driver.o - .bss.hi2c1 0x20000430 0x54 ./Core/Src/i2c.o - 0x20000430 hi2c1 - .bss.hi2c2 0x20000484 0x54 ./Core/Src/i2c.o - 0x20000484 hi2c2 + 0x200003e8 0x8 ./Core/Src/digital_outputs_driver.o + .bss.hi2c1 0x200003f0 0x54 ./Core/Src/i2c.o + 0x200003f0 hi2c1 + .bss.hi2c2 0x20000444 0x54 ./Core/Src/i2c.o + 0x20000444 hi2c2 .bss.device_address - 0x200004d8 0x3 ./Core/Src/rs485_driver.o - *fill* 0x200004db 0x1 - .bss.huart1 0x200004dc 0x48 ./Core/Src/rs485_driver.o - .bss.htim3 0x20000524 0x48 ./Core/Src/tim.o - 0x20000524 htim3 - .bss.huart1 0x2000056c 0x48 ./Core/Src/usart.o - 0x2000056c huart1 - .bss.uwTick 0x200005b4 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - 0x200005b4 uwTick - .bss.__sf 0x200005b8 0x138 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) - 0x200005b8 __sf + 0x20000498 0x3 ./Core/Src/rs485_driver.o + *fill* 0x2000049b 0x1 + .bss.huart1 0x2000049c 0x48 ./Core/Src/rs485_driver.o + .bss.htim3 0x200004e4 0x48 ./Core/Src/tim.o + 0x200004e4 htim3 + .bss.huart1 0x2000052c 0x48 ./Core/Src/usart.o + 0x2000052c huart1 + .bss.uwTick 0x20000574 0x4 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x20000574 uwTick + .bss.__sf 0x20000578 0x138 C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc_nano.a(libc_a-findfp.o) + 0x20000578 __sf *(COMMON) - 0x200006f0 . = ALIGN (0x4) - 0x200006f0 _ebss = . - 0x200006f0 __bss_end__ = _ebss + 0x200006b0 . = ALIGN (0x4) + 0x200006b0 _ebss = . + 0x200006b0 __bss_end__ = _ebss ._user_heap_stack - 0x200006f0 0x600 load address 0x080066c0 - 0x200006f0 . = ALIGN (0x8) + 0x200006b0 0x600 load address 0x08006fb0 + 0x200006b0 . = ALIGN (0x8) [!provide] PROVIDE (end = .) - 0x200006f0 PROVIDE (_end = .) - 0x200008f0 . = (. + _Min_Heap_Size) - *fill* 0x200006f0 0x200 - 0x20000cf0 . = (. + _Min_Stack_Size) - *fill* 0x200008f0 0x400 - 0x20000cf0 . = ALIGN (0x8) + 0x200006b0 PROVIDE (_end = .) + 0x200008b0 . = (. + _Min_Heap_Size) + *fill* 0x200006b0 0x200 + 0x20000cb0 . = (. + _Min_Stack_Size) + *fill* 0x200008b0 0x400 + 0x20000cb0 . = ALIGN (0x8) /DISCARD/ libc.a(*) @@ -5270,49 +5287,57 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .ARM.attributes 0x000005f5 0x2d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a(libm_a-sf_round.o) .ARM.attributes - 0x00000622 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o) + 0x00000622 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldf3.o) .ARM.attributes - 0x0000063f 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o) + 0x0000063f 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubdf3.o) .ARM.attributes - 0x0000065c 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o) + 0x0000065c 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpdf2.o) .ARM.attributes - 0x00000679 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) + 0x00000679 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixdfsi.o) .ARM.attributes - 0x00000696 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o) + 0x00000696 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_addsubsf3.o) .ARM.attributes - 0x000006b3 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtn.o + 0x000006b3 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_muldivsf3.o) + .ARM.attributes + 0x000006d0 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_cmpsf2.o) + .ARM.attributes + 0x000006ed 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_unordsf2.o) + .ARM.attributes + 0x0000070a 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a(_arm_fixunssfsi.o) + .ARM.attributes + 0x00000727 0x1d C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp/crtn.o OUTPUT(Fertirrega_v6.elf elf32-littlearm) LOAD linker stubs LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libc.a LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp\libm.a LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7-m/nofp\libgcc.a -.debug_info 0x00000000 0x13f39 - .debug_info 0x00000000 0x1867 ./Core/Src/ad5934_driver.o - .debug_info 0x00001867 0x825 ./Core/Src/adc.o - .debug_info 0x0000208c 0xb4a ./Core/Src/ads1015_driver.o - .debug_info 0x00002bd6 0x3c2 ./Core/Src/digital_outputs_driver.o - .debug_info 0x00002f98 0x396 ./Core/Src/gpio.o - .debug_info 0x0000332e 0x83b ./Core/Src/i2c.o - .debug_info 0x00003b69 0x11d7 ./Core/Src/main.o - .debug_info 0x00004d40 0x993 ./Core/Src/rs485_driver.o - .debug_info 0x000056d3 0x1f1 ./Core/Src/stm32f1xx_hal_msp.o - .debug_info 0x000058c4 0x94c ./Core/Src/stm32f1xx_it.o - .debug_info 0x00006210 0x222 ./Core/Src/system_stm32f1xx.o - .debug_info 0x00006432 0x9bb ./Core/Src/tim.o - .debug_info 0x00006ded 0x92a ./Core/Src/usart.o - .debug_info 0x00007717 0x30 ./Core/Startup/startup_stm32f103c8tx.o - .debug_info 0x00007747 0x704 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_info 0x00007e4b 0xc50 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_info 0x00008a9b 0xa87 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_info 0x00009522 0x6d2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_info 0x00009bf4 0x5ab ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_info 0x0000a19f 0x2524 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_info 0x0000c6c3 0x7d5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_info 0x0000ce98 0x3c0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_info 0x0000d258 0x2959 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_info 0x0000fbb1 0x149b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_info 0x0001104c 0x2eed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o +.debug_info 0x00000000 0x13ed4 + .debug_info 0x00000000 0x1829 ./Core/Src/ad5934_driver.o + .debug_info 0x00001829 0x825 ./Core/Src/adc.o + .debug_info 0x0000204e 0xb5a ./Core/Src/ads1015_driver.o + .debug_info 0x00002ba8 0x3c2 ./Core/Src/digital_outputs_driver.o + .debug_info 0x00002f6a 0x396 ./Core/Src/gpio.o + .debug_info 0x00003300 0x83b ./Core/Src/i2c.o + .debug_info 0x00003b3b 0x11a0 ./Core/Src/main.o + .debug_info 0x00004cdb 0x993 ./Core/Src/rs485_driver.o + .debug_info 0x0000566e 0x1f1 ./Core/Src/stm32f1xx_hal_msp.o + .debug_info 0x0000585f 0x94c ./Core/Src/stm32f1xx_it.o + .debug_info 0x000061ab 0x222 ./Core/Src/system_stm32f1xx.o + .debug_info 0x000063cd 0x9bb ./Core/Src/tim.o + .debug_info 0x00006d88 0x92a ./Core/Src/usart.o + .debug_info 0x000076b2 0x30 ./Core/Startup/startup_stm32f103c8tx.o + .debug_info 0x000076e2 0x704 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_info 0x00007de6 0xc50 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_info 0x00008a36 0xa87 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_info 0x000094bd 0x6d2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_info 0x00009b8f 0x5ab ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_info 0x0000a13a 0x2524 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_info 0x0000c65e 0x7d5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_info 0x0000ce33 0x3c0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_info 0x0000d1f3 0x2959 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_info 0x0000fb4c 0x149b ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_info 0x00010fe7 0x2eed ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_abbrev 0x00000000 0x3341 .debug_abbrev 0x00000000 0x30f ./Core/Src/ad5934_driver.o @@ -5341,112 +5366,112 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .debug_abbrev 0x00002dc7 0x282 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o .debug_abbrev 0x00003049 0x2f8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_aranges 0x00000000 0x12c0 +.debug_aranges 0x00000000 0x12b8 .debug_aranges - 0x00000000 0x138 ./Core/Src/ad5934_driver.o + 0x00000000 0x130 ./Core/Src/ad5934_driver.o .debug_aranges - 0x00000138 0x38 ./Core/Src/adc.o + 0x00000130 0x38 ./Core/Src/adc.o .debug_aranges - 0x00000170 0x68 ./Core/Src/ads1015_driver.o + 0x00000168 0x68 ./Core/Src/ads1015_driver.o .debug_aranges - 0x000001d8 0x40 ./Core/Src/digital_outputs_driver.o + 0x000001d0 0x40 ./Core/Src/digital_outputs_driver.o .debug_aranges - 0x00000218 0x28 ./Core/Src/gpio.o + 0x00000210 0x28 ./Core/Src/gpio.o .debug_aranges - 0x00000240 0x38 ./Core/Src/i2c.o + 0x00000238 0x38 ./Core/Src/i2c.o .debug_aranges - 0x00000278 0x50 ./Core/Src/main.o + 0x00000270 0x50 ./Core/Src/main.o .debug_aranges - 0x000002c8 0x68 ./Core/Src/rs485_driver.o + 0x000002c0 0x68 ./Core/Src/rs485_driver.o .debug_aranges - 0x00000330 0x20 ./Core/Src/stm32f1xx_hal_msp.o + 0x00000328 0x20 ./Core/Src/stm32f1xx_hal_msp.o .debug_aranges - 0x00000350 0x70 ./Core/Src/stm32f1xx_it.o + 0x00000348 0x70 ./Core/Src/stm32f1xx_it.o .debug_aranges - 0x000003c0 0x28 ./Core/Src/system_stm32f1xx.o + 0x000003b8 0x28 ./Core/Src/system_stm32f1xx.o .debug_aranges - 0x000003e8 0x30 ./Core/Src/tim.o + 0x000003e0 0x30 ./Core/Src/tim.o .debug_aranges - 0x00000418 0x30 ./Core/Src/usart.o + 0x00000410 0x30 ./Core/Src/usart.o .debug_aranges - 0x00000448 0x28 ./Core/Startup/startup_stm32f103c8tx.o + 0x00000440 0x28 ./Core/Startup/startup_stm32f103c8tx.o .debug_aranges - 0x00000470 0xe0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x00000468 0xe0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_aranges - 0x00000550 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x00000548 0xf0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_aranges - 0x00000640 0x100 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x00000638 0x100 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_aranges - 0x00000740 0x80 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x00000738 0x80 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_aranges - 0x000007c0 0x58 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x000007b8 0x58 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_aranges - 0x00000818 0x2a8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x00000810 0x2a8 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_aranges - 0x00000ac0 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x00000ab8 0x90 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_aranges - 0x00000b50 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + 0x00000b48 0x30 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_aranges - 0x00000b80 0x3d0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x00000b78 0x3d0 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .debug_aranges - 0x00000f50 0x168 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x00000f48 0x168 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o .debug_aranges - 0x000010b8 0x208 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x000010b0 0x208 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o .debug_rnglists - 0x00000000 0xeb7 + 0x00000000 0xeb1 .debug_rnglists - 0x00000000 0xf0 ./Core/Src/ad5934_driver.o + 0x00000000 0xea ./Core/Src/ad5934_driver.o .debug_rnglists - 0x000000f0 0x26 ./Core/Src/adc.o + 0x000000ea 0x26 ./Core/Src/adc.o .debug_rnglists - 0x00000116 0x5a ./Core/Src/ads1015_driver.o + 0x00000110 0x5a ./Core/Src/ads1015_driver.o .debug_rnglists - 0x00000170 0x2c ./Core/Src/digital_outputs_driver.o + 0x0000016a 0x2c ./Core/Src/digital_outputs_driver.o .debug_rnglists - 0x0000019c 0x1a ./Core/Src/gpio.o + 0x00000196 0x1a ./Core/Src/gpio.o .debug_rnglists - 0x000001b6 0x26 ./Core/Src/i2c.o + 0x000001b0 0x26 ./Core/Src/i2c.o .debug_rnglists - 0x000001dc 0x3b ./Core/Src/main.o + 0x000001d6 0x3b ./Core/Src/main.o .debug_rnglists - 0x00000217 0x4a ./Core/Src/rs485_driver.o + 0x00000211 0x4a ./Core/Src/rs485_driver.o .debug_rnglists - 0x00000261 0x13 ./Core/Src/stm32f1xx_hal_msp.o + 0x0000025b 0x13 ./Core/Src/stm32f1xx_hal_msp.o .debug_rnglists - 0x00000274 0x4f ./Core/Src/stm32f1xx_it.o + 0x0000026e 0x4f ./Core/Src/stm32f1xx_it.o .debug_rnglists - 0x000002c3 0x1a ./Core/Src/system_stm32f1xx.o + 0x000002bd 0x1a ./Core/Src/system_stm32f1xx.o .debug_rnglists - 0x000002dd 0x20 ./Core/Src/tim.o + 0x000002d7 0x20 ./Core/Src/tim.o .debug_rnglists - 0x000002fd 0x20 ./Core/Src/usart.o + 0x000002f7 0x20 ./Core/Src/usart.o .debug_rnglists - 0x0000031d 0x19 ./Core/Startup/startup_stm32f103c8tx.o + 0x00000317 0x19 ./Core/Startup/startup_stm32f103c8tx.o .debug_rnglists - 0x00000336 0xa3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + 0x00000330 0xa3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o .debug_rnglists - 0x000003d9 0xbc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + 0x000003d3 0xbc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o .debug_rnglists - 0x00000495 0xbb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + 0x0000048f 0xbb ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o .debug_rnglists - 0x00000550 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + 0x0000054a 0x64 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o .debug_rnglists - 0x000005b4 0x3f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + 0x000005ae 0x3f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o .debug_rnglists - 0x000005f3 0x23c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + 0x000005ed 0x23c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o .debug_rnglists - 0x0000082f 0x6c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + 0x00000829 0x6c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o .debug_rnglists - 0x0000089b 0x21 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + 0x00000895 0x21 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o .debug_rnglists - 0x000008bc 0x31a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + 0x000008b6 0x31a ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o .debug_rnglists - 0x00000bd6 0x125 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + 0x00000bd0 0x125 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o .debug_rnglists - 0x00000cfb 0x1bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + 0x00000cf5 0x1bc ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_macro 0x00000000 0x1a5e6 +.debug_macro 0x00000000 0x1a5df .debug_macro 0x00000000 0x2b8 ./Core/Src/ad5934_driver.o .debug_macro 0x000002b8 0xacc ./Core/Src/ad5934_driver.o .debug_macro 0x00000d84 0x227 ./Core/Src/ad5934_driver.o @@ -5506,95 +5531,95 @@ LOAD C:/ST/STM32CubeIDE_2.1.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.exte .debug_macro 0x00016e63 0x3c ./Core/Src/ad5934_driver.o .debug_macro 0x00016e9f 0x16 ./Core/Src/ad5934_driver.o .debug_macro 0x00016eb5 0x29 ./Core/Src/ad5934_driver.o - .debug_macro 0x00016ede 0x35a ./Core/Src/ad5934_driver.o - .debug_macro 0x00017238 0x1da ./Core/Src/adc.o - .debug_macro 0x00017412 0x1c8 ./Core/Src/adc.o - .debug_macro 0x000175da 0x2c9 ./Core/Src/ads1015_driver.o - .debug_macro 0x000178a3 0x56 ./Core/Src/ads1015_driver.o - .debug_macro 0x000178f9 0x10 ./Core/Src/ads1015_driver.o - .debug_macro 0x00017909 0x16 ./Core/Src/ads1015_driver.o - .debug_macro 0x0001791f 0x20 ./Core/Src/ads1015_driver.o - .debug_macro 0x0001793f 0x1d5 ./Core/Src/ads1015_driver.o - .debug_macro 0x00017b14 0x1de ./Core/Src/digital_outputs_driver.o - .debug_macro 0x00017cf2 0x1df ./Core/Src/gpio.o - .debug_macro 0x00017ed1 0x16 ./Core/Src/gpio.o - .debug_macro 0x00017ee7 0x1da ./Core/Src/i2c.o - .debug_macro 0x000180c1 0x367 ./Core/Src/main.o - .debug_macro 0x00018428 0x1c ./Core/Src/main.o - .debug_macro 0x00018444 0x229 ./Core/Src/main.o - .debug_macro 0x0001866d 0x28 ./Core/Src/main.o - .debug_macro 0x00018695 0x1d9 ./Core/Src/rs485_driver.o - .debug_macro 0x0001886e 0x1d0 ./Core/Src/stm32f1xx_hal_msp.o - .debug_macro 0x00018a3e 0x1da ./Core/Src/stm32f1xx_it.o - .debug_macro 0x00018c18 0x1c1 ./Core/Src/system_stm32f1xx.o - .debug_macro 0x00018dd9 0x1da ./Core/Src/tim.o - .debug_macro 0x00018fb3 0x1da ./Core/Src/usart.o - .debug_macro 0x0001918d 0x1e5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o - .debug_macro 0x00019372 0x1de ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o - .debug_macro 0x00019550 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o - .debug_macro 0x00019711 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o - .debug_macro 0x000198d2 0x22c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o - .debug_macro 0x00019afe 0x20f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o - .debug_macro 0x00019d0d 0x1d3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o - .debug_macro 0x00019ee0 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o - .debug_macro 0x0001a0a1 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o - .debug_macro 0x0001a263 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o - .debug_macro 0x0001a424 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o + .debug_macro 0x00016ede 0x353 ./Core/Src/ad5934_driver.o + .debug_macro 0x00017231 0x1da ./Core/Src/adc.o + .debug_macro 0x0001740b 0x1c8 ./Core/Src/adc.o + .debug_macro 0x000175d3 0x2c9 ./Core/Src/ads1015_driver.o + .debug_macro 0x0001789c 0x56 ./Core/Src/ads1015_driver.o + .debug_macro 0x000178f2 0x10 ./Core/Src/ads1015_driver.o + .debug_macro 0x00017902 0x16 ./Core/Src/ads1015_driver.o + .debug_macro 0x00017918 0x20 ./Core/Src/ads1015_driver.o + .debug_macro 0x00017938 0x1d5 ./Core/Src/ads1015_driver.o + .debug_macro 0x00017b0d 0x1de ./Core/Src/digital_outputs_driver.o + .debug_macro 0x00017ceb 0x1df ./Core/Src/gpio.o + .debug_macro 0x00017eca 0x16 ./Core/Src/gpio.o + .debug_macro 0x00017ee0 0x1da ./Core/Src/i2c.o + .debug_macro 0x000180ba 0x367 ./Core/Src/main.o + .debug_macro 0x00018421 0x1c ./Core/Src/main.o + .debug_macro 0x0001843d 0x229 ./Core/Src/main.o + .debug_macro 0x00018666 0x28 ./Core/Src/main.o + .debug_macro 0x0001868e 0x1d9 ./Core/Src/rs485_driver.o + .debug_macro 0x00018867 0x1d0 ./Core/Src/stm32f1xx_hal_msp.o + .debug_macro 0x00018a37 0x1da ./Core/Src/stm32f1xx_it.o + .debug_macro 0x00018c11 0x1c1 ./Core/Src/system_stm32f1xx.o + .debug_macro 0x00018dd2 0x1da ./Core/Src/tim.o + .debug_macro 0x00018fac 0x1da ./Core/Src/usart.o + .debug_macro 0x00019186 0x1e5 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.o + .debug_macro 0x0001936b 0x1de ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.o + .debug_macro 0x00019549 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.o + .debug_macro 0x0001970a 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.o + .debug_macro 0x000198cb 0x22c ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.o + .debug_macro 0x00019af7 0x20f ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.o + .debug_macro 0x00019d06 0x1d3 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.o + .debug_macro 0x00019ed9 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.o + .debug_macro 0x0001a09a 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.o + .debug_macro 0x0001a25c 0x1c1 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.o + .debug_macro 0x0001a41d 0x1c2 ./Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.o -.debug_line 0x00000000 0x17e9c - .debug_line 0x00000000 0x10f9 ./Core/Src/ad5934_driver.o - .debug_line 0x000010f9 0x83b ./Core/Src/adc.o - .debug_line 0x00001934 0xb86 ./Core/Src/ads1015_driver.o - .debug_line 0x000024ba 0x850 ./Core/Src/digital_outputs_driver.o - .debug_line 0x00002d0a 0x79d ./Core/Src/gpio.o - .debug_line 0x000034a7 0x820 ./Core/Src/i2c.o - .debug_line 0x00003cc7 0xce5 ./Core/Src/main.o - .debug_line 0x000049ac 0x8cd ./Core/Src/rs485_driver.o - .debug_line 0x00005279 0x749 ./Core/Src/stm32f1xx_hal_msp.o - .debug_line 0x000059c2 0x827 ./Core/Src/stm32f1xx_it.o - .debug_line 0x000061e9 0x7c7 ./Core/Src/system_stm32f1xx.o - .debug_line 0x000069b0 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